Boot log: qemu_arm64-virt-gicv3
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
- Errors: 0
1 13:51:52.131955 lava-dispatcher, installed at version: 2023.01
2 13:51:52.132137 start: 0 validate
3 13:51:52.132244 Start time: 2023-06-14 13:51:52.132237+00:00 (UTC)
4 13:51:52.133271 Validating that http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig/gcc-10/kernel/Image exists
5 13:51:52.474978 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/arm64/rootfs.cpio.gz exists
6 13:51:52.646244 cmd: ['docker', 'pull', 'kernelci/qemu']
7 13:51:52.646477 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 13:51:52.807329 >> Using default tag: latest
9 13:51:53.909405 >> latest: Pulling from kernelci/qemu
10 13:51:53.948972 >> Digest: sha256:ce67b4aa6149816ab5c39a34ebc77720cac0c3651072f2c36655342e38024d42
11 13:51:53.949261 >> Status: Image is up to date for kernelci/qemu:latest
12 13:51:53.982013 >> docker.io/kernelci/qemu:latest
13 13:51:53.985515 Returned 0 in 1 seconds
14 13:51:54.120905 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 13:51:54.121278 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 13:51:56.521408 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 13:51:56.521890 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 13:51:58.193569 Returned 0 in 4 seconds
19 13:51:58.294837 validate duration: 6.16
21 13:51:58.295369 start: 1 deployimages (timeout 00:03:00) [common]
22 13:51:58.295553 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 13:51:58.295983 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5
24 13:51:58.296230 makedir: /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin
25 13:51:58.296432 makedir: /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/tests
26 13:51:58.296625 makedir: /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/results
27 13:51:58.296813 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-add-keys
28 13:51:58.297066 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-add-sources
29 13:51:58.297300 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-background-process-start
30 13:51:58.297533 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-background-process-stop
31 13:51:58.297779 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-common-functions
32 13:51:58.298007 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-echo-ipv4
33 13:51:58.298236 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-install-packages
34 13:51:58.298464 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-installed-packages
35 13:51:58.298686 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-os-build
36 13:51:58.298911 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-probe-channel
37 13:51:58.299133 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-probe-ip
38 13:51:58.299419 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-target-ip
39 13:51:58.299689 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-target-mac
40 13:51:58.299918 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-target-storage
41 13:51:58.300148 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-case
42 13:51:58.300373 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-event
43 13:51:58.300599 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-feedback
44 13:51:58.300822 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-raise
45 13:51:58.301050 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-reference
46 13:51:58.301276 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-runner
47 13:51:58.301498 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-set
48 13:51:58.301735 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-test-shell
49 13:51:58.301969 Updating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-install-packages (oe)
50 13:51:58.302248 Updating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/bin/lava-installed-packages (oe)
51 13:51:58.302504 Creating /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/environment
52 13:51:58.302706 LAVA metadata
53 13:51:58.302841 - LAVA_JOB_ID=610580
54 13:51:58.302964 - LAVA_DISPATCHER_IP=172.27.0.2
55 13:51:58.303151 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 13:51:58.303283 skipped lava-vland-overlay
57 13:51:58.303426 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 13:51:58.303579 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 13:51:58.303702 skipped lava-multinode-overlay
60 13:51:58.303839 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 13:51:58.303988 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 13:51:58.304134 Loading test definitions
63 13:51:58.304308 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 13:51:58.304451 Using /lava-610580 at stage 0
65 13:51:58.305025 uuid=610580_1.1.3.1 testdef=None
66 13:51:58.305198 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 13:51:58.305351 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 13:51:58.306249 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 13:51:58.306708 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 13:51:58.307825 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 13:51:58.308295 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 13:51:58.309363 runner path: /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/0/tests/0_timesync-off test_uuid 610580_1.1.3.1
75 13:51:58.309660 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 13:51:58.310121 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 13:51:58.310255 Using /lava-610580 at stage 0
79 13:51:58.310437 Fetching tests from https://github.com/kernelci/test-definitions.git
80 13:51:58.310582 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/0/tests/1_kselftest-arm64_qemu'
81 13:52:05.338327 Running '/usr/bin/git checkout kernelci.org
82 13:52:05.507347 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 13:52:05.508008 uuid=610580_1.1.3.5 testdef=None
84 13:52:05.508144 end: 1.1.3.5 git-repo-action (duration 00:00:07) [common]
86 13:52:05.508402 start: 1.1.3.6 test-overlay (timeout 00:02:53) [common]
87 13:52:05.509216 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 13:52:05.509463 start: 1.1.3.7 test-install-overlay (timeout 00:02:53) [common]
90 13:52:05.510575 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 13:52:05.510838 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:53) [common]
93 13:52:05.511888 runner path: /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/0/tests/1_kselftest-arm64_qemu test_uuid 610580_1.1.3.5
94 13:52:05.511981 BOARD='qemu_arm64-virt-gicv3'
95 13:52:05.512045 BRANCH='cip'
96 13:52:05.512105 SKIPFILE='/dev/null'
97 13:52:05.512165 SKIP_INSTALL='True'
98 13:52:05.512223 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig/gcc-10/kselftest.tar.xz'
99 13:52:05.512285 TST_CASENAME=''
100 13:52:05.512348 TST_CMDFILES='arm64'
101 13:52:05.512484 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 13:52:05.512716 Creating lava-test-runner.conf files
104 13:52:05.512783 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/610580/lava-overlay-x21bqne5/lava-610580/0 for stage 0
105 13:52:05.512874 - 0_timesync-off
106 13:52:05.512944 - 1_kselftest-arm64_qemu
107 13:52:05.513036 end: 1.1.3 test-definition (duration 00:00:07) [common]
108 13:52:05.513121 start: 1.1.4 compress-overlay (timeout 00:02:53) [common]
109 13:52:14.073966 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 13:52:14.074151 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:44) [common]
111 13:52:14.074237 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 13:52:14.074340 end: 1.1 lava-overlay (duration 00:00:16) [common]
113 13:52:14.074432 start: 1.2 apply-overlay-guest (timeout 00:02:44) [common]
114 13:52:14.074506 Overlay: /var/lib/lava/dispatcher/tmp/610580/compress-overlay-qthvgl1e/overlay-1.1.4.tar.gz
115 13:52:28.696199 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 13:52:28.697014 start: 1.3 deploy-device-env (timeout 00:02:30) [common]
118 13:52:28.697237 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 13:52:28.697435 start: 1.4 download-retry (timeout 00:02:30) [common]
120 13:52:28.697634 start: 1.4.1 http-download (timeout 00:02:30) [common]
121 13:52:28.698036 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig/gcc-10/kernel/Image
122 13:52:28.698239 saving as /var/lib/lava/dispatcher/tmp/610580/deployimages-rl6yrif2/kernel/Image
123 13:52:28.698411 total size: 37358080 (35MB)
124 13:52:28.698596 No compression specified
125 13:52:29.039409 progress 0% (0MB)
126 13:52:30.059101 progress 5% (1MB)
127 13:52:30.228428 progress 10% (3MB)
128 13:52:30.414340 progress 15% (5MB)
129 13:52:30.428920 progress 20% (7MB)
130 13:52:30.767293 progress 25% (8MB)
131 13:52:30.928629 progress 30% (10MB)
132 13:52:31.089002 progress 35% (12MB)
133 13:52:31.122816 progress 40% (14MB)
134 13:52:31.272993 progress 45% (16MB)
135 13:52:31.436015 progress 50% (17MB)
136 13:52:31.465601 progress 55% (19MB)
137 13:52:31.615979 progress 60% (21MB)
138 13:52:31.778824 progress 65% (23MB)
139 13:52:31.936461 progress 70% (24MB)
140 13:52:31.968164 progress 75% (26MB)
141 13:52:32.120668 progress 80% (28MB)
142 13:52:32.278109 progress 85% (30MB)
143 13:52:32.309919 progress 90% (32MB)
144 13:52:32.460949 progress 95% (33MB)
145 13:52:32.627167 progress 100% (35MB)
146 13:52:32.627381 35MB downloaded in 3.93s (9.07MB/s)
147 13:52:32.627659 end: 1.4.1 http-download (duration 00:00:04) [common]
149 13:52:32.628149 end: 1.4 download-retry (duration 00:00:04) [common]
150 13:52:32.628310 start: 1.5 download-retry (timeout 00:02:26) [common]
151 13:52:32.628468 start: 1.5.1 http-download (timeout 00:02:26) [common]
152 13:52:32.628701 Not decompressing ramdisk as can be used compressed.
153 13:52:32.628862 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/arm64/rootfs.cpio.gz
154 13:52:32.628986 saving as /var/lib/lava/dispatcher/tmp/610580/deployimages-rl6yrif2/ramdisk/rootfs.cpio.gz
155 13:52:32.629104 total size: 88950412 (84MB)
156 13:52:32.629220 No compression specified
157 13:52:32.800087 progress 0% (0MB)
158 13:52:33.006119 progress 5% (4MB)
159 13:52:33.501526 progress 10% (8MB)
160 13:52:34.013524 progress 15% (12MB)
161 13:52:34.522609 progress 20% (16MB)
162 13:52:35.030160 progress 25% (21MB)
163 13:52:35.537915 progress 30% (25MB)
164 13:52:36.067560 progress 35% (29MB)
165 13:52:36.896426 progress 40% (33MB)
166 13:52:37.750823 progress 45% (38MB)
167 13:52:38.610164 progress 50% (42MB)
168 13:52:39.444212 progress 55% (46MB)
169 13:52:40.286379 progress 60% (50MB)
170 13:52:41.128894 progress 65% (55MB)
171 13:52:41.830317 progress 70% (59MB)
172 13:52:42.659940 progress 75% (63MB)
173 13:52:43.506336 progress 80% (67MB)
174 13:52:44.211032 progress 85% (72MB)
175 13:52:45.036883 progress 90% (76MB)
176 13:52:45.880374 progress 95% (80MB)
177 13:52:46.578331 progress 100% (84MB)
178 13:52:46.578764 84MB downloaded in 13.95s (6.08MB/s)
179 13:52:46.579075 end: 1.5.1 http-download (duration 00:00:14) [common]
181 13:52:46.579650 end: 1.5 download-retry (duration 00:00:14) [common]
182 13:52:46.579841 end: 1 deployimages (duration 00:00:48) [common]
183 13:52:46.580032 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 13:52:46.580225 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 13:52:46.580411 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 13:52:46.580784 Extending command line for qcow2 test overlay
187 13:52:46.581398 Pulling docker image
188 13:52:46.581565 cmd: ['docker', 'pull', 'kernelci/qemu']
189 13:52:46.581733 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 13:52:46.742305 >> Using default tag: latest
191 13:52:48.218737 >> latest: Pulling from kernelci/qemu
192 13:52:48.377725 >> Digest: sha256:ce67b4aa6149816ab5c39a34ebc77720cac0c3651072f2c36655342e38024d42
193 13:52:48.378044 >> Status: Image is up to date for kernelci/qemu:latest
194 13:52:48.417994 >> docker.io/kernelci/qemu:latest
195 13:52:48.421171 Returned 0 in 1 seconds
196 13:52:48.558409 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-610580-2.1.1-0anxqom3yx --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/610580/deployimages-rl6yrif2/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/610580/deployimages-rl6yrif2/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/610580/apply-overlay-guest-_cd7yz_5/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 13:52:48.705770 started a shell command
198 13:52:48.706356 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 13:52:48.706554 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 13:52:48.706724 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 13:52:48.706896 Setting prompt string to ['Linux version [0-9]']
202 13:52:48.707038 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 13:52:50.266299 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 13:52:50.266820 start: 2.2.1 login-action (timeout 00:04:56) [common]
205 13:52:50.266945 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
206 13:52:50.267075 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
207 13:52:50.267169 Using line separator: #'\n'#
208 13:52:50.267235 No login prompt set.
209 13:52:50.267324 Parsing kernel messages
210 13:52:50.267426 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
211 13:52:50.267566 [login-action] Waiting for messages, (timeout 00:04:56)
212 13:52:50.268340 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j35867-arm64-gcc-10-defconfig-5xzdg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed Jun 14 12:28:22 UTC 2023
213 13:52:50.268430 [ 0.000000] random: crng init done
214 13:52:50.268520 [ 0.000000] Machine model: linux,dummy-virt
215 13:52:50.268593 [ 0.000000] efi: UEFI not found.
216 13:52:50.268684 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
217 13:52:50.268768 [ 0.000000] printk: bootconsole [pl11] enabled
218 13:52:50.270711 [ 0.000000] NUMA: No NUMA configuration found
219 13:52:50.270854 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 13:52:50.271522 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf2a00-0x7fdf4fff]
221 13:52:50.273662 [ 0.000000] Zone ranges:
222 13:52:50.274445 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 13:52:50.274561 [ 0.000000] DMA32 empty
224 13:52:50.274667 [ 0.000000] Normal empty
225 13:52:50.274765 [ 0.000000] Movable zone start for each node
226 13:52:50.274862 [ 0.000000] Early memory node ranges
227 13:52:50.275135 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 13:52:50.275708 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 13:52:50.290185 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 13:52:50.291211 [ 0.000000] psci: probing for conduit method from DT.
231 13:52:50.291393 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 13:52:50.291602 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 13:52:50.291805 [ 0.000000] psci: Trusted OS migration not required
234 13:52:50.292017 [ 0.000000] psci: SMC Calling Convention v1.0
235 13:52:50.294348 [ 0.000000] percpu: Embedded 20 pages/cpu s44840 r8192 d28888 u81920
236 13:52:50.294782 [ 0.000000] pcpu-alloc: s44840 r8192 d28888 u81920 alloc=20*4096
237 13:52:50.295214 [ 0.000000] pcpu-alloc: [0] 0
238 13:52:50.296416 [ 0.000000] Detected PIPT I-cache on CPU0
239 13:52:50.301723 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 13:52:50.302462 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 13:52:50.302588 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 13:52:50.302929 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 13:52:50.303021 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 13:52:50.303149 [ 0.000000] CPU features: detected: Spectre-v4
245 13:52:50.306844 [ 0.000000] alternatives: applying boot alternatives
246 13:52:50.309721 [ 0.000000] Fallback order for Node 0: 0
247 13:52:50.309827 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 13:52:50.309940 [ 0.000000] Policy zone: DMA
249 13:52:50.310483 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 13:52:50.312777 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 13:52:50.315254 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 13:52:50.315724 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 13:52:50.316043 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 13:52:50.325037 <6>[ 0.000000] Memory: 870696K/1048576K available (16192K kernel code, 3714K rwdata, 8860K rodata, 7552K init, 609K bss, 145112K reserved, 32768K cma-reserved)
255 13:52:50.331197 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 13:52:50.337723 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 13:52:50.338070 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 13:52:50.338174 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 13:52:50.338547 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 13:52:50.338648 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 13:52:50.338773 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 13:52:50.338886 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 13:52:50.339840 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 13:52:50.346685 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 13:52:50.346810 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 13:52:50.348423 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 13:52:50.348545 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 13:52:50.349225 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 13:52:50.353652 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 13:52:50.354382 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @42830000 (indirect, esz 8, psz 64K, shr 1)
271 13:52:50.354766 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @42840000 (flat, esz 8, psz 64K, shr 1)
272 13:52:50.355463 <6>[ 0.000000] GICv3: using LPI property table @0x0000000042850000
273 13:52:50.355938 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000042860000
274 13:52:50.357314 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 13:52:50.365428 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 13:52:50.365767 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 13:52:50.366502 <6>[ 0.000076] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 13:52:50.383882 <6>[ 0.015003] Console: colour dummy device 80x25
279 13:52:50.387896 <6>[ 0.021009] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 13:52:50.388111 <6>[ 0.021903] pid_max: default: 32768 minimum: 301
281 13:52:50.389616 <6>[ 0.023345] LSM: Security Framework initializing
282 13:52:50.393931 <6>[ 0.027635] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 13:52:50.394156 <6>[ 0.027933] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 13:52:50.426455 <4>[ 0.060272] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 13:52:50.432669 <6>[ 0.066207] cblist_init_generic: Setting adjustable number of callback queues.
286 13:52:50.432919 <6>[ 0.066514] cblist_init_generic: Setting shift to 0 and lim to 1.
287 13:52:50.433315 <6>[ 0.067050] cblist_init_generic: Setting shift to 0 and lim to 1.
288 13:52:50.435165 <6>[ 0.068824] rcu: Hierarchical SRCU implementation.
289 13:52:50.435281 <6>[ 0.069045] rcu: Max phase no-delay instances is 1000.
290 13:52:50.440364 <6>[ 0.074010] Platform MSI: its@8080000 domain created
291 13:52:50.441230 <6>[ 0.074760] PCI/MSI: /intc@8000000/its@8080000 domain created
292 13:52:50.441518 <6>[ 0.075409] fsl-mc MSI: its@8080000 domain created
293 13:52:50.445062 <6>[ 0.078819] EFI services will not be available.
294 13:52:50.446079 <6>[ 0.079793] smp: Bringing up secondary CPUs ...
295 13:52:50.446177 <6>[ 0.080016] smp: Brought up 1 node, 1 CPU
296 13:52:50.446297 <6>[ 0.080143] SMP: Total of 1 processors activated.
297 13:52:50.446623 <6>[ 0.080485] CPU features: detected: Branch Target Identification
298 13:52:50.446970 <6>[ 0.080706] CPU features: detected: 32-bit EL0 Support
299 13:52:50.447089 <6>[ 0.080859] CPU features: detected: 32-bit EL1 Support
300 13:52:50.447212 <6>[ 0.081018] CPU features: detected: ARMv8.4 Translation Table Level
301 13:52:50.447869 <6>[ 0.081609] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 13:52:50.448010 <6>[ 0.081870] CPU features: detected: Common not Private translations
303 13:52:50.448354 <6>[ 0.082064] CPU features: detected: CRC32 instructions
304 13:52:50.448438 <6>[ 0.082249] CPU features: detected: E0PD
305 13:52:50.448761 <6>[ 0.082442] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 13:52:50.448872 <6>[ 0.082641] CPU features: detected: RCpc load-acquire (LDAPR)
307 13:52:50.448963 <6>[ 0.082817] CPU features: detected: LSE atomic instructions
308 13:52:50.449299 <6>[ 0.082973] CPU features: detected: Privileged Access Never
309 13:52:50.449391 <6>[ 0.083156] CPU features: detected: RAS Extension Support
310 13:52:50.449514 <6>[ 0.083297] CPU features: detected: Random Number Generator
311 13:52:50.449636 <6>[ 0.083415] CPU features: detected: Speculation barrier (SB)
312 13:52:50.449769 <6>[ 0.083542] CPU features: detected: Stage-2 Force Write-Back
313 13:52:50.449888 <6>[ 0.083685] CPU features: detected: TLB range maintenance instructions
314 13:52:50.450006 <6>[ 0.083863] CPU features: detected: Scalable Matrix Extension
315 13:52:50.450122 <6>[ 0.084000] CPU features: detected: FA64
316 13:52:50.450239 <6>[ 0.084099] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 13:52:50.450545 <6>[ 0.084277] CPU features: detected: Scalable Vector Extension
318 13:52:50.462803 <6>[ 0.093836] SVE: maximum available vector length 256 bytes per vector
319 13:52:50.463368 <6>[ 0.097042] SVE: default vector length 64 bytes per vector
320 13:52:50.465388 <6>[ 0.099114] SME: minimum available vector length 16 bytes per vector
321 13:52:50.465497 <6>[ 0.099338] SME: maximum available vector length 256 bytes per vector
322 13:52:50.465811 <6>[ 0.099529] SME: default vector length 32 bytes per vector
323 13:52:50.466111 <6>[ 0.099980] CPU: All CPU(s) started at EL1
324 13:52:50.466647 <6>[ 0.100358] alternatives: applying system-wide alternatives
325 13:52:50.519125 <6>[ 0.152804] devtmpfs: initialized
326 13:52:50.539278 <6>[ 0.172824] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 13:52:50.540648 <6>[ 0.174349] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 13:52:50.545871 <6>[ 0.179561] pinctrl core: initialized pinctrl subsystem
329 13:52:50.557067 <6>[ 0.190941] DMI not present or invalid.
330 13:52:50.566359 <6>[ 0.200033] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 13:52:50.577984 <6>[ 0.211443] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 13:52:50.578468 <6>[ 0.212272] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 13:52:50.578941 <6>[ 0.212749] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 13:52:50.579380 <6>[ 0.213199] audit: initializing netlink subsys (disabled)
335 13:52:50.585108 <5>[ 0.218704] audit: type=2000 audit(0.180:1): state=initialized audit_enabled=0 res=1
336 13:52:50.587316 <6>[ 0.220939] thermal_sys: Registered thermal governor 'step_wise'
337 13:52:50.587974 <6>[ 0.221007] thermal_sys: Registered thermal governor 'power_allocator'
338 13:52:50.588154 <6>[ 0.221637] cpuidle: using governor menu
339 13:52:50.589750 <6>[ 0.223356] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
340 13:52:50.590177 <6>[ 0.223965] ASID allocator initialised with 65536 entries
341 13:52:50.596320 <6>[ 0.230001] Serial: AMBA PL011 UART driver
342 13:52:50.646529 <6>[ 0.280077] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
343 13:52:50.648073 <6>[ 0.281612] printk: console [ttyAMA0] enabled
344 13:52:50.648260 <6>[ 0.281612] printk: console [ttyAMA0] enabled
345 13:52:50.648474 <6>[ 0.282100] printk: bootconsole [pl11] disabled
346 13:52:50.648624 <6>[ 0.282100] printk: bootconsole [pl11] disabled
347 13:52:50.659208 <6>[ 0.293023] KASLR enabled
348 13:52:50.690561 <6>[ 0.324327] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
349 13:52:50.691144 <6>[ 0.324518] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
350 13:52:50.691337 <6>[ 0.324684] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
351 13:52:50.691501 <6>[ 0.324842] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
352 13:52:50.691716 <6>[ 0.324987] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
353 13:52:50.691857 <6>[ 0.325159] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
354 13:52:50.691982 <6>[ 0.325310] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
355 13:52:50.692101 <6>[ 0.325492] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
356 13:52:50.703564 <6>[ 0.337399] ACPI: Interpreter disabled.
357 13:52:50.712681 <6>[ 0.346537] iommu: Default domain type: Translated
358 13:52:50.713167 <6>[ 0.346696] iommu: DMA domain TLB invalidation policy: strict mode
359 13:52:50.714441 <5>[ 0.348353] SCSI subsystem initialized
360 13:52:50.715678 <7>[ 0.349289] libata version 3.00 loaded.
361 13:52:50.717029 <6>[ 0.350665] usbcore: registered new interface driver usbfs
362 13:52:50.717246 <6>[ 0.351051] usbcore: registered new interface driver hub
363 13:52:50.717736 <6>[ 0.351375] usbcore: registered new device driver usb
364 13:52:50.720886 <6>[ 0.354415] pps_core: LinuxPPS API ver. 1 registered
365 13:52:50.721100 <6>[ 0.354553] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
366 13:52:50.721338 <6>[ 0.354884] PTP clock support registered
367 13:52:50.721871 <6>[ 0.355670] EDAC MC: Ver: 3.0.0
368 13:52:50.727615 <6>[ 0.361242] FPGA manager framework
369 13:52:50.728176 <6>[ 0.362013] Advanced Linux Sound Architecture Driver Initialized.
370 13:52:50.737184 <6>[ 0.371083] vgaarb: loaded
371 13:52:50.741328 <6>[ 0.374953] clocksource: Switched to clocksource arch_sys_counter
372 13:52:50.742568 <5>[ 0.376164] VFS: Disk quotas dquot_6.6.0
373 13:52:50.742756 <6>[ 0.376470] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
374 13:52:50.746039 <6>[ 0.379911] pnp: PnP ACPI: disabled
375 13:52:50.764081 <6>[ 0.397682] NET: Registered PF_INET protocol family
376 13:52:50.766263 <6>[ 0.399890] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
377 13:52:50.770969 <6>[ 0.404595] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
378 13:52:50.771174 <6>[ 0.404893] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
379 13:52:50.771375 <6>[ 0.405150] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
380 13:52:50.771816 <6>[ 0.405538] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
381 13:52:50.772303 <6>[ 0.406095] TCP: Hash tables configured (established 8192 bind 8192)
382 13:52:50.773915 <6>[ 0.407606] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
383 13:52:50.774255 <6>[ 0.408042] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
384 13:52:50.775611 <6>[ 0.409331] NET: Registered PF_UNIX/PF_LOCAL protocol family
385 13:52:50.778029 <6>[ 0.411734] RPC: Registered named UNIX socket transport module.
386 13:52:50.778160 <6>[ 0.411966] RPC: Registered udp transport module.
387 13:52:50.778286 <6>[ 0.412137] RPC: Registered tcp transport module.
388 13:52:50.778794 <6>[ 0.412322] RPC: Registered tcp NFSv4.1 backchannel transport module.
389 13:52:50.778950 <6>[ 0.412651] PCI: CLS 0 bytes, default 64
390 13:52:50.783212 <6>[ 0.417107] Unpacking initramfs...
391 13:52:50.793586 <6>[ 0.427114] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
392 13:52:50.794136 <6>[ 0.427865] kvm [1]: HYP mode not available
393 13:52:50.801980 <5>[ 0.435593] Initialise system trusted keyrings
394 13:52:50.803407 <6>[ 0.437032] workingset: timestamp_bits=42 max_order=18 bucket_order=0
395 13:52:50.839632 <6>[ 0.473179] squashfs: version 4.0 (2009/01/31) Phillip Lougher
396 13:52:50.846566 <5>[ 0.480147] NFS: Registering the id_resolver key type
397 13:52:50.846810 <5>[ 0.480560] Key type id_resolver registered
398 13:52:50.846990 <5>[ 0.480731] Key type id_legacy registered
399 13:52:50.847443 <6>[ 0.481223] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
400 13:52:50.847675 <6>[ 0.481513] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
401 13:52:50.853235 <6>[ 0.486861] 9p: Installing v9fs 9p2000 file system support
402 13:52:50.917672 <5>[ 0.551492] Key type asymmetric registered
403 13:52:50.918238 <5>[ 0.551696] Asymmetric key parser 'x509' registered
404 13:52:50.918425 <6>[ 0.552128] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
405 13:52:50.918607 <6>[ 0.552453] io scheduler mq-deadline registered
406 13:52:50.918793 <6>[ 0.552661] io scheduler kyber registered
407 13:52:50.981671 <6>[ 0.615305] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
408 13:52:50.992458 <6>[ 0.626072] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
409 13:52:50.997763 <6>[ 0.631209] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
410 13:52:50.998565 <6>[ 0.632021] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
411 13:52:50.998729 <6>[ 0.632346] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
412 13:52:50.999159 <4>[ 0.633006] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
413 13:52:51.000437 <6>[ 0.633843] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
414 13:52:51.005827 <6>[ 0.639459] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
415 13:52:51.006032 <6>[ 0.639866] pci_bus 0000:00: root bus resource [bus 00-ff]
416 13:52:51.006333 <6>[ 0.640087] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
417 13:52:51.006545 <6>[ 0.640342] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
418 13:52:51.006730 <6>[ 0.640509] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
419 13:52:51.008140 <6>[ 0.642000] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
420 13:52:51.015808 <6>[ 0.649396] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
421 13:52:51.016034 <6>[ 0.649796] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
422 13:52:51.016254 <6>[ 0.649976] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
423 13:52:51.016517 <6>[ 0.650213] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
424 13:52:51.016822 <6>[ 0.650494] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
425 13:52:51.022006 <6>[ 0.655641] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
426 13:52:51.022129 <6>[ 0.655852] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
427 13:52:51.022474 <6>[ 0.656042] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
428 13:52:51.022583 <6>[ 0.656236] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
429 13:52:51.029514 <6>[ 0.663131] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
430 13:52:51.029943 <6>[ 0.663603] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
431 13:52:51.030270 <6>[ 0.663946] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
432 13:52:51.030368 <6>[ 0.664190] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
433 13:52:51.030726 <6>[ 0.664413] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
434 13:52:51.030828 <6>[ 0.664608] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
435 13:52:51.031131 <6>[ 0.664851] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
436 13:52:51.046250 <6>[ 0.680055] EINJ: ACPI disabled.
437 13:52:51.133833 <6>[ 0.767565] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
438 13:52:51.136818 <6>[ 0.770396] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
439 13:52:51.169333 <6>[ 0.803046] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
440 13:52:51.182552 <6>[ 0.816339] SuperH (H)SCI(F) driver initialized
441 13:52:51.183951 <6>[ 0.817812] msm_serial: driver initialized
442 13:52:51.192871 <4>[ 0.826458] cacheinfo: Unable to detect cache hierarchy for CPU 0
443 13:52:51.233848 <6>[ 0.867597] loop: module loaded
444 13:52:51.234900 <6>[ 0.868547] virtio_blk virtio1: 1/0/0 default/read/poll queues
445 13:52:51.252328 <5>[ 0.885831] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
446 13:52:51.289934 <6>[ 0.923752] megasas: 07.719.03.00-rc1
447 13:52:51.300296 <5>[ 0.933883] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
448 13:52:51.305739 <6>[ 0.939316] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
449 13:52:51.306334 <6>[ 0.940018] Intel/Sharp Extended Query Table at 0x0031
450 13:52:51.306901 <6>[ 0.940831] Using buffer write method
451 13:52:51.307388 <7>[ 0.941258] erase region 0: offset=0x0,size=0x40000,blocks=256
452 13:52:51.307970 <5>[ 0.941608] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
453 13:52:51.308619 <6>[ 0.942291] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
454 13:52:51.308746 <6>[ 0.942592] Intel/Sharp Extended Query Table at 0x0031
455 13:52:51.313494 <6>[ 0.947347] Using buffer write method
456 13:52:51.313840 <7>[ 0.947504] erase region 0: offset=0x0,size=0x40000,blocks=256
457 13:52:51.313963 <5>[ 0.947738] Concatenating MTD devices:
458 13:52:51.314074 <5>[ 0.947872] (0): \"0.flash\"
459 13:52:51.314173 <5>[ 0.948006] (1): \"0.flash\"
460 13:52:51.314271 <5>[ 0.948105] into device \"0.flash\"
461 13:52:55.969534 <6>[ 5.603222] Freeing initrd memory: 86864K
462 13:52:56.080584 <6>[ 5.714265] tun: Universal TUN/TAP device driver, 1.6
463 13:52:56.090024 <6>[ 5.723869] thunder_xcv, ver 1.0
464 13:52:56.090526 <6>[ 5.724105] thunder_bgx, ver 1.0
465 13:52:56.090673 <6>[ 5.724309] nicpf, ver 1.0
466 13:52:56.093935 <6>[ 5.727523] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
467 13:52:56.094099 <6>[ 5.727737] hns3: Copyright (c) 2017 Huawei Corporation.
468 13:52:56.094315 <6>[ 5.728134] hclge is initializing
469 13:52:56.094491 <6>[ 5.728363] e1000: Intel(R) PRO/1000 Network Driver
470 13:52:56.094660 <6>[ 5.728487] e1000: Copyright (c) 1999-2006 Intel Corporation.
471 13:52:56.095093 <6>[ 5.728739] e1000e: Intel(R) PRO/1000 Network Driver
472 13:52:56.095265 <6>[ 5.728860] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
473 13:52:56.095436 <6>[ 5.729116] igb: Intel(R) Gigabit Ethernet Network Driver
474 13:52:56.095571 <6>[ 5.729245] igb: Copyright (c) 2007-2014 Intel Corporation.
475 13:52:56.095734 <6>[ 5.729463] igbvf: Intel(R) Gigabit Virtual Function Network Driver
476 13:52:56.095855 <6>[ 5.729610] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
477 13:52:56.096603 <6>[ 5.730505] sky2: driver version 1.30
478 13:52:56.099452 <6>[ 5.733348] VFIO - User Level meta-driver version: 0.3
479 13:52:56.109261 <6>[ 5.742835] usbcore: registered new interface driver usb-storage
480 13:52:56.118570 <6>[ 5.752383] rtc-pl031 9010000.pl031: registered as rtc0
481 13:52:56.119694 <6>[ 5.753107] rtc-pl031 9010000.pl031: setting system clock to 2023-06-14T13:52:56 UTC (1686750776)
482 13:52:56.121430 <6>[ 5.755315] i2c_dev: i2c /dev entries driver
483 13:52:56.137522 <6>[ 5.771142] sdhci: Secure Digital Host Controller Interface driver
484 13:52:56.137697 <6>[ 5.771317] sdhci: Copyright(c) Pierre Ossman
485 13:52:56.139523 <6>[ 5.773202] Synopsys Designware Multimedia Card Interface Driver
486 13:52:56.142063 <6>[ 5.775695] sdhci-pltfm: SDHCI platform and OF driver helper
487 13:52:56.146878 <6>[ 5.780516] ledtrig-cpu: registered to indicate activity on CPUs
488 13:52:56.152392 <6>[ 5.786023] usbcore: registered new interface driver usbhid
489 13:52:56.152594 <6>[ 5.786207] usbhid: USB HID core driver
490 13:52:56.168623 <6>[ 5.802276] NET: Registered PF_PACKET protocol family
491 13:52:56.169617 <6>[ 5.803498] 9pnet: Installing 9P2000 support
492 13:52:56.170064 <5>[ 5.803902] Key type dns_resolver registered
493 13:52:56.171478 <6>[ 5.805129] registered taskstats version 1
494 13:52:56.171658 <5>[ 5.805496] Loading compiled-in X.509 certificates
495 13:52:56.192217 <6>[ 5.825840] input: gpio-keys as /devices/platform/gpio-keys/input/input0
496 13:52:56.199433 <6>[ 5.833327] ALSA device list:
497 13:52:56.199920 <6>[ 5.833496] No soundcards found.
498 13:52:56.202725 <6>[ 5.836355] uart-pl011 9000000.pl011: no DMA platform data
499 13:52:56.257003 <6>[ 5.890773] Freeing unused kernel memory: 7552K
500 13:52:56.258048 <6>[ 5.891695] Run /init as init process
501 13:52:56.258163 <7>[ 5.891836] with arguments:
502 13:52:56.258257 <7>[ 5.891937] /init
503 13:52:56.258361 <7>[ 5.892032] verbose
504 13:52:56.258449 <7>[ 5.892156] with environment:
505 13:52:56.258555 <7>[ 5.892300] HOME=/
506 13:52:56.258640 <7>[ 5.892420] TERM=linux
507 13:52:56.386337 <30>[ 6.019741] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
508 13:52:56.387295 <31>[ 6.020978] systemd[1]: No virtualization found in DMI
509 13:52:56.388267 <31>[ 6.021972] systemd[1]: UML virtualization not found in /proc/cpuinfo.
510 13:52:56.388613 <31>[ 6.022259] systemd[1]: No virtualization found in CPUID
511 13:52:56.388971 <31>[ 6.022592] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
512 13:52:56.390389 <31>[ 6.024091] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
513 13:52:56.390736 <31>[ 6.024481] systemd[1]: Found VM virtualization qemu
514 13:52:56.391090 <30>[ 6.024758] systemd[1]: Detected virtualization qemu.
515 13:52:56.391507 <30>[ 6.025162] systemd[1]: Detected architecture arm64.
516 13:52:56.392104 <31>[ 6.025607] systemd[1]: Detected initialized system, this is not the first boot.
517 13:52:56.395976
518 13:52:56.396478 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
519 13:52:56.396631
520 13:52:56.398329 <30>[ 6.031985] systemd[1]: Set hostname to <debian-bullseye-arm64>.
521 13:52:56.417510 <31>[ 6.051103] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
522 13:52:56.418666 <31>[ 6.052295] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
523 13:52:56.419204 <31>[ 6.052763] systemd[1]: Successfully brought loopback interface up
524 13:52:56.423825 <31>[ 6.057408] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
525 13:52:56.435735 <31>[ 6.069338] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
526 13:52:56.435959 <31>[ 6.069631] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
527 13:52:56.475173 <31>[ 6.108631] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
528 13:52:56.476080 <31>[ 6.109960] systemd[1]: Controller 'cpu' supported: yes
529 13:52:56.476509 <31>[ 6.110126] systemd[1]: Controller 'cpuacct' supported: no
530 13:52:56.476664 <31>[ 6.110274] systemd[1]: Controller 'cpuset' supported: yes
531 13:52:56.476812 <31>[ 6.110432] systemd[1]: Controller 'io' supported: yes
532 13:52:56.476937 <31>[ 6.110560] systemd[1]: Controller 'blkio' supported: no
533 13:52:56.477352 <31>[ 6.110984] systemd[1]: Controller 'memory' supported: yes
534 13:52:56.477517 <31>[ 6.111165] systemd[1]: Controller 'devices' supported: no
535 13:52:56.477711 <31>[ 6.111298] systemd[1]: Controller 'pids' supported: yes
536 13:52:56.477853 <31>[ 6.111422] systemd[1]: Controller 'bpf-firewall' supported: yes
537 13:52:56.477996 <31>[ 6.111566] systemd[1]: Controller 'bpf-devices' supported: yes
538 13:52:56.479183 <31>[ 6.112809] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
539 13:52:56.479401 <31>[ 6.113173] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
540 13:52:56.479856 <31>[ 6.113693] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
541 13:52:56.488011 <31>[ 6.121569] systemd[1]: Enabling (yes) showing of status (commandline).
542 13:52:56.496466 <31>[ 6.130006] systemd[1]: Successfully forked off '(sd-executor)' as PID 94.
543 13:52:56.510427 <31>[ 6.143936] systemd[94]: Successfully forked off '(direxec)' as PID 95.
544 13:52:56.513008 <31>[ 6.146482] systemd[94]: Successfully forked off '(direxec)' as PID 96.
545 13:52:56.523764 <31>[ 6.157505] systemd[94]: Successfully forked off '(direxec)' as PID 97.
546 13:52:56.538131 <31>[ 6.171554] systemd[94]: Successfully forked off '(direxec)' as PID 98.
547 13:52:56.540281 <31>[ 6.174020] systemd[94]: Successfully forked off '(direxec)' as PID 99.
548 13:52:56.706251 <31>[ 6.339959] systemd-bless-boot-generator[95]: Skipping generator, not an EFI boot.
549 13:52:56.712471 <31>[ 6.346058] systemd-fstab-generator[96]: Parsing /etc/fstab...
550 13:52:56.714773 <31>[ 6.348400] systemd-fstab-generator[96]: Found entry what=/dev/disk/by-uuid/e8944c3c-78ff-4c74-a97d-ff60ed2bed2f where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
551 13:52:56.717382 <31>[ 6.350959] systemd-getty-generator[97]: Automatically adding serial getty for /dev/ttyAMA0.
552 13:52:56.718404 <31>[ 6.352091] systemd-getty-generator[97]: SELinux enabled state cached to: disabled
553 13:52:56.729989 <31>[ 6.363501] systemd-fstab-generator[96]: Checking was requested for /dev/disk/by-uuid/e8944c3c-78ff-4c74-a97d-ff60ed2bed2f, but fsck.ext4 does not exist.
554 13:52:56.732860 <31>[ 6.366516] systemd-fstab-generator[96]: SELinux enabled state cached to: disabled
555 13:52:56.734449 <31>[ 6.368057] systemd[94]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
556 13:52:56.741595 <31>[ 6.375125] systemd[94]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
557 13:52:56.741912 <31>[ 6.375518] systemd[94]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
558 13:52:56.742944 <31>[ 6.376605] systemd[94]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
559 13:52:56.743418 <31>[ 6.376995] systemd[94]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
560 13:52:56.746343 <31>[ 6.379955] systemd[1]: (sd-executor) succeeded.
561 13:52:56.747721 <31>[ 6.381312] systemd[1]: Looking for unit files in (higher priority first):
562 13:52:56.747886 <31>[ 6.381558] systemd[1]: /etc/systemd/system.control
563 13:52:56.748079 <31>[ 6.381753] systemd[1]: /run/systemd/system.control
564 13:52:56.748267 <31>[ 6.381962] systemd[1]: /run/systemd/transient
565 13:52:56.748452 <31>[ 6.382156] systemd[1]: /run/systemd/generator.early
566 13:52:56.748614 <31>[ 6.382336] systemd[1]: /etc/systemd/system
567 13:52:56.748765 <31>[ 6.382467] systemd[1]: /etc/systemd/system.attached
568 13:52:56.749363 <31>[ 6.383212] systemd[1]: /run/systemd/system
569 13:52:56.749823 <31>[ 6.383418] systemd[1]: /run/systemd/system.attached
570 13:52:56.749969 <31>[ 6.383611] systemd[1]: /run/systemd/generator
571 13:52:56.750115 <31>[ 6.383809] systemd[1]: /usr/local/lib/systemd/system
572 13:52:56.750283 <31>[ 6.383994] systemd[1]: /lib/systemd/system
573 13:52:56.750457 <31>[ 6.384200] systemd[1]: /usr/lib/systemd/system
574 13:52:56.750621 <31>[ 6.384407] systemd[1]: /run/systemd/generator.late
575 13:52:56.785776 <31>[ 6.419320] systemd[1]: Modification times have changed, need to update cache.
576 13:52:56.787435 <31>[ 6.420892] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
577 13:52:56.788136 <31>[ 6.421781] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
578 13:52:56.788898 <31>[ 6.422452] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
579 13:52:56.790105 <31>[ 6.423716] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
580 13:52:56.791323 <31>[ 6.424881] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/autovt@.service → getty@.service
581 13:52:56.791557 <31>[ 6.425203] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
582 13:52:56.791769 <31>[ 6.425497] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub@.service
583 13:52:56.792342 <31>[ 6.425782] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
584 13:52:56.792601 <31>[ 6.426107] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
585 13:52:56.792824 <31>[ 6.426439] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
586 13:52:56.793509 <31>[ 6.427079] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
587 13:52:56.793638 <31>[ 6.427380] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
588 13:52:56.794435 <31>[ 6.428114] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
589 13:52:56.794816 <31>[ 6.428451] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
590 13:52:56.794941 <31>[ 6.428712] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
591 13:52:56.795302 <31>[ 6.428982] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sysinit.target
592 13:52:56.795670 <31>[ 6.429304] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
593 13:52:56.796042 <31>[ 6.429595] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
594 13:52:56.796445 <31>[ 6.430209] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
595 13:52:56.797567 <31>[ 6.431152] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
596 13:52:56.797805 <31>[ 6.431490] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/swap.target
597 13:52:56.798009 <31>[ 6.431717] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
598 13:52:56.798614 <31>[ 6.432024] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
599 13:52:56.798821 <31>[ 6.432360] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
600 13:52:56.798993 <31>[ 6.432674] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
601 13:52:56.799471 <31>[ 6.433028] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
602 13:52:56.800118 <31>[ 6.433528] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
603 13:52:56.800342 <31>[ 6.433827] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
604 13:52:56.800600 <31>[ 6.434156] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
605 13:52:56.800782 <31>[ 6.434430] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
606 13:52:56.801262 <31>[ 6.434744] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
607 13:52:56.801800 <31>[ 6.435349] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
608 13:52:56.802012 <31>[ 6.435674] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
609 13:52:56.802799 <31>[ 6.436313] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel6.target → reboot.target
610 13:52:56.803578 <31>[ 6.437084] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/ctrl-alt-del.target → reboot.target
611 13:52:56.803704 <31>[ 6.437386] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
612 13:52:56.804111 <31>[ 6.437634] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
613 13:52:56.804242 <31>[ 6.437933] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rc-local.service
614 13:52:56.804719 <31>[ 6.438200] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
615 13:52:56.804943 <31>[ 6.438477] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
616 13:52:56.805477 <31>[ 6.439053] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
617 13:52:56.805705 <31>[ 6.439350] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
618 13:52:56.805899 <31>[ 6.439649] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
619 13:52:56.806356 <31>[ 6.439935] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
620 13:52:56.806574 <31>[ 6.440245] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
621 13:52:56.806822 <31>[ 6.440567] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.mount
622 13:52:56.807385 <31>[ 6.440881] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs.target
623 13:52:56.807591 <31>[ 6.441194] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hostnamed.service
624 13:52:56.807819 <31>[ 6.441502] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-remount-fs.service
625 13:52:56.808332 <31>[ 6.441916] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/final.target
626 13:52:56.808544 <31>[ 6.442221] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
627 13:52:56.809100 <31>[ 6.442541] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.service
628 13:52:56.809609 <31>[ 6.443114] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
629 13:52:56.810441 <31>[ 6.443875] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
630 13:52:56.810603 <31>[ 6.444242] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
631 13:52:56.811136 <31>[ 6.444667] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
632 13:52:56.811345 <31>[ 6.444976] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
633 13:52:56.811545 <31>[ 6.445285] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs.target
634 13:52:56.812126 <31>[ 6.445591] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
635 13:52:56.812334 <31>[ 6.445945] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
636 13:52:56.812554 <31>[ 6.446270] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
637 13:52:56.813595 <31>[ 6.447240] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel0.target → poweroff.target
638 13:52:56.814151 <31>[ 6.447586] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
639 13:52:56.814338 <31>[ 6.447918] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/debug-shell.service
640 13:52:56.814618 <31>[ 6.448227] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
641 13:52:56.814869 <31>[ 6.448559] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
642 13:52:56.815565 <31>[ 6.449208] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
643 13:52:56.816043 <31>[ 6.449532] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
644 13:52:56.816237 <31>[ 6.449827] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
645 13:52:56.816460 <31>[ 6.450090] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
646 13:52:56.816698 <31>[ 6.450374] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
647 13:52:56.817195 <31>[ 6.450932] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
648 13:52:56.817523 <31>[ 6.451270] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
649 13:52:56.818095 <31>[ 6.451553] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
650 13:52:56.818306 <31>[ 6.451881] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
651 13:52:56.818531 <31>[ 6.452218] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
652 13:52:56.819326 <31>[ 6.452822] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
653 13:52:56.819538 <31>[ 6.453167] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
654 13:52:56.819768 <31>[ 6.453475] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_fail@.service
655 13:52:56.820574 <31>[ 6.454086] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
656 13:52:56.820818 <31>[ 6.454545] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
657 13:52:56.821999 <31>[ 6.455527] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
658 13:52:56.822238 <31>[ 6.455935] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-localed.service
659 13:52:56.823047 <31>[ 6.456573] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
660 13:52:56.823255 <31>[ 6.456901] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
661 13:52:56.823474 <31>[ 6.457231] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.path
662 13:52:56.823842 <31>[ 6.457551] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.service
663 13:52:56.824402 <31>[ 6.457862] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/shutdown.target
664 13:52:56.824574 <31>[ 6.458129] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
665 13:52:56.824793 <31>[ 6.458428] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-check-no-failures.service
666 13:52:56.825392 <31>[ 6.459103] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
667 13:52:56.825695 <31>[ 6.459452] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
668 13:52:56.826403 <31>[ 6.459771] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
669 13:52:56.826608 <31>[ 6.460051] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
670 13:52:56.826805 <31>[ 6.460349] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
671 13:52:56.827013 <31>[ 6.460657] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-exit.service
672 13:52:56.827485 <31>[ 6.460998] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsckd.service
673 13:52:56.828054 <31>[ 6.461459] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
674 13:52:56.828252 <31>[ 6.461804] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
675 13:52:56.828461 <31>[ 6.462093] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
676 13:52:56.828678 <31>[ 6.462401] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
677 13:52:56.829143 <31>[ 6.462835] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
678 13:52:56.829698 <31>[ 6.463178] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
679 13:52:56.829888 <31>[ 6.463536] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
680 13:52:56.830589 <31>[ 6.464093] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
681 13:52:56.830757 <31>[ 6.464471] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.service
682 13:52:56.831200 <31>[ 6.464934] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
683 13:52:56.831721 <31>[ 6.465278] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
684 13:52:56.831996 <31>[ 6.465571] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-sync.target
685 13:52:56.832240 <31>[ 6.465838] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-user-lookup.target
686 13:52:56.832431 <31>[ 6.466142] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
687 13:52:56.832924 <31>[ 6.466458] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
688 13:52:56.833493 <31>[ 6.467004] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.socket
689 13:52:56.833745 <31>[ 6.467364] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
690 13:52:56.833973 <31>[ 6.467683] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
691 13:52:56.834530 <31>[ 6.468027] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
692 13:52:56.834783 <31>[ 6.468325] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
693 13:52:56.835011 <31>[ 6.468636] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/first-boot-complete.target
694 13:52:56.835213 <31>[ 6.468932] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
695 13:52:56.835485 <31>[ 6.469218] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
696 13:52:56.836114 <31>[ 6.469554] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
697 13:52:56.836319 <31>[ 6.469835] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
698 13:52:56.836492 <31>[ 6.470102] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
699 13:52:56.837481 <31>[ 6.471050] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
700 13:52:56.837750 <31>[ 6.471399] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
701 13:52:56.837962 <31>[ 6.471683] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-mqueue.mount
702 13:52:56.838189 <31>[ 6.471996] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
703 13:52:56.838597 <31>[ 6.472270] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
704 13:52:56.838852 <31>[ 6.472558] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
705 13:52:56.839073 <31>[ 6.472853] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-config.mount
706 13:52:56.839350 <31>[ 6.473145] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
707 13:52:56.839958 <31>[ 6.473396] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
708 13:52:56.840170 <31>[ 6.473676] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
709 13:52:56.840366 <31>[ 6.473984] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/container-getty@.service
710 13:52:56.840568 <31>[ 6.474274] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
711 13:52:56.840766 <31>[ 6.474525] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
712 13:52:56.841260 <31>[ 6.475034] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-trigger.service
713 13:52:56.841518 <31>[ 6.475306] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
714 13:52:56.841756 <31>[ 6.475532] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
715 13:52:56.842239 <31>[ 6.475838] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
716 13:52:56.842755 <31>[ 6.476487] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
717 13:52:56.843340 <31>[ 6.476824] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
718 13:52:56.843514 <31>[ 6.477129] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
719 13:52:56.843679 <31>[ 6.477420] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
720 13:52:56.844239 <31>[ 6.477692] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
721 13:52:56.844467 <31>[ 6.478019] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/smartcard.target
722 13:52:56.844699 <31>[ 6.478342] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
723 13:52:56.845173 <31>[ 6.478855] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
724 13:52:56.845759 <31>[ 6.479231] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
725 13:52:56.846028 <31>[ 6.479562] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
726 13:52:56.846228 <31>[ 6.479876] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
727 13:52:57.245113 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
728 13:52:57.249618 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
729 13:52:57.252784 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
730 13:52:57.256158 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
731 13:52:57.259923 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
732 13:52:57.261600 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
733 13:52:57.263894 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
734 13:52:57.265314 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
735 13:52:57.266166 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
736 13:52:57.267012 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
737 13:52:57.267878 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
738 13:52:57.271747 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
739 13:52:57.275749 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
740 13:52:57.278601 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
741 13:52:57.280613 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
742 13:52:57.283038 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
743 13:52:57.285957 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
744 13:52:57.287875 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
745 13:52:57.314768 Mounting [0;1;39mHuge Pages File System[0m...
746 13:52:57.337904 Mounting [0;1;39mPOSIX Message Queue File System[0m...
747 13:52:57.374284 Mounting [0;1;39mKernel Debug File System[0m...
748 13:52:57.427021 Starting [0;1;39mLoad Kernel Module configfs[0m...
749 13:52:57.470414 Starting [0;1;39mLoad Kernel Module drm[0m...
750 13:52:57.526840 Starting [0;1;39mJournal Service[0m...
751 13:52:57.558631 Starting [0;1;39mLoad Kernel Modules[0m...
752 13:52:57.599004 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
753 13:52:57.650429 Starting [0;1;39mColdplug All udev Devices[0m...
754 13:52:57.740182 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
755 13:52:57.759810 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
756 13:52:57.766634 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
757 13:52:57.817797 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
758 13:52:57.861835 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
759 13:52:57.889934 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
760 13:52:57.946486 Mounting [0;1;39mKernel Configuration File System[0m...
761 13:52:58.074802 Starting [0;1;39mApply Kernel Variables[0m...
762 13:52:58.130946 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
763 13:52:58.185627 <47>[ 7.819307] systemd-journald[105]: SELinux enabled state cached to: disabled
764 13:52:58.187002 <47>[ 7.820641] systemd-journald[105]: Auditing in kernel turned off.
765 13:52:58.208455 <47>[ 7.841954] systemd-journald[105]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
766 13:52:58.274349 <47>[ 7.907744] systemd-journald[105]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
767 13:52:58.276694 <47>[ 7.910278] systemd-journald[105]: Fixed min_use=3.8M max_use=19.4M max_size=2.4M min_size=512.0K keep_free=9.7M n_max_files=100
768 13:52:58.282171 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
769 13:52:58.282687 See 'systemctl status systemd-remount-fs.service' for details.
770 13:52:58.286531 <47>[ 7.920127] systemd-journald[105]: Reserving 333 entries in field hash table.
771 13:52:58.315996 <47>[ 7.949455] systemd-journald[105]: Reserving 4437 entries in data hash table.
772 13:52:58.318910 Starting [0;1;39mLoad/Save Random Seed[0m...
773 13:52:58.330285 <47>[ 7.963903] systemd-journald[105]: Vacuuming...
774 13:52:58.330837 <47>[ 7.964580] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
775 13:52:58.331309 <47>[ 7.965150] systemd-journald[105]: Flushing /dev/kmsg...
776 13:52:58.378700 Starting [0;1;39mCreate System Users[0m...
777 13:52:58.413824 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
778 13:52:58.518106 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
779 13:52:58.694531 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
780 13:52:58.738729 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
781 13:52:58.857357 <47>[ 8.482639] systemd-journald[105]: systemd-journald running as PID 105 for the system.
782 13:52:58.871694 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
783 13:52:58.873685 <47>[ 8.507265] systemd-journald[105]: Sent READY=1 notification.
784 13:52:58.874284 <47>[ 8.507843] systemd-journald[105]: Sent WATCHDOG=1 notification.
785 13:52:58.908277 <47>[ 8.541721] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
786 13:52:58.926751 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
787 13:52:58.931134 <47>[ 8.564725] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
788 13:52:58.952452 <47>[ 8.585942] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
789 13:52:58.967973 <47>[ 8.601517] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
790 13:52:58.986571 <47>[ 8.620118] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
791 13:52:58.988286 <47>[ 8.621958] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
792 13:52:58.990055 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
793 13:52:59.002099 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
794 13:52:59.008067 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
795 13:52:59.021727 <47>[ 8.655269] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
796 13:52:59.034003 <47>[ 8.667607] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
797 13:52:59.042720 <47>[ 8.676326] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
798 13:52:59.044670 <47>[ 8.678290] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
799 13:52:59.062707 <47>[ 8.696206] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
800 13:52:59.064633 <47>[ 8.698270] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
801 13:52:59.078619 <47>[ 8.712181] systemd-journald[105]: n/a: New incoming connection.
802 13:52:59.079140 <47>[ 8.712757] systemd-journald[105]: varlink-21: varlink: setting state idle-server
803 13:52:59.094925 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
804 13:52:59.102236 <47>[ 8.735716] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
805 13:52:59.102581 <47>[ 8.736296] systemd-journald[105]: varlink-21: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
806 13:52:59.104565 <47>[ 8.738152] systemd-journald[105]: varlink-21: varlink: changing state idle-server → processing-method
807 13:52:59.104787 <46>[ 8.738556] systemd-journald[105]: Received client request to flush runtime journal.
808 13:52:59.117581 <47>[ 8.751097] systemd-journald[105]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
809 13:52:59.118437 <47>[ 8.752025] systemd-journald[105]: Vacuuming...
810 13:52:59.118972 <47>[ 8.752551] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
811 13:52:59.120491 <47>[ 8.754114] systemd-journald[105]: varlink-21: Sending message: {\"parameters\":{}}
812 13:52:59.120882 <47>[ 8.754409] systemd-journald[105]: varlink-21: varlink: changing state processing-method → processed-method
813 13:52:59.133765 <47>[ 8.767252] systemd-journald[105]: varlink-21: varlink: changing state processed-method → idle-server
814 13:52:59.140849 <47>[ 8.774396] systemd-journald[105]: varlink-21: varlink: changing state idle-server → pending-disconnect
815 13:52:59.149901 <47>[ 8.783417] systemd-journald[105]: varlink-21: varlink: changing state pending-disconnect → processing-disconnect
816 13:52:59.150161 <47>[ 8.783787] systemd-journald[105]: varlink-21: varlink: changing state processing-disconnect → disconnected
817 13:52:59.159851 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
818 13:52:59.162233 <47>[ 8.795741] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
819 13:52:59.175105 <47>[ 8.808590] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
820 13:52:59.219003 Starting [0;1;39mCreate Volatile Files and Directories[0m...
821 13:52:59.249301 <47>[ 8.883036] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
822 13:52:59.641881 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
823 13:52:59.727697 Starting [0;1;39mNetwork Service[0m...
824 13:52:59.749975 <47>[ 9.383415] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
825 13:52:59.758083 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
826 13:52:59.846977 Starting [0;1;39mNetwork Time Synchronization[0m...
827 13:52:59.900918 <47>[ 9.534323] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
828 13:52:59.918923 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
829 13:52:59.945896 <47>[ 9.579604] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
830 13:53:00.343652 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
831 13:53:01.328204 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
832 13:53:01.331594 <47>[ 10.964860] systemd-journald[105]: Data hash table of /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal has a fill level at 75.0 (3328 of 4437 items, 2555904 file size, 768 bytes per hash table item), suggesting rotation.
833 13:53:01.332048 <47>[ 10.965605] systemd-journald[105]: /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal: Journal header limits reached or header out-of-date, rotating.
834 13:53:01.332421 <47>[ 10.966149] systemd-journald[105]: Rotating...
835 13:53:01.353929 <47>[ 10.987353] systemd-journald[105]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
836 13:53:01.355152 <47>[ 10.988793] systemd-journald[105]: Reserving 333 entries in field hash table.
837 13:53:01.399400 <47>[ 11.033110] systemd-journald[105]: Reserving 4437 entries in data hash table.
838 13:53:01.416230 <47>[ 11.050024] systemd-journald[105]: Vacuuming...
839 13:53:01.434158 <47>[ 11.067571] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
840 13:53:01.450967 Starting [0;1;39mNetwork Name Resolution[0m...
841 13:53:01.481550 <47>[ 11.115055] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
842 13:53:01.752042 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
843 13:53:01.754017 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
844 13:53:01.755258 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
845 13:53:01.817434 <47>[ 11.451150] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
846 13:53:02.990521 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
847 13:53:02.999072 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
848 13:53:03.023420 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
849 13:53:03.038766 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
850 13:53:03.049630 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
851 13:53:03.053898 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
852 13:53:03.084290 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
853 13:53:03.084879 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
854 13:53:03.092285 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
855 13:53:03.139524 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
856 13:53:03.156226 <47>[ 12.789944] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
857 13:53:03.318235 <47>[ 12.951943] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
858 13:53:03.319466 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
859 13:53:03.503658 Starting [0;1;39mUser Login Management[0m...
860 13:53:03.511397 <47>[ 13.144920] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
861 13:53:04.064893 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
862 13:53:04.482701 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
863 13:53:04.804511 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
864 13:53:04.826458 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
865 13:53:04.841668 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
866 13:53:04.901704 Starting [0;1;39mPermit User Sessions[0m...
867 13:53:04.917047 <47>[ 14.550556] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
868 13:53:05.023857 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
869 13:53:05.089659 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
870 13:53:06.798064 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
871 13:53:06.871014 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
872 13:53:06.893793 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
873 13:53:06.905865 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
874 13:53:06.920074 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
875 13:53:06.977571 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
876 13:53:06.987248 <47>[ 16.620722] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
877 13:53:07.112097 <6>[ 16.745870] virtio_net virtio0 enp0s1: renamed from eth0
878 13:53:07.169896 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
879 13:53:07.246009 <47>[ 16.879717] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
880 13:53:07.247794 <47>[ 16.881452] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
881 13:53:07.311736
882 13:53:07.312260 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
883 13:53:07.312367
884 13:53:07.312723 debian-bullseye-arm64 login: root (automatic login)
885 13:53:07.325052
886 13:53:07.549816 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Wed Jun 14 12:28:22 UTC 2023 aarch64
887 13:53:07.550331
888 13:53:07.550459 The programs included with the Debian GNU/Linux system are free software;
889 13:53:07.550571 the exact distribution terms for each program are described in the
890 13:53:07.550684 individual files in /usr/share/doc/*/copyright.
891 13:53:07.550771
892 13:53:07.551199 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
893 13:53:07.551362 permitted by applicable law.
894 13:53:08.063499 <47>[ 17.697162] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
895 13:53:08.079907 <47>[ 17.713288] systemd-journald[105]: Data hash table of /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal has a fill level at 75.0 (3329 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
896 13:53:08.080560 <47>[ 17.713867] systemd-journald[105]: /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal: Journal header limits reached or header out-of-date, rotating.
897 13:53:08.080729 <47>[ 17.714348] systemd-journald[105]: Rotating...
898 13:53:08.086465 <47>[ 17.720026] systemd-journald[105]: Reserving 333 entries in field hash table.
899 13:53:08.110990 <47>[ 17.744452] systemd-journald[105]: Reserving 4437 entries in data hash table.
900 13:53:08.122075 <47>[ 17.755916] systemd-journald[105]: Vacuuming...
901 13:53:08.123433 <47>[ 17.756998] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
902 13:53:08.388358 <47>[ 18.021798] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
903 13:53:10.085743 <47>[ 19.719031] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
904 13:53:10.386675 Matched prompt #10: / #
906 13:53:10.387266 Setting prompt string to ['/ #']
907 13:53:10.387454 end: 2.2.1 login-action (duration 00:00:20) [common]
909 13:53:10.387867 end: 2.2 auto-login-action (duration 00:00:22) [common]
910 13:53:10.388037 start: 2.3 expect-shell-connection (timeout 00:04:36) [common]
911 13:53:10.388179 Setting prompt string to ['/ #']
912 13:53:10.388305 Forcing a shell prompt, looking for ['/ #']
914 13:53:10.438868 / #
915 13:53:10.439079 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
916 13:53:10.439239 Waiting using forced prompt support (timeout 00:02:30)
917 13:53:10.440877
918 13:53:10.445207 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
919 13:53:10.445431 start: 2.4 export-device-env (timeout 00:04:36) [common]
920 13:53:10.445612 end: 2.4 export-device-env (duration 00:00:00) [common]
921 13:53:10.445777 end: 2 boot-image-retry (duration 00:00:24) [common]
922 13:53:10.445930 start: 3 lava-test-retry (timeout 00:08:48) [common]
923 13:53:10.446082 start: 3.1 lava-test-shell (timeout 00:08:48) [common]
924 13:53:10.446216 Using namespace: common
926 13:53:10.547215 / # #
927 13:53:10.547403 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
928 13:53:10.547963 #
930 13:53:10.656096 / # mkdir /lava-610580
931 13:53:10.657078 mkdir /lava-610580
933 13:53:10.786682 / # mount /dev/disk/by-uuid/a0fb98b9-a6fa-49e0-9b22-dd44d326b24a -t ext2 /lava-610580
934 13:53:10.787431 mount /dev/disk/by-uuid/a0fb98b9-a6fa-49e0-9b22-dd44d326b24a -t ext2 /lava-610580
935 13:53:10.825716 <4>[ 20.459191] ext2 filesystem being mounted at /lava-610580 supports timestamps until 2038 (0x7fffffff)
937 13:53:10.972634 / # ls -la /lava-610580/bin/lava-test-runner
938 13:53:10.973428 ls -la /lava-610580/bin/lava-test-runner
939 13:53:11.011024 -rwxr-xr-x 1 root root 1039 Jun 14 13:51 /lava-610580/bin/lava-test-runner
940 13:53:11.021902 Using /lava-610580
942 13:53:11.122758 / # export SHELL=/bin/sh
943 13:53:11.123609 export SHELL=/bin/sh
945 13:53:11.231404 / # . /lava-610580/environment
946 13:53:11.232223 . /lava-610580/environment
948 13:53:11.342740 / # /lava-610580/bin/lava-test-runner /lava-610580/0
949 13:53:11.343052 Test shell timeout: 10s (minimum of the action and connection timeout)
950 13:53:11.343766 /lava-610580/bin/lava-test-runner /lava-610580/0
951 13:53:11.495904 + export TESTRUN_ID=0_timesync-off
952 13:53:11.496278 + cd /lava-610580/0/tests/0_timesync-off
953 13:53:11.498465 + cat uuid
954 13:53:11.506259 + UUID=610580_1.1.3.1
955 13:53:11.506460 + set +x
956 13:53:11.506861 Received signal: <STARTRUN> 0_timesync-off 610580_1.1.3.1
957 13:53:11.507016 Starting test lava.0_timesync-off (610580_1.1.3.1)
958 13:53:11.507183 Skipping test definition patterns.
959 13:53:11.507382 <LAVA_SIGNAL_STARTRUN 0_timesync-off 610580_1.1.3.1>
960 13:53:11.507514 + systemctl stop systemd-timesyncd
961 13:53:11.739024 + set +x
962 13:53:11.739506 <LAVA_SIGNAL_ENDRUN 0_timesync-off 610580_1.1.3.1>
963 13:53:11.739832 Received signal: <ENDRUN> 0_timesync-off 610580_1.1.3.1
964 13:53:11.739988 Ending use of test pattern.
965 13:53:11.740109 Ending test lava.0_timesync-off (610580_1.1.3.1), duration 0.23
967 13:53:11.780149 + export TESTRUN_ID=1_kselftest-arm64_qemu
968 13:53:11.780469 + cd /lava-610580/0/tests/1_kselftest-arm64_qemu
969 13:53:11.782383 + cat uuid
970 13:53:11.790018 + UUID=610580_1.1.3.5
971 13:53:11.790322 + set +x
972 13:53:11.790504 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 610580_1.1.3.5>
973 13:53:11.790635 + cd ./automated/linux/kselftest/
974 13:53:11.790967 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 610580_1.1.3.5
975 13:53:11.791126 Starting test lava.1_kselftest-arm64_qemu (610580_1.1.3.5)
976 13:53:11.791288 Skipping test definition patterns.
977 13:53:11.796429 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip -e -p /opt/kselftests/mainline/ -n 1 -i 1
978 13:53:11.887587 INFO: install_deps skipped
979 13:53:11.919499 --2023-06-14 13:53:12-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig/gcc-10/kselftest.tar.xz
980 13:53:11.972838 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
981 13:53:12.159154 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
982 13:53:12.345343 HTTP request sent, awaiting response... 200 OK
983 13:53:12.348207 Length: 2879100 (2.7M) [application/octet-stream]
984 13:53:12.349949 Saving to: 'kselftest.tar.xz'
985 13:53:12.351223
986 13:53:13.586332 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 161KB/s kselftest.tar.xz 7%[> ] 219.84K 344KB/s kselftest.tar.xz 31%[=====> ] 898.59K 930KB/s kselftest.tar.xz 81%[===============> ] 2.23M 1.91MB/s kselftest.tar.xz 100%[===================>] 2.75M 2.32MB/s in 1.2s
987 13:53:13.586682
988 13:53:13.591933 2023-06-14 13:53:13 (2.32 MB/s) - 'kselftest.tar.xz' saved [2879100/2879100]
989 13:53:13.592216
990 13:53:16.705951 skiplist:
991 13:53:16.706459 ========================================
992 13:53:16.706710 ========================================
993 13:53:16.756468 arm64:tags_test
994 13:53:16.756837 arm64:run_tags_test.sh
995 13:53:16.757219 arm64:fake_sigreturn_bad_magic
996 13:53:16.757400 arm64:fake_sigreturn_bad_size
997 13:53:16.757539 arm64:fake_sigreturn_bad_size_for_magic0
998 13:53:16.757687 arm64:fake_sigreturn_duplicated_fpsimd
999 13:53:16.757875 arm64:fake_sigreturn_misaligned_sp
1000 13:53:16.758068 arm64:fake_sigreturn_missing_fpsimd
1001 13:53:16.758276 arm64:fake_sigreturn_sme_change_vl
1002 13:53:16.758418 arm64:fake_sigreturn_sve_change_vl
1003 13:53:16.758589 arm64:mangle_pstate_invalid_compat_toggle
1004 13:53:16.758721 arm64:mangle_pstate_invalid_daif_bits
1005 13:53:16.758840 arm64:mangle_pstate_invalid_mode_el1h
1006 13:53:16.758965 arm64:mangle_pstate_invalid_mode_el1t
1007 13:53:16.759114 arm64:mangle_pstate_invalid_mode_el2h
1008 13:53:16.759257 arm64:mangle_pstate_invalid_mode_el2t
1009 13:53:16.759397 arm64:mangle_pstate_invalid_mode_el3h
1010 13:53:16.759537 arm64:mangle_pstate_invalid_mode_el3t
1011 13:53:16.759678 arm64:sme_trap_no_sm
1012 13:53:16.759818 arm64:sme_trap_non_streaming
1013 13:53:16.759959 arm64:sme_trap_za
1014 13:53:16.760098 arm64:sme_vl
1015 13:53:16.760239 arm64:ssve_regs
1016 13:53:16.760379 arm64:sve_regs
1017 13:53:16.760522 arm64:sve_vl
1018 13:53:16.760661 arm64:za_no_regs
1019 13:53:16.760801 arm64:za_regs
1020 13:53:16.760940 arm64:pac
1021 13:53:16.761120 arm64:fp-stress
1022 13:53:16.761253 arm64:sve-ptrace
1023 13:53:16.761394 arm64:sve-probe-vls
1024 13:53:16.761535 arm64:vec-syscfg
1025 13:53:16.761697 arm64:za-fork
1026 13:53:16.761842 arm64:za-ptrace
1027 13:53:16.761980 arm64:check_buffer_fill
1028 13:53:16.762117 arm64:check_child_memory
1029 13:53:16.762255 arm64:check_gcr_el1_cswitch
1030 13:53:16.762394 arm64:check_ksm_options
1031 13:53:16.762532 arm64:check_mmap_options
1032 13:53:16.762669 arm64:check_prctl
1033 13:53:16.762807 arm64:check_tags_inclusion
1034 13:53:16.762945 arm64:check_user_mem
1035 13:53:16.763082 arm64:btitest
1036 13:53:16.763221 arm64:nobtitest
1037 13:53:16.763359 arm64:hwcap
1038 13:53:16.763498 arm64:ptrace
1039 13:53:16.763635 arm64:syscall-abi
1040 13:53:16.763772 arm64:tpidr2
1041 13:53:16.772138 ============== Tests to run ===============
1042 13:53:16.777099 arm64:tags_test
1043 13:53:16.777393 arm64:run_tags_test.sh
1044 13:53:16.777484 arm64:fake_sigreturn_bad_magic
1045 13:53:16.778099 arm64:fake_sigreturn_bad_size
1046 13:53:16.778386 arm64:fake_sigreturn_bad_size_for_magic0
1047 13:53:16.778595 arm64:fake_sigreturn_duplicated_fpsimd
1048 13:53:16.778789 arm64:fake_sigreturn_misaligned_sp
1049 13:53:16.778999 arm64:fake_sigreturn_missing_fpsimd
1050 13:53:16.779257 arm64:fake_sigreturn_sme_change_vl
1051 13:53:16.779498 arm64:fake_sigreturn_sve_change_vl
1052 13:53:16.779770 arm64:mangle_pstate_invalid_compat_toggle
1053 13:53:16.780008 arm64:mangle_pstate_invalid_daif_bits
1054 13:53:16.780219 arm64:mangle_pstate_invalid_mode_el1h
1055 13:53:16.780402 arm64:mangle_pstate_invalid_mode_el1t
1056 13:53:16.780591 arm64:mangle_pstate_invalid_mode_el2h
1057 13:53:16.780817 arm64:mangle_pstate_invalid_mode_el2t
1058 13:53:16.781025 arm64:mangle_pstate_invalid_mode_el3h
1059 13:53:16.781228 arm64:mangle_pstate_invalid_mode_el3t
1060 13:53:16.781446 arm64:sme_trap_no_sm
1061 13:53:16.781627 arm64:sme_trap_non_streaming
1062 13:53:16.781814 arm64:sme_trap_za
1063 13:53:16.782002 arm64:sme_vl
1064 13:53:16.782202 arm64:ssve_regs
1065 13:53:16.782353 arm64:sve_regs
1066 13:53:16.782479 arm64:sve_vl
1067 13:53:16.782628 arm64:za_no_regs
1068 13:53:16.782751 arm64:za_regs
1069 13:53:16.782867 arm64:pac
1070 13:53:16.782981 arm64:fp-stress
1071 13:53:16.783096 arm64:sve-ptrace
1072 13:53:16.783216 arm64:sve-probe-vls
1073 13:53:16.783389 arm64:vec-syscfg
1074 13:53:16.783536 arm64:za-fork
1075 13:53:16.783676 arm64:za-ptrace
1076 13:53:16.783836 arm64:check_buffer_fill
1077 13:53:16.783993 arm64:check_child_memory
1078 13:53:16.784110 arm64:check_gcr_el1_cswitch
1079 13:53:16.784220 arm64:check_ksm_options
1080 13:53:16.784329 arm64:check_mmap_options
1081 13:53:16.784439 arm64:check_prctl
1082 13:53:16.784551 arm64:check_tags_inclusion
1083 13:53:16.784660 arm64:check_user_mem
1084 13:53:16.784770 arm64:btitest
1085 13:53:16.784879 arm64:nobtitest
1086 13:53:16.784989 arm64:hwcap
1087 13:53:16.785098 arm64:ptrace
1088 13:53:16.785207 arm64:syscall-abi
1089 13:53:16.785316 arm64:tpidr2
1090 13:53:16.785456 ===========End Tests to run ===============
1091 13:53:17.692328 <12>[ 27.326010] kselftest: Running tests in arm64
1092 13:53:17.722239 TAP version 13
1093 13:53:17.739733 1..48
1094 13:53:17.787382 # selftests: arm64: tags_test
1095 13:53:17.839304 ok 1 selftests: arm64: tags_test
1096 13:53:17.885597 # selftests: arm64: run_tags_test.sh
1097 13:53:17.934577 # --------------------
1098 13:53:17.934927 # running tags test
1099 13:53:17.935114 # --------------------
1100 13:53:17.935291 # [PASS]
1101 13:53:17.942795 ok 2 selftests: arm64: run_tags_test.sh
1102 13:53:17.989641 # selftests: arm64: fake_sigreturn_bad_magic
1103 13:53:18.038490 # Registered handlers for all signals.
1104 13:53:18.038847 # Detected MINSTKSIGSZ:10000
1105 13:53:18.039292 # Testcase initialized.
1106 13:53:18.039462 # uc context validated.
1107 13:53:18.039600 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1108 13:53:18.039721 # Handled SIG_COPYCTX
1109 13:53:18.039839 # Available space:3536
1110 13:53:18.039958 # Using badly built context - ERR: BAD MAGIC !
1111 13:53:18.040076 # SIG_OK -- SP:0xFFFFFDD38420 si_addr@:0xfffffdd38420 si_code:2 token@:0xfffffdd371c0 offset:-4704
1112 13:53:18.040194 # ==>> completed. PASS(1)
1113 13:53:18.040312 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1114 13:53:18.040431 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFDD371C0
1115 13:53:18.046811 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1116 13:53:18.090969 # selftests: arm64: fake_sigreturn_bad_size
1117 13:53:18.139733 # Registered handlers for all signals.
1118 13:53:18.140131 # Detected MINSTKSIGSZ:10000
1119 13:53:18.140566 # Testcase initialized.
1120 13:53:18.140735 # uc context validated.
1121 13:53:18.140867 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1122 13:53:18.140994 # Handled SIG_COPYCTX
1123 13:53:18.141124 # Available space:3536
1124 13:53:18.141247 # uc context validated.
1125 13:53:18.141371 # Using badly built context - ERR: Bad size for esr_context
1126 13:53:18.141533 # SIG_OK -- SP:0xFFFFF7976A50 si_addr@:0xfffff7976a50 si_code:2 token@:0xfffff79757f0 offset:-4704
1127 13:53:18.141698 # ==>> completed. PASS(1)
1128 13:53:18.141820 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1129 13:53:18.141939 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF79757F0
1130 13:53:18.148297 ok 4 selftests: arm64: fake_sigreturn_bad_size
1131 13:53:18.192855 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1132 13:53:18.242634 # Registered handlers for all signals.
1133 13:53:18.242872 # Detected MINSTKSIGSZ:10000
1134 13:53:18.242965 # Testcase initialized.
1135 13:53:18.243055 # uc context validated.
1136 13:53:18.243144 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1137 13:53:18.243234 # Handled SIG_COPYCTX
1138 13:53:18.243321 # Available space:3536
1139 13:53:18.243645 # Using badly built context - ERR: Bad size for terminator
1140 13:53:18.243807 # SIG_OK -- SP:0xFFFFE616BE70 si_addr@:0xffffe616be70 si_code:2 token@:0xffffe616ac10 offset:-4704
1141 13:53:18.243935 # ==>> completed. PASS(1)
1142 13:53:18.244059 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1143 13:53:18.244237 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE616AC10
1144 13:53:18.250766 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1145 13:53:18.295282 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1146 13:53:18.343958 # Registered handlers for all signals.
1147 13:53:18.344289 # Detected MINSTKSIGSZ:10000
1148 13:53:18.344480 # Testcase initialized.
1149 13:53:18.344654 # uc context validated.
1150 13:53:18.344783 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1151 13:53:18.345120 # Handled SIG_COPYCTX
1152 13:53:18.345248 # Available space:3536
1153 13:53:18.345364 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1154 13:53:18.345478 # SIG_OK -- SP:0xFFFFCF398FF0 si_addr@:0xffffcf398ff0 si_code:2 token@:0xffffcf397d90 offset:-4704
1155 13:53:18.345594 # ==>> completed. PASS(1)
1156 13:53:18.345719 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1157 13:53:18.345835 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCF397D90
1158 13:53:18.352009 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1159 13:53:18.395927 # selftests: arm64: fake_sigreturn_misaligned_sp
1160 13:53:18.443789 # Registered handlers for all signals.
1161 13:53:18.444089 # Detected MINSTKSIGSZ:10000
1162 13:53:18.444533 # Testcase initialized.
1163 13:53:18.444699 # uc context validated.
1164 13:53:18.444833 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1165 13:53:18.444961 # Handled SIG_COPYCTX
1166 13:53:18.445086 # SIG_OK -- SP:0xFFFFD4034AF3 si_addr@:0xffffd4034af3 si_code:2 token@:0xffffd4034af3 offset:0
1167 13:53:18.445210 # ==>> completed. PASS(1)
1168 13:53:18.445332 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1169 13:53:18.445455 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD4034AF3
1170 13:53:18.452536 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1171 13:53:18.498198 # selftests: arm64: fake_sigreturn_missing_fpsimd
1172 13:53:18.545527 # Registered handlers for all signals.
1173 13:53:18.545748 # Detected MINSTKSIGSZ:10000
1174 13:53:18.546053 # Testcase initialized.
1175 13:53:18.546161 # uc context validated.
1176 13:53:18.546254 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1177 13:53:18.546347 # Handled SIG_COPYCTX
1178 13:53:18.546433 # Mangling template header. Spare space:4096
1179 13:53:18.546518 # Using badly built context - ERR: Missing FPSIMD
1180 13:53:18.546620 # SIG_OK -- SP:0xFFFFCEB36180 si_addr@:0xffffceb36180 si_code:2 token@:0xffffceb34f20 offset:-4704
1181 13:53:18.546707 # ==>> completed. PASS(1)
1182 13:53:18.546792 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1183 13:53:18.546899 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCEB34F20
1184 13:53:18.555762 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1185 13:53:18.600773 # selftests: arm64: fake_sigreturn_sme_change_vl
1186 13:53:18.649964 # Registered handlers for all signals.
1187 13:53:18.650261 # Detected MINSTKSIGSZ:10000
1188 13:53:18.650684 # Required Features: [ SME ] supported
1189 13:53:18.650858 # Incompatible Features: [] absent
1190 13:53:18.651058 # Testcase initialized.
1191 13:53:18.651241 # uc context validated.
1192 13:53:18.651375 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1193 13:53:18.651496 # Handled SIG_COPYCTX
1194 13:53:18.651613 # Attempting to change VL from 16 to 256
1195 13:53:18.651756 # SIG_OK -- SP:0xFFFFE6F53FE0 si_addr@:0xffffe6f53fe0 si_code:2 token@:0xffffe6f52d80 offset:-4704
1196 13:53:18.651882 # ==>> completed. PASS(1)
1197 13:53:18.661963 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1198 13:53:18.662137 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE6F52D80
1199 13:53:18.662441 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1200 13:53:18.707376 # selftests: arm64: fake_sigreturn_sve_change_vl
1201 13:53:18.757770 # Registered handlers for all signals.
1202 13:53:18.758292 # Detected MINSTKSIGSZ:10000
1203 13:53:18.758483 # Required Features: [ SVE ] supported
1204 13:53:18.758695 # Incompatible Features: [] absent
1205 13:53:18.758873 # Testcase initialized.
1206 13:53:18.759010 # uc context validated.
1207 13:53:18.759128 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1208 13:53:18.759278 # Handled SIG_COPYCTX
1209 13:53:18.759402 # Attempting to change VL from 16 to 256
1210 13:53:18.759520 # SIG_OK -- SP:0xFFFFD4A76B50 si_addr@:0xffffd4a76b50 si_code:2 token@:0xffffd4a758f0 offset:-4704
1211 13:53:18.759639 # ==>> completed. PASS(1)
1212 13:53:18.759755 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1213 13:53:18.759873 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD4A758F0
1214 13:53:18.766757 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1215 13:53:18.811913 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1216 13:53:18.861922 # Registered handlers for all signals.
1217 13:53:18.862421 # Detected MINSTKSIGSZ:10000
1218 13:53:18.862617 # Testcase initialized.
1219 13:53:18.862756 # uc context validated.
1220 13:53:18.862878 # Handled SIG_TRIG
1221 13:53:18.862995 # SIG_OK -- SP:0xFFFFE5A16D30 si_addr@:0xffffe5a16d30 si_code:2 token@:(nil) offset:-281474534305072
1222 13:53:18.863142 # ==>> completed. PASS(1)
1223 13:53:18.863268 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1224 13:53:18.870979 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1225 13:53:18.916592 # selftests: arm64: mangle_pstate_invalid_daif_bits
1226 13:53:18.964623 # Registered handlers for all signals.
1227 13:53:18.967046 # Detected MINSTKSIGSZ:10000
1228 13:53:18.967172 # Testcase initialized.
1229 13:53:18.967469 # uc context validated.
1230 13:53:18.967578 # Handled SIG_TRIG
1231 13:53:18.967686 # SIG_OK -- SP:0xFFFFCE198350 si_addr@:0xffffce198350 si_code:2 token@:(nil) offset:-281474139521872
1232 13:53:18.967782 # ==>> completed. PASS(1)
1233 13:53:18.967873 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1234 13:53:18.974376 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1235 13:53:19.024121 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1236 13:53:19.072701 # Registered handlers for all signals.
1237 13:53:19.073022 # Detected MINSTKSIGSZ:10000
1238 13:53:19.073435 # Testcase initialized.
1239 13:53:19.073589 # uc context validated.
1240 13:53:19.073723 # Handled SIG_TRIG
1241 13:53:19.073837 # SIG_OK -- SP:0xFFFFD8D7B250 si_addr@:0xffffd8d7b250 si_code:2 token@:(nil) offset:-281474319757904
1242 13:53:19.073951 # ==>> completed. PASS(1)
1243 13:53:19.074063 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1244 13:53:19.080917 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1245 13:53:19.133401 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1246 13:53:19.187581 # Registered handlers for all signals.
1247 13:53:19.188150 # Detected MINSTKSIGSZ:10000
1248 13:53:19.188325 # Testcase initialized.
1249 13:53:19.188500 # uc context validated.
1250 13:53:19.188650 # Handled SIG_TRIG
1251 13:53:19.188793 # SIG_OK -- SP:0xFFFFF91113B0 si_addr@:0xfffff91113b0 si_code:2 token@:(nil) offset:-281474860389296
1252 13:53:19.188969 # ==>> completed. PASS(1)
1253 13:53:19.190098 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1254 13:53:19.197801 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1255 13:53:19.245118 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1256 13:53:19.293618 # Registered handlers for all signals.
1257 13:53:19.294217 # Detected MINSTKSIGSZ:10000
1258 13:53:19.294408 # Testcase initialized.
1259 13:53:19.294565 # uc context validated.
1260 13:53:19.294712 # Handled SIG_TRIG
1261 13:53:19.294858 # SIG_OK -- SP:0xFFFFC6A7B7B0 si_addr@:0xffffc6a7b7b0 si_code:2 token@:(nil) offset:-281474014623664
1262 13:53:19.296285 # ==>> completed. PASS(1)
1263 13:53:19.296480 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1264 13:53:19.303083 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1265 13:53:19.350782 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1266 13:53:19.407307 # Registered handlers for all signals.
1267 13:53:19.407645 # Detected MINSTKSIGSZ:10000
1268 13:53:19.408008 # Testcase initialized.
1269 13:53:19.408141 # uc context validated.
1270 13:53:19.408260 # Handled SIG_TRIG
1271 13:53:19.408377 # SIG_OK -- SP:0xFFFFF9422630 si_addr@:0xfffff9422630 si_code:2 token@:(nil) offset:-281474863605296
1272 13:53:19.408496 # ==>> completed. PASS(1)
1273 13:53:19.409771 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1274 13:53:19.415796 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1275 13:53:19.461353 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1276 13:53:19.508576 # Registered handlers for all signals.
1277 13:53:19.508906 # Detected MINSTKSIGSZ:10000
1278 13:53:19.509344 # Testcase initialized.
1279 13:53:19.509499 # uc context validated.
1280 13:53:19.509629 # Handled SIG_TRIG
1281 13:53:19.509765 # SIG_OK -- SP:0xFFFFED31FE80 si_addr@:0xffffed31fe80 si_code:2 token@:(nil) offset:-281474661219968
1282 13:53:19.509886 # ==>> completed. PASS(1)
1283 13:53:19.510001 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1284 13:53:19.516782 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1285 13:53:19.560845 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1286 13:53:19.607763 # Registered handlers for all signals.
1287 13:53:19.608358 # Detected MINSTKSIGSZ:10000
1288 13:53:19.608532 # Testcase initialized.
1289 13:53:19.608705 # uc context validated.
1290 13:53:19.608853 # Handled SIG_TRIG
1291 13:53:19.609042 # SIG_OK -- SP:0xFFFFED7D0120 si_addr@:0xffffed7d0120 si_code:2 token@:(nil) offset:-281474666135840
1292 13:53:19.609215 # ==>> completed. PASS(1)
1293 13:53:19.609394 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1294 13:53:19.616085 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1295 13:53:19.660562 # selftests: arm64: sme_trap_no_sm
1296 13:53:19.775858 # Registered handlers for all signals.
1297 13:53:19.776373 # Detected MINSTKSIGSZ:10000
1298 13:53:19.776480 # Required Features: [ SME ] supported
1299 13:53:19.776566 # Incompatible Features: [] absent
1300 13:53:19.776648 # Testcase initialized.
1301 13:53:19.776728 # SIG_OK -- SP:0xFFFFCFA196F0 si_addr@:0xaaaac7f12514 si_code:1 token@:(nil) offset:-187650475631892
1302 13:53:19.776832 # ==>> completed. PASS(1)
1303 13:53:19.776923 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1304 13:53:19.795455 ok 19 selftests: arm64: sme_trap_no_sm
1305 13:53:19.887734 # selftests: arm64: sme_trap_non_streaming
1306 13:53:19.948408 # Registered handlers for all signals.
1307 13:53:19.948751 # Detected MINSTKSIGSZ:10000
1308 13:53:19.949123 # Required Features: [] NOT supported
1309 13:53:19.949266 # Incompatible Features: [] supported
1310 13:53:19.949398 # ==>> completed. SKIP.
1311 13:53:19.950447 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1312 13:53:19.958288 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1313 13:53:20.007730 # selftests: arm64: sme_trap_za
1314 13:53:20.054635 # Registered handlers for all signals.
1315 13:53:20.054875 # Detected MINSTKSIGSZ:10000
1316 13:53:20.055185 # Testcase initialized.
1317 13:53:20.055291 # SIG_OK -- SP:0xFFFFEFBDBA80 si_addr@:0xaaaad0cd2510 si_code:1 token@:(nil) offset:-187650624267536
1318 13:53:20.055385 # ==>> completed. PASS(1)
1319 13:53:20.055474 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1320 13:53:20.064302 ok 21 selftests: arm64: sme_trap_za
1321 13:53:20.109403 # selftests: arm64: sme_vl
1322 13:53:20.162324 # Registered handlers for all signals.
1323 13:53:20.162557 # Detected MINSTKSIGSZ:10000
1324 13:53:20.162649 # Required Features: [ SME ] supported
1325 13:53:20.163088 # Incompatible Features: [] absent
1326 13:53:20.163196 # Testcase initialized.
1327 13:53:20.163287 # uc context validated.
1328 13:53:20.163376 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1329 13:53:20.163465 # Handled SIG_COPYCTX
1330 13:53:20.163551 # got expected VL 32
1331 13:53:20.163637 # ==>> completed. PASS(1)
1332 13:53:20.163723 # # SME VL :: Check that we get the right SME VL reported
1333 13:53:20.174222 ok 22 selftests: arm64: sme_vl
1334 13:53:20.229226 # selftests: arm64: ssve_regs
1335 13:53:20.431877 # Registered handlers for all signals.
1336 13:53:20.432236 # Detected MINSTKSIGSZ:10000
1337 13:53:20.432662 # Required Features: [ SME FA64 ] supported
1338 13:53:20.432878 # Incompatible Features: [] absent
1339 13:53:20.433049 # Testcase initialized.
1340 13:53:20.433193 # Testing VL 256
1341 13:53:20.433320 # Validating EXTRA...
1342 13:53:20.433446 # uc context validated.
1343 13:53:20.433569 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1344 13:53:20.433706 # Handled SIG_COPYCTX
1345 13:53:20.433850 # Got expected size 8752 and VL 256
1346 13:53:20.434000 # Testing VL 128
1347 13:53:20.434189 # Validating EXTRA...
1348 13:53:20.434363 # uc context validated.
1349 13:53:20.434510 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1350 13:53:20.434699 # Handled SIG_COPYCTX
1351 13:53:20.434835 # Got expected size 4384 and VL 128
1352 13:53:20.434977 # Testing VL 64
1353 13:53:20.435117 # uc context validated.
1354 13:53:20.435258 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1355 13:53:20.435401 # Handled SIG_COPYCTX
1356 13:53:20.435541 # Got expected size 2208 and VL 64
1357 13:53:20.435681 # Testing VL 32
1358 13:53:20.435820 # uc context validated.
1359 13:53:20.435959 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1360 13:53:20.436099 # Handled SIG_COPYCTX
1361 13:53:20.436238 # Got expected size 1120 and VL 32
1362 13:53:20.436381 # Testing VL 16
1363 13:53:20.436521 # uc context validated.
1364 13:53:20.436660 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1365 13:53:20.436801 # Handled SIG_COPYCTX
1366 13:53:20.436940 # Got expected size 576 and VL 16
1367 13:53:20.437079 # ==>> completed. PASS(1)
1368 13:53:20.437219 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1369 13:53:20.446427 ok 23 selftests: arm64: ssve_regs
1370 13:53:20.495633 # selftests: arm64: sve_regs
1371 13:53:20.906611 # Registered handlers for all signals.
1372 13:53:20.906947 # Detected MINSTKSIGSZ:10000
1373 13:53:20.907387 # Required Features: [ SVE ] supported
1374 13:53:20.907572 # Incompatible Features: [] absent
1375 13:53:20.907750 # Testcase initialized.
1376 13:53:20.907927 # Testing VL 256
1377 13:53:20.908092 # Validating EXTRA...
1378 13:53:20.908251 # uc context validated.
1379 13:53:20.908411 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1380 13:53:20.908577 # Handled SIG_COPYCTX
1381 13:53:20.908726 # Got expected size 8752 and VL 256
1382 13:53:20.908885 # Testing VL 240
1383 13:53:20.909027 # Validating EXTRA...
1384 13:53:20.909235 # uc context validated.
1385 13:53:20.909428 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1386 13:53:20.909597 # Handled SIG_COPYCTX
1387 13:53:20.909774 # Got expected size 8208 and VL 240
1388 13:53:20.909946 # Testing VL 224
1389 13:53:20.910109 # Validating EXTRA...
1390 13:53:20.910231 # uc context validated.
1391 13:53:20.910350 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1392 13:53:20.910465 # Handled SIG_COPYCTX
1393 13:53:20.910578 # Got expected size 7664 and VL 224
1394 13:53:20.910692 # Testing VL 208
1395 13:53:20.910805 # Validating EXTRA...
1396 13:53:20.910917 # uc context validated.
1397 13:53:20.911028 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1398 13:53:20.911143 # Handled SIG_COPYCTX
1399 13:53:20.911257 # Got expected size 7120 and VL 208
1400 13:53:20.911370 # Testing VL 192
1401 13:53:20.911483 # Validating EXTRA...
1402 13:53:20.911598 # uc context validated.
1403 13:53:20.911712 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1404 13:53:20.911827 # Handled SIG_COPYCTX
1405 13:53:20.911940 # Got expected size 6576 and VL 192
1406 13:53:20.912054 # Testing VL 176
1407 13:53:20.912166 # Validating EXTRA...
1408 13:53:20.912312 # uc context validated.
1409 13:53:20.912432 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1410 13:53:20.912546 # Handled SIG_COPYCTX
1411 13:53:20.912660 # Got expected size 6032 and VL 176
1412 13:53:20.912774 # Testing VL 160
1413 13:53:20.912887 # Validating EXTRA...
1414 13:53:20.912998 # uc context validated.
1415 13:53:20.913111 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1416 13:53:20.913224 # Handled SIG_COPYCTX
1417 13:53:20.919467 # Got expected size 5488 and VL 160
1418 13:53:20.919691 # Testing VL 144
1419 13:53:20.920098 # Validating EXTRA...
1420 13:53:20.920250 # uc context validated.
1421 13:53:20.920398 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1422 13:53:20.920541 # Handled SIG_COPYCTX
1423 13:53:20.920682 # Got expected size 4944 and VL 144
1424 13:53:20.920825 # Testing VL 128
1425 13:53:20.920965 # Validating EXTRA...
1426 13:53:20.921108 # uc context validated.
1427 13:53:20.921288 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1428 13:53:20.921425 # Handled SIG_COPYCTX
1429 13:53:20.921568 # Got expected size 4384 and VL 128
1430 13:53:20.921722 # Testing VL 112
1431 13:53:20.921865 # Validating EXTRA...
1432 13:53:20.922007 # uc context validated.
1433 13:53:20.922148 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1434 13:53:20.922290 # Handled SIG_COPYCTX
1435 13:53:20.922430 # Got expected size 3840 and VL 112
1436 13:53:20.922572 # Testing VL 96
1437 13:53:20.922714 # uc context validated.
1438 13:53:20.922853 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1439 13:53:20.922993 # Handled SIG_COPYCTX
1440 13:53:20.923133 # Got expected size 3296 and VL 96
1441 13:53:20.923274 # Testing VL 80
1442 13:53:20.923458 # uc context validated.
1443 13:53:20.923590 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1444 13:53:20.923732 # Handled SIG_COPYCTX
1445 13:53:20.923872 # Got expected size 2752 and VL 80
1446 13:53:20.924013 # Testing VL 64
1447 13:53:20.924154 # uc context validated.
1448 13:53:20.924296 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1449 13:53:20.924438 # Handled SIG_COPYCTX
1450 13:53:20.924578 # Got expected size 2208 and VL 64
1451 13:53:20.924718 # Testing VL 48
1452 13:53:20.924858 # uc context validated.
1453 13:53:20.924998 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1454 13:53:20.925139 # Handled SIG_COPYCTX
1455 13:53:20.925279 # Got expected size 1664 and VL 48
1456 13:53:20.925420 # Testing VL 32
1457 13:53:20.925559 # uc context validated.
1458 13:53:20.925710 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1459 13:53:20.926565 # Handled SIG_COPYCTX
1460 13:53:20.926913 # Got expected size 1120 and VL 32
1461 13:53:20.927048 # Testing VL 16
1462 13:53:20.927191 # uc context validated.
1463 13:53:20.927333 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1464 13:53:20.927474 # Handled SIG_COPYCTX
1465 13:53:20.927646 # Got expected size 576 and VL 16
1466 13:53:20.927781 # ==>> completed. PASS(1)
1467 13:53:20.927922 # # SVE registers :: Check that we get the right SVE registers reported
1468 13:53:20.928065 ok 24 selftests: arm64: sve_regs
1469 13:53:20.969347 # selftests: arm64: sve_vl
1470 13:53:21.017865 # Registered handlers for all signals.
1471 13:53:21.018252 # Detected MINSTKSIGSZ:10000
1472 13:53:21.018428 # Required Features: [ SVE ] supported
1473 13:53:21.018830 # Incompatible Features: [] absent
1474 13:53:21.018971 # Testcase initialized.
1475 13:53:21.019113 # uc context validated.
1476 13:53:21.019254 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1477 13:53:21.019395 # Handled SIG_COPYCTX
1478 13:53:21.019537 # got expected VL 64
1479 13:53:21.019678 # ==>> completed. PASS(1)
1480 13:53:21.019820 # # SVE VL :: Check that we get the right SVE VL reported
1481 13:53:21.025993 ok 25 selftests: arm64: sve_vl
1482 13:53:21.069818 # selftests: arm64: za_no_regs
1483 13:53:21.127272 # Registered handlers for all signals.
1484 13:53:21.127515 # Detected MINSTKSIGSZ:10000
1485 13:53:21.127606 # Required Features: [ SME ] supported
1486 13:53:21.127910 # Incompatible Features: [] absent
1487 13:53:21.128017 # Testcase initialized.
1488 13:53:21.128102 # Testing VL 256
1489 13:53:21.128188 # uc context validated.
1490 13:53:21.128275 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1491 13:53:21.128361 # Handled SIG_COPYCTX
1492 13:53:21.128463 # Got expected size 16 and VL 256
1493 13:53:21.128553 # Testing VL 128
1494 13:53:21.128638 # uc context validated.
1495 13:53:21.128733 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1496 13:53:21.128804 # Handled SIG_COPYCTX
1497 13:53:21.128882 # Got expected size 16 and VL 128
1498 13:53:21.128946 # Testing VL 64
1499 13:53:21.129019 # uc context validated.
1500 13:53:21.129110 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1501 13:53:21.138677 # Handled SIG_COPYCTX
1502 13:53:21.139055 # Got expected size 16 and VL 64
1503 13:53:21.139181 # Testing VL 32
1504 13:53:21.139283 # uc context validated.
1505 13:53:21.139386 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1506 13:53:21.139488 # Handled SIG_COPYCTX
1507 13:53:21.139604 # Got expected size 16 and VL 32
1508 13:53:21.139707 # Testing VL 16
1509 13:53:21.139863 # uc context validated.
1510 13:53:21.139983 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1511 13:53:21.140098 # Handled SIG_COPYCTX
1512 13:53:21.140273 # Got expected size 16 and VL 16
1513 13:53:21.140402 # ==>> completed. PASS(1)
1514 13:53:21.140517 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1515 13:53:21.140633 ok 26 selftests: arm64: za_no_regs
1516 13:53:21.183963 # selftests: arm64: za_regs
1517 13:53:21.334985 # Registered handlers for all signals.
1518 13:53:21.335577 # Detected MINSTKSIGSZ:10000
1519 13:53:21.335737 # Required Features: [ SME ] supported
1520 13:53:21.335887 # Incompatible Features: [] absent
1521 13:53:21.336030 # Testcase initialized.
1522 13:53:21.336172 # Testing VL 256
1523 13:53:21.336314 # Validating EXTRA...
1524 13:53:21.336966 # uc context validated.
1525 13:53:21.337418 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1526 13:53:21.337579 # Handled SIG_COPYCTX
1527 13:53:21.337802 # Got expected size 65552 and VL 256
1528 13:53:21.337981 # Testing VL 128
1529 13:53:21.338218 # Validating EXTRA...
1530 13:53:21.338404 # uc context validated.
1531 13:53:21.338592 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1532 13:53:21.338786 # Handled SIG_COPYCTX
1533 13:53:21.338940 # Got expected size 16400 and VL 128
1534 13:53:21.339074 # Testing VL 64
1535 13:53:21.339230 # Validating EXTRA...
1536 13:53:21.339391 # uc context validated.
1537 13:53:21.339554 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1538 13:53:21.339676 # Handled SIG_COPYCTX
1539 13:53:21.339792 # Got expected size 4112 and VL 64
1540 13:53:21.339906 # Testing VL 32
1541 13:53:21.340019 # uc context validated.
1542 13:53:21.340134 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1543 13:53:21.340249 # Handled SIG_COPYCTX
1544 13:53:21.340364 # Got expected size 1040 and VL 32
1545 13:53:21.340476 # Testing VL 16
1546 13:53:21.340588 # uc context validated.
1547 13:53:21.340701 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1548 13:53:21.340815 # Handled SIG_COPYCTX
1549 13:53:21.340929 # Got expected size 272 and VL 16
1550 13:53:21.341042 # ==>> completed. PASS(1)
1551 13:53:21.345818 # # ZA register :: Check that we get the right ZA registers reported
1552 13:53:21.346266 ok 27 selftests: arm64: za_regs
1553 13:53:21.390091 # selftests: arm64: pac
1554 13:53:21.536960 # TAP version 13
1555 13:53:21.537288 # 1..7
1556 13:53:21.537492 # # Starting 7 tests from 1 test cases.
1557 13:53:21.537929 # # RUN global.corrupt_pac ...
1558 13:53:21.538091 # # OK global.corrupt_pac
1559 13:53:21.538257 # ok 1 global.corrupt_pac
1560 13:53:21.538458 # # RUN global.pac_instructions_not_nop ...
1561 13:53:21.538654 # # OK global.pac_instructions_not_nop
1562 13:53:21.538833 # ok 2 global.pac_instructions_not_nop
1563 13:53:21.539020 # # RUN global.pac_instructions_not_nop_generic ...
1564 13:53:21.539209 # # OK global.pac_instructions_not_nop_generic
1565 13:53:21.545619 # ok 3 global.pac_instructions_not_nop_generic
1566 13:53:21.546071 # # RUN global.single_thread_different_keys ...
1567 13:53:21.546214 # # OK global.single_thread_different_keys
1568 13:53:21.546754 # ok 4 global.single_thread_different_keys
1569 13:53:21.547102 # # RUN global.exec_changed_keys ...
1570 13:53:21.547304 # # OK global.exec_changed_keys
1571 13:53:21.547469 # ok 5 global.exec_changed_keys
1572 13:53:21.547665 # # RUN global.context_switch_keep_keys ...
1573 13:53:21.547816 # # OK global.context_switch_keep_keys
1574 13:53:21.547966 # ok 6 global.context_switch_keep_keys
1575 13:53:21.548094 # # RUN global.context_switch_keep_keys_generic ...
1576 13:53:21.548225 # # OK global.context_switch_keep_keys_generic
1577 13:53:21.548366 # ok 7 global.context_switch_keep_keys_generic
1578 13:53:21.548485 # # PASSED: 7 / 7 tests passed.
1579 13:53:21.548600 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1580 13:53:21.548715 ok 28 selftests: arm64: pac
1581 13:53:21.591218 # selftests: arm64: fp-stress
1582 13:53:38.917918 # TAP version 13
1583 13:53:38.918413 # 1..27
1584 13:53:38.918518 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1585 13:53:38.918612 # # Will run for 10s
1586 13:53:38.918704 # # Started FPSIMD-0-0
1587 13:53:38.918798 # # Started SVE-VL-256-0
1588 13:53:38.918908 # # Started SVE-VL-240-0
1589 13:53:38.919001 # # Started SVE-VL-224-0
1590 13:53:38.919082 # # Started SVE-VL-208-0
1591 13:53:38.919166 # # Started SVE-VL-192-0
1592 13:53:38.919257 # # Started SVE-VL-176-0
1593 13:53:38.919359 # # Started SVE-VL-160-0
1594 13:53:38.919465 # # Started SVE-VL-144-0
1595 13:53:38.919565 # # Started SVE-VL-128-0
1596 13:53:38.919667 # # Started SVE-VL-112-0
1597 13:53:38.919797 # # Started SVE-VL-96-0
1598 13:53:38.919903 # # Started SVE-VL-80-0
1599 13:53:38.919997 # # Started SVE-VL-64-0
1600 13:53:38.920088 # # Started SVE-VL-48-0
1601 13:53:38.920201 # # Started SVE-VL-32-0
1602 13:53:38.920313 # # Started SVE-VL-16-0
1603 13:53:38.920386 # # Started SSVE-VL-256-0
1604 13:53:38.920453 # # Started ZA-VL-256-0
1605 13:53:38.920512 # # Started SSVE-VL-128-0
1606 13:53:38.920572 # # Started ZA-VL-128-0
1607 13:53:38.920631 # # Started SSVE-VL-64-0
1608 13:53:38.920690 # # Started ZA-VL-64-0
1609 13:53:38.920762 # # Started SSVE-VL-32-0
1610 13:53:38.920828 # # Started ZA-VL-32-0
1611 13:53:38.920902 # # Started SSVE-VL-16-0
1612 13:53:38.920961 # # Started ZA-VL-16-0
1613 13:53:38.921033 # # FPSIMD-0-0: Vector length: 128 bits
1614 13:53:38.921096 # # FPSIMD-0-0: PID: 907
1615 13:53:38.958179 # # SVE-VL-240-0: Vector length: 1920 bits
1616 13:53:38.958417 # # SVE-VL-240-0: PID: 909
1617 13:53:38.958503 # # SVE-VL-224-0: Vector length: 1792 bits
1618 13:53:38.958591 # # SVE-VL-224-0: PID: 910
1619 13:53:38.958690 # # SVE-VL-256-0: Vector length: 2048 bits
1620 13:53:38.958776 # # SVE-VL-256-0: PID: 908
1621 13:53:38.958857 # # SVE-VL-160-0: Vector length: 1280 bits
1622 13:53:38.958937 # # SVE-VL-160-0: PID: 914
1623 13:53:38.959016 # # SVE-VL-208-0: Vector length: 1664 bits
1624 13:53:38.959096 # # SVE-VL-208-0: PID: 911
1625 13:53:38.959192 # # SVE-VL-176-0: Vector length: 1408 bits
1626 13:53:38.959275 # # SVE-VL-176-0: PID: 913
1627 13:53:38.959354 # # SVE-VL-128-0: Vector length: 1024 bits
1628 13:53:38.959429 # # SVE-VL-128-0: PID: 916
1629 13:53:38.959492 # # SVE-VL-96-0: Vector length: 768 bits
1630 13:53:38.959558 # # SVE-VL-96-0: PID: 918
1631 13:53:38.959620 # # SVE-VL-144-0: Vector length: 1152 bits
1632 13:53:38.959695 # # SVE-VL-144-0: PID: 915
1633 13:53:38.959760 # # SVE-VL-192-0: Vector length: 1536 bits
1634 13:53:38.959821 # # SVE-VL-192-0: PID: 912
1635 13:53:38.959881 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1636 13:53:38.959943 # # SSVE-VL-256-0: PID: 924
1637 13:53:38.960025 # # SVE-VL-112-0: Vector length: 896 bits
1638 13:53:38.960121 # # SVE-VL-112-0: PID: 917
1639 13:53:38.960233 # # SVE-VL-48-0: Vector length: 384 bits
1640 13:53:38.960335 # # SVE-VL-48-0: PID: 921
1641 13:53:38.960451 # # SVE-VL-32-0: Vector length: 256 bits
1642 13:53:38.960577 # # SVE-VL-32-0: PID: 922
1643 13:53:38.960652 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1644 13:53:38.960728 # # SSVE-VL-32-0: PID: 930
1645 13:53:38.960790 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1646 13:53:38.960851 # # ZA-VL-64-0: PID: 929
1647 13:53:38.960923 # # SVE-VL-16-0: Vector length: 128 bits
1648 13:53:38.960988 # # SVE-VL-16-0: PID: 923
1649 13:53:38.973827 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1650 13:53:38.974311 # # ZA-VL-128-0: PID: 927
1651 13:53:38.974412 # # SVE-VL-80-0: Vector length: 640 bits
1652 13:53:38.974498 # # SVE-VL-80-0: PID: 919
1653 13:53:38.974585 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1654 13:53:38.974675 # # SSVE-VL-128-0: PID: 926
1655 13:53:38.974779 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1656 13:53:38.974867 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1657 13:53:38.974963 # # ZA-VL-32-0: PID: 931
1658 13:53:38.975084 # # SSVE-VL-16-0: PID: 932
1659 13:53:38.975169 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1660 13:53:38.975253 # # SSVE-VL-64-0: PID: 928
1661 13:53:38.975375 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1662 13:53:38.975495 # # ZA-VL-256-0: PID: 925
1663 13:53:38.975816 # # SVE-VL-64-0: Vector length: 512 bits
1664 13:53:38.975925 # # SVE-VL-64-0: PID: 920
1665 13:53:38.976049 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1666 13:53:38.976177 # # ZA-VL-16-0: PID: 933
1667 13:53:38.976281 # # Finishing up...
1668 13:53:38.976367 # ok 1 FPSIMD-0-0
1669 13:53:38.976451 # ok 2 SVE-VL-256-0
1670 13:53:38.976546 # ok 3 SVE-VL-240-0
1671 13:53:38.976645 # ok 4 SVE-VL-224-0
1672 13:53:38.976725 # ok 5 SVE-VL-208-0
1673 13:53:38.976811 # ok 6 SVE-VL-192-0
1674 13:53:38.976916 # ok 7 SVE-VL-176-0
1675 13:53:38.977004 # ok 8 SVE-VL-160-0
1676 13:53:38.977074 # ok 9 SVE-VL-144-0
1677 13:53:38.977148 # ok 10 SVE-VL-128-0
1678 13:53:38.977213 # ok 11 SVE-VL-112-0
1679 13:53:38.977274 # ok 12 SVE-VL-96-0
1680 13:53:38.977335 # ok 13 SVE-VL-80-0
1681 13:53:38.977395 # ok 14 SVE-VL-64-0
1682 13:53:39.034404 # ok 15 SVE-VL-48-0
1683 13:53:39.034692 # ok 16 SVE-VL-32-0
1684 13:53:39.034806 # ok 17 SVE-VL-16-0
1685 13:53:39.035129 # ok 18 SSVE-VL-256-0
1686 13:53:39.035240 # ok 19 ZA-VL-256-0
1687 13:53:39.035350 # ok 20 SSVE-VL-128-0
1688 13:53:39.035466 # ok 21 ZA-VL-128-0
1689 13:53:39.035565 # ok 22 SSVE-VL-64-0
1690 13:53:39.035666 # ok 23 ZA-VL-64-0
1691 13:53:39.035761 # ok 24 SSVE-VL-32-0
1692 13:53:39.035870 # ok 25 ZA-VL-32-0
1693 13:53:39.035977 # ok 26 SSVE-VL-16-0
1694 13:53:39.036074 # ok 27 ZA-VL-16-0
1695 13:53:39.036175 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=3789, signals=9
1696 13:53:39.036252 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=1544, signals=9
1697 13:53:39.036351 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=1762, signals=9
1698 13:53:39.036438 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=11024, signals=9
1699 13:53:39.036537 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2862, signals=9
1700 13:53:39.036640 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=3364, signals=9
1701 13:53:39.036984 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1780, signals=9
1702 13:53:39.037257 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=5504, signals=9
1703 13:53:39.076424 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=4901, signals=9
1704 13:53:39.076963 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=10362, signals=9
1705 13:53:39.116247 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3611, signals=9
1706 13:53:39.116484 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=4494, signals=9
1707 13:53:39.117109 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=13270, signals=9
1708 13:53:39.117237 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=722, signals=9
1709 13:53:39.117341 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=237, signals=9
1710 13:53:39.117470 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=4093, signals=9
1711 13:53:39.126923 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=3631, signals=9
1712 13:53:39.127178 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=8546, signals=9
1713 13:53:39.127721 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=6271, signals=9
1714 13:53:39.127839 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=10080, signals=9
1715 13:53:39.127947 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=3432, signals=9
1716 13:53:39.128080 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=3015, signals=9
1717 13:53:39.128656 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2768, signals=9
1718 13:53:39.128761 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=5874, signals=9
1719 13:53:39.128855 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=4627, signals=9
1720 13:53:39.129145 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2967, signals=9
1721 13:53:39.129349 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=4150, signals=9
1722 13:53:39.129491 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1723 13:53:39.133028 ok 29 selftests: arm64: fp-stress
1724 13:53:39.294676 # selftests: arm64: sve-ptrace
1725 13:53:39.426230 # TAP version 13
1726 13:53:39.426744 # 1..4104
1727 13:53:39.426905 # # Parent is 950, child is 951
1728 13:53:39.427051 # ok 1 SVE FPSIMD set via SVE: 0
1729 13:53:39.427205 # ok 2 SVE get_fpsimd() gave same state
1730 13:53:39.427343 # ok 3 SVE SVE_PT_VL_INHERIT set
1731 13:53:39.427524 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1732 13:53:39.427669 # ok 5 Set SVE VL 16
1733 13:53:39.427800 # ok 6 Set and get SVE data for VL 16
1734 13:53:39.427926 # ok 7 Set and get FPSIMD data for SVE VL 16
1735 13:53:39.428044 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1736 13:53:39.428166 # ok 9 Set SVE VL 32
1737 13:53:39.428287 # ok 10 Set and get SVE data for VL 32
1738 13:53:39.428440 # ok 11 Set and get FPSIMD data for SVE VL 32
1739 13:53:39.428566 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1740 13:53:39.428686 # ok 13 Set SVE VL 48
1741 13:53:39.428806 # ok 14 Set and get SVE data for VL 48
1742 13:53:39.428933 # ok 15 Set and get FPSIMD data for SVE VL 48
1743 13:53:39.429051 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1744 13:53:39.429181 # ok 17 Set SVE VL 64
1745 13:53:39.429309 # ok 18 Set and get SVE data for VL 64
1746 13:53:39.429833 # ok 19 Set and get FPSIMD data for SVE VL 64
1747 13:53:39.429958 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1748 13:53:39.430070 # ok 21 Set SVE VL 80
1749 13:53:39.430179 # ok 22 Set and get SVE data for VL 80
1750 13:53:39.430288 # ok 23 Set and get FPSIMD data for SVE VL 80
1751 13:53:39.430399 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1752 13:53:39.430506 # ok 25 Set SVE VL 96
1753 13:53:39.430613 # ok 26 Set and get SVE data for VL 96
1754 13:53:39.430722 # ok 27 Set and get FPSIMD data for SVE VL 96
1755 13:53:39.433520 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1756 13:53:39.433894 # ok 29 Set SVE VL 112
1757 13:53:39.434284 # ok 30 Set and get SVE data for VL 112
1758 13:53:39.434459 # ok 31 Set and get FPSIMD data for SVE VL 112
1759 13:53:39.434620 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1760 13:53:39.434752 # ok 33 Set SVE VL 128
1761 13:53:39.434928 # ok 34 Set and get SVE data for VL 128
1762 13:53:39.435140 # ok 35 Set and get FPSIMD data for SVE VL 128
1763 13:53:39.435297 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1764 13:53:39.435423 # ok 37 Set SVE VL 144
1765 13:53:39.435536 # ok 38 Set and get SVE data for VL 144
1766 13:53:39.435675 # ok 39 Set and get FPSIMD data for SVE VL 144
1767 13:53:39.435815 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1768 13:53:39.435996 # ok 41 Set SVE VL 160
1769 13:53:39.436130 # ok 42 Set and get SVE data for VL 160
1770 13:53:39.436237 # ok 43 Set and get FPSIMD data for SVE VL 160
1771 13:53:39.436387 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1772 13:53:39.436491 # ok 45 Set SVE VL 176
1773 13:53:39.436620 # ok 46 Set and get SVE data for VL 176
1774 13:53:39.436755 # ok 47 Set and get FPSIMD data for SVE VL 176
1775 13:53:39.436869 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1776 13:53:39.436983 # ok 49 Set SVE VL 192
1777 13:53:39.437112 # ok 50 Set and get SVE data for VL 192
1778 13:53:39.437303 # ok 51 Set and get FPSIMD data for SVE VL 192
1779 13:53:39.437726 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1780 13:53:39.437909 # ok 53 Set SVE VL 208
1781 13:53:39.438047 # ok 54 Set and get SVE data for VL 208
1782 13:53:39.438182 # ok 55 Set and get FPSIMD data for SVE VL 208
1783 13:53:39.438287 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1784 13:53:39.438395 # ok 57 Set SVE VL 224
1785 13:53:39.442194 # ok 58 Set and get SVE data for VL 224
1786 13:53:39.442365 # ok 59 Set and get FPSIMD data for SVE VL 224
1787 13:53:39.442557 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1788 13:53:39.442709 # ok 61 Set SVE VL 240
1789 13:53:39.442857 # ok 62 Set and get SVE data for VL 240
1790 13:53:39.443010 # ok 63 Set and get FPSIMD data for SVE VL 240
1791 13:53:39.443141 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1792 13:53:39.443286 # ok 65 Set SVE VL 256
1793 13:53:39.443418 # ok 66 Set and get SVE data for VL 256
1794 13:53:39.443576 # ok 67 Set and get FPSIMD data for SVE VL 256
1795 13:53:39.443719 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1796 13:53:39.443841 # ok 69 Set SVE VL 272
1797 13:53:39.443964 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1798 13:53:39.444100 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1799 13:53:39.444308 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1800 13:53:39.444466 # ok 73 Set SVE VL 288
1801 13:53:39.444597 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1802 13:53:39.444722 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1803 13:53:39.444894 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1804 13:53:39.445048 # ok 77 Set SVE VL 304
1805 13:53:39.445186 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1806 13:53:39.445335 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1807 13:53:39.445870 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1808 13:53:39.446002 # ok 81 Set SVE VL 320
1809 13:53:39.446116 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1810 13:53:39.446255 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1811 13:53:39.446372 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1812 13:53:39.446500 # ok 85 Set SVE VL 336
1813 13:53:39.446625 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1814 13:53:39.446737 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1815 13:53:39.452250 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1816 13:53:39.452425 # ok 89 Set SVE VL 352
1817 13:53:39.452925 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1818 13:53:39.453182 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1819 13:53:39.453323 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1820 13:53:39.453476 # ok 93 Set SVE VL 368
1821 13:53:39.453675 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1822 13:53:39.453836 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1823 13:53:39.453995 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1824 13:53:39.454131 # ok 97 Set SVE VL 384
1825 13:53:39.454244 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1826 13:53:39.454380 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1827 13:53:39.454488 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1828 13:53:39.454599 # ok 101 Set SVE VL 400
1829 13:53:39.455211 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1830 13:53:39.455580 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1831 13:53:39.455688 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1832 13:53:39.455782 # ok 105 Set SVE VL 416
1833 13:53:39.455885 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1834 13:53:39.455972 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1835 13:53:39.456071 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1836 13:53:39.456155 # ok 109 Set SVE VL 432
1837 13:53:39.456252 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1838 13:53:39.456571 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1839 13:53:39.456675 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1840 13:53:39.456760 # ok 113 Set SVE VL 448
1841 13:53:39.457041 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1842 13:53:39.457151 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1843 13:53:39.457237 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1844 13:53:39.457338 # ok 117 Set SVE VL 464
1845 13:53:39.457664 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1846 13:53:39.457789 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1847 13:53:39.457882 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1848 13:53:39.457988 # ok 121 Set SVE VL 480
1849 13:53:39.464353 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1850 13:53:39.464534 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1851 13:53:39.464705 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1852 13:53:39.464858 # ok 125 Set SVE VL 496
1853 13:53:39.465000 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1854 13:53:39.465167 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1855 13:53:39.465310 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1856 13:53:39.465490 # ok 129 Set SVE VL 512
1857 13:53:39.465644 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1858 13:53:39.465807 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1859 13:53:39.465970 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1860 13:53:39.466107 # ok 133 Set SVE VL 528
1861 13:53:39.466236 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1862 13:53:39.466376 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1863 13:53:39.466585 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1864 13:53:39.466757 # ok 137 Set SVE VL 544
1865 13:53:39.466954 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1866 13:53:39.467148 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1867 13:53:39.467300 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1868 13:53:39.467431 # ok 141 Set SVE VL 560
1869 13:53:39.467899 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1870 13:53:39.468045 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1871 13:53:39.468168 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1872 13:53:39.468290 # ok 145 Set SVE VL 576
1873 13:53:39.468417 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1874 13:53:39.468545 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1875 13:53:39.468660 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1876 13:53:39.468779 # ok 149 Set SVE VL 592
1877 13:53:39.468926 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1878 13:53:39.469049 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1879 13:53:39.469176 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1880 13:53:39.469284 # ok 153 Set SVE VL 608
1881 13:53:39.469392 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1882 13:53:39.469494 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1883 13:53:39.469871 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1884 13:53:39.469979 # ok 157 Set SVE VL 624
1885 13:53:39.470069 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1886 13:53:39.470159 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1887 13:53:39.470249 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1888 13:53:39.470338 # ok 161 Set SVE VL 640
1889 13:53:39.470428 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1890 13:53:39.470522 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1891 13:53:39.470612 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1892 13:53:39.470701 # ok 165 Set SVE VL 656
1893 13:53:39.470790 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1894 13:53:39.470880 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1895 13:53:39.470969 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1896 13:53:39.471058 # ok 169 Set SVE VL 672
1897 13:53:39.471147 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1898 13:53:39.471236 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1899 13:53:39.471325 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1900 13:53:39.471414 # ok 173 Set SVE VL 688
1901 13:53:39.471502 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1902 13:53:39.478689 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1903 13:53:39.479150 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1904 13:53:39.479252 # ok 177 Set SVE VL 704
1905 13:53:39.479338 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1906 13:53:39.479415 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1907 13:53:39.479492 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1908 13:53:39.479588 # ok 181 Set SVE VL 720
1909 13:53:39.479656 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1910 13:53:39.479728 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1911 13:53:39.479817 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1912 13:53:39.479882 # ok 185 Set SVE VL 736
1913 13:53:39.479945 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1914 13:53:39.480020 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1915 13:53:39.480082 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1916 13:53:39.480156 # ok 189 Set SVE VL 752
1917 13:53:39.480219 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1918 13:53:39.480295 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1919 13:53:39.480557 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1920 13:53:39.480666 # ok 193 Set SVE VL 768
1921 13:53:39.480767 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1922 13:53:39.480880 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1923 13:53:39.480977 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1924 13:53:39.481083 # ok 197 Set SVE VL 784
1925 13:53:39.481181 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1926 13:53:39.481255 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1927 13:53:39.481510 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1928 13:53:39.481595 # ok 201 Set SVE VL 800
1929 13:53:39.481694 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1930 13:53:39.486254 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1931 13:53:39.486580 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1932 13:53:39.486683 # ok 205 Set SVE VL 816
1933 13:53:39.486775 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1934 13:53:39.486875 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1935 13:53:39.486963 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1936 13:53:39.487063 # ok 209 Set SVE VL 832
1937 13:53:39.487149 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1938 13:53:39.487249 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1939 13:53:39.487349 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1940 13:53:39.487445 # ok 213 Set SVE VL 848
1941 13:53:39.487747 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1942 13:53:39.487849 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1943 13:53:39.487948 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1944 13:53:39.488045 # ok 217 Set SVE VL 864
1945 13:53:39.488237 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1946 13:53:39.488354 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1947 13:53:39.488455 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1948 13:53:39.488551 # ok 221 Set SVE VL 880
1949 13:53:39.488847 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1950 13:53:39.488949 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1951 13:53:39.489046 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1952 13:53:39.489145 # ok 225 Set SVE VL 896
1953 13:53:39.489230 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1954 13:53:39.489518 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1955 13:53:39.489742 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1956 13:53:39.489950 # ok 229 Set SVE VL 912
1957 13:53:39.494147 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1958 13:53:39.494632 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1959 13:53:39.494829 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1960 13:53:39.494992 # ok 233 Set SVE VL 928
1961 13:53:39.495151 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1962 13:53:39.495347 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1963 13:53:39.495526 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1964 13:53:39.495747 # ok 237 Set SVE VL 944
1965 13:53:39.495947 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1966 13:53:39.496129 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1967 13:53:39.496336 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1968 13:53:39.496559 # ok 241 Set SVE VL 960
1969 13:53:39.496763 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1970 13:53:39.496946 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1971 13:53:39.497103 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1972 13:53:39.497254 # ok 245 Set SVE VL 976
1973 13:53:39.497406 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1974 13:53:39.497602 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1975 13:53:39.497854 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1976 13:53:39.498051 # ok 249 Set SVE VL 992
1977 13:53:39.498285 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1978 13:53:39.498449 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1979 13:53:39.498597 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1980 13:53:39.498741 # ok 253 Set SVE VL 1008
1981 13:53:39.498883 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1982 13:53:39.499025 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1983 13:53:39.499186 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1984 13:53:39.499385 # ok 257 Set SVE VL 1024
1985 13:53:39.499560 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1986 13:53:39.505912 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1987 13:53:39.506359 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1988 13:53:39.506466 # ok 261 Set SVE VL 1040
1989 13:53:39.506554 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1990 13:53:39.506639 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1991 13:53:39.506739 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1992 13:53:39.506823 # ok 265 Set SVE VL 1056
1993 13:53:39.506907 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1994 13:53:39.507006 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1995 13:53:39.507105 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1996 13:53:39.507191 # ok 269 Set SVE VL 1072
1997 13:53:39.507287 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
1998 13:53:39.507689 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
1999 13:53:39.507783 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2000 13:53:39.508660 # ok 273 Set SVE VL 1088
2001 13:53:39.509022 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2002 13:53:39.509211 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2003 13:53:39.509306 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2004 13:53:39.509390 # ok 277 Set SVE VL 1104
2005 13:53:39.509588 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2006 13:53:39.509690 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2007 13:53:39.509964 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2008 13:53:39.510062 # ok 281 Set SVE VL 1120
2009 13:53:39.510142 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2010 13:53:39.510221 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2011 13:53:39.510297 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2012 13:53:39.510374 # ok 285 Set SVE VL 1136
2013 13:53:39.510450 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2014 13:53:39.510532 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2015 13:53:39.514028 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2016 13:53:39.514471 # ok 289 Set SVE VL 1152
2017 13:53:39.514639 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2018 13:53:39.514771 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2019 13:53:39.515003 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2020 13:53:39.516839 # ok 293 Set SVE VL 1168
2021 13:53:39.517001 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2022 13:53:39.517367 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2023 13:53:39.517515 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2024 13:53:39.517604 # ok 297 Set SVE VL 1184
2025 13:53:39.517860 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2026 13:53:39.517947 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2027 13:53:39.518025 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2028 13:53:39.518108 # ok 301 Set SVE VL 1200
2029 13:53:39.518206 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2030 13:53:39.518291 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2031 13:53:39.518373 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2032 13:53:39.518437 # ok 305 Set SVE VL 1216
2033 13:53:39.518522 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2034 13:53:39.518639 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2035 13:53:39.518742 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2036 13:53:39.518821 # ok 309 Set SVE VL 1232
2037 13:53:39.518933 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2038 13:53:39.519039 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2039 13:53:39.519141 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2040 13:53:39.519273 # ok 313 Set SVE VL 1248
2041 13:53:39.519371 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2042 13:53:39.519449 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2043 13:53:39.519542 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2044 13:53:39.521346 # ok 317 Set SVE VL 1264
2045 13:53:39.521458 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2046 13:53:39.521569 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2047 13:53:39.521676 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2048 13:53:39.521751 # ok 321 Set SVE VL 1280
2049 13:53:39.521814 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2050 13:53:39.521874 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2051 13:53:39.521931 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2052 13:53:39.521990 # ok 325 Set SVE VL 1296
2053 13:53:39.522047 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2054 13:53:39.522105 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2055 13:53:39.522163 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2056 13:53:39.522221 # ok 329 Set SVE VL 1312
2057 13:53:39.522279 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2058 13:53:39.522337 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2059 13:53:39.522394 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2060 13:53:39.522451 # ok 333 Set SVE VL 1328
2061 13:53:39.522509 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2062 13:53:39.522567 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2063 13:53:39.522624 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2064 13:53:39.522682 # ok 337 Set SVE VL 1344
2065 13:53:39.522740 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2066 13:53:39.522798 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2067 13:53:39.522856 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2068 13:53:39.522914 # ok 341 Set SVE VL 1360
2069 13:53:39.523213 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2070 13:53:39.523409 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2071 13:53:39.529921 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2072 13:53:39.530287 # ok 345 Set SVE VL 1376
2073 13:53:39.530437 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2074 13:53:39.530572 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2075 13:53:39.530677 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2076 13:53:39.530745 # ok 349 Set SVE VL 1392
2077 13:53:39.530811 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2078 13:53:39.530898 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2079 13:53:39.530972 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2080 13:53:39.531042 # ok 353 Set SVE VL 1408
2081 13:53:39.531110 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2082 13:53:39.531198 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2083 13:53:39.531291 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2084 13:53:39.531361 # ok 357 Set SVE VL 1424
2085 13:53:39.531455 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2086 13:53:39.531546 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2087 13:53:39.531635 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2088 13:53:39.531909 # ok 361 Set SVE VL 1440
2089 13:53:39.532026 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2090 13:53:39.532135 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2091 13:53:39.532249 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2092 13:53:39.532347 # ok 365 Set SVE VL 1456
2093 13:53:39.532647 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2094 13:53:39.532754 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2095 13:53:39.533062 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2096 13:53:39.533337 # ok 369 Set SVE VL 1472
2097 13:53:39.533447 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2098 13:53:39.533599 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2099 13:53:39.533703 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2100 13:53:39.533790 # ok 373 Set SVE VL 1488
2101 13:53:39.533871 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2102 13:53:39.538677 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2103 13:53:39.538813 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2104 13:53:39.538905 # ok 377 Set SVE VL 1504
2105 13:53:39.539193 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2106 13:53:39.539315 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2107 13:53:39.539413 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2108 13:53:39.539501 # ok 381 Set SVE VL 1520
2109 13:53:39.539588 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2110 13:53:39.539680 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2111 13:53:39.539766 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2112 13:53:39.539853 # ok 385 Set SVE VL 1536
2113 13:53:39.539962 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2114 13:53:39.540055 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2115 13:53:39.540141 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2116 13:53:39.540224 # ok 389 Set SVE VL 1552
2117 13:53:39.540307 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2118 13:53:39.540388 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2119 13:53:39.540487 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2120 13:53:39.540591 # ok 393 Set SVE VL 1568
2121 13:53:39.540720 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2122 13:53:39.540817 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2123 13:53:39.540936 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2124 13:53:39.541021 # ok 397 Set SVE VL 1584
2125 13:53:39.541150 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2126 13:53:39.541284 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2127 13:53:39.541373 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2128 13:53:39.541485 # ok 401 Set SVE VL 1600
2129 13:53:39.542510 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2130 13:53:39.542638 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2131 13:53:39.542754 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2132 13:53:39.542843 # ok 405 Set SVE VL 1616
2133 13:53:39.542970 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2134 13:53:39.546054 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2135 13:53:39.546440 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2136 13:53:39.546543 # ok 409 Set SVE VL 1632
2137 13:53:39.546654 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2138 13:53:39.546760 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2139 13:53:39.546848 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2140 13:53:39.546949 # ok 413 Set SVE VL 1648
2141 13:53:39.547035 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2142 13:53:39.547134 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2143 13:53:39.547240 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2144 13:53:39.547342 # ok 417 Set SVE VL 1664
2145 13:53:39.547637 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2146 13:53:39.547736 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2147 13:53:39.547835 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2148 13:53:39.547922 # ok 421 Set SVE VL 1680
2149 13:53:39.548014 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2150 13:53:39.548086 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2151 13:53:39.548176 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2152 13:53:39.548247 # ok 425 Set SVE VL 1696
2153 13:53:39.548336 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2154 13:53:39.548422 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2155 13:53:39.548703 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2156 13:53:39.548797 # ok 429 Set SVE VL 1712
2157 13:53:39.548890 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2158 13:53:39.548984 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2159 13:53:39.549056 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2160 13:53:39.549147 # ok 433 Set SVE VL 1728
2161 13:53:39.549217 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2162 13:53:39.549292 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2163 13:53:39.549382 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2164 13:53:39.549466 # ok 437 Set SVE VL 1744
2165 13:53:39.549561 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2166 13:53:39.549658 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2167 13:53:39.554047 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2168 13:53:39.554352 # ok 441 Set SVE VL 1760
2169 13:53:39.554433 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2170 13:53:39.554525 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2171 13:53:39.554615 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2172 13:53:39.554690 # ok 445 Set SVE VL 1776
2173 13:53:39.554766 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2174 13:53:39.554852 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2175 13:53:39.554928 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2176 13:53:39.555014 # ok 449 Set SVE VL 1792
2177 13:53:39.555087 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2178 13:53:39.555172 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2179 13:53:39.555245 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2180 13:53:39.555320 # ok 453 Set SVE VL 1808
2181 13:53:39.555618 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2182 13:53:39.555721 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2183 13:53:39.555794 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2184 13:53:39.555866 # ok 457 Set SVE VL 1824
2185 13:53:39.555943 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2186 13:53:39.556236 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2187 13:53:39.556336 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2188 13:53:39.556422 # ok 461 Set SVE VL 1840
2189 13:53:39.556501 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2190 13:53:39.556577 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2191 13:53:39.556657 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2192 13:53:39.556743 # ok 465 Set SVE VL 1856
2193 13:53:39.556809 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2194 13:53:39.556868 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2195 13:53:39.556932 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2196 13:53:39.557040 # ok 469 Set SVE VL 1872
2197 13:53:39.557120 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2198 13:53:39.557208 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2199 13:53:39.557287 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2200 13:53:39.557377 # ok 473 Set SVE VL 1888
2201 13:53:39.557709 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2202 13:53:39.557894 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2203 13:53:39.558045 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2204 13:53:39.562033 # ok 477 Set SVE VL 1904
2205 13:53:39.562462 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2206 13:53:39.562615 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2207 13:53:39.564274 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2208 13:53:39.564379 # ok 481 Set SVE VL 1920
2209 13:53:39.564668 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2210 13:53:39.564774 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2211 13:53:39.564860 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2212 13:53:39.565143 # ok 485 Set SVE VL 1936
2213 13:53:39.565243 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2214 13:53:39.565328 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2215 13:53:39.565411 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2216 13:53:39.565695 # ok 489 Set SVE VL 1952
2217 13:53:39.565779 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2218 13:53:39.565849 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2219 13:53:39.565947 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2220 13:53:39.566032 # ok 493 Set SVE VL 1968
2221 13:53:39.566132 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2222 13:53:39.566233 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2223 13:53:39.566319 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2224 13:53:39.566417 # ok 497 Set SVE VL 1984
2225 13:53:39.566716 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2226 13:53:39.566819 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2227 13:53:39.566922 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2228 13:53:39.567010 # ok 501 Set SVE VL 2000
2229 13:53:39.567111 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2230 13:53:39.567400 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2231 13:53:39.567504 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2232 13:53:39.567606 # ok 505 Set SVE VL 2016
2233 13:53:39.567701 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2234 13:53:39.567801 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2235 13:53:39.567899 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2236 13:53:39.567983 # ok 509 Set SVE VL 2032
2237 13:53:39.568077 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2238 13:53:39.568370 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2239 13:53:39.568487 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2240 13:53:39.568575 # ok 513 Set SVE VL 2048
2241 13:53:39.568678 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2242 13:53:39.568776 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2243 13:53:39.568876 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2244 13:53:39.568994 # ok 517 Set SVE VL 2064
2245 13:53:39.569096 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2246 13:53:39.569389 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2247 13:53:39.569481 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2248 13:53:39.569568 # ok 521 Set SVE VL 2080
2249 13:53:39.569687 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2250 13:53:39.577856 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2251 13:53:39.578198 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2252 13:53:39.578327 # ok 525 Set SVE VL 2096
2253 13:53:39.578471 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2254 13:53:39.578632 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2255 13:53:39.578752 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2256 13:53:39.578865 # ok 529 Set SVE VL 2112
2257 13:53:39.578962 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2258 13:53:39.579064 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2259 13:53:39.579150 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2260 13:53:39.579248 # ok 533 Set SVE VL 2128
2261 13:53:39.579348 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2262 13:53:39.579447 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2263 13:53:39.579548 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2264 13:53:39.579834 # ok 537 Set SVE VL 2144
2265 13:53:39.579929 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2266 13:53:39.580017 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2267 13:53:39.580312 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2268 13:53:39.580406 # ok 541 Set SVE VL 2160
2269 13:53:39.580481 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2270 13:53:39.580558 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2271 13:53:39.580652 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2272 13:53:39.580742 # ok 545 Set SVE VL 2176
2273 13:53:39.580822 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2274 13:53:39.580915 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2275 13:53:39.580991 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2276 13:53:39.581070 # ok 549 Set SVE VL 2192
2277 13:53:39.581163 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2278 13:53:39.581242 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2279 13:53:39.581347 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2280 13:53:39.581687 # ok 553 Set SVE VL 2208
2281 13:53:39.581990 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2282 13:53:39.585182 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2283 13:53:39.585726 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2284 13:53:39.585873 # ok 557 Set SVE VL 2224
2285 13:53:39.585987 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2286 13:53:39.586298 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2287 13:53:39.586397 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2288 13:53:39.586507 # ok 561 Set SVE VL 2240
2289 13:53:39.586601 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2290 13:53:39.586725 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2291 13:53:39.586829 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2292 13:53:39.586958 # ok 565 Set SVE VL 2256
2293 13:53:39.587042 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2294 13:53:39.587316 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2295 13:53:39.587418 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2296 13:53:39.587534 # ok 569 Set SVE VL 2272
2297 13:53:39.587654 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2298 13:53:39.587783 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2299 13:53:39.587899 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2300 13:53:39.587996 # ok 573 Set SVE VL 2288
2301 13:53:39.588227 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2302 13:53:39.588368 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2303 13:53:39.588679 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2304 13:53:39.588783 # ok 577 Set SVE VL 2304
2305 13:53:39.588904 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2306 13:53:39.589006 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2307 13:53:39.589135 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2308 13:53:39.589250 # ok 581 Set SVE VL 2320
2309 13:53:39.589544 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2310 13:53:39.589659 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2311 13:53:39.589954 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2312 13:53:39.590053 # ok 585 Set SVE VL 2336
2313 13:53:39.590333 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2314 13:53:39.590434 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2315 13:53:39.590522 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2316 13:53:39.590613 # ok 589 Set SVE VL 2352
2317 13:53:39.590694 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2318 13:53:39.590769 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2319 13:53:39.590853 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2320 13:53:39.590935 # ok 593 Set SVE VL 2368
2321 13:53:39.591023 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2322 13:53:39.591308 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2323 13:53:39.591410 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2324 13:53:39.591705 # ok 597 Set SVE VL 2384
2325 13:53:39.591819 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2326 13:53:39.591912 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2327 13:53:39.591995 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2328 13:53:39.592086 # ok 601 Set SVE VL 2400
2329 13:53:39.592165 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2330 13:53:39.592254 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2331 13:53:39.592690 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2332 13:53:39.592793 # ok 605 Set SVE VL 2416
2333 13:53:39.592916 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2334 13:53:39.593039 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2335 13:53:39.593447 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2336 13:53:39.593547 # ok 609 Set SVE VL 2432
2337 13:53:39.593629 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2338 13:53:39.593715 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2339 13:53:39.593789 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2340 13:53:39.593867 # ok 613 Set SVE VL 2448
2341 13:53:39.593962 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2342 13:53:39.594047 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2343 13:53:39.594130 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2344 13:53:39.594436 # ok 617 Set SVE VL 2464
2345 13:53:39.594629 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2346 13:53:39.594788 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2347 13:53:39.594972 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2348 13:53:39.595131 # ok 621 Set SVE VL 2480
2349 13:53:39.595282 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2350 13:53:39.595434 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2351 13:53:39.595585 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2352 13:53:39.595736 # ok 625 Set SVE VL 2496
2353 13:53:39.595888 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2354 13:53:39.596070 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2355 13:53:39.596224 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2356 13:53:39.596373 # ok 629 Set SVE VL 2512
2357 13:53:39.596518 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2358 13:53:39.596663 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2359 13:53:39.596819 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2360 13:53:39.596924 # ok 633 Set SVE VL 2528
2361 13:53:39.597016 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2362 13:53:39.597108 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2363 13:53:39.597201 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2364 13:53:39.597296 # ok 637 Set SVE VL 2544
2365 13:53:39.597410 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2366 13:53:39.597510 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2367 13:53:39.597609 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2368 13:53:39.597758 # ok 641 Set SVE VL 2560
2369 13:53:39.597907 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2370 13:53:39.598045 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2371 13:53:39.598180 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2372 13:53:39.598299 # ok 645 Set SVE VL 2576
2373 13:53:39.598425 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2374 13:53:39.598545 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2375 13:53:39.598661 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2376 13:53:39.598760 # ok 649 Set SVE VL 2592
2377 13:53:39.598877 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2378 13:53:39.598951 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2379 13:53:39.599014 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2380 13:53:39.599074 # ok 653 Set SVE VL 2608
2381 13:53:39.599138 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2382 13:53:39.599198 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2383 13:53:39.599259 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2384 13:53:39.599318 # ok 657 Set SVE VL 2624
2385 13:53:39.599377 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2386 13:53:39.599437 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2387 13:53:39.599698 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2388 13:53:39.599799 # ok 661 Set SVE VL 2640
2389 13:53:39.599864 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2390 13:53:39.599930 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2391 13:53:39.600023 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2392 13:53:39.600114 # ok 665 Set SVE VL 2656
2393 13:53:39.600181 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2394 13:53:39.606231 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2395 13:53:39.606354 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2396 13:53:39.606655 # ok 669 Set SVE VL 2672
2397 13:53:39.606809 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2398 13:53:39.607011 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2399 13:53:39.607213 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2400 13:53:39.607367 # ok 673 Set SVE VL 2688
2401 13:53:39.607517 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2402 13:53:39.607646 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2403 13:53:39.607768 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2404 13:53:39.607888 # ok 677 Set SVE VL 2704
2405 13:53:39.608004 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2406 13:53:39.608126 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2407 13:53:39.608258 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2408 13:53:39.608398 # ok 681 Set SVE VL 2720
2409 13:53:39.608526 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2410 13:53:39.608688 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2411 13:53:39.608847 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2412 13:53:39.608973 # ok 685 Set SVE VL 2736
2413 13:53:39.609122 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2414 13:53:39.609256 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2415 13:53:39.609396 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2416 13:53:39.609520 # ok 689 Set SVE VL 2752
2417 13:53:39.609699 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2418 13:53:39.609871 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2419 13:53:39.610017 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2420 13:53:39.610136 # ok 693 Set SVE VL 2768
2421 13:53:39.610254 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2422 13:53:39.610371 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2423 13:53:39.610564 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2424 13:53:39.610736 # ok 697 Set SVE VL 2784
2425 13:53:39.610890 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2426 13:53:39.611026 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2427 13:53:39.611170 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2428 13:53:39.611328 # ok 701 Set SVE VL 2800
2429 13:53:39.611478 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2430 13:53:39.611628 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2431 13:53:39.611855 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2432 13:53:39.612052 # ok 705 Set SVE VL 2816
2433 13:53:39.612224 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2434 13:53:39.612388 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2435 13:53:39.612548 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2436 13:53:39.612748 # ok 709 Set SVE VL 2832
2437 13:53:39.612923 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2438 13:53:39.613080 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2439 13:53:39.613219 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2440 13:53:39.613632 # ok 713 Set SVE VL 2848
2441 13:53:39.613805 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2442 13:53:39.613928 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2443 13:53:39.614046 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2444 13:53:39.614162 # ok 717 Set SVE VL 2864
2445 13:53:39.614279 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2446 13:53:39.614397 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2447 13:53:39.614514 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2448 13:53:39.614630 # ok 721 Set SVE VL 2880
2449 13:53:39.614740 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2450 13:53:39.614828 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2451 13:53:39.614917 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2452 13:53:39.615006 # ok 725 Set SVE VL 2896
2453 13:53:39.615102 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2454 13:53:39.615196 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2455 13:53:39.615288 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2456 13:53:39.615393 # ok 729 Set SVE VL 2912
2457 13:53:39.615504 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2458 13:53:39.615616 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2459 13:53:39.615716 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2460 13:53:39.615841 # ok 733 Set SVE VL 2928
2461 13:53:39.615961 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2462 13:53:39.616091 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2463 13:53:39.616218 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2464 13:53:39.616360 # ok 737 Set SVE VL 2944
2465 13:53:39.616499 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2466 13:53:39.616656 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2467 13:53:39.616794 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2468 13:53:39.616899 # ok 741 Set SVE VL 2960
2469 13:53:39.617005 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2470 13:53:39.617111 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2471 13:53:39.617210 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2472 13:53:39.617299 # ok 745 Set SVE VL 2976
2473 13:53:39.617380 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2474 13:53:39.617449 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2475 13:53:39.617535 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2476 13:53:39.617606 # ok 749 Set SVE VL 2992
2477 13:53:39.617917 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2478 13:53:39.618014 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2479 13:53:39.618109 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2480 13:53:39.618205 # ok 753 Set SVE VL 3008
2481 13:53:39.618295 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2482 13:53:39.618393 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2483 13:53:39.618677 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2484 13:53:39.618770 # ok 757 Set SVE VL 3024
2485 13:53:39.618849 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2486 13:53:39.618931 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2487 13:53:39.619036 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2488 13:53:39.619128 # ok 761 Set SVE VL 3040
2489 13:53:39.619204 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2490 13:53:39.619278 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2491 13:53:39.619353 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2492 13:53:39.619426 # ok 765 Set SVE VL 3056
2493 13:53:39.619500 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2494 13:53:39.619573 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2495 13:53:39.619646 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2496 13:53:39.619748 # ok 769 Set SVE VL 3072
2497 13:53:39.619854 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2498 13:53:39.619945 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2499 13:53:39.620017 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2500 13:53:39.620133 # ok 773 Set SVE VL 3088
2501 13:53:39.620271 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2502 13:53:39.620393 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2503 13:53:39.620484 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2504 13:53:39.620573 # ok 777 Set SVE VL 3104
2505 13:53:39.620673 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2506 13:53:39.620752 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2507 13:53:39.620831 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2508 13:53:39.620907 # ok 781 Set SVE VL 3120
2509 13:53:39.620975 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2510 13:53:39.621054 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2511 13:53:39.621128 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2512 13:53:39.621205 # ok 785 Set SVE VL 3136
2513 13:53:39.621305 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2514 13:53:39.621407 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2515 13:53:39.621490 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2516 13:53:39.621618 # ok 789 Set SVE VL 3152
2517 13:53:39.621822 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2518 13:53:39.621923 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2519 13:53:39.622019 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2520 13:53:39.622093 # ok 793 Set SVE VL 3168
2521 13:53:39.622165 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2522 13:53:39.622265 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2523 13:53:39.622346 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2524 13:53:39.622424 # ok 797 Set SVE VL 3184
2525 13:53:39.622498 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2526 13:53:39.622567 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2527 13:53:39.622848 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2528 13:53:39.622933 # ok 801 Set SVE VL 3200
2529 13:53:39.623009 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2530 13:53:39.623079 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2531 13:53:39.623142 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2532 13:53:39.623206 # ok 805 Set SVE VL 3216
2533 13:53:39.623268 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2534 13:53:39.623331 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2535 13:53:39.623394 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2536 13:53:39.623464 # ok 809 Set SVE VL 3232
2537 13:53:39.623539 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2538 13:53:39.623621 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2539 13:53:39.623718 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2540 13:53:39.623806 # ok 813 Set SVE VL 3248
2541 13:53:39.623900 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2542 13:53:39.624005 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2543 13:53:39.624105 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2544 13:53:39.624209 # ok 817 Set SVE VL 3264
2545 13:53:39.624301 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2546 13:53:39.624378 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2547 13:53:39.624453 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2548 13:53:39.624544 # ok 821 Set SVE VL 3280
2549 13:53:39.624614 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2550 13:53:39.624679 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2551 13:53:39.624755 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2552 13:53:39.624833 # ok 825 Set SVE VL 3296
2553 13:53:39.624908 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2554 13:53:39.624985 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2555 13:53:39.625061 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2556 13:53:39.625151 # ok 829 Set SVE VL 3312
2557 13:53:39.625218 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2558 13:53:39.625280 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2559 13:53:39.625349 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2560 13:53:39.625413 # ok 833 Set SVE VL 3328
2561 13:53:39.625484 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2562 13:53:39.625548 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2563 13:53:39.625609 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2564 13:53:39.625692 # ok 837 Set SVE VL 3344
2565 13:53:39.625796 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2566 13:53:39.625911 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2567 13:53:39.626010 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2568 13:53:39.626105 # ok 841 Set SVE VL 3360
2569 13:53:39.626188 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2570 13:53:39.626263 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2571 13:53:39.626557 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2572 13:53:39.626663 # ok 845 Set SVE VL 3376
2573 13:53:39.626751 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2574 13:53:39.626836 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2575 13:53:39.626920 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2576 13:53:39.627006 # ok 849 Set SVE VL 3392
2577 13:53:39.627082 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2578 13:53:39.627174 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2579 13:53:39.627252 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2580 13:53:39.627329 # ok 853 Set SVE VL 3408
2581 13:53:39.627405 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2582 13:53:39.634399 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2583 13:53:39.634578 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2584 13:53:39.634708 # ok 857 Set SVE VL 3424
2585 13:53:39.634804 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2586 13:53:39.634938 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2587 13:53:39.635078 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2588 13:53:39.635149 # ok 861 Set SVE VL 3440
2589 13:53:39.635234 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2590 13:53:39.637726 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2591 13:53:39.637868 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2592 13:53:39.637977 # ok 865 Set SVE VL 3456
2593 13:53:39.638065 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2594 13:53:39.638156 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2595 13:53:39.638235 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2596 13:53:39.638307 # ok 869 Set SVE VL 3472
2597 13:53:39.638406 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2598 13:53:39.638477 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2599 13:53:39.638553 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2600 13:53:39.638639 # ok 873 Set SVE VL 3488
2601 13:53:39.638715 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2602 13:53:39.638834 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2603 13:53:39.638916 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2604 13:53:39.639013 # ok 877 Set SVE VL 3504
2605 13:53:39.639080 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2606 13:53:39.639156 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2607 13:53:39.639249 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2608 13:53:39.639313 # ok 881 Set SVE VL 3520
2609 13:53:39.639375 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2610 13:53:39.639448 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2611 13:53:39.639511 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2612 13:53:39.639620 # ok 885 Set SVE VL 3536
2613 13:53:39.639708 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2614 13:53:39.639806 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2615 13:53:39.639889 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2616 13:53:39.639999 # ok 889 Set SVE VL 3552
2617 13:53:39.640103 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2618 13:53:39.640225 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2619 13:53:39.640311 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2620 13:53:39.640397 # ok 893 Set SVE VL 3568
2621 13:53:39.640479 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2622 13:53:39.640564 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2623 13:53:39.640665 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2624 13:53:39.640749 # ok 897 Set SVE VL 3584
2625 13:53:39.640829 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2626 13:53:39.640921 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2627 13:53:39.641001 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2628 13:53:39.641070 # ok 901 Set SVE VL 3600
2629 13:53:39.641145 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2630 13:53:39.641206 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2631 13:53:39.641277 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2632 13:53:39.645712 # ok 905 Set SVE VL 3616
2633 13:53:39.645823 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2634 13:53:39.645907 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2635 13:53:39.645988 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2636 13:53:39.646068 # ok 909 Set SVE VL 3632
2637 13:53:39.646148 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2638 13:53:39.646228 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2639 13:53:39.646309 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2640 13:53:39.646390 # ok 913 Set SVE VL 3648
2641 13:53:39.646470 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2642 13:53:39.646550 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2643 13:53:39.646630 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2644 13:53:39.646710 # ok 917 Set SVE VL 3664
2645 13:53:39.646789 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2646 13:53:39.646877 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2647 13:53:39.646955 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2648 13:53:39.647031 # ok 921 Set SVE VL 3680
2649 13:53:39.647106 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2650 13:53:39.647181 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2651 13:53:39.647255 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2652 13:53:39.647328 # ok 925 Set SVE VL 3696
2653 13:53:39.647400 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2654 13:53:39.647473 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2655 13:53:39.647547 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2656 13:53:39.647620 # ok 929 Set SVE VL 3712
2657 13:53:39.647692 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2658 13:53:39.647887 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2659 13:53:39.647973 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2660 13:53:39.648043 # ok 933 Set SVE VL 3728
2661 13:53:39.648111 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2662 13:53:39.648192 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2663 13:53:39.648280 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2664 13:53:39.648367 # ok 937 Set SVE VL 3744
2665 13:53:39.648454 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2666 13:53:39.648543 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2667 13:53:39.648627 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2668 13:53:39.648720 # ok 941 Set SVE VL 3760
2669 13:53:39.648847 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2670 13:53:39.648960 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2671 13:53:39.649097 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2672 13:53:39.649197 # ok 945 Set SVE VL 3776
2673 13:53:39.649289 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2674 13:53:39.649354 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2675 13:53:39.649625 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2676 13:53:39.649735 # ok 949 Set SVE VL 3792
2677 13:53:39.649816 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2678 13:53:39.649895 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2679 13:53:39.649972 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2680 13:53:39.650048 # ok 953 Set SVE VL 3808
2681 13:53:39.650123 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2682 13:53:39.650199 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2683 13:53:39.650276 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2684 13:53:39.650353 # ok 957 Set SVE VL 3824
2685 13:53:39.650428 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2686 13:53:39.650504 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2687 13:53:39.650579 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2688 13:53:39.650654 # ok 961 Set SVE VL 3840
2689 13:53:39.650729 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2690 13:53:39.650804 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2691 13:53:39.650886 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2692 13:53:39.650961 # ok 965 Set SVE VL 3856
2693 13:53:39.651037 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2694 13:53:39.651112 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2695 13:53:39.651187 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2696 13:53:39.651264 # ok 969 Set SVE VL 3872
2697 13:53:39.651339 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2698 13:53:39.651436 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2699 13:53:39.651516 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2700 13:53:39.651594 # ok 973 Set SVE VL 3888
2701 13:53:39.651670 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2702 13:53:39.651746 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2703 13:53:39.651821 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2704 13:53:39.651910 # ok 977 Set SVE VL 3904
2705 13:53:39.651996 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2706 13:53:39.652065 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2707 13:53:39.652153 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2708 13:53:39.652227 # ok 981 Set SVE VL 3920
2709 13:53:39.652285 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2710 13:53:39.652352 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2711 13:53:39.652412 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2712 13:53:39.652469 # ok 985 Set SVE VL 3936
2713 13:53:39.652526 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2714 13:53:39.652583 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2715 13:53:39.652654 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2716 13:53:39.652716 # ok 989 Set SVE VL 3952
2717 13:53:39.652775 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2718 13:53:39.652849 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2719 13:53:39.653125 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2720 13:53:39.653227 # ok 993 Set SVE VL 3968
2721 13:53:39.653309 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2722 13:53:39.653389 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2723 13:53:39.653463 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2724 13:53:39.653556 # ok 997 Set SVE VL 3984
2725 13:53:39.653693 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2726 13:53:39.653786 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2727 13:53:39.653872 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2728 13:53:39.653946 # ok 1001 Set SVE VL 4000
2729 13:53:39.654025 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2730 13:53:39.654120 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2731 13:53:39.654197 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2732 13:53:39.654264 # ok 1005 Set SVE VL 4016
2733 13:53:39.654342 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2734 13:53:39.654412 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2735 13:53:39.654482 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2736 13:53:39.654564 # ok 1009 Set SVE VL 4032
2737 13:53:39.654636 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2738 13:53:39.654724 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2739 13:53:39.654798 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2740 13:53:39.654905 # ok 1013 Set SVE VL 4048
2741 13:53:39.655010 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2742 13:53:39.655107 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2743 13:53:39.655194 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2744 13:53:39.655271 # ok 1017 Set SVE VL 4064
2745 13:53:39.655349 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2746 13:53:39.655427 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2747 13:53:39.655508 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2748 13:53:39.655611 # ok 1021 Set SVE VL 4080
2749 13:53:39.655692 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2750 13:53:39.655788 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2751 13:53:39.655874 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2752 13:53:39.655956 # ok 1025 Set SVE VL 4096
2753 13:53:39.656037 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2754 13:53:39.656118 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2755 13:53:39.656216 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2756 13:53:39.656301 # ok 1029 Set SVE VL 4112
2757 13:53:39.656380 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2758 13:53:39.656457 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2759 13:53:39.656550 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2760 13:53:39.656632 # ok 1033 Set SVE VL 4128
2761 13:53:39.656711 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2762 13:53:39.657001 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2763 13:53:39.657124 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2764 13:53:39.657215 # ok 1037 Set SVE VL 4144
2765 13:53:39.657423 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2766 13:53:39.657531 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2767 13:53:39.657615 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2768 13:53:39.662757 # ok 1041 Set SVE VL 4160
2769 13:53:39.663119 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2770 13:53:39.663229 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2771 13:53:39.663328 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2772 13:53:39.663434 # ok 1045 Set SVE VL 4176
2773 13:53:39.663517 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2774 13:53:39.663612 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2775 13:53:39.663708 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2776 13:53:39.663788 # ok 1049 Set SVE VL 4192
2777 13:53:39.663891 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2778 13:53:39.663991 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2779 13:53:39.664696 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2780 13:53:39.664803 # ok 1053 Set SVE VL 4208
2781 13:53:39.665104 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2782 13:53:39.665201 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2783 13:53:39.665288 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2784 13:53:39.665373 # ok 1057 Set SVE VL 4224
2785 13:53:39.665751 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2786 13:53:39.665860 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2787 13:53:39.665971 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2788 13:53:39.666044 # ok 1061 Set SVE VL 4240
2789 13:53:39.666135 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2790 13:53:39.666241 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2791 13:53:39.666330 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2792 13:53:39.666406 # ok 1065 Set SVE VL 4256
2793 13:53:39.666519 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2794 13:53:39.666646 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2795 13:53:39.666753 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2796 13:53:39.666841 # ok 1069 Set SVE VL 4272
2797 13:53:39.666926 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2798 13:53:39.667027 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2799 13:53:39.667118 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2800 13:53:39.667202 # ok 1073 Set SVE VL 4288
2801 13:53:39.667303 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2802 13:53:39.667392 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2803 13:53:39.667498 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2804 13:53:39.667608 # ok 1077 Set SVE VL 4304
2805 13:53:39.667739 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2806 13:53:39.667875 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2807 13:53:39.667997 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2808 13:53:39.668116 # ok 1081 Set SVE VL 4320
2809 13:53:39.668237 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2810 13:53:39.668342 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2811 13:53:39.668464 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2812 13:53:39.668596 # ok 1085 Set SVE VL 4336
2813 13:53:39.668726 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2814 13:53:39.668838 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2815 13:53:39.669127 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2816 13:53:39.669226 # ok 1089 Set SVE VL 4352
2817 13:53:39.669507 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2818 13:53:39.669606 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2819 13:53:39.669702 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2820 13:53:39.669802 # ok 1093 Set SVE VL 4368
2821 13:53:39.669882 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2822 13:53:39.670179 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2823 13:53:39.670289 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2824 13:53:39.670398 # ok 1097 Set SVE VL 4384
2825 13:53:39.670495 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2826 13:53:39.670620 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2827 13:53:39.670931 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2828 13:53:39.671052 # ok 1101 Set SVE VL 4400
2829 13:53:39.671187 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2830 13:53:39.671287 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2831 13:53:39.671418 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2832 13:53:39.671531 # ok 1105 Set SVE VL 4416
2833 13:53:39.671646 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2834 13:53:39.671775 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2835 13:53:39.671909 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2836 13:53:39.672026 # ok 1109 Set SVE VL 4432
2837 13:53:39.672453 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2838 13:53:39.672551 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2839 13:53:39.672636 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2840 13:53:39.672722 # ok 1113 Set SVE VL 4448
2841 13:53:39.672817 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2842 13:53:39.672933 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2843 13:53:39.673032 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2844 13:53:39.673115 # ok 1117 Set SVE VL 4464
2845 13:53:39.673217 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2846 13:53:39.673349 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2847 13:53:39.673488 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2848 13:53:39.673596 # ok 1121 Set SVE VL 4480
2849 13:53:39.673764 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2850 13:53:39.673868 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2851 13:53:39.674171 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2852 13:53:39.674263 # ok 1125 Set SVE VL 4496
2853 13:53:39.674575 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2854 13:53:39.674683 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2855 13:53:39.674791 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2856 13:53:39.674877 # ok 1129 Set SVE VL 4512
2857 13:53:39.675184 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2858 13:53:39.675297 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2859 13:53:39.675451 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2860 13:53:39.675566 # ok 1133 Set SVE VL 4528
2861 13:53:39.675658 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2862 13:53:39.675760 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2863 13:53:39.675857 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2864 13:53:39.675964 # ok 1137 Set SVE VL 4544
2865 13:53:39.676165 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2866 13:53:39.676282 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2867 13:53:39.676381 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2868 13:53:39.676499 # ok 1141 Set SVE VL 4560
2869 13:53:39.677237 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2870 13:53:39.677337 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2871 13:53:39.677445 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2872 13:53:39.677521 # ok 1145 Set SVE VL 4576
2873 13:53:39.677630 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2874 13:53:39.677730 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2875 13:53:39.677841 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2876 13:53:39.677921 # ok 1149 Set SVE VL 4592
2877 13:53:39.678041 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2878 13:53:39.678163 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2879 13:53:39.678470 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2880 13:53:39.678611 # ok 1153 Set SVE VL 4608
2881 13:53:39.678716 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2882 13:53:39.678808 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2883 13:53:39.678920 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2884 13:53:39.678997 # ok 1157 Set SVE VL 4624
2885 13:53:39.679116 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2886 13:53:39.679207 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2887 13:53:39.679333 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2888 13:53:39.679646 # ok 1161 Set SVE VL 4640
2889 13:53:39.679774 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2890 13:53:39.679887 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2891 13:53:39.680021 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2892 13:53:39.680148 # ok 1165 Set SVE VL 4656
2893 13:53:39.680245 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2894 13:53:39.680557 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2895 13:53:39.680675 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2896 13:53:39.680789 # ok 1169 Set SVE VL 4672
2897 13:53:39.680917 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2898 13:53:39.681247 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2899 13:53:39.681349 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2900 13:53:39.681548 # ok 1173 Set SVE VL 4688
2901 13:53:39.681678 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2902 13:53:39.681791 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2903 13:53:39.681894 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2904 13:53:39.681981 # ok 1177 Set SVE VL 4704
2905 13:53:39.682130 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2906 13:53:39.682456 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2907 13:53:39.682559 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2908 13:53:39.682706 # ok 1181 Set SVE VL 4720
2909 13:53:39.682975 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2910 13:53:39.683056 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2911 13:53:39.683301 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2912 13:53:39.683489 # ok 1185 Set SVE VL 4736
2913 13:53:39.683621 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2914 13:53:39.683749 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2915 13:53:39.684103 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2916 13:53:39.684271 # ok 1189 Set SVE VL 4752
2917 13:53:39.684410 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2918 13:53:39.684549 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2919 13:53:39.684657 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2920 13:53:39.685757 # ok 1193 Set SVE VL 4768
2921 13:53:39.685905 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2922 13:53:39.686002 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2923 13:53:39.686094 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2924 13:53:39.686183 # ok 1197 Set SVE VL 4784
2925 13:53:39.686267 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2926 13:53:39.686375 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2927 13:53:39.686488 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2928 13:53:39.686594 # ok 1201 Set SVE VL 4800
2929 13:53:39.686692 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2930 13:53:39.686805 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2931 13:53:39.686922 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2932 13:53:39.687033 # ok 1205 Set SVE VL 4816
2933 13:53:39.687340 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2934 13:53:39.687439 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2935 13:53:39.687512 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2936 13:53:39.687576 # ok 1209 Set SVE VL 4832
2937 13:53:39.687637 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2938 13:53:39.687697 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2939 13:53:39.687757 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2940 13:53:39.687815 # ok 1213 Set SVE VL 4848
2941 13:53:39.687874 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2942 13:53:39.687932 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2943 13:53:39.687995 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2944 13:53:39.688072 # ok 1217 Set SVE VL 4864
2945 13:53:39.688137 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2946 13:53:39.688205 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2947 13:53:39.688295 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2948 13:53:39.688357 # ok 1221 Set SVE VL 4880
2949 13:53:39.688416 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2950 13:53:39.688475 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2951 13:53:39.696580 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2952 13:53:39.696787 # ok 1225 Set SVE VL 4896
2953 13:53:39.697111 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2954 13:53:39.697214 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2955 13:53:39.697299 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2956 13:53:39.697382 # ok 1229 Set SVE VL 4912
2957 13:53:39.697481 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2958 13:53:39.697565 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2959 13:53:39.697654 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2960 13:53:39.697758 # ok 1233 Set SVE VL 4928
2961 13:53:39.697841 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2962 13:53:39.698598 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2963 13:53:39.698884 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2964 13:53:39.698977 # ok 1237 Set SVE VL 4944
2965 13:53:39.699079 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2966 13:53:39.699166 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2967 13:53:39.699253 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2968 13:53:39.699338 # ok 1241 Set SVE VL 4960
2969 13:53:39.699440 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2970 13:53:39.699720 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2971 13:53:39.699812 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2972 13:53:39.700000 # ok 1245 Set SVE VL 4976
2973 13:53:39.700087 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2974 13:53:39.700219 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2975 13:53:39.700308 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2976 13:53:39.700396 # ok 1249 Set SVE VL 4992
2977 13:53:39.700478 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2978 13:53:39.700582 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2979 13:53:39.700669 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2980 13:53:39.700755 # ok 1253 Set SVE VL 5008
2981 13:53:39.700838 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2982 13:53:39.700937 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2983 13:53:39.701022 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2984 13:53:39.701121 # ok 1257 Set SVE VL 5024
2985 13:53:39.701407 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2986 13:53:39.701511 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2987 13:53:39.701608 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2988 13:53:39.701783 # ok 1261 Set SVE VL 5040
2989 13:53:39.701879 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2990 13:53:39.701983 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2991 13:53:39.702692 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2992 13:53:39.702997 # ok 1265 Set SVE VL 5056
2993 13:53:39.703110 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2994 13:53:39.703195 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2995 13:53:39.703274 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2996 13:53:39.703365 # ok 1269 Set SVE VL 5072
2997 13:53:39.703445 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
2998 13:53:39.703537 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
2999 13:53:39.703617 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3000 13:53:39.703706 # ok 1273 Set SVE VL 5088
3001 13:53:39.703797 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3002 13:53:39.703889 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3003 13:53:39.704009 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3004 13:53:39.704117 # ok 1277 Set SVE VL 5104
3005 13:53:39.704225 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3006 13:53:39.705589 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3007 13:53:39.705697 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3008 13:53:39.705818 # ok 1281 Set SVE VL 5120
3009 13:53:39.705883 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3010 13:53:39.705944 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3011 13:53:39.706006 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3012 13:53:39.706080 # ok 1285 Set SVE VL 5136
3013 13:53:39.706180 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3014 13:53:39.706246 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3015 13:53:39.706306 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3016 13:53:39.706365 # ok 1289 Set SVE VL 5152
3017 13:53:39.706737 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3018 13:53:39.706830 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3019 13:53:39.706924 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3020 13:53:39.707028 # ok 1293 Set SVE VL 5168
3021 13:53:39.707103 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3022 13:53:39.707470 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3023 13:53:39.707561 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3024 13:53:39.707658 # ok 1297 Set SVE VL 5184
3025 13:53:39.707746 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3026 13:53:39.707848 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3027 13:53:39.707931 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3028 13:53:39.708020 # ok 1301 Set SVE VL 5200
3029 13:53:39.708118 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3030 13:53:39.708204 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3031 13:53:39.708306 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3032 13:53:39.708399 # ok 1305 Set SVE VL 5216
3033 13:53:39.708504 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3034 13:53:39.708613 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3035 13:53:39.708908 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3036 13:53:39.709022 # ok 1309 Set SVE VL 5232
3037 13:53:39.709135 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3038 13:53:39.709249 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3039 13:53:39.709346 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3040 13:53:39.709451 # ok 1313 Set SVE VL 5248
3041 13:53:39.709545 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3042 13:53:39.709653 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3043 13:53:39.709961 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3044 13:53:39.710066 # ok 1317 Set SVE VL 5264
3045 13:53:39.710389 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3046 13:53:39.710477 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3047 13:53:39.710623 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3048 13:53:39.710734 # ok 1321 Set SVE VL 5280
3049 13:53:39.710850 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3050 13:53:39.710979 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3051 13:53:39.711123 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3052 13:53:39.711239 # ok 1325 Set SVE VL 5296
3053 13:53:39.711361 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3054 13:53:39.711448 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3055 13:53:39.711549 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3056 13:53:39.711635 # ok 1329 Set SVE VL 5312
3057 13:53:39.711727 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3058 13:53:39.711819 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3059 13:53:39.712105 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3060 13:53:39.712208 # ok 1333 Set SVE VL 5328
3061 13:53:39.712307 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3062 13:53:39.712414 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3063 13:53:39.712514 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3064 13:53:39.712625 # ok 1337 Set SVE VL 5344
3065 13:53:39.712735 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3066 13:53:39.712864 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3067 13:53:39.712965 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3068 13:53:39.713075 # ok 1341 Set SVE VL 5360
3069 13:53:39.713159 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3070 13:53:39.713239 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3071 13:53:39.713326 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3072 13:53:39.713420 # ok 1345 Set SVE VL 5376
3073 13:53:39.713551 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3074 13:53:39.713666 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3075 13:53:39.713778 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3076 13:53:39.714053 # ok 1349 Set SVE VL 5392
3077 13:53:39.714171 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3078 13:53:39.714268 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3079 13:53:39.714391 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3080 13:53:39.714491 # ok 1353 Set SVE VL 5408
3081 13:53:39.714600 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3082 13:53:39.714864 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3083 13:53:39.714934 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3084 13:53:39.714996 # ok 1357 Set SVE VL 5424
3085 13:53:39.715078 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3086 13:53:39.715177 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3087 13:53:39.715267 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3088 13:53:39.715541 # ok 1361 Set SVE VL 5440
3089 13:53:39.715642 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3090 13:53:39.715734 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3091 13:53:39.715853 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3092 13:53:39.715946 # ok 1365 Set SVE VL 5456
3093 13:53:39.716046 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3094 13:53:39.716136 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3095 13:53:39.716231 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3096 13:53:39.716313 # ok 1369 Set SVE VL 5472
3097 13:53:39.716389 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3098 13:53:39.716463 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3099 13:53:39.716554 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3100 13:53:39.716627 # ok 1373 Set SVE VL 5488
3101 13:53:39.716709 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3102 13:53:39.716790 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3103 13:53:39.716897 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3104 13:53:39.716995 # ok 1377 Set SVE VL 5504
3105 13:53:39.717092 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3106 13:53:39.717179 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3107 13:53:39.717462 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3108 13:53:39.717561 # ok 1381 Set SVE VL 5520
3109 13:53:39.717651 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3110 13:53:39.717731 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3111 13:53:39.717823 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3112 13:53:39.717892 # ok 1385 Set SVE VL 5536
3113 13:53:39.717984 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3114 13:53:39.718077 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3115 13:53:39.718386 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3116 13:53:39.718482 # ok 1389 Set SVE VL 5552
3117 13:53:39.718573 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3118 13:53:39.718655 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3119 13:53:39.718754 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3120 13:53:39.718865 # ok 1393 Set SVE VL 5568
3121 13:53:39.719001 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3122 13:53:39.719109 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3123 13:53:39.719204 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3124 13:53:39.719600 # ok 1397 Set SVE VL 5584
3125 13:53:39.719691 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3126 13:53:39.719783 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3127 13:53:39.720079 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3128 13:53:39.720170 # ok 1401 Set SVE VL 5600
3129 13:53:39.720259 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3130 13:53:39.720388 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3131 13:53:39.720484 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3132 13:53:39.720593 # ok 1405 Set SVE VL 5616
3133 13:53:39.720699 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3134 13:53:39.746773 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3135 13:53:39.747196 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3136 13:53:39.747293 # ok 1409 Set SVE VL 5632
3137 13:53:39.747381 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3138 13:53:39.747481 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3139 13:53:39.747569 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3140 13:53:39.747651 # ok 1413 Set SVE VL 5648
3141 13:53:39.747751 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3142 13:53:39.747838 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3143 13:53:39.747937 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3144 13:53:39.748039 # ok 1417 Set SVE VL 5664
3145 13:53:39.748344 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3146 13:53:39.748445 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3147 13:53:39.748547 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3148 13:53:39.748828 # ok 1421 Set SVE VL 5680
3149 13:53:39.748949 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3150 13:53:39.749039 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3151 13:53:39.749138 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3152 13:53:39.749222 # ok 1425 Set SVE VL 5696
3153 13:53:39.749319 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3154 13:53:39.749609 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3155 13:53:39.749907 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3156 13:53:39.749993 # ok 1429 Set SVE VL 5712
3157 13:53:39.751029 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3158 13:53:39.751349 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3159 13:53:39.751445 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3160 13:53:39.751753 # ok 1433 Set SVE VL 5728
3161 13:53:39.751847 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3162 13:53:39.751919 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3163 13:53:39.752194 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3164 13:53:39.752293 # ok 1437 Set SVE VL 5744
3165 13:53:39.752399 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3166 13:53:39.752489 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3167 13:53:39.752593 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3168 13:53:39.752687 # ok 1441 Set SVE VL 5760
3169 13:53:39.752775 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3170 13:53:39.752858 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3171 13:53:39.752975 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3172 13:53:39.753086 # ok 1445 Set SVE VL 5776
3173 13:53:39.753185 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3174 13:53:39.753295 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3175 13:53:39.753405 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3176 13:53:39.753499 # ok 1449 Set SVE VL 5792
3177 13:53:39.753583 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3178 13:53:39.753714 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3179 13:53:39.753805 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3180 13:53:39.753885 # ok 1453 Set SVE VL 5808
3181 13:53:39.754298 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3182 13:53:39.754594 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3183 13:53:39.754719 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3184 13:53:39.754820 # ok 1457 Set SVE VL 5824
3185 13:53:39.754931 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3186 13:53:39.755051 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3187 13:53:39.755161 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3188 13:53:39.755248 # ok 1461 Set SVE VL 5840
3189 13:53:39.755345 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3190 13:53:39.755442 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3191 13:53:39.755552 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3192 13:53:39.755645 # ok 1465 Set SVE VL 5856
3193 13:53:39.755749 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3194 13:53:39.755864 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3195 13:53:39.756181 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3196 13:53:39.756305 # ok 1469 Set SVE VL 5872
3197 13:53:39.756429 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3198 13:53:39.756532 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3199 13:53:39.756651 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3200 13:53:39.756732 # ok 1473 Set SVE VL 5888
3201 13:53:39.756835 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3202 13:53:39.756946 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3203 13:53:39.757060 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3204 13:53:39.757148 # ok 1477 Set SVE VL 5904
3205 13:53:39.757262 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3206 13:53:39.757542 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3207 13:53:39.757661 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3208 13:53:39.757760 # ok 1481 Set SVE VL 5920
3209 13:53:39.757850 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3210 13:53:39.757916 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3211 13:53:39.757977 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3212 13:53:39.758257 # ok 1485 Set SVE VL 5936
3213 13:53:39.758355 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3214 13:53:39.758476 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3215 13:53:39.758574 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3216 13:53:39.758845 # ok 1489 Set SVE VL 5952
3217 13:53:39.758943 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3218 13:53:39.759069 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3219 13:53:39.759158 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3220 13:53:39.759259 # ok 1493 Set SVE VL 5968
3221 13:53:39.759338 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3222 13:53:39.759441 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3223 13:53:39.759569 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3224 13:53:39.759692 # ok 1497 Set SVE VL 5984
3225 13:53:39.759790 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3226 13:53:39.760083 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3227 13:53:39.760207 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3228 13:53:39.760308 # ok 1501 Set SVE VL 6000
3229 13:53:39.760417 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3230 13:53:39.760530 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3231 13:53:39.760646 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3232 13:53:39.760758 # ok 1505 Set SVE VL 6016
3233 13:53:39.760858 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3234 13:53:39.761151 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3235 13:53:39.761276 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3236 13:53:39.761369 # ok 1509 Set SVE VL 6032
3237 13:53:39.761507 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3238 13:53:39.761651 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3239 13:53:39.761880 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3240 13:53:39.761985 # ok 1513 Set SVE VL 6048
3241 13:53:39.762301 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3242 13:53:39.762545 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3243 13:53:39.762723 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3244 13:53:39.762894 # ok 1517 Set SVE VL 6064
3245 13:53:39.763083 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3246 13:53:39.763300 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3247 13:53:39.763501 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3248 13:53:39.763683 # ok 1521 Set SVE VL 6080
3249 13:53:39.763880 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3250 13:53:39.764039 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3251 13:53:39.764157 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3252 13:53:39.764268 # ok 1525 Set SVE VL 6096
3253 13:53:39.764389 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3254 13:53:39.764507 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3255 13:53:39.764681 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3256 13:53:39.764829 # ok 1529 Set SVE VL 6112
3257 13:53:39.764961 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3258 13:53:39.765083 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3259 13:53:39.765190 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3260 13:53:39.765326 # ok 1533 Set SVE VL 6128
3261 13:53:39.765471 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3262 13:53:39.765595 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3263 13:53:39.765732 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3264 13:53:39.765844 # ok 1537 Set SVE VL 6144
3265 13:53:39.765971 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3266 13:53:39.766081 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3267 13:53:39.766172 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3268 13:53:39.766263 # ok 1541 Set SVE VL 6160
3269 13:53:39.766360 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3270 13:53:39.766462 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3271 13:53:39.766555 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3272 13:53:39.766634 # ok 1545 Set SVE VL 6176
3273 13:53:39.766725 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3274 13:53:39.767014 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3275 13:53:39.767427 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3276 13:53:39.767529 # ok 1549 Set SVE VL 6192
3277 13:53:39.767608 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3278 13:53:39.767878 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3279 13:53:39.767993 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3280 13:53:39.768124 # ok 1553 Set SVE VL 6208
3281 13:53:39.768416 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3282 13:53:39.768516 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3283 13:53:39.768611 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3284 13:53:39.768703 # ok 1557 Set SVE VL 6224
3285 13:53:39.768800 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3286 13:53:39.769152 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3287 13:53:39.769533 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3288 13:53:39.769637 # ok 1561 Set SVE VL 6240
3289 13:53:39.769733 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3290 13:53:39.769990 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3291 13:53:39.770095 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3292 13:53:39.770200 # ok 1565 Set SVE VL 6256
3293 13:53:39.770370 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3294 13:53:39.770683 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3295 13:53:39.770798 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3296 13:53:39.770886 # ok 1569 Set SVE VL 6272
3297 13:53:39.770992 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3298 13:53:39.771290 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3299 13:53:39.771399 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3300 13:53:39.771520 # ok 1573 Set SVE VL 6288
3301 13:53:39.771626 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3302 13:53:39.771750 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3303 13:53:39.771869 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3304 13:53:39.771990 # ok 1577 Set SVE VL 6304
3305 13:53:39.772126 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3306 13:53:39.772242 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3307 13:53:39.772369 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3308 13:53:39.772500 # ok 1581 Set SVE VL 6320
3309 13:53:39.772619 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3310 13:53:39.772748 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3311 13:53:39.772859 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3312 13:53:39.772964 # ok 1585 Set SVE VL 6336
3313 13:53:39.773091 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3314 13:53:39.773202 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3315 13:53:39.773298 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3316 13:53:39.773409 # ok 1589 Set SVE VL 6352
3317 13:53:39.775395 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3318 13:53:39.775716 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3319 13:53:39.775821 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3320 13:53:39.775908 # ok 1593 Set SVE VL 6368
3321 13:53:39.776008 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3322 13:53:39.776096 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3323 13:53:39.776192 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3324 13:53:39.776279 # ok 1597 Set SVE VL 6384
3325 13:53:39.776376 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3326 13:53:39.776476 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3327 13:53:39.776750 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3328 13:53:39.776854 # ok 1601 Set SVE VL 6400
3329 13:53:39.776956 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3330 13:53:39.777057 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3331 13:53:39.777165 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3332 13:53:39.777268 # ok 1605 Set SVE VL 6416
3333 13:53:39.777565 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3334 13:53:39.777692 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3335 13:53:39.777802 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3336 13:53:39.777905 # ok 1609 Set SVE VL 6432
3337 13:53:39.778294 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3338 13:53:39.778550 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3339 13:53:39.778631 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3340 13:53:39.778734 # ok 1613 Set SVE VL 6448
3341 13:53:39.778824 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3342 13:53:39.778912 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3343 13:53:39.778984 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3344 13:53:39.779058 # ok 1617 Set SVE VL 6464
3345 13:53:39.779151 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3346 13:53:39.779404 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3347 13:53:39.779485 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3348 13:53:39.779807 # ok 1621 Set SVE VL 6480
3349 13:53:39.780157 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3350 13:53:39.780273 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3351 13:53:39.780362 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3352 13:53:39.780445 # ok 1625 Set SVE VL 6496
3353 13:53:39.780528 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3354 13:53:39.780609 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3355 13:53:39.780682 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3356 13:53:39.780787 # ok 1629 Set SVE VL 6512
3357 13:53:39.780855 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3358 13:53:39.781799 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3359 13:53:39.781905 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3360 13:53:39.781999 # ok 1633 Set SVE VL 6528
3361 13:53:39.782084 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3362 13:53:39.782172 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3363 13:53:39.782259 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3364 13:53:39.782345 # ok 1637 Set SVE VL 6544
3365 13:53:39.782431 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3366 13:53:39.782514 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3367 13:53:39.782598 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3368 13:53:39.782883 # ok 1641 Set SVE VL 6560
3369 13:53:39.782987 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3370 13:53:39.783070 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3371 13:53:39.783156 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3372 13:53:39.783238 # ok 1645 Set SVE VL 6576
3373 13:53:39.783323 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3374 13:53:39.783408 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3375 13:53:39.783491 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3376 13:53:39.783575 # ok 1649 Set SVE VL 6592
3377 13:53:39.783675 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3378 13:53:39.783762 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3379 13:53:39.783848 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3380 13:53:39.783931 # ok 1653 Set SVE VL 6608
3381 13:53:39.784012 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3382 13:53:39.784110 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3383 13:53:39.784194 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3384 13:53:39.784278 # ok 1657 Set SVE VL 6624
3385 13:53:39.784374 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3386 13:53:39.784460 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3387 13:53:39.784555 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3388 13:53:39.784643 # ok 1661 Set SVE VL 6640
3389 13:53:39.784742 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3390 13:53:39.784841 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3391 13:53:39.785332 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3392 13:53:39.785435 # ok 1665 Set SVE VL 6656
3393 13:53:39.785523 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3394 13:53:39.785625 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3395 13:53:39.785723 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3396 13:53:39.785825 # ok 1669 Set SVE VL 6672
3397 13:53:39.785928 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3398 13:53:39.786235 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3399 13:53:39.786354 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3400 13:53:39.786443 # ok 1673 Set SVE VL 6688
3401 13:53:39.786544 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3402 13:53:39.786643 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3403 13:53:39.786744 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3404 13:53:39.786845 # ok 1677 Set SVE VL 6704
3405 13:53:39.787148 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3406 13:53:39.787250 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3407 13:53:39.787350 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3408 13:53:39.787487 # ok 1681 Set SVE VL 6720
3409 13:53:39.787812 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3410 13:53:39.788030 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3411 13:53:39.788196 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3412 13:53:39.788403 # ok 1685 Set SVE VL 6736
3413 13:53:39.788609 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3414 13:53:39.788802 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3415 13:53:39.789001 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3416 13:53:39.789175 # ok 1689 Set SVE VL 6752
3417 13:53:39.789328 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3418 13:53:39.789511 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3419 13:53:39.789655 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3420 13:53:39.789815 # ok 1693 Set SVE VL 6768
3421 13:53:39.789968 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3422 13:53:39.790106 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3423 13:53:39.790223 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3424 13:53:39.790325 # ok 1697 Set SVE VL 6784
3425 13:53:39.790403 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3426 13:53:39.790506 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3427 13:53:39.790598 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3428 13:53:39.790674 # ok 1701 Set SVE VL 6800
3429 13:53:39.790749 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3430 13:53:39.790832 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3431 13:53:39.790923 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3432 13:53:39.791012 # ok 1705 Set SVE VL 6816
3433 13:53:39.791339 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3434 13:53:39.791439 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3435 13:53:39.791513 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3436 13:53:39.791664 # ok 1709 Set SVE VL 6832
3437 13:53:39.791762 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3438 13:53:39.791853 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3439 13:53:39.791922 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3440 13:53:39.792014 # ok 1713 Set SVE VL 6848
3441 13:53:39.792079 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3442 13:53:39.792181 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3443 13:53:39.792499 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3444 13:53:39.792620 # ok 1717 Set SVE VL 6864
3445 13:53:39.792697 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3446 13:53:39.792772 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3447 13:53:39.792852 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3448 13:53:39.792938 # ok 1721 Set SVE VL 6880
3449 13:53:39.793230 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3450 13:53:39.793329 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3451 13:53:39.793436 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3452 13:53:39.793535 # ok 1725 Set SVE VL 6896
3453 13:53:39.793627 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3454 13:53:39.793797 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3455 13:53:39.793901 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3456 13:53:39.793992 # ok 1729 Set SVE VL 6912
3457 13:53:39.794116 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3458 13:53:39.794217 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3459 13:53:39.794310 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3460 13:53:39.794397 # ok 1733 Set SVE VL 6928
3461 13:53:39.794486 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3462 13:53:39.794589 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3463 13:53:39.794689 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3464 13:53:39.794781 # ok 1737 Set SVE VL 6944
3465 13:53:39.794906 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3466 13:53:39.794997 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3467 13:53:39.795080 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3468 13:53:39.795177 # ok 1741 Set SVE VL 6960
3469 13:53:39.795278 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3470 13:53:39.795379 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3471 13:53:39.795494 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3472 13:53:39.795602 # ok 1745 Set SVE VL 6976
3473 13:53:39.795696 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3474 13:53:39.795791 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3475 13:53:39.795917 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3476 13:53:39.795998 # ok 1749 Set SVE VL 6992
3477 13:53:39.796105 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3478 13:53:39.796648 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3479 13:53:39.796754 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3480 13:53:39.796868 # ok 1753 Set SVE VL 7008
3481 13:53:39.796967 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3482 13:53:39.797069 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3483 13:53:39.797156 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3484 13:53:39.797265 # ok 1757 Set SVE VL 7024
3485 13:53:39.797364 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3486 13:53:39.797473 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3487 13:53:39.797573 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3488 13:53:39.797696 # ok 1761 Set SVE VL 7040
3489 13:53:39.797791 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3490 13:53:39.797884 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3491 13:53:39.797957 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3492 13:53:39.798051 # ok 1765 Set SVE VL 7056
3493 13:53:39.798378 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3494 13:53:39.798482 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3495 13:53:39.798584 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3496 13:53:39.798669 # ok 1769 Set SVE VL 7072
3497 13:53:39.798784 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3498 13:53:39.798884 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3499 13:53:39.798983 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3500 13:53:39.800663 # ok 1773 Set SVE VL 7088
3501 13:53:39.800756 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3502 13:53:39.800854 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3503 13:53:39.801121 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3504 13:53:39.801189 # ok 1777 Set SVE VL 7104
3505 13:53:39.801466 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3506 13:53:39.801546 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3507 13:53:39.801637 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3508 13:53:39.801753 # ok 1781 Set SVE VL 7120
3509 13:53:39.801878 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3510 13:53:39.801975 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3511 13:53:39.802060 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3512 13:53:39.802145 # ok 1785 Set SVE VL 7136
3513 13:53:39.802224 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3514 13:53:39.802308 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3515 13:53:39.802420 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3516 13:53:39.802515 # ok 1789 Set SVE VL 7152
3517 13:53:39.802599 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3518 13:53:39.802717 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3519 13:53:39.802804 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3520 13:53:39.802903 # ok 1793 Set SVE VL 7168
3521 13:53:39.803000 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3522 13:53:39.803066 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3523 13:53:39.803143 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3524 13:53:39.803223 # ok 1797 Set SVE VL 7184
3525 13:53:39.803517 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3526 13:53:39.803615 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3527 13:53:39.803703 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3528 13:53:39.803805 # ok 1801 Set SVE VL 7200
3529 13:53:39.803903 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3530 13:53:39.804004 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3531 13:53:39.804115 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3532 13:53:39.804210 # ok 1805 Set SVE VL 7216
3533 13:53:39.804311 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3534 13:53:39.804441 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3535 13:53:39.804536 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3536 13:53:39.804618 # ok 1809 Set SVE VL 7232
3537 13:53:39.804713 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3538 13:53:39.804791 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3539 13:53:39.804881 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3540 13:53:39.804974 # ok 1813 Set SVE VL 7248
3541 13:53:39.805063 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3542 13:53:39.805163 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3543 13:53:39.805471 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3544 13:53:39.805596 # ok 1817 Set SVE VL 7264
3545 13:53:39.805696 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3546 13:53:39.805798 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3547 13:53:39.805927 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3548 13:53:39.806384 # ok 1821 Set SVE VL 7280
3549 13:53:39.806480 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3550 13:53:39.806550 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3551 13:53:39.807083 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3552 13:53:39.807172 # ok 1825 Set SVE VL 7296
3553 13:53:39.807239 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3554 13:53:39.807315 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3555 13:53:39.807573 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3556 13:53:39.807646 # ok 1829 Set SVE VL 7312
3557 13:53:39.807940 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3558 13:53:39.808019 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3559 13:53:39.808312 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3560 13:53:39.808446 # ok 1833 Set SVE VL 7328
3561 13:53:39.808551 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3562 13:53:39.808661 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3563 13:53:39.808774 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3564 13:53:39.808876 # ok 1837 Set SVE VL 7344
3565 13:53:39.808992 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3566 13:53:39.809287 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3567 13:53:39.809389 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3568 13:53:39.809466 # ok 1841 Set SVE VL 7360
3569 13:53:39.809555 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3570 13:53:39.809859 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3571 13:53:39.810194 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3572 13:53:39.810302 # ok 1845 Set SVE VL 7376
3573 13:53:39.810401 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3574 13:53:39.810520 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3575 13:53:39.810611 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3576 13:53:39.810702 # ok 1849 Set SVE VL 7392
3577 13:53:39.810779 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3578 13:53:39.810855 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3579 13:53:39.810944 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3580 13:53:39.811023 # ok 1853 Set SVE VL 7408
3581 13:53:39.811117 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3582 13:53:39.811397 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3583 13:53:39.811518 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3584 13:53:39.811817 # ok 1857 Set SVE VL 7424
3585 13:53:39.811925 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3586 13:53:39.812047 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3587 13:53:39.812148 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3588 13:53:39.812281 # ok 1861 Set SVE VL 7440
3589 13:53:39.812378 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3590 13:53:39.812492 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3591 13:53:39.812602 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3592 13:53:39.812889 # ok 1865 Set SVE VL 7456
3593 13:53:39.812990 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3594 13:53:39.813090 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3595 13:53:39.813188 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3596 13:53:39.813287 # ok 1869 Set SVE VL 7472
3597 13:53:39.813385 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3598 13:53:39.813880 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3599 13:53:39.813981 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3600 13:53:39.814069 # ok 1873 Set SVE VL 7488
3601 13:53:39.814155 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3602 13:53:39.814239 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3603 13:53:39.814339 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3604 13:53:39.814563 # ok 1877 Set SVE VL 7504
3605 13:53:39.814674 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3606 13:53:39.814778 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3607 13:53:39.815288 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3608 13:53:39.816967 # ok 1881 Set SVE VL 7520
3609 13:53:39.817064 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3610 13:53:39.817171 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3611 13:53:39.817261 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3612 13:53:39.817347 # ok 1885 Set SVE VL 7536
3613 13:53:39.817432 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3614 13:53:39.817519 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3615 13:53:39.817603 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3616 13:53:39.817696 # ok 1889 Set SVE VL 7552
3617 13:53:39.817781 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3618 13:53:39.817866 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3619 13:53:39.817952 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3620 13:53:39.818056 # ok 1893 Set SVE VL 7568
3621 13:53:39.818149 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3622 13:53:39.818237 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3623 13:53:39.818323 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3624 13:53:39.818409 # ok 1897 Set SVE VL 7584
3625 13:53:39.818493 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3626 13:53:39.818579 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3627 13:53:39.818682 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3628 13:53:39.818771 # ok 1901 Set SVE VL 7600
3629 13:53:39.818857 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3630 13:53:39.818941 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3631 13:53:39.819558 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3632 13:53:39.819664 # ok 1905 Set SVE VL 7616
3633 13:53:39.819752 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3634 13:53:39.819841 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3635 13:53:39.819926 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3636 13:53:39.820009 # ok 1909 Set SVE VL 7632
3637 13:53:39.820093 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3638 13:53:39.821857 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3639 13:53:39.821983 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3640 13:53:39.822083 # ok 1913 Set SVE VL 7648
3641 13:53:39.822177 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3642 13:53:39.822297 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3643 13:53:39.822417 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3644 13:53:39.822499 # ok 1917 Set SVE VL 7664
3645 13:53:39.822563 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3646 13:53:39.822627 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3647 13:53:39.822715 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3648 13:53:39.822792 # ok 1921 Set SVE VL 7680
3649 13:53:39.822885 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3650 13:53:39.822957 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3651 13:53:39.823019 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3652 13:53:39.823081 # ok 1925 Set SVE VL 7696
3653 13:53:39.823146 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3654 13:53:39.823242 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3655 13:53:39.823329 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3656 13:53:39.823714 # ok 1929 Set SVE VL 7712
3657 13:53:39.823925 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3658 13:53:39.824005 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3659 13:53:39.824084 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3660 13:53:39.824190 # ok 1933 Set SVE VL 7728
3661 13:53:39.824272 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3662 13:53:39.824342 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3663 13:53:39.824405 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3664 13:53:39.824499 # ok 1937 Set SVE VL 7744
3665 13:53:39.824580 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3666 13:53:39.824643 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3667 13:53:39.824706 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3668 13:53:39.824767 # ok 1941 Set SVE VL 7760
3669 13:53:39.824853 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3670 13:53:39.825783 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3671 13:53:39.826003 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3672 13:53:39.826098 # ok 1945 Set SVE VL 7776
3673 13:53:39.826189 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3674 13:53:39.826284 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3675 13:53:39.826373 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3676 13:53:39.826460 # ok 1949 Set SVE VL 7792
3677 13:53:39.826546 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3678 13:53:39.826632 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3679 13:53:39.826734 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3680 13:53:39.826820 # ok 1953 Set SVE VL 7808
3681 13:53:39.826910 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3682 13:53:39.826998 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3683 13:53:39.828298 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3684 13:53:39.828833 # ok 1957 Set SVE VL 7824
3685 13:53:39.828940 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3686 13:53:39.829032 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3687 13:53:39.829123 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3688 13:53:39.829230 # ok 1961 Set SVE VL 7840
3689 13:53:39.829320 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3690 13:53:39.829422 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3691 13:53:39.829531 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3692 13:53:39.829623 # ok 1965 Set SVE VL 7856
3693 13:53:39.829720 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3694 13:53:39.829823 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3695 13:53:39.829926 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3696 13:53:39.830033 # ok 1969 Set SVE VL 7872
3697 13:53:39.830124 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3698 13:53:39.830672 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3699 13:53:39.831059 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3700 13:53:39.831202 # ok 1973 Set SVE VL 7888
3701 13:53:39.831359 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3702 13:53:39.831671 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3703 13:53:39.831775 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3704 13:53:39.831865 # ok 1977 Set SVE VL 7904
3705 13:53:39.831954 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3706 13:53:39.832057 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3707 13:53:39.832151 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3708 13:53:39.832252 # ok 1981 Set SVE VL 7920
3709 13:53:39.832356 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3710 13:53:39.832448 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3711 13:53:39.832536 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3712 13:53:39.832959 # ok 1985 Set SVE VL 7936
3713 13:53:39.833075 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3714 13:53:39.833170 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3715 13:53:39.833262 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3716 13:53:39.833353 # ok 1989 Set SVE VL 7952
3717 13:53:39.833443 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3718 13:53:39.833549 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3719 13:53:39.833643 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3720 13:53:39.833990 # ok 1993 Set SVE VL 7968
3721 13:53:39.834137 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3722 13:53:39.834378 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3723 13:53:39.834497 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3724 13:53:39.834592 # ok 1997 Set SVE VL 7984
3725 13:53:39.834683 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3726 13:53:39.834774 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3727 13:53:39.834866 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3728 13:53:39.834955 # ok 2001 Set SVE VL 8000
3729 13:53:39.835061 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3730 13:53:39.835155 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3731 13:53:39.835260 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3732 13:53:39.835352 # ok 2005 Set SVE VL 8016
3733 13:53:39.835457 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3734 13:53:39.835549 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3735 13:53:39.835653 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3736 13:53:39.835749 # ok 2009 Set SVE VL 8032
3737 13:53:39.837278 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3738 13:53:39.837399 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3739 13:53:39.837490 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3740 13:53:39.837578 # ok 2013 Set SVE VL 8048
3741 13:53:39.837681 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3742 13:53:39.837769 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3743 13:53:39.837854 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3744 13:53:39.837939 # ok 2017 Set SVE VL 8064
3745 13:53:39.838024 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3746 13:53:39.838110 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3747 13:53:39.838194 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3748 13:53:39.838281 # ok 2021 Set SVE VL 8080
3749 13:53:39.838367 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3750 13:53:39.838661 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3751 13:53:39.838756 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3752 13:53:39.838843 # ok 2025 Set SVE VL 8096
3753 13:53:39.838929 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3754 13:53:39.839015 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3755 13:53:39.839099 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3756 13:53:39.839187 # ok 2029 Set SVE VL 8112
3757 13:53:39.839273 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3758 13:53:39.839365 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3759 13:53:39.839459 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3760 13:53:39.839574 # ok 2033 Set SVE VL 8128
3761 13:53:39.839667 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3762 13:53:39.839760 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3763 13:53:39.839856 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3764 13:53:39.839949 # ok 2037 Set SVE VL 8144
3765 13:53:39.840041 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3766 13:53:39.840134 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3767 13:53:39.840245 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3768 13:53:39.840338 # ok 2041 Set SVE VL 8160
3769 13:53:39.840431 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3770 13:53:39.840523 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3771 13:53:39.840616 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3772 13:53:39.840709 # ok 2045 Set SVE VL 8176
3773 13:53:39.840819 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3774 13:53:39.840913 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3775 13:53:39.841005 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3776 13:53:39.841098 # ok 2049 Set SVE VL 8192
3777 13:53:39.841209 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3778 13:53:39.841304 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3779 13:53:39.841412 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3780 13:53:39.841522 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3781 13:53:39.841632 # ok 2054 Streaming SVE get_fpsimd() gave same state
3782 13:53:39.841762 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3783 13:53:39.842088 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3784 13:53:39.842222 # ok 2057 Set Streaming SVE VL 16
3785 13:53:39.842332 # ok 2058 Set and get Streaming SVE data for VL 16
3786 13:53:39.842621 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3787 13:53:39.842733 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3788 13:53:39.842842 # ok 2061 Set Streaming SVE VL 32
3789 13:53:39.842951 # ok 2062 Set and get Streaming SVE data for VL 32
3790 13:53:39.843259 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3791 13:53:39.843357 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3792 13:53:39.843465 # ok 2065 Set Streaming SVE VL 48
3793 13:53:39.843891 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3794 13:53:39.844027 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3795 13:53:39.844121 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3796 13:53:39.844230 # ok 2069 Set Streaming SVE VL 64
3797 13:53:39.845298 # ok 2070 Set and get Streaming SVE data for VL 64
3798 13:53:39.845455 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3799 13:53:39.845636 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3800 13:53:39.845830 # ok 2073 Set Streaming SVE VL 80
3801 13:53:39.845977 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3802 13:53:39.846122 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3803 13:53:39.846258 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3804 13:53:39.846361 # ok 2077 Set Streaming SVE VL 96
3805 13:53:39.846656 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3806 13:53:39.846756 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3807 13:53:39.846850 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3808 13:53:39.846958 # ok 2081 Set Streaming SVE VL 112
3809 13:53:39.847050 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3810 13:53:39.847142 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3811 13:53:39.847234 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3812 13:53:39.847326 # ok 2085 Set Streaming SVE VL 128
3813 13:53:39.847437 # ok 2086 Set and get Streaming SVE data for VL 128
3814 13:53:39.847532 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3815 13:53:39.847625 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3816 13:53:39.847743 # ok 2089 Set Streaming SVE VL 144
3817 13:53:39.847839 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3818 13:53:39.847948 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3819 13:53:39.848058 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3820 13:53:39.848154 # ok 2093 Set Streaming SVE VL 160
3821 13:53:39.848266 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3822 13:53:39.848636 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3823 13:53:39.848794 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3824 13:53:39.848955 # ok 2097 Set Streaming SVE VL 176
3825 13:53:39.849125 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3826 13:53:39.849286 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3827 13:53:39.849435 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3828 13:53:39.849605 # ok 2101 Set Streaming SVE VL 192
3829 13:53:39.849777 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3830 13:53:39.849891 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3831 13:53:39.850006 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3832 13:53:39.850105 # ok 2105 Set Streaming SVE VL 208
3833 13:53:39.850409 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3834 13:53:39.850506 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3835 13:53:39.850783 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3836 13:53:39.850896 # ok 2109 Set Streaming SVE VL 224
3837 13:53:39.850975 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3838 13:53:39.851605 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3839 13:53:39.851773 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3840 13:53:39.851871 # ok 2113 Set Streaming SVE VL 240
3841 13:53:39.851949 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3842 13:53:39.852022 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3843 13:53:39.852320 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3844 13:53:39.852419 # ok 2117 Set Streaming SVE VL 256
3845 13:53:39.852506 # ok 2118 Set and get Streaming SVE data for VL 256
3846 13:53:39.852592 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3847 13:53:39.852680 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3848 13:53:39.852766 # ok 2121 Set Streaming SVE VL 272
3849 13:53:39.852848 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3850 13:53:39.852923 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3851 13:53:39.853000 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3852 13:53:39.853078 # ok 2125 Set Streaming SVE VL 288
3853 13:53:39.854902 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3854 13:53:39.855127 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3855 13:53:39.855289 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3856 13:53:39.855388 # ok 2129 Set Streaming SVE VL 304
3857 13:53:39.855481 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3858 13:53:39.855568 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3859 13:53:39.855672 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3860 13:53:39.855765 # ok 2133 Set Streaming SVE VL 320
3861 13:53:39.855870 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3862 13:53:39.855959 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3863 13:53:39.856061 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3864 13:53:39.856673 # ok 2137 Set Streaming SVE VL 336
3865 13:53:39.856893 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3866 13:53:39.857050 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3867 13:53:39.857231 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3868 13:53:39.857377 # ok 2141 Set Streaming SVE VL 352
3869 13:53:39.857479 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3870 13:53:39.857571 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3871 13:53:39.857881 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3872 13:53:39.857989 # ok 2145 Set Streaming SVE VL 368
3873 13:53:39.858082 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3874 13:53:39.858173 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3875 13:53:39.858269 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3876 13:53:39.858360 # ok 2149 Set Streaming SVE VL 384
3877 13:53:39.858450 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3878 13:53:39.858557 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3879 13:53:39.858857 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3880 13:53:39.858965 # ok 2153 Set Streaming SVE VL 400
3881 13:53:39.859073 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3882 13:53:39.859371 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3883 13:53:39.859483 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3884 13:53:39.859590 # ok 2157 Set Streaming SVE VL 416
3885 13:53:39.859877 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3886 13:53:39.859988 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3887 13:53:39.860275 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3888 13:53:39.860386 # ok 2161 Set Streaming SVE VL 432
3889 13:53:39.860494 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3890 13:53:39.860791 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3891 13:53:39.861189 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3892 13:53:39.861295 # ok 2165 Set Streaming SVE VL 448
3893 13:53:39.861388 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3894 13:53:39.861478 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3895 13:53:39.861907 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3896 13:53:39.862060 # ok 2169 Set Streaming SVE VL 464
3897 13:53:39.862161 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3898 13:53:39.862257 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3899 13:53:39.862374 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3900 13:53:39.862469 # ok 2173 Set Streaming SVE VL 480
3901 13:53:39.862560 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3902 13:53:39.862660 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3903 13:53:39.862739 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3904 13:53:39.862823 # ok 2177 Set Streaming SVE VL 496
3905 13:53:39.863082 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3906 13:53:39.863253 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3907 13:53:39.863412 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3908 13:53:39.863549 # ok 2181 Set Streaming SVE VL 512
3909 13:53:39.863871 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3910 13:53:39.863963 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3911 13:53:39.864068 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3912 13:53:39.864163 # ok 2185 Set Streaming SVE VL 528
3913 13:53:39.864253 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3914 13:53:39.864385 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3915 13:53:39.864517 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3916 13:53:39.864849 # ok 2189 Set Streaming SVE VL 544
3917 13:53:39.865006 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3918 13:53:39.865133 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3919 13:53:39.865262 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3920 13:53:39.865389 # ok 2193 Set Streaming SVE VL 560
3921 13:53:39.865850 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3922 13:53:39.866209 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3923 13:53:39.866303 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3924 13:53:39.866379 # ok 2197 Set Streaming SVE VL 576
3925 13:53:39.866520 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3926 13:53:39.866611 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3927 13:53:39.866713 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3928 13:53:39.867013 # ok 2201 Set Streaming SVE VL 592
3929 13:53:39.867118 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3930 13:53:39.867201 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3931 13:53:39.867276 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3932 13:53:39.867351 # ok 2205 Set Streaming SVE VL 608
3933 13:53:39.867618 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3934 13:53:39.867711 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3935 13:53:39.867789 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3936 13:53:39.868059 # ok 2209 Set Streaming SVE VL 624
3937 13:53:39.868155 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3938 13:53:39.868455 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3939 13:53:39.868557 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3940 13:53:39.868972 # ok 2213 Set Streaming SVE VL 640
3941 13:53:39.869083 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3942 13:53:39.869184 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3943 13:53:39.869289 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3944 13:53:39.869395 # ok 2217 Set Streaming SVE VL 656
3945 13:53:39.869860 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3946 13:53:39.869946 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3947 13:53:39.870011 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3948 13:53:39.870071 # ok 2221 Set Streaming SVE VL 672
3949 13:53:39.870131 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3950 13:53:39.870191 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3951 13:53:39.870254 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3952 13:53:39.870512 # ok 2225 Set Streaming SVE VL 688
3953 13:53:39.870629 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3954 13:53:39.870713 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3955 13:53:39.870787 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3956 13:53:39.870862 # ok 2229 Set Streaming SVE VL 704
3957 13:53:39.870952 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3958 13:53:39.871030 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3959 13:53:39.871108 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3960 13:53:39.871208 # ok 2233 Set Streaming SVE VL 720
3961 13:53:39.871307 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3962 13:53:39.871396 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3963 13:53:39.871494 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3964 13:53:39.871588 # ok 2237 Set Streaming SVE VL 736
3965 13:53:39.871868 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3966 13:53:39.871973 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3967 13:53:39.872085 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3968 13:53:39.872200 # ok 2241 Set Streaming SVE VL 752
3969 13:53:39.872302 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3970 13:53:39.872589 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3971 13:53:39.872689 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3972 13:53:39.872785 # ok 2245 Set Streaming SVE VL 768
3973 13:53:39.872870 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3974 13:53:39.872957 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3975 13:53:39.873070 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3976 13:53:39.873356 # ok 2249 Set Streaming SVE VL 784
3977 13:53:39.873481 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3978 13:53:39.873583 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3979 13:53:39.873692 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3980 13:53:39.873773 # ok 2253 Set Streaming SVE VL 800
3981 13:53:39.873868 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3982 13:53:39.873983 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3983 13:53:39.874262 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3984 13:53:39.874384 # ok 2257 Set Streaming SVE VL 816
3985 13:53:39.874496 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3986 13:53:39.874588 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3987 13:53:39.874686 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3988 13:53:39.874786 # ok 2261 Set Streaming SVE VL 832
3989 13:53:39.874885 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3990 13:53:39.874966 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3991 13:53:39.875061 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3992 13:53:39.875157 # ok 2265 Set Streaming SVE VL 848
3993 13:53:39.875256 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3994 13:53:39.875351 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3995 13:53:39.875712 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3996 13:53:39.875863 # ok 2269 Set Streaming SVE VL 864
3997 13:53:39.875970 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
3998 13:53:39.876059 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
3999 13:53:39.876148 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4000 13:53:39.876254 # ok 2273 Set Streaming SVE VL 880
4001 13:53:39.876360 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4002 13:53:39.876463 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4003 13:53:39.876566 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4004 13:53:39.876668 # ok 2277 Set Streaming SVE VL 896
4005 13:53:39.876987 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4006 13:53:39.879682 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4007 13:53:39.879811 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4008 13:53:39.880003 # ok 2281 Set Streaming SVE VL 912
4009 13:53:39.882025 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4010 13:53:39.882119 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4011 13:53:39.882187 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4012 13:53:39.882248 # ok 2285 Set Streaming SVE VL 928
4013 13:53:39.882307 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4014 13:53:39.882373 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4015 13:53:39.882433 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4016 13:53:39.882493 # ok 2289 Set Streaming SVE VL 944
4017 13:53:39.882553 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4018 13:53:39.882613 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4019 13:53:39.882674 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4020 13:53:39.882739 # ok 2293 Set Streaming SVE VL 960
4021 13:53:39.882800 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4022 13:53:39.882869 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4023 13:53:39.883135 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4024 13:53:39.883221 # ok 2297 Set Streaming SVE VL 976
4025 13:53:39.883289 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4026 13:53:39.883368 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4027 13:53:39.883619 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4028 13:53:39.883688 # ok 2301 Set Streaming SVE VL 992
4029 13:53:39.883763 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4030 13:53:39.884015 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4031 13:53:39.884105 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4032 13:53:39.884359 # ok 2305 Set Streaming SVE VL 1008
4033 13:53:39.884440 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4034 13:53:39.884697 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4035 13:53:39.884777 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4036 13:53:39.885030 # ok 2309 Set Streaming SVE VL 1024
4037 13:53:39.885291 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4038 13:53:39.885372 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4039 13:53:39.885625 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4040 13:53:39.885715 # ok 2313 Set Streaming SVE VL 1040
4041 13:53:39.885798 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4042 13:53:39.886052 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4043 13:53:39.886473 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4044 13:53:39.886553 # ok 2317 Set Streaming SVE VL 1056
4045 13:53:39.886799 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4046 13:53:39.886881 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4047 13:53:39.887134 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4048 13:53:39.887216 # ok 2321 Set Streaming SVE VL 1072
4049 13:53:39.887492 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4050 13:53:39.887599 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4051 13:53:39.887708 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4052 13:53:39.887797 # ok 2325 Set Streaming SVE VL 1088
4053 13:53:39.888064 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4054 13:53:39.888136 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4055 13:53:39.888238 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4056 13:53:39.888363 # ok 2329 Set Streaming SVE VL 1104
4057 13:53:39.889137 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4058 13:53:39.889242 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4059 13:53:39.889330 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4060 13:53:39.889437 # ok 2333 Set Streaming SVE VL 1120
4061 13:53:39.889544 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4062 13:53:39.889627 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4063 13:53:39.889738 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4064 13:53:39.889838 # ok 2337 Set Streaming SVE VL 1136
4065 13:53:39.889962 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4066 13:53:39.890051 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4067 13:53:39.890608 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4068 13:53:39.890697 # ok 2341 Set Streaming SVE VL 1152
4069 13:53:39.890807 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4070 13:53:39.890943 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4071 13:53:39.891041 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4072 13:53:39.891140 # ok 2345 Set Streaming SVE VL 1168
4073 13:53:39.891246 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4074 13:53:39.891334 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4075 13:53:39.891426 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4076 13:53:39.891508 # ok 2349 Set Streaming SVE VL 1184
4077 13:53:39.891776 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4078 13:53:39.891862 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4079 13:53:39.891943 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4080 13:53:39.892231 # ok 2353 Set Streaming SVE VL 1200
4081 13:53:39.892339 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4082 13:53:39.892455 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4083 13:53:39.892551 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4084 13:53:39.892657 # ok 2357 Set Streaming SVE VL 1216
4085 13:53:39.892756 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4086 13:53:39.893036 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4087 13:53:39.893365 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4088 13:53:39.893470 # ok 2361 Set Streaming SVE VL 1232
4089 13:53:39.893559 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4090 13:53:39.893661 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4091 13:53:39.893767 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4092 13:53:39.893857 # ok 2365 Set Streaming SVE VL 1248
4093 13:53:39.893948 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4094 13:53:39.894024 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4095 13:53:39.894130 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4096 13:53:39.894236 # ok 2369 Set Streaming SVE VL 1264
4097 13:53:39.894530 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4098 13:53:39.894635 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4099 13:53:39.894734 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4100 13:53:39.894820 # ok 2373 Set Streaming SVE VL 1280
4101 13:53:39.894915 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4102 13:53:39.895000 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4103 13:53:39.895104 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4104 13:53:39.895207 # ok 2377 Set Streaming SVE VL 1296
4105 13:53:39.895303 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4106 13:53:39.895596 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4107 13:53:39.895711 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4108 13:53:39.895840 # ok 2381 Set Streaming SVE VL 1312
4109 13:53:39.895959 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4110 13:53:39.896079 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4111 13:53:39.896206 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4112 13:53:39.896572 # ok 2385 Set Streaming SVE VL 1328
4113 13:53:39.896673 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4114 13:53:39.896765 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4115 13:53:39.896853 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4116 13:53:39.896930 # ok 2389 Set Streaming SVE VL 1344
4117 13:53:39.897030 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4118 13:53:39.897163 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4119 13:53:39.897474 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4120 13:53:39.897633 # ok 2393 Set Streaming SVE VL 1360
4121 13:53:39.897856 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4122 13:53:39.897955 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4123 13:53:39.898070 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4124 13:53:39.898167 # ok 2397 Set Streaming SVE VL 1376
4125 13:53:39.898254 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4126 13:53:39.898348 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4127 13:53:39.898447 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4128 13:53:39.898554 # ok 2401 Set Streaming SVE VL 1392
4129 13:53:39.898654 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4130 13:53:39.898928 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4131 13:53:39.899037 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4132 13:53:39.899135 # ok 2405 Set Streaming SVE VL 1408
4133 13:53:39.899244 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4134 13:53:39.899437 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4135 13:53:39.899552 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4136 13:53:39.899686 # ok 2409 Set Streaming SVE VL 1424
4137 13:53:39.900032 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4138 13:53:39.900149 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4139 13:53:39.900261 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4140 13:53:39.900345 # ok 2413 Set Streaming SVE VL 1440
4141 13:53:39.900454 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4142 13:53:39.900596 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4143 13:53:39.900733 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4144 13:53:39.900849 # ok 2417 Set Streaming SVE VL 1456
4145 13:53:39.900981 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4146 13:53:39.901089 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4147 13:53:39.901411 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4148 13:53:39.901547 # ok 2421 Set Streaming SVE VL 1472
4149 13:53:39.901660 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4150 13:53:39.901756 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4151 13:53:39.901857 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4152 13:53:39.901954 # ok 2425 Set Streaming SVE VL 1488
4153 13:53:39.902271 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4154 13:53:39.902374 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4155 13:53:39.902440 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4156 13:53:39.904595 # ok 2429 Set Streaming SVE VL 1504
4157 13:53:39.904752 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4158 13:53:39.904863 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4159 13:53:39.904961 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4160 13:53:39.905065 # ok 2433 Set Streaming SVE VL 1520
4161 13:53:39.905193 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4162 13:53:39.905300 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4163 13:53:39.905589 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4164 13:53:39.905706 # ok 2437 Set Streaming SVE VL 1536
4165 13:53:39.905811 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4166 13:53:39.905893 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4167 13:53:39.906167 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4168 13:53:39.906493 # ok 2441 Set Streaming SVE VL 1552
4169 13:53:39.906607 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4170 13:53:39.906692 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4171 13:53:39.906974 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4172 13:53:39.907130 # ok 2445 Set Streaming SVE VL 1568
4173 13:53:39.907253 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4174 13:53:39.907353 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4175 13:53:39.907446 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4176 13:53:39.907559 # ok 2449 Set Streaming SVE VL 1584
4177 13:53:39.907665 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4178 13:53:39.907956 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4179 13:53:39.908069 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4180 13:53:39.908173 # ok 2453 Set Streaming SVE VL 1600
4181 13:53:39.908306 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4182 13:53:39.908412 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4183 13:53:39.908545 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4184 13:53:39.908667 # ok 2457 Set Streaming SVE VL 1616
4185 13:53:39.909029 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4186 13:53:39.909167 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4187 13:53:39.909382 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4188 13:53:39.909613 # ok 2461 Set Streaming SVE VL 1632
4189 13:53:39.909762 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4190 13:53:39.909873 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4191 13:53:39.910188 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4192 13:53:39.910332 # ok 2465 Set Streaming SVE VL 1648
4193 13:53:39.910442 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4194 13:53:39.910551 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4195 13:53:39.910648 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4196 13:53:39.910753 # ok 2469 Set Streaming SVE VL 1664
4197 13:53:39.910880 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4198 13:53:39.911000 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4199 13:53:39.911135 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4200 13:53:39.911275 # ok 2473 Set Streaming SVE VL 1680
4201 13:53:39.911403 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4202 13:53:39.911513 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4203 13:53:39.911626 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4204 13:53:39.911754 # ok 2477 Set Streaming SVE VL 1696
4205 13:53:39.911879 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4206 13:53:39.911979 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4207 13:53:39.912094 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4208 13:53:39.912208 # ok 2481 Set Streaming SVE VL 1712
4209 13:53:39.912348 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4210 13:53:39.912467 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4211 13:53:39.912588 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4212 13:53:39.912688 # ok 2485 Set Streaming SVE VL 1728
4213 13:53:39.913280 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4214 13:53:39.913392 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4215 13:53:39.913509 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4216 13:53:39.913607 # ok 2489 Set Streaming SVE VL 1744
4217 13:53:39.913711 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4218 13:53:39.913808 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4219 13:53:39.913926 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4220 13:53:39.914032 # ok 2493 Set Streaming SVE VL 1760
4221 13:53:39.914127 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4222 13:53:39.914465 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4223 13:53:39.914560 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4224 13:53:39.914671 # ok 2497 Set Streaming SVE VL 1776
4225 13:53:39.916122 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4226 13:53:39.916222 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4227 13:53:39.916299 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4228 13:53:39.916386 # ok 2501 Set Streaming SVE VL 1792
4229 13:53:39.916479 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4230 13:53:39.916567 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4231 13:53:39.916673 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4232 13:53:39.916775 # ok 2505 Set Streaming SVE VL 1808
4233 13:53:39.916871 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4234 13:53:39.916961 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4235 13:53:39.917048 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4236 13:53:39.917336 # ok 2509 Set Streaming SVE VL 1824
4237 13:53:39.917443 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4238 13:53:39.917535 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4239 13:53:39.917616 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4240 13:53:39.917726 # ok 2513 Set Streaming SVE VL 1840
4241 13:53:39.917833 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4242 13:53:39.917919 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4243 13:53:39.918016 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4244 13:53:39.918097 # ok 2517 Set Streaming SVE VL 1856
4245 13:53:39.918164 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4246 13:53:39.918243 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4247 13:53:39.918330 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4248 13:53:39.918432 # ok 2521 Set Streaming SVE VL 1872
4249 13:53:39.918517 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4250 13:53:39.918611 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4251 13:53:39.918911 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4252 13:53:39.919031 # ok 2525 Set Streaming SVE VL 1888
4253 13:53:39.919332 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4254 13:53:39.919467 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4255 13:53:39.919621 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4256 13:53:39.919710 # ok 2529 Set Streaming SVE VL 1904
4257 13:53:39.919808 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4258 13:53:39.919920 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4259 13:53:39.920030 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4260 13:53:39.920125 # ok 2533 Set Streaming SVE VL 1920
4261 13:53:39.920416 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4262 13:53:39.920530 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4263 13:53:39.920628 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4264 13:53:39.920837 # ok 2537 Set Streaming SVE VL 1936
4265 13:53:39.920959 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4266 13:53:39.921300 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4267 13:53:39.921427 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4268 13:53:39.921545 # ok 2541 Set Streaming SVE VL 1952
4269 13:53:39.921883 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4270 13:53:39.921992 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4271 13:53:39.922123 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4272 13:53:39.922418 # ok 2545 Set Streaming SVE VL 1968
4273 13:53:39.922517 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4274 13:53:39.922634 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4275 13:53:39.922717 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4276 13:53:39.922794 # ok 2549 Set Streaming SVE VL 1984
4277 13:53:39.922875 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4278 13:53:39.923144 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4279 13:53:39.923441 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4280 13:53:39.923540 # ok 2553 Set Streaming SVE VL 2000
4281 13:53:39.923621 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4282 13:53:39.923698 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4283 13:53:39.923996 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4284 13:53:39.924122 # ok 2557 Set Streaming SVE VL 2016
4285 13:53:39.924216 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4286 13:53:39.924310 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4287 13:53:39.924597 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4288 13:53:39.924690 # ok 2561 Set Streaming SVE VL 2032
4289 13:53:39.924776 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4290 13:53:39.924909 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4291 13:53:39.925026 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4292 13:53:39.925122 # ok 2565 Set Streaming SVE VL 2048
4293 13:53:39.925251 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4294 13:53:39.925361 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4295 13:53:39.925719 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4296 13:53:39.925827 # ok 2569 Set Streaming SVE VL 2064
4297 13:53:39.925929 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4298 13:53:39.926045 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4299 13:53:39.926135 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4300 13:53:39.926355 # ok 2573 Set Streaming SVE VL 2080
4301 13:53:39.926463 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4302 13:53:39.926549 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4303 13:53:39.926639 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4304 13:53:39.926704 # ok 2577 Set Streaming SVE VL 2096
4305 13:53:39.926764 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4306 13:53:39.928879 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4307 13:53:39.929030 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4308 13:53:39.929131 # ok 2581 Set Streaming SVE VL 2112
4309 13:53:39.929539 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4310 13:53:39.929675 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4311 13:53:39.929831 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4312 13:53:39.929918 # ok 2585 Set Streaming SVE VL 2128
4313 13:53:39.930196 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4314 13:53:39.930312 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4315 13:53:39.930436 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4316 13:53:39.930542 # ok 2589 Set Streaming SVE VL 2144
4317 13:53:39.930645 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4318 13:53:39.930725 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4319 13:53:39.930815 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4320 13:53:39.930895 # ok 2593 Set Streaming SVE VL 2160
4321 13:53:39.930992 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4322 13:53:39.931089 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4323 13:53:39.931187 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4324 13:53:39.931462 # ok 2597 Set Streaming SVE VL 2176
4325 13:53:39.931561 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4326 13:53:39.931850 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4327 13:53:39.931951 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4328 13:53:39.932034 # ok 2601 Set Streaming SVE VL 2192
4329 13:53:39.932127 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4330 13:53:39.932209 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4331 13:53:39.932300 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4332 13:53:39.932382 # ok 2605 Set Streaming SVE VL 2208
4333 13:53:39.932468 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4334 13:53:39.932703 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4335 13:53:39.932821 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4336 13:53:39.932924 # ok 2609 Set Streaming SVE VL 2224
4337 13:53:39.933231 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4338 13:53:39.933339 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4339 13:53:39.933486 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4340 13:53:39.933576 # ok 2613 Set Streaming SVE VL 2240
4341 13:53:39.933719 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4342 13:53:39.933853 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4343 13:53:39.933944 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4344 13:53:39.934023 # ok 2617 Set Streaming SVE VL 2256
4345 13:53:39.934118 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4346 13:53:39.934188 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4347 13:53:39.934285 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4348 13:53:39.934412 # ok 2621 Set Streaming SVE VL 2272
4349 13:53:39.934531 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4350 13:53:39.934667 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4351 13:53:39.934799 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4352 13:53:39.934916 # ok 2625 Set Streaming SVE VL 2288
4353 13:53:39.935045 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4354 13:53:39.935150 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4355 13:53:39.935273 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4356 13:53:39.935372 # ok 2629 Set Streaming SVE VL 2304
4357 13:53:39.935504 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4358 13:53:39.935623 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4359 13:53:39.935743 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4360 13:53:39.935878 # ok 2633 Set Streaming SVE VL 2320
4361 13:53:39.935987 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4362 13:53:39.936123 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4363 13:53:39.936245 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4364 13:53:39.936368 # ok 2637 Set Streaming SVE VL 2336
4365 13:53:39.938292 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4366 13:53:39.938427 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4367 13:53:39.938528 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4368 13:53:39.938635 # ok 2641 Set Streaming SVE VL 2352
4369 13:53:39.938774 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4370 13:53:39.938873 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4371 13:53:39.938985 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4372 13:53:39.939078 # ok 2645 Set Streaming SVE VL 2368
4373 13:53:39.939174 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4374 13:53:39.939299 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4375 13:53:39.939413 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4376 13:53:39.939532 # ok 2649 Set Streaming SVE VL 2384
4377 13:53:39.939682 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4378 13:53:39.939786 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4379 13:53:39.939893 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4380 13:53:39.939989 # ok 2653 Set Streaming SVE VL 2400
4381 13:53:39.940091 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4382 13:53:39.940207 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4383 13:53:39.940315 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4384 13:53:39.940428 # ok 2657 Set Streaming SVE VL 2416
4385 13:53:39.940546 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4386 13:53:39.940672 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4387 13:53:39.940804 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4388 13:53:39.940915 # ok 2661 Set Streaming SVE VL 2432
4389 13:53:39.941009 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4390 13:53:39.941106 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4391 13:53:39.941205 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4392 13:53:39.941349 # ok 2665 Set Streaming SVE VL 2448
4393 13:53:39.941463 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4394 13:53:39.941576 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4395 13:53:39.942385 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4396 13:53:39.942498 # ok 2669 Set Streaming SVE VL 2464
4397 13:53:39.942614 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4398 13:53:39.942724 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4399 13:53:39.942823 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4400 13:53:39.943187 # ok 2673 Set Streaming SVE VL 2480
4401 13:53:39.943304 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4402 13:53:39.943425 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4403 13:53:39.943538 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4404 13:53:39.943645 # ok 2677 Set Streaming SVE VL 2496
4405 13:53:39.943749 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4406 13:53:39.943856 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4407 13:53:39.943965 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4408 13:53:39.944084 # ok 2681 Set Streaming SVE VL 2512
4409 13:53:39.944193 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4410 13:53:39.944303 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4411 13:53:39.944405 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4412 13:53:39.944494 # ok 2685 Set Streaming SVE VL 2528
4413 13:53:39.944609 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4414 13:53:39.944724 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4415 13:53:39.944827 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4416 13:53:39.944915 # ok 2689 Set Streaming SVE VL 2544
4417 13:53:39.945013 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4418 13:53:39.945131 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4419 13:53:39.945216 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4420 13:53:39.945281 # ok 2693 Set Streaming SVE VL 2560
4421 13:53:39.945343 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4422 13:53:39.945426 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4423 13:53:39.945509 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4424 13:53:39.945590 # ok 2697 Set Streaming SVE VL 2576
4425 13:53:39.945695 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4426 13:53:39.945799 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4427 13:53:39.945895 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4428 13:53:39.945990 # ok 2701 Set Streaming SVE VL 2592
4429 13:53:39.946084 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4430 13:53:39.946178 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4431 13:53:39.946277 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4432 13:53:39.946365 # ok 2705 Set Streaming SVE VL 2608
4433 13:53:39.946450 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4434 13:53:39.946548 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4435 13:53:39.946844 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4436 13:53:39.946944 # ok 2709 Set Streaming SVE VL 2624
4437 13:53:39.947031 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4438 13:53:39.947115 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4439 13:53:39.947196 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4440 13:53:39.947273 # ok 2713 Set Streaming SVE VL 2640
4441 13:53:39.947354 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4442 13:53:39.947430 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4443 13:53:39.947526 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4444 13:53:39.947647 # ok 2717 Set Streaming SVE VL 2656
4445 13:53:39.947749 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4446 13:53:39.947877 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4447 13:53:39.947960 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4448 13:53:39.948025 # ok 2721 Set Streaming SVE VL 2672
4449 13:53:39.948084 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4450 13:53:39.948145 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4451 13:53:39.948204 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4452 13:53:39.948263 # ok 2725 Set Streaming SVE VL 2688
4453 13:53:39.948337 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4454 13:53:39.948401 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4455 13:53:39.949332 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4456 13:53:39.949459 # ok 2729 Set Streaming SVE VL 2704
4457 13:53:39.949744 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4458 13:53:39.949835 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4459 13:53:39.949953 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4460 13:53:39.950048 # ok 2733 Set Streaming SVE VL 2720
4461 13:53:39.950134 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4462 13:53:39.950458 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4463 13:53:39.950738 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4464 13:53:39.950841 # ok 2737 Set Streaming SVE VL 2736
4465 13:53:39.950942 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4466 13:53:39.951050 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4467 13:53:39.951160 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4468 13:53:39.951475 # ok 2741 Set Streaming SVE VL 2752
4469 13:53:39.951568 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4470 13:53:39.951671 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4471 13:53:39.951956 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4472 13:53:39.952041 # ok 2745 Set Streaming SVE VL 2768
4473 13:53:39.952139 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4474 13:53:39.952230 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4475 13:53:39.952328 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4476 13:53:39.952450 # ok 2749 Set Streaming SVE VL 2784
4477 13:53:39.952569 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4478 13:53:39.952704 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4479 13:53:39.953018 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4480 13:53:39.953115 # ok 2753 Set Streaming SVE VL 2800
4481 13:53:39.953235 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4482 13:53:39.953355 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4483 13:53:39.953480 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4484 13:53:39.953609 # ok 2757 Set Streaming SVE VL 2816
4485 13:53:39.953744 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4486 13:53:39.954053 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4487 13:53:39.954352 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4488 13:53:39.954506 # ok 2761 Set Streaming SVE VL 2832
4489 13:53:39.954614 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4490 13:53:39.954895 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4491 13:53:39.954989 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4492 13:53:39.955085 # ok 2765 Set Streaming SVE VL 2848
4493 13:53:39.955181 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4494 13:53:39.955459 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4495 13:53:39.955591 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4496 13:53:39.955697 # ok 2769 Set Streaming SVE VL 2864
4497 13:53:39.955989 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4498 13:53:39.956103 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4499 13:53:39.956221 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4500 13:53:39.956328 # ok 2773 Set Streaming SVE VL 2880
4501 13:53:39.956454 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4502 13:53:39.956567 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4503 13:53:39.956667 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4504 13:53:39.956759 # ok 2777 Set Streaming SVE VL 2896
4505 13:53:39.957065 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4506 13:53:39.957199 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4507 13:53:39.957321 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4508 13:53:39.957416 # ok 2781 Set Streaming SVE VL 2912
4509 13:53:39.957499 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4510 13:53:39.957587 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4511 13:53:39.957674 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4512 13:53:39.957767 # ok 2785 Set Streaming SVE VL 2928
4513 13:53:39.957866 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4514 13:53:39.957961 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4515 13:53:39.958050 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4516 13:53:39.958339 # ok 2789 Set Streaming SVE VL 2944
4517 13:53:39.958440 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4518 13:53:39.958531 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4519 13:53:39.958631 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4520 13:53:39.958744 # ok 2793 Set Streaming SVE VL 2960
4521 13:53:39.958864 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4522 13:53:39.959173 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4523 13:53:39.959298 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4524 13:53:39.959420 # ok 2797 Set Streaming SVE VL 2976
4525 13:53:39.959775 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4526 13:53:39.959864 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4527 13:53:39.959931 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4528 13:53:39.959995 # ok 2801 Set Streaming SVE VL 2992
4529 13:53:39.960072 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4530 13:53:39.960151 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4531 13:53:39.960414 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4532 13:53:39.960490 # ok 2805 Set Streaming SVE VL 3008
4533 13:53:39.960567 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4534 13:53:39.960837 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4535 13:53:39.960923 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4536 13:53:39.961013 # ok 2809 Set Streaming SVE VL 3024
4537 13:53:39.961466 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4538 13:53:39.961556 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4539 13:53:39.961675 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4540 13:53:39.961788 # ok 2813 Set Streaming SVE VL 3040
4541 13:53:39.961865 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4542 13:53:39.962137 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4543 13:53:39.962443 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4544 13:53:39.962543 # ok 2817 Set Streaming SVE VL 3056
4545 13:53:39.962645 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4546 13:53:39.962744 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4547 13:53:39.962942 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4548 13:53:39.963053 # ok 2821 Set Streaming SVE VL 3072
4549 13:53:39.963130 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4550 13:53:39.963221 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4551 13:53:39.963312 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4552 13:53:39.963409 # ok 2825 Set Streaming SVE VL 3088
4553 13:53:39.963520 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4554 13:53:39.963629 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4555 13:53:39.963924 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4556 13:53:39.964039 # ok 2829 Set Streaming SVE VL 3104
4557 13:53:39.964161 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4558 13:53:39.964292 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4559 13:53:39.964427 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4560 13:53:39.964524 # ok 2833 Set Streaming SVE VL 3120
4561 13:53:39.964655 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4562 13:53:39.964745 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4563 13:53:39.964840 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4564 13:53:39.964915 # ok 2837 Set Streaming SVE VL 3136
4565 13:53:39.965004 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4566 13:53:39.965293 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4567 13:53:39.965392 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4568 13:53:39.965517 # ok 2841 Set Streaming SVE VL 3152
4569 13:53:39.965821 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4570 13:53:39.965926 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4571 13:53:39.966051 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4572 13:53:39.966146 # ok 2845 Set Streaming SVE VL 3168
4573 13:53:39.966267 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4574 13:53:39.966384 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4575 13:53:39.966658 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4576 13:53:39.966779 # ok 2849 Set Streaming SVE VL 3184
4577 13:53:39.966905 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4578 13:53:39.967013 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4579 13:53:39.967114 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4580 13:53:39.967401 # ok 2853 Set Streaming SVE VL 3200
4581 13:53:39.967498 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4582 13:53:39.967587 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4583 13:53:39.967682 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4584 13:53:39.967772 # ok 2857 Set Streaming SVE VL 3216
4585 13:53:39.968058 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4586 13:53:39.968157 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4587 13:53:39.968264 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4588 13:53:39.968349 # ok 2861 Set Streaming SVE VL 3232
4589 13:53:39.968639 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4590 13:53:39.968973 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4591 13:53:39.969063 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4592 13:53:39.969136 # ok 2865 Set Streaming SVE VL 3248
4593 13:53:39.969232 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4594 13:53:39.969320 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4595 13:53:39.969414 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4596 13:53:39.969527 # ok 2869 Set Streaming SVE VL 3264
4597 13:53:39.969611 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4598 13:53:39.969735 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4599 13:53:39.969835 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4600 13:53:39.969928 # ok 2873 Set Streaming SVE VL 3280
4601 13:53:39.970216 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4602 13:53:39.970340 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4603 13:53:39.970467 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4604 13:53:39.970787 # ok 2877 Set Streaming SVE VL 3296
4605 13:53:39.985607 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4606 13:53:39.985825 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4607 13:53:39.985920 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4608 13:53:39.985993 # ok 2881 Set Streaming SVE VL 3312
4609 13:53:39.986090 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4610 13:53:39.986363 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4611 13:53:39.992606 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4612 13:53:39.992979 # ok 2885 Set Streaming SVE VL 3328
4613 13:53:39.993074 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4614 13:53:39.993162 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4615 13:53:39.993445 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4616 13:53:39.993533 # ok 2889 Set Streaming SVE VL 3344
4617 13:53:39.993629 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4618 13:53:39.993734 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4619 13:53:39.993832 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4620 13:53:39.993931 # ok 2893 Set Streaming SVE VL 3360
4621 13:53:39.994188 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4622 13:53:39.994268 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4623 13:53:40.000155 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4624 13:53:40.000610 # ok 2897 Set Streaming SVE VL 3376
4625 13:53:40.000698 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4626 13:53:40.000762 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4627 13:53:40.001025 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4628 13:53:40.001121 # ok 2901 Set Streaming SVE VL 3392
4629 13:53:40.001206 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4630 13:53:40.001289 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4631 13:53:40.001383 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4632 13:53:40.001468 # ok 2905 Set Streaming SVE VL 3408
4633 13:53:40.001567 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4634 13:53:40.001660 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4635 13:53:40.002080 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4636 13:53:40.002180 # ok 2909 Set Streaming SVE VL 3424
4637 13:53:40.002257 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4638 13:53:40.002321 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4639 13:53:40.002394 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4640 13:53:40.002457 # ok 2913 Set Streaming SVE VL 3440
4641 13:53:40.007466 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4642 13:53:40.007976 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4643 13:53:40.008112 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4644 13:53:40.008185 # ok 2917 Set Streaming SVE VL 3456
4645 13:53:40.008263 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4646 13:53:40.008390 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4647 13:53:40.008615 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4648 13:53:40.008719 # ok 2921 Set Streaming SVE VL 3472
4649 13:53:40.008810 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4650 13:53:40.008930 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4651 13:53:40.009028 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4652 13:53:40.009099 # ok 2925 Set Streaming SVE VL 3488
4653 13:53:40.009161 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4654 13:53:40.009235 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4655 13:53:40.010123 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4656 13:53:40.010519 # ok 2929 Set Streaming SVE VL 3504
4657 13:53:40.012546 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4658 13:53:40.012696 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4659 13:53:40.012817 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4660 13:53:40.012951 # ok 2933 Set Streaming SVE VL 3520
4661 13:53:40.013083 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4662 13:53:40.013201 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4663 13:53:40.013295 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4664 13:53:40.013373 # ok 2937 Set Streaming SVE VL 3536
4665 13:53:40.013450 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4666 13:53:40.013523 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4667 13:53:40.013608 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4668 13:53:40.013756 # ok 2941 Set Streaming SVE VL 3552
4669 13:53:40.013875 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4670 13:53:40.013964 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4671 13:53:40.014248 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4672 13:53:40.014331 # ok 2945 Set Streaming SVE VL 3568
4673 13:53:40.014395 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4674 13:53:40.014458 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4675 13:53:40.014519 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4676 13:53:40.014582 # ok 2949 Set Streaming SVE VL 3584
4677 13:53:40.014641 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4678 13:53:40.014703 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4679 13:53:40.014762 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4680 13:53:40.014822 # ok 2953 Set Streaming SVE VL 3600
4681 13:53:40.014882 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4682 13:53:40.014941 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4683 13:53:40.015007 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4684 13:53:40.015070 # ok 2957 Set Streaming SVE VL 3616
4685 13:53:40.015130 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4686 13:53:40.015189 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4687 13:53:40.019267 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4688 13:53:40.019447 # ok 2961 Set Streaming SVE VL 3632
4689 13:53:40.019779 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4690 13:53:40.019910 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4691 13:53:40.020063 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4692 13:53:40.020174 # ok 2965 Set Streaming SVE VL 3648
4693 13:53:40.020257 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4694 13:53:40.020325 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4695 13:53:40.020403 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4696 13:53:40.020482 # ok 2969 Set Streaming SVE VL 3664
4697 13:53:40.020581 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4698 13:53:40.020662 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4699 13:53:40.020763 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4700 13:53:40.020848 # ok 2973 Set Streaming SVE VL 3680
4701 13:53:40.020944 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4702 13:53:40.021238 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4703 13:53:40.021364 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4704 13:53:40.021450 # ok 2977 Set Streaming SVE VL 3696
4705 13:53:40.021522 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4706 13:53:40.021638 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4707 13:53:40.021742 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4708 13:53:40.021844 # ok 2981 Set Streaming SVE VL 3712
4709 13:53:40.021981 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4710 13:53:40.022266 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4711 13:53:40.022345 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4712 13:53:40.022408 # ok 2985 Set Streaming SVE VL 3728
4713 13:53:40.027701 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4714 13:53:40.028205 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4715 13:53:40.028301 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4716 13:53:40.028388 # ok 2989 Set Streaming SVE VL 3744
4717 13:53:40.028494 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4718 13:53:40.028616 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4719 13:53:40.028717 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4720 13:53:40.028816 # ok 2993 Set Streaming SVE VL 3760
4721 13:53:40.028935 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4722 13:53:40.029033 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4723 13:53:40.029123 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4724 13:53:40.029211 # ok 2997 Set Streaming SVE VL 3776
4725 13:53:40.029291 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4726 13:53:40.029403 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4727 13:53:40.029512 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4728 13:53:40.029632 # ok 3001 Set Streaming SVE VL 3792
4729 13:53:40.029748 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4730 13:53:40.030048 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4731 13:53:40.030166 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4732 13:53:40.030235 # ok 3005 Set Streaming SVE VL 3808
4733 13:53:40.030306 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4734 13:53:40.036646 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4735 13:53:40.037147 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4736 13:53:40.037286 # ok 3009 Set Streaming SVE VL 3824
4737 13:53:40.037412 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4738 13:53:40.037500 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4739 13:53:40.037598 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4740 13:53:40.037687 # ok 3013 Set Streaming SVE VL 3840
4741 13:53:40.037764 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4742 13:53:40.037861 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4743 13:53:40.037943 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4744 13:53:40.038040 # ok 3017 Set Streaming SVE VL 3856
4745 13:53:40.038135 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4746 13:53:40.043207 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4747 13:53:40.043613 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4748 13:53:40.043722 # ok 3021 Set Streaming SVE VL 3872
4749 13:53:40.043821 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4750 13:53:40.043930 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4751 13:53:40.044020 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4752 13:53:40.044108 # ok 3025 Set Streaming SVE VL 3888
4753 13:53:40.044194 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4754 13:53:40.044990 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4755 13:53:40.045600 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4756 13:53:40.045724 # ok 3029 Set Streaming SVE VL 3904
4757 13:53:40.045817 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4758 13:53:40.045904 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4759 13:53:40.045991 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4760 13:53:40.046078 # ok 3033 Set Streaming SVE VL 3920
4761 13:53:40.046182 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4762 13:53:40.046275 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4763 13:53:40.046364 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4764 13:53:40.046450 # ok 3037 Set Streaming SVE VL 3936
4765 13:53:40.046537 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4766 13:53:40.051194 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4767 13:53:40.051554 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4768 13:53:40.051662 # ok 3041 Set Streaming SVE VL 3952
4769 13:53:40.051753 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4770 13:53:40.052198 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4771 13:53:40.052340 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4772 13:53:40.052474 # ok 3045 Set Streaming SVE VL 3968
4773 13:53:40.052592 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4774 13:53:40.052735 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4775 13:53:40.052908 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4776 13:53:40.053047 # ok 3049 Set Streaming SVE VL 3984
4777 13:53:40.053185 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4778 13:53:40.053305 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4779 13:53:40.053397 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4780 13:53:40.053511 # ok 3053 Set Streaming SVE VL 4000
4781 13:53:40.053635 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4782 13:53:40.053797 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4783 13:53:40.053910 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4784 13:53:40.053999 # ok 3057 Set Streaming SVE VL 4016
4785 13:53:40.054085 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4786 13:53:40.054171 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4787 13:53:40.054256 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4788 13:53:40.054339 # ok 3061 Set Streaming SVE VL 4032
4789 13:53:40.054440 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4790 13:53:40.054528 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4791 13:53:40.054611 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4792 13:53:40.054697 # ok 3065 Set Streaming SVE VL 4048
4793 13:53:40.054780 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4794 13:53:40.059120 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4795 13:53:40.059563 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4796 13:53:40.059666 # ok 3069 Set Streaming SVE VL 4064
4797 13:53:40.059754 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4798 13:53:40.059855 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4799 13:53:40.059944 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4800 13:53:40.060044 # ok 3073 Set Streaming SVE VL 4080
4801 13:53:40.060345 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4802 13:53:40.060460 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4803 13:53:40.060547 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4804 13:53:40.060653 # ok 3077 Set Streaming SVE VL 4096
4805 13:53:40.060954 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4806 13:53:40.061058 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4807 13:53:40.061160 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4808 13:53:40.061259 # ok 3081 Set Streaming SVE VL 4112
4809 13:53:40.061557 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4810 13:53:40.061677 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4811 13:53:40.061764 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4812 13:53:40.061859 # ok 3085 Set Streaming SVE VL 4128
4813 13:53:40.061975 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4814 13:53:40.062275 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4815 13:53:40.067408 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4816 13:53:40.067848 # ok 3089 Set Streaming SVE VL 4144
4817 13:53:40.068059 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4818 13:53:40.068238 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4819 13:53:40.068457 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4820 13:53:40.068696 # ok 3093 Set Streaming SVE VL 4160
4821 13:53:40.068863 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4822 13:53:40.069022 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4823 13:53:40.069224 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4824 13:53:40.069420 # ok 3097 Set Streaming SVE VL 4176
4825 13:53:40.069625 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4826 13:53:40.069823 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4827 13:53:40.069991 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4828 13:53:40.070155 # ok 3101 Set Streaming SVE VL 4192
4829 13:53:40.070352 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4830 13:53:40.070539 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4831 13:53:40.070682 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4832 13:53:40.070775 # ok 3105 Set Streaming SVE VL 4208
4833 13:53:40.070864 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4834 13:53:40.070953 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4835 13:53:40.071040 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4836 13:53:40.071127 # ok 3109 Set Streaming SVE VL 4224
4837 13:53:40.074806 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4838 13:53:40.075177 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4839 13:53:40.075275 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4840 13:53:40.075381 # ok 3113 Set Streaming SVE VL 4240
4841 13:53:40.075480 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4842 13:53:40.075606 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4843 13:53:40.075720 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4844 13:53:40.075845 # ok 3117 Set Streaming SVE VL 4256
4845 13:53:40.076193 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4846 13:53:40.076286 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4847 13:53:40.076380 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4848 13:53:40.076467 # ok 3121 Set Streaming SVE VL 4272
4849 13:53:40.076544 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4850 13:53:40.076633 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4851 13:53:40.076927 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4852 13:53:40.077009 # ok 3125 Set Streaming SVE VL 4288
4853 13:53:40.077100 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4854 13:53:40.077183 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4855 13:53:40.077272 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4856 13:53:40.077371 # ok 3129 Set Streaming SVE VL 4304
4857 13:53:40.077478 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4858 13:53:40.077598 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4859 13:53:40.077909 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4860 13:53:40.078210 # ok 3133 Set Streaming SVE VL 4320
4861 13:53:40.078307 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4862 13:53:40.079154 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4863 13:53:40.079465 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4864 13:53:40.079568 # ok 3137 Set Streaming SVE VL 4336
4865 13:53:40.079670 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4866 13:53:40.079969 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4867 13:53:40.080084 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4868 13:53:40.080222 # ok 3141 Set Streaming SVE VL 4352
4869 13:53:40.085803 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4870 13:53:40.086062 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4871 13:53:40.086226 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4872 13:53:40.086363 # ok 3145 Set Streaming SVE VL 4368
4873 13:53:40.086480 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4874 13:53:40.086598 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4875 13:53:40.086727 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4876 13:53:40.086843 # ok 3149 Set Streaming SVE VL 4384
4877 13:53:40.086957 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4878 13:53:40.087072 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4879 13:53:40.087187 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4880 13:53:40.087301 # ok 3153 Set Streaming SVE VL 4400
4881 13:53:40.087438 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4882 13:53:40.089344 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4883 13:53:40.089845 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4884 13:53:40.090001 # ok 3157 Set Streaming SVE VL 4416
4885 13:53:40.090095 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4886 13:53:40.090420 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4887 13:53:40.090503 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4888 13:53:40.090636 # ok 3161 Set Streaming SVE VL 4432
4889 13:53:40.091275 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4890 13:53:40.091684 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4891 13:53:40.091781 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4892 13:53:40.091872 # ok 3165 Set Streaming SVE VL 4448
4893 13:53:40.091987 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4894 13:53:40.092083 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4895 13:53:40.092167 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4896 13:53:40.092265 # ok 3169 Set Streaming SVE VL 4464
4897 13:53:40.092345 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4898 13:53:40.092439 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4899 13:53:40.092713 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4900 13:53:40.092813 # ok 3173 Set Streaming SVE VL 4480
4901 13:53:40.092951 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4902 13:53:40.093058 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4903 13:53:40.093156 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4904 13:53:40.093996 # ok 3177 Set Streaming SVE VL 4496
4905 13:53:40.094105 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4906 13:53:40.094193 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4907 13:53:40.098954 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4908 13:53:40.099348 # ok 3181 Set Streaming SVE VL 4512
4909 13:53:40.099448 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4910 13:53:40.099543 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4911 13:53:40.099624 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4912 13:53:40.099722 # ok 3185 Set Streaming SVE VL 4528
4913 13:53:40.099816 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4914 13:53:40.100110 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4915 13:53:40.100233 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4916 13:53:40.100352 # ok 3189 Set Streaming SVE VL 4544
4917 13:53:40.100451 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4918 13:53:40.100544 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4919 13:53:40.100852 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4920 13:53:40.100965 # ok 3193 Set Streaming SVE VL 4560
4921 13:53:40.101259 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4922 13:53:40.101371 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4923 13:53:40.101465 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4924 13:53:40.101557 # ok 3197 Set Streaming SVE VL 4576
4925 13:53:40.105729 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4926 13:53:40.105868 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4927 13:53:40.105952 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4928 13:53:40.106033 # ok 3201 Set Streaming SVE VL 4592
4929 13:53:40.106112 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4930 13:53:40.119212 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4931 13:53:40.119447 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4932 13:53:40.119771 # ok 3205 Set Streaming SVE VL 4608
4933 13:53:40.119875 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4934 13:53:40.119953 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4935 13:53:40.120015 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4936 13:53:40.120075 # ok 3209 Set Streaming SVE VL 4624
4937 13:53:40.120149 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4938 13:53:40.120226 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4939 13:53:40.120309 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4940 13:53:40.120389 # ok 3213 Set Streaming SVE VL 4640
4941 13:53:40.120476 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4942 13:53:40.120561 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4943 13:53:40.120636 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4944 13:53:40.120735 # ok 3217 Set Streaming SVE VL 4656
4945 13:53:40.121046 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4946 13:53:40.121218 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4947 13:53:40.121337 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4948 13:53:40.121481 # ok 3221 Set Streaming SVE VL 4672
4949 13:53:40.121668 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4950 13:53:40.121785 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4951 13:53:40.121895 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4952 13:53:40.122022 # ok 3225 Set Streaming SVE VL 4688
4953 13:53:40.122126 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4954 13:53:40.122248 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4955 13:53:40.122347 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4956 13:53:40.122438 # ok 3229 Set Streaming SVE VL 4704
4957 13:53:40.122544 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4958 13:53:40.135623 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4959 13:53:40.135852 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4960 13:53:40.135936 # ok 3233 Set Streaming SVE VL 4720
4961 13:53:40.136031 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4962 13:53:40.136111 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4963 13:53:40.136189 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4964 13:53:40.136280 # ok 3237 Set Streaming SVE VL 4736
4965 13:53:40.136360 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4966 13:53:40.136458 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4967 13:53:40.136771 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4968 13:53:40.136872 # ok 3241 Set Streaming SVE VL 4752
4969 13:53:40.136967 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4970 13:53:40.137060 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4971 13:53:40.137151 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4972 13:53:40.137459 # ok 3245 Set Streaming SVE VL 4768
4973 13:53:40.137616 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4974 13:53:40.138026 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4975 13:53:40.138130 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4976 13:53:40.138221 # ok 3249 Set Streaming SVE VL 4784
4977 13:53:40.138307 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4978 13:53:40.138404 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4979 13:53:40.147190 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4980 13:53:40.147442 # ok 3253 Set Streaming SVE VL 4800
4981 13:53:40.147767 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4982 13:53:40.147872 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4983 13:53:40.147963 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4984 13:53:40.148067 # ok 3257 Set Streaming SVE VL 4816
4985 13:53:40.148153 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4986 13:53:40.148257 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4987 13:53:40.148358 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4988 13:53:40.148448 # ok 3261 Set Streaming SVE VL 4832
4989 13:53:40.148547 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4990 13:53:40.148842 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4991 13:53:40.148961 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4992 13:53:40.149292 # ok 3265 Set Streaming SVE VL 4848
4993 13:53:40.149498 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4994 13:53:40.149712 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4995 13:53:40.149884 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4996 13:53:40.150087 # ok 3269 Set Streaming SVE VL 4864
4997 13:53:40.150261 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
4998 13:53:40.150473 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
4999 13:53:40.150637 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5000 13:53:40.150788 # ok 3273 Set Streaming SVE VL 4880
5001 13:53:40.150932 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5002 13:53:40.151076 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5003 13:53:40.161235 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5004 13:53:40.161798 # ok 3277 Set Streaming SVE VL 4896
5005 13:53:40.161904 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5006 13:53:40.161994 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5007 13:53:40.162081 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5008 13:53:40.162182 # ok 3281 Set Streaming SVE VL 4912
5009 13:53:40.162268 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5010 13:53:40.162349 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5011 13:53:40.167591 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5012 13:53:40.167812 # ok 3285 Set Streaming SVE VL 4928
5013 13:53:40.167910 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5014 13:53:40.168200 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5015 13:53:40.168293 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5016 13:53:40.168381 # ok 3289 Set Streaming SVE VL 4944
5017 13:53:40.168467 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5018 13:53:40.168567 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5019 13:53:40.168655 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5020 13:53:40.168739 # ok 3293 Set Streaming SVE VL 4960
5021 13:53:40.168843 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5022 13:53:40.168945 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5023 13:53:40.169048 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5024 13:53:40.169340 # ok 3297 Set Streaming SVE VL 4976
5025 13:53:40.169433 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5026 13:53:40.169537 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5027 13:53:40.169639 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5028 13:53:40.169747 # ok 3301 Set Streaming SVE VL 4992
5029 13:53:40.170038 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5030 13:53:40.170132 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5031 13:53:40.170233 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5032 13:53:40.170511 # ok 3305 Set Streaming SVE VL 5008
5033 13:53:40.175703 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5034 13:53:40.176201 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5035 13:53:40.176426 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5036 13:53:40.176626 # ok 3309 Set Streaming SVE VL 5024
5037 13:53:40.176819 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5038 13:53:40.176999 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5039 13:53:40.177206 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5040 13:53:40.177390 # ok 3313 Set Streaming SVE VL 5040
5041 13:53:40.177591 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5042 13:53:40.177783 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5043 13:53:40.177940 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5044 13:53:40.178108 # ok 3317 Set Streaming SVE VL 5056
5045 13:53:40.178317 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5046 13:53:40.178540 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5047 13:53:40.178712 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5048 13:53:40.178900 # ok 3321 Set Streaming SVE VL 5072
5049 13:53:40.179063 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5050 13:53:40.179227 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5051 13:53:40.179393 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5052 13:53:40.179552 # ok 3325 Set Streaming SVE VL 5088
5053 13:53:40.179713 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5054 13:53:40.185315 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5055 13:53:40.185541 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5056 13:53:40.185670 # ok 3329 Set Streaming SVE VL 5104
5057 13:53:40.185785 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5058 13:53:40.185874 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5059 13:53:40.185967 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5060 13:53:40.186039 # ok 3333 Set Streaming SVE VL 5120
5061 13:53:40.186129 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5062 13:53:40.186202 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5063 13:53:40.186293 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5064 13:53:40.186365 # ok 3337 Set Streaming SVE VL 5136
5065 13:53:40.186456 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5066 13:53:40.191759 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5067 13:53:40.191996 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5068 13:53:40.192081 # ok 3341 Set Streaming SVE VL 5152
5069 13:53:40.192365 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5070 13:53:40.192455 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5071 13:53:40.192537 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5072 13:53:40.192618 # ok 3345 Set Streaming SVE VL 5168
5073 13:53:40.192714 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5074 13:53:40.192796 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5075 13:53:40.192876 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5076 13:53:40.192971 # ok 3349 Set Streaming SVE VL 5184
5077 13:53:40.193052 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5078 13:53:40.193147 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5079 13:53:40.193433 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5080 13:53:40.193519 # ok 3353 Set Streaming SVE VL 5200
5081 13:53:40.193626 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5082 13:53:40.193919 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5083 13:53:40.194022 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5084 13:53:40.194112 # ok 3357 Set Streaming SVE VL 5216
5085 13:53:40.194226 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5086 13:53:40.194317 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5087 13:53:40.199971 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5088 13:53:40.200381 # ok 3361 Set Streaming SVE VL 5232
5089 13:53:40.200462 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5090 13:53:40.200542 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5091 13:53:40.200634 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5092 13:53:40.200722 # ok 3365 Set Streaming SVE VL 5248
5093 13:53:40.200810 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5094 13:53:40.201082 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5095 13:53:40.201168 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5096 13:53:40.201259 # ok 3369 Set Streaming SVE VL 5264
5097 13:53:40.201353 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5098 13:53:40.201426 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5099 13:53:40.201516 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5100 13:53:40.201775 # ok 3373 Set Streaming SVE VL 5280
5101 13:53:40.201851 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5102 13:53:40.201932 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5103 13:53:40.202193 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5104 13:53:40.202284 # ok 3377 Set Streaming SVE VL 5296
5105 13:53:40.202374 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5106 13:53:40.202451 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5107 13:53:40.202525 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5108 13:53:40.202599 # ok 3381 Set Streaming SVE VL 5312
5109 13:53:40.202691 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5110 13:53:40.202947 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5111 13:53:40.203034 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5112 13:53:40.203290 # ok 3385 Set Streaming SVE VL 5328
5113 13:53:40.203361 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5114 13:53:40.203452 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5115 13:53:40.203524 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5116 13:53:40.203613 # ok 3389 Set Streaming SVE VL 5344
5117 13:53:40.203688 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5118 13:53:40.203777 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5119 13:53:40.203864 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5120 13:53:40.203944 # ok 3393 Set Streaming SVE VL 5360
5121 13:53:40.204202 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5122 13:53:40.204275 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5123 13:53:40.204365 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5124 13:53:40.204437 # ok 3397 Set Streaming SVE VL 5376
5125 13:53:40.204512 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5126 13:53:40.204602 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5127 13:53:40.204857 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5128 13:53:40.204931 # ok 3401 Set Streaming SVE VL 5392
5129 13:53:40.205006 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5130 13:53:40.205095 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5131 13:53:40.205350 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5132 13:53:40.205429 # ok 3405 Set Streaming SVE VL 5408
5133 13:53:40.205519 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5134 13:53:40.205595 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5135 13:53:40.205698 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5136 13:53:40.205772 # ok 3409 Set Streaming SVE VL 5424
5137 13:53:40.205848 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5138 13:53:40.205938 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5139 13:53:40.206009 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5140 13:53:40.206268 # ok 3413 Set Streaming SVE VL 5440
5141 13:53:40.206341 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5142 13:53:40.206416 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5143 13:53:40.206505 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5144 13:53:40.206577 # ok 3417 Set Streaming SVE VL 5456
5145 13:53:40.211865 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5146 13:53:40.212278 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5147 13:53:40.212354 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5148 13:53:40.212433 # ok 3421 Set Streaming SVE VL 5472
5149 13:53:40.212509 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5150 13:53:40.212600 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5151 13:53:40.212672 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5152 13:53:40.212748 # ok 3425 Set Streaming SVE VL 5488
5153 13:53:40.212823 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5154 13:53:40.212937 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5155 13:53:40.213038 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5156 13:53:40.213112 # ok 3429 Set Streaming SVE VL 5504
5157 13:53:40.213202 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5158 13:53:40.213473 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5159 13:53:40.213558 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5160 13:53:40.213832 # ok 3433 Set Streaming SVE VL 5520
5161 13:53:40.213916 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5162 13:53:40.213995 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5163 13:53:40.214085 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5164 13:53:40.214157 # ok 3437 Set Streaming SVE VL 5536
5165 13:53:40.214230 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5166 13:53:40.214320 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5167 13:53:40.214392 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5168 13:53:40.214466 # ok 3441 Set Streaming SVE VL 5552
5169 13:53:40.217488 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5170 13:53:40.217887 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5171 13:53:40.217981 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5172 13:53:40.218054 # ok 3445 Set Streaming SVE VL 5568
5173 13:53:40.218132 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5174 13:53:40.218199 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5175 13:53:40.218263 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5176 13:53:40.218328 # ok 3449 Set Streaming SVE VL 5584
5177 13:53:40.218406 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5178 13:53:40.218472 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5179 13:53:40.223129 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5180 13:53:40.223687 # ok 3453 Set Streaming SVE VL 5600
5181 13:53:40.223813 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5182 13:53:40.223920 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5183 13:53:40.224029 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5184 13:53:40.224133 # ok 3457 Set Streaming SVE VL 5616
5185 13:53:40.224232 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5186 13:53:40.224348 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5187 13:53:40.224449 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5188 13:53:40.224566 # ok 3461 Set Streaming SVE VL 5632
5189 13:53:40.224665 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5190 13:53:40.224751 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5191 13:53:40.224822 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5192 13:53:40.224883 # ok 3465 Set Streaming SVE VL 5648
5193 13:53:40.224964 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5194 13:53:40.225068 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5195 13:53:40.225189 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5196 13:53:40.225317 # ok 3469 Set Streaming SVE VL 5664
5197 13:53:40.225436 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5198 13:53:40.225571 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5199 13:53:40.226067 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5200 13:53:40.226145 # ok 3473 Set Streaming SVE VL 5680
5201 13:53:40.226239 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5202 13:53:40.226328 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5203 13:53:40.232028 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5204 13:53:40.232482 # ok 3477 Set Streaming SVE VL 5696
5205 13:53:40.232585 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5206 13:53:40.232671 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5207 13:53:40.232774 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5208 13:53:40.232859 # ok 3481 Set Streaming SVE VL 5712
5209 13:53:40.232942 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5210 13:53:40.233027 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5211 13:53:40.233124 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5212 13:53:40.233208 # ok 3485 Set Streaming SVE VL 5728
5213 13:53:40.233289 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5214 13:53:40.233387 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5215 13:53:40.233471 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5216 13:53:40.233552 # ok 3489 Set Streaming SVE VL 5744
5217 13:53:40.233654 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5218 13:53:40.233740 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5219 13:53:40.233837 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5220 13:53:40.233921 # ok 3493 Set Streaming SVE VL 5760
5221 13:53:40.234007 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5222 13:53:40.234103 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5223 13:53:40.234199 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5224 13:53:40.234285 # ok 3497 Set Streaming SVE VL 5776
5225 13:53:40.234384 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5226 13:53:40.239312 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5227 13:53:40.239822 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5228 13:53:40.239988 # ok 3501 Set Streaming SVE VL 5792
5229 13:53:40.240127 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5230 13:53:40.240254 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5231 13:53:40.240349 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5232 13:53:40.240486 # ok 3505 Set Streaming SVE VL 5808
5233 13:53:40.240599 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5234 13:53:40.240732 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5235 13:53:40.240868 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5236 13:53:40.241043 # ok 3509 Set Streaming SVE VL 5824
5237 13:53:40.241234 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5238 13:53:40.241399 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5239 13:53:40.241558 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5240 13:53:40.241742 # ok 3513 Set Streaming SVE VL 5840
5241 13:53:40.241910 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5242 13:53:40.242111 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5243 13:53:40.242289 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5244 13:53:40.242429 # ok 3517 Set Streaming SVE VL 5856
5245 13:53:40.242543 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5246 13:53:40.242634 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5247 13:53:40.242748 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5248 13:53:40.242895 # ok 3521 Set Streaming SVE VL 5872
5249 13:53:40.243028 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5250 13:53:40.243167 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5251 13:53:40.243313 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5252 13:53:40.243433 # ok 3525 Set Streaming SVE VL 5888
5253 13:53:40.243526 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5254 13:53:40.250106 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5255 13:53:40.250571 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5256 13:53:40.250672 # ok 3529 Set Streaming SVE VL 5904
5257 13:53:40.250761 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5258 13:53:40.251221 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5259 13:53:40.251314 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5260 13:53:40.251400 # ok 3533 Set Streaming SVE VL 5920
5261 13:53:40.251501 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5262 13:53:40.251588 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5263 13:53:40.251690 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5264 13:53:40.251778 # ok 3537 Set Streaming SVE VL 5936
5265 13:53:40.251875 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5266 13:53:40.252163 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5267 13:53:40.252443 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5268 13:53:40.252533 # ok 3541 Set Streaming SVE VL 5952
5269 13:53:40.252634 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5270 13:53:40.252721 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5271 13:53:40.252821 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5272 13:53:40.252924 # ok 3545 Set Streaming SVE VL 5968
5273 13:53:40.253023 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5274 13:53:40.253124 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5275 13:53:40.253418 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5276 13:53:40.253523 # ok 3549 Set Streaming SVE VL 5984
5277 13:53:40.253605 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5278 13:53:40.254112 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5279 13:53:40.254208 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5280 13:53:40.254294 # ok 3553 Set Streaming SVE VL 6000
5281 13:53:40.254413 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5282 13:53:40.254502 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5283 13:53:40.254595 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5284 13:53:40.260441 # ok 3557 Set Streaming SVE VL 6016
5285 13:53:40.260932 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5286 13:53:40.261083 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5287 13:53:40.261171 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5288 13:53:40.261251 # ok 3561 Set Streaming SVE VL 6032
5289 13:53:40.261348 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5290 13:53:40.261431 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5291 13:53:40.261511 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5292 13:53:40.261604 # ok 3565 Set Streaming SVE VL 6048
5293 13:53:40.261699 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5294 13:53:40.261793 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5295 13:53:40.261873 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5296 13:53:40.261966 # ok 3569 Set Streaming SVE VL 6064
5297 13:53:40.262064 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5298 13:53:40.262144 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5299 13:53:40.262235 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5300 13:53:40.262315 # ok 3573 Set Streaming SVE VL 6080
5301 13:53:40.262405 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5302 13:53:40.271890 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5303 13:53:40.272339 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5304 13:53:40.272426 # ok 3577 Set Streaming SVE VL 6096
5305 13:53:40.272498 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5306 13:53:40.272622 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5307 13:53:40.272706 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5308 13:53:40.272792 # ok 3581 Set Streaming SVE VL 6112
5309 13:53:40.273052 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5310 13:53:40.273148 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5311 13:53:40.273269 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5312 13:53:40.273363 # ok 3585 Set Streaming SVE VL 6128
5313 13:53:40.273486 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5314 13:53:40.273585 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5315 13:53:40.273870 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5316 13:53:40.273998 # ok 3589 Set Streaming SVE VL 6144
5317 13:53:40.274455 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5318 13:53:40.274537 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5319 13:53:40.274627 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5320 13:53:40.279665 # ok 3593 Set Streaming SVE VL 6160
5321 13:53:40.280381 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5322 13:53:40.280486 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5323 13:53:40.280569 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5324 13:53:40.280663 # ok 3597 Set Streaming SVE VL 6176
5325 13:53:40.280761 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5326 13:53:40.280858 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5327 13:53:40.280931 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5328 13:53:40.281006 # ok 3601 Set Streaming SVE VL 6192
5329 13:53:40.281082 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5330 13:53:40.281155 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5331 13:53:40.281250 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5332 13:53:40.281322 # ok 3605 Set Streaming SVE VL 6208
5333 13:53:40.281397 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5334 13:53:40.281471 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5335 13:53:40.281564 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5336 13:53:40.281636 # ok 3609 Set Streaming SVE VL 6224
5337 13:53:40.281720 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5338 13:53:40.281796 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5339 13:53:40.281888 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5340 13:53:40.281960 # ok 3613 Set Streaming SVE VL 6240
5341 13:53:40.282034 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5342 13:53:40.282126 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5343 13:53:40.282198 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5344 13:53:40.282489 # ok 3617 Set Streaming SVE VL 6256
5345 13:53:40.282628 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5346 13:53:40.295818 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5347 13:53:40.296241 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5348 13:53:40.296328 # ok 3621 Set Streaming SVE VL 6272
5349 13:53:40.296420 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5350 13:53:40.296516 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5351 13:53:40.296606 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5352 13:53:40.296713 # ok 3625 Set Streaming SVE VL 6288
5353 13:53:40.297822 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5354 13:53:40.298101 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5355 13:53:40.298173 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5356 13:53:40.298245 # ok 3629 Set Streaming SVE VL 6304
5357 13:53:40.298355 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5358 13:53:40.307661 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5359 13:53:40.307895 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5360 13:53:40.308002 # ok 3633 Set Streaming SVE VL 6320
5361 13:53:40.308304 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5362 13:53:40.308408 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5363 13:53:40.308516 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5364 13:53:40.308637 # ok 3637 Set Streaming SVE VL 6336
5365 13:53:40.308736 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5366 13:53:40.308836 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5367 13:53:40.308938 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5368 13:53:40.309039 # ok 3641 Set Streaming SVE VL 6352
5369 13:53:40.309113 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5370 13:53:40.309179 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5371 13:53:40.309260 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5372 13:53:40.309364 # ok 3645 Set Streaming SVE VL 6368
5373 13:53:40.309461 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5374 13:53:40.309554 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5375 13:53:40.309626 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5376 13:53:40.309714 # ok 3649 Set Streaming SVE VL 6384
5377 13:53:40.309793 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5378 13:53:40.309888 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5379 13:53:40.309996 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5380 13:53:40.310075 # ok 3653 Set Streaming SVE VL 6400
5381 13:53:40.310341 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5382 13:53:40.310450 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5383 13:53:40.310550 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5384 13:53:40.310632 # ok 3657 Set Streaming SVE VL 6416
5385 13:53:40.319914 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5386 13:53:40.320141 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5387 13:53:40.320450 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5388 13:53:40.320541 # ok 3661 Set Streaming SVE VL 6432
5389 13:53:40.320637 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5390 13:53:40.320708 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5391 13:53:40.320785 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5392 13:53:40.320851 # ok 3665 Set Streaming SVE VL 6448
5393 13:53:40.320916 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5394 13:53:40.321025 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5395 13:53:40.321098 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5396 13:53:40.321180 # ok 3669 Set Streaming SVE VL 6464
5397 13:53:40.321271 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5398 13:53:40.321341 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5399 13:53:40.321625 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5400 13:53:40.321732 # ok 3673 Set Streaming SVE VL 6480
5401 13:53:40.321847 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5402 13:53:40.321930 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5403 13:53:40.322012 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5404 13:53:40.322079 # ok 3677 Set Streaming SVE VL 6496
5405 13:53:40.322157 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5406 13:53:40.322413 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5407 13:53:40.322489 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5408 13:53:40.327125 # ok 3681 Set Streaming SVE VL 6512
5409 13:53:40.327464 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5410 13:53:40.327573 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5411 13:53:40.327679 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5412 13:53:40.327768 # ok 3685 Set Streaming SVE VL 6528
5413 13:53:40.327871 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5414 13:53:40.327959 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5415 13:53:40.328251 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5416 13:53:40.328343 # ok 3689 Set Streaming SVE VL 6544
5417 13:53:40.328444 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5418 13:53:40.328545 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5419 13:53:40.328845 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5420 13:53:40.328947 # ok 3693 Set Streaming SVE VL 6560
5421 13:53:40.329048 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5422 13:53:40.329336 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5423 13:53:40.329428 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5424 13:53:40.329514 # ok 3697 Set Streaming SVE VL 6576
5425 13:53:40.329620 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5426 13:53:40.329744 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5427 13:53:40.330072 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5428 13:53:40.330169 # ok 3701 Set Streaming SVE VL 6592
5429 13:53:40.330440 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5430 13:53:40.330529 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5431 13:53:40.339327 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5432 13:53:40.339783 # ok 3705 Set Streaming SVE VL 6608
5433 13:53:40.339877 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5434 13:53:40.339965 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5435 13:53:40.340050 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5436 13:53:40.340136 # ok 3709 Set Streaming SVE VL 6624
5437 13:53:40.340239 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5438 13:53:40.340327 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5439 13:53:40.340427 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5440 13:53:40.340515 # ok 3713 Set Streaming SVE VL 6640
5441 13:53:40.340615 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5442 13:53:40.340718 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5443 13:53:40.341015 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5444 13:53:40.341139 # ok 3717 Set Streaming SVE VL 6656
5445 13:53:40.341256 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5446 13:53:40.341380 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5447 13:53:40.341687 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5448 13:53:40.341820 # ok 3721 Set Streaming SVE VL 6672
5449 13:53:40.342003 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5450 13:53:40.342300 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5451 13:53:40.342593 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5452 13:53:40.342675 # ok 3725 Set Streaming SVE VL 6688
5453 13:53:40.342758 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5454 13:53:40.347479 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5455 13:53:40.347885 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5456 13:53:40.347972 # ok 3729 Set Streaming SVE VL 6704
5457 13:53:40.348038 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5458 13:53:40.348108 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5459 13:53:40.348208 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5460 13:53:40.348290 # ok 3733 Set Streaming SVE VL 6720
5461 13:53:40.348404 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5462 13:53:40.348518 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5463 13:53:40.348605 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5464 13:53:40.348677 # ok 3737 Set Streaming SVE VL 6736
5465 13:53:40.348788 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5466 13:53:40.348865 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5467 13:53:40.348968 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5468 13:53:40.349069 # ok 3741 Set Streaming SVE VL 6752
5469 13:53:40.349168 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5470 13:53:40.349462 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5471 13:53:40.349548 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5472 13:53:40.349635 # ok 3745 Set Streaming SVE VL 6768
5473 13:53:40.349721 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5474 13:53:40.349809 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5475 13:53:40.349896 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5476 13:53:40.349984 # ok 3749 Set Streaming SVE VL 6784
5477 13:53:40.350260 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5478 13:53:40.350379 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5479 13:53:40.350496 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5480 13:53:40.357949 # ok 3753 Set Streaming SVE VL 6800
5481 13:53:40.359156 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5482 13:53:40.359464 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5483 13:53:40.359561 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5484 13:53:40.359670 # ok 3757 Set Streaming SVE VL 6816
5485 13:53:40.359785 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5486 13:53:40.359884 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5487 13:53:40.359978 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5488 13:53:40.360276 # ok 3761 Set Streaming SVE VL 6832
5489 13:53:40.360375 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5490 13:53:40.360486 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5491 13:53:40.360598 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5492 13:53:40.360699 # ok 3765 Set Streaming SVE VL 6848
5493 13:53:40.360960 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5494 13:53:40.361051 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5495 13:53:40.361310 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5496 13:53:40.361383 # ok 3769 Set Streaming SVE VL 6864
5497 13:53:40.361694 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5498 13:53:40.361798 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5499 13:53:40.361887 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5500 13:53:40.361987 # ok 3773 Set Streaming SVE VL 6880
5501 13:53:40.362076 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5502 13:53:40.397921 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5503 13:53:40.398350 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5504 13:53:40.398454 # ok 3777 Set Streaming SVE VL 6896
5505 13:53:40.398546 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5506 13:53:40.398651 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5507 13:53:40.403052 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5508 13:53:40.403258 # ok 3781 Set Streaming SVE VL 6912
5509 13:53:40.403628 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5510 13:53:40.403822 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5511 13:53:40.403984 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5512 13:53:40.404139 # ok 3785 Set Streaming SVE VL 6928
5513 13:53:40.404294 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5514 13:53:40.404484 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5515 13:53:40.404642 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5516 13:53:40.404792 # ok 3789 Set Streaming SVE VL 6944
5517 13:53:40.404942 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5518 13:53:40.405091 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5519 13:53:40.405238 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5520 13:53:40.405422 # ok 3793 Set Streaming SVE VL 6960
5521 13:53:40.405632 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5522 13:53:40.406104 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5523 13:53:40.406267 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5524 13:53:40.406417 # ok 3797 Set Streaming SVE VL 6976
5525 13:53:40.406566 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5526 13:53:40.406714 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5527 13:53:40.406863 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5528 13:53:40.407047 # ok 3801 Set Streaming SVE VL 6992
5529 13:53:40.407203 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5530 13:53:40.407352 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5531 13:53:40.407538 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5532 13:53:40.407679 # ok 3805 Set Streaming SVE VL 7008
5533 13:53:40.407810 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5534 13:53:40.409236 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5535 13:53:40.409714 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5536 13:53:40.409885 # ok 3809 Set Streaming SVE VL 7024
5537 13:53:40.410076 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5538 13:53:40.410269 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5539 13:53:40.410489 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5540 13:53:40.410701 # ok 3813 Set Streaming SVE VL 7040
5541 13:53:40.410881 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5542 13:53:40.411043 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5543 13:53:40.422961 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5544 13:53:40.423175 # ok 3817 Set Streaming SVE VL 7056
5545 13:53:40.423645 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5546 13:53:40.423869 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5547 13:53:40.424051 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5548 13:53:40.424256 # ok 3821 Set Streaming SVE VL 7072
5549 13:53:40.424427 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5550 13:53:40.424588 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5551 13:53:40.424749 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5552 13:53:40.424910 # ok 3825 Set Streaming SVE VL 7088
5553 13:53:40.425096 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5554 13:53:40.425340 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5555 13:53:40.425539 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5556 13:53:40.425760 # ok 3829 Set Streaming SVE VL 7104
5557 13:53:40.426000 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5558 13:53:40.426186 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5559 13:53:40.426371 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5560 13:53:40.426556 # ok 3833 Set Streaming SVE VL 7120
5561 13:53:40.426684 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5562 13:53:40.426802 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5563 13:53:40.426921 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5564 13:53:40.427052 # ok 3837 Set Streaming SVE VL 7136
5565 13:53:40.427196 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5566 13:53:40.427326 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5567 13:53:40.427498 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5568 13:53:40.427694 # ok 3841 Set Streaming SVE VL 7152
5569 13:53:40.427861 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5570 13:53:40.428020 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5571 13:53:40.428232 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5572 13:53:40.428404 # ok 3845 Set Streaming SVE VL 7168
5573 13:53:40.428572 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5574 13:53:40.428783 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5575 13:53:40.428983 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5576 13:53:40.429189 # ok 3849 Set Streaming SVE VL 7184
5577 13:53:40.429370 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5578 13:53:40.429539 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5579 13:53:40.429730 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5580 13:53:40.430187 # ok 3853 Set Streaming SVE VL 7200
5581 13:53:40.430399 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5582 13:53:40.430583 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5583 13:53:40.430726 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5584 13:53:40.430891 # ok 3857 Set Streaming SVE VL 7216
5585 13:53:40.431053 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5586 13:53:40.431229 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5587 13:53:40.431402 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5588 13:53:40.431576 # ok 3861 Set Streaming SVE VL 7232
5589 13:53:40.431737 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5590 13:53:40.431891 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5591 13:53:40.432044 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5592 13:53:40.432198 # ok 3865 Set Streaming SVE VL 7248
5593 13:53:40.432351 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5594 13:53:40.432757 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5595 13:53:40.432954 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5596 13:53:40.433115 # ok 3869 Set Streaming SVE VL 7264
5597 13:53:40.433474 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5598 13:53:40.433564 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5599 13:53:40.433850 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5600 13:53:40.433940 # ok 3873 Set Streaming SVE VL 7280
5601 13:53:40.434007 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5602 13:53:40.434081 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5603 13:53:40.434158 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5604 13:53:40.434420 # ok 3877 Set Streaming SVE VL 7296
5605 13:53:40.434514 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5606 13:53:40.434610 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5607 13:53:40.444427 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5608 13:53:40.444839 # ok 3881 Set Streaming SVE VL 7312
5609 13:53:40.444986 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5610 13:53:40.445107 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5611 13:53:40.445249 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5612 13:53:40.445390 # ok 3885 Set Streaming SVE VL 7328
5613 13:53:40.445552 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5614 13:53:40.445981 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5615 13:53:40.446088 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5616 13:53:40.446175 # ok 3889 Set Streaming SVE VL 7344
5617 13:53:40.446263 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5618 13:53:40.446347 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5619 13:53:40.446432 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5620 13:53:40.446513 # ok 3893 Set Streaming SVE VL 7360
5621 13:53:40.446610 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5622 13:53:40.446700 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5623 13:53:40.446783 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5624 13:53:40.446876 # ok 3897 Set Streaming SVE VL 7376
5625 13:53:40.446961 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5626 13:53:40.447041 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5627 13:53:40.447139 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5628 13:53:40.447223 # ok 3901 Set Streaming SVE VL 7392
5629 13:53:40.447304 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5630 13:53:40.447387 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5631 13:53:40.468808 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5632 13:53:40.469053 # ok 3905 Set Streaming SVE VL 7408
5633 13:53:40.469353 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5634 13:53:40.469450 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5635 13:53:40.469537 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5636 13:53:40.469622 # ok 3909 Set Streaming SVE VL 7424
5637 13:53:40.469716 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5638 13:53:40.469817 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5639 13:53:40.469903 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5640 13:53:40.469987 # ok 3913 Set Streaming SVE VL 7440
5641 13:53:40.470087 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5642 13:53:40.470186 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5643 13:53:40.470288 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5644 13:53:40.470534 # ok 3917 Set Streaming SVE VL 7456
5645 13:53:40.470621 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5646 13:53:40.475984 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5647 13:53:40.476373 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5648 13:53:40.476452 # ok 3921 Set Streaming SVE VL 7472
5649 13:53:40.476515 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5650 13:53:40.476578 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5651 13:53:40.476652 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5652 13:53:40.478142 # ok 3925 Set Streaming SVE VL 7488
5653 13:53:40.478226 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5654 13:53:40.478294 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5655 13:53:40.478358 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5656 13:53:40.478618 # ok 3929 Set Streaming SVE VL 7504
5657 13:53:40.478708 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5658 13:53:40.478781 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5659 13:53:40.478842 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5660 13:53:40.478915 # ok 3933 Set Streaming SVE VL 7520
5661 13:53:40.483093 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5662 13:53:40.483409 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5663 13:53:40.483532 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5664 13:53:40.483609 # ok 3937 Set Streaming SVE VL 7536
5665 13:53:40.483679 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5666 13:53:40.483762 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5667 13:53:40.483826 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5668 13:53:40.483898 # ok 3941 Set Streaming SVE VL 7552
5669 13:53:40.484159 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5670 13:53:40.484241 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5671 13:53:40.484318 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5672 13:53:40.484384 # ok 3945 Set Streaming SVE VL 7568
5673 13:53:40.484462 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5674 13:53:40.484732 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5675 13:53:40.484830 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5676 13:53:40.484950 # ok 3949 Set Streaming SVE VL 7584
5677 13:53:40.485060 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5678 13:53:40.485177 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5679 13:53:40.485500 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5680 13:53:40.485599 # ok 3953 Set Streaming SVE VL 7600
5681 13:53:40.485908 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5682 13:53:40.486007 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5683 13:53:40.486104 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5684 13:53:40.486204 # ok 3957 Set Streaming SVE VL 7616
5685 13:53:40.486518 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5686 13:53:40.486627 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5687 13:53:40.491026 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5688 13:53:40.491264 # ok 3961 Set Streaming SVE VL 7632
5689 13:53:40.491785 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5690 13:53:40.491927 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5691 13:53:40.492063 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5692 13:53:40.492155 # ok 3965 Set Streaming SVE VL 7648
5693 13:53:40.492237 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5694 13:53:40.492338 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5695 13:53:40.492423 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5696 13:53:40.492505 # ok 3969 Set Streaming SVE VL 7664
5697 13:53:40.492585 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5698 13:53:40.492683 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5699 13:53:40.492768 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5700 13:53:40.492862 # ok 3973 Set Streaming SVE VL 7680
5701 13:53:40.492961 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5702 13:53:40.493251 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5703 13:53:40.493342 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5704 13:53:40.493440 # ok 3977 Set Streaming SVE VL 7696
5705 13:53:40.493963 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5706 13:53:40.494090 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5707 13:53:40.494238 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5708 13:53:40.494397 # ok 3981 Set Streaming SVE VL 7712
5709 13:53:40.495304 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5710 13:53:40.495407 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5711 13:53:40.499244 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5712 13:53:40.499403 # ok 3985 Set Streaming SVE VL 7728
5713 13:53:40.499504 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5714 13:53:40.499781 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5715 13:53:40.499888 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5716 13:53:40.499975 # ok 3989 Set Streaming SVE VL 7744
5717 13:53:40.500058 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5718 13:53:40.500154 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5719 13:53:40.500238 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5720 13:53:40.500332 # ok 3993 Set Streaming SVE VL 7760
5721 13:53:40.500436 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5722 13:53:40.500517 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5723 13:53:40.500623 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5724 13:53:40.500910 # ok 3997 Set Streaming SVE VL 7776
5725 13:53:40.501016 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5726 13:53:40.501114 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5727 13:53:40.501426 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5728 13:53:40.501559 # ok 4001 Set Streaming SVE VL 7792
5729 13:53:40.501741 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5730 13:53:40.501895 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5731 13:53:40.502043 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5732 13:53:40.502224 # ok 4005 Set Streaming SVE VL 7808
5733 13:53:40.502373 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5734 13:53:40.502571 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5735 13:53:40.506928 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5736 13:53:40.507280 # ok 4009 Set Streaming SVE VL 7824
5737 13:53:40.507381 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5738 13:53:40.507468 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5739 13:53:40.507569 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5740 13:53:40.507674 # ok 4013 Set Streaming SVE VL 7840
5741 13:53:40.507774 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5742 13:53:40.508347 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5743 13:53:40.508467 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5744 13:53:40.508581 # ok 4017 Set Streaming SVE VL 7856
5745 13:53:40.508692 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5746 13:53:40.508801 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5747 13:53:40.508948 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5748 13:53:40.509038 # ok 4021 Set Streaming SVE VL 7872
5749 13:53:40.509136 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5750 13:53:40.509235 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5751 13:53:40.509517 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5752 13:53:40.509605 # ok 4025 Set Streaming SVE VL 7888
5753 13:53:40.509710 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5754 13:53:40.509993 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5755 13:53:40.510092 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5756 13:53:40.510177 # ok 4029 Set Streaming SVE VL 7904
5757 13:53:40.510271 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5758 13:53:40.510377 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5759 13:53:40.510848 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5760 13:53:40.510942 # ok 4033 Set Streaming SVE VL 7920
5761 13:53:40.519222 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5762 13:53:40.519382 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5763 13:53:40.519671 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5764 13:53:40.519762 # ok 4037 Set Streaming SVE VL 7936
5765 13:53:40.519847 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5766 13:53:40.519929 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5767 13:53:40.520026 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5768 13:53:40.520111 # ok 4041 Set Streaming SVE VL 7952
5769 13:53:40.520208 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5770 13:53:40.520305 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5771 13:53:40.520582 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5772 13:53:40.520669 # ok 4045 Set Streaming SVE VL 7968
5773 13:53:40.520943 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5774 13:53:40.521032 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5775 13:53:40.521115 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5776 13:53:40.521210 # ok 4049 Set Streaming SVE VL 7984
5777 13:53:40.521295 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5778 13:53:40.521626 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5779 13:53:40.521911 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5780 13:53:40.522000 # ok 4053 Set Streaming SVE VL 8000
5781 13:53:40.522082 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5782 13:53:40.522167 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5783 13:53:40.522263 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5784 13:53:40.522348 # ok 4057 Set Streaming SVE VL 8016
5785 13:53:40.522429 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5786 13:53:40.522526 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5787 13:53:40.522627 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5788 13:53:40.523080 # ok 4061 Set Streaming SVE VL 8032
5789 13:53:40.523359 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5790 13:53:40.523461 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5791 13:53:40.523545 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5792 13:53:40.523643 # ok 4065 Set Streaming SVE VL 8048
5793 13:53:40.523739 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5794 13:53:40.524022 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5795 13:53:40.524125 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5796 13:53:40.524209 # ok 4069 Set Streaming SVE VL 8064
5797 13:53:40.524482 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5798 13:53:40.524568 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5799 13:53:40.524652 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5800 13:53:40.524749 # ok 4073 Set Streaming SVE VL 8080
5801 13:53:40.524831 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5802 13:53:40.525613 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5803 13:53:40.525915 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5804 13:53:40.526013 # ok 4077 Set Streaming SVE VL 8096
5805 13:53:40.526097 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5806 13:53:40.526194 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5807 13:53:40.526491 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5808 13:53:40.526594 # ok 4081 Set Streaming SVE VL 8112
5809 13:53:40.526693 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5810 13:53:40.526802 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5811 13:53:40.530944 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5812 13:53:40.531363 # ok 4085 Set Streaming SVE VL 8128
5813 13:53:40.531465 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5814 13:53:40.531556 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5815 13:53:40.531657 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5816 13:53:40.531745 # ok 4089 Set Streaming SVE VL 8144
5817 13:53:40.531902 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5818 13:53:40.532124 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5819 13:53:40.532249 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5820 13:53:40.532374 # ok 4093 Set Streaming SVE VL 8160
5821 13:53:40.532482 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5822 13:53:40.532598 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5823 13:53:40.532747 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5824 13:53:40.532867 # ok 4097 Set Streaming SVE VL 8176
5825 13:53:40.532985 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5826 13:53:40.533157 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5827 13:53:40.533312 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5828 13:53:40.533452 # ok 4101 Set Streaming SVE VL 8192
5829 13:53:40.533592 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5830 13:53:40.534205 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5831 13:53:40.534747 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5832 13:53:40.534890 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5833 13:53:40.535033 ok 30 selftests: arm64: sve-ptrace
5834 13:53:40.535152 # selftests: arm64: sve-probe-vls
5835 13:53:40.535266 # TAP version 13
5836 13:53:40.535379 # 1..2
5837 13:53:40.535490 # ok 1 Enumerated 16 vector lengths
5838 13:53:40.535601 # ok 2 All vector lengths valid
5839 13:53:40.535700 # # 16
5840 13:53:40.535786 # # 32
5841 13:53:40.539450 # # 48
5842 13:53:40.539657 # # 64
5843 13:53:40.540004 # # 80
5844 13:53:40.540157 # # 96
5845 13:53:40.540253 # # 112
5846 13:53:40.540378 # # 128
5847 13:53:40.540507 # # 144
5848 13:53:40.540581 # # 160
5849 13:53:40.540685 # # 176
5850 13:53:40.540766 # # 192
5851 13:53:40.540898 # # 208
5852 13:53:40.540976 # # 224
5853 13:53:40.541101 # # 240
5854 13:53:40.541178 # # 256
5855 13:53:40.541300 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5856 13:53:40.541408 ok 31 selftests: arm64: sve-probe-vls
5857 13:53:40.845749 # selftests: arm64: vec-syscfg
5858 13:53:41.398345 # TAP version 13
5859 13:53:41.398613 # 1..20
5860 13:53:41.398714 # ok 1 SVE default vector length 64
5861 13:53:41.399021 # ok 2 SVE minimum vector length 16
5862 13:53:41.399124 # ok 3 SVE maximum vector length 256
5863 13:53:41.399212 # ok 4 SVE current VL is 64
5864 13:53:41.399302 # ok 5 SVE set VL 64 and have VL 64
5865 13:53:41.399392 # ok 6 SVE prctl() set min/max
5866 13:53:41.399483 # ok 7 SVE vector length used default
5867 13:53:41.399570 # ok 8 SVE vector length was inherited
5868 13:53:41.399679 # ok 9 SVE vector length set on exec
5869 13:53:41.399769 # ok 10 SVE prctl() set all VLs, 0 errors
5870 13:53:41.399855 # ok 11 SME default vector length 32
5871 13:53:41.399942 # ok 12 SME minimum vector length 16
5872 13:53:41.400031 # ok 13 SME maximum vector length 256
5873 13:53:41.400135 # ok 14 SME current VL is 32
5874 13:53:41.400223 # ok 15 SME set VL 32 and have VL 32
5875 13:53:41.400312 # ok 16 SME prctl() set min/max
5876 13:53:41.400401 # ok 17 SME vector length used default
5877 13:53:41.400509 # ok 18 SME vector length was inherited
5878 13:53:41.400601 # ok 19 SME vector length set on exec
5879 13:53:41.400691 # ok 20 SME prctl() set all VLs, 0 errors
5880 13:53:41.400778 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5881 13:53:41.416928 ok 32 selftests: arm64: vec-syscfg
5882 13:53:41.514209 # selftests: arm64: za-fork
5883 13:53:41.702057 # TAP version 13
5884 13:53:41.702539 # 1..1
5885 13:53:41.702675 # # PID: 1014
5886 13:53:41.702797 # ok 1 fork_test
5887 13:53:41.702913 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5888 13:53:41.725267 ok 33 selftests: arm64: za-fork
5889 13:53:41.863186 # selftests: arm64: za-ptrace
5890 13:53:42.007850 # TAP version 13
5891 13:53:42.008152 # 1..1536
5892 13:53:42.008292 # # Parent is 1032, child is 1033
5893 13:53:42.008428 # ok 1 Set VL 16
5894 13:53:42.008556 # ok 2 Disabled ZA for VL 16
5895 13:53:42.008702 # ok 3 Data match for VL 16
5896 13:53:42.008828 # ok 4 Set VL 32
5897 13:53:42.008956 # ok 5 Disabled ZA for VL 32
5898 13:53:42.009746 # ok 6 Data match for VL 32
5899 13:53:42.010007 # ok 7 Set VL 48
5900 13:53:42.010259 # ok 8 # SKIP Disabled ZA for VL 48
5901 13:53:42.010478 # ok 9 # SKIP Get and set data for VL 48
5902 13:53:42.010702 # ok 10 Set VL 64
5903 13:53:42.010883 # ok 11 Disabled ZA for VL 64
5904 13:53:42.011080 # ok 12 Data match for VL 64
5905 13:53:42.011241 # ok 13 Set VL 80
5906 13:53:42.011392 # ok 14 # SKIP Disabled ZA for VL 80
5907 13:53:42.011582 # ok 15 # SKIP Get and set data for VL 80
5908 13:53:42.011730 # ok 16 Set VL 96
5909 13:53:42.011897 # ok 17 # SKIP Disabled ZA for VL 96
5910 13:53:42.012051 # ok 18 # SKIP Get and set data for VL 96
5911 13:53:42.012177 # ok 19 Set VL 112
5912 13:53:42.012337 # ok 20 # SKIP Disabled ZA for VL 112
5913 13:53:42.012503 # ok 21 # SKIP Get and set data for VL 112
5914 13:53:42.012629 # ok 22 Set VL 128
5915 13:53:42.012756 # ok 23 Disabled ZA for VL 128
5916 13:53:42.012871 # ok 24 Data match for VL 128
5917 13:53:42.012987 # ok 25 Set VL 144
5918 13:53:42.013110 # ok 26 # SKIP Disabled ZA for VL 144
5919 13:53:42.013224 # ok 27 # SKIP Get and set data for VL 144
5920 13:53:42.013339 # ok 28 Set VL 160
5921 13:53:42.013462 # ok 29 # SKIP Disabled ZA for VL 160
5922 13:53:42.013576 # ok 30 # SKIP Get and set data for VL 160
5923 13:53:42.013797 # ok 31 Set VL 176
5924 13:53:42.014003 # ok 32 # SKIP Disabled ZA for VL 176
5925 13:53:42.014189 # ok 33 # SKIP Get and set data for VL 176
5926 13:53:42.014376 # ok 34 Set VL 192
5927 13:53:42.014559 # ok 35 # SKIP Disabled ZA for VL 192
5928 13:53:42.014713 # ok 36 # SKIP Get and set data for VL 192
5929 13:53:42.014856 # ok 37 Set VL 208
5930 13:53:42.014999 # ok 38 # SKIP Disabled ZA for VL 208
5931 13:53:42.016612 # ok 39 # SKIP Get and set data for VL 208
5932 13:53:42.016950 # ok 40 Set VL 224
5933 13:53:42.017058 # ok 41 # SKIP Disabled ZA for VL 224
5934 13:53:42.017148 # ok 42 # SKIP Get and set data for VL 224
5935 13:53:42.017235 # ok 43 Set VL 240
5936 13:53:42.017321 # ok 44 # SKIP Disabled ZA for VL 240
5937 13:53:42.017425 # ok 45 # SKIP Get and set data for VL 240
5938 13:53:42.017515 # ok 46 Set VL 256
5939 13:53:42.017603 # ok 47 Disabled ZA for VL 256
5940 13:53:42.017698 # ok 48 Data match for VL 256
5941 13:53:42.017802 # ok 49 Set VL 272
5942 13:53:42.017956 # ok 50 # SKIP Disabled ZA for VL 272
5943 13:53:42.018060 # ok 51 # SKIP Get and set data for VL 272
5944 13:53:42.018148 # ok 52 Set VL 288
5945 13:53:42.018250 # ok 53 # SKIP Disabled ZA for VL 288
5946 13:53:42.018343 # ok 54 # SKIP Get and set data for VL 288
5947 13:53:42.018642 # ok 55 Set VL 304
5948 13:53:42.018745 # ok 56 # SKIP Disabled ZA for VL 304
5949 13:53:42.019086 # ok 57 # SKIP Get and set data for VL 304
5950 13:53:42.019188 # ok 58 Set VL 320
5951 13:53:42.019273 # ok 59 # SKIP Disabled ZA for VL 320
5952 13:53:42.019357 # ok 60 # SKIP Get and set data for VL 320
5953 13:53:42.019440 # ok 61 Set VL 336
5954 13:53:42.019521 # ok 62 # SKIP Disabled ZA for VL 336
5955 13:53:42.019602 # ok 63 # SKIP Get and set data for VL 336
5956 13:53:42.019699 # ok 64 Set VL 352
5957 13:53:42.019783 # ok 65 # SKIP Disabled ZA for VL 352
5958 13:53:42.019865 # ok 66 # SKIP Get and set data for VL 352
5959 13:53:42.019943 # ok 67 Set VL 368
5960 13:53:42.020034 # ok 68 # SKIP Disabled ZA for VL 368
5961 13:53:42.020110 # ok 69 # SKIP Get and set data for VL 368
5962 13:53:42.020182 # ok 70 Set VL 384
5963 13:53:42.024625 # ok 71 # SKIP Disabled ZA for VL 384
5964 13:53:42.025167 # ok 72 # SKIP Get and set data for VL 384
5965 13:53:42.025394 # ok 73 Set VL 400
5966 13:53:42.025660 # ok 74 # SKIP Disabled ZA for VL 400
5967 13:53:42.025926 # ok 75 # SKIP Get and set data for VL 400
5968 13:53:42.026152 # ok 76 Set VL 416
5969 13:53:42.026352 # ok 77 # SKIP Disabled ZA for VL 416
5970 13:53:42.026526 # ok 78 # SKIP Get and set data for VL 416
5971 13:53:42.026737 # ok 79 Set VL 432
5972 13:53:42.026979 # ok 80 # SKIP Disabled ZA for VL 432
5973 13:53:42.027153 # ok 81 # SKIP Get and set data for VL 432
5974 13:53:42.027293 # ok 82 Set VL 448
5975 13:53:42.027449 # ok 83 # SKIP Disabled ZA for VL 448
5976 13:53:42.027605 # ok 84 # SKIP Get and set data for VL 448
5977 13:53:42.027761 # ok 85 Set VL 464
5978 13:53:42.027908 # ok 86 # SKIP Disabled ZA for VL 464
5979 13:53:42.028101 # ok 87 # SKIP Get and set data for VL 464
5980 13:53:42.028273 # ok 88 Set VL 480
5981 13:53:42.028430 # ok 89 # SKIP Disabled ZA for VL 480
5982 13:53:42.028548 # ok 90 # SKIP Get and set data for VL 480
5983 13:53:42.028662 # ok 91 Set VL 496
5984 13:53:42.028772 # ok 92 # SKIP Disabled ZA for VL 496
5985 13:53:42.028884 # ok 93 # SKIP Get and set data for VL 496
5986 13:53:42.028997 # ok 94 Set VL 512
5987 13:53:42.029661 # ok 95 # SKIP Disabled ZA for VL 512
5988 13:53:42.029794 # ok 96 # SKIP Get and set data for VL 512
5989 13:53:42.029909 # ok 97 Set VL 528
5990 13:53:42.030021 # ok 98 # SKIP Disabled ZA for VL 528
5991 13:53:42.034970 # ok 99 # SKIP Get and set data for VL 528
5992 13:53:42.035154 # ok 100 Set VL 544
5993 13:53:42.035244 # ok 101 # SKIP Disabled ZA for VL 544
5994 13:53:42.035553 # ok 102 # SKIP Get and set data for VL 544
5995 13:53:42.035660 # ok 103 Set VL 560
5996 13:53:42.035749 # ok 104 # SKIP Disabled ZA for VL 560
5997 13:53:42.035833 # ok 105 # SKIP Get and set data for VL 560
5998 13:53:42.035916 # ok 106 Set VL 576
5999 13:53:42.035999 # ok 107 # SKIP Disabled ZA for VL 576
6000 13:53:42.036096 # ok 108 # SKIP Get and set data for VL 576
6001 13:53:42.036182 # ok 109 Set VL 592
6002 13:53:42.036257 # ok 110 # SKIP Disabled ZA for VL 592
6003 13:53:42.036344 # ok 111 # SKIP Get and set data for VL 592
6004 13:53:42.036420 # ok 112 Set VL 608
6005 13:53:42.036987 # ok 113 # SKIP Disabled ZA for VL 608
6006 13:53:42.037472 # ok 114 # SKIP Get and set data for VL 608
6007 13:53:42.037680 # ok 115 Set VL 624
6008 13:53:42.037847 # ok 116 # SKIP Disabled ZA for VL 624
6009 13:53:42.038100 # ok 117 # SKIP Get and set data for VL 624
6010 13:53:42.038288 # ok 118 Set VL 640
6011 13:53:42.038455 # ok 119 # SKIP Disabled ZA for VL 640
6012 13:53:42.038688 # ok 120 # SKIP Get and set data for VL 640
6013 13:53:42.038864 # ok 121 Set VL 656
6014 13:53:42.039063 # ok 122 # SKIP Disabled ZA for VL 656
6015 13:53:42.039264 # ok 123 # SKIP Get and set data for VL 656
6016 13:53:42.039479 # ok 124 Set VL 672
6017 13:53:42.061609 # ok 125 # SKIP Disabled ZA for VL 672
6018 13:53:42.061845 # ok 126 # SKIP Get and set data for VL 672
6019 13:53:42.061958 # ok 127 Set VL 688
6020 13:53:42.062050 # ok 128 # SKIP Disabled ZA for VL 688
6021 13:53:42.062139 # ok 129 # SKIP Get and set data for VL 688
6022 13:53:42.062226 # ok 130 Set VL 704
6023 13:53:42.062312 # ok 131 # SKIP Disabled ZA for VL 704
6024 13:53:42.062418 # ok 132 # SKIP Get and set data for VL 704
6025 13:53:42.062510 # ok 133 Set VL 720
6026 13:53:42.062596 # ok 134 # SKIP Disabled ZA for VL 720
6027 13:53:42.062681 # ok 135 # SKIP Get and set data for VL 720
6028 13:53:42.062783 # ok 136 Set VL 736
6029 13:53:42.062871 # ok 137 # SKIP Disabled ZA for VL 736
6030 13:53:42.062955 # ok 138 # SKIP Get and set data for VL 736
6031 13:53:42.063040 # ok 139 Set VL 752
6032 13:53:42.063141 # ok 140 # SKIP Disabled ZA for VL 752
6033 13:53:42.063228 # ok 141 # SKIP Get and set data for VL 752
6034 13:53:42.063313 # ok 142 Set VL 768
6035 13:53:42.063415 # ok 143 # SKIP Disabled ZA for VL 768
6036 13:53:42.063507 # ok 144 # SKIP Get and set data for VL 768
6037 13:53:42.063607 # ok 145 Set VL 784
6038 13:53:42.063695 # ok 146 # SKIP Disabled ZA for VL 784
6039 13:53:42.063795 # ok 147 # SKIP Get and set data for VL 784
6040 13:53:42.063882 # ok 148 Set VL 800
6041 13:53:42.063980 # ok 149 # SKIP Disabled ZA for VL 800
6042 13:53:42.067204 # ok 150 # SKIP Get and set data for VL 800
6043 13:53:42.067562 # ok 151 Set VL 816
6044 13:53:42.067657 # ok 152 # SKIP Disabled ZA for VL 816
6045 13:53:42.067746 # ok 153 # SKIP Get and set data for VL 816
6046 13:53:42.068032 # ok 154 Set VL 832
6047 13:53:42.068130 # ok 155 # SKIP Disabled ZA for VL 832
6048 13:53:42.068206 # ok 156 # SKIP Get and set data for VL 832
6049 13:53:42.068280 # ok 157 Set VL 848
6050 13:53:42.068353 # ok 158 # SKIP Disabled ZA for VL 848
6051 13:53:42.068431 # ok 159 # SKIP Get and set data for VL 848
6052 13:53:42.069615 # ok 160 Set VL 864
6053 13:53:42.070024 # ok 161 # SKIP Disabled ZA for VL 864
6054 13:53:42.070180 # ok 162 # SKIP Get and set data for VL 864
6055 13:53:42.070287 # ok 163 Set VL 880
6056 13:53:42.070375 # ok 164 # SKIP Disabled ZA for VL 880
6057 13:53:42.070464 # ok 165 # SKIP Get and set data for VL 880
6058 13:53:42.070550 # ok 166 Set VL 896
6059 13:53:42.070633 # ok 167 # SKIP Disabled ZA for VL 896
6060 13:53:42.070715 # ok 168 # SKIP Get and set data for VL 896
6061 13:53:42.070798 # ok 169 Set VL 912
6062 13:53:42.070881 # ok 170 # SKIP Disabled ZA for VL 912
6063 13:53:42.070963 # ok 171 # SKIP Get and set data for VL 912
6064 13:53:42.071049 # ok 172 Set VL 928
6065 13:53:42.071130 # ok 173 # SKIP Disabled ZA for VL 928
6066 13:53:42.071211 # ok 174 # SKIP Get and set data for VL 928
6067 13:53:42.071293 # ok 175 Set VL 944
6068 13:53:42.071590 # ok 176 # SKIP Disabled ZA for VL 944
6069 13:53:42.071695 # ok 177 # SKIP Get and set data for VL 944
6070 13:53:42.071783 # ok 178 Set VL 960
6071 13:53:42.071868 # ok 179 # SKIP Disabled ZA for VL 960
6072 13:53:42.071954 # ok 180 # SKIP Get and set data for VL 960
6073 13:53:42.072038 # ok 181 Set VL 976
6074 13:53:42.072116 # ok 182 # SKIP Disabled ZA for VL 976
6075 13:53:42.072192 # ok 183 # SKIP Get and set data for VL 976
6076 13:53:42.072267 # ok 184 Set VL 992
6077 13:53:42.072339 # ok 185 # SKIP Disabled ZA for VL 992
6078 13:53:42.072412 # ok 186 # SKIP Get and set data for VL 992
6079 13:53:42.072484 # ok 187 Set VL 1008
6080 13:53:42.072555 # ok 188 # SKIP Disabled ZA for VL 1008
6081 13:53:42.072632 # ok 189 # SKIP Get and set data for VL 1008
6082 13:53:42.072707 # ok 190 Set VL 1024
6083 13:53:42.072783 # ok 191 # SKIP Disabled ZA for VL 1024
6084 13:53:42.072879 # ok 192 # SKIP Get and set data for VL 1024
6085 13:53:42.072966 # ok 193 Set VL 1040
6086 13:53:42.073050 # ok 194 # SKIP Disabled ZA for VL 1040
6087 13:53:42.073134 # ok 195 # SKIP Get and set data for VL 1040
6088 13:53:42.081683 # ok 196 Set VL 1056
6089 13:53:42.082224 # ok 197 # SKIP Disabled ZA for VL 1056
6090 13:53:42.082493 # ok 198 # SKIP Get and set data for VL 1056
6091 13:53:42.082614 # ok 199 Set VL 1072
6092 13:53:42.082726 # ok 200 # SKIP Disabled ZA for VL 1072
6093 13:53:42.082848 # ok 201 # SKIP Get and set data for VL 1072
6094 13:53:42.082938 # ok 202 Set VL 1088
6095 13:53:42.083024 # ok 203 # SKIP Disabled ZA for VL 1088
6096 13:53:42.083122 # ok 204 # SKIP Get and set data for VL 1088
6097 13:53:42.083209 # ok 205 Set VL 1104
6098 13:53:42.083280 # ok 206 # SKIP Disabled ZA for VL 1104
6099 13:53:42.083391 # ok 207 # SKIP Get and set data for VL 1104
6100 13:53:42.083484 # ok 208 Set VL 1120
6101 13:53:42.083564 # ok 209 # SKIP Disabled ZA for VL 1120
6102 13:53:42.083638 # ok 210 # SKIP Get and set data for VL 1120
6103 13:53:42.083719 # ok 211 Set VL 1136
6104 13:53:42.083821 # ok 212 # SKIP Disabled ZA for VL 1136
6105 13:53:42.083901 # ok 213 # SKIP Get and set data for VL 1136
6106 13:53:42.083995 # ok 214 Set VL 1152
6107 13:53:42.084082 # ok 215 # SKIP Disabled ZA for VL 1152
6108 13:53:42.084162 # ok 216 # SKIP Get and set data for VL 1152
6109 13:53:42.084226 # ok 217 Set VL 1168
6110 13:53:42.084822 # ok 218 # SKIP Disabled ZA for VL 1168
6111 13:53:42.084968 # ok 219 # SKIP Get and set data for VL 1168
6112 13:53:42.085102 # ok 220 Set VL 1184
6113 13:53:42.085203 # ok 221 # SKIP Disabled ZA for VL 1184
6114 13:53:42.085319 # ok 222 # SKIP Get and set data for VL 1184
6115 13:53:42.085421 # ok 223 Set VL 1200
6116 13:53:42.085533 # ok 224 # SKIP Disabled ZA for VL 1200
6117 13:53:42.085625 # ok 225 # SKIP Get and set data for VL 1200
6118 13:53:42.085716 # ok 226 Set VL 1216
6119 13:53:42.085794 # ok 227 # SKIP Disabled ZA for VL 1216
6120 13:53:42.085897 # ok 228 # SKIP Get and set data for VL 1216
6121 13:53:42.086015 # ok 229 Set VL 1232
6122 13:53:42.086409 # ok 230 # SKIP Disabled ZA for VL 1232
6123 13:53:42.086542 # ok 231 # SKIP Get and set data for VL 1232
6124 13:53:42.086655 # ok 232 Set VL 1248
6125 13:53:42.086792 # ok 233 # SKIP Disabled ZA for VL 1248
6126 13:53:42.086886 # ok 234 # SKIP Get and set data for VL 1248
6127 13:53:42.086978 # ok 235 Set VL 1264
6128 13:53:42.087767 # ok 236 # SKIP Disabled ZA for VL 1264
6129 13:53:42.087921 # ok 237 # SKIP Get and set data for VL 1264
6130 13:53:42.088070 # ok 238 Set VL 1280
6131 13:53:42.088342 # ok 239 # SKIP Disabled ZA for VL 1280
6132 13:53:42.088416 # ok 240 # SKIP Get and set data for VL 1280
6133 13:53:42.088501 # ok 241 Set VL 1296
6134 13:53:42.088570 # ok 242 # SKIP Disabled ZA for VL 1296
6135 13:53:42.088632 # ok 243 # SKIP Get and set data for VL 1296
6136 13:53:42.088691 # ok 244 Set VL 1312
6137 13:53:42.088750 # ok 245 # SKIP Disabled ZA for VL 1312
6138 13:53:42.088810 # ok 246 # SKIP Get and set data for VL 1312
6139 13:53:42.097953 # ok 247 Set VL 1328
6140 13:53:42.098168 # ok 248 # SKIP Disabled ZA for VL 1328
6141 13:53:42.098266 # ok 249 # SKIP Get and set data for VL 1328
6142 13:53:42.098351 # ok 250 Set VL 1344
6143 13:53:42.098445 # ok 251 # SKIP Disabled ZA for VL 1344
6144 13:53:42.098548 # ok 252 # SKIP Get and set data for VL 1344
6145 13:53:42.098648 # ok 253 Set VL 1360
6146 13:53:42.098968 # ok 254 # SKIP Disabled ZA for VL 1360
6147 13:53:42.099077 # ok 255 # SKIP Get and set data for VL 1360
6148 13:53:42.099169 # ok 256 Set VL 1376
6149 13:53:42.099258 # ok 257 # SKIP Disabled ZA for VL 1376
6150 13:53:42.099343 # ok 258 # SKIP Get and set data for VL 1376
6151 13:53:42.099431 # ok 259 Set VL 1392
6152 13:53:42.099521 # ok 260 # SKIP Disabled ZA for VL 1392
6153 13:53:42.099609 # ok 261 # SKIP Get and set data for VL 1392
6154 13:53:42.099699 # ok 262 Set VL 1408
6155 13:53:42.099785 # ok 263 # SKIP Disabled ZA for VL 1408
6156 13:53:42.099889 # ok 264 # SKIP Get and set data for VL 1408
6157 13:53:42.100207 # ok 265 Set VL 1424
6158 13:53:42.100304 # ok 266 # SKIP Disabled ZA for VL 1424
6159 13:53:42.100394 # ok 267 # SKIP Get and set data for VL 1424
6160 13:53:42.100482 # ok 268 Set VL 1440
6161 13:53:42.100597 # ok 269 # SKIP Disabled ZA for VL 1440
6162 13:53:42.100692 # ok 270 # SKIP Get and set data for VL 1440
6163 13:53:42.100783 # ok 271 Set VL 1456
6164 13:53:42.100870 # ok 272 # SKIP Disabled ZA for VL 1456
6165 13:53:42.100958 # ok 273 # SKIP Get and set data for VL 1456
6166 13:53:42.101047 # ok 274 Set VL 1472
6167 13:53:42.104028 # ok 275 # SKIP Disabled ZA for VL 1472
6168 13:53:42.104440 # ok 276 # SKIP Get and set data for VL 1472
6169 13:53:42.125081 # ok 277 Set VL 1488
6170 13:53:42.125550 # ok 278 # SKIP Disabled ZA for VL 1488
6171 13:53:42.125676 # ok 279 # SKIP Get and set data for VL 1488
6172 13:53:42.125784 # ok 280 Set VL 1504
6173 13:53:42.125877 # ok 281 # SKIP Disabled ZA for VL 1504
6174 13:53:42.125961 # ok 282 # SKIP Get and set data for VL 1504
6175 13:53:42.126044 # ok 283 Set VL 1520
6176 13:53:42.126144 # ok 284 # SKIP Disabled ZA for VL 1520
6177 13:53:42.126230 # ok 285 # SKIP Get and set data for VL 1520
6178 13:53:42.126315 # ok 286 Set VL 1536
6179 13:53:42.126403 # ok 287 # SKIP Disabled ZA for VL 1536
6180 13:53:42.126492 # ok 288 # SKIP Get and set data for VL 1536
6181 13:53:42.126593 # ok 289 Set VL 1552
6182 13:53:42.126682 # ok 290 # SKIP Disabled ZA for VL 1552
6183 13:53:42.126770 # ok 291 # SKIP Get and set data for VL 1552
6184 13:53:42.126858 # ok 292 Set VL 1568
6185 13:53:42.126959 # ok 293 # SKIP Disabled ZA for VL 1568
6186 13:53:42.127045 # ok 294 # SKIP Get and set data for VL 1568
6187 13:53:42.127123 # ok 295 Set VL 1584
6188 13:53:42.127217 # ok 296 # SKIP Disabled ZA for VL 1584
6189 13:53:42.127336 # ok 297 # SKIP Get and set data for VL 1584
6190 13:53:42.127410 # ok 298 Set VL 1600
6191 13:53:42.127489 # ok 299 # SKIP Disabled ZA for VL 1600
6192 13:53:42.127588 # ok 300 # SKIP Get and set data for VL 1600
6193 13:53:42.127687 # ok 301 Set VL 1616
6194 13:53:42.127787 # ok 302 # SKIP Disabled ZA for VL 1616
6195 13:53:42.128091 # ok 303 # SKIP Get and set data for VL 1616
6196 13:53:42.128200 # ok 304 Set VL 1632
6197 13:53:42.141626 # ok 305 # SKIP Disabled ZA for VL 1632
6198 13:53:42.141869 # ok 306 # SKIP Get and set data for VL 1632
6199 13:53:42.142186 # ok 307 Set VL 1648
6200 13:53:42.142289 # ok 308 # SKIP Disabled ZA for VL 1648
6201 13:53:42.142381 # ok 309 # SKIP Get and set data for VL 1648
6202 13:53:42.142465 # ok 310 Set VL 1664
6203 13:53:42.142544 # ok 311 # SKIP Disabled ZA for VL 1664
6204 13:53:42.142644 # ok 312 # SKIP Get and set data for VL 1664
6205 13:53:42.142769 # ok 313 Set VL 1680
6206 13:53:42.142870 # ok 314 # SKIP Disabled ZA for VL 1680
6207 13:53:42.142976 # ok 315 # SKIP Get and set data for VL 1680
6208 13:53:42.143078 # ok 316 Set VL 1696
6209 13:53:42.143187 # ok 317 # SKIP Disabled ZA for VL 1696
6210 13:53:42.143308 # ok 318 # SKIP Get and set data for VL 1696
6211 13:53:42.143414 # ok 319 Set VL 1712
6212 13:53:42.143494 # ok 320 # SKIP Disabled ZA for VL 1712
6213 13:53:42.143577 # ok 321 # SKIP Get and set data for VL 1712
6214 13:53:42.143677 # ok 322 Set VL 1728
6215 13:53:42.143790 # ok 323 # SKIP Disabled ZA for VL 1728
6216 13:53:42.143907 # ok 324 # SKIP Get and set data for VL 1728
6217 13:53:42.144010 # ok 325 Set VL 1744
6218 13:53:42.144132 # ok 326 # SKIP Disabled ZA for VL 1744
6219 13:53:42.144215 # ok 327 # SKIP Get and set data for VL 1744
6220 13:53:42.144283 # ok 328 Set VL 1760
6221 13:53:42.173720 # ok 329 # SKIP Disabled ZA for VL 1760
6222 13:53:42.173981 # ok 330 # SKIP Get and set data for VL 1760
6223 13:53:42.174079 # ok 331 Set VL 1776
6224 13:53:42.174392 # ok 332 # SKIP Disabled ZA for VL 1776
6225 13:53:42.174500 # ok 333 # SKIP Get and set data for VL 1776
6226 13:53:42.174591 # ok 334 Set VL 1792
6227 13:53:42.174683 # ok 335 # SKIP Disabled ZA for VL 1792
6228 13:53:42.174770 # ok 336 # SKIP Get and set data for VL 1792
6229 13:53:42.174854 # ok 337 Set VL 1808
6230 13:53:42.174973 # ok 338 # SKIP Disabled ZA for VL 1808
6231 13:53:42.175071 # ok 339 # SKIP Get and set data for VL 1808
6232 13:53:42.175171 # ok 340 Set VL 1824
6233 13:53:42.175268 # ok 341 # SKIP Disabled ZA for VL 1824
6234 13:53:42.175359 # ok 342 # SKIP Get and set data for VL 1824
6235 13:53:42.175445 # ok 343 Set VL 1840
6236 13:53:42.175530 # ok 344 # SKIP Disabled ZA for VL 1840
6237 13:53:42.175638 # ok 345 # SKIP Get and set data for VL 1840
6238 13:53:42.175731 # ok 346 Set VL 1856
6239 13:53:42.175820 # ok 347 # SKIP Disabled ZA for VL 1856
6240 13:53:42.175908 # ok 348 # SKIP Get and set data for VL 1856
6241 13:53:42.175994 # ok 349 Set VL 1872
6242 13:53:42.176086 # ok 350 # SKIP Disabled ZA for VL 1872
6243 13:53:42.176171 # ok 351 # SKIP Get and set data for VL 1872
6244 13:53:42.176275 # ok 352 Set VL 1888
6245 13:53:42.176363 # ok 353 # SKIP Disabled ZA for VL 1888
6246 13:53:42.176452 # ok 354 # SKIP Get and set data for VL 1888
6247 13:53:42.176539 # ok 355 Set VL 1904
6248 13:53:42.183923 # ok 356 # SKIP Disabled ZA for VL 1904
6249 13:53:42.184439 # ok 357 # SKIP Get and set data for VL 1904
6250 13:53:42.184599 # ok 358 Set VL 1920
6251 13:53:42.190232 # ok 359 # SKIP Disabled ZA for VL 1920
6252 13:53:42.190461 # ok 360 # SKIP Get and set data for VL 1920
6253 13:53:42.190553 # ok 361 Set VL 1936
6254 13:53:42.190655 # ok 362 # SKIP Disabled ZA for VL 1936
6255 13:53:42.190744 # ok 363 # SKIP Get and set data for VL 1936
6256 13:53:42.190830 # ok 364 Set VL 1952
6257 13:53:42.190934 # ok 365 # SKIP Disabled ZA for VL 1952
6258 13:53:42.191026 # ok 366 # SKIP Get and set data for VL 1952
6259 13:53:42.191115 # ok 367 Set VL 1968
6260 13:53:42.191214 # ok 368 # SKIP Disabled ZA for VL 1968
6261 13:53:42.191315 # ok 369 # SKIP Get and set data for VL 1968
6262 13:53:42.191403 # ok 370 Set VL 1984
6263 13:53:42.191489 # ok 371 # SKIP Disabled ZA for VL 1984
6264 13:53:42.191591 # ok 372 # SKIP Get and set data for VL 1984
6265 13:53:42.191695 # ok 373 Set VL 2000
6266 13:53:42.191802 # ok 374 # SKIP Disabled ZA for VL 2000
6267 13:53:42.191905 # ok 375 # SKIP Get and set data for VL 2000
6268 13:53:42.191993 # ok 376 Set VL 2016
6269 13:53:42.192091 # ok 377 # SKIP Disabled ZA for VL 2016
6270 13:53:42.192184 # ok 378 # SKIP Get and set data for VL 2016
6271 13:53:42.206994 # ok 379 Set VL 2032
6272 13:53:42.207237 # ok 380 # SKIP Disabled ZA for VL 2032
6273 13:53:42.207451 # ok 381 # SKIP Get and set data for VL 2032
6274 13:53:42.207545 # ok 382 Set VL 2048
6275 13:53:42.207631 # ok 383 # SKIP Disabled ZA for VL 2048
6276 13:53:42.207722 # ok 384 # SKIP Get and set data for VL 2048
6277 13:53:42.208023 # ok 385 Set VL 2064
6278 13:53:42.208126 # ok 386 # SKIP Disabled ZA for VL 2064
6279 13:53:42.208210 # ok 387 # SKIP Get and set data for VL 2064
6280 13:53:42.208286 # ok 388 Set VL 2080
6281 13:53:42.208360 # ok 389 # SKIP Disabled ZA for VL 2080
6282 13:53:42.208433 # ok 390 # SKIP Get and set data for VL 2080
6283 13:53:42.208508 # ok 391 Set VL 2096
6284 13:53:42.208582 # ok 392 # SKIP Disabled ZA for VL 2096
6285 13:53:42.208655 # ok 393 # SKIP Get and set data for VL 2096
6286 13:53:42.208738 # ok 394 Set VL 2112
6287 13:53:42.208811 # ok 395 # SKIP Disabled ZA for VL 2112
6288 13:53:42.208883 # ok 396 # SKIP Get and set data for VL 2112
6289 13:53:42.208955 # ok 397 Set VL 2128
6290 13:53:42.209050 # ok 398 # SKIP Disabled ZA for VL 2128
6291 13:53:42.219051 # ok 399 # SKIP Get and set data for VL 2128
6292 13:53:42.219262 # ok 400 Set VL 2144
6293 13:53:42.220153 # ok 401 # SKIP Disabled ZA for VL 2144
6294 13:53:42.220253 # ok 402 # SKIP Get and set data for VL 2144
6295 13:53:42.220333 # ok 403 Set VL 2160
6296 13:53:42.220407 # ok 404 # SKIP Disabled ZA for VL 2160
6297 13:53:42.220481 # ok 405 # SKIP Get and set data for VL 2160
6298 13:53:42.220555 # ok 406 Set VL 2176
6299 13:53:42.220629 # ok 407 # SKIP Disabled ZA for VL 2176
6300 13:53:42.220705 # ok 408 # SKIP Get and set data for VL 2176
6301 13:53:42.221816 # ok 409 Set VL 2192
6302 13:53:42.222052 # ok 410 # SKIP Disabled ZA for VL 2192
6303 13:53:42.222248 # ok 411 # SKIP Get and set data for VL 2192
6304 13:53:42.222546 # ok 412 Set VL 2208
6305 13:53:42.222869 # ok 413 # SKIP Disabled ZA for VL 2208
6306 13:53:42.223030 # ok 414 # SKIP Get and set data for VL 2208
6307 13:53:42.223124 # ok 415 Set VL 2224
6308 13:53:42.223209 # ok 416 # SKIP Disabled ZA for VL 2224
6309 13:53:42.223314 # ok 417 # SKIP Get and set data for VL 2224
6310 13:53:42.223404 # ok 418 Set VL 2240
6311 13:53:42.223491 # ok 419 # SKIP Disabled ZA for VL 2240
6312 13:53:42.223576 # ok 420 # SKIP Get and set data for VL 2240
6313 13:53:42.223663 # ok 421 Set VL 2256
6314 13:53:42.223748 # ok 422 # SKIP Disabled ZA for VL 2256
6315 13:53:42.223849 # ok 423 # SKIP Get and set data for VL 2256
6316 13:53:42.223938 # ok 424 Set VL 2272
6317 13:53:42.224041 # ok 425 # SKIP Disabled ZA for VL 2272
6318 13:53:42.224129 # ok 426 # SKIP Get and set data for VL 2272
6319 13:53:42.224484 # ok 427 Set VL 2288
6320 13:53:42.224583 # ok 428 # SKIP Disabled ZA for VL 2288
6321 13:53:42.224662 # ok 429 # SKIP Get and set data for VL 2288
6322 13:53:42.224737 # ok 430 Set VL 2304
6323 13:53:42.234026 # ok 431 # SKIP Disabled ZA for VL 2304
6324 13:53:42.235157 # ok 432 # SKIP Get and set data for VL 2304
6325 13:53:42.235253 # ok 433 Set VL 2320
6326 13:53:42.235341 # ok 434 # SKIP Disabled ZA for VL 2320
6327 13:53:42.235427 # ok 435 # SKIP Get and set data for VL 2320
6328 13:53:42.235735 # ok 436 Set VL 2336
6329 13:53:42.235845 # ok 437 # SKIP Disabled ZA for VL 2336
6330 13:53:42.235935 # ok 438 # SKIP Get and set data for VL 2336
6331 13:53:42.236020 # ok 439 Set VL 2352
6332 13:53:42.236306 # ok 440 # SKIP Disabled ZA for VL 2352
6333 13:53:42.236402 # ok 441 # SKIP Get and set data for VL 2352
6334 13:53:42.236480 # ok 442 Set VL 2368
6335 13:53:42.236556 # ok 443 # SKIP Disabled ZA for VL 2368
6336 13:53:42.236630 # ok 444 # SKIP Get and set data for VL 2368
6337 13:53:42.236706 # ok 445 Set VL 2384
6338 13:53:42.236781 # ok 446 # SKIP Disabled ZA for VL 2384
6339 13:53:42.236855 # ok 447 # SKIP Get and set data for VL 2384
6340 13:53:42.236928 # ok 448 Set VL 2400
6341 13:53:42.237002 # ok 449 # SKIP Disabled ZA for VL 2400
6342 13:53:42.237077 # ok 450 # SKIP Get and set data for VL 2400
6343 13:53:42.237150 # ok 451 Set VL 2416
6344 13:53:42.237224 # ok 452 # SKIP Disabled ZA for VL 2416
6345 13:53:42.237299 # ok 453 # SKIP Get and set data for VL 2416
6346 13:53:42.237376 # ok 454 Set VL 2432
6347 13:53:42.237453 # ok 455 # SKIP Disabled ZA for VL 2432
6348 13:53:42.237531 # ok 456 # SKIP Get and set data for VL 2432
6349 13:53:42.242134 # ok 457 Set VL 2448
6350 13:53:42.242381 # ok 458 # SKIP Disabled ZA for VL 2448
6351 13:53:42.242637 # ok 459 # SKIP Get and set data for VL 2448
6352 13:53:42.242838 # ok 460 Set VL 2464
6353 13:53:42.242997 # ok 461 # SKIP Disabled ZA for VL 2464
6354 13:53:42.243090 # ok 462 # SKIP Get and set data for VL 2464
6355 13:53:42.243279 # ok 463 Set VL 2480
6356 13:53:42.243374 # ok 464 # SKIP Disabled ZA for VL 2480
6357 13:53:42.243461 # ok 465 # SKIP Get and set data for VL 2480
6358 13:53:42.243563 # ok 466 Set VL 2496
6359 13:53:42.243862 # ok 467 # SKIP Disabled ZA for VL 2496
6360 13:53:42.243960 # ok 468 # SKIP Get and set data for VL 2496
6361 13:53:42.244048 # ok 469 Set VL 2512
6362 13:53:42.244130 # ok 470 # SKIP Disabled ZA for VL 2512
6363 13:53:42.244216 # ok 471 # SKIP Get and set data for VL 2512
6364 13:53:42.244292 # ok 472 Set VL 2528
6365 13:53:42.245854 # ok 473 # SKIP Disabled ZA for VL 2528
6366 13:53:42.246014 # ok 474 # SKIP Get and set data for VL 2528
6367 13:53:42.246164 # ok 475 Set VL 2544
6368 13:53:42.246375 # ok 476 # SKIP Disabled ZA for VL 2544
6369 13:53:42.246468 # ok 477 # SKIP Get and set data for VL 2544
6370 13:53:42.246553 # ok 478 Set VL 2560
6371 13:53:42.246634 # ok 479 # SKIP Disabled ZA for VL 2560
6372 13:53:42.246716 # ok 480 # SKIP Get and set data for VL 2560
6373 13:53:42.246798 # ok 481 Set VL 2576
6374 13:53:42.246881 # ok 482 # SKIP Disabled ZA for VL 2576
6375 13:53:42.246964 # ok 483 # SKIP Get and set data for VL 2576
6376 13:53:42.247048 # ok 484 Set VL 2592
6377 13:53:42.247128 # ok 485 # SKIP Disabled ZA for VL 2592
6378 13:53:42.247211 # ok 486 # SKIP Get and set data for VL 2592
6379 13:53:42.247294 # ok 487 Set VL 2608
6380 13:53:42.247631 # ok 488 # SKIP Disabled ZA for VL 2608
6381 13:53:42.247737 # ok 489 # SKIP Get and set data for VL 2608
6382 13:53:42.247821 # ok 490 Set VL 2624
6383 13:53:42.247904 # ok 491 # SKIP Disabled ZA for VL 2624
6384 13:53:42.247986 # ok 492 # SKIP Get and set data for VL 2624
6385 13:53:42.248068 # ok 493 Set VL 2640
6386 13:53:42.248165 # ok 494 # SKIP Disabled ZA for VL 2640
6387 13:53:42.248261 # ok 495 # SKIP Get and set data for VL 2640
6388 13:53:42.248340 # ok 496 Set VL 2656
6389 13:53:42.248413 # ok 497 # SKIP Disabled ZA for VL 2656
6390 13:53:42.248486 # ok 498 # SKIP Get and set data for VL 2656
6391 13:53:42.248557 # ok 499 Set VL 2672
6392 13:53:42.248629 # ok 500 # SKIP Disabled ZA for VL 2672
6393 13:53:42.248701 # ok 501 # SKIP Get and set data for VL 2672
6394 13:53:42.248795 # ok 502 Set VL 2688
6395 13:53:42.248872 # ok 503 # SKIP Disabled ZA for VL 2688
6396 13:53:42.248945 # ok 504 # SKIP Get and set data for VL 2688
6397 13:53:42.249017 # ok 505 Set VL 2704
6398 13:53:42.253295 # ok 506 # SKIP Disabled ZA for VL 2704
6399 13:53:42.253847 # ok 507 # SKIP Get and set data for VL 2704
6400 13:53:42.253959 # ok 508 Set VL 2720
6401 13:53:42.254051 # ok 509 # SKIP Disabled ZA for VL 2720
6402 13:53:42.254141 # ok 510 # SKIP Get and set data for VL 2720
6403 13:53:42.254228 # ok 511 Set VL 2736
6404 13:53:42.254520 # ok 512 # SKIP Disabled ZA for VL 2736
6405 13:53:42.254628 # ok 513 # SKIP Get and set data for VL 2736
6406 13:53:42.254715 # ok 514 Set VL 2752
6407 13:53:42.254795 # ok 515 # SKIP Disabled ZA for VL 2752
6408 13:53:42.254877 # ok 516 # SKIP Get and set data for VL 2752
6409 13:53:42.254966 # ok 517 Set VL 2768
6410 13:53:42.255054 # ok 518 # SKIP Disabled ZA for VL 2768
6411 13:53:42.255350 # ok 519 # SKIP Get and set data for VL 2768
6412 13:53:42.255463 # ok 520 Set VL 2784
6413 13:53:42.255552 # ok 521 # SKIP Disabled ZA for VL 2784
6414 13:53:42.255640 # ok 522 # SKIP Get and set data for VL 2784
6415 13:53:42.255731 # ok 523 Set VL 2800
6416 13:53:42.255821 # ok 524 # SKIP Disabled ZA for VL 2800
6417 13:53:42.255905 # ok 525 # SKIP Get and set data for VL 2800
6418 13:53:42.255993 # ok 526 Set VL 2816
6419 13:53:42.256077 # ok 527 # SKIP Disabled ZA for VL 2816
6420 13:53:42.256164 # ok 528 # SKIP Get and set data for VL 2816
6421 13:53:42.256253 # ok 529 Set VL 2832
6422 13:53:42.256357 # ok 530 # SKIP Disabled ZA for VL 2832
6423 13:53:42.256447 # ok 531 # SKIP Get and set data for VL 2832
6424 13:53:42.256532 # ok 532 Set VL 2848
6425 13:53:42.256618 # ok 533 # SKIP Disabled ZA for VL 2848
6426 13:53:42.256708 # ok 534 # SKIP Get and set data for VL 2848
6427 13:53:42.256797 # ok 535 Set VL 2864
6428 13:53:42.256881 # ok 536 # SKIP Disabled ZA for VL 2864
6429 13:53:42.256967 # ok 537 # SKIP Get and set data for VL 2864
6430 13:53:42.264184 # ok 538 Set VL 2880
6431 13:53:42.264377 # ok 539 # SKIP Disabled ZA for VL 2880
6432 13:53:42.264452 # ok 540 # SKIP Get and set data for VL 2880
6433 13:53:42.264516 # ok 541 Set VL 2896
6434 13:53:42.264588 # ok 542 # SKIP Disabled ZA for VL 2896
6435 13:53:42.264666 # ok 543 # SKIP Get and set data for VL 2896
6436 13:53:42.264730 # ok 544 Set VL 2912
6437 13:53:42.264795 # ok 545 # SKIP Disabled ZA for VL 2912
6438 13:53:42.264856 # ok 546 # SKIP Get and set data for VL 2912
6439 13:53:42.264915 # ok 547 Set VL 2928
6440 13:53:42.264975 # ok 548 # SKIP Disabled ZA for VL 2928
6441 13:53:42.265035 # ok 549 # SKIP Get and set data for VL 2928
6442 13:53:42.265095 # ok 550 Set VL 2944
6443 13:53:42.265155 # ok 551 # SKIP Disabled ZA for VL 2944
6444 13:53:42.265217 # ok 552 # SKIP Get and set data for VL 2944
6445 13:53:42.265277 # ok 553 Set VL 2960
6446 13:53:42.265337 # ok 554 # SKIP Disabled ZA for VL 2960
6447 13:53:42.265397 # ok 555 # SKIP Get and set data for VL 2960
6448 13:53:42.269723 # ok 556 Set VL 2976
6449 13:53:42.269948 # ok 557 # SKIP Disabled ZA for VL 2976
6450 13:53:42.270248 # ok 558 # SKIP Get and set data for VL 2976
6451 13:53:42.270355 # ok 559 Set VL 2992
6452 13:53:42.270445 # ok 560 # SKIP Disabled ZA for VL 2992
6453 13:53:42.270532 # ok 561 # SKIP Get and set data for VL 2992
6454 13:53:42.270619 # ok 562 Set VL 3008
6455 13:53:42.270873 # ok 563 # SKIP Disabled ZA for VL 3008
6456 13:53:42.270982 # ok 564 # SKIP Get and set data for VL 3008
6457 13:53:42.271245 # ok 565 Set VL 3024
6458 13:53:42.271347 # ok 566 # SKIP Disabled ZA for VL 3024
6459 13:53:42.271583 # ok 567 # SKIP Get and set data for VL 3024
6460 13:53:42.271683 # ok 568 Set VL 3040
6461 13:53:42.271769 # ok 569 # SKIP Disabled ZA for VL 3040
6462 13:53:42.271856 # ok 570 # SKIP Get and set data for VL 3040
6463 13:53:42.271942 # ok 571 Set VL 3056
6464 13:53:42.272046 # ok 572 # SKIP Disabled ZA for VL 3056
6465 13:53:42.272149 # ok 573 # SKIP Get and set data for VL 3056
6466 13:53:42.272233 # ok 574 Set VL 3072
6467 13:53:42.272307 # ok 575 # SKIP Disabled ZA for VL 3072
6468 13:53:42.272378 # ok 576 # SKIP Get and set data for VL 3072
6469 13:53:42.272450 # ok 577 Set VL 3088
6470 13:53:42.272538 # ok 578 # SKIP Disabled ZA for VL 3088
6471 13:53:42.277393 # ok 579 # SKIP Get and set data for VL 3088
6472 13:53:42.277969 # ok 580 Set VL 3104
6473 13:53:42.278076 # ok 581 # SKIP Disabled ZA for VL 3104
6474 13:53:42.278167 # ok 582 # SKIP Get and set data for VL 3104
6475 13:53:42.278253 # ok 583 Set VL 3120
6476 13:53:42.278337 # ok 584 # SKIP Disabled ZA for VL 3120
6477 13:53:42.278662 # ok 585 # SKIP Get and set data for VL 3120
6478 13:53:42.278842 # ok 586 Set VL 3136
6479 13:53:42.278941 # ok 587 # SKIP Disabled ZA for VL 3136
6480 13:53:42.279018 # ok 588 # SKIP Get and set data for VL 3136
6481 13:53:42.279094 # ok 589 Set VL 3152
6482 13:53:42.279865 # ok 590 # SKIP Disabled ZA for VL 3152
6483 13:53:42.280250 # ok 591 # SKIP Get and set data for VL 3152
6484 13:53:42.280364 # ok 592 Set VL 3168
6485 13:53:42.280445 # ok 593 # SKIP Disabled ZA for VL 3168
6486 13:53:42.285916 # ok 594 # SKIP Get and set data for VL 3168
6487 13:53:42.286642 # ok 595 Set VL 3184
6488 13:53:42.287180 # ok 596 # SKIP Disabled ZA for VL 3184
6489 13:53:42.287306 # ok 597 # SKIP Get and set data for VL 3184
6490 13:53:42.287406 # ok 598 Set VL 3200
6491 13:53:42.287492 # ok 599 # SKIP Disabled ZA for VL 3200
6492 13:53:42.287664 # ok 600 # SKIP Get and set data for VL 3200
6493 13:53:42.287765 # ok 601 Set VL 3216
6494 13:53:42.287857 # ok 602 # SKIP Disabled ZA for VL 3216
6495 13:53:42.287941 # ok 603 # SKIP Get and set data for VL 3216
6496 13:53:42.288025 # ok 604 Set VL 3232
6497 13:53:42.288108 # ok 605 # SKIP Disabled ZA for VL 3232
6498 13:53:42.288193 # ok 606 # SKIP Get and set data for VL 3232
6499 13:53:42.288267 # ok 607 Set VL 3248
6500 13:53:42.288357 # ok 608 # SKIP Disabled ZA for VL 3248
6501 13:53:42.288458 # ok 609 # SKIP Get and set data for VL 3248
6502 13:53:42.288529 # ok 610 Set VL 3264
6503 13:53:42.288593 # ok 611 # SKIP Disabled ZA for VL 3264
6504 13:53:42.288655 # ok 612 # SKIP Get and set data for VL 3264
6505 13:53:42.288717 # ok 613 Set VL 3280
6506 13:53:42.288777 # ok 614 # SKIP Disabled ZA for VL 3280
6507 13:53:42.288846 # ok 615 # SKIP Get and set data for VL 3280
6508 13:53:42.288905 # ok 616 Set VL 3296
6509 13:53:42.288966 # ok 617 # SKIP Disabled ZA for VL 3296
6510 13:53:42.289027 # ok 618 # SKIP Get and set data for VL 3296
6511 13:53:42.293694 # ok 619 Set VL 3312
6512 13:53:42.294190 # ok 620 # SKIP Disabled ZA for VL 3312
6513 13:53:42.294297 # ok 621 # SKIP Get and set data for VL 3312
6514 13:53:42.294404 # ok 622 Set VL 3328
6515 13:53:42.294507 # ok 623 # SKIP Disabled ZA for VL 3328
6516 13:53:42.294615 # ok 624 # SKIP Get and set data for VL 3328
6517 13:53:42.294744 # ok 625 Set VL 3344
6518 13:53:42.294854 # ok 626 # SKIP Disabled ZA for VL 3344
6519 13:53:42.294940 # ok 627 # SKIP Get and set data for VL 3344
6520 13:53:42.295025 # ok 628 Set VL 3360
6521 13:53:42.295129 # ok 629 # SKIP Disabled ZA for VL 3360
6522 13:53:42.295219 # ok 630 # SKIP Get and set data for VL 3360
6523 13:53:42.295307 # ok 631 Set VL 3376
6524 13:53:42.295392 # ok 632 # SKIP Disabled ZA for VL 3376
6525 13:53:42.295488 # ok 633 # SKIP Get and set data for VL 3376
6526 13:53:42.295576 # ok 634 Set VL 3392
6527 13:53:42.295950 # ok 635 # SKIP Disabled ZA for VL 3392
6528 13:53:42.296058 # ok 636 # SKIP Get and set data for VL 3392
6529 13:53:42.296150 # ok 637 Set VL 3408
6530 13:53:42.296235 # ok 638 # SKIP Disabled ZA for VL 3408
6531 13:53:42.296321 # ok 639 # SKIP Get and set data for VL 3408
6532 13:53:42.296406 # ok 640 Set VL 3424
6533 13:53:42.296491 # ok 641 # SKIP Disabled ZA for VL 3424
6534 13:53:42.296578 # ok 642 # SKIP Get and set data for VL 3424
6535 13:53:42.296683 # ok 643 Set VL 3440
6536 13:53:42.296770 # ok 644 # SKIP Disabled ZA for VL 3440
6537 13:53:42.296861 # ok 645 # SKIP Get and set data for VL 3440
6538 13:53:42.296945 # ok 646 Set VL 3456
6539 13:53:42.301157 # ok 647 # SKIP Disabled ZA for VL 3456
6540 13:53:42.301566 # ok 648 # SKIP Get and set data for VL 3456
6541 13:53:42.301665 # ok 649 Set VL 3472
6542 13:53:42.301746 # ok 650 # SKIP Disabled ZA for VL 3472
6543 13:53:42.301834 # ok 651 # SKIP Get and set data for VL 3472
6544 13:53:42.301909 # ok 652 Set VL 3488
6545 13:53:42.301981 # ok 653 # SKIP Disabled ZA for VL 3488
6546 13:53:42.302042 # ok 654 # SKIP Get and set data for VL 3488
6547 13:53:42.302119 # ok 655 Set VL 3504
6548 13:53:42.302204 # ok 656 # SKIP Disabled ZA for VL 3504
6549 13:53:42.302305 # ok 657 # SKIP Get and set data for VL 3504
6550 13:53:42.302394 # ok 658 Set VL 3520
6551 13:53:42.302476 # ok 659 # SKIP Disabled ZA for VL 3520
6552 13:53:42.302551 # ok 660 # SKIP Get and set data for VL 3520
6553 13:53:42.302613 # ok 661 Set VL 3536
6554 13:53:42.302673 # ok 662 # SKIP Disabled ZA for VL 3536
6555 13:53:42.302744 # ok 663 # SKIP Get and set data for VL 3536
6556 13:53:42.302807 # ok 664 Set VL 3552
6557 13:53:42.302890 # ok 665 # SKIP Disabled ZA for VL 3552
6558 13:53:42.302980 # ok 666 # SKIP Get and set data for VL 3552
6559 13:53:42.303055 # ok 667 Set VL 3568
6560 13:53:42.303389 # ok 668 # SKIP Disabled ZA for VL 3568
6561 13:53:42.303504 # ok 669 # SKIP Get and set data for VL 3568
6562 13:53:42.303599 # ok 670 Set VL 3584
6563 13:53:42.303703 # ok 671 # SKIP Disabled ZA for VL 3584
6564 13:53:42.303795 # ok 672 # SKIP Get and set data for VL 3584
6565 13:53:42.303881 # ok 673 Set VL 3600
6566 13:53:42.303962 # ok 674 # SKIP Disabled ZA for VL 3600
6567 13:53:42.304247 # ok 675 # SKIP Get and set data for VL 3600
6568 13:53:42.304336 # ok 676 Set VL 3616
6569 13:53:42.304436 # ok 677 # SKIP Disabled ZA for VL 3616
6570 13:53:42.304525 # ok 678 # SKIP Get and set data for VL 3616
6571 13:53:42.304602 # ok 679 Set VL 3632
6572 13:53:42.304676 # ok 680 # SKIP Disabled ZA for VL 3632
6573 13:53:42.304769 # ok 681 # SKIP Get and set data for VL 3632
6574 13:53:42.304863 # ok 682 Set VL 3648
6575 13:53:42.308250 # ok 683 # SKIP Disabled ZA for VL 3648
6576 13:53:42.313585 # ok 684 # SKIP Get and set data for VL 3648
6577 13:53:42.313879 # ok 685 Set VL 3664
6578 13:53:42.313979 # ok 686 # SKIP Disabled ZA for VL 3664
6579 13:53:42.314067 # ok 687 # SKIP Get and set data for VL 3664
6580 13:53:42.314155 # ok 688 Set VL 3680
6581 13:53:42.314258 # ok 689 # SKIP Disabled ZA for VL 3680
6582 13:53:42.314348 # ok 690 # SKIP Get and set data for VL 3680
6583 13:53:42.314437 # ok 691 Set VL 3696
6584 13:53:42.314538 # ok 692 # SKIP Disabled ZA for VL 3696
6585 13:53:42.314626 # ok 693 # SKIP Get and set data for VL 3696
6586 13:53:42.314711 # ok 694 Set VL 3712
6587 13:53:42.317738 # ok 695 # SKIP Disabled ZA for VL 3712
6588 13:53:42.317891 # ok 696 # SKIP Get and set data for VL 3712
6589 13:53:42.317976 # ok 697 Set VL 3728
6590 13:53:42.318057 # ok 698 # SKIP Disabled ZA for VL 3728
6591 13:53:42.318138 # ok 699 # SKIP Get and set data for VL 3728
6592 13:53:42.318217 # ok 700 Set VL 3744
6593 13:53:42.318296 # ok 701 # SKIP Disabled ZA for VL 3744
6594 13:53:42.318376 # ok 702 # SKIP Get and set data for VL 3744
6595 13:53:42.318454 # ok 703 Set VL 3760
6596 13:53:42.318533 # ok 704 # SKIP Disabled ZA for VL 3760
6597 13:53:42.318613 # ok 705 # SKIP Get and set data for VL 3760
6598 13:53:42.318692 # ok 706 Set VL 3776
6599 13:53:42.318771 # ok 707 # SKIP Disabled ZA for VL 3776
6600 13:53:42.318850 # ok 708 # SKIP Get and set data for VL 3776
6601 13:53:42.318934 # ok 709 Set VL 3792
6602 13:53:42.319013 # ok 710 # SKIP Disabled ZA for VL 3792
6603 13:53:42.319092 # ok 711 # SKIP Get and set data for VL 3792
6604 13:53:42.324206 # ok 712 Set VL 3808
6605 13:53:42.324407 # ok 713 # SKIP Disabled ZA for VL 3808
6606 13:53:42.324486 # ok 714 # SKIP Get and set data for VL 3808
6607 13:53:42.324559 # ok 715 Set VL 3824
6608 13:53:42.324632 # ok 716 # SKIP Disabled ZA for VL 3824
6609 13:53:42.324705 # ok 717 # SKIP Get and set data for VL 3824
6610 13:53:42.324777 # ok 718 Set VL 3840
6611 13:53:42.324848 # ok 719 # SKIP Disabled ZA for VL 3840
6612 13:53:42.324920 # ok 720 # SKIP Get and set data for VL 3840
6613 13:53:42.324992 # ok 721 Set VL 3856
6614 13:53:42.325066 # ok 722 # SKIP Disabled ZA for VL 3856
6615 13:53:42.325137 # ok 723 # SKIP Get and set data for VL 3856
6616 13:53:42.325208 # ok 724 Set VL 3872
6617 13:53:42.325280 # ok 725 # SKIP Disabled ZA for VL 3872
6618 13:53:42.325353 # ok 726 # SKIP Get and set data for VL 3872
6619 13:53:42.325424 # ok 727 Set VL 3888
6620 13:53:42.325495 # ok 728 # SKIP Disabled ZA for VL 3888
6621 13:53:42.325566 # ok 729 # SKIP Get and set data for VL 3888
6622 13:53:42.325640 # ok 730 Set VL 3904
6623 13:53:42.325721 # ok 731 # SKIP Disabled ZA for VL 3904
6624 13:53:42.325796 # ok 732 # SKIP Get and set data for VL 3904
6625 13:53:42.325871 # ok 733 Set VL 3920
6626 13:53:42.326153 # ok 734 # SKIP Disabled ZA for VL 3920
6627 13:53:42.329081 # ok 735 # SKIP Get and set data for VL 3920
6628 13:53:42.329255 # ok 736 Set VL 3936
6629 13:53:42.329547 # ok 737 # SKIP Disabled ZA for VL 3936
6630 13:53:42.329659 # ok 738 # SKIP Get and set data for VL 3936
6631 13:53:42.329746 # ok 739 Set VL 3952
6632 13:53:42.329830 # ok 740 # SKIP Disabled ZA for VL 3952
6633 13:53:42.329933 # ok 741 # SKIP Get and set data for VL 3952
6634 13:53:42.330021 # ok 742 Set VL 3968
6635 13:53:42.330105 # ok 743 # SKIP Disabled ZA for VL 3968
6636 13:53:42.330191 # ok 744 # SKIP Get and set data for VL 3968
6637 13:53:42.330295 # ok 745 Set VL 3984
6638 13:53:42.330383 # ok 746 # SKIP Disabled ZA for VL 3984
6639 13:53:42.330470 # ok 747 # SKIP Get and set data for VL 3984
6640 13:53:42.330573 # ok 748 Set VL 4000
6641 13:53:42.330659 # ok 749 # SKIP Disabled ZA for VL 4000
6642 13:53:42.330743 # ok 750 # SKIP Get and set data for VL 4000
6643 13:53:42.330842 # ok 751 Set VL 4016
6644 13:53:42.331097 # ok 752 # SKIP Disabled ZA for VL 4016
6645 13:53:42.331199 # ok 753 # SKIP Get and set data for VL 4016
6646 13:53:42.331300 # ok 754 Set VL 4032
6647 13:53:42.331651 # ok 755 # SKIP Disabled ZA for VL 4032
6648 13:53:42.331752 # ok 756 # SKIP Get and set data for VL 4032
6649 13:53:42.331840 # ok 757 Set VL 4048
6650 13:53:42.331925 # ok 758 # SKIP Disabled ZA for VL 4048
6651 13:53:42.332004 # ok 759 # SKIP Get and set data for VL 4048
6652 13:53:42.332106 # ok 760 Set VL 4064
6653 13:53:42.332193 # ok 761 # SKIP Disabled ZA for VL 4064
6654 13:53:42.332274 # ok 762 # SKIP Get and set data for VL 4064
6655 13:53:42.332350 # ok 763 Set VL 4080
6656 13:53:42.332438 # ok 764 # SKIP Disabled ZA for VL 4080
6657 13:53:42.345372 # ok 765 # SKIP Get and set data for VL 4080
6658 13:53:42.345717 # ok 766 Set VL 4096
6659 13:53:42.345826 # ok 767 # SKIP Disabled ZA for VL 4096
6660 13:53:42.345919 # ok 768 # SKIP Get and set data for VL 4096
6661 13:53:42.346243 # ok 769 Set VL 4112
6662 13:53:42.346350 # ok 770 # SKIP Disabled ZA for VL 4112
6663 13:53:42.346440 # ok 771 # SKIP Get and set data for VL 4112
6664 13:53:42.346527 # ok 772 Set VL 4128
6665 13:53:42.346613 # ok 773 # SKIP Disabled ZA for VL 4128
6666 13:53:42.346694 # ok 774 # SKIP Get and set data for VL 4128
6667 13:53:42.346773 # ok 775 Set VL 4144
6668 13:53:42.346857 # ok 776 # SKIP Disabled ZA for VL 4144
6669 13:53:42.346968 # ok 777 # SKIP Get and set data for VL 4144
6670 13:53:42.347054 # ok 778 Set VL 4160
6671 13:53:42.347140 # ok 779 # SKIP Disabled ZA for VL 4160
6672 13:53:42.347225 # ok 780 # SKIP Get and set data for VL 4160
6673 13:53:42.347312 # ok 781 Set VL 4176
6674 13:53:42.347396 # ok 782 # SKIP Disabled ZA for VL 4176
6675 13:53:42.347481 # ok 783 # SKIP Get and set data for VL 4176
6676 13:53:42.347590 # ok 784 Set VL 4192
6677 13:53:42.347681 # ok 785 # SKIP Disabled ZA for VL 4192
6678 13:53:42.347767 # ok 786 # SKIP Get and set data for VL 4192
6679 13:53:42.347852 # ok 787 Set VL 4208
6680 13:53:42.347952 # ok 788 # SKIP Disabled ZA for VL 4208
6681 13:53:42.348038 # ok 789 # SKIP Get and set data for VL 4208
6682 13:53:42.348118 # ok 790 Set VL 4224
6683 13:53:42.348205 # ok 791 # SKIP Disabled ZA for VL 4224
6684 13:53:42.348276 # ok 792 # SKIP Get and set data for VL 4224
6685 13:53:42.348343 # ok 793 Set VL 4240
6686 13:53:42.348422 # ok 794 # SKIP Disabled ZA for VL 4240
6687 13:53:42.348498 # ok 795 # SKIP Get and set data for VL 4240
6688 13:53:42.348574 # ok 796 Set VL 4256
6689 13:53:42.365812 # ok 797 # SKIP Disabled ZA for VL 4256
6690 13:53:42.366085 # ok 798 # SKIP Get and set data for VL 4256
6691 13:53:42.366184 # ok 799 Set VL 4272
6692 13:53:42.366482 # ok 800 # SKIP Disabled ZA for VL 4272
6693 13:53:42.366572 # ok 801 # SKIP Get and set data for VL 4272
6694 13:53:42.366638 # ok 802 Set VL 4288
6695 13:53:42.366702 # ok 803 # SKIP Disabled ZA for VL 4288
6696 13:53:42.366766 # ok 804 # SKIP Get and set data for VL 4288
6697 13:53:42.366829 # ok 805 Set VL 4304
6698 13:53:42.366892 # ok 806 # SKIP Disabled ZA for VL 4304
6699 13:53:42.366967 # ok 807 # SKIP Get and set data for VL 4304
6700 13:53:42.367033 # ok 808 Set VL 4320
6701 13:53:42.367096 # ok 809 # SKIP Disabled ZA for VL 4320
6702 13:53:42.367155 # ok 810 # SKIP Get and set data for VL 4320
6703 13:53:42.367232 # ok 811 Set VL 4336
6704 13:53:42.367297 # ok 812 # SKIP Disabled ZA for VL 4336
6705 13:53:42.367361 # ok 813 # SKIP Get and set data for VL 4336
6706 13:53:42.367424 # ok 814 Set VL 4352
6707 13:53:42.367485 # ok 815 # SKIP Disabled ZA for VL 4352
6708 13:53:42.367546 # ok 816 # SKIP Get and set data for VL 4352
6709 13:53:42.367606 # ok 817 Set VL 4368
6710 13:53:42.367667 # ok 818 # SKIP Disabled ZA for VL 4368
6711 13:53:42.367742 # ok 819 # SKIP Get and set data for VL 4368
6712 13:53:42.367807 # ok 820 Set VL 4384
6713 13:53:42.367869 # ok 821 # SKIP Disabled ZA for VL 4384
6714 13:53:42.381898 # ok 822 # SKIP Get and set data for VL 4384
6715 13:53:42.382091 # ok 823 Set VL 4400
6716 13:53:42.382393 # ok 824 # SKIP Disabled ZA for VL 4400
6717 13:53:42.382500 # ok 825 # SKIP Get and set data for VL 4400
6718 13:53:42.382590 # ok 826 Set VL 4416
6719 13:53:42.382697 # ok 827 # SKIP Disabled ZA for VL 4416
6720 13:53:42.382786 # ok 828 # SKIP Get and set data for VL 4416
6721 13:53:42.382876 # ok 829 Set VL 4432
6722 13:53:42.382984 # ok 830 # SKIP Disabled ZA for VL 4432
6723 13:53:42.383068 # ok 831 # SKIP Get and set data for VL 4432
6724 13:53:42.383139 # ok 832 Set VL 4448
6725 13:53:42.383604 # ok 833 # SKIP Disabled ZA for VL 4448
6726 13:53:42.383749 # ok 834 # SKIP Get and set data for VL 4448
6727 13:53:42.383852 # ok 835 Set VL 4464
6728 13:53:42.383940 # ok 836 # SKIP Disabled ZA for VL 4464
6729 13:53:42.384027 # ok 837 # SKIP Get and set data for VL 4464
6730 13:53:42.384111 # ok 838 Set VL 4480
6731 13:53:42.384202 # ok 839 # SKIP Disabled ZA for VL 4480
6732 13:53:42.384270 # ok 840 # SKIP Get and set data for VL 4480
6733 13:53:42.384332 # ok 841 Set VL 4496
6734 13:53:42.384392 # ok 842 # SKIP Disabled ZA for VL 4496
6735 13:53:42.385293 # ok 843 # SKIP Get and set data for VL 4496
6736 13:53:42.385419 # ok 844 Set VL 4512
6737 13:53:42.401787 # ok 845 # SKIP Disabled ZA for VL 4512
6738 13:53:42.401998 # ok 846 # SKIP Get and set data for VL 4512
6739 13:53:42.402100 # ok 847 Set VL 4528
6740 13:53:42.402204 # ok 848 # SKIP Disabled ZA for VL 4528
6741 13:53:42.402308 # ok 849 # SKIP Get and set data for VL 4528
6742 13:53:42.402404 # ok 850 Set VL 4544
6743 13:53:42.402721 # ok 851 # SKIP Disabled ZA for VL 4544
6744 13:53:42.402828 # ok 852 # SKIP Get and set data for VL 4544
6745 13:53:42.402921 # ok 853 Set VL 4560
6746 13:53:42.403007 # ok 854 # SKIP Disabled ZA for VL 4560
6747 13:53:42.403095 # ok 855 # SKIP Get and set data for VL 4560
6748 13:53:42.403181 # ok 856 Set VL 4576
6749 13:53:42.403267 # ok 857 # SKIP Disabled ZA for VL 4576
6750 13:53:42.403352 # ok 858 # SKIP Get and set data for VL 4576
6751 13:53:42.403439 # ok 859 Set VL 4592
6752 13:53:42.403524 # ok 860 # SKIP Disabled ZA for VL 4592
6753 13:53:42.403629 # ok 861 # SKIP Get and set data for VL 4592
6754 13:53:42.403719 # ok 862 Set VL 4608
6755 13:53:42.403810 # ok 863 # SKIP Disabled ZA for VL 4608
6756 13:53:42.403913 # ok 864 # SKIP Get and set data for VL 4608
6757 13:53:42.404007 # ok 865 Set VL 4624
6758 13:53:42.404096 # ok 866 # SKIP Disabled ZA for VL 4624
6759 13:53:42.404182 # ok 867 # SKIP Get and set data for VL 4624
6760 13:53:42.404267 # ok 868 Set VL 4640
6761 13:53:42.404349 # ok 869 # SKIP Disabled ZA for VL 4640
6762 13:53:42.404441 # ok 870 # SKIP Get and set data for VL 4640
6763 13:53:42.404518 # ok 871 Set VL 4656
6764 13:53:42.404590 # ok 872 # SKIP Disabled ZA for VL 4656
6765 13:53:42.404662 # ok 873 # SKIP Get and set data for VL 4656
6766 13:53:42.404734 # ok 874 Set VL 4672
6767 13:53:42.414816 # ok 875 # SKIP Disabled ZA for VL 4672
6768 13:53:42.415042 # ok 876 # SKIP Get and set data for VL 4672
6769 13:53:42.415161 # ok 877 Set VL 4688
6770 13:53:42.415507 # ok 878 # SKIP Disabled ZA for VL 4688
6771 13:53:42.415663 # ok 879 # SKIP Get and set data for VL 4688
6772 13:53:42.415795 # ok 880 Set VL 4704
6773 13:53:42.415909 # ok 881 # SKIP Disabled ZA for VL 4704
6774 13:53:42.416027 # ok 882 # SKIP Get and set data for VL 4704
6775 13:53:42.416173 # ok 883 Set VL 4720
6776 13:53:42.416348 # ok 884 # SKIP Disabled ZA for VL 4720
6777 13:53:42.416442 # ok 885 # SKIP Get and set data for VL 4720
6778 13:53:42.416529 # ok 886 Set VL 4736
6779 13:53:42.416636 # ok 887 # SKIP Disabled ZA for VL 4736
6780 13:53:42.416741 # ok 888 # SKIP Get and set data for VL 4736
6781 13:53:42.416850 # ok 889 Set VL 4752
6782 13:53:42.416943 # ok 890 # SKIP Disabled ZA for VL 4752
6783 13:53:42.417030 # ok 891 # SKIP Get and set data for VL 4752
6784 13:53:42.417117 # ok 892 Set VL 4768
6785 13:53:42.417204 # ok 893 # SKIP Disabled ZA for VL 4768
6786 13:53:42.417291 # ok 894 # SKIP Get and set data for VL 4768
6787 13:53:42.422790 # ok 895 Set VL 4784
6788 13:53:42.423244 # ok 896 # SKIP Disabled ZA for VL 4784
6789 13:53:42.423783 # ok 897 # SKIP Get and set data for VL 4784
6790 13:53:42.423889 # ok 898 Set VL 4800
6791 13:53:42.423979 # ok 899 # SKIP Disabled ZA for VL 4800
6792 13:53:42.424065 # ok 900 # SKIP Get and set data for VL 4800
6793 13:53:42.424151 # ok 901 Set VL 4816
6794 13:53:42.424242 # ok 902 # SKIP Disabled ZA for VL 4816
6795 13:53:42.424340 # ok 903 # SKIP Get and set data for VL 4816
6796 13:53:42.424416 # ok 904 Set VL 4832
6797 13:53:42.424506 # ok 905 # SKIP Disabled ZA for VL 4832
6798 13:53:42.424580 # ok 906 # SKIP Get and set data for VL 4832
6799 13:53:42.424653 # ok 907 Set VL 4848
6800 13:53:42.424725 # ok 908 # SKIP Disabled ZA for VL 4848
6801 13:53:42.424797 # ok 909 # SKIP Get and set data for VL 4848
6802 13:53:42.428035 # ok 910 Set VL 4864
6803 13:53:42.428413 # ok 911 # SKIP Disabled ZA for VL 4864
6804 13:53:42.428497 # ok 912 # SKIP Get and set data for VL 4864
6805 13:53:42.428561 # ok 913 Set VL 4880
6806 13:53:42.428620 # ok 914 # SKIP Disabled ZA for VL 4880
6807 13:53:42.437864 # ok 915 # SKIP Get and set data for VL 4880
6808 13:53:42.438087 # ok 916 Set VL 4896
6809 13:53:42.438185 # ok 917 # SKIP Disabled ZA for VL 4896
6810 13:53:42.438480 # ok 918 # SKIP Get and set data for VL 4896
6811 13:53:42.438577 # ok 919 Set VL 4912
6812 13:53:42.438648 # ok 920 # SKIP Disabled ZA for VL 4912
6813 13:53:42.438713 # ok 921 # SKIP Get and set data for VL 4912
6814 13:53:42.438776 # ok 922 Set VL 4928
6815 13:53:42.438852 # ok 923 # SKIP Disabled ZA for VL 4928
6816 13:53:42.438919 # ok 924 # SKIP Get and set data for VL 4928
6817 13:53:42.438984 # ok 925 Set VL 4944
6818 13:53:42.439046 # ok 926 # SKIP Disabled ZA for VL 4944
6819 13:53:42.439114 # ok 927 # SKIP Get and set data for VL 4944
6820 13:53:42.439190 # ok 928 Set VL 4960
6821 13:53:42.439253 # ok 929 # SKIP Disabled ZA for VL 4960
6822 13:53:42.439317 # ok 930 # SKIP Get and set data for VL 4960
6823 13:53:42.439380 # ok 931 Set VL 4976
6824 13:53:42.439455 # ok 932 # SKIP Disabled ZA for VL 4976
6825 13:53:42.439715 # ok 933 # SKIP Get and set data for VL 4976
6826 13:53:42.439797 # ok 934 Set VL 4992
6827 13:53:42.439864 # ok 935 # SKIP Disabled ZA for VL 4992
6828 13:53:42.439927 # ok 936 # SKIP Get and set data for VL 4992
6829 13:53:42.439988 # ok 937 Set VL 5008
6830 13:53:42.440059 # ok 938 # SKIP Disabled ZA for VL 5008
6831 13:53:42.440122 # ok 939 # SKIP Get and set data for VL 5008
6832 13:53:42.440370 # ok 940 Set VL 5024
6833 13:53:42.440463 # ok 941 # SKIP Disabled ZA for VL 5024
6834 13:53:42.440538 # ok 942 # SKIP Get and set data for VL 5024
6835 13:53:42.440611 # ok 943 Set VL 5040
6836 13:53:42.440684 # ok 944 # SKIP Disabled ZA for VL 5040
6837 13:53:42.443730 # ok 945 # SKIP Get and set data for VL 5040
6838 13:53:42.444132 # ok 946 Set VL 5056
6839 13:53:42.444239 # ok 947 # SKIP Disabled ZA for VL 5056
6840 13:53:42.444320 # ok 948 # SKIP Get and set data for VL 5056
6841 13:53:42.444384 # ok 949 Set VL 5072
6842 13:53:42.444457 # ok 950 # SKIP Disabled ZA for VL 5072
6843 13:53:42.449518 # ok 951 # SKIP Get and set data for VL 5072
6844 13:53:42.449727 # ok 952 Set VL 5088
6845 13:53:42.450098 # ok 953 # SKIP Disabled ZA for VL 5088
6846 13:53:42.450258 # ok 954 # SKIP Get and set data for VL 5088
6847 13:53:42.450353 # ok 955 Set VL 5104
6848 13:53:42.450440 # ok 956 # SKIP Disabled ZA for VL 5104
6849 13:53:42.450523 # ok 957 # SKIP Get and set data for VL 5104
6850 13:53:42.450614 # ok 958 Set VL 5120
6851 13:53:42.450728 # ok 959 # SKIP Disabled ZA for VL 5120
6852 13:53:42.452353 # ok 960 # SKIP Get and set data for VL 5120
6853 13:53:42.452474 # ok 961 Set VL 5136
6854 13:53:42.452571 # ok 962 # SKIP Disabled ZA for VL 5136
6855 13:53:42.452666 # ok 963 # SKIP Get and set data for VL 5136
6856 13:53:42.452761 # ok 964 Set VL 5152
6857 13:53:42.452855 # ok 965 # SKIP Disabled ZA for VL 5152
6858 13:53:42.452950 # ok 966 # SKIP Get and set data for VL 5152
6859 13:53:42.453044 # ok 967 Set VL 5168
6860 13:53:42.453137 # ok 968 # SKIP Disabled ZA for VL 5168
6861 13:53:42.453232 # ok 969 # SKIP Get and set data for VL 5168
6862 13:53:42.453327 # ok 970 Set VL 5184
6863 13:53:42.453420 # ok 971 # SKIP Disabled ZA for VL 5184
6864 13:53:42.453514 # ok 972 # SKIP Get and set data for VL 5184
6865 13:53:42.453607 # ok 973 Set VL 5200
6866 13:53:42.453731 # ok 974 # SKIP Disabled ZA for VL 5200
6867 13:53:42.453832 # ok 975 # SKIP Get and set data for VL 5200
6868 13:53:42.453927 # ok 976 Set VL 5216
6869 13:53:42.454020 # ok 977 # SKIP Disabled ZA for VL 5216
6870 13:53:42.454116 # ok 978 # SKIP Get and set data for VL 5216
6871 13:53:42.454211 # ok 979 Set VL 5232
6872 13:53:42.454304 # ok 980 # SKIP Disabled ZA for VL 5232
6873 13:53:42.457430 # ok 981 # SKIP Get and set data for VL 5232
6874 13:53:42.457877 # ok 982 Set VL 5248
6875 13:53:42.458005 # ok 983 # SKIP Disabled ZA for VL 5248
6876 13:53:42.458098 # ok 984 # SKIP Get and set data for VL 5248
6877 13:53:42.458187 # ok 985 Set VL 5264
6878 13:53:42.458275 # ok 986 # SKIP Disabled ZA for VL 5264
6879 13:53:42.458380 # ok 987 # SKIP Get and set data for VL 5264
6880 13:53:42.458472 # ok 988 Set VL 5280
6881 13:53:42.458562 # ok 989 # SKIP Disabled ZA for VL 5280
6882 13:53:42.458663 # ok 990 # SKIP Get and set data for VL 5280
6883 13:53:42.458746 # ok 991 Set VL 5296
6884 13:53:42.458849 # ok 992 # SKIP Disabled ZA for VL 5296
6885 13:53:42.458938 # ok 993 # SKIP Get and set data for VL 5296
6886 13:53:42.459025 # ok 994 Set VL 5312
6887 13:53:42.459131 # ok 995 # SKIP Disabled ZA for VL 5312
6888 13:53:42.459236 # ok 996 # SKIP Get and set data for VL 5312
6889 13:53:42.459325 # ok 997 Set VL 5328
6890 13:53:42.459742 # ok 998 # SKIP Disabled ZA for VL 5328
6891 13:53:42.459850 # ok 999 # SKIP Get and set data for VL 5328
6892 13:53:42.459938 # ok 1000 Set VL 5344
6893 13:53:42.460042 # ok 1001 # SKIP Disabled ZA for VL 5344
6894 13:53:42.460135 # ok 1002 # SKIP Get and set data for VL 5344
6895 13:53:42.460223 # ok 1003 Set VL 5360
6896 13:53:42.460325 # ok 1004 # SKIP Disabled ZA for VL 5360
6897 13:53:42.460414 # ok 1005 # SKIP Get and set data for VL 5360
6898 13:53:42.460500 # ok 1006 Set VL 5376
6899 13:53:42.466086 # ok 1007 # SKIP Disabled ZA for VL 5376
6900 13:53:42.466724 # ok 1008 # SKIP Get and set data for VL 5376
6901 13:53:42.466971 # ok 1009 Set VL 5392
6902 13:53:42.467186 # ok 1010 # SKIP Disabled ZA for VL 5392
6903 13:53:42.467398 # ok 1011 # SKIP Get and set data for VL 5392
6904 13:53:42.467612 # ok 1012 Set VL 5408
6905 13:53:42.467801 # ok 1013 # SKIP Disabled ZA for VL 5408
6906 13:53:42.468041 # ok 1014 # SKIP Get and set data for VL 5408
6907 13:53:42.468527 # ok 1015 Set VL 5424
6908 13:53:42.468694 # ok 1016 # SKIP Disabled ZA for VL 5424
6909 13:53:42.468850 # ok 1017 # SKIP Get and set data for VL 5424
6910 13:53:42.469058 # ok 1018 Set VL 5440
6911 13:53:42.469199 # ok 1019 # SKIP Disabled ZA for VL 5440
6912 13:53:42.469324 # ok 1020 # SKIP Get and set data for VL 5440
6913 13:53:42.469449 # ok 1021 Set VL 5456
6914 13:53:42.469572 # ok 1022 # SKIP Disabled ZA for VL 5456
6915 13:53:42.469734 # ok 1023 # SKIP Get and set data for VL 5456
6916 13:53:42.469937 # ok 1024 Set VL 5472
6917 13:53:42.470076 # ok 1025 # SKIP Disabled ZA for VL 5472
6918 13:53:42.470206 # ok 1026 # SKIP Get and set data for VL 5472
6919 13:53:42.470323 # ok 1027 Set VL 5488
6920 13:53:42.473552 # ok 1028 # SKIP Disabled ZA for VL 5488
6921 13:53:42.474278 # ok 1029 # SKIP Get and set data for VL 5488
6922 13:53:42.474501 # ok 1030 Set VL 5504
6923 13:53:42.474683 # ok 1031 # SKIP Disabled ZA for VL 5504
6924 13:53:42.474850 # ok 1032 # SKIP Get and set data for VL 5504
6925 13:53:42.475020 # ok 1033 Set VL 5520
6926 13:53:42.475188 # ok 1034 # SKIP Disabled ZA for VL 5520
6927 13:53:42.475353 # ok 1035 # SKIP Get and set data for VL 5520
6928 13:53:42.475748 # ok 1036 Set VL 5536
6929 13:53:42.475857 # ok 1037 # SKIP Disabled ZA for VL 5536
6930 13:53:42.475948 # ok 1038 # SKIP Get and set data for VL 5536
6931 13:53:42.476036 # ok 1039 Set VL 5552
6932 13:53:42.476123 # ok 1040 # SKIP Disabled ZA for VL 5552
6933 13:53:42.476217 # ok 1041 # SKIP Get and set data for VL 5552
6934 13:53:42.476312 # ok 1042 Set VL 5568
6935 13:53:42.476400 # ok 1043 # SKIP Disabled ZA for VL 5568
6936 13:53:42.476488 # ok 1044 # SKIP Get and set data for VL 5568
6937 13:53:42.476576 # ok 1045 Set VL 5584
6938 13:53:42.476663 # ok 1046 # SKIP Disabled ZA for VL 5584
6939 13:53:42.476754 # ok 1047 # SKIP Get and set data for VL 5584
6940 13:53:42.476843 # ok 1048 Set VL 5600
6941 13:53:42.476930 # ok 1049 # SKIP Disabled ZA for VL 5600
6942 13:53:42.477017 # ok 1050 # SKIP Get and set data for VL 5600
6943 13:53:42.477105 # ok 1051 Set VL 5616
6944 13:53:42.477213 # ok 1052 # SKIP Disabled ZA for VL 5616
6945 13:53:42.480146 # ok 1053 # SKIP Get and set data for VL 5616
6946 13:53:42.480324 # ok 1054 Set VL 5632
6947 13:53:42.480615 # ok 1055 # SKIP Disabled ZA for VL 5632
6948 13:53:42.480725 # ok 1056 # SKIP Get and set data for VL 5632
6949 13:53:42.483903 # ok 1057 Set VL 5648
6950 13:53:42.484309 # ok 1058 # SKIP Disabled ZA for VL 5648
6951 13:53:42.484411 # ok 1059 # SKIP Get and set data for VL 5648
6952 13:53:42.484491 # ok 1060 Set VL 5664
6953 13:53:42.484566 # ok 1061 # SKIP Disabled ZA for VL 5664
6954 13:53:42.489746 # ok 1062 # SKIP Get and set data for VL 5664
6955 13:53:42.489996 # ok 1063 Set VL 5680
6956 13:53:42.490351 # ok 1064 # SKIP Disabled ZA for VL 5680
6957 13:53:42.490456 # ok 1065 # SKIP Get and set data for VL 5680
6958 13:53:42.490546 # ok 1066 Set VL 5696
6959 13:53:42.490631 # ok 1067 # SKIP Disabled ZA for VL 5696
6960 13:53:42.490717 # ok 1068 # SKIP Get and set data for VL 5696
6961 13:53:42.490802 # ok 1069 Set VL 5712
6962 13:53:42.490903 # ok 1070 # SKIP Disabled ZA for VL 5712
6963 13:53:42.490991 # ok 1071 # SKIP Get and set data for VL 5712
6964 13:53:42.491077 # ok 1072 Set VL 5728
6965 13:53:42.491160 # ok 1073 # SKIP Disabled ZA for VL 5728
6966 13:53:42.491246 # ok 1074 # SKIP Get and set data for VL 5728
6967 13:53:42.491346 # ok 1075 Set VL 5744
6968 13:53:42.491433 # ok 1076 # SKIP Disabled ZA for VL 5744
6969 13:53:42.491514 # ok 1077 # SKIP Get and set data for VL 5744
6970 13:53:42.491613 # ok 1078 Set VL 5760
6971 13:53:42.491699 # ok 1079 # SKIP Disabled ZA for VL 5760
6972 13:53:42.491798 # ok 1080 # SKIP Get and set data for VL 5760
6973 13:53:42.491880 # ok 1081 Set VL 5776
6974 13:53:42.491978 # ok 1082 # SKIP Disabled ZA for VL 5776
6975 13:53:42.492078 # ok 1083 # SKIP Get and set data for VL 5776
6976 13:53:42.492178 # ok 1084 Set VL 5792
6977 13:53:42.492505 # ok 1085 # SKIP Disabled ZA for VL 5792
6978 13:53:42.496242 # ok 1086 # SKIP Get and set data for VL 5792
6979 13:53:42.496728 # ok 1087 Set VL 5808
6980 13:53:42.496901 # ok 1088 # SKIP Disabled ZA for VL 5808
6981 13:53:42.497035 # ok 1089 # SKIP Get and set data for VL 5808
6982 13:53:42.497637 # ok 1090 Set VL 5824
6983 13:53:42.498174 # ok 1091 # SKIP Disabled ZA for VL 5824
6984 13:53:42.498402 # ok 1092 # SKIP Get and set data for VL 5824
6985 13:53:42.498567 # ok 1093 Set VL 5840
6986 13:53:42.498718 # ok 1094 # SKIP Disabled ZA for VL 5840
6987 13:53:42.498910 # ok 1095 # SKIP Get and set data for VL 5840
6988 13:53:42.499091 # ok 1096 Set VL 5856
6989 13:53:42.499295 # ok 1097 # SKIP Disabled ZA for VL 5856
6990 13:53:42.499495 # ok 1098 # SKIP Get and set data for VL 5856
6991 13:53:42.499685 # ok 1099 Set VL 5872
6992 13:53:42.499890 # ok 1100 # SKIP Disabled ZA for VL 5872
6993 13:53:42.500094 # ok 1101 # SKIP Get and set data for VL 5872
6994 13:53:42.500271 # ok 1102 Set VL 5888
6995 13:53:42.500443 # ok 1103 # SKIP Disabled ZA for VL 5888
6996 13:53:42.500568 # ok 1104 # SKIP Get and set data for VL 5888
6997 13:53:42.500683 # ok 1105 Set VL 5904
6998 13:53:42.500799 # ok 1106 # SKIP Disabled ZA for VL 5904
6999 13:53:42.500914 # ok 1107 # SKIP Get and set data for VL 5904
7000 13:53:42.501027 # ok 1108 Set VL 5920
7001 13:53:42.501140 # ok 1109 # SKIP Disabled ZA for VL 5920
7002 13:53:42.501255 # ok 1110 # SKIP Get and set data for VL 5920
7003 13:53:42.501367 # ok 1111 Set VL 5936
7004 13:53:42.501510 # ok 1112 # SKIP Disabled ZA for VL 5936
7005 13:53:42.501632 # ok 1113 # SKIP Get and set data for VL 5936
7006 13:53:42.502279 # ok 1114 Set VL 5952
7007 13:53:42.505401 # ok 1115 # SKIP Disabled ZA for VL 5952
7008 13:53:42.505574 # ok 1116 # SKIP Get and set data for VL 5952
7009 13:53:42.505709 # ok 1117 Set VL 5968
7010 13:53:42.505800 # ok 1118 # SKIP Disabled ZA for VL 5968
7011 13:53:42.505886 # ok 1119 # SKIP Get and set data for VL 5968
7012 13:53:42.505989 # ok 1120 Set VL 5984
7013 13:53:42.506077 # ok 1121 # SKIP Disabled ZA for VL 5984
7014 13:53:42.506163 # ok 1122 # SKIP Get and set data for VL 5984
7015 13:53:42.506264 # ok 1123 Set VL 6000
7016 13:53:42.506359 # ok 1124 # SKIP Disabled ZA for VL 6000
7017 13:53:42.506462 # ok 1125 # SKIP Get and set data for VL 6000
7018 13:53:42.506551 # ok 1126 Set VL 6016
7019 13:53:42.506651 # ok 1127 # SKIP Disabled ZA for VL 6016
7020 13:53:42.506753 # ok 1128 # SKIP Get and set data for VL 6016
7021 13:53:42.506856 # ok 1129 Set VL 6032
7022 13:53:42.506957 # ok 1130 # SKIP Disabled ZA for VL 6032
7023 13:53:42.507059 # ok 1131 # SKIP Get and set data for VL 6032
7024 13:53:42.507160 # ok 1132 Set VL 6048
7025 13:53:42.507686 # ok 1133 # SKIP Disabled ZA for VL 6048
7026 13:53:42.507791 # ok 1134 # SKIP Get and set data for VL 6048
7027 13:53:42.507877 # ok 1135 Set VL 6064
7028 13:53:42.507961 # ok 1136 # SKIP Disabled ZA for VL 6064
7029 13:53:42.508060 # ok 1137 # SKIP Get and set data for VL 6064
7030 13:53:42.508149 # ok 1138 Set VL 6080
7031 13:53:42.508335 # ok 1139 # SKIP Disabled ZA for VL 6080
7032 13:53:42.508438 # ok 1140 # SKIP Get and set data for VL 6080
7033 13:53:42.508535 # ok 1141 Set VL 6096
7034 13:53:42.518055 # ok 1142 # SKIP Disabled ZA for VL 6096
7035 13:53:42.518566 # ok 1143 # SKIP Get and set data for VL 6096
7036 13:53:42.518673 # ok 1144 Set VL 6112
7037 13:53:42.518758 # ok 1145 # SKIP Disabled ZA for VL 6112
7038 13:53:42.518845 # ok 1146 # SKIP Get and set data for VL 6112
7039 13:53:42.518933 # ok 1147 Set VL 6128
7040 13:53:42.519020 # ok 1148 # SKIP Disabled ZA for VL 6128
7041 13:53:42.519351 # ok 1149 # SKIP Get and set data for VL 6128
7042 13:53:42.519550 # ok 1150 Set VL 6144
7043 13:53:42.519733 # ok 1151 # SKIP Disabled ZA for VL 6144
7044 13:53:42.519902 # ok 1152 # SKIP Get and set data for VL 6144
7045 13:53:42.520043 # ok 1153 Set VL 6160
7046 13:53:42.520197 # ok 1154 # SKIP Disabled ZA for VL 6160
7047 13:53:42.520351 # ok 1155 # SKIP Get and set data for VL 6160
7048 13:53:42.520484 # ok 1156 Set VL 6176
7049 13:53:42.520602 # ok 1157 # SKIP Disabled ZA for VL 6176
7050 13:53:42.520745 # ok 1158 # SKIP Get and set data for VL 6176
7051 13:53:42.520866 # ok 1159 Set VL 6192
7052 13:53:42.520980 # ok 1160 # SKIP Disabled ZA for VL 6192
7053 13:53:42.521094 # ok 1161 # SKIP Get and set data for VL 6192
7054 13:53:42.521207 # ok 1162 Set VL 6208
7055 13:53:42.521325 # ok 1163 # SKIP Disabled ZA for VL 6208
7056 13:53:42.521438 # ok 1164 # SKIP Get and set data for VL 6208
7057 13:53:42.521550 # ok 1165 Set VL 6224
7058 13:53:42.521689 # ok 1166 # SKIP Disabled ZA for VL 6224
7059 13:53:42.521897 # ok 1167 # SKIP Get and set data for VL 6224
7060 13:53:42.522086 # ok 1168 Set VL 6240
7061 13:53:42.522268 # ok 1169 # SKIP Disabled ZA for VL 6240
7062 13:53:42.525793 # ok 1170 # SKIP Get and set data for VL 6240
7063 13:53:42.526114 # ok 1171 Set VL 6256
7064 13:53:42.526587 # ok 1172 # SKIP Disabled ZA for VL 6256
7065 13:53:42.526824 # ok 1173 # SKIP Get and set data for VL 6256
7066 13:53:42.526998 # ok 1174 Set VL 6272
7067 13:53:42.527167 # ok 1175 # SKIP Disabled ZA for VL 6272
7068 13:53:42.527334 # ok 1176 # SKIP Get and set data for VL 6272
7069 13:53:42.527505 # ok 1177 Set VL 6288
7070 13:53:42.527665 # ok 1178 # SKIP Disabled ZA for VL 6288
7071 13:53:42.527858 # ok 1179 # SKIP Get and set data for VL 6288
7072 13:53:42.528007 # ok 1180 Set VL 6304
7073 13:53:42.528162 # ok 1181 # SKIP Disabled ZA for VL 6304
7074 13:53:42.528559 # ok 1182 # SKIP Get and set data for VL 6304
7075 13:53:42.528714 # ok 1183 Set VL 6320
7076 13:53:42.528836 # ok 1184 # SKIP Disabled ZA for VL 6320
7077 13:53:42.528953 # ok 1185 # SKIP Get and set data for VL 6320
7078 13:53:42.529067 # ok 1186 Set VL 6336
7079 13:53:42.529181 # ok 1187 # SKIP Disabled ZA for VL 6336
7080 13:53:42.529296 # ok 1188 # SKIP Get and set data for VL 6336
7081 13:53:42.529413 # ok 1189 Set VL 6352
7082 13:53:42.529528 # ok 1190 # SKIP Disabled ZA for VL 6352
7083 13:53:42.529641 # ok 1191 # SKIP Get and set data for VL 6352
7084 13:53:42.529773 # ok 1192 Set VL 6368
7085 13:53:42.529886 # ok 1193 # SKIP Disabled ZA for VL 6368
7086 13:53:42.529999 # ok 1194 # SKIP Get and set data for VL 6368
7087 13:53:42.530112 # ok 1195 Set VL 6384
7088 13:53:42.530225 # ok 1196 # SKIP Disabled ZA for VL 6384
7089 13:53:42.530341 # ok 1197 # SKIP Get and set data for VL 6384
7090 13:53:42.530457 # ok 1198 Set VL 6400
7091 13:53:42.530571 # ok 1199 # SKIP Disabled ZA for VL 6400
7092 13:53:42.539177 # ok 1200 # SKIP Get and set data for VL 6400
7093 13:53:42.539486 # ok 1201 Set VL 6416
7094 13:53:42.539652 # ok 1202 # SKIP Disabled ZA for VL 6416
7095 13:53:42.540041 # ok 1203 # SKIP Get and set data for VL 6416
7096 13:53:42.540149 # ok 1204 Set VL 6432
7097 13:53:42.540239 # ok 1205 # SKIP Disabled ZA for VL 6432
7098 13:53:42.540330 # ok 1206 # SKIP Get and set data for VL 6432
7099 13:53:42.540417 # ok 1207 Set VL 6448
7100 13:53:42.540492 # ok 1208 # SKIP Disabled ZA for VL 6448
7101 13:53:42.540567 # ok 1209 # SKIP Get and set data for VL 6448
7102 13:53:42.540641 # ok 1210 Set VL 6464
7103 13:53:42.540714 # ok 1211 # SKIP Disabled ZA for VL 6464
7104 13:53:42.540805 # ok 1212 # SKIP Get and set data for VL 6464
7105 13:53:42.540882 # ok 1213 Set VL 6480
7106 13:53:42.540956 # ok 1214 # SKIP Disabled ZA for VL 6480
7107 13:53:42.545706 # ok 1215 # SKIP Get and set data for VL 6480
7108 13:53:42.545935 # ok 1216 Set VL 6496
7109 13:53:42.546251 # ok 1217 # SKIP Disabled ZA for VL 6496
7110 13:53:42.546357 # ok 1218 # SKIP Get and set data for VL 6496
7111 13:53:42.546445 # ok 1219 Set VL 6512
7112 13:53:42.546530 # ok 1220 # SKIP Disabled ZA for VL 6512
7113 13:53:42.546632 # ok 1221 # SKIP Get and set data for VL 6512
7114 13:53:42.546723 # ok 1222 Set VL 6528
7115 13:53:42.546809 # ok 1223 # SKIP Disabled ZA for VL 6528
7116 13:53:42.546892 # ok 1224 # SKIP Get and set data for VL 6528
7117 13:53:42.546976 # ok 1225 Set VL 6544
7118 13:53:42.547074 # ok 1226 # SKIP Disabled ZA for VL 6544
7119 13:53:42.547159 # ok 1227 # SKIP Get and set data for VL 6544
7120 13:53:42.547243 # ok 1228 Set VL 6560
7121 13:53:42.547330 # ok 1229 # SKIP Disabled ZA for VL 6560
7122 13:53:42.547436 # ok 1230 # SKIP Get and set data for VL 6560
7123 13:53:42.547527 # ok 1231 Set VL 6576
7124 13:53:42.547628 # ok 1232 # SKIP Disabled ZA for VL 6576
7125 13:53:42.547716 # ok 1233 # SKIP Get and set data for VL 6576
7126 13:53:42.547801 # ok 1234 Set VL 6592
7127 13:53:42.547901 # ok 1235 # SKIP Disabled ZA for VL 6592
7128 13:53:42.548273 # ok 1236 # SKIP Get and set data for VL 6592
7129 13:53:42.548380 # ok 1237 Set VL 6608
7130 13:53:42.548463 # ok 1238 # SKIP Disabled ZA for VL 6608
7131 13:53:42.548558 # ok 1239 # SKIP Get and set data for VL 6608
7132 13:53:42.548637 # ok 1240 Set VL 6624
7133 13:53:42.557608 # ok 1241 # SKIP Disabled ZA for VL 6624
7134 13:53:42.557869 # ok 1242 # SKIP Get and set data for VL 6624
7135 13:53:42.558263 # ok 1243 Set VL 6640
7136 13:53:42.558472 # ok 1244 # SKIP Disabled ZA for VL 6640
7137 13:53:42.558654 # ok 1245 # SKIP Get and set data for VL 6640
7138 13:53:42.558822 # ok 1246 Set VL 6656
7139 13:53:42.558976 # ok 1247 # SKIP Disabled ZA for VL 6656
7140 13:53:42.559144 # ok 1248 # SKIP Get and set data for VL 6656
7141 13:53:42.559338 # ok 1249 Set VL 6672
7142 13:53:42.559501 # ok 1250 # SKIP Disabled ZA for VL 6672
7143 13:53:42.559663 # ok 1251 # SKIP Get and set data for VL 6672
7144 13:53:42.559829 # ok 1252 Set VL 6688
7145 13:53:42.559989 # ok 1253 # SKIP Disabled ZA for VL 6688
7146 13:53:42.560153 # ok 1254 # SKIP Get and set data for VL 6688
7147 13:53:42.560311 # ok 1255 Set VL 6704
7148 13:53:42.560465 # ok 1256 # SKIP Disabled ZA for VL 6704
7149 13:53:42.560586 # ok 1257 # SKIP Get and set data for VL 6704
7150 13:53:42.560730 # ok 1258 Set VL 6720
7151 13:53:42.560852 # ok 1259 # SKIP Disabled ZA for VL 6720
7152 13:53:42.560965 # ok 1260 # SKIP Get and set data for VL 6720
7153 13:53:42.561082 # ok 1261 Set VL 6736
7154 13:53:42.561195 # ok 1262 # SKIP Disabled ZA for VL 6736
7155 13:53:42.561309 # ok 1263 # SKIP Get and set data for VL 6736
7156 13:53:42.561421 # ok 1264 Set VL 6752
7157 13:53:42.561535 # ok 1265 # SKIP Disabled ZA for VL 6752
7158 13:53:42.561666 # ok 1266 # SKIP Get and set data for VL 6752
7159 13:53:42.561876 # ok 1267 Set VL 6768
7160 13:53:42.569562 # ok 1268 # SKIP Disabled ZA for VL 6768
7161 13:53:42.569910 # ok 1269 # SKIP Get and set data for VL 6768
7162 13:53:42.570325 # ok 1270 Set VL 6784
7163 13:53:42.570481 # ok 1271 # SKIP Disabled ZA for VL 6784
7164 13:53:42.570658 # ok 1272 # SKIP Get and set data for VL 6784
7165 13:53:42.570808 # ok 1273 Set VL 6800
7166 13:53:42.570953 # ok 1274 # SKIP Disabled ZA for VL 6800
7167 13:53:42.571098 # ok 1275 # SKIP Get and set data for VL 6800
7168 13:53:42.571328 # ok 1276 Set VL 6816
7169 13:53:42.571509 # ok 1277 # SKIP Disabled ZA for VL 6816
7170 13:53:42.571696 # ok 1278 # SKIP Get and set data for VL 6816
7171 13:53:42.571837 # ok 1279 Set VL 6832
7172 13:53:42.571983 # ok 1280 # SKIP Disabled ZA for VL 6832
7173 13:53:42.572126 # ok 1281 # SKIP Get and set data for VL 6832
7174 13:53:42.572268 # ok 1282 Set VL 6848
7175 13:53:42.572448 # ok 1283 # SKIP Disabled ZA for VL 6848
7176 13:53:42.572586 # ok 1284 # SKIP Get and set data for VL 6848
7177 13:53:42.572730 # ok 1285 Set VL 6864
7178 13:53:42.572873 # ok 1286 # SKIP Disabled ZA for VL 6864
7179 13:53:42.573017 # ok 1287 # SKIP Get and set data for VL 6864
7180 13:53:42.573160 # ok 1288 Set VL 6880
7181 13:53:42.573303 # ok 1289 # SKIP Disabled ZA for VL 6880
7182 13:53:42.581443 # ok 1290 # SKIP Get and set data for VL 6880
7183 13:53:42.581691 # ok 1291 Set VL 6896
7184 13:53:42.581996 # ok 1292 # SKIP Disabled ZA for VL 6896
7185 13:53:42.582096 # ok 1293 # SKIP Get and set data for VL 6896
7186 13:53:42.582189 # ok 1294 Set VL 6912
7187 13:53:42.582279 # ok 1295 # SKIP Disabled ZA for VL 6912
7188 13:53:42.582366 # ok 1296 # SKIP Get and set data for VL 6912
7189 13:53:42.582475 # ok 1297 Set VL 6928
7190 13:53:42.582560 # ok 1298 # SKIP Disabled ZA for VL 6928
7191 13:53:42.582634 # ok 1299 # SKIP Get and set data for VL 6928
7192 13:53:42.582705 # ok 1300 Set VL 6944
7193 13:53:42.582796 # ok 1301 # SKIP Disabled ZA for VL 6944
7194 13:53:42.582884 # ok 1302 # SKIP Get and set data for VL 6944
7195 13:53:42.582973 # ok 1303 Set VL 6960
7196 13:53:42.583073 # ok 1304 # SKIP Disabled ZA for VL 6960
7197 13:53:42.583160 # ok 1305 # SKIP Get and set data for VL 6960
7198 13:53:42.583255 # ok 1306 Set VL 6976
7199 13:53:42.583341 # ok 1307 # SKIP Disabled ZA for VL 6976
7200 13:53:42.583447 # ok 1308 # SKIP Get and set data for VL 6976
7201 13:53:42.583536 # ok 1309 Set VL 6992
7202 13:53:42.583621 # ok 1310 # SKIP Disabled ZA for VL 6992
7203 13:53:42.583969 # ok 1311 # SKIP Get and set data for VL 6992
7204 13:53:42.584064 # ok 1312 Set VL 7008
7205 13:53:42.584137 # ok 1313 # SKIP Disabled ZA for VL 7008
7206 13:53:42.584216 # ok 1314 # SKIP Get and set data for VL 7008
7207 13:53:42.584300 # ok 1315 Set VL 7024
7208 13:53:42.584385 # ok 1316 # SKIP Disabled ZA for VL 7024
7209 13:53:42.584492 # ok 1317 # SKIP Get and set data for VL 7024
7210 13:53:42.584581 # ok 1318 Set VL 7040
7211 13:53:42.584660 # ok 1319 # SKIP Disabled ZA for VL 7040
7212 13:53:42.584745 # ok 1320 # SKIP Get and set data for VL 7040
7213 13:53:42.593550 # ok 1321 Set VL 7056
7214 13:53:42.594014 # ok 1322 # SKIP Disabled ZA for VL 7056
7215 13:53:42.594125 # ok 1323 # SKIP Get and set data for VL 7056
7216 13:53:42.594216 # ok 1324 Set VL 7072
7217 13:53:42.594302 # ok 1325 # SKIP Disabled ZA for VL 7072
7218 13:53:42.594387 # ok 1326 # SKIP Get and set data for VL 7072
7219 13:53:42.594467 # ok 1327 Set VL 7088
7220 13:53:42.594568 # ok 1328 # SKIP Disabled ZA for VL 7088
7221 13:53:42.594655 # ok 1329 # SKIP Get and set data for VL 7088
7222 13:53:42.594739 # ok 1330 Set VL 7104
7223 13:53:42.594824 # ok 1331 # SKIP Disabled ZA for VL 7104
7224 13:53:42.594907 # ok 1332 # SKIP Get and set data for VL 7104
7225 13:53:42.594990 # ok 1333 Set VL 7120
7226 13:53:42.595087 # ok 1334 # SKIP Disabled ZA for VL 7120
7227 13:53:42.595173 # ok 1335 # SKIP Get and set data for VL 7120
7228 13:53:42.595244 # ok 1336 Set VL 7136
7229 13:53:42.595312 # ok 1337 # SKIP Disabled ZA for VL 7136
7230 13:53:42.595677 # ok 1338 # SKIP Get and set data for VL 7136
7231 13:53:42.595783 # ok 1339 Set VL 7152
7232 13:53:42.595886 # ok 1340 # SKIP Disabled ZA for VL 7152
7233 13:53:42.595975 # ok 1341 # SKIP Get and set data for VL 7152
7234 13:53:42.596059 # ok 1342 Set VL 7168
7235 13:53:42.596142 # ok 1343 # SKIP Disabled ZA for VL 7168
7236 13:53:42.596227 # ok 1344 # SKIP Get and set data for VL 7168
7237 13:53:42.596310 # ok 1345 Set VL 7184
7238 13:53:42.596393 # ok 1346 # SKIP Disabled ZA for VL 7184
7239 13:53:42.596489 # ok 1347 # SKIP Get and set data for VL 7184
7240 13:53:42.596576 # ok 1348 Set VL 7200
7241 13:53:42.596645 # ok 1349 # SKIP Disabled ZA for VL 7200
7242 13:53:42.596713 # ok 1350 # SKIP Get and set data for VL 7200
7243 13:53:42.596781 # ok 1351 Set VL 7216
7244 13:53:42.596856 # ok 1352 # SKIP Disabled ZA for VL 7216
7245 13:53:42.596939 # ok 1353 # SKIP Get and set data for VL 7216
7246 13:53:42.597025 # ok 1354 Set VL 7232
7247 13:53:42.597107 # ok 1355 # SKIP Disabled ZA for VL 7232
7248 13:53:42.597189 # ok 1356 # SKIP Get and set data for VL 7232
7249 13:53:42.597268 # ok 1357 Set VL 7248
7250 13:53:42.605593 # ok 1358 # SKIP Disabled ZA for VL 7248
7251 13:53:42.605848 # ok 1359 # SKIP Get and set data for VL 7248
7252 13:53:42.606148 # ok 1360 Set VL 7264
7253 13:53:42.606242 # ok 1361 # SKIP Disabled ZA for VL 7264
7254 13:53:42.606334 # ok 1362 # SKIP Get and set data for VL 7264
7255 13:53:42.606421 # ok 1363 Set VL 7280
7256 13:53:42.606506 # ok 1364 # SKIP Disabled ZA for VL 7280
7257 13:53:42.606589 # ok 1365 # SKIP Get and set data for VL 7280
7258 13:53:42.606692 # ok 1366 Set VL 7296
7259 13:53:42.606768 # ok 1367 # SKIP Disabled ZA for VL 7296
7260 13:53:42.606839 # ok 1368 # SKIP Get and set data for VL 7296
7261 13:53:42.606909 # ok 1369 Set VL 7312
7262 13:53:42.606987 # ok 1370 # SKIP Disabled ZA for VL 7312
7263 13:53:42.607088 # ok 1371 # SKIP Get and set data for VL 7312
7264 13:53:42.607177 # ok 1372 Set VL 7328
7265 13:53:42.607260 # ok 1373 # SKIP Disabled ZA for VL 7328
7266 13:53:42.607359 # ok 1374 # SKIP Get and set data for VL 7328
7267 13:53:42.607440 # ok 1375 Set VL 7344
7268 13:53:42.607523 # ok 1376 # SKIP Disabled ZA for VL 7344
7269 13:53:42.607621 # ok 1377 # SKIP Get and set data for VL 7344
7270 13:53:42.607708 # ok 1378 Set VL 7360
7271 13:53:42.607807 # ok 1379 # SKIP Disabled ZA for VL 7360
7272 13:53:42.607893 # ok 1380 # SKIP Get and set data for VL 7360
7273 13:53:42.607988 # ok 1381 Set VL 7376
7274 13:53:42.608072 # ok 1382 # SKIP Disabled ZA for VL 7376
7275 13:53:42.608164 # ok 1383 # SKIP Get and set data for VL 7376
7276 13:53:42.608235 # ok 1384 Set VL 7392
7277 13:53:42.608315 # ok 1385 # SKIP Disabled ZA for VL 7392
7278 13:53:42.608392 # ok 1386 # SKIP Get and set data for VL 7392
7279 13:53:42.608490 # ok 1387 Set VL 7408
7280 13:53:42.628433 # ok 1388 # SKIP Disabled ZA for VL 7408
7281 13:53:42.628667 # ok 1389 # SKIP Get and set data for VL 7408
7282 13:53:42.628742 # ok 1390 Set VL 7424
7283 13:53:42.629254 # ok 1391 # SKIP Disabled ZA for VL 7424
7284 13:53:42.629455 # ok 1392 # SKIP Get and set data for VL 7424
7285 13:53:42.629679 # ok 1393 Set VL 7440
7286 13:53:42.629914 # ok 1394 # SKIP Disabled ZA for VL 7440
7287 13:53:42.630119 # ok 1395 # SKIP Get and set data for VL 7440
7288 13:53:42.630327 # ok 1396 Set VL 7456
7289 13:53:42.630575 # ok 1397 # SKIP Disabled ZA for VL 7456
7290 13:53:42.630763 # ok 1398 # SKIP Get and set data for VL 7456
7291 13:53:42.630966 # ok 1399 Set VL 7472
7292 13:53:42.631204 # ok 1400 # SKIP Disabled ZA for VL 7472
7293 13:53:42.631423 # ok 1401 # SKIP Get and set data for VL 7472
7294 13:53:42.631641 # ok 1402 Set VL 7488
7295 13:53:42.631814 # ok 1403 # SKIP Disabled ZA for VL 7488
7296 13:53:42.631992 # ok 1404 # SKIP Get and set data for VL 7488
7297 13:53:42.632190 # ok 1405 Set VL 7504
7298 13:53:42.632412 # ok 1406 # SKIP Disabled ZA for VL 7504
7299 13:53:42.632597 # ok 1407 # SKIP Get and set data for VL 7504
7300 13:53:42.632801 # ok 1408 Set VL 7520
7301 13:53:42.633030 # ok 1409 # SKIP Disabled ZA for VL 7520
7302 13:53:42.633266 # ok 1410 # SKIP Get and set data for VL 7520
7303 13:53:42.633502 # ok 1411 Set VL 7536
7304 13:53:42.633718 # ok 1412 # SKIP Disabled ZA for VL 7536
7305 13:53:42.633935 # ok 1413 # SKIP Get and set data for VL 7536
7306 13:53:42.634131 # ok 1414 Set VL 7552
7307 13:53:42.634315 # ok 1415 # SKIP Disabled ZA for VL 7552
7308 13:53:42.634556 # ok 1416 # SKIP Get and set data for VL 7552
7309 13:53:42.634760 # ok 1417 Set VL 7568
7310 13:53:42.634930 # ok 1418 # SKIP Disabled ZA for VL 7568
7311 13:53:42.635121 # ok 1419 # SKIP Get and set data for VL 7568
7312 13:53:42.635289 # ok 1420 Set VL 7584
7313 13:53:42.635469 # ok 1421 # SKIP Disabled ZA for VL 7584
7314 13:53:42.635669 # ok 1422 # SKIP Get and set data for VL 7584
7315 13:53:42.635887 # ok 1423 Set VL 7600
7316 13:53:42.636104 # ok 1424 # SKIP Disabled ZA for VL 7600
7317 13:53:42.636309 # ok 1425 # SKIP Get and set data for VL 7600
7318 13:53:42.636517 # ok 1426 Set VL 7616
7319 13:53:42.636708 # ok 1427 # SKIP Disabled ZA for VL 7616
7320 13:53:42.636905 # ok 1428 # SKIP Get and set data for VL 7616
7321 13:53:42.637109 # ok 1429 Set VL 7632
7322 13:53:42.637336 # ok 1430 # SKIP Disabled ZA for VL 7632
7323 13:53:42.637513 # ok 1431 # SKIP Get and set data for VL 7632
7324 13:53:42.638217 # ok 1432 Set VL 7648
7325 13:53:42.638502 # ok 1433 # SKIP Disabled ZA for VL 7648
7326 13:53:42.638678 # ok 1434 # SKIP Get and set data for VL 7648
7327 13:53:42.638890 # ok 1435 Set VL 7664
7328 13:53:42.639103 # ok 1436 # SKIP Disabled ZA for VL 7664
7329 13:53:42.639298 # ok 1437 # SKIP Get and set data for VL 7664
7330 13:53:42.639463 # ok 1438 Set VL 7680
7331 13:53:42.639603 # ok 1439 # SKIP Disabled ZA for VL 7680
7332 13:53:42.639763 # ok 1440 # SKIP Get and set data for VL 7680
7333 13:53:42.639887 # ok 1441 Set VL 7696
7334 13:53:42.640016 # ok 1442 # SKIP Disabled ZA for VL 7696
7335 13:53:42.640522 # ok 1443 # SKIP Get and set data for VL 7696
7336 13:53:42.640698 # ok 1444 Set VL 7712
7337 13:53:42.640897 # ok 1445 # SKIP Disabled ZA for VL 7712
7338 13:53:42.641028 # ok 1446 # SKIP Get and set data for VL 7712
7339 13:53:42.641218 # ok 1447 Set VL 7728
7340 13:53:42.641376 # ok 1448 # SKIP Disabled ZA for VL 7728
7341 13:53:42.641559 # ok 1449 # SKIP Get and set data for VL 7728
7342 13:53:42.641792 # ok 1450 Set VL 7744
7343 13:53:42.641972 # ok 1451 # SKIP Disabled ZA for VL 7744
7344 13:53:42.642142 # ok 1452 # SKIP Get and set data for VL 7744
7345 13:53:42.642321 # ok 1453 Set VL 7760
7346 13:53:42.642525 # ok 1454 # SKIP Disabled ZA for VL 7760
7347 13:53:42.642727 # ok 1455 # SKIP Get and set data for VL 7760
7348 13:53:42.642901 # ok 1456 Set VL 7776
7349 13:53:42.643068 # ok 1457 # SKIP Disabled ZA for VL 7776
7350 13:53:42.643276 # ok 1458 # SKIP Get and set data for VL 7776
7351 13:53:42.643485 # ok 1459 Set VL 7792
7352 13:53:42.643673 # ok 1460 # SKIP Disabled ZA for VL 7792
7353 13:53:42.643831 # ok 1461 # SKIP Get and set data for VL 7792
7354 13:53:42.643952 # ok 1462 Set VL 7808
7355 13:53:42.644066 # ok 1463 # SKIP Disabled ZA for VL 7808
7356 13:53:42.644180 # ok 1464 # SKIP Get and set data for VL 7808
7357 13:53:42.644294 # ok 1465 Set VL 7824
7358 13:53:42.644407 # ok 1466 # SKIP Disabled ZA for VL 7824
7359 13:53:42.644521 # ok 1467 # SKIP Get and set data for VL 7824
7360 13:53:42.644634 # ok 1468 Set VL 7840
7361 13:53:42.644747 # ok 1469 # SKIP Disabled ZA for VL 7840
7362 13:53:42.644861 # ok 1470 # SKIP Get and set data for VL 7840
7363 13:53:42.644974 # ok 1471 Set VL 7856
7364 13:53:42.645088 # ok 1472 # SKIP Disabled ZA for VL 7856
7365 13:53:42.645201 # ok 1473 # SKIP Get and set data for VL 7856
7366 13:53:42.645314 # ok 1474 Set VL 7872
7367 13:53:42.645428 # ok 1475 # SKIP Disabled ZA for VL 7872
7368 13:53:42.645543 # ok 1476 # SKIP Get and set data for VL 7872
7369 13:53:42.645708 # ok 1477 Set VL 7888
7370 13:53:42.645919 # ok 1478 # SKIP Disabled ZA for VL 7888
7371 13:53:42.646104 # ok 1479 # SKIP Get and set data for VL 7888
7372 13:53:42.646287 # ok 1480 Set VL 7904
7373 13:53:42.646469 # ok 1481 # SKIP Disabled ZA for VL 7904
7374 13:53:42.646654 # ok 1482 # SKIP Get and set data for VL 7904
7375 13:53:42.646839 # ok 1483 Set VL 7920
7376 13:53:42.647020 # ok 1484 # SKIP Disabled ZA for VL 7920
7377 13:53:42.647176 # ok 1485 # SKIP Get and set data for VL 7920
7378 13:53:42.647320 # ok 1486 Set VL 7936
7379 13:53:42.647461 # ok 1487 # SKIP Disabled ZA for VL 7936
7380 13:53:42.647604 # ok 1488 # SKIP Get and set data for VL 7936
7381 13:53:42.647745 # ok 1489 Set VL 7952
7382 13:53:42.647945 # ok 1490 # SKIP Disabled ZA for VL 7952
7383 13:53:42.648093 # ok 1491 # SKIP Get and set data for VL 7952
7384 13:53:42.648243 # ok 1492 Set VL 7968
7385 13:53:42.648370 # ok 1493 # SKIP Disabled ZA for VL 7968
7386 13:53:42.648487 # ok 1494 # SKIP Get and set data for VL 7968
7387 13:53:42.648647 # ok 1495 Set VL 7984
7388 13:53:42.649024 # ok 1496 # SKIP Disabled ZA for VL 7984
7389 13:53:42.649188 # ok 1497 # SKIP Get and set data for VL 7984
7390 13:53:42.649338 # ok 1498 Set VL 8000
7391 13:53:42.649468 # ok 1499 # SKIP Disabled ZA for VL 8000
7392 13:53:42.649620 # ok 1500 # SKIP Get and set data for VL 8000
7393 13:53:42.649762 # ok 1501 Set VL 8016
7394 13:53:42.649916 # ok 1502 # SKIP Disabled ZA for VL 8016
7395 13:53:42.650040 # ok 1503 # SKIP Get and set data for VL 8016
7396 13:53:42.650197 # ok 1504 Set VL 8032
7397 13:53:42.650320 # ok 1505 # SKIP Disabled ZA for VL 8032
7398 13:53:42.650476 # ok 1506 # SKIP Get and set data for VL 8032
7399 13:53:42.650613 # ok 1507 Set VL 8048
7400 13:53:42.650756 # ok 1508 # SKIP Disabled ZA for VL 8048
7401 13:53:42.650913 # ok 1509 # SKIP Get and set data for VL 8048
7402 13:53:42.651036 # ok 1510 Set VL 8064
7403 13:53:42.651154 # ok 1511 # SKIP Disabled ZA for VL 8064
7404 13:53:42.651308 # ok 1512 # SKIP Get and set data for VL 8064
7405 13:53:42.651429 # ok 1513 Set VL 8080
7406 13:53:42.651584 # ok 1514 # SKIP Disabled ZA for VL 8080
7407 13:53:42.651706 # ok 1515 # SKIP Get and set data for VL 8080
7408 13:53:42.651857 # ok 1516 Set VL 8096
7409 13:53:42.651998 # ok 1517 # SKIP Disabled ZA for VL 8096
7410 13:53:42.652129 # ok 1518 # SKIP Get and set data for VL 8096
7411 13:53:42.652274 # ok 1519 Set VL 8112
7412 13:53:42.652393 # ok 1520 # SKIP Disabled ZA for VL 8112
7413 13:53:42.652552 # ok 1521 # SKIP Get and set data for VL 8112
7414 13:53:42.652673 # ok 1522 Set VL 8128
7415 13:53:42.652827 # ok 1523 # SKIP Disabled ZA for VL 8128
7416 13:53:42.652949 # ok 1524 # SKIP Get and set data for VL 8128
7417 13:53:42.653093 # ok 1525 Set VL 8144
7418 13:53:42.653241 # ok 1526 # SKIP Disabled ZA for VL 8144
7419 13:53:42.653366 # ok 1527 # SKIP Get and set data for VL 8144
7420 13:53:42.653516 # ok 1528 Set VL 8160
7421 13:53:42.653638 # ok 1529 # SKIP Disabled ZA for VL 8160
7422 13:53:42.653806 # ok 1530 # SKIP Get and set data for VL 8160
7423 13:53:42.653928 # ok 1531 Set VL 8176
7424 13:53:42.654083 # ok 1532 # SKIP Disabled ZA for VL 8176
7425 13:53:42.654205 # ok 1533 # SKIP Get and set data for VL 8176
7426 13:53:42.654355 # ok 1534 Set VL 8192
7427 13:53:42.654495 # ok 1535 # SKIP Disabled ZA for VL 8192
7428 13:53:42.654622 # ok 1536 # SKIP Get and set data for VL 8192
7429 13:53:42.654781 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7430 13:53:42.654905 ok 34 selftests: arm64: za-ptrace
7431 13:53:42.655026 # selftests: arm64: check_buffer_fill
7432 13:53:43.078854 # 1..20
7433 13:53:43.079198 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7434 13:53:43.079634 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7435 13:53:43.079743 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7436 13:53:43.079876 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7437 13:53:43.079965 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7438 13:53:43.080067 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7439 13:53:43.080152 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7440 13:53:43.080247 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7441 13:53:43.080343 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7442 13:53:43.080440 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7443 13:53:43.080694 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7444 13:53:43.080813 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7445 13:53:43.088086 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7446 13:53:43.088333 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7447 13:53:43.088454 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7448 13:53:43.088564 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7449 13:53:43.088673 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7450 13:53:43.090282 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7451 13:53:43.090626 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7452 13:53:43.090935 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7453 13:53:43.091042 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7454 13:53:43.104874 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7455 13:53:43.216962 # selftests: arm64: check_child_memory
7456 13:53:43.658958 # 1..12
7457 13:53:43.659431 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7458 13:53:43.659616 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7459 13:53:43.659815 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7460 13:53:43.659967 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7461 13:53:43.660183 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7462 13:53:43.660335 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7463 13:53:43.660492 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7464 13:53:43.660650 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7465 13:53:43.660805 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7466 13:53:43.660962 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7467 13:53:43.667404 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7468 13:53:43.667909 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7469 13:53:43.668056 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7470 13:53:43.680412 not ok 36 selftests: arm64: check_child_memory # exit=1
7471 13:53:43.771273 # selftests: arm64: check_gcr_el1_cswitch
7472 13:54:29.082243 <47>[ 98.714362] systemd-journald[105]: Sent WATCHDOG=1 notification.
7473 13:54:29.736277 <47>[ 99.369708] systemd-journald[105]: Data hash table of /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal has a fill level at 75.0 (3329 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
7474 13:54:29.736750 <47>[ 99.370287] systemd-journald[105]: /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal: Journal header limits reached or header out-of-date, rotating.
7475 13:54:29.737006 <47>[ 99.370771] systemd-journald[105]: Rotating...
7476 13:54:29.772844 <47>[ 99.406543] systemd-journald[105]: Reserving 333 entries in field hash table.
7477 13:54:29.817575 <47>[ 99.451250] systemd-journald[105]: Reserving 4437 entries in data hash table.
7478 13:54:29.844032 <47>[ 99.477686] systemd-journald[105]: Vacuuming...
7479 13:54:29.858054 <47>[ 99.491483] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
7480 13:54:31.075493 # 1..1
7481 13:54:31.075756 # 1..1
7482 13:54:31.075853 # 1..1
7483 13:54:31.076159 # 1..1
7484 13:54:31.076269 # 1..1
7485 13:54:31.076375 # 1..1
7486 13:54:31.076469 # 1..1
7487 13:54:31.076554 # 1..1
7488 13:54:31.076639 # 1..1
7489 13:54:31.076722 # 1..1
7490 13:54:31.076805 # 1..1
7491 13:54:31.076891 # 1..1
7492 13:54:31.076974 # 1..1
7493 13:54:31.077056 # 1..1
7494 13:54:31.077140 # 1..1
7495 13:54:31.077224 # 1..1
7496 13:54:31.077309 # 1..1
7497 13:54:31.077392 # 1..1
7498 13:54:31.077483 # 1..1
7499 13:54:31.077568 # 1..1
7500 13:54:31.077661 # 1..1
7501 13:54:31.077745 # 1..1
7502 13:54:31.077827 # 1..1
7503 13:54:31.077913 # 1..1
7504 13:54:31.077999 # 1..1
7505 13:54:31.078084 # 1..1
7506 13:54:31.078195 # 1..1
7507 13:54:31.078287 # 1..1
7508 13:54:31.078373 # 1..1
7509 13:54:31.078461 # 1..1
7510 13:54:31.078548 # 1..1
7511 13:54:31.078633 # 1..1
7512 13:54:31.078716 # 1..1
7513 13:54:31.078800 # 1..1
7514 13:54:31.078886 # 1..1
7515 13:54:31.078971 # 1..1
7516 13:54:31.079052 # 1..1
7517 13:54:31.079132 # 1..1
7518 13:54:31.079213 # 1..1
7519 13:54:31.079292 # 1..1
7520 13:54:31.079376 # 1..1
7521 13:54:31.079459 # 1..1
7522 13:54:31.079540 # 1..1
7523 13:54:31.079618 # 1..1
7524 13:54:31.079698 # 1..1
7525 13:54:31.079779 # 1..1
7526 13:54:31.079859 # 1..1
7527 13:54:31.079939 # 1..1
7528 13:54:31.080022 # 1..1
7529 13:54:31.080103 # 1..1
7530 13:54:31.080187 # 1..1
7531 13:54:31.080266 # 1..1
7532 13:54:31.080347 # 1..1
7533 13:54:31.080432 # 1..1
7534 13:54:31.080518 # 1..1
7535 13:54:31.080600 # 1..1
7536 13:54:31.080685 # 1..1
7537 13:54:31.080769 # 1..1
7538 13:54:31.080849 # 1..1
7539 13:54:31.080928 # 1..1
7540 13:54:31.081012 # 1..1
7541 13:54:31.081093 # 1..1
7542 13:54:31.081175 # 1..1
7543 13:54:31.081259 # 1..1
7544 13:54:31.081339 # 1..1
7545 13:54:31.081423 # 1..1
7546 13:54:31.081505 # 1..1
7547 13:54:31.081586 # 1..1
7548 13:54:31.082671 # 1..1
7549 13:54:31.082782 # 1..1
7550 13:54:31.082870 # 1..1
7551 13:54:31.082954 # 1..1
7552 13:54:31.083038 # 1..1
7553 13:54:31.083124 # 1..1
7554 13:54:31.083209 # 1..1
7555 13:54:31.083294 # 1..1
7556 13:54:31.083377 # 1..1
7557 13:54:31.083463 # 1..1
7558 13:54:31.083549 # 1..1
7559 13:54:31.083633 # 1..1
7560 13:54:31.083710 # 1..1
7561 13:54:31.083791 # 1..1
7562 13:54:31.139113 # 1..1
7563 13:54:31.139462 # 1..1
7564 13:54:31.139654 # 1..1
7565 13:54:31.139805 # 1..1
7566 13:54:31.139956 # 1..1
7567 13:54:31.140141 # 1..1
7568 13:54:31.140309 # 1..1
7569 13:54:31.140467 # 1..1
7570 13:54:31.140878 # 1..1
7571 13:54:31.141068 # 1..1
7572 13:54:31.141196 # 1..1
7573 13:54:31.141314 # 1..1
7574 13:54:31.141430 # 1..1
7575 13:54:31.141546 # 1..1
7576 13:54:31.141675 # 1..1
7577 13:54:31.141792 # 1..1
7578 13:54:31.141933 # 1..1
7579 13:54:31.142078 # 1..1
7580 13:54:31.142197 # 1..1
7581 13:54:31.142313 # 1..1
7582 13:54:31.142440 # 1..1
7583 13:54:31.142557 # 1..1
7584 13:54:31.142672 # 1..1
7585 13:54:31.142786 # 1..1
7586 13:54:31.142901 # 1..1
7587 13:54:31.143015 # 1..1
7588 13:54:31.143129 # 1..1
7589 13:54:31.143243 # 1..1
7590 13:54:31.143358 # 1..1
7591 13:54:31.143472 # 1..1
7592 13:54:31.143590 # 1..1
7593 13:54:31.143704 # 1..1
7594 13:54:31.143818 # 1..1
7595 13:54:31.143932 # 1..1
7596 13:54:31.144048 # 1..1
7597 13:54:31.144163 # 1..1
7598 13:54:31.144278 # 1..1
7599 13:54:31.144393 # 1..1
7600 13:54:31.144508 # 1..1
7601 13:54:31.144624 # 1..1
7602 13:54:31.144738 # 1..1
7603 13:54:31.144853 # 1..1
7604 13:54:31.144967 # 1..1
7605 13:54:31.145083 # 1..1
7606 13:54:31.145198 # 1..1
7607 13:54:31.145312 # 1..1
7608 13:54:31.145427 # 1..1
7609 13:54:31.145543 # 1..1
7610 13:54:31.145675 # 1..1
7611 13:54:31.145793 # 1..1
7612 13:54:31.145915 # 1..1
7613 13:54:31.146040 # 1..1
7614 13:54:31.146157 # 1..1
7615 13:54:31.146274 # 1..1
7616 13:54:31.146404 # 1..1
7617 13:54:31.146523 # 1..1
7618 13:54:31.146639 # 1..1
7619 13:54:31.146754 # 1..1
7620 13:54:31.146868 # 1..1
7621 13:54:31.146983 # 1..1
7622 13:54:31.147096 # 1..1
7623 13:54:31.147211 # 1..1
7624 13:54:31.147326 # 1..1
7625 13:54:31.147440 # 1..1
7626 13:54:31.147556 # 1..1
7627 13:54:31.147675 # 1..1
7628 13:54:31.147790 # 1..1
7629 13:54:31.147905 # 1..1
7630 13:54:31.148020 # 1..1
7631 13:54:31.148135 # 1..1
7632 13:54:31.148251 # 1..1
7633 13:54:31.148415 # 1..1
7634 13:54:31.148540 # 1..1
7635 13:54:31.148656 # 1..1
7636 13:54:31.148774 # 1..1
7637 13:54:31.148890 # 1..1
7638 13:54:31.149006 # 1..1
7639 13:54:31.149120 # 1..1
7640 13:54:31.149236 # 1..1
7641 13:54:31.149352 # 1..1
7642 13:54:31.149468 # 1..1
7643 13:54:31.149583 # 1..1
7644 13:54:31.149716 # 1..1
7645 13:54:31.149833 # 1..1
7646 13:54:31.149964 # 1..1
7647 13:54:31.150083 # 1..1
7648 13:54:31.150198 # 1..1
7649 13:54:31.150314 # 1..1
7650 13:54:31.150445 # 1..1
7651 13:54:31.150562 # 1..1
7652 13:54:31.150676 # 1..1
7653 13:54:31.150791 # 1..1
7654 13:54:31.150907 # 1..1
7655 13:54:31.151024 # 1..1
7656 13:54:31.151138 # 1..1
7657 13:54:31.151255 # 1..1
7658 13:54:31.151371 # 1..1
7659 13:54:31.151486 # 1..1
7660 13:54:31.151601 # 1..1
7661 13:54:31.151715 # 1..1
7662 13:54:31.151831 # 1..1
7663 13:54:31.151946 # 1..1
7664 13:54:31.152061 # 1..1
7665 13:54:31.152176 # 1..1
7666 13:54:31.152291 # 1..1
7667 13:54:31.152407 # 1..1
7668 13:54:31.152522 # 1..1
7669 13:54:31.152642 # 1..1
7670 13:54:31.152757 # 1..1
7671 13:54:31.152872 # 1..1
7672 13:54:31.152988 # 1..1
7673 13:54:31.153103 # 1..1
7674 13:54:31.153219 # 1..1
7675 13:54:31.153333 # 1..1
7676 13:54:31.153448 # 1..1
7677 13:54:31.153563 # 1..1
7678 13:54:31.161942 # 1..1
7679 13:54:31.162195 # 1..1
7680 13:54:31.162323 # 1..1
7681 13:54:31.162444 # 1..1
7682 13:54:31.162560 # 1..1
7683 13:54:31.162895 # 1..1
7684 13:54:31.163023 # 1..1
7685 13:54:31.163139 # 1..1
7686 13:54:31.163255 # 1..1
7687 13:54:31.163397 # 1..1
7688 13:54:31.163595 # 1..1
7689 13:54:31.163767 # 1..1
7690 13:54:31.163936 # 1..1
7691 13:54:31.164101 # 1..1
7692 13:54:31.164322 # 1..1
7693 13:54:31.164536 # 1..1
7694 13:54:31.164725 # 1..1
7695 13:54:31.164913 # 1..1
7696 13:54:31.165106 # 1..1
7697 13:54:31.165278 # 1..1
7698 13:54:31.165450 # 1..1
7699 13:54:31.165617 # 1..1
7700 13:54:31.165788 # 1..1
7701 13:54:31.165963 # 1..1
7702 13:54:31.166134 # 1..1
7703 13:54:31.166295 # 1..1
7704 13:54:31.166421 # 1..1
7705 13:54:31.166536 # 1..1
7706 13:54:31.166650 # 1..1
7707 13:54:31.166761 # 1..1
7708 13:54:31.166872 # 1..1
7709 13:54:31.166984 # 1..1
7710 13:54:31.167097 # 1..1
7711 13:54:31.167209 # 1..1
7712 13:54:31.167320 # 1..1
7713 13:54:31.167430 # 1..1
7714 13:54:31.167543 # 1..1
7715 13:54:31.167654 # 1..1
7716 13:54:31.167766 # 1..1
7717 13:54:31.167879 # 1..1
7718 13:54:31.167990 # 1..1
7719 13:54:31.168140 # 1..1
7720 13:54:31.168281 # 1..1
7721 13:54:31.168395 # 1..1
7722 13:54:31.168509 # 1..1
7723 13:54:31.168626 # 1..1
7724 13:54:31.168740 # 1..1
7725 13:54:31.168852 # 1..1
7726 13:54:31.168966 # 1..1
7727 13:54:31.169078 # 1..1
7728 13:54:31.169190 # 1..1
7729 13:54:31.169302 # 1..1
7730 13:54:31.169413 # 1..1
7731 13:54:31.169525 # 1..1
7732 13:54:31.169638 # 1..1
7733 13:54:31.169899 # 1..1
7734 13:54:31.170091 # 1..1
7735 13:54:31.170273 # 1..1
7736 13:54:31.170453 # 1..1
7737 13:54:31.170634 # 1..1
7738 13:54:31.170814 # 1..1
7739 13:54:31.170992 # 1..1
7740 13:54:31.171172 # 1..1
7741 13:54:31.171352 # 1..1
7742 13:54:31.171532 # 1..1
7743 13:54:31.171682 # 1..1
7744 13:54:31.171823 # 1..1
7745 13:54:31.171965 # 1..1
7746 13:54:31.172115 # 1..1
7747 13:54:31.172320 # 1..1
7748 13:54:31.172456 # 1..1
7749 13:54:31.172600 # 1..1
7750 13:54:31.172741 # 1..1
7751 13:54:31.172879 # 1..1
7752 13:54:31.173020 # 1..1
7753 13:54:31.173159 # 1..1
7754 13:54:31.173298 # 1..1
7755 13:54:31.173438 # 1..1
7756 13:54:31.173581 # 1..1
7757 13:54:31.173734 # 1..1
7758 13:54:31.173876 # 1..1
7759 13:54:31.174016 # 1..1
7760 13:54:31.174154 # 1..1
7761 13:54:31.174293 # 1..1
7762 13:54:31.174433 # 1..1
7763 13:54:31.174573 # 1..1
7764 13:54:31.174712 # 1..1
7765 13:54:31.174852 # 1..1
7766 13:54:31.174991 # 1..1
7767 13:54:31.175131 # 1..1
7768 13:54:31.175271 # 1..1
7769 13:54:31.175410 # 1..1
7770 13:54:31.175550 # 1..1
7771 13:54:31.175690 # 1..1
7772 13:54:31.175829 # 1..1
7773 13:54:31.175968 # 1..1
7774 13:54:31.176108 # 1..1
7775 13:54:31.176248 # 1..1
7776 13:54:31.176435 # 1..1
7777 13:54:31.176646 # 1..1
7778 13:54:31.176836 # 1..1
7779 13:54:31.177103 # 1..1
7780 13:54:31.177264 # 1..1
7781 13:54:31.177410 # 1..1
7782 13:54:31.177553 # 1..1
7783 13:54:31.177750 # 1..1
7784 13:54:31.177922 # 1..1
7785 13:54:31.178068 # 1..1
7786 13:54:31.178211 # 1..1
7787 13:54:31.178352 # 1..1
7788 13:54:31.178494 # 1..1
7789 13:54:31.178637 # 1..1
7790 13:54:31.178777 # 1..1
7791 13:54:31.178917 # 1..1
7792 13:54:31.179056 # 1..1
7793 13:54:31.179196 # 1..1
7794 13:54:31.179336 # 1..1
7795 13:54:31.179476 # 1..1
7796 13:54:31.179615 # 1..1
7797 13:54:31.179755 # 1..1
7798 13:54:31.179894 # 1..1
7799 13:54:31.180034 # 1..1
7800 13:54:31.180174 # 1..1
7801 13:54:31.180313 # 1..1
7802 13:54:31.180452 # 1..1
7803 13:54:31.180592 # 1..1
7804 13:54:31.180731 # 1..1
7805 13:54:31.180869 # 1..1
7806 13:54:31.181009 # 1..1
7807 13:54:31.181149 # 1..1
7808 13:54:31.181290 # 1..1
7809 13:54:31.181429 # 1..1
7810 13:54:31.181571 # 1..1
7811 13:54:31.181726 # 1..1
7812 13:54:31.181867 # 1..1
7813 13:54:31.182006 # 1..1
7814 13:54:31.182144 # 1..1
7815 13:54:31.182284 # 1..1
7816 13:54:31.182422 # 1..1
7817 13:54:31.182564 # 1..1
7818 13:54:31.182702 # 1..1
7819 13:54:31.182904 # 1..1
7820 13:54:31.183041 # 1..1
7821 13:54:31.183184 # 1..1
7822 13:54:31.183324 # 1..1
7823 13:54:31.183464 # 1..1
7824 13:54:31.183605 # 1..1
7825 13:54:31.183748 # 1..1
7826 13:54:31.183889 # 1..1
7827 13:54:31.184029 # 1..1
7828 13:54:31.184170 # 1..1
7829 13:54:31.184313 # 1..1
7830 13:54:31.184453 # 1..1
7831 13:54:31.184592 # 1..1
7832 13:54:31.184735 # 1..1
7833 13:54:31.184875 # 1..1
7834 13:54:31.185016 # 1..1
7835 13:54:31.185157 # 1..1
7836 13:54:31.185298 # 1..1
7837 13:54:31.185436 # 1..1
7838 13:54:31.185577 # 1..1
7839 13:54:31.185734 # 1..1
7840 13:54:31.185875 # 1..1
7841 13:54:31.186015 # 1..1
7842 13:54:31.186176 # 1..1
7843 13:54:31.186369 # 1..1
7844 13:54:31.186521 # 1..1
7845 13:54:31.186665 # 1..1
7846 13:54:31.186806 # 1..1
7847 13:54:31.186945 # 1..1
7848 13:54:31.187086 # 1..1
7849 13:54:31.187225 # 1..1
7850 13:54:31.187365 # 1..1
7851 13:54:31.187505 # 1..1
7852 13:54:31.187645 # 1..1
7853 13:54:31.187784 # 1..1
7854 13:54:31.187923 # 1..1
7855 13:54:31.188064 # 1..1
7856 13:54:31.188203 # 1..1
7857 13:54:31.188343 # 1..1
7858 13:54:31.188482 # 1..1
7859 13:54:31.188622 # 1..1
7860 13:54:31.188762 # 1..1
7861 13:54:31.188902 # 1..1
7862 13:54:31.189041 # 1..1
7863 13:54:31.189183 # 1..1
7864 13:54:31.189324 # 1..1
7865 13:54:31.189463 # 1..1
7866 13:54:31.189604 # 1..1
7867 13:54:31.189756 # 1..1
7868 13:54:31.189898 # 1..1
7869 13:54:31.190038 # 1..1
7870 13:54:31.190177 # 1..1
7871 13:54:31.190318 # 1..1
7872 13:54:31.190457 # 1..1
7873 13:54:31.190597 # 1..1
7874 13:54:31.190736 # 1..1
7875 13:54:31.190876 # 1..1
7876 13:54:31.191016 # 1..1
7877 13:54:31.191155 # 1..1
7878 13:54:31.191295 # 1..1
7879 13:54:31.198996 # 1..1
7880 13:54:31.199252 # 1..1
7881 13:54:31.199411 # 1..1
7882 13:54:31.199556 # 1..1
7883 13:54:31.199738 # 1..1
7884 13:54:31.200142 # 1..1
7885 13:54:31.200317 # 1..1
7886 13:54:31.200489 # 1..1
7887 13:54:31.200686 # 1..1
7888 13:54:31.200859 # 1..1
7889 13:54:31.200984 # 1..1
7890 13:54:31.201097 # 1..1
7891 13:54:31.201207 # 1..1
7892 13:54:31.201317 # 1..1
7893 13:54:31.201428 # 1..1
7894 13:54:31.201538 # 1..1
7895 13:54:31.201660 # 1..1
7896 13:54:31.201882 # 1..1
7897 13:54:31.202085 # 1..1
7898 13:54:31.202259 # 1..1
7899 13:54:31.202404 # 1..1
7900 13:54:31.202545 # 1..1
7901 13:54:31.202685 # 1..1
7902 13:54:31.202825 # 1..1
7903 13:54:31.202965 # 1..1
7904 13:54:31.203108 # 1..1
7905 13:54:31.203250 # 1..1
7906 13:54:31.203390 # 1..1
7907 13:54:31.203531 # 1..1
7908 13:54:31.203672 # 1..1
7909 13:54:31.203814 # 1..1
7910 13:54:31.203955 # 1..1
7911 13:54:31.204095 # 1..1
7912 13:54:31.204236 # 1..1
7913 13:54:31.204377 # 1..1
7914 13:54:31.204518 # 1..1
7915 13:54:31.204659 # 1..1
7916 13:54:31.204801 # 1..1
7917 13:54:31.204943 # 1..1
7918 13:54:31.205085 # 1..1
7919 13:54:31.205225 # 1..1
7920 13:54:31.205366 # 1..1
7921 13:54:31.205508 # 1..1
7922 13:54:31.205659 # 1..1
7923 13:54:31.205804 # 1..1
7924 13:54:31.205944 # 1..1
7925 13:54:31.206085 # 1..1
7926 13:54:31.206225 # 1..1
7927 13:54:31.206365 # 1..1
7928 13:54:31.206505 # 1..1
7929 13:54:31.206644 # 1..1
7930 13:54:31.206790 # 1..1
7931 13:54:31.206931 # 1..1
7932 13:54:31.207071 # 1..1
7933 13:54:31.207266 # 1..1
7934 13:54:31.207402 # 1..1
7935 13:54:31.207543 # 1..1
7936 13:54:31.207684 # 1..1
7937 13:54:31.207825 # 1..1
7938 13:54:31.207965 # 1..1
7939 13:54:31.208106 # 1..1
7940 13:54:31.208246 # 1..1
7941 13:54:31.208386 # 1..1
7942 13:54:31.208528 # 1..1
7943 13:54:31.208669 # 1..1
7944 13:54:31.208811 # 1..1
7945 13:54:31.208952 # 1..1
7946 13:54:31.209093 # 1..1
7947 13:54:31.209233 # 1..1
7948 13:54:31.209374 # 1..1
7949 13:54:31.209514 # 1..1
7950 13:54:31.209666 # 1..1
7951 13:54:31.209810 # 1..1
7952 13:54:31.209952 # 1..1
7953 13:54:31.210093 # 1..1
7954 13:54:31.210233 #
7955 13:54:31.210373 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
7956 13:54:31.536248 # selftests: arm64: check_ksm_options
7957 13:54:31.976488 # 1..4
7958 13:54:31.977001 # # Invalid MTE synchronous exception caught!
7959 13:54:32.032653 not ok 38 selftests: arm64: check_ksm_options # exit=1
7960 13:54:32.397389 # selftests: arm64: check_mmap_options
7961 13:54:33.419989 # 1..22
7962 13:54:33.420663 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
7963 13:54:33.420872 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
7964 13:54:33.421042 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
7965 13:54:33.421239 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
7966 13:54:33.421447 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
7967 13:54:33.421622 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7968 13:54:33.421826 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
7969 13:54:33.422046 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7970 13:54:33.422215 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
7971 13:54:33.431924 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7972 13:54:33.432401 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
7973 13:54:33.432511 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7974 13:54:33.432622 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
7975 13:54:33.432730 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7976 13:54:33.433023 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
7977 13:54:33.433335 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7978 13:54:33.433452 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
7979 13:54:33.433757 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7980 13:54:33.433876 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
7981 13:54:33.471724 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7982 13:54:33.472196 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
7983 13:54:33.472304 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
7984 13:54:33.472409 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
7985 13:54:33.481082 not ok 39 selftests: arm64: check_mmap_options # exit=1
7986 13:54:33.833844 # selftests: arm64: check_prctl
7987 13:54:34.196531 # TAP version 13
7988 13:54:34.196824 # 1..5
7989 13:54:34.197017 # ok 1 check_basic_read
7990 13:54:34.197409 # ok 2 NONE
7991 13:54:34.197611 # ok 3 SYNC
7992 13:54:34.197801 # ok 4 ASYNC
7993 13:54:34.197959 # ok 5 SYNC+ASYNC
7994 13:54:34.198113 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
7995 13:54:34.239973 ok 40 selftests: arm64: check_prctl
7996 13:54:34.589945 # selftests: arm64: check_tags_inclusion
7997 13:54:34.971899 # 1..4
7998 13:54:34.972363 # # Unexpected fault recorded for 0xd00ffff98c73000-0xd00ffff98c73050 in mode 1
7999 13:54:34.972471 # not ok 1 Check an included tag value with sync mode
8000 13:54:34.972566 # # Unexpected fault recorded for 0xd00ffff98c73000-0xd00ffff98c73050 in mode 1
8001 13:54:34.972670 # not ok 2 Check different included tags value with sync mode
8002 13:54:34.972764 # ok 3 Check none included tags value with sync mode
8003 13:54:34.972865 # # Unexpected fault recorded for 0x800ffff98c73000-0x800ffff98c73050 in mode 1
8004 13:54:34.972966 # not ok 4 Check all included tags value with sync mode
8005 13:54:34.973269 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
8006 13:54:35.032106 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
8007 13:54:35.369298 # selftests: arm64: check_user_mem
8008 13:54:44.633095 # 1..64
8009 13:54:44.633440 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8010 13:54:44.633960 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8011 13:54:44.634131 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8012 13:54:44.634304 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8013 13:54:44.634456 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8014 13:54:44.634598 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8015 13:54:44.634817 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8016 13:54:44.635226 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8017 13:54:44.635521 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8018 13:54:44.635705 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8019 13:54:44.635932 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8020 13:54:44.636161 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8021 13:54:44.636429 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8022 13:54:44.636632 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8023 13:54:44.636828 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8024 13:54:44.636994 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8025 13:54:44.637175 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8026 13:54:44.637436 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8027 13:54:44.637605 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8028 13:54:44.637791 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8029 13:54:44.637975 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8030 13:54:44.638143 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8031 13:54:44.638292 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8032 13:54:44.643999 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8033 13:54:44.644428 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8034 13:54:44.644528 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8035 13:54:44.644846 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8036 13:54:44.644945 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8037 13:54:44.645026 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8038 13:54:44.645363 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8039 13:54:44.645615 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8040 13:54:44.645828 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8041 13:54:44.646036 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8042 13:54:44.646170 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8043 13:54:44.646289 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8044 13:54:44.646653 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8045 13:54:44.647116 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8046 13:54:44.647317 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8047 13:54:44.647526 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8048 13:54:44.647717 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8049 13:54:44.647925 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8050 13:54:44.648087 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8051 13:54:44.648238 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8052 13:54:44.648400 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8053 13:54:44.648567 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8054 13:54:44.648775 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8055 13:54:44.648937 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8056 13:54:44.649068 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8057 13:54:44.649185 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8058 13:54:44.649299 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8059 13:54:44.649438 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8060 13:54:46.443455 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8061 13:54:46.443786 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8062 13:54:46.443942 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8063 13:54:46.444341 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8064 13:54:46.444529 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8065 13:54:46.444674 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8066 13:54:46.444822 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8067 13:54:46.444971 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8068 13:54:46.445146 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8069 13:54:46.445288 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8070 13:54:46.445455 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8071 13:54:46.445606 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8072 13:54:46.445774 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8073 13:54:46.445902 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
8074 13:54:46.467318 ok 42 selftests: arm64: check_user_mem
8075 13:54:46.551881 # selftests: arm64: btitest
8076 13:54:46.633299 # TAP version 13
8077 13:54:46.633595 # 1..18
8078 13:54:46.633805 # # HWCAP_PACA present
8079 13:54:46.634212 # # HWCAP2_BTI present
8080 13:54:46.634369 # # Test binary built for BTI
8081 13:54:46.634519 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8082 13:54:46.634666 # ok 1 nohint_func/call_using_br_x0
8083 13:54:46.634809 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8084 13:54:46.635229 # ok 2 nohint_func/call_using_br_x16
8085 13:54:46.635458 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8086 13:54:46.635648 # ok 3 nohint_func/call_using_blr
8087 13:54:46.635909 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8088 13:54:46.636124 # ok 4 bti_none_func/call_using_br_x0
8089 13:54:46.636325 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8090 13:54:46.636533 # ok 5 bti_none_func/call_using_br_x16
8091 13:54:46.636704 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8092 13:54:46.636896 # ok 6 bti_none_func/call_using_blr
8093 13:54:46.637034 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8094 13:54:46.637179 # ok 7 bti_c_func/call_using_br_x0
8095 13:54:46.637323 # ok 8 bti_c_func/call_using_br_x16
8096 13:54:46.637466 # ok 9 bti_c_func/call_using_blr
8097 13:54:46.637639 # ok 10 bti_j_func/call_using_br_x0
8098 13:54:46.637824 # ok 11 bti_j_func/call_using_br_x16
8099 13:54:46.637970 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8100 13:54:46.638115 # ok 12 bti_j_func/call_using_blr
8101 13:54:46.638297 # ok 13 bti_jc_func/call_using_br_x0
8102 13:54:46.638434 # ok 14 bti_jc_func/call_using_br_x16
8103 13:54:46.638577 # ok 15 bti_jc_func/call_using_blr
8104 13:54:46.638720 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8105 13:54:46.638863 # ok 16 paciasp_func/call_using_br_x0
8106 13:54:46.639006 # ok 17 paciasp_func/call_using_br_x16
8107 13:54:46.639149 # ok 18 paciasp_func/call_using_blr
8108 13:54:46.639290 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8109 13:54:46.655965 ok 43 selftests: arm64: btitest
8110 13:54:46.739748 # selftests: arm64: nobtitest
8111 13:54:46.840946 # TAP version 13
8112 13:54:46.841314 # 1..18
8113 13:54:46.841514 # # HWCAP_PACA present
8114 13:54:46.841706 # # HWCAP2_BTI present
8115 13:54:46.842157 # # Test binary not built for BTI
8116 13:54:46.842329 # ok 1 nohint_func/call_using_br_x0
8117 13:54:46.842462 # ok 2 nohint_func/call_using_br_x16
8118 13:54:46.842587 # ok 3 nohint_func/call_using_blr
8119 13:54:46.842702 # ok 4 bti_none_func/call_using_br_x0
8120 13:54:46.842822 # ok 5 bti_none_func/call_using_br_x16
8121 13:54:46.842937 # ok 6 bti_none_func/call_using_blr
8122 13:54:46.843052 # ok 7 bti_c_func/call_using_br_x0
8123 13:54:46.843166 # ok 8 bti_c_func/call_using_br_x16
8124 13:54:46.843281 # ok 9 bti_c_func/call_using_blr
8125 13:54:46.843398 # ok 10 bti_j_func/call_using_br_x0
8126 13:54:46.843518 # ok 11 bti_j_func/call_using_br_x16
8127 13:54:46.843897 # ok 12 bti_j_func/call_using_blr
8128 13:54:46.844096 # ok 13 bti_jc_func/call_using_br_x0
8129 13:54:46.844281 # ok 14 bti_jc_func/call_using_br_x16
8130 13:54:46.844424 # ok 15 bti_jc_func/call_using_blr
8131 13:54:46.844550 # ok 16 paciasp_func/call_using_br_x0
8132 13:54:46.844668 # ok 17 paciasp_func/call_using_br_x16
8133 13:54:46.844806 # ok 18 paciasp_func/call_using_blr
8134 13:54:46.844927 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8135 13:54:46.859910 ok 44 selftests: arm64: nobtitest
8136 13:54:46.952695 # selftests: arm64: hwcap
8137 13:54:47.109111 # TAP version 13
8138 13:54:47.109663 # 1..28
8139 13:54:47.109850 # # RNG present
8140 13:54:47.109998 # ok 1 cpuinfo_match_RNG
8141 13:54:47.110169 # ok 2 sigill_RNG
8142 13:54:47.110300 # # SME present
8143 13:54:47.110419 # ok 3 cpuinfo_match_SME
8144 13:54:47.110536 # ok 4 sigill_SME
8145 13:54:47.110650 # # SVE present
8146 13:54:47.110794 # ok 5 cpuinfo_match_SVE
8147 13:54:47.110915 # ok 6 sigill_SVE
8148 13:54:47.111031 # # SVE 2 present
8149 13:54:47.111147 # ok 7 cpuinfo_match_SVE 2
8150 13:54:47.111263 # ok 8 sigill_SVE 2
8151 13:54:47.115655 # # SVE AES present
8152 13:54:47.116117 # ok 9 cpuinfo_match_SVE AES
8153 13:54:47.116299 # ok 10 sigill_SVE AES
8154 13:54:47.116484 # # SVE2 PMULL present
8155 13:54:47.116661 # ok 11 cpuinfo_match_SVE2 PMULL
8156 13:54:47.116849 # ok 12 sigill_SVE2 PMULL
8157 13:54:47.117043 # # SVE2 BITPERM present
8158 13:54:47.117254 # ok 13 cpuinfo_match_SVE2 BITPERM
8159 13:54:47.117429 # ok 14 sigill_SVE2 BITPERM
8160 13:54:47.117574 # # SVE2 SHA3 present
8161 13:54:47.117744 # ok 15 cpuinfo_match_SVE2 SHA3
8162 13:54:47.117867 # ok 16 sigill_SVE2 SHA3
8163 13:54:47.117981 # # SVE2 SM4 present
8164 13:54:47.118093 # ok 17 cpuinfo_match_SVE2 SM4
8165 13:54:47.118206 # ok 18 sigill_SVE2 SM4
8166 13:54:47.118319 # # SVE2 I8MM present
8167 13:54:47.118432 # ok 19 cpuinfo_match_SVE2 I8MM
8168 13:54:47.118544 # ok 20 sigill_SVE2 I8MM
8169 13:54:47.118657 # # SVE2 F32MM present
8170 13:54:47.118769 # ok 21 cpuinfo_match_SVE2 F32MM
8171 13:54:47.118882 # ok 22 sigill_SVE2 F32MM
8172 13:54:47.118994 # # SVE2 F64MM present
8173 13:54:47.119134 # ok 23 cpuinfo_match_SVE2 F64MM
8174 13:54:47.119253 # ok 24 sigill_SVE2 F64MM
8175 13:54:47.119368 # # SVE2 BF16 present
8176 13:54:47.119481 # ok 25 cpuinfo_match_SVE2 BF16
8177 13:54:47.119595 # ok 26 sigill_SVE2 BF16
8178 13:54:47.119709 # ok 27 cpuinfo_match_SVE2 EBF16
8179 13:54:47.119827 # ok 28 # SKIP sigill_SVE2 EBF16
8180 13:54:47.119939 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8181 13:54:47.149454 ok 45 selftests: arm64: hwcap
8182 13:54:47.388022 # selftests: arm64: ptrace
8183 13:54:47.627849 # TAP version 13
8184 13:54:47.628186 # 1..7
8185 13:54:47.628338 # # Parent is 4112, child is 4113
8186 13:54:47.628706 # ok 1 read_tpidr_one
8187 13:54:47.628865 # ok 2 write_tpidr_one
8188 13:54:47.628990 # ok 3 verify_tpidr_one
8189 13:54:47.629109 # ok 4 count_tpidrs
8190 13:54:47.629227 # ok 5 tpidr2_write
8191 13:54:47.629345 # ok 6 tpidr2_read
8192 13:54:47.629461 # ok 7 write_tpidr_only
8193 13:54:47.629577 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8194 13:54:47.668189 ok 46 selftests: arm64: ptrace
8195 13:54:47.853922 # selftests: arm64: syscall-abi
8196 13:54:50.502497 # TAP version 13
8197 13:54:50.502816 # 1..514
8198 13:54:50.503006 # # SME with FA64
8199 13:54:50.503178 # ok 1 getpid() FPSIMD
8200 13:54:50.503361 # ok 2 getpid() SVE VL 256
8201 13:54:50.503527 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8202 13:54:50.503971 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8203 13:54:50.504178 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8204 13:54:50.504349 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8205 13:54:50.504494 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8206 13:54:50.504655 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8207 13:54:50.504811 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8208 13:54:50.504964 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8209 13:54:50.505175 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8210 13:54:50.505351 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8211 13:54:50.505516 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8212 13:54:50.505690 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8213 13:54:50.505857 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8214 13:54:50.505997 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8215 13:54:50.506152 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8216 13:54:50.506274 # ok 18 getpid() SVE VL 240
8217 13:54:50.506389 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8218 13:54:50.506502 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8219 13:54:50.506616 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8220 13:54:50.506728 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8221 13:54:50.506840 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8222 13:54:50.506954 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8223 13:54:50.507066 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8224 13:54:50.507178 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8225 13:54:50.507291 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8226 13:54:50.507402 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8227 13:54:50.507513 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8228 13:54:50.507625 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8229 13:54:50.507737 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8230 13:54:50.507849 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8231 13:54:50.507963 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8232 13:54:50.508073 # ok 34 getpid() SVE VL 224
8233 13:54:50.508189 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8234 13:54:50.508301 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8235 13:54:50.508413 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8236 13:54:50.508525 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8237 13:54:50.508636 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8238 13:54:50.508747 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8239 13:54:50.510472 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8240 13:54:50.510987 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8241 13:54:50.511156 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8242 13:54:50.511292 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8243 13:54:50.511421 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8244 13:54:50.511544 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8245 13:54:50.511668 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8246 13:54:50.511823 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8247 13:54:50.511962 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8248 13:54:50.512090 # ok 50 getpid() SVE VL 208
8249 13:54:50.512218 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8250 13:54:50.512347 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8251 13:54:50.512474 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8252 13:54:50.512600 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8253 13:54:50.512728 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8254 13:54:50.512907 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8255 13:54:50.513068 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8256 13:54:50.513218 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8257 13:54:50.513362 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8258 13:54:50.513555 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8259 13:54:50.513772 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8260 13:54:50.513943 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8261 13:54:50.514079 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8262 13:54:50.514201 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8263 13:54:50.514373 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8264 13:54:50.514517 # ok 66 getpid() SVE VL 192
8265 13:54:50.514637 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8266 13:54:50.514787 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8267 13:54:50.514911 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8268 13:54:50.515029 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8269 13:54:50.515146 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8270 13:54:50.515262 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8271 13:54:50.515376 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8272 13:54:50.515490 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8273 13:54:50.515605 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8274 13:54:50.515720 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8275 13:54:50.515835 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8276 13:54:50.515951 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8277 13:54:50.516066 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8278 13:54:50.516180 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8279 13:54:50.518462 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8280 13:54:50.518671 # ok 82 getpid() SVE VL 176
8281 13:54:50.519072 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8282 13:54:50.519268 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8283 13:54:50.519439 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8284 13:54:50.519578 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8285 13:54:50.519697 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8286 13:54:50.519814 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8287 13:54:50.519959 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8288 13:54:50.520082 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8289 13:54:50.520197 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8290 13:54:50.520314 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8291 13:54:50.520429 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8292 13:54:50.520543 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8293 13:54:50.520659 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8294 13:54:50.520781 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8295 13:54:50.520957 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8296 13:54:50.521104 # ok 98 getpid() SVE VL 160
8297 13:54:52.984703 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8298 13:54:52.985025 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8299 13:54:52.985447 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8300 13:54:52.985642 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8301 13:54:52.985816 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8302 13:54:52.985987 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8303 13:54:52.986112 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8304 13:54:52.986228 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8305 13:54:52.986341 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8306 13:54:52.986484 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8307 13:54:52.986610 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8308 13:54:52.986765 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8309 13:54:52.986923 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8310 13:54:52.987116 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8311 13:54:52.987284 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8312 13:54:52.987449 # ok 114 getpid() SVE VL 144
8313 13:54:52.987614 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8314 13:54:52.987799 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8315 13:54:52.987958 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8316 13:54:52.988112 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8317 13:54:52.988256 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8318 13:54:52.988406 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8319 13:54:52.988554 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8320 13:54:52.988704 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8321 13:54:52.988961 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8322 13:54:52.989153 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8323 13:54:52.989313 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8324 13:54:52.989444 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8325 13:54:52.989568 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8326 13:54:52.989702 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8327 13:54:52.989828 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8328 13:54:52.989949 # ok 130 getpid() SVE VL 128
8329 13:54:52.990069 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8330 13:54:52.990213 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8331 13:54:52.990333 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8332 13:54:52.990447 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8333 13:54:52.990562 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8334 13:54:52.990675 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8335 13:54:52.990788 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8336 13:54:52.990905 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8337 13:54:52.991020 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8338 13:54:52.991133 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8339 13:54:52.994858 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8340 13:54:52.995275 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8341 13:54:52.995452 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8342 13:54:52.995581 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8343 13:54:52.995723 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8344 13:54:52.995893 # ok 146 getpid() SVE VL 112
8345 13:54:52.996018 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8346 13:54:52.996161 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8347 13:54:52.996282 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8348 13:54:52.996398 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8349 13:54:52.996604 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8350 13:54:52.996809 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8351 13:54:52.996980 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8352 13:54:52.997138 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8353 13:54:52.997324 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8354 13:54:52.997518 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8355 13:54:52.997702 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8356 13:54:52.997903 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8357 13:54:52.998073 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8358 13:54:52.998194 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8359 13:54:52.998310 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8360 13:54:52.998425 # ok 162 getpid() SVE VL 96
8361 13:54:52.998539 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8362 13:54:52.998653 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8363 13:54:53.002492 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8364 13:54:53.002941 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8365 13:54:53.003116 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8366 13:54:53.003277 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8367 13:54:53.003446 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8368 13:54:53.003661 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8369 13:54:53.003833 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8370 13:54:53.004000 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8371 13:54:53.004176 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8372 13:54:53.004351 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8373 13:54:53.004529 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8374 13:54:53.004727 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8375 13:54:53.004903 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8376 13:54:53.005080 # ok 178 getpid() SVE VL 80
8377 13:54:53.005253 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8378 13:54:53.005426 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8379 13:54:53.005599 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8380 13:54:53.005779 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8381 13:54:53.005956 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8382 13:54:53.006129 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8383 13:54:53.006303 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8384 13:54:53.006513 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8385 13:54:53.006687 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8386 13:54:53.006862 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8387 13:54:53.007037 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8388 13:54:53.007210 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8389 13:54:53.007381 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8390 13:54:53.007546 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8391 13:54:53.007718 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8392 13:54:53.007894 # ok 194 getpid() SVE VL 64
8393 13:54:53.008066 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8394 13:54:55.245232 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8395 13:54:55.245781 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8396 13:54:55.245915 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8397 13:54:55.246007 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8398 13:54:55.246087 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8399 13:54:55.246170 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8400 13:54:55.246246 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8401 13:54:55.246342 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8402 13:54:55.246423 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8403 13:54:55.246702 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8404 13:54:55.246808 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8405 13:54:55.246906 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8406 13:54:55.246999 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8407 13:54:55.247079 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8408 13:54:55.247155 # ok 210 getpid() SVE VL 48
8409 13:54:55.247246 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8410 13:54:55.247325 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8411 13:54:55.247403 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8412 13:54:55.247494 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8413 13:54:55.247573 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8414 13:54:55.247650 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8415 13:54:55.247739 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8416 13:54:55.247819 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8417 13:54:55.247908 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8418 13:54:55.247987 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8419 13:54:55.248064 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8420 13:54:55.248155 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8421 13:54:55.248247 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8422 13:54:55.248326 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8423 13:54:55.248416 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8424 13:54:55.248494 # ok 226 getpid() SVE VL 32
8425 13:54:55.248570 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8426 13:54:55.248660 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8427 13:54:55.248753 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8428 13:54:55.248832 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8429 13:54:55.248921 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8430 13:54:55.249013 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8431 13:54:55.249104 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8432 13:54:55.249419 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8433 13:54:55.249550 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8434 13:54:55.249658 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8435 13:54:55.249828 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8436 13:54:55.249929 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8437 13:54:55.250011 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8438 13:54:55.250091 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8439 13:54:55.250174 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8440 13:54:55.250268 # ok 242 getpid() SVE VL 16
8441 13:54:55.254306 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8442 13:54:55.254727 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8443 13:54:55.254914 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8444 13:54:55.255092 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8445 13:54:55.255251 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8446 13:54:55.255439 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8447 13:54:55.255590 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8448 13:54:55.255728 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8449 13:54:55.255890 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8450 13:54:55.256021 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8451 13:54:55.256197 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8452 13:54:55.256351 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8453 13:54:55.256744 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8454 13:54:55.256898 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8455 13:54:55.257019 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8456 13:54:55.257136 # ok 258 sched_yield() FPSIMD
8457 13:54:55.257251 # ok 259 sched_yield() SVE VL 256
8458 13:54:55.257366 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8459 13:54:55.257481 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8460 13:54:55.257595 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8461 13:54:55.257722 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8462 13:54:55.257838 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8463 13:54:55.257980 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8464 13:54:55.258099 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8465 13:54:55.258194 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8466 13:54:55.258273 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8467 13:54:55.258350 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8468 13:54:55.258428 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8469 13:54:55.258505 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8470 13:54:55.258583 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8471 13:54:55.258661 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8472 13:54:55.258739 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8473 13:54:55.258817 # ok 275 sched_yield() SVE VL 240
8474 13:54:55.262273 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8475 13:54:55.262738 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8476 13:54:55.262921 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8477 13:54:55.263078 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8478 13:54:55.263235 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8479 13:54:55.263437 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8480 13:54:55.263616 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8481 13:54:55.263782 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8482 13:54:55.263910 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8483 13:54:55.264025 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8484 13:54:55.264141 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8485 13:54:55.264284 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8486 13:54:55.264404 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8487 13:54:55.264520 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8488 13:54:57.271726 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8489 13:54:57.271975 # ok 291 sched_yield() SVE VL 224
8490 13:54:57.272064 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8491 13:54:57.272161 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8492 13:54:57.272254 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8493 13:54:57.272347 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8494 13:54:57.272426 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8495 13:54:57.272516 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8496 13:54:57.272807 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8497 13:54:57.272911 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8498 13:54:57.272992 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8499 13:54:57.273082 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8500 13:54:57.273161 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8501 13:54:57.273251 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8502 13:54:57.273329 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8503 13:54:57.273418 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8504 13:54:57.273497 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8505 13:54:57.273586 # ok 307 sched_yield() SVE VL 208
8506 13:54:57.273683 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8507 13:54:57.273775 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8508 13:54:57.274095 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8509 13:54:57.282233 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8510 13:54:57.282588 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8511 13:54:57.282768 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8512 13:54:57.282915 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8513 13:54:57.283079 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8514 13:54:57.283215 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8515 13:54:57.283344 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8516 13:54:57.283498 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8517 13:54:57.283632 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8518 13:54:57.283760 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8519 13:54:57.283910 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8520 13:54:57.284048 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8521 13:54:57.284179 # ok 323 sched_yield() SVE VL 192
8522 13:54:57.284331 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8523 13:54:57.284463 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8524 13:54:57.284591 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8525 13:54:57.284720 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8526 13:54:57.284873 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8527 13:54:57.285008 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8528 13:54:57.285145 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8529 13:54:57.285350 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8530 13:54:57.285521 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8531 13:54:57.285709 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8532 13:54:57.285903 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8533 13:54:57.286130 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8534 13:54:57.286315 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8535 13:54:57.286446 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8536 13:54:57.290437 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8537 13:54:57.290840 # ok 339 sched_yield() SVE VL 176
8538 13:54:57.290943 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8539 13:54:57.291040 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8540 13:54:57.291320 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8541 13:54:57.291418 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8542 13:54:57.291714 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8543 13:54:57.291828 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8544 13:54:57.292105 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8545 13:54:57.292374 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8546 13:54:57.292470 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8547 13:54:57.292563 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8548 13:54:57.292837 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8549 13:54:57.292934 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8550 13:54:57.293208 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8551 13:54:57.293348 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8552 13:54:57.293671 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8553 13:54:57.293796 # ok 355 sched_yield() SVE VL 160
8554 13:54:57.293903 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8555 13:54:57.298289 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8556 13:54:57.298643 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8557 13:54:57.298758 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8558 13:54:57.298865 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8559 13:54:57.298957 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8560 13:54:57.299061 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8561 13:54:57.299166 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8562 13:54:57.299271 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8563 13:54:57.299384 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8564 13:54:57.299681 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8565 13:54:57.299797 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8566 13:54:57.299888 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8567 13:54:57.299993 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8568 13:54:57.300087 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8569 13:54:57.300191 # ok 371 sched_yield() SVE VL 144
8570 13:54:57.300295 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8571 13:54:57.300576 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8572 13:54:57.300670 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8573 13:54:57.300773 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8574 13:54:57.300863 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8575 13:54:59.496302 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8576 13:54:59.496705 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8577 13:54:59.496812 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8578 13:54:59.496905 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8579 13:54:59.497014 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8580 13:54:59.497110 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8581 13:54:59.497222 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8582 13:54:59.497316 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8583 13:54:59.497424 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8584 13:54:59.497532 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8585 13:54:59.497624 # ok 387 sched_yield() SVE VL 128
8586 13:54:59.497949 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8587 13:54:59.498061 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8588 13:54:59.498168 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8589 13:54:59.505720 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8590 13:54:59.505923 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8591 13:54:59.506016 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8592 13:54:59.506105 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8593 13:54:59.506194 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8594 13:54:59.506284 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8595 13:54:59.506371 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8596 13:54:59.506457 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8597 13:54:59.506537 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8598 13:54:59.506617 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8599 13:54:59.506701 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8600 13:54:59.506788 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8601 13:54:59.506874 # ok 403 sched_yield() SVE VL 112
8602 13:54:59.506959 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8603 13:54:59.507045 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8604 13:54:59.507131 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8605 13:54:59.508993 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8606 13:54:59.509105 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8607 13:54:59.509195 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8608 13:54:59.510827 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8609 13:54:59.510964 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8610 13:54:59.511120 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8611 13:54:59.511225 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8612 13:54:59.511516 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8613 13:54:59.511611 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8614 13:54:59.511699 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8615 13:54:59.511785 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8616 13:54:59.511871 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8617 13:54:59.511957 # ok 419 sched_yield() SVE VL 96
8618 13:54:59.512060 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8619 13:54:59.512148 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8620 13:54:59.512236 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8621 13:54:59.512337 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8622 13:54:59.512441 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8623 13:54:59.512544 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8624 13:54:59.512644 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8625 13:54:59.512736 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8626 13:54:59.513026 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8627 13:54:59.513120 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8628 13:54:59.513217 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8629 13:54:59.513322 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8630 13:54:59.513419 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8631 13:54:59.513526 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8632 13:54:59.513811 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8633 13:54:59.513904 # ok 435 sched_yield() SVE VL 80
8634 13:54:59.514022 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8635 13:54:59.518354 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8636 13:54:59.518553 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8637 13:54:59.518951 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8638 13:54:59.519053 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8639 13:54:59.519133 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8640 13:54:59.519211 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8641 13:54:59.519288 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8642 13:54:59.519381 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8643 13:54:59.519460 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8644 13:54:59.519538 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8645 13:54:59.519630 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8646 13:54:59.519710 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8647 13:54:59.519840 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8648 13:54:59.520245 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8649 13:54:59.520392 # ok 451 sched_yield() SVE VL 64
8650 13:54:59.520471 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8651 13:54:59.520558 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8652 13:54:59.520635 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8653 13:54:59.520712 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8654 13:54:59.520804 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8655 13:54:59.520884 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8656 13:54:59.520962 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8657 13:54:59.521039 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8658 13:54:59.521131 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8659 13:54:59.521210 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8660 13:54:59.521287 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8661 13:54:59.521364 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8662 13:55:00.267062 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8663 13:55:00.267616 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8664 13:55:00.267732 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8665 13:55:00.267820 # ok 467 sched_yield() SVE VL 48
8666 13:55:00.267906 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8667 13:55:00.267991 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8668 13:55:00.268074 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8669 13:55:00.268176 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8670 13:55:00.268262 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8671 13:55:00.268344 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8672 13:55:00.268426 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8673 13:55:00.268509 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8674 13:55:00.268591 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8675 13:55:00.268706 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8676 13:55:00.268797 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8677 13:55:00.268878 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8678 13:55:00.268958 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8679 13:55:00.269040 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8680 13:55:00.269137 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8681 13:55:00.269221 # ok 483 sched_yield() SVE VL 32
8682 13:55:00.270165 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8683 13:55:00.270389 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8684 13:55:00.270604 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8685 13:55:00.270832 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8686 13:55:00.270999 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8687 13:55:00.271128 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8688 13:55:00.271242 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8689 13:55:00.271355 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8690 13:55:00.271468 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8691 13:55:00.272828 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8692 13:55:00.273274 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8693 13:55:00.273470 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8694 13:55:00.273635 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8695 13:55:00.273807 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8696 13:55:00.274042 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8697 13:55:00.274218 # ok 499 sched_yield() SVE VL 16
8698 13:55:00.274351 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8699 13:55:00.274470 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8700 13:55:00.274587 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8701 13:55:00.274713 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8702 13:55:00.274830 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8703 13:55:00.275022 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8704 13:55:00.284345 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8705 13:55:00.284462 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8706 13:55:00.284550 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8707 13:55:00.284931 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8708 13:55:00.285135 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8709 13:55:00.285306 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8710 13:55:00.285465 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8711 13:55:00.285591 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8712 13:55:00.285725 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8713 13:55:00.285874 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8714 13:55:00.286026 ok 47 selftests: arm64: syscall-abi
8715 13:55:00.350825 # selftests: arm64: tpidr2
8716 13:55:00.512217 # TAP version 13
8717 13:55:00.512529 # 1..5
8718 13:55:00.512656 # # PID: 4147
8719 13:55:00.512996 # ok 1 default_value
8720 13:55:00.513120 # ok 2 write_read
8721 13:55:00.513292 # ok 3 write_sleep_read
8722 13:55:00.513452 # ok 4 write_fork_read
8723 13:55:00.513602 # ok 5 write_clone_read
8724 13:55:00.513779 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8725 13:55:00.522786 ok 48 selftests: arm64: tpidr2
8726 13:55:01.038570 arm64_tags_test pass
8727 13:55:01.038913 arm64_run_tags_test_sh pass
8728 13:55:01.039496 arm64_fake_sigreturn_bad_magic pass
8729 13:55:01.039705 arm64_fake_sigreturn_bad_size pass
8730 13:55:01.039887 arm64_fake_sigreturn_bad_size_for_magic0 pass
8731 13:55:01.040050 arm64_fake_sigreturn_duplicated_fpsimd pass
8732 13:55:01.040209 arm64_fake_sigreturn_misaligned_sp pass
8733 13:55:01.040372 arm64_fake_sigreturn_missing_fpsimd pass
8734 13:55:01.040535 arm64_fake_sigreturn_sme_change_vl pass
8735 13:55:01.040697 arm64_fake_sigreturn_sve_change_vl pass
8736 13:55:01.040855 arm64_mangle_pstate_invalid_compat_toggle pass
8737 13:55:01.041043 arm64_mangle_pstate_invalid_daif_bits pass
8738 13:55:01.041205 arm64_mangle_pstate_invalid_mode_el1h pass
8739 13:55:01.041363 arm64_mangle_pstate_invalid_mode_el1t pass
8740 13:55:01.041514 arm64_mangle_pstate_invalid_mode_el2h pass
8741 13:55:01.041686 arm64_mangle_pstate_invalid_mode_el2t pass
8742 13:55:01.041863 arm64_mangle_pstate_invalid_mode_el3h pass
8743 13:55:01.041999 arm64_mangle_pstate_invalid_mode_el3t pass
8744 13:55:01.042120 arm64_sme_trap_no_sm pass
8745 13:55:01.042236 arm64_sme_trap_non_streaming skip
8746 13:55:01.042350 arm64_sme_trap_za pass
8747 13:55:01.042462 arm64_sme_vl pass
8748 13:55:01.042575 arm64_ssve_regs pass
8749 13:55:01.042687 arm64_sve_regs pass
8750 13:55:01.042800 arm64_sve_vl pass
8751 13:55:01.042912 arm64_za_no_regs pass
8752 13:55:01.043025 arm64_za_regs pass
8753 13:55:01.043136 arm64_pac_global_corrupt_pac pass
8754 13:55:01.043249 arm64_pac_global_pac_instructions_not_nop pass
8755 13:55:01.043364 arm64_pac_global_pac_instructions_not_nop_generic pass
8756 13:55:01.043478 arm64_pac_global_single_thread_different_keys pass
8757 13:55:01.043592 arm64_pac_global_exec_changed_keys pass
8758 13:55:01.043737 arm64_pac_global_context_switch_keep_keys pass
8759 13:55:01.043857 arm64_pac_global_context_switch_keep_keys_generic pass
8760 13:55:01.043973 arm64_pac pass
8761 13:55:01.044086 arm64_fp-stress_FPSIMD-0-0 pass
8762 13:55:01.044200 arm64_fp-stress_SVE-VL-256-0 pass
8763 13:55:01.044313 arm64_fp-stress_SVE-VL-240-0 pass
8764 13:55:01.044425 arm64_fp-stress_SVE-VL-224-0 pass
8765 13:55:01.044537 arm64_fp-stress_SVE-VL-208-0 pass
8766 13:55:01.044651 arm64_fp-stress_SVE-VL-192-0 pass
8767 13:55:01.044762 arm64_fp-stress_SVE-VL-176-0 pass
8768 13:55:01.044879 arm64_fp-stress_SVE-VL-160-0 pass
8769 13:55:01.046262 arm64_fp-stress_SVE-VL-144-0 pass
8770 13:55:01.046680 arm64_fp-stress_SVE-VL-128-0 pass
8771 13:55:01.046791 arm64_fp-stress_SVE-VL-112-0 pass
8772 13:55:01.046885 arm64_fp-stress_SVE-VL-96-0 pass
8773 13:55:01.046976 arm64_fp-stress_SVE-VL-80-0 pass
8774 13:55:01.047067 arm64_fp-stress_SVE-VL-64-0 pass
8775 13:55:01.047154 arm64_fp-stress_SVE-VL-48-0 pass
8776 13:55:01.047257 arm64_fp-stress_SVE-VL-32-0 pass
8777 13:55:01.047345 arm64_fp-stress_SVE-VL-16-0 pass
8778 13:55:01.047428 arm64_fp-stress_SSVE-VL-256-0 pass
8779 13:55:01.047512 arm64_fp-stress_ZA-VL-256-0 pass
8780 13:55:01.047598 arm64_fp-stress_SSVE-VL-128-0 pass
8781 13:55:01.047680 arm64_fp-stress_ZA-VL-128-0 pass
8782 13:55:01.047779 arm64_fp-stress_SSVE-VL-64-0 pass
8783 13:55:01.047864 arm64_fp-stress_ZA-VL-64-0 pass
8784 13:55:01.047944 arm64_fp-stress_SSVE-VL-32-0 pass
8785 13:55:01.048026 arm64_fp-stress_ZA-VL-32-0 pass
8786 13:55:01.048110 arm64_fp-stress_SSVE-VL-16-0 pass
8787 13:55:01.048202 arm64_fp-stress_ZA-VL-16-0 pass
8788 13:55:01.048287 arm64_fp-stress pass
8789 13:55:01.048390 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8790 13:55:01.048477 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8791 13:55:01.048564 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8792 13:55:01.048648 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8793 13:55:01.048730 arm64_sve-ptrace_Set_SVE_VL_16 pass
8794 13:55:01.048833 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8795 13:55:01.048923 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8796 13:55:01.049026 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8797 13:55:01.049112 arm64_sve-ptrace_Set_SVE_VL_32 pass
8798 13:55:01.049211 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8799 13:55:01.049307 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8800 13:55:01.049407 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8801 13:55:01.049508 arm64_sve-ptrace_Set_SVE_VL_48 pass
8802 13:55:01.049609 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8803 13:55:01.050151 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8804 13:55:01.050247 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8805 13:55:01.050335 arm64_sve-ptrace_Set_SVE_VL_64 pass
8806 13:55:01.050426 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8807 13:55:01.054199 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8808 13:55:01.054482 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8809 13:55:01.054585 arm64_sve-ptrace_Set_SVE_VL_80 pass
8810 13:55:01.054689 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8811 13:55:01.054781 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8812 13:55:01.054886 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8813 13:55:01.054978 arm64_sve-ptrace_Set_SVE_VL_96 pass
8814 13:55:01.055081 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8815 13:55:01.055186 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8816 13:55:01.055290 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8817 13:55:01.055406 arm64_sve-ptrace_Set_SVE_VL_112 pass
8818 13:55:01.055515 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8819 13:55:01.055623 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8820 13:55:01.055974 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8821 13:55:01.056175 arm64_sve-ptrace_Set_SVE_VL_128 pass
8822 13:55:01.056336 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8823 13:55:01.056530 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8824 13:55:01.056692 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8825 13:55:01.056860 arm64_sve-ptrace_Set_SVE_VL_144 pass
8826 13:55:01.057023 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8827 13:55:01.057241 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8828 13:55:01.057385 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8829 13:55:01.057533 arm64_sve-ptrace_Set_SVE_VL_160 pass
8830 13:55:01.057697 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8831 13:55:01.057861 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8832 13:55:01.058041 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8833 13:55:01.058204 arm64_sve-ptrace_Set_SVE_VL_176 pass
8834 13:55:01.058326 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8835 13:55:01.058449 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8836 13:55:01.058565 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8837 13:55:01.058678 arm64_sve-ptrace_Set_SVE_VL_192 pass
8838 13:55:01.058791 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8839 13:55:01.062251 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8840 13:55:01.062754 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8841 13:55:01.062986 arm64_sve-ptrace_Set_SVE_VL_208 pass
8842 13:55:01.063202 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8843 13:55:01.063393 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8844 13:55:01.063635 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8845 13:55:01.063858 arm64_sve-ptrace_Set_SVE_VL_224 pass
8846 13:55:01.064046 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8847 13:55:01.064241 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8848 13:55:01.064454 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8849 13:55:01.064650 arm64_sve-ptrace_Set_SVE_VL_240 pass
8850 13:55:01.064859 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8851 13:55:01.065052 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8852 13:55:01.065294 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8853 13:55:01.065501 arm64_sve-ptrace_Set_SVE_VL_256 pass
8854 13:55:01.065715 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8855 13:55:01.065939 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8856 13:55:01.066147 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8857 13:55:01.066337 arm64_sve-ptrace_Set_SVE_VL_272 pass
8858 13:55:01.066484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8859 13:55:01.066626 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8860 13:55:01.066771 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8861 13:55:01.066912 arm64_sve-ptrace_Set_SVE_VL_288 pass
8862 13:55:01.067054 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8863 13:55:01.067198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8864 13:55:01.067339 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8865 13:55:01.067479 arm64_sve-ptrace_Set_SVE_VL_304 pass
8866 13:55:01.067659 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8867 13:55:01.067798 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8868 13:55:01.067943 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8869 13:55:01.068085 arm64_sve-ptrace_Set_SVE_VL_320 pass
8870 13:55:01.068227 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8871 13:55:01.068368 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8872 13:55:01.070221 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8873 13:55:01.070705 arm64_sve-ptrace_Set_SVE_VL_336 pass
8874 13:55:01.070911 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8875 13:55:01.071081 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8876 13:55:01.071243 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8877 13:55:01.071395 arm64_sve-ptrace_Set_SVE_VL_352 pass
8878 13:55:01.071589 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8879 13:55:01.071806 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8880 13:55:01.072021 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8881 13:55:01.072244 arm64_sve-ptrace_Set_SVE_VL_368 pass
8882 13:55:01.072469 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8883 13:55:01.072691 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8884 13:55:01.072895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8885 13:55:01.073110 arm64_sve-ptrace_Set_SVE_VL_384 pass
8886 13:55:01.073369 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8887 13:55:01.073575 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8888 13:55:01.074113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8889 13:55:01.074286 arm64_sve-ptrace_Set_SVE_VL_400 pass
8890 13:55:01.074433 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8891 13:55:01.074578 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8892 13:55:01.074720 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8893 13:55:01.074861 arm64_sve-ptrace_Set_SVE_VL_416 pass
8894 13:55:01.075004 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8895 13:55:01.075147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8896 13:55:01.075288 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8897 13:55:01.075432 arm64_sve-ptrace_Set_SVE_VL_432 pass
8898 13:55:01.075574 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8899 13:55:01.075715 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8900 13:55:01.075895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8901 13:55:01.076033 arm64_sve-ptrace_Set_SVE_VL_448 pass
8902 13:55:01.076178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8903 13:55:01.076321 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8904 13:55:01.093194 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8905 13:55:01.093606 arm64_sve-ptrace_Set_SVE_VL_464 pass
8906 13:55:01.093799 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8907 13:55:01.094202 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8908 13:55:01.094407 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8909 13:55:01.094625 arm64_sve-ptrace_Set_SVE_VL_480 pass
8910 13:55:01.094821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8911 13:55:01.095024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8912 13:55:01.095208 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8913 13:55:01.095365 arm64_sve-ptrace_Set_SVE_VL_496 pass
8914 13:55:01.095549 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8915 13:55:01.095751 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8916 13:55:01.095895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8917 13:55:01.096061 arm64_sve-ptrace_Set_SVE_VL_512 pass
8918 13:55:01.096201 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8919 13:55:01.096399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8920 13:55:01.096591 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8921 13:55:01.096747 arm64_sve-ptrace_Set_SVE_VL_528 pass
8922 13:55:01.096909 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8923 13:55:01.097066 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8924 13:55:01.097264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8925 13:55:01.097431 arm64_sve-ptrace_Set_SVE_VL_544 pass
8926 13:55:01.097614 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8927 13:55:01.097815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8928 13:55:01.098002 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8929 13:55:01.098192 arm64_sve-ptrace_Set_SVE_VL_560 pass
8930 13:55:01.098362 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8931 13:55:01.098509 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8932 13:55:01.098694 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8933 13:55:01.098831 arm64_sve-ptrace_Set_SVE_VL_576 pass
8934 13:55:01.098973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8935 13:55:01.099114 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8936 13:55:01.099260 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8937 13:55:01.099402 arm64_sve-ptrace_Set_SVE_VL_592 pass
8938 13:55:01.099543 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
8939 13:55:01.099684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
8940 13:55:01.099825 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
8941 13:55:01.099966 arm64_sve-ptrace_Set_SVE_VL_608 pass
8942 13:55:01.100108 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
8943 13:55:01.100248 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
8944 13:55:01.100388 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
8945 13:55:01.100745 arm64_sve-ptrace_Set_SVE_VL_624 pass
8946 13:55:01.100883 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
8947 13:55:01.101026 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
8948 13:55:01.102273 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
8949 13:55:01.102672 arm64_sve-ptrace_Set_SVE_VL_640 pass
8950 13:55:01.102774 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
8951 13:55:01.102868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
8952 13:55:01.102956 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
8953 13:55:01.103057 arm64_sve-ptrace_Set_SVE_VL_656 pass
8954 13:55:01.103148 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
8955 13:55:01.103233 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
8956 13:55:01.103319 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
8957 13:55:01.103425 arm64_sve-ptrace_Set_SVE_VL_672 pass
8958 13:55:01.103551 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
8959 13:55:01.103659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
8960 13:55:01.103780 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
8961 13:55:01.103878 arm64_sve-ptrace_Set_SVE_VL_688 pass
8962 13:55:01.103985 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
8963 13:55:01.104078 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
8964 13:55:01.104179 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
8965 13:55:01.104305 arm64_sve-ptrace_Set_SVE_VL_704 pass
8966 13:55:01.104413 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
8967 13:55:01.104524 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
8968 13:55:01.104676 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
8969 13:55:01.104798 arm64_sve-ptrace_Set_SVE_VL_720 pass
8970 13:55:01.104905 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
8971 13:55:01.105010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
8972 13:55:01.105114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
8973 13:55:01.105216 arm64_sve-ptrace_Set_SVE_VL_736 pass
8974 13:55:01.105326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
8975 13:55:01.105425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
8976 13:55:01.105525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
8977 13:55:01.105856 arm64_sve-ptrace_Set_SVE_VL_752 pass
8978 13:55:01.105959 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
8979 13:55:01.106047 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
8980 13:55:01.106150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
8981 13:55:01.110457 arm64_sve-ptrace_Set_SVE_VL_768 pass
8982 13:55:01.110685 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
8983 13:55:01.110923 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
8984 13:55:01.111113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
8985 13:55:01.111286 arm64_sve-ptrace_Set_SVE_VL_784 pass
8986 13:55:01.111512 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
8987 13:55:01.111710 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
8988 13:55:01.111879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
8989 13:55:01.112039 arm64_sve-ptrace_Set_SVE_VL_800 pass
8990 13:55:01.112204 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
8991 13:55:01.112443 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
8992 13:55:01.112636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
8993 13:55:01.112799 arm64_sve-ptrace_Set_SVE_VL_816 pass
8994 13:55:01.112977 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
8995 13:55:01.113143 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
8996 13:55:01.113294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
8997 13:55:01.113440 arm64_sve-ptrace_Set_SVE_VL_832 pass
8998 13:55:01.113626 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
8999 13:55:01.114364 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
9000 13:55:01.114495 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
9001 13:55:01.114611 arm64_sve-ptrace_Set_SVE_VL_848 pass
9002 13:55:01.114727 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
9003 13:55:01.114844 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
9004 13:55:01.114961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
9005 13:55:01.115078 arm64_sve-ptrace_Set_SVE_VL_864 pass
9006 13:55:01.115193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
9007 13:55:01.115308 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
9008 13:55:01.115425 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
9009 13:55:01.115541 arm64_sve-ptrace_Set_SVE_VL_880 pass
9010 13:55:01.115686 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
9011 13:55:01.115811 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
9012 13:55:01.115930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
9013 13:55:01.116045 arm64_sve-ptrace_Set_SVE_VL_896 pass
9014 13:55:01.118283 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
9015 13:55:01.118736 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
9016 13:55:01.118940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
9017 13:55:01.119177 arm64_sve-ptrace_Set_SVE_VL_912 pass
9018 13:55:01.119385 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
9019 13:55:01.119630 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
9020 13:55:01.119857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
9021 13:55:01.120073 arm64_sve-ptrace_Set_SVE_VL_928 pass
9022 13:55:01.120266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
9023 13:55:01.120443 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
9024 13:55:01.120678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
9025 13:55:01.120907 arm64_sve-ptrace_Set_SVE_VL_944 pass
9026 13:55:01.121140 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
9027 13:55:01.121335 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
9028 13:55:01.121510 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
9029 13:55:01.121681 arm64_sve-ptrace_Set_SVE_VL_960 pass
9030 13:55:01.121872 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
9031 13:55:01.122357 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
9032 13:55:01.122529 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
9033 13:55:01.122675 arm64_sve-ptrace_Set_SVE_VL_976 pass
9034 13:55:01.122818 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
9035 13:55:01.122960 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
9036 13:55:01.123102 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
9037 13:55:01.123244 arm64_sve-ptrace_Set_SVE_VL_992 pass
9038 13:55:01.123391 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
9039 13:55:01.123532 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
9040 13:55:01.123715 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
9041 13:55:01.123853 arm64_sve-ptrace_Set_SVE_VL_1008 pass
9042 13:55:01.123996 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
9043 13:55:01.124139 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
9044 13:55:01.124286 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
9045 13:55:01.124428 arm64_sve-ptrace_Set_SVE_VL_1024 pass
9046 13:55:01.124570 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
9047 13:55:01.126281 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
9048 13:55:01.126735 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
9049 13:55:01.126924 arm64_sve-ptrace_Set_SVE_VL_1040 pass
9050 13:55:01.127094 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
9051 13:55:01.127260 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
9052 13:55:01.127461 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
9053 13:55:01.127631 arm64_sve-ptrace_Set_SVE_VL_1056 pass
9054 13:55:01.127790 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
9055 13:55:01.127947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
9056 13:55:01.128104 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
9057 13:55:01.128280 arm64_sve-ptrace_Set_SVE_VL_1072 pass
9058 13:55:01.128484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
9059 13:55:01.128653 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
9060 13:55:01.128786 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
9061 13:55:01.128902 arm64_sve-ptrace_Set_SVE_VL_1088 pass
9062 13:55:01.129030 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
9063 13:55:01.129196 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
9064 13:55:01.129327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
9065 13:55:01.129469 arm64_sve-ptrace_Set_SVE_VL_1104 pass
9066 13:55:01.145586 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
9067 13:55:01.145854 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
9068 13:55:01.146230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
9069 13:55:01.146431 arm64_sve-ptrace_Set_SVE_VL_1120 pass
9070 13:55:01.146610 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
9071 13:55:01.146834 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
9072 13:55:01.147048 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
9073 13:55:01.147239 arm64_sve-ptrace_Set_SVE_VL_1136 pass
9074 13:55:01.147396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
9075 13:55:01.147545 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
9076 13:55:01.147708 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
9077 13:55:01.147887 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9078 13:55:01.148101 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9079 13:55:01.148368 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9080 13:55:01.148584 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9081 13:55:01.148790 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9082 13:55:01.148991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9083 13:55:01.149167 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9084 13:55:01.149330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9085 13:55:01.149491 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9086 13:55:01.149644 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9087 13:55:01.150374 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9088 13:55:01.150499 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9089 13:55:01.150666 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9090 13:55:01.150793 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9091 13:55:01.150910 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9092 13:55:01.151026 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9093 13:55:01.151142 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9094 13:55:01.151257 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9095 13:55:01.151374 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9096 13:55:01.151490 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9097 13:55:01.151606 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9098 13:55:01.151720 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9099 13:55:01.151833 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9100 13:55:01.151947 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9101 13:55:01.152062 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9102 13:55:01.152175 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9103 13:55:01.152289 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9104 13:55:01.154234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9105 13:55:01.154647 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9106 13:55:01.154747 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9107 13:55:01.154853 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9108 13:55:01.154961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9109 13:55:01.155082 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9110 13:55:01.155175 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9111 13:55:01.155268 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9112 13:55:01.155398 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9113 13:55:01.155589 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9114 13:55:01.155748 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9115 13:55:01.155935 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9116 13:55:01.156094 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9117 13:55:01.156235 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9118 13:55:01.156418 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9119 13:55:01.156580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9120 13:55:01.156737 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9121 13:55:01.156881 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9122 13:55:01.157067 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9123 13:55:01.157238 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9124 13:55:01.157400 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9125 13:55:01.157555 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9126 13:55:01.157769 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9127 13:55:01.157949 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9128 13:55:01.158129 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9129 13:55:01.158256 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9130 13:55:01.158374 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9131 13:55:01.158493 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9132 13:55:01.158637 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9133 13:55:01.158762 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9134 13:55:01.162318 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9135 13:55:01.162876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9136 13:55:01.163094 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9137 13:55:01.163332 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9138 13:55:01.163550 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9139 13:55:01.163759 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9140 13:55:01.163968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9141 13:55:01.164133 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9142 13:55:01.164296 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9143 13:55:01.164459 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9144 13:55:01.164620 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9145 13:55:01.164768 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9146 13:55:01.164932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9147 13:55:01.165082 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9148 13:55:01.165240 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9149 13:55:01.165443 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9150 13:55:01.165613 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9151 13:55:01.165810 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9152 13:55:01.166007 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9153 13:55:01.166160 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9154 13:55:01.166280 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9155 13:55:01.166397 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9156 13:55:01.166509 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9157 13:55:01.166619 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9158 13:55:01.166730 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9159 13:55:01.166840 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9160 13:55:01.166949 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9161 13:55:01.167088 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9162 13:55:01.167207 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9163 13:55:01.167319 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9164 13:55:01.167433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9165 13:55:01.167543 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9166 13:55:01.170217 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9167 13:55:01.170681 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9168 13:55:01.170789 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9169 13:55:01.170880 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9170 13:55:01.170970 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9171 13:55:01.171262 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9172 13:55:01.171366 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9173 13:55:01.171455 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9174 13:55:01.171540 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9175 13:55:01.171632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9176 13:55:01.171738 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9177 13:55:01.171827 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9178 13:55:01.171915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9179 13:55:01.172003 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9180 13:55:01.172107 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9181 13:55:01.172212 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9182 13:55:01.172318 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9183 13:55:01.172408 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9184 13:55:01.172497 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9185 13:55:01.172599 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9186 13:55:01.172705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9187 13:55:01.172795 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9188 13:55:01.172900 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9189 13:55:01.173006 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9190 13:55:01.173111 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9191 13:55:01.173216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9192 13:55:01.173327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9193 13:55:01.173418 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9194 13:55:01.173521 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9195 13:55:01.173624 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9196 13:55:01.173736 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9197 13:55:01.173822 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9198 13:55:01.173928 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9199 13:55:01.174033 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9200 13:55:01.178234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9201 13:55:01.178709 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9202 13:55:01.178913 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9203 13:55:01.179128 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9204 13:55:01.179361 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9205 13:55:01.179543 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9206 13:55:01.179705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9207 13:55:01.179849 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9208 13:55:01.180009 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9209 13:55:01.180167 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9210 13:55:01.180364 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9211 13:55:01.180528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9212 13:55:01.180692 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9213 13:55:01.180855 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9214 13:55:01.181046 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9215 13:55:01.181207 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9216 13:55:01.181332 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9217 13:55:01.181450 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9218 13:55:01.181582 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9219 13:55:01.181807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9220 13:55:01.182018 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9221 13:55:01.182205 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9222 13:55:01.182361 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9223 13:55:01.182511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9224 13:55:01.182655 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9225 13:55:01.182798 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9226 13:55:01.198426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9227 13:55:01.198728 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9228 13:55:01.199149 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9229 13:55:01.199322 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9230 13:55:01.199495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9231 13:55:01.199643 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9232 13:55:01.199788 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9233 13:55:01.199969 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9234 13:55:01.200106 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9235 13:55:01.200250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9236 13:55:01.200426 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9237 13:55:01.200600 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9238 13:55:01.200745 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9239 13:55:01.200940 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9240 13:55:01.201117 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9241 13:55:01.201300 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9242 13:55:01.201474 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9243 13:55:01.201621 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9244 13:55:01.201777 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9245 13:55:01.201936 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9246 13:55:01.202148 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9247 13:55:01.202287 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9248 13:55:01.202429 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9249 13:55:01.202571 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9250 13:55:01.202711 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9251 13:55:01.202852 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9252 13:55:01.202992 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9253 13:55:01.203131 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9254 13:55:01.206389 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9255 13:55:01.206632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9256 13:55:01.206830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9257 13:55:01.206991 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9258 13:55:01.207206 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9259 13:55:01.207388 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9260 13:55:01.207573 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9261 13:55:01.207798 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9262 13:55:01.207989 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9263 13:55:01.208166 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9264 13:55:01.208363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9265 13:55:01.208513 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9266 13:55:01.208711 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9267 13:55:01.208874 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9268 13:55:01.209041 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9269 13:55:01.209202 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9270 13:55:01.209359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9271 13:55:01.209517 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9272 13:55:01.210151 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9273 13:55:01.210327 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9274 13:55:01.210519 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9275 13:55:01.210654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9276 13:55:01.210797 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9277 13:55:01.210938 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9278 13:55:01.211078 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9279 13:55:01.211220 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9280 13:55:01.211362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9281 13:55:01.211504 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9282 13:55:01.211644 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9283 13:55:01.211785 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9284 13:55:01.211925 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9285 13:55:01.214230 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9286 13:55:01.214694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9287 13:55:01.214912 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9288 13:55:01.215106 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9289 13:55:01.215281 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9290 13:55:01.215463 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9291 13:55:01.215611 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9292 13:55:01.215788 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9293 13:55:01.216000 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9294 13:55:01.216215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9295 13:55:01.216423 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9296 13:55:01.216677 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9297 13:55:01.216895 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9298 13:55:01.217088 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9299 13:55:01.217258 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9300 13:55:01.217417 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9301 13:55:01.217573 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9302 13:55:01.218186 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9303 13:55:01.218325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9304 13:55:01.218444 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9305 13:55:01.218563 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9306 13:55:01.218718 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9307 13:55:01.218843 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9308 13:55:01.218961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9309 13:55:01.219076 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9310 13:55:01.219192 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9311 13:55:01.219308 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9312 13:55:01.219423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9313 13:55:01.219539 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9314 13:55:01.219654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9315 13:55:01.219771 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9316 13:55:01.219887 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9317 13:55:01.220003 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9318 13:55:01.220118 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9319 13:55:01.220235 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9320 13:55:01.220351 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9321 13:55:01.220466 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9322 13:55:01.222213 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9323 13:55:01.222569 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9324 13:55:01.222673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9325 13:55:01.222761 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9326 13:55:01.222859 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9327 13:55:01.222942 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9328 13:55:01.223043 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9329 13:55:01.223129 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9330 13:55:01.223226 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9331 13:55:01.223329 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9332 13:55:01.223643 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9333 13:55:01.223761 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9334 13:55:01.223853 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9335 13:55:01.223938 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9336 13:55:01.224039 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9337 13:55:01.224129 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9338 13:55:01.224211 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9339 13:55:01.224310 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9340 13:55:01.224408 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9341 13:55:01.224497 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9342 13:55:01.224593 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9343 13:55:01.224692 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9344 13:55:01.224791 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9345 13:55:01.224886 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9346 13:55:01.224980 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9347 13:55:01.225300 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9348 13:55:01.225506 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9349 13:55:01.225724 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9350 13:55:01.225945 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9351 13:55:01.226091 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9352 13:55:01.226211 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9353 13:55:01.226348 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9354 13:55:01.230310 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9355 13:55:01.230868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9356 13:55:01.231063 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9357 13:55:01.231221 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9358 13:55:01.231399 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9359 13:55:01.231576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9360 13:55:01.233824 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9361 13:55:01.234004 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9362 13:55:01.234178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9363 13:55:01.234325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9364 13:55:01.234468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9365 13:55:01.234612 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9366 13:55:01.234754 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9367 13:55:01.234896 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9368 13:55:01.235038 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9369 13:55:01.235178 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9370 13:55:01.235319 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9371 13:55:01.235461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9372 13:55:01.235602 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9373 13:55:01.235743 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9374 13:55:01.235884 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9375 13:55:01.236024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9376 13:55:01.236163 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9377 13:55:01.236305 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9378 13:55:01.236447 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9379 13:55:01.236587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9380 13:55:01.236771 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9381 13:55:01.236930 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9382 13:55:01.237274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9383 13:55:01.237406 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9384 13:55:01.238251 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9385 13:55:01.238421 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9386 13:55:01.250124 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9387 13:55:01.250743 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9388 13:55:01.250960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9389 13:55:01.251155 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9390 13:55:01.251373 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9391 13:55:01.251586 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9392 13:55:01.251826 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9393 13:55:01.252050 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9394 13:55:01.252269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9395 13:55:01.252489 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9396 13:55:01.252715 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9397 13:55:01.252891 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9398 13:55:01.253059 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9399 13:55:01.253216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9400 13:55:01.253364 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9401 13:55:01.253569 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9402 13:55:01.254246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9403 13:55:01.254392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9404 13:55:01.254567 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9405 13:55:01.254695 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9406 13:55:01.254814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9407 13:55:01.254978 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9408 13:55:01.255131 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9409 13:55:01.255297 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9410 13:55:01.255420 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9411 13:55:01.255577 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9412 13:55:01.255701 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9413 13:55:01.255847 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9414 13:55:01.255972 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9415 13:55:01.256118 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9416 13:55:01.256285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9417 13:55:01.256443 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9418 13:55:01.256565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9419 13:55:01.256723 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9420 13:55:01.256845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9421 13:55:01.258219 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9422 13:55:01.258641 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9423 13:55:01.258820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9424 13:55:01.258990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9425 13:55:01.259162 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9426 13:55:01.259297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9427 13:55:01.259434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9428 13:55:01.259625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9429 13:55:01.259813 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9430 13:55:01.259999 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9431 13:55:01.260171 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9432 13:55:01.260310 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9433 13:55:01.260467 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9434 13:55:01.260640 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9435 13:55:01.260800 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9436 13:55:01.260961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9437 13:55:01.261121 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9438 13:55:01.261282 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9439 13:55:01.261476 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9440 13:55:01.261636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9441 13:55:01.262143 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9442 13:55:01.262316 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9443 13:55:01.262461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9444 13:55:01.262607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9445 13:55:01.262791 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9446 13:55:01.263003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9447 13:55:01.263144 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9448 13:55:01.263289 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9449 13:55:01.263431 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9450 13:55:01.266264 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9451 13:55:01.266460 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9452 13:55:01.266856 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9453 13:55:01.266994 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9454 13:55:01.267140 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9455 13:55:01.267283 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9456 13:55:01.267457 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9457 13:55:01.267595 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9458 13:55:01.267739 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9459 13:55:01.267881 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9460 13:55:01.268056 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9461 13:55:01.268193 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9462 13:55:01.268334 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9463 13:55:01.268477 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9464 13:55:01.268654 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9465 13:55:01.268818 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9466 13:55:01.268995 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9467 13:55:01.269143 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9468 13:55:01.269309 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9469 13:55:01.269474 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9470 13:55:01.269680 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9471 13:55:01.269834 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9472 13:55:01.270028 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9473 13:55:01.270234 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9474 13:55:01.270376 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9475 13:55:01.270495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9476 13:55:01.270615 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9477 13:55:01.270730 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9478 13:55:01.274238 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9479 13:55:01.274702 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9480 13:55:01.274929 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9481 13:55:01.275146 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9482 13:55:01.275416 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9483 13:55:01.275637 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9484 13:55:01.275845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9485 13:55:01.276047 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9486 13:55:01.276261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9487 13:55:01.276474 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9488 13:55:01.276687 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9489 13:55:01.276957 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9490 13:55:01.277185 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9491 13:55:01.277412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9492 13:55:01.277628 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9493 13:55:01.278291 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9494 13:55:01.278420 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9495 13:55:01.278538 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9496 13:55:01.278659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9497 13:55:01.278776 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9498 13:55:01.278893 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9499 13:55:01.279010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9500 13:55:01.279165 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9501 13:55:01.279290 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9502 13:55:01.279408 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9503 13:55:01.279526 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9504 13:55:01.279643 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9505 13:55:01.279760 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9506 13:55:01.279875 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9507 13:55:01.279991 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9508 13:55:01.280108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9509 13:55:01.280224 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9510 13:55:01.280339 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9511 13:55:01.280455 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9512 13:55:01.282427 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9513 13:55:01.282680 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9514 13:55:01.282874 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9515 13:55:01.283380 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9516 13:55:01.283585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9517 13:55:01.283743 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9518 13:55:01.283896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9519 13:55:01.284104 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9520 13:55:01.284295 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9521 13:55:01.284458 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9522 13:55:01.284613 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9523 13:55:01.284815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9524 13:55:01.285056 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9525 13:55:01.285251 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9526 13:55:01.285450 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9527 13:55:01.285587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9528 13:55:01.285763 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9529 13:55:01.285964 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9530 13:55:01.286112 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9531 13:55:01.286256 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9532 13:55:01.286399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9533 13:55:01.286540 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9534 13:55:01.286681 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9535 13:55:01.286823 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9536 13:55:01.287010 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9537 13:55:01.287147 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9538 13:55:01.287290 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9539 13:55:01.287432 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9540 13:55:01.287575 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9541 13:55:01.287718 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9542 13:55:01.287860 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9543 13:55:01.288004 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9544 13:55:01.288146 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9545 13:55:01.288287 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9546 13:55:01.305067 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9547 13:55:01.305704 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9548 13:55:01.305935 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9549 13:55:01.306134 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9550 13:55:01.306359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9551 13:55:01.306577 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9552 13:55:01.306795 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9553 13:55:01.307059 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9554 13:55:01.307260 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9555 13:55:01.307434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9556 13:55:01.307585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9557 13:55:01.307742 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9558 13:55:01.307896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9559 13:55:01.308042 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9560 13:55:01.308220 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9561 13:55:01.308389 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9562 13:55:01.308535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9563 13:55:01.308664 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9564 13:55:01.308824 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9565 13:55:01.308952 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9566 13:55:01.309077 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9567 13:55:01.309221 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9568 13:55:01.309372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9569 13:55:01.309503 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9570 13:55:01.309624 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9571 13:55:01.309876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9572 13:55:01.310072 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9573 13:55:01.310256 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9574 13:55:01.310440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9575 13:55:01.310623 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9576 13:55:01.310775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9577 13:55:01.310946 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9578 13:55:01.311108 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9579 13:55:01.311323 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9580 13:55:01.311503 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9581 13:55:01.311672 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9582 13:55:01.311829 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9583 13:55:01.311983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9584 13:55:01.312138 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9585 13:55:01.312530 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9586 13:55:01.312696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9587 13:55:01.314203 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9588 13:55:01.314663 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9589 13:55:01.314859 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9590 13:55:01.315019 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9591 13:55:01.315200 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9592 13:55:01.315359 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9593 13:55:01.315513 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9594 13:55:01.315667 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9595 13:55:01.315851 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9596 13:55:01.316010 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9597 13:55:01.316164 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9598 13:55:01.316317 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9599 13:55:01.316471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9600 13:55:01.316654 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9601 13:55:01.316813 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9602 13:55:01.316967 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9603 13:55:01.317121 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9604 13:55:01.317274 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9605 13:55:01.317427 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9606 13:55:01.317580 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9607 13:55:01.317784 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9608 13:55:01.317943 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9609 13:55:01.318096 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9610 13:55:01.318249 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9611 13:55:01.318407 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9612 13:55:01.318560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9613 13:55:01.318713 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9614 13:55:01.318865 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9615 13:55:01.319017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9616 13:55:01.319199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9617 13:55:01.319358 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9618 13:55:01.322261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9619 13:55:01.322667 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9620 13:55:01.322855 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9621 13:55:01.323039 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9622 13:55:01.323196 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9623 13:55:01.323377 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9624 13:55:01.323536 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9625 13:55:01.323694 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9626 13:55:01.323874 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9627 13:55:01.324033 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9628 13:55:01.324187 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9629 13:55:01.324341 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9630 13:55:01.324523 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9631 13:55:01.324683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9632 13:55:01.324838 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9633 13:55:01.324992 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9634 13:55:01.325176 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9635 13:55:01.325327 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9636 13:55:01.325473 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9637 13:55:01.325618 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9638 13:55:01.325778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9639 13:55:01.325921 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9640 13:55:01.326092 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9641 13:55:01.326238 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9642 13:55:01.326378 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9643 13:55:01.326520 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9644 13:55:01.326662 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9645 13:55:01.326808 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9646 13:55:01.326974 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9647 13:55:01.330359 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9648 13:55:01.330603 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9649 13:55:01.331021 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9650 13:55:01.331210 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9651 13:55:01.331377 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9652 13:55:01.331530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9653 13:55:01.331685 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9654 13:55:01.331869 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9655 13:55:01.332011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9656 13:55:01.332144 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9657 13:55:01.332296 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9658 13:55:01.332445 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9659 13:55:01.332572 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9660 13:55:01.332715 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9661 13:55:01.332862 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9662 13:55:01.333001 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9663 13:55:01.333151 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9664 13:55:01.333300 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9665 13:55:01.333453 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9666 13:55:01.333642 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9667 13:55:01.333815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9668 13:55:01.333974 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9669 13:55:01.334111 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9670 13:55:01.334232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9671 13:55:01.334346 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9672 13:55:01.334460 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9673 13:55:01.334573 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9674 13:55:01.334688 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9675 13:55:01.334830 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9676 13:55:01.334951 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9677 13:55:01.335066 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9678 13:55:01.335181 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9679 13:55:01.338514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9680 13:55:01.338726 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9681 13:55:01.339201 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9682 13:55:01.339392 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9683 13:55:01.339527 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9684 13:55:01.339684 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9685 13:55:01.339852 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9686 13:55:01.340009 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9687 13:55:01.340160 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9688 13:55:01.340353 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9689 13:55:01.340516 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9690 13:55:01.340671 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9691 13:55:01.340830 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9692 13:55:01.340985 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9693 13:55:01.341164 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9694 13:55:01.341312 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9695 13:55:01.341430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9696 13:55:01.341560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9697 13:55:01.341712 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9698 13:55:01.341899 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9699 13:55:01.342020 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9700 13:55:01.342135 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9701 13:55:01.342247 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9702 13:55:01.342359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9703 13:55:01.342471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9704 13:55:01.342582 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9705 13:55:01.342693 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9706 13:55:01.361806 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9707 13:55:01.362227 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9708 13:55:01.362899 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9709 13:55:01.363160 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9710 13:55:01.363370 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9711 13:55:01.363555 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9712 13:55:01.363760 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9713 13:55:01.363965 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9714 13:55:01.364169 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9715 13:55:01.364443 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9716 13:55:01.364653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9717 13:55:01.364875 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9718 13:55:01.365093 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9719 13:55:01.365275 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9720 13:55:01.365485 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9721 13:55:01.365698 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9722 13:55:01.365898 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9723 13:55:01.366107 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9724 13:55:01.366269 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9725 13:55:01.366395 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9726 13:55:01.366566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9727 13:55:01.366717 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9728 13:55:01.366834 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9729 13:55:01.366950 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9730 13:55:01.367065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9731 13:55:01.367218 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9732 13:55:01.367338 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9733 13:55:01.367456 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9734 13:55:01.367570 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9735 13:55:01.367686 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9736 13:55:01.367803 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9737 13:55:01.367918 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9738 13:55:01.368032 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9739 13:55:01.368145 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9740 13:55:01.368257 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9741 13:55:01.368369 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9742 13:55:01.368481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9743 13:55:01.368595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9744 13:55:01.368709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9745 13:55:01.369048 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9746 13:55:01.369174 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9747 13:55:01.369292 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9748 13:55:01.369407 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9749 13:55:01.369520 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9750 13:55:01.370270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9751 13:55:01.370458 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9752 13:55:01.371085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9753 13:55:01.371302 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9754 13:55:01.371481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9755 13:55:01.371638 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9756 13:55:01.371850 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9757 13:55:01.372059 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9758 13:55:01.372255 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9759 13:55:01.372511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9760 13:55:01.372719 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9761 13:55:01.372928 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9762 13:55:01.373136 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9763 13:55:01.373339 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9764 13:55:01.373528 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9765 13:55:01.373745 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9766 13:55:01.373929 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9767 13:55:01.374145 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9768 13:55:01.374289 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9769 13:55:01.374406 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9770 13:55:01.374520 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9771 13:55:01.374632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9772 13:55:01.374744 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9773 13:55:01.374858 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9774 13:55:01.374970 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9775 13:55:01.375117 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9776 13:55:01.375237 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9777 13:55:01.375350 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9778 13:55:01.375463 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9779 13:55:01.375575 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9780 13:55:01.375686 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9781 13:55:01.375802 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9782 13:55:01.375915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9783 13:55:01.376026 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9784 13:55:01.376137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9785 13:55:01.376248 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9786 13:55:01.376360 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9787 13:55:01.376471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9788 13:55:01.376582 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9789 13:55:01.376693 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9790 13:55:01.377022 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9791 13:55:01.378495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9792 13:55:01.378730 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9793 13:55:01.378893 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9794 13:55:01.379047 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9795 13:55:01.379552 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9796 13:55:01.379764 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9797 13:55:01.379968 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9798 13:55:01.380159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9799 13:55:01.380383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9800 13:55:01.380578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9801 13:55:01.380744 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9802 13:55:01.380962 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9803 13:55:01.381152 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9804 13:55:01.381320 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9805 13:55:01.381482 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9806 13:55:01.381658 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9807 13:55:01.381870 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9808 13:55:01.382078 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9809 13:55:01.382248 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9810 13:55:01.382372 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9811 13:55:01.382485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9812 13:55:01.382597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9813 13:55:01.382710 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9814 13:55:01.382822 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9815 13:55:01.382938 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9816 13:55:01.383051 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9817 13:55:01.383162 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9818 13:55:01.383274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9819 13:55:01.383386 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9820 13:55:01.383497 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9821 13:55:01.383608 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9822 13:55:01.383719 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9823 13:55:01.383830 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9824 13:55:01.383941 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9825 13:55:01.384053 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9826 13:55:01.384165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9827 13:55:01.384276 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9828 13:55:01.384387 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9829 13:55:01.384528 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9830 13:55:01.386270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9831 13:55:01.386522 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9832 13:55:01.387093 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9833 13:55:01.387338 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9834 13:55:01.387553 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9835 13:55:01.387784 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9836 13:55:01.387993 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9837 13:55:01.388212 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9838 13:55:01.388419 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9839 13:55:01.388665 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9840 13:55:01.388889 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9841 13:55:01.389108 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9842 13:55:01.389310 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9843 13:55:01.389502 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9844 13:55:01.389674 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9845 13:55:01.389841 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9846 13:55:01.389991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9847 13:55:01.390112 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9848 13:55:01.390225 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9849 13:55:01.390341 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9850 13:55:01.390453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9851 13:55:01.390565 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9852 13:55:01.390676 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9853 13:55:01.390788 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9854 13:55:01.390933 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9855 13:55:01.391052 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9856 13:55:01.391165 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9857 13:55:01.391277 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9858 13:55:01.391390 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9859 13:55:01.391502 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9860 13:55:01.391614 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9861 13:55:01.391726 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9862 13:55:01.391838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9863 13:55:01.391950 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9864 13:55:01.392062 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9865 13:55:01.392174 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9866 13:55:01.413481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9867 13:55:01.413736 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9868 13:55:01.414052 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9869 13:55:01.414157 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9870 13:55:01.414246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9871 13:55:01.414335 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9872 13:55:01.414422 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9873 13:55:01.414525 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9874 13:55:01.414614 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9875 13:55:01.414718 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9876 13:55:01.414807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9877 13:55:01.414895 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9878 13:55:01.414993 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9879 13:55:01.415070 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9880 13:55:01.415146 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9881 13:55:01.415235 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9882 13:55:01.415315 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9883 13:55:01.415747 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9884 13:55:01.415858 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9885 13:55:01.415935 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9886 13:55:01.416009 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9887 13:55:01.416089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9888 13:55:01.416170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9889 13:55:01.416249 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9890 13:55:01.416516 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9891 13:55:01.416611 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9892 13:55:01.416744 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9893 13:55:01.416850 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9894 13:55:01.416955 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9895 13:55:01.417058 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9896 13:55:01.417158 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9897 13:55:01.417258 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9898 13:55:01.417375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9899 13:55:01.417476 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9900 13:55:01.417576 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9901 13:55:01.417682 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9902 13:55:01.417772 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9903 13:55:01.417870 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9904 13:55:01.417961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9905 13:55:01.418065 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9906 13:55:01.418189 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9907 13:55:01.418285 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9908 13:55:01.418383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9909 13:55:01.418482 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9910 13:55:01.418584 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9911 13:55:01.418675 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9912 13:55:01.418792 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9913 13:55:01.418926 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9914 13:55:01.419065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9915 13:55:01.419176 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9916 13:55:01.419285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9917 13:55:01.419392 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9918 13:55:01.422200 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9919 13:55:01.422585 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9920 13:55:01.422688 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9921 13:55:01.422775 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9922 13:55:01.422861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9923 13:55:01.422971 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9924 13:55:01.423063 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9925 13:55:01.423150 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9926 13:55:01.423251 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9927 13:55:01.423337 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9928 13:55:01.423433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9929 13:55:01.423520 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9930 13:55:01.423623 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9931 13:55:01.423709 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9932 13:55:01.423808 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9933 13:55:01.423899 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9934 13:55:01.424003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9935 13:55:01.424107 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9936 13:55:01.424198 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9937 13:55:01.424303 arm64_sve-ptrace_Set_SVE_VL_4592 pass
9938 13:55:01.424408 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
9939 13:55:01.424510 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
9940 13:55:01.424594 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
9941 13:55:01.424693 arm64_sve-ptrace_Set_SVE_VL_4608 pass
9942 13:55:01.424777 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
9943 13:55:01.424876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
9944 13:55:01.424970 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
9945 13:55:01.425071 arm64_sve-ptrace_Set_SVE_VL_4624 pass
9946 13:55:01.425159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
9947 13:55:01.425258 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
9948 13:55:01.425357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
9949 13:55:01.425440 arm64_sve-ptrace_Set_SVE_VL_4640 pass
9950 13:55:01.425535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
9951 13:55:01.425632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
9952 13:55:01.426223 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
9953 13:55:01.426325 arm64_sve-ptrace_Set_SVE_VL_4656 pass
9954 13:55:01.426414 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
9955 13:55:01.426496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
9956 13:55:01.430217 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
9957 13:55:01.430504 arm64_sve-ptrace_Set_SVE_VL_4672 pass
9958 13:55:01.430900 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
9959 13:55:01.431010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
9960 13:55:01.431095 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
9961 13:55:01.431179 arm64_sve-ptrace_Set_SVE_VL_4688 pass
9962 13:55:01.431256 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
9963 13:55:01.431356 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
9964 13:55:01.431444 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
9965 13:55:01.431528 arm64_sve-ptrace_Set_SVE_VL_4704 pass
9966 13:55:01.431613 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
9967 13:55:01.431714 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
9968 13:55:01.431800 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
9969 13:55:01.431884 arm64_sve-ptrace_Set_SVE_VL_4720 pass
9970 13:55:01.431970 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
9971 13:55:01.432053 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
9972 13:55:01.432154 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
9973 13:55:01.432240 arm64_sve-ptrace_Set_SVE_VL_4736 pass
9974 13:55:01.432325 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
9975 13:55:01.432428 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
9976 13:55:01.432516 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
9977 13:55:01.432617 arm64_sve-ptrace_Set_SVE_VL_4752 pass
9978 13:55:01.432707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
9979 13:55:01.432792 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
9980 13:55:01.432890 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
9981 13:55:01.432975 arm64_sve-ptrace_Set_SVE_VL_4768 pass
9982 13:55:01.433072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
9983 13:55:01.433157 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
9984 13:55:01.433242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
9985 13:55:01.433340 arm64_sve-ptrace_Set_SVE_VL_4784 pass
9986 13:55:01.433801 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
9987 13:55:01.434003 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
9988 13:55:01.434143 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
9989 13:55:01.434242 arm64_sve-ptrace_Set_SVE_VL_4800 pass
9990 13:55:01.434330 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
9991 13:55:01.434434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
9992 13:55:01.434523 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
9993 13:55:01.434609 arm64_sve-ptrace_Set_SVE_VL_4816 pass
9994 13:55:01.434694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
9995 13:55:01.442325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
9996 13:55:01.442554 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
9997 13:55:01.442650 arm64_sve-ptrace_Set_SVE_VL_4832 pass
9998 13:55:01.442946 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
9999 13:55:01.443043 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
10000 13:55:01.443134 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
10001 13:55:01.443222 arm64_sve-ptrace_Set_SVE_VL_4848 pass
10002 13:55:01.443327 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
10003 13:55:01.443417 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
10004 13:55:01.443502 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
10005 13:55:01.443587 arm64_sve-ptrace_Set_SVE_VL_4864 pass
10006 13:55:01.443687 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
10007 13:55:01.443789 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
10008 13:55:01.443892 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
10009 13:55:01.443992 arm64_sve-ptrace_Set_SVE_VL_4880 pass
10010 13:55:01.444093 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
10011 13:55:01.444402 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
10012 13:55:01.444521 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
10013 13:55:01.444624 arm64_sve-ptrace_Set_SVE_VL_4896 pass
10014 13:55:01.444921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
10015 13:55:01.445009 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
10016 13:55:01.445101 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
10017 13:55:01.445172 arm64_sve-ptrace_Set_SVE_VL_4912 pass
10018 13:55:01.445246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
10019 13:55:01.445501 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
10020 13:55:01.445598 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
10021 13:55:01.445676 arm64_sve-ptrace_Set_SVE_VL_4928 pass
10022 13:55:01.445772 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
10023 13:55:01.445845 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
10024 13:55:01.445938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
10025 13:55:01.446040 arm64_sve-ptrace_Set_SVE_VL_4944 pass
10026 13:55:01.465717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
10027 13:55:01.466145 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
10028 13:55:01.466299 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
10029 13:55:01.466431 arm64_sve-ptrace_Set_SVE_VL_4960 pass
10030 13:55:01.466560 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
10031 13:55:01.466712 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
10032 13:55:01.466851 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
10033 13:55:01.467029 arm64_sve-ptrace_Set_SVE_VL_4976 pass
10034 13:55:01.467178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
10035 13:55:01.467321 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
10036 13:55:01.467545 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
10037 13:55:01.467713 arm64_sve-ptrace_Set_SVE_VL_4992 pass
10038 13:55:01.467872 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
10039 13:55:01.468000 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
10040 13:55:01.468152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
10041 13:55:01.468300 arm64_sve-ptrace_Set_SVE_VL_5008 pass
10042 13:55:01.468492 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
10043 13:55:01.468716 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
10044 13:55:01.468938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
10045 13:55:01.469097 arm64_sve-ptrace_Set_SVE_VL_5024 pass
10046 13:55:01.469248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
10047 13:55:01.469409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
10048 13:55:01.469569 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
10049 13:55:01.470063 arm64_sve-ptrace_Set_SVE_VL_5040 pass
10050 13:55:01.470200 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
10051 13:55:01.470319 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
10052 13:55:01.470435 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
10053 13:55:01.470583 arm64_sve-ptrace_Set_SVE_VL_5056 pass
10054 13:55:01.470709 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
10055 13:55:01.470828 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
10056 13:55:01.470947 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
10057 13:55:01.471066 arm64_sve-ptrace_Set_SVE_VL_5072 pass
10058 13:55:01.471183 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
10059 13:55:01.471301 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
10060 13:55:01.471418 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
10061 13:55:01.471534 arm64_sve-ptrace_Set_SVE_VL_5088 pass
10062 13:55:01.474435 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
10063 13:55:01.474659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
10064 13:55:01.474903 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
10065 13:55:01.475051 arm64_sve-ptrace_Set_SVE_VL_5104 pass
10066 13:55:01.475209 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
10067 13:55:01.475401 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
10068 13:55:01.475559 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
10069 13:55:01.475712 arm64_sve-ptrace_Set_SVE_VL_5120 pass
10070 13:55:01.475880 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
10071 13:55:01.476011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
10072 13:55:01.476161 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
10073 13:55:01.476301 arm64_sve-ptrace_Set_SVE_VL_5136 pass
10074 13:55:01.476426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
10075 13:55:01.476582 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
10076 13:55:01.476724 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
10077 13:55:01.476850 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10078 13:55:01.477004 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10079 13:55:01.477191 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10080 13:55:01.477357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10081 13:55:01.477503 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10082 13:55:01.477638 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10083 13:55:01.478210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10084 13:55:01.478281 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10085 13:55:01.478342 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10086 13:55:01.478403 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10087 13:55:01.478464 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10088 13:55:01.478525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10089 13:55:01.478586 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10090 13:55:01.482158 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10091 13:55:01.482465 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10092 13:55:01.482570 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10093 13:55:01.482675 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10094 13:55:01.482969 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10095 13:55:01.483076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10096 13:55:01.483210 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10097 13:55:01.483384 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10098 13:55:01.483474 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10099 13:55:01.483553 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10100 13:55:01.483640 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10101 13:55:01.483722 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10102 13:55:01.483817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10103 13:55:01.484208 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10104 13:55:01.484410 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10105 13:55:01.484641 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10106 13:55:01.484848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10107 13:55:01.485039 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10108 13:55:01.485262 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10109 13:55:01.485449 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10110 13:55:01.485640 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10111 13:55:01.485809 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10112 13:55:01.485947 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10113 13:55:01.486107 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10114 13:55:01.486236 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10115 13:55:01.486354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10116 13:55:01.486470 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10117 13:55:01.486587 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10118 13:55:01.486703 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10119 13:55:01.486820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10120 13:55:01.490233 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10121 13:55:01.490447 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10122 13:55:01.490858 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10123 13:55:01.491085 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10124 13:55:01.491294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10125 13:55:01.491518 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10126 13:55:01.491679 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10127 13:55:01.491898 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10128 13:55:01.492046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10129 13:55:01.492169 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10130 13:55:01.492290 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10131 13:55:01.492405 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10132 13:55:01.492506 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10133 13:55:01.492627 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10134 13:55:01.492762 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10135 13:55:01.492947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10136 13:55:01.493090 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10137 13:55:01.493205 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10138 13:55:01.493295 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10139 13:55:01.493383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10140 13:55:01.493494 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10141 13:55:01.493608 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10142 13:55:01.493738 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10143 13:55:01.493858 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10144 13:55:01.493985 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10145 13:55:01.494061 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10146 13:55:01.494120 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10147 13:55:01.494180 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10148 13:55:01.494239 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10149 13:55:01.494298 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10150 13:55:01.494357 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10151 13:55:01.494416 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10152 13:55:01.498216 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10153 13:55:01.498625 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10154 13:55:01.498740 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10155 13:55:01.498858 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10156 13:55:01.498997 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10157 13:55:01.499182 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10158 13:55:01.499355 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10159 13:55:01.499543 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10160 13:55:01.499698 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10161 13:55:01.499853 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10162 13:55:01.500029 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10163 13:55:01.500221 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10164 13:55:01.500351 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10165 13:55:01.500477 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10166 13:55:01.500629 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10167 13:55:01.500766 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10168 13:55:01.500925 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10169 13:55:01.501062 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10170 13:55:01.501249 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10171 13:55:01.501428 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10172 13:55:01.501578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10173 13:55:01.502212 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10174 13:55:01.502349 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10175 13:55:01.502471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10176 13:55:01.502591 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10177 13:55:01.502740 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10178 13:55:01.502867 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10179 13:55:01.502987 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10180 13:55:01.503111 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10181 13:55:01.503230 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10182 13:55:01.503349 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10183 13:55:01.506207 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10184 13:55:01.506647 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10185 13:55:01.506833 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10186 13:55:01.521145 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10187 13:55:01.521616 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10188 13:55:01.521833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10189 13:55:01.522045 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10190 13:55:01.522228 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10191 13:55:01.522470 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10192 13:55:01.522658 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10193 13:55:01.522805 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10194 13:55:01.522965 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10195 13:55:01.523145 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10196 13:55:01.523345 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10197 13:55:01.523560 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10198 13:55:01.523738 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10199 13:55:01.523876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10200 13:55:01.524007 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10201 13:55:01.524133 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10202 13:55:01.524265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10203 13:55:01.524459 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10204 13:55:01.524709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10205 13:55:01.524912 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10206 13:55:01.525114 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10207 13:55:01.525305 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10208 13:55:01.525480 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10209 13:55:01.525661 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10210 13:55:01.525828 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10211 13:55:01.526014 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10212 13:55:01.526162 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10213 13:55:01.526281 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10214 13:55:01.526396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10215 13:55:01.526510 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10216 13:55:01.526653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10217 13:55:01.526775 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10218 13:55:01.526896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10219 13:55:01.527010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10220 13:55:01.527128 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10221 13:55:01.527242 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10222 13:55:01.527354 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10223 13:55:01.527467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10224 13:55:01.527581 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10225 13:55:01.527923 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10226 13:55:01.530243 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10227 13:55:01.530680 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10228 13:55:01.530873 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10229 13:55:01.531045 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10230 13:55:01.531297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10231 13:55:01.531490 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10232 13:55:01.531680 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10233 13:55:01.531837 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10234 13:55:01.531999 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10235 13:55:01.532198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10236 13:55:01.532365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10237 13:55:01.532520 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10238 13:55:01.532687 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10239 13:55:01.532820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10240 13:55:01.532984 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10241 13:55:01.533151 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10242 13:55:01.533370 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10243 13:55:01.533549 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10244 13:55:01.534183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10245 13:55:01.534289 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10246 13:55:01.534380 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10247 13:55:01.534471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10248 13:55:01.534561 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10249 13:55:01.534649 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10250 13:55:01.534761 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10251 13:55:01.534856 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10252 13:55:01.534948 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10253 13:55:01.535038 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10254 13:55:01.538269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10255 13:55:01.538506 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10256 13:55:01.538945 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10257 13:55:01.539094 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10258 13:55:01.539217 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10259 13:55:01.539342 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10260 13:55:01.539536 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10261 13:55:01.539708 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10262 13:55:01.539828 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10263 13:55:01.539978 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10264 13:55:01.540176 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10265 13:55:01.540319 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10266 13:55:01.540438 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10267 13:55:01.540580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10268 13:55:01.540726 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10269 13:55:01.540828 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10270 13:55:01.540923 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10271 13:55:01.541023 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10272 13:55:01.541124 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10273 13:55:01.541222 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10274 13:55:01.541333 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10275 13:55:01.541429 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10276 13:55:01.541546 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10277 13:55:01.541670 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10278 13:55:01.541782 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10279 13:55:01.542129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10280 13:55:01.542246 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10281 13:55:01.542336 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10282 13:55:01.542422 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10283 13:55:01.542508 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10284 13:55:01.542595 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10285 13:55:01.542681 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10286 13:55:01.546444 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10287 13:55:01.546580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10288 13:55:01.546698 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10289 13:55:01.546797 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10290 13:55:01.546934 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10291 13:55:01.547096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10292 13:55:01.547221 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10293 13:55:01.547316 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10294 13:55:01.547405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10295 13:55:01.547513 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10296 13:55:01.547659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10297 13:55:01.547802 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10298 13:55:01.547936 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10299 13:55:01.548077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10300 13:55:01.548183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10301 13:55:01.548294 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10302 13:55:01.548421 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10303 13:55:01.548564 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10304 13:55:01.548710 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10305 13:55:01.548827 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10306 13:55:01.548945 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10307 13:55:01.549050 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10308 13:55:01.549140 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10309 13:55:01.549227 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10310 13:55:01.549372 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10311 13:55:01.549526 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10312 13:55:01.549692 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10313 13:55:01.549845 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10314 13:55:01.549994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10315 13:55:01.550123 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10316 13:55:01.550240 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10317 13:55:01.550336 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10318 13:55:01.550426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10319 13:55:01.550514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10320 13:55:01.550601 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10321 13:55:01.550689 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10322 13:55:01.554240 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10323 13:55:01.554668 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10324 13:55:01.554831 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10325 13:55:01.555168 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10326 13:55:01.555306 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10327 13:55:01.555465 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10328 13:55:01.555623 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10329 13:55:01.555772 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10330 13:55:01.555892 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10331 13:55:01.556079 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10332 13:55:01.556242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10333 13:55:01.556402 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10334 13:55:01.556553 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10335 13:55:01.556723 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10336 13:55:01.556858 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10337 13:55:01.556976 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10338 13:55:01.557103 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10339 13:55:01.557257 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10340 13:55:01.557379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10341 13:55:01.557495 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10342 13:55:01.557610 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10343 13:55:01.557804 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10344 13:55:01.558000 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10345 13:55:01.558189 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10346 13:55:01.575836 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10347 13:55:01.576288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10348 13:55:01.576502 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10349 13:55:01.576711 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10350 13:55:01.576891 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10351 13:55:01.577088 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10352 13:55:01.577241 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10353 13:55:01.577435 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10354 13:55:01.577565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10355 13:55:01.577709 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10356 13:55:01.577869 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10357 13:55:01.578000 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10358 13:55:01.578148 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10359 13:55:01.578310 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10360 13:55:01.578467 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10361 13:55:01.578648 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10362 13:55:01.578796 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10363 13:55:01.578947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10364 13:55:01.579102 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10365 13:55:01.579280 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10366 13:55:01.579489 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10367 13:55:01.579750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10368 13:55:01.579937 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10369 13:55:01.580114 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10370 13:55:01.580331 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10371 13:55:01.580553 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10372 13:55:01.580731 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10373 13:55:01.580933 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10374 13:55:01.581146 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10375 13:55:01.581354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10376 13:55:01.581587 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10377 13:55:01.582479 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10378 13:55:01.582614 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10379 13:55:01.582734 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10380 13:55:01.582878 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10381 13:55:01.583003 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10382 13:55:01.583122 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10383 13:55:01.583240 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10384 13:55:01.583357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10385 13:55:01.583687 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10386 13:55:01.583816 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10387 13:55:01.583936 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10388 13:55:01.584053 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10389 13:55:01.584172 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10390 13:55:01.584291 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10391 13:55:01.584406 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10392 13:55:01.584522 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10393 13:55:01.584638 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10394 13:55:01.584753 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10395 13:55:01.584870 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10396 13:55:01.584987 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10397 13:55:01.586315 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10398 13:55:01.586607 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10399 13:55:01.587040 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10400 13:55:01.587242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10401 13:55:01.587403 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10402 13:55:01.587586 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10403 13:55:01.587770 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10404 13:55:01.587959 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10405 13:55:01.588120 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10406 13:55:01.588305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10407 13:55:01.588478 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10408 13:55:01.588642 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10409 13:55:01.588813 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10410 13:55:01.588980 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10411 13:55:01.589181 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10412 13:55:01.589352 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10413 13:55:01.589524 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10414 13:55:01.589723 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10415 13:55:01.589927 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10416 13:55:01.590105 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10417 13:55:01.590230 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10418 13:55:01.590346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10419 13:55:01.590490 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10420 13:55:01.590611 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10421 13:55:01.590727 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10422 13:55:01.590841 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10423 13:55:01.590956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10424 13:55:01.591069 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10425 13:55:01.591182 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10426 13:55:01.594384 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10427 13:55:01.594876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10428 13:55:01.595076 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10429 13:55:01.595251 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10430 13:55:01.595424 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10431 13:55:01.595628 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10432 13:55:01.595800 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10433 13:55:01.595960 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10434 13:55:01.596108 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10435 13:55:01.596306 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10436 13:55:01.596479 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10437 13:55:01.596639 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10438 13:55:01.596811 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10439 13:55:01.596970 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10440 13:55:01.597139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10441 13:55:01.597274 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10442 13:55:01.597416 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10443 13:55:01.597540 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10444 13:55:01.597671 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10445 13:55:01.597798 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10446 13:55:01.597923 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10447 13:55:01.598070 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10448 13:55:01.598196 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10449 13:55:01.598280 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10450 13:55:01.598345 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10451 13:55:01.598405 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10452 13:55:01.598467 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10453 13:55:01.598541 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10454 13:55:01.602412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10455 13:55:01.602509 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10456 13:55:01.602635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10457 13:55:01.602743 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10458 13:55:01.602857 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10459 13:55:01.602962 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10460 13:55:01.603085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10461 13:55:01.603188 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10462 13:55:01.603282 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10463 13:55:01.603386 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10464 13:55:01.603501 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10465 13:55:01.603618 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10466 13:55:01.603927 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10467 13:55:01.604023 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10468 13:55:01.604110 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10469 13:55:01.604180 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10470 13:55:01.604255 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10471 13:55:01.604339 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10472 13:55:01.604621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10473 13:55:01.604719 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10474 13:55:01.604827 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10475 13:55:01.604954 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10476 13:55:01.605065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10477 13:55:01.605187 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10478 13:55:01.605309 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10479 13:55:01.605427 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10480 13:55:01.605528 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10481 13:55:01.605801 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10482 13:55:01.605902 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10483 13:55:01.605992 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10484 13:55:01.606059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10485 13:55:01.610387 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10486 13:55:01.610499 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10487 13:55:01.610655 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10488 13:55:01.610794 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10489 13:55:01.610956 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10490 13:55:01.611093 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10491 13:55:01.611230 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10492 13:55:01.611313 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10493 13:55:01.611391 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10494 13:55:01.611698 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10495 13:55:01.611796 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10496 13:55:01.611877 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10497 13:55:01.612181 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10498 13:55:01.612270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10499 13:55:01.612368 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10500 13:55:01.612498 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10501 13:55:01.612583 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10502 13:55:01.612665 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10503 13:55:01.612770 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10504 13:55:01.612860 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10505 13:55:01.612924 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10506 13:55:01.632303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10507 13:55:01.632637 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10508 13:55:01.632739 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10509 13:55:01.632860 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10510 13:55:01.632947 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10511 13:55:01.633067 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10512 13:55:01.633165 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10513 13:55:01.633286 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10514 13:55:01.633375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10515 13:55:01.633466 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10516 13:55:01.633746 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10517 13:55:01.633841 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10518 13:55:01.633922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10519 13:55:01.634028 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10520 13:55:01.634103 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10521 13:55:01.634393 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10522 13:55:01.634489 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10523 13:55:01.634772 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10524 13:55:01.634868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10525 13:55:01.634984 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10526 13:55:01.635093 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10527 13:55:01.635195 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10528 13:55:01.635283 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10529 13:55:01.635370 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10530 13:55:01.635439 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10531 13:55:01.635513 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10532 13:55:01.635604 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10533 13:55:01.635687 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10534 13:55:01.635787 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10535 13:55:01.635877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10536 13:55:01.635975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10537 13:55:01.636066 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10538 13:55:01.636407 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10539 13:55:01.636609 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10540 13:55:01.636829 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10541 13:55:01.637023 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10542 13:55:01.637191 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10543 13:55:01.637392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10544 13:55:01.637560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10545 13:55:01.637737 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10546 13:55:01.637905 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10547 13:55:01.638103 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10548 13:55:01.638236 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10549 13:55:01.638358 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10550 13:55:01.638476 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10551 13:55:01.638595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10552 13:55:01.642206 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10553 13:55:01.642655 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10554 13:55:01.642818 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10555 13:55:01.643033 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10556 13:55:01.643279 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10557 13:55:01.643495 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10558 13:55:01.643709 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10559 13:55:01.643897 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10560 13:55:01.644073 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10561 13:55:01.644250 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10562 13:55:01.644446 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10563 13:55:01.644635 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10564 13:55:01.644796 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10565 13:55:01.644984 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10566 13:55:01.645187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10567 13:55:01.645359 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10568 13:55:01.645497 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10569 13:55:01.646118 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10570 13:55:01.646297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10571 13:55:01.646426 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10572 13:55:01.646546 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10573 13:55:01.646665 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10574 13:55:01.646782 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10575 13:55:01.646900 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10576 13:55:01.647016 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10577 13:55:01.647130 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10578 13:55:01.647244 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10579 13:55:01.647359 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10580 13:55:01.647472 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10581 13:55:01.647586 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10582 13:55:01.653814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10583 13:55:01.653983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10584 13:55:01.654108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10585 13:55:01.654223 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10586 13:55:01.654337 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10587 13:55:01.654450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10588 13:55:01.654564 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10589 13:55:01.654678 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10590 13:55:01.654791 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10591 13:55:01.654905 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10592 13:55:01.655019 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10593 13:55:01.655133 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10594 13:55:01.655247 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10595 13:55:01.655360 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10596 13:55:01.655474 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10597 13:55:01.655587 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10598 13:55:01.655700 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10599 13:55:01.655814 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10600 13:55:01.655926 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10601 13:55:01.656041 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10602 13:55:01.656153 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10603 13:55:01.656266 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10604 13:55:01.656380 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10605 13:55:01.656493 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10606 13:55:01.656606 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10607 13:55:01.656971 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10608 13:55:01.657107 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10609 13:55:01.658484 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10610 13:55:01.658736 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10611 13:55:01.658883 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10612 13:55:01.659107 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10613 13:55:01.659320 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10614 13:55:01.659547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10615 13:55:01.659736 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10616 13:55:01.659912 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10617 13:55:01.660101 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10618 13:55:01.660267 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10619 13:55:01.660421 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10620 13:55:01.661859 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10621 13:55:01.661956 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10622 13:55:01.662029 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10623 13:55:01.662090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10624 13:55:01.662150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10625 13:55:01.662211 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10626 13:55:01.662271 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10627 13:55:01.662332 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10628 13:55:01.662394 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10629 13:55:01.662455 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10630 13:55:01.662514 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10631 13:55:01.662574 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10632 13:55:01.662634 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10633 13:55:01.662694 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10634 13:55:01.662754 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10635 13:55:01.662813 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10636 13:55:01.662872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10637 13:55:01.662931 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10638 13:55:01.662990 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10639 13:55:01.663049 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10640 13:55:01.663108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10641 13:55:01.663362 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10642 13:55:01.663441 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10643 13:55:01.666471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10644 13:55:01.669656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10645 13:55:01.669752 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10646 13:55:01.669817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10647 13:55:01.669878 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10648 13:55:01.669938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10649 13:55:01.669997 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10650 13:55:01.670058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10651 13:55:01.670119 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10652 13:55:01.670180 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10653 13:55:01.670240 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10654 13:55:01.670301 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10655 13:55:01.670366 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10656 13:55:01.670428 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10657 13:55:01.670488 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10658 13:55:01.670548 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10659 13:55:01.670608 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10660 13:55:01.670668 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10661 13:55:01.670728 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10662 13:55:01.670788 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10663 13:55:01.670849 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10664 13:55:01.670909 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10665 13:55:01.670968 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10666 13:55:01.700899 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10667 13:55:01.701147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10668 13:55:01.701431 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10669 13:55:01.701508 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10670 13:55:01.701580 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10671 13:55:01.701664 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10672 13:55:01.701738 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10673 13:55:01.701820 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10674 13:55:01.701888 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10675 13:55:01.701950 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10676 13:55:01.702019 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10677 13:55:01.702080 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10678 13:55:01.702153 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10679 13:55:01.702239 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10680 13:55:01.702322 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10681 13:55:01.702406 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10682 13:55:01.702555 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10683 13:55:01.702745 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10684 13:55:01.702894 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10685 13:55:01.703039 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10686 13:55:01.703226 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10687 13:55:01.703363 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10688 13:55:01.703493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10689 13:55:01.703622 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10690 13:55:01.703778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10691 13:55:01.703919 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10692 13:55:01.704056 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10693 13:55:01.704242 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10694 13:55:01.704404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10695 13:55:01.704539 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10696 13:55:01.704668 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10697 13:55:01.704800 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10698 13:55:01.704922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10699 13:55:01.705084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10700 13:55:01.705248 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10701 13:55:01.705393 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10702 13:55:01.705565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10703 13:55:01.705791 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10704 13:55:01.705953 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10705 13:55:01.706313 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10706 13:55:01.706444 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10707 13:55:01.706562 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10708 13:55:01.706678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10709 13:55:01.706792 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10710 13:55:01.706907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10711 13:55:01.707021 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10712 13:55:01.707136 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10713 13:55:01.707254 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10714 13:55:01.707371 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10715 13:55:01.707488 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10716 13:55:01.710404 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10717 13:55:01.710683 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10718 13:55:01.711129 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10719 13:55:01.711236 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10720 13:55:01.711323 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10721 13:55:01.711408 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10722 13:55:01.711507 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10723 13:55:01.711593 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10724 13:55:01.711691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10725 13:55:01.711779 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10726 13:55:01.711878 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10727 13:55:01.712215 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10728 13:55:01.712406 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10729 13:55:01.712575 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10730 13:55:01.712698 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10731 13:55:01.712817 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10732 13:55:01.712956 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10733 13:55:01.713077 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10734 13:55:01.713193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10735 13:55:01.713331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10736 13:55:01.713451 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10737 13:55:01.713570 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10738 13:55:01.713702 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10739 13:55:01.713845 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10740 13:55:01.713980 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10741 13:55:01.714113 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10742 13:55:01.714230 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10743 13:55:01.714346 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10744 13:55:01.714464 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10745 13:55:01.714580 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10746 13:55:01.714720 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10747 13:55:01.718413 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10748 13:55:01.718954 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10749 13:55:01.719139 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10750 13:55:01.719305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10751 13:55:01.719472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10752 13:55:01.719640 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10753 13:55:01.719845 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10754 13:55:01.720012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10755 13:55:01.720180 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10756 13:55:01.720341 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10757 13:55:01.720503 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10758 13:55:01.720660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10759 13:55:01.720821 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10760 13:55:01.721008 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10761 13:55:01.721211 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10762 13:55:01.721406 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10763 13:55:01.721588 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10764 13:55:01.721801 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10765 13:55:01.721989 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10766 13:55:01.722178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10767 13:55:01.722310 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10768 13:55:01.722459 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10769 13:55:01.722583 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10770 13:55:01.722700 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10771 13:55:01.722815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10772 13:55:01.722930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10773 13:55:01.723046 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10774 13:55:01.723161 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10775 13:55:01.723273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10776 13:55:01.726388 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10777 13:55:01.726650 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10778 13:55:01.727028 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10779 13:55:01.727169 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10780 13:55:01.727297 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10781 13:55:01.727461 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10782 13:55:01.727604 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10783 13:55:01.727776 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10784 13:55:01.727936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10785 13:55:01.728091 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10786 13:55:01.728248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10787 13:55:01.728396 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10788 13:55:01.728552 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10789 13:55:01.728694 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10790 13:55:01.728884 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10791 13:55:01.729049 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10792 13:55:01.729207 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10793 13:55:01.729366 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10794 13:55:01.729521 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10795 13:55:01.729679 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10796 13:55:01.729821 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10797 13:55:01.729959 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10798 13:55:01.730106 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10799 13:55:01.730242 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10800 13:55:01.730391 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10801 13:55:01.730516 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10802 13:55:01.730630 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10803 13:55:01.730743 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10804 13:55:01.730857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10805 13:55:01.730971 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10806 13:55:01.731086 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10807 13:55:01.731199 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10808 13:55:01.731313 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10809 13:55:01.731426 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10810 13:55:01.731542 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10811 13:55:01.731658 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10812 13:55:01.731771 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10813 13:55:01.731887 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10814 13:55:01.734346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10815 13:55:01.734756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10816 13:55:01.734907 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10817 13:55:01.735068 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10818 13:55:01.735220 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10819 13:55:01.735370 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10820 13:55:01.735511 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10821 13:55:01.735626 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10822 13:55:01.735737 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10823 13:55:01.735873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10824 13:55:01.735989 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10825 13:55:01.736099 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10826 13:55:01.754443 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10827 13:55:01.754645 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10828 13:55:01.754918 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10829 13:55:01.755040 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10830 13:55:01.755142 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10831 13:55:01.755228 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10832 13:55:01.755311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10833 13:55:01.755410 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10834 13:55:01.755493 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10835 13:55:01.755575 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10836 13:55:01.755866 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10837 13:55:01.755983 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10838 13:55:01.756059 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10839 13:55:01.756148 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10840 13:55:01.756228 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10841 13:55:01.756320 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10842 13:55:01.756428 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10843 13:55:01.756538 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10844 13:55:01.756647 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10845 13:55:01.756929 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10846 13:55:01.757029 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10847 13:55:01.757130 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10848 13:55:01.757235 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10849 13:55:01.758446 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10850 13:55:01.758561 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10851 13:55:01.758657 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10852 13:55:01.758747 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10853 13:55:01.758836 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10854 13:55:01.758925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10855 13:55:01.762379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10856 13:55:01.762732 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10857 13:55:01.762829 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10858 13:55:01.762907 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10859 13:55:01.762999 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10860 13:55:01.763088 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10861 13:55:01.763164 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10862 13:55:01.763614 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10863 13:55:01.763706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10864 13:55:01.763772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10865 13:55:01.763849 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10866 13:55:01.763915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10867 13:55:01.763990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10868 13:55:01.764257 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10869 13:55:01.764349 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10870 13:55:01.764415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10871 13:55:01.764683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10872 13:55:01.764755 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10873 13:55:01.765010 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10874 13:55:01.765094 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10875 13:55:01.765161 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10876 13:55:01.765237 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10877 13:55:01.765303 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10878 13:55:01.765377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10879 13:55:01.765633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10880 13:55:01.765724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10881 13:55:01.765801 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10882 13:55:01.765988 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10883 13:55:01.770183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10884 13:55:01.770454 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10885 13:55:01.770533 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10886 13:55:01.770653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10887 13:55:01.770745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10888 13:55:01.770850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10889 13:55:01.771161 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10890 13:55:01.771260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10891 13:55:01.771363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10892 13:55:01.771484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10893 13:55:01.771605 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10894 13:55:01.771724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10895 13:55:01.771821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10896 13:55:01.772091 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10897 13:55:01.772194 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10898 13:55:01.772287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10899 13:55:01.772374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10900 13:55:01.772662 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10901 13:55:01.772761 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10902 13:55:01.772853 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10903 13:55:01.772945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10904 13:55:01.773228 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10905 13:55:01.773319 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10906 13:55:01.773413 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10907 13:55:01.773522 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10908 13:55:01.773858 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10909 13:55:01.773965 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10910 13:55:01.778279 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10911 13:55:01.778617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10912 13:55:01.778723 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10913 13:55:01.778830 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10914 13:55:01.779133 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10915 13:55:01.779255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10916 13:55:01.779374 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10917 13:55:01.779481 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10918 13:55:01.779776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10919 13:55:01.779884 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10920 13:55:01.779990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10921 13:55:01.780090 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10922 13:55:01.780189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10923 13:55:01.780278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10924 13:55:01.780574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10925 13:55:01.780655 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10926 13:55:01.780736 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10927 13:55:01.781010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10928 13:55:01.781106 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10929 13:55:01.781180 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10930 13:55:01.781267 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10931 13:55:01.781350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10932 13:55:01.781448 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10933 13:55:01.781565 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10934 13:55:01.781864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10935 13:55:01.781950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10936 13:55:01.782166 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10937 13:55:01.786323 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
10938 13:55:01.786463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
10939 13:55:01.786594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
10940 13:55:01.786727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
10941 13:55:01.787010 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
10942 13:55:01.787127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
10943 13:55:01.787233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
10944 13:55:01.787335 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
10945 13:55:01.787438 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
10946 13:55:01.787748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
10947 13:55:01.787830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
10948 13:55:01.788092 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
10949 13:55:01.788196 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
10950 13:55:01.788294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
10951 13:55:01.788397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
10952 13:55:01.788497 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
10953 13:55:01.788669 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
10954 13:55:01.788866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
10955 13:55:01.789064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
10956 13:55:01.789288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
10957 13:55:01.789480 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
10958 13:55:01.789699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
10959 13:55:01.789849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
10960 13:55:01.789971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
10961 13:55:01.790089 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
10962 13:55:01.790229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
10963 13:55:01.809129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
10964 13:55:01.809606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
10965 13:55:01.809720 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
10966 13:55:01.809814 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
10967 13:55:01.809910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
10968 13:55:01.810022 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
10969 13:55:01.810115 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
10970 13:55:01.810199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
10971 13:55:01.810285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
10972 13:55:01.810392 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
10973 13:55:01.810483 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
10974 13:55:01.810592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
10975 13:55:01.810922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
10976 13:55:01.811032 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
10977 13:55:01.811121 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
10978 13:55:01.811401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
10979 13:55:01.811495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
10980 13:55:01.811590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
10981 13:55:01.811681 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
10982 13:55:01.811783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
10983 13:55:01.811889 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
10984 13:55:01.811979 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
10985 13:55:01.812067 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
10986 13:55:01.812170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
10987 13:55:01.812258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
10988 13:55:01.812358 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
10989 13:55:01.812442 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
10990 13:55:01.812537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
10991 13:55:01.812644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
10992 13:55:01.812999 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
10993 13:55:01.813107 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
10994 13:55:01.813212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
10995 13:55:01.813303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
10996 13:55:01.813405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
10997 13:55:01.813504 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
10998 13:55:01.813804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
10999 13:55:01.813905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
11000 13:55:01.814197 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
11001 13:55:01.818437 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
11002 13:55:01.818657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
11003 13:55:01.818764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
11004 13:55:01.818850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
11005 13:55:01.818950 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
11006 13:55:01.819037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
11007 13:55:01.819137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
11008 13:55:01.819237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
11009 13:55:01.819570 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
11010 13:55:01.819773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
11011 13:55:01.819923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
11012 13:55:01.820082 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
11013 13:55:01.820209 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
11014 13:55:01.820357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
11015 13:55:01.820503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
11016 13:55:01.820679 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
11017 13:55:01.820868 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
11018 13:55:01.821047 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
11019 13:55:01.821211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
11020 13:55:01.821395 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
11021 13:55:01.821560 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
11022 13:55:01.821808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
11023 13:55:01.822001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
11024 13:55:01.822173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
11025 13:55:01.822321 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
11026 13:55:01.822550 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
11027 13:55:01.826271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
11028 13:55:01.826820 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
11029 13:55:01.827003 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
11030 13:55:01.827167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
11031 13:55:01.827329 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
11032 13:55:01.827524 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
11033 13:55:01.827690 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
11034 13:55:01.827853 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
11035 13:55:01.827992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
11036 13:55:01.828121 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
11037 13:55:01.828279 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
11038 13:55:01.828414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
11039 13:55:01.828543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
11040 13:55:01.828705 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
11041 13:55:01.828868 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
11042 13:55:01.829019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
11043 13:55:01.829199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
11044 13:55:01.829338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
11045 13:55:01.829474 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
11046 13:55:01.829617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
11047 13:55:01.829825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
11048 13:55:01.830007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
11049 13:55:01.830145 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
11050 13:55:01.830265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
11051 13:55:01.830381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
11052 13:55:01.830496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
11053 13:55:01.838194 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
11054 13:55:01.838694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
11055 13:55:01.838805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
11056 13:55:01.838894 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
11057 13:55:01.838986 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
11058 13:55:01.839093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
11059 13:55:01.839186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
11060 13:55:01.839533 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
11061 13:55:01.839644 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
11062 13:55:01.839738 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
11063 13:55:01.840028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
11064 13:55:01.840129 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
11065 13:55:01.840241 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
11066 13:55:01.840535 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
11067 13:55:01.840636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
11068 13:55:01.840749 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
11069 13:55:01.840845 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
11070 13:55:01.840964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
11071 13:55:01.841075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
11072 13:55:01.841188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
11073 13:55:01.841297 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
11074 13:55:01.841601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
11075 13:55:01.841725 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
11076 13:55:01.841832 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
11077 13:55:01.842002 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11078 13:55:01.846312 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11079 13:55:01.846703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11080 13:55:01.846804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11081 13:55:01.846893 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11082 13:55:01.846996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11083 13:55:01.847101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11084 13:55:01.847205 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11085 13:55:01.847321 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11086 13:55:01.847620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11087 13:55:01.847911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11088 13:55:01.848007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11089 13:55:01.848110 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11090 13:55:01.848212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11091 13:55:01.848310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11092 13:55:01.848598 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11093 13:55:01.848698 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11094 13:55:01.848990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11095 13:55:01.849099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11096 13:55:01.849209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11097 13:55:01.849503 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11098 13:55:01.849616 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11099 13:55:01.866274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11100 13:55:01.866751 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11101 13:55:01.866860 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11102 13:55:01.866952 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11103 13:55:01.867059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11104 13:55:01.867151 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11105 13:55:01.867258 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11106 13:55:01.867549 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11107 13:55:01.867663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11108 13:55:01.867756 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11109 13:55:01.867860 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11110 13:55:01.868159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11111 13:55:01.868278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11112 13:55:01.868575 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11113 13:55:01.868672 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11114 13:55:01.868778 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11115 13:55:01.869075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11116 13:55:01.869175 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11117 13:55:01.869283 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11118 13:55:01.869393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11119 13:55:01.869714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11120 13:55:01.870013 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11121 13:55:01.870119 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11122 13:55:01.874259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11123 13:55:01.874784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11124 13:55:01.874985 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11125 13:55:01.875186 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11126 13:55:01.875342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11127 13:55:01.875586 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11128 13:55:01.875762 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11129 13:55:01.875935 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11130 13:55:01.876135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11131 13:55:01.876308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11132 13:55:01.876493 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11133 13:55:01.876633 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11134 13:55:01.876777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11135 13:55:01.876920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11136 13:55:01.877064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11137 13:55:01.877245 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11138 13:55:01.877380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11139 13:55:01.877523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11140 13:55:01.877679 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11141 13:55:01.877826 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11142 13:55:01.878013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11143 13:55:01.878252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11144 13:55:01.878424 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11145 13:55:01.878619 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11146 13:55:01.878765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11147 13:55:01.878935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11148 13:55:01.879115 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11149 13:55:01.882293 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11150 13:55:01.882572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11151 13:55:01.883009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11152 13:55:01.883209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11153 13:55:01.883383 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11154 13:55:01.883530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11155 13:55:01.883710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11156 13:55:01.883880 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11157 13:55:01.884087 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11158 13:55:01.884262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11159 13:55:01.884466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11160 13:55:01.884644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11161 13:55:01.884816 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11162 13:55:01.884980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11163 13:55:01.885143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11164 13:55:01.885308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11165 13:55:01.885504 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11166 13:55:01.885690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11167 13:55:01.885864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11168 13:55:01.886028 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11169 13:55:01.886194 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11170 13:55:01.886365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11171 13:55:01.886564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11172 13:55:01.886735 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11173 13:55:01.886874 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11174 13:55:01.890237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11175 13:55:01.890598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11176 13:55:01.890729 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11177 13:55:01.890892 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11178 13:55:01.891025 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11179 13:55:01.891400 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11180 13:55:01.891600 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11181 13:55:01.891774 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11182 13:55:01.891950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11183 13:55:01.892158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11184 13:55:01.892330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11185 13:55:01.892500 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11186 13:55:01.892667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11187 13:55:01.892837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11188 13:55:01.893036 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11189 13:55:01.893208 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11190 13:55:01.893376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11191 13:55:01.893543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11192 13:55:01.893726 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11193 13:55:01.893897 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11194 13:55:01.894101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11195 13:55:01.894315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11196 13:55:01.894488 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11197 13:55:01.894655 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11198 13:55:01.894815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11199 13:55:01.894949 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11200 13:55:01.895066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11201 13:55:01.898221 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11202 13:55:01.898664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11203 13:55:01.898865 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11204 13:55:01.899017 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11205 13:55:01.899275 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11206 13:55:01.899514 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11207 13:55:01.899734 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11208 13:55:01.899931 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11209 13:55:01.900090 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11210 13:55:01.900234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11211 13:55:01.900362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11212 13:55:01.900489 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11213 13:55:01.900644 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11214 13:55:01.900774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11215 13:55:01.900905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11216 13:55:01.901032 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11217 13:55:01.901158 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11218 13:55:01.901310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11219 13:55:01.901440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11220 13:55:01.901567 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11221 13:55:01.901714 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11222 13:55:01.901847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11223 13:55:01.902033 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11224 13:55:01.902216 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11225 13:55:01.902346 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11226 13:55:01.902464 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11227 13:55:01.902632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11228 13:55:01.906249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11229 13:55:01.906745 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11230 13:55:01.906914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11231 13:55:01.907116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11232 13:55:01.907321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11233 13:55:01.919538 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11234 13:55:01.920088 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11235 13:55:01.920316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11236 13:55:01.920512 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11237 13:55:01.920711 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11238 13:55:01.920878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11239 13:55:01.921027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11240 13:55:01.921220 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11241 13:55:01.921429 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11242 13:55:01.921617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11243 13:55:01.921817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11244 13:55:01.922031 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11245 13:55:01.922229 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11246 13:55:01.922496 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11247 13:55:01.922699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11248 13:55:01.922838 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11249 13:55:01.923023 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11250 13:55:01.923178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11251 13:55:01.923352 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11252 13:55:01.923535 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11253 13:55:01.923715 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11254 13:55:01.923855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11255 13:55:01.923976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11256 13:55:01.924198 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11257 13:55:01.924404 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11258 13:55:01.924629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11259 13:55:01.924859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11260 13:55:01.925064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11261 13:55:01.925226 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11262 13:55:01.925387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11263 13:55:01.925519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11264 13:55:01.926314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11265 13:55:01.926503 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11266 13:55:01.926874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11267 13:55:01.927007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11268 13:55:01.927125 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11269 13:55:01.927243 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11270 13:55:01.927359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11271 13:55:01.927474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11272 13:55:01.927590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11273 13:55:01.927705 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11274 13:55:01.927820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11275 13:55:01.927936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11276 13:55:01.928054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11277 13:55:01.928171 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11278 13:55:01.928285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11279 13:55:01.934230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11280 13:55:01.934644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11281 13:55:01.934753 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11282 13:55:01.934842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11283 13:55:01.934928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11284 13:55:01.935031 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11285 13:55:01.935118 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11286 13:55:01.935222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11287 13:55:01.935310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11288 13:55:01.935609 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11289 13:55:01.935713 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11290 13:55:01.935811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11291 13:55:01.935911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11292 13:55:01.936012 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11293 13:55:01.936312 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11294 13:55:01.936415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11295 13:55:01.936512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11296 13:55:01.936791 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11297 13:55:01.936890 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11298 13:55:01.936977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11299 13:55:01.937077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11300 13:55:01.937178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11301 13:55:01.937267 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11302 13:55:01.937368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11303 13:55:01.937469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11304 13:55:01.937573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11305 13:55:01.937690 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11306 13:55:01.937992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11307 13:55:01.938095 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11308 13:55:01.942287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11309 13:55:01.942478 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11310 13:55:01.942781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11311 13:55:01.942892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11312 13:55:01.942982 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11313 13:55:01.943082 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11314 13:55:01.943187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11315 13:55:01.943277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11316 13:55:01.943383 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11317 13:55:01.943489 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11318 13:55:01.943782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11319 13:55:01.943885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11320 13:55:01.943987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11321 13:55:01.944086 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11322 13:55:01.944185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11323 13:55:01.944285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11324 13:55:01.944383 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11325 13:55:01.944832 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11326 13:55:01.944976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11327 13:55:01.945103 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11328 13:55:01.945472 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11329 13:55:01.945584 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11330 13:55:01.945683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11331 13:55:01.945771 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11332 13:55:01.945875 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11333 13:55:01.945982 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11334 13:55:01.946069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11335 13:55:01.946156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11336 13:55:01.946240 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11337 13:55:01.946340 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11338 13:55:01.950393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11339 13:55:01.950570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11340 13:55:01.950664 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11341 13:55:01.950767 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11342 13:55:01.950868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11343 13:55:01.951169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11344 13:55:01.951277 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11345 13:55:01.951384 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11346 13:55:01.951491 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11347 13:55:01.951596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11348 13:55:01.951698 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11349 13:55:01.952022 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11350 13:55:01.952126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11351 13:55:01.952227 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11352 13:55:01.952326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11353 13:55:01.952426 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11354 13:55:01.952788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11355 13:55:01.952921 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11356 13:55:01.953009 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11357 13:55:01.953104 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11358 13:55:01.953202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11359 13:55:01.953505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11360 13:55:01.953623 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11361 13:55:01.953739 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11362 13:55:01.954046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11363 13:55:01.958295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11364 13:55:01.958900 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11365 13:55:01.959064 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11366 13:55:01.959190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11367 13:55:01.970971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11368 13:55:01.971514 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11369 13:55:01.971665 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11370 13:55:01.971810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11371 13:55:01.971954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11372 13:55:01.972136 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11373 13:55:01.972301 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11374 13:55:01.972458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11375 13:55:01.972613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11376 13:55:01.972798 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11377 13:55:01.972938 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11378 13:55:01.973101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11379 13:55:01.973271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11380 13:55:01.973437 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11381 13:55:01.973595 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11382 13:55:01.973790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11383 13:55:01.973963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11384 13:55:01.974104 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11385 13:55:01.974225 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11386 13:55:01.974365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11387 13:55:01.978186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11388 13:55:01.978577 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11389 13:55:01.978773 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11390 13:55:01.978943 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11391 13:55:01.979135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11392 13:55:01.979300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11393 13:55:01.979459 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11394 13:55:01.979641 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11395 13:55:01.979804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11396 13:55:01.979965 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11397 13:55:01.980125 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11398 13:55:01.980316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11399 13:55:01.980473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11400 13:55:01.980632 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11401 13:55:01.980793 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11402 13:55:01.980948 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11403 13:55:01.981113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11404 13:55:01.981255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11405 13:55:01.981414 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11406 13:55:01.981541 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11407 13:55:01.981702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11408 13:55:01.981948 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11409 13:55:01.982139 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11410 13:55:01.982322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11411 13:55:01.982466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11412 13:55:01.982608 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11413 13:55:01.982752 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11414 13:55:01.982894 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11415 13:55:01.986174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11416 13:55:01.986482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11417 13:55:01.986592 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11418 13:55:01.986702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11419 13:55:01.986794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11420 13:55:01.986929 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11421 13:55:01.987037 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11422 13:55:01.987352 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11423 13:55:01.987466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11424 13:55:01.987759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11425 13:55:01.987875 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11426 13:55:01.987979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11427 13:55:01.988268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11428 13:55:01.988381 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11429 13:55:01.988676 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11430 13:55:01.988787 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11431 13:55:01.988892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11432 13:55:01.989198 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11433 13:55:01.989297 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11434 13:55:01.989398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11435 13:55:01.989495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11436 13:55:01.989788 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11437 13:55:01.989902 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11438 13:55:01.994236 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11439 13:55:01.994746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11440 13:55:01.994852 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11441 13:55:01.994939 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11442 13:55:01.995023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11443 13:55:01.995124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11444 13:55:01.995226 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11445 13:55:01.995311 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11446 13:55:01.995389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11447 13:55:01.995667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11448 13:55:01.995758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11449 13:55:01.995881 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11450 13:55:01.995967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11451 13:55:01.996046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11452 13:55:01.996347 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11453 13:55:01.996451 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11454 13:55:01.996538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11455 13:55:01.996644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11456 13:55:01.996930 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11457 13:55:01.997039 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11458 13:55:01.997126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11459 13:55:01.997221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11460 13:55:01.997307 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11461 13:55:01.997415 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11462 13:55:01.997513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11463 13:55:01.997609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11464 13:55:01.997995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11465 13:55:01.998154 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11466 13:55:02.002359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11467 13:55:02.003031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11468 13:55:02.003232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11469 13:55:02.003398 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11470 13:55:02.003552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11471 13:55:02.003709 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11472 13:55:02.003862 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11473 13:55:02.004058 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11474 13:55:02.004218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11475 13:55:02.004377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11476 13:55:02.004528 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11477 13:55:02.004679 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11478 13:55:02.004834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11479 13:55:02.004982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11480 13:55:02.005141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11481 13:55:02.005300 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11482 13:55:02.005492 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11483 13:55:02.005641 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11484 13:55:02.005825 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11485 13:55:02.005994 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11486 13:55:02.006136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11487 13:55:02.006266 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11488 13:55:02.006396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11489 13:55:02.006571 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11490 13:55:02.006717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11491 13:55:02.006862 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11492 13:55:02.007048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11493 13:55:02.007184 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11494 13:55:02.007328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11495 13:55:02.007470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11496 13:55:02.010234 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11497 13:55:02.010579 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11498 13:55:02.010685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11499 13:55:02.010773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11500 13:55:02.010878 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11501 13:55:02.023211 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11502 13:55:02.023685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11503 13:55:02.023792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11504 13:55:02.023878 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11505 13:55:02.023945 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11506 13:55:02.024022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11507 13:55:02.024088 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11508 13:55:02.024220 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11509 13:55:02.024321 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11510 13:55:02.024609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11511 13:55:02.024731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11512 13:55:02.024847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11513 13:55:02.024975 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11514 13:55:02.025279 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11515 13:55:02.025397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11516 13:55:02.025482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11517 13:55:02.025574 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11518 13:55:02.025858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11519 13:55:02.025948 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11520 13:55:02.030203 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11521 13:55:02.030558 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11522 13:55:02.030642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11523 13:55:02.030752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11524 13:55:02.031034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11525 13:55:02.031120 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11526 13:55:02.031224 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11527 13:55:02.031488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11528 13:55:02.031570 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11529 13:55:02.031827 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11530 13:55:02.031907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11531 13:55:02.032206 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11532 13:55:02.032288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11533 13:55:02.032396 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11534 13:55:02.032484 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11535 13:55:02.032757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11536 13:55:02.032856 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11537 13:55:02.033133 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11538 13:55:02.033228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11539 13:55:02.033515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11540 13:55:02.033587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11541 13:55:02.033712 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11542 13:55:02.033982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11543 13:55:02.038182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11544 13:55:02.038545 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11545 13:55:02.038620 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11546 13:55:02.038712 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11547 13:55:02.038982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11548 13:55:02.039061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11549 13:55:02.039311 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11550 13:55:02.039378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11551 13:55:02.039663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11552 13:55:02.039780 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11553 13:55:02.040067 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11554 13:55:02.040175 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11555 13:55:02.040272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11556 13:55:02.040374 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11557 13:55:02.040461 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11558 13:55:02.040561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11559 13:55:02.040664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11560 13:55:02.041616 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11561 13:55:02.041737 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11562 13:55:02.041830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11563 13:55:02.041920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11564 13:55:02.042009 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11565 13:55:02.042096 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11566 13:55:02.042198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11567 13:55:02.042283 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11568 13:55:02.042367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11569 13:55:02.046275 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11570 13:55:02.046719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11571 13:55:02.046826 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11572 13:55:02.046912 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11573 13:55:02.046999 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11574 13:55:02.047101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11575 13:55:02.047188 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11576 13:55:02.047288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11577 13:55:02.047376 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11578 13:55:02.047476 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11579 13:55:02.047578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11580 13:55:02.047690 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11581 13:55:02.047795 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11582 13:55:02.053765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11583 13:55:02.053971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11584 13:55:02.054066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11585 13:55:02.054158 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11586 13:55:02.054248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11587 13:55:02.054337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11588 13:55:02.054427 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11589 13:55:02.054517 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11590 13:55:02.054601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11591 13:55:02.054684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11592 13:55:02.054770 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11593 13:55:02.054855 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11594 13:55:02.054940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11595 13:55:02.055024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11596 13:55:02.055132 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11597 13:55:02.055222 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11598 13:55:02.055308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11599 13:55:02.055395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11600 13:55:02.055484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11601 13:55:02.055570 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11602 13:55:02.055655 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11603 13:55:02.055759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11604 13:55:02.055849 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11605 13:55:02.055937 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11606 13:55:02.056043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11607 13:55:02.056140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11608 13:55:02.056245 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11609 13:55:02.056349 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11610 13:55:02.056448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11611 13:55:02.056753 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11612 13:55:02.056846 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11613 13:55:02.056922 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11614 13:55:02.057174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11615 13:55:02.057426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11616 13:55:02.057502 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11617 13:55:02.057751 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11618 13:55:02.057828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11619 13:55:02.058097 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11620 13:55:02.062298 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11621 13:55:02.062469 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11622 13:55:02.062731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11623 13:55:02.062798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11624 13:55:02.063217 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11625 13:55:02.063321 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11626 13:55:02.063410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11627 13:55:02.063497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11628 13:55:02.063772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11629 13:55:02.063862 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11630 13:55:02.063950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11631 13:55:02.064054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11632 13:55:02.064158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11633 13:55:02.064259 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11634 13:55:02.064546 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11635 13:55:02.077629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11636 13:55:02.078101 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11637 13:55:02.078199 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11638 13:55:02.078287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11639 13:55:02.078389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11640 13:55:02.078498 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11641 13:55:02.078602 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11642 13:55:02.078918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11643 13:55:02.079013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11644 13:55:02.079122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11645 13:55:02.079225 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11646 13:55:02.079551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11647 13:55:02.079652 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11648 13:55:02.079756 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11649 13:55:02.079842 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11650 13:55:02.080128 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11651 13:55:02.080218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11652 13:55:02.080306 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11653 13:55:02.080399 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11654 13:55:02.080481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11655 13:55:02.080576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11656 13:55:02.080671 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11657 13:55:02.080964 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11658 13:55:02.081063 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11659 13:55:02.081147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11660 13:55:02.081247 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11661 13:55:02.081332 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11662 13:55:02.081416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11663 13:55:02.081514 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11664 13:55:02.081601 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11665 13:55:02.081713 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11666 13:55:02.081814 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11667 13:55:02.081899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11668 13:55:02.081995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11669 13:55:02.086232 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11670 13:55:02.087034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11671 13:55:02.087139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11672 13:55:02.087228 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11673 13:55:02.087314 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11674 13:55:02.087400 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11675 13:55:02.087487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11676 13:55:02.087573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11677 13:55:02.087678 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11678 13:55:02.087768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11679 13:55:02.087855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11680 13:55:02.087944 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11681 13:55:02.088031 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11682 13:55:02.088135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11683 13:55:02.088229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11684 13:55:02.088315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11685 13:55:02.088419 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11686 13:55:02.088508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11687 13:55:02.088610 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11688 13:55:02.088700 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11689 13:55:02.089010 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11690 13:55:02.089115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11691 13:55:02.089201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11692 13:55:02.089283 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11693 13:55:02.089381 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11694 13:55:02.089462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11695 13:55:02.089547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11696 13:55:02.089653 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11697 13:55:02.089757 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11698 13:55:02.089841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11699 13:55:02.089937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11700 13:55:02.094200 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11701 13:55:02.095299 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11702 13:55:02.095425 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11703 13:55:02.095510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11704 13:55:02.095593 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11705 13:55:02.095676 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11706 13:55:02.095758 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11707 13:55:02.095846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11708 13:55:02.095930 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11709 13:55:02.096035 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11710 13:55:02.096123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11711 13:55:02.096207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11712 13:55:02.096291 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11713 13:55:02.096377 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11714 13:55:02.096463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11715 13:55:02.096569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11716 13:55:02.096659 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11717 13:55:02.096746 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11718 13:55:02.096835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11719 13:55:02.096942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11720 13:55:02.097027 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11721 13:55:02.097112 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11722 13:55:02.097218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11723 13:55:02.097308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11724 13:55:02.097411 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11725 13:55:02.097498 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11726 13:55:02.097602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11727 13:55:02.097702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11728 13:55:02.097807 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11729 13:55:02.097914 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11730 13:55:02.102247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11731 13:55:02.102787 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11732 13:55:02.102985 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11733 13:55:02.103147 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11734 13:55:02.103319 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11735 13:55:02.103508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11736 13:55:02.103677 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11737 13:55:02.103840 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11738 13:55:02.103995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11739 13:55:02.104153 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11740 13:55:02.104311 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11741 13:55:02.104506 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11742 13:55:02.104672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11743 13:55:02.104827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11744 13:55:02.104987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11745 13:55:02.105149 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11746 13:55:02.105309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11747 13:55:02.105472 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11748 13:55:02.105687 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11749 13:55:02.105862 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11750 13:55:02.106030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11751 13:55:02.106201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11752 13:55:02.106334 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11753 13:55:02.106450 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11754 13:55:02.106565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11755 13:55:02.106680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11756 13:55:02.106821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11757 13:55:02.106949 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11758 13:55:02.107066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11759 13:55:02.107184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11760 13:55:02.110266 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11761 13:55:02.110741 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11762 13:55:02.110920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11763 13:55:02.111165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11764 13:55:02.111359 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11765 13:55:02.111502 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11766 13:55:02.111621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11767 13:55:02.111764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11768 13:55:02.111956 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11769 13:55:02.129828 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11770 13:55:02.130189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11771 13:55:02.130607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11772 13:55:02.130715 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11773 13:55:02.130802 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11774 13:55:02.130888 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11775 13:55:02.130975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11776 13:55:02.131079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11777 13:55:02.131163 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11778 13:55:02.131252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11779 13:55:02.131349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11780 13:55:02.131434 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11781 13:55:02.131515 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11782 13:55:02.131615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11783 13:55:02.131700 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11784 13:55:02.132071 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11785 13:55:02.132174 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11786 13:55:02.132281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11787 13:55:02.132370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11788 13:55:02.132473 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11789 13:55:02.132573 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11790 13:55:02.132659 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11791 13:55:02.132958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11792 13:55:02.133060 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11793 13:55:02.133162 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11794 13:55:02.133863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11795 13:55:02.134006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11796 13:55:02.134173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11797 13:55:02.134272 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11798 13:55:02.134552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11799 13:55:02.134643 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11800 13:55:02.134727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11801 13:55:02.134814 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11802 13:55:02.134902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11803 13:55:02.138261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11804 13:55:02.138469 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11805 13:55:02.138772 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11806 13:55:02.138876 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11807 13:55:02.138962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11808 13:55:02.139063 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11809 13:55:02.139146 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11810 13:55:02.139245 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11811 13:55:02.139344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11812 13:55:02.139444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11813 13:55:02.139588 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11814 13:55:02.139707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11815 13:55:02.139810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11816 13:55:02.139907 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11817 13:55:02.140009 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11818 13:55:02.140113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11819 13:55:02.140414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11820 13:55:02.140530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11821 13:55:02.140624 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11822 13:55:02.140908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11823 13:55:02.141014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11824 13:55:02.141108 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11825 13:55:02.141207 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11826 13:55:02.141294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11827 13:55:02.141391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11828 13:55:02.141489 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11829 13:55:02.141570 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11830 13:55:02.141835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11831 13:55:02.141949 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11832 13:55:02.142034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11833 13:55:02.142123 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11834 13:55:02.146257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11835 13:55:02.146743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11836 13:55:02.146853 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11837 13:55:02.146945 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11838 13:55:02.147045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11839 13:55:02.147144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11840 13:55:02.147254 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11841 13:55:02.147377 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11842 13:55:02.147465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11843 13:55:02.147567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11844 13:55:02.147659 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11845 13:55:02.147776 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11846 13:55:02.147902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11847 13:55:02.148029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11848 13:55:02.148157 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11849 13:55:02.148558 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11850 13:55:02.148666 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11851 13:55:02.148759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11852 13:55:02.148867 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11853 13:55:02.148962 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11854 13:55:02.149071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11855 13:55:02.149154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11856 13:55:02.149255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11857 13:55:02.149340 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11858 13:55:02.149447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11859 13:55:02.149559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11860 13:55:02.149678 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11861 13:55:02.149797 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11862 13:55:02.149918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11863 13:55:02.154320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11864 13:55:02.154576 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11865 13:55:02.154887 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11866 13:55:02.154978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11867 13:55:02.155059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11868 13:55:02.155142 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11869 13:55:02.155240 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11870 13:55:02.155327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11871 13:55:02.155410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11872 13:55:02.155531 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11873 13:55:02.155635 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11874 13:55:02.155737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11875 13:55:02.155849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11876 13:55:02.155951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11877 13:55:02.156050 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11878 13:55:02.156154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11879 13:55:02.156521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11880 13:55:02.156627 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11881 13:55:02.156754 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11882 13:55:02.156892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11883 13:55:02.157024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11884 13:55:02.157365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11885 13:55:02.157465 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11886 13:55:02.157553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11887 13:55:02.157701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11888 13:55:02.157839 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11889 13:55:02.157942 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11890 13:55:02.158037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11891 13:55:02.158152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11892 13:55:02.158242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11893 13:55:02.162217 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11894 13:55:02.162591 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11895 13:55:02.162703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11896 13:55:02.162820 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11897 13:55:02.162928 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11898 13:55:02.163022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11899 13:55:02.163143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11900 13:55:02.163244 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11901 13:55:02.163323 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11902 13:55:02.163405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11903 13:55:02.179967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11904 13:55:02.180412 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11905 13:55:02.180524 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11906 13:55:02.180615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11907 13:55:02.180702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11908 13:55:02.180819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11909 13:55:02.180915 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11910 13:55:02.181016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11911 13:55:02.181311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11912 13:55:02.181426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11913 13:55:02.181527 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11914 13:55:02.181612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11915 13:55:02.181712 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11916 13:55:02.182014 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11917 13:55:02.182115 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11918 13:55:02.182468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11919 13:55:02.182602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11920 13:55:02.182904 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11921 13:55:02.183013 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11922 13:55:02.183119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11923 13:55:02.183461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11924 13:55:02.183583 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11925 13:55:02.183686 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11926 13:55:02.183805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11927 13:55:02.184098 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11928 13:55:02.184207 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11929 13:55:02.184500 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11930 13:55:02.184610 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11931 13:55:02.184908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11932 13:55:02.185021 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11933 13:55:02.185128 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11934 13:55:02.185411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11935 13:55:02.185508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11936 13:55:02.185614 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11937 13:55:02.185732 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
11938 13:55:02.185846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
11939 13:55:02.186081 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
11940 13:55:02.190296 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
11941 13:55:02.190528 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
11942 13:55:02.190847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
11943 13:55:02.190955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
11944 13:55:02.191043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
11945 13:55:02.191144 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
11946 13:55:02.191233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
11947 13:55:02.191317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
11948 13:55:02.191422 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
11949 13:55:02.191510 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
11950 13:55:02.191612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
11951 13:55:02.191715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
11952 13:55:02.192043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
11953 13:55:02.192150 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
11954 13:55:02.192254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
11955 13:55:02.192360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
11956 13:55:02.192477 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
11957 13:55:02.192587 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
11958 13:55:02.192919 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
11959 13:55:02.193124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
11960 13:55:02.193335 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
11961 13:55:02.193513 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
11962 13:55:02.193768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
11963 13:55:02.193984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
11964 13:55:02.194164 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
11965 13:55:02.194358 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
11966 13:55:02.194505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
11967 13:55:02.198253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
11968 13:55:02.198707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
11969 13:55:02.198913 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
11970 13:55:02.199011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
11971 13:55:02.199084 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
11972 13:55:02.199174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
11973 13:55:02.199240 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
11974 13:55:02.199308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
11975 13:55:02.199406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
11976 13:55:02.199480 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
11977 13:55:02.199568 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
11978 13:55:02.199657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
11979 13:55:02.199926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
11980 13:55:02.200007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
11981 13:55:02.200084 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
11982 13:55:02.200379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
11983 13:55:02.200479 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
11984 13:55:02.200587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
11985 13:55:02.200677 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
11986 13:55:02.200993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
11987 13:55:02.201090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
11988 13:55:02.201200 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
11989 13:55:02.201311 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
11990 13:55:02.201591 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
11991 13:55:02.201675 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
11992 13:55:02.201971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
11993 13:55:02.202060 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
11994 13:55:02.210159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
11995 13:55:02.210685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
11996 13:55:02.210804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
11997 13:55:02.210902 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
11998 13:55:02.211005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
11999 13:55:02.211115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
12000 13:55:02.211207 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
12001 13:55:02.211286 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
12002 13:55:02.211401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
12003 13:55:02.211507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
12004 13:55:02.211609 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
12005 13:55:02.211723 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
12006 13:55:02.211840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
12007 13:55:02.211955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
12008 13:55:02.212066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
12009 13:55:02.212173 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
12010 13:55:02.212273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
12011 13:55:02.212831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
12012 13:55:02.212943 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
12013 13:55:02.213059 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
12014 13:55:02.213166 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
12015 13:55:02.213275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
12016 13:55:02.213380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
12017 13:55:02.213474 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
12018 13:55:02.213590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
12019 13:55:02.213706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
12020 13:55:02.213815 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
12021 13:55:02.213918 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
12022 13:55:02.214030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
12023 13:55:02.218209 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
12024 13:55:02.218625 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
12025 13:55:02.218736 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
12026 13:55:02.218844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
12027 13:55:02.218966 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
12028 13:55:02.219065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
12029 13:55:02.219150 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
12030 13:55:02.219238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
12031 13:55:02.219324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
12032 13:55:02.219416 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
12033 13:55:02.219703 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
12034 13:55:02.220016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
12035 13:55:02.220130 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
12036 13:55:02.220236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
12037 13:55:02.232915 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
12038 13:55:02.233338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
12039 13:55:02.233460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
12040 13:55:02.233559 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
12041 13:55:02.233692 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
12042 13:55:02.233793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
12043 13:55:02.233868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
12044 13:55:02.233986 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
12045 13:55:02.234282 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
12046 13:55:02.234376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
12047 13:55:02.234656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
12048 13:55:02.234931 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
12049 13:55:02.235005 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
12050 13:55:02.235092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
12051 13:55:02.235383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
12052 13:55:02.235465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
12053 13:55:02.235559 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
12054 13:55:02.235645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
12055 13:55:02.235911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
12056 13:55:02.236005 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
12057 13:55:02.236110 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
12058 13:55:02.236392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
12059 13:55:02.236475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
12060 13:55:02.236603 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
12061 13:55:02.236703 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
12062 13:55:02.236964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
12063 13:55:02.237239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
12064 13:55:02.237510 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
12065 13:55:02.237589 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
12066 13:55:02.237731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
12067 13:55:02.237825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
12068 13:55:02.237945 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
12069 13:55:02.238075 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
12070 13:55:02.242411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
12071 13:55:02.242603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
12072 13:55:02.242712 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
12073 13:55:02.242993 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
12074 13:55:02.243104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
12075 13:55:02.243203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
12076 13:55:02.243308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
12077 13:55:02.243416 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12078 13:55:02.243732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12079 13:55:02.243846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12080 13:55:02.244144 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12081 13:55:02.244238 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12082 13:55:02.244339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12083 13:55:02.244445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12084 13:55:02.244724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12085 13:55:02.244813 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12086 13:55:02.244913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12087 13:55:02.245212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12088 13:55:02.245329 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12089 13:55:02.245432 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12090 13:55:02.245690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12091 13:55:02.245802 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12092 13:55:02.246109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12093 13:55:02.250346 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12094 13:55:02.250747 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12095 13:55:02.250858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12096 13:55:02.250966 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12097 13:55:02.251071 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12098 13:55:02.251178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12099 13:55:02.251287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12100 13:55:02.251392 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12101 13:55:02.251591 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12102 13:55:02.251718 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12103 13:55:02.251822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12104 13:55:02.252140 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12105 13:55:02.252245 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12106 13:55:02.252350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12107 13:55:02.252457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12108 13:55:02.252563 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12109 13:55:02.252884 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12110 13:55:02.252995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12111 13:55:02.253104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12112 13:55:02.253210 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12113 13:55:02.253298 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12114 13:55:02.253604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12115 13:55:02.253717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12116 13:55:02.253827 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12117 13:55:02.253916 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12118 13:55:02.254023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12119 13:55:02.258176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12120 13:55:02.258534 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12121 13:55:02.258637 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12122 13:55:02.258743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12123 13:55:02.258848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12124 13:55:02.259146 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12125 13:55:02.259244 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12126 13:55:02.259348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12127 13:55:02.259459 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12128 13:55:02.259755 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12129 13:55:02.259856 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12130 13:55:02.259963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12131 13:55:02.260067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12132 13:55:02.260352 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12133 13:55:02.260462 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12134 13:55:02.260561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12135 13:55:02.260645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12136 13:55:02.260740 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12137 13:55:02.260837 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12138 13:55:02.261138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12139 13:55:02.261255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12140 13:55:02.261413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12141 13:55:02.261534 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12142 13:55:02.261631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12143 13:55:02.261961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12144 13:55:02.262068 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12145 13:55:02.266199 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12146 13:55:02.266635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12147 13:55:02.266742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12148 13:55:02.266843 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12149 13:55:02.266927 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12150 13:55:02.267012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12151 13:55:02.267301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12152 13:55:02.267403 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12153 13:55:02.267507 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12154 13:55:02.267607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12155 13:55:02.267897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12156 13:55:02.268004 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12157 13:55:02.268109 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12158 13:55:02.268401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12159 13:55:02.268516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12160 13:55:02.268624 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12161 13:55:02.268729 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12162 13:55:02.269021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12163 13:55:02.269130 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12164 13:55:02.269231 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12165 13:55:02.269512 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12166 13:55:02.269621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12167 13:55:02.269746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12168 13:55:02.269855 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12169 13:55:02.270164 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12170 13:55:02.274178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12171 13:55:02.288282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12172 13:55:02.288754 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12173 13:55:02.288868 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12174 13:55:02.288954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12175 13:55:02.289053 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12176 13:55:02.289139 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12177 13:55:02.289225 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12178 13:55:02.289321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12179 13:55:02.289404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12180 13:55:02.289674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12181 13:55:02.289780 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12182 13:55:02.289880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12183 13:55:02.289979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12184 13:55:02.290291 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12185 13:55:02.290419 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12186 13:55:02.290579 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12187 13:55:02.290739 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12188 13:55:02.290853 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12189 13:55:02.290967 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12190 13:55:02.291056 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12191 13:55:02.291159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12192 13:55:02.291514 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12193 13:55:02.291672 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12194 13:55:02.291787 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12195 13:55:02.291880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12196 13:55:02.291986 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12197 13:55:02.292075 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12198 13:55:02.292177 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12199 13:55:02.292284 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12200 13:55:02.292423 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12201 13:55:02.292551 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12202 13:55:02.292662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12203 13:55:02.293008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12204 13:55:02.293208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12205 13:55:02.293410 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12206 13:55:02.293613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12207 13:55:02.293827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12208 13:55:02.294078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12209 13:55:02.294222 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12210 13:55:02.294341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12211 13:55:02.294457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12212 13:55:02.294573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12213 13:55:02.294686 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12214 13:55:02.298448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12215 13:55:02.298674 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12216 13:55:02.298786 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12217 13:55:02.298874 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12218 13:55:02.298959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12219 13:55:02.299063 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12220 13:55:02.299152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12221 13:55:02.299254 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12222 13:55:02.299356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12223 13:55:02.299444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12224 13:55:02.299547 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12225 13:55:02.299650 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12226 13:55:02.299755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12227 13:55:02.299980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12228 13:55:02.300099 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12229 13:55:02.300393 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12230 13:55:02.300509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12231 13:55:02.300610 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12232 13:55:02.300899 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12233 13:55:02.300992 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12234 13:55:02.301096 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12235 13:55:02.301195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12236 13:55:02.301484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12237 13:55:02.301591 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12238 13:55:02.301885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12239 13:55:02.301975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12240 13:55:02.306298 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12241 13:55:02.306830 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12242 13:55:02.307002 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12243 13:55:02.307210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12244 13:55:02.307413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12245 13:55:02.307658 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12246 13:55:02.307807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12247 13:55:02.307954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12248 13:55:02.308099 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12249 13:55:02.308243 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12250 13:55:02.308388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12251 13:55:02.308532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12252 13:55:02.308711 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12253 13:55:02.308846 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12254 13:55:02.308988 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12255 13:55:02.309132 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12256 13:55:02.309274 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12257 13:55:02.309415 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12258 13:55:02.309559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12259 13:55:02.309755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12260 13:55:02.309909 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12261 13:55:02.310067 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12262 13:55:02.310299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12263 13:55:02.310445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12264 13:55:02.310612 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12265 13:55:02.310788 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12266 13:55:02.311006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12267 13:55:02.311192 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12268 13:55:02.314218 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12269 13:55:02.314740 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12270 13:55:02.314977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12271 13:55:02.315185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12272 13:55:02.315398 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12273 13:55:02.315735 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12274 13:55:02.316337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12275 13:55:02.316657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12276 13:55:02.316760 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12277 13:55:02.316854 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12278 13:55:02.316934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12279 13:55:02.317020 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12280 13:55:02.317120 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12281 13:55:02.317223 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12282 13:55:02.317320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12283 13:55:02.317405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12284 13:55:02.317497 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12285 13:55:02.317581 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12286 13:55:02.317658 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12287 13:55:02.317740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12288 13:55:02.317823 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12289 13:55:02.317934 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12290 13:55:02.318004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12291 13:55:02.318065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12292 13:55:02.318124 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12293 13:55:02.318183 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12294 13:55:02.318242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12295 13:55:02.318328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12296 13:55:02.322258 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12297 13:55:02.322713 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12298 13:55:02.322822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12299 13:55:02.322907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12300 13:55:02.323051 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12301 13:55:02.323348 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12302 13:55:02.323482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12303 13:55:02.323589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12304 13:55:02.323710 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12305 13:55:02.339931 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12306 13:55:02.340187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12307 13:55:02.340504 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12308 13:55:02.340613 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12309 13:55:02.340708 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12310 13:55:02.340795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12311 13:55:02.340897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12312 13:55:02.340984 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12313 13:55:02.341069 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12314 13:55:02.341171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12315 13:55:02.341274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12316 13:55:02.341377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12317 13:55:02.341480 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12318 13:55:02.341582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12319 13:55:02.341695 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12320 13:55:02.341797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12321 13:55:02.341899 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12322 13:55:02.342273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12323 13:55:02.342592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12324 13:55:02.342708 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12325 13:55:02.342794 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12326 13:55:02.342892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12327 13:55:02.343187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12328 13:55:02.343289 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12329 13:55:02.343394 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12330 13:55:02.343499 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12331 13:55:02.343802 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12332 13:55:02.343923 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12333 13:55:02.344026 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12334 13:55:02.344308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12335 13:55:02.344609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12336 13:55:02.344727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12337 13:55:02.345008 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12338 13:55:02.345101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12339 13:55:02.345205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12340 13:55:02.345501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12341 13:55:02.345597 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12342 13:55:02.345717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12343 13:55:02.346014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12344 13:55:02.346114 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12345 13:55:02.350234 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12346 13:55:02.350634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12347 13:55:02.350742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12348 13:55:02.350849 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12349 13:55:02.350938 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12350 13:55:02.351046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12351 13:55:02.351378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12352 13:55:02.351479 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12353 13:55:02.351583 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12354 13:55:02.351711 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12355 13:55:02.351821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12356 13:55:02.351967 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12357 13:55:02.352088 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12358 13:55:02.352181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12359 13:55:02.352487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12360 13:55:02.352593 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12361 13:55:02.352701 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12362 13:55:02.352805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12363 13:55:02.352908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12364 13:55:02.353010 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12365 13:55:02.353112 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12366 13:55:02.353432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12367 13:55:02.353532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12368 13:55:02.353630 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12369 13:55:02.353731 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12370 13:55:02.353835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12371 13:55:02.354133 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12372 13:55:02.358257 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12373 13:55:02.358674 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12374 13:55:02.358782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12375 13:55:02.358902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12376 13:55:02.358996 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12377 13:55:02.359099 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12378 13:55:02.359186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12379 13:55:02.359287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12380 13:55:02.359588 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12381 13:55:02.359768 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12382 13:55:02.359893 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12383 13:55:02.360050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12384 13:55:02.360253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12385 13:55:02.360381 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12386 13:55:02.360477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12387 13:55:02.360562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12388 13:55:02.360646 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12389 13:55:02.360731 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12390 13:55:02.360834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12391 13:55:02.360921 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12392 13:55:02.361008 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12393 13:55:02.361106 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12394 13:55:02.361187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12395 13:55:02.361281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12396 13:55:02.361377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12397 13:55:02.361466 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12398 13:55:02.361558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12399 13:55:02.361842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12400 13:55:02.361956 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12401 13:55:02.362063 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12402 13:55:02.362152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12403 13:55:02.366376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12404 13:55:02.366565 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12405 13:55:02.366679 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12406 13:55:02.366985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12407 13:55:02.367093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12408 13:55:02.367193 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12409 13:55:02.367280 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12410 13:55:02.367379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12411 13:55:02.367681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12412 13:55:02.367800 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12413 13:55:02.367916 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12414 13:55:02.368019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12415 13:55:02.368315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12416 13:55:02.368434 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12417 13:55:02.368539 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12418 13:55:02.368644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12419 13:55:02.368936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12420 13:55:02.369079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12421 13:55:02.369171 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12422 13:55:02.369286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12423 13:55:02.369576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12424 13:55:02.369714 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12425 13:55:02.369827 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12426 13:55:02.369932 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12427 13:55:02.378182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12428 13:55:02.378646 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12429 13:55:02.378748 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12430 13:55:02.378840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12431 13:55:02.378947 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12432 13:55:02.379038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12433 13:55:02.379141 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12434 13:55:02.379247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12435 13:55:02.379354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12436 13:55:02.379462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12437 13:55:02.379761 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12438 13:55:02.379860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12439 13:55:02.391864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12440 13:55:02.392340 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12441 13:55:02.392449 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12442 13:55:02.392539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12443 13:55:02.392624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12444 13:55:02.392736 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12445 13:55:02.392824 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12446 13:55:02.392908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12447 13:55:02.393007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12448 13:55:02.393111 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12449 13:55:02.393402 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12450 13:55:02.393505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12451 13:55:02.393606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12452 13:55:02.393717 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12453 13:55:02.393807 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12454 13:55:02.393912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12455 13:55:02.394011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12456 13:55:02.394294 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12457 13:55:02.394419 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12458 13:55:02.394555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12459 13:55:02.394891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12460 13:55:02.394975 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12461 13:55:02.395059 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12462 13:55:02.395162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12463 13:55:02.395463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12464 13:55:02.395560 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12465 13:55:02.395671 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12466 13:55:02.395790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12467 13:55:02.396094 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12468 13:55:02.396231 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12469 13:55:02.396389 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12470 13:55:02.396587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12471 13:55:02.396703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12472 13:55:02.396816 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12473 13:55:02.396903 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12474 13:55:02.396998 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12475 13:55:02.397083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12476 13:55:02.397178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12477 13:55:02.397271 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12478 13:55:02.397357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12479 13:55:02.397656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12480 13:55:02.397773 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12481 13:55:02.397896 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12482 13:55:02.398011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12483 13:55:02.402197 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12484 13:55:02.402556 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12485 13:55:02.402640 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12486 13:55:02.402737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12487 13:55:02.403008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12488 13:55:02.403105 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12489 13:55:02.403177 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12490 13:55:02.403289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12491 13:55:02.403557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12492 13:55:02.403683 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12493 13:55:02.403792 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12494 13:55:02.403899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12495 13:55:02.404202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12496 13:55:02.404312 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12497 13:55:02.404417 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12498 13:55:02.404723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12499 13:55:02.404851 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12500 13:55:02.404959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12501 13:55:02.405066 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12502 13:55:02.405366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12503 13:55:02.405471 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12504 13:55:02.405575 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12505 13:55:02.405684 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12506 13:55:02.405979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12507 13:55:02.406078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12508 13:55:02.414181 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12509 13:55:02.414638 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12510 13:55:02.414749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12511 13:55:02.414834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12512 13:55:02.414931 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12513 13:55:02.415014 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12514 13:55:02.415109 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12515 13:55:02.415208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12516 13:55:02.415292 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12517 13:55:02.415385 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12518 13:55:02.415691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12519 13:55:02.415809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12520 13:55:02.415908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12521 13:55:02.416008 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12522 13:55:02.416104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12523 13:55:02.416409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12524 13:55:02.416514 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12525 13:55:02.416615 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12526 13:55:02.416714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12527 13:55:02.416819 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12528 13:55:02.417117 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12529 13:55:02.417223 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12530 13:55:02.417326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12531 13:55:02.417428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12532 13:55:02.417535 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12533 13:55:02.417643 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12534 13:55:02.417761 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12535 13:55:02.417922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12536 13:55:02.422240 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12537 13:55:02.422662 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12538 13:55:02.422768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12539 13:55:02.422864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12540 13:55:02.422971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12541 13:55:02.423059 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12542 13:55:02.423150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12543 13:55:02.423276 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12544 13:55:02.423376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12545 13:55:02.423505 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12546 13:55:02.423637 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12547 13:55:02.423737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12548 13:55:02.423867 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12549 13:55:02.424003 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12550 13:55:02.424112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12551 13:55:02.424235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12552 13:55:02.424355 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12553 13:55:02.424480 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12554 13:55:02.424593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12555 13:55:02.424715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12556 13:55:02.425042 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12557 13:55:02.425144 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12558 13:55:02.425230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12559 13:55:02.425327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12560 13:55:02.425413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12561 13:55:02.425516 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12562 13:55:02.425622 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12563 13:55:02.425973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12564 13:55:02.426099 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12565 13:55:02.430201 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12566 13:55:02.430607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12567 13:55:02.430762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12568 13:55:02.430940 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12569 13:55:02.431056 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12570 13:55:02.431147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12571 13:55:02.431233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12572 13:55:02.431339 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12573 13:55:02.443373 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12574 13:55:02.443842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12575 13:55:02.443956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12576 13:55:02.444046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12577 13:55:02.444130 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12578 13:55:02.444229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12579 13:55:02.444312 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12580 13:55:02.444410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12581 13:55:02.444497 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12582 13:55:02.444597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12583 13:55:02.449723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12584 13:55:02.449935 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12585 13:55:02.450026 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12586 13:55:02.450112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12587 13:55:02.450200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12588 13:55:02.450289 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12589 13:55:02.450376 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12590 13:55:02.450462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12591 13:55:02.450549 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12592 13:55:02.450635 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12593 13:55:02.450743 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12594 13:55:02.450827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12595 13:55:02.450911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12596 13:55:02.450994 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12597 13:55:02.451078 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12598 13:55:02.451178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12599 13:55:02.451266 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12600 13:55:02.451352 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12601 13:55:02.451452 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12602 13:55:02.451557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12603 13:55:02.451658 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12604 13:55:02.452034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12605 13:55:02.452198 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12606 13:55:02.452298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12607 13:55:02.452383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12608 13:55:02.452483 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12609 13:55:02.452570 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12610 13:55:02.452668 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12611 13:55:02.453022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12612 13:55:02.453127 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12613 13:55:02.453429 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12614 13:55:02.453568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12615 13:55:02.453714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12616 13:55:02.453883 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12617 13:55:02.454035 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12618 13:55:02.454155 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12619 13:55:02.454242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12620 13:55:02.458251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12621 13:55:02.458703 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12622 13:55:02.458810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12623 13:55:02.458895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12624 13:55:02.458991 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12625 13:55:02.459074 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12626 13:55:02.459158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12627 13:55:02.459257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12628 13:55:02.459342 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12629 13:55:02.459440 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12630 13:55:02.459557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12631 13:55:02.459658 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12632 13:55:02.459973 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12633 13:55:02.460116 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12634 13:55:02.460262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12635 13:55:02.460359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12636 13:55:02.460462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12637 13:55:02.460568 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12638 13:55:02.460894 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12639 13:55:02.460997 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12640 13:55:02.461346 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12641 13:55:02.461476 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12642 13:55:02.461631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12643 13:55:02.461774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12644 13:55:02.461872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12645 13:55:02.461975 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12646 13:55:02.462061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12647 13:55:02.462159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12648 13:55:02.466296 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12649 13:55:02.466566 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12650 13:55:02.466880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12651 13:55:02.466987 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12652 13:55:02.467074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12653 13:55:02.467180 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12654 13:55:02.467267 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12655 13:55:02.467364 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12656 13:55:02.467463 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12657 13:55:02.467759 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12658 13:55:02.467866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12659 13:55:02.467964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12660 13:55:02.468062 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12661 13:55:02.468158 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12662 13:55:02.468255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12663 13:55:02.468543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12664 13:55:02.468661 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12665 13:55:02.468764 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12666 13:55:02.469057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12667 13:55:02.469166 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12668 13:55:02.469277 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12669 13:55:02.469382 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12670 13:55:02.469690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12671 13:55:02.469808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12672 13:55:02.469915 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12673 13:55:02.474309 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12674 13:55:02.474773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12675 13:55:02.474874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12676 13:55:02.474958 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12677 13:55:02.475056 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12678 13:55:02.475141 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12679 13:55:02.475240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12680 13:55:02.475343 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12681 13:55:02.475446 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12682 13:55:02.475749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12683 13:55:02.476049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12684 13:55:02.476146 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12685 13:55:02.476242 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12686 13:55:02.476325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12687 13:55:02.476425 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12688 13:55:02.476718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12689 13:55:02.476826 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12690 13:55:02.476929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12691 13:55:02.477217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12692 13:55:02.477326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12693 13:55:02.477431 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12694 13:55:02.477548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12695 13:55:02.477900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12696 13:55:02.478019 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12697 13:55:02.482288 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12698 13:55:02.483189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12699 13:55:02.483298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12700 13:55:02.483386 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12701 13:55:02.483470 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12702 13:55:02.483553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12703 13:55:02.483635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12704 13:55:02.483738 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12705 13:55:02.483823 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12706 13:55:02.483910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12707 13:55:02.496587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12708 13:55:02.497057 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12709 13:55:02.497162 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12710 13:55:02.497258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12711 13:55:02.497371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12712 13:55:02.497468 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12713 13:55:02.497579 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12714 13:55:02.497701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12715 13:55:02.497813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12716 13:55:02.497924 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12717 13:55:02.498046 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12718 13:55:02.498347 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12719 13:55:02.498475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12720 13:55:02.498570 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12721 13:55:02.498663 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12722 13:55:02.498949 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12723 13:55:02.499226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12724 13:55:02.499310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12725 13:55:02.499400 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12726 13:55:02.499493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12727 13:55:02.499873 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12728 13:55:02.499986 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12729 13:55:02.500095 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12730 13:55:02.500207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12731 13:55:02.500314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12732 13:55:02.500612 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12733 13:55:02.500711 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12734 13:55:02.500818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12735 13:55:02.500945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12736 13:55:02.501231 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12737 13:55:02.501344 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12738 13:55:02.501452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12739 13:55:02.501569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12740 13:55:02.501883 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12741 13:55:02.501996 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12742 13:55:02.506250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12743 13:55:02.506678 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12744 13:55:02.506772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12745 13:55:02.506847 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12746 13:55:02.506938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12747 13:55:02.507027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12748 13:55:02.507122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12749 13:55:02.507217 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12750 13:55:02.507498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12751 13:55:02.507609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12752 13:55:02.507899 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12753 13:55:02.507975 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12754 13:55:02.508226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12755 13:55:02.508304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12756 13:55:02.508568 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12757 13:55:02.508637 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12758 13:55:02.508885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12759 13:55:02.508960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12760 13:55:02.509037 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12761 13:55:02.509290 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12762 13:55:02.509371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12763 13:55:02.509624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12764 13:55:02.509718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12765 13:55:02.509795 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12766 13:55:02.509877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12767 13:55:02.514232 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12768 13:55:02.514644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12769 13:55:02.514767 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12770 13:55:02.514864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12771 13:55:02.514977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12772 13:55:02.515065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12773 13:55:02.515145 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12774 13:55:02.515242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12775 13:55:02.515324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12776 13:55:02.515418 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12777 13:55:02.515527 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12778 13:55:02.515653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12779 13:55:02.516089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12780 13:55:02.516213 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12781 13:55:02.516318 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12782 13:55:02.516437 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12783 13:55:02.516555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12784 13:55:02.516676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12785 13:55:02.516777 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12786 13:55:02.516889 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12787 13:55:02.516981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12788 13:55:02.517064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12789 13:55:02.517199 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12790 13:55:02.517325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12791 13:55:02.517427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12792 13:55:02.517545 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12793 13:55:02.517682 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12794 13:55:02.517813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12795 13:55:02.517918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12796 13:55:02.518032 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12797 13:55:02.518119 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12798 13:55:02.522256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12799 13:55:02.522675 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12800 13:55:02.522780 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12801 13:55:02.522864 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12802 13:55:02.523025 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12803 13:55:02.523488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12804 13:55:02.523738 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12805 13:55:02.523941 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12806 13:55:02.524184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12807 13:55:02.524484 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12808 13:55:02.524703 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12809 13:55:02.524937 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12810 13:55:02.525138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12811 13:55:02.525325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12812 13:55:02.525500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12813 13:55:02.525700 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12814 13:55:02.526000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12815 13:55:02.526224 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12816 13:55:02.526377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12817 13:55:02.526522 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12818 13:55:02.526664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12819 13:55:02.526805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12820 13:55:02.526947 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12821 13:55:02.527089 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12822 13:55:02.527231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12823 13:55:02.527374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12824 13:55:02.527516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12825 13:55:02.527658 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12826 13:55:02.527800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12827 13:55:02.527944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12828 13:55:02.528086 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12829 13:55:02.528268 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12830 13:55:02.530248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12831 13:55:02.530696 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12832 13:55:02.530800 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12833 13:55:02.530900 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12834 13:55:02.531001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12835 13:55:02.531106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12836 13:55:02.531192 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12837 13:55:02.531277 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12838 13:55:02.531377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12839 13:55:02.531475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12840 13:55:02.531562 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12841 13:55:02.552662 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12842 13:55:02.552969 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12843 13:55:02.553289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12844 13:55:02.553388 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12845 13:55:02.553476 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12846 13:55:02.553566 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12847 13:55:02.553669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12848 13:55:02.553758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12849 13:55:02.553845 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12850 13:55:02.553955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12851 13:55:02.554046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12852 13:55:02.554133 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12853 13:55:02.554220 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12854 13:55:02.554306 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12855 13:55:02.554399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12856 13:55:02.554503 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12857 13:55:02.554594 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12858 13:55:02.554680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12859 13:55:02.554781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12860 13:55:02.554868 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12861 13:55:02.554966 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12862 13:55:02.555296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12863 13:55:02.555498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12864 13:55:02.555674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12865 13:55:02.555924 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12866 13:55:02.556159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12867 13:55:02.556349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12868 13:55:02.556530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12869 13:55:02.556681 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12870 13:55:02.556877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12871 13:55:02.557049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12872 13:55:02.557210 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12873 13:55:02.557375 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12874 13:55:02.557526 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12875 13:55:02.557679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12876 13:55:02.557954 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12877 13:55:02.558261 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12878 13:55:02.558406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12879 13:55:02.558551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12880 13:55:02.558694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12881 13:55:02.558836 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12882 13:55:02.558977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12883 13:55:02.559125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12884 13:55:02.559270 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12885 13:55:02.559414 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12886 13:55:02.562307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12887 13:55:02.562832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12888 13:55:02.563041 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12889 13:55:02.563179 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12890 13:55:02.563307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12891 13:55:02.563432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12892 13:55:02.563583 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12893 13:55:02.563713 arm64_sve-ptrace pass
12894 13:55:02.563840 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12895 13:55:02.563965 arm64_sve-probe-vls_All_vector_lengths_valid pass
12896 13:55:02.564090 arm64_sve-probe-vls pass
12897 13:55:02.564213 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12898 13:55:02.564361 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12899 13:55:02.564489 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12900 13:55:02.564615 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12901 13:55:02.564741 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12902 13:55:02.564863 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12903 13:55:02.564989 arm64_vec-syscfg_SVE_vector_length_used_default pass
12904 13:55:02.565145 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12905 13:55:02.565271 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12906 13:55:02.565391 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12907 13:55:02.565513 arm64_vec-syscfg_SME_default_vector_length_32 pass
12908 13:55:02.565636 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12909 13:55:02.565778 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12910 13:55:02.566415 arm64_vec-syscfg_SME_current_VL_is_32 pass
12911 13:55:02.566518 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12912 13:55:02.566608 arm64_vec-syscfg_SME_prctl_set_min_max pass
12913 13:55:02.566697 arm64_vec-syscfg_SME_vector_length_used_default pass
12914 13:55:02.566783 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12915 13:55:02.566868 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12916 13:55:02.566954 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12917 13:55:02.567042 arm64_vec-syscfg pass
12918 13:55:02.567129 arm64_za-fork_fork_test pass
12919 13:55:02.570227 arm64_za-fork pass
12920 13:55:02.570626 arm64_za-ptrace_Set_VL_16 pass
12921 13:55:02.570734 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12922 13:55:02.570825 arm64_za-ptrace_Data_match_for_VL_16 pass
12923 13:55:02.570910 arm64_za-ptrace_Set_VL_32 pass
12924 13:55:02.571013 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12925 13:55:02.571102 arm64_za-ptrace_Data_match_for_VL_32 pass
12926 13:55:02.571179 arm64_za-ptrace_Set_VL_48 pass
12927 13:55:02.571258 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12928 13:55:02.571336 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12929 13:55:02.571436 arm64_za-ptrace_Set_VL_64 pass
12930 13:55:02.571505 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12931 13:55:02.571598 arm64_za-ptrace_Data_match_for_VL_64 pass
12932 13:55:02.571687 arm64_za-ptrace_Set_VL_80 pass
12933 13:55:02.571788 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12934 13:55:02.571873 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12935 13:55:02.571954 arm64_za-ptrace_Set_VL_96 pass
12936 13:55:02.572032 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12937 13:55:02.572130 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
12938 13:55:02.572216 arm64_za-ptrace_Set_VL_112 pass
12939 13:55:02.572298 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
12940 13:55:02.572377 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
12941 13:55:02.572473 arm64_za-ptrace_Set_VL_128 pass
12942 13:55:02.572557 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
12943 13:55:02.572636 arm64_za-ptrace_Data_match_for_VL_128 pass
12944 13:55:02.572718 arm64_za-ptrace_Set_VL_144 pass
12945 13:55:02.572817 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
12946 13:55:02.572904 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
12947 13:55:02.573006 arm64_za-ptrace_Set_VL_160 pass
12948 13:55:02.573095 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
12949 13:55:02.573700 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
12950 13:55:02.573796 arm64_za-ptrace_Set_VL_176 pass
12951 13:55:02.573894 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
12952 13:55:02.573992 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
12953 13:55:02.574085 arm64_za-ptrace_Set_VL_192 pass
12954 13:55:02.574209 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
12955 13:55:02.574301 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
12956 13:55:02.574382 arm64_za-ptrace_Set_VL_208 pass
12957 13:55:02.574462 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
12958 13:55:02.574541 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
12959 13:55:02.574624 arm64_za-ptrace_Set_VL_224 pass
12960 13:55:02.574706 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
12961 13:55:02.578341 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
12962 13:55:02.578666 arm64_za-ptrace_Set_VL_240 pass
12963 13:55:02.579092 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
12964 13:55:02.579256 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
12965 13:55:02.579409 arm64_za-ptrace_Set_VL_256 pass
12966 13:55:02.579554 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
12967 13:55:02.579698 arm64_za-ptrace_Data_match_for_VL_256 pass
12968 13:55:02.579841 arm64_za-ptrace_Set_VL_272 pass
12969 13:55:02.579983 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
12970 13:55:02.580164 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
12971 13:55:02.580302 arm64_za-ptrace_Set_VL_288 pass
12972 13:55:02.580446 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
12973 13:55:02.580589 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
12974 13:55:02.580734 arm64_za-ptrace_Set_VL_304 pass
12975 13:55:02.580877 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
12976 13:55:02.581019 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
12977 13:55:02.581160 arm64_za-ptrace_Set_VL_320 pass
12978 13:55:02.581345 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
12979 13:55:02.581481 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
12980 13:55:02.581625 arm64_za-ptrace_Set_VL_336 pass
12981 13:55:02.581783 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
12982 13:55:02.581927 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
12983 13:55:02.582070 arm64_za-ptrace_Set_VL_352 pass
12984 13:55:02.582212 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
12985 13:55:02.582354 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
12986 13:55:02.582504 arm64_za-ptrace_Set_VL_368 pass
12987 13:55:02.582646 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
12988 13:55:02.582790 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
12989 13:55:02.582976 arm64_za-ptrace_Set_VL_384 pass
12990 13:55:02.583111 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
12991 13:55:02.583253 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
12992 13:55:02.583396 arm64_za-ptrace_Set_VL_400 pass
12993 13:55:02.583538 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
12994 13:55:02.583680 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
12995 13:55:02.586223 arm64_za-ptrace_Set_VL_416 pass
12996 13:55:02.586712 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
12997 13:55:02.586868 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
12998 13:55:02.587018 arm64_za-ptrace_Set_VL_432 pass
12999 13:55:02.587162 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
13000 13:55:02.587339 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
13001 13:55:02.587477 arm64_za-ptrace_Set_VL_448 pass
13002 13:55:02.587621 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
13003 13:55:02.587766 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
13004 13:55:02.587910 arm64_za-ptrace_Set_VL_464 pass
13005 13:55:02.588052 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
13006 13:55:02.588232 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
13007 13:55:02.588370 arm64_za-ptrace_Set_VL_480 pass
13008 13:55:02.588514 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
13009 13:55:02.588655 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
13010 13:55:02.588798 arm64_za-ptrace_Set_VL_496 pass
13011 13:55:02.588942 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
13012 13:55:02.611637 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
13013 13:55:02.611950 arm64_za-ptrace_Set_VL_512 pass
13014 13:55:02.612391 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
13015 13:55:02.612592 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
13016 13:55:02.612760 arm64_za-ptrace_Set_VL_528 pass
13017 13:55:02.612920 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
13018 13:55:02.613061 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
13019 13:55:02.613219 arm64_za-ptrace_Set_VL_544 pass
13020 13:55:02.613414 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
13021 13:55:02.613554 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
13022 13:55:02.613706 arm64_za-ptrace_Set_VL_560 pass
13023 13:55:02.613833 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
13024 13:55:02.614045 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
13025 13:55:02.614238 arm64_za-ptrace_Set_VL_576 pass
13026 13:55:02.614485 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
13027 13:55:02.614693 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
13028 13:55:02.614889 arm64_za-ptrace_Set_VL_592 pass
13029 13:55:02.615145 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
13030 13:55:02.615352 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
13031 13:55:02.615536 arm64_za-ptrace_Set_VL_608 pass
13032 13:55:02.615767 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
13033 13:55:02.615977 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
13034 13:55:02.616168 arm64_za-ptrace_Set_VL_624 pass
13035 13:55:02.616381 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
13036 13:55:02.616570 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
13037 13:55:02.616749 arm64_za-ptrace_Set_VL_640 pass
13038 13:55:02.616922 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
13039 13:55:02.617083 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
13040 13:55:02.617255 arm64_za-ptrace_Set_VL_656 pass
13041 13:55:02.617428 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
13042 13:55:02.617601 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
13043 13:55:02.617785 arm64_za-ptrace_Set_VL_672 pass
13044 13:55:02.618032 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
13045 13:55:02.618253 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
13046 13:55:02.618445 arm64_za-ptrace_Set_VL_688 pass
13047 13:55:02.618580 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
13048 13:55:02.618697 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
13049 13:55:02.618816 arm64_za-ptrace_Set_VL_704 pass
13050 13:55:02.618933 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
13051 13:55:02.619050 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
13052 13:55:02.619169 arm64_za-ptrace_Set_VL_720 pass
13053 13:55:02.619286 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
13054 13:55:02.619401 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
13055 13:55:02.619516 arm64_za-ptrace_Set_VL_736 pass
13056 13:55:02.619630 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
13057 13:55:02.619745 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
13058 13:55:02.619860 arm64_za-ptrace_Set_VL_752 pass
13059 13:55:02.620207 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
13060 13:55:02.620337 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
13061 13:55:02.620455 arm64_za-ptrace_Set_VL_768 pass
13062 13:55:02.620572 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
13063 13:55:02.620689 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
13064 13:55:02.620804 arm64_za-ptrace_Set_VL_784 pass
13065 13:55:02.620920 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
13066 13:55:02.621035 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
13067 13:55:02.621149 arm64_za-ptrace_Set_VL_800 pass
13068 13:55:02.621265 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
13069 13:55:02.621381 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
13070 13:55:02.621498 arm64_za-ptrace_Set_VL_816 pass
13071 13:55:02.621613 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
13072 13:55:02.621751 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
13073 13:55:02.621869 arm64_za-ptrace_Set_VL_832 pass
13074 13:55:02.622038 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
13075 13:55:02.622172 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
13076 13:55:02.622289 arm64_za-ptrace_Set_VL_848 pass
13077 13:55:02.622407 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13078 13:55:02.622523 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13079 13:55:02.626274 arm64_za-ptrace_Set_VL_864 pass
13080 13:55:02.626557 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13081 13:55:02.626963 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13082 13:55:02.627074 arm64_za-ptrace_Set_VL_880 pass
13083 13:55:02.627167 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13084 13:55:02.627255 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13085 13:55:02.627341 arm64_za-ptrace_Set_VL_896 pass
13086 13:55:02.627428 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13087 13:55:02.627513 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13088 13:55:02.627600 arm64_za-ptrace_Set_VL_912 pass
13089 13:55:02.627685 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13090 13:55:02.627974 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13091 13:55:02.628080 arm64_za-ptrace_Set_VL_928 pass
13092 13:55:02.628171 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13093 13:55:02.628256 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13094 13:55:02.628341 arm64_za-ptrace_Set_VL_944 pass
13095 13:55:02.628423 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13096 13:55:02.628507 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13097 13:55:02.628591 arm64_za-ptrace_Set_VL_960 pass
13098 13:55:02.628694 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13099 13:55:02.628780 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13100 13:55:02.628865 arm64_za-ptrace_Set_VL_976 pass
13101 13:55:02.628948 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13102 13:55:02.629031 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13103 13:55:02.629116 arm64_za-ptrace_Set_VL_992 pass
13104 13:55:02.629216 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13105 13:55:02.629308 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13106 13:55:02.629392 arm64_za-ptrace_Set_VL_1008 pass
13107 13:55:02.629477 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13108 13:55:02.629579 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13109 13:55:02.629676 arm64_za-ptrace_Set_VL_1024 pass
13110 13:55:02.629761 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13111 13:55:02.629861 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13112 13:55:02.629944 arm64_za-ptrace_Set_VL_1040 pass
13113 13:55:02.630040 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13114 13:55:02.634236 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13115 13:55:02.634673 arm64_za-ptrace_Set_VL_1056 pass
13116 13:55:02.634839 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13117 13:55:02.635013 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13118 13:55:02.635199 arm64_za-ptrace_Set_VL_1072 pass
13119 13:55:02.635340 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13120 13:55:02.635736 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13121 13:55:02.635936 arm64_za-ptrace_Set_VL_1088 pass
13122 13:55:02.636108 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13123 13:55:02.636274 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13124 13:55:02.636426 arm64_za-ptrace_Set_VL_1104 pass
13125 13:55:02.636592 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13126 13:55:02.636758 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13127 13:55:02.636923 arm64_za-ptrace_Set_VL_1120 pass
13128 13:55:02.637082 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13129 13:55:02.637295 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13130 13:55:02.637468 arm64_za-ptrace_Set_VL_1136 pass
13131 13:55:02.637631 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13132 13:55:02.637841 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13133 13:55:02.638009 arm64_za-ptrace_Set_VL_1152 pass
13134 13:55:02.638153 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13135 13:55:02.638275 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13136 13:55:02.638391 arm64_za-ptrace_Set_VL_1168 pass
13137 13:55:02.638506 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13138 13:55:02.638621 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13139 13:55:02.638737 arm64_za-ptrace_Set_VL_1184 pass
13140 13:55:02.638849 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13141 13:55:02.638965 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13142 13:55:02.639079 arm64_za-ptrace_Set_VL_1200 pass
13143 13:55:02.639193 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13144 13:55:02.639309 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13145 13:55:02.639424 arm64_za-ptrace_Set_VL_1216 pass
13146 13:55:02.639539 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13147 13:55:02.639652 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13148 13:55:02.639766 arm64_za-ptrace_Set_VL_1232 pass
13149 13:55:02.639881 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13150 13:55:02.639995 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13151 13:55:02.640110 arm64_za-ptrace_Set_VL_1248 pass
13152 13:55:02.640227 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13153 13:55:02.640342 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13154 13:55:02.640483 arm64_za-ptrace_Set_VL_1264 pass
13155 13:55:02.640605 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13156 13:55:02.640721 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13157 13:55:02.642312 arm64_za-ptrace_Set_VL_1280 pass
13158 13:55:02.642526 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13159 13:55:02.642953 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13160 13:55:02.643153 arm64_za-ptrace_Set_VL_1296 pass
13161 13:55:02.643317 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13162 13:55:02.643483 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13163 13:55:02.643644 arm64_za-ptrace_Set_VL_1312 pass
13164 13:55:02.643808 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13165 13:55:02.643973 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13166 13:55:02.644175 arm64_za-ptrace_Set_VL_1328 pass
13167 13:55:02.644342 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13168 13:55:02.644506 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13169 13:55:02.644659 arm64_za-ptrace_Set_VL_1344 pass
13170 13:55:02.644822 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13171 13:55:02.645434 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13172 13:55:02.645636 arm64_za-ptrace_Set_VL_1360 pass
13173 13:55:02.645954 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13174 13:55:02.646152 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13175 13:55:02.646339 arm64_za-ptrace_Set_VL_1376 pass
13176 13:55:02.646469 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13177 13:55:02.646623 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13178 13:55:02.646747 arm64_za-ptrace_Set_VL_1392 pass
13179 13:55:02.646862 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13180 13:55:02.646976 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13181 13:55:02.647089 arm64_za-ptrace_Set_VL_1408 pass
13182 13:55:02.647203 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13183 13:55:02.647320 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13184 13:55:02.647434 arm64_za-ptrace_Set_VL_1424 pass
13185 13:55:02.647548 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13186 13:55:02.647662 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13187 13:55:02.647776 arm64_za-ptrace_Set_VL_1440 pass
13188 13:55:02.647889 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13189 13:55:02.648003 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13190 13:55:02.648116 arm64_za-ptrace_Set_VL_1456 pass
13191 13:55:02.648231 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13192 13:55:02.648343 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13193 13:55:02.648456 arm64_za-ptrace_Set_VL_1472 pass
13194 13:55:02.648570 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13195 13:55:02.650367 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13196 13:55:02.650558 arm64_za-ptrace_Set_VL_1488 pass
13197 13:55:02.650974 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13198 13:55:02.651153 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13199 13:55:02.651297 arm64_za-ptrace_Set_VL_1504 pass
13200 13:55:02.651424 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13201 13:55:02.651549 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13202 13:55:02.651681 arm64_za-ptrace_Set_VL_1520 pass
13203 13:55:02.651822 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13204 13:55:02.651945 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13205 13:55:02.652064 arm64_za-ptrace_Set_VL_1536 pass
13206 13:55:02.652180 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13207 13:55:02.671990 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13208 13:55:02.672197 arm64_za-ptrace_Set_VL_1552 pass
13209 13:55:02.672359 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13210 13:55:02.672759 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13211 13:55:02.672941 arm64_za-ptrace_Set_VL_1568 pass
13212 13:55:02.673152 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13213 13:55:02.673365 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13214 13:55:02.673542 arm64_za-ptrace_Set_VL_1584 pass
13215 13:55:02.673722 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13216 13:55:02.673890 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13217 13:55:02.674064 arm64_za-ptrace_Set_VL_1600 pass
13218 13:55:02.674198 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13219 13:55:02.674353 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13220 13:55:02.674512 arm64_za-ptrace_Set_VL_1616 pass
13221 13:55:02.674675 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13222 13:55:02.674836 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13223 13:55:02.675001 arm64_za-ptrace_Set_VL_1632 pass
13224 13:55:02.675162 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13225 13:55:02.675324 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13226 13:55:02.675491 arm64_za-ptrace_Set_VL_1648 pass
13227 13:55:02.675656 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13228 13:55:02.675855 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13229 13:55:02.676025 arm64_za-ptrace_Set_VL_1664 pass
13230 13:55:02.676186 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13231 13:55:02.676348 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13232 13:55:02.676513 arm64_za-ptrace_Set_VL_1680 pass
13233 13:55:02.676673 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13234 13:55:02.676827 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13235 13:55:02.676975 arm64_za-ptrace_Set_VL_1696 pass
13236 13:55:02.677118 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13237 13:55:02.677272 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13238 13:55:02.677425 arm64_za-ptrace_Set_VL_1712 pass
13239 13:55:02.677587 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13240 13:55:02.678354 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13241 13:55:02.678486 arm64_za-ptrace_Set_VL_1728 pass
13242 13:55:02.678602 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13243 13:55:02.678716 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13244 13:55:02.678828 arm64_za-ptrace_Set_VL_1744 pass
13245 13:55:02.678969 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13246 13:55:02.679088 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13247 13:55:02.679203 arm64_za-ptrace_Set_VL_1760 pass
13248 13:55:02.679316 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13249 13:55:02.679435 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13250 13:55:02.679550 arm64_za-ptrace_Set_VL_1776 pass
13251 13:55:02.679663 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13252 13:55:02.679777 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13253 13:55:02.679890 arm64_za-ptrace_Set_VL_1792 pass
13254 13:55:02.680004 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13255 13:55:02.680326 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13256 13:55:02.680451 arm64_za-ptrace_Set_VL_1808 pass
13257 13:55:02.680566 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13258 13:55:02.680681 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13259 13:55:02.680796 arm64_za-ptrace_Set_VL_1824 pass
13260 13:55:02.680909 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13261 13:55:02.681022 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13262 13:55:02.681135 arm64_za-ptrace_Set_VL_1840 pass
13263 13:55:02.681248 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13264 13:55:02.681362 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13265 13:55:02.681476 arm64_za-ptrace_Set_VL_1856 pass
13266 13:55:02.682477 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13267 13:55:02.682635 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13268 13:55:02.682828 arm64_za-ptrace_Set_VL_1872 pass
13269 13:55:02.683194 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13270 13:55:02.683386 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13271 13:55:02.683549 arm64_za-ptrace_Set_VL_1888 pass
13272 13:55:02.683709 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13273 13:55:02.683876 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13274 13:55:02.684043 arm64_za-ptrace_Set_VL_1904 pass
13275 13:55:02.684202 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13276 13:55:02.684403 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13277 13:55:02.684571 arm64_za-ptrace_Set_VL_1920 pass
13278 13:55:02.684730 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13279 13:55:02.684891 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13280 13:55:02.685047 arm64_za-ptrace_Set_VL_1936 pass
13281 13:55:02.685202 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13282 13:55:02.685360 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13283 13:55:02.685500 arm64_za-ptrace_Set_VL_1952 pass
13284 13:55:02.685689 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13285 13:55:02.685864 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13286 13:55:02.686030 arm64_za-ptrace_Set_VL_1968 pass
13287 13:55:02.686168 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13288 13:55:02.686371 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13289 13:55:02.686530 arm64_za-ptrace_Set_VL_1984 pass
13290 13:55:02.686653 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13291 13:55:02.686824 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13292 13:55:02.686952 arm64_za-ptrace_Set_VL_2000 pass
13293 13:55:02.687070 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13294 13:55:02.687186 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13295 13:55:02.687303 arm64_za-ptrace_Set_VL_2016 pass
13296 13:55:02.687419 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13297 13:55:02.687535 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13298 13:55:02.687651 arm64_za-ptrace_Set_VL_2032 pass
13299 13:55:02.687767 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13300 13:55:02.687882 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13301 13:55:02.687997 arm64_za-ptrace_Set_VL_2048 pass
13302 13:55:02.688112 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13303 13:55:02.688228 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13304 13:55:02.688345 arm64_za-ptrace_Set_VL_2064 pass
13305 13:55:02.690226 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13306 13:55:02.690665 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13307 13:55:02.690870 arm64_za-ptrace_Set_VL_2080 pass
13308 13:55:02.691064 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13309 13:55:02.691235 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13310 13:55:02.691430 arm64_za-ptrace_Set_VL_2096 pass
13311 13:55:02.691590 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13312 13:55:02.691755 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13313 13:55:02.691928 arm64_za-ptrace_Set_VL_2112 pass
13314 13:55:02.692092 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13315 13:55:02.692250 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13316 13:55:02.692402 arm64_za-ptrace_Set_VL_2128 pass
13317 13:55:02.692541 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13318 13:55:02.692735 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13319 13:55:02.692898 arm64_za-ptrace_Set_VL_2144 pass
13320 13:55:02.693026 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13321 13:55:02.693175 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13322 13:55:02.693333 arm64_za-ptrace_Set_VL_2160 pass
13323 13:55:02.693491 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13324 13:55:02.693632 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13325 13:55:02.694177 arm64_za-ptrace_Set_VL_2176 pass
13326 13:55:02.694312 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13327 13:55:02.694432 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13328 13:55:02.694549 arm64_za-ptrace_Set_VL_2192 pass
13329 13:55:02.694677 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13330 13:55:02.694841 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13331 13:55:02.694968 arm64_za-ptrace_Set_VL_2208 pass
13332 13:55:02.695086 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13333 13:55:02.695235 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13334 13:55:02.695363 arm64_za-ptrace_Set_VL_2224 pass
13335 13:55:02.695482 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13336 13:55:02.695599 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13337 13:55:02.695717 arm64_za-ptrace_Set_VL_2240 pass
13338 13:55:02.695835 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13339 13:55:02.695952 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13340 13:55:02.696070 arm64_za-ptrace_Set_VL_2256 pass
13341 13:55:02.696187 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13342 13:55:02.696303 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13343 13:55:02.696423 arm64_za-ptrace_Set_VL_2272 pass
13344 13:55:02.696539 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13345 13:55:02.696657 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13346 13:55:02.696774 arm64_za-ptrace_Set_VL_2288 pass
13347 13:55:02.698210 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13348 13:55:02.698521 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13349 13:55:02.698625 arm64_za-ptrace_Set_VL_2304 pass
13350 13:55:02.698712 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13351 13:55:02.698813 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13352 13:55:02.698904 arm64_za-ptrace_Set_VL_2320 pass
13353 13:55:02.698987 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13354 13:55:02.699087 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13355 13:55:02.699179 arm64_za-ptrace_Set_VL_2336 pass
13356 13:55:02.699278 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13357 13:55:02.699380 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13358 13:55:02.699480 arm64_za-ptrace_Set_VL_2352 pass
13359 13:55:02.699777 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13360 13:55:02.699879 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13361 13:55:02.699981 arm64_za-ptrace_Set_VL_2368 pass
13362 13:55:02.700071 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13363 13:55:02.700172 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13364 13:55:02.700271 arm64_za-ptrace_Set_VL_2384 pass
13365 13:55:02.700376 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13366 13:55:02.700583 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13367 13:55:02.700703 arm64_za-ptrace_Set_VL_2400 pass
13368 13:55:02.701061 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13369 13:55:02.701330 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13370 13:55:02.701510 arm64_za-ptrace_Set_VL_2416 pass
13371 13:55:02.701730 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13372 13:55:02.701939 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13373 13:55:02.702112 arm64_za-ptrace_Set_VL_2432 pass
13374 13:55:02.702258 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13375 13:55:02.702375 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13376 13:55:02.702483 arm64_za-ptrace_Set_VL_2448 pass
13377 13:55:02.702618 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13378 13:55:02.702748 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13379 13:55:02.702879 arm64_za-ptrace_Set_VL_2464 pass
13380 13:55:02.702990 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13381 13:55:02.706438 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13382 13:55:02.706633 arm64_za-ptrace_Set_VL_2480 pass
13383 13:55:02.706785 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13384 13:55:02.706942 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13385 13:55:02.707074 arm64_za-ptrace_Set_VL_2496 pass
13386 13:55:02.707201 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13387 13:55:02.707358 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13388 13:55:02.707518 arm64_za-ptrace_Set_VL_2512 pass
13389 13:55:02.707699 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13390 13:55:02.707843 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13391 13:55:02.708007 arm64_za-ptrace_Set_VL_2528 pass
13392 13:55:02.708142 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13393 13:55:02.708261 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13394 13:55:02.708387 arm64_za-ptrace_Set_VL_2544 pass
13395 13:55:02.708508 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13396 13:55:02.708652 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13397 13:55:02.708777 arm64_za-ptrace_Set_VL_2560 pass
13398 13:55:02.708898 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13399 13:55:02.709017 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13400 13:55:02.731036 arm64_za-ptrace_Set_VL_2576 pass
13401 13:55:02.731475 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13402 13:55:02.731685 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13403 13:55:02.731873 arm64_za-ptrace_Set_VL_2592 pass
13404 13:55:02.732043 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13405 13:55:02.732234 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13406 13:55:02.732390 arm64_za-ptrace_Set_VL_2608 pass
13407 13:55:02.732558 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13408 13:55:02.732724 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13409 13:55:02.732894 arm64_za-ptrace_Set_VL_2624 pass
13410 13:55:02.733061 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13411 13:55:02.733211 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13412 13:55:02.733373 arm64_za-ptrace_Set_VL_2640 pass
13413 13:55:02.733561 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13414 13:55:02.733737 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13415 13:55:02.733906 arm64_za-ptrace_Set_VL_2656 pass
13416 13:55:02.734040 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13417 13:55:02.734155 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13418 13:55:02.734269 arm64_za-ptrace_Set_VL_2672 pass
13419 13:55:02.734381 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13420 13:55:02.734491 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13421 13:55:02.734601 arm64_za-ptrace_Set_VL_2688 pass
13422 13:55:02.734719 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13423 13:55:02.734830 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13424 13:55:02.734940 arm64_za-ptrace_Set_VL_2704 pass
13425 13:55:02.735076 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13426 13:55:02.735193 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13427 13:55:02.735305 arm64_za-ptrace_Set_VL_2720 pass
13428 13:55:02.735418 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13429 13:55:02.738181 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13430 13:55:02.738673 arm64_za-ptrace_Set_VL_2736 pass
13431 13:55:02.738880 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13432 13:55:02.739102 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13433 13:55:02.739539 arm64_za-ptrace_Set_VL_2752 pass
13434 13:55:02.739745 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13435 13:55:02.739920 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13436 13:55:02.740130 arm64_za-ptrace_Set_VL_2768 pass
13437 13:55:02.740355 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13438 13:55:02.740568 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13439 13:55:02.740780 arm64_za-ptrace_Set_VL_2784 pass
13440 13:55:02.740969 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13441 13:55:02.741146 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13442 13:55:02.741316 arm64_za-ptrace_Set_VL_2800 pass
13443 13:55:02.741484 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13444 13:55:02.741642 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13445 13:55:02.741813 arm64_za-ptrace_Set_VL_2816 pass
13446 13:55:02.741971 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13447 13:55:02.742093 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13448 13:55:02.742208 arm64_za-ptrace_Set_VL_2832 pass
13449 13:55:02.742322 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13450 13:55:02.742436 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13451 13:55:02.742548 arm64_za-ptrace_Set_VL_2848 pass
13452 13:55:02.742659 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13453 13:55:02.742770 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13454 13:55:02.742881 arm64_za-ptrace_Set_VL_2864 pass
13455 13:55:02.742992 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13456 13:55:02.743104 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13457 13:55:02.743216 arm64_za-ptrace_Set_VL_2880 pass
13458 13:55:02.743355 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13459 13:55:02.743473 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13460 13:55:02.743585 arm64_za-ptrace_Set_VL_2896 pass
13461 13:55:02.743697 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13462 13:55:02.743808 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13463 13:55:02.743919 arm64_za-ptrace_Set_VL_2912 pass
13464 13:55:02.746185 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13465 13:55:02.746639 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13466 13:55:02.746836 arm64_za-ptrace_Set_VL_2928 pass
13467 13:55:02.747012 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13468 13:55:02.747193 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13469 13:55:02.747370 arm64_za-ptrace_Set_VL_2944 pass
13470 13:55:02.747565 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13471 13:55:02.747742 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13472 13:55:02.747905 arm64_za-ptrace_Set_VL_2960 pass
13473 13:55:02.748053 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13474 13:55:02.748197 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13475 13:55:02.748353 arm64_za-ptrace_Set_VL_2976 pass
13476 13:55:02.748510 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13477 13:55:02.748671 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13478 13:55:02.748832 arm64_za-ptrace_Set_VL_2992 pass
13479 13:55:02.749035 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13480 13:55:02.749204 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13481 13:55:02.749424 arm64_za-ptrace_Set_VL_3008 pass
13482 13:55:02.749631 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13483 13:55:02.749855 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13484 13:55:02.750051 arm64_za-ptrace_Set_VL_3024 pass
13485 13:55:02.750201 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13486 13:55:02.750346 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13487 13:55:02.750489 arm64_za-ptrace_Set_VL_3040 pass
13488 13:55:02.750631 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13489 13:55:02.750773 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13490 13:55:02.750914 arm64_za-ptrace_Set_VL_3056 pass
13491 13:55:02.751095 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13492 13:55:02.751231 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13493 13:55:02.751375 arm64_za-ptrace_Set_VL_3072 pass
13494 13:55:02.751520 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13495 13:55:02.751662 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13496 13:55:02.751804 arm64_za-ptrace_Set_VL_3088 pass
13497 13:55:02.751947 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13498 13:55:02.752089 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13499 13:55:02.754276 arm64_za-ptrace_Set_VL_3104 pass
13500 13:55:02.754804 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13501 13:55:02.754957 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13502 13:55:02.755093 arm64_za-ptrace_Set_VL_3120 pass
13503 13:55:02.755228 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13504 13:55:02.755366 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13505 13:55:02.755505 arm64_za-ptrace_Set_VL_3136 pass
13506 13:55:02.755652 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13507 13:55:02.755775 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13508 13:55:02.755903 arm64_za-ptrace_Set_VL_3152 pass
13509 13:55:02.756004 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13510 13:55:02.756146 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13511 13:55:02.756260 arm64_za-ptrace_Set_VL_3168 pass
13512 13:55:02.756381 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13513 13:55:02.756494 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13514 13:55:02.756570 arm64_za-ptrace_Set_VL_3184 pass
13515 13:55:02.756645 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13516 13:55:02.756729 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13517 13:55:02.756828 arm64_za-ptrace_Set_VL_3200 pass
13518 13:55:02.756899 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13519 13:55:02.756966 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13520 13:55:02.757042 arm64_za-ptrace_Set_VL_3216 pass
13521 13:55:02.757116 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13522 13:55:02.757186 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13523 13:55:02.757265 arm64_za-ptrace_Set_VL_3232 pass
13524 13:55:02.757343 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13525 13:55:02.757410 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13526 13:55:02.757484 arm64_za-ptrace_Set_VL_3248 pass
13527 13:55:02.757555 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13528 13:55:02.757627 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13529 13:55:02.757705 arm64_za-ptrace_Set_VL_3264 pass
13530 13:55:02.757816 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13531 13:55:02.757918 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13532 13:55:02.758014 arm64_za-ptrace_Set_VL_3280 pass
13533 13:55:02.758090 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13534 13:55:02.758153 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13535 13:55:02.758213 arm64_za-ptrace_Set_VL_3296 pass
13536 13:55:02.758271 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13537 13:55:02.758330 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13538 13:55:02.758391 arm64_za-ptrace_Set_VL_3312 pass
13539 13:55:02.758465 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13540 13:55:02.758529 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13541 13:55:02.762170 arm64_za-ptrace_Set_VL_3328 pass
13542 13:55:02.762607 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13543 13:55:02.762783 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13544 13:55:02.762941 arm64_za-ptrace_Set_VL_3344 pass
13545 13:55:02.763071 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13546 13:55:02.763222 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13547 13:55:02.763350 arm64_za-ptrace_Set_VL_3360 pass
13548 13:55:02.763477 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13549 13:55:02.763603 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13550 13:55:02.763735 arm64_za-ptrace_Set_VL_3376 pass
13551 13:55:02.763933 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13552 13:55:02.764104 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13553 13:55:02.764271 arm64_za-ptrace_Set_VL_3392 pass
13554 13:55:02.764434 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13555 13:55:02.764621 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13556 13:55:02.764800 arm64_za-ptrace_Set_VL_3408 pass
13557 13:55:02.764975 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13558 13:55:02.765198 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13559 13:55:02.765353 arm64_za-ptrace_Set_VL_3424 pass
13560 13:55:02.765473 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13561 13:55:02.765595 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13562 13:55:02.765786 arm64_za-ptrace_Set_VL_3440 pass
13563 13:55:02.765983 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13564 13:55:02.766170 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13565 13:55:02.766313 arm64_za-ptrace_Set_VL_3456 pass
13566 13:55:02.766460 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13567 13:55:02.766601 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13568 13:55:02.766743 arm64_za-ptrace_Set_VL_3472 pass
13569 13:55:02.766926 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13570 13:55:02.767062 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13571 13:55:02.767204 arm64_za-ptrace_Set_VL_3488 pass
13572 13:55:02.767345 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13573 13:55:02.767486 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13574 13:55:02.767628 arm64_za-ptrace_Set_VL_3504 pass
13575 13:55:02.767767 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13576 13:55:02.770319 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13577 13:55:02.770569 arm64_za-ptrace_Set_VL_3520 pass
13578 13:55:02.770961 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13579 13:55:02.771130 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13580 13:55:02.771286 arm64_za-ptrace_Set_VL_3536 pass
13581 13:55:02.771444 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13582 13:55:02.771598 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13583 13:55:02.771752 arm64_za-ptrace_Set_VL_3552 pass
13584 13:55:02.771936 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13585 13:55:02.772094 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13586 13:55:02.772249 arm64_za-ptrace_Set_VL_3568 pass
13587 13:55:02.772401 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13588 13:55:02.772555 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13589 13:55:02.772709 arm64_za-ptrace_Set_VL_3584 pass
13590 13:55:02.772861 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13591 13:55:02.773013 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13592 13:55:02.790666 arm64_za-ptrace_Set_VL_3600 pass
13593 13:55:02.791202 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13594 13:55:02.791383 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13595 13:55:02.791518 arm64_za-ptrace_Set_VL_3616 pass
13596 13:55:02.791643 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13597 13:55:02.791794 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13598 13:55:02.791928 arm64_za-ptrace_Set_VL_3632 pass
13599 13:55:02.792050 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13600 13:55:02.792166 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13601 13:55:02.792279 arm64_za-ptrace_Set_VL_3648 pass
13602 13:55:02.792416 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13603 13:55:02.792537 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13604 13:55:02.794026 arm64_za-ptrace_Set_VL_3664 pass
13605 13:55:02.794160 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13606 13:55:02.794259 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13607 13:55:02.794347 arm64_za-ptrace_Set_VL_3680 pass
13608 13:55:02.794435 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13609 13:55:02.794523 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13610 13:55:02.794609 arm64_za-ptrace_Set_VL_3696 pass
13611 13:55:02.794694 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13612 13:55:02.794779 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13613 13:55:02.794864 arm64_za-ptrace_Set_VL_3712 pass
13614 13:55:02.794952 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13615 13:55:02.795038 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13616 13:55:02.795124 arm64_za-ptrace_Set_VL_3728 pass
13617 13:55:02.795209 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13618 13:55:02.795294 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13619 13:55:02.795381 arm64_za-ptrace_Set_VL_3744 pass
13620 13:55:02.795470 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13621 13:55:02.795557 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13622 13:55:02.795642 arm64_za-ptrace_Set_VL_3760 pass
13623 13:55:02.795728 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13624 13:55:02.795814 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13625 13:55:02.798365 arm64_za-ptrace_Set_VL_3776 pass
13626 13:55:02.798464 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13627 13:55:02.798719 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13628 13:55:02.798789 arm64_za-ptrace_Set_VL_3792 pass
13629 13:55:02.798852 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13630 13:55:02.798926 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13631 13:55:02.798989 arm64_za-ptrace_Set_VL_3808 pass
13632 13:55:02.799063 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13633 13:55:02.799309 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13634 13:55:02.799380 arm64_za-ptrace_Set_VL_3824 pass
13635 13:55:02.799442 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13636 13:55:02.799519 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13637 13:55:02.799595 arm64_za-ptrace_Set_VL_3840 pass
13638 13:55:02.799672 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13639 13:55:02.799924 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13640 13:55:02.799993 arm64_za-ptrace_Set_VL_3856 pass
13641 13:55:02.800067 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13642 13:55:02.800319 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13643 13:55:02.800387 arm64_za-ptrace_Set_VL_3872 pass
13644 13:55:02.800459 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13645 13:55:02.800535 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13646 13:55:02.800610 arm64_za-ptrace_Set_VL_3888 pass
13647 13:55:02.800860 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13648 13:55:02.800928 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13649 13:55:02.801001 arm64_za-ptrace_Set_VL_3904 pass
13650 13:55:02.801245 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13651 13:55:02.801315 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13652 13:55:02.801381 arm64_za-ptrace_Set_VL_3920 pass
13653 13:55:02.801454 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13654 13:55:02.801745 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13655 13:55:02.801960 arm64_za-ptrace_Set_VL_3936 pass
13656 13:55:02.802158 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13657 13:55:02.802326 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13658 13:55:02.802488 arm64_za-ptrace_Set_VL_3952 pass
13659 13:55:02.806182 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13660 13:55:02.806641 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13661 13:55:02.806844 arm64_za-ptrace_Set_VL_3968 pass
13662 13:55:02.807010 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13663 13:55:02.807163 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13664 13:55:02.807311 arm64_za-ptrace_Set_VL_3984 pass
13665 13:55:02.807498 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13666 13:55:02.807670 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13667 13:55:02.807820 arm64_za-ptrace_Set_VL_4000 pass
13668 13:55:02.807966 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13669 13:55:02.808119 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13670 13:55:02.808272 arm64_za-ptrace_Set_VL_4016 pass
13671 13:55:02.808428 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13672 13:55:02.808634 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13673 13:55:02.808818 arm64_za-ptrace_Set_VL_4032 pass
13674 13:55:02.808977 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13675 13:55:02.809147 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13676 13:55:02.809322 arm64_za-ptrace_Set_VL_4048 pass
13677 13:55:02.809501 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13678 13:55:02.809690 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13679 13:55:02.809866 arm64_za-ptrace_Set_VL_4064 pass
13680 13:55:02.810030 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13681 13:55:02.810203 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13682 13:55:02.810378 arm64_za-ptrace_Set_VL_4080 pass
13683 13:55:02.810593 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13684 13:55:02.810773 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13685 13:55:02.810942 arm64_za-ptrace_Set_VL_4096 pass
13686 13:55:02.811115 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13687 13:55:02.811288 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13688 13:55:02.811465 arm64_za-ptrace_Set_VL_4112 pass
13689 13:55:02.811637 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13690 13:55:02.811805 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13691 13:55:02.811976 arm64_za-ptrace_Set_VL_4128 pass
13692 13:55:02.812148 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13693 13:55:02.812323 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13694 13:55:02.812498 arm64_za-ptrace_Set_VL_4144 pass
13695 13:55:02.814195 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13696 13:55:02.814651 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13697 13:55:02.814841 arm64_za-ptrace_Set_VL_4160 pass
13698 13:55:02.815027 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13699 13:55:02.815199 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13700 13:55:02.815400 arm64_za-ptrace_Set_VL_4176 pass
13701 13:55:02.815580 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13702 13:55:02.815755 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13703 13:55:02.815929 arm64_za-ptrace_Set_VL_4192 pass
13704 13:55:02.816102 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13705 13:55:02.816270 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13706 13:55:02.816444 arm64_za-ptrace_Set_VL_4208 pass
13707 13:55:02.816653 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13708 13:55:02.816831 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13709 13:55:02.817003 arm64_za-ptrace_Set_VL_4224 pass
13710 13:55:02.817160 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13711 13:55:02.817315 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13712 13:55:02.817470 arm64_za-ptrace_Set_VL_4240 pass
13713 13:55:02.817625 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13714 13:55:02.817787 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13715 13:55:02.817935 arm64_za-ptrace_Set_VL_4256 pass
13716 13:55:02.818108 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13717 13:55:02.818321 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13718 13:55:02.818483 arm64_za-ptrace_Set_VL_4272 pass
13719 13:55:02.818657 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13720 13:55:02.818830 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13721 13:55:02.818997 arm64_za-ptrace_Set_VL_4288 pass
13722 13:55:02.819148 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13723 13:55:02.819299 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13724 13:55:02.819451 arm64_za-ptrace_Set_VL_4304 pass
13725 13:55:02.819609 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13726 13:55:02.819759 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13727 13:55:02.819911 arm64_za-ptrace_Set_VL_4320 pass
13728 13:55:02.820063 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13729 13:55:02.820213 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13730 13:55:02.822236 arm64_za-ptrace_Set_VL_4336 pass
13731 13:55:02.822739 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13732 13:55:02.822943 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13733 13:55:02.823100 arm64_za-ptrace_Set_VL_4352 pass
13734 13:55:02.823249 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13735 13:55:02.823401 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13736 13:55:02.823581 arm64_za-ptrace_Set_VL_4368 pass
13737 13:55:02.823737 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13738 13:55:02.823887 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13739 13:55:02.824034 arm64_za-ptrace_Set_VL_4384 pass
13740 13:55:02.824180 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13741 13:55:02.824326 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13742 13:55:02.824471 arm64_za-ptrace_Set_VL_4400 pass
13743 13:55:02.824619 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13744 13:55:02.824806 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13745 13:55:02.824955 arm64_za-ptrace_Set_VL_4416 pass
13746 13:55:02.825101 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13747 13:55:02.825246 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13748 13:55:02.825392 arm64_za-ptrace_Set_VL_4432 pass
13749 13:55:02.825536 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13750 13:55:02.825742 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13751 13:55:02.825929 arm64_za-ptrace_Set_VL_4448 pass
13752 13:55:02.826079 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13753 13:55:02.826227 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13754 13:55:02.826378 arm64_za-ptrace_Set_VL_4464 pass
13755 13:55:02.826526 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13756 13:55:02.826708 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13757 13:55:02.826862 arm64_za-ptrace_Set_VL_4480 pass
13758 13:55:02.827010 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13759 13:55:02.827159 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13760 13:55:02.827309 arm64_za-ptrace_Set_VL_4496 pass
13761 13:55:02.827460 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13762 13:55:02.827615 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13763 13:55:02.827764 arm64_za-ptrace_Set_VL_4512 pass
13764 13:55:02.827915 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13765 13:55:02.828065 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13766 13:55:02.828217 arm64_za-ptrace_Set_VL_4528 pass
13767 13:55:02.828367 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13768 13:55:02.830223 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13769 13:55:02.830691 arm64_za-ptrace_Set_VL_4544 pass
13770 13:55:02.830887 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13771 13:55:02.831106 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13772 13:55:02.831322 arm64_za-ptrace_Set_VL_4560 pass
13773 13:55:02.831564 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13774 13:55:02.831771 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13775 13:55:02.831918 arm64_za-ptrace_Set_VL_4576 pass
13776 13:55:02.832087 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13777 13:55:02.832238 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13778 13:55:02.832393 arm64_za-ptrace_Set_VL_4592 pass
13779 13:55:02.832590 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13780 13:55:02.832746 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13781 13:55:02.832864 arm64_za-ptrace_Set_VL_4608 pass
13782 13:55:02.832988 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13783 13:55:02.833148 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13784 13:55:02.833271 arm64_za-ptrace_Set_VL_4624 pass
13785 13:55:02.851056 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13786 13:55:02.851522 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13787 13:55:02.851624 arm64_za-ptrace_Set_VL_4640 pass
13788 13:55:02.851712 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13789 13:55:02.851797 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13790 13:55:02.851880 arm64_za-ptrace_Set_VL_4656 pass
13791 13:55:02.851983 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13792 13:55:02.852068 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13793 13:55:02.852156 arm64_za-ptrace_Set_VL_4672 pass
13794 13:55:02.852241 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13795 13:55:02.852325 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13796 13:55:02.852408 arm64_za-ptrace_Set_VL_4688 pass
13797 13:55:02.852490 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13798 13:55:02.852591 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13799 13:55:02.852686 arm64_za-ptrace_Set_VL_4704 pass
13800 13:55:02.852767 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13801 13:55:02.852849 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13802 13:55:02.852932 arm64_za-ptrace_Set_VL_4720 pass
13803 13:55:02.853018 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13804 13:55:02.853101 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13805 13:55:02.853205 arm64_za-ptrace_Set_VL_4736 pass
13806 13:55:02.853291 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13807 13:55:02.853373 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13808 13:55:02.853454 arm64_za-ptrace_Set_VL_4752 pass
13809 13:55:02.853535 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13810 13:55:02.853622 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13811 13:55:02.853720 arm64_za-ptrace_Set_VL_4768 pass
13812 13:55:02.853823 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13813 13:55:02.853909 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13814 13:55:02.853994 arm64_za-ptrace_Set_VL_4784 pass
13815 13:55:02.854080 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13816 13:55:02.854162 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13817 13:55:02.854267 arm64_za-ptrace_Set_VL_4800 pass
13818 13:55:02.854359 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13819 13:55:02.854447 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13820 13:55:02.858319 arm64_za-ptrace_Set_VL_4816 pass
13821 13:55:02.858568 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13822 13:55:02.858915 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13823 13:55:02.859016 arm64_za-ptrace_Set_VL_4832 pass
13824 13:55:02.859100 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13825 13:55:02.859184 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13826 13:55:02.859287 arm64_za-ptrace_Set_VL_4848 pass
13827 13:55:02.859375 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13828 13:55:02.859457 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13829 13:55:02.859538 arm64_za-ptrace_Set_VL_4864 pass
13830 13:55:02.859622 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13831 13:55:02.859727 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13832 13:55:02.859815 arm64_za-ptrace_Set_VL_4880 pass
13833 13:55:02.859900 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13834 13:55:02.859984 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13835 13:55:02.860068 arm64_za-ptrace_Set_VL_4896 pass
13836 13:55:02.860169 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13837 13:55:02.860255 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13838 13:55:02.860341 arm64_za-ptrace_Set_VL_4912 pass
13839 13:55:02.860443 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13840 13:55:02.860529 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13841 13:55:02.860614 arm64_za-ptrace_Set_VL_4928 pass
13842 13:55:02.860698 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13843 13:55:02.860798 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13844 13:55:02.860886 arm64_za-ptrace_Set_VL_4944 pass
13845 13:55:02.860972 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13846 13:55:02.861074 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13847 13:55:02.861162 arm64_za-ptrace_Set_VL_4960 pass
13848 13:55:02.861288 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13849 13:55:02.861398 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13850 13:55:02.861483 arm64_za-ptrace_Set_VL_4976 pass
13851 13:55:02.861566 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13852 13:55:02.861674 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13853 13:55:02.861759 arm64_za-ptrace_Set_VL_4992 pass
13854 13:55:02.861839 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13855 13:55:02.861937 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13856 13:55:02.862022 arm64_za-ptrace_Set_VL_5008 pass
13857 13:55:02.862118 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13858 13:55:02.862203 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13859 13:55:02.862284 arm64_za-ptrace_Set_VL_5024 pass
13860 13:55:02.866284 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13861 13:55:02.866776 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13862 13:55:02.866877 arm64_za-ptrace_Set_VL_5040 pass
13863 13:55:02.866963 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13864 13:55:02.867047 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13865 13:55:02.867131 arm64_za-ptrace_Set_VL_5056 pass
13866 13:55:02.867216 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13867 13:55:02.867320 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13868 13:55:02.867408 arm64_za-ptrace_Set_VL_5072 pass
13869 13:55:02.867494 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13870 13:55:02.867580 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13871 13:55:02.867674 arm64_za-ptrace_Set_VL_5088 pass
13872 13:55:02.867761 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13873 13:55:02.867848 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13874 13:55:02.867951 arm64_za-ptrace_Set_VL_5104 pass
13875 13:55:02.868041 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13876 13:55:02.868129 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13877 13:55:02.868215 arm64_za-ptrace_Set_VL_5120 pass
13878 13:55:02.868301 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13879 13:55:02.868386 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13880 13:55:02.868487 arm64_za-ptrace_Set_VL_5136 pass
13881 13:55:02.868577 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13882 13:55:02.868670 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13883 13:55:02.868760 arm64_za-ptrace_Set_VL_5152 pass
13884 13:55:02.868848 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13885 13:55:02.868950 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13886 13:55:02.869035 arm64_za-ptrace_Set_VL_5168 pass
13887 13:55:02.869118 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13888 13:55:02.869207 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13889 13:55:02.869315 arm64_za-ptrace_Set_VL_5184 pass
13890 13:55:02.869401 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13891 13:55:02.869485 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13892 13:55:02.869569 arm64_za-ptrace_Set_VL_5200 pass
13893 13:55:02.869688 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13894 13:55:02.869779 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13895 13:55:02.869944 arm64_za-ptrace_Set_VL_5216 pass
13896 13:55:02.870054 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13897 13:55:02.870143 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13898 13:55:02.874292 arm64_za-ptrace_Set_VL_5232 pass
13899 13:55:02.874828 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13900 13:55:02.874932 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13901 13:55:02.875019 arm64_za-ptrace_Set_VL_5248 pass
13902 13:55:02.875104 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13903 13:55:02.875189 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13904 13:55:02.875274 arm64_za-ptrace_Set_VL_5264 pass
13905 13:55:02.875377 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13906 13:55:02.875463 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13907 13:55:02.875545 arm64_za-ptrace_Set_VL_5280 pass
13908 13:55:02.875626 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13909 13:55:02.875710 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13910 13:55:02.875811 arm64_za-ptrace_Set_VL_5296 pass
13911 13:55:02.875896 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13912 13:55:02.875980 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13913 13:55:02.876062 arm64_za-ptrace_Set_VL_5312 pass
13914 13:55:02.876143 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13915 13:55:02.876241 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13916 13:55:02.876326 arm64_za-ptrace_Set_VL_5328 pass
13917 13:55:02.876410 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13918 13:55:02.876502 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13919 13:55:02.876605 arm64_za-ptrace_Set_VL_5344 pass
13920 13:55:02.876694 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13921 13:55:02.876790 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13922 13:55:02.876873 arm64_za-ptrace_Set_VL_5360 pass
13923 13:55:02.876972 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13924 13:55:02.877059 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13925 13:55:02.877155 arm64_za-ptrace_Set_VL_5376 pass
13926 13:55:02.877240 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13927 13:55:02.877661 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13928 13:55:02.877753 arm64_za-ptrace_Set_VL_5392 pass
13929 13:55:02.877836 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13930 13:55:02.877921 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13931 13:55:02.878003 arm64_za-ptrace_Set_VL_5408 pass
13932 13:55:02.878100 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13933 13:55:02.878184 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13934 13:55:02.878268 arm64_za-ptrace_Set_VL_5424 pass
13935 13:55:02.878351 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13936 13:55:02.882313 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13937 13:55:02.882723 arm64_za-ptrace_Set_VL_5440 pass
13938 13:55:02.882825 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
13939 13:55:02.882908 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
13940 13:55:02.882994 arm64_za-ptrace_Set_VL_5456 pass
13941 13:55:02.883093 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
13942 13:55:02.883180 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
13943 13:55:02.883266 arm64_za-ptrace_Set_VL_5472 pass
13944 13:55:02.883352 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
13945 13:55:02.883456 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
13946 13:55:02.883545 arm64_za-ptrace_Set_VL_5488 pass
13947 13:55:02.883633 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
13948 13:55:02.883725 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
13949 13:55:02.883827 arm64_za-ptrace_Set_VL_5504 pass
13950 13:55:02.883916 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
13951 13:55:02.884003 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
13952 13:55:02.884104 arm64_za-ptrace_Set_VL_5520 pass
13953 13:55:02.884192 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
13954 13:55:02.884291 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
13955 13:55:02.884375 arm64_za-ptrace_Set_VL_5536 pass
13956 13:55:02.884472 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
13957 13:55:02.884553 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
13958 13:55:02.884654 arm64_za-ptrace_Set_VL_5552 pass
13959 13:55:02.884739 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
13960 13:55:02.884839 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
13961 13:55:02.885178 arm64_za-ptrace_Set_VL_5568 pass
13962 13:55:02.885393 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
13963 13:55:02.885578 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
13964 13:55:02.885769 arm64_za-ptrace_Set_VL_5584 pass
13965 13:55:02.885983 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
13966 13:55:02.886165 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
13967 13:55:02.886342 arm64_za-ptrace_Set_VL_5600 pass
13968 13:55:02.886509 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
13969 13:55:02.886672 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
13970 13:55:02.886836 arm64_za-ptrace_Set_VL_5616 pass
13971 13:55:02.887000 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
13972 13:55:02.890274 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
13973 13:55:02.890461 arm64_za-ptrace_Set_VL_5632 pass
13974 13:55:02.890765 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
13975 13:55:02.890877 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
13976 13:55:02.890973 arm64_za-ptrace_Set_VL_5648 pass
13977 13:55:02.908595 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
13978 13:55:02.908824 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
13979 13:55:02.908920 arm64_za-ptrace_Set_VL_5664 pass
13980 13:55:02.909220 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
13981 13:55:02.909324 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
13982 13:55:02.909411 arm64_za-ptrace_Set_VL_5680 pass
13983 13:55:02.909495 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
13984 13:55:02.909582 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
13985 13:55:02.909680 arm64_za-ptrace_Set_VL_5696 pass
13986 13:55:02.909771 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
13987 13:55:02.909877 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
13988 13:55:02.909962 arm64_za-ptrace_Set_VL_5712 pass
13989 13:55:02.910043 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
13990 13:55:02.910125 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
13991 13:55:02.910211 arm64_za-ptrace_Set_VL_5728 pass
13992 13:55:02.910317 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
13993 13:55:02.910406 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
13994 13:55:02.910493 arm64_za-ptrace_Set_VL_5744 pass
13995 13:55:02.910594 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
13996 13:55:02.910687 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
13997 13:55:02.910771 arm64_za-ptrace_Set_VL_5760 pass
13998 13:55:02.910868 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
13999 13:55:02.910952 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
14000 13:55:02.911051 arm64_za-ptrace_Set_VL_5776 pass
14001 13:55:02.911150 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
14002 13:55:02.911252 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
14003 13:55:02.911338 arm64_za-ptrace_Set_VL_5792 pass
14004 13:55:02.911438 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
14005 13:55:02.911736 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
14006 13:55:02.911831 arm64_za-ptrace_Set_VL_5808 pass
14007 13:55:02.911933 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
14008 13:55:02.912022 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
14009 13:55:02.912123 arm64_za-ptrace_Set_VL_5824 pass
14010 13:55:02.912208 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
14011 13:55:02.912306 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
14012 13:55:02.912407 arm64_za-ptrace_Set_VL_5840 pass
14013 13:55:02.912693 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
14014 13:55:02.912785 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
14015 13:55:02.912884 arm64_za-ptrace_Set_VL_5856 pass
14016 13:55:02.912986 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
14017 13:55:02.913277 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
14018 13:55:02.913375 arm64_za-ptrace_Set_VL_5872 pass
14019 13:55:02.913481 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
14020 13:55:02.913770 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
14021 13:55:02.913867 arm64_za-ptrace_Set_VL_5888 pass
14022 13:55:02.913972 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
14023 13:55:02.914066 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
14024 13:55:02.918808 arm64_za-ptrace_Set_VL_5904 pass
14025 13:55:02.919021 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
14026 13:55:02.919116 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
14027 13:55:02.919206 arm64_za-ptrace_Set_VL_5920 pass
14028 13:55:02.919293 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
14029 13:55:02.919378 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
14030 13:55:02.919660 arm64_za-ptrace_Set_VL_5936 pass
14031 13:55:02.919755 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
14032 13:55:02.919835 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
14033 13:55:02.919911 arm64_za-ptrace_Set_VL_5952 pass
14034 13:55:02.919985 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
14035 13:55:02.920060 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
14036 13:55:02.920134 arm64_za-ptrace_Set_VL_5968 pass
14037 13:55:02.920208 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
14038 13:55:02.920301 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
14039 13:55:02.920373 arm64_za-ptrace_Set_VL_5984 pass
14040 13:55:02.920447 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
14041 13:55:02.920522 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
14042 13:55:02.920613 arm64_za-ptrace_Set_VL_6000 pass
14043 13:55:02.920685 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
14044 13:55:02.920760 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
14045 13:55:02.920835 arm64_za-ptrace_Set_VL_6016 pass
14046 13:55:02.920926 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
14047 13:55:02.920997 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
14048 13:55:02.921087 arm64_za-ptrace_Set_VL_6032 pass
14049 13:55:02.921159 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
14050 13:55:02.921249 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
14051 13:55:02.921336 arm64_za-ptrace_Set_VL_6048 pass
14052 13:55:02.921422 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
14053 13:55:02.921510 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
14054 13:55:02.921768 arm64_za-ptrace_Set_VL_6064 pass
14055 13:55:02.921842 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
14056 13:55:02.921937 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
14057 13:55:02.922024 arm64_za-ptrace_Set_VL_6080 pass
14058 13:55:02.926281 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
14059 13:55:02.926692 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
14060 13:55:02.926798 arm64_za-ptrace_Set_VL_6096 pass
14061 13:55:02.926928 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
14062 13:55:02.927049 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
14063 13:55:02.927341 arm64_za-ptrace_Set_VL_6112 pass
14064 13:55:02.927445 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
14065 13:55:02.927535 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
14066 13:55:02.927655 arm64_za-ptrace_Set_VL_6128 pass
14067 13:55:02.927740 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
14068 13:55:02.927879 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
14069 13:55:02.927981 arm64_za-ptrace_Set_VL_6144 pass
14070 13:55:02.928068 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
14071 13:55:02.928151 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
14072 13:55:02.928251 arm64_za-ptrace_Set_VL_6160 pass
14073 13:55:02.928347 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
14074 13:55:02.928446 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
14075 13:55:02.928540 arm64_za-ptrace_Set_VL_6176 pass
14076 13:55:02.928647 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
14077 13:55:02.928756 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14078 13:55:02.928848 arm64_za-ptrace_Set_VL_6192 pass
14079 13:55:02.928962 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14080 13:55:02.929062 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14081 13:55:02.929158 arm64_za-ptrace_Set_VL_6208 pass
14082 13:55:02.929268 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14083 13:55:02.929352 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14084 13:55:02.929464 arm64_za-ptrace_Set_VL_6224 pass
14085 13:55:02.929553 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14086 13:55:02.929689 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14087 13:55:02.929796 arm64_za-ptrace_Set_VL_6240 pass
14088 13:55:02.929884 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14089 13:55:02.929963 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14090 13:55:02.930039 arm64_za-ptrace_Set_VL_6256 pass
14091 13:55:02.930118 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14092 13:55:02.930182 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14093 13:55:02.934207 arm64_za-ptrace_Set_VL_6272 pass
14094 13:55:02.934608 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14095 13:55:02.934706 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14096 13:55:02.934802 arm64_za-ptrace_Set_VL_6288 pass
14097 13:55:02.934891 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14098 13:55:02.934978 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14099 13:55:02.935050 arm64_za-ptrace_Set_VL_6304 pass
14100 13:55:02.935120 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14101 13:55:02.935208 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14102 13:55:02.935283 arm64_za-ptrace_Set_VL_6320 pass
14103 13:55:02.935355 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14104 13:55:02.935457 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14105 13:55:02.935548 arm64_za-ptrace_Set_VL_6336 pass
14106 13:55:02.935652 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14107 13:55:02.935770 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14108 13:55:02.935859 arm64_za-ptrace_Set_VL_6352 pass
14109 13:55:02.935977 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14110 13:55:02.936066 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14111 13:55:02.936156 arm64_za-ptrace_Set_VL_6368 pass
14112 13:55:02.936223 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14113 13:55:02.936293 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14114 13:55:02.936391 arm64_za-ptrace_Set_VL_6384 pass
14115 13:55:02.936462 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14116 13:55:02.936572 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14117 13:55:02.936665 arm64_za-ptrace_Set_VL_6400 pass
14118 13:55:02.936764 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14119 13:55:02.936881 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14120 13:55:02.936979 arm64_za-ptrace_Set_VL_6416 pass
14121 13:55:02.937078 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14122 13:55:02.937161 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14123 13:55:02.937255 arm64_za-ptrace_Set_VL_6432 pass
14124 13:55:02.937549 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14125 13:55:02.937659 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14126 13:55:02.937747 arm64_za-ptrace_Set_VL_6448 pass
14127 13:55:02.937849 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14128 13:55:02.937931 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14129 13:55:02.938017 arm64_za-ptrace_Set_VL_6464 pass
14130 13:55:02.938116 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14131 13:55:02.942234 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14132 13:55:02.942598 arm64_za-ptrace_Set_VL_6480 pass
14133 13:55:02.942699 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14134 13:55:02.942803 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14135 13:55:02.942904 arm64_za-ptrace_Set_VL_6496 pass
14136 13:55:02.943022 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14137 13:55:02.943120 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14138 13:55:02.943199 arm64_za-ptrace_Set_VL_6512 pass
14139 13:55:02.943277 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14140 13:55:02.943365 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14141 13:55:02.943443 arm64_za-ptrace_Set_VL_6528 pass
14142 13:55:02.943518 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14143 13:55:02.943582 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14144 13:55:02.943652 arm64_za-ptrace_Set_VL_6544 pass
14145 13:55:02.943724 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14146 13:55:02.943797 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14147 13:55:02.944060 arm64_za-ptrace_Set_VL_6560 pass
14148 13:55:02.944163 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14149 13:55:02.944246 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14150 13:55:02.944337 arm64_za-ptrace_Set_VL_6576 pass
14151 13:55:02.944594 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14152 13:55:02.944665 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14153 13:55:02.944760 arm64_za-ptrace_Set_VL_6592 pass
14154 13:55:02.944831 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14155 13:55:02.944921 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14156 13:55:02.944993 arm64_za-ptrace_Set_VL_6608 pass
14157 13:55:02.945082 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14158 13:55:02.945179 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14159 13:55:02.945431 arm64_za-ptrace_Set_VL_6624 pass
14160 13:55:02.945502 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14161 13:55:02.945593 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14162 13:55:02.945682 arm64_za-ptrace_Set_VL_6640 pass
14163 13:55:02.945776 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14164 13:55:02.945861 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14165 13:55:02.945973 arm64_za-ptrace_Set_VL_6656 pass
14166 13:55:02.950235 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14167 13:55:02.950612 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14168 13:55:02.950703 arm64_za-ptrace_Set_VL_6672 pass
14169 13:55:02.950955 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14170 13:55:02.971133 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14171 13:55:02.971682 arm64_za-ptrace_Set_VL_6688 pass
14172 13:55:02.971873 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14173 13:55:02.972038 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14174 13:55:02.972201 arm64_za-ptrace_Set_VL_6704 pass
14175 13:55:02.972360 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14176 13:55:02.972556 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14177 13:55:02.972727 arm64_za-ptrace_Set_VL_6720 pass
14178 13:55:02.972894 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14179 13:55:02.973058 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14180 13:55:02.973218 arm64_za-ptrace_Set_VL_6736 pass
14181 13:55:02.973380 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14182 13:55:02.973538 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14183 13:55:02.973711 arm64_za-ptrace_Set_VL_6752 pass
14184 13:55:02.973864 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14185 13:55:02.974047 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14186 13:55:02.974176 arm64_za-ptrace_Set_VL_6768 pass
14187 13:55:02.974298 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14188 13:55:02.974416 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14189 13:55:02.974535 arm64_za-ptrace_Set_VL_6784 pass
14190 13:55:02.974652 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14191 13:55:02.974769 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14192 13:55:02.974889 arm64_za-ptrace_Set_VL_6800 pass
14193 13:55:02.975007 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14194 13:55:02.975124 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14195 13:55:02.975242 arm64_za-ptrace_Set_VL_6816 pass
14196 13:55:02.975359 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14197 13:55:02.975475 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14198 13:55:02.975592 arm64_za-ptrace_Set_VL_6832 pass
14199 13:55:02.975710 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14200 13:55:02.975827 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14201 13:55:02.978212 arm64_za-ptrace_Set_VL_6848 pass
14202 13:55:02.978513 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14203 13:55:02.978607 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14204 13:55:02.978692 arm64_za-ptrace_Set_VL_6864 pass
14205 13:55:02.978793 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14206 13:55:02.978880 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14207 13:55:02.978987 arm64_za-ptrace_Set_VL_6880 pass
14208 13:55:02.979076 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14209 13:55:02.979178 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14210 13:55:02.979465 arm64_za-ptrace_Set_VL_6896 pass
14211 13:55:02.979568 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14212 13:55:02.979654 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14213 13:55:02.979751 arm64_za-ptrace_Set_VL_6912 pass
14214 13:55:02.979836 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14215 13:55:02.979933 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14216 13:55:02.980217 arm64_za-ptrace_Set_VL_6928 pass
14217 13:55:02.980319 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14218 13:55:02.980418 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14219 13:55:02.980503 arm64_za-ptrace_Set_VL_6944 pass
14220 13:55:02.980599 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14221 13:55:02.980699 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14222 13:55:02.980799 arm64_za-ptrace_Set_VL_6960 pass
14223 13:55:02.981106 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14224 13:55:02.981220 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14225 13:55:02.981324 arm64_za-ptrace_Set_VL_6976 pass
14226 13:55:02.981411 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14227 13:55:02.981509 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14228 13:55:02.981610 arm64_za-ptrace_Set_VL_6992 pass
14229 13:55:02.981916 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14230 13:55:02.982018 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14231 13:55:02.982124 arm64_za-ptrace_Set_VL_7008 pass
14232 13:55:02.986244 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14233 13:55:02.986349 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14234 13:55:02.986627 arm64_za-ptrace_Set_VL_7024 pass
14235 13:55:02.986873 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14236 13:55:02.987077 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14237 13:55:02.987258 arm64_za-ptrace_Set_VL_7040 pass
14238 13:55:02.987461 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14239 13:55:02.987679 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14240 13:55:02.987868 arm64_za-ptrace_Set_VL_7056 pass
14241 13:55:02.988063 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14242 13:55:02.988235 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14243 13:55:02.988385 arm64_za-ptrace_Set_VL_7072 pass
14244 13:55:02.988542 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14245 13:55:02.988760 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14246 13:55:02.988973 arm64_za-ptrace_Set_VL_7088 pass
14247 13:55:02.989185 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14248 13:55:02.989386 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14249 13:55:02.989580 arm64_za-ptrace_Set_VL_7104 pass
14250 13:55:02.989808 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14251 13:55:02.989969 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14252 13:55:02.990126 arm64_za-ptrace_Set_VL_7120 pass
14253 13:55:02.990253 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14254 13:55:02.990368 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14255 13:55:02.990482 arm64_za-ptrace_Set_VL_7136 pass
14256 13:55:02.990597 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14257 13:55:02.990710 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14258 13:55:02.990825 arm64_za-ptrace_Set_VL_7152 pass
14259 13:55:02.990943 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14260 13:55:02.991057 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14261 13:55:02.991171 arm64_za-ptrace_Set_VL_7168 pass
14262 13:55:02.991309 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14263 13:55:02.991428 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14264 13:55:02.994152 arm64_za-ptrace_Set_VL_7184 pass
14265 13:55:02.994450 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14266 13:55:02.994553 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14267 13:55:02.994885 arm64_za-ptrace_Set_VL_7200 pass
14268 13:55:02.995127 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14269 13:55:02.995344 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14270 13:55:02.995536 arm64_za-ptrace_Set_VL_7216 pass
14271 13:55:02.995742 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14272 13:55:02.995915 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14273 13:55:02.996075 arm64_za-ptrace_Set_VL_7232 pass
14274 13:55:02.996236 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14275 13:55:02.996402 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14276 13:55:02.996591 arm64_za-ptrace_Set_VL_7248 pass
14277 13:55:02.996756 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14278 13:55:02.996952 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14279 13:55:02.997150 arm64_za-ptrace_Set_VL_7264 pass
14280 13:55:02.997327 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14281 13:55:02.997488 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14282 13:55:02.997632 arm64_za-ptrace_Set_VL_7280 pass
14283 13:55:02.997847 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14284 13:55:02.998015 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14285 13:55:02.998176 arm64_za-ptrace_Set_VL_7296 pass
14286 13:55:02.998307 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14287 13:55:02.998425 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14288 13:55:02.998542 arm64_za-ptrace_Set_VL_7312 pass
14289 13:55:02.998666 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14290 13:55:02.998823 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14291 13:55:02.998984 arm64_za-ptrace_Set_VL_7328 pass
14292 13:55:02.999116 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14293 13:55:02.999241 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14294 13:55:02.999367 arm64_za-ptrace_Set_VL_7344 pass
14295 13:55:02.999493 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14296 13:55:02.999617 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14297 13:55:02.999742 arm64_za-ptrace_Set_VL_7360 pass
14298 13:55:02.999872 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14299 13:55:02.999998 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14300 13:55:03.002397 arm64_za-ptrace_Set_VL_7376 pass
14301 13:55:03.002502 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14302 13:55:03.002606 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14303 13:55:03.002698 arm64_za-ptrace_Set_VL_7392 pass
14304 13:55:03.002797 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14305 13:55:03.002901 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14306 13:55:03.003192 arm64_za-ptrace_Set_VL_7408 pass
14307 13:55:03.003286 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14308 13:55:03.003388 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14309 13:55:03.003474 arm64_za-ptrace_Set_VL_7424 pass
14310 13:55:03.003574 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14311 13:55:03.003677 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14312 13:55:03.003763 arm64_za-ptrace_Set_VL_7440 pass
14313 13:55:03.003867 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14314 13:55:03.004169 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14315 13:55:03.004274 arm64_za-ptrace_Set_VL_7456 pass
14316 13:55:03.004375 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14317 13:55:03.004463 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14318 13:55:03.004564 arm64_za-ptrace_Set_VL_7472 pass
14319 13:55:03.004653 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14320 13:55:03.004755 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14321 13:55:03.004857 arm64_za-ptrace_Set_VL_7488 pass
14322 13:55:03.004965 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14323 13:55:03.005270 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14324 13:55:03.005376 arm64_za-ptrace_Set_VL_7504 pass
14325 13:55:03.005477 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14326 13:55:03.005576 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14327 13:55:03.005685 arm64_za-ptrace_Set_VL_7520 pass
14328 13:55:03.005790 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14329 13:55:03.005896 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14330 13:55:03.010149 arm64_za-ptrace_Set_VL_7536 pass
14331 13:55:03.010478 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14332 13:55:03.010595 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14333 13:55:03.010695 arm64_za-ptrace_Set_VL_7552 pass
14334 13:55:03.010815 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14335 13:55:03.010903 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14336 13:55:03.010972 arm64_za-ptrace_Set_VL_7568 pass
14337 13:55:03.011038 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14338 13:55:03.011164 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14339 13:55:03.011250 arm64_za-ptrace_Set_VL_7584 pass
14340 13:55:03.011328 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14341 13:55:03.011419 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14342 13:55:03.011496 arm64_za-ptrace_Set_VL_7600 pass
14343 13:55:03.011599 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14344 13:55:03.011713 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14345 13:55:03.011799 arm64_za-ptrace_Set_VL_7616 pass
14346 13:55:03.011883 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14347 13:55:03.011990 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14348 13:55:03.012091 arm64_za-ptrace_Set_VL_7632 pass
14349 13:55:03.012167 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14350 13:55:03.012254 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14351 13:55:03.012336 arm64_za-ptrace_Set_VL_7648 pass
14352 13:55:03.012458 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14353 13:55:03.012548 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14354 13:55:03.012633 arm64_za-ptrace_Set_VL_7664 pass
14355 13:55:03.012909 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14356 13:55:03.012994 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14357 13:55:03.013065 arm64_za-ptrace_Set_VL_7680 pass
14358 13:55:03.013190 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14359 13:55:03.013281 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14360 13:55:03.013363 arm64_za-ptrace_Set_VL_7696 pass
14361 13:55:03.013429 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14362 13:55:03.042775 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14363 13:55:03.043022 arm64_za-ptrace_Set_VL_7712 pass
14364 13:55:03.043121 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14365 13:55:03.043429 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14366 13:55:03.043549 arm64_za-ptrace_Set_VL_7728 pass
14367 13:55:03.043654 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14368 13:55:03.043762 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14369 13:55:03.043875 arm64_za-ptrace_Set_VL_7744 pass
14370 13:55:03.043971 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14371 13:55:03.044087 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14372 13:55:03.044214 arm64_za-ptrace_Set_VL_7760 pass
14373 13:55:03.044325 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14374 13:55:03.044418 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14375 13:55:03.044498 arm64_za-ptrace_Set_VL_7776 pass
14376 13:55:03.044576 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14377 13:55:03.044654 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14378 13:55:03.044733 arm64_za-ptrace_Set_VL_7792 pass
14379 13:55:03.044811 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14380 13:55:03.044893 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14381 13:55:03.044977 arm64_za-ptrace_Set_VL_7808 pass
14382 13:55:03.045061 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14383 13:55:03.045147 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14384 13:55:03.045225 arm64_za-ptrace_Set_VL_7824 pass
14385 13:55:03.045318 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14386 13:55:03.045404 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14387 13:55:03.045475 arm64_za-ptrace_Set_VL_7840 pass
14388 13:55:03.045548 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14389 13:55:03.045624 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14390 13:55:03.045710 arm64_za-ptrace_Set_VL_7856 pass
14391 13:55:03.045803 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14392 13:55:03.045870 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14393 13:55:03.045939 arm64_za-ptrace_Set_VL_7872 pass
14394 13:55:03.046019 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14395 13:55:03.046100 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14396 13:55:03.046161 arm64_za-ptrace_Set_VL_7888 pass
14397 13:55:03.046234 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14398 13:55:03.050231 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14399 13:55:03.050666 arm64_za-ptrace_Set_VL_7904 pass
14400 13:55:03.050768 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14401 13:55:03.050882 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14402 13:55:03.050977 arm64_za-ptrace_Set_VL_7920 pass
14403 13:55:03.051070 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14404 13:55:03.051190 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14405 13:55:03.051285 arm64_za-ptrace_Set_VL_7936 pass
14406 13:55:03.051387 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14407 13:55:03.051491 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14408 13:55:03.051594 arm64_za-ptrace_Set_VL_7952 pass
14409 13:55:03.051695 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14410 13:55:03.051800 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14411 13:55:03.052101 arm64_za-ptrace_Set_VL_7968 pass
14412 13:55:03.052200 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14413 13:55:03.052299 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14414 13:55:03.052415 arm64_za-ptrace_Set_VL_7984 pass
14415 13:55:03.052506 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14416 13:55:03.052590 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14417 13:55:03.052674 arm64_za-ptrace_Set_VL_8000 pass
14418 13:55:03.052773 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14419 13:55:03.052873 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14420 13:55:03.052971 arm64_za-ptrace_Set_VL_8016 pass
14421 13:55:03.053085 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14422 13:55:03.053192 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14423 13:55:03.053278 arm64_za-ptrace_Set_VL_8032 pass
14424 13:55:03.053354 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14425 13:55:03.053430 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14426 13:55:03.053511 arm64_za-ptrace_Set_VL_8048 pass
14427 13:55:03.053593 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14428 13:55:03.053702 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14429 13:55:03.053805 arm64_za-ptrace_Set_VL_8064 pass
14430 13:55:03.053921 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14431 13:55:03.054030 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14432 13:55:03.054124 arm64_za-ptrace_Set_VL_8080 pass
14433 13:55:03.054214 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14434 13:55:03.054289 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14435 13:55:03.054363 arm64_za-ptrace_Set_VL_8096 pass
14436 13:55:03.054456 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14437 13:55:03.058216 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14438 13:55:03.058367 arm64_za-ptrace_Set_VL_8112 pass
14439 13:55:03.058649 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14440 13:55:03.058733 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14441 13:55:03.058812 arm64_za-ptrace_Set_VL_8128 pass
14442 13:55:03.058904 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14443 13:55:03.058976 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14444 13:55:03.059070 arm64_za-ptrace_Set_VL_8144 pass
14445 13:55:03.059193 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14446 13:55:03.059269 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14447 13:55:03.059361 arm64_za-ptrace_Set_VL_8160 pass
14448 13:55:03.059480 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14449 13:55:03.059572 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14450 13:55:03.059679 arm64_za-ptrace_Set_VL_8176 pass
14451 13:55:03.059768 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14452 13:55:03.059855 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14453 13:55:03.059942 arm64_za-ptrace_Set_VL_8192 pass
14454 13:55:03.060038 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14455 13:55:03.060168 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14456 13:55:03.060264 arm64_za-ptrace pass
14457 13:55:03.060371 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14458 13:55:03.060663 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14459 13:55:03.060769 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14460 13:55:03.061103 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14461 13:55:03.061211 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14462 13:55:03.061510 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14463 13:55:03.061815 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14464 13:55:03.061923 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14465 13:55:03.066233 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14466 13:55:03.066650 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14467 13:55:03.066777 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14468 13:55:03.066931 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14469 13:55:03.067040 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14470 13:55:03.067389 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14471 13:55:03.067512 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14472 13:55:03.067799 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14473 13:55:03.067933 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14474 13:55:03.068269 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14475 13:55:03.068571 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14476 13:55:03.068664 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14477 13:55:03.068753 arm64_check_buffer_fill fail
14478 13:55:03.069048 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14479 13:55:03.069147 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14480 13:55:03.069254 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14481 13:55:03.069558 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14482 13:55:03.069833 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14483 13:55:03.069960 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14484 13:55:03.074422 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14485 13:55:03.074748 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14486 13:55:03.075037 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14487 13:55:03.075183 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14488 13:55:03.075679 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14489 13:55:03.075998 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14490 13:55:03.076113 arm64_check_child_memory fail
14491 13:55:03.076209 arm64_check_gcr_el1_cswitch fail
14492 13:55:03.076289 arm64_check_ksm_options fail
14493 13:55:03.076398 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14494 13:55:03.076710 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14495 13:55:03.077030 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14496 13:55:03.077150 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14497 13:55:03.077507 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14498 13:55:03.084447 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14499 13:55:03.084875 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14500 13:55:03.085001 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14501 13:55:03.085308 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14502 13:55:03.085629 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14503 13:55:03.085762 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14504 13:55:03.086074 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14505 13:55:03.086416 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14506 13:55:03.086740 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14507 13:55:03.086863 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14508 13:55:03.087200 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14509 13:55:03.087387 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14510 13:55:03.087721 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14511 13:55:03.087858 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14512 13:55:03.088193 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14513 13:55:03.088310 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14514 13:55:03.088661 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14515 13:55:03.088752 arm64_check_mmap_options fail
14516 13:55:03.088867 arm64_check_prctl_check_basic_read pass
14517 13:55:03.088964 arm64_check_prctl_NONE pass
14518 13:55:03.089074 arm64_check_prctl_SYNC pass
14519 13:55:03.089143 arm64_check_prctl_ASYNC pass
14520 13:55:03.089204 arm64_check_prctl_SYNC_ASYNC pass
14521 13:55:03.089273 arm64_check_prctl pass
14522 13:55:03.089578 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14523 13:55:03.089696 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14524 13:55:03.089804 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14525 13:55:03.089908 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14526 13:55:03.090011 arm64_check_tags_inclusion fail
14527 13:55:03.094273 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14528 13:55:03.094693 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14529 13:55:03.094793 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14530 13:55:03.094895 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14531 13:55:03.095000 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14532 13:55:03.095304 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14533 13:55:03.095432 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14534 13:55:03.095752 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14535 13:55:03.095861 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14536 13:55:03.096166 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14537 13:55:03.096270 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14538 13:55:03.096378 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14539 13:55:03.096684 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14540 13:55:03.096799 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14541 13:55:03.097106 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14542 13:55:03.097219 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14543 13:55:03.097551 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14544 13:55:03.097694 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14545 13:55:03.097998 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14546 13:55:03.102225 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14547 13:55:03.102591 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14548 13:55:03.102679 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14549 13:55:03.102800 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14550 13:55:03.103128 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14551 13:55:03.103290 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14552 13:55:03.103533 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14553 13:55:03.103700 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14554 13:55:03.104097 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14555 13:55:03.104218 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14556 13:55:03.104322 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14557 13:55:03.104629 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14558 13:55:03.104750 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14559 13:55:03.105067 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14560 13:55:03.105265 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14561 13:55:03.105449 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14562 13:55:03.105616 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14563 13:55:03.105973 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14564 13:55:03.106083 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14565 13:55:03.110262 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14566 13:55:03.110647 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14567 13:55:03.110769 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14568 13:55:03.111065 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14569 13:55:03.111359 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14570 13:55:03.111459 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14571 13:55:03.111563 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14572 13:55:03.111861 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14573 13:55:03.112162 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14574 13:55:03.112466 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14575 13:55:03.112579 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14576 13:55:03.112876 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14577 13:55:03.112982 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14578 13:55:03.113265 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14579 13:55:03.113562 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14580 13:55:03.113893 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14581 13:55:03.114173 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14582 13:55:03.118232 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14583 13:55:03.118659 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14584 13:55:03.118761 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14585 13:55:03.118864 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14586 13:55:03.119157 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14587 13:55:03.119275 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14588 13:55:03.119575 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14589 13:55:03.135501 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14590 13:55:03.135963 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14591 13:55:03.136063 arm64_check_user_mem pass
14592 13:55:03.136152 arm64_btitest_nohint_func_call_using_br_x0 pass
14593 13:55:03.136256 arm64_btitest_nohint_func_call_using_br_x16 pass
14594 13:55:03.136343 arm64_btitest_nohint_func_call_using_blr pass
14595 13:55:03.136443 arm64_btitest_bti_none_func_call_using_br_x0 pass
14596 13:55:03.136532 arm64_btitest_bti_none_func_call_using_br_x16 pass
14597 13:55:03.136635 arm64_btitest_bti_none_func_call_using_blr pass
14598 13:55:03.136921 arm64_btitest_bti_c_func_call_using_br_x0 pass
14599 13:55:03.137016 arm64_btitest_bti_c_func_call_using_br_x16 pass
14600 13:55:03.137123 arm64_btitest_bti_c_func_call_using_blr pass
14601 13:55:03.137209 arm64_btitest_bti_j_func_call_using_br_x0 pass
14602 13:55:03.137309 arm64_btitest_bti_j_func_call_using_br_x16 pass
14603 13:55:03.137394 arm64_btitest_bti_j_func_call_using_blr pass
14604 13:55:03.137497 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14605 13:55:03.137595 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14606 13:55:03.137890 arm64_btitest_bti_jc_func_call_using_blr pass
14607 13:55:03.137986 arm64_btitest_paciasp_func_call_using_br_x0 pass
14608 13:55:03.138272 arm64_btitest_paciasp_func_call_using_br_x16 pass
14609 13:55:03.138379 arm64_btitest_paciasp_func_call_using_blr pass
14610 13:55:03.138463 arm64_btitest pass
14611 13:55:03.138556 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14612 13:55:03.138850 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14613 13:55:03.138951 arm64_nobtitest_nohint_func_call_using_blr pass
14614 13:55:03.139053 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14615 13:55:03.139166 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14616 13:55:03.139456 arm64_nobtitest_bti_none_func_call_using_blr pass
14617 13:55:03.139548 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14618 13:55:03.139648 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14619 13:55:03.139749 arm64_nobtitest_bti_c_func_call_using_blr pass
14620 13:55:03.140038 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14621 13:55:03.140131 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14622 13:55:03.140229 arm64_nobtitest_bti_j_func_call_using_blr pass
14623 13:55:03.140328 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14624 13:55:03.140619 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14625 13:55:03.140718 arm64_nobtitest_bti_jc_func_call_using_blr pass
14626 13:55:03.140824 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14627 13:55:03.140929 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14628 13:55:03.141033 arm64_nobtitest_paciasp_func_call_using_blr pass
14629 13:55:03.141138 arm64_nobtitest pass
14630 13:55:03.141250 arm64_hwcap_cpuinfo_match_RNG pass
14631 13:55:03.141356 arm64_hwcap_sigill_RNG pass
14632 13:55:03.141461 arm64_hwcap_cpuinfo_match_SME pass
14633 13:55:03.141553 arm64_hwcap_sigill_SME pass
14634 13:55:03.141666 arm64_hwcap_cpuinfo_match_SVE pass
14635 13:55:03.141949 arm64_hwcap_sigill_SVE pass
14636 13:55:03.142039 arm64_hwcap_cpuinfo_match_SVE_2 pass
14637 13:55:03.142124 arm64_hwcap_sigill_SVE_2 pass
14638 13:55:03.142209 arm64_hwcap_cpuinfo_match_SVE_AES pass
14639 13:55:03.150178 arm64_hwcap_sigill_SVE_AES pass
14640 13:55:03.150597 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14641 13:55:03.150697 arm64_hwcap_sigill_SVE2_PMULL pass
14642 13:55:03.150777 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14643 13:55:03.150856 arm64_hwcap_sigill_SVE2_BITPERM pass
14644 13:55:03.150957 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14645 13:55:03.151052 arm64_hwcap_sigill_SVE2_SHA3 pass
14646 13:55:03.151142 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14647 13:55:03.151260 arm64_hwcap_sigill_SVE2_SM4 pass
14648 13:55:03.151339 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14649 13:55:03.151436 arm64_hwcap_sigill_SVE2_I8MM pass
14650 13:55:03.151520 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14651 13:55:03.151613 arm64_hwcap_sigill_SVE2_F32MM pass
14652 13:55:03.151689 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14653 13:55:03.151771 arm64_hwcap_sigill_SVE2_F64MM pass
14654 13:55:03.151854 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14655 13:55:03.151953 arm64_hwcap_sigill_SVE2_BF16 pass
14656 13:55:03.152037 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14657 13:55:03.152114 arm64_hwcap_sigill_SVE2_EBF16 skip
14658 13:55:03.152194 arm64_hwcap pass
14659 13:55:03.152274 arm64_ptrace_read_tpidr_one pass
14660 13:55:03.152370 arm64_ptrace_write_tpidr_one pass
14661 13:55:03.152453 arm64_ptrace_verify_tpidr_one pass
14662 13:55:03.152528 arm64_ptrace_count_tpidrs pass
14663 13:55:03.152627 arm64_ptrace_tpidr2_write pass
14664 13:55:03.152708 arm64_ptrace_tpidr2_read pass
14665 13:55:03.152790 arm64_ptrace_write_tpidr_only pass
14666 13:55:03.152874 arm64_ptrace pass
14667 13:55:03.152954 arm64_syscall-abi_getpid_FPSIMD pass
14668 13:55:03.153035 arm64_syscall-abi_getpid_SVE_VL_256 pass
14669 13:55:03.153134 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14670 13:55:03.153219 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14671 13:55:03.153300 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14672 13:55:03.153376 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14673 13:55:03.153473 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14674 13:55:03.153557 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14675 13:55:03.153636 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14676 13:55:03.153759 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14677 13:55:03.153864 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14678 13:55:03.153960 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14679 13:55:03.154058 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14680 13:55:03.154152 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14681 13:55:03.158162 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14682 13:55:03.158492 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14683 13:55:03.158588 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14684 13:55:03.158671 arm64_syscall-abi_getpid_SVE_VL_240 pass
14685 13:55:03.158763 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14686 13:55:03.158844 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14687 13:55:03.158934 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14688 13:55:03.159030 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14689 13:55:03.159127 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14690 13:55:03.159221 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14691 13:55:03.159515 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14692 13:55:03.159684 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14693 13:55:03.159919 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14694 13:55:03.160024 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14695 13:55:03.160162 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14696 13:55:03.160278 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14697 13:55:03.160366 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14698 13:55:03.160450 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14699 13:55:03.160625 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14700 13:55:03.160732 arm64_syscall-abi_getpid_SVE_VL_224 pass
14701 13:55:03.160833 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14702 13:55:03.160918 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14703 13:55:03.161017 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14704 13:55:03.161105 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14705 13:55:03.161396 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14706 13:55:03.161497 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14707 13:55:03.161583 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14708 13:55:03.161695 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14709 13:55:03.161782 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14710 13:55:03.161867 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14711 13:55:03.161970 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14712 13:55:03.162060 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14713 13:55:03.166199 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14714 13:55:03.166556 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14715 13:55:03.166658 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14716 13:55:03.166732 arm64_syscall-abi_getpid_SVE_VL_208 pass
14717 13:55:03.166811 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14718 13:55:03.166914 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14719 13:55:03.167004 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14720 13:55:03.167113 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14721 13:55:03.167223 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14722 13:55:03.167336 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14723 13:55:03.167436 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14724 13:55:03.167550 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14725 13:55:03.167641 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14726 13:55:03.167724 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14727 13:55:03.167802 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14728 13:55:03.167897 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14729 13:55:03.167974 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14730 13:55:03.168072 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14731 13:55:03.168153 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14732 13:55:03.168239 arm64_syscall-abi_getpid_SVE_VL_192 pass
14733 13:55:03.168532 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14734 13:55:03.168625 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14735 13:55:03.168704 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14736 13:55:03.168798 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14737 13:55:03.168874 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14738 13:55:03.168950 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14739 13:55:03.169231 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14740 13:55:03.169324 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14741 13:55:03.169406 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14742 13:55:03.169503 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14743 13:55:03.169586 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14744 13:55:03.169681 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14745 13:55:03.169759 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14746 13:55:03.169849 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14747 13:55:03.169951 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14748 13:55:03.174223 arm64_syscall-abi_getpid_SVE_VL_176 pass
14749 13:55:03.174588 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14750 13:55:03.174680 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14751 13:55:03.175021 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14752 13:55:03.175146 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14753 13:55:03.175223 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14754 13:55:03.175284 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14755 13:55:03.175357 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14756 13:55:03.175420 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14757 13:55:03.175491 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14758 13:55:03.175924 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14759 13:55:03.185891 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14760 13:55:03.186063 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14761 13:55:03.186173 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14762 13:55:03.186290 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14763 13:55:03.186599 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14764 13:55:03.186706 arm64_syscall-abi_getpid_SVE_VL_160 pass
14765 13:55:03.186815 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14766 13:55:03.186923 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14767 13:55:03.187017 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14768 13:55:03.187123 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14769 13:55:03.187230 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14770 13:55:03.187545 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14771 13:55:03.187639 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14772 13:55:03.187770 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14773 13:55:03.187888 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14774 13:55:03.188006 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14775 13:55:03.188094 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14776 13:55:03.188197 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14777 13:55:03.188299 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14778 13:55:03.188407 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14779 13:55:03.188516 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14780 13:55:03.188632 arm64_syscall-abi_getpid_SVE_VL_144 pass
14781 13:55:03.188935 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14782 13:55:03.189034 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14783 13:55:03.189126 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14784 13:55:03.189321 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14785 13:55:03.189421 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14786 13:55:03.189730 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14787 13:55:03.189842 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14788 13:55:03.189963 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14789 13:55:03.190059 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14790 13:55:03.190146 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14791 13:55:03.190216 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14792 13:55:03.194206 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14793 13:55:03.194568 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14794 13:55:03.194661 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14795 13:55:03.194743 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14796 13:55:03.194840 arm64_syscall-abi_getpid_SVE_VL_128 pass
14797 13:55:03.194927 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14798 13:55:03.195015 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14799 13:55:03.195104 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14800 13:55:03.195195 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14801 13:55:03.195290 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14802 13:55:03.195384 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14803 13:55:03.195673 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14804 13:55:03.195770 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14805 13:55:03.195863 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14806 13:55:03.195942 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14807 13:55:03.196035 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14808 13:55:03.196123 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14809 13:55:03.196223 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14810 13:55:03.196511 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14811 13:55:03.196617 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14812 13:55:03.196720 arm64_syscall-abi_getpid_SVE_VL_112 pass
14813 13:55:03.196820 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14814 13:55:03.196920 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14815 13:55:03.197023 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14816 13:55:03.197133 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14817 13:55:03.197242 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14818 13:55:03.197331 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14819 13:55:03.197605 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14820 13:55:03.197718 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14821 13:55:03.197835 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14822 13:55:03.197936 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14823 13:55:03.198033 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14824 13:55:03.202186 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14825 13:55:03.202611 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14826 13:55:03.202717 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14827 13:55:03.202814 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14828 13:55:03.202950 arm64_syscall-abi_getpid_SVE_VL_96 pass
14829 13:55:03.203080 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14830 13:55:03.203171 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14831 13:55:03.203287 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14832 13:55:03.203374 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14833 13:55:03.203467 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14834 13:55:03.203582 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14835 13:55:03.203655 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14836 13:55:03.203734 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14837 13:55:03.204007 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14838 13:55:03.204095 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14839 13:55:03.204202 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14840 13:55:03.204320 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14841 13:55:03.204415 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14842 13:55:03.204506 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14843 13:55:03.204606 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14844 13:55:03.204705 arm64_syscall-abi_getpid_SVE_VL_80 pass
14845 13:55:03.204780 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14846 13:55:03.205041 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14847 13:55:03.205125 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14848 13:55:03.205237 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14849 13:55:03.205325 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14850 13:55:03.205597 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14851 13:55:03.205717 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14852 13:55:03.205812 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14853 13:55:03.205904 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14854 13:55:03.210153 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14855 13:55:03.210540 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14856 13:55:03.210637 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14857 13:55:03.210764 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14858 13:55:03.210860 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14859 13:55:03.210950 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14860 13:55:03.211051 arm64_syscall-abi_getpid_SVE_VL_64 pass
14861 13:55:03.211137 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14862 13:55:03.211226 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14863 13:55:03.211498 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14864 13:55:03.211606 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14865 13:55:03.211691 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14866 13:55:03.211786 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14867 13:55:03.211880 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14868 13:55:03.212152 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14869 13:55:03.212224 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14870 13:55:03.212301 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14871 13:55:03.212550 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14872 13:55:03.212795 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14873 13:55:03.212861 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14874 13:55:03.212933 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14875 13:55:03.213018 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14876 13:55:03.213296 arm64_syscall-abi_getpid_SVE_VL_48 pass
14877 13:55:03.213382 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14878 13:55:03.213637 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14879 13:55:03.213718 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14880 13:55:03.213809 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14881 13:55:03.213893 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14882 13:55:03.218146 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14883 13:55:03.218462 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14884 13:55:03.218564 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14885 13:55:03.218673 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14886 13:55:03.218909 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14887 13:55:03.219017 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14888 13:55:03.219145 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14889 13:55:03.219246 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14890 13:55:03.219368 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14891 13:55:03.219479 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14892 13:55:03.219602 arm64_syscall-abi_getpid_SVE_VL_32 pass
14893 13:55:03.219698 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14894 13:55:03.219787 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14895 13:55:03.219887 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14896 13:55:03.219965 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14897 13:55:03.220036 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14898 13:55:03.220119 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14899 13:55:03.220203 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14900 13:55:03.220313 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14901 13:55:03.220448 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14902 13:55:03.220566 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14903 13:55:03.220676 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14904 13:55:03.220774 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14905 13:55:03.220869 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14906 13:55:03.220966 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14907 13:55:03.221080 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14908 13:55:03.221531 arm64_syscall-abi_getpid_SVE_VL_16 pass
14909 13:55:03.221616 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14910 13:55:03.221697 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14911 13:55:03.234803 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14912 13:55:03.235269 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14913 13:55:03.235377 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14914 13:55:03.235485 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14915 13:55:03.235580 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14916 13:55:03.235710 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14917 13:55:03.235813 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14918 13:55:03.235900 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14919 13:55:03.235980 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14920 13:55:03.236077 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14921 13:55:03.236166 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14922 13:55:03.236247 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14923 13:55:03.236365 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14924 13:55:03.236447 arm64_syscall-abi_sched_yield_FPSIMD pass
14925 13:55:03.236511 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14926 13:55:03.236835 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14927 13:55:03.236921 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14928 13:55:03.237018 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14929 13:55:03.237123 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14930 13:55:03.237222 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14931 13:55:03.237314 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14932 13:55:03.237401 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14933 13:55:03.237521 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14934 13:55:03.237667 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14935 13:55:03.237956 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14936 13:55:03.238062 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14937 13:55:03.242239 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
14938 13:55:03.242703 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
14939 13:55:03.242810 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
14940 13:55:03.242903 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
14941 13:55:03.242992 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
14942 13:55:03.243076 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
14943 13:55:03.243182 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
14944 13:55:03.243272 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
14945 13:55:03.243377 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
14946 13:55:03.243469 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
14947 13:55:03.243559 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
14948 13:55:03.243663 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
14949 13:55:03.243764 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
14950 13:55:03.243867 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
14951 13:55:03.243973 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
14952 13:55:03.244081 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
14953 13:55:03.244388 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
14954 13:55:03.244510 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
14955 13:55:03.244618 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
14956 13:55:03.244732 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
14957 13:55:03.244837 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
14958 13:55:03.245144 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
14959 13:55:03.245268 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
14960 13:55:03.245567 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
14961 13:55:03.245750 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
14962 13:55:03.245937 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
14963 13:55:03.246035 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
14964 13:55:03.246122 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
14965 13:55:03.250355 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
14966 13:55:03.250584 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
14967 13:55:03.250926 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
14968 13:55:03.251046 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
14969 13:55:03.251136 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
14970 13:55:03.251214 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
14971 13:55:03.251301 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
14972 13:55:03.251482 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
14973 13:55:03.251676 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
14974 13:55:03.251838 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
14975 13:55:03.252021 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
14976 13:55:03.252150 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
14977 13:55:03.252300 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
14978 13:55:03.252451 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
14979 13:55:03.252597 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
14980 13:55:03.252718 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
14981 13:55:03.252850 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
14982 13:55:03.252985 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
14983 13:55:03.253166 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
14984 13:55:03.253322 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
14985 13:55:03.253467 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
14986 13:55:03.253616 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
14987 13:55:03.253834 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
14988 13:55:03.254069 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
14989 13:55:03.254259 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
14990 13:55:03.254424 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
14991 13:55:03.254568 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
14992 13:55:03.254712 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
14993 13:55:03.254888 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
14994 13:55:03.258233 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
14995 13:55:03.258669 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
14996 13:55:03.258906 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
14997 13:55:03.259122 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
14998 13:55:03.259339 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
14999 13:55:03.259549 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
15000 13:55:03.259763 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
15001 13:55:03.259995 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
15002 13:55:03.260193 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
15003 13:55:03.260431 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
15004 13:55:03.260612 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
15005 13:55:03.260804 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
15006 13:55:03.260988 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
15007 13:55:03.261160 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
15008 13:55:03.261352 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
15009 13:55:03.261576 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
15010 13:55:03.262403 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
15011 13:55:03.262598 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
15012 13:55:03.262741 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
15013 13:55:03.262889 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
15014 13:55:03.263046 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
15015 13:55:03.263207 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
15016 13:55:03.263365 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
15017 13:55:03.263517 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
15018 13:55:03.263652 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
15019 13:55:03.263800 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
15020 13:55:03.263949 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
15021 13:55:03.264100 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
15022 13:55:03.264253 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
15023 13:55:03.264410 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
15024 13:55:03.266307 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
15025 13:55:03.266517 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
15026 13:55:03.266936 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
15027 13:55:03.267048 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
15028 13:55:03.267151 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
15029 13:55:03.267250 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
15030 13:55:03.267352 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
15031 13:55:03.267469 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
15032 13:55:03.267563 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
15033 13:55:03.267656 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
15034 13:55:03.267770 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
15035 13:55:03.267861 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
15036 13:55:03.267983 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
15037 13:55:03.268077 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
15038 13:55:03.268174 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
15039 13:55:03.268266 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
15040 13:55:03.268373 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
15041 13:55:03.268458 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
15042 13:55:03.268541 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
15043 13:55:03.268845 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
15044 13:55:03.268970 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
15045 13:55:03.269068 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
15046 13:55:03.269192 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
15047 13:55:03.269292 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
15048 13:55:03.269403 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
15049 13:55:03.269538 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
15050 13:55:03.269660 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
15051 13:55:03.283560 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
15052 13:55:03.284135 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
15053 13:55:03.284245 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
15054 13:55:03.284334 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
15055 13:55:03.284425 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
15056 13:55:03.284528 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
15057 13:55:03.284616 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
15058 13:55:03.284702 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
15059 13:55:03.284804 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
15060 13:55:03.284889 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
15061 13:55:03.284986 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
15062 13:55:03.285088 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
15063 13:55:03.285192 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
15064 13:55:03.285530 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
15065 13:55:03.285639 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
15066 13:55:03.285751 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
15067 13:55:03.285839 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
15068 13:55:03.285939 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
15069 13:55:03.286023 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
15070 13:55:03.286120 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
15071 13:55:03.286416 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
15072 13:55:03.286537 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
15073 13:55:03.286624 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
15074 13:55:03.286724 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
15075 13:55:03.286823 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
15076 13:55:03.286924 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
15077 13:55:03.287030 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15078 13:55:03.287132 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15079 13:55:03.287233 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15080 13:55:03.287545 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15081 13:55:03.287662 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15082 13:55:03.287748 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15083 13:55:03.287847 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15084 13:55:03.287943 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15085 13:55:03.288045 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15086 13:55:03.288149 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15087 13:55:03.288251 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15088 13:55:03.288365 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15089 13:55:03.288478 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15090 13:55:03.288798 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15091 13:55:03.288903 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15092 13:55:03.288999 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15093 13:55:03.289266 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15094 13:55:03.289378 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15095 13:55:03.289472 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15096 13:55:03.289569 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15097 13:55:03.289677 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15098 13:55:03.290007 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15099 13:55:03.290111 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15100 13:55:03.290196 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15101 13:55:03.294250 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15102 13:55:03.294681 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15103 13:55:03.294860 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15104 13:55:03.295054 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15105 13:55:03.295276 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15106 13:55:03.295457 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15107 13:55:03.295633 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15108 13:55:03.295782 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15109 13:55:03.295964 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15110 13:55:03.296101 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15111 13:55:03.296246 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15112 13:55:03.296389 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15113 13:55:03.296530 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15114 13:55:03.296672 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15115 13:55:03.296815 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15116 13:55:03.296995 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15117 13:55:03.297131 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15118 13:55:03.297274 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15119 13:55:03.297416 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15120 13:55:03.297559 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15121 13:55:03.297716 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15122 13:55:03.297860 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15123 13:55:03.298009 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15124 13:55:03.298191 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15125 13:55:03.298325 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15126 13:55:03.298469 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15127 13:55:03.298612 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15128 13:55:03.298754 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15129 13:55:03.298896 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15130 13:55:03.299039 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15131 13:55:03.306229 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15132 13:55:03.306812 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15133 13:55:03.307002 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15134 13:55:03.307174 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15135 13:55:03.307322 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15136 13:55:03.307506 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15137 13:55:03.307644 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15138 13:55:03.307790 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15139 13:55:03.307934 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15140 13:55:03.308077 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15141 13:55:03.308255 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15142 13:55:03.308392 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15143 13:55:03.308537 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15144 13:55:03.308679 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15145 13:55:03.308821 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15146 13:55:03.308962 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15147 13:55:03.309326 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15148 13:55:03.309431 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15149 13:55:03.309522 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15150 13:55:03.309610 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15151 13:55:03.309709 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15152 13:55:03.309796 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15153 13:55:03.309884 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15154 13:55:03.309967 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15155 13:55:03.310048 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15156 13:55:03.310150 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15157 13:55:03.310237 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15158 13:55:03.310321 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15159 13:55:03.310401 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15160 13:55:03.310484 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15161 13:55:03.314360 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15162 13:55:03.314634 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15163 13:55:03.315143 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15164 13:55:03.315341 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15165 13:55:03.315507 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15166 13:55:03.315670 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15167 13:55:03.315832 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15168 13:55:03.315992 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15169 13:55:03.316185 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15170 13:55:03.316350 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15171 13:55:03.316511 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15172 13:55:03.316667 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15173 13:55:03.316855 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15174 13:55:03.317095 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15175 13:55:03.317319 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15176 13:55:03.317529 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15177 13:55:03.317682 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15178 13:55:03.317891 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15179 13:55:03.318079 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15180 13:55:03.318270 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15181 13:55:03.318414 arm64_syscall-abi pass
15182 13:55:03.318557 arm64_tpidr2_default_value pass
15183 13:55:03.318698 arm64_tpidr2_write_read pass
15184 13:55:03.318839 arm64_tpidr2_write_sleep_read pass
15185 13:55:03.318981 arm64_tpidr2_write_fork_read pass
15186 13:55:03.319123 arm64_tpidr2_write_clone_read pass
15187 13:55:03.319264 arm64_tpidr2 pass
15188 13:55:03.331061 + ../../utils/send-to-lava.sh ./output/result.txt
15189 13:55:03.375397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15190 13:55:03.376564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15192 13:55:03.407737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15194 13:55:03.408428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15195 13:55:03.440503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15197 13:55:03.441188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15198 13:55:03.472653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15200 13:55:03.473091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15201 13:55:03.503686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15202 13:55:03.504090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15204 13:55:03.535333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15205 13:55:03.535720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15207 13:55:03.566760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15208 13:55:03.567277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15210 13:55:03.597831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15212 13:55:03.598481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15213 13:55:03.629159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15215 13:55:03.629716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15216 13:55:03.659908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15218 13:55:03.660362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15219 13:55:03.691493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15220 13:55:03.691946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15222 13:55:03.721950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15224 13:55:03.722572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15225 13:55:03.753083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15226 13:55:03.753542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15228 13:55:03.783859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15229 13:55:03.784269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15231 13:55:03.814908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15232 13:55:03.815312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15234 13:55:03.845712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15235 13:55:03.846126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15237 13:55:03.876551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15238 13:55:03.876956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15240 13:55:03.907907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15241 13:55:03.908317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15243 13:55:03.939288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15244 13:55:03.939737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15246 13:55:03.969818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15248 13:55:03.970350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15249 13:55:04.000544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15251 13:55:04.001072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15252 13:55:04.031162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15254 13:55:04.031681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15255 13:55:04.061637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15256 13:55:04.062072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15258 13:55:04.091437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15260 13:55:04.092030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15261 13:55:04.121508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15263 13:55:04.122058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15264 13:55:04.152619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15266 13:55:04.153174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15267 13:55:04.184166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15268 13:55:04.184633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15270 13:55:04.214526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15272 13:55:04.215083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15273 13:55:04.244590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15274 13:55:04.245048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15276 13:55:04.275829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15278 13:55:04.276371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15279 13:55:04.306987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15280 13:55:04.307463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15282 13:55:04.337900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15284 13:55:04.338504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15285 13:55:04.368810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15287 13:55:04.369364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15288 13:55:04.399871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15290 13:55:04.400405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15291 13:55:04.431095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15292 13:55:04.431566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15294 13:55:04.461391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15295 13:55:04.461866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15297 13:55:04.491884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15298 13:55:04.492338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15300 13:55:04.522658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15301 13:55:04.523119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15303 13:55:04.553221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15304 13:55:04.553694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15306 13:55:04.584201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15308 13:55:04.584675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15309 13:55:04.614700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15310 13:55:04.615173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15312 13:55:04.645490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15314 13:55:04.646039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15315 13:55:04.676343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15316 13:55:04.676798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15318 13:55:04.706913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15319 13:55:04.707371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15321 13:55:04.737004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15323 13:55:04.737536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15324 13:55:04.767465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15325 13:55:04.767928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15327 13:55:04.799300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15328 13:55:04.799784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15330 13:55:04.830065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15331 13:55:04.830526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15333 13:55:04.860466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15335 13:55:04.861026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15336 13:55:04.890919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15337 13:55:04.891364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15339 13:55:04.921813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15340 13:55:04.922263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15342 13:55:04.952301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15343 13:55:04.952747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15345 13:55:04.982747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15346 13:55:04.983178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15348 13:55:05.012489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15350 13:55:05.013021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15351 13:55:05.043123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15353 13:55:05.043651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15354 13:55:05.073259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15355 13:55:05.073692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15357 13:55:05.103364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15358 13:55:05.103790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15360 13:55:05.133452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15362 13:55:05.134017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15363 13:55:05.164296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15365 13:55:05.164913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15366 13:55:05.194678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15368 13:55:05.195306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15369 13:55:05.224663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15371 13:55:05.225273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15372 13:55:05.255125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15373 13:55:05.255612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15375 13:55:05.285406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15377 13:55:05.286073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15378 13:55:05.316027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15380 13:55:05.316661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15381 13:55:05.347231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15382 13:55:05.347756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15384 13:55:05.377915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15385 13:55:05.378476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15387 13:55:05.409341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15388 13:55:05.409789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15390 13:55:05.441113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15392 13:55:05.441780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15393 13:55:05.473059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15394 13:55:05.473491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15396 13:55:05.505551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15397 13:55:05.505916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15399 13:55:05.537547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15400 13:55:05.537914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15402 13:55:05.568720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15403 13:55:05.569147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15405 13:55:05.601065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15406 13:55:05.601501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15408 13:55:05.632507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15409 13:55:05.632933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15411 13:55:05.665062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15412 13:55:05.665454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15414 13:55:05.696361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15415 13:55:05.696793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15417 13:55:05.727687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15418 13:55:05.728128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15420 13:55:05.759357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15421 13:55:05.759787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15423 13:55:05.790769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15424 13:55:05.791220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15426 13:55:05.822101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15427 13:55:05.822491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15429 13:55:05.859670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15430 13:55:05.860057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15432 13:55:05.891520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15433 13:55:05.891966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15435 13:55:05.923791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15436 13:55:05.924202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15438 13:55:05.956774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15440 13:55:05.957228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15441 13:55:05.988157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15443 13:55:05.988635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15444 13:55:06.019686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15445 13:55:06.020093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15447 13:55:06.051678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15449 13:55:06.052260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15450 13:55:06.083307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15452 13:55:06.083863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15453 13:55:06.114662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15455 13:55:06.115101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15456 13:55:06.147401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15458 13:55:06.148106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15459 13:55:06.183462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15460 13:55:06.183896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15462 13:55:06.218477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15464 13:55:06.218928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15465 13:55:06.253238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15466 13:55:06.253681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15468 13:55:06.289070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15470 13:55:06.289494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15471 13:55:06.324543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15472 13:55:06.324921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15474 13:55:06.359107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15476 13:55:06.359486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15477 13:55:06.393299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15478 13:55:06.393693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15480 13:55:06.427962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15481 13:55:06.428359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15483 13:55:06.463384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15484 13:55:06.463768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15486 13:55:06.498818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15487 13:55:06.499282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15489 13:55:06.534037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15490 13:55:06.534453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15492 13:55:06.569500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15493 13:55:06.569879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15495 13:55:06.604533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15496 13:55:06.604813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15498 13:55:06.640105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15499 13:55:06.640475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15501 13:55:06.675719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15502 13:55:06.676073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15504 13:55:06.711214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15506 13:55:06.711645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15507 13:55:06.747540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15508 13:55:06.747946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15510 13:55:06.782509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15512 13:55:06.783024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15513 13:55:06.818455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15515 13:55:06.818902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15516 13:55:06.853911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15517 13:55:06.854331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15519 13:55:06.889534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15520 13:55:06.889931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15522 13:55:06.924690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15523 13:55:06.925038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15525 13:55:06.960125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15526 13:55:06.960406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15528 13:55:06.995571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15529 13:55:06.995846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15531 13:55:07.031856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15532 13:55:07.032129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15534 13:55:07.067792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15536 13:55:07.068364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15537 13:55:07.103377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15538 13:55:07.103837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15540 13:55:07.139164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15541 13:55:07.139583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15543 13:55:07.174805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15544 13:55:07.175226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15546 13:55:07.209813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15547 13:55:07.210244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15549 13:55:07.245155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15550 13:55:07.245576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15552 13:55:07.279961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15553 13:55:07.280383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15555 13:55:07.315779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15556 13:55:07.316203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15558 13:55:07.350823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15559 13:55:07.351212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15561 13:55:07.386084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15562 13:55:07.386548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15564 13:55:07.423541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15565 13:55:07.423986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15567 13:55:07.465797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15568 13:55:07.466257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15570 13:55:07.501278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15572 13:55:07.501750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15573 13:55:07.539703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15574 13:55:07.540102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15576 13:55:07.575930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15577 13:55:07.576388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15579 13:55:07.611748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15581 13:55:07.612305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15582 13:55:07.647035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15583 13:55:07.647505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15585 13:55:07.681978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15586 13:55:07.682418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15588 13:55:07.719333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15590 13:55:07.719808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15591 13:55:07.755017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15592 13:55:07.755404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15594 13:55:07.791312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15595 13:55:07.791667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15597 13:55:07.832192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15598 13:55:07.832557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15600 13:55:07.867403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15601 13:55:07.867804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15603 13:55:07.903181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15604 13:55:07.903553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15606 13:55:07.937714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15608 13:55:07.938329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15609 13:55:07.972348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15610 13:55:07.972749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15612 13:55:08.007138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15613 13:55:08.007527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15615 13:55:08.042010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15616 13:55:08.042379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15618 13:55:08.077238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15620 13:55:08.077706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15621 13:55:08.112211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15622 13:55:08.112687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15624 13:55:08.147222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15625 13:55:08.147693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15627 13:55:08.183578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15628 13:55:08.184032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15630 13:55:08.218533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15632 13:55:08.219107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15633 13:55:08.254020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15634 13:55:08.254446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15636 13:55:08.289948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15637 13:55:08.290367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15639 13:55:08.325236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15640 13:55:08.325663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15642 13:55:08.359604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15643 13:55:08.359988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15645 13:55:08.394704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15647 13:55:08.395179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15648 13:55:08.429259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15650 13:55:08.429734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15651 13:55:08.465409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15652 13:55:08.465825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15654 13:55:08.500896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15655 13:55:08.501332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15657 13:55:08.536278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15658 13:55:08.536718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15660 13:55:08.571968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15661 13:55:08.572387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15663 13:55:08.607857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15664 13:55:08.608321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15666 13:55:08.643787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15667 13:55:08.644230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15669 13:55:08.679632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15670 13:55:08.680073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15672 13:55:08.715439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15673 13:55:08.715828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15675 13:55:08.751611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15677 13:55:08.752048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15678 13:55:08.787057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15680 13:55:08.787502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15681 13:55:08.821974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15682 13:55:08.822428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15684 13:55:08.857458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15685 13:55:08.857903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15687 13:55:08.892523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15689 13:55:08.893060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15690 13:55:08.927119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15691 13:55:08.927582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15693 13:55:08.961801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15694 13:55:08.962209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15696 13:55:08.997246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15698 13:55:08.997773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15699 13:55:09.032959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15700 13:55:09.033316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15702 13:55:09.067801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15703 13:55:09.068156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15705 13:55:09.103139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15707 13:55:09.103456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15708 13:55:09.137703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15709 13:55:09.138109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15711 13:55:09.172342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15712 13:55:09.172759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15714 13:55:09.207374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15715 13:55:09.207788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15717 13:55:09.243019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15718 13:55:09.243441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15720 13:55:09.278548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15722 13:55:09.279018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15723 13:55:09.315128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15724 13:55:09.315553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15726 13:55:09.349901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15728 13:55:09.350538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15729 13:55:09.385179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15730 13:55:09.385638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15732 13:55:09.420338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15734 13:55:09.420920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15735 13:55:09.455779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15736 13:55:09.456214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15738 13:55:09.490871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15739 13:55:09.491280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15741 13:55:09.525866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15743 13:55:09.526329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15744 13:55:09.561281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15745 13:55:09.561688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15747 13:55:09.596686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15748 13:55:09.597009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15750 13:55:09.631521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15751 13:55:09.631818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15753 13:55:09.666891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15754 13:55:09.667279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15756 13:55:09.701337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15757 13:55:09.701690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15759 13:55:09.735581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15760 13:55:09.735965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15762 13:55:09.769511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15764 13:55:09.770095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15765 13:55:09.804003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15767 13:55:09.804513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15768 13:55:09.838955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15769 13:55:09.839329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15771 13:55:09.873697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15773 13:55:09.874173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15774 13:55:09.907565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15776 13:55:09.908017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15777 13:55:09.942047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15779 13:55:09.942491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15780 13:55:09.976952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15781 13:55:09.977333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15783 13:55:10.011574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15784 13:55:10.011929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15786 13:55:10.053783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15788 13:55:10.054218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15789 13:55:10.088523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15791 13:55:10.088977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15792 13:55:10.123247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15794 13:55:10.123674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15795 13:55:10.158931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15796 13:55:10.159291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15798 13:55:10.193504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15800 13:55:10.193975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15801 13:55:10.227753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15803 13:55:10.228198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15804 13:55:10.263218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15805 13:55:10.263653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15807 13:55:10.298138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15808 13:55:10.298579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15810 13:55:10.341812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15812 13:55:10.342391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15813 13:55:10.392843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15814 13:55:10.393287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15816 13:55:10.445335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15817 13:55:10.445766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15819 13:55:10.497473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15820 13:55:10.497864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15822 13:55:10.532986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15824 13:55:10.533352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15825 13:55:10.565864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15827 13:55:10.566501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15828 13:55:10.600463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15829 13:55:10.600954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15831 13:55:10.634062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15832 13:55:10.634484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15834 13:55:10.667528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15835 13:55:10.667964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15837 13:55:10.701239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15838 13:55:10.701681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15840 13:55:10.735306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15842 13:55:10.735778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15843 13:55:10.768915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15844 13:55:10.769321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15846 13:55:10.802491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15848 13:55:10.802939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15849 13:55:10.835938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15850 13:55:10.836350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15852 13:55:10.869570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15853 13:55:10.869997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15855 13:55:10.903558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15856 13:55:10.903975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15858 13:55:10.936666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15860 13:55:10.937233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15861 13:55:10.969794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15862 13:55:10.970252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15864 13:55:11.003862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15865 13:55:11.004271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15867 13:55:11.037873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15869 13:55:11.038349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15870 13:55:11.071672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15871 13:55:11.072117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15873 13:55:11.105870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15874 13:55:11.106289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15876 13:55:11.139421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15877 13:55:11.139883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15879 13:55:11.172904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15880 13:55:11.173328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15882 13:55:11.206103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15884 13:55:11.206661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15885 13:55:11.243850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15886 13:55:11.244284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15888 13:55:11.277703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15889 13:55:11.278098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15891 13:55:11.312107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15893 13:55:11.312653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15894 13:55:11.345355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15895 13:55:11.345796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15897 13:55:11.380057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15898 13:55:11.380525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15900 13:55:11.413578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15902 13:55:11.414121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15903 13:55:11.447627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15905 13:55:11.448170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15906 13:55:11.480603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15907 13:55:11.481058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15909 13:55:11.514258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15910 13:55:11.514679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15912 13:55:11.547587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15913 13:55:11.548024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15915 13:55:11.581890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15916 13:55:11.582350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15918 13:55:11.615215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15919 13:55:11.615680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15921 13:55:11.648417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15922 13:55:11.648881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15924 13:55:11.684025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15925 13:55:11.684462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15927 13:55:11.717726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15928 13:55:11.718173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15930 13:55:11.751634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15931 13:55:11.752068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15933 13:55:11.785233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15934 13:55:11.785599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15936 13:55:11.818879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
15937 13:55:11.819229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
15939 13:55:11.852810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
15941 13:55:11.853383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
15942 13:55:11.886489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
15944 13:55:11.887149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
15945 13:55:11.920296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
15946 13:55:11.920714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
15948 13:55:11.954436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
15950 13:55:11.955049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
15951 13:55:11.994971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
15952 13:55:11.995348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
15954 13:55:12.031825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
15955 13:55:12.032365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
15957 13:55:12.068092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
15958 13:55:12.068557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
15960 13:55:12.156942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
15962 13:55:12.157410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
15963 13:55:12.200401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
15964 13:55:12.200826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
15966 13:55:12.235281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
15968 13:55:12.235718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
15969 13:55:12.269653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
15970 13:55:12.269972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
15972 13:55:12.304164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
15973 13:55:12.304530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
15975 13:55:12.339285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
15977 13:55:12.339655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
15978 13:55:12.373667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
15979 13:55:12.374060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
15981 13:55:12.408597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
15982 13:55:12.408975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
15984 13:55:12.443635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
15986 13:55:12.444009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
15987 13:55:12.479587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
15989 13:55:12.480064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
15990 13:55:12.515301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
15991 13:55:12.515762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
15993 13:55:12.551771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
15995 13:55:12.552333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
15996 13:55:12.589182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
15997 13:55:12.589639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
15999 13:55:12.630136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
16000 13:55:12.630517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
16002 13:55:12.668612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
16003 13:55:12.668989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
16005 13:55:12.705689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
16006 13:55:12.706181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
16008 13:55:12.738597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
16009 13:55:12.739036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
16011 13:55:12.771324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
16012 13:55:12.771833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
16014 13:55:12.802054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
16015 13:55:12.802545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
16017 13:55:12.833943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
16018 13:55:12.834355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
16020 13:55:12.878063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
16021 13:55:12.878492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
16023 13:55:12.915653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
16024 13:55:12.916109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
16026 13:55:12.951283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
16027 13:55:12.951718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
16029 13:55:12.986634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
16031 13:55:12.987300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
16032 13:55:13.022514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
16034 13:55:13.023169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
16035 13:55:13.058950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
16036 13:55:13.059460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
16038 13:55:13.093814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
16040 13:55:13.094485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
16041 13:55:13.133642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
16042 13:55:13.134165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
16044 13:55:13.168885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
16045 13:55:13.169316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
16047 13:55:13.203579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
16048 13:55:13.204004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
16050 13:55:13.237845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
16051 13:55:13.238278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
16053 13:55:13.272960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
16055 13:55:13.273535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
16056 13:55:13.307887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
16057 13:55:13.308344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
16059 13:55:13.343657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
16061 13:55:13.344123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
16062 13:55:13.378227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
16064 13:55:13.378704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
16065 13:55:13.413882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
16066 13:55:13.414364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
16068 13:55:13.449678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
16070 13:55:13.450161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
16071 13:55:13.485272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
16073 13:55:13.485821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
16074 13:55:13.520437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
16076 13:55:13.520879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
16077 13:55:13.555911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16079 13:55:13.556361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16080 13:55:13.591663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16082 13:55:13.592235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16083 13:55:13.627758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16084 13:55:13.628214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16086 13:55:13.662866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16088 13:55:13.663430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16089 13:55:13.697921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16090 13:55:13.698355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16092 13:55:13.733175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16093 13:55:13.733549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16095 13:55:13.768651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16096 13:55:13.769062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16098 13:55:13.805601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16099 13:55:13.805939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16101 13:55:13.841768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16102 13:55:13.842149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16104 13:55:13.877956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16105 13:55:13.878277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16107 13:55:13.913540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16109 13:55:13.914142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16110 13:55:13.949524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16111 13:55:13.950000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16113 13:55:13.986042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16114 13:55:13.986459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16116 13:55:14.021720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16117 13:55:14.022159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16119 13:55:14.057542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16120 13:55:14.057977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16122 13:55:14.093120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16123 13:55:14.093581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16125 13:55:14.129513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16127 13:55:14.129981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16128 13:55:14.164065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16130 13:55:14.164475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16131 13:55:14.199137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16132 13:55:14.199512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16134 13:55:14.234487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16136 13:55:14.235104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16137 13:55:14.269495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16138 13:55:14.269876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16140 13:55:14.304274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16141 13:55:14.304684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16143 13:55:14.339543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16144 13:55:14.340019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16146 13:55:14.374201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16148 13:55:14.374786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16149 13:55:14.410293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16151 13:55:14.410912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16152 13:55:14.448412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16153 13:55:14.448715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16155 13:55:14.484433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16156 13:55:14.484850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16158 13:55:14.520797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16160 13:55:14.521269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16161 13:55:14.556766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16162 13:55:14.557209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16164 13:55:14.593550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16165 13:55:14.594008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16167 13:55:14.629736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16169 13:55:14.630199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16170 13:55:14.665100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16171 13:55:14.665578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16173 13:55:14.700305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16174 13:55:14.700769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16176 13:55:14.735609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16178 13:55:14.736207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16179 13:55:14.770742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16181 13:55:14.771233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16182 13:55:14.807108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16183 13:55:14.807485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16185 13:55:14.848455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16186 13:55:14.848910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16188 13:55:14.883645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16189 13:55:14.884094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16191 13:55:14.918568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16193 13:55:14.919235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16194 13:55:14.953370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16195 13:55:14.953807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16197 13:55:14.990046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16198 13:55:14.990449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16200 13:55:15.025543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16201 13:55:15.025944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16203 13:55:15.060308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16204 13:55:15.060712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16206 13:55:15.095820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16207 13:55:15.096241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16209 13:55:15.131226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16210 13:55:15.131652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16212 13:55:15.166236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16214 13:55:15.166713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16215 13:55:15.201010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16217 13:55:15.201487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16218 13:55:15.235501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16220 13:55:15.236185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16221 13:55:15.270599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16223 13:55:15.271260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16224 13:55:15.306009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16226 13:55:15.306483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16227 13:55:15.341971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16229 13:55:15.342452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16230 13:55:15.379495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16232 13:55:15.379941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16233 13:55:15.421818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16234 13:55:15.422237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16236 13:55:15.460448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16237 13:55:15.460899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16239 13:55:15.500809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16240 13:55:15.501230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16242 13:55:15.537823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16243 13:55:15.538197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16245 13:55:15.571879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16246 13:55:15.572228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16248 13:55:15.605198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16249 13:55:15.605569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16251 13:55:15.636572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16252 13:55:15.636975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16254 13:55:15.673925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16255 13:55:15.674293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16257 13:55:15.706469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16259 13:55:15.706879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16260 13:55:15.739136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16261 13:55:15.739547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16263 13:55:15.773253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16264 13:55:15.773627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16266 13:55:15.805695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16268 13:55:15.806072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16269 13:55:15.840879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16270 13:55:15.841148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16272 13:55:15.876495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16273 13:55:15.876900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16275 13:55:15.911775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16276 13:55:15.912195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16278 13:55:15.947451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16280 13:55:15.948024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16281 13:55:15.983223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16282 13:55:15.983614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16284 13:55:16.018748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16285 13:55:16.019136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16287 13:55:16.053475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16288 13:55:16.053896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16290 13:55:16.089159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16291 13:55:16.089570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16293 13:55:16.125856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16295 13:55:16.126311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16296 13:55:16.164796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16297 13:55:16.165222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16299 13:55:16.201598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16300 13:55:16.202177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16302 13:55:16.239361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16303 13:55:16.239759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16305 13:55:16.274439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16307 13:55:16.275071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16308 13:55:16.309462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16309 13:55:16.309921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16311 13:55:16.344929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16313 13:55:16.345401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16314 13:55:16.379373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16316 13:55:16.379958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16317 13:55:16.414045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16318 13:55:16.414502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16320 13:55:16.449382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16321 13:55:16.449850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16323 13:55:16.483741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16324 13:55:16.484194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16326 13:55:16.519281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16328 13:55:16.519845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16329 13:55:16.553087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16330 13:55:16.553523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16332 13:55:16.587431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16333 13:55:16.587865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16335 13:55:16.624006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16337 13:55:16.624561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16338 13:55:16.655603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16340 13:55:16.656170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16341 13:55:16.687422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16342 13:55:16.687892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16344 13:55:16.720184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16346 13:55:16.720732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16347 13:55:16.752652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16348 13:55:16.753092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16350 13:55:16.787729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16351 13:55:16.788203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16353 13:55:16.821767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16355 13:55:16.822185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16356 13:55:16.853306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16357 13:55:16.853788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16359 13:55:16.885363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16361 13:55:16.885826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16362 13:55:16.916935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16363 13:55:16.917355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16365 13:55:16.949094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16366 13:55:16.949580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16368 13:55:16.980669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16370 13:55:16.981240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16371 13:55:17.011805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16373 13:55:17.012447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16374 13:55:17.044045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16376 13:55:17.044615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16377 13:55:17.075898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16379 13:55:17.076469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16380 13:55:17.107774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16381 13:55:17.108183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16383 13:55:17.140442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16385 13:55:17.140894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16386 13:55:17.172656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16388 13:55:17.173077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16389 13:55:17.205811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16390 13:55:17.206263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16392 13:55:17.238025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16393 13:55:17.238418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16395 13:55:17.270063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16397 13:55:17.270505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16398 13:55:17.303103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16400 13:55:17.303525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16401 13:55:17.335286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16403 13:55:17.335824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16404 13:55:17.366665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16405 13:55:17.367084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16407 13:55:17.397387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16408 13:55:17.397820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16410 13:55:17.428086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16412 13:55:17.428552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16413 13:55:17.460071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16414 13:55:17.460516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16416 13:55:17.493722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16417 13:55:17.494145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16419 13:55:17.526171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16421 13:55:17.526740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16422 13:55:17.562264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16424 13:55:17.563066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16425 13:55:17.599837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16427 13:55:17.600408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16428 13:55:17.635222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16429 13:55:17.635680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16431 13:55:17.673026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16432 13:55:17.673508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16434 13:55:17.711703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16435 13:55:17.712118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16437 13:55:17.755936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16439 13:55:17.756323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16440 13:55:17.790951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16441 13:55:17.791288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16443 13:55:17.827238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16444 13:55:17.827629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16446 13:55:17.859954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16447 13:55:17.860319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16449 13:55:17.893140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16450 13:55:17.893566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16452 13:55:17.927975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16453 13:55:17.928435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16455 13:55:17.959385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16457 13:55:17.959756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16458 13:55:17.990880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16460 13:55:17.991343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16461 13:55:18.023925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16463 13:55:18.024372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16464 13:55:18.055481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16465 13:55:18.055980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16467 13:55:18.088336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16468 13:55:18.088882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16470 13:55:18.124633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16471 13:55:18.125101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16473 13:55:18.156941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16475 13:55:18.157520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16476 13:55:18.189257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16478 13:55:18.189842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16479 13:55:18.223149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16480 13:55:18.223601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16482 13:55:18.254347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16484 13:55:18.254922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16485 13:55:18.287303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16487 13:55:18.287943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16488 13:55:18.319385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16490 13:55:18.320013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16491 13:55:18.351122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16493 13:55:18.351700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16494 13:55:18.385237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16496 13:55:18.385791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16497 13:55:18.416812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16498 13:55:18.417244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16500 13:55:18.448419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16501 13:55:18.448801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16503 13:55:18.481409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16505 13:55:18.481972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16506 13:55:18.514699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16508 13:55:18.515311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16509 13:55:18.547072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16511 13:55:18.547607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16512 13:55:18.581497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16513 13:55:18.581969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16515 13:55:18.613928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16516 13:55:18.614398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16518 13:55:18.648175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16520 13:55:18.648637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16521 13:55:18.683139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16522 13:55:18.683553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16524 13:55:18.715582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16525 13:55:18.715997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16527 13:55:18.749432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16528 13:55:18.749938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16530 13:55:18.781772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16531 13:55:18.782252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16533 13:55:18.815143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16535 13:55:18.815782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16536 13:55:18.848828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16537 13:55:18.849318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16539 13:55:18.881285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16541 13:55:18.881715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16542 13:55:18.921488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16543 13:55:18.921992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16545 13:55:18.959409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16547 13:55:18.959955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16548 13:55:18.991530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16549 13:55:18.991996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16551 13:55:19.026002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16552 13:55:19.026498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16554 13:55:19.059657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16555 13:55:19.060132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16557 13:55:19.098140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16559 13:55:19.098730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16560 13:55:19.133271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16561 13:55:19.133682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16563 13:55:19.165350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16565 13:55:19.165937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16566 13:55:19.201985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16568 13:55:19.202623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16569 13:55:19.236320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16570 13:55:19.236807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16572 13:55:19.269632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16573 13:55:19.270072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16575 13:55:19.305841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16577 13:55:19.306400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16578 13:55:19.337709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16580 13:55:19.338180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16581 13:55:19.371647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16582 13:55:19.372132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16584 13:55:19.407048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16586 13:55:19.407638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16587 13:55:19.438288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16589 13:55:19.438867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16590 13:55:19.473374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16591 13:55:19.473855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16593 13:55:19.506179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16595 13:55:19.506767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16596 13:55:19.552839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16598 13:55:19.553350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16599 13:55:19.599609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16600 13:55:19.599988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16602 13:55:19.631285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16604 13:55:19.631647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16605 13:55:19.663419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16606 13:55:19.663902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16608 13:55:19.695707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16609 13:55:19.696119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16611 13:55:19.727408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16613 13:55:19.727954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16614 13:55:19.759981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16616 13:55:19.760613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16617 13:55:19.791310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16618 13:55:19.791785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16620 13:55:19.822390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16622 13:55:19.822875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16623 13:55:19.856017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16624 13:55:19.856366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16626 13:55:19.888780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16627 13:55:19.889128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16629 13:55:19.922111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16631 13:55:19.922808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16632 13:55:19.956168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16634 13:55:19.956801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16635 13:55:19.989621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16636 13:55:19.990098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16638 13:55:20.027349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16639 13:55:20.027834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16641 13:55:20.061225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16642 13:55:20.061660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16644 13:55:20.097007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16645 13:55:20.097397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16647 13:55:20.137729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16648 13:55:20.138217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16650 13:55:20.169890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16651 13:55:20.170391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16653 13:55:20.201856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16654 13:55:20.202342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16656 13:55:20.235440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16658 13:55:20.235791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16659 13:55:20.267204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16661 13:55:20.267925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16662 13:55:20.299067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16663 13:55:20.299498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16665 13:55:20.330877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16667 13:55:20.331332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16668 13:55:20.361822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16669 13:55:20.362250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16671 13:55:20.395057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16672 13:55:20.395492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16674 13:55:20.431449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16675 13:55:20.431873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16677 13:55:20.468491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16678 13:55:20.468996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16680 13:55:20.503151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16681 13:55:20.503585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16683 13:55:20.535490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16685 13:55:20.535979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16686 13:55:20.567202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16687 13:55:20.567574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16689 13:55:20.599209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16690 13:55:20.599599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16692 13:55:20.631358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16693 13:55:20.631819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16695 13:55:20.663620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16697 13:55:20.664251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16698 13:55:20.695595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16700 13:55:20.696143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16701 13:55:20.727581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16702 13:55:20.728022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16704 13:55:20.759529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16705 13:55:20.759975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16707 13:55:20.791675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16708 13:55:20.792074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16710 13:55:20.823993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16711 13:55:20.824408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16713 13:55:20.856150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16715 13:55:20.856583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16716 13:55:20.888338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16718 13:55:20.888759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16719 13:55:20.921053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16721 13:55:20.921508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16722 13:55:20.953363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16724 13:55:20.953832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16725 13:55:20.985047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16727 13:55:20.985610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16728 13:55:21.017191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16729 13:55:21.017662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16731 13:55:21.049157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16732 13:55:21.049614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16734 13:55:21.080874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16735 13:55:21.081334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16737 13:55:21.112766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16739 13:55:21.113238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16740 13:55:21.144755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16741 13:55:21.145167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16743 13:55:21.176659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16744 13:55:21.177079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16746 13:55:21.208524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16747 13:55:21.209009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16749 13:55:21.240698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16750 13:55:21.241172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16752 13:55:21.273096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16753 13:55:21.273555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16755 13:55:21.305090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16756 13:55:21.305566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16758 13:55:21.337440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16759 13:55:21.337929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16761 13:55:21.369877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16762 13:55:21.370297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16764 13:55:21.401974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16765 13:55:21.402412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16767 13:55:21.434432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16769 13:55:21.434910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16770 13:55:21.465962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16772 13:55:21.466425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16773 13:55:21.497498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16774 13:55:21.497883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16776 13:55:21.529942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16777 13:55:21.530333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16779 13:55:21.563195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16780 13:55:21.563634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16782 13:55:21.595776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16784 13:55:21.596211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16785 13:55:21.627622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16786 13:55:21.628004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16788 13:55:21.659824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16790 13:55:21.660265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16791 13:55:21.691841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16792 13:55:21.692277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16794 13:55:21.723587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16795 13:55:21.724018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16797 13:55:21.755183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16798 13:55:21.755618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16800 13:55:21.786765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16801 13:55:21.787156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16803 13:55:21.818732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16804 13:55:21.819164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16806 13:55:21.850758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16808 13:55:21.851307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16809 13:55:21.882373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16811 13:55:21.882916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16812 13:55:21.913999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16813 13:55:21.914437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16815 13:55:21.945476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16817 13:55:21.946024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16818 13:55:21.976463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16819 13:55:21.976908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16821 13:55:22.008145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16822 13:55:22.008602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16824 13:55:22.040046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16825 13:55:22.040457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16827 13:55:22.071343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16828 13:55:22.071742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16830 13:55:22.102027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16831 13:55:22.102428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16833 13:55:22.133160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16834 13:55:22.133594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16836 13:55:22.164867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16837 13:55:22.165312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16839 13:55:22.196578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16841 13:55:22.197176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16842 13:55:22.227793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16844 13:55:22.228361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16845 13:55:22.259882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16846 13:55:22.260321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16848 13:55:22.291349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16849 13:55:22.291785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16851 13:55:22.322483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16853 13:55:22.323058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16854 13:55:22.354023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16856 13:55:22.354561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16857 13:55:22.384624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16858 13:55:22.385052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16860 13:55:22.417284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16861 13:55:22.417704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16863 13:55:22.448497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16864 13:55:22.448892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16866 13:55:22.479456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16867 13:55:22.479840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16869 13:55:22.511413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16871 13:55:22.512018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16872 13:55:22.543269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16874 13:55:22.543717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16875 13:55:22.575317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16877 13:55:22.575765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16878 13:55:22.608375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16879 13:55:22.608812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16881 13:55:22.641099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16882 13:55:22.641543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16884 13:55:22.673502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16885 13:55:22.673901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16887 13:55:22.705664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16888 13:55:22.706118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16890 13:55:22.737528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16892 13:55:22.738107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16893 13:55:22.770081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16894 13:55:22.770473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16896 13:55:22.802115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16897 13:55:22.802577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16899 13:55:22.834231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16901 13:55:22.834788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16902 13:55:22.867208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16904 13:55:22.867760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16905 13:55:22.899237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16906 13:55:22.899660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16908 13:55:22.931468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16910 13:55:22.931937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16911 13:55:22.963527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16912 13:55:22.963978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16914 13:55:22.995578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16916 13:55:22.996012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16917 13:55:23.027855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16918 13:55:23.028304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16920 13:55:23.060568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16922 13:55:23.061136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16923 13:55:23.092565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16925 13:55:23.093135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16926 13:55:23.124958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16928 13:55:23.125533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16929 13:55:23.156889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16931 13:55:23.157440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16932 13:55:23.188926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16934 13:55:23.189490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16935 13:55:23.220561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16936 13:55:23.221005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
16938 13:55:23.252194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
16940 13:55:23.252758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
16941 13:55:23.284504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
16942 13:55:23.284960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
16944 13:55:23.316428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
16945 13:55:23.316891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
16947 13:55:23.348338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
16948 13:55:23.348790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
16950 13:55:23.380169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
16952 13:55:23.380717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
16953 13:55:23.411981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
16954 13:55:23.412428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
16956 13:55:23.443431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
16957 13:55:23.443874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
16959 13:55:23.475094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
16960 13:55:23.475562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
16962 13:55:23.507117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
16964 13:55:23.507689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
16965 13:55:23.538396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
16967 13:55:23.538985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
16968 13:55:23.571385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
16970 13:55:23.571987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
16971 13:55:23.603429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
16973 13:55:23.604030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
16974 13:55:23.635393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
16976 13:55:23.635957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
16977 13:55:23.667018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
16979 13:55:23.667609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
16980 13:55:23.699300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
16982 13:55:23.699911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
16983 13:55:23.731441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
16984 13:55:23.731852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
16986 13:55:23.763382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
16987 13:55:23.763803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
16989 13:55:23.795534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
16991 13:55:23.795980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
16992 13:55:23.828060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
16994 13:55:23.828511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
16995 13:55:23.860373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
16997 13:55:23.860842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
16998 13:55:23.896563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
17000 13:55:23.897000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
17001 13:55:23.932181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
17002 13:55:23.932588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
17004 13:55:23.968110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
17005 13:55:23.968526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
17007 13:55:24.003836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
17009 13:55:24.004402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
17010 13:55:24.039852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
17011 13:55:24.040321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
17013 13:55:24.075110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
17014 13:55:24.075465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
17016 13:55:24.111487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
17017 13:55:24.111780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
17019 13:55:24.147015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
17020 13:55:24.147293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
17022 13:55:24.181362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
17023 13:55:24.181685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
17025 13:55:24.215955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
17026 13:55:24.216315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
17028 13:55:24.251152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
17029 13:55:24.251519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
17031 13:55:24.285945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
17032 13:55:24.286329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
17034 13:55:24.320599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
17036 13:55:24.321057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
17037 13:55:24.356037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
17039 13:55:24.356513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
17040 13:55:24.395815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
17041 13:55:24.396167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
17043 13:55:24.431112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
17044 13:55:24.431464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
17046 13:55:24.466024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
17047 13:55:24.466377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
17049 13:55:24.500461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
17050 13:55:24.500834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
17052 13:55:24.535215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
17053 13:55:24.535498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
17055 13:55:24.569795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
17056 13:55:24.570082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
17058 13:55:24.604525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
17060 13:55:24.605028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
17061 13:55:24.639900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
17063 13:55:24.640478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
17064 13:55:24.674860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
17065 13:55:24.675309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
17067 13:55:24.709411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
17068 13:55:24.709795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
17070 13:55:24.744454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
17071 13:55:24.744740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
17073 13:55:24.779228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
17074 13:55:24.779586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
17076 13:55:24.813955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17077 13:55:24.814315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17079 13:55:24.849206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17080 13:55:24.849680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17082 13:55:24.884373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17083 13:55:24.884816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17085 13:55:24.919735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17086 13:55:24.920065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17088 13:55:24.955477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17089 13:55:24.955760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17091 13:55:24.991011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17092 13:55:24.991360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17094 13:55:25.027100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17095 13:55:25.027447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17097 13:55:25.062749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17098 13:55:25.063102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17100 13:55:25.097421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17101 13:55:25.097795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17103 13:55:25.132184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17104 13:55:25.132564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17106 13:55:25.167606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17107 13:55:25.167957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17109 13:55:25.202988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17110 13:55:25.203337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17112 13:55:25.238791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17113 13:55:25.239183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17115 13:55:25.274157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17116 13:55:25.274567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17118 13:55:25.309260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17119 13:55:25.309693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17121 13:55:25.343835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17123 13:55:25.344298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17124 13:55:25.379214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17125 13:55:25.379630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17127 13:55:25.415437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17129 13:55:25.415898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17130 13:55:25.451742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17132 13:55:25.452198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17133 13:55:25.488746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17134 13:55:25.489160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17136 13:55:25.526883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17138 13:55:25.527344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17139 13:55:25.564919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17141 13:55:25.565377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17142 13:55:25.601029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17143 13:55:25.601467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17145 13:55:25.636422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17147 13:55:25.636878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17148 13:55:25.672112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17149 13:55:25.672525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17151 13:55:25.707469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17152 13:55:25.707858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17154 13:55:25.742083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17155 13:55:25.742435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17157 13:55:25.777104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17158 13:55:25.777469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17160 13:55:25.811824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17161 13:55:25.812234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17163 13:55:25.847181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17164 13:55:25.847661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17166 13:55:25.882504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17168 13:55:25.882964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17169 13:55:25.917237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17170 13:55:25.917701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17172 13:55:25.952260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17173 13:55:25.952682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17175 13:55:25.987245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17177 13:55:25.987718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17178 13:55:26.022371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17180 13:55:26.022848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17181 13:55:26.057189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17182 13:55:26.057613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17184 13:55:26.092111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17185 13:55:26.092575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17187 13:55:26.127250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17188 13:55:26.127706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17190 13:55:26.162998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17192 13:55:26.163556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17193 13:55:26.197690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17194 13:55:26.198170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17196 13:55:26.232880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17198 13:55:26.233435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17199 13:55:26.268620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17201 13:55:26.269186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17202 13:55:26.303681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17203 13:55:26.304128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17205 13:55:26.339212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17207 13:55:26.339777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17208 13:55:26.375258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17209 13:55:26.375702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17211 13:55:26.411024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17212 13:55:26.411459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17214 13:55:26.445870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17215 13:55:26.446253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17217 13:55:26.480467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17218 13:55:26.480820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17220 13:55:26.515563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17221 13:55:26.515918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17223 13:55:26.551171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17224 13:55:26.551520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17226 13:55:26.585709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17227 13:55:26.586080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17229 13:55:26.620369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17231 13:55:26.620661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17232 13:55:26.655065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17233 13:55:26.655467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17235 13:55:26.689878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17236 13:55:26.690245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17238 13:55:26.725165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17239 13:55:26.725578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17241 13:55:26.760008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17242 13:55:26.760434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17244 13:55:26.795022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17245 13:55:26.795484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17247 13:55:26.829982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17248 13:55:26.830449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17250 13:55:26.864553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17252 13:55:26.865026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17253 13:55:26.899214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17254 13:55:26.899637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17256 13:55:26.933714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17258 13:55:26.934188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17259 13:55:26.968075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17260 13:55:26.968523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17262 13:55:27.003353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17264 13:55:27.003824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17265 13:55:27.037761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17267 13:55:27.038235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17268 13:55:27.072597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17269 13:55:27.073016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17271 13:55:27.107771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17272 13:55:27.108193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17274 13:55:27.142322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17276 13:55:27.142787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17277 13:55:27.177112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17278 13:55:27.177475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17280 13:55:27.211999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17281 13:55:27.212345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17283 13:55:27.247439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17284 13:55:27.247796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17286 13:55:27.283062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17287 13:55:27.283409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17289 13:55:27.317189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17290 13:55:27.317537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17292 13:55:27.351633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17293 13:55:27.351984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17295 13:55:27.385776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17296 13:55:27.386145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17298 13:55:27.420174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17299 13:55:27.420536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17301 13:55:27.455075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17302 13:55:27.455434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17304 13:55:27.490511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17306 13:55:27.490972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17307 13:55:27.525136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17308 13:55:27.525484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17310 13:55:27.559389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17311 13:55:27.559751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17313 13:55:27.593722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17314 13:55:27.594141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17316 13:55:27.631337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17318 13:55:27.631898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17319 13:55:27.665507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17320 13:55:27.666059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17322 13:55:27.699972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17323 13:55:27.700361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17325 13:55:27.735398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17326 13:55:27.735734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17328 13:55:27.770060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17329 13:55:27.770476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17331 13:55:27.805043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17332 13:55:27.805484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17334 13:55:27.841095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17336 13:55:27.841571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17337 13:55:27.876164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17338 13:55:27.876548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17340 13:55:27.911035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17341 13:55:27.911391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17343 13:55:27.945433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17344 13:55:27.945787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17346 13:55:27.979679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17347 13:55:27.980032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17349 13:55:28.015238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17351 13:55:28.015724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17352 13:55:28.049881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17353 13:55:28.050319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17355 13:55:28.086719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17356 13:55:28.087128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17358 13:55:28.119061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17359 13:55:28.119485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17361 13:55:28.151086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17362 13:55:28.151497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17364 13:55:28.183220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17365 13:55:28.183619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17367 13:55:28.214898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17368 13:55:28.215295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17370 13:55:28.250685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17371 13:55:28.251098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17373 13:55:28.285837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17374 13:55:28.286251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17376 13:55:28.321367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17377 13:55:28.321776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17379 13:55:28.357042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17381 13:55:28.357474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17382 13:55:28.392717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17383 13:55:28.393129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17385 13:55:28.428279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17386 13:55:28.428681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17388 13:55:28.463870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17389 13:55:28.464283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17391 13:55:28.499341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17392 13:55:28.499757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17394 13:55:28.534364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17396 13:55:28.534809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17397 13:55:28.570008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17399 13:55:28.570480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17400 13:55:28.607177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17401 13:55:28.607594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17403 13:55:28.642318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17405 13:55:28.642794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17406 13:55:28.677946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17407 13:55:28.678389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17409 13:55:28.713892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17410 13:55:28.714309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17412 13:55:28.749490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17413 13:55:28.749990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17415 13:55:28.784584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17416 13:55:28.785066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17418 13:55:28.819622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17419 13:55:28.819978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17421 13:55:28.854530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17423 13:55:28.855118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17424 13:55:28.889453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17426 13:55:28.889943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17427 13:55:28.924414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17428 13:55:28.924769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17430 13:55:28.959403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17432 13:55:28.959847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17433 13:55:28.994011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17435 13:55:28.994485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17436 13:55:29.029437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17437 13:55:29.029863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17439 13:55:29.064743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17441 13:55:29.065194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17442 13:55:29.099451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17444 13:55:29.099901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17445 13:55:29.135184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17446 13:55:29.135597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17448 13:55:29.170448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17450 13:55:29.170908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17451 13:55:29.205520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17452 13:55:29.206098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17454 13:55:29.243533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17456 13:55:29.244101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17457 13:55:29.278710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17458 13:55:29.279107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17460 13:55:29.313908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17461 13:55:29.314212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17463 13:55:29.350926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17464 13:55:29.351273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17466 13:55:29.386047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17467 13:55:29.386392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17469 13:55:29.422509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17471 13:55:29.423011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17472 13:55:29.455639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17473 13:55:29.456070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17475 13:55:29.487203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17476 13:55:29.487633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17478 13:55:29.519160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17480 13:55:29.519590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17481 13:55:29.551035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17482 13:55:29.551426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17484 13:55:29.583173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17485 13:55:29.583583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17487 13:55:29.615618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17488 13:55:29.616046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17490 13:55:29.648095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17491 13:55:29.648532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17493 13:55:29.679868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17494 13:55:29.680296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17496 13:55:29.713043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17497 13:55:29.713468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17499 13:55:29.745599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17500 13:55:29.746071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17502 13:55:29.777985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17503 13:55:29.778434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17505 13:55:29.810903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17506 13:55:29.811361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17508 13:55:29.842798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17509 13:55:29.843256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17511 13:55:29.875175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17512 13:55:29.875640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17514 13:55:29.907285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17515 13:55:29.907731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17517 13:55:29.939660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17519 13:55:29.940232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17520 13:55:29.971565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17521 13:55:29.972024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17523 13:55:30.003740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17525 13:55:30.004286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17526 13:55:30.035891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17528 13:55:30.036439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17529 13:55:30.068008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17531 13:55:30.068571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17532 13:55:30.099867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17533 13:55:30.100308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17535 13:55:30.131954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17537 13:55:30.132551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17538 13:55:30.164096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17540 13:55:30.164542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17541 13:55:30.195773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17542 13:55:30.196169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17544 13:55:30.227805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17545 13:55:30.228204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17547 13:55:30.260063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17549 13:55:30.260508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17550 13:55:30.292383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17552 13:55:30.292838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17553 13:55:30.324676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17554 13:55:30.325110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17556 13:55:30.357018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17557 13:55:30.357508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17559 13:55:30.388815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17560 13:55:30.389227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17562 13:55:30.421382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17563 13:55:30.421877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17565 13:55:30.453323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17566 13:55:30.453827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17568 13:55:30.485227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17570 13:55:30.485697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17571 13:55:30.517099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17572 13:55:30.517525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17574 13:55:30.550330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17576 13:55:30.550799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17577 13:55:30.583382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17578 13:55:30.583853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17580 13:55:30.615151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17581 13:55:30.615533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17583 13:55:30.647331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17584 13:55:30.647779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17586 13:55:30.679062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17588 13:55:30.679537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17589 13:55:30.710384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17591 13:55:30.710843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17592 13:55:30.743545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17593 13:55:30.744000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17595 13:55:30.776268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17596 13:55:30.776720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17598 13:55:30.808914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17600 13:55:30.809459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17601 13:55:30.841177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17603 13:55:30.841644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17604 13:55:30.873594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17605 13:55:30.874087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17607 13:55:30.905861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17608 13:55:30.906327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17610 13:55:30.937921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17611 13:55:30.938384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17613 13:55:30.969781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17614 13:55:30.970244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17616 13:55:31.001853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17617 13:55:31.002317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17619 13:55:31.033551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17620 13:55:31.034023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17622 13:55:31.066064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17624 13:55:31.066684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17625 13:55:31.098099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17626 13:55:31.098548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17628 13:55:31.130111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17629 13:55:31.130552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17631 13:55:31.162599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17632 13:55:31.163048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17634 13:55:31.194483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17636 13:55:31.194938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17637 13:55:31.227192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17638 13:55:31.227654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17640 13:55:31.259564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17642 13:55:31.260341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17643 13:55:31.292031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17644 13:55:31.292499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17646 13:55:31.324213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17647 13:55:31.324672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17649 13:55:31.356052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17651 13:55:31.356625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17652 13:55:31.388141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17653 13:55:31.388555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17655 13:55:31.420849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17656 13:55:31.421319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17658 13:55:31.452753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17659 13:55:31.453227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17661 13:55:31.485206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17662 13:55:31.485669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17664 13:55:31.517791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17665 13:55:31.518254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17667 13:55:31.550047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17669 13:55:31.550598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17670 13:55:31.583239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17671 13:55:31.583719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17673 13:55:31.615734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17674 13:55:31.616177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17676 13:55:31.647745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17677 13:55:31.648131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17679 13:55:31.679713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17680 13:55:31.680121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17682 13:55:31.712331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17684 13:55:31.712761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17685 13:55:31.744843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17686 13:55:31.745242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17688 13:55:31.778110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17690 13:55:31.778659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17691 13:55:31.810567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17693 13:55:31.811101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17694 13:55:31.842461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17696 13:55:31.842989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17697 13:55:31.874696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17698 13:55:31.875188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17700 13:55:31.907359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17702 13:55:31.907917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17703 13:55:31.939294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17705 13:55:31.939727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17706 13:55:31.971402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17707 13:55:31.971797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17709 13:55:32.004154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17710 13:55:32.004598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17712 13:55:32.037011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17713 13:55:32.037480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17715 13:55:32.069385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17716 13:55:32.069824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17718 13:55:32.101877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17719 13:55:32.102305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17721 13:55:32.134285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17723 13:55:32.134752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17724 13:55:32.167369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17725 13:55:32.167818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17727 13:55:32.200142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17729 13:55:32.200691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17730 13:55:32.231949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17731 13:55:32.232428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17733 13:55:32.264026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17735 13:55:32.264576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17736 13:55:32.295972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17737 13:55:32.296456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17739 13:55:32.328029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17741 13:55:32.328589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17742 13:55:32.360200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17744 13:55:32.360842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17745 13:55:32.391917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17746 13:55:32.392396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17748 13:55:32.424658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17749 13:55:32.425056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17751 13:55:32.457706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17753 13:55:32.458137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17754 13:55:32.489810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17755 13:55:32.490240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17757 13:55:32.523632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17759 13:55:32.524272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17760 13:55:32.556766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17761 13:55:32.557220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17763 13:55:32.589418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17764 13:55:32.589879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17766 13:55:32.622871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17767 13:55:32.623328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17769 13:55:32.656076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17770 13:55:32.656551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17772 13:55:32.689555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17774 13:55:32.690125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17775 13:55:32.722874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17777 13:55:32.723500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17778 13:55:32.755356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17780 13:55:32.755916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17781 13:55:32.787472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17783 13:55:32.788021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17784 13:55:32.821623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17786 13:55:32.822091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17787 13:55:32.855493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17788 13:55:32.855882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17790 13:55:32.888146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17791 13:55:32.888537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17793 13:55:32.920975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17794 13:55:32.921356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17796 13:55:32.953889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17797 13:55:32.954296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17799 13:55:32.987613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17800 13:55:32.988040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17802 13:55:33.019775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17803 13:55:33.020225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17805 13:55:33.053419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17806 13:55:33.053884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17808 13:55:33.086736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17809 13:55:33.087146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17811 13:55:33.119497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17812 13:55:33.119916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17814 13:55:33.152687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17816 13:55:33.153314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17817 13:55:33.185921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17819 13:55:33.186485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17820 13:55:33.219009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17822 13:55:33.219557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17823 13:55:33.251287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17824 13:55:33.251733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17826 13:55:33.283293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17828 13:55:33.283839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17829 13:55:33.315340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17830 13:55:33.315778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17832 13:55:33.349072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17834 13:55:33.349532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17835 13:55:33.381750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17836 13:55:33.382136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17838 13:55:33.414928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17840 13:55:33.415324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17841 13:55:33.447375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17842 13:55:33.447754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17844 13:55:33.481354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17845 13:55:33.481813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17847 13:55:33.515282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17848 13:55:33.515704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17850 13:55:33.549371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17851 13:55:33.549813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17853 13:55:33.583707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17854 13:55:33.584131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17856 13:55:33.617436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17857 13:55:33.617862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17859 13:55:33.652467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17861 13:55:33.652897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17862 13:55:33.687568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17863 13:55:33.688014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17865 13:55:33.721018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17866 13:55:33.721517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17868 13:55:33.754808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17870 13:55:33.755362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17871 13:55:33.789116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17872 13:55:33.789524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17874 13:55:33.823841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17876 13:55:33.824432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17877 13:55:33.859352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17878 13:55:33.859820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17880 13:55:33.894910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17882 13:55:33.895494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17883 13:55:33.929741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17884 13:55:33.930245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17886 13:55:33.964394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17888 13:55:33.964948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17889 13:55:33.997311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17890 13:55:33.997747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17892 13:55:34.031034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17893 13:55:34.031501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17895 13:55:34.063574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17897 13:55:34.064191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17898 13:55:34.095237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17899 13:55:34.095713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17901 13:55:34.127754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17902 13:55:34.128210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17904 13:55:34.159932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17906 13:55:34.160494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17907 13:55:34.193285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17909 13:55:34.193856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17910 13:55:34.232759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17911 13:55:34.233146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17913 13:55:34.267191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17914 13:55:34.267583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17916 13:55:34.300463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17918 13:55:34.300871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17919 13:55:34.332843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17920 13:55:34.333237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17922 13:55:34.365441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17923 13:55:34.365884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17925 13:55:34.399603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17927 13:55:34.400071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17928 13:55:34.433419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17930 13:55:34.433889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17931 13:55:34.464669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17932 13:55:34.465068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17934 13:55:34.496502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17936 13:55:34.496964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17937 13:55:34.528451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
17939 13:55:34.529056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
17940 13:55:34.560313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
17942 13:55:34.560788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
17943 13:55:34.594947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
17944 13:55:34.595357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
17946 13:55:34.628674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
17948 13:55:34.629238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
17949 13:55:34.663379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
17950 13:55:34.663843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
17952 13:55:34.697280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
17953 13:55:34.697703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
17955 13:55:34.729687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
17957 13:55:34.730233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
17958 13:55:34.763018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
17960 13:55:34.763472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
17961 13:55:34.796235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
17962 13:55:34.796723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
17964 13:55:34.828863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
17965 13:55:34.829338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
17967 13:55:34.862879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
17968 13:55:34.863326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
17970 13:55:34.895469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
17972 13:55:34.896017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
17973 13:55:34.927602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
17975 13:55:34.928082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
17976 13:55:34.960652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
17977 13:55:34.961085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
17979 13:55:34.993163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
17980 13:55:34.993595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
17982 13:55:35.024693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
17983 13:55:35.025118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
17985 13:55:35.059139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
17986 13:55:35.059609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
17988 13:55:35.092702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
17990 13:55:35.093160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
17991 13:55:35.127392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
17993 13:55:35.127856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
17994 13:55:35.161666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
17995 13:55:35.162152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
17997 13:55:35.199658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
17999 13:55:35.200305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
18000 13:55:35.233466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
18001 13:55:35.233928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
18003 13:55:35.266205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
18004 13:55:35.266673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
18006 13:55:35.299264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
18008 13:55:35.299817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
18009 13:55:35.331807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
18010 13:55:35.332218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
18012 13:55:35.364275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
18014 13:55:35.364734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
18015 13:55:35.397709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
18017 13:55:35.398176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
18018 13:55:35.429469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
18019 13:55:35.429992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
18021 13:55:35.461938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
18023 13:55:35.462410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
18024 13:55:35.494446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
18026 13:55:35.494916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
18027 13:55:35.527422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
18028 13:55:35.527913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
18030 13:55:35.561210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
18032 13:55:35.561804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
18033 13:55:35.596580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
18034 13:55:35.597084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
18036 13:55:35.632303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
18037 13:55:35.632729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
18039 13:55:35.668866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
18040 13:55:35.669290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
18042 13:55:35.703719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
18043 13:55:35.704139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
18045 13:55:35.739093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
18047 13:55:35.739688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
18048 13:55:35.774338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
18050 13:55:35.774810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
18051 13:55:35.810335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
18053 13:55:35.810767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
18054 13:55:35.845997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
18055 13:55:35.846402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
18057 13:55:35.881620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
18058 13:55:35.882070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
18060 13:55:35.917693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
18062 13:55:35.918153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
18063 13:55:35.955203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
18064 13:55:35.955698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
18066 13:55:35.992013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
18068 13:55:35.992474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
18069 13:55:36.027867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
18070 13:55:36.028362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
18072 13:55:36.064347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
18074 13:55:36.064948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
18075 13:55:36.099069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
18076 13:55:36.099516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18078 13:55:36.133777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18079 13:55:36.134229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18081 13:55:36.168654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18082 13:55:36.169112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18084 13:55:36.204795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18086 13:55:36.205298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18087 13:55:36.241665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18089 13:55:36.242134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18090 13:55:36.277403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18091 13:55:36.277940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18093 13:55:36.311937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18094 13:55:36.312430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18096 13:55:36.346215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18098 13:55:36.346861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18099 13:55:36.380966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18101 13:55:36.381522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18102 13:55:36.415907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18103 13:55:36.416390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18105 13:55:36.449753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18106 13:55:36.450284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18108 13:55:36.485288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18109 13:55:36.485735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18111 13:55:36.521207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18113 13:55:36.521802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18114 13:55:36.557410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18116 13:55:36.557959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18117 13:55:36.592767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18119 13:55:36.593318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18120 13:55:36.628493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18121 13:55:36.628964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18123 13:55:36.664146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18124 13:55:36.664561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18126 13:55:36.701069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18128 13:55:36.701500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18129 13:55:36.737794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18130 13:55:36.738219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18132 13:55:36.773964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18133 13:55:36.774405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18135 13:55:36.810983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18137 13:55:36.811557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18138 13:55:36.847039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18139 13:55:36.847458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18141 13:55:36.883279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18143 13:55:36.883742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18144 13:55:36.919505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18145 13:55:36.919941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18147 13:55:36.956170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18148 13:55:36.956608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18150 13:55:36.993839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18151 13:55:36.994290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18153 13:55:37.031950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18154 13:55:37.032379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18156 13:55:37.068697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18157 13:55:37.069123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18159 13:55:37.104644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18161 13:55:37.105110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18162 13:55:37.139326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18163 13:55:37.139775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18165 13:55:37.174063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18167 13:55:37.174537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18168 13:55:37.209711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18169 13:55:37.210134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18171 13:55:37.244935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18172 13:55:37.245361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18174 13:55:37.280279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18175 13:55:37.280726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18177 13:55:37.315287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18178 13:55:37.315686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18180 13:55:37.349685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18182 13:55:37.350174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18183 13:55:37.385063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18185 13:55:37.385528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18186 13:55:37.421645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18187 13:55:37.422083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18189 13:55:37.457931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18190 13:55:37.458445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18192 13:55:37.495667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18193 13:55:37.496127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18195 13:55:37.530118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18197 13:55:37.530677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18198 13:55:37.576765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18200 13:55:37.577316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18201 13:55:37.617628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18202 13:55:37.618099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18204 13:55:37.655825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18205 13:55:37.656283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18207 13:55:37.690972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18208 13:55:37.691441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18210 13:55:37.724652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18211 13:55:37.725205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18213 13:55:37.764128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18215 13:55:37.764710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18216 13:55:37.798877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18217 13:55:37.799317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18219 13:55:37.835677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18221 13:55:37.836310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18222 13:55:37.876960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18223 13:55:37.877385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18225 13:55:37.914085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18226 13:55:37.914564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18228 13:55:37.949345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18229 13:55:37.949767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18231 13:55:37.987557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18232 13:55:37.988035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18234 13:55:38.023955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18235 13:55:38.024446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18237 13:55:38.059981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18239 13:55:38.060559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18240 13:55:38.095609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18242 13:55:38.096154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18243 13:55:38.131351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18244 13:55:38.131808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18246 13:55:38.168160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18248 13:55:38.168699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18249 13:55:38.203897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18250 13:55:38.204339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18252 13:55:38.239859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18253 13:55:38.240336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18255 13:55:38.276691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18257 13:55:38.277261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18258 13:55:38.311791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18259 13:55:38.312245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18261 13:55:38.344517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18263 13:55:38.344980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18264 13:55:38.379266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18265 13:55:38.379799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18267 13:55:38.411202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18268 13:55:38.411719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18270 13:55:38.444131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18272 13:55:38.444740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18273 13:55:38.479029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18274 13:55:38.479482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18276 13:55:38.513600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18277 13:55:38.514059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18279 13:55:38.549683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18281 13:55:38.550226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18282 13:55:38.584031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18283 13:55:38.584446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18285 13:55:38.617228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18286 13:55:38.617704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18288 13:55:38.649891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18289 13:55:38.650318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18291 13:55:38.683379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18293 13:55:38.683839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18294 13:55:38.717302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18296 13:55:38.717775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18297 13:55:38.750852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18299 13:55:38.751310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18300 13:55:38.783744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18301 13:55:38.784168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18303 13:55:38.816998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18304 13:55:38.817422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18306 13:55:38.850014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18307 13:55:38.850492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18309 13:55:38.882964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18311 13:55:38.883565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18312 13:55:38.915959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18314 13:55:38.916505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18315 13:55:38.949336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18317 13:55:38.949880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18318 13:55:38.983185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18320 13:55:38.983715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18321 13:55:39.016274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18323 13:55:39.016826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18324 13:55:39.049877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18326 13:55:39.050462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18327 13:55:39.082853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18329 13:55:39.083296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18330 13:55:39.115497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18331 13:55:39.115952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18333 13:55:39.149129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18335 13:55:39.149763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18336 13:55:39.183290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18337 13:55:39.183763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18339 13:55:39.218563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18341 13:55:39.219036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18342 13:55:39.252742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18343 13:55:39.253172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18345 13:55:39.287282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18346 13:55:39.287716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18348 13:55:39.321639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18350 13:55:39.322110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18351 13:55:39.356374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18352 13:55:39.356894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18354 13:55:39.389321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18356 13:55:39.390127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18357 13:55:39.424708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18358 13:55:39.425116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18360 13:55:39.460404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18361 13:55:39.460815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18363 13:55:39.495498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18364 13:55:39.495872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18366 13:55:39.532410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18367 13:55:39.532872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18369 13:55:39.567024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18370 13:55:39.567506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18372 13:55:39.603856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18373 13:55:39.604272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18375 13:55:39.637389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18376 13:55:39.637809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18378 13:55:39.670030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18379 13:55:39.670535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18381 13:55:39.703543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18383 13:55:39.704148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18384 13:55:39.736461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18386 13:55:39.737091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18387 13:55:39.770045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18388 13:55:39.770510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18390 13:55:39.803817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18391 13:55:39.804292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18393 13:55:39.837785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18394 13:55:39.838244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18396 13:55:39.871285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18397 13:55:39.871756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18399 13:55:39.908066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18400 13:55:39.908465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18402 13:55:39.944745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18404 13:55:39.945189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18405 13:55:39.981921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18406 13:55:39.982324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18408 13:55:40.019250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18410 13:55:40.019681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18411 13:55:40.056785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18413 13:55:40.057361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18414 13:55:40.091027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18415 13:55:40.091498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18417 13:55:40.128016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18419 13:55:40.128584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18420 13:55:40.164563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18421 13:55:40.164954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18423 13:55:40.201851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18424 13:55:40.202327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18426 13:55:40.236801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18427 13:55:40.237263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18429 13:55:40.272892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18430 13:55:40.273358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18432 13:55:40.315790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18433 13:55:40.316272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18435 13:55:40.356973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18437 13:55:40.357563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18438 13:55:40.394782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18439 13:55:40.395256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18441 13:55:40.432769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18442 13:55:40.433231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18444 13:55:40.473422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18445 13:55:40.473929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18447 13:55:40.512886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18448 13:55:40.513343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18450 13:55:40.552782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18451 13:55:40.553275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18453 13:55:40.590447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18455 13:55:40.591170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18456 13:55:40.629611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18457 13:55:40.630094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18459 13:55:40.667005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18461 13:55:40.667572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18462 13:55:40.702393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18464 13:55:40.702905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18465 13:55:40.735852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18467 13:55:40.736328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18468 13:55:40.769548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18469 13:55:40.769984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18471 13:55:40.803926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18473 13:55:40.804385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18474 13:55:40.838928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18475 13:55:40.839369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18477 13:55:40.873354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18479 13:55:40.873819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18480 13:55:40.908567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18481 13:55:40.909023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18483 13:55:40.943589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18485 13:55:40.944141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18486 13:55:40.978486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18488 13:55:40.979044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18489 13:55:41.012302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18490 13:55:41.012721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18492 13:55:41.046096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18494 13:55:41.046559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18495 13:55:41.080169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18496 13:55:41.080634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18498 13:55:41.113879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18500 13:55:41.114513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18501 13:55:41.147946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18502 13:55:41.148417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18504 13:55:41.182501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18506 13:55:41.183148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18507 13:55:41.217555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18509 13:55:41.218212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18510 13:55:41.253922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18512 13:55:41.254570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18513 13:55:41.290211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18515 13:55:41.290820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18516 13:55:41.324107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18518 13:55:41.324713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18519 13:55:41.357841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18520 13:55:41.358257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18522 13:55:41.391590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18523 13:55:41.392091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18525 13:55:41.425950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18526 13:55:41.426405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18528 13:55:41.460029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18530 13:55:41.460603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18531 13:55:41.495134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18532 13:55:41.495621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18534 13:55:41.529999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18535 13:55:41.530445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18537 13:55:41.565234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18539 13:55:41.565700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18540 13:55:41.599786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18542 13:55:41.600246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18543 13:55:41.635466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18545 13:55:41.635925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18546 13:55:41.671059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18547 13:55:41.671496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18549 13:55:41.705684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18551 13:55:41.706137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18552 13:55:41.740059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18553 13:55:41.740456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18555 13:55:41.774072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18557 13:55:41.774665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18558 13:55:41.807982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18559 13:55:41.808442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18561 13:55:41.842145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18563 13:55:41.842608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18564 13:55:41.877441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18565 13:55:41.877863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18567 13:55:41.911559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18569 13:55:41.912020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18570 13:55:41.945232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18572 13:55:41.945695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18573 13:55:41.979716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18575 13:55:41.980319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18576 13:55:42.015337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18577 13:55:42.015795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18579 13:55:42.050434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18581 13:55:42.050888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18582 13:55:42.086389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18584 13:55:42.086860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18585 13:55:42.120182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18586 13:55:42.120637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18588 13:55:42.153799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18590 13:55:42.154361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18591 13:55:42.187743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18593 13:55:42.188213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18594 13:55:42.221481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18595 13:55:42.221904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18597 13:55:42.255423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18598 13:55:42.255809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18600 13:55:42.289784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18602 13:55:42.290376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18603 13:55:42.323632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18605 13:55:42.324218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18606 13:55:42.359606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18608 13:55:42.360235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18609 13:55:42.393363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18610 13:55:42.393855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18612 13:55:42.427151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18613 13:55:42.427566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18615 13:55:42.460798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18616 13:55:42.461230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18618 13:55:42.494807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18620 13:55:42.495408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18621 13:55:42.527608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18623 13:55:42.528166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18624 13:55:42.561592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18625 13:55:42.562090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18627 13:55:42.595838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18629 13:55:42.596410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18630 13:55:42.631548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18632 13:55:42.632039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18633 13:55:42.666135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18634 13:55:42.666532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18636 13:55:42.702102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18637 13:55:42.702526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18639 13:55:42.736907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18640 13:55:42.737405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18642 13:55:42.769843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18643 13:55:42.770364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18645 13:55:42.811280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18646 13:55:42.811696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18648 13:55:42.845432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18649 13:55:42.845835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18651 13:55:42.880275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18652 13:55:42.880738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18654 13:55:42.915569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18655 13:55:42.916045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18657 13:55:42.951060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18659 13:55:42.951626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18660 13:55:42.985283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18662 13:55:42.985866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18663 13:55:43.019926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18664 13:55:43.020386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18666 13:55:43.055352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18667 13:55:43.055834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18669 13:55:43.092337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18670 13:55:43.092851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18672 13:55:43.127514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18673 13:55:43.127970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18675 13:55:43.167274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18677 13:55:43.167897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18678 13:55:43.204838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18680 13:55:43.205332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18681 13:55:43.236867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18682 13:55:43.237244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18684 13:55:43.268607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18685 13:55:43.269075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18687 13:55:43.299917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18688 13:55:43.300363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18690 13:55:43.331538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18692 13:55:43.331977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18693 13:55:43.363868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18694 13:55:43.364342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18696 13:55:43.396105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18697 13:55:43.396549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18699 13:55:43.428925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18701 13:55:43.429484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18702 13:55:43.461120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18704 13:55:43.461714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18705 13:55:43.492304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18707 13:55:43.492854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18708 13:55:43.523656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18710 13:55:43.524206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18711 13:55:43.554838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18712 13:55:43.555297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18714 13:55:43.587074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18715 13:55:43.587517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18717 13:55:43.619306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18719 13:55:43.619880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18720 13:55:43.651570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18721 13:55:43.652027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18723 13:55:43.683766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18725 13:55:43.684332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18726 13:55:43.715951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18728 13:55:43.716527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18729 13:55:43.747656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18731 13:55:43.748197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18732 13:55:43.780270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18733 13:55:43.780736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18735 13:55:43.812553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18736 13:55:43.813016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18738 13:55:43.844305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18739 13:55:43.844779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18741 13:55:43.876391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18743 13:55:43.876962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18744 13:55:43.909053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18746 13:55:43.909609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18747 13:55:43.940726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18748 13:55:43.941190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18750 13:55:43.972659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18752 13:55:43.973134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18753 13:55:44.003836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18755 13:55:44.004313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18756 13:55:44.036954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18757 13:55:44.037365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18759 13:55:44.071459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18761 13:55:44.071817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18762 13:55:44.103544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18763 13:55:44.103891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18765 13:55:44.135231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18766 13:55:44.135696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18768 13:55:44.167190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18770 13:55:44.167740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18771 13:55:44.199037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18772 13:55:44.199487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18774 13:55:44.231550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18775 13:55:44.232031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18777 13:55:44.263469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18779 13:55:44.263927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18780 13:55:44.295377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18782 13:55:44.295859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18783 13:55:44.326585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18784 13:55:44.327073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18786 13:55:44.358638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18787 13:55:44.359092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18789 13:55:44.391715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18790 13:55:44.392147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18792 13:55:44.424008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18793 13:55:44.424437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18795 13:55:44.456350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18796 13:55:44.456787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18798 13:55:44.488475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18800 13:55:44.489051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18801 13:55:44.520202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18802 13:55:44.520662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18804 13:55:44.553892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18806 13:55:44.554585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18807 13:55:44.586490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18809 13:55:44.587046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18810 13:55:44.618944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18811 13:55:44.619386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18813 13:55:44.649685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18814 13:55:44.650075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18816 13:55:44.680952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18817 13:55:44.681339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18819 13:55:44.711842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18820 13:55:44.712236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18822 13:55:44.743297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18824 13:55:44.743917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18825 13:55:44.775189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18826 13:55:44.775653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18828 13:55:44.806537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18830 13:55:44.807156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18831 13:55:44.837996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18832 13:55:44.838480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18834 13:55:44.868989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18835 13:55:44.869420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18837 13:55:44.900207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18838 13:55:44.900625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18840 13:55:44.931839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18841 13:55:44.932308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18843 13:55:44.963010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18844 13:55:44.963471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18846 13:55:44.994480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18848 13:55:44.995027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18849 13:55:45.025112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18850 13:55:45.025590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18852 13:55:45.056301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18854 13:55:45.056764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18855 13:55:45.087996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18856 13:55:45.088501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18858 13:55:45.119146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18859 13:55:45.119622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18861 13:55:45.150806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18863 13:55:45.151367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18864 13:55:45.182458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18866 13:55:45.183042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18867 13:55:45.217115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18868 13:55:45.217605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18870 13:55:45.249547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18872 13:55:45.250168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18873 13:55:45.280839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18874 13:55:45.281251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18876 13:55:45.312647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18877 13:55:45.313070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18879 13:55:45.346368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18881 13:55:45.346991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18882 13:55:45.379073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18883 13:55:45.379496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18885 13:55:45.411453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18887 13:55:45.412105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18888 13:55:45.443901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18890 13:55:45.444531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18891 13:55:45.476067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18892 13:55:45.476552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18894 13:55:45.509664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18895 13:55:45.510137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18897 13:55:45.542034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18899 13:55:45.542591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18900 13:55:45.574844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18901 13:55:45.575281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18903 13:55:45.610461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18905 13:55:45.610887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18906 13:55:45.645573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18908 13:55:45.645953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18909 13:55:45.679153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18910 13:55:45.679554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18912 13:55:45.713057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18913 13:55:45.713455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18915 13:55:45.744042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18916 13:55:45.744582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18918 13:55:45.775960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18920 13:55:45.776391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18921 13:55:45.806993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18922 13:55:45.807392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18924 13:55:45.838810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18926 13:55:45.839280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18927 13:55:45.869777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18928 13:55:45.870218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18930 13:55:45.900890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18932 13:55:45.901446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18933 13:55:45.932274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18934 13:55:45.932723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18936 13:55:45.964358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
18938 13:55:45.964937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
18939 13:55:45.995641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
18941 13:55:45.996185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
18942 13:55:46.026986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
18943 13:55:46.027452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
18945 13:55:46.059615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
18947 13:55:46.060184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
18948 13:55:46.093742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
18949 13:55:46.094235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
18951 13:55:46.125778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
18953 13:55:46.126377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
18954 13:55:46.159505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
18955 13:55:46.160116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
18957 13:55:46.192418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
18959 13:55:46.192995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
18960 13:55:46.223970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
18961 13:55:46.224421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
18963 13:55:46.257399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
18964 13:55:46.257887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
18966 13:55:46.293107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
18967 13:55:46.293586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
18969 13:55:46.327349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
18970 13:55:46.327695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
18972 13:55:46.360286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
18973 13:55:46.360679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
18975 13:55:46.392393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
18976 13:55:46.392825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
18978 13:55:46.424472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
18980 13:55:46.425072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
18981 13:55:46.459399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
18982 13:55:46.459830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
18984 13:55:46.491163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
18985 13:55:46.491570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
18987 13:55:46.522837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
18989 13:55:46.523286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
18990 13:55:46.554999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
18991 13:55:46.555451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
18993 13:55:46.587158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
18994 13:55:46.587593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
18996 13:55:46.619258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
18997 13:55:46.619691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
18999 13:55:46.651568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
19000 13:55:46.652047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
19002 13:55:46.683626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
19003 13:55:46.684092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
19005 13:55:46.715099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
19006 13:55:46.715553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
19008 13:55:46.746962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
19009 13:55:46.747417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
19011 13:55:46.779331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
19013 13:55:46.779869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
19014 13:55:46.811367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
19015 13:55:46.811832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
19017 13:55:46.843385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
19019 13:55:46.843941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
19020 13:55:46.875499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
19022 13:55:46.876047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
19023 13:55:46.906406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
19025 13:55:46.906971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
19026 13:55:46.937510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
19028 13:55:46.938063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
19029 13:55:46.968667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
19031 13:55:46.969214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
19032 13:55:47.000415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
19033 13:55:47.000876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
19035 13:55:47.031667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
19036 13:55:47.032140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
19038 13:55:47.063242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
19040 13:55:47.063870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
19041 13:55:47.094435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
19043 13:55:47.094885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
19044 13:55:47.125905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
19046 13:55:47.126453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
19047 13:55:47.157644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
19049 13:55:47.158235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
19050 13:55:47.188911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
19051 13:55:47.189338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
19053 13:55:47.220542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
19054 13:55:47.220977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
19056 13:55:47.252128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
19057 13:55:47.252555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
19059 13:55:47.286578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
19060 13:55:47.287081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
19062 13:55:47.319168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
19063 13:55:47.319653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
19065 13:55:47.350711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
19066 13:55:47.351193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
19068 13:55:47.381940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
19070 13:55:47.382568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
19071 13:55:47.412444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
19072 13:55:47.412924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
19074 13:55:47.443392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
19075 13:55:47.443852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19077 13:55:47.474866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19078 13:55:47.475316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19080 13:55:47.505798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19081 13:55:47.506274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19083 13:55:47.538226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19084 13:55:47.538685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19086 13:55:47.570765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19087 13:55:47.571220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19089 13:55:47.602726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19090 13:55:47.603187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19092 13:55:47.635428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19094 13:55:47.636014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19095 13:55:47.667355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19097 13:55:47.667914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19098 13:55:47.702070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19099 13:55:47.702545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19101 13:55:47.733700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19102 13:55:47.734186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19104 13:55:47.765227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19105 13:55:47.765683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19107 13:55:47.797065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19108 13:55:47.797520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19110 13:55:47.829853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19112 13:55:47.830400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19113 13:55:47.863739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19114 13:55:47.864095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19116 13:55:47.895638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19117 13:55:47.896088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19119 13:55:47.951580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19120 13:55:47.952108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19122 13:55:47.987219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19123 13:55:47.987607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19125 13:55:48.019033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19126 13:55:48.019402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19128 13:55:48.052227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19129 13:55:48.052605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19131 13:55:48.084530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19133 13:55:48.085111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19134 13:55:48.116726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19136 13:55:48.117278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19137 13:55:48.152696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19138 13:55:48.153192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19140 13:55:48.186449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19142 13:55:48.186806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19143 13:55:48.218747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19144 13:55:48.219178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19146 13:55:48.249133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19147 13:55:48.249586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19149 13:55:48.280143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19150 13:55:48.280589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19152 13:55:48.311229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19153 13:55:48.311668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19155 13:55:48.341879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19156 13:55:48.342311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19158 13:55:48.373370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19159 13:55:48.373801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19161 13:55:48.405369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19162 13:55:48.405777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19164 13:55:48.436985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19166 13:55:48.437430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19167 13:55:48.468506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19169 13:55:48.469098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19170 13:55:48.500791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19171 13:55:48.501252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19173 13:55:48.533958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19174 13:55:48.534400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19176 13:55:48.565625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19178 13:55:48.566225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19179 13:55:48.597081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19181 13:55:48.597622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19182 13:55:48.629620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19184 13:55:48.630231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19185 13:55:48.661476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19186 13:55:48.661922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19188 13:55:48.693100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19189 13:55:48.693494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19191 13:55:48.726035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19192 13:55:48.726448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19194 13:55:48.759147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19196 13:55:48.759579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19197 13:55:48.790870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19198 13:55:48.791274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19200 13:55:48.823185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19202 13:55:48.823739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19203 13:55:48.854608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19204 13:55:48.855055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19206 13:55:48.886296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19208 13:55:48.886857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19209 13:55:48.917885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19210 13:55:48.918318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19212 13:55:48.949678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19213 13:55:48.950114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19215 13:55:48.981156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19216 13:55:48.981579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19218 13:55:49.012408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19219 13:55:49.012846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19221 13:55:49.044133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19222 13:55:49.044581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19224 13:55:49.076647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19225 13:55:49.077095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19227 13:55:49.108625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19228 13:55:49.109056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19230 13:55:49.140274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19231 13:55:49.140717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19233 13:55:49.171594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19234 13:55:49.172047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19236 13:55:49.203161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19238 13:55:49.203604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19239 13:55:49.235065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19240 13:55:49.235509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19242 13:55:49.267016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19243 13:55:49.267455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19245 13:55:49.299033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19246 13:55:49.299481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19248 13:55:49.331506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19249 13:55:49.331964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19251 13:55:49.363823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19252 13:55:49.364281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19254 13:55:49.397268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19255 13:55:49.397756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19257 13:55:49.429784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19259 13:55:49.430315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19260 13:55:49.462055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19261 13:55:49.462491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19263 13:55:49.494057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19264 13:55:49.494495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19266 13:55:49.525894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19267 13:55:49.526339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19269 13:55:49.557984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19270 13:55:49.558422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19272 13:55:49.591366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19273 13:55:49.591814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19275 13:55:49.623332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19276 13:55:49.623784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19278 13:55:49.655681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19279 13:55:49.656133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19281 13:55:49.687762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19283 13:55:49.688291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19284 13:55:49.719949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19285 13:55:49.720368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19287 13:55:49.751546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19288 13:55:49.751962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19290 13:55:49.782103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19291 13:55:49.782500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19293 13:55:49.813069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19294 13:55:49.813467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19296 13:55:49.844219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19297 13:55:49.844607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19299 13:55:49.875535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19300 13:55:49.875928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19302 13:55:49.908540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19303 13:55:49.908987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19305 13:55:49.941352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19307 13:55:49.941795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19308 13:55:49.974545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19310 13:55:49.975087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19311 13:55:50.011807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19312 13:55:50.012241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19314 13:55:50.055074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19316 13:55:50.055530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19317 13:55:50.088833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19319 13:55:50.089224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19320 13:55:50.124195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19322 13:55:50.124809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19323 13:55:50.158355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19325 13:55:50.158972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19326 13:55:50.191406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19327 13:55:50.191890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19329 13:55:50.224555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19330 13:55:50.224990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19332 13:55:50.256097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19333 13:55:50.256535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19335 13:55:50.289850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19336 13:55:50.290304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19338 13:55:50.322045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19340 13:55:50.322656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19341 13:55:50.354495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19343 13:55:50.355047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19344 13:55:50.388333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19345 13:55:50.388733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19347 13:55:50.421213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19348 13:55:50.421601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19350 13:55:50.454019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19352 13:55:50.454480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19353 13:55:50.487289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19354 13:55:50.487680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19356 13:55:50.519768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19357 13:55:50.520200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19359 13:55:50.553280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19360 13:55:50.553685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19362 13:55:50.586838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19363 13:55:50.587312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19365 13:55:50.619454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19366 13:55:50.619915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19368 13:55:50.653388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19369 13:55:50.653875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19371 13:55:50.687454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19372 13:55:50.687928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19374 13:55:50.720951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19375 13:55:50.721345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19377 13:55:50.753472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19379 13:55:50.753945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19380 13:55:50.785334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19381 13:55:50.785756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19383 13:55:50.817875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19384 13:55:50.818286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19386 13:55:50.849960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19388 13:55:50.850435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19389 13:55:50.883008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19390 13:55:50.883456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19392 13:55:50.917311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19393 13:55:50.917708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19395 13:55:50.951043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19396 13:55:50.951459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19398 13:55:50.984426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19400 13:55:50.984887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19401 13:55:51.016490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19402 13:55:51.016919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19404 13:55:51.048515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19405 13:55:51.048956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19407 13:55:51.083084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19408 13:55:51.083513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19410 13:55:51.115047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19412 13:55:51.115492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19413 13:55:51.146994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19415 13:55:51.147562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19416 13:55:51.179827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19417 13:55:51.180281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19419 13:55:51.212111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19421 13:55:51.212664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19422 13:55:51.244559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19423 13:55:51.244999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19425 13:55:51.277447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19426 13:55:51.277840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19428 13:55:51.309258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19429 13:55:51.309698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19431 13:55:51.341297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19432 13:55:51.341738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19434 13:55:51.373115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19436 13:55:51.373532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19437 13:55:51.404526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19438 13:55:51.404962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19440 13:55:51.436047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19441 13:55:51.436488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19443 13:55:51.467903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19445 13:55:51.468627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19446 13:55:51.500431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19447 13:55:51.500902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19449 13:55:51.532410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19450 13:55:51.532857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19452 13:55:51.564251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19453 13:55:51.564706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19455 13:55:51.596569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19456 13:55:51.597035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19458 13:55:51.628875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19460 13:55:51.629419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19461 13:55:51.661115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19462 13:55:51.661579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19464 13:55:51.694796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19466 13:55:51.695386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19467 13:55:51.727191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19468 13:55:51.727652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19470 13:55:51.760138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19472 13:55:51.760695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19473 13:55:51.793133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19474 13:55:51.793517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19476 13:55:51.825495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19477 13:55:51.825991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19479 13:55:51.857204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19480 13:55:51.857698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19482 13:55:51.889842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19483 13:55:51.890323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19485 13:55:51.923581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19486 13:55:51.924007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19488 13:55:51.956635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19489 13:55:51.957114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19491 13:55:51.988800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19493 13:55:51.989271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19494 13:55:52.021281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19496 13:55:52.021761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19497 13:55:52.056545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19498 13:55:52.056996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19500 13:55:52.092451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19502 13:55:52.092887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19503 13:55:52.129610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19505 13:55:52.130047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19506 13:55:52.167305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19508 13:55:52.167883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19509 13:55:52.203877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19510 13:55:52.204282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19512 13:55:52.240888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19513 13:55:52.241367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19515 13:55:52.276909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19516 13:55:52.277320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19518 13:55:52.312498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19519 13:55:52.312948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19521 13:55:52.347928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19522 13:55:52.348312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19524 13:55:52.384105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19526 13:55:52.384590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19527 13:55:52.420452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19528 13:55:52.420832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19530 13:55:52.456529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19531 13:55:52.456916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19533 13:55:52.492707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19534 13:55:52.493099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19536 13:55:52.529238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19537 13:55:52.529701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19539 13:55:52.567830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19540 13:55:52.568267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19542 13:55:52.605448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19543 13:55:52.605845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19545 13:55:52.642516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19547 13:55:52.642971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19548 13:55:52.677749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19549 13:55:52.678184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19551 13:55:52.714645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19553 13:55:52.715113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19554 13:55:52.751921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19556 13:55:52.752506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19557 13:55:52.787834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19558 13:55:52.788246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19560 13:55:52.824978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19562 13:55:52.825440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19563 13:55:52.861253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19565 13:55:52.861704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19566 13:55:52.897717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19567 13:55:52.898129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19569 13:55:52.934806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19570 13:55:52.935223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19572 13:55:52.970636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19574 13:55:52.971211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19575 13:55:53.005904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19576 13:55:53.006309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19578 13:55:53.065046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19580 13:55:53.065714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19581 13:55:53.100377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19582 13:55:53.100797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19584 13:55:53.135806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19585 13:55:53.136234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19587 13:55:53.171830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19588 13:55:53.172300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19590 13:55:53.207471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19591 13:55:53.207825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19593 13:55:53.243192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19594 13:55:53.243583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19596 13:55:53.279179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19597 13:55:53.279549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19599 13:55:53.315184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19600 13:55:53.315571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19602 13:55:53.350981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19603 13:55:53.351340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19605 13:55:53.387228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19606 13:55:53.387583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19608 13:55:53.423565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19609 13:55:53.423936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19611 13:55:53.459595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19612 13:55:53.459958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19614 13:55:53.495336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19616 13:55:53.495787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19617 13:55:53.531228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19618 13:55:53.531585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19620 13:55:53.566110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19622 13:55:53.566555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19623 13:55:53.601964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19625 13:55:53.602407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19626 13:55:53.637455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19627 13:55:53.637814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19629 13:55:53.672735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19630 13:55:53.673097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19632 13:55:53.708494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19633 13:55:53.708808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19635 13:55:53.744022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19636 13:55:53.744435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19638 13:55:53.780082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19639 13:55:53.780382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19641 13:55:53.815485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19642 13:55:53.815781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19644 13:55:53.851826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19645 13:55:53.852272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19647 13:55:53.889595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19648 13:55:53.889981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19650 13:55:53.925236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19651 13:55:53.925521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19653 13:55:53.960601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19654 13:55:53.960964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19656 13:55:53.996139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19657 13:55:53.996544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19659 13:55:54.032338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19660 13:55:54.032861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19662 13:55:54.070756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19663 13:55:54.071242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19665 13:55:54.106429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19667 13:55:54.106926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19668 13:55:54.143055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19669 13:55:54.143422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19671 13:55:54.178100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19672 13:55:54.178696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19674 13:55:54.212906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19675 13:55:54.213384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19677 13:55:54.248224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19678 13:55:54.248591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19680 13:55:54.283621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19681 13:55:54.283992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19683 13:55:54.319177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19684 13:55:54.319559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19686 13:55:54.355255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19688 13:55:54.355784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19689 13:55:54.391209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19690 13:55:54.391526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19692 13:55:54.427451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19693 13:55:54.427845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19695 13:55:54.481329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19697 13:55:54.481904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19698 13:55:54.516280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19699 13:55:54.516650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19701 13:55:54.551104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19702 13:55:54.551479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19704 13:55:54.586762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19705 13:55:54.587113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19707 13:55:54.621117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19708 13:55:54.621612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19710 13:55:54.655530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19711 13:55:54.655919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19713 13:55:54.690229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19714 13:55:54.690610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19716 13:55:54.726437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19718 13:55:54.726950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19719 13:55:54.761696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19721 13:55:54.762104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19722 13:55:54.797468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19724 13:55:54.797980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19725 13:55:54.832227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19726 13:55:54.832598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19728 13:55:54.867078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19729 13:55:54.867454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19731 13:55:54.901713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19732 13:55:54.902079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19734 13:55:54.936927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19736 13:55:54.937373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19737 13:55:54.972584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19739 13:55:54.973042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19740 13:55:55.007847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19741 13:55:55.008263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19743 13:55:55.043256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19744 13:55:55.043676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19746 13:55:55.080262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19748 13:55:55.080727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19749 13:55:55.116012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19750 13:55:55.116370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19752 13:55:55.150932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19753 13:55:55.151240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19755 13:55:55.185568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19756 13:55:55.185997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19758 13:55:55.220755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19759 13:55:55.221169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19761 13:55:55.255601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19762 13:55:55.255972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19764 13:55:55.291285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19765 13:55:55.291713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19767 13:55:55.326090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19768 13:55:55.326464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19770 13:55:55.361488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19771 13:55:55.361869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19773 13:55:55.396098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19775 13:55:55.396486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19776 13:55:55.430759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19777 13:55:55.431189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19779 13:55:55.466873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19781 13:55:55.467390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19782 13:55:55.504914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19783 13:55:55.505257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19785 13:55:55.540710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19786 13:55:55.541145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19788 13:55:55.577057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19789 13:55:55.577473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19791 13:55:55.626170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19793 13:55:55.626578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19794 13:55:55.668739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19796 13:55:55.669097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19797 13:55:55.703766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19798 13:55:55.704048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19800 13:55:55.740960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19801 13:55:55.741334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19803 13:55:55.781248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19804 13:55:55.781596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19806 13:55:55.816376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19807 13:55:55.816656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19809 13:55:55.852959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19810 13:55:55.853314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19812 13:55:55.888117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19813 13:55:55.888424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19815 13:55:55.923373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19816 13:55:55.923783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19818 13:55:55.959075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19819 13:55:55.959513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19821 13:55:55.995264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19822 13:55:55.995691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19824 13:55:56.031239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19825 13:55:56.031664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19827 13:55:56.067740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19829 13:55:56.068160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19830 13:55:56.104218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19831 13:55:56.104614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19833 13:55:56.147801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19835 13:55:56.148235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19836 13:55:56.183630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19837 13:55:56.183983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19839 13:55:56.219869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19840 13:55:56.220177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19842 13:55:56.256203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19843 13:55:56.256639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19845 13:55:56.296501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19846 13:55:56.296933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19848 13:55:56.333325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19849 13:55:56.333688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19851 13:55:56.368780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19852 13:55:56.369156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19854 13:55:56.404284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19855 13:55:56.404649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19857 13:55:56.440037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19858 13:55:56.440392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19860 13:55:56.476523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19861 13:55:56.476928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19863 13:55:56.512728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19864 13:55:56.513180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19866 13:55:56.548284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19867 13:55:56.548672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19869 13:55:56.584153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19870 13:55:56.584508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19872 13:55:56.620110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19873 13:55:56.620469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19875 13:55:56.655827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19876 13:55:56.656216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19878 13:55:56.691822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19879 13:55:56.692198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19881 13:55:56.727476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19882 13:55:56.727934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19884 13:55:56.764375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19885 13:55:56.764844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19887 13:55:56.801376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19889 13:55:56.801845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19890 13:55:56.838078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19891 13:55:56.838506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19893 13:55:56.874650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19894 13:55:56.875106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19896 13:55:56.920834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19897 13:55:56.921321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19899 13:55:56.966787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19900 13:55:56.967262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19902 13:55:57.001615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19904 13:55:57.002268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19905 13:55:57.037243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19906 13:55:57.037696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19908 13:55:57.076332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19909 13:55:57.076810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19911 13:55:57.111098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19913 13:55:57.111688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19914 13:55:57.145956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19915 13:55:57.146383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19917 13:55:57.181205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19918 13:55:57.181685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19920 13:55:57.221152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19922 13:55:57.221734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19923 13:55:57.256381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19925 13:55:57.256842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19926 13:55:57.292438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19927 13:55:57.292974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19929 13:55:57.328188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19930 13:55:57.328633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19932 13:55:57.364244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19933 13:55:57.364674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19935 13:55:57.399499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19936 13:55:57.399926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
19938 13:55:57.435553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
19940 13:55:57.436138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
19941 13:55:57.471285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
19942 13:55:57.471743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
19944 13:55:57.506591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
19946 13:55:57.507150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
19947 13:55:57.541694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
19948 13:55:57.542104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
19950 13:55:57.577801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
19952 13:55:57.578330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
19953 13:55:57.613044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
19955 13:55:57.613504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
19956 13:55:57.648292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
19957 13:55:57.648788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
19959 13:55:57.684743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
19960 13:55:57.685239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
19962 13:55:57.723926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
19963 13:55:57.724417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
19965 13:55:57.763949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
19966 13:55:57.764361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
19968 13:55:57.814050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
19970 13:55:57.814534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
19971 13:55:57.869243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
19972 13:55:57.869668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
19974 13:55:57.907554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
19976 13:55:57.907952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
19977 13:55:57.943090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
19978 13:55:57.943528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
19980 13:55:57.978820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
19981 13:55:57.979153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
19983 13:55:58.014098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
19985 13:55:58.014569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
19986 13:55:58.048810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
19988 13:55:58.049267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
19989 13:55:58.084017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
19990 13:55:58.084434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
19992 13:55:58.120638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
19993 13:55:58.121051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
19995 13:55:58.173531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
19996 13:55:58.173915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
19998 13:55:58.236150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
20000 13:55:58.236561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
20001 13:55:58.271717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
20002 13:55:58.272197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
20004 13:55:58.307523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
20006 13:55:58.307988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
20007 13:55:58.343260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
20009 13:55:58.343820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
20010 13:55:58.377716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
20011 13:55:58.378165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
20013 13:55:58.413335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
20014 13:55:58.413761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
20016 13:55:58.449978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
20017 13:55:58.450495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
20019 13:55:58.485244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
20020 13:55:58.485692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
20022 13:55:58.520402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
20023 13:55:58.520838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
20025 13:55:58.555733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
20026 13:55:58.556166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
20028 13:55:58.591353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
20029 13:55:58.591780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
20031 13:55:58.626826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
20032 13:55:58.627277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
20034 13:55:58.661712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
20036 13:55:58.662328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
20037 13:55:58.696725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
20038 13:55:58.697127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
20040 13:55:58.734347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
20042 13:55:58.734792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
20043 13:55:58.780884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
20045 13:55:58.781330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
20046 13:55:58.816870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
20047 13:55:58.817283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
20049 13:55:58.852130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
20050 13:55:58.852527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
20052 13:55:58.887797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
20053 13:55:58.888187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
20055 13:55:58.923295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
20056 13:55:58.923808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
20058 13:55:58.958829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
20059 13:55:58.959280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
20061 13:55:58.993868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
20063 13:55:58.994561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
20064 13:55:59.029530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
20065 13:55:59.029933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
20067 13:55:59.064644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
20068 13:55:59.065099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
20070 13:55:59.100037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
20071 13:55:59.100472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
20073 13:55:59.135217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
20074 13:55:59.135683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
20076 13:55:59.170366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20078 13:55:59.170972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20079 13:55:59.207238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20080 13:55:59.207688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20082 13:55:59.243564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20083 13:55:59.243989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20085 13:55:59.279649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20086 13:55:59.280111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20088 13:55:59.315653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20089 13:55:59.316090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20091 13:55:59.351711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20093 13:55:59.352254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20094 13:55:59.387153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20095 13:55:59.387605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20097 13:55:59.422893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20098 13:55:59.423344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20100 13:55:59.459054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20101 13:55:59.459542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20103 13:55:59.494589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20105 13:55:59.495141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20106 13:55:59.529654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20107 13:55:59.530135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20109 13:55:59.580990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20110 13:55:59.581457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20112 13:55:59.628210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20113 13:55:59.628652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20115 13:55:59.665186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20117 13:55:59.665920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20118 13:55:59.701370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20119 13:55:59.701871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20121 13:55:59.736843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20123 13:55:59.737540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20124 13:55:59.772066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20125 13:55:59.772489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20127 13:55:59.807488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20128 13:55:59.808018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20130 13:55:59.843053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20131 13:55:59.843537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20133 13:55:59.879018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20134 13:55:59.879492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20136 13:55:59.913665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20137 13:55:59.914112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20139 13:55:59.948834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20140 13:55:59.949249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20142 13:55:59.985808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20144 13:55:59.986276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20145 13:56:00.021078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20146 13:56:00.021504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20148 13:56:00.056378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20149 13:56:00.056838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20151 13:56:00.091851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20152 13:56:00.092373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20154 13:56:00.127106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20155 13:56:00.127575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20157 13:56:00.162919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20158 13:56:00.163402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20160 13:56:00.198179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20162 13:56:00.198777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20163 13:56:00.235822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20165 13:56:00.236466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20166 13:56:00.272794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20167 13:56:00.273302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20169 13:56:00.313784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20170 13:56:00.314241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20172 13:56:00.352721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20174 13:56:00.353277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20175 13:56:00.393871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20176 13:56:00.394341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20178 13:56:00.432429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20180 13:56:00.432893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20181 13:56:00.472374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20183 13:56:00.472834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20184 13:56:00.515898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20186 13:56:00.516367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20187 13:56:00.559775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20189 13:56:00.560241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20190 13:56:00.596577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20191 13:56:00.596972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20193 13:56:00.641092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20194 13:56:00.641592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20196 13:56:00.681247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20197 13:56:00.681705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20199 13:56:00.720758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20200 13:56:00.721143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20202 13:56:00.757442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20203 13:56:00.757805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20205 13:56:00.793402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20207 13:56:00.793973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20208 13:56:00.828243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20209 13:56:00.828755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20211 13:56:00.863449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20212 13:56:00.863908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20214 13:56:00.899041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20216 13:56:00.899673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20217 13:56:00.934395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20219 13:56:00.935069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20220 13:56:00.969853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20221 13:56:00.970307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20223 13:56:01.005729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20224 13:56:01.006244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20226 13:56:01.040713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20227 13:56:01.041170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20229 13:56:01.075616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20230 13:56:01.076071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20232 13:56:01.110956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20233 13:56:01.111389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20235 13:56:01.145783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20237 13:56:01.146268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20238 13:56:01.191228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20240 13:56:01.191709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20241 13:56:01.226540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20243 13:56:01.227017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20244 13:56:01.263067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20245 13:56:01.263504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20247 13:56:01.298870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20248 13:56:01.299297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20250 13:56:01.335042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20252 13:56:01.335521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20253 13:56:01.371234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20255 13:56:01.371773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20256 13:56:01.406047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20257 13:56:01.406490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20259 13:56:01.441621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20260 13:56:01.442178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20262 13:56:01.478034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20263 13:56:01.478601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20265 13:56:01.515744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20266 13:56:01.516180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20268 13:56:01.552987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20270 13:56:01.553572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20271 13:56:01.588711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20272 13:56:01.589174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20274 13:56:01.624530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20275 13:56:01.624962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20277 13:56:01.663720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20278 13:56:01.664167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20280 13:56:01.700659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20282 13:56:01.701115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20283 13:56:01.735557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20284 13:56:01.735997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20286 13:56:01.771730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20288 13:56:01.772200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20289 13:56:01.807226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20290 13:56:01.807720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20292 13:56:01.843520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20293 13:56:01.843940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20295 13:56:01.880227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20296 13:56:01.880697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20298 13:56:01.921615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20299 13:56:01.922139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20301 13:56:01.959515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20302 13:56:01.959994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20304 13:56:01.995417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20305 13:56:01.995888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20307 13:56:02.029986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20308 13:56:02.030405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20310 13:56:02.065503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20311 13:56:02.065914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20313 13:56:02.101072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20314 13:56:02.101469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20316 13:56:02.137329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20318 13:56:02.137808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20319 13:56:02.172875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20321 13:56:02.173333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20322 13:56:02.207884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20324 13:56:02.208448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20325 13:56:02.243585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20327 13:56:02.244147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20328 13:56:02.279307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20329 13:56:02.279734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20331 13:56:02.315335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20332 13:56:02.315814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20334 13:56:02.352731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20335 13:56:02.353200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20337 13:56:02.388464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20338 13:56:02.388944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20340 13:56:02.424343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20341 13:56:02.424802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20343 13:56:02.459829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20344 13:56:02.460282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20346 13:56:02.495253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20347 13:56:02.495662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20349 13:56:02.531012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20351 13:56:02.531466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20352 13:56:02.566029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20354 13:56:02.566606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20355 13:56:02.601038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20356 13:56:02.601497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20358 13:56:02.636746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20359 13:56:02.637226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20361 13:56:02.672239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20362 13:56:02.672654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20364 13:56:02.707770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20366 13:56:02.708220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20367 13:56:02.743626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20368 13:56:02.744191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20370 13:56:02.779493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20371 13:56:02.780034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20373 13:56:02.816893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20374 13:56:02.817373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20376 13:56:02.856609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20378 13:56:02.857165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20379 13:56:02.895612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20380 13:56:02.896066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20382 13:56:02.931521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20383 13:56:02.931931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20385 13:56:02.967521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20387 13:56:02.968165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20388 13:56:03.002980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20390 13:56:03.003610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20391 13:56:03.039071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20392 13:56:03.039538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20394 13:56:03.074043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20396 13:56:03.074668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20397 13:56:03.108915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20398 13:56:03.109353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20400 13:56:03.144307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20401 13:56:03.144727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20403 13:56:03.180526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20404 13:56:03.180973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20406 13:56:03.214991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20407 13:56:03.215461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20409 13:56:03.250921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20410 13:56:03.251353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20412 13:56:03.311244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20413 13:56:03.311678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20415 13:56:03.347154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20416 13:56:03.347577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20418 13:56:03.382277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20420 13:56:03.382927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20421 13:56:03.417485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20423 13:56:03.418133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20424 13:56:03.452652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20425 13:56:03.453080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20427 13:56:03.490984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20428 13:56:03.491411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20430 13:56:03.527943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20432 13:56:03.528406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20433 13:56:03.563529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20435 13:56:03.563943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20436 13:56:03.599318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20438 13:56:03.599961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20439 13:56:03.635302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20441 13:56:03.635759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20442 13:56:03.671260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20444 13:56:03.671713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20445 13:56:03.707480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20447 13:56:03.708116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20448 13:56:03.743897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20449 13:56:03.744313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20451 13:56:03.779693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20452 13:56:03.780105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20454 13:56:03.815860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20455 13:56:03.816293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20457 13:56:03.851353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20458 13:56:03.851785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20460 13:56:03.886862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20461 13:56:03.887271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20463 13:56:03.922872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20464 13:56:03.923282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20466 13:56:03.958389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20468 13:56:03.958861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20469 13:56:03.994015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20470 13:56:03.994462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20472 13:56:04.031404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20474 13:56:04.032055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20475 13:56:04.067667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20476 13:56:04.068150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20478 13:56:04.103022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20480 13:56:04.103488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20481 13:56:04.138356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20483 13:56:04.138829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20484 13:56:04.175131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20486 13:56:04.175601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20487 13:56:04.211414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20489 13:56:04.211884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20490 13:56:04.245953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20491 13:56:04.246403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20493 13:56:04.281364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20494 13:56:04.281798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20496 13:56:04.317011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20497 13:56:04.317451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20499 13:56:04.353206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20500 13:56:04.353618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20502 13:56:04.388429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20504 13:56:04.388862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20505 13:56:04.423651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20506 13:56:04.424065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20508 13:56:04.459291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20509 13:56:04.459720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20511 13:56:04.495075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20513 13:56:04.495701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20514 13:56:04.531287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20516 13:56:04.531768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20517 13:56:04.567505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20519 13:56:04.567986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20520 13:56:04.603928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20522 13:56:04.604570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20523 13:56:04.640303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20525 13:56:04.640944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20526 13:56:04.676785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20527 13:56:04.677265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20529 13:56:04.712683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20530 13:56:04.713123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20532 13:56:04.748614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20533 13:56:04.749040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20535 13:56:04.784398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20536 13:56:04.784878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20538 13:56:04.820468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20540 13:56:04.821107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20541 13:56:04.856041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20542 13:56:04.856497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20544 13:56:04.891951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20545 13:56:04.892393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20547 13:56:04.928462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20549 13:56:04.929042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20550 13:56:04.964471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20551 13:56:04.964944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20553 13:56:05.000188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20554 13:56:05.000661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20556 13:56:05.036317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20557 13:56:05.036786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20559 13:56:05.072148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20560 13:56:05.072635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20562 13:56:05.107964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20564 13:56:05.108610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20565 13:56:05.144722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20567 13:56:05.145333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20568 13:56:05.181333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20569 13:56:05.181787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20571 13:56:05.217528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20572 13:56:05.218020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20574 13:56:05.252249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20575 13:56:05.252695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20577 13:56:05.287764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20578 13:56:05.288218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20580 13:56:05.323282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20581 13:56:05.323914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20583 13:56:05.360155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20584 13:56:05.360623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20586 13:56:05.395549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20587 13:56:05.395964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20589 13:56:05.431492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20591 13:56:05.432054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20592 13:56:05.467160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20593 13:56:05.467618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20595 13:56:05.503404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20596 13:56:05.503863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20598 13:56:05.540337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20600 13:56:05.540960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20601 13:56:05.578026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20602 13:56:05.578507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20604 13:56:05.615487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20606 13:56:05.616124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20607 13:56:05.655164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20609 13:56:05.655644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20610 13:56:05.695904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20612 13:56:05.696362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20613 13:56:05.732450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20615 13:56:05.732894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20616 13:56:05.767771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20618 13:56:05.768350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20619 13:56:05.803568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20621 13:56:05.804131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20622 13:56:05.839665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20623 13:56:05.840124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20625 13:56:05.874667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20626 13:56:05.875145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20628 13:56:05.909889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20629 13:56:05.910362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20631 13:56:05.945794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20632 13:56:05.946218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20634 13:56:05.980984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20636 13:56:05.981435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20637 13:56:06.016125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20638 13:56:06.016611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20640 13:56:06.051653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20641 13:56:06.052073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20643 13:56:06.086980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20644 13:56:06.087490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20646 13:56:06.125227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20648 13:56:06.125910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20649 13:56:06.161376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20651 13:56:06.162066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20652 13:56:06.198805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20653 13:56:06.199311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20655 13:56:06.235357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20657 13:56:06.236017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20658 13:56:06.270458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20660 13:56:06.271084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20661 13:56:06.305323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20662 13:56:06.305819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20664 13:56:06.341253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20666 13:56:06.341727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20667 13:56:06.380291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20669 13:56:06.380750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20670 13:56:06.415456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20671 13:56:06.415924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20673 13:56:06.451879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20675 13:56:06.452428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20676 13:56:06.489770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20677 13:56:06.490200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20679 13:56:06.525521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20681 13:56:06.525984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20682 13:56:06.561558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20683 13:56:06.561968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20685 13:56:06.597661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20687 13:56:06.598120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20688 13:56:06.633455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20689 13:56:06.633901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20691 13:56:06.669529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20692 13:56:06.670030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20694 13:56:06.704795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20696 13:56:06.705430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20697 13:56:06.740270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20699 13:56:06.740725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20700 13:56:06.775868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20701 13:56:06.776275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20703 13:56:06.811203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20705 13:56:06.811673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20706 13:56:06.846593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20707 13:56:06.847027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20709 13:56:06.881782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20710 13:56:06.882223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20712 13:56:06.916928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20713 13:56:06.917348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20715 13:56:06.952100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20717 13:56:06.952565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20718 13:56:06.987739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20720 13:56:06.988203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20721 13:56:07.022914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20722 13:56:07.023331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20724 13:56:07.057917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20725 13:56:07.058400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20727 13:56:07.093943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20728 13:56:07.094419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20730 13:56:07.128150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20731 13:56:07.128648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20733 13:56:07.163318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20734 13:56:07.163766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20736 13:56:07.198399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20738 13:56:07.199059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20739 13:56:07.233818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20740 13:56:07.234272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20742 13:56:07.269629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20743 13:56:07.270082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20745 13:56:07.305300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20747 13:56:07.305877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20748 13:56:07.340136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20749 13:56:07.340626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20751 13:56:07.375782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20753 13:56:07.376223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20754 13:56:07.410871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20755 13:56:07.411291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20757 13:56:07.445798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20759 13:56:07.446382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20760 13:56:07.481725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20761 13:56:07.482190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20763 13:56:07.516711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20764 13:56:07.517173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20766 13:56:07.551932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20767 13:56:07.552408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20769 13:56:07.587928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20770 13:56:07.588386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20772 13:56:07.623669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20773 13:56:07.624102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20775 13:56:07.660556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20776 13:56:07.660995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20778 13:56:07.696601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20780 13:56:07.697067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20781 13:56:07.732287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20782 13:56:07.732715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20784 13:56:07.768558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20786 13:56:07.769023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20787 13:56:07.805142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20789 13:56:07.805599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20790 13:56:07.841522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20792 13:56:07.841983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20793 13:56:07.894185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20795 13:56:07.894674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20796 13:56:07.931267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20797 13:56:07.931666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20799 13:56:07.967122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20800 13:56:07.967613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20802 13:56:08.002313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20804 13:56:08.002950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20805 13:56:08.037314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20806 13:56:08.037678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20808 13:56:08.072461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20810 13:56:08.073088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20811 13:56:08.107923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20812 13:56:08.108410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20814 13:56:08.144351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20816 13:56:08.144815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20817 13:56:08.179563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20818 13:56:08.179965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20820 13:56:08.215854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20822 13:56:08.216293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20823 13:56:08.251587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20824 13:56:08.252009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20826 13:56:08.286380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20828 13:56:08.286814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20829 13:56:08.321332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20830 13:56:08.321768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20832 13:56:08.357086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20833 13:56:08.357526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20835 13:56:08.408096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20836 13:56:08.408566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20838 13:56:08.452612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20839 13:56:08.453070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20841 13:56:08.489123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20842 13:56:08.489534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20844 13:56:08.524200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20845 13:56:08.524638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20847 13:56:08.559697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20849 13:56:08.560271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20850 13:56:08.594630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20851 13:56:08.595115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20853 13:56:08.633109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20855 13:56:08.633572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20856 13:56:08.669254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20858 13:56:08.669946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20859 13:56:08.705053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20861 13:56:08.705673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20862 13:56:08.740298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20863 13:56:08.740785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20865 13:56:08.776166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20867 13:56:08.776735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20868 13:56:08.811508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20869 13:56:08.811981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20871 13:56:08.847654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20872 13:56:08.848136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20874 13:56:08.883521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20875 13:56:08.883992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20877 13:56:08.919056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20879 13:56:08.919657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20880 13:56:08.954521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20882 13:56:08.954984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20883 13:56:08.990366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20885 13:56:08.990798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20886 13:56:09.025968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20887 13:56:09.026401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20889 13:56:09.062101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20890 13:56:09.062574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20892 13:56:09.097174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20893 13:56:09.097572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20895 13:56:09.132446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20897 13:56:09.132882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20898 13:56:09.167362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20899 13:56:09.167782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20901 13:56:09.203921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20902 13:56:09.204430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20904 13:56:09.239720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20905 13:56:09.240144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20907 13:56:09.275278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20909 13:56:09.275741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20910 13:56:09.311220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20912 13:56:09.311684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20913 13:56:09.346164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20914 13:56:09.346580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20916 13:56:09.381909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20917 13:56:09.382335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20919 13:56:09.418997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20920 13:56:09.419429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20922 13:56:09.453672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20923 13:56:09.454115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20925 13:56:09.489434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20926 13:56:09.489860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20928 13:56:09.524460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20929 13:56:09.524915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20931 13:56:09.559617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20932 13:56:09.560100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20934 13:56:09.595696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
20935 13:56:09.596131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20937 13:56:09.631686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
20939 13:56:09.632145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
20940 13:56:09.667807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
20942 13:56:09.668458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
20943 13:56:09.703308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
20945 13:56:09.703740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
20946 13:56:09.739033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
20947 13:56:09.739466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
20949 13:56:09.775295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
20951 13:56:09.775959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
20952 13:56:09.811559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
20953 13:56:09.812017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
20955 13:56:09.847557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
20956 13:56:09.848034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
20958 13:56:09.883344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
20960 13:56:09.883970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
20961 13:56:09.918331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
20963 13:56:09.918945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
20964 13:56:09.954002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
20966 13:56:09.954473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
20967 13:56:09.989953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
20968 13:56:09.990438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
20970 13:56:10.024897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
20971 13:56:10.025375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
20973 13:56:10.059944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
20975 13:56:10.060580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
20976 13:56:10.095336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
20978 13:56:10.095927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
20979 13:56:10.129873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
20980 13:56:10.130354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
20982 13:56:10.165275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
20984 13:56:10.165923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
20985 13:56:10.200157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
20986 13:56:10.200615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
20988 13:56:10.235442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
20989 13:56:10.235857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
20991 13:56:10.270780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
20992 13:56:10.271257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
20994 13:56:10.306263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
20996 13:56:10.306876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
20997 13:56:10.341155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
20998 13:56:10.341640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
21000 13:56:10.376114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
21002 13:56:10.376659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
21003 13:56:10.411441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
21004 13:56:10.411911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
21006 13:56:10.447250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
21008 13:56:10.447903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
21009 13:56:10.483770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
21011 13:56:10.484495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
21012 13:56:10.519521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
21014 13:56:10.519951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
21015 13:56:10.554393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
21017 13:56:10.554997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
21018 13:56:10.590834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
21020 13:56:10.591616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
21021 13:56:10.626277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
21023 13:56:10.627107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
21024 13:56:10.663112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
21026 13:56:10.663919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
21027 13:56:10.699266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
21029 13:56:10.699748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
21030 13:56:10.736441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
21031 13:56:10.736872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
21033 13:56:10.772741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
21034 13:56:10.773118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
21036 13:56:10.808188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
21037 13:56:10.808598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
21039 13:56:10.844138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
21040 13:56:10.844587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
21042 13:56:10.879454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
21044 13:56:10.880021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
21045 13:56:10.914038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
21046 13:56:10.914426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
21048 13:56:10.951216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
21049 13:56:10.951643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
21051 13:56:10.987335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
21052 13:56:10.987813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
21054 13:56:11.023064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
21055 13:56:11.023481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
21057 13:56:11.058450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
21059 13:56:11.058891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
21060 13:56:11.094953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
21061 13:56:11.095358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
21063 13:56:11.131350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
21064 13:56:11.131767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
21066 13:56:11.167262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
21067 13:56:11.167650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
21069 13:56:11.205341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
21071 13:56:11.206111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
21072 13:56:11.241290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
21074 13:56:11.242058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
21075 13:56:11.278433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21077 13:56:11.278913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
21078 13:56:11.317061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21080 13:56:11.317677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21081 13:56:11.353102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21082 13:56:11.353567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21084 13:56:11.388748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21085 13:56:11.389162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21087 13:56:11.423929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21088 13:56:11.424381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21090 13:56:11.459584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21091 13:56:11.460043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21093 13:56:11.495135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21095 13:56:11.495567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21096 13:56:11.530469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21098 13:56:11.531098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21099 13:56:11.565906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21100 13:56:11.566389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21102 13:56:11.601689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21103 13:56:11.602142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21105 13:56:11.638057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21106 13:56:11.638480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21108 13:56:11.673640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21110 13:56:11.674119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21111 13:56:11.708463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21113 13:56:11.709036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21114 13:56:11.744034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21115 13:56:11.744500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21117 13:56:11.779566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21118 13:56:11.780022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21120 13:56:11.815275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21122 13:56:11.815841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21123 13:56:11.851334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21124 13:56:11.851814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21126 13:56:11.887184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21127 13:56:11.887656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21129 13:56:11.923882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21130 13:56:11.924344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21132 13:56:11.959723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21133 13:56:11.960173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21135 13:56:11.996389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21137 13:56:11.996873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21138 13:56:12.031956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21140 13:56:12.032519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21141 13:56:12.067899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21142 13:56:12.068326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21144 13:56:12.104534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21145 13:56:12.104954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21147 13:56:12.139765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21148 13:56:12.140228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21150 13:56:12.175037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21152 13:56:12.175492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21153 13:56:12.209890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21154 13:56:12.210346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21156 13:56:12.244860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21157 13:56:12.245341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21159 13:56:12.280089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21160 13:56:12.280565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21162 13:56:12.314844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21164 13:56:12.315403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21165 13:56:12.349562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21166 13:56:12.350028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21168 13:56:12.385518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21170 13:56:12.386085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21171 13:56:12.420215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21173 13:56:12.420911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21174 13:56:12.454870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21175 13:56:12.455292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21177 13:56:12.489600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21178 13:56:12.490025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21180 13:56:12.525057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21181 13:56:12.525511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21183 13:56:12.560333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21184 13:56:12.560769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21186 13:56:12.595544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21187 13:56:12.596080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21189 13:56:12.630838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21191 13:56:12.631258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21192 13:56:12.666038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21193 13:56:12.666461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21195 13:56:12.701532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21196 13:56:12.701969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21198 13:56:12.737799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21199 13:56:12.738221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21201 13:56:12.775633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21202 13:56:12.776076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21204 13:56:12.812979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21205 13:56:12.813354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21207 13:56:12.851733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21209 13:56:12.852171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21210 13:56:12.889121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21211 13:56:12.889544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21213 13:56:12.926972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21214 13:56:12.927351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21216 13:56:12.963244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21217 13:56:12.963665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21219 13:56:12.999673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21221 13:56:13.000092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21222 13:56:13.035823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21223 13:56:13.036313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21225 13:56:13.071872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21226 13:56:13.072334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21228 13:56:13.107618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21229 13:56:13.108086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21231 13:56:13.144072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21232 13:56:13.144511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21234 13:56:13.185720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21236 13:56:13.186165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21237 13:56:13.236077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21238 13:56:13.236562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21240 13:56:13.273821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21242 13:56:13.274427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21243 13:56:13.309963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21244 13:56:13.310438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21246 13:56:13.344663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21248 13:56:13.345268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21249 13:56:13.380135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21250 13:56:13.380522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21252 13:56:13.415256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21253 13:56:13.415634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21255 13:56:13.451473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21256 13:56:13.451855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21258 13:56:13.486458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21260 13:56:13.487057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21261 13:56:13.550029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21262 13:56:13.550488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21264 13:56:13.593589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21265 13:56:13.594125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21267 13:56:13.630462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21269 13:56:13.630908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21270 13:56:13.671825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21271 13:56:13.672224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21273 13:56:13.707115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21275 13:56:13.707758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21276 13:56:13.742649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21277 13:56:13.743092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21279 13:56:13.778786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21280 13:56:13.779220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21282 13:56:13.814047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21283 13:56:13.814498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21285 13:56:13.850309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21287 13:56:13.850940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21288 13:56:13.886704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21289 13:56:13.887239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21291 13:56:13.923606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21293 13:56:13.924207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21294 13:56:13.960476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21295 13:56:13.960941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21297 13:56:13.996674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21298 13:56:13.997121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21300 13:56:14.032780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21301 13:56:14.033265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21303 13:56:14.069046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21304 13:56:14.069457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21306 13:56:14.105176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21307 13:56:14.105598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21309 13:56:14.140651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21310 13:56:14.141057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21312 13:56:14.176568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21313 13:56:14.177002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21315 13:56:14.212103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21317 13:56:14.212671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21318 13:56:14.249538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21320 13:56:14.250075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21321 13:56:14.295270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21323 13:56:14.295725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21324 13:56:14.331599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21325 13:56:14.332027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21327 13:56:14.368614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21329 13:56:14.369066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21330 13:56:14.404429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21331 13:56:14.404868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21333 13:56:14.441030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21334 13:56:14.441479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21336 13:56:14.482006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21338 13:56:14.482576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21339 13:56:14.518118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21341 13:56:14.518600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21342 13:56:14.555750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21343 13:56:14.556189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21345 13:56:14.592141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21347 13:56:14.592797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21348 13:56:14.627779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21350 13:56:14.628344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21351 13:56:14.665072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21352 13:56:14.665532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21354 13:56:14.701125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21355 13:56:14.701601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21357 13:56:14.736664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21358 13:56:14.737141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21360 13:56:14.772410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21361 13:56:14.772822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21363 13:56:14.808108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21364 13:56:14.808582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21366 13:56:14.843506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21368 13:56:14.843977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21369 13:56:14.879485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21370 13:56:14.879977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21372 13:56:14.914888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21373 13:56:14.915306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21375 13:56:14.949678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21376 13:56:14.950100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21378 13:56:14.985707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21380 13:56:14.986184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21381 13:56:15.021583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21382 13:56:15.022044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21384 13:56:15.057099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21385 13:56:15.057562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21387 13:56:15.092307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21388 13:56:15.092752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21390 13:56:15.129105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21391 13:56:15.129527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21393 13:56:15.165531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21395 13:56:15.166207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21396 13:56:15.202265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21398 13:56:15.202742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21399 13:56:15.238159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21401 13:56:15.238760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21402 13:56:15.273563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21404 13:56:15.274132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21405 13:56:15.309473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21406 13:56:15.309914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21408 13:56:15.344888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21410 13:56:15.345359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21411 13:56:15.380467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21413 13:56:15.381075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21414 13:56:15.416992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21416 13:56:15.417567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21417 13:56:15.452242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21419 13:56:15.452723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21420 13:56:15.489541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21421 13:56:15.489994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21423 13:56:15.527040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21425 13:56:15.527507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21426 13:56:15.561778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21427 13:56:15.562201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21429 13:56:15.598050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21430 13:56:15.598484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21432 13:56:15.636490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21433 13:56:15.636927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21435 13:56:15.673083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21437 13:56:15.673540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21438 13:56:15.710106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21439 13:56:15.710539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21441 13:56:15.745965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21442 13:56:15.746369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21444 13:56:15.782873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21446 13:56:15.783329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21447 13:56:15.819426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21449 13:56:15.819877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21450 13:56:15.855356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21451 13:56:15.855782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21453 13:56:15.891653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21455 13:56:15.892115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21456 13:56:15.927577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21457 13:56:15.927976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21459 13:56:15.965075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21460 13:56:15.965489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21462 13:56:16.000440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21463 13:56:16.000881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21465 13:56:16.036060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21467 13:56:16.036522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21468 13:56:16.072932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21469 13:56:16.073368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21471 13:56:16.108541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21472 13:56:16.108970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21474 13:56:16.144122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21475 13:56:16.144498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21477 13:56:16.179694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21479 13:56:16.180346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21480 13:56:16.215535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21482 13:56:16.216183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21483 13:56:16.251544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21484 13:56:16.252120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21486 13:56:16.288600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21488 13:56:16.289174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21489 13:56:16.324131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21490 13:56:16.324564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21492 13:56:16.359670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21493 13:56:16.360094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21495 13:56:16.394966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21496 13:56:16.395432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21498 13:56:16.431018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21500 13:56:16.431759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21501 13:56:16.466379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21503 13:56:16.466853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21504 13:56:16.503142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21505 13:56:16.503577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21507 13:56:16.538939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21509 13:56:16.539402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21510 13:56:16.575088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21511 13:56:16.575502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21513 13:56:16.610379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21515 13:56:16.610859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21516 13:56:16.648454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21518 13:56:16.649031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21519 13:56:16.684354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21520 13:56:16.684821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21522 13:56:16.719617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21524 13:56:16.720180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21525 13:56:16.755807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21526 13:56:16.756236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21528 13:56:16.792642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21530 13:56:16.793118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21531 13:56:16.831982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21533 13:56:16.832458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21534 13:56:16.868824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21536 13:56:16.869302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21537 13:56:16.905259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21538 13:56:16.905684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21540 13:56:16.941815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21541 13:56:16.942253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21543 13:56:16.978949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21544 13:56:16.979377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21546 13:56:17.015194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21547 13:56:17.015617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21549 13:56:17.051190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21550 13:56:17.051693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21552 13:56:17.087963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21554 13:56:17.088427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21555 13:56:17.124160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21556 13:56:17.124646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21558 13:56:17.159732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21560 13:56:17.160346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21561 13:56:17.196663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21562 13:56:17.197108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21564 13:56:17.233392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21565 13:56:17.233885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21567 13:56:17.269936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21568 13:56:17.270314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21570 13:56:17.305451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21571 13:56:17.305875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21573 13:56:17.340301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21574 13:56:17.340766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21576 13:56:17.376113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21578 13:56:17.376593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21579 13:56:17.411704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21580 13:56:17.412171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21582 13:56:17.448262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21583 13:56:17.448743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21585 13:56:17.484736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21587 13:56:17.485197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21588 13:56:17.520689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21589 13:56:17.521119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21591 13:56:17.557192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21592 13:56:17.557622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21594 13:56:17.594429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21596 13:56:17.594913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21597 13:56:17.631041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21599 13:56:17.631518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21600 13:56:17.673189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21601 13:56:17.673611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21603 13:56:17.720398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21605 13:56:17.720983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21606 13:56:17.755869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21607 13:56:17.756348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21609 13:56:17.792481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21610 13:56:17.792970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21612 13:56:17.828409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21613 13:56:17.828893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21615 13:56:17.864724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21616 13:56:17.865149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21618 13:56:17.901582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21620 13:56:17.902059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21621 13:56:17.940935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21623 13:56:17.941333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21624 13:56:17.977592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21625 13:56:17.977994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21627 13:56:18.013580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21628 13:56:18.014029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21630 13:56:18.049075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21632 13:56:18.049713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21633 13:56:18.085208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21635 13:56:18.085786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21636 13:56:18.121693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21637 13:56:18.122189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21639 13:56:18.159346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21640 13:56:18.159860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21642 13:56:18.195329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21643 13:56:18.195855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21645 13:56:18.231819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21646 13:56:18.232248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21648 13:56:18.268381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21649 13:56:18.268851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21651 13:56:18.304458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21652 13:56:18.304933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21654 13:56:18.339724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21655 13:56:18.340197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21657 13:56:18.375453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21659 13:56:18.376061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21660 13:56:18.411048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21661 13:56:18.411471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21663 13:56:18.447289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21665 13:56:18.447767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21666 13:56:18.483107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21667 13:56:18.483554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21669 13:56:18.519008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21671 13:56:18.519629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21672 13:56:18.555145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21673 13:56:18.555595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21675 13:56:18.591883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21676 13:56:18.592315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21678 13:56:18.628667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21679 13:56:18.629118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21681 13:56:18.689678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21683 13:56:18.690156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21684 13:56:18.725940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21685 13:56:18.726370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21687 13:56:18.762576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21689 13:56:18.763042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21690 13:56:18.799889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21692 13:56:18.800461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21693 13:56:18.835729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21695 13:56:18.836210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21696 13:56:18.872596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21697 13:56:18.873044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21699 13:56:18.909388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21700 13:56:18.909817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21702 13:56:18.946150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21704 13:56:18.946613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21705 13:56:18.984476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21706 13:56:18.984952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21708 13:56:19.021790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21709 13:56:19.022238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21711 13:56:19.059070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21712 13:56:19.059534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21714 13:56:19.094908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21715 13:56:19.095360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21717 13:56:19.130494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21719 13:56:19.130953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21720 13:56:19.165978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21721 13:56:19.166358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21723 13:56:19.209496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21724 13:56:19.209959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21726 13:56:19.246120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21728 13:56:19.246729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21729 13:56:19.282536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21731 13:56:19.283002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21732 13:56:19.318948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21734 13:56:19.319395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21735 13:56:19.355549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21737 13:56:19.356004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21738 13:56:19.391009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21739 13:56:19.391446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21741 13:56:19.427113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21742 13:56:19.427551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21744 13:56:19.463358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21745 13:56:19.463943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21747 13:56:19.499784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21748 13:56:19.500254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21750 13:56:19.535760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21751 13:56:19.536235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21753 13:56:19.572022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21754 13:56:19.572515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21756 13:56:19.608414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21758 13:56:19.608921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21759 13:56:19.644376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21761 13:56:19.644974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21762 13:56:19.681068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21764 13:56:19.681639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21765 13:56:19.717212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21766 13:56:19.717666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21768 13:56:19.752521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21770 13:56:19.753015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21771 13:56:19.787354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21772 13:56:19.787775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21774 13:56:19.823353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21776 13:56:19.823810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21777 13:56:19.859583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21779 13:56:19.860038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21780 13:56:19.895844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21781 13:56:19.896259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21783 13:56:19.931878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21784 13:56:19.932307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21786 13:56:19.967643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21787 13:56:19.968083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21789 13:56:20.003908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21791 13:56:20.004493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21792 13:56:20.017703 <47>[ 209.651460] systemd-journald[105]: Sent WATCHDOG=1 notification.
21793 13:56:20.044754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21794 13:56:20.045197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21796 13:56:20.080308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21798 13:56:20.081034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21799 13:56:20.116014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21800 13:56:20.116542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21802 13:56:20.151418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21803 13:56:20.151870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21805 13:56:20.187272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21806 13:56:20.187721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21808 13:56:20.222864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21809 13:56:20.223223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21811 13:56:20.256840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21812 13:56:20.257147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21814 13:56:20.293778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21815 13:56:20.294241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21817 13:56:20.330685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21819 13:56:20.331138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21820 13:56:20.367017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21821 13:56:20.367507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21823 13:56:20.402575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21825 13:56:20.403100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21826 13:56:20.437846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21827 13:56:20.438198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21829 13:56:20.473523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21830 13:56:20.473877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21832 13:56:20.509826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21834 13:56:20.510295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21835 13:56:20.545644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21836 13:56:20.546074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21838 13:56:20.581841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21839 13:56:20.582264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21841 13:56:20.619213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21842 13:56:20.619636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21844 13:56:20.655518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21846 13:56:20.655985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21847 13:56:20.692529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21848 13:56:20.692970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21850 13:56:20.728739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21851 13:56:20.729307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21853 13:56:20.764395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21854 13:56:20.764892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21856 13:56:20.800535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21857 13:56:20.800918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21859 13:56:20.836324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21861 13:56:20.836714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21862 13:56:20.872545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21863 13:56:20.873036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21865 13:56:20.928261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21866 13:56:20.928646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21868 13:56:20.972105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21869 13:56:20.972518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21871 13:56:21.012796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21872 13:56:21.013205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21874 13:56:21.051872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21875 13:56:21.052291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21877 13:56:21.086274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21879 13:56:21.086728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21880 13:56:21.120068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21881 13:56:21.120442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21883 13:56:21.153704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21884 13:56:21.154098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21886 13:56:21.187438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21887 13:56:21.187842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21889 13:56:21.221293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21890 13:56:21.221680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21892 13:56:21.255294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21893 13:56:21.255693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21895 13:56:21.289665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21897 13:56:21.290111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21898 13:56:21.324187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21900 13:56:21.324836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21901 13:56:21.358808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21902 13:56:21.359254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21904 13:56:21.391986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21905 13:56:21.392431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21907 13:56:21.425560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21908 13:56:21.426006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21910 13:56:21.459361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21911 13:56:21.459786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21913 13:56:21.493496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21914 13:56:21.493925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21916 13:56:21.527545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21917 13:56:21.528015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21919 13:56:21.561125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21920 13:56:21.561578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21922 13:56:21.596673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21924 13:56:21.597350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21925 13:56:21.631225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21927 13:56:21.631678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21928 13:56:21.666558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21930 13:56:21.667000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21931 13:56:21.700276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21933 13:56:21.700727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21934 13:56:21.735469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21935 13:56:21.735850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21937 13:56:21.770155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
21938 13:56:21.770604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
21940 13:56:21.803676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
21941 13:56:21.804113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
21943 13:56:21.836421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
21944 13:56:21.836860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
21946 13:56:21.868405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
21947 13:56:21.868947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
21949 13:56:21.901537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
21950 13:56:21.902070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
21952 13:56:21.936413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
21953 13:56:21.936868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
21955 13:56:21.970505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
21957 13:56:21.971159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
21958 13:56:22.003061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
21959 13:56:22.003512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
21961 13:56:22.035706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
21962 13:56:22.036146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
21964 13:56:22.068350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
21965 13:56:22.068839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
21967 13:56:22.101228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
21968 13:56:22.101693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
21970 13:56:22.135473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
21971 13:56:22.135925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
21973 13:56:22.168706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
21974 13:56:22.169169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
21976 13:56:22.201587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
21978 13:56:22.202202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
21979 13:56:22.234781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
21981 13:56:22.235269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
21982 13:56:22.267598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
21983 13:56:22.268031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
21985 13:56:22.299309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
21986 13:56:22.299753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
21988 13:56:22.331336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
21989 13:56:22.331777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
21991 13:56:22.365167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
21992 13:56:22.365672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
21994 13:56:22.398823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
21996 13:56:22.399479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
21997 13:56:22.434804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
21999 13:56:22.435312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
22000 13:56:22.471700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
22001 13:56:22.472085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
22003 13:56:22.504632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
22004 13:56:22.505093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
22006 13:56:22.536361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
22007 13:56:22.536837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
22009 13:56:22.576045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
22011 13:56:22.576464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
22012 13:56:22.611019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
22014 13:56:22.611504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
22015 13:56:22.643399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
22016 13:56:22.643858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
22018 13:56:22.676022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
22019 13:56:22.676447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
22021 13:56:22.707741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
22022 13:56:22.708237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
22024 13:56:22.740412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
22025 13:56:22.740896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
22027 13:56:22.772350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
22029 13:56:22.772918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
22030 13:56:22.807537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
22031 13:56:22.807974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
22033 13:56:22.842492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
22035 13:56:22.843053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
22036 13:56:22.879325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
22037 13:56:22.879791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
22039 13:56:22.914920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
22041 13:56:22.915487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
22042 13:56:22.948032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
22044 13:56:22.948507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
22045 13:56:22.980876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
22047 13:56:22.981440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
22048 13:56:23.013719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
22049 13:56:23.014194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
22051 13:56:23.045582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
22052 13:56:23.046087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
22054 13:56:23.079695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
22055 13:56:23.080109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
22057 13:56:23.116738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
22059 13:56:23.117124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
22060 13:56:23.149713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
22061 13:56:23.150202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
22063 13:56:23.184569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
22065 13:56:23.185066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
22066 13:56:23.216552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
22067 13:56:23.217039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
22069 13:56:23.248282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
22070 13:56:23.248775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
22072 13:56:23.280970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
22074 13:56:23.281613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
22075 13:56:23.312958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
22077 13:56:23.313589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22078 13:56:23.345181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22080 13:56:23.345767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22081 13:56:23.377309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22083 13:56:23.377800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22084 13:56:23.409605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22085 13:56:23.410042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22087 13:56:23.441674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22088 13:56:23.442106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22090 13:56:23.472986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22091 13:56:23.473411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22093 13:56:23.504661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22095 13:56:23.505312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22096 13:56:23.537301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22098 13:56:23.538029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22099 13:56:23.570702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22100 13:56:23.571186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22102 13:56:23.604516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22104 13:56:23.604978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22105 13:56:23.637915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22107 13:56:23.638384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22108 13:56:23.670435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22110 13:56:23.670882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22111 13:56:23.702791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22113 13:56:23.703229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22114 13:56:23.735110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22115 13:56:23.735513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22117 13:56:23.789600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22118 13:56:23.790007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22120 13:56:23.822288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22122 13:56:23.822892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22123 13:56:23.854190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22125 13:56:23.854915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22126 13:56:23.886587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22128 13:56:23.887140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22129 13:56:23.918857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22131 13:56:23.919420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22132 13:56:23.951242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22134 13:56:23.951795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22135 13:56:23.983354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22136 13:56:23.983805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22138 13:56:24.015623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22140 13:56:24.016248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22141 13:56:24.047916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22142 13:56:24.048381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22144 13:56:24.080459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22145 13:56:24.080933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22147 13:56:24.112659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22149 13:56:24.113230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22150 13:56:24.144754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22152 13:56:24.145301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22153 13:56:24.177418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22154 13:56:24.177886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22156 13:56:24.209472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22157 13:56:24.209933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22159 13:56:24.241666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22161 13:56:24.242290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22162 13:56:24.273003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22163 13:56:24.273517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22165 13:56:24.304665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22166 13:56:24.305144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22168 13:56:24.336360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22170 13:56:24.336840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22171 13:56:24.368085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22172 13:56:24.368509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22174 13:56:24.399742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22175 13:56:24.400218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22177 13:56:24.432019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22178 13:56:24.432489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22180 13:56:24.464754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22181 13:56:24.465225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22183 13:56:24.497498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22184 13:56:24.497938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22186 13:56:24.531552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22187 13:56:24.532003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22189 13:56:24.564133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22190 13:56:24.564585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22192 13:56:24.597554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22193 13:56:24.598036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22195 13:56:24.629475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22196 13:56:24.629937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22198 13:56:24.661436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22199 13:56:24.661914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22201 13:56:24.693763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22202 13:56:24.694283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22204 13:56:24.727178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22205 13:56:24.727647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22207 13:56:24.759013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22208 13:56:24.759507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22210 13:56:24.791734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22212 13:56:24.792217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22213 13:56:24.823252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22214 13:56:24.823697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22216 13:56:24.855580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22217 13:56:24.856015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22219 13:56:24.887723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22221 13:56:24.888201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22222 13:56:24.919303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22223 13:56:24.919725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22225 13:56:24.951283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22226 13:56:24.951738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22228 13:56:24.983368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22229 13:56:24.983826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22231 13:56:25.014627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22232 13:56:25.015138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22234 13:56:25.046209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22236 13:56:25.046786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22237 13:56:25.078320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22239 13:56:25.078802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22240 13:56:25.110016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22242 13:56:25.110642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22243 13:56:25.142414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22245 13:56:25.143031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22246 13:56:25.174570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22248 13:56:25.175023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22249 13:56:25.207104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22250 13:56:25.207563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22252 13:56:25.239759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22253 13:56:25.240228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22255 13:56:25.273062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22257 13:56:25.273630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22258 13:56:25.305756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22259 13:56:25.306311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22261 13:56:25.340364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22262 13:56:25.340804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22264 13:56:25.373585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22265 13:56:25.374076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22267 13:56:25.405201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22269 13:56:25.405674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22270 13:56:25.437335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22271 13:56:25.437757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22273 13:56:25.468760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22274 13:56:25.469229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22276 13:56:25.501446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22277 13:56:25.502000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22279 13:56:25.534512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22281 13:56:25.535058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22282 13:56:25.566043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22283 13:56:25.566491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22285 13:56:25.598033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22286 13:56:25.598456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22288 13:56:25.633662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22290 13:56:25.634150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22291 13:56:25.670454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22293 13:56:25.670970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22294 13:56:25.705661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22295 13:56:25.706170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22297 13:56:25.740892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22298 13:56:25.741432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22300 13:56:25.773560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22301 13:56:25.774065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22303 13:56:25.805125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22304 13:56:25.805619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22306 13:56:25.836521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22307 13:56:25.837007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22309 13:56:25.869097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22311 13:56:25.869671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22312 13:56:25.900955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22314 13:56:25.901514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22315 13:56:25.932145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22316 13:56:25.932558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22318 13:56:25.963947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22319 13:56:25.964410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22321 13:56:25.996503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22322 13:56:25.996962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22324 13:56:26.028017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22326 13:56:26.028550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22327 13:56:26.059122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22328 13:56:26.059570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22330 13:56:26.090396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22332 13:56:26.091015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22333 13:56:26.121712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22334 13:56:26.122137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22336 13:56:26.152709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22337 13:56:26.153190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22339 13:56:26.184663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22340 13:56:26.185144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22342 13:56:26.216034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22343 13:56:26.216483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22345 13:56:26.247083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22347 13:56:26.247657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22348 13:56:26.279247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22349 13:56:26.279674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22351 13:56:26.312671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22352 13:56:26.313100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22354 13:56:26.344358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22355 13:56:26.344837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22357 13:56:26.375378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22358 13:56:26.375865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22360 13:56:26.406639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22361 13:56:26.407075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22363 13:56:26.438143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22365 13:56:26.438710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22366 13:56:26.470456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22368 13:56:26.471116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22369 13:56:26.502103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22370 13:56:26.502546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22372 13:56:26.534417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22374 13:56:26.534893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22375 13:56:26.566443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22377 13:56:26.567089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22378 13:56:26.602795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22379 13:56:26.603279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22381 13:56:26.637759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22382 13:56:26.638212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22384 13:56:26.670020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22385 13:56:26.670456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22387 13:56:26.704183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22389 13:56:26.704831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22390 13:56:26.739583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22392 13:56:26.740023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22393 13:56:26.774896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22394 13:56:26.775391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22396 13:56:26.809404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22398 13:56:26.809855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22399 13:56:26.845633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22400 13:56:26.846065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22402 13:56:26.881287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22403 13:56:26.881680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22405 13:56:26.916281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22406 13:56:26.916696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22408 13:56:26.952019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22409 13:56:26.952470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22411 13:56:26.987925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22412 13:56:26.988398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22414 13:56:27.024921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22416 13:56:27.025485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22417 13:56:27.060262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22418 13:56:27.060710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22420 13:56:27.092975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22422 13:56:27.093540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22423 13:56:27.125091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22425 13:56:27.125637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22426 13:56:27.157362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22427 13:56:27.157827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22429 13:56:27.196037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22431 13:56:27.196586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22432 13:56:27.233832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22433 13:56:27.234304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22435 13:56:27.268842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22436 13:56:27.269306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22438 13:56:27.309021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22440 13:56:27.309627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22441 13:56:27.349426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22442 13:56:27.349886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22444 13:56:27.387474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22445 13:56:27.387926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22447 13:56:27.425091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22448 13:56:27.425594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22450 13:56:27.457996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22451 13:56:27.458506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22453 13:56:27.491412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22454 13:56:27.491806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22456 13:56:27.523471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22458 13:56:27.523917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22459 13:56:27.555360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22461 13:56:27.555794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22462 13:56:27.587507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22464 13:56:27.588101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22465 13:56:27.619255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22467 13:56:27.619680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22468 13:56:27.651136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22469 13:56:27.651515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22471 13:56:27.683472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22472 13:56:27.683924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22474 13:56:27.714789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22475 13:56:27.715290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22477 13:56:27.746048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22478 13:56:27.746525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22480 13:56:27.778309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22482 13:56:27.779016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22483 13:56:27.811493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22485 13:56:27.811946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22486 13:56:27.843860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22487 13:56:27.844284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22489 13:56:27.879485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22490 13:56:27.879941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22492 13:56:27.913607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22494 13:56:27.914282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22495 13:56:27.947628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22496 13:56:27.948088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22498 13:56:27.980591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22499 13:56:27.981072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22501 13:56:28.011988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22502 13:56:28.012437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22504 13:56:28.044238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22505 13:56:28.044648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22507 13:56:28.075682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22508 13:56:28.076167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22510 13:56:28.107577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22512 13:56:28.108200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22513 13:56:28.139384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22515 13:56:28.139929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22516 13:56:28.171156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22517 13:56:28.171618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22519 13:56:28.203138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22520 13:56:28.203578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22522 13:56:28.234756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22523 13:56:28.235207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22525 13:56:28.266430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22527 13:56:28.266973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22528 13:56:28.298492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22530 13:56:28.299032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22531 13:56:28.329984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22533 13:56:28.330594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22534 13:56:28.362882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22535 13:56:28.363296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22537 13:56:28.396807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22538 13:56:28.397208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22540 13:56:28.435652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22541 13:56:28.436051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22543 13:56:28.470203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22545 13:56:28.470885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22546 13:56:28.502393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22548 13:56:28.503043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22549 13:56:28.545443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22550 13:56:28.545805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22552 13:56:28.577633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22553 13:56:28.578106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22555 13:56:28.609844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22557 13:56:28.610313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22558 13:56:28.642501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22560 13:56:28.642983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22561 13:56:28.680427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22563 13:56:28.680897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22564 13:56:28.712463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22565 13:56:28.712891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22567 13:56:28.744325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22568 13:56:28.744739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22570 13:56:28.776604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22571 13:56:28.777055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22573 13:56:28.808293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22575 13:56:28.808839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22576 13:56:28.840235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22577 13:56:28.840671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22579 13:56:28.887943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22580 13:56:28.888320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22582 13:56:28.923684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22583 13:56:28.924140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22585 13:56:28.956165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22586 13:56:28.956602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22588 13:56:28.988480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22590 13:56:28.989031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22591 13:56:29.020371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22592 13:56:29.020804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22594 13:56:29.052204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22595 13:56:29.052596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22597 13:56:29.083712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22598 13:56:29.084122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22600 13:56:29.116113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22601 13:56:29.116532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22603 13:56:29.148066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22604 13:56:29.148549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22606 13:56:29.179976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22607 13:56:29.180385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22609 13:56:29.211773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22610 13:56:29.212222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22612 13:56:29.243051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22613 13:56:29.243527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22615 13:56:29.275150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22616 13:56:29.275561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22618 13:56:29.307290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22619 13:56:29.307817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22621 13:56:29.338825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22622 13:56:29.339280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22624 13:56:29.370491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22626 13:56:29.371047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22627 13:56:29.401793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22629 13:56:29.402341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22630 13:56:29.433079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22632 13:56:29.433705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22633 13:56:29.464546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22634 13:56:29.464955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22636 13:56:29.496603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22637 13:56:29.497083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22639 13:56:29.529259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22641 13:56:29.529850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22642 13:56:29.560682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22644 13:56:29.561232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22645 13:56:29.592123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22646 13:56:29.592586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22648 13:56:29.623532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22649 13:56:29.623978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22651 13:56:29.656165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22652 13:56:29.656628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22654 13:56:29.687492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22656 13:56:29.688032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22657 13:56:29.719227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22658 13:56:29.719683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22660 13:56:29.751036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22662 13:56:29.751589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22663 13:56:29.783331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22665 13:56:29.783880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22666 13:56:29.815480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22668 13:56:29.816101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22669 13:56:29.847782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22670 13:56:29.848247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22672 13:56:29.879340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22673 13:56:29.879798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22675 13:56:29.911291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22676 13:56:29.911754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22678 13:56:29.944793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22680 13:56:29.945423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22681 13:56:29.980833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22683 13:56:29.981296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22684 13:56:30.013371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22685 13:56:30.013793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22687 13:56:30.045809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22688 13:56:30.046214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22690 13:56:30.077941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22691 13:56:30.078346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22693 13:56:30.110088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22694 13:56:30.110557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22696 13:56:30.145248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22697 13:56:30.145628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22699 13:56:30.177894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22700 13:56:30.178321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22702 13:56:30.209515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22703 13:56:30.209982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22705 13:56:30.241256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22706 13:56:30.241685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22708 13:56:30.273312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22710 13:56:30.273879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22711 13:56:30.305629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22712 13:56:30.306119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22714 13:56:30.337181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22715 13:56:30.337663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22717 13:56:30.369245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22718 13:56:30.369694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22720 13:56:30.401468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22721 13:56:30.401972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22723 13:56:30.433339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22725 13:56:30.433964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22726 13:56:30.464621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22727 13:56:30.465085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22729 13:56:30.496053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22730 13:56:30.496494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22732 13:56:30.527346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22733 13:56:30.527824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22735 13:56:30.560037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22736 13:56:30.560463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22738 13:56:30.591786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22740 13:56:30.592244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22741 13:56:30.623399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22743 13:56:30.623956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22744 13:56:30.655278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22746 13:56:30.655945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22747 13:56:30.686855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22748 13:56:30.687371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22750 13:56:30.718391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22752 13:56:30.719195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22753 13:56:30.749835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22754 13:56:30.750406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22756 13:56:30.781932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22757 13:56:30.782371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22759 13:56:30.813809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22761 13:56:30.814204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22762 13:56:30.845204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22763 13:56:30.845673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22765 13:56:30.876953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22767 13:56:30.877409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22768 13:56:30.908522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22769 13:56:30.908924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22771 13:56:30.939775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22772 13:56:30.940193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22774 13:56:30.972001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22776 13:56:30.972566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22777 13:56:31.004158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22778 13:56:31.004614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22780 13:56:31.036198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22781 13:56:31.036647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22783 13:56:31.068023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22784 13:56:31.068503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22786 13:56:31.100176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22787 13:56:31.100634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22789 13:56:31.131290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22790 13:56:31.131749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22792 13:56:31.163525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22793 13:56:31.163977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22795 13:56:31.195670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22796 13:56:31.196129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22798 13:56:31.226927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22800 13:56:31.227539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22801 13:56:31.257584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22803 13:56:31.258162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22804 13:56:31.288806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22805 13:56:31.289245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22807 13:56:31.319585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22809 13:56:31.320148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22810 13:56:31.351196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22812 13:56:31.351823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22813 13:56:31.382051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22814 13:56:31.382552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22816 13:56:31.413103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22818 13:56:31.413743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22819 13:56:31.443520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22820 13:56:31.444010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22822 13:56:31.473908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22823 13:56:31.474386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22825 13:56:31.504831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22826 13:56:31.505295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22828 13:56:31.536306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22829 13:56:31.536754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22831 13:56:31.567535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22832 13:56:31.568011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22834 13:56:31.598944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22836 13:56:31.599482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22837 13:56:31.630798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22838 13:56:31.631258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22840 13:56:31.662216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22841 13:56:31.662694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22843 13:56:31.693259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22844 13:56:31.693778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22846 13:56:31.724413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22847 13:56:31.724874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22849 13:56:31.755703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22850 13:56:31.756154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22852 13:56:31.787182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22854 13:56:31.787732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22855 13:56:31.819376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22857 13:56:31.819926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22858 13:56:31.851637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22859 13:56:31.852094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22861 13:56:31.882920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22862 13:56:31.883375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22864 13:56:31.915712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22865 13:56:31.916181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22867 13:56:31.947355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22869 13:56:31.947798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22870 13:56:31.981130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22871 13:56:31.981571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22873 13:56:32.013338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22874 13:56:32.013795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22876 13:56:32.044626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22878 13:56:32.045186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22879 13:56:32.075946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22881 13:56:32.076494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22882 13:56:32.109858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22883 13:56:32.110292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22885 13:56:32.142281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22887 13:56:32.142791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22888 13:56:32.176993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22889 13:56:32.177462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22891 13:56:32.209407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22893 13:56:32.210035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22894 13:56:32.242462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22896 13:56:32.242899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22897 13:56:32.275094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22899 13:56:32.275530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22900 13:56:32.307440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22902 13:56:32.307993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22903 13:56:32.339888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22905 13:56:32.340357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22906 13:56:32.372231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22907 13:56:32.372642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22909 13:56:32.404052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22910 13:56:32.404485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22912 13:56:32.436327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22913 13:56:32.436742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22915 13:56:32.468233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22916 13:56:32.468664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22918 13:56:32.500305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22920 13:56:32.500767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22921 13:56:32.531787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22922 13:56:32.532189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22924 13:56:32.563686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22925 13:56:32.564151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22927 13:56:32.598060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22928 13:56:32.598475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22930 13:56:32.631401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22931 13:56:32.631827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22933 13:56:32.663952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22934 13:56:32.664372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22936 13:56:32.699867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22937 13:56:32.700307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
22939 13:56:32.741266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
22940 13:56:32.741795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
22942 13:56:32.783521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
22943 13:56:32.784047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
22945 13:56:32.816707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
22947 13:56:32.817405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
22948 13:56:32.849252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
22949 13:56:32.849629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
22951 13:56:32.888701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
22952 13:56:32.889092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
22954 13:56:32.926833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
22955 13:56:32.927233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
22957 13:56:32.963318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
22958 13:56:32.963684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
22960 13:56:32.997975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
22961 13:56:32.998390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
22963 13:56:33.032539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
22964 13:56:33.033016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
22966 13:56:33.067637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
22967 13:56:33.068089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
22969 13:56:33.101803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
22971 13:56:33.102277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
22972 13:56:33.135749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
22973 13:56:33.136170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
22975 13:56:33.169681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
22976 13:56:33.170127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
22978 13:56:33.203907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
22980 13:56:33.204380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
22981 13:56:33.237659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
22982 13:56:33.238072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
22984 13:56:33.273437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
22986 13:56:33.274016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
22987 13:56:33.308732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
22989 13:56:33.309312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
22990 13:56:33.342842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
22991 13:56:33.343368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
22993 13:56:33.378929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
22995 13:56:33.379553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
22996 13:56:33.413884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
22997 13:56:33.414349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
22999 13:56:33.447448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
23001 13:56:33.447927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
23002 13:56:33.481029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
23004 13:56:33.481503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
23005 13:56:33.514603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
23007 13:56:33.515070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
23008 13:56:33.549873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
23009 13:56:33.550239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
23011 13:56:33.585447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
23013 13:56:33.586047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
23014 13:56:33.619241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
23015 13:56:33.619703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
23017 13:56:33.653184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
23018 13:56:33.653655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
23020 13:56:33.687458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
23021 13:56:33.687924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
23023 13:56:33.722761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
23025 13:56:33.723212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
23026 13:56:33.756921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
23027 13:56:33.757399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
23029 13:56:33.791261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
23031 13:56:33.791898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
23032 13:56:33.826132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
23034 13:56:33.826763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
23035 13:56:33.860000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
23037 13:56:33.860459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
23038 13:56:33.896333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
23039 13:56:33.896746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
23041 13:56:33.929051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
23042 13:56:33.929536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
23044 13:56:33.961682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
23045 13:56:33.962148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
23047 13:56:34.004157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
23049 13:56:34.004700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
23050 13:56:34.051953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
23052 13:56:34.052518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
23053 13:56:34.087897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
23054 13:56:34.088361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
23056 13:56:34.123953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
23057 13:56:34.124426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
23059 13:56:34.159607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
23060 13:56:34.160082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
23062 13:56:34.195558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
23064 13:56:34.196018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
23065 13:56:34.232611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
23067 13:56:34.233076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
23068 13:56:34.268550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
23069 13:56:34.269030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
23071 13:56:34.304132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
23073 13:56:34.304764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
23074 13:56:34.339942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
23076 13:56:34.340586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
23077 13:56:34.375787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23079 13:56:34.376424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23080 13:56:34.415029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23082 13:56:34.415681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23083 13:56:34.450860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23084 13:56:34.451350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23086 13:56:34.487399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23088 13:56:34.488040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23089 13:56:34.523793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23091 13:56:34.524429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23092 13:56:34.559260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23093 13:56:34.559623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23095 13:56:34.595009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23097 13:56:34.595463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23098 13:56:34.631110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23099 13:56:34.631469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23101 13:56:34.667016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23102 13:56:34.667364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23104 13:56:34.702929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23105 13:56:34.703284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23107 13:56:34.737934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23108 13:56:34.738296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23110 13:56:34.773569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23111 13:56:34.773949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23113 13:56:34.808644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23114 13:56:34.809024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23116 13:56:34.844061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23117 13:56:34.844463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23119 13:56:34.880501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23120 13:56:34.880875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23122 13:56:34.915865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23123 13:56:34.916247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23125 13:56:34.951801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23126 13:56:34.952168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23128 13:56:34.987843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23129 13:56:34.988201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23131 13:56:35.023573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23132 13:56:35.024043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23134 13:56:35.059536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23135 13:56:35.059909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23137 13:56:35.095403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23138 13:56:35.095758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23140 13:56:35.131887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23141 13:56:35.132291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23143 13:56:35.168130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23144 13:56:35.168497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23146 13:56:35.204001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23147 13:56:35.204453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23149 13:56:35.239665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23150 13:56:35.240085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23152 13:56:35.275980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23153 13:56:35.276397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23155 13:56:35.311993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23157 13:56:35.312444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23158 13:56:35.347996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23159 13:56:35.348415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23161 13:56:35.384983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23163 13:56:35.385438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23164 13:56:35.420918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23166 13:56:35.421380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23167 13:56:35.456340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23168 13:56:35.456776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23170 13:56:35.492426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23171 13:56:35.492839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23173 13:56:35.528436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23174 13:56:35.528857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23176 13:56:35.564607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23177 13:56:35.564914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23179 13:56:35.599796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23180 13:56:35.600087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23182 13:56:35.635673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23183 13:56:35.636039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23185 13:56:35.674058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23187 13:56:35.674627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23188 13:56:35.709743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23190 13:56:35.710624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23191 13:56:35.744345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23192 13:56:35.744750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23194 13:56:35.780513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23195 13:56:35.780912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23197 13:56:35.816669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23198 13:56:35.817059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23200 13:56:35.852510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23201 13:56:35.852799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23203 13:56:35.888326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23205 13:56:35.888811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23206 13:56:35.923703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23208 13:56:35.924168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23209 13:56:35.959611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23210 13:56:35.959983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23212 13:56:35.995217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23213 13:56:35.995583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23215 13:56:36.031136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23217 13:56:36.031607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23218 13:56:36.067150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23219 13:56:36.067443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23221 13:56:36.102218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23222 13:56:36.102676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23224 13:56:36.137634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23225 13:56:36.138063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23227 13:56:36.173015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23228 13:56:36.173405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23230 13:56:36.208268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23231 13:56:36.208649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23233 13:56:36.243628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23234 13:56:36.243968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23236 13:56:36.279281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23237 13:56:36.279634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23239 13:56:36.315431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23240 13:56:36.315795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23242 13:56:36.350554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23244 13:56:36.350991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23245 13:56:36.385912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23246 13:56:36.386270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23248 13:56:36.421568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23249 13:56:36.421955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23251 13:56:36.456590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23253 13:56:36.457040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23254 13:56:36.491358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23255 13:56:36.491728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23257 13:56:36.527715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23258 13:56:36.528028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23260 13:56:36.563653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23262 13:56:36.563952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23263 13:56:36.598825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23264 13:56:36.599184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23266 13:56:36.634291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23268 13:56:36.634755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23269 13:56:36.669814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23270 13:56:36.670238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23272 13:56:36.705805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23274 13:56:36.706288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23275 13:56:36.740499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23277 13:56:36.741092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23278 13:56:36.775675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23280 13:56:36.776130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23281 13:56:36.811443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23282 13:56:36.811864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23284 13:56:36.852603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23285 13:56:36.853004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23287 13:56:36.888502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23289 13:56:36.889100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23290 13:56:36.932876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23291 13:56:36.933315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23293 13:56:36.983862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23294 13:56:36.984230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23296 13:56:37.021105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23298 13:56:37.021632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23299 13:56:37.056477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23300 13:56:37.056854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23302 13:56:37.092335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23304 13:56:37.092899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23305 13:56:37.127966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23307 13:56:37.128444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23308 13:56:37.164698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23310 13:56:37.165172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23311 13:56:37.201410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23313 13:56:37.201899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23314 13:56:37.237002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23315 13:56:37.237391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23317 13:56:37.271752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23318 13:56:37.272048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23320 13:56:37.307292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23321 13:56:37.307594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23323 13:56:37.343130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23324 13:56:37.343463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23326 13:56:37.378380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23328 13:56:37.378933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23329 13:56:37.413594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23331 13:56:37.414242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23332 13:56:37.448482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23333 13:56:37.448859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23335 13:56:37.484530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23336 13:56:37.484908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23338 13:56:37.520117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23340 13:56:37.520561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23341 13:56:37.555621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23342 13:56:37.555928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23344 13:56:37.590841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23346 13:56:37.591173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23347 13:56:37.625502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23348 13:56:37.625816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23350 13:56:37.660568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23351 13:56:37.660865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23353 13:56:37.696540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23354 13:56:37.696918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23356 13:56:37.731764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23357 13:56:37.732128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23359 13:56:37.767209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23361 13:56:37.767690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23362 13:56:37.802776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23363 13:56:37.803107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23365 13:56:37.849359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23366 13:56:37.849806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23368 13:56:37.895400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23370 13:56:37.895875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23371 13:56:37.929490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23373 13:56:37.929964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23374 13:56:37.963512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23375 13:56:37.963937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23377 13:56:37.997406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23379 13:56:37.997878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23380 13:56:38.030765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23381 13:56:38.031227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23383 13:56:38.062210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23385 13:56:38.062774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23386 13:56:38.093945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23387 13:56:38.094398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23389 13:56:38.125593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23390 13:56:38.126100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23392 13:56:38.157594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23393 13:56:38.158100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23395 13:56:38.190070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23396 13:56:38.190470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23398 13:56:38.222571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23400 13:56:38.223168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23401 13:56:38.258896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23403 13:56:38.259355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23404 13:56:38.290685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23405 13:56:38.291094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23407 13:56:38.323148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23409 13:56:38.323711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23410 13:56:38.354895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23411 13:56:38.355296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23413 13:56:38.386860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23414 13:56:38.387335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23416 13:56:38.418444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23418 13:56:38.419144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23419 13:56:38.449571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23420 13:56:38.450053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23422 13:56:38.481201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23424 13:56:38.481663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23425 13:56:38.513293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23426 13:56:38.513678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23428 13:56:38.545381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23429 13:56:38.545861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23431 13:56:38.577786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23432 13:56:38.578261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23434 13:56:38.609526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23436 13:56:38.610179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23437 13:56:38.641475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23438 13:56:38.642003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23440 13:56:38.673265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23441 13:56:38.673688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23443 13:56:38.704876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23444 13:56:38.705364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23446 13:56:38.737213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23447 13:56:38.737687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23449 13:56:38.770019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23450 13:56:38.770498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23452 13:56:38.802120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23453 13:56:38.802548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23455 13:56:38.833728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23456 13:56:38.834223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23458 13:56:38.865702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23459 13:56:38.866204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23461 13:56:38.897714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23462 13:56:38.898132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23464 13:56:38.931838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23465 13:56:38.932245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23467 13:56:38.965249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23468 13:56:38.965659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23470 13:56:38.997269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23472 13:56:38.997702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23473 13:56:39.029174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23474 13:56:39.029661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23476 13:56:39.060584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23477 13:56:39.061043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23479 13:56:39.092050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23480 13:56:39.092527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23482 13:56:39.146033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23483 13:56:39.146515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23485 13:56:39.183773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23486 13:56:39.184117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23488 13:56:39.220388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23489 13:56:39.220734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23491 13:56:39.257382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23493 13:56:39.257816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23494 13:56:39.295131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23496 13:56:39.295703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23497 13:56:39.331830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23498 13:56:39.332193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23500 13:56:39.368478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23501 13:56:39.368829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23503 13:56:39.405499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23504 13:56:39.405861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23506 13:56:39.443379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23507 13:56:39.443734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23509 13:56:39.481016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23510 13:56:39.481381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23512 13:56:39.519552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23513 13:56:39.519908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23515 13:56:39.557232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23516 13:56:39.557590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23518 13:56:39.596082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23519 13:56:39.596459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23521 13:56:39.635073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23522 13:56:39.635508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23524 13:56:39.676519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23525 13:56:39.676899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23527 13:56:39.720964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23529 13:56:39.721393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23530 13:56:39.757727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23531 13:56:39.758093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23533 13:56:39.795240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23534 13:56:39.795591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23536 13:56:39.832169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23537 13:56:39.832568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23539 13:56:39.869896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23540 13:56:39.870240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23542 13:56:39.907530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23543 13:56:39.907881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23545 13:56:39.948491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23546 13:56:39.948834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23548 13:56:39.985291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23549 13:56:39.985638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23551 13:56:40.023657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23552 13:56:40.023997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23554 13:56:40.063336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23555 13:56:40.063682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23557 13:56:40.101915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23558 13:56:40.102277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23560 13:56:40.141009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23561 13:56:40.141424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23563 13:56:40.180930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23564 13:56:40.181321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23566 13:56:40.225601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23567 13:56:40.226024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23569 13:56:40.264044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23570 13:56:40.264441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23572 13:56:40.299456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23573 13:56:40.299886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23575 13:56:40.335085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23577 13:56:40.335543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23578 13:56:40.371037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23579 13:56:40.371495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23581 13:56:40.406428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23583 13:56:40.406922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23584 13:56:40.442383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23586 13:56:40.442847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23587 13:56:40.479288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23588 13:56:40.479709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23590 13:56:40.515114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23591 13:56:40.515564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23593 13:56:40.553257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23595 13:56:40.553721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23596 13:56:40.597249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23597 13:56:40.597693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23599 13:56:40.633956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23601 13:56:40.634434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23602 13:56:40.669580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23604 13:56:40.670202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23605 13:56:40.704900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23606 13:56:40.705441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23608 13:56:40.739591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23610 13:56:40.740329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23611 13:56:40.774967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23613 13:56:40.775397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23614 13:56:40.810046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23615 13:56:40.810474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23617 13:56:40.847264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23619 13:56:40.847844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23620 13:56:40.883246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23622 13:56:40.883949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23623 13:56:40.919073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23624 13:56:40.919516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23626 13:56:40.952972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23627 13:56:40.953409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23629 13:56:40.987437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23630 13:56:40.987871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23632 13:56:41.021710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23633 13:56:41.022161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23635 13:56:41.055402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23636 13:56:41.055861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23638 13:56:41.090334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23640 13:56:41.090890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23641 13:56:41.125318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23642 13:56:41.125781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23644 13:56:41.159343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23645 13:56:41.159796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23647 13:56:41.193176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23649 13:56:41.193736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23650 13:56:41.227490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23651 13:56:41.227925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23653 13:56:41.263902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23654 13:56:41.264335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23656 13:56:41.300075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23658 13:56:41.300645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23659 13:56:41.335479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23660 13:56:41.335941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23662 13:56:41.371534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23663 13:56:41.371969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23665 13:56:41.407809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23666 13:56:41.408248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23668 13:56:41.443663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23669 13:56:41.444129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23671 13:56:41.479064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23672 13:56:41.479525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23674 13:56:41.515558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23675 13:56:41.516030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23677 13:56:41.552111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23678 13:56:41.552576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23680 13:56:41.587498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23681 13:56:41.587949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23683 13:56:41.622889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23684 13:56:41.623343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23686 13:56:41.657975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23687 13:56:41.658426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23689 13:56:41.694057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23690 13:56:41.694522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23692 13:56:41.729946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23693 13:56:41.730411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23695 13:56:41.765160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23696 13:56:41.765596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23698 13:56:41.799518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23699 13:56:41.799960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23701 13:56:41.833946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23702 13:56:41.834391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23704 13:56:41.868547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23705 13:56:41.868992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23707 13:56:41.903158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23709 13:56:41.903728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23710 13:56:41.937197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23711 13:56:41.937619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23713 13:56:41.971276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23714 13:56:41.971742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23716 13:56:42.005979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23717 13:56:42.006441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23719 13:56:42.041802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23720 13:56:42.042279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23722 13:56:42.077210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23724 13:56:42.077809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23725 13:56:42.111790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23726 13:56:42.112234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23728 13:56:42.147886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23730 13:56:42.148502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23731 13:56:42.183336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23733 13:56:42.183901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23734 13:56:42.218901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23735 13:56:42.219357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23737 13:56:42.255638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23738 13:56:42.256030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23740 13:56:42.291608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23741 13:56:42.292083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23743 13:56:42.327453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23744 13:56:42.327924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23746 13:56:42.362858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23748 13:56:42.363393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23749 13:56:42.397903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23751 13:56:42.398456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23752 13:56:42.433482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23754 13:56:42.434080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23755 13:56:42.467737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23756 13:56:42.468165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23758 13:56:42.503625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23759 13:56:42.504043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23761 13:56:42.539915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23762 13:56:42.540312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23764 13:56:42.575557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23765 13:56:42.576037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23767 13:56:42.611507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23768 13:56:42.611972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23770 13:56:42.647978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23772 13:56:42.648540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23773 13:56:42.683827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23775 13:56:42.684389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23776 13:56:42.719610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23778 13:56:42.720165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23779 13:56:42.755839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23781 13:56:42.756387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23782 13:56:42.791845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23783 13:56:42.792353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23785 13:56:42.827655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23786 13:56:42.828087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23788 13:56:42.863772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23790 13:56:42.864340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23791 13:56:42.899686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23792 13:56:42.900245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23794 13:56:42.935654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23795 13:56:42.936144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23797 13:56:42.971936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23798 13:56:42.972336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23800 13:56:43.007798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23801 13:56:43.008341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23803 13:56:43.043217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23805 13:56:43.043786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23806 13:56:43.079266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23807 13:56:43.079689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23809 13:56:43.113768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23811 13:56:43.114250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23812 13:56:43.148636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23813 13:56:43.149121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23815 13:56:43.183859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23816 13:56:43.184288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23818 13:56:43.219182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23819 13:56:43.219659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23821 13:56:43.254919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23822 13:56:43.255366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23824 13:56:43.290921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23825 13:56:43.291382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23827 13:56:43.327134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23828 13:56:43.327584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23830 13:56:43.363679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23831 13:56:43.364117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23833 13:56:43.400697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23834 13:56:43.401133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23836 13:56:43.437374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23837 13:56:43.437801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23839 13:56:43.472951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23841 13:56:43.473502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23842 13:56:43.508715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23843 13:56:43.509173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23845 13:56:43.544534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23846 13:56:43.544982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23848 13:56:43.581536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23849 13:56:43.582016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23851 13:56:43.616741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23853 13:56:43.617373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23854 13:56:43.652378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23855 13:56:43.652853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23857 13:56:43.688256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23858 13:56:43.688710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23860 13:56:43.723906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23862 13:56:43.724597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23863 13:56:43.759173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23865 13:56:43.759729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23866 13:56:43.795155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23868 13:56:43.795729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23869 13:56:43.831246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23871 13:56:43.831685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23872 13:56:43.866222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23874 13:56:43.866671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23875 13:56:43.901581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23877 13:56:43.902168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23878 13:56:43.936959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23880 13:56:43.937551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23881 13:56:43.972796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23882 13:56:43.973267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23884 13:56:44.008759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23886 13:56:44.009312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23887 13:56:44.044049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23888 13:56:44.044501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23890 13:56:44.079414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23891 13:56:44.079826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23893 13:56:44.115285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23894 13:56:44.115711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23896 13:56:44.151522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23898 13:56:44.152084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23899 13:56:44.186559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23900 13:56:44.187030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23902 13:56:44.221305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23904 13:56:44.221878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23905 13:56:44.292326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23907 13:56:44.292918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23908 13:56:44.327267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23909 13:56:44.327726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23911 13:56:44.363239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23912 13:56:44.363679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23914 13:56:44.398553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23916 13:56:44.399015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23917 13:56:44.434324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23919 13:56:44.434749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23920 13:56:44.469124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23921 13:56:44.469514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23923 13:56:44.503499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23925 13:56:44.503933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23926 13:56:44.538235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23928 13:56:44.538864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23929 13:56:44.573336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23931 13:56:44.573983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23932 13:56:44.608018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23933 13:56:44.608429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23935 13:56:44.641930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
23936 13:56:44.642396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23938 13:56:44.676343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
23940 13:56:44.676909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
23941 13:56:44.711102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
23942 13:56:44.711552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
23944 13:56:44.746216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
23945 13:56:44.746635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
23947 13:56:44.781444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
23948 13:56:44.781856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
23950 13:56:44.817290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
23952 13:56:44.817771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
23953 13:56:44.852607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
23954 13:56:44.853024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
23956 13:56:44.888481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
23957 13:56:44.888963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
23959 13:56:44.924319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
23961 13:56:44.924959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
23962 13:56:44.959668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
23963 13:56:44.960127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
23965 13:56:44.996141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
23966 13:56:44.996606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
23968 13:56:45.032341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
23969 13:56:45.032802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
23971 13:56:45.067639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
23972 13:56:45.068084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
23974 13:56:45.103721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
23976 13:56:45.104191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
23977 13:56:45.139255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
23978 13:56:45.139680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
23980 13:56:45.174080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
23981 13:56:45.174506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
23983 13:56:45.209952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
23984 13:56:45.210400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
23986 13:56:45.245822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
23988 13:56:45.246298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
23989 13:56:45.281504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
23990 13:56:45.281946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
23992 13:56:45.317224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
23993 13:56:45.317625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
23995 13:56:45.351879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
23996 13:56:45.352305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
23998 13:56:45.387186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
23999 13:56:45.387645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
24001 13:56:45.421949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
24003 13:56:45.422540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
24004 13:56:45.457391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
24005 13:56:45.457808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
24007 13:56:45.493538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
24009 13:56:45.494021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
24010 13:56:45.528583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
24012 13:56:45.529050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
24013 13:56:45.564570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
24014 13:56:45.565043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
24016 13:56:45.599898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
24017 13:56:45.600366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
24019 13:56:45.635519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
24020 13:56:45.635997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
24022 13:56:45.671967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
24023 13:56:45.672443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
24025 13:56:45.708938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
24027 13:56:45.709417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
24028 13:56:45.744903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
24029 13:56:45.745332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
24031 13:56:45.780324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
24033 13:56:45.780912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
24034 13:56:45.815704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
24035 13:56:45.816129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
24037 13:56:45.851104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
24039 13:56:45.851747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
24040 13:56:45.887471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
24041 13:56:45.887926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
24043 13:56:45.923268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
24045 13:56:45.923742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
24046 13:56:45.959440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
24047 13:56:45.959816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
24049 13:56:45.994772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
24050 13:56:45.995191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
24052 13:56:46.029788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
24053 13:56:46.030210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
24055 13:56:46.064561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
24057 13:56:46.065106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
24058 13:56:46.099533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
24059 13:56:46.099978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
24061 13:56:46.135126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
24063 13:56:46.135583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
24064 13:56:46.170445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
24066 13:56:46.171104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
24067 13:56:46.206100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
24069 13:56:46.206824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
24070 13:56:46.241587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
24071 13:56:46.242080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
24073 13:56:46.276773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
24074 13:56:46.277237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
24076 13:56:46.312467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
24077 13:56:46.312933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24079 13:56:46.348429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24081 13:56:46.349014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24082 13:56:46.383690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24083 13:56:46.384157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24085 13:56:46.419842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24086 13:56:46.420304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24088 13:56:46.455263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24089 13:56:46.455730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24091 13:56:46.491025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24092 13:56:46.491486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24094 13:56:46.525924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24095 13:56:46.526390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24097 13:56:46.560630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24098 13:56:46.561086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24100 13:56:46.595784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24101 13:56:46.596256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24103 13:56:46.631407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24104 13:56:46.631881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24106 13:56:46.666103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24108 13:56:46.666734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24109 13:56:46.701086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24110 13:56:46.701556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24112 13:56:46.737023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24113 13:56:46.737500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24115 13:56:46.772421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24116 13:56:46.772885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24118 13:56:46.807821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24120 13:56:46.808446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24121 13:56:46.843680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24122 13:56:46.844154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24124 13:56:46.878783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24126 13:56:46.879247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24127 13:56:46.913592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24129 13:56:46.914204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24130 13:56:46.947773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24131 13:56:46.948197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24133 13:56:46.981945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24134 13:56:46.982380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24136 13:56:47.017234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24137 13:56:47.017658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24139 13:56:47.051545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24141 13:56:47.052022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24142 13:56:47.086544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24144 13:56:47.087010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24145 13:56:47.121877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24146 13:56:47.122385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24148 13:56:47.157182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24149 13:56:47.157641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24151 13:56:47.191671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24153 13:56:47.192313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24154 13:56:47.228634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24155 13:56:47.229121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24157 13:56:47.264290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24159 13:56:47.264930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24160 13:56:47.299832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24161 13:56:47.300265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24163 13:56:47.335626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24165 13:56:47.336087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24166 13:56:47.371522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24167 13:56:47.371963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24169 13:56:47.407215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24171 13:56:47.407760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24172 13:56:47.443638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24173 13:56:47.444073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24175 13:56:47.479449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24176 13:56:47.479898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24178 13:56:47.513341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24179 13:56:47.513754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24181 13:56:47.547953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24182 13:56:47.548415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24184 13:56:47.582006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24186 13:56:47.582574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24187 13:56:47.616161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24188 13:56:47.616637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24190 13:56:47.651772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24191 13:56:47.652297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24193 13:56:47.686455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24195 13:56:47.686928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24196 13:56:47.723241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24198 13:56:47.723818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24199 13:56:47.759279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24200 13:56:47.759740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24202 13:56:47.792403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24203 13:56:47.792860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24205 13:56:47.825559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24206 13:56:47.825992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24208 13:56:47.859110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24210 13:56:47.859664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24211 13:56:47.893208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24212 13:56:47.893695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24214 13:56:47.929699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24216 13:56:47.930185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24217 13:56:47.968913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24218 13:56:47.969359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24220 13:56:48.007552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24222 13:56:48.008032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24223 13:56:48.045036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24224 13:56:48.045411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24226 13:56:48.080995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24228 13:56:48.081373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24229 13:56:48.116379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24231 13:56:48.116938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24232 13:56:48.152526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24234 13:56:48.153001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24235 13:56:48.188273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24237 13:56:48.188739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24238 13:56:48.224450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24239 13:56:48.224860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24241 13:56:48.260759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24242 13:56:48.261173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24244 13:56:48.296981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24245 13:56:48.297455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24247 13:56:48.332105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24249 13:56:48.332545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24250 13:56:48.367723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24251 13:56:48.368142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24253 13:56:48.403389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24255 13:56:48.403848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24256 13:56:48.438874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24258 13:56:48.439335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24259 13:56:48.473686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24260 13:56:48.474121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24262 13:56:48.508930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24264 13:56:48.509361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24265 13:56:48.544086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24266 13:56:48.544507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24268 13:56:48.580050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24269 13:56:48.580477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24271 13:56:48.616658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24272 13:56:48.617158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24274 13:56:48.651968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24276 13:56:48.652544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24277 13:56:48.687803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24279 13:56:48.688374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24280 13:56:48.723750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24282 13:56:48.724321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24283 13:56:48.759326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24284 13:56:48.759803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24286 13:56:48.795234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24287 13:56:48.795697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24289 13:56:48.830205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24291 13:56:48.830827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24292 13:56:48.865284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24293 13:56:48.865696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24295 13:56:48.900765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24296 13:56:48.901196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24298 13:56:48.936375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24299 13:56:48.936785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24301 13:56:48.972839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24302 13:56:48.973270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24304 13:56:49.009664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24305 13:56:49.010096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24307 13:56:49.045562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24308 13:56:49.046023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24310 13:56:49.083044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24312 13:56:49.083481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24313 13:56:49.121328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24314 13:56:49.121757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24316 13:56:49.158904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24317 13:56:49.159295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24319 13:56:49.194823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24321 13:56:49.195286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24322 13:56:49.230066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24324 13:56:49.230545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24325 13:56:49.265000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24327 13:56:49.265591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24328 13:56:49.302471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24330 13:56:49.303037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24331 13:56:49.337825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24333 13:56:49.338298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24334 13:56:49.397766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24335 13:56:49.398177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24337 13:56:49.433786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24339 13:56:49.434256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24340 13:56:49.469500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24342 13:56:49.470088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24343 13:56:49.504525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24344 13:56:49.505005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24346 13:56:49.540558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24347 13:56:49.541021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24349 13:56:49.575867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24350 13:56:49.576329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24352 13:56:49.611296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24354 13:56:49.611861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24355 13:56:49.647230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24357 13:56:49.647791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24358 13:56:49.682992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24360 13:56:49.683482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24361 13:56:49.718382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24363 13:56:49.718967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24364 13:56:49.753891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24366 13:56:49.754536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24367 13:56:49.789984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24368 13:56:49.790456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24370 13:56:49.825919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24371 13:56:49.826402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24373 13:56:49.861449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24374 13:56:49.861958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24376 13:56:49.896958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24377 13:56:49.897468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24379 13:56:49.932575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24381 13:56:49.933163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24382 13:56:49.969680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24383 13:56:49.970171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24385 13:56:50.007612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24386 13:56:50.008077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24388 13:56:50.044363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24389 13:56:50.044812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24391 13:56:50.081379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24392 13:56:50.081823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24394 13:56:50.116990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24396 13:56:50.117530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24397 13:56:50.152717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24398 13:56:50.153149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24400 13:56:50.188729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24401 13:56:50.189179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24403 13:56:50.224573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24405 13:56:50.225117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24406 13:56:50.260376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24407 13:56:50.260820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24409 13:56:50.296670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24410 13:56:50.297125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24412 13:56:50.332981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24413 13:56:50.333439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24415 13:56:50.368324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24417 13:56:50.368929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24418 13:56:50.404208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24419 13:56:50.404657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24421 13:56:50.439705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24422 13:56:50.440142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24424 13:56:50.476827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24425 13:56:50.477270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24427 13:56:50.513111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24428 13:56:50.513535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24430 13:56:50.549080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24431 13:56:50.549497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24433 13:56:50.585108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24435 13:56:50.585698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24436 13:56:50.621955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24438 13:56:50.622597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24439 13:56:50.659624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24440 13:56:50.660021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24442 13:56:50.696319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24443 13:56:50.696801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24445 13:56:50.734775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24446 13:56:50.735285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24448 13:56:50.776177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24449 13:56:50.776600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24451 13:56:50.814813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24453 13:56:50.815292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24454 13:56:50.853210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24455 13:56:50.853641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24457 13:56:50.890406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24459 13:56:50.890834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24460 13:56:50.927126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24461 13:56:50.927500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24463 13:56:50.964176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24464 13:56:50.964660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24466 13:56:51.000377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24467 13:56:51.000792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24469 13:56:51.036218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24471 13:56:51.036698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24472 13:56:51.071841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24474 13:56:51.072431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24475 13:56:51.107541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24477 13:56:51.108145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24478 13:56:51.143274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24479 13:56:51.143747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24481 13:56:51.179506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24482 13:56:51.179981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24484 13:56:51.215289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24486 13:56:51.215766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24487 13:56:51.251740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24488 13:56:51.252258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24490 13:56:51.288275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24492 13:56:51.288904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24493 13:56:51.323729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24494 13:56:51.324181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24496 13:56:51.360190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24497 13:56:51.360653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24499 13:56:51.395485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24501 13:56:51.396041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24502 13:56:51.430830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24504 13:56:51.431386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24505 13:56:51.466617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24507 13:56:51.467252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24508 13:56:51.501694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24509 13:56:51.502177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24511 13:56:51.536873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24512 13:56:51.537359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24514 13:56:51.572157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24515 13:56:51.572638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24517 13:56:51.607443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24519 13:56:51.608020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24520 13:56:51.643571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24522 13:56:51.644138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24523 13:56:51.678880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24525 13:56:51.679438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24526 13:56:51.715350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24527 13:56:51.715808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24529 13:56:51.751636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24530 13:56:51.752095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24532 13:56:51.787857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24533 13:56:51.788314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24535 13:56:51.823272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24537 13:56:51.823865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24538 13:56:51.859274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24540 13:56:51.859865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24541 13:56:51.895427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24543 13:56:51.895980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24544 13:56:51.931700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24545 13:56:51.932130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24547 13:56:51.967896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24549 13:56:51.968380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24550 13:56:52.004602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24551 13:56:52.005071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24553 13:56:52.041002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24554 13:56:52.041421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24556 13:56:52.077852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24557 13:56:52.078279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24559 13:56:52.115014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24561 13:56:52.115687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24562 13:56:52.151605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24563 13:56:52.152025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24565 13:56:52.187666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24566 13:56:52.188079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24568 13:56:52.223930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24569 13:56:52.224384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24571 13:56:52.260959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24572 13:56:52.261450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24574 13:56:52.297561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24575 13:56:52.297988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24577 13:56:52.334345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24579 13:56:52.334987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24580 13:56:52.371043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24581 13:56:52.371494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24583 13:56:52.407581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24584 13:56:52.408006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24586 13:56:52.443773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24587 13:56:52.444150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24589 13:56:52.479959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24591 13:56:52.480520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24592 13:56:52.515977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24593 13:56:52.516435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24595 13:56:52.552574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24597 13:56:52.553120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24598 13:56:52.588971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24600 13:56:52.589530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24601 13:56:52.625900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24603 13:56:52.626463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24604 13:56:52.662472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24606 13:56:52.663103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24607 13:56:52.698774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24608 13:56:52.699260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24610 13:56:52.735041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24611 13:56:52.735517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24613 13:56:52.771610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24614 13:56:52.772073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24616 13:56:52.808479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24617 13:56:52.808939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24619 13:56:52.844521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24620 13:56:52.844992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24622 13:56:52.880548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24623 13:56:52.881026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24625 13:56:52.916770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24626 13:56:52.917199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24628 13:56:52.952817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24630 13:56:52.953279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24631 13:56:52.988466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24633 13:56:52.989062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24634 13:56:53.025173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24636 13:56:53.025798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24637 13:56:53.062498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24639 13:56:53.063070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24640 13:56:53.099519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24641 13:56:53.099985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24643 13:56:53.135194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24644 13:56:53.135647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24646 13:56:53.171326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24648 13:56:53.171875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24649 13:56:53.209070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24650 13:56:53.209564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24652 13:56:53.244752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24653 13:56:53.245184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24655 13:56:53.280557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24656 13:56:53.280927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24658 13:56:53.315923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24659 13:56:53.316294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24661 13:56:53.352045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24662 13:56:53.352473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24664 13:56:53.387675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24665 13:56:53.388154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24667 13:56:53.423775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24668 13:56:53.424253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24670 13:56:53.460072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24672 13:56:53.460436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24673 13:56:53.496191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24674 13:56:53.496670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24676 13:56:53.532336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24677 13:56:53.532759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24679 13:56:53.568966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24681 13:56:53.569421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24682 13:56:53.604788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24683 13:56:53.605210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24685 13:56:53.640669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24687 13:56:53.641145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24688 13:56:53.675886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24689 13:56:53.676316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24691 13:56:53.711352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24692 13:56:53.711796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24694 13:56:53.746871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24695 13:56:53.747315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24697 13:56:53.783200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24699 13:56:53.783680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24700 13:56:53.818825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24701 13:56:53.819250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24703 13:56:53.856114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24705 13:56:53.856556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24706 13:56:53.891714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24707 13:56:53.892192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24709 13:56:53.928078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24710 13:56:53.928542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24712 13:56:53.964691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24713 13:56:53.965160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24715 13:56:54.000284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24716 13:56:54.000727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24718 13:56:54.036623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24719 13:56:54.037106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24721 13:56:54.072234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24723 13:56:54.072879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24724 13:56:54.108328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24726 13:56:54.108895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24727 13:56:54.144412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24729 13:56:54.144974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24730 13:56:54.180439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24731 13:56:54.180908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24733 13:56:54.216464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24735 13:56:54.217033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24736 13:56:54.251969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24737 13:56:54.252403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24739 13:56:54.288573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24741 13:56:54.289057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24742 13:56:54.324379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24743 13:56:54.324863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24745 13:56:54.360560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24747 13:56:54.361209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24748 13:56:54.396677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24749 13:56:54.397170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24751 13:56:54.433126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24752 13:56:54.433551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24754 13:56:54.469829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24755 13:56:54.470295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24757 13:56:54.543745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24759 13:56:54.544210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24760 13:56:54.580217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24761 13:56:54.580709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24763 13:56:54.616580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24764 13:56:54.617035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24766 13:56:54.655041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24768 13:56:54.655625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24769 13:56:54.691651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24770 13:56:54.692113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24772 13:56:54.727654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24773 13:56:54.728069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24775 13:56:54.764027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24776 13:56:54.764427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24778 13:56:54.799605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24779 13:56:54.800033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24781 13:56:54.837118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24782 13:56:54.837561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24784 13:56:54.873093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24785 13:56:54.873511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24787 13:56:54.908531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24788 13:56:54.908919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24790 13:56:54.944298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24791 13:56:54.944724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24793 13:56:54.980682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24794 13:56:54.981105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24796 13:56:55.016752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24797 13:56:55.017153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24799 13:56:55.052808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24800 13:56:55.053226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24802 13:56:55.089469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24803 13:56:55.089867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24805 13:56:55.127292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24806 13:56:55.127691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24808 13:56:55.163956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24809 13:56:55.164371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24811 13:56:55.199908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24813 13:56:55.200369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24814 13:56:55.235847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24815 13:56:55.236260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24817 13:56:55.272034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24818 13:56:55.272458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24820 13:56:55.308115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24822 13:56:55.308588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24823 13:56:55.343850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24825 13:56:55.344390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24826 13:56:55.379488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24827 13:56:55.379922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24829 13:56:55.415356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24830 13:56:55.415746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24832 13:56:55.451115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24833 13:56:55.451500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24835 13:56:55.487203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24836 13:56:55.487611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24838 13:56:55.523166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24839 13:56:55.523550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24841 13:56:55.559074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24842 13:56:55.559463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24844 13:56:55.594841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24845 13:56:55.595261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24847 13:56:55.631612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24849 13:56:55.632064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24850 13:56:55.667884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24852 13:56:55.668334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24853 13:56:55.703945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24855 13:56:55.704402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24856 13:56:55.740081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24857 13:56:55.740508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24859 13:56:55.792725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24860 13:56:55.793181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24862 13:56:55.831517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24864 13:56:55.832009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24865 13:56:55.870333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24867 13:56:55.870882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24868 13:56:55.914401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24870 13:56:55.914862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24871 13:56:55.951823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24872 13:56:55.952253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24874 13:56:55.987997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24875 13:56:55.988495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24877 13:56:56.024414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24878 13:56:56.024892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24880 13:56:56.060822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24881 13:56:56.061283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24883 13:56:56.097108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24884 13:56:56.097577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24886 13:56:56.133565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24887 13:56:56.134063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24889 13:56:56.171421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24890 13:56:56.171841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24892 13:56:56.208340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24893 13:56:56.208761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24895 13:56:56.244752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24896 13:56:56.245193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24898 13:56:56.281094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24899 13:56:56.281572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24901 13:56:56.317382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24903 13:56:56.317856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24904 13:56:56.353697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24905 13:56:56.354120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24907 13:56:56.403933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24908 13:56:56.404397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24910 13:56:56.441025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24911 13:56:56.441490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24913 13:56:56.476644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24915 13:56:56.477223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24916 13:56:56.512204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24917 13:56:56.512689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24919 13:56:56.548196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24920 13:56:56.548682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24922 13:56:56.584259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24924 13:56:56.584720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24925 13:56:56.621119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24927 13:56:56.621582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24928 13:56:56.656418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24929 13:56:56.656906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24931 13:56:56.691472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24932 13:56:56.691900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24934 13:56:56.727076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24935 13:56:56.727483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24937 13:56:56.762817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
24938 13:56:56.763263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
24940 13:56:56.798897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
24942 13:56:56.799345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
24943 13:56:56.836063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
24944 13:56:56.836546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
24946 13:56:56.872826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
24948 13:56:56.873437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
24949 13:56:56.909094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
24950 13:56:56.909566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
24952 13:56:56.945176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
24954 13:56:56.945779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
24955 13:56:56.980966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
24956 13:56:56.981431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
24958 13:56:57.017136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
24959 13:56:57.017613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
24961 13:56:57.053386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
24962 13:56:57.053878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
24964 13:56:57.089880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
24966 13:56:57.090448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
24967 13:56:57.127262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
24968 13:56:57.127730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
24970 13:56:57.163606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
24972 13:56:57.164078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
24973 13:56:57.200068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
24975 13:56:57.200518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
24976 13:56:57.236751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
24977 13:56:57.237160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
24979 13:56:57.274182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
24981 13:56:57.274854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
24982 13:56:57.311604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
24983 13:56:57.312010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
24985 13:56:57.349717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
24986 13:56:57.350143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
24988 13:56:57.387258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
24990 13:56:57.387714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
24991 13:56:57.423739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
24992 13:56:57.424172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
24994 13:56:57.460499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
24996 13:56:57.460963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
24997 13:56:57.497089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
24999 13:56:57.497542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
25000 13:56:57.534448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
25002 13:56:57.535011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
25003 13:56:57.571741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
25005 13:56:57.572409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
25006 13:56:57.608573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
25007 13:56:57.609051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
25009 13:56:57.645944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
25010 13:56:57.646433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
25012 13:56:57.682545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
25014 13:56:57.682972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
25015 13:56:57.717521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
25016 13:56:57.717969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
25018 13:56:57.753787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
25019 13:56:57.754215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
25021 13:56:57.789163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
25022 13:56:57.789587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
25024 13:56:57.824687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
25025 13:56:57.825130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
25027 13:56:57.860254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
25029 13:56:57.860735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
25030 13:56:57.895957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
25031 13:56:57.896415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
25033 13:56:57.933709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
25034 13:56:57.934211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
25036 13:56:57.971602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
25037 13:56:57.972091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
25039 13:56:58.011709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
25040 13:56:58.012200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
25042 13:56:58.052295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
25043 13:56:58.052779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
25045 13:56:58.089705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
25046 13:56:58.090110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
25048 13:56:58.126112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
25050 13:56:58.126607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
25051 13:56:58.162737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
25052 13:56:58.163177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
25054 13:56:58.199714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
25055 13:56:58.200161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
25057 13:56:58.236323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
25058 13:56:58.236741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
25060 13:56:58.272770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
25061 13:56:58.273207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
25063 13:56:58.317909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
25064 13:56:58.318372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
25066 13:56:58.359411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
25067 13:56:58.359841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
25069 13:56:58.395017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
25070 13:56:58.395484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
25072 13:56:58.431024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
25073 13:56:58.431458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
25075 13:56:58.467938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
25077 13:56:58.468550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25078 13:56:58.505028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25079 13:56:58.505424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25081 13:56:58.542442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25083 13:56:58.542867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25084 13:56:58.579155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25085 13:56:58.579578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25087 13:56:58.615539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25088 13:56:58.616058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25090 13:56:58.652655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25091 13:56:58.653073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25093 13:56:58.689182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25094 13:56:58.689609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25096 13:56:58.726933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25098 13:56:58.727490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25099 13:56:58.763483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25101 13:56:58.763958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25102 13:56:58.800133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25103 13:56:58.800599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25105 13:56:58.836593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25106 13:56:58.837045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25108 13:56:58.871729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25109 13:56:58.872144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25111 13:56:58.907683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25112 13:56:58.908075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25114 13:56:58.944738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25115 13:56:58.945143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25117 13:56:58.980215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25118 13:56:58.980615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25120 13:56:59.015781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25121 13:56:59.016204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25123 13:56:59.051887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25124 13:56:59.052285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25126 13:56:59.087957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25127 13:56:59.088363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25129 13:56:59.124159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25131 13:56:59.124798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25132 13:56:59.160847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25133 13:56:59.161268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25135 13:56:59.197377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25136 13:56:59.197800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25138 13:56:59.233511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25139 13:56:59.233936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25141 13:56:59.269921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25142 13:56:59.270403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25144 13:56:59.307102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25145 13:56:59.307635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25147 13:56:59.344642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25149 13:56:59.345212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25150 13:56:59.381059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25151 13:56:59.381547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25153 13:56:59.417121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25155 13:56:59.417599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25156 13:56:59.455519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25157 13:56:59.455928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25159 13:56:59.493331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25161 13:56:59.494046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25162 13:56:59.529379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25163 13:56:59.529867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25165 13:56:59.565868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25166 13:56:59.566346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25168 13:56:59.635201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25170 13:56:59.635626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25171 13:56:59.671510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25172 13:56:59.671985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25174 13:56:59.707913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25175 13:56:59.708392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25177 13:56:59.744580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25178 13:56:59.745047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25180 13:56:59.780678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25182 13:56:59.781308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25183 13:56:59.816498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25185 13:56:59.816960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25186 13:56:59.852529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25188 13:56:59.853000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25189 13:56:59.888494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25190 13:56:59.888912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25192 13:56:59.925221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25193 13:56:59.925653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25195 13:56:59.960920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25196 13:56:59.961338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25198 13:56:59.997232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25199 13:56:59.997676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25201 13:57:00.033206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25203 13:57:00.033874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25204 13:57:00.069040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25205 13:57:00.069503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25207 13:57:00.105330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25208 13:57:00.105830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25210 13:57:00.148733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25211 13:57:00.149150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25213 13:57:00.185325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25214 13:57:00.185768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25216 13:57:00.221938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25217 13:57:00.222366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25219 13:57:00.259490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25220 13:57:00.259875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25222 13:57:00.295840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25224 13:57:00.296211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25225 13:57:00.335185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25227 13:57:00.335763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25228 13:57:00.375276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25229 13:57:00.375721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25231 13:57:00.422553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25233 13:57:00.423297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25234 13:57:00.471540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25235 13:57:00.471996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25237 13:57:00.517853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25239 13:57:00.518341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25240 13:57:00.556210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25241 13:57:00.556654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25243 13:57:00.592040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25244 13:57:00.592490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25246 13:57:00.628475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25247 13:57:00.628923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25249 13:57:00.664343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25250 13:57:00.664841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25252 13:57:00.700314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25254 13:57:00.700902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25255 13:57:00.738742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25256 13:57:00.739232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25258 13:57:00.775183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25259 13:57:00.775626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25261 13:57:00.812748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25262 13:57:00.813199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25264 13:57:00.851702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25265 13:57:00.852130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25267 13:57:00.891034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25269 13:57:00.891516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25270 13:57:00.927628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25272 13:57:00.928126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25273 13:57:00.964741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25275 13:57:00.965226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25276 13:57:01.000737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25277 13:57:01.001169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25279 13:57:01.036445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25281 13:57:01.036919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25282 13:57:01.072472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25284 13:57:01.073131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25285 13:57:01.108375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25287 13:57:01.108798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25288 13:57:01.144604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25290 13:57:01.145096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25291 13:57:01.180548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25293 13:57:01.181025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25294 13:57:01.217565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25296 13:57:01.218263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25297 13:57:01.255660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25299 13:57:01.256241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25300 13:57:01.291804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25301 13:57:01.292269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25303 13:57:01.327885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25304 13:57:01.328347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25306 13:57:01.364262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25307 13:57:01.364748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25309 13:57:01.403559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25311 13:57:01.404215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25312 13:57:01.439463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25313 13:57:01.439957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25315 13:57:01.475255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25317 13:57:01.475907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25318 13:57:01.510943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25320 13:57:01.511424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25321 13:57:01.547614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25322 13:57:01.548052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25324 13:57:01.583793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25326 13:57:01.584452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25327 13:57:01.621242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25329 13:57:01.621908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25330 13:57:01.657617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25332 13:57:01.658293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25333 13:57:01.694431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25335 13:57:01.694910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25336 13:57:01.730895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25338 13:57:01.731383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25339 13:57:01.766941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25340 13:57:01.767395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25342 13:57:01.803030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25343 13:57:01.803473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25345 13:57:01.840735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25347 13:57:01.841215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25348 13:57:01.877718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25349 13:57:01.878157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25351 13:57:01.914943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25352 13:57:01.915334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25354 13:57:01.952212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25355 13:57:01.952701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25357 13:57:01.987959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25358 13:57:01.988425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25360 13:57:02.024243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25361 13:57:02.024674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25363 13:57:02.060458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25364 13:57:02.060891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25366 13:57:02.096486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25367 13:57:02.096942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25369 13:57:02.133686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25370 13:57:02.134113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25372 13:57:02.171070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25373 13:57:02.171498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25375 13:57:02.207549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25376 13:57:02.207981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25378 13:57:02.243973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25379 13:57:02.244438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25381 13:57:02.280314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25383 13:57:02.280881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25384 13:57:02.317447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25385 13:57:02.317887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25387 13:57:02.355074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25388 13:57:02.355524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25390 13:57:02.392656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25391 13:57:02.393125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25393 13:57:02.432256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25394 13:57:02.432714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25396 13:57:02.468659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25397 13:57:02.469086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25399 13:57:02.505549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25400 13:57:02.506029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25402 13:57:02.541103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25403 13:57:02.541520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25405 13:57:02.577539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25406 13:57:02.577966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25408 13:57:02.611971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25409 13:57:02.612397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25411 13:57:02.644129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25412 13:57:02.644631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25414 13:57:02.676635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25416 13:57:02.677095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25417 13:57:02.707802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25418 13:57:02.708337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25420 13:57:02.739594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25421 13:57:02.740003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25423 13:57:02.775100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25424 13:57:02.775594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25426 13:57:02.807870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25427 13:57:02.808291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25429 13:57:02.839682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25430 13:57:02.840151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25432 13:57:02.871010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25433 13:57:02.871368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25435 13:57:02.902968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25437 13:57:02.903324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25438 13:57:02.936799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25440 13:57:02.937165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25441 13:57:02.970037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25443 13:57:02.970588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25444 13:57:03.003555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25445 13:57:03.004032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25447 13:57:03.037113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25449 13:57:03.037568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25450 13:57:03.069939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25451 13:57:03.070433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25453 13:57:03.101431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25455 13:57:03.102016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25456 13:57:03.133315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25457 13:57:03.133784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25459 13:57:03.165167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25460 13:57:03.165641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25462 13:57:03.196740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25464 13:57:03.197191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25465 13:57:03.229180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25467 13:57:03.229760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25468 13:57:03.260830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25469 13:57:03.261314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25471 13:57:03.293306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25473 13:57:03.293901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25474 13:57:03.324745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25476 13:57:03.325305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25477 13:57:03.356252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25478 13:57:03.356709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25480 13:57:03.395390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25481 13:57:03.395852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25483 13:57:03.439617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25484 13:57:03.440101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25486 13:57:03.475376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25488 13:57:03.475948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25489 13:57:03.512706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25491 13:57:03.513269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25492 13:57:03.545231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25493 13:57:03.545687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25495 13:57:03.577099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25496 13:57:03.577562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25498 13:57:03.609240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25500 13:57:03.609813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25501 13:57:03.643721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25502 13:57:03.644208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25504 13:57:03.679818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25505 13:57:03.680303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25507 13:57:03.719906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25509 13:57:03.720542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25510 13:57:03.755639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25512 13:57:03.756230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25513 13:57:03.791095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25515 13:57:03.791732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25516 13:57:03.826710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25517 13:57:03.827169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25519 13:57:03.860173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25521 13:57:03.860725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25522 13:57:03.892118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25523 13:57:03.892571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25525 13:57:03.925459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25527 13:57:03.926115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25528 13:57:03.959807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25530 13:57:03.960546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25531 13:57:03.994848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25533 13:57:03.995602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25534 13:57:04.029610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25535 13:57:04.030107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25537 13:57:04.071654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25539 13:57:04.072145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25540 13:57:04.107988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25542 13:57:04.108376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25543 13:57:04.144024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25545 13:57:04.144397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25546 13:57:04.177611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25547 13:57:04.177989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25549 13:57:04.210027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25550 13:57:04.210474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25552 13:57:04.243129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25554 13:57:04.243589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25555 13:57:04.276119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25557 13:57:04.276573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25558 13:57:04.308893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25559 13:57:04.309283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25561 13:57:04.343027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25562 13:57:04.343411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25564 13:57:04.376399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25565 13:57:04.376785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25567 13:57:04.412984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25568 13:57:04.413373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25570 13:57:04.451286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25572 13:57:04.451829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25573 13:57:04.485667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25575 13:57:04.486235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25576 13:57:04.520395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25578 13:57:04.520961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25579 13:57:04.553711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25580 13:57:04.554130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25582 13:57:04.586758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25584 13:57:04.587317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25585 13:57:04.618209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25587 13:57:04.618808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25588 13:57:04.650207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25589 13:57:04.650665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25591 13:57:04.683020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25593 13:57:04.683546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25594 13:57:04.724029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25596 13:57:04.724655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25597 13:57:04.770089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25598 13:57:04.770550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25600 13:57:04.805179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25602 13:57:04.805756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25603 13:57:04.836931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25604 13:57:04.837395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25606 13:57:04.868499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25607 13:57:04.868948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25609 13:57:04.899975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25610 13:57:04.900435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25612 13:57:04.931522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25613 13:57:04.931941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25615 13:57:04.963197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25616 13:57:04.963667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25618 13:57:04.995089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25619 13:57:04.995507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25621 13:57:05.027164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25623 13:57:05.027725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25624 13:57:05.059300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25626 13:57:05.059842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25627 13:57:05.091764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25629 13:57:05.092332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25630 13:57:05.123654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25631 13:57:05.124105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25633 13:57:05.155468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25634 13:57:05.155918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25636 13:57:05.187732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25637 13:57:05.188212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25639 13:57:05.219887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25641 13:57:05.220456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25642 13:57:05.251237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25644 13:57:05.251790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25645 13:57:05.282586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25647 13:57:05.283210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25648 13:57:05.313945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25649 13:57:05.314417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25651 13:57:05.345363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25652 13:57:05.345816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25654 13:57:05.376637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25656 13:57:05.377199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25657 13:57:05.409529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25658 13:57:05.410004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25660 13:57:05.442108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25662 13:57:05.442590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25663 13:57:05.473636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25664 13:57:05.474058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25666 13:57:05.505714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25667 13:57:05.506140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25669 13:57:05.537790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25671 13:57:05.538341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25672 13:57:05.570124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25673 13:57:05.570570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25675 13:57:05.606429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25677 13:57:05.607071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25678 13:57:05.639472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25680 13:57:05.640103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25681 13:57:05.671121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25682 13:57:05.671572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25684 13:57:05.703017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25686 13:57:05.703596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25687 13:57:05.734388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25689 13:57:05.734948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25690 13:57:05.766370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25692 13:57:05.766745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25693 13:57:05.801413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25695 13:57:05.802079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25696 13:57:05.835035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25697 13:57:05.835540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25699 13:57:05.868525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25701 13:57:05.869168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25702 13:57:05.902491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25704 13:57:05.902915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25705 13:57:05.935408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25707 13:57:05.935776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25708 13:57:05.967326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25710 13:57:05.967961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25711 13:57:06.000143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25712 13:57:06.000630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25714 13:57:06.033202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25715 13:57:06.033630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25717 13:57:06.066263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25719 13:57:06.066634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25720 13:57:06.099221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25721 13:57:06.099676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25723 13:57:06.131438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25724 13:57:06.131926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25726 13:57:06.163701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25727 13:57:06.164163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25729 13:57:06.196287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25730 13:57:06.196679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25732 13:57:06.229719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25733 13:57:06.230108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25735 13:57:06.263533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25736 13:57:06.263925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25738 13:57:06.295803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25739 13:57:06.296197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25741 13:57:06.328180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25743 13:57:06.328608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25744 13:57:06.360707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25745 13:57:06.361094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25747 13:57:06.392604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25748 13:57:06.392991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25750 13:57:06.424669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25751 13:57:06.425054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25753 13:57:06.457816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25754 13:57:06.458209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25756 13:57:06.490859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25757 13:57:06.491252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25759 13:57:06.523182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25760 13:57:06.523614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25762 13:57:06.557734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25763 13:57:06.558209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25765 13:57:06.590769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25766 13:57:06.591214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25768 13:57:06.624574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25769 13:57:06.625020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25771 13:57:06.662541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25773 13:57:06.663266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25774 13:57:06.695083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25775 13:57:06.695585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25777 13:57:06.727552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25778 13:57:06.727938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25780 13:57:06.760300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25781 13:57:06.760767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25783 13:57:06.792892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25785 13:57:06.793463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25786 13:57:06.825311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25788 13:57:06.825972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25789 13:57:06.857731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25790 13:57:06.858183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25792 13:57:06.890441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25794 13:57:06.890993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25795 13:57:06.922838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25797 13:57:06.923388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25798 13:57:06.955443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25799 13:57:06.955823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25801 13:57:06.987909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25802 13:57:06.988305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25804 13:57:07.019965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25806 13:57:07.020415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25807 13:57:07.055047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25808 13:57:07.055449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25810 13:57:07.088730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25811 13:57:07.089120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25813 13:57:07.123702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25814 13:57:07.124193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25816 13:57:07.160685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25817 13:57:07.161152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25819 13:57:07.193507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25820 13:57:07.193933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25822 13:57:07.225533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25823 13:57:07.225991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25825 13:57:07.259053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25826 13:57:07.259511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25828 13:57:07.292971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25830 13:57:07.293550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25831 13:57:07.325224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25832 13:57:07.325689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25834 13:57:07.357078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25835 13:57:07.357535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25837 13:57:07.390251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25839 13:57:07.390839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25840 13:57:07.423121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25841 13:57:07.423496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25843 13:57:07.454766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25845 13:57:07.455349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25846 13:57:07.486045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25847 13:57:07.486465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25849 13:57:07.519287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25850 13:57:07.519754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25852 13:57:07.551628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25853 13:57:07.552095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25855 13:57:07.583280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25856 13:57:07.583728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25858 13:57:07.616176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25859 13:57:07.616685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25861 13:57:07.648610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25862 13:57:07.649050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25864 13:57:07.681716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25866 13:57:07.682189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25867 13:57:07.713410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25868 13:57:07.713825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25870 13:57:07.745493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25871 13:57:07.745916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25873 13:57:07.777621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25874 13:57:07.778043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25876 13:57:07.809564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25877 13:57:07.809991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25879 13:57:07.840973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25881 13:57:07.841429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25882 13:57:07.872492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25883 13:57:07.872905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25885 13:57:07.904670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25886 13:57:07.905082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25888 13:57:07.938024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25889 13:57:07.938446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25891 13:57:07.975394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25892 13:57:07.975856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25894 13:57:08.011752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25896 13:57:08.012296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25897 13:57:08.046640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25898 13:57:08.047147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25900 13:57:08.080831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25901 13:57:08.081351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25903 13:57:08.115574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25904 13:57:08.116124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25906 13:57:08.148238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25907 13:57:08.148702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25909 13:57:08.183061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25910 13:57:08.183551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25912 13:57:08.215346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25913 13:57:08.215828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25915 13:57:08.247451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25916 13:57:08.247919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25918 13:57:08.279388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25919 13:57:08.279791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25921 13:57:08.311544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25923 13:57:08.312018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25924 13:57:08.343855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25926 13:57:08.344462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25927 13:57:08.376809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25928 13:57:08.377287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25930 13:57:08.409040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25931 13:57:08.409484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25933 13:57:08.441706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25934 13:57:08.442104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25936 13:57:08.473915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
25937 13:57:08.474378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
25939 13:57:08.505809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
25940 13:57:08.506267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
25942 13:57:08.538717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
25943 13:57:08.539178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
25945 13:57:08.572383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
25947 13:57:08.573019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
25948 13:57:08.605213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
25950 13:57:08.605657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
25951 13:57:08.637525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
25952 13:57:08.637999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
25954 13:57:08.670011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
25955 13:57:08.670438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
25957 13:57:08.702451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
25959 13:57:08.703004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
25960 13:57:08.736892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
25961 13:57:08.737337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
25963 13:57:08.769125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
25965 13:57:08.769718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
25966 13:57:08.800957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
25967 13:57:08.801410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
25969 13:57:08.832718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
25970 13:57:08.833182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
25972 13:57:08.864890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
25974 13:57:08.865455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
25975 13:57:08.897386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
25977 13:57:08.897960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
25978 13:57:08.929546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
25980 13:57:08.930143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
25981 13:57:08.962157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
25982 13:57:08.962602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
25984 13:57:08.995296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
25985 13:57:08.995750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
25987 13:57:09.027613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
25988 13:57:09.028008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
25990 13:57:09.060011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
25992 13:57:09.060467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
25993 13:57:09.092527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
25994 13:57:09.092942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
25996 13:57:09.124542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
25997 13:57:09.124944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
25999 13:57:09.157164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
26000 13:57:09.157566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
26002 13:57:09.189167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
26003 13:57:09.189597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
26005 13:57:09.223939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
26006 13:57:09.224497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
26008 13:57:09.258388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
26010 13:57:09.259020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
26011 13:57:09.291076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
26012 13:57:09.291552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
26014 13:57:09.323750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
26016 13:57:09.324334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
26017 13:57:09.356023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
26019 13:57:09.356615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
26020 13:57:09.388116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
26021 13:57:09.388601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
26023 13:57:09.420742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
26024 13:57:09.421217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
26026 13:57:09.452964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
26027 13:57:09.453440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
26029 13:57:09.485503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
26031 13:57:09.486077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
26032 13:57:09.517697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
26033 13:57:09.518167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
26035 13:57:09.550185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
26036 13:57:09.550642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
26038 13:57:09.582892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
26039 13:57:09.583320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
26041 13:57:09.616201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
26042 13:57:09.616619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
26044 13:57:09.648428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
26045 13:57:09.648855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
26047 13:57:09.680888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
26049 13:57:09.681371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
26050 13:57:09.712233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
26051 13:57:09.712653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
26053 13:57:09.744481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
26054 13:57:09.744899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
26056 13:57:09.776845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
26057 13:57:09.777273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
26059 13:57:09.809101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
26060 13:57:09.809594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
26062 13:57:09.863731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
26063 13:57:09.864217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
26065 13:57:09.897502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
26067 13:57:09.897984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
26068 13:57:09.929113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
26070 13:57:09.929583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
26071 13:57:09.960310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
26072 13:57:09.960776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
26074 13:57:09.992339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
26076 13:57:09.992894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26077 13:57:10.024512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26079 13:57:10.025094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26080 13:57:10.057273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26082 13:57:10.057873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26083 13:57:10.089338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26084 13:57:10.089809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26086 13:57:10.122006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26087 13:57:10.122478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26089 13:57:10.155447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26091 13:57:10.156005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26092 13:57:10.188044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26093 13:57:10.188522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26095 13:57:10.221273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26096 13:57:10.221696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26098 13:57:10.254127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26100 13:57:10.254738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26101 13:57:10.289058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26102 13:57:10.289542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26104 13:57:10.322999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26106 13:57:10.323643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26107 13:57:10.355386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26108 13:57:10.355848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26110 13:57:10.391048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26111 13:57:10.391636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26113 13:57:10.424959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26115 13:57:10.425790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26116 13:57:10.458697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26117 13:57:10.459154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26119 13:57:10.493267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26120 13:57:10.493681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26122 13:57:10.525911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26123 13:57:10.526384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26125 13:57:10.559405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26127 13:57:10.559966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26128 13:57:10.592293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26129 13:57:10.592761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26131 13:57:10.625353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26133 13:57:10.626006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26134 13:57:10.657189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26135 13:57:10.657612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26137 13:57:10.689887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26138 13:57:10.690367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26140 13:57:10.726872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26142 13:57:10.727349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26143 13:57:10.759350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26144 13:57:10.759830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26146 13:57:10.793263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26147 13:57:10.793692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26149 13:57:10.828311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26150 13:57:10.828743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26152 13:57:10.863235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26153 13:57:10.863665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26155 13:57:10.897616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26157 13:57:10.898083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26158 13:57:10.932069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26159 13:57:10.932503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26161 13:57:10.964011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26162 13:57:10.964480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26164 13:57:10.996321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26165 13:57:10.996800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26167 13:57:11.028483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26168 13:57:11.028955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26170 13:57:11.060267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26171 13:57:11.060726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26173 13:57:11.092976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26174 13:57:11.093409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26176 13:57:11.125860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26177 13:57:11.126344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26179 13:57:11.157492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26180 13:57:11.157992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26182 13:57:11.188893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26184 13:57:11.189463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26185 13:57:11.220310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26187 13:57:11.220785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26188 13:57:11.252810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26190 13:57:11.253289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26191 13:57:11.285249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26192 13:57:11.285679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26194 13:57:11.316771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26195 13:57:11.317233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26197 13:57:11.349022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26199 13:57:11.349586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26200 13:57:11.380646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26201 13:57:11.381105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26203 13:57:11.413202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26204 13:57:11.413698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26206 13:57:11.444763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26208 13:57:11.445215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26209 13:57:11.476518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26210 13:57:11.476914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26212 13:57:11.508089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26213 13:57:11.508657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26215 13:57:11.540776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26217 13:57:11.541376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26218 13:57:11.572739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26220 13:57:11.573308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26221 13:57:11.604438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26222 13:57:11.604903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26224 13:57:11.638488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26226 13:57:11.638960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26227 13:57:11.671234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26229 13:57:11.671713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26230 13:57:11.703165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26232 13:57:11.703637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26233 13:57:11.736212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26235 13:57:11.736681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26236 13:57:11.768389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26237 13:57:11.768810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26239 13:57:11.801327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26241 13:57:11.801802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26242 13:57:11.833323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26244 13:57:11.833913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26245 13:57:11.867078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26246 13:57:11.867578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26248 13:57:11.901411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26249 13:57:11.901903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26251 13:57:11.933410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26252 13:57:11.933819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26254 13:57:11.968068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26255 13:57:11.968583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26257 13:57:12.000643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26258 13:57:12.001108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26260 13:57:12.034773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26261 13:57:12.035255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26263 13:57:12.067429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26264 13:57:12.067935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26266 13:57:12.099552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26268 13:57:12.100109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26269 13:57:12.131541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26271 13:57:12.132094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26272 13:57:12.163546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26273 13:57:12.164016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26275 13:57:12.196002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26276 13:57:12.196442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26278 13:57:12.227978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26280 13:57:12.228451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26281 13:57:12.260412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26283 13:57:12.260879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26284 13:57:12.292669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26286 13:57:12.293149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26287 13:57:12.325120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26288 13:57:12.325578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26290 13:57:12.357129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26292 13:57:12.357710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26293 13:57:12.389215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26294 13:57:12.389677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26296 13:57:12.420939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26297 13:57:12.421390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26299 13:57:12.452375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26301 13:57:12.452913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26302 13:57:12.484155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26303 13:57:12.484608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26305 13:57:12.516674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26306 13:57:12.517068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26308 13:57:12.548999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26310 13:57:12.549444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26311 13:57:12.581032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26312 13:57:12.581489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26314 13:57:12.612861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26315 13:57:12.613318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26317 13:57:12.644749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26319 13:57:12.645390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26320 13:57:12.676887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26321 13:57:12.677361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26323 13:57:12.708454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26324 13:57:12.708934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26326 13:57:12.740209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26328 13:57:12.740687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26329 13:57:12.772259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26331 13:57:12.772817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26332 13:57:12.804219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26333 13:57:12.804648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26335 13:57:12.837708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26336 13:57:12.838149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26338 13:57:12.871431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26339 13:57:12.871870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26341 13:57:12.903955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26343 13:57:12.904564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26344 13:57:12.937142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26346 13:57:12.937728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26347 13:57:12.970768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26349 13:57:12.971557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26350 13:57:13.003116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26351 13:57:13.003648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26353 13:57:13.035659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26354 13:57:13.036048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26356 13:57:13.068575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26358 13:57:13.069054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26359 13:57:13.104332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26360 13:57:13.104722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26362 13:57:13.140366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26364 13:57:13.140800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26365 13:57:13.176575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26366 13:57:13.176972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26368 13:57:13.212387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26369 13:57:13.212768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26371 13:57:13.249874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26373 13:57:13.250461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26374 13:57:13.285690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26375 13:57:13.286109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26377 13:57:13.321338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26378 13:57:13.321776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26380 13:57:13.356620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26381 13:57:13.357055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26383 13:57:13.392560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26384 13:57:13.393060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26386 13:57:13.428341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26387 13:57:13.428782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26389 13:57:13.465173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26390 13:57:13.465671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26392 13:57:13.501114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26393 13:57:13.501611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26395 13:57:13.536676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26396 13:57:13.537117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26398 13:57:13.572078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26399 13:57:13.572558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26401 13:57:13.607667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26402 13:57:13.608117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26404 13:57:13.643572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26406 13:57:13.644132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26407 13:57:13.679591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26409 13:57:13.680046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26410 13:57:13.714730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26411 13:57:13.715160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26413 13:57:13.749939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26414 13:57:13.750356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26416 13:57:13.786019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26417 13:57:13.786436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26419 13:57:13.821429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26420 13:57:13.821889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26422 13:57:13.856728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26423 13:57:13.857188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26425 13:57:13.892544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26426 13:57:13.892999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26428 13:57:13.928071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26429 13:57:13.928482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26431 13:57:13.963624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26432 13:57:13.964039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26434 13:57:13.999370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26435 13:57:13.999802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26437 13:57:14.035932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26438 13:57:14.036344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26440 13:57:14.072773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26441 13:57:14.073249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26443 13:57:14.108317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26444 13:57:14.108787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26446 13:57:14.144229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26447 13:57:14.144715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26449 13:57:14.180549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26450 13:57:14.181004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26452 13:57:14.216167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26453 13:57:14.216562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26455 13:57:14.252068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26456 13:57:14.252532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26458 13:57:14.288082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26460 13:57:14.288720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26461 13:57:14.324133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26463 13:57:14.324771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26464 13:57:14.359907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26465 13:57:14.360365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26467 13:57:14.395506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26468 13:57:14.395963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26470 13:57:14.431675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26472 13:57:14.432130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26473 13:57:14.467915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26474 13:57:14.468397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26476 13:57:14.503808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26477 13:57:14.504280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26479 13:57:14.540511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26480 13:57:14.540986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26482 13:57:14.575824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26483 13:57:14.576299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26485 13:57:14.611646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26486 13:57:14.612126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26488 13:57:14.647688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26489 13:57:14.648159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26491 13:57:14.682849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26492 13:57:14.683322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26494 13:57:14.718197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26495 13:57:14.718704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26497 13:57:14.754772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26498 13:57:14.755195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26500 13:57:14.790965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26501 13:57:14.791439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26503 13:57:14.827074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26504 13:57:14.827568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26506 13:57:14.863027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26507 13:57:14.863491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26509 13:57:14.898979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26510 13:57:14.899438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26512 13:57:14.934990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26513 13:57:14.935443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26515 13:57:15.003738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26517 13:57:15.004207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26518 13:57:15.039151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26519 13:57:15.039604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26521 13:57:15.075449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26523 13:57:15.076098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26524 13:57:15.111062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26526 13:57:15.111526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26527 13:57:15.145115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26528 13:57:15.145510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26530 13:57:15.179807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26531 13:57:15.180206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26533 13:57:15.215236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26534 13:57:15.215633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26536 13:57:15.251314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26537 13:57:15.251779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26539 13:57:15.285811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26540 13:57:15.286285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26542 13:57:15.321722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26544 13:57:15.322369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26545 13:57:15.356606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26546 13:57:15.357083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26548 13:57:15.391727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26549 13:57:15.392198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26551 13:57:15.426808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26553 13:57:15.427370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26554 13:57:15.461387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26555 13:57:15.461861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26557 13:57:15.496603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26559 13:57:15.497223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26560 13:57:15.532619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26562 13:57:15.533085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26563 13:57:15.568013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26564 13:57:15.568409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26566 13:57:15.603367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26567 13:57:15.603790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26569 13:57:15.637934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26570 13:57:15.638357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26572 13:57:15.673531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26574 13:57:15.674004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26575 13:57:15.709522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26577 13:57:15.710106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26578 13:57:15.744842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26580 13:57:15.745405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26581 13:57:15.780102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26583 13:57:15.780652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26584 13:57:15.816470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26586 13:57:15.817048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26587 13:57:15.856153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26588 13:57:15.856687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26590 13:57:15.894417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26592 13:57:15.895703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26593 13:57:15.931989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26595 13:57:15.932455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26596 13:57:15.968730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26598 13:57:15.969186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26599 13:57:16.006260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26601 13:57:16.006745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26602 13:57:16.041283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26603 13:57:16.041687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26605 13:57:16.073299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26607 13:57:16.073759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26608 13:57:16.106492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26610 13:57:16.106931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26611 13:57:16.138342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26613 13:57:16.138809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26614 13:57:16.170269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26616 13:57:16.170733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26617 13:57:16.203964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26619 13:57:16.204426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26620 13:57:16.237159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26621 13:57:16.237688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26623 13:57:16.269197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26625 13:57:16.269846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26626 13:57:16.301624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26627 13:57:16.302108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26629 13:57:16.338660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26631 13:57:16.339467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26632 13:57:16.375424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26634 13:57:16.376063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26635 13:57:16.408824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26637 13:57:16.409457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26638 13:57:16.443410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26639 13:57:16.443953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26641 13:57:16.477886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26643 13:57:16.478519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26644 13:57:16.510118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26645 13:57:16.510586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26647 13:57:16.541849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26649 13:57:16.542470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26650 13:57:16.573670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26652 13:57:16.574108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26653 13:57:16.607290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26655 13:57:16.607763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26656 13:57:16.640770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26657 13:57:16.641188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26659 13:57:16.673007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26661 13:57:16.673569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26662 13:57:16.705321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26663 13:57:16.705686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26665 13:57:16.738433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26667 13:57:16.738858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26668 13:57:16.770950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26670 13:57:16.771567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26671 13:57:16.803576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26673 13:57:16.804124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26674 13:57:16.835661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26675 13:57:16.836075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26677 13:57:16.871029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26678 13:57:16.871489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26680 13:57:16.903315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26681 13:57:16.903710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26683 13:57:16.935620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26685 13:57:16.936220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26686 13:57:16.968347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26688 13:57:16.968918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26689 13:57:17.003195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26690 13:57:17.003749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26692 13:57:17.037019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26693 13:57:17.037438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26695 13:57:17.069550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26697 13:57:17.070031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26698 13:57:17.101780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26699 13:57:17.102202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26701 13:57:17.133427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26702 13:57:17.133848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26704 13:57:17.165587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26705 13:57:17.166015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26707 13:57:17.197357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26708 13:57:17.197798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26710 13:57:17.229099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26712 13:57:17.229566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26713 13:57:17.260865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26714 13:57:17.261317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26716 13:57:17.293416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26718 13:57:17.293905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26719 13:57:17.324849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26720 13:57:17.325367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26722 13:57:17.358822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26723 13:57:17.359270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26725 13:57:17.391256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26727 13:57:17.391711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26728 13:57:17.424222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26730 13:57:17.424675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26731 13:57:17.456298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26732 13:57:17.456699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26734 13:57:17.488756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26735 13:57:17.489215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26737 13:57:17.520792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26739 13:57:17.521423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26740 13:57:17.553351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26742 13:57:17.553927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26743 13:57:17.585463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26745 13:57:17.586048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26746 13:57:17.617070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26748 13:57:17.617638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26749 13:57:17.648785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26751 13:57:17.649349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26752 13:57:17.680785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26754 13:57:17.681344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26755 13:57:17.712287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26756 13:57:17.712736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26758 13:57:17.744449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26760 13:57:17.745014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26761 13:57:17.776576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26762 13:57:17.777030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26764 13:57:17.808515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26765 13:57:17.808965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26767 13:57:17.841149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26769 13:57:17.841758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26770 13:57:17.872974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26771 13:57:17.873493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26773 13:57:17.906596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26775 13:57:17.907181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26776 13:57:17.940008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26778 13:57:17.940642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26779 13:57:17.975698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26780 13:57:17.976238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26782 13:57:18.009855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26783 13:57:18.010398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26785 13:57:18.044430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26787 13:57:18.045000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26788 13:57:18.079254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26790 13:57:18.079807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26791 13:57:18.114033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26792 13:57:18.114493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26794 13:57:18.149040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26795 13:57:18.149499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26797 13:57:18.181560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26798 13:57:18.181994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26800 13:57:18.214725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26802 13:57:18.215370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26803 13:57:18.246924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26805 13:57:18.247554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26806 13:57:18.279072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26807 13:57:18.279561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26809 13:57:18.311662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26810 13:57:18.312139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26812 13:57:18.343642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26813 13:57:18.344093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26815 13:57:18.375800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26816 13:57:18.376263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26818 13:57:18.407822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26819 13:57:18.408292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26821 13:57:18.440039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26822 13:57:18.440437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26824 13:57:18.473181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26825 13:57:18.473576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26827 13:57:18.505314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26829 13:57:18.505972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26830 13:57:18.536944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26831 13:57:18.537406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26833 13:57:18.568737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26834 13:57:18.569277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26836 13:57:18.600152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26837 13:57:18.600576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26839 13:57:18.632578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26840 13:57:18.633028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26842 13:57:18.665313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26844 13:57:18.665892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26845 13:57:18.697983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26847 13:57:18.698577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26848 13:57:18.730335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26849 13:57:18.730796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26851 13:57:18.762209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26853 13:57:18.762695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26854 13:57:18.794057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26855 13:57:18.794574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26857 13:57:18.825948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26858 13:57:18.826364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26860 13:57:18.857800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26861 13:57:18.858233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26863 13:57:18.890062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26864 13:57:18.890528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26866 13:57:18.921585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26868 13:57:18.922173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26869 13:57:18.953466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26870 13:57:18.953862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26872 13:57:18.985451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26873 13:57:18.985931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26875 13:57:19.017187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26876 13:57:19.017654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26878 13:57:19.048662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26879 13:57:19.049074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26881 13:57:19.080471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26882 13:57:19.080925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26884 13:57:19.111994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26885 13:57:19.112391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26887 13:57:19.144738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26888 13:57:19.145186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26890 13:57:19.176851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26891 13:57:19.177302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26893 13:57:19.209277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26894 13:57:19.209691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26896 13:57:19.241219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26897 13:57:19.241670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26899 13:57:19.273345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26900 13:57:19.273814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26902 13:57:19.308699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26903 13:57:19.309148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26905 13:57:19.346825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26907 13:57:19.347279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26908 13:57:19.379095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26909 13:57:19.379555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26911 13:57:19.410828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26913 13:57:19.411379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26914 13:57:19.441713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26916 13:57:19.442332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26917 13:57:19.473122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26918 13:57:19.473578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26920 13:57:19.505517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26921 13:57:19.506005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26923 13:57:19.537498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26925 13:57:19.538074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26926 13:57:19.569634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26928 13:57:19.570240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26929 13:57:19.601088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26931 13:57:19.601631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26932 13:57:19.632553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26933 13:57:19.632998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26935 13:57:19.664748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
26937 13:57:19.665300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26938 13:57:19.696722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
26939 13:57:19.697169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
26941 13:57:19.728776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
26943 13:57:19.729335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
26944 13:57:19.760893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
26945 13:57:19.761353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
26947 13:57:19.793597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
26948 13:57:19.794066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
26950 13:57:19.825631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
26951 13:57:19.826058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
26953 13:57:19.857381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
26954 13:57:19.857798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
26956 13:57:19.899634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
26958 13:57:19.900105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
26959 13:57:19.938383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
26961 13:57:19.938844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
26962 13:57:19.975076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
26963 13:57:19.975495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
26965 13:57:20.007429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
26966 13:57:20.007869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
26968 13:57:20.048718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
26969 13:57:20.049160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
26971 13:57:20.099356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
26973 13:57:20.099906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
26974 13:57:20.131392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
26976 13:57:20.131950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
26977 13:57:20.163731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
26978 13:57:20.164173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
26980 13:57:20.195846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
26981 13:57:20.196274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
26983 13:57:20.228311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
26984 13:57:20.228740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
26986 13:57:20.260252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
26987 13:57:20.260679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
26989 13:57:20.292352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
26990 13:57:20.292803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
26992 13:57:20.324690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
26993 13:57:20.325128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
26995 13:57:20.359565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
26997 13:57:20.360105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
26998 13:57:20.393971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
26999 13:57:20.394413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
27001 13:57:20.428651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
27002 13:57:20.429115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
27004 13:57:20.463347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
27005 13:57:20.463816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
27007 13:57:20.497592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
27008 13:57:20.498089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
27010 13:57:20.533024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
27011 13:57:20.533507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
27013 13:57:20.567822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
27014 13:57:20.568293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
27016 13:57:20.603957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
27018 13:57:20.604391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
27019 13:57:20.639321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
27021 13:57:20.639758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
27022 13:57:20.675072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
27023 13:57:20.675465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
27025 13:57:20.709891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
27027 13:57:20.710338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
27028 13:57:20.744437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
27029 13:57:20.744831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
27031 13:57:20.778973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
27032 13:57:20.779391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
27034 13:57:20.813053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
27036 13:57:20.813616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
27037 13:57:20.851302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
27039 13:57:20.851759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
27040 13:57:20.886932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
27041 13:57:20.887366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
27043 13:57:20.921181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
27044 13:57:20.921695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
27046 13:57:20.955354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
27048 13:57:20.955998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
27049 13:57:20.989218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
27050 13:57:20.989761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
27052 13:57:21.021257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
27053 13:57:21.021703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
27055 13:57:21.052948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
27056 13:57:21.053423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
27058 13:57:21.086383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
27060 13:57:21.087063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
27061 13:57:21.119173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
27063 13:57:21.119745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
27064 13:57:21.150821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
27065 13:57:21.151272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
27067 13:57:21.182541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
27069 13:57:21.183185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
27070 13:57:21.214297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
27072 13:57:21.214931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
27073 13:57:21.246285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
27075 13:57:21.246881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
27076 13:57:21.279059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27077 13:57:21.279509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27079 13:57:21.311985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27081 13:57:21.312532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27082 13:57:21.343898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27083 13:57:21.344326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27085 13:57:21.376239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27086 13:57:21.376670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27088 13:57:21.408454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27089 13:57:21.408887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27091 13:57:21.440207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27093 13:57:21.440736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27094 13:57:21.472356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27095 13:57:21.472741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27097 13:57:21.505929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27098 13:57:21.506348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27100 13:57:21.538402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27102 13:57:21.538865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27103 13:57:21.570659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27104 13:57:21.571062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27106 13:57:21.602922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27107 13:57:21.603356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27109 13:57:21.634727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27110 13:57:21.635171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27112 13:57:21.667281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27113 13:57:21.667714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27115 13:57:21.699155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27117 13:57:21.699717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27118 13:57:21.730795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27120 13:57:21.731331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27121 13:57:21.762707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27122 13:57:21.763142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27124 13:57:21.795391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27125 13:57:21.795840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27127 13:57:21.827400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27128 13:57:21.827843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27130 13:57:21.859560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27132 13:57:21.860122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27133 13:57:21.892152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27134 13:57:21.892602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27136 13:57:21.924677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27137 13:57:21.925123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27139 13:57:21.956571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27140 13:57:21.957030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27142 13:57:21.990342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27144 13:57:21.990897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27145 13:57:22.023175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27146 13:57:22.023631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27148 13:57:22.055572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27149 13:57:22.056029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27151 13:57:22.088099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27153 13:57:22.088646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27154 13:57:22.119940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27155 13:57:22.120389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27157 13:57:22.152189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27158 13:57:22.152646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27160 13:57:22.183820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27161 13:57:22.184284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27163 13:57:22.216004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27164 13:57:22.216486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27166 13:57:22.248769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27168 13:57:22.249324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27169 13:57:22.280491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27171 13:57:22.281081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27172 13:57:22.313081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27173 13:57:22.313541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27175 13:57:22.345214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27177 13:57:22.345777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27178 13:57:22.376938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27179 13:57:22.377409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27181 13:57:22.408939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27183 13:57:22.409522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27184 13:57:22.441116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27185 13:57:22.441543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27187 13:57:22.473512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27189 13:57:22.473962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27190 13:57:22.506795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27191 13:57:22.507282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27193 13:57:22.540069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27194 13:57:22.540576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27196 13:57:22.573203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27197 13:57:22.573662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27199 13:57:22.605322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27200 13:57:22.605782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27202 13:57:22.638409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27204 13:57:22.638943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27205 13:57:22.671073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27206 13:57:22.671470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27208 13:57:22.704455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27210 13:57:22.705068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27211 13:57:22.737002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27212 13:57:22.737442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27214 13:57:22.769438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27216 13:57:22.769896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27217 13:57:22.801505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27218 13:57:22.801922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27220 13:57:22.834903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27222 13:57:22.835364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27223 13:57:22.867805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27224 13:57:22.868205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27226 13:57:22.899911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27227 13:57:22.900367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27229 13:57:22.931676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27231 13:57:22.932223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27232 13:57:22.963450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27233 13:57:22.963907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27235 13:57:22.996601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27236 13:57:22.997076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27238 13:57:23.028958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27239 13:57:23.029410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27241 13:57:23.061663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27242 13:57:23.062115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27244 13:57:23.094603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27246 13:57:23.095276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27247 13:57:23.131602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27249 13:57:23.132165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27250 13:57:23.167700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27252 13:57:23.168263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27253 13:57:23.199620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27254 13:57:23.200085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27256 13:57:23.231833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27257 13:57:23.232273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27259 13:57:23.263444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27260 13:57:23.263888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27262 13:57:23.295637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27263 13:57:23.296077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27265 13:57:23.327565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27266 13:57:23.327956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27268 13:57:23.359710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27269 13:57:23.360110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27271 13:57:23.392361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27272 13:57:23.392791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27274 13:57:23.424565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27275 13:57:23.425021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27277 13:57:23.456156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27278 13:57:23.456605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27280 13:57:23.488263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27281 13:57:23.488707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27283 13:57:23.519863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27284 13:57:23.520301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27286 13:57:23.551805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27287 13:57:23.552254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27289 13:57:23.584529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27291 13:57:23.585086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27292 13:57:23.616925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27293 13:57:23.617373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27295 13:57:23.648657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27297 13:57:23.649212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27298 13:57:23.680180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27299 13:57:23.680628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27301 13:57:23.712266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27302 13:57:23.712706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27304 13:57:23.744739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27305 13:57:23.745181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27307 13:57:23.777271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27308 13:57:23.777685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27310 13:57:23.810883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27311 13:57:23.811366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27313 13:57:23.841545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27315 13:57:23.842118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27316 13:57:23.873270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27317 13:57:23.873692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27319 13:57:23.905179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27320 13:57:23.905641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27322 13:57:23.937259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27323 13:57:23.937689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27325 13:57:23.968904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27326 13:57:23.969293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27328 13:57:24.000574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27330 13:57:24.001030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27331 13:57:24.031742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27332 13:57:24.032226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27334 13:57:24.063605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27336 13:57:24.064157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27337 13:57:24.095239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27339 13:57:24.095790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27340 13:57:24.127119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27341 13:57:24.127570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27343 13:57:24.159555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27345 13:57:24.160112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27346 13:57:24.191293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27347 13:57:24.191746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27349 13:57:24.223438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27350 13:57:24.223886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27352 13:57:24.255516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27354 13:57:24.256066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27355 13:57:24.287207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27357 13:57:24.287816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27358 13:57:24.319279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27359 13:57:24.319758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27361 13:57:24.351275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27362 13:57:24.351731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27364 13:57:24.383096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27365 13:57:24.383538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27367 13:57:24.415628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27368 13:57:24.416070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27370 13:57:24.447522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27371 13:57:24.447947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27373 13:57:24.478942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27374 13:57:24.479324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27376 13:57:24.510378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27378 13:57:24.510811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27379 13:57:24.541623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27380 13:57:24.542027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27382 13:57:24.573205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27383 13:57:24.573706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27385 13:57:24.605509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27386 13:57:24.605969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27388 13:57:24.637144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27389 13:57:24.637657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27391 13:57:24.668435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27393 13:57:24.669061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27394 13:57:24.699736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27396 13:57:24.700311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27397 13:57:24.731114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27399 13:57:24.731670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27400 13:57:24.763151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27401 13:57:24.763607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27403 13:57:24.794252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27405 13:57:24.794834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27406 13:57:24.825377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27407 13:57:24.825851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27409 13:57:24.856935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27411 13:57:24.857397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27412 13:57:24.888284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27414 13:57:24.888733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27415 13:57:24.919365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27416 13:57:24.919825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27418 13:57:24.951208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27420 13:57:24.951778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27421 13:57:24.982782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27423 13:57:24.983254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27424 13:57:25.014793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27425 13:57:25.015245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27427 13:57:25.046685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27429 13:57:25.047249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27430 13:57:25.078218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27431 13:57:25.078672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27433 13:57:25.110967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27434 13:57:25.111423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27436 13:57:25.144442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27438 13:57:25.144989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27439 13:57:25.177052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27440 13:57:25.177527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27442 13:57:25.228058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27444 13:57:25.228607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27445 13:57:25.260040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27446 13:57:25.260486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27448 13:57:25.291998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27449 13:57:25.292452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27451 13:57:25.323696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27452 13:57:25.324159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27454 13:57:25.355920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27455 13:57:25.356398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27457 13:57:25.388680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27458 13:57:25.389154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27460 13:57:25.421241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27461 13:57:25.421698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27463 13:57:25.453334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27464 13:57:25.453806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27466 13:57:25.485438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27467 13:57:25.485926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27469 13:57:25.517855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27470 13:57:25.518302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27472 13:57:25.550826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27474 13:57:25.551362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27475 13:57:25.583064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27476 13:57:25.583513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27478 13:57:25.615388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27479 13:57:25.615851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27481 13:57:25.648682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27482 13:57:25.649150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27484 13:57:25.680602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27486 13:57:25.681153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27487 13:57:25.712353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27488 13:57:25.712799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27490 13:57:25.744020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27491 13:57:25.744462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27493 13:57:25.775275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27494 13:57:25.775739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27496 13:57:25.807403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27498 13:57:25.807963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27499 13:57:25.839214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27500 13:57:25.839687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27502 13:57:25.871287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27503 13:57:25.871756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27505 13:57:25.903598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27506 13:57:25.904065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27508 13:57:25.935587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27509 13:57:25.935999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27511 13:57:25.968047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27513 13:57:25.968516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27514 13:57:26.001730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27515 13:57:26.002168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27517 13:57:26.035584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27518 13:57:26.036028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27520 13:57:26.068621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27521 13:57:26.069006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27523 13:57:26.100640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27525 13:57:26.101199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27526 13:57:26.132912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27527 13:57:26.133357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27529 13:57:26.164636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27530 13:57:26.165082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27532 13:57:26.197117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27533 13:57:26.197542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27535 13:57:26.230269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27537 13:57:26.230896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27538 13:57:26.262877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27539 13:57:26.263323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27541 13:57:26.295168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27542 13:57:26.295607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27544 13:57:26.328197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27546 13:57:26.328644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27547 13:57:26.359969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27549 13:57:26.360405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27550 13:57:26.392487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27551 13:57:26.392894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27553 13:57:26.424828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27554 13:57:26.425261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27556 13:57:26.457351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27557 13:57:26.457749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27559 13:57:26.490018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27561 13:57:26.490455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27562 13:57:26.521983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27563 13:57:26.522422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27565 13:57:26.554128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27566 13:57:26.554563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27568 13:57:26.586925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27570 13:57:26.587492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27571 13:57:26.618285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27573 13:57:26.618881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27574 13:57:26.650592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27576 13:57:26.651140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27577 13:57:26.683604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27578 13:57:26.684053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27580 13:57:26.715490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27581 13:57:26.715909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27583 13:57:26.747805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27585 13:57:26.748267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27586 13:57:26.779509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27587 13:57:26.779917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27589 13:57:26.811400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27590 13:57:26.811814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27592 13:57:26.845476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27594 13:57:26.845959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27595 13:57:26.877079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27597 13:57:26.877534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27598 13:57:26.909284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27600 13:57:26.909931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27601 13:57:26.943200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27603 13:57:26.943827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27604 13:57:26.975460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27605 13:57:26.975917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27607 13:57:27.007025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27609 13:57:27.007577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27610 13:57:27.039449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27612 13:57:27.040028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27613 13:57:27.071590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27614 13:57:27.072002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27616 13:57:27.103370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27618 13:57:27.104014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27619 13:57:27.135179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27620 13:57:27.135655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27622 13:57:27.167447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27623 13:57:27.167862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27625 13:57:27.199492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27627 13:57:27.199922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27628 13:57:27.231221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27629 13:57:27.231617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27631 13:57:27.263517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27632 13:57:27.263905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27634 13:57:27.295014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27635 13:57:27.295395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27637 13:57:27.326712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27638 13:57:27.327099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27640 13:57:27.358023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27641 13:57:27.358414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27643 13:57:27.389776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27644 13:57:27.390162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27646 13:57:27.421495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27647 13:57:27.421893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27649 13:57:27.452767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27650 13:57:27.453195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27652 13:57:27.484460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27653 13:57:27.484887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27655 13:57:27.516632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27656 13:57:27.517087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27658 13:57:27.547763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27659 13:57:27.548148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27661 13:57:27.579443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27662 13:57:27.579886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27664 13:57:27.611305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27665 13:57:27.611734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27667 13:57:27.644955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27669 13:57:27.645492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27670 13:57:27.678538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27672 13:57:27.679100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27673 13:57:27.711668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27674 13:57:27.712100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27676 13:57:27.744207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27678 13:57:27.744760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27679 13:57:27.776002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27681 13:57:27.776542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27682 13:57:27.807340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27683 13:57:27.807764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27685 13:57:27.840125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27687 13:57:27.840691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27688 13:57:27.872635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27689 13:57:27.873087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27691 13:57:27.904178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27692 13:57:27.904638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27694 13:57:27.935499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27696 13:57:27.936077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27697 13:57:27.966043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27698 13:57:27.966507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27700 13:57:27.997516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27701 13:57:27.997981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27703 13:57:28.028975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27704 13:57:28.029410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27706 13:57:28.060882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27707 13:57:28.061257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27709 13:57:28.093261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27710 13:57:28.093696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27712 13:57:28.125197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27713 13:57:28.125639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27715 13:57:28.157140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27716 13:57:28.157571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27718 13:57:28.189672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27720 13:57:28.190258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27721 13:57:28.221553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27722 13:57:28.222022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27724 13:57:28.253578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27726 13:57:28.254149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27727 13:57:28.286108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27729 13:57:28.286652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27730 13:57:28.318839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27731 13:57:28.319291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27733 13:57:28.350230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27735 13:57:28.350779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27736 13:57:28.381999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27738 13:57:28.382545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27739 13:57:28.414202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27740 13:57:28.414623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27742 13:57:28.446793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27744 13:57:28.447261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27745 13:57:28.478803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27747 13:57:28.479363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27748 13:57:28.510573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27749 13:57:28.511045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27751 13:57:28.543201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27752 13:57:28.543653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27754 13:57:28.574807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27756 13:57:28.575349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27757 13:57:28.605977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27759 13:57:28.606533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27760 13:57:28.638022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27762 13:57:28.638693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27763 13:57:28.668999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27764 13:57:28.669481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27766 13:57:28.700022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27768 13:57:28.700610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27769 13:57:28.731656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27770 13:57:28.732125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27772 13:57:28.762904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27774 13:57:28.763443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27775 13:57:28.794283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27777 13:57:28.794893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27778 13:57:28.826587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27780 13:57:28.827160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27781 13:57:28.857959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27783 13:57:28.858538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27784 13:57:28.889643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27786 13:57:28.890177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27787 13:57:28.920911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27789 13:57:28.921433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27790 13:57:28.952084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27791 13:57:28.952507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27793 13:57:28.983326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27794 13:57:28.983750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27796 13:57:29.015449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27797 13:57:29.015869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27799 13:57:29.046997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27800 13:57:29.047419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27802 13:57:29.079073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27804 13:57:29.079687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27805 13:57:29.110522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27806 13:57:29.110930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27808 13:57:29.142243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27810 13:57:29.142689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27811 13:57:29.173828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27813 13:57:29.174280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27814 13:57:29.205661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27815 13:57:29.206081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27817 13:57:29.237706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27818 13:57:29.238150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27820 13:57:29.268470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27821 13:57:29.268894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27823 13:57:29.300046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27824 13:57:29.300460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27826 13:57:29.330691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27827 13:57:29.331121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27829 13:57:29.361105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27830 13:57:29.361528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27832 13:57:29.391895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27834 13:57:29.392349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27835 13:57:29.423029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27837 13:57:29.423476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27838 13:57:29.454716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27839 13:57:29.455130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27841 13:57:29.486071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27843 13:57:29.486520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27844 13:57:29.517530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27846 13:57:29.517993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27847 13:57:29.548829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27848 13:57:29.549270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27850 13:57:29.580280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27852 13:57:29.580747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27853 13:57:29.611243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27854 13:57:29.611674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27856 13:57:29.643431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27858 13:57:29.643888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27859 13:57:29.675369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27861 13:57:29.676003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27862 13:57:29.706927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27863 13:57:29.707399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27865 13:57:29.739974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27866 13:57:29.740468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27868 13:57:29.771847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27870 13:57:29.772463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27871 13:57:29.803409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27873 13:57:29.803985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27874 13:57:29.835111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27875 13:57:29.835559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27877 13:57:29.866823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27878 13:57:29.867271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27880 13:57:29.897980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27881 13:57:29.898450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27883 13:57:29.929252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27884 13:57:29.929701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27886 13:57:29.960296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27888 13:57:29.960884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27889 13:57:29.991915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27890 13:57:29.992358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27892 13:57:30.023327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27894 13:57:30.023881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27895 13:57:30.054942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27897 13:57:30.055510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27898 13:57:30.085723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27900 13:57:30.086297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27901 13:57:30.116526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27903 13:57:30.117101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27904 13:57:30.147334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27905 13:57:30.147798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27907 13:57:30.178710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27908 13:57:30.179191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27910 13:57:30.210512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27911 13:57:30.211014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27913 13:57:30.241993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27914 13:57:30.242475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27916 13:57:30.273304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27917 13:57:30.273777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27919 13:57:30.304911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27920 13:57:30.305376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27922 13:57:30.356818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27924 13:57:30.357391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27925 13:57:30.387467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27926 13:57:30.387927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27928 13:57:30.418726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27930 13:57:30.419291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27931 13:57:30.449890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27932 13:57:30.450306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27934 13:57:30.480453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27935 13:57:30.480866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27937 13:57:30.512686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
27939 13:57:30.513135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
27940 13:57:30.544322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
27942 13:57:30.544788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
27943 13:57:30.576734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
27945 13:57:30.577197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
27946 13:57:30.608094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
27947 13:57:30.608507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
27949 13:57:30.639545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
27950 13:57:30.639942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
27952 13:57:30.670947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
27953 13:57:30.671340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
27955 13:57:30.703518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
27956 13:57:30.703958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
27958 13:57:30.735355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
27959 13:57:30.735791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
27961 13:57:30.767276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
27962 13:57:30.767703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
27964 13:57:30.799293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
27965 13:57:30.799723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
27967 13:57:30.831063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
27968 13:57:30.831533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
27970 13:57:30.862625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
27971 13:57:30.863182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
27973 13:57:30.893914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
27975 13:57:30.894707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
27976 13:57:30.925879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
27977 13:57:30.926415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
27979 13:57:30.957231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
27980 13:57:30.957690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
27982 13:57:30.988800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
27983 13:57:30.989289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
27985 13:57:31.021014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
27986 13:57:31.021490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
27988 13:57:31.052885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
27989 13:57:31.053323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
27991 13:57:31.084323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
27993 13:57:31.084674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
27994 13:57:31.115625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
27995 13:57:31.116093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
27997 13:57:31.146807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
27999 13:57:31.147369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
28000 13:57:31.177376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
28001 13:57:31.177830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
28003 13:57:31.208729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
28005 13:57:31.209410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
28006 13:57:31.239723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
28007 13:57:31.240198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
28009 13:57:31.271349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
28011 13:57:31.271903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
28012 13:57:31.303240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
28014 13:57:31.303811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
28015 13:57:31.335473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
28016 13:57:31.335948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
28018 13:57:31.367761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
28019 13:57:31.368232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
28021 13:57:31.399414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
28023 13:57:31.400038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
28024 13:57:31.431069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
28025 13:57:31.431544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
28027 13:57:31.462654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
28028 13:57:31.463129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
28030 13:57:31.494310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
28032 13:57:31.494739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
28033 13:57:31.525819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
28034 13:57:31.526200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
28036 13:57:31.557373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
28037 13:57:31.557754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
28039 13:57:31.589717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
28040 13:57:31.590078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
28042 13:57:31.621632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
28044 13:57:31.622165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
28045 13:57:31.653425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
28046 13:57:31.653880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
28048 13:57:31.685465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
28050 13:57:31.686019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
28051 13:57:31.716956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
28052 13:57:31.717391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
28054 13:57:31.748481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
28055 13:57:31.748924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
28057 13:57:31.780579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
28058 13:57:31.781039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
28060 13:57:31.812493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
28062 13:57:31.813048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
28063 13:57:31.843869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
28065 13:57:31.844435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
28066 13:57:31.875459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
28067 13:57:31.875906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
28069 13:57:31.906677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
28071 13:57:31.907235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
28072 13:57:31.938132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
28073 13:57:31.938588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
28075 13:57:31.970469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28077 13:57:31.971164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
28078 13:57:32.004560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28080 13:57:32.005340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28081 13:57:32.036439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28083 13:57:32.037248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28084 13:57:32.067939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28085 13:57:32.068326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28087 13:57:32.101785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28088 13:57:32.102162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28090 13:57:32.135603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28092 13:57:32.136153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28093 13:57:32.169682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28094 13:57:32.170155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28096 13:57:32.204577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28098 13:57:32.205056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28099 13:57:32.239441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28100 13:57:32.239913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28102 13:57:32.273536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28103 13:57:32.273902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28105 13:57:32.305685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28107 13:57:32.306119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28108 13:57:32.338101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28110 13:57:32.338538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28111 13:57:32.371315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28113 13:57:32.371738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28114 13:57:32.403429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28116 13:57:32.403866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28117 13:57:32.436214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28119 13:57:32.436652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28120 13:57:32.468154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28121 13:57:32.468611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28123 13:57:32.499300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28124 13:57:32.499752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28126 13:57:32.530897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28127 13:57:32.531374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28129 13:57:32.562932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28131 13:57:32.563500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28132 13:57:32.594097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28134 13:57:32.594693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28135 13:57:32.627641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28136 13:57:32.628043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28138 13:57:32.665546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28140 13:57:32.665969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28141 13:57:32.701117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28142 13:57:32.701403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28144 13:57:32.736478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28145 13:57:32.736750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28147 13:57:32.771844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28149 13:57:32.772065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28150 13:57:32.807066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28151 13:57:32.807409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28153 13:57:32.843097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28154 13:57:32.843578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28156 13:57:32.878492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28158 13:57:32.879130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28159 13:57:32.909220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28160 13:57:32.909702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28162 13:57:32.941337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28164 13:57:32.941916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28165 13:57:32.972559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28166 13:57:32.973004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28168 13:57:33.007180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28169 13:57:33.007649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28171 13:57:33.039962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28173 13:57:33.040531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28174 13:57:33.073678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28175 13:57:33.074226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28177 13:57:33.107060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28178 13:57:33.107506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28180 13:57:33.140816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28181 13:57:33.141251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28183 13:57:33.173891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28185 13:57:33.174297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28186 13:57:33.205255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28188 13:57:33.205652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28189 13:57:33.236705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28191 13:57:33.237256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28192 13:57:33.268354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28193 13:57:33.268800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28195 13:57:33.299695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28197 13:57:33.300234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28198 13:57:33.335116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28199 13:57:33.335596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28201 13:57:33.367330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28202 13:57:33.367798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28204 13:57:33.399198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28205 13:57:33.399679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28207 13:57:33.432376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28209 13:57:33.432925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28210 13:57:33.464161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28211 13:57:33.464604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28213 13:57:33.495397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28214 13:57:33.495873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28216 13:57:33.526859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28218 13:57:33.527415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28219 13:57:33.557708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28221 13:57:33.558305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28222 13:57:33.588831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28224 13:57:33.589384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28225 13:57:33.619795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28227 13:57:33.620355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28228 13:57:33.650941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28229 13:57:33.651395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28231 13:57:33.685145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28232 13:57:33.685605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28234 13:57:33.716291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28236 13:57:33.716851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28237 13:57:33.747987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28239 13:57:33.748549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28240 13:57:33.779303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28241 13:57:33.779793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28243 13:57:33.811300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28244 13:57:33.811770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28246 13:57:33.843076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28248 13:57:33.843621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28249 13:57:33.875249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28250 13:57:33.875703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28252 13:57:33.906489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28254 13:57:33.907050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28255 13:57:33.937440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28257 13:57:33.938003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28258 13:57:33.969045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28259 13:57:33.969515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28261 13:57:34.001985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28262 13:57:34.002490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28264 13:57:34.033935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28265 13:57:34.034507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28267 13:57:34.066024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28268 13:57:34.066512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28270 13:57:34.097677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28271 13:57:34.098151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28273 13:57:34.129061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28275 13:57:34.129693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28276 13:57:34.165978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28278 13:57:34.166411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28279 13:57:34.198871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28280 13:57:34.199255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28282 13:57:34.231249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28284 13:57:34.231889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28285 13:57:34.263045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28287 13:57:34.263602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28288 13:57:34.294211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28290 13:57:34.294668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28291 13:57:34.324902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28292 13:57:34.325324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28294 13:57:34.355620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28295 13:57:34.356110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28297 13:57:34.386747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28298 13:57:34.387166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28300 13:57:34.417993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28302 13:57:34.418437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28303 13:57:34.449553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28304 13:57:34.450037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28306 13:57:34.481342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28307 13:57:34.481904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28309 13:57:34.513890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28310 13:57:34.514281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28312 13:57:34.545105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28313 13:57:34.545552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28315 13:57:34.576162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28316 13:57:34.576646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28318 13:57:34.607822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28320 13:57:34.608374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28321 13:57:34.639261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28322 13:57:34.639730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28324 13:57:34.670783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28326 13:57:34.671358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28327 13:57:34.702761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28328 13:57:34.703237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28330 13:57:34.733926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28332 13:57:34.734485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28333 13:57:34.765218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28334 13:57:34.765699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28336 13:57:34.796943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28337 13:57:34.797394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28339 13:57:34.828297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28340 13:57:34.828777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28342 13:57:34.860100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28344 13:57:34.860746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28345 13:57:34.892232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28347 13:57:34.892859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28348 13:57:34.924160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28349 13:57:34.924641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28351 13:57:34.955587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28352 13:57:34.956084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28354 13:57:34.987387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28355 13:57:34.987863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28357 13:57:35.018490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28359 13:57:35.019053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28360 13:57:35.050764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28361 13:57:35.051345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28363 13:57:35.082718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28364 13:57:35.083200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28366 13:57:35.113849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28367 13:57:35.114345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28369 13:57:35.145752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28370 13:57:35.146274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28372 13:57:35.183303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28373 13:57:35.183758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28375 13:57:35.221078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28377 13:57:35.221512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28378 13:57:35.253581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28379 13:57:35.254037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28381 13:57:35.284571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28383 13:57:35.285034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28384 13:57:35.315058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28385 13:57:35.315536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28387 13:57:35.346006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28389 13:57:35.346573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28390 13:57:35.377194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28391 13:57:35.377669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28393 13:57:35.408874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28394 13:57:35.409296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28396 13:57:35.460655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28398 13:57:35.461227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28399 13:57:35.493019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28400 13:57:35.493466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28402 13:57:35.525533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28404 13:57:35.526147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28405 13:57:35.557205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28406 13:57:35.557665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28408 13:57:35.592609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28409 13:57:35.592966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28411 13:57:35.627348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28412 13:57:35.627720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28414 13:57:35.659948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28415 13:57:35.660365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28417 13:57:35.693141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28419 13:57:35.693641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28420 13:57:35.725835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28422 13:57:35.726304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28423 13:57:35.758633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28424 13:57:35.759040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28426 13:57:35.791728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28428 13:57:35.792186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28429 13:57:35.824284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28431 13:57:35.824733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28432 13:57:35.858383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28434 13:57:35.858852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28435 13:57:35.892300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28436 13:57:35.892725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28438 13:57:35.926554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28439 13:57:35.926998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28441 13:57:35.959045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28442 13:57:35.959633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28444 13:57:35.991187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28445 13:57:35.991593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28447 13:57:36.022336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28449 13:57:36.022763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28450 13:57:36.057343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28451 13:57:36.057767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28453 13:57:36.089474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28455 13:57:36.089951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28456 13:57:36.121708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28457 13:57:36.122170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28459 13:57:36.153580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28460 13:57:36.154010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28462 13:57:36.186950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28463 13:57:36.187374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28465 13:57:36.219343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28466 13:57:36.219830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28468 13:57:36.252135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28469 13:57:36.252527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28471 13:57:36.285361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28473 13:57:36.285981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28474 13:57:36.317805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28476 13:57:36.318440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28477 13:57:36.350074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28479 13:57:36.350698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28480 13:57:36.382832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28482 13:57:36.383463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28483 13:57:36.415025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28484 13:57:36.415487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28486 13:57:36.447647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28488 13:57:36.448224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28489 13:57:36.480578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28491 13:57:36.481148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28492 13:57:36.513257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28493 13:57:36.513700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28495 13:57:36.545681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28496 13:57:36.546171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28498 13:57:36.577504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28499 13:57:36.577995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28501 13:57:36.609409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28503 13:57:36.610057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28504 13:57:36.640779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28505 13:57:36.641241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28507 13:57:36.673382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28509 13:57:36.673995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28510 13:57:36.705584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28512 13:57:36.706263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28513 13:57:36.739950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28514 13:57:36.740426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28516 13:57:36.772722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28517 13:57:36.773175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28519 13:57:36.806868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28520 13:57:36.807347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28522 13:57:36.839574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28524 13:57:36.840170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28525 13:57:36.872910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28526 13:57:36.873465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28528 13:57:36.906095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28529 13:57:36.906563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28531 13:57:36.939330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28532 13:57:36.939784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28534 13:57:36.972259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28535 13:57:36.972737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28537 13:57:37.005905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28538 13:57:37.006317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28540 13:57:37.039306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28541 13:57:37.039720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28543 13:57:37.072045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28544 13:57:37.072443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28546 13:57:37.105458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28547 13:57:37.105899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28549 13:57:37.137577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28550 13:57:37.138016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28552 13:57:37.170294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28554 13:57:37.170760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28555 13:57:37.202185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28557 13:57:37.202639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28558 13:57:37.234055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28560 13:57:37.234519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28561 13:57:37.265941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28563 13:57:37.266503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28564 13:57:37.297450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28565 13:57:37.297869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28567 13:57:37.329624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28568 13:57:37.330025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28570 13:57:37.361443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28572 13:57:37.361897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28573 13:57:37.393411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28575 13:57:37.393859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28576 13:57:37.425124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28578 13:57:37.425556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28579 13:57:37.456922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28581 13:57:37.457545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28582 13:57:37.488301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28584 13:57:37.488853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28585 13:57:37.520113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28587 13:57:37.520682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28588 13:57:37.552677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28590 13:57:37.553263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28591 13:57:37.585095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28593 13:57:37.585664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28594 13:57:37.616336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28595 13:57:37.616779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28597 13:57:37.648604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28599 13:57:37.649141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28600 13:57:37.680509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28602 13:57:37.681074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28603 13:57:37.712352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28605 13:57:37.712914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28606 13:57:37.745226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28608 13:57:37.745878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28609 13:57:37.777173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28610 13:57:37.777644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28612 13:57:37.809307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28613 13:57:37.809795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28615 13:57:37.842941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28616 13:57:37.843442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28618 13:57:37.875731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28619 13:57:37.876235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28621 13:57:37.908809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28622 13:57:37.909297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28624 13:57:37.943064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28625 13:57:37.943494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28627 13:57:37.975207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28628 13:57:37.975624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28630 13:57:38.009136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28631 13:57:38.009575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28633 13:57:38.041627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28634 13:57:38.042062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28636 13:57:38.075239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28637 13:57:38.075821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28639 13:57:38.112186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28640 13:57:38.112571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28642 13:57:38.149423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28643 13:57:38.149881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28645 13:57:38.186149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28647 13:57:38.186715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28648 13:57:38.218708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28650 13:57:38.219264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28651 13:57:38.250317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28653 13:57:38.250919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28654 13:57:38.283032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28655 13:57:38.283488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28657 13:57:38.315033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28659 13:57:38.315570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28660 13:57:38.347116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28662 13:57:38.347672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28663 13:57:38.379465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28665 13:57:38.380003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28666 13:57:38.411184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28668 13:57:38.411762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28669 13:57:38.443396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28670 13:57:38.443852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28672 13:57:38.476181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28673 13:57:38.476636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28675 13:57:38.508217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28677 13:57:38.508827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28678 13:57:38.541338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28679 13:57:38.541798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28681 13:57:38.573086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28683 13:57:38.573708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28684 13:57:38.605338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28685 13:57:38.605777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28687 13:57:38.639366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28688 13:57:38.639813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28690 13:57:38.670749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28691 13:57:38.671190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28693 13:57:38.707021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28695 13:57:38.707571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28696 13:57:38.743369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28697 13:57:38.743827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28699 13:57:38.778680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28700 13:57:38.779143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28702 13:57:38.815159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28703 13:57:38.815633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28705 13:57:38.847285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28706 13:57:38.847753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28708 13:57:38.884057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28709 13:57:38.884506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28711 13:57:38.919556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28713 13:57:38.920106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28714 13:57:38.956331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28716 13:57:38.956785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28717 13:57:38.988462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28718 13:57:38.988877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28720 13:57:39.020334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28721 13:57:39.020777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28723 13:57:39.054865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28724 13:57:39.055319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28726 13:57:39.087260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28727 13:57:39.087702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28729 13:57:39.119799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28730 13:57:39.120273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28732 13:57:39.152310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28733 13:57:39.152773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28735 13:57:39.183929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28736 13:57:39.184409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28738 13:57:39.216430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28739 13:57:39.216893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28741 13:57:39.249171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28742 13:57:39.249587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28744 13:57:39.281260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28745 13:57:39.281702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28747 13:57:39.313972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28749 13:57:39.314689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28750 13:57:39.347084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28752 13:57:39.347667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28753 13:57:39.380048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28754 13:57:39.380707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28756 13:57:39.413109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28758 13:57:39.413695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28759 13:57:39.444684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28760 13:57:39.445124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28762 13:57:39.476600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28763 13:57:39.477088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28765 13:57:39.508949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28766 13:57:39.509374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28768 13:57:39.544090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28769 13:57:39.544571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28771 13:57:39.580335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28773 13:57:39.580889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28774 13:57:39.612235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28776 13:57:39.612796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28777 13:57:39.646190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28778 13:57:39.646718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28780 13:57:39.681230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28781 13:57:39.681707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28783 13:57:39.714270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28785 13:57:39.714898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28786 13:57:39.747420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28788 13:57:39.747990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28789 13:57:39.779313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28790 13:57:39.779784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28792 13:57:39.811955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28793 13:57:39.812368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28795 13:57:39.845027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28797 13:57:39.845463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28798 13:57:39.877811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28800 13:57:39.878249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28801 13:57:39.910985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28803 13:57:39.911615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28804 13:57:39.943887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28806 13:57:39.944436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28807 13:57:39.977874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28808 13:57:39.978296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28810 13:57:40.012088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28812 13:57:40.012724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28813 13:57:40.044273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28815 13:57:40.044908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28816 13:57:40.077463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28817 13:57:40.077931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28819 13:57:40.110360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28821 13:57:40.111002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28822 13:57:40.143258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28823 13:57:40.143673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28825 13:57:40.176977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28826 13:57:40.177391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28828 13:57:40.209048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28829 13:57:40.209483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28831 13:57:40.242036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28832 13:57:40.242491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28834 13:57:40.275195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28836 13:57:40.275814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28837 13:57:40.306798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28838 13:57:40.307193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28840 13:57:40.339381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28841 13:57:40.339745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28843 13:57:40.373622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28845 13:57:40.374439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28846 13:57:40.409862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28848 13:57:40.410424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28849 13:57:40.451223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28850 13:57:40.451706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28852 13:57:40.488568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28853 13:57:40.489133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28855 13:57:40.524629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28856 13:57:40.525081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28858 13:57:40.583910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28859 13:57:40.584356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28861 13:57:40.639279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28862 13:57:40.639666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28864 13:57:40.675343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28865 13:57:40.675727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28867 13:57:40.711651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28869 13:57:40.712234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28870 13:57:40.746956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28871 13:57:40.747439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28873 13:57:40.791927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28874 13:57:40.792425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28876 13:57:40.828888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28878 13:57:40.829355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28879 13:57:40.867002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28880 13:57:40.867445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28882 13:57:40.904179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28883 13:57:40.904600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28885 13:57:40.941635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28887 13:57:40.942109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28888 13:57:40.979492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28889 13:57:40.980040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28891 13:57:41.015855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28893 13:57:41.016424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28894 13:57:41.051866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28895 13:57:41.052306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28897 13:57:41.085415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28898 13:57:41.085998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28900 13:57:41.118710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28902 13:57:41.119291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28903 13:57:41.151330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28904 13:57:41.151783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28906 13:57:41.183471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28908 13:57:41.183921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28909 13:57:41.215238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28910 13:57:41.215710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28912 13:57:41.247347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28913 13:57:41.247807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28915 13:57:41.278396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28917 13:57:41.279011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28918 13:57:41.311095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28920 13:57:41.311534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28921 13:57:41.344117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28922 13:57:41.344546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28924 13:57:41.376038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28925 13:57:41.376489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28927 13:57:41.407641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28928 13:57:41.408118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28930 13:57:41.439226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28931 13:57:41.439657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28933 13:57:41.471713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28934 13:57:41.472142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28936 13:57:41.507090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
28938 13:57:41.507491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
28939 13:57:41.539963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
28940 13:57:41.540430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
28942 13:57:41.571410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
28943 13:57:41.571869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
28945 13:57:41.604291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
28946 13:57:41.604765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
28948 13:57:41.636505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
28949 13:57:41.636980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
28951 13:57:41.670073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
28953 13:57:41.670529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
28954 13:57:41.705245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
28955 13:57:41.705692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
28957 13:57:41.741080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
28958 13:57:41.741561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
28960 13:57:41.776715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
28961 13:57:41.777195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
28963 13:57:41.811998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
28965 13:57:41.812429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
28966 13:57:41.847412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
28968 13:57:41.847892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
28969 13:57:41.881980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
28970 13:57:41.882402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
28972 13:57:41.917340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
28974 13:57:41.917803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
28975 13:57:41.952921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
28976 13:57:41.953335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
28978 13:57:41.987795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
28980 13:57:41.988244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
28981 13:57:42.023124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
28982 13:57:42.023562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
28984 13:57:42.058489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
28986 13:57:42.058951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
28987 13:57:42.094547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
28988 13:57:42.094985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
28990 13:57:42.131703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
28991 13:57:42.132117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
28993 13:57:42.167886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
28994 13:57:42.168302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
28996 13:57:42.203872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
28998 13:57:42.204354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
28999 13:57:42.240507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
29000 13:57:42.240936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
29002 13:57:42.277026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
29003 13:57:42.277451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
29005 13:57:42.315422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
29007 13:57:42.315888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
29008 13:57:42.351307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
29010 13:57:42.351774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
29011 13:57:42.386789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
29013 13:57:42.387260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
29014 13:57:42.421968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
29016 13:57:42.422426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
29017 13:57:42.460929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
29019 13:57:42.461389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
29020 13:57:42.496377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
29021 13:57:42.496806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
29023 13:57:42.531763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
29024 13:57:42.532235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
29026 13:57:42.567650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
29028 13:57:42.568125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
29029 13:57:42.603572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
29031 13:57:42.604011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
29032 13:57:42.640086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
29033 13:57:42.640487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
29035 13:57:42.676141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
29037 13:57:42.676588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
29038 13:57:42.712038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
29040 13:57:42.712485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
29041 13:57:42.747821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
29042 13:57:42.748262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
29044 13:57:42.783665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
29045 13:57:42.784014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
29047 13:57:42.819575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
29048 13:57:42.819926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
29050 13:57:42.855493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
29051 13:57:42.855840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
29053 13:57:42.891477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
29054 13:57:42.891763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
29056 13:57:42.927521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
29057 13:57:42.927799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
29059 13:57:42.964093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
29060 13:57:42.964376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
29062 13:57:43.000471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
29063 13:57:43.000754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
29065 13:57:43.036688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
29067 13:57:43.037464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
29068 13:57:43.072618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
29070 13:57:43.073034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
29071 13:57:43.109434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
29073 13:57:43.109800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
29074 13:57:43.146822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29075 13:57:43.147181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
29077 13:57:43.183026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29079 13:57:43.183431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29080 13:57:43.217981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29081 13:57:43.218264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29083 13:57:43.252758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29084 13:57:43.253124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29086 13:57:43.288194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29088 13:57:43.288631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29089 13:57:43.323566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29090 13:57:43.323914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29092 13:57:43.359100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29093 13:57:43.359450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29095 13:57:43.395215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29097 13:57:43.395660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29098 13:57:43.429932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29100 13:57:43.430368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29101 13:57:43.464845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29102 13:57:43.465123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29104 13:57:43.499860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29106 13:57:43.500411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29107 13:57:43.535412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29108 13:57:43.535730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29110 13:57:43.571048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29111 13:57:43.571399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29113 13:57:43.607113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29114 13:57:43.607391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29116 13:57:43.642015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29117 13:57:43.642293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29119 13:57:43.677301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29120 13:57:43.677578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29122 13:57:43.712236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29123 13:57:43.712545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29125 13:57:43.747742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29127 13:57:43.748056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29128 13:57:43.783466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29129 13:57:43.783850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29131 13:57:43.820750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29133 13:57:43.821176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29134 13:57:43.856212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29135 13:57:43.856564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29137 13:57:43.891916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29138 13:57:43.892193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29140 13:57:43.927558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29141 13:57:43.927834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29143 13:57:43.963883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29144 13:57:43.964177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29146 13:57:44.000397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29147 13:57:44.000770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29149 13:57:44.035562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29151 13:57:44.036011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29152 13:57:44.072622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29153 13:57:44.073025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29155 13:57:44.108220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29156 13:57:44.108595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29158 13:57:44.144356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29159 13:57:44.144775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29161 13:57:44.180066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29162 13:57:44.180481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29164 13:57:44.216127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29166 13:57:44.216601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29167 13:57:44.252196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29168 13:57:44.252686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29170 13:57:44.288007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29172 13:57:44.288460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29173 13:57:44.323684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29175 13:57:44.324138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29176 13:57:44.359343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29178 13:57:44.359814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29179 13:57:44.395284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29180 13:57:44.395723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29182 13:57:44.434003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29183 13:57:44.434489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29185 13:57:44.469442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29186 13:57:44.469856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29188 13:57:44.505042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29190 13:57:44.505623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29191 13:57:44.542389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29193 13:57:44.542832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29194 13:57:44.577130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29196 13:57:44.577635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29197 13:57:44.612054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29198 13:57:44.612337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29200 13:57:44.647511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29201 13:57:44.647861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29203 13:57:44.682318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29205 13:57:44.682825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29206 13:57:44.717258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29207 13:57:44.717607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29209 13:57:44.752909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29210 13:57:44.753261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29212 13:57:44.787739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29213 13:57:44.788085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29215 13:57:44.822714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29216 13:57:44.822985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29218 13:57:44.857146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29219 13:57:44.857430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29221 13:57:44.891833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29223 13:57:44.892266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29224 13:57:44.927851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29225 13:57:44.928221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29227 13:57:44.963207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29228 13:57:44.963607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29230 13:57:44.998360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29232 13:57:44.998829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29233 13:57:45.033691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29235 13:57:45.034148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29236 13:57:45.069199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29237 13:57:45.069616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29239 13:57:45.104462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29241 13:57:45.104914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29242 13:57:45.139806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29243 13:57:45.140200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29245 13:57:45.174968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29246 13:57:45.175427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29248 13:57:45.210015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29250 13:57:45.210566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29251 13:57:45.245685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29252 13:57:45.246106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29254 13:57:45.281958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29255 13:57:45.282349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29257 13:57:45.317690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29259 13:57:45.318194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29260 13:57:45.352996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29261 13:57:45.353344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29263 13:57:45.388560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29264 13:57:45.388978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29266 13:57:45.423588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29267 13:57:45.424017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29269 13:57:45.459089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29270 13:57:45.459544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29272 13:57:45.494936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29273 13:57:45.495392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29275 13:57:45.530284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29277 13:57:45.530867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29278 13:57:45.565457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29279 13:57:45.565954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29281 13:57:45.600402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29283 13:57:45.600972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29284 13:57:45.635401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29286 13:57:45.635952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29287 13:57:45.675814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29288 13:57:45.676269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29290 13:57:45.733887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29291 13:57:45.734351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29293 13:57:45.765950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29295 13:57:45.766496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29296 13:57:45.798288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29298 13:57:45.798804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29299 13:57:45.829992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29301 13:57:45.830529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29302 13:57:45.861757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29303 13:57:45.862219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29305 13:57:45.895431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29306 13:57:45.895908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29308 13:57:45.929069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29309 13:57:45.929528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29311 13:57:45.962836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29312 13:57:45.963306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29314 13:57:45.995469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29315 13:57:45.995967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29317 13:57:46.027476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29319 13:57:46.028180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29320 13:57:46.059801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29321 13:57:46.060267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29323 13:57:46.091973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29324 13:57:46.092445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29326 13:57:46.123803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29327 13:57:46.124275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29329 13:57:46.155633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29331 13:57:46.156203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29332 13:57:46.187508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29334 13:57:46.187976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29335 13:57:46.219452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29337 13:57:46.219918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29338 13:57:46.251606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29339 13:57:46.252032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29341 13:57:46.283674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29342 13:57:46.284095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29344 13:57:46.315845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29346 13:57:46.316300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29347 13:57:46.347888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29348 13:57:46.348316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29350 13:57:46.379634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29351 13:57:46.380057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29353 13:57:46.412159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29355 13:57:46.412626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29356 13:57:46.444649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29357 13:57:46.445070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29359 13:57:46.477308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29360 13:57:46.477682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29362 13:57:46.509547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29363 13:57:46.509970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29365 13:57:46.541251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29366 13:57:46.541692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29368 13:57:46.573591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29369 13:57:46.574021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29371 13:57:46.605758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29372 13:57:46.606200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29374 13:57:46.637705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29376 13:57:46.638162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29377 13:57:46.669583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29378 13:57:46.670025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29380 13:57:46.701331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29381 13:57:46.701749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29383 13:57:46.733956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29385 13:57:46.734413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29386 13:57:46.765854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29387 13:57:46.766318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29389 13:57:46.798398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29391 13:57:46.799010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29392 13:57:46.830809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29393 13:57:46.831269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29395 13:57:46.863702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29396 13:57:46.864161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29398 13:57:46.896038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29400 13:57:46.896636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29401 13:57:46.928123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29402 13:57:46.928612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29404 13:57:46.960676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29405 13:57:46.961153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29407 13:57:46.992984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29409 13:57:46.993581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29410 13:57:47.025184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29412 13:57:47.025817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29413 13:57:47.057545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29415 13:57:47.058189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29416 13:57:47.090336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29418 13:57:47.090954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29419 13:57:47.123205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29420 13:57:47.123679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29422 13:57:47.155560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29423 13:57:47.156035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29425 13:57:47.188203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29426 13:57:47.188664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29428 13:57:47.220649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29429 13:57:47.221117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29431 13:57:47.253361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29433 13:57:47.253937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29434 13:57:47.285592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29435 13:57:47.286070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29437 13:57:47.318054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29439 13:57:47.318675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29440 13:57:47.350484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29442 13:57:47.351118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29443 13:57:47.386782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29444 13:57:47.387256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29446 13:57:47.419131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29448 13:57:47.419702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29449 13:57:47.451217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29450 13:57:47.451692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29452 13:57:47.483137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29453 13:57:47.483595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29455 13:57:47.515270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29456 13:57:47.515734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29458 13:57:47.547269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29459 13:57:47.547750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29461 13:57:47.579520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29463 13:57:47.580142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29464 13:57:47.610756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29465 13:57:47.611164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29467 13:57:47.643212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29469 13:57:47.643754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29470 13:57:47.675456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29472 13:57:47.676046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29473 13:57:47.707515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29474 13:57:47.707993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29476 13:57:47.739531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29477 13:57:47.739976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29479 13:57:47.772365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29480 13:57:47.772799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29482 13:57:47.804298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29484 13:57:47.804858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29485 13:57:47.836135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29487 13:57:47.836694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29488 13:57:47.867966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29490 13:57:47.868528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29491 13:57:47.899857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29493 13:57:47.900316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29494 13:57:47.932221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29496 13:57:47.932663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29497 13:57:47.968477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29498 13:57:47.968967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29500 13:57:48.000632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29502 13:57:48.001202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29503 13:57:48.035402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29505 13:57:48.035961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29506 13:57:48.072815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29507 13:57:48.073255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29509 13:57:48.107421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29510 13:57:48.107854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29512 13:57:48.142833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29514 13:57:48.143297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29515 13:57:48.176182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29516 13:57:48.176629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29518 13:57:48.209453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29519 13:57:48.209852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29521 13:57:48.241421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29522 13:57:48.241819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29524 13:57:48.273453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29525 13:57:48.273894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29527 13:57:48.305159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29528 13:57:48.305591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29530 13:57:48.337470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29531 13:57:48.337993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29533 13:57:48.369758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29535 13:57:48.370353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29536 13:57:48.401481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29538 13:57:48.402055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29539 13:57:48.432646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29541 13:57:48.433224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29542 13:57:48.464297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29543 13:57:48.464763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29545 13:57:48.495705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29547 13:57:48.496332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29548 13:57:48.527531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29550 13:57:48.528161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29551 13:57:48.560534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29552 13:57:48.560972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29554 13:57:48.592583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29555 13:57:48.593048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29557 13:57:48.624784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29558 13:57:48.625242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29560 13:57:48.656840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29562 13:57:48.657398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29563 13:57:48.689174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29564 13:57:48.689585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29566 13:57:48.721276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29568 13:57:48.721838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29569 13:57:48.753567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29570 13:57:48.754053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29572 13:57:48.785251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29573 13:57:48.785689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29575 13:57:48.819531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29577 13:57:48.820077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29578 13:57:48.853398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29580 13:57:48.853971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29581 13:57:48.885445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29582 13:57:48.885917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29584 13:57:48.917573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29585 13:57:48.918028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29587 13:57:48.949699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29589 13:57:48.950241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29590 13:57:48.981263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29592 13:57:48.981800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29593 13:57:49.015273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29594 13:57:49.015745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29596 13:57:49.047587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29597 13:57:49.048038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29599 13:57:49.079268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29600 13:57:49.079717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29602 13:57:49.111542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29603 13:57:49.112001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29605 13:57:49.143803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29606 13:57:49.144215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29608 13:57:49.176637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29609 13:57:49.177106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29611 13:57:49.209313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29613 13:57:49.209747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29614 13:57:49.240699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29615 13:57:49.241099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29617 13:57:49.272694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29618 13:57:49.273118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29620 13:57:49.305124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29621 13:57:49.305540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29623 13:57:49.336900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29624 13:57:49.337319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29626 13:57:49.369051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29627 13:57:49.369474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29629 13:57:49.401508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29630 13:57:49.402068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29632 13:57:49.435343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29634 13:57:49.435785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29635 13:57:49.469316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29637 13:57:49.469762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29638 13:57:49.500845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29639 13:57:49.501266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29641 13:57:49.533829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29642 13:57:49.534230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29644 13:57:49.568945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29645 13:57:49.569353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29647 13:57:49.605629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29648 13:57:49.606084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29650 13:57:49.641661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29652 13:57:49.642088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29653 13:57:49.679133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29655 13:57:49.679671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29656 13:57:49.710831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29658 13:57:49.711387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29659 13:57:49.741842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29660 13:57:49.742307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29662 13:57:49.773879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29663 13:57:49.774340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29665 13:57:49.805707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29667 13:57:49.806322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29668 13:57:49.837627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29669 13:57:49.838080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29671 13:57:49.870017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29673 13:57:49.870554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29674 13:57:49.901901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29675 13:57:49.902329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29677 13:57:49.935197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29678 13:57:49.935571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29680 13:57:49.966961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29681 13:57:49.967368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29683 13:57:49.999447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29685 13:57:49.999905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29686 13:57:50.017685 <47>[ 299.651379] systemd-journald[105]: Sent WATCHDOG=1 notification.
29687 13:57:50.036142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29688 13:57:50.036578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29690 13:57:50.069215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29692 13:57:50.069675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29693 13:57:50.100808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29695 13:57:50.101351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29696 13:57:50.134880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29698 13:57:50.135421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29699 13:57:50.166811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29700 13:57:50.167257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29702 13:57:50.199285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29703 13:57:50.199769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29705 13:57:50.235516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29706 13:57:50.235978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29708 13:57:50.268075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29709 13:57:50.268525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29711 13:57:50.299783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29712 13:57:50.300209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29714 13:57:50.331457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29715 13:57:50.331893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29717 13:57:50.362917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29718 13:57:50.363355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29720 13:57:50.394340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29722 13:57:50.394915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29723 13:57:50.425682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29724 13:57:50.426113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29726 13:57:50.457291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29727 13:57:50.457698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29729 13:57:50.489311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29731 13:57:50.489930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29732 13:57:50.521774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29733 13:57:50.522218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29735 13:57:50.553710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29737 13:57:50.554311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29738 13:57:50.585138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29740 13:57:50.585691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29741 13:57:50.617065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29742 13:57:50.617498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29744 13:57:50.649487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29746 13:57:50.650028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29747 13:57:50.681304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29748 13:57:50.681740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29750 13:57:50.712987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29751 13:57:50.713382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29753 13:57:50.744444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29754 13:57:50.744892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29756 13:57:50.776085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29758 13:57:50.776693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29759 13:57:50.836894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29760 13:57:50.837346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29762 13:57:50.869073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29763 13:57:50.869514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29765 13:57:50.901052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29766 13:57:50.901520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29768 13:57:50.933708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29769 13:57:50.934178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29771 13:57:50.966035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29772 13:57:50.966501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29774 13:57:50.997724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29775 13:57:50.998193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29777 13:57:51.029884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29779 13:57:51.030336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29780 13:57:51.062902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29782 13:57:51.063374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29783 13:57:51.095693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29785 13:57:51.096165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29786 13:57:51.129383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29787 13:57:51.129817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29789 13:57:51.161230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29790 13:57:51.161704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29792 13:57:51.192922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29794 13:57:51.193518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29795 13:57:51.224896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29797 13:57:51.225447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29798 13:57:51.256123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29800 13:57:51.256669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29801 13:57:51.288698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29803 13:57:51.289280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29804 13:57:51.320483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29805 13:57:51.320896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29807 13:57:51.352483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29808 13:57:51.352919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29810 13:57:51.385310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29811 13:57:51.385768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29813 13:57:51.416624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29815 13:57:51.417181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29816 13:57:51.448130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29818 13:57:51.448680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29819 13:57:51.479970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29821 13:57:51.480534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29822 13:57:51.511785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29824 13:57:51.512353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29825 13:57:51.543132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29826 13:57:51.543596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29828 13:57:51.575544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29830 13:57:51.576210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29831 13:57:51.607548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29833 13:57:51.608191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29834 13:57:51.638907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29835 13:57:51.639355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29837 13:57:51.671314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29838 13:57:51.671747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29840 13:57:51.704440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29841 13:57:51.704874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29843 13:57:51.736365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29845 13:57:51.736778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29846 13:57:51.768659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29848 13:57:51.769069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29849 13:57:51.800651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29851 13:57:51.801069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29852 13:57:51.832871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29853 13:57:51.833255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29855 13:57:51.865072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29856 13:57:51.865509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29858 13:57:51.897382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29860 13:57:51.897830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29861 13:57:51.929853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29862 13:57:51.930275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29864 13:57:51.963944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29866 13:57:51.964387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29867 13:57:51.995786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29868 13:57:51.996200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29870 13:57:52.028483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29872 13:57:52.029132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29873 13:57:52.060753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29874 13:57:52.061252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29876 13:57:52.093378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29877 13:57:52.093800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29879 13:57:52.126095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29881 13:57:52.126519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29882 13:57:52.159542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29883 13:57:52.160012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29885 13:57:52.192140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29886 13:57:52.192556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29888 13:57:52.225010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29889 13:57:52.225419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29891 13:57:52.257767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29892 13:57:52.258187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29894 13:57:52.290845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29895 13:57:52.291254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29897 13:57:52.324009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29899 13:57:52.324472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29900 13:57:52.357024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29902 13:57:52.357453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29903 13:57:52.389952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29904 13:57:52.390380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29906 13:57:52.422579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29908 13:57:52.423137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29909 13:57:52.455142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29910 13:57:52.455577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29912 13:57:52.487581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29913 13:57:52.487997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29915 13:57:52.520428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29917 13:57:52.521073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29918 13:57:52.553529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29920 13:57:52.554186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29921 13:57:52.586341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29923 13:57:52.586874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29924 13:57:52.619180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29926 13:57:52.619804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29927 13:57:52.651552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29929 13:57:52.651978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29930 13:57:52.683339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29931 13:57:52.683760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29933 13:57:52.715954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29934 13:57:52.716381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29936 13:57:52.749664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29937 13:57:52.750159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
29939 13:57:52.781994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
29941 13:57:52.782469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
29942 13:57:52.813986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
29943 13:57:52.814407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
29945 13:57:52.845896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
29946 13:57:52.846362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
29948 13:57:52.878592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
29950 13:57:52.879149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
29951 13:57:52.911473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
29953 13:57:52.912051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
29954 13:57:52.944293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
29955 13:57:52.944777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
29957 13:57:52.976575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
29958 13:57:52.977024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
29960 13:57:53.009052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
29961 13:57:53.009513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
29963 13:57:53.043597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
29965 13:57:53.044159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
29966 13:57:53.078040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
29968 13:57:53.078644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
29969 13:57:53.114504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
29971 13:57:53.114964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
29972 13:57:53.152398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
29974 13:57:53.152786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
29975 13:57:53.187778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
29977 13:57:53.188195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
29978 13:57:53.222740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
29979 13:57:53.223128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
29981 13:57:53.255056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
29982 13:57:53.255527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
29984 13:57:53.287473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
29985 13:57:53.287946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
29987 13:57:53.320346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
29988 13:57:53.320778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
29990 13:57:53.352716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
29992 13:57:53.353336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
29993 13:57:53.387060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
29994 13:57:53.387515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
29996 13:57:53.419820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
29997 13:57:53.420255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
29999 13:57:53.452573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
30000 13:57:53.453001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
30002 13:57:53.486107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
30003 13:57:53.486546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
30005 13:57:53.518986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
30006 13:57:53.519420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
30008 13:57:53.551626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
30009 13:57:53.552069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
30011 13:57:53.584133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
30013 13:57:53.584672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
30014 13:57:53.616833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
30016 13:57:53.617371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
30017 13:57:53.649954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
30018 13:57:53.650378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
30020 13:57:53.683531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
30022 13:57:53.683981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
30023 13:57:53.717309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
30024 13:57:53.717734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
30026 13:57:53.749991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
30028 13:57:53.750439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
30029 13:57:53.783302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
30031 13:57:53.783765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
30032 13:57:53.816103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
30033 13:57:53.816597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
30035 13:57:53.849362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
30037 13:57:53.850005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
30038 13:57:53.882839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
30040 13:57:53.883476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
30041 13:57:53.915112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
30042 13:57:53.915598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
30044 13:57:53.947506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
30045 13:57:53.947992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
30047 13:57:53.980417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
30048 13:57:53.980843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
30050 13:57:54.012705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
30052 13:57:54.013400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
30053 13:57:54.044837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
30054 13:57:54.045248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
30056 13:57:54.077599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
30057 13:57:54.078015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
30059 13:57:54.109600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
30060 13:57:54.109992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
30062 13:57:54.141955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
30064 13:57:54.142404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
30065 13:57:54.174905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
30067 13:57:54.175322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
30068 13:57:54.207570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
30069 13:57:54.208027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
30071 13:57:54.239944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
30072 13:57:54.240341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
30074 13:57:54.274380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
30076 13:57:54.274990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
30077 13:57:54.309541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30078 13:57:54.310006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30080 13:57:54.343291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30081 13:57:54.343772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30083 13:57:54.377084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30084 13:57:54.377557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30086 13:57:54.412785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30087 13:57:54.413170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30089 13:57:54.448101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30090 13:57:54.448479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30092 13:57:54.487881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30093 13:57:54.488257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30095 13:57:54.523854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30096 13:57:54.524233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30098 13:57:54.559668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30099 13:57:54.560048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30101 13:57:54.598073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30102 13:57:54.598501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30104 13:57:54.634100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30105 13:57:54.634571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30107 13:57:54.669692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30108 13:57:54.670288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30110 13:57:54.706976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30111 13:57:54.707505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30113 13:57:54.742240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30115 13:57:54.743005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30116 13:57:54.779194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30117 13:57:54.779622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30119 13:57:54.815122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30120 13:57:54.815535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30122 13:57:54.851098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30123 13:57:54.851512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30125 13:57:54.887237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30127 13:57:54.887690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30128 13:57:54.924136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30129 13:57:54.924549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30131 13:57:54.962241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30133 13:57:54.962904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30134 13:57:54.998090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30135 13:57:54.998570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30137 13:57:55.033844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30138 13:57:55.034329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30140 13:57:55.069049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30142 13:57:55.069704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30143 13:57:55.104695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30144 13:57:55.105173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30146 13:57:55.140591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30147 13:57:55.141070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30149 13:57:55.175884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30151 13:57:55.176525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30152 13:57:55.212665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30154 13:57:55.213067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30155 13:57:55.248361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30156 13:57:55.248718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30158 13:57:55.283761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30160 13:57:55.284199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30161 13:57:55.319457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30162 13:57:55.319810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30164 13:57:55.355383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30166 13:57:55.356023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30167 13:57:55.390762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30168 13:57:55.391244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30170 13:57:55.428711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30171 13:57:55.429151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30173 13:57:55.464506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30174 13:57:55.464925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30176 13:57:55.499898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30177 13:57:55.500315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30179 13:57:55.535932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30180 13:57:55.536368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30182 13:57:55.572070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30183 13:57:55.572506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30185 13:57:55.608575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30187 13:57:55.609027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30188 13:57:55.645566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30190 13:57:55.646026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30191 13:57:55.682297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30193 13:57:55.682842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30194 13:57:55.718010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30195 13:57:55.718494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30197 13:57:55.754458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30199 13:57:55.754926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30200 13:57:55.790458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30202 13:57:55.790921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30203 13:57:55.827390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30204 13:57:55.827869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30206 13:57:55.863524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30207 13:57:55.863925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30209 13:57:55.906087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30210 13:57:55.906448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30212 13:57:55.969839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30214 13:57:55.970417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30215 13:57:56.006816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30216 13:57:56.007302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30218 13:57:56.042832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30219 13:57:56.043289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30221 13:57:56.078132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30222 13:57:56.078609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30224 13:57:56.114505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30226 13:57:56.115075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30227 13:57:56.150132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30229 13:57:56.150729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30230 13:57:56.186378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30232 13:57:56.186824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30233 13:57:56.222755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30234 13:57:56.223163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30236 13:57:56.257873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30237 13:57:56.258254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30239 13:57:56.293661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30240 13:57:56.294107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30242 13:57:56.329333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30243 13:57:56.330166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30245 13:57:56.367322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30246 13:57:56.367780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30248 13:57:56.403860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30250 13:57:56.404379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30251 13:57:56.439863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30252 13:57:56.440280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30254 13:57:56.475856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30255 13:57:56.476283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30257 13:57:56.513560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30258 13:57:56.514076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30260 13:57:56.549977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30261 13:57:56.550405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30263 13:57:56.586368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30265 13:57:56.586827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30266 13:57:56.623712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30267 13:57:56.624200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30269 13:57:56.660067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30271 13:57:56.660538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30272 13:57:56.696058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30273 13:57:56.696528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30275 13:57:56.731748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30276 13:57:56.732222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30278 13:57:56.768144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30280 13:57:56.768722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30281 13:57:56.805444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30283 13:57:56.805914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30284 13:57:56.843517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30286 13:57:56.843990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30287 13:57:56.892276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30289 13:57:56.892673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30290 13:57:56.931883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30291 13:57:56.932287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30293 13:57:56.968014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30294 13:57:56.968429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30296 13:57:57.004651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30298 13:57:57.005114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30299 13:57:57.044234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30300 13:57:57.044656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30302 13:57:57.080158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30304 13:57:57.080585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30305 13:57:57.117267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30306 13:57:57.117673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30308 13:57:57.152923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30309 13:57:57.153323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30311 13:57:57.187918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30312 13:57:57.188263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30314 13:57:57.224140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30315 13:57:57.224599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30317 13:57:57.260344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30318 13:57:57.260809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30320 13:57:57.296471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30322 13:57:57.297033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30323 13:57:57.332143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30324 13:57:57.332569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30326 13:57:57.368071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30328 13:57:57.368545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30329 13:57:57.403492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30330 13:57:57.403932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30332 13:57:57.439694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30334 13:57:57.440156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30335 13:57:57.475874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30336 13:57:57.476313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30338 13:57:57.512702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30339 13:57:57.513216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30341 13:57:57.548385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30343 13:57:57.549049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30344 13:57:57.585397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30345 13:57:57.585887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30347 13:57:57.620691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30348 13:57:57.621152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30350 13:57:57.656447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30351 13:57:57.656902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30353 13:57:57.692206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30354 13:57:57.692634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30356 13:57:57.728955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30358 13:57:57.729483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30359 13:57:57.764407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30361 13:57:57.764961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30362 13:57:57.800564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30364 13:57:57.801116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30365 13:57:57.836262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30367 13:57:57.836859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30368 13:57:57.871214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30369 13:57:57.871645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30371 13:57:57.907767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30373 13:57:57.908452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30374 13:57:57.943439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30375 13:57:57.943960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30377 13:57:57.980729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30379 13:57:57.981350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30380 13:57:58.017505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30381 13:57:58.017989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30383 13:57:58.055136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30384 13:57:58.055597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30386 13:57:58.095577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30388 13:57:58.096033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30389 13:57:58.135598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30390 13:57:58.136040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30392 13:57:58.172827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30394 13:57:58.173201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30395 13:57:58.208573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30396 13:57:58.208964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30398 13:57:58.245934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30399 13:57:58.246437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30401 13:57:58.281115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30402 13:57:58.281609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30404 13:57:58.316670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30406 13:57:58.317381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30407 13:57:58.352245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30409 13:57:58.352885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30410 13:57:58.387502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30412 13:57:58.387966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30413 13:57:58.423300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30415 13:57:58.423764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30416 13:57:58.459478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30418 13:57:58.460109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30419 13:57:58.495009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30421 13:57:58.495565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30422 13:57:58.529726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30423 13:57:58.530219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30425 13:57:58.565307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30427 13:57:58.565749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30428 13:57:58.600453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30430 13:57:58.600895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30431 13:57:58.635993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30432 13:57:58.636412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30434 13:57:58.671878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30435 13:57:58.672384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30437 13:57:58.707380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30439 13:57:58.707946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30440 13:57:58.743976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30441 13:57:58.744443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30443 13:57:58.779902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30444 13:57:58.780344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30446 13:57:58.815181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30447 13:57:58.815616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30449 13:57:58.850498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30451 13:57:58.851088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30452 13:57:58.885717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30453 13:57:58.886177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30455 13:57:58.920907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30457 13:57:58.921293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30458 13:57:58.957017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30459 13:57:58.957496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30461 13:57:58.992585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30463 13:57:58.993155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30464 13:57:59.027653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30466 13:57:59.028115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30467 13:57:59.063556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30469 13:57:59.064200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30470 13:57:59.099211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30471 13:57:59.099621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30473 13:57:59.136585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30474 13:57:59.137051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30476 13:57:59.172139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30477 13:57:59.172523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30479 13:57:59.207609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30480 13:57:59.207965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30482 13:57:59.243269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30484 13:57:59.243972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30485 13:57:59.279352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30487 13:57:59.279910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30488 13:57:59.315092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30490 13:57:59.315666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30491 13:57:59.351513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30492 13:57:59.351994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30494 13:57:59.387875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30495 13:57:59.388355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30497 13:57:59.423877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30499 13:57:59.424455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30500 13:57:59.460763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30501 13:57:59.461175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30503 13:57:59.496877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30504 13:57:59.497348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30506 13:57:59.533803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30508 13:57:59.534357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30509 13:57:59.569629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30510 13:57:59.570076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30512 13:57:59.607155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30513 13:57:59.607614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30515 13:57:59.643813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30516 13:57:59.644234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30518 13:57:59.679427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30519 13:57:59.679844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30521 13:57:59.715511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30522 13:57:59.715960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30524 13:57:59.751432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30526 13:57:59.751989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30527 13:57:59.784430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30528 13:57:59.784981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30530 13:57:59.816855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30532 13:57:59.817294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30533 13:57:59.848474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30535 13:57:59.849039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30536 13:57:59.880343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30538 13:57:59.880895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30539 13:57:59.911878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30541 13:57:59.912437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30542 13:57:59.943836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30543 13:57:59.944257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30545 13:57:59.975917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30546 13:57:59.976346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30548 13:58:00.007536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30549 13:58:00.007973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30551 13:58:00.039365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30552 13:58:00.039783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30554 13:58:00.071349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30556 13:58:00.071822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30557 13:58:00.102902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30558 13:58:00.103324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30560 13:58:00.134821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30561 13:58:00.135237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30563 13:58:00.167044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30564 13:58:00.167455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30566 13:58:00.199183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30567 13:58:00.199595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30569 13:58:00.231327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30570 13:58:00.231749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30572 13:58:00.262983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30573 13:58:00.263448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30575 13:58:00.294461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30577 13:58:00.295030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30578 13:58:00.325919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30579 13:58:00.326387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30581 13:58:00.357905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30582 13:58:00.358482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30584 13:58:00.399395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30585 13:58:00.399901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30587 13:58:00.442827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30588 13:58:00.443232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30590 13:58:00.478034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30591 13:58:00.478426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30593 13:58:00.513294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30594 13:58:00.513834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30596 13:58:00.548622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30598 13:58:00.549170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30599 13:58:00.583228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30600 13:58:00.583663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30602 13:58:00.615221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30604 13:58:00.615858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30605 13:58:00.647462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30606 13:58:00.647964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30608 13:58:00.680248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30609 13:58:00.680741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30611 13:58:00.715772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30612 13:58:00.716282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30614 13:58:00.748676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30615 13:58:00.749142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30617 13:58:00.783258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30618 13:58:00.783754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30620 13:58:00.819383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30621 13:58:00.819923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30623 13:58:00.855365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30624 13:58:00.855810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30626 13:58:00.888259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30628 13:58:00.888899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30629 13:58:00.920579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30630 13:58:00.921081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30632 13:58:00.958058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30634 13:58:00.958826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30635 13:58:00.993840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30637 13:58:00.994416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30638 13:58:01.027806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30640 13:58:01.028405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30641 13:58:01.086480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30643 13:58:01.086939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30644 13:58:01.119419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30645 13:58:01.119929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30647 13:58:01.153052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30649 13:58:01.153644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30650 13:58:01.187838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30652 13:58:01.188467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30653 13:58:01.222975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30655 13:58:01.223614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30656 13:58:01.255721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30658 13:58:01.256167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30659 13:58:01.288139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30660 13:58:01.288619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30662 13:58:01.320622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30663 13:58:01.321071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30665 13:58:01.353801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30666 13:58:01.354277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30668 13:58:01.387662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30669 13:58:01.388106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30671 13:58:01.420631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30672 13:58:01.421039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30674 13:58:01.453414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30676 13:58:01.454101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30677 13:58:01.485627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30679 13:58:01.486223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30680 13:58:01.519549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30682 13:58:01.520155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30683 13:58:01.551837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30685 13:58:01.552426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30686 13:58:01.585188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30687 13:58:01.585676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30689 13:58:01.618077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30691 13:58:01.618706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30692 13:58:01.651008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30694 13:58:01.651570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30695 13:58:01.683517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30697 13:58:01.684143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30698 13:58:01.716420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30699 13:58:01.716866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30701 13:58:01.749715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30703 13:58:01.750257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30704 13:58:01.782807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30705 13:58:01.783259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30707 13:58:01.814960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30709 13:58:01.815608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30710 13:58:01.847316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30711 13:58:01.847739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30713 13:58:01.879283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30714 13:58:01.879709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30716 13:58:01.912061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30717 13:58:01.912487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30719 13:58:01.943923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30720 13:58:01.944374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30722 13:58:01.976248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30723 13:58:01.976689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30725 13:58:02.008414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30727 13:58:02.008889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30728 13:58:02.040650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30729 13:58:02.041088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30731 13:58:02.073777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30733 13:58:02.074245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30734 13:58:02.105789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30736 13:58:02.106268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30737 13:58:02.137993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30738 13:58:02.138422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30740 13:58:02.170574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30742 13:58:02.171049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30743 13:58:02.203447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30744 13:58:02.203884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30746 13:58:02.237239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30748 13:58:02.237719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30749 13:58:02.269554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30750 13:58:02.269990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30752 13:58:02.302509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30754 13:58:02.302967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30755 13:58:02.334798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30757 13:58:02.335279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30758 13:58:02.367794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30759 13:58:02.368281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30761 13:58:02.402215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30763 13:58:02.402879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30764 13:58:02.434429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30766 13:58:02.435108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30767 13:58:02.467497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30768 13:58:02.468046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30770 13:58:02.501692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30772 13:58:02.502172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30773 13:58:02.535440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30775 13:58:02.535911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30776 13:58:02.569460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30777 13:58:02.569926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30779 13:58:02.602786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30780 13:58:02.603225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30782 13:58:02.634817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30783 13:58:02.635327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30785 13:58:02.670509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30787 13:58:02.670960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30788 13:58:02.703667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30790 13:58:02.704091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30791 13:58:02.735999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30792 13:58:02.736479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30794 13:58:02.767921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30796 13:58:02.768673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30797 13:58:02.800703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30799 13:58:02.801301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30800 13:58:02.834995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30801 13:58:02.835483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30803 13:58:02.868486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30804 13:58:02.868960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30806 13:58:02.901639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30808 13:58:02.902216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30809 13:58:02.933985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30811 13:58:02.934541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30812 13:58:02.967627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30813 13:58:02.968030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30815 13:58:03.000145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30817 13:58:03.000796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30818 13:58:03.031999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30820 13:58:03.032486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30821 13:58:03.081737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30822 13:58:03.085724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30824 13:58:03.130912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30825 13:58:03.131366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30827 13:58:03.170841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30828 13:58:03.171249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30830 13:58:03.211054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30831 13:58:03.211500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30833 13:58:03.249611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30835 13:58:03.250083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30836 13:58:03.282410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30838 13:58:03.282880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30839 13:58:03.316099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30840 13:58:03.316541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30842 13:58:03.350440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30844 13:58:03.350916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30845 13:58:03.383673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30847 13:58:03.384119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30848 13:58:03.420123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30850 13:58:03.420600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30851 13:58:03.460077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30852 13:58:03.460512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30854 13:58:03.500082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30855 13:58:03.500521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30857 13:58:03.540700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30858 13:58:03.541105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30860 13:58:03.576322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30861 13:58:03.576738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30863 13:58:03.612968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30865 13:58:03.613391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30866 13:58:03.648492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30867 13:58:03.648915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30869 13:58:03.683891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30871 13:58:03.684507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30872 13:58:03.720440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30873 13:58:03.720830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30875 13:58:03.756845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30876 13:58:03.757329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30878 13:58:03.793384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30880 13:58:03.793846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30881 13:58:03.829579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30882 13:58:03.829923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30884 13:58:03.865670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30885 13:58:03.866094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30887 13:58:03.900595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30888 13:58:03.901004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30890 13:58:03.936746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30891 13:58:03.937230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30893 13:58:03.972688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30895 13:58:03.973262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30896 13:58:04.009068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30897 13:58:04.009548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30899 13:58:04.046959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30901 13:58:04.047521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30902 13:58:04.085739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30903 13:58:04.086261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30905 13:58:04.122703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30906 13:58:04.123177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30908 13:58:04.161915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30909 13:58:04.162406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30911 13:58:04.199398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30913 13:58:04.199765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30914 13:58:04.235529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30916 13:58:04.235969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30917 13:58:04.271867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30919 13:58:04.272318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30920 13:58:04.308281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30922 13:58:04.308792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30923 13:58:04.343525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30925 13:58:04.344032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30926 13:58:04.379713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30927 13:58:04.380191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30929 13:58:04.415888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30931 13:58:04.416361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30932 13:58:04.452097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30933 13:58:04.452604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30935 13:58:04.488698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30936 13:58:04.489093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30938 13:58:04.525006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
30939 13:58:04.525425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
30941 13:58:04.560997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
30943 13:58:04.561449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
30944 13:58:04.596530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
30946 13:58:04.596966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
30947 13:58:04.631877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
30948 13:58:04.632225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
30950 13:58:04.667590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
30951 13:58:04.668037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
30953 13:58:04.705168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
30954 13:58:04.705661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
30956 13:58:04.740719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
30957 13:58:04.741125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
30959 13:58:04.776890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
30960 13:58:04.777307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
30962 13:58:04.812944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
30964 13:58:04.813424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
30965 13:58:04.848462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
30966 13:58:04.848877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
30968 13:58:04.884724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
30969 13:58:04.885214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
30971 13:58:04.922003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
30972 13:58:04.922382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
30974 13:58:04.958007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
30976 13:58:04.958556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
30977 13:58:04.992000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
30978 13:58:04.992489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
30980 13:58:05.027401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
30981 13:58:05.027889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
30983 13:58:05.061995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
30985 13:58:05.062497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
30986 13:58:05.095509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
30988 13:58:05.095952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
30989 13:58:05.127830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
30990 13:58:05.128246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
30992 13:58:05.160675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
30993 13:58:05.161095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
30995 13:58:05.193396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
30997 13:58:05.193878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
30998 13:58:05.225588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
31000 13:58:05.226058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
31001 13:58:05.257864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
31002 13:58:05.258352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
31004 13:58:05.290212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
31006 13:58:05.290646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
31007 13:58:05.323422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
31009 13:58:05.323870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
31010 13:58:05.355748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
31012 13:58:05.356190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
31013 13:58:05.388399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
31014 13:58:05.388820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
31016 13:58:05.425140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
31017 13:58:05.425563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
31019 13:58:05.460436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
31020 13:58:05.460851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
31022 13:58:05.492716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
31023 13:58:05.493152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
31025 13:58:05.525717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
31026 13:58:05.526133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
31028 13:58:05.558460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
31030 13:58:05.559036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
31031 13:58:05.595311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
31032 13:58:05.595932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
31034 13:58:05.635812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
31035 13:58:05.636231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
31037 13:58:05.669439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
31038 13:58:05.669843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
31040 13:58:05.703449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
31041 13:58:05.703864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
31043 13:58:05.735844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
31044 13:58:05.736254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
31046 13:58:05.768356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
31047 13:58:05.768834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
31049 13:58:05.802535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
31050 13:58:05.803044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
31052 13:58:05.835250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
31054 13:58:05.835696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
31055 13:58:05.867320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
31056 13:58:05.867738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
31058 13:58:05.899344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
31060 13:58:05.899760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
31061 13:58:05.931649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
31063 13:58:05.932076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
31064 13:58:05.963312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
31066 13:58:05.963747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
31067 13:58:05.997204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
31069 13:58:05.997615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
31070 13:58:06.031598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
31071 13:58:06.032014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
31073 13:58:06.065957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
31074 13:58:06.066389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
31076 13:58:06.103747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31078 13:58:06.104192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31079 13:58:06.139264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31080 13:58:06.139672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31082 13:58:06.211368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31083 13:58:06.211884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31085 13:58:06.261299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31086 13:58:06.261750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31088 13:58:06.295902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31090 13:58:06.296268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31091 13:58:06.339965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31093 13:58:06.340554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31094 13:58:06.384491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31095 13:58:06.384973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31097 13:58:06.428769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31099 13:58:06.429510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31100 13:58:06.469581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31101 13:58:06.470000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31103 13:58:06.505465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31104 13:58:06.505940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31106 13:58:06.550068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31107 13:58:06.550520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31109 13:58:06.583497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31110 13:58:06.583953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31112 13:58:06.616788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31113 13:58:06.617256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31115 13:58:06.649588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31116 13:58:06.650064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31118 13:58:06.682860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31119 13:58:06.683347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31121 13:58:06.716311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31122 13:58:06.716785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31124 13:58:06.749267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31125 13:58:06.749696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31127 13:58:06.781526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31129 13:58:06.782003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31130 13:58:06.813484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31131 13:58:06.813922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31133 13:58:06.845964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31134 13:58:06.846421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31136 13:58:06.879540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31137 13:58:06.879992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31139 13:58:06.914962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31140 13:58:06.915307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31142 13:58:06.947550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31143 13:58:06.947908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31145 13:58:06.980280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31146 13:58:06.980727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31148 13:58:07.012335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31150 13:58:07.012897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31151 13:58:07.043863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31152 13:58:07.044293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31154 13:58:07.076073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31156 13:58:07.076656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31157 13:58:07.107950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31158 13:58:07.108411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31160 13:58:07.140000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31161 13:58:07.140550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31163 13:58:07.171641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31165 13:58:07.172213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31166 13:58:07.204628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31167 13:58:07.205095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31169 13:58:07.236221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31170 13:58:07.236630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31172 13:58:07.268482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31174 13:58:07.268932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31175 13:58:07.301139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31176 13:58:07.301629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31178 13:58:07.333539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31180 13:58:07.334103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31181 13:58:07.365801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31182 13:58:07.366277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31184 13:58:07.398927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31185 13:58:07.399411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31187 13:58:07.431392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31188 13:58:07.431875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31190 13:58:07.465870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31191 13:58:07.466347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31193 13:58:07.496795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31194 13:58:07.497214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31196 13:58:07.529954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31198 13:58:07.530558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31199 13:58:07.562793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31200 13:58:07.563236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31202 13:58:07.595456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31203 13:58:07.595831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31205 13:58:07.628054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31206 13:58:07.628504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31208 13:58:07.661365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31209 13:58:07.661803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31211 13:58:07.693685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31213 13:58:07.694216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31214 13:58:07.725572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31216 13:58:07.726148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31217 13:58:07.757031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31219 13:58:07.757743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31220 13:58:07.788730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31221 13:58:07.789188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31223 13:58:07.821319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31224 13:58:07.821724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31226 13:58:07.854440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31228 13:58:07.854860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31229 13:58:07.886040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31230 13:58:07.886529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31232 13:58:07.917270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31233 13:58:07.917700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31235 13:58:07.949124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31237 13:58:07.949698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31238 13:58:07.980894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31240 13:58:07.981480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31241 13:58:08.013004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31243 13:58:08.013662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31244 13:58:08.045065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31246 13:58:08.045527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31247 13:58:08.077968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31248 13:58:08.078404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31250 13:58:08.111912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31251 13:58:08.112341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31253 13:58:08.145242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31254 13:58:08.145698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31256 13:58:08.177115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31257 13:58:08.177577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31259 13:58:08.210553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31261 13:58:08.211139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31262 13:58:08.243505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31264 13:58:08.243953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31265 13:58:08.275898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31266 13:58:08.276318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31268 13:58:08.308227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31269 13:58:08.308649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31271 13:58:08.343478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31272 13:58:08.343905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31274 13:58:08.376440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31275 13:58:08.376914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31277 13:58:08.409037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31278 13:58:08.409444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31280 13:58:08.442415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31282 13:58:08.442872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31283 13:58:08.477270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31285 13:58:08.477741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31286 13:58:08.510121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31288 13:58:08.510768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31289 13:58:08.542968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31291 13:58:08.543532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31292 13:58:08.575502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31294 13:58:08.576057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31295 13:58:08.607746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31296 13:58:08.608221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31298 13:58:08.639946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31299 13:58:08.640457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31301 13:58:08.672393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31303 13:58:08.672966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31304 13:58:08.705185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31305 13:58:08.705664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31307 13:58:08.737481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31309 13:58:08.738053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31310 13:58:08.769422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31311 13:58:08.769924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31313 13:58:08.803975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31314 13:58:08.804473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31316 13:58:08.837614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31317 13:58:08.838021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31319 13:58:08.870484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31321 13:58:08.870913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31322 13:58:08.903797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31323 13:58:08.904284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31325 13:58:08.937843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31326 13:58:08.938241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31328 13:58:08.970344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31330 13:58:08.970932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31331 13:58:09.004048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31332 13:58:09.004459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31334 13:58:09.036528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31335 13:58:09.036984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31337 13:58:09.069342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31339 13:58:09.069887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31340 13:58:09.101832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31341 13:58:09.102268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31343 13:58:09.134081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31344 13:58:09.134473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31346 13:58:09.167004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31347 13:58:09.167456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31349 13:58:09.198217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31351 13:58:09.198839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31352 13:58:09.231813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31354 13:58:09.232360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31355 13:58:09.263444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31357 13:58:09.264014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31358 13:58:09.296335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31360 13:58:09.296907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31361 13:58:09.328887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31362 13:58:09.329403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31364 13:58:09.361485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31366 13:58:09.362186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31367 13:58:09.394010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31368 13:58:09.394399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31370 13:58:09.426421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31372 13:58:09.427056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31373 13:58:09.459705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31375 13:58:09.460476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31376 13:58:09.494465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31378 13:58:09.495011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31379 13:58:09.526695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31380 13:58:09.527139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31382 13:58:09.558185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31384 13:58:09.558759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31385 13:58:09.591217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31387 13:58:09.591750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31388 13:58:09.622791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31389 13:58:09.623174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31391 13:58:09.655476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31392 13:58:09.655893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31394 13:58:09.688053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31395 13:58:09.688464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31397 13:58:09.720875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31398 13:58:09.721293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31400 13:58:09.753806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31401 13:58:09.754210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31403 13:58:09.786846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31405 13:58:09.787425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31406 13:58:09.819388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31408 13:58:09.819950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31409 13:58:09.851704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31410 13:58:09.852155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31412 13:58:09.883806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31414 13:58:09.884428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31415 13:58:09.915929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31417 13:58:09.916543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31418 13:58:09.948291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31419 13:58:09.948729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31421 13:58:09.980827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31422 13:58:09.981230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31424 13:58:10.015258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31426 13:58:10.015693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31427 13:58:10.047878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31428 13:58:10.048295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31430 13:58:10.080893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31431 13:58:10.081321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31433 13:58:10.114531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31434 13:58:10.114924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31436 13:58:10.147373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31438 13:58:10.147947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31439 13:58:10.179226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31440 13:58:10.179698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31442 13:58:10.211229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31443 13:58:10.211693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31445 13:58:10.242953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31446 13:58:10.243416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31448 13:58:10.275356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31449 13:58:10.275924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31451 13:58:10.307893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31452 13:58:10.308385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31454 13:58:10.340224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31455 13:58:10.340689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31457 13:58:10.372507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31458 13:58:10.372972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31460 13:58:10.404466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31461 13:58:10.404923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31463 13:58:10.436451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31464 13:58:10.436918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31466 13:58:10.468684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31468 13:58:10.469305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31469 13:58:10.501276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31470 13:58:10.501727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31472 13:58:10.534907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31474 13:58:10.535463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31475 13:58:10.569718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31477 13:58:10.570274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31478 13:58:10.601923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31480 13:58:10.602481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31481 13:58:10.633780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31482 13:58:10.634264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31484 13:58:10.666918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31486 13:58:10.667274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31487 13:58:10.699262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31489 13:58:10.699737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31490 13:58:10.731099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31492 13:58:10.731732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31493 13:58:10.763346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31495 13:58:10.763787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31496 13:58:10.795816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31498 13:58:10.796381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31499 13:58:10.827432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31500 13:58:10.827896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31502 13:58:10.859038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31503 13:58:10.859497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31505 13:58:10.891474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31506 13:58:10.891931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31508 13:58:10.923100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31509 13:58:10.923585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31511 13:58:10.957335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31512 13:58:10.957840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31514 13:58:10.990165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31516 13:58:10.990826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31517 13:58:11.024809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31518 13:58:11.025311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31520 13:58:11.057335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31521 13:58:11.057814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31523 13:58:11.089627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31524 13:58:11.090075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31526 13:58:11.123658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31528 13:58:11.124134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31529 13:58:11.159313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31531 13:58:11.159796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31532 13:58:11.192166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31533 13:58:11.192626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31535 13:58:11.224930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31537 13:58:11.225359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31538 13:58:11.257437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31539 13:58:11.257845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31541 13:58:11.311462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31543 13:58:11.311911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31544 13:58:11.344725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31545 13:58:11.345147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31547 13:58:11.379645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31549 13:58:11.380129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31550 13:58:11.412931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31551 13:58:11.413369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31553 13:58:11.445859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31554 13:58:11.446347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31556 13:58:11.479578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31557 13:58:11.479968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31559 13:58:11.513950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31561 13:58:11.514369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31562 13:58:11.549087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31564 13:58:11.549911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31565 13:58:11.583892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31566 13:58:11.584274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31568 13:58:11.620878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31570 13:58:11.621450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31571 13:58:11.654466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31573 13:58:11.655066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31574 13:58:11.689252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31576 13:58:11.690120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31577 13:58:11.724318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31579 13:58:11.724778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31580 13:58:11.757408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31582 13:58:11.757979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31583 13:58:11.791218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31584 13:58:11.791661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31586 13:58:11.825573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31587 13:58:11.825979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31589 13:58:11.859410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31590 13:58:11.859897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31592 13:58:11.895752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31593 13:58:11.896219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31595 13:58:11.928775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31596 13:58:11.929203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31598 13:58:11.962666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31599 13:58:11.963079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31601 13:58:11.997669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31602 13:58:11.998111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31604 13:58:12.029761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31606 13:58:12.030217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31607 13:58:12.062687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31608 13:58:12.063076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31610 13:58:12.097404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31612 13:58:12.097860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31613 13:58:12.130372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31615 13:58:12.130819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31616 13:58:12.170671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31617 13:58:12.171149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31619 13:58:12.203822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31621 13:58:12.204428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31622 13:58:12.237240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31623 13:58:12.237667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31625 13:58:12.270337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31627 13:58:12.270796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31628 13:58:12.304121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31630 13:58:12.304569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31631 13:58:12.336948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31632 13:58:12.337346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31634 13:58:12.369621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31635 13:58:12.370050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31637 13:58:12.401885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31638 13:58:12.402333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31640 13:58:12.434167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31642 13:58:12.434638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31643 13:58:12.475839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31644 13:58:12.476236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31646 13:58:12.507642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31647 13:58:12.508040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31649 13:58:12.539494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31651 13:58:12.539965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31652 13:58:12.570973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31653 13:58:12.571415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31655 13:58:12.603187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31656 13:58:12.603612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31658 13:58:12.635421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31659 13:58:12.635846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31661 13:58:12.667325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31662 13:58:12.667773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31664 13:58:12.700438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31666 13:58:12.700917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31667 13:58:12.732806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31669 13:58:12.733267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31670 13:58:12.764588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31671 13:58:12.765084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31673 13:58:12.797217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31674 13:58:12.797710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31676 13:58:12.829778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31678 13:58:12.830362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31679 13:58:12.862300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31681 13:58:12.862753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31682 13:58:12.896326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31683 13:58:12.896810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31685 13:58:12.929526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31686 13:58:12.929952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31688 13:58:12.962580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31690 13:58:12.963222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31691 13:58:12.995484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31693 13:58:12.996135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31694 13:58:13.029589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31695 13:58:13.030101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31697 13:58:13.063673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31698 13:58:13.064119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31700 13:58:13.099358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31701 13:58:13.099811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31703 13:58:13.132692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31704 13:58:13.133087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31706 13:58:13.165112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31708 13:58:13.165588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31709 13:58:13.204755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31711 13:58:13.205220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31712 13:58:13.238960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31713 13:58:13.239372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31715 13:58:13.272929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31716 13:58:13.273334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31718 13:58:13.307556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31719 13:58:13.307955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31721 13:58:13.340930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31723 13:58:13.341585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31724 13:58:13.372332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31725 13:58:13.372815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31727 13:58:13.404029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31728 13:58:13.404524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31730 13:58:13.435378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31731 13:58:13.435826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31733 13:58:13.467826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31734 13:58:13.468266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31736 13:58:13.500002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31737 13:58:13.500446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31739 13:58:13.532746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31740 13:58:13.533172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31742 13:58:13.565528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31743 13:58:13.565953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31745 13:58:13.597977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31746 13:58:13.598384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31748 13:58:13.630929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31750 13:58:13.631389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31751 13:58:13.663090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31752 13:58:13.663498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31754 13:58:13.695226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31755 13:58:13.695691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31757 13:58:13.727394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31758 13:58:13.727818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31760 13:58:13.759836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31761 13:58:13.760275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31763 13:58:13.791756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31764 13:58:13.792185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31766 13:58:13.823402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31767 13:58:13.823800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31769 13:58:13.855192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31771 13:58:13.855634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31772 13:58:13.886348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31774 13:58:13.886779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31775 13:58:13.917708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31776 13:58:13.918092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31778 13:58:13.949328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31779 13:58:13.949714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31781 13:58:13.980725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31782 13:58:13.981142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31784 13:58:14.013679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31785 13:58:14.014149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31787 13:58:14.044993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31788 13:58:14.045478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31790 13:58:14.077354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31791 13:58:14.077839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31793 13:58:14.110267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31795 13:58:14.110896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31796 13:58:14.144175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31797 13:58:14.144727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31799 13:58:14.177364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31800 13:58:14.177774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31802 13:58:14.213030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31804 13:58:14.213831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31805 13:58:14.257477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31807 13:58:14.258052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31808 13:58:14.320419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31810 13:58:14.320932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31811 13:58:14.367595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31812 13:58:14.368023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31814 13:58:14.418063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31816 13:58:14.418449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31817 13:58:14.455931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31818 13:58:14.456318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31820 13:58:14.492939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31821 13:58:14.493351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31823 13:58:14.527591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31824 13:58:14.527975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31826 13:58:14.565423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31827 13:58:14.565885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31829 13:58:14.613091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31830 13:58:14.613498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31832 13:58:14.649690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31834 13:58:14.650162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31835 13:58:14.686387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31837 13:58:14.686857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31838 13:58:14.723851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31839 13:58:14.724291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31841 13:58:14.762863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31842 13:58:14.763242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31844 13:58:14.801676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31846 13:58:14.802104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31847 13:58:14.836428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31848 13:58:14.836806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31850 13:58:14.871871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31852 13:58:14.872383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31853 13:58:14.905556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31854 13:58:14.905918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31856 13:58:14.939263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31857 13:58:14.939647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31859 13:58:14.972535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31860 13:58:14.972980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31862 13:58:15.005372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31863 13:58:15.005854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31865 13:58:15.039362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31866 13:58:15.039882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31868 13:58:15.075642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31869 13:58:15.076029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31871 13:58:15.111785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31873 13:58:15.112258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31874 13:58:15.145477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31876 13:58:15.145927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31877 13:58:15.177689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31878 13:58:15.178085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31880 13:58:15.211105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31882 13:58:15.211538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31883 13:58:15.243500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31884 13:58:15.243956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31886 13:58:15.275315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31887 13:58:15.275700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31889 13:58:15.307111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31890 13:58:15.307510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31892 13:58:15.339152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31893 13:58:15.339616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31895 13:58:15.370902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31897 13:58:15.371542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31898 13:58:15.404268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31899 13:58:15.404746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31901 13:58:15.437042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31903 13:58:15.437684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31904 13:58:15.468762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31906 13:58:15.469334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31907 13:58:15.500461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31909 13:58:15.501028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31910 13:58:15.533404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31911 13:58:15.533889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31913 13:58:15.566405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31915 13:58:15.567004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31916 13:58:15.599150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31917 13:58:15.599570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31919 13:58:15.632317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31921 13:58:15.632790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31922 13:58:15.665184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31923 13:58:15.665600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31925 13:58:15.699568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31926 13:58:15.700058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31928 13:58:15.732772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31929 13:58:15.733271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31931 13:58:15.765758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31933 13:58:15.766198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31934 13:58:15.797407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31935 13:58:15.797844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31937 13:58:15.830916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31938 13:58:15.831326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
31940 13:58:15.863182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
31942 13:58:15.863754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
31943 13:58:15.895369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
31944 13:58:15.895808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
31946 13:58:15.928113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
31948 13:58:15.928709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
31949 13:58:15.959915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
31951 13:58:15.960368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
31952 13:58:15.993052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
31954 13:58:15.993642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
31955 13:58:16.025430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
31956 13:58:16.025849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
31958 13:58:16.059034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
31960 13:58:16.059490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
31961 13:58:16.091859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
31962 13:58:16.092280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
31964 13:58:16.124620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
31966 13:58:16.125088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
31967 13:58:16.157710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
31968 13:58:16.158139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
31970 13:58:16.191687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
31972 13:58:16.192183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
31973 13:58:16.224780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
31974 13:58:16.225189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
31976 13:58:16.258291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
31978 13:58:16.258771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
31979 13:58:16.291005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
31980 13:58:16.291448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
31982 13:58:16.323679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
31984 13:58:16.324157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
31985 13:58:16.355540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
31986 13:58:16.355987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
31988 13:58:16.389466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
31990 13:58:16.389945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
31991 13:58:16.455575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
31993 13:58:16.456047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
31994 13:58:16.492682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
31996 13:58:16.493298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
31997 13:58:16.525761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
31999 13:58:16.526244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
32000 13:58:16.559589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
32002 13:58:16.560030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
32003 13:58:16.592696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
32005 13:58:16.593132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
32006 13:58:16.626791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
32008 13:58:16.627392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
32009 13:58:16.660854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
32011 13:58:16.661323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
32012 13:58:16.694063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
32014 13:58:16.694543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
32015 13:58:16.730092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
32016 13:58:16.730526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
32018 13:58:16.771239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
32019 13:58:16.771688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
32021 13:58:16.808670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
32023 13:58:16.809178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
32024 13:58:16.859565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
32026 13:58:16.860041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
32027 13:58:16.914374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
32029 13:58:16.914862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
32030 13:58:16.968002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
32031 13:58:16.968413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
32033 13:58:17.000680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
32034 13:58:17.001059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
32036 13:58:17.034743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
32037 13:58:17.035174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
32039 13:58:17.067836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
32040 13:58:17.068249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
32042 13:58:17.101043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
32043 13:58:17.101445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
32045 13:58:17.133617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
32046 13:58:17.134018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
32048 13:58:17.166966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
32050 13:58:17.167407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
32051 13:58:17.199098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
32052 13:58:17.199550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
32054 13:58:17.231570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
32055 13:58:17.232010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
32057 13:58:17.265062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
32058 13:58:17.265545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
32060 13:58:17.298705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
32062 13:58:17.299176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
32063 13:58:17.331648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
32064 13:58:17.332101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
32066 13:58:17.364880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
32067 13:58:17.365377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
32069 13:58:17.398046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
32071 13:58:17.398508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
32072 13:58:17.431662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
32074 13:58:17.432143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
32075 13:58:17.464051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32077 13:58:17.464530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32078 13:58:17.498028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32079 13:58:17.498485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32081 13:58:17.536478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32082 13:58:17.536911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32084 13:58:17.571496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32086 13:58:17.571959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32087 13:58:17.606693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32088 13:58:17.607131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32090 13:58:17.641484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32092 13:58:17.641983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32093 13:58:17.677338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32094 13:58:17.677790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32096 13:58:17.712954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32097 13:58:17.713399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32099 13:58:17.747202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32100 13:58:17.747674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32102 13:58:17.781262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32104 13:58:17.781749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32105 13:58:17.815943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32107 13:58:17.816549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32108 13:58:17.851195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32110 13:58:17.851766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32111 13:58:17.886956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32112 13:58:17.887396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32114 13:58:17.923351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32116 13:58:17.923801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32117 13:58:17.959361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32119 13:58:17.959820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32120 13:58:17.993655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32122 13:58:17.994119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32123 13:58:18.027359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32124 13:58:18.027809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32126 13:58:18.060836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32127 13:58:18.061246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32129 13:58:18.093920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32131 13:58:18.094390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32132 13:58:18.127644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32134 13:58:18.128108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32135 13:58:18.160200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32136 13:58:18.160609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32138 13:58:18.193020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32139 13:58:18.193435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32141 13:58:18.227752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32143 13:58:18.228219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32144 13:58:18.264703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32146 13:58:18.265170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32147 13:58:18.299730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32148 13:58:18.300230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32150 13:58:18.334939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32151 13:58:18.335438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32153 13:58:18.369688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32155 13:58:18.370330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32156 13:58:18.404576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32158 13:58:18.405226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32159 13:58:18.438827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32161 13:58:18.439386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32162 13:58:18.471997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32163 13:58:18.472403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32165 13:58:18.505057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32166 13:58:18.505511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32168 13:58:18.539618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32169 13:58:18.540088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32171 13:58:18.572666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32172 13:58:18.573137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32174 13:58:18.606777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32175 13:58:18.607191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32177 13:58:18.641236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32178 13:58:18.641680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32180 13:58:18.675928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32182 13:58:18.676392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32183 13:58:18.710570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32184 13:58:18.711013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32186 13:58:18.744831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32187 13:58:18.745268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32189 13:58:18.777484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32190 13:58:18.777972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32192 13:58:18.810549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32193 13:58:18.810990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32195 13:58:18.843722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32197 13:58:18.844191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32198 13:58:18.876512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32199 13:58:18.876935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32201 13:58:18.911784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32203 13:58:18.912396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32204 13:58:18.944585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32205 13:58:18.944985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32207 13:58:18.977422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32209 13:58:18.978011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32210 13:58:19.011245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32212 13:58:19.011817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32213 13:58:19.043854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32214 13:58:19.044319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32216 13:58:19.078304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32218 13:58:19.078976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32219 13:58:19.113401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32220 13:58:19.113902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32222 13:58:19.147131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32224 13:58:19.147601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32225 13:58:19.181136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32227 13:58:19.181718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32228 13:58:19.213260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32230 13:58:19.213759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32231 13:58:19.245135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32232 13:58:19.245571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32234 13:58:19.277089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32235 13:58:19.277508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32237 13:58:19.313423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32239 13:58:19.313890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32240 13:58:19.348598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32242 13:58:19.348969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32243 13:58:19.383420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32244 13:58:19.383777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32246 13:58:19.422661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32247 13:58:19.423487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32249 13:58:19.464505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32250 13:58:19.465006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32252 13:58:19.496959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32254 13:58:19.497545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32255 13:58:19.530580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32257 13:58:19.531136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32258 13:58:19.563148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32259 13:58:19.563620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32261 13:58:19.596314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32262 13:58:19.596767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32264 13:58:19.628376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32265 13:58:19.628841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32267 13:58:19.660866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32268 13:58:19.661321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32270 13:58:19.693333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32271 13:58:19.693817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32273 13:58:19.726908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32275 13:58:19.727483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32276 13:58:19.759331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32278 13:58:19.759932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32279 13:58:19.791765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32281 13:58:19.792346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32282 13:58:19.824558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32283 13:58:19.825027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32285 13:58:19.858962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32287 13:58:19.859531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32288 13:58:19.895060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32289 13:58:19.895545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32291 13:58:19.931635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32292 13:58:19.932116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32294 13:58:19.968539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32295 13:58:19.968996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32297 13:58:20.007271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32299 13:58:20.007848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32300 13:58:20.043931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32302 13:58:20.044399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32303 13:58:20.080778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32305 13:58:20.081257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32306 13:58:20.117293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32307 13:58:20.117782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32309 13:58:20.157541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32310 13:58:20.158017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32312 13:58:20.195617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32313 13:58:20.196016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32315 13:58:20.232321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32316 13:58:20.232696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32318 13:58:20.268755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32320 13:58:20.269137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32321 13:58:20.304127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32323 13:58:20.304500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32324 13:58:20.342401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32326 13:58:20.342793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32327 13:58:20.378950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32329 13:58:20.379421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32330 13:58:20.415805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32332 13:58:20.416298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32333 13:58:20.450943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32334 13:58:20.451404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32336 13:58:20.485321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32337 13:58:20.485792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32339 13:58:20.520143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32341 13:58:20.520718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32342 13:58:20.555072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32344 13:58:20.555688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32345 13:58:20.591386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32347 13:58:20.591884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32348 13:58:20.628048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32350 13:58:20.628529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32351 13:58:20.664771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32352 13:58:20.665246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32354 13:58:20.701634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32356 13:58:20.702243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32357 13:58:20.739428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32359 13:58:20.739911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32360 13:58:20.775275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32361 13:58:20.775695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32363 13:58:20.811308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32365 13:58:20.811870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32366 13:58:20.848461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32368 13:58:20.849103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32369 13:58:20.884190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32371 13:58:20.884660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32372 13:58:20.920244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32374 13:58:20.920726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32375 13:58:20.956501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32376 13:58:20.956927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32378 13:58:20.993335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32380 13:58:20.993832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32381 13:58:21.030803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32382 13:58:21.031246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32384 13:58:21.067985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32385 13:58:21.068416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32387 13:58:21.105823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32389 13:58:21.107442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32390 13:58:21.144762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32391 13:58:21.145274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32393 13:58:21.183222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32394 13:58:21.183657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32396 13:58:21.219747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32397 13:58:21.220182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32399 13:58:21.256660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32401 13:58:21.257152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32402 13:58:21.294423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32404 13:58:21.295137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32405 13:58:21.330961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32406 13:58:21.331392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32408 13:58:21.366441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32410 13:58:21.366928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32411 13:58:21.404121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32412 13:58:21.404549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32414 13:58:21.440810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32415 13:58:21.441233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32417 13:58:21.475328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32419 13:58:21.476111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32420 13:58:21.510636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32422 13:58:21.518461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32423 13:58:21.569991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32424 13:58:21.570470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32426 13:58:21.604455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32427 13:58:21.604926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32429 13:58:21.639526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32430 13:58:21.639993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32432 13:58:21.674375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32434 13:58:21.674968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32435 13:58:21.709490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32436 13:58:21.709965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32438 13:58:21.743331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32439 13:58:21.743745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32441 13:58:21.777077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32442 13:58:21.777565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32444 13:58:21.809681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32445 13:58:21.810147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32447 13:58:21.843148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32448 13:58:21.843708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32450 13:58:21.877078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32451 13:58:21.877517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32453 13:58:21.909915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32454 13:58:21.910397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32456 13:58:21.943664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32458 13:58:21.944233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32459 13:58:21.977211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32460 13:58:21.977678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32462 13:58:22.011438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32463 13:58:22.011903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32465 13:58:22.044668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32466 13:58:22.045140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32468 13:58:22.077588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32469 13:58:22.078021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32471 13:58:22.111228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32472 13:58:22.111641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32474 13:58:22.144223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32476 13:58:22.144800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32477 13:58:22.177739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32478 13:58:22.178184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32480 13:58:22.214157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32481 13:58:22.214581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32483 13:58:22.249381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32484 13:58:22.249831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32486 13:58:22.285451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32487 13:58:22.285905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32489 13:58:22.321629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32490 13:58:22.322084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32492 13:58:22.359649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32493 13:58:22.360086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32495 13:58:22.397841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32496 13:58:22.398242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32498 13:58:22.433063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32499 13:58:22.433487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32501 13:58:22.471536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32502 13:58:22.471969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32504 13:58:22.507531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32505 13:58:22.507980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32507 13:58:22.546563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32509 13:58:22.547145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32510 13:58:22.583051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32511 13:58:22.583518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32513 13:58:22.621033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32514 13:58:22.621497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32516 13:58:22.659778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32517 13:58:22.660211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32519 13:58:22.697209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32520 13:58:22.697641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32522 13:58:22.736134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32523 13:58:22.736566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32525 13:58:22.775340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32526 13:58:22.775843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32528 13:58:22.811788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32529 13:58:22.812256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32531 13:58:22.848792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32532 13:58:22.849261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32534 13:58:22.887156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32535 13:58:22.887577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32537 13:58:22.923909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32538 13:58:22.924330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32540 13:58:22.960817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32541 13:58:22.961291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32543 13:58:22.998076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32545 13:58:22.998644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32546 13:58:23.035244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32547 13:58:23.035665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32549 13:58:23.072482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32551 13:58:23.073091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32552 13:58:23.109453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32553 13:58:23.109889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32555 13:58:23.148172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32556 13:58:23.148604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32558 13:58:23.186073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32559 13:58:23.186527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32561 13:58:23.223395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32562 13:58:23.223835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32564 13:58:23.257684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32565 13:58:23.258093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32567 13:58:23.291922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32568 13:58:23.292310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32570 13:58:23.325334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32571 13:58:23.325802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32573 13:58:23.358228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32575 13:58:23.358723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32576 13:58:23.389522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32577 13:58:23.389986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32579 13:58:23.423333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32580 13:58:23.423759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32582 13:58:23.455967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32583 13:58:23.456389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32585 13:58:23.488406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32586 13:58:23.488829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32588 13:58:23.520814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32589 13:58:23.521235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32591 13:58:23.552437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32592 13:58:23.552882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32594 13:58:23.585359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32595 13:58:23.585780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32597 13:58:23.617810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32598 13:58:23.618224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32600 13:58:23.651184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32601 13:58:23.651593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32603 13:58:23.683839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32604 13:58:23.684210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32606 13:58:23.716926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32607 13:58:23.717302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32609 13:58:23.750373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32611 13:58:23.750861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32612 13:58:23.786274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32614 13:58:23.786754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32615 13:58:23.819886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32616 13:58:23.820300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32618 13:58:23.853923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32619 13:58:23.854382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32621 13:58:23.887603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32622 13:58:23.888057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32624 13:58:23.922488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32626 13:58:23.923067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32627 13:58:23.957513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32628 13:58:23.957998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32630 13:58:23.991411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32631 13:58:23.991819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32633 13:58:24.025900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32635 13:58:24.026368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32636 13:58:24.060406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32637 13:58:24.060815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32639 13:58:24.095776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32640 13:58:24.096219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32642 13:58:24.130189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32643 13:58:24.130658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32645 13:58:24.164669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32646 13:58:24.165143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32648 13:58:24.198433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32650 13:58:24.198918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32651 13:58:24.234082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32652 13:58:24.234502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32654 13:58:24.269020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32655 13:58:24.269399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32657 13:58:24.301807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32658 13:58:24.302210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32660 13:58:24.335142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32661 13:58:24.335603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32663 13:58:24.369252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32664 13:58:24.369684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32666 13:58:24.404440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32668 13:58:24.404921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32669 13:58:24.439670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32670 13:58:24.440129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32672 13:58:24.476889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32674 13:58:24.477362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32675 13:58:24.512610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32676 13:58:24.513100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32678 13:58:24.547931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32679 13:58:24.548400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32681 13:58:24.583207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32682 13:58:24.583683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32684 13:58:24.618131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32685 13:58:24.618590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32687 13:58:24.653504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32688 13:58:24.654001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32690 13:58:24.689169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32691 13:58:24.689633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32693 13:58:24.724508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32694 13:58:24.724919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32696 13:58:24.760346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32697 13:58:24.760786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32699 13:58:24.795306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32700 13:58:24.795700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32702 13:58:24.831566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32704 13:58:24.832044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32705 13:58:24.866914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32706 13:58:24.867348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32708 13:58:24.901536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32709 13:58:24.902002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32711 13:58:24.936651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32712 13:58:24.937140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32714 13:58:24.979654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32716 13:58:24.980333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32717 13:58:25.014946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32718 13:58:25.015374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32720 13:58:25.049705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32722 13:58:25.050181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32723 13:58:25.085119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32724 13:58:25.085586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32726 13:58:25.120073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32728 13:58:25.120735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32729 13:58:25.155121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32730 13:58:25.155543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32732 13:58:25.190998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32733 13:58:25.191439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32735 13:58:25.226168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32736 13:58:25.226642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32738 13:58:25.261948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32739 13:58:25.262368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32741 13:58:25.297350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32742 13:58:25.297777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32744 13:58:25.332687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32745 13:58:25.333176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32747 13:58:25.368831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32749 13:58:25.369323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32750 13:58:25.407790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32751 13:58:25.408244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32753 13:58:25.446150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32754 13:58:25.446642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32756 13:58:25.497999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32757 13:58:25.498390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32759 13:58:25.557676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32760 13:58:25.558163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32762 13:58:25.615981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32763 13:58:25.616451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32765 13:58:25.653367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32767 13:58:25.653953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32768 13:58:25.691941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32769 13:58:25.692419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32771 13:58:25.728541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32772 13:58:25.729071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32774 13:58:25.765433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32775 13:58:25.765874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32777 13:58:25.801920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32778 13:58:25.802402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32780 13:58:25.837293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32781 13:58:25.837763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32783 13:58:25.872791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32784 13:58:25.873273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32786 13:58:25.908147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32787 13:58:25.908643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32789 13:58:25.943570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32790 13:58:25.944080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32792 13:58:25.979738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32794 13:58:25.980358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32795 13:58:26.017839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32797 13:58:26.018330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32798 13:58:26.057703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32799 13:58:26.058235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32801 13:58:26.116077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32803 13:58:26.116713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32804 13:58:26.160593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32805 13:58:26.161125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32807 13:58:26.197442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32809 13:58:26.197838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32810 13:58:26.231628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32812 13:58:26.232266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32813 13:58:26.267268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32815 13:58:26.267924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32816 13:58:26.302137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32818 13:58:26.302512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32819 13:58:26.337571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32820 13:58:26.338056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32822 13:58:26.372518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32824 13:58:26.373108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32825 13:58:26.409316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32827 13:58:26.409813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32828 13:58:26.447893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32829 13:58:26.448320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32831 13:58:26.485150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32832 13:58:26.485600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32834 13:58:26.525098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32836 13:58:26.525729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32837 13:58:26.563403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32838 13:58:26.563873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32840 13:58:26.601518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32841 13:58:26.601963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32843 13:58:26.659937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32844 13:58:26.660384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32846 13:58:26.701545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32847 13:58:26.701994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32849 13:58:26.739982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32851 13:58:26.740476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32852 13:58:26.778465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32854 13:58:26.779051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32855 13:58:26.816056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32856 13:58:26.816504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32858 13:58:26.856558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32859 13:58:26.856976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32861 13:58:26.895473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32862 13:58:26.895937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32864 13:58:26.933753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32866 13:58:26.934227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32867 13:58:26.972974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32868 13:58:26.973510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32870 13:58:27.021230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32871 13:58:27.021709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32873 13:58:27.075716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32874 13:58:27.076209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32876 13:58:27.117229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32877 13:58:27.117696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32879 13:58:27.154879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32881 13:58:27.155333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32882 13:58:27.192417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32884 13:58:27.192977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32885 13:58:27.231156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32886 13:58:27.231595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32888 13:58:27.267574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32889 13:58:27.268001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32891 13:58:27.304156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32893 13:58:27.304639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32894 13:58:27.340473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32896 13:58:27.341203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32897 13:58:27.380073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32898 13:58:27.380532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32900 13:58:27.419562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32901 13:58:27.420059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32903 13:58:27.457012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32905 13:58:27.457480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32906 13:58:27.493583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32907 13:58:27.494039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32909 13:58:27.531742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32910 13:58:27.532168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32912 13:58:27.568749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32913 13:58:27.569184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32915 13:58:27.607405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32916 13:58:27.607931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32918 13:58:27.644832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32920 13:58:27.645453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32921 13:58:27.680991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32922 13:58:27.681522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32924 13:58:27.720581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32925 13:58:27.721041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32927 13:58:27.757424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32928 13:58:27.757889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32930 13:58:27.796755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32931 13:58:27.797203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32933 13:58:27.832872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32934 13:58:27.833320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32936 13:58:27.868524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32937 13:58:27.868966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
32939 13:58:27.905427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
32941 13:58:27.905891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
32942 13:58:27.943295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
32944 13:58:27.943760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
32945 13:58:27.980126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
32946 13:58:27.980567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
32948 13:58:28.015723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
32950 13:58:28.016183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
32951 13:58:28.052244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
32952 13:58:28.052684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
32954 13:58:28.090056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
32955 13:58:28.090507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
32957 13:58:28.131486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
32958 13:58:28.131941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
32960 13:58:28.170830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
32961 13:58:28.171325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
32963 13:58:28.210342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
32965 13:58:28.210954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
32966 13:58:28.252355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
32968 13:58:28.253002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
32969 13:58:28.292598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
32970 13:58:28.293008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
32972 13:58:28.329147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
32974 13:58:28.329615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
32975 13:58:28.367165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
32976 13:58:28.367639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
32978 13:58:28.404829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
32979 13:58:28.405267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
32981 13:58:28.441124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
32982 13:58:28.441637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
32984 13:58:28.476939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
32985 13:58:28.477396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
32987 13:58:28.512245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
32988 13:58:28.512695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
32990 13:58:28.548175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
32991 13:58:28.548653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
32993 13:58:28.585056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
32994 13:58:28.585554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
32996 13:58:28.622678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
32997 13:58:28.623128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
32999 13:58:28.660035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
33001 13:58:28.660499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
33002 13:58:28.696268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
33003 13:58:28.696708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
33005 13:58:28.731840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
33006 13:58:28.732286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
33008 13:58:28.768661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
33010 13:58:28.769227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
33011 13:58:28.804667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
33012 13:58:28.805231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
33014 13:58:28.840679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
33015 13:58:28.841154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
33017 13:58:28.877629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
33019 13:58:28.878106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
33020 13:58:28.915172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33021 13:58:28.915666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33023 13:58:28.951157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33024 13:58:28.951602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
33026 13:58:28.988462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33028 13:58:28.988924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33029 13:58:29.025142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33030 13:58:29.025660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33032 13:58:29.064392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33033 13:58:29.064861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
33035 13:58:29.100087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33037 13:58:29.100662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33038 13:58:29.136211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33039 13:58:29.136629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33041 13:58:29.172905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
33043 13:58:29.173533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33044 13:58:29.208606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33045 13:58:29.209034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33047 13:58:29.244570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33049 13:58:29.245043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33050 13:58:29.280917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
33052 13:58:29.281385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33053 13:58:29.316203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33055 13:58:29.316772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33056 13:58:29.351091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33057 13:58:29.351577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33059 13:58:29.387716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33060 13:58:29.388124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
33062 13:58:29.423793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33064 13:58:29.424253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33065 13:58:29.459151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
33066 13:58:29.459626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
33068 13:58:29.495186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33069 13:58:29.495632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33071 13:58:29.531254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33072 13:58:29.531708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
33074 13:58:29.567485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33075 13:58:29.567962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33077 13:58:29.603043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33079 13:58:29.603676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33080 13:58:29.637944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33081 13:58:29.638425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33083 13:58:29.673986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33085 13:58:29.674460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33086 13:58:29.711212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33087 13:58:29.711687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33089 13:58:29.747479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33091 13:58:29.747946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33092 13:58:29.784208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33094 13:58:29.784820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33095 13:58:29.820733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33096 13:58:29.821211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33098 13:58:29.856761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33100 13:58:29.857390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33101 13:58:29.892521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33103 13:58:29.893154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33104 13:58:29.929066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33106 13:58:29.929712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33107 13:58:29.965914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33108 13:58:29.966387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33110 13:58:30.002526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33112 13:58:30.002995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33113 13:58:30.039496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33115 13:58:30.040124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33116 13:58:30.075895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33118 13:58:30.076522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33119 13:58:30.111536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33120 13:58:30.111953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33122 13:58:30.147550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33124 13:58:30.148142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33125 13:58:30.183070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33127 13:58:30.183537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33128 13:58:30.219010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33129 13:58:30.219470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33131 13:58:30.255039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33132 13:58:30.255521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33134 13:58:30.291916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33136 13:58:30.292614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33137 13:58:30.327901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33138 13:58:30.328367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33140 13:58:30.364753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33141 13:58:30.365227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33143 13:58:30.400437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33145 13:58:30.400989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33146 13:58:30.436389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33147 13:58:30.436846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33149 13:58:30.472303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33150 13:58:30.472733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33152 13:58:30.509019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33154 13:58:30.509498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33155 13:58:30.545297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33156 13:58:30.545682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33158 13:58:30.581186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33160 13:58:30.581672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33161 13:58:30.617188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33162 13:58:30.617624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33164 13:58:30.653329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33165 13:58:30.653754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33167 13:58:30.688732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33169 13:58:30.689200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33170 13:58:30.725212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33172 13:58:30.725689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33173 13:58:30.761098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33174 13:58:30.761530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33176 13:58:30.797175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33177 13:58:30.797673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33179 13:58:30.833193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33180 13:58:30.833681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33182 13:58:30.868969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33183 13:58:30.869392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33185 13:58:30.904952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33187 13:58:30.905405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33188 13:58:30.942453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33190 13:58:30.943047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33191 13:58:30.980799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33192 13:58:30.981247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33194 13:58:31.016965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33196 13:58:31.017534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33197 13:58:31.053547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33198 13:58:31.054079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33200 13:58:31.090126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33201 13:58:31.090617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33203 13:58:31.128438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33205 13:58:31.129053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33206 13:58:31.164207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33208 13:58:31.164812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33209 13:58:31.199766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33210 13:58:31.200152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33212 13:58:31.235419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33213 13:58:31.235798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33215 13:58:31.272499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33216 13:58:31.272859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33218 13:58:31.313623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33220 13:58:31.314025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33221 13:58:31.349376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33223 13:58:31.349856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33224 13:58:31.384817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33225 13:58:31.385207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33227 13:58:31.420484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33228 13:58:31.420833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33230 13:58:31.462105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33231 13:58:31.462482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33233 13:58:31.498485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33235 13:58:31.498938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33236 13:58:31.535160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33238 13:58:31.535736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33239 13:58:31.572245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33240 13:58:31.572700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33242 13:58:31.608161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33243 13:58:31.608649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33245 13:58:31.644937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33246 13:58:31.645393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33248 13:58:31.681319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33250 13:58:31.681784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33251 13:58:31.718772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33252 13:58:31.719210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33254 13:58:31.766544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33256 13:58:31.770965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33257 13:58:31.820324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33258 13:58:31.820784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33260 13:58:31.856984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33261 13:58:31.857467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33263 13:58:31.893463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33264 13:58:31.893942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33266 13:58:31.931015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33267 13:58:31.931511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33269 13:58:31.968213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33271 13:58:31.969018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33272 13:58:32.005631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33273 13:58:32.006107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33275 13:58:32.041890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33276 13:58:32.042396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33278 13:58:32.078249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33280 13:58:32.078858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33281 13:58:32.113661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33282 13:58:32.114137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33284 13:58:32.149620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33285 13:58:32.150131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33287 13:58:32.186014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33289 13:58:32.186608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33290 13:58:32.222320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33292 13:58:32.222956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33293 13:58:32.259285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33294 13:58:32.259722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33296 13:58:32.295652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33297 13:58:32.296086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33299 13:58:32.333417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33300 13:58:32.333883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33302 13:58:32.369668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33303 13:58:32.370147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33305 13:58:32.405934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33306 13:58:32.406401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33308 13:58:32.444963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33309 13:58:32.445421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33311 13:58:32.480291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33313 13:58:32.480841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33314 13:58:32.515761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33315 13:58:32.516234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33317 13:58:32.551491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33318 13:58:32.551953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33320 13:58:32.587269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33321 13:58:32.587716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33323 13:58:32.623057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33325 13:58:32.623630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33326 13:58:32.660205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33328 13:58:32.660955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33329 13:58:32.696792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33331 13:58:32.697362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33332 13:58:32.732237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33334 13:58:32.732792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33335 13:58:32.767907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33337 13:58:32.768495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33338 13:58:32.803885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33339 13:58:32.804455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33341 13:58:32.839423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33342 13:58:32.839856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33344 13:58:32.875424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33345 13:58:32.875890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33347 13:58:32.912177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33349 13:58:32.912737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33350 13:58:32.947882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33352 13:58:32.948434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33353 13:58:32.983659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33354 13:58:32.984131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33356 13:58:33.019696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33357 13:58:33.020168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33359 13:58:33.055825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33361 13:58:33.056306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33362 13:58:33.098871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33364 13:58:33.099331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33365 13:58:33.134178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33366 13:58:33.134632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33368 13:58:33.171819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33369 13:58:33.172276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33371 13:58:33.209014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33373 13:58:33.209585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33374 13:58:33.244838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33376 13:58:33.245409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33377 13:58:33.280695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33378 13:58:33.281217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33380 13:58:33.316826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33381 13:58:33.317249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33383 13:58:33.356506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33385 13:58:33.357121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33386 13:58:33.392551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33388 13:58:33.393014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33389 13:58:33.428572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33390 13:58:33.428993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33392 13:58:33.464463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33393 13:58:33.464946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33395 13:58:33.501111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33396 13:58:33.501580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33398 13:58:33.536225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33399 13:58:33.536770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33401 13:58:33.571651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33402 13:58:33.572142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33404 13:58:33.607773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33406 13:58:33.608406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33407 13:58:33.643514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33409 13:58:33.644090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33410 13:58:33.679823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33411 13:58:33.680305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33413 13:58:33.715860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33414 13:58:33.716335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33416 13:58:33.751465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33418 13:58:33.752089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33419 13:58:33.786823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33420 13:58:33.787304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33422 13:58:33.823530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33423 13:58:33.823956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33425 13:58:33.858916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33427 13:58:33.859381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33428 13:58:33.893500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33429 13:58:33.893946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33431 13:58:33.928923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33432 13:58:33.929422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33434 13:58:33.965415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33436 13:58:33.965894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33437 13:58:34.001961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33438 13:58:34.002402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33440 13:58:34.037947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33442 13:58:34.038514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33443 13:58:34.073572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33444 13:58:34.074065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33446 13:58:34.108763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33447 13:58:34.109206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33449 13:58:34.144469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33450 13:58:34.144911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33452 13:58:34.180314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33453 13:58:34.180732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33455 13:58:34.217064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33456 13:58:34.217593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33458 13:58:34.253051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33459 13:58:34.253525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33461 13:58:34.288837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33462 13:58:34.289263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33464 13:58:34.324353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33466 13:58:34.325001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33467 13:58:34.364362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33469 13:58:34.364925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33470 13:58:34.399849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33471 13:58:34.400277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33473 13:58:34.435687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33475 13:58:34.436233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33476 13:58:34.471309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33477 13:58:34.471771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33479 13:58:34.507084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33481 13:58:34.507541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33482 13:58:34.545633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33483 13:58:34.546053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33485 13:58:34.581669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33487 13:58:34.582238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33488 13:58:34.616876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33489 13:58:34.617349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33491 13:58:34.653125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33492 13:58:34.653597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33494 13:58:34.688803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33496 13:58:34.689267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33497 13:58:34.724923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33499 13:58:34.725384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33500 13:58:34.760642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33501 13:58:34.761076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33503 13:58:34.796566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33504 13:58:34.797005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33506 13:58:34.832647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33507 13:58:34.833127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33509 13:58:34.868703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33511 13:58:34.869260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33512 13:58:34.904270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33513 13:58:34.904720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33515 13:58:34.939764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33516 13:58:34.940234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33518 13:58:34.976701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33520 13:58:34.977306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33521 13:58:35.012493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33523 13:58:35.013042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33524 13:58:35.048134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33526 13:58:35.048680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33527 13:58:35.083892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33529 13:58:35.084419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33530 13:58:35.119569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33531 13:58:35.120002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33533 13:58:35.155725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33535 13:58:35.156375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33536 13:58:35.192200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33538 13:58:35.192655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33539 13:58:35.228326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33540 13:58:35.228797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33542 13:58:35.264038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33544 13:58:35.264576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33545 13:58:35.300402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33546 13:58:35.300818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33548 13:58:35.336776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33550 13:58:35.337363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33551 13:58:35.372956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33552 13:58:35.373404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33554 13:58:35.411921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33555 13:58:35.412340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33557 13:58:35.448433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33558 13:58:35.448915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33560 13:58:35.484978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33562 13:58:35.485504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33563 13:58:35.521227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33564 13:58:35.521679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33566 13:58:35.557721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33568 13:58:35.558289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33569 13:58:35.594380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33571 13:58:35.594839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33572 13:58:35.631534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33573 13:58:35.631956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33575 13:58:35.668044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33576 13:58:35.668448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33578 13:58:35.704406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33579 13:58:35.704806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33581 13:58:35.740995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33583 13:58:35.741445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33584 13:58:35.776736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33586 13:58:35.777280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33587 13:58:35.813494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33588 13:58:35.813924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33590 13:58:35.849566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33591 13:58:35.849998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33593 13:58:35.884801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33595 13:58:35.885271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33596 13:58:35.920568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33597 13:58:35.920987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33599 13:58:35.956105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33601 13:58:35.956697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33602 13:58:35.992196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33603 13:58:35.992654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33605 13:58:36.027808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33607 13:58:36.028371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33608 13:58:36.066343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33610 13:58:36.067081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33611 13:58:36.104292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33612 13:58:36.104731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33614 13:58:36.143711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33616 13:58:36.144169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33617 13:58:36.182497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33619 13:58:36.182956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33620 13:58:36.221349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33622 13:58:36.221745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33623 13:58:36.255495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33624 13:58:36.255871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33626 13:58:36.289163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33627 13:58:36.289643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33629 13:58:36.323183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33630 13:58:36.323615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33632 13:58:36.357233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33633 13:58:36.357699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33635 13:58:36.389719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33636 13:58:36.390121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33638 13:58:36.422499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33640 13:58:36.422973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33641 13:58:36.457170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33642 13:58:36.457608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33644 13:58:36.489403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33646 13:58:36.489878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33647 13:58:36.521674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33649 13:58:36.522138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33650 13:58:36.555208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33652 13:58:36.555666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33653 13:58:36.587877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33655 13:58:36.588454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33656 13:58:36.620129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33658 13:58:36.620806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33659 13:58:36.655005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33660 13:58:36.655500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33662 13:58:36.687369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33664 13:58:36.687845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33665 13:58:36.721995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33666 13:58:36.722432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33668 13:58:36.757466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33670 13:58:36.757955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33671 13:58:36.789673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33672 13:58:36.790065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33674 13:58:36.821789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33675 13:58:36.822259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33677 13:58:36.853760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33678 13:58:36.854231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33680 13:58:36.922463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33682 13:58:36.923044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33683 13:58:36.955616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33685 13:58:36.956087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33686 13:58:36.987791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33687 13:58:36.988234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33689 13:58:37.020032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33691 13:58:37.020495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33692 13:58:37.051821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33693 13:58:37.052244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33695 13:58:37.083888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33696 13:58:37.084310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33698 13:58:37.116306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33700 13:58:37.116750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33701 13:58:37.150373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33703 13:58:37.150790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33704 13:58:37.182079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33706 13:58:37.182712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33707 13:58:37.214248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33709 13:58:37.214886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33710 13:58:37.247833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33711 13:58:37.248309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33713 13:58:37.281661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33714 13:58:37.282111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33716 13:58:37.314703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33717 13:58:37.315087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33719 13:58:37.348612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33720 13:58:37.349004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33722 13:58:37.381686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33724 13:58:37.382284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33725 13:58:37.414009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33726 13:58:37.414500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33728 13:58:37.445994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33729 13:58:37.446450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33731 13:58:37.479412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33732 13:58:37.479909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33734 13:58:37.511768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33735 13:58:37.512226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33737 13:58:37.544350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33738 13:58:37.544799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33740 13:58:37.577479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33741 13:58:37.577948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33743 13:58:37.610099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33745 13:58:37.610637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33746 13:58:37.643990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33747 13:58:37.644438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33749 13:58:37.676906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33751 13:58:37.677524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33752 13:58:37.709634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33754 13:58:37.710234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33755 13:58:37.743027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33756 13:58:37.743586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33758 13:58:37.778313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33760 13:58:37.778721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33761 13:58:37.811430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33763 13:58:37.811893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33764 13:58:37.843794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33765 13:58:37.844241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33767 13:58:37.876230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33768 13:58:37.876730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33770 13:58:37.909054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33771 13:58:37.909533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33773 13:58:37.941677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33774 13:58:37.942175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33776 13:58:37.974252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33778 13:58:37.974806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33779 13:58:38.008547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33781 13:58:38.009088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33782 13:58:38.040820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33783 13:58:38.041257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33785 13:58:38.073668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33787 13:58:38.074239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33788 13:58:38.108280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33789 13:58:38.108709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33791 13:58:38.143956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33793 13:58:38.144531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33794 13:58:38.179610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33795 13:58:38.180076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33797 13:58:38.212735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33798 13:58:38.213205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33800 13:58:38.268455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33802 13:58:38.269039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33803 13:58:38.309353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33805 13:58:38.309943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33806 13:58:38.344151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33808 13:58:38.344731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33809 13:58:38.376404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33810 13:58:38.376833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33812 13:58:38.409554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33813 13:58:38.409950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33815 13:58:38.442837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33816 13:58:38.443362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33818 13:58:38.474876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33819 13:58:38.475335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33821 13:58:38.507156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33822 13:58:38.507617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33824 13:58:38.539855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33826 13:58:38.540458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33827 13:58:38.572966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33828 13:58:38.573448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33830 13:58:38.605563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33831 13:58:38.606039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33833 13:58:38.637823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33834 13:58:38.638296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33836 13:58:38.669467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33837 13:58:38.669901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33839 13:58:38.701912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33840 13:58:38.702379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33842 13:58:38.735085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33843 13:58:38.735555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33845 13:58:38.768941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33846 13:58:38.769477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33848 13:58:38.802451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33850 13:58:38.803029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33851 13:58:38.835157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33853 13:58:38.835727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33854 13:58:38.867736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33856 13:58:38.868286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33857 13:58:38.900542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33858 13:58:38.901000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33860 13:58:38.932996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33861 13:58:38.933391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33863 13:58:38.965683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33864 13:58:38.966159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33866 13:58:38.998387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33868 13:58:38.998849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33869 13:58:39.031303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33870 13:58:39.031730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33872 13:58:39.063281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33873 13:58:39.063725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33875 13:58:39.096120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33876 13:58:39.096544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33878 13:58:39.127896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33879 13:58:39.128328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33881 13:58:39.159941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33883 13:58:39.160423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33884 13:58:39.191479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33885 13:58:39.191909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33887 13:58:39.223304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33888 13:58:39.223766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33890 13:58:39.255461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33891 13:58:39.255911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33893 13:58:39.289433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33894 13:58:39.289925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33896 13:58:39.321823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33897 13:58:39.322268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33899 13:58:39.355976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33901 13:58:39.356626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33902 13:58:39.393166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33904 13:58:39.393634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33905 13:58:39.427758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33907 13:58:39.428387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33908 13:58:39.460910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33910 13:58:39.461378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33911 13:58:39.493111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33912 13:58:39.493531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33914 13:58:39.525794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33915 13:58:39.526215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33917 13:58:39.559221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33918 13:58:39.559643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33920 13:58:39.591941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33921 13:58:39.592458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33923 13:58:39.625266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33925 13:58:39.625927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33926 13:58:39.658159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33928 13:58:39.658631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33929 13:58:39.691413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33931 13:58:39.691869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33932 13:58:39.724885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33933 13:58:39.725346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33935 13:58:39.757967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33936 13:58:39.758421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33938 13:58:39.791605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33939 13:58:39.792077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
33941 13:58:39.824916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33942 13:58:39.825370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33944 13:58:39.857334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33946 13:58:39.857824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33947 13:58:39.889601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
33949 13:58:39.890097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33950 13:58:39.921583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33951 13:58:39.922028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33953 13:58:39.953473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33954 13:58:39.953938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33956 13:58:39.985360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
33958 13:58:39.985840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33959 13:58:40.017310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33960 13:58:40.017743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33962 13:58:40.049237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33963 13:58:40.049660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33965 13:58:40.080499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33966 13:58:40.080891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
33968 13:58:40.111883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33969 13:58:40.112362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33971 13:58:40.145382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33972 13:58:40.145902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33974 13:58:40.178377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
33976 13:58:40.178877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33977 13:58:40.210886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33979 13:58:40.211340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33980 13:58:40.243204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
33982 13:58:40.243654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
33983 13:58:40.275552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33984 13:58:40.275967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33986 13:58:40.307748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
33988 13:58:40.308385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33989 13:58:40.340353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33990 13:58:40.340820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33992 13:58:40.375399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33994 13:58:40.376056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33995 13:58:40.408395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
33997 13:58:40.408868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33998 13:58:40.442340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
34000 13:58:40.442827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
34001 13:58:40.475626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
34002 13:58:40.476100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
34004 13:58:40.508747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
34005 13:58:40.509156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
34007 13:58:40.541764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
34008 13:58:40.542195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
34010 13:58:40.575213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
34011 13:58:40.575695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
34013 13:58:40.608461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
34014 13:58:40.608908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
34016 13:58:40.641583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
34017 13:58:40.642034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
34019 13:58:40.675254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
34020 13:58:40.675699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
34022 13:58:40.707978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
34023 13:58:40.708441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
34025 13:58:40.740892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
34026 13:58:40.741404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
34028 13:58:40.773724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
34030 13:58:40.774364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
34031 13:58:40.806599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
34033 13:58:40.807157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
34034 13:58:40.839885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
34035 13:58:40.840404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
34037 13:58:40.872602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
34038 13:58:40.873067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
34040 13:58:40.905221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
34041 13:58:40.905698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
34043 13:58:40.937675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
34044 13:58:40.938083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
34046 13:58:40.970023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
34048 13:58:40.970649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
34049 13:58:41.003470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
34050 13:58:41.003935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
34052 13:58:41.035772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
34053 13:58:41.036218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
34055 13:58:41.068223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
34056 13:58:41.068671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
34058 13:58:41.105588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
34060 13:58:41.106263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
34061 13:58:41.141525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
34062 13:58:41.142002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
34064 13:58:41.176709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
34065 13:58:41.177147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
34067 13:58:41.213693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
34069 13:58:41.214339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
34070 13:58:41.249566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
34071 13:58:41.249978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
34073 13:58:41.285052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
34074 13:58:41.285476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
34076 13:58:41.317559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34077 13:58:41.317986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34079 13:58:41.349564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34080 13:58:41.350000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34082 13:58:41.383233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34083 13:58:41.383666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34085 13:58:41.416307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34087 13:58:41.416767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34088 13:58:41.449174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34089 13:58:41.449598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34091 13:58:41.482372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34093 13:58:41.482984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34094 13:58:41.516869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34095 13:58:41.517299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34097 13:58:41.549226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34099 13:58:41.549707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34100 13:58:41.582529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34102 13:58:41.583131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34103 13:58:41.615517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34104 13:58:41.616002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34106 13:58:41.651237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34107 13:58:41.651708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34109 13:58:41.684071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34110 13:58:41.684478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34112 13:58:41.719980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34114 13:58:41.720571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34115 13:58:41.757548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34116 13:58:41.757931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34118 13:58:41.789835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34119 13:58:41.790223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34121 13:58:41.822033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34122 13:58:41.822453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34124 13:58:41.855476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34125 13:58:41.855948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34127 13:58:41.888275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34128 13:58:41.888752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34130 13:58:41.920781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34131 13:58:41.921262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34133 13:58:41.953279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34134 13:58:41.953832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34136 13:58:41.986517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34138 13:58:41.987006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34139 13:58:42.047534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34140 13:58:42.047907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34142 13:58:42.079974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34143 13:58:42.080430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34145 13:58:42.112655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34146 13:58:42.113101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34148 13:58:42.145439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34149 13:58:42.145887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34151 13:58:42.178016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34153 13:58:42.178468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34154 13:58:42.210867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34155 13:58:42.211226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34157 13:58:42.243542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34158 13:58:42.243947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34160 13:58:42.277361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34162 13:58:42.277827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34163 13:58:42.311418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34164 13:58:42.311820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34166 13:58:42.343728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34167 13:58:42.344191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34169 13:58:42.376253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34171 13:58:42.376815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34172 13:58:42.408179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34174 13:58:42.408765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34175 13:58:42.439992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34176 13:58:42.440460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34178 13:58:42.471963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34180 13:58:42.472331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34181 13:58:42.503626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34183 13:58:42.504080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34184 13:58:42.535570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34185 13:58:42.536037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34187 13:58:42.567235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34188 13:58:42.567691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34190 13:58:42.599419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34191 13:58:42.599874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34193 13:58:42.633914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34195 13:58:42.634378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34196 13:58:42.666544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34197 13:58:42.666961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34199 13:58:42.698865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34200 13:58:42.699275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34202 13:58:42.730082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34203 13:58:42.730494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34205 13:58:42.761879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34206 13:58:42.762306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34208 13:58:42.793465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34209 13:58:42.793889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34211 13:58:42.825569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34213 13:58:42.826038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34214 13:58:42.857430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34216 13:58:42.857900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34217 13:58:42.889615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34219 13:58:42.890082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34220 13:58:42.921942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34221 13:58:42.922348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34223 13:58:42.955216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34224 13:58:42.955681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34226 13:58:42.989987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34227 13:58:42.990354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34229 13:58:43.021775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34230 13:58:43.022119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34232 13:58:43.053210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34233 13:58:43.053589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34235 13:58:43.085059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34236 13:58:43.085402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34238 13:58:43.116845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34239 13:58:43.117196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34241 13:58:43.148478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34242 13:58:43.148819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34244 13:58:43.181471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34245 13:58:43.181879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34247 13:58:43.217855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34248 13:58:43.218193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34250 13:58:43.253276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34251 13:58:43.253688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34253 13:58:43.285157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34254 13:58:43.285599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34256 13:58:43.316363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34257 13:58:43.316716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34259 13:58:43.348450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34260 13:58:43.348793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34262 13:58:43.380031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34263 13:58:43.380308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34265 13:58:43.411172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34267 13:58:43.411611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34268 13:58:43.442007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34270 13:58:43.442568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34271 13:58:43.473459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34272 13:58:43.473925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34274 13:58:43.505558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34276 13:58:43.506235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34277 13:58:43.537280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34278 13:58:43.537691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34280 13:58:43.569269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34282 13:58:43.569860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34283 13:58:43.601962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34284 13:58:43.602421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34286 13:58:43.635085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34288 13:58:43.635610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34289 13:58:43.666370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34291 13:58:43.667075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34292 13:58:43.698860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34293 13:58:43.699306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34295 13:58:43.729546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34296 13:58:43.730058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34298 13:58:43.760945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34299 13:58:43.761320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34301 13:58:43.792293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34302 13:58:43.792661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34304 13:58:43.823669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34305 13:58:43.823943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34307 13:58:43.855217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34308 13:58:43.855599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34310 13:58:43.886087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34312 13:58:43.886499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34313 13:58:43.924186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34314 13:58:43.924557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34316 13:58:43.956198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34317 13:58:43.956540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34319 13:58:43.987733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34320 13:58:43.988078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34322 13:58:44.019933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34323 13:58:44.020274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34325 13:58:44.051419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34326 13:58:44.051792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34328 13:58:44.082723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34329 13:58:44.083065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34331 13:58:44.113849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34332 13:58:44.114198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34334 13:58:44.145363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34336 13:58:44.146029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34337 13:58:44.176573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34339 13:58:44.177158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34340 13:58:44.208325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34341 13:58:44.208808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34343 13:58:44.240566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34344 13:58:44.240953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34346 13:58:44.272872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34347 13:58:44.273286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34349 13:58:44.305896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34351 13:58:44.306370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34352 13:58:44.340177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34353 13:58:44.340611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34355 13:58:44.373499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34356 13:58:44.373927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34358 13:58:44.405631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34359 13:58:44.406050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34361 13:58:44.437787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34363 13:58:44.438262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34364 13:58:44.469371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34365 13:58:44.469791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34367 13:58:44.501714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34368 13:58:44.502135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34370 13:58:44.533886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34372 13:58:44.534351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34373 13:58:44.567626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34375 13:58:44.568094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34376 13:58:44.600332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34377 13:58:44.600795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34379 13:58:44.632828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34380 13:58:44.633242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34382 13:58:44.665577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34383 13:58:44.665983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34385 13:58:44.698282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34387 13:58:44.698769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34388 13:58:44.731996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34389 13:58:44.732378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34391 13:58:44.763985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34393 13:58:44.764374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34394 13:58:44.795243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34395 13:58:44.795553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34397 13:58:44.826623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34398 13:58:44.826972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34400 13:58:44.857977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34402 13:58:44.858406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34403 13:58:44.889445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34404 13:58:44.889792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34406 13:58:44.920915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34407 13:58:44.921262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34409 13:58:44.953013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34410 13:58:44.953361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34412 13:58:44.983922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34414 13:58:44.984330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34415 13:58:45.015574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34416 13:58:45.016034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34418 13:58:45.048038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34420 13:58:45.048585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34421 13:58:45.079478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34422 13:58:45.079910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34424 13:58:45.110832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34425 13:58:45.111307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34427 13:58:45.142458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34429 13:58:45.142959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34430 13:58:45.173890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34431 13:58:45.174232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34433 13:58:45.204921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34434 13:58:45.205324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34436 13:58:45.236900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34437 13:58:45.237319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34439 13:58:45.269470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34441 13:58:45.269932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34442 13:58:45.301235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34444 13:58:45.301815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34445 13:58:45.332903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34446 13:58:45.333308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34448 13:58:45.366930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34449 13:58:45.367402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34451 13:58:45.401384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34452 13:58:45.401845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34454 13:58:45.433282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34455 13:58:45.433768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34457 13:58:45.465719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34458 13:58:45.466185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34460 13:58:45.496893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34462 13:58:45.497442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34463 13:58:45.528202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34465 13:58:45.528644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34466 13:58:45.560725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34468 13:58:45.561286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34469 13:58:45.592205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34470 13:58:45.592664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34472 13:58:45.623939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34473 13:58:45.624308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34475 13:58:45.655494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34476 13:58:45.655905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34478 13:58:45.688307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34479 13:58:45.688716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34481 13:58:45.719927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34482 13:58:45.720334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34484 13:58:45.751469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34485 13:58:45.751933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34487 13:58:45.783342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34489 13:58:45.783891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34490 13:58:45.814937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34491 13:58:45.815388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34493 13:58:45.846719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34494 13:58:45.847112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34496 13:58:45.877941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34497 13:58:45.878293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34499 13:58:45.909505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34500 13:58:45.909863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34502 13:58:45.940324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34503 13:58:45.940666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34505 13:58:45.972026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34506 13:58:45.972369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34508 13:58:46.004429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34509 13:58:46.004773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34511 13:58:46.035855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34512 13:58:46.036199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34514 13:58:46.067983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34515 13:58:46.068331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34517 13:58:46.100036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34518 13:58:46.100381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34520 13:58:46.131458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34521 13:58:46.131882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34523 13:58:46.163267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34525 13:58:46.163821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34526 13:58:46.196202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34527 13:58:46.196676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34529 13:58:46.228123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34530 13:58:46.228592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34532 13:58:46.260251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34533 13:58:46.260662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34535 13:58:46.293844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34536 13:58:46.294235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34538 13:58:46.325321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34539 13:58:46.325610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34541 13:58:46.357458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34542 13:58:46.357853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34544 13:58:46.389534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34545 13:58:46.389809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34547 13:58:46.421227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34548 13:58:46.421695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34550 13:58:46.452599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34551 13:58:46.453057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34553 13:58:46.484894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34554 13:58:46.485274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34556 13:58:46.515792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34557 13:58:46.516282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34559 13:58:46.547034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34560 13:58:46.547508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34562 13:58:46.578024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34563 13:58:46.578500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34565 13:58:46.609233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34567 13:58:46.609706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34568 13:58:46.639729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34569 13:58:46.640208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34571 13:58:46.671178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34573 13:58:46.671795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34574 13:58:46.703469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34575 13:58:46.703966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34577 13:58:46.706128 + set +x
34578 13:58:46.706896 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 610580_1.1.3.5>
34579 13:58:46.707254 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 610580_1.1.3.5
34580 13:58:46.707400 Ending use of test pattern.
34581 13:58:46.707531 Ending test lava.1_kselftest-arm64_qemu (610580_1.1.3.5), duration 334.92
34583 13:58:46.709533 <LAVA_TEST_RUNNER EXIT>
34584 13:58:46.709996 ok: lava_test_shell seems to have completed
34585 13:58:46.795626 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34586 13:58:46.798704 end: 3.1 lava-test-shell (duration 00:05:36) [common]
34587 13:58:46.798800 end: 3 lava-test-retry (duration 00:05:36) [common]
34588 13:58:46.798887 start: 4 finalize (timeout 00:03:11) [common]
34589 13:58:46.798975 start: 4.1 power-off (timeout 00:00:30) [common]
34590 13:58:46.799056 end: 4.1 power-off (duration 00:00:00) [common]
34591 13:58:46.799135 start: 4.2 read-feedback (timeout 00:03:11) [common]
34592 13:58:46.799304 Listened to connection for namespace 'common' for up to 1s
34593 13:58:46.799575 Listened to connection for namespace 'common' for up to 1s
34594 13:58:47.801743 Finalising connection for namespace 'common'
34596 13:58:47.902688 / # poweroff
34597 13:58:47.903257 Already disconnected
34598 13:58:47.903423 poweroff
34599 13:58:48.305810 end: 4.2 read-feedback (duration 00:00:02) [common]
34600 13:58:48.306064 Already disconnected
34601 13:58:48.306223 end: 4 finalize (duration 00:00:02) [common]
34602 13:58:48.306391 Cleaning after the job
34603 13:58:48.306564 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/610580/deployimages-rl6yrif2/kernel
34604 13:58:48.313275 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/610580/deployimages-rl6yrif2/ramdisk
34605 13:58:48.329433 Stopping the qemu container lava-docker-qemu-610580-2.1.1-0anxqom3yx
34606 13:58:49.074644 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/610580
34607 13:58:49.162329 Job finished correctly