Boot log: mt8192-asurada-spherion-r0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 27
- Kernel Errors: 43
- Errors: 0
1 23:01:56.007390 lava-dispatcher, installed at version: 2023.10
2 23:01:56.007614 start: 0 validate
3 23:01:56.007749 Start time: 2023-12-01 23:01:56.007741+00:00 (UTC)
4 23:01:56.007869 Using caching service: 'http://localhost/cache/?uri=%s'
5 23:01:56.008002 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230623.0%2Farm64%2Frootfs.cpio.gz exists
6 23:01:56.288464 Using caching service: 'http://localhost/cache/?uri=%s'
7 23:01:56.288639 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.64-cip10%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 23:01:56.555435 Using caching service: 'http://localhost/cache/?uri=%s'
9 23:01:56.555718 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.64-cip10%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
10 23:02:16.051740 Using caching service: 'http://localhost/cache/?uri=%s'
11 23:02:16.052468 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.64-cip10%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 23:02:16.594657 validate duration: 20.59
14 23:02:16.595966 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 23:02:16.596504 start: 1.1 download-retry (timeout 00:10:00) [common]
16 23:02:16.597012 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 23:02:16.597651 Not decompressing ramdisk as can be used compressed.
18 23:02:16.598124 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230623.0/arm64/rootfs.cpio.gz
19 23:02:16.598485 saving as /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/ramdisk/rootfs.cpio.gz
20 23:02:16.598845 total size: 43284872 (41 MB)
21 23:02:19.933515 progress 0 % (0 MB)
22 23:02:19.979838 progress 5 % (2 MB)
23 23:02:19.996555 progress 10 % (4 MB)
24 23:02:20.008776 progress 15 % (6 MB)
25 23:02:20.020335 progress 20 % (8 MB)
26 23:02:20.031663 progress 25 % (10 MB)
27 23:02:20.043173 progress 30 % (12 MB)
28 23:02:20.054505 progress 35 % (14 MB)
29 23:02:20.065786 progress 40 % (16 MB)
30 23:02:20.077003 progress 45 % (18 MB)
31 23:02:20.088406 progress 50 % (20 MB)
32 23:02:20.099906 progress 55 % (22 MB)
33 23:02:20.111304 progress 60 % (24 MB)
34 23:02:20.122994 progress 65 % (26 MB)
35 23:02:20.134426 progress 70 % (28 MB)
36 23:02:20.145979 progress 75 % (30 MB)
37 23:02:20.157451 progress 80 % (33 MB)
38 23:02:20.168720 progress 85 % (35 MB)
39 23:02:20.179885 progress 90 % (37 MB)
40 23:02:20.190987 progress 95 % (39 MB)
41 23:02:20.201953 progress 100 % (41 MB)
42 23:02:20.202245 41 MB downloaded in 3.60 s (11.46 MB/s)
43 23:02:20.202429 end: 1.1.1 http-download (duration 00:00:04) [common]
45 23:02:20.202702 end: 1.1 download-retry (duration 00:00:04) [common]
46 23:02:20.202803 start: 1.2 download-retry (timeout 00:09:56) [common]
47 23:02:20.202903 start: 1.2.1 http-download (timeout 00:09:56) [common]
48 23:02:20.203060 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.64-cip10/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 23:02:20.203134 saving as /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/kernel/Image
50 23:02:20.203234 total size: 49172992 (46 MB)
51 23:02:20.203333 No compression specified
52 23:02:20.204908 progress 0 % (0 MB)
53 23:02:20.217955 progress 5 % (2 MB)
54 23:02:20.230984 progress 10 % (4 MB)
55 23:02:20.243955 progress 15 % (7 MB)
56 23:02:20.257188 progress 20 % (9 MB)
57 23:02:20.270217 progress 25 % (11 MB)
58 23:02:20.283038 progress 30 % (14 MB)
59 23:02:20.295895 progress 35 % (16 MB)
60 23:02:20.308910 progress 40 % (18 MB)
61 23:02:20.321965 progress 45 % (21 MB)
62 23:02:20.335066 progress 50 % (23 MB)
63 23:02:20.348159 progress 55 % (25 MB)
64 23:02:20.361082 progress 60 % (28 MB)
65 23:02:20.374072 progress 65 % (30 MB)
66 23:02:20.387186 progress 70 % (32 MB)
67 23:02:20.400042 progress 75 % (35 MB)
68 23:02:20.413165 progress 80 % (37 MB)
69 23:02:20.426390 progress 85 % (39 MB)
70 23:02:20.439389 progress 90 % (42 MB)
71 23:02:20.452619 progress 95 % (44 MB)
72 23:02:20.465701 progress 100 % (46 MB)
73 23:02:20.465984 46 MB downloaded in 0.26 s (178.48 MB/s)
74 23:02:20.466163 end: 1.2.1 http-download (duration 00:00:00) [common]
76 23:02:20.466422 end: 1.2 download-retry (duration 00:00:00) [common]
77 23:02:20.466530 start: 1.3 download-retry (timeout 00:09:56) [common]
78 23:02:20.466631 start: 1.3.1 http-download (timeout 00:09:56) [common]
79 23:02:20.466790 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.64-cip10/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
80 23:02:20.466888 saving as /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/dtb/mt8192-asurada-spherion-r0.dtb
81 23:02:20.466987 total size: 47278 (0 MB)
82 23:02:20.467087 No compression specified
83 23:02:20.468739 progress 69 % (0 MB)
84 23:02:20.469079 progress 100 % (0 MB)
85 23:02:20.469273 0 MB downloaded in 0.00 s (19.74 MB/s)
86 23:02:20.469450 end: 1.3.1 http-download (duration 00:00:00) [common]
88 23:02:20.469715 end: 1.3 download-retry (duration 00:00:00) [common]
89 23:02:20.469800 start: 1.4 download-retry (timeout 00:09:56) [common]
90 23:02:20.469885 start: 1.4.1 http-download (timeout 00:09:56) [common]
91 23:02:20.470005 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.64-cip10/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 23:02:20.470072 saving as /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/modules/modules.tar
93 23:02:20.470130 total size: 8616152 (8 MB)
94 23:02:20.470191 Using unxz to decompress xz
95 23:02:20.474403 progress 0 % (0 MB)
96 23:02:20.496194 progress 5 % (0 MB)
97 23:02:20.520575 progress 10 % (0 MB)
98 23:02:20.544724 progress 15 % (1 MB)
99 23:02:20.569814 progress 20 % (1 MB)
100 23:02:20.596005 progress 25 % (2 MB)
101 23:02:20.623936 progress 30 % (2 MB)
102 23:02:20.652766 progress 35 % (2 MB)
103 23:02:20.677969 progress 40 % (3 MB)
104 23:02:20.703045 progress 45 % (3 MB)
105 23:02:20.729017 progress 50 % (4 MB)
106 23:02:20.754050 progress 55 % (4 MB)
107 23:02:20.779777 progress 60 % (4 MB)
108 23:02:20.805996 progress 65 % (5 MB)
109 23:02:20.833722 progress 70 % (5 MB)
110 23:02:20.857755 progress 75 % (6 MB)
111 23:02:20.885379 progress 80 % (6 MB)
112 23:02:20.911862 progress 85 % (7 MB)
113 23:02:20.937553 progress 90 % (7 MB)
114 23:02:20.967834 progress 95 % (7 MB)
115 23:02:20.996498 progress 100 % (8 MB)
116 23:02:21.003031 8 MB downloaded in 0.53 s (15.42 MB/s)
117 23:02:21.003377 end: 1.4.1 http-download (duration 00:00:01) [common]
119 23:02:21.003783 end: 1.4 download-retry (duration 00:00:01) [common]
120 23:02:21.003918 start: 1.5 prepare-tftp-overlay (timeout 00:09:56) [common]
121 23:02:21.004061 start: 1.5.1 extract-nfsrootfs (timeout 00:09:56) [common]
122 23:02:21.004184 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 23:02:21.004316 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
124 23:02:21.004624 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba
125 23:02:21.004823 makedir: /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin
126 23:02:21.004983 makedir: /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/tests
127 23:02:21.005129 makedir: /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/results
128 23:02:21.005295 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-add-keys
129 23:02:21.005518 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-add-sources
130 23:02:21.005709 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-background-process-start
131 23:02:21.005899 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-background-process-stop
132 23:02:21.006087 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-common-functions
133 23:02:21.006269 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-echo-ipv4
134 23:02:21.006459 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-install-packages
135 23:02:21.006643 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-installed-packages
136 23:02:21.006825 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-os-build
137 23:02:21.007009 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-probe-channel
138 23:02:21.007198 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-probe-ip
139 23:02:21.007383 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-target-ip
140 23:02:21.007568 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-target-mac
141 23:02:21.007754 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-target-storage
142 23:02:21.007944 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-case
143 23:02:21.008128 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-event
144 23:02:21.008316 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-feedback
145 23:02:21.008501 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-raise
146 23:02:21.008689 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-reference
147 23:02:21.008874 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-runner
148 23:02:21.009061 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-set
149 23:02:21.009248 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-test-shell
150 23:02:21.009443 Updating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-install-packages (oe)
151 23:02:21.009663 Updating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/bin/lava-installed-packages (oe)
152 23:02:21.009846 Creating /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/environment
153 23:02:21.009998 LAVA metadata
154 23:02:21.010110 - LAVA_JOB_ID=12154408
155 23:02:21.010214 - LAVA_DISPATCHER_IP=192.168.201.1
156 23:02:21.010370 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
157 23:02:21.010473 skipped lava-vland-overlay
158 23:02:21.010594 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 23:02:21.010714 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
160 23:02:21.010819 skipped lava-multinode-overlay
161 23:02:21.010950 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 23:02:21.011079 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
163 23:02:21.011193 Loading test definitions
164 23:02:21.011334 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
165 23:02:21.011453 Using /lava-12154408 at stage 0
166 23:02:21.011916 uuid=12154408_1.5.2.3.1 testdef=None
167 23:02:21.012047 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 23:02:21.012177 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
169 23:02:21.012949 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 23:02:21.013291 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
172 23:02:21.014221 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 23:02:21.014577 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
175 23:02:21.015452 runner path: /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/0/tests/0_igt-kms-mediatek test_uuid 12154408_1.5.2.3.1
176 23:02:21.015673 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 23:02:21.016000 Creating lava-test-runner.conf files
179 23:02:21.016099 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12154408/lava-overlay-c6a938ba/lava-12154408/0 for stage 0
180 23:02:21.016233 - 0_igt-kms-mediatek
181 23:02:21.016384 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 23:02:21.016507 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
183 23:02:21.026072 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 23:02:21.026252 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
185 23:02:21.026393 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 23:02:21.026523 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 23:02:21.026653 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
188 23:02:22.482295 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 23:02:22.482780 start: 1.5.4 extract-modules (timeout 00:09:54) [common]
190 23:02:22.482947 extracting modules file /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12154408/extract-overlay-ramdisk-mynnto5p/ramdisk
191 23:02:22.745786 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 23:02:22.745963 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
193 23:02:22.746064 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12154408/compress-overlay-54_2c_ru/overlay-1.5.2.4.tar.gz to ramdisk
194 23:02:22.746136 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12154408/compress-overlay-54_2c_ru/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12154408/extract-overlay-ramdisk-mynnto5p/ramdisk
195 23:02:22.753578 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 23:02:22.753716 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
197 23:02:22.753840 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 23:02:22.753957 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
199 23:02:22.754102 Building ramdisk /var/lib/lava/dispatcher/tmp/12154408/extract-overlay-ramdisk-mynnto5p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12154408/extract-overlay-ramdisk-mynnto5p/ramdisk
200 23:02:23.912134 >> 369989 blocks
201 23:02:29.742052 rename /var/lib/lava/dispatcher/tmp/12154408/extract-overlay-ramdisk-mynnto5p/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/ramdisk/ramdisk.cpio.gz
202 23:02:29.742506 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 23:02:29.742634 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
204 23:02:29.742734 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
205 23:02:29.742846 Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/kernel/Image'
206 23:02:43.102336 Returned 0 in 13 seconds
207 23:02:43.203012 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/kernel/image.itb
208 23:02:44.049112 output: FIT description: Kernel Image image with one or more FDT blobs
209 23:02:44.049550 output: Created: Fri Dec 1 23:02:43 2023
210 23:02:44.049658 output: Image 0 (kernel-1)
211 23:02:44.049752 output: Description:
212 23:02:44.049839 output: Created: Fri Dec 1 23:02:43 2023
213 23:02:44.049923 output: Type: Kernel Image
214 23:02:44.050008 output: Compression: lzma compressed
215 23:02:44.050107 output: Data Size: 11043984 Bytes = 10785.14 KiB = 10.53 MiB
216 23:02:44.050207 output: Architecture: AArch64
217 23:02:44.050301 output: OS: Linux
218 23:02:44.050399 output: Load Address: 0x00000000
219 23:02:44.050497 output: Entry Point: 0x00000000
220 23:02:44.050591 output: Hash algo: crc32
221 23:02:44.050684 output: Hash value: 36c84243
222 23:02:44.050781 output: Image 1 (fdt-1)
223 23:02:44.050877 output: Description: mt8192-asurada-spherion-r0
224 23:02:44.050969 output: Created: Fri Dec 1 23:02:43 2023
225 23:02:44.051066 output: Type: Flat Device Tree
226 23:02:44.051159 output: Compression: uncompressed
227 23:02:44.051252 output: Data Size: 47278 Bytes = 46.17 KiB = 0.05 MiB
228 23:02:44.051344 output: Architecture: AArch64
229 23:02:44.051436 output: Hash algo: crc32
230 23:02:44.051529 output: Hash value: cc4352de
231 23:02:44.051620 output: Image 2 (ramdisk-1)
232 23:02:44.051712 output: Description: unavailable
233 23:02:44.051804 output: Created: Fri Dec 1 23:02:43 2023
234 23:02:44.051896 output: Type: RAMDisk Image
235 23:02:44.051988 output: Compression: Unknown Compression
236 23:02:44.052079 output: Data Size: 56435029 Bytes = 55112.33 KiB = 53.82 MiB
237 23:02:44.052171 output: Architecture: AArch64
238 23:02:44.052263 output: OS: Linux
239 23:02:44.052354 output: Load Address: unavailable
240 23:02:44.052445 output: Entry Point: unavailable
241 23:02:44.052537 output: Hash algo: crc32
242 23:02:44.052628 output: Hash value: 382e64ea
243 23:02:44.052719 output: Default Configuration: 'conf-1'
244 23:02:44.052810 output: Configuration 0 (conf-1)
245 23:02:44.052910 output: Description: mt8192-asurada-spherion-r0
246 23:02:44.053005 output: Kernel: kernel-1
247 23:02:44.053097 output: Init Ramdisk: ramdisk-1
248 23:02:44.053190 output: FDT: fdt-1
249 23:02:44.053281 output: Loadables: kernel-1
250 23:02:44.053373 output:
251 23:02:44.053672 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 23:02:44.053815 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 23:02:44.053967 end: 1.5 prepare-tftp-overlay (duration 00:00:23) [common]
254 23:02:44.054108 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 23:02:44.054228 No LXC device requested
256 23:02:44.054351 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 23:02:44.054481 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 23:02:44.054598 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 23:02:44.054707 Checking files for TFTP limit of 4294967296 bytes.
260 23:02:44.055383 end: 1 tftp-deploy (duration 00:00:27) [common]
261 23:02:44.055530 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 23:02:44.055664 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 23:02:44.055841 substitutions:
264 23:02:44.055941 - {DTB}: 12154408/tftp-deploy-1u7ryz3t/dtb/mt8192-asurada-spherion-r0.dtb
265 23:02:44.056047 - {INITRD}: 12154408/tftp-deploy-1u7ryz3t/ramdisk/ramdisk.cpio.gz
266 23:02:44.056146 - {KERNEL}: 12154408/tftp-deploy-1u7ryz3t/kernel/Image
267 23:02:44.056244 - {LAVA_MAC}: None
268 23:02:44.056342 - {PRESEED_CONFIG}: None
269 23:02:44.056439 - {PRESEED_LOCAL}: None
270 23:02:44.056534 - {RAMDISK}: 12154408/tftp-deploy-1u7ryz3t/ramdisk/ramdisk.cpio.gz
271 23:02:44.056630 - {ROOT_PART}: None
272 23:02:44.056724 - {ROOT}: None
273 23:02:44.056819 - {SERVER_IP}: 192.168.201.1
274 23:02:44.056914 - {TEE}: None
275 23:02:44.057016 Parsed boot commands:
276 23:02:44.057112 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 23:02:44.057425 Parsed boot commands: tftpboot 192.168.201.1 12154408/tftp-deploy-1u7ryz3t/kernel/image.itb 12154408/tftp-deploy-1u7ryz3t/kernel/cmdline
278 23:02:44.057598 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 23:02:44.057730 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 23:02:44.057866 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 23:02:44.057994 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 23:02:44.058104 Not connected, no need to disconnect.
283 23:02:44.058222 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 23:02:44.058347 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 23:02:44.058449 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8192-asurada-spherion-r0-cbg-9'
286 23:02:44.062800 Setting prompt string to ['lava-test: # ']
287 23:02:44.063198 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 23:02:44.063330 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 23:02:44.063475 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 23:02:44.063586 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 23:02:44.063806 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-9' '--port=1' '--command=reboot'
292 23:02:49.199464 >> Command sent successfully.
293 23:02:49.202227 Returned 0 in 5 seconds
294 23:02:49.302665 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
296 23:02:49.303042 end: 2.2.2 reset-device (duration 00:00:05) [common]
297 23:02:49.303159 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
298 23:02:49.303256 Setting prompt string to 'Starting depthcharge on Spherion...'
299 23:02:49.303336 Changing prompt to 'Starting depthcharge on Spherion...'
300 23:02:49.303430 depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
301 23:02:49.303820 [Enter `^Ec?' for help]
302 23:02:49.475074
303 23:02:49.475232
304 23:02:49.475306 F0: 102B 0000
305 23:02:49.475376
306 23:02:49.475439 F3: 1001 0000 [0200]
307 23:02:49.475497
308 23:02:49.479041 F3: 1001 0000
309 23:02:49.479135
310 23:02:49.479202 F7: 102D 0000
311 23:02:49.479264
312 23:02:49.479324 F1: 0000 0000
313 23:02:49.479382
314 23:02:49.482052 V0: 0000 0000 [0001]
315 23:02:49.482138
316 23:02:49.482204 00: 0007 8000
317 23:02:49.482267
318 23:02:49.486087 01: 0000 0000
319 23:02:49.486180
320 23:02:49.486246 BP: 0C00 0209 [0000]
321 23:02:49.486307
322 23:02:49.489727 G0: 1182 0000
323 23:02:49.489816
324 23:02:49.489884 EC: 0000 0021 [4000]
325 23:02:49.489945
326 23:02:49.493453 S7: 0000 0000 [0000]
327 23:02:49.493583
328 23:02:49.493670 CC: 0000 0000 [0001]
329 23:02:49.493760
330 23:02:49.496399 T0: 0000 0040 [010F]
331 23:02:49.496520
332 23:02:49.496585 Jump to BL
333 23:02:49.496646
334 23:02:49.521772
335 23:02:49.521935
336 23:02:49.522006
337 23:02:49.528367 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...
338 23:02:49.532001 ARM64: Exception handlers installed.
339 23:02:49.535733 ARM64: Testing exception
340 23:02:49.539169 ARM64: Done test exception
341 23:02:49.545675 Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000
342 23:02:49.556481 Mapping address range [0x00000000:0x200000000) as cacheable | read-write | secure | device
343 23:02:49.563785 Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000
344 23:02:49.574689 Mapping address range [0x00100000:0x00120000) as cacheable | read-write | secure | normal
345 23:02:49.581260 Backing address range [0x00000000:0x40000000) with new page table @0x0010f000
346 23:02:49.587598 Backing address range [0x00000000:0x00200000) with new page table @0x00110000
347 23:02:49.598148 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | normal
348 23:02:49.604702 Backing address range [0x00200000:0x00400000) with new page table @0x00111000
349 23:02:49.624382 Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write | secure | normal
350 23:02:49.627621 WDT: Last reset was cold boot
351 23:02:49.631537 SPI1(PAD0) initialized at 2873684 Hz
352 23:02:49.634343 SPI5(PAD0) initialized at 992727 Hz
353 23:02:49.638038 VBOOT: Loading verstage.
354 23:02:49.644242 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
355 23:02:49.647662 FMAP: Found "FLASH" version 1.1 at 0x20000.
356 23:02:49.651267 FMAP: base = 0x0 size = 0x800000 #areas = 25
357 23:02:49.654511 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
358 23:02:49.661660 CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes
359 23:02:49.668815 CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150
360 23:02:49.679421 read SPI 0x96554 0xa1eb: 4591 us, 9028 KB/s, 72.224 Mbps
361 23:02:49.679570
362 23:02:49.679643
363 23:02:49.689356 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...
364 23:02:49.693053 ARM64: Exception handlers installed.
365 23:02:49.696213 ARM64: Testing exception
366 23:02:49.696305 ARM64: Done test exception
367 23:02:49.703247 FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)
368 23:02:49.705848 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
369 23:02:49.720573 Probing TPM: . done!
370 23:02:49.720722 TPM ready after 0 ms
371 23:02:49.726980 Connected to device vid:did:rid of 1ae0:0028:00
372 23:02:49.733774 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.30/cr50_v1.9308_B.954-4f0f77dec8
373 23:02:49.775372 Initialized TPM device CR50 revision 0
374 23:02:49.787560 tlcl_send_startup: Startup return code is 0
375 23:02:49.787714 TPM: setup succeeded
376 23:02:49.798846 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 23:02:49.807764 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 23:02:49.817841 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
379 23:02:49.826417 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
380 23:02:49.829828 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
381 23:02:49.832804 in-header: 03 07 00 00 08 00 00 00
382 23:02:49.836187 in-data: aa e4 47 04 13 02 00 00
383 23:02:49.839535 Chrome EC: UHEPI supported
384 23:02:49.846664 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
385 23:02:49.849950 in-header: 03 ad 00 00 08 00 00 00
386 23:02:49.853115 in-data: 00 20 20 08 00 00 00 00
387 23:02:49.853211 Phase 1
388 23:02:49.856452 FMAP: area GBB found @ 3f5000 (12032 bytes)
389 23:02:49.862827 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
390 23:02:49.869523 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
391 23:02:49.873518 Recovery requested (1009000e)
392 23:02:49.876425 TPM: Extending digest for VBOOT: boot mode into PCR 0
393 23:02:49.886064 tlcl_extend: response is 0
394 23:02:49.893688 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
395 23:02:49.898670 tlcl_extend: response is 0
396 23:02:49.905382 CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c
397 23:02:49.926085 read SPI 0x210d4 0x2173b: 15136 us, 9052 KB/s, 72.416 Mbps
398 23:02:49.932403 BS: bootblock times (exec / console): total (unknown) / 148 ms
399 23:02:49.932524
400 23:02:49.932590
401 23:02:49.943824 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...
402 23:02:49.946505 ARM64: Exception handlers installed.
403 23:02:49.949449 ARM64: Testing exception
404 23:02:49.949568 ARM64: Done test exception
405 23:02:49.971697 pmic_efuse_setting: Set efuses in 11 msecs
406 23:02:49.974835 pmwrap_interface_init: Select PMIF_VLD_RDY
407 23:02:49.982313 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a
408 23:02:49.985302 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a
409 23:02:49.988858 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a
410 23:02:49.995279 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a
411 23:02:49.998810 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a
412 23:02:50.005676 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a
413 23:02:50.008895 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a
414 23:02:50.015645 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a
415 23:02:50.019035 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c
416 23:02:50.022839 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a
417 23:02:50.029087 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a
418 23:02:50.032437 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c
419 23:02:50.035508 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c
420 23:02:50.042574 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a
421 23:02:50.049199 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a
422 23:02:50.055972 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a
423 23:02:50.060180 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a
424 23:02:50.065923 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a
425 23:02:50.072632 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a
426 23:02:50.079723 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a
427 23:02:50.082178 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c
428 23:02:50.089346 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a
429 23:02:50.093285 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a
430 23:02:50.099327 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c
431 23:02:50.103811 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c
432 23:02:50.109850 [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa
433 23:02:50.116395 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92
434 23:02:50.120002 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2
435 23:02:50.126656 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82
436 23:02:50.130295 [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10
437 23:02:50.133681 [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425
438 23:02:50.141355 [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010
439 23:02:50.144682 [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f
440 23:02:50.151700 [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000
441 23:02:50.154636 [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8
442 23:02:50.161660 [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb
443 23:02:50.164679 [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698
444 23:02:50.171712 [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3
445 23:02:50.175188 [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92
446 23:02:50.178658 [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a
447 23:02:50.182014 [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2
448 23:02:50.189761 [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a
449 23:02:50.192761 [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a
450 23:02:50.195861 [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a
451 23:02:50.199072 [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a
452 23:02:50.205867 [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82
453 23:02:50.209388 [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c
454 23:02:50.212418 [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a
455 23:02:50.219255 [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a
456 23:02:50.222119 [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c
457 23:02:50.225980 [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c
458 23:02:50.235749 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248
459 23:02:50.242204 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1
460 23:02:50.248910 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
461 23:02:50.255328 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248
462 23:02:50.265526 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0
463 23:02:50.268718 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
464 23:02:50.271753 [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
465 23:02:50.278262 [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
466 23:02:50.285065 [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde6c, sec=0x8
467 23:02:50.288564 [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2
468 23:02:50.295794 [RTC]rtc_osc_init,62: osc32con val = 0xde6c
469 23:02:50.299158 [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a
470 23:02:50.308608 [RTC]rtc_get_frequency_meter,154: input=15, output=835
471 23:02:50.317794 [RTC]rtc_get_frequency_meter,154: input=7, output=708
472 23:02:50.327206 [RTC]rtc_get_frequency_meter,154: input=11, output=772
473 23:02:50.336792 [RTC]rtc_get_frequency_meter,154: input=13, output=803
474 23:02:50.346257 [RTC]rtc_get_frequency_meter,154: input=12, output=788
475 23:02:50.355902 [RTC]rtc_get_frequency_meter,154: input=12, output=788
476 23:02:50.365236 [RTC]rtc_get_frequency_meter,154: input=13, output=804
477 23:02:50.368763 [RTC]rtc_eosc_cali,47: left: 12, middle: 12, right: 13
478 23:02:50.376357 [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde6c
479 23:02:50.379877 [RTC]rtc_boot_common,202: RTC_STATE_REBOOT
480 23:02:50.382810 [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486
481 23:02:50.389358 [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1
482 23:02:50.392665 [RTC]rtc_bbpu_power_on,300: done BBPU=0x81
483 23:02:50.395802 ADC[4]: Raw value=905618 ID=7
484 23:02:50.395894 ADC[3]: Raw value=214021 ID=1
485 23:02:50.399147 RAM Code: 0x71
486 23:02:50.403062 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
487 23:02:50.408930 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
488 23:02:50.415830 CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE' @0x75280 size 0x8 in mcache @0x00108014
489 23:02:50.422201 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
490 23:02:50.425539 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
491 23:02:50.429193 in-header: 03 07 00 00 08 00 00 00
492 23:02:50.432501 in-data: aa e4 47 04 13 02 00 00
493 23:02:50.436097 Chrome EC: UHEPI supported
494 23:02:50.442379 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
495 23:02:50.445674 in-header: 03 dd 00 00 08 00 00 00
496 23:02:50.448762 in-data: 90 20 60 08 00 00 00 00
497 23:02:50.452422 MRC: failed to locate region type 0.
498 23:02:50.459119 DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)
499 23:02:50.462050 DRAM-K: Running full calibration
500 23:02:50.468622 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
501 23:02:50.468736 header.status = 0x0
502 23:02:50.472092 header.version = 0x6 (expected: 0x6)
503 23:02:50.475566 header.size = 0xd00 (expected: 0xd00)
504 23:02:50.478808 header.flags = 0x0
505 23:02:50.485092 CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40
506 23:02:50.502385 read SPI 0x72590 0x1c583: 12499 us, 9288 KB/s, 74.304 Mbps
507 23:02:50.508747 dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6
508 23:02:50.512451 dram_init: ddr_geometry: 2
509 23:02:50.515448 [EMI] MDL number = 2
510 23:02:50.515555 [EMI] Get MDL freq = 0
511 23:02:50.518807 dram_init: ddr_type: 0
512 23:02:50.518897 is_discrete_lpddr4: 1
513 23:02:50.522098 [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0
514 23:02:50.522191
515 23:02:50.522258
516 23:02:50.525382 [Bian_co] ETT version 0.0.0.1
517 23:02:50.532040 dram_type 6, R0 cbt_mode 1, R1 cbt_mode 1 VENDOR=6
518 23:02:50.532141
519 23:02:50.535770 dramc_set_vcore_voltage set vcore to 650000
520 23:02:50.538715 Read voltage for 800, 4
521 23:02:50.538804 Vio18 = 0
522 23:02:50.538870 Vcore = 650000
523 23:02:50.542239 Vdram = 0
524 23:02:50.542324 Vddq = 0
525 23:02:50.542389 Vmddr = 0
526 23:02:50.545306 dram_init: config_dvfs: 1
527 23:02:50.549101 [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0
528 23:02:50.555860 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
529 23:02:50.559147 [SwImpedanceCal] DRVP=8, DRVN=16, ODTN=9
530 23:02:50.561980 freq_region=0, Reg: DRVP=8, DRVN=16, ODTN=9
531 23:02:50.565527 [SwImpedanceCal] DRVP=14, DRVN=24, ODTN=9
532 23:02:50.568444 freq_region=1, Reg: DRVP=14, DRVN=24, ODTN=9
533 23:02:50.571840 MEM_TYPE=3, freq_sel=18
534 23:02:50.575762 sv_algorithm_assistance_LP4_1600
535 23:02:50.578738 ============ PULL DRAM RESETB DOWN ============
536 23:02:50.585045 ========== PULL DRAM RESETB DOWN end =========
537 23:02:50.588351 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
538 23:02:50.592029 ===================================
539 23:02:50.595240 LPDDR4 DRAM CONFIGURATION
540 23:02:50.598451 ===================================
541 23:02:50.598545 EX_ROW_EN[0] = 0x0
542 23:02:50.602259 EX_ROW_EN[1] = 0x0
543 23:02:50.602349 LP4Y_EN = 0x0
544 23:02:50.605227 WORK_FSP = 0x0
545 23:02:50.605319 WL = 0x2
546 23:02:50.608356 RL = 0x2
547 23:02:50.608441 BL = 0x2
548 23:02:50.611878 RPST = 0x0
549 23:02:50.611963 RD_PRE = 0x0
550 23:02:50.615296 WR_PRE = 0x1
551 23:02:50.618310 WR_PST = 0x0
552 23:02:50.618402 DBI_WR = 0x0
553 23:02:50.621809 DBI_RD = 0x0
554 23:02:50.621894 OTF = 0x1
555 23:02:50.625099 ===================================
556 23:02:50.628172 ===================================
557 23:02:50.628264 ANA top config
558 23:02:50.632016 ===================================
559 23:02:50.635539 DLL_ASYNC_EN = 0
560 23:02:50.638399 ALL_SLAVE_EN = 1
561 23:02:50.641350 NEW_RANK_MODE = 1
562 23:02:50.644820 DLL_IDLE_MODE = 1
563 23:02:50.644908 LP45_APHY_COMB_EN = 1
564 23:02:50.648373 TX_ODT_DIS = 1
565 23:02:50.651693 NEW_8X_MODE = 1
566 23:02:50.655198 ===================================
567 23:02:50.658316 ===================================
568 23:02:50.661617 data_rate = 1600
569 23:02:50.664646 CKR = 1
570 23:02:50.664735 DQ_P2S_RATIO = 8
571 23:02:50.667715 ===================================
572 23:02:50.671221 CA_P2S_RATIO = 8
573 23:02:50.674493 DQ_CA_OPEN = 0
574 23:02:50.677724 DQ_SEMI_OPEN = 0
575 23:02:50.681350 CA_SEMI_OPEN = 0
576 23:02:50.684317 CA_FULL_RATE = 0
577 23:02:50.684405 DQ_CKDIV4_EN = 1
578 23:02:50.688064 CA_CKDIV4_EN = 1
579 23:02:50.691112 CA_PREDIV_EN = 0
580 23:02:50.694529 PH8_DLY = 0
581 23:02:50.698072 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
582 23:02:50.701138 DQ_AAMCK_DIV = 4
583 23:02:50.701230 CA_AAMCK_DIV = 4
584 23:02:50.704649 CA_ADMCK_DIV = 4
585 23:02:50.707847 DQ_TRACK_CA_EN = 0
586 23:02:50.710857 CA_PICK = 800
587 23:02:50.714271 CA_MCKIO = 800
588 23:02:50.717737 MCKIO_SEMI = 0
589 23:02:50.720945 PLL_FREQ = 3068
590 23:02:50.724215 DQ_UI_PI_RATIO = 32
591 23:02:50.724308 CA_UI_PI_RATIO = 0
592 23:02:50.727655 ===================================
593 23:02:50.731152 ===================================
594 23:02:50.733986 memory_type:LPDDR4
595 23:02:50.737961 GP_NUM : 10
596 23:02:50.738057 SRAM_EN : 1
597 23:02:50.741212 MD32_EN : 0
598 23:02:50.743919 ===================================
599 23:02:50.747946 [ANA_INIT] >>>>>>>>>>>>>>
600 23:02:50.748035 <<<<<< [CONFIGURE PHASE]: ANA_TX
601 23:02:50.754150 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
602 23:02:50.754250 ===================================
603 23:02:50.757311 data_rate = 1600,PCW = 0X7600
604 23:02:50.761180 ===================================
605 23:02:50.764877 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
606 23:02:50.770595 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
607 23:02:50.777209 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
608 23:02:50.780772 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
609 23:02:50.784219 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
610 23:02:50.787709 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
611 23:02:50.790742 [ANA_INIT] flow start
612 23:02:50.790836 [ANA_INIT] PLL >>>>>>>>
613 23:02:50.793818 [ANA_INIT] PLL <<<<<<<<
614 23:02:50.797133 [ANA_INIT] MIDPI >>>>>>>>
615 23:02:50.800807 [ANA_INIT] MIDPI <<<<<<<<
616 23:02:50.800898 [ANA_INIT] DLL >>>>>>>>
617 23:02:50.804323 [ANA_INIT] flow end
618 23:02:50.806950 ============ LP4 DIFF to SE enter ============
619 23:02:50.810166 ============ LP4 DIFF to SE exit ============
620 23:02:50.813626 [ANA_INIT] <<<<<<<<<<<<<
621 23:02:50.816912 [Flow] Enable top DCM control >>>>>
622 23:02:50.820296 [Flow] Enable top DCM control <<<<<
623 23:02:50.824006 Enable DLL master slave shuffle
624 23:02:50.830289 ==============================================================
625 23:02:50.830396 Gating Mode config
626 23:02:50.837028 ==============================================================
627 23:02:50.837133 Config description:
628 23:02:50.846852 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
629 23:02:50.853584 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
630 23:02:50.860033 SELPH_MODE 0: By rank 1: By Phase
631 23:02:50.863288 ==============================================================
632 23:02:50.866495 GAT_TRACK_EN = 1
633 23:02:50.870094 RX_GATING_MODE = 2
634 23:02:50.873373 RX_GATING_TRACK_MODE = 2
635 23:02:50.877017 SELPH_MODE = 1
636 23:02:50.880085 PICG_EARLY_EN = 1
637 23:02:50.883129 VALID_LAT_VALUE = 1
638 23:02:50.886845 ==============================================================
639 23:02:50.893257 Enter into Gating configuration >>>>
640 23:02:50.897055 Exit from Gating configuration <<<<
641 23:02:50.897154 Enter into DVFS_PRE_config >>>>>
642 23:02:50.909964 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
643 23:02:50.913196 Exit from DVFS_PRE_config <<<<<
644 23:02:50.916318 Enter into PICG configuration >>>>
645 23:02:50.919829 Exit from PICG configuration <<<<
646 23:02:50.919926 [RX_INPUT] configuration >>>>>
647 23:02:50.923139 [RX_INPUT] configuration <<<<<
648 23:02:50.930055 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
649 23:02:50.933329 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
650 23:02:50.940767 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
651 23:02:50.947889 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
652 23:02:50.955222 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
653 23:02:50.958304 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
654 23:02:50.961789 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
655 23:02:50.965941 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
656 23:02:50.973303 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
657 23:02:50.976526 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
658 23:02:50.980392 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
659 23:02:50.983955 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
660 23:02:50.987683 ===================================
661 23:02:50.991455 LPDDR4 DRAM CONFIGURATION
662 23:02:50.995021 ===================================
663 23:02:50.995118 EX_ROW_EN[0] = 0x0
664 23:02:50.998392 EX_ROW_EN[1] = 0x0
665 23:02:50.998481 LP4Y_EN = 0x0
666 23:02:51.002046 WORK_FSP = 0x0
667 23:02:51.002134 WL = 0x2
668 23:02:51.005297 RL = 0x2
669 23:02:51.005391 BL = 0x2
670 23:02:51.009333 RPST = 0x0
671 23:02:51.009465 RD_PRE = 0x0
672 23:02:51.012950 WR_PRE = 0x1
673 23:02:51.013037 WR_PST = 0x0
674 23:02:51.013102 DBI_WR = 0x0
675 23:02:51.016460 DBI_RD = 0x0
676 23:02:51.016547 OTF = 0x1
677 23:02:51.020237 ===================================
678 23:02:51.024007 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
679 23:02:51.027893 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
680 23:02:51.034723 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
681 23:02:51.037952 ===================================
682 23:02:51.038059 LPDDR4 DRAM CONFIGURATION
683 23:02:51.042045 ===================================
684 23:02:51.045843 EX_ROW_EN[0] = 0x10
685 23:02:51.045935 EX_ROW_EN[1] = 0x0
686 23:02:51.049035 LP4Y_EN = 0x0
687 23:02:51.049122 WORK_FSP = 0x0
688 23:02:51.053100 WL = 0x2
689 23:02:51.053191 RL = 0x2
690 23:02:51.056299 BL = 0x2
691 23:02:51.056388 RPST = 0x0
692 23:02:51.059991 RD_PRE = 0x0
693 23:02:51.060079 WR_PRE = 0x1
694 23:02:51.064155 WR_PST = 0x0
695 23:02:51.064247 DBI_WR = 0x0
696 23:02:51.067285 DBI_RD = 0x0
697 23:02:51.067372 OTF = 0x1
698 23:02:51.071130 ===================================
699 23:02:51.078136 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
700 23:02:51.081703 nWR fixed to 40
701 23:02:51.081804 [ModeRegInit_LP4] CH0 RK0
702 23:02:51.085511 [ModeRegInit_LP4] CH0 RK1
703 23:02:51.088891 [ModeRegInit_LP4] CH1 RK0
704 23:02:51.088990 [ModeRegInit_LP4] CH1 RK1
705 23:02:51.092848 match AC timing 13
706 23:02:51.096152 dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 1
707 23:02:51.100360 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
708 23:02:51.106005 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
709 23:02:51.109892 [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17
710 23:02:51.113124 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
711 23:02:51.116268 [EMI DOE] emi_dcm 0
712 23:02:51.119974 [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600
713 23:02:51.120067 ==
714 23:02:51.122989 Dram Type= 6, Freq= 0, CH_0, rank 0
715 23:02:51.126961 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
716 23:02:51.127057 ==
717 23:02:51.134532 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
718 23:02:51.138151 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
719 23:02:51.148520 [CA 0] Center 37 (7~68) winsize 62
720 23:02:51.151564 [CA 1] Center 36 (6~67) winsize 62
721 23:02:51.154595 [CA 2] Center 34 (4~65) winsize 62
722 23:02:51.157935 [CA 3] Center 34 (4~65) winsize 62
723 23:02:51.161851 [CA 4] Center 33 (3~64) winsize 62
724 23:02:51.165633 [CA 5] Center 33 (3~64) winsize 62
725 23:02:51.165731
726 23:02:51.168362 [CmdBusTrainingLP45] Vref(ca) range 1: 32
727 23:02:51.168448
728 23:02:51.171666 [CATrainingPosCal] consider 1 rank data
729 23:02:51.175193 u2DelayCellTimex100 = 270/100 ps
730 23:02:51.178481 CA0 delay=37 (7~68),Diff = 4 PI (28 cell)
731 23:02:51.181670 CA1 delay=36 (6~67),Diff = 3 PI (21 cell)
732 23:02:51.185193 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
733 23:02:51.191872 CA3 delay=34 (4~65),Diff = 1 PI (7 cell)
734 23:02:51.195443 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
735 23:02:51.198573 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
736 23:02:51.198666
737 23:02:51.202044 CA PerBit enable=1, Macro0, CA PI delay=33
738 23:02:51.202132
739 23:02:51.205104 [CBTSetCACLKResult] CA Dly = 33
740 23:02:51.205260 CS Dly: 7 (0~38)
741 23:02:51.205371 ==
742 23:02:51.208684 Dram Type= 6, Freq= 0, CH_0, rank 1
743 23:02:51.215719 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
744 23:02:51.215828 ==
745 23:02:51.218506 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
746 23:02:51.225434 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
747 23:02:51.234302 [CA 0] Center 36 (6~67) winsize 62
748 23:02:51.237647 [CA 1] Center 37 (6~68) winsize 63
749 23:02:51.240947 [CA 2] Center 34 (4~65) winsize 62
750 23:02:51.244054 [CA 3] Center 34 (4~65) winsize 62
751 23:02:51.247409 [CA 4] Center 33 (3~64) winsize 62
752 23:02:51.250994 [CA 5] Center 33 (2~64) winsize 63
753 23:02:51.251088
754 23:02:51.254451 [CmdBusTrainingLP45] Vref(ca) range 1: 34
755 23:02:51.254539
756 23:02:51.257888 [CATrainingPosCal] consider 2 rank data
757 23:02:51.260822 u2DelayCellTimex100 = 270/100 ps
758 23:02:51.264254 CA0 delay=37 (7~67),Diff = 4 PI (28 cell)
759 23:02:51.267770 CA1 delay=36 (6~67),Diff = 3 PI (21 cell)
760 23:02:51.274672 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
761 23:02:51.278197 CA3 delay=34 (4~65),Diff = 1 PI (7 cell)
762 23:02:51.282145 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
763 23:02:51.282269 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
764 23:02:51.285621
765 23:02:51.289291 CA PerBit enable=1, Macro0, CA PI delay=33
766 23:02:51.289434
767 23:02:51.289539 [CBTSetCACLKResult] CA Dly = 33
768 23:02:51.292907 CS Dly: 7 (0~38)
769 23:02:51.292995
770 23:02:51.296763 ----->DramcWriteLeveling(PI) begin...
771 23:02:51.296859 ==
772 23:02:51.300180 Dram Type= 6, Freq= 0, CH_0, rank 0
773 23:02:51.303948 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
774 23:02:51.304046 ==
775 23:02:51.307678 Write leveling (Byte 0): 35 => 35
776 23:02:51.310541 Write leveling (Byte 1): 29 => 29
777 23:02:51.314182 DramcWriteLeveling(PI) end<-----
778 23:02:51.314276
779 23:02:51.314345 ==
780 23:02:51.317665 Dram Type= 6, Freq= 0, CH_0, rank 0
781 23:02:51.320669 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
782 23:02:51.320757 ==
783 23:02:51.324105 [Gating] SW mode calibration
784 23:02:51.331363 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
785 23:02:51.334244 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
786 23:02:51.341039 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
787 23:02:51.344024 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
788 23:02:51.347218 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
789 23:02:51.354215 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
790 23:02:51.358167 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
791 23:02:51.360493 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
792 23:02:51.367826 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
793 23:02:51.370667 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
794 23:02:51.374035 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
795 23:02:51.380839 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
796 23:02:51.384360 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
797 23:02:51.387226 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
798 23:02:51.394344 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
799 23:02:51.397271 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
800 23:02:51.401023 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
801 23:02:51.407203 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
802 23:02:51.410658 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
803 23:02:51.414421 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
804 23:02:51.420884 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 1) (1 0)
805 23:02:51.423975 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
806 23:02:51.427106 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
807 23:02:51.433677 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
808 23:02:51.437288 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
809 23:02:51.440562 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
810 23:02:51.447033 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
811 23:02:51.450323 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
812 23:02:51.453760 0 9 8 | B1->B0 | 2323 2e2e | 0 0 | (0 0) (0 0)
813 23:02:51.457043 0 9 12 | B1->B0 | 2b2b 3434 | 1 1 | (1 1) (1 1)
814 23:02:51.464527 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
815 23:02:51.467321 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
816 23:02:51.470207 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
817 23:02:51.476976 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
818 23:02:51.480449 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
819 23:02:51.483649 0 10 4 | B1->B0 | 3434 3131 | 1 1 | (1 1) (1 0)
820 23:02:51.490121 0 10 8 | B1->B0 | 3333 2424 | 1 0 | (1 1) (1 0)
821 23:02:51.493537 0 10 12 | B1->B0 | 2929 2323 | 0 0 | (1 0) (0 0)
822 23:02:51.497297 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
823 23:02:51.503567 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
824 23:02:51.506690 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
825 23:02:51.510200 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
826 23:02:51.516558 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
827 23:02:51.520341 0 11 4 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
828 23:02:51.523170 0 11 8 | B1->B0 | 2b2b 4242 | 1 0 | (0 0) (0 0)
829 23:02:51.529900 0 11 12 | B1->B0 | 3838 4646 | 0 0 | (1 1) (0 0)
830 23:02:51.533128 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
831 23:02:51.536609 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
832 23:02:51.543280 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
833 23:02:51.546596 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
834 23:02:51.549774 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
835 23:02:51.556398 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
836 23:02:51.559892 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
837 23:02:51.562862 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
838 23:02:51.570292 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
839 23:02:51.572729 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
840 23:02:51.576024 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
841 23:02:51.582904 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
842 23:02:51.586776 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
843 23:02:51.589504 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
844 23:02:51.596484 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
845 23:02:51.600041 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
846 23:02:51.602569 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
847 23:02:51.609298 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
848 23:02:51.612652 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
849 23:02:51.616404 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
850 23:02:51.620050 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
851 23:02:51.627484 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
852 23:02:51.630698 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
853 23:02:51.634079 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
854 23:02:51.637898 Total UI for P1: 0, mck2ui 16
855 23:02:51.641425 best dqsien dly found for B0: ( 0, 14, 8)
856 23:02:51.645295 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
857 23:02:51.648890 Total UI for P1: 0, mck2ui 16
858 23:02:51.652353 best dqsien dly found for B1: ( 0, 14, 10)
859 23:02:51.656387 best DQS0 dly(MCK, UI, PI) = (0, 14, 8)
860 23:02:51.659490 best DQS1 dly(MCK, UI, PI) = (0, 14, 10)
861 23:02:51.659583
862 23:02:51.663326 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)
863 23:02:51.666896 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 10)
864 23:02:51.670025 [Gating] SW calibration Done
865 23:02:51.670120 ==
866 23:02:51.673533 Dram Type= 6, Freq= 0, CH_0, rank 0
867 23:02:51.677502 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
868 23:02:51.677601 ==
869 23:02:51.677670 RX Vref Scan: 0
870 23:02:51.677732
871 23:02:51.681832 RX Vref 0 -> 0, step: 1
872 23:02:51.681927
873 23:02:51.684788 RX Delay -130 -> 252, step: 16
874 23:02:51.688269 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
875 23:02:51.691756 iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240
876 23:02:51.695297 iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240
877 23:02:51.698275 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
878 23:02:51.704865 iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240
879 23:02:51.708416 iDelay=222, Bit 5, Center 69 (-50 ~ 189) 240
880 23:02:51.711810 iDelay=222, Bit 6, Center 85 (-34 ~ 205) 240
881 23:02:51.714850 iDelay=222, Bit 7, Center 93 (-34 ~ 221) 256
882 23:02:51.718546 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
883 23:02:51.724639 iDelay=222, Bit 9, Center 61 (-66 ~ 189) 256
884 23:02:51.728719 iDelay=222, Bit 10, Center 77 (-50 ~ 205) 256
885 23:02:51.731404 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
886 23:02:51.735232 iDelay=222, Bit 12, Center 77 (-50 ~ 205) 256
887 23:02:51.738694 iDelay=222, Bit 13, Center 77 (-50 ~ 205) 256
888 23:02:51.742724 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
889 23:02:51.749914 iDelay=222, Bit 15, Center 77 (-50 ~ 205) 256
890 23:02:51.750033 ==
891 23:02:51.753454 Dram Type= 6, Freq= 0, CH_0, rank 0
892 23:02:51.756854 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
893 23:02:51.756947 ==
894 23:02:51.757015 DQS Delay:
895 23:02:51.760116 DQS0 = 0, DQS1 = 0
896 23:02:51.760204 DQM Delay:
897 23:02:51.760271 DQM0 = 84, DQM1 = 74
898 23:02:51.763373 DQ Delay:
899 23:02:51.767142 DQ0 =85, DQ1 =85, DQ2 =85, DQ3 =85
900 23:02:51.770369 DQ4 =85, DQ5 =69, DQ6 =85, DQ7 =93
901 23:02:51.773374 DQ8 =69, DQ9 =61, DQ10 =77, DQ11 =69
902 23:02:51.776956 DQ12 =77, DQ13 =77, DQ14 =85, DQ15 =77
903 23:02:51.777045
904 23:02:51.777112
905 23:02:51.777174 ==
906 23:02:51.779925 Dram Type= 6, Freq= 0, CH_0, rank 0
907 23:02:51.783123 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
908 23:02:51.783214 ==
909 23:02:51.783282
910 23:02:51.783343
911 23:02:51.786343 TX Vref Scan disable
912 23:02:51.789878 == TX Byte 0 ==
913 23:02:51.793101 Update DQ dly =585 (2 ,1, 41) DQ OEN =(1 ,6)
914 23:02:51.796302 Update DQM dly =585 (2 ,1, 41) DQM OEN =(1 ,6)
915 23:02:51.800291 == TX Byte 1 ==
916 23:02:51.803322 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
917 23:02:51.806405 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
918 23:02:51.806500 ==
919 23:02:51.809805 Dram Type= 6, Freq= 0, CH_0, rank 0
920 23:02:51.813165 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
921 23:02:51.816301 ==
922 23:02:51.827903 TX Vref=22, minBit 1, minWin=26, winSum=434
923 23:02:51.831606 TX Vref=24, minBit 2, minWin=27, winSum=439
924 23:02:51.834509 TX Vref=26, minBit 4, minWin=27, winSum=442
925 23:02:51.837672 TX Vref=28, minBit 8, minWin=27, winSum=446
926 23:02:51.841025 TX Vref=30, minBit 11, minWin=26, winSum=444
927 23:02:51.848094 TX Vref=32, minBit 9, minWin=26, winSum=441
928 23:02:51.851131 [TxChooseVref] Worse bit 8, Min win 27, Win sum 446, Final Vref 28
929 23:02:51.851228
930 23:02:51.854855 Final TX Range 1 Vref 28
931 23:02:51.854943
932 23:02:51.855008 ==
933 23:02:51.858197 Dram Type= 6, Freq= 0, CH_0, rank 0
934 23:02:51.861178 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
935 23:02:51.864350 ==
936 23:02:51.864438
937 23:02:51.864504
938 23:02:51.864565 TX Vref Scan disable
939 23:02:51.868163 == TX Byte 0 ==
940 23:02:51.871133 Update DQ dly =585 (2 ,1, 41) DQ OEN =(1 ,6)
941 23:02:51.878218 Update DQM dly =585 (2 ,1, 41) DQM OEN =(1 ,6)
942 23:02:51.878332 == TX Byte 1 ==
943 23:02:51.881602 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
944 23:02:51.888087 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
945 23:02:51.888201
946 23:02:51.888270 [DATLAT]
947 23:02:51.888331 Freq=800, CH0 RK0
948 23:02:51.888405
949 23:02:51.891463 DATLAT Default: 0xa
950 23:02:51.891548 0, 0xFFFF, sum = 0
951 23:02:51.894509 1, 0xFFFF, sum = 0
952 23:02:51.894595 2, 0xFFFF, sum = 0
953 23:02:51.898502 3, 0xFFFF, sum = 0
954 23:02:51.898590 4, 0xFFFF, sum = 0
955 23:02:51.901284 5, 0xFFFF, sum = 0
956 23:02:51.904389 6, 0xFFFF, sum = 0
957 23:02:51.904480 7, 0xFFFF, sum = 0
958 23:02:51.907857 8, 0xFFFF, sum = 0
959 23:02:51.907953 9, 0x0, sum = 1
960 23:02:51.908020 10, 0x0, sum = 2
961 23:02:51.911185 11, 0x0, sum = 3
962 23:02:51.911300 12, 0x0, sum = 4
963 23:02:51.914818 best_step = 10
964 23:02:51.914906
965 23:02:51.914993 ==
966 23:02:51.917975 Dram Type= 6, Freq= 0, CH_0, rank 0
967 23:02:51.921586 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
968 23:02:51.921676 ==
969 23:02:51.924916 RX Vref Scan: 1
970 23:02:51.925004
971 23:02:51.925091 Set Vref Range= 32 -> 127
972 23:02:51.928256
973 23:02:51.928342 RX Vref 32 -> 127, step: 1
974 23:02:51.928430
975 23:02:51.931286 RX Delay -111 -> 252, step: 8
976 23:02:51.931374
977 23:02:51.934732 Set Vref, RX VrefLevel [Byte0]: 32
978 23:02:51.937760 [Byte1]: 32
979 23:02:51.937850
980 23:02:51.941572 Set Vref, RX VrefLevel [Byte0]: 33
981 23:02:51.944566 [Byte1]: 33
982 23:02:51.948715
983 23:02:51.948805 Set Vref, RX VrefLevel [Byte0]: 34
984 23:02:51.952483 [Byte1]: 34
985 23:02:51.956480
986 23:02:51.956572 Set Vref, RX VrefLevel [Byte0]: 35
987 23:02:51.959491 [Byte1]: 35
988 23:02:51.964164
989 23:02:51.964255 Set Vref, RX VrefLevel [Byte0]: 36
990 23:02:51.967015 [Byte1]: 36
991 23:02:51.972295
992 23:02:51.972430 Set Vref, RX VrefLevel [Byte0]: 37
993 23:02:51.974981 [Byte1]: 37
994 23:02:51.979668
995 23:02:51.979775 Set Vref, RX VrefLevel [Byte0]: 38
996 23:02:51.982456 [Byte1]: 38
997 23:02:51.986848
998 23:02:51.986947 Set Vref, RX VrefLevel [Byte0]: 39
999 23:02:51.990027 [Byte1]: 39
1000 23:02:51.994652
1001 23:02:51.994812 Set Vref, RX VrefLevel [Byte0]: 40
1002 23:02:51.997690 [Byte1]: 40
1003 23:02:52.002168
1004 23:02:52.002273 Set Vref, RX VrefLevel [Byte0]: 41
1005 23:02:52.005769 [Byte1]: 41
1006 23:02:52.009843
1007 23:02:52.009946 Set Vref, RX VrefLevel [Byte0]: 42
1008 23:02:52.013714 [Byte1]: 42
1009 23:02:52.017228
1010 23:02:52.017327 Set Vref, RX VrefLevel [Byte0]: 43
1011 23:02:52.020475 [Byte1]: 43
1012 23:02:52.024862
1013 23:02:52.024956 Set Vref, RX VrefLevel [Byte0]: 44
1014 23:02:52.028346 [Byte1]: 44
1015 23:02:52.032843
1016 23:02:52.032939 Set Vref, RX VrefLevel [Byte0]: 45
1017 23:02:52.035750 [Byte1]: 45
1018 23:02:52.040773
1019 23:02:52.040874 Set Vref, RX VrefLevel [Byte0]: 46
1020 23:02:52.044100 [Byte1]: 46
1021 23:02:52.048251
1022 23:02:52.048354 Set Vref, RX VrefLevel [Byte0]: 47
1023 23:02:52.051325 [Byte1]: 47
1024 23:02:52.055655
1025 23:02:52.055758 Set Vref, RX VrefLevel [Byte0]: 48
1026 23:02:52.058709 [Byte1]: 48
1027 23:02:52.063394
1028 23:02:52.063487 Set Vref, RX VrefLevel [Byte0]: 49
1029 23:02:52.066394 [Byte1]: 49
1030 23:02:52.071090
1031 23:02:52.071183 Set Vref, RX VrefLevel [Byte0]: 50
1032 23:02:52.074133 [Byte1]: 50
1033 23:02:52.078658
1034 23:02:52.078767 Set Vref, RX VrefLevel [Byte0]: 51
1035 23:02:52.081844 [Byte1]: 51
1036 23:02:52.086025
1037 23:02:52.086117 Set Vref, RX VrefLevel [Byte0]: 52
1038 23:02:52.089416 [Byte1]: 52
1039 23:02:52.093695
1040 23:02:52.096986 Set Vref, RX VrefLevel [Byte0]: 53
1041 23:02:52.100649 [Byte1]: 53
1042 23:02:52.100741
1043 23:02:52.103485 Set Vref, RX VrefLevel [Byte0]: 54
1044 23:02:52.106949 [Byte1]: 54
1045 23:02:52.107041
1046 23:02:52.110140 Set Vref, RX VrefLevel [Byte0]: 55
1047 23:02:52.113827 [Byte1]: 55
1048 23:02:52.116675
1049 23:02:52.116761 Set Vref, RX VrefLevel [Byte0]: 56
1050 23:02:52.119831 [Byte1]: 56
1051 23:02:52.124406
1052 23:02:52.124512 Set Vref, RX VrefLevel [Byte0]: 57
1053 23:02:52.127608 [Byte1]: 57
1054 23:02:52.132109
1055 23:02:52.132202 Set Vref, RX VrefLevel [Byte0]: 58
1056 23:02:52.135667 [Byte1]: 58
1057 23:02:52.139811
1058 23:02:52.139903 Set Vref, RX VrefLevel [Byte0]: 59
1059 23:02:52.142898 [Byte1]: 59
1060 23:02:52.147409
1061 23:02:52.147497 Set Vref, RX VrefLevel [Byte0]: 60
1062 23:02:52.150567 [Byte1]: 60
1063 23:02:52.155389
1064 23:02:52.155481 Set Vref, RX VrefLevel [Byte0]: 61
1065 23:02:52.158419 [Byte1]: 61
1066 23:02:52.162657
1067 23:02:52.162746 Set Vref, RX VrefLevel [Byte0]: 62
1068 23:02:52.165965 [Byte1]: 62
1069 23:02:52.170361
1070 23:02:52.170450 Set Vref, RX VrefLevel [Byte0]: 63
1071 23:02:52.173307 [Byte1]: 63
1072 23:02:52.177743
1073 23:02:52.177835 Set Vref, RX VrefLevel [Byte0]: 64
1074 23:02:52.181056 [Byte1]: 64
1075 23:02:52.185628
1076 23:02:52.185721 Set Vref, RX VrefLevel [Byte0]: 65
1077 23:02:52.188692 [Byte1]: 65
1078 23:02:52.193351
1079 23:02:52.193497 Set Vref, RX VrefLevel [Byte0]: 66
1080 23:02:52.196375 [Byte1]: 66
1081 23:02:52.201332
1082 23:02:52.201487 Set Vref, RX VrefLevel [Byte0]: 67
1083 23:02:52.204705 [Byte1]: 67
1084 23:02:52.209035
1085 23:02:52.209134 Set Vref, RX VrefLevel [Byte0]: 68
1086 23:02:52.212292 [Byte1]: 68
1087 23:02:52.216387
1088 23:02:52.216479 Set Vref, RX VrefLevel [Byte0]: 69
1089 23:02:52.219308 [Byte1]: 69
1090 23:02:52.224156
1091 23:02:52.224247 Set Vref, RX VrefLevel [Byte0]: 70
1092 23:02:52.226994 [Byte1]: 70
1093 23:02:52.231497
1094 23:02:52.231586 Set Vref, RX VrefLevel [Byte0]: 71
1095 23:02:52.234593 [Byte1]: 71
1096 23:02:52.238975
1097 23:02:52.239062 Set Vref, RX VrefLevel [Byte0]: 72
1098 23:02:52.242547 [Byte1]: 72
1099 23:02:52.246452
1100 23:02:52.246543 Set Vref, RX VrefLevel [Byte0]: 73
1101 23:02:52.249935 [Byte1]: 73
1102 23:02:52.254450
1103 23:02:52.254542 Set Vref, RX VrefLevel [Byte0]: 74
1104 23:02:52.257616 [Byte1]: 74
1105 23:02:52.261892
1106 23:02:52.261982 Set Vref, RX VrefLevel [Byte0]: 75
1107 23:02:52.265324 [Byte1]: 75
1108 23:02:52.269709
1109 23:02:52.269804 Set Vref, RX VrefLevel [Byte0]: 76
1110 23:02:52.273603 [Byte1]: 76
1111 23:02:52.278011
1112 23:02:52.280608 Set Vref, RX VrefLevel [Byte0]: 77
1113 23:02:52.280699 [Byte1]: 77
1114 23:02:52.285030
1115 23:02:52.285124 Set Vref, RX VrefLevel [Byte0]: 78
1116 23:02:52.288471 [Byte1]: 78
1117 23:02:52.293544
1118 23:02:52.293645 Set Vref, RX VrefLevel [Byte0]: 79
1119 23:02:52.296602 [Byte1]: 79
1120 23:02:52.300373
1121 23:02:52.300464 Set Vref, RX VrefLevel [Byte0]: 80
1122 23:02:52.303654 [Byte1]: 80
1123 23:02:52.308305
1124 23:02:52.308413 Set Vref, RX VrefLevel [Byte0]: 81
1125 23:02:52.311751 [Byte1]: 81
1126 23:02:52.316309
1127 23:02:52.316407 Set Vref, RX VrefLevel [Byte0]: 82
1128 23:02:52.319670 [Byte1]: 82
1129 23:02:52.323521
1130 23:02:52.323617 Final RX Vref Byte 0 = 63 to rank0
1131 23:02:52.326841 Final RX Vref Byte 1 = 57 to rank0
1132 23:02:52.330536 Final RX Vref Byte 0 = 63 to rank1
1133 23:02:52.334235 Final RX Vref Byte 1 = 57 to rank1==
1134 23:02:52.338433 Dram Type= 6, Freq= 0, CH_0, rank 0
1135 23:02:52.341480 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1136 23:02:52.341577 ==
1137 23:02:52.341664 DQS Delay:
1138 23:02:52.344932 DQS0 = 0, DQS1 = 0
1139 23:02:52.345020 DQM Delay:
1140 23:02:52.348905 DQM0 = 87, DQM1 = 75
1141 23:02:52.348998 DQ Delay:
1142 23:02:52.352498 DQ0 =84, DQ1 =92, DQ2 =84, DQ3 =84
1143 23:02:52.356095 DQ4 =88, DQ5 =76, DQ6 =92, DQ7 =96
1144 23:02:52.359828 DQ8 =68, DQ9 =64, DQ10 =76, DQ11 =68
1145 23:02:52.362908 DQ12 =80, DQ13 =76, DQ14 =88, DQ15 =84
1146 23:02:52.363003
1147 23:02:52.363089
1148 23:02:52.370437 [DQSOSCAuto] RK0, (LSB)MR18= 0x4324, (MSB)MR19= 0x606, tDQSOscB0 = 400 ps tDQSOscB1 = 393 ps
1149 23:02:52.374295 CH0 RK0: MR19=606, MR18=4324
1150 23:02:52.377712 CH0_RK0: MR19=0x606, MR18=0x4324, DQSOSC=393, MR23=63, INC=95, DEC=63
1151 23:02:52.377805
1152 23:02:52.381602 ----->DramcWriteLeveling(PI) begin...
1153 23:02:52.381693 ==
1154 23:02:52.385345 Dram Type= 6, Freq= 0, CH_0, rank 1
1155 23:02:52.388770 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1156 23:02:52.388865 ==
1157 23:02:52.392297 Write leveling (Byte 0): 32 => 32
1158 23:02:52.396331 Write leveling (Byte 1): 31 => 31
1159 23:02:52.440282 DramcWriteLeveling(PI) end<-----
1160 23:02:52.440419
1161 23:02:52.440487 ==
1162 23:02:52.440548 Dram Type= 6, Freq= 0, CH_0, rank 1
1163 23:02:52.440801 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1164 23:02:52.440872 ==
1165 23:02:52.440930 [Gating] SW mode calibration
1166 23:02:52.440992 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1167 23:02:52.441243 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1168 23:02:52.441748 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1169 23:02:52.442390 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1170 23:02:52.442472 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1171 23:02:52.442722 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1172 23:02:52.484110 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1173 23:02:52.484440 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1174 23:02:52.484513 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1175 23:02:52.484766 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1176 23:02:52.485582 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1177 23:02:52.486149 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1178 23:02:52.486428 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1179 23:02:52.486518 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1180 23:02:52.486594 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1181 23:02:52.486654 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1182 23:02:52.528514 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1183 23:02:52.529194 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1184 23:02:52.529311 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1185 23:02:52.529588 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1186 23:02:52.529673 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)
1187 23:02:52.529924 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1188 23:02:52.530017 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1189 23:02:52.530109 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1190 23:02:52.530214 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1191 23:02:52.530305 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1192 23:02:52.572689 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1193 23:02:52.573021 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1194 23:02:52.573098 0 9 8 | B1->B0 | 2323 2d2d | 0 1 | (0 0) (0 0)
1195 23:02:52.573180 0 9 12 | B1->B0 | 3433 3434 | 1 1 | (1 1) (1 1)
1196 23:02:52.573771 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1197 23:02:52.574233 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1198 23:02:52.574976 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1199 23:02:52.575058 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1200 23:02:52.575481 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1201 23:02:52.575745 0 10 4 | B1->B0 | 3434 2f2f | 1 1 | (1 1) (1 1)
1202 23:02:52.610110 0 10 8 | B1->B0 | 3131 2d2d | 0 0 | (0 1) (1 1)
1203 23:02:52.610441 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1204 23:02:52.610525 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1205 23:02:52.610598 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1206 23:02:52.610949 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1207 23:02:52.611763 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1208 23:02:52.612025 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1209 23:02:52.612093 0 11 4 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
1210 23:02:52.613054 0 11 8 | B1->B0 | 2f2f 4343 | 0 0 | (0 0) (0 0)
1211 23:02:52.615559 0 11 12 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)
1212 23:02:52.619090 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1213 23:02:52.622971 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1214 23:02:52.630119 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1215 23:02:52.634153 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1216 23:02:52.637927 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1217 23:02:52.641395 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1218 23:02:52.645708 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1219 23:02:52.649550 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1220 23:02:52.656262 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1221 23:02:52.659932 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1222 23:02:52.663705 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1223 23:02:52.667595 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1224 23:02:52.671261 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1225 23:02:52.678675 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1226 23:02:52.681861 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1227 23:02:52.685910 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1228 23:02:52.689404 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1229 23:02:52.693174 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1230 23:02:52.700001 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1231 23:02:52.704001 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1232 23:02:52.707862 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1233 23:02:52.711082 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1234 23:02:52.718016 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1235 23:02:52.721810 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
1236 23:02:52.725689 Total UI for P1: 0, mck2ui 16
1237 23:02:52.728712 best dqsien dly found for B0: ( 0, 14, 8)
1238 23:02:52.732646 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1239 23:02:52.735722 Total UI for P1: 0, mck2ui 16
1240 23:02:52.738969 best dqsien dly found for B1: ( 0, 14, 10)
1241 23:02:52.742301 best DQS0 dly(MCK, UI, PI) = (0, 14, 8)
1242 23:02:52.745299 best DQS1 dly(MCK, UI, PI) = (0, 14, 10)
1243 23:02:52.745386
1244 23:02:52.749067 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)
1245 23:02:52.752367 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 10)
1246 23:02:52.755716 [Gating] SW calibration Done
1247 23:02:52.755800 ==
1248 23:02:52.759423 Dram Type= 6, Freq= 0, CH_0, rank 1
1249 23:02:52.762068 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1250 23:02:52.762152 ==
1251 23:02:52.765786 RX Vref Scan: 0
1252 23:02:52.765869
1253 23:02:52.768916 RX Vref 0 -> 0, step: 1
1254 23:02:52.768999
1255 23:02:52.769062 RX Delay -130 -> 252, step: 16
1256 23:02:52.775225 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
1257 23:02:52.778572 iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240
1258 23:02:52.781886 iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240
1259 23:02:52.785174 iDelay=222, Bit 3, Center 77 (-50 ~ 205) 256
1260 23:02:52.789202 iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240
1261 23:02:52.795200 iDelay=222, Bit 5, Center 69 (-50 ~ 189) 240
1262 23:02:52.799059 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1263 23:02:52.802322 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
1264 23:02:52.805608 iDelay=222, Bit 8, Center 61 (-66 ~ 189) 256
1265 23:02:52.808749 iDelay=222, Bit 9, Center 61 (-66 ~ 189) 256
1266 23:02:52.815601 iDelay=222, Bit 10, Center 77 (-50 ~ 205) 256
1267 23:02:52.819171 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
1268 23:02:52.821987 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1269 23:02:52.825344 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1270 23:02:52.831943 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
1271 23:02:52.835143 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1272 23:02:52.835238 ==
1273 23:02:52.838637 Dram Type= 6, Freq= 0, CH_0, rank 1
1274 23:02:52.841483 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1275 23:02:52.841568 ==
1276 23:02:52.845189 DQS Delay:
1277 23:02:52.845272 DQS0 = 0, DQS1 = 0
1278 23:02:52.845336 DQM Delay:
1279 23:02:52.848440 DQM0 = 86, DQM1 = 76
1280 23:02:52.848525 DQ Delay:
1281 23:02:52.851748 DQ0 =85, DQ1 =85, DQ2 =85, DQ3 =77
1282 23:02:52.855572 DQ4 =85, DQ5 =69, DQ6 =101, DQ7 =101
1283 23:02:52.858346 DQ8 =61, DQ9 =61, DQ10 =77, DQ11 =69
1284 23:02:52.861597 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1285 23:02:52.861684
1286 23:02:52.861749
1287 23:02:52.861807 ==
1288 23:02:52.865083 Dram Type= 6, Freq= 0, CH_0, rank 1
1289 23:02:52.871628 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1290 23:02:52.871737 ==
1291 23:02:52.871805
1292 23:02:52.871865
1293 23:02:52.871922 TX Vref Scan disable
1294 23:02:52.875043 == TX Byte 0 ==
1295 23:02:52.878449 Update DQ dly =583 (2 ,1, 39) DQ OEN =(1 ,6)
1296 23:02:52.884783 Update DQM dly =583 (2 ,1, 39) DQM OEN =(1 ,6)
1297 23:02:52.884889 == TX Byte 1 ==
1298 23:02:52.888155 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1299 23:02:52.894914 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1300 23:02:52.895031 ==
1301 23:02:52.898250 Dram Type= 6, Freq= 0, CH_0, rank 1
1302 23:02:52.901591 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1303 23:02:52.901678 ==
1304 23:02:52.914376 TX Vref=22, minBit 3, minWin=27, winSum=441
1305 23:02:52.917566 TX Vref=24, minBit 11, minWin=27, winSum=448
1306 23:02:52.921058 TX Vref=26, minBit 9, minWin=27, winSum=445
1307 23:02:52.924393 TX Vref=28, minBit 9, minWin=27, winSum=448
1308 23:02:52.927618 TX Vref=30, minBit 9, minWin=27, winSum=445
1309 23:02:52.934377 TX Vref=32, minBit 9, minWin=27, winSum=444
1310 23:02:52.937250 [TxChooseVref] Worse bit 11, Min win 27, Win sum 448, Final Vref 24
1311 23:02:52.937342
1312 23:02:52.940601 Final TX Range 1 Vref 24
1313 23:02:52.940684
1314 23:02:52.940747 ==
1315 23:02:52.943862 Dram Type= 6, Freq= 0, CH_0, rank 1
1316 23:02:52.947471 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1317 23:02:52.950686 ==
1318 23:02:52.950768
1319 23:02:52.950831
1320 23:02:52.950890 TX Vref Scan disable
1321 23:02:52.954461 == TX Byte 0 ==
1322 23:02:52.957548 Update DQ dly =582 (2 ,1, 38) DQ OEN =(1 ,6)
1323 23:02:52.964259 Update DQM dly =582 (2 ,1, 38) DQM OEN =(1 ,6)
1324 23:02:52.964361 == TX Byte 1 ==
1325 23:02:52.967776 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1326 23:02:52.974332 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1327 23:02:52.974438
1328 23:02:52.974503 [DATLAT]
1329 23:02:52.974561 Freq=800, CH0 RK1
1330 23:02:52.974617
1331 23:02:52.977841 DATLAT Default: 0xa
1332 23:02:52.977938 0, 0xFFFF, sum = 0
1333 23:02:52.980883 1, 0xFFFF, sum = 0
1334 23:02:52.980967 2, 0xFFFF, sum = 0
1335 23:02:52.984146 3, 0xFFFF, sum = 0
1336 23:02:52.987908 4, 0xFFFF, sum = 0
1337 23:02:52.987999 5, 0xFFFF, sum = 0
1338 23:02:52.990562 6, 0xFFFF, sum = 0
1339 23:02:52.990646 7, 0xFFFF, sum = 0
1340 23:02:52.994204 8, 0xFFFF, sum = 0
1341 23:02:52.994293 9, 0x0, sum = 1
1342 23:02:52.997362 10, 0x0, sum = 2
1343 23:02:52.997498 11, 0x0, sum = 3
1344 23:02:52.997564 12, 0x0, sum = 4
1345 23:02:53.000733 best_step = 10
1346 23:02:53.000816
1347 23:02:53.000879 ==
1348 23:02:53.003968 Dram Type= 6, Freq= 0, CH_0, rank 1
1349 23:02:53.007365 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1350 23:02:53.007452 ==
1351 23:02:53.010397 RX Vref Scan: 0
1352 23:02:53.010484
1353 23:02:53.014147 RX Vref 0 -> 0, step: 1
1354 23:02:53.014230
1355 23:02:53.014293 RX Delay -111 -> 252, step: 8
1356 23:02:53.021170 iDelay=209, Bit 0, Center 84 (-31 ~ 200) 232
1357 23:02:53.024591 iDelay=209, Bit 1, Center 92 (-23 ~ 208) 232
1358 23:02:53.027864 iDelay=209, Bit 2, Center 80 (-31 ~ 192) 224
1359 23:02:53.030922 iDelay=209, Bit 3, Center 84 (-31 ~ 200) 232
1360 23:02:53.034479 iDelay=209, Bit 4, Center 84 (-31 ~ 200) 232
1361 23:02:53.041155 iDelay=209, Bit 5, Center 76 (-39 ~ 192) 232
1362 23:02:53.043803 iDelay=209, Bit 6, Center 96 (-15 ~ 208) 224
1363 23:02:53.047298 iDelay=209, Bit 7, Center 92 (-23 ~ 208) 232
1364 23:02:53.050924 iDelay=209, Bit 8, Center 68 (-47 ~ 184) 232
1365 23:02:53.057220 iDelay=209, Bit 9, Center 60 (-55 ~ 176) 232
1366 23:02:53.060654 iDelay=209, Bit 10, Center 80 (-39 ~ 200) 240
1367 23:02:53.064097 iDelay=209, Bit 11, Center 68 (-47 ~ 184) 232
1368 23:02:53.067225 iDelay=209, Bit 12, Center 84 (-31 ~ 200) 232
1369 23:02:53.070316 iDelay=209, Bit 13, Center 84 (-31 ~ 200) 232
1370 23:02:53.077082 iDelay=209, Bit 14, Center 88 (-23 ~ 200) 224
1371 23:02:53.080524 iDelay=209, Bit 15, Center 84 (-31 ~ 200) 232
1372 23:02:53.080652 ==
1373 23:02:53.083498 Dram Type= 6, Freq= 0, CH_0, rank 1
1374 23:02:53.087536 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1375 23:02:53.087644 ==
1376 23:02:53.090462 DQS Delay:
1377 23:02:53.090548 DQS0 = 0, DQS1 = 0
1378 23:02:53.090613 DQM Delay:
1379 23:02:53.093722 DQM0 = 86, DQM1 = 77
1380 23:02:53.093833 DQ Delay:
1381 23:02:53.097031 DQ0 =84, DQ1 =92, DQ2 =80, DQ3 =84
1382 23:02:53.100201 DQ4 =84, DQ5 =76, DQ6 =96, DQ7 =92
1383 23:02:53.103736 DQ8 =68, DQ9 =60, DQ10 =80, DQ11 =68
1384 23:02:53.107061 DQ12 =84, DQ13 =84, DQ14 =88, DQ15 =84
1385 23:02:53.107156
1386 23:02:53.107243
1387 23:02:53.116793 [DQSOSCAuto] RK1, (LSB)MR18= 0x4309, (MSB)MR19= 0x606, tDQSOscB0 = 407 ps tDQSOscB1 = 393 ps
1388 23:02:53.120048 CH0 RK1: MR19=606, MR18=4309
1389 23:02:53.123470 CH0_RK1: MR19=0x606, MR18=0x4309, DQSOSC=393, MR23=63, INC=95, DEC=63
1390 23:02:53.126557 [RxdqsGatingPostProcess] freq 800
1391 23:02:53.133352 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1392 23:02:53.136479 Pre-setting of DQS Precalculation
1393 23:02:53.139923 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
1394 23:02:53.140026 ==
1395 23:02:53.143401 Dram Type= 6, Freq= 0, CH_1, rank 0
1396 23:02:53.149949 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1397 23:02:53.150067 ==
1398 23:02:53.153659 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1399 23:02:53.159851 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1400 23:02:53.169774 [CA 0] Center 36 (6~67) winsize 62
1401 23:02:53.172650 [CA 1] Center 36 (6~67) winsize 62
1402 23:02:53.175880 [CA 2] Center 34 (4~65) winsize 62
1403 23:02:53.179377 [CA 3] Center 34 (3~65) winsize 63
1404 23:02:53.182636 [CA 4] Center 34 (4~65) winsize 62
1405 23:02:53.185774 [CA 5] Center 34 (3~65) winsize 63
1406 23:02:53.185867
1407 23:02:53.189206 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1408 23:02:53.189297
1409 23:02:53.192633 [CATrainingPosCal] consider 1 rank data
1410 23:02:53.196174 u2DelayCellTimex100 = 270/100 ps
1411 23:02:53.199541 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1412 23:02:53.205583 CA1 delay=36 (6~67),Diff = 2 PI (14 cell)
1413 23:02:53.208943 CA2 delay=34 (4~65),Diff = 0 PI (0 cell)
1414 23:02:53.212125 CA3 delay=34 (3~65),Diff = 0 PI (0 cell)
1415 23:02:53.215747 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1416 23:02:53.219177 CA5 delay=34 (3~65),Diff = 0 PI (0 cell)
1417 23:02:53.219278
1418 23:02:53.222709 CA PerBit enable=1, Macro0, CA PI delay=34
1419 23:02:53.222801
1420 23:02:53.225457 [CBTSetCACLKResult] CA Dly = 34
1421 23:02:53.225544 CS Dly: 4 (0~35)
1422 23:02:53.228789 ==
1423 23:02:53.232331 Dram Type= 6, Freq= 0, CH_1, rank 1
1424 23:02:53.235886 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1425 23:02:53.235981 ==
1426 23:02:53.239272 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1427 23:02:53.245312 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1428 23:02:53.255451 [CA 0] Center 36 (6~67) winsize 62
1429 23:02:53.258971 [CA 1] Center 36 (6~67) winsize 62
1430 23:02:53.262357 [CA 2] Center 34 (4~65) winsize 62
1431 23:02:53.265699 [CA 3] Center 34 (3~65) winsize 63
1432 23:02:53.268719 [CA 4] Center 34 (4~65) winsize 62
1433 23:02:53.272368 [CA 5] Center 33 (3~64) winsize 62
1434 23:02:53.272462
1435 23:02:53.275294 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1436 23:02:53.275381
1437 23:02:53.278435 [CATrainingPosCal] consider 2 rank data
1438 23:02:53.281733 u2DelayCellTimex100 = 270/100 ps
1439 23:02:53.285469 CA0 delay=36 (6~67),Diff = 3 PI (21 cell)
1440 23:02:53.291928 CA1 delay=36 (6~67),Diff = 3 PI (21 cell)
1441 23:02:53.295454 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
1442 23:02:53.298811 CA3 delay=34 (3~65),Diff = 1 PI (7 cell)
1443 23:02:53.302325 CA4 delay=34 (4~65),Diff = 1 PI (7 cell)
1444 23:02:53.305512 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
1445 23:02:53.305604
1446 23:02:53.308626 CA PerBit enable=1, Macro0, CA PI delay=33
1447 23:02:53.308711
1448 23:02:53.311997 [CBTSetCACLKResult] CA Dly = 33
1449 23:02:53.312088 CS Dly: 5 (0~38)
1450 23:02:53.315179
1451 23:02:53.318441 ----->DramcWriteLeveling(PI) begin...
1452 23:02:53.318529 ==
1453 23:02:53.321735 Dram Type= 6, Freq= 0, CH_1, rank 0
1454 23:02:53.325256 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1455 23:02:53.325343 ==
1456 23:02:53.328222 Write leveling (Byte 0): 27 => 27
1457 23:02:53.332052 Write leveling (Byte 1): 29 => 29
1458 23:02:53.335272 DramcWriteLeveling(PI) end<-----
1459 23:02:53.335358
1460 23:02:53.335423 ==
1461 23:02:53.338465 Dram Type= 6, Freq= 0, CH_1, rank 0
1462 23:02:53.341376 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1463 23:02:53.341467 ==
1464 23:02:53.344980 [Gating] SW mode calibration
1465 23:02:53.351724 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1466 23:02:53.358205 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1467 23:02:53.361629 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1468 23:02:53.364896 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1469 23:02:53.371460 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1470 23:02:53.374709 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1471 23:02:53.377941 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1472 23:02:53.384393 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1473 23:02:53.387681 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1474 23:02:53.391125 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1475 23:02:53.398010 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1476 23:02:53.401286 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1477 23:02:53.404352 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1478 23:02:53.411082 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1479 23:02:53.414260 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1480 23:02:53.417779 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1481 23:02:53.423965 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1482 23:02:53.427579 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1483 23:02:53.431992 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
1484 23:02:53.437750 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 1)
1485 23:02:53.440853 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
1486 23:02:53.444212 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1487 23:02:53.451107 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1488 23:02:53.453933 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1489 23:02:53.457480 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1490 23:02:53.460647 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1491 23:02:53.467414 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1492 23:02:53.470931 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1493 23:02:53.474249 0 9 8 | B1->B0 | 2b2b 3333 | 1 0 | (1 1) (0 0)
1494 23:02:53.480749 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1495 23:02:53.483975 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1496 23:02:53.486880 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1497 23:02:53.494016 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1498 23:02:53.497122 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1499 23:02:53.500182 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1500 23:02:53.507069 0 10 4 | B1->B0 | 3333 3434 | 1 0 | (1 0) (1 1)
1501 23:02:53.510793 0 10 8 | B1->B0 | 2e2e 2727 | 0 0 | (0 0) (0 0)
1502 23:02:53.513620 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1503 23:02:53.521106 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1504 23:02:53.523734 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1505 23:02:53.526874 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1506 23:02:53.533380 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1507 23:02:53.536896 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1508 23:02:53.540439 0 11 4 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
1509 23:02:53.547040 0 11 8 | B1->B0 | 3e3e 4343 | 1 0 | (1 1) (0 0)
1510 23:02:53.550482 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1511 23:02:53.553665 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1512 23:02:53.560302 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1513 23:02:53.563826 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1514 23:02:53.566658 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1515 23:02:53.573150 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1516 23:02:53.576433 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
1517 23:02:53.580204 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1518 23:02:53.586921 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1519 23:02:53.589636 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1520 23:02:53.593657 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1521 23:02:53.600155 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1522 23:02:53.603597 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1523 23:02:53.606414 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1524 23:02:53.613250 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1525 23:02:53.616400 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1526 23:02:53.620100 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1527 23:02:53.626224 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1528 23:02:53.629617 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1529 23:02:53.632942 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1530 23:02:53.640068 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1531 23:02:53.642946 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1532 23:02:53.646149 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
1533 23:02:53.649473 Total UI for P1: 0, mck2ui 16
1534 23:02:53.653006 best dqsien dly found for B0: ( 0, 14, 2)
1535 23:02:53.656474 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1536 23:02:53.659287 Total UI for P1: 0, mck2ui 16
1537 23:02:53.662837 best dqsien dly found for B1: ( 0, 14, 4)
1538 23:02:53.669284 best DQS0 dly(MCK, UI, PI) = (0, 14, 2)
1539 23:02:53.672361 best DQS1 dly(MCK, UI, PI) = (0, 14, 4)
1540 23:02:53.672482
1541 23:02:53.675976 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 2)
1542 23:02:53.679450 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 4)
1543 23:02:53.682707 [Gating] SW calibration Done
1544 23:02:53.682824 ==
1545 23:02:53.685715 Dram Type= 6, Freq= 0, CH_1, rank 0
1546 23:02:53.689299 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1547 23:02:53.689385 ==
1548 23:02:53.692907 RX Vref Scan: 0
1549 23:02:53.692991
1550 23:02:53.693055 RX Vref 0 -> 0, step: 1
1551 23:02:53.693116
1552 23:02:53.695784 RX Delay -130 -> 252, step: 16
1553 23:02:53.699727 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1554 23:02:53.702915 iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240
1555 23:02:53.709275 iDelay=222, Bit 2, Center 77 (-34 ~ 189) 224
1556 23:02:53.713256 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
1557 23:02:53.715878 iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240
1558 23:02:53.719069 iDelay=222, Bit 5, Center 101 (-18 ~ 221) 240
1559 23:02:53.725819 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1560 23:02:53.729576 iDelay=222, Bit 7, Center 85 (-34 ~ 205) 240
1561 23:02:53.732682 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
1562 23:02:53.735563 iDelay=222, Bit 9, Center 69 (-50 ~ 189) 240
1563 23:02:53.739034 iDelay=222, Bit 10, Center 77 (-50 ~ 205) 256
1564 23:02:53.745569 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
1565 23:02:53.749528 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1566 23:02:53.752152 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1567 23:02:53.755570 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
1568 23:02:53.758591 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1569 23:02:53.762210 ==
1570 23:02:53.765444 Dram Type= 6, Freq= 0, CH_1, rank 0
1571 23:02:53.768597 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1572 23:02:53.768699 ==
1573 23:02:53.768794 DQS Delay:
1574 23:02:53.772356 DQS0 = 0, DQS1 = 0
1575 23:02:53.772465 DQM Delay:
1576 23:02:53.775802 DQM0 = 89, DQM1 = 78
1577 23:02:53.775887 DQ Delay:
1578 23:02:53.778805 DQ0 =93, DQ1 =85, DQ2 =77, DQ3 =85
1579 23:02:53.781956 DQ4 =85, DQ5 =101, DQ6 =101, DQ7 =85
1580 23:02:53.785082 DQ8 =69, DQ9 =69, DQ10 =77, DQ11 =69
1581 23:02:53.788633 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1582 23:02:53.788724
1583 23:02:53.788790
1584 23:02:53.788847 ==
1585 23:02:53.791769 Dram Type= 6, Freq= 0, CH_1, rank 0
1586 23:02:53.795625 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1587 23:02:53.795719 ==
1588 23:02:53.795785
1589 23:02:53.795844
1590 23:02:53.798599 TX Vref Scan disable
1591 23:02:53.802303 == TX Byte 0 ==
1592 23:02:53.805187 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1593 23:02:53.808234 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1594 23:02:53.811931 == TX Byte 1 ==
1595 23:02:53.814902 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1596 23:02:53.818323 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1597 23:02:53.818433 ==
1598 23:02:53.821826 Dram Type= 6, Freq= 0, CH_1, rank 0
1599 23:02:53.827943 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1600 23:02:53.828042 ==
1601 23:02:53.840565 TX Vref=22, minBit 8, minWin=26, winSum=441
1602 23:02:53.843498 TX Vref=24, minBit 0, minWin=27, winSum=448
1603 23:02:53.846867 TX Vref=26, minBit 8, minWin=27, winSum=450
1604 23:02:53.850445 TX Vref=28, minBit 9, minWin=27, winSum=452
1605 23:02:53.853317 TX Vref=30, minBit 9, minWin=27, winSum=448
1606 23:02:53.859849 TX Vref=32, minBit 9, minWin=27, winSum=446
1607 23:02:53.863057 [TxChooseVref] Worse bit 9, Min win 27, Win sum 452, Final Vref 28
1608 23:02:53.863141
1609 23:02:53.866454 Final TX Range 1 Vref 28
1610 23:02:53.866563
1611 23:02:53.866630 ==
1612 23:02:53.869997 Dram Type= 6, Freq= 0, CH_1, rank 0
1613 23:02:53.873053 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1614 23:02:53.876245 ==
1615 23:02:53.876332
1616 23:02:53.876397
1617 23:02:53.876457 TX Vref Scan disable
1618 23:02:53.880331 == TX Byte 0 ==
1619 23:02:53.883200 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1620 23:02:53.889867 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1621 23:02:53.889972 == TX Byte 1 ==
1622 23:02:53.893419 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1623 23:02:53.899736 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1624 23:02:53.899831
1625 23:02:53.899897 [DATLAT]
1626 23:02:53.899957 Freq=800, CH1 RK0
1627 23:02:53.900015
1628 23:02:53.903689 DATLAT Default: 0xa
1629 23:02:53.903774 0, 0xFFFF, sum = 0
1630 23:02:53.906436 1, 0xFFFF, sum = 0
1631 23:02:53.909587 2, 0xFFFF, sum = 0
1632 23:02:53.909704 3, 0xFFFF, sum = 0
1633 23:02:53.913341 4, 0xFFFF, sum = 0
1634 23:02:53.913475 5, 0xFFFF, sum = 0
1635 23:02:53.916186 6, 0xFFFF, sum = 0
1636 23:02:53.916269 7, 0xFFFF, sum = 0
1637 23:02:53.919669 8, 0xFFFF, sum = 0
1638 23:02:53.919753 9, 0x0, sum = 1
1639 23:02:53.923084 10, 0x0, sum = 2
1640 23:02:53.923168 11, 0x0, sum = 3
1641 23:02:53.923232 12, 0x0, sum = 4
1642 23:02:53.926302 best_step = 10
1643 23:02:53.926384
1644 23:02:53.926448 ==
1645 23:02:53.929564 Dram Type= 6, Freq= 0, CH_1, rank 0
1646 23:02:53.932711 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1647 23:02:53.932796 ==
1648 23:02:53.936111 RX Vref Scan: 1
1649 23:02:53.936193
1650 23:02:53.939614 Set Vref Range= 32 -> 127
1651 23:02:53.939699
1652 23:02:53.939764 RX Vref 32 -> 127, step: 1
1653 23:02:53.939824
1654 23:02:53.943099 RX Delay -95 -> 252, step: 8
1655 23:02:53.943183
1656 23:02:53.946594 Set Vref, RX VrefLevel [Byte0]: 32
1657 23:02:53.949718 [Byte1]: 32
1658 23:02:53.952841
1659 23:02:53.952923 Set Vref, RX VrefLevel [Byte0]: 33
1660 23:02:53.956149 [Byte1]: 33
1661 23:02:53.960794
1662 23:02:53.960883 Set Vref, RX VrefLevel [Byte0]: 34
1663 23:02:53.963837 [Byte1]: 34
1664 23:02:53.968012
1665 23:02:53.968098 Set Vref, RX VrefLevel [Byte0]: 35
1666 23:02:53.974604 [Byte1]: 35
1667 23:02:53.974698
1668 23:02:53.977521 Set Vref, RX VrefLevel [Byte0]: 36
1669 23:02:53.981152 [Byte1]: 36
1670 23:02:53.981237
1671 23:02:53.984617 Set Vref, RX VrefLevel [Byte0]: 37
1672 23:02:53.987461 [Byte1]: 37
1673 23:02:53.987545
1674 23:02:53.990735 Set Vref, RX VrefLevel [Byte0]: 38
1675 23:02:53.995141 [Byte1]: 38
1676 23:02:53.998053
1677 23:02:53.998139 Set Vref, RX VrefLevel [Byte0]: 39
1678 23:02:54.001809 [Byte1]: 39
1679 23:02:54.006697
1680 23:02:54.006790 Set Vref, RX VrefLevel [Byte0]: 40
1681 23:02:54.009268 [Byte1]: 40
1682 23:02:54.013570
1683 23:02:54.013664 Set Vref, RX VrefLevel [Byte0]: 41
1684 23:02:54.017192 [Byte1]: 41
1685 23:02:54.020935
1686 23:02:54.021020 Set Vref, RX VrefLevel [Byte0]: 42
1687 23:02:54.024119 [Byte1]: 42
1688 23:02:54.028700
1689 23:02:54.028798 Set Vref, RX VrefLevel [Byte0]: 43
1690 23:02:54.031729 [Byte1]: 43
1691 23:02:54.036247
1692 23:02:54.036340 Set Vref, RX VrefLevel [Byte0]: 44
1693 23:02:54.040044 [Byte1]: 44
1694 23:02:54.044001
1695 23:02:54.044094 Set Vref, RX VrefLevel [Byte0]: 45
1696 23:02:54.047220 [Byte1]: 45
1697 23:02:54.051407
1698 23:02:54.051504 Set Vref, RX VrefLevel [Byte0]: 46
1699 23:02:54.054837 [Byte1]: 46
1700 23:02:54.059058
1701 23:02:54.059180 Set Vref, RX VrefLevel [Byte0]: 47
1702 23:02:54.062530 [Byte1]: 47
1703 23:02:54.067148
1704 23:02:54.067241 Set Vref, RX VrefLevel [Byte0]: 48
1705 23:02:54.073337 [Byte1]: 48
1706 23:02:54.073461
1707 23:02:54.076521 Set Vref, RX VrefLevel [Byte0]: 49
1708 23:02:54.079556 [Byte1]: 49
1709 23:02:54.079647
1710 23:02:54.083021 Set Vref, RX VrefLevel [Byte0]: 50
1711 23:02:54.086401 [Byte1]: 50
1712 23:02:54.086490
1713 23:02:54.089579 Set Vref, RX VrefLevel [Byte0]: 51
1714 23:02:54.093171 [Byte1]: 51
1715 23:02:54.096945
1716 23:02:54.097033 Set Vref, RX VrefLevel [Byte0]: 52
1717 23:02:54.100552 [Byte1]: 52
1718 23:02:54.104444
1719 23:02:54.104533 Set Vref, RX VrefLevel [Byte0]: 53
1720 23:02:54.107751 [Byte1]: 53
1721 23:02:54.112398
1722 23:02:54.112499 Set Vref, RX VrefLevel [Byte0]: 54
1723 23:02:54.115804 [Byte1]: 54
1724 23:02:54.119855
1725 23:02:54.119939 Set Vref, RX VrefLevel [Byte0]: 55
1726 23:02:54.122805 [Byte1]: 55
1727 23:02:54.127954
1728 23:02:54.128047 Set Vref, RX VrefLevel [Byte0]: 56
1729 23:02:54.130446 [Byte1]: 56
1730 23:02:54.135129
1731 23:02:54.135217 Set Vref, RX VrefLevel [Byte0]: 57
1732 23:02:54.137995 [Byte1]: 57
1733 23:02:54.142671
1734 23:02:54.142760 Set Vref, RX VrefLevel [Byte0]: 58
1735 23:02:54.145797 [Byte1]: 58
1736 23:02:54.150036
1737 23:02:54.150126 Set Vref, RX VrefLevel [Byte0]: 59
1738 23:02:54.153385 [Byte1]: 59
1739 23:02:54.157689
1740 23:02:54.157782 Set Vref, RX VrefLevel [Byte0]: 60
1741 23:02:54.161325 [Byte1]: 60
1742 23:02:54.165974
1743 23:02:54.166093 Set Vref, RX VrefLevel [Byte0]: 61
1744 23:02:54.168942 [Byte1]: 61
1745 23:02:54.172739
1746 23:02:54.172859 Set Vref, RX VrefLevel [Byte0]: 62
1747 23:02:54.176345 [Byte1]: 62
1748 23:02:54.180471
1749 23:02:54.180565 Set Vref, RX VrefLevel [Byte0]: 63
1750 23:02:54.183664 [Byte1]: 63
1751 23:02:54.187874
1752 23:02:54.187967 Set Vref, RX VrefLevel [Byte0]: 64
1753 23:02:54.191757 [Byte1]: 64
1754 23:02:54.195748
1755 23:02:54.195846 Set Vref, RX VrefLevel [Byte0]: 65
1756 23:02:54.198838 [Byte1]: 65
1757 23:02:54.203120
1758 23:02:54.203215 Set Vref, RX VrefLevel [Byte0]: 66
1759 23:02:54.206567 [Byte1]: 66
1760 23:02:54.211433
1761 23:02:54.211541 Set Vref, RX VrefLevel [Byte0]: 67
1762 23:02:54.214352 [Byte1]: 67
1763 23:02:54.218436
1764 23:02:54.218528 Set Vref, RX VrefLevel [Byte0]: 68
1765 23:02:54.221779 [Byte1]: 68
1766 23:02:54.226185
1767 23:02:54.226279 Set Vref, RX VrefLevel [Byte0]: 69
1768 23:02:54.229567 [Byte1]: 69
1769 23:02:54.233628
1770 23:02:54.233789 Set Vref, RX VrefLevel [Byte0]: 70
1771 23:02:54.236777 [Byte1]: 70
1772 23:02:54.242464
1773 23:02:54.242559 Set Vref, RX VrefLevel [Byte0]: 71
1774 23:02:54.244343 [Byte1]: 71
1775 23:02:54.248781
1776 23:02:54.248871 Set Vref, RX VrefLevel [Byte0]: 72
1777 23:02:54.252137 [Byte1]: 72
1778 23:02:54.256401
1779 23:02:54.256498 Set Vref, RX VrefLevel [Byte0]: 73
1780 23:02:54.259795 [Byte1]: 73
1781 23:02:54.264297
1782 23:02:54.264414 Set Vref, RX VrefLevel [Byte0]: 74
1783 23:02:54.267346 [Byte1]: 74
1784 23:02:54.271915
1785 23:02:54.272016 Final RX Vref Byte 0 = 54 to rank0
1786 23:02:54.274955 Final RX Vref Byte 1 = 64 to rank0
1787 23:02:54.278056 Final RX Vref Byte 0 = 54 to rank1
1788 23:02:54.282451 Final RX Vref Byte 1 = 64 to rank1==
1789 23:02:54.285133 Dram Type= 6, Freq= 0, CH_1, rank 0
1790 23:02:54.291823 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1791 23:02:54.291935 ==
1792 23:02:54.292027 DQS Delay:
1793 23:02:54.292109 DQS0 = 0, DQS1 = 0
1794 23:02:54.295093 DQM Delay:
1795 23:02:54.295181 DQM0 = 87, DQM1 = 79
1796 23:02:54.298487 DQ Delay:
1797 23:02:54.301663 DQ0 =92, DQ1 =80, DQ2 =76, DQ3 =84
1798 23:02:54.305256 DQ4 =84, DQ5 =96, DQ6 =100, DQ7 =84
1799 23:02:54.305353 DQ8 =68, DQ9 =68, DQ10 =80, DQ11 =68
1800 23:02:54.311479 DQ12 =88, DQ13 =84, DQ14 =88, DQ15 =88
1801 23:02:54.311590
1802 23:02:54.311681
1803 23:02:54.318121 [DQSOSCAuto] RK0, (LSB)MR18= 0x3622, (MSB)MR19= 0x606, tDQSOscB0 = 401 ps tDQSOscB1 = 396 ps
1804 23:02:54.321346 CH1 RK0: MR19=606, MR18=3622
1805 23:02:54.328072 CH1_RK0: MR19=0x606, MR18=0x3622, DQSOSC=396, MR23=63, INC=94, DEC=62
1806 23:02:54.328183
1807 23:02:54.331759 ----->DramcWriteLeveling(PI) begin...
1808 23:02:54.331856 ==
1809 23:02:54.335124 Dram Type= 6, Freq= 0, CH_1, rank 1
1810 23:02:54.338242 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1811 23:02:54.338331 ==
1812 23:02:54.341712 Write leveling (Byte 0): 27 => 27
1813 23:02:54.345310 Write leveling (Byte 1): 28 => 28
1814 23:02:54.348323 DramcWriteLeveling(PI) end<-----
1815 23:02:54.348414
1816 23:02:54.348500 ==
1817 23:02:54.351990 Dram Type= 6, Freq= 0, CH_1, rank 1
1818 23:02:54.354982 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1819 23:02:54.355074 ==
1820 23:02:54.358463 [Gating] SW mode calibration
1821 23:02:54.364674 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1822 23:02:54.371788 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1823 23:02:54.375193 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1824 23:02:54.378054 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1825 23:02:54.384815 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1826 23:02:54.388164 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1827 23:02:54.391622 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1828 23:02:54.398263 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1829 23:02:54.401278 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1830 23:02:54.404613 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1831 23:02:54.411435 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1832 23:02:54.414783 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1833 23:02:54.417934 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1834 23:02:54.424897 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1835 23:02:54.427949 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1836 23:02:54.431016 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1837 23:02:54.437614 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1838 23:02:54.441557 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1839 23:02:54.444390 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1840 23:02:54.451040 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 1)
1841 23:02:54.454817 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1842 23:02:54.457801 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1843 23:02:54.464830 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1844 23:02:54.467665 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1845 23:02:54.470904 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1846 23:02:54.477773 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1847 23:02:54.480898 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1848 23:02:54.484787 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1849 23:02:54.491338 0 9 8 | B1->B0 | 3030 2929 | 1 1 | (1 1) (0 0)
1850 23:02:54.494449 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1851 23:02:54.497738 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1852 23:02:54.501790 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1853 23:02:54.507642 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1854 23:02:54.511195 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1855 23:02:54.514438 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1856 23:02:54.521140 0 10 4 | B1->B0 | 3434 3333 | 1 1 | (1 0) (1 0)
1857 23:02:54.524789 0 10 8 | B1->B0 | 2525 2f2f | 0 0 | (0 0) (0 0)
1858 23:02:54.527538 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1859 23:02:54.534463 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1860 23:02:54.537552 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1861 23:02:54.541228 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1862 23:02:54.547529 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1863 23:02:54.550742 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1864 23:02:54.554662 0 11 4 | B1->B0 | 2828 2323 | 0 0 | (0 0) (0 0)
1865 23:02:54.560772 0 11 8 | B1->B0 | 4646 3b3b | 0 0 | (0 0) (0 0)
1866 23:02:54.564153 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1867 23:02:54.567422 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1868 23:02:54.574400 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1869 23:02:54.577593 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1870 23:02:54.581146 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1871 23:02:54.587463 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1872 23:02:54.591073 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1873 23:02:54.593910 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1874 23:02:54.600409 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1875 23:02:54.603992 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1876 23:02:54.607135 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1877 23:02:54.613862 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1878 23:02:54.617055 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1879 23:02:54.620792 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1880 23:02:54.627504 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1881 23:02:54.630776 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1882 23:02:54.634036 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1883 23:02:54.640475 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1884 23:02:54.643617 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1885 23:02:54.646727 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1886 23:02:54.653813 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1887 23:02:54.656714 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1888 23:02:54.660621 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1889 23:02:54.663429 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
1890 23:02:54.667259 Total UI for P1: 0, mck2ui 16
1891 23:02:54.670415 best dqsien dly found for B1: ( 0, 14, 4)
1892 23:02:54.677047 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1893 23:02:54.680671 Total UI for P1: 0, mck2ui 16
1894 23:02:54.683916 best dqsien dly found for B0: ( 0, 14, 6)
1895 23:02:54.686745 best DQS0 dly(MCK, UI, PI) = (0, 14, 6)
1896 23:02:54.689938 best DQS1 dly(MCK, UI, PI) = (0, 14, 4)
1897 23:02:54.690043
1898 23:02:54.693372 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 6)
1899 23:02:54.697152 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 4)
1900 23:02:54.699821 [Gating] SW calibration Done
1901 23:02:54.699910 ==
1902 23:02:54.703540 Dram Type= 6, Freq= 0, CH_1, rank 1
1903 23:02:54.706671 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1904 23:02:54.706759 ==
1905 23:02:54.709893 RX Vref Scan: 0
1906 23:02:54.709978
1907 23:02:54.710044 RX Vref 0 -> 0, step: 1
1908 23:02:54.710104
1909 23:02:54.713470 RX Delay -130 -> 252, step: 16
1910 23:02:54.720285 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
1911 23:02:54.723462 iDelay=222, Bit 1, Center 77 (-34 ~ 189) 224
1912 23:02:54.726881 iDelay=222, Bit 2, Center 69 (-50 ~ 189) 240
1913 23:02:54.730257 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
1914 23:02:54.733118 iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240
1915 23:02:54.739923 iDelay=222, Bit 5, Center 101 (-18 ~ 221) 240
1916 23:02:54.742985 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1917 23:02:54.746353 iDelay=222, Bit 7, Center 85 (-34 ~ 205) 240
1918 23:02:54.749555 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
1919 23:02:54.753253 iDelay=222, Bit 9, Center 69 (-50 ~ 189) 240
1920 23:02:54.759691 iDelay=222, Bit 10, Center 77 (-50 ~ 205) 256
1921 23:02:54.763247 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
1922 23:02:54.766346 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1923 23:02:54.769833 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1924 23:02:54.773142 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
1925 23:02:54.779624 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1926 23:02:54.779759 ==
1927 23:02:54.782763 Dram Type= 6, Freq= 0, CH_1, rank 1
1928 23:02:54.785981 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1929 23:02:54.786067 ==
1930 23:02:54.786132 DQS Delay:
1931 23:02:54.789305 DQS0 = 0, DQS1 = 0
1932 23:02:54.789403 DQM Delay:
1933 23:02:54.792912 DQM0 = 86, DQM1 = 78
1934 23:02:54.792997 DQ Delay:
1935 23:02:54.796393 DQ0 =85, DQ1 =77, DQ2 =69, DQ3 =85
1936 23:02:54.799247 DQ4 =85, DQ5 =101, DQ6 =101, DQ7 =85
1937 23:02:54.802771 DQ8 =69, DQ9 =69, DQ10 =77, DQ11 =69
1938 23:02:54.805920 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1939 23:02:54.806013
1940 23:02:54.806079
1941 23:02:54.806138 ==
1942 23:02:54.809841 Dram Type= 6, Freq= 0, CH_1, rank 1
1943 23:02:54.812725 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1944 23:02:54.815916 ==
1945 23:02:54.816009
1946 23:02:54.816072
1947 23:02:54.816132 TX Vref Scan disable
1948 23:02:54.819205 == TX Byte 0 ==
1949 23:02:54.823142 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1950 23:02:54.826246 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1951 23:02:54.829360 == TX Byte 1 ==
1952 23:02:54.832620 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1953 23:02:54.840083 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1954 23:02:54.840192 ==
1955 23:02:54.842308 Dram Type= 6, Freq= 0, CH_1, rank 1
1956 23:02:54.845559 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1957 23:02:54.845648 ==
1958 23:02:54.858678 TX Vref=22, minBit 8, minWin=26, winSum=444
1959 23:02:54.861771 TX Vref=24, minBit 9, minWin=27, winSum=444
1960 23:02:54.865020 TX Vref=26, minBit 13, minWin=27, winSum=452
1961 23:02:54.868034 TX Vref=28, minBit 13, minWin=27, winSum=451
1962 23:02:54.871371 TX Vref=30, minBit 13, minWin=27, winSum=450
1963 23:02:54.878090 TX Vref=32, minBit 8, minWin=27, winSum=446
1964 23:02:54.882055 [TxChooseVref] Worse bit 13, Min win 27, Win sum 452, Final Vref 26
1965 23:02:54.882154
1966 23:02:54.884578 Final TX Range 1 Vref 26
1967 23:02:54.884673
1968 23:02:54.884765 ==
1969 23:02:54.888578 Dram Type= 6, Freq= 0, CH_1, rank 1
1970 23:02:54.891372 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1971 23:02:54.894519 ==
1972 23:02:54.894610
1973 23:02:54.894675
1974 23:02:54.894733 TX Vref Scan disable
1975 23:02:54.898559 == TX Byte 0 ==
1976 23:02:54.901967 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1977 23:02:54.905795 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1978 23:02:54.908924 == TX Byte 1 ==
1979 23:02:54.911722 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1980 23:02:54.918205 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1981 23:02:54.918317
1982 23:02:54.918387 [DATLAT]
1983 23:02:54.918448 Freq=800, CH1 RK1
1984 23:02:54.918507
1985 23:02:54.922088 DATLAT Default: 0xa
1986 23:02:54.922175 0, 0xFFFF, sum = 0
1987 23:02:54.924917 1, 0xFFFF, sum = 0
1988 23:02:54.928232 2, 0xFFFF, sum = 0
1989 23:02:54.928321 3, 0xFFFF, sum = 0
1990 23:02:54.931516 4, 0xFFFF, sum = 0
1991 23:02:54.931605 5, 0xFFFF, sum = 0
1992 23:02:54.935160 6, 0xFFFF, sum = 0
1993 23:02:54.935249 7, 0xFFFF, sum = 0
1994 23:02:54.938481 8, 0xFFFF, sum = 0
1995 23:02:54.938567 9, 0x0, sum = 1
1996 23:02:54.941729 10, 0x0, sum = 2
1997 23:02:54.941815 11, 0x0, sum = 3
1998 23:02:54.941881 12, 0x0, sum = 4
1999 23:02:54.944884 best_step = 10
2000 23:02:54.944966
2001 23:02:54.945031 ==
2002 23:02:54.948295 Dram Type= 6, Freq= 0, CH_1, rank 1
2003 23:02:54.951423 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2004 23:02:54.951511 ==
2005 23:02:54.954694 RX Vref Scan: 0
2006 23:02:54.954779
2007 23:02:54.957834 RX Vref 0 -> 0, step: 1
2008 23:02:54.957918
2009 23:02:54.957984 RX Delay -95 -> 252, step: 8
2010 23:02:54.965435 iDelay=217, Bit 0, Center 92 (-23 ~ 208) 232
2011 23:02:54.968656 iDelay=217, Bit 1, Center 80 (-31 ~ 192) 224
2012 23:02:54.972020 iDelay=217, Bit 2, Center 76 (-39 ~ 192) 232
2013 23:02:54.975202 iDelay=217, Bit 3, Center 88 (-23 ~ 200) 224
2014 23:02:54.978763 iDelay=217, Bit 4, Center 88 (-31 ~ 208) 240
2015 23:02:54.985184 iDelay=217, Bit 5, Center 96 (-15 ~ 208) 224
2016 23:02:54.988533 iDelay=217, Bit 6, Center 100 (-15 ~ 216) 232
2017 23:02:54.991842 iDelay=217, Bit 7, Center 84 (-31 ~ 200) 232
2018 23:02:54.995004 iDelay=217, Bit 8, Center 68 (-47 ~ 184) 232
2019 23:02:54.998796 iDelay=217, Bit 9, Center 68 (-47 ~ 184) 232
2020 23:02:55.004771 iDelay=217, Bit 10, Center 80 (-39 ~ 200) 240
2021 23:02:55.008337 iDelay=217, Bit 11, Center 68 (-47 ~ 184) 232
2022 23:02:55.011985 iDelay=217, Bit 12, Center 84 (-31 ~ 200) 232
2023 23:02:55.015095 iDelay=217, Bit 13, Center 84 (-31 ~ 200) 232
2024 23:02:55.022056 iDelay=217, Bit 14, Center 84 (-31 ~ 200) 232
2025 23:02:55.025352 iDelay=217, Bit 15, Center 88 (-31 ~ 208) 240
2026 23:02:55.025497 ==
2027 23:02:55.028848 Dram Type= 6, Freq= 0, CH_1, rank 1
2028 23:02:55.031999 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2029 23:02:55.032112 ==
2030 23:02:55.032208 DQS Delay:
2031 23:02:55.035415 DQS0 = 0, DQS1 = 0
2032 23:02:55.035527 DQM Delay:
2033 23:02:55.038301 DQM0 = 88, DQM1 = 78
2034 23:02:55.038385 DQ Delay:
2035 23:02:55.042054 DQ0 =92, DQ1 =80, DQ2 =76, DQ3 =88
2036 23:02:55.044860 DQ4 =88, DQ5 =96, DQ6 =100, DQ7 =84
2037 23:02:55.048118 DQ8 =68, DQ9 =68, DQ10 =80, DQ11 =68
2038 23:02:55.051863 DQ12 =84, DQ13 =84, DQ14 =84, DQ15 =88
2039 23:02:55.051982
2040 23:02:55.052076
2041 23:02:55.061855 [DQSOSCAuto] RK1, (LSB)MR18= 0x1c14, (MSB)MR19= 0x606, tDQSOscB0 = 404 ps tDQSOscB1 = 402 ps
2042 23:02:55.061967 CH1 RK1: MR19=606, MR18=1C14
2043 23:02:55.068086 CH1_RK1: MR19=0x606, MR18=0x1C14, DQSOSC=402, MR23=63, INC=91, DEC=60
2044 23:02:55.071742 [RxdqsGatingPostProcess] freq 800
2045 23:02:55.077878 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
2046 23:02:55.081658 Pre-setting of DQS Precalculation
2047 23:02:55.084855 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
2048 23:02:55.091413 sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4
2049 23:02:55.101676 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
2050 23:02:55.101799
2051 23:02:55.101869
2052 23:02:55.104338 [Calibration Summary] 1600 Mbps
2053 23:02:55.104423 CH 0, Rank 0
2054 23:02:55.108556 SW Impedance : PASS
2055 23:02:55.108642 DUTY Scan : NO K
2056 23:02:55.111039 ZQ Calibration : PASS
2057 23:02:55.114366 Jitter Meter : NO K
2058 23:02:55.114460 CBT Training : PASS
2059 23:02:55.117617 Write leveling : PASS
2060 23:02:55.120887 RX DQS gating : PASS
2061 23:02:55.120976 RX DQ/DQS(RDDQC) : PASS
2062 23:02:55.124249 TX DQ/DQS : PASS
2063 23:02:55.124335 RX DATLAT : PASS
2064 23:02:55.128192 RX DQ/DQS(Engine): PASS
2065 23:02:55.130834 TX OE : NO K
2066 23:02:55.130925 All Pass.
2067 23:02:55.130991
2068 23:02:55.131052 CH 0, Rank 1
2069 23:02:55.134393 SW Impedance : PASS
2070 23:02:55.138043 DUTY Scan : NO K
2071 23:02:55.138138 ZQ Calibration : PASS
2072 23:02:55.140786 Jitter Meter : NO K
2073 23:02:55.144209 CBT Training : PASS
2074 23:02:55.144297 Write leveling : PASS
2075 23:02:55.147332 RX DQS gating : PASS
2076 23:02:55.151030 RX DQ/DQS(RDDQC) : PASS
2077 23:02:55.151119 TX DQ/DQS : PASS
2078 23:02:55.154307 RX DATLAT : PASS
2079 23:02:55.157448 RX DQ/DQS(Engine): PASS
2080 23:02:55.157559 TX OE : NO K
2081 23:02:55.160576 All Pass.
2082 23:02:55.160675
2083 23:02:55.160741 CH 1, Rank 0
2084 23:02:55.163862 SW Impedance : PASS
2085 23:02:55.163978 DUTY Scan : NO K
2086 23:02:55.167285 ZQ Calibration : PASS
2087 23:02:55.170811 Jitter Meter : NO K
2088 23:02:55.170900 CBT Training : PASS
2089 23:02:55.173873 Write leveling : PASS
2090 23:02:55.177526 RX DQS gating : PASS
2091 23:02:55.177617 RX DQ/DQS(RDDQC) : PASS
2092 23:02:55.180982 TX DQ/DQS : PASS
2093 23:02:55.183862 RX DATLAT : PASS
2094 23:02:55.183951 RX DQ/DQS(Engine): PASS
2095 23:02:55.187364 TX OE : NO K
2096 23:02:55.187452 All Pass.
2097 23:02:55.187518
2098 23:02:55.190402 CH 1, Rank 1
2099 23:02:55.190487 SW Impedance : PASS
2100 23:02:55.194253 DUTY Scan : NO K
2101 23:02:55.194341 ZQ Calibration : PASS
2102 23:02:55.196958 Jitter Meter : NO K
2103 23:02:55.200392 CBT Training : PASS
2104 23:02:55.200480 Write leveling : PASS
2105 23:02:55.203531 RX DQS gating : PASS
2106 23:02:55.207151 RX DQ/DQS(RDDQC) : PASS
2107 23:02:55.207241 TX DQ/DQS : PASS
2108 23:02:55.210940 RX DATLAT : PASS
2109 23:02:55.213635 RX DQ/DQS(Engine): PASS
2110 23:02:55.213739 TX OE : NO K
2111 23:02:55.216851 All Pass.
2112 23:02:55.216949
2113 23:02:55.217015 DramC Write-DBI off
2114 23:02:55.220497 PER_BANK_REFRESH: Hybrid Mode
2115 23:02:55.223754 TX_TRACKING: ON
2116 23:02:55.227327 [GetDramInforAfterCalByMRR] Vendor 6.
2117 23:02:55.230357 [GetDramInforAfterCalByMRR] Revision 606.
2118 23:02:55.233262 [GetDramInforAfterCalByMRR] Revision 2 0.
2119 23:02:55.233379 MR0 0x3b3b
2120 23:02:55.233526 MR8 0x5151
2121 23:02:55.236901 RK0, DieNum 2, Density 16Gb, RKsize 32Gb.
2122 23:02:55.240049
2123 23:02:55.240157 MR0 0x3b3b
2124 23:02:55.240252 MR8 0x5151
2125 23:02:55.243347 RK1, DieNum 2, Density 16Gb, RKsize 32Gb.
2126 23:02:55.243462
2127 23:02:55.253784 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
2128 23:02:55.256997 [FAST_K] Save calibration result to emmc
2129 23:02:55.260718 [FAST_K] Save calibration result to emmc
2130 23:02:55.263276 dram_init: config_dvfs: 1
2131 23:02:55.266610 dramc_set_vcore_voltage set vcore to 662500
2132 23:02:55.270710 Read voltage for 1200, 2
2133 23:02:55.270808 Vio18 = 0
2134 23:02:55.270874 Vcore = 662500
2135 23:02:55.273132 Vdram = 0
2136 23:02:55.273214 Vddq = 0
2137 23:02:55.273279 Vmddr = 0
2138 23:02:55.279924 [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0
2139 23:02:55.283371 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
2140 23:02:55.286484 MEM_TYPE=3, freq_sel=15
2141 23:02:55.289996 sv_algorithm_assistance_LP4_1600
2142 23:02:55.293018 ============ PULL DRAM RESETB DOWN ============
2143 23:02:55.299647 ========== PULL DRAM RESETB DOWN end =========
2144 23:02:55.303162 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2145 23:02:55.306517 ===================================
2146 23:02:55.309743 LPDDR4 DRAM CONFIGURATION
2147 23:02:55.313192 ===================================
2148 23:02:55.313292 EX_ROW_EN[0] = 0x0
2149 23:02:55.316364 EX_ROW_EN[1] = 0x0
2150 23:02:55.316448 LP4Y_EN = 0x0
2151 23:02:55.320143 WORK_FSP = 0x0
2152 23:02:55.320227 WL = 0x4
2153 23:02:55.323015 RL = 0x4
2154 23:02:55.323098 BL = 0x2
2155 23:02:55.327143 RPST = 0x0
2156 23:02:55.327227 RD_PRE = 0x0
2157 23:02:55.330067 WR_PRE = 0x1
2158 23:02:55.330150 WR_PST = 0x0
2159 23:02:55.333151 DBI_WR = 0x0
2160 23:02:55.333234 DBI_RD = 0x0
2161 23:02:55.336409 OTF = 0x1
2162 23:02:55.339665 ===================================
2163 23:02:55.343061 ===================================
2164 23:02:55.343148 ANA top config
2165 23:02:55.346250 ===================================
2166 23:02:55.350354 DLL_ASYNC_EN = 0
2167 23:02:55.352825 ALL_SLAVE_EN = 0
2168 23:02:55.356186 NEW_RANK_MODE = 1
2169 23:02:55.356273 DLL_IDLE_MODE = 1
2170 23:02:55.359488 LP45_APHY_COMB_EN = 1
2171 23:02:55.362814 TX_ODT_DIS = 1
2172 23:02:55.366447 NEW_8X_MODE = 1
2173 23:02:55.369675 ===================================
2174 23:02:55.373305 ===================================
2175 23:02:55.376617 data_rate = 2400
2176 23:02:55.379636 CKR = 1
2177 23:02:55.379725 DQ_P2S_RATIO = 8
2178 23:02:55.382918 ===================================
2179 23:02:55.386307 CA_P2S_RATIO = 8
2180 23:02:55.389383 DQ_CA_OPEN = 0
2181 23:02:55.393166 DQ_SEMI_OPEN = 0
2182 23:02:55.396248 CA_SEMI_OPEN = 0
2183 23:02:55.396341 CA_FULL_RATE = 0
2184 23:02:55.400024 DQ_CKDIV4_EN = 0
2185 23:02:55.402729 CA_CKDIV4_EN = 0
2186 23:02:55.406337 CA_PREDIV_EN = 0
2187 23:02:55.409487 PH8_DLY = 17
2188 23:02:55.412827 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
2189 23:02:55.413032 DQ_AAMCK_DIV = 4
2190 23:02:55.416011 CA_AAMCK_DIV = 4
2191 23:02:55.419988 CA_ADMCK_DIV = 4
2192 23:02:55.422609 DQ_TRACK_CA_EN = 0
2193 23:02:55.426286 CA_PICK = 1200
2194 23:02:55.429722 CA_MCKIO = 1200
2195 23:02:55.432585 MCKIO_SEMI = 0
2196 23:02:55.432672 PLL_FREQ = 2366
2197 23:02:55.436385 DQ_UI_PI_RATIO = 32
2198 23:02:55.439425 CA_UI_PI_RATIO = 0
2199 23:02:55.442783 ===================================
2200 23:02:55.446813 ===================================
2201 23:02:55.449370 memory_type:LPDDR4
2202 23:02:55.453084 GP_NUM : 10
2203 23:02:55.453170 SRAM_EN : 1
2204 23:02:55.456114 MD32_EN : 0
2205 23:02:55.459298 ===================================
2206 23:02:55.459381 [ANA_INIT] >>>>>>>>>>>>>>
2207 23:02:55.462741 <<<<<< [CONFIGURE PHASE]: ANA_TX
2208 23:02:55.465883 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
2209 23:02:55.469071 ===================================
2210 23:02:55.472637 data_rate = 2400,PCW = 0X5b00
2211 23:02:55.475797 ===================================
2212 23:02:55.479293 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
2213 23:02:55.485740 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2214 23:02:55.492606 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2215 23:02:55.495626 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
2216 23:02:55.499262 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
2217 23:02:55.502581 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
2218 23:02:55.506237 [ANA_INIT] flow start
2219 23:02:55.506332 [ANA_INIT] PLL >>>>>>>>
2220 23:02:55.508833 [ANA_INIT] PLL <<<<<<<<
2221 23:02:55.512385 [ANA_INIT] MIDPI >>>>>>>>
2222 23:02:55.512472 [ANA_INIT] MIDPI <<<<<<<<
2223 23:02:55.515656 [ANA_INIT] DLL >>>>>>>>
2224 23:02:55.518942 [ANA_INIT] DLL <<<<<<<<
2225 23:02:55.519031 [ANA_INIT] flow end
2226 23:02:55.525710 ============ LP4 DIFF to SE enter ============
2227 23:02:55.528648 ============ LP4 DIFF to SE exit ============
2228 23:02:55.532493 [ANA_INIT] <<<<<<<<<<<<<
2229 23:02:55.535469 [Flow] Enable top DCM control >>>>>
2230 23:02:55.538618 [Flow] Enable top DCM control <<<<<
2231 23:02:55.538700 Enable DLL master slave shuffle
2232 23:02:55.545622 ==============================================================
2233 23:02:55.548771 Gating Mode config
2234 23:02:55.551823 ==============================================================
2235 23:02:55.555520 Config description:
2236 23:02:55.565267 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
2237 23:02:55.572331 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
2238 23:02:55.575543 SELPH_MODE 0: By rank 1: By Phase
2239 23:02:55.581819 ==============================================================
2240 23:02:55.585346 GAT_TRACK_EN = 1
2241 23:02:55.588611 RX_GATING_MODE = 2
2242 23:02:55.591825 RX_GATING_TRACK_MODE = 2
2243 23:02:55.594974 SELPH_MODE = 1
2244 23:02:55.595056 PICG_EARLY_EN = 1
2245 23:02:55.598372 VALID_LAT_VALUE = 1
2246 23:02:55.604969 ==============================================================
2247 23:02:55.608391 Enter into Gating configuration >>>>
2248 23:02:55.611738 Exit from Gating configuration <<<<
2249 23:02:55.615202 Enter into DVFS_PRE_config >>>>>
2250 23:02:55.625961 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
2251 23:02:55.628291 Exit from DVFS_PRE_config <<<<<
2252 23:02:55.631965 Enter into PICG configuration >>>>
2253 23:02:55.634920 Exit from PICG configuration <<<<
2254 23:02:55.638067 [RX_INPUT] configuration >>>>>
2255 23:02:55.641427 [RX_INPUT] configuration <<<<<
2256 23:02:55.644869 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
2257 23:02:55.651742 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
2258 23:02:55.658011 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
2259 23:02:55.664693 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
2260 23:02:55.671448 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
2261 23:02:55.675320 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
2262 23:02:55.681595 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
2263 23:02:55.684834 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
2264 23:02:55.687985 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
2265 23:02:55.691719 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
2266 23:02:55.697774 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
2267 23:02:55.701692 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2268 23:02:55.704727 ===================================
2269 23:02:55.708089 LPDDR4 DRAM CONFIGURATION
2270 23:02:55.711134 ===================================
2271 23:02:55.711215 EX_ROW_EN[0] = 0x0
2272 23:02:55.714427 EX_ROW_EN[1] = 0x0
2273 23:02:55.714509 LP4Y_EN = 0x0
2274 23:02:55.717645 WORK_FSP = 0x0
2275 23:02:55.717725 WL = 0x4
2276 23:02:55.721043 RL = 0x4
2277 23:02:55.721123 BL = 0x2
2278 23:02:55.724056 RPST = 0x0
2279 23:02:55.727566 RD_PRE = 0x0
2280 23:02:55.727646 WR_PRE = 0x1
2281 23:02:55.730800 WR_PST = 0x0
2282 23:02:55.730881 DBI_WR = 0x0
2283 23:02:55.734962 DBI_RD = 0x0
2284 23:02:55.735042 OTF = 0x1
2285 23:02:55.738097 ===================================
2286 23:02:55.741059 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
2287 23:02:55.747225 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
2288 23:02:55.751394 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2289 23:02:55.754031 ===================================
2290 23:02:55.757690 LPDDR4 DRAM CONFIGURATION
2291 23:02:55.761166 ===================================
2292 23:02:55.761248 EX_ROW_EN[0] = 0x10
2293 23:02:55.764014 EX_ROW_EN[1] = 0x0
2294 23:02:55.764097 LP4Y_EN = 0x0
2295 23:02:55.767238 WORK_FSP = 0x0
2296 23:02:55.767319 WL = 0x4
2297 23:02:55.770698 RL = 0x4
2298 23:02:55.770777 BL = 0x2
2299 23:02:55.773779 RPST = 0x0
2300 23:02:55.773859 RD_PRE = 0x0
2301 23:02:55.777274 WR_PRE = 0x1
2302 23:02:55.780383 WR_PST = 0x0
2303 23:02:55.780462 DBI_WR = 0x0
2304 23:02:55.783645 DBI_RD = 0x0
2305 23:02:55.783726 OTF = 0x1
2306 23:02:55.787566 ===================================
2307 23:02:55.793986 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
2308 23:02:55.794066 ==
2309 23:02:55.797069 Dram Type= 6, Freq= 0, CH_0, rank 0
2310 23:02:55.800453 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2311 23:02:55.800534 ==
2312 23:02:55.804260 [Duty_Offset_Calibration]
2313 23:02:55.806755 B0:1 B1:-1 CA:0
2314 23:02:55.806834
2315 23:02:55.810703 [DutyScan_Calibration_Flow] k_type=0
2316 23:02:55.818301
2317 23:02:55.818384 ==CLK 0==
2318 23:02:55.821788 Final CLK duty delay cell = 0
2319 23:02:55.824872 [0] MAX Duty = 5125%(X100), DQS PI = 24
2320 23:02:55.828188 [0] MIN Duty = 4875%(X100), DQS PI = 8
2321 23:02:55.828268 [0] AVG Duty = 5000%(X100)
2322 23:02:55.828330
2323 23:02:55.831641 CH0 CLK Duty spec in!! Max-Min= 250%
2324 23:02:55.838169 [DutyScan_Calibration_Flow] ====Done====
2325 23:02:55.838249
2326 23:02:55.841416 [DutyScan_Calibration_Flow] k_type=1
2327 23:02:55.855877
2328 23:02:55.855959 ==DQS 0 ==
2329 23:02:55.859459 Final DQS duty delay cell = -4
2330 23:02:55.862448 [-4] MAX Duty = 5062%(X100), DQS PI = 16
2331 23:02:55.865881 [-4] MIN Duty = 4875%(X100), DQS PI = 8
2332 23:02:55.869389 [-4] AVG Duty = 4968%(X100)
2333 23:02:55.869475
2334 23:02:55.869538 ==DQS 1 ==
2335 23:02:55.872759 Final DQS duty delay cell = -4
2336 23:02:55.875653 [-4] MAX Duty = 5000%(X100), DQS PI = 8
2337 23:02:55.878935 [-4] MIN Duty = 4876%(X100), DQS PI = 20
2338 23:02:55.882451 [-4] AVG Duty = 4938%(X100)
2339 23:02:55.882531
2340 23:02:55.886008 CH0 DQS 0 Duty spec in!! Max-Min= 187%
2341 23:02:55.886093
2342 23:02:55.889215 CH0 DQS 1 Duty spec in!! Max-Min= 124%
2343 23:02:55.892938 [DutyScan_Calibration_Flow] ====Done====
2344 23:02:55.893021
2345 23:02:55.895929 [DutyScan_Calibration_Flow] k_type=3
2346 23:02:55.913972
2347 23:02:55.914055 ==DQM 0 ==
2348 23:02:55.917166 Final DQM duty delay cell = 0
2349 23:02:55.920621 [0] MAX Duty = 5031%(X100), DQS PI = 16
2350 23:02:55.923686 [0] MIN Duty = 4875%(X100), DQS PI = 8
2351 23:02:55.923765 [0] AVG Duty = 4953%(X100)
2352 23:02:55.927133
2353 23:02:55.927212 ==DQM 1 ==
2354 23:02:55.930185 Final DQM duty delay cell = 4
2355 23:02:55.934168 [4] MAX Duty = 5187%(X100), DQS PI = 14
2356 23:02:55.936778 [4] MIN Duty = 5000%(X100), DQS PI = 22
2357 23:02:55.940413 [4] AVG Duty = 5093%(X100)
2358 23:02:55.940491
2359 23:02:55.943843 CH0 DQM 0 Duty spec in!! Max-Min= 156%
2360 23:02:55.943922
2361 23:02:55.946767 CH0 DQM 1 Duty spec in!! Max-Min= 187%
2362 23:02:55.950113 [DutyScan_Calibration_Flow] ====Done====
2363 23:02:55.950193
2364 23:02:55.953765 [DutyScan_Calibration_Flow] k_type=2
2365 23:02:55.969303
2366 23:02:55.969416 ==DQ 0 ==
2367 23:02:55.972006 Final DQ duty delay cell = -4
2368 23:02:55.975674 [-4] MAX Duty = 5031%(X100), DQS PI = 22
2369 23:02:55.978699 [-4] MIN Duty = 4907%(X100), DQS PI = 48
2370 23:02:55.982054 [-4] AVG Duty = 4969%(X100)
2371 23:02:55.982132
2372 23:02:55.982193 ==DQ 1 ==
2373 23:02:55.985319 Final DQ duty delay cell = -4
2374 23:02:55.988964 [-4] MAX Duty = 5000%(X100), DQS PI = 54
2375 23:02:55.991842 [-4] MIN Duty = 4876%(X100), DQS PI = 16
2376 23:02:55.995200 [-4] AVG Duty = 4938%(X100)
2377 23:02:55.995278
2378 23:02:55.998575 CH0 DQ 0 Duty spec in!! Max-Min= 124%
2379 23:02:55.998653
2380 23:02:56.001988 CH0 DQ 1 Duty spec in!! Max-Min= 124%
2381 23:02:56.005199 [DutyScan_Calibration_Flow] ====Done====
2382 23:02:56.005277 ==
2383 23:02:56.008187 Dram Type= 6, Freq= 0, CH_1, rank 0
2384 23:02:56.011791 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2385 23:02:56.011871 ==
2386 23:02:56.014872 [Duty_Offset_Calibration]
2387 23:02:56.018668 B0:-1 B1:1 CA:1
2388 23:02:56.018749
2389 23:02:56.021562 [DutyScan_Calibration_Flow] k_type=0
2390 23:02:56.029922
2391 23:02:56.030001 ==CLK 0==
2392 23:02:56.032712 Final CLK duty delay cell = 0
2393 23:02:56.036189 [0] MAX Duty = 5156%(X100), DQS PI = 22
2394 23:02:56.040031 [0] MIN Duty = 4969%(X100), DQS PI = 62
2395 23:02:56.040111 [0] AVG Duty = 5062%(X100)
2396 23:02:56.042728
2397 23:02:56.046570 CH1 CLK Duty spec in!! Max-Min= 187%
2398 23:02:56.049311 [DutyScan_Calibration_Flow] ====Done====
2399 23:02:56.049439
2400 23:02:56.052803 [DutyScan_Calibration_Flow] k_type=1
2401 23:02:56.068867
2402 23:02:56.068962 ==DQS 0 ==
2403 23:02:56.072795 Final DQS duty delay cell = 0
2404 23:02:56.075722 [0] MAX Duty = 5125%(X100), DQS PI = 18
2405 23:02:56.079020 [0] MIN Duty = 4875%(X100), DQS PI = 8
2406 23:02:56.082255 [0] AVG Duty = 5000%(X100)
2407 23:02:56.082336
2408 23:02:56.082399 ==DQS 1 ==
2409 23:02:56.085372 Final DQS duty delay cell = 0
2410 23:02:56.088710 [0] MAX Duty = 5062%(X100), DQS PI = 6
2411 23:02:56.091870 [0] MIN Duty = 4969%(X100), DQS PI = 56
2412 23:02:56.091951 [0] AVG Duty = 5015%(X100)
2413 23:02:56.095664
2414 23:02:56.098455 CH1 DQS 0 Duty spec in!! Max-Min= 250%
2415 23:02:56.098536
2416 23:02:56.101772 CH1 DQS 1 Duty spec in!! Max-Min= 93%
2417 23:02:56.105100 [DutyScan_Calibration_Flow] ====Done====
2418 23:02:56.105180
2419 23:02:56.108516 [DutyScan_Calibration_Flow] k_type=3
2420 23:02:56.124243
2421 23:02:56.124367 ==DQM 0 ==
2422 23:02:56.127741 Final DQM duty delay cell = -4
2423 23:02:56.130937 [-4] MAX Duty = 5031%(X100), DQS PI = 16
2424 23:02:56.134061 [-4] MIN Duty = 4844%(X100), DQS PI = 8
2425 23:02:56.137607 [-4] AVG Duty = 4937%(X100)
2426 23:02:56.137688
2427 23:02:56.137752 ==DQM 1 ==
2428 23:02:56.140848 Final DQM duty delay cell = 0
2429 23:02:56.144379 [0] MAX Duty = 5187%(X100), DQS PI = 6
2430 23:02:56.147472 [0] MIN Duty = 4969%(X100), DQS PI = 30
2431 23:02:56.150764 [0] AVG Duty = 5078%(X100)
2432 23:02:56.150844
2433 23:02:56.154595 CH1 DQM 0 Duty spec in!! Max-Min= 187%
2434 23:02:56.154675
2435 23:02:56.157510 CH1 DQM 1 Duty spec in!! Max-Min= 218%
2436 23:02:56.160785 [DutyScan_Calibration_Flow] ====Done====
2437 23:02:56.160865
2438 23:02:56.164115 [DutyScan_Calibration_Flow] k_type=2
2439 23:02:56.180992
2440 23:02:56.181099 ==DQ 0 ==
2441 23:02:56.184442 Final DQ duty delay cell = 0
2442 23:02:56.188118 [0] MAX Duty = 5156%(X100), DQS PI = 28
2443 23:02:56.190877 [0] MIN Duty = 4907%(X100), DQS PI = 8
2444 23:02:56.190958 [0] AVG Duty = 5031%(X100)
2445 23:02:56.191024
2446 23:02:56.194545 ==DQ 1 ==
2447 23:02:56.197782 Final DQ duty delay cell = 0
2448 23:02:56.201399 [0] MAX Duty = 5124%(X100), DQS PI = 10
2449 23:02:56.204411 [0] MIN Duty = 4969%(X100), DQS PI = 0
2450 23:02:56.204492 [0] AVG Duty = 5046%(X100)
2451 23:02:56.204557
2452 23:02:56.207393 CH1 DQ 0 Duty spec in!! Max-Min= 249%
2453 23:02:56.207475
2454 23:02:56.214379 CH1 DQ 1 Duty spec in!! Max-Min= 155%
2455 23:02:56.217373 [DutyScan_Calibration_Flow] ====Done====
2456 23:02:56.220568 nWR fixed to 30
2457 23:02:56.220652 [ModeRegInit_LP4] CH0 RK0
2458 23:02:56.224411 [ModeRegInit_LP4] CH0 RK1
2459 23:02:56.227768 [ModeRegInit_LP4] CH1 RK0
2460 23:02:56.227849 [ModeRegInit_LP4] CH1 RK1
2461 23:02:56.231102 match AC timing 7
2462 23:02:56.233918 dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 1
2463 23:02:56.237229 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
2464 23:02:56.244167 [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12
2465 23:02:56.247398 [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25
2466 23:02:56.253773 [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)
2467 23:02:56.253862 ==
2468 23:02:56.257400 Dram Type= 6, Freq= 0, CH_0, rank 0
2469 23:02:56.260518 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2470 23:02:56.260603 ==
2471 23:02:56.266989 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2472 23:02:56.274204 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
2473 23:02:56.281224 [CA 0] Center 39 (9~70) winsize 62
2474 23:02:56.284250 [CA 1] Center 39 (9~69) winsize 61
2475 23:02:56.287440 [CA 2] Center 35 (5~66) winsize 62
2476 23:02:56.290526 [CA 3] Center 35 (5~66) winsize 62
2477 23:02:56.294446 [CA 4] Center 33 (4~63) winsize 60
2478 23:02:56.297182 [CA 5] Center 33 (3~63) winsize 61
2479 23:02:56.297268
2480 23:02:56.300819 [CmdBusTrainingLP45] Vref(ca) range 1: 33
2481 23:02:56.300902
2482 23:02:56.304259 [CATrainingPosCal] consider 1 rank data
2483 23:02:56.307625 u2DelayCellTimex100 = 270/100 ps
2484 23:02:56.310800 CA0 delay=39 (9~70),Diff = 6 PI (28 cell)
2485 23:02:56.317175 CA1 delay=39 (9~69),Diff = 6 PI (28 cell)
2486 23:02:56.320556 CA2 delay=35 (5~66),Diff = 2 PI (9 cell)
2487 23:02:56.323943 CA3 delay=35 (5~66),Diff = 2 PI (9 cell)
2488 23:02:56.327700 CA4 delay=33 (4~63),Diff = 0 PI (0 cell)
2489 23:02:56.330382 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
2490 23:02:56.330464
2491 23:02:56.333811 CA PerBit enable=1, Macro0, CA PI delay=33
2492 23:02:56.333893
2493 23:02:56.337415 [CBTSetCACLKResult] CA Dly = 33
2494 23:02:56.337532 CS Dly: 8 (0~39)
2495 23:02:56.340930 ==
2496 23:02:56.344204 Dram Type= 6, Freq= 0, CH_0, rank 1
2497 23:02:56.347224 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2498 23:02:56.347308 ==
2499 23:02:56.350211 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2500 23:02:56.357026 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2501 23:02:56.366447 [CA 0] Center 39 (9~70) winsize 62
2502 23:02:56.369557 [CA 1] Center 39 (9~70) winsize 62
2503 23:02:56.373151 [CA 2] Center 35 (5~66) winsize 62
2504 23:02:56.376332 [CA 3] Center 34 (4~65) winsize 62
2505 23:02:56.379925 [CA 4] Center 33 (3~64) winsize 62
2506 23:02:56.382975 [CA 5] Center 33 (3~63) winsize 61
2507 23:02:56.383058
2508 23:02:56.386502 [CmdBusTrainingLP45] Vref(ca) range 1: 35
2509 23:02:56.386609
2510 23:02:56.389547 [CATrainingPosCal] consider 2 rank data
2511 23:02:56.392991 u2DelayCellTimex100 = 270/100 ps
2512 23:02:56.395972 CA0 delay=39 (9~70),Diff = 6 PI (28 cell)
2513 23:02:56.402999 CA1 delay=39 (9~69),Diff = 6 PI (28 cell)
2514 23:02:56.406696 CA2 delay=35 (5~66),Diff = 2 PI (9 cell)
2515 23:02:56.409783 CA3 delay=35 (5~65),Diff = 2 PI (9 cell)
2516 23:02:56.413102 CA4 delay=33 (4~63),Diff = 0 PI (0 cell)
2517 23:02:56.416005 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
2518 23:02:56.416110
2519 23:02:56.419671 CA PerBit enable=1, Macro0, CA PI delay=33
2520 23:02:56.419764
2521 23:02:56.422678 [CBTSetCACLKResult] CA Dly = 33
2522 23:02:56.422764 CS Dly: 8 (0~40)
2523 23:02:56.426680
2524 23:02:56.429732 ----->DramcWriteLeveling(PI) begin...
2525 23:02:56.429823 ==
2526 23:02:56.433091 Dram Type= 6, Freq= 0, CH_0, rank 0
2527 23:02:56.435962 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2528 23:02:56.436058 ==
2529 23:02:56.439435 Write leveling (Byte 0): 32 => 32
2530 23:02:56.442748 Write leveling (Byte 1): 28 => 28
2531 23:02:56.445982 DramcWriteLeveling(PI) end<-----
2532 23:02:56.446078
2533 23:02:56.446143 ==
2534 23:02:56.449803 Dram Type= 6, Freq= 0, CH_0, rank 0
2535 23:02:56.453041 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2536 23:02:56.453132 ==
2537 23:02:56.456079 [Gating] SW mode calibration
2538 23:02:56.462460 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2539 23:02:56.469179 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2540 23:02:56.472340 0 15 0 | B1->B0 | 2323 3131 | 0 1 | (0 0) (1 1)
2541 23:02:56.475825 0 15 4 | B1->B0 | 2424 3434 | 1 1 | (1 1) (1 1)
2542 23:02:56.482345 0 15 8 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
2543 23:02:56.485599 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2544 23:02:56.488982 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2545 23:02:56.495563 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2546 23:02:56.498892 0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
2547 23:02:56.502471 0 15 28 | B1->B0 | 3434 2b2b | 1 0 | (1 1) (1 0)
2548 23:02:56.509455 1 0 0 | B1->B0 | 3232 2323 | 0 0 | (0 1) (0 0)
2549 23:02:56.512343 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
2550 23:02:56.515694 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2551 23:02:56.522385 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2552 23:02:56.525405 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2553 23:02:56.528981 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2554 23:02:56.535691 1 0 24 | B1->B0 | 2323 2424 | 0 1 | (0 0) (0 0)
2555 23:02:56.538980 1 0 28 | B1->B0 | 2323 3737 | 0 0 | (0 0) (0 0)
2556 23:02:56.541977 1 1 0 | B1->B0 | 2424 4646 | 0 0 | (0 0) (0 0)
2557 23:02:56.549426 1 1 4 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)
2558 23:02:56.552095 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2559 23:02:56.555474 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2560 23:02:56.559248 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2561 23:02:56.565545 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2562 23:02:56.569058 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2563 23:02:56.571867 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2564 23:02:56.578870 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2565 23:02:56.582045 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2566 23:02:56.585353 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2567 23:02:56.591709 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2568 23:02:56.595550 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2569 23:02:56.598634 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2570 23:02:56.605252 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2571 23:02:56.608503 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2572 23:02:56.612066 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2573 23:02:56.618679 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2574 23:02:56.622042 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2575 23:02:56.625050 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2576 23:02:56.631474 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2577 23:02:56.635030 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2578 23:02:56.638431 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2579 23:02:56.645157 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2580 23:02:56.648448 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2581 23:02:56.651510 Total UI for P1: 0, mck2ui 16
2582 23:02:56.654941 best dqsien dly found for B0: ( 1, 3, 28)
2583 23:02:56.658470 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2584 23:02:56.665251 1 4 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2585 23:02:56.665333 Total UI for P1: 0, mck2ui 16
2586 23:02:56.671939 best dqsien dly found for B1: ( 1, 4, 2)
2587 23:02:56.674991 best DQS0 dly(MCK, UI, PI) = (1, 3, 28)
2588 23:02:56.678138 best DQS1 dly(MCK, UI, PI) = (1, 4, 2)
2589 23:02:56.678219
2590 23:02:56.681209 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)
2591 23:02:56.685000 best DQS1 P1 dly(MCK, UI, PI) = (1, 8, 2)
2592 23:02:56.687877 [Gating] SW calibration Done
2593 23:02:56.687959 ==
2594 23:02:56.691572 Dram Type= 6, Freq= 0, CH_0, rank 0
2595 23:02:56.694827 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2596 23:02:56.694908 ==
2597 23:02:56.697842 RX Vref Scan: 0
2598 23:02:56.697923
2599 23:02:56.697986 RX Vref 0 -> 0, step: 1
2600 23:02:56.698045
2601 23:02:56.701363 RX Delay -40 -> 252, step: 8
2602 23:02:56.704531 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
2603 23:02:56.711346 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2604 23:02:56.714410 iDelay=200, Bit 2, Center 115 (40 ~ 191) 152
2605 23:02:56.717629 iDelay=200, Bit 3, Center 115 (40 ~ 191) 152
2606 23:02:56.721355 iDelay=200, Bit 4, Center 123 (48 ~ 199) 152
2607 23:02:56.724295 iDelay=200, Bit 5, Center 111 (40 ~ 183) 144
2608 23:02:56.730915 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2609 23:02:56.734134 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2610 23:02:56.737457 iDelay=200, Bit 8, Center 95 (24 ~ 167) 144
2611 23:02:56.741282 iDelay=200, Bit 9, Center 95 (24 ~ 167) 144
2612 23:02:56.744459 iDelay=200, Bit 10, Center 111 (40 ~ 183) 144
2613 23:02:56.750808 iDelay=200, Bit 11, Center 103 (32 ~ 175) 144
2614 23:02:56.754143 iDelay=200, Bit 12, Center 111 (40 ~ 183) 144
2615 23:02:56.757788 iDelay=200, Bit 13, Center 111 (40 ~ 183) 144
2616 23:02:56.760743 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
2617 23:02:56.764012 iDelay=200, Bit 15, Center 111 (40 ~ 183) 144
2618 23:02:56.767638 ==
2619 23:02:56.771299 Dram Type= 6, Freq= 0, CH_0, rank 0
2620 23:02:56.773875 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2621 23:02:56.773957 ==
2622 23:02:56.774020 DQS Delay:
2623 23:02:56.777937 DQS0 = 0, DQS1 = 0
2624 23:02:56.778018 DQM Delay:
2625 23:02:56.781070 DQM0 = 119, DQM1 = 107
2626 23:02:56.781150 DQ Delay:
2627 23:02:56.784309 DQ0 =119, DQ1 =119, DQ2 =115, DQ3 =115
2628 23:02:56.787459 DQ4 =123, DQ5 =111, DQ6 =127, DQ7 =127
2629 23:02:56.790507 DQ8 =95, DQ9 =95, DQ10 =111, DQ11 =103
2630 23:02:56.793902 DQ12 =111, DQ13 =111, DQ14 =119, DQ15 =111
2631 23:02:56.793981
2632 23:02:56.794045
2633 23:02:56.794103 ==
2634 23:02:56.797193 Dram Type= 6, Freq= 0, CH_0, rank 0
2635 23:02:56.803641 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2636 23:02:56.803723 ==
2637 23:02:56.803785
2638 23:02:56.803842
2639 23:02:56.803898 TX Vref Scan disable
2640 23:02:56.807259 == TX Byte 0 ==
2641 23:02:56.810505 Update DQ dly =850 (3 ,2, 18) DQ OEN =(2 ,7)
2642 23:02:56.817177 Update DQM dly =850 (3 ,2, 18) DQM OEN =(2 ,7)
2643 23:02:56.817261 == TX Byte 1 ==
2644 23:02:56.820317 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
2645 23:02:56.827200 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
2646 23:02:56.827281 ==
2647 23:02:56.830296 Dram Type= 6, Freq= 0, CH_0, rank 0
2648 23:02:56.834003 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2649 23:02:56.834102 ==
2650 23:02:56.845342 TX Vref=22, minBit 7, minWin=25, winSum=413
2651 23:02:56.848625 TX Vref=24, minBit 5, minWin=25, winSum=416
2652 23:02:56.852033 TX Vref=26, minBit 1, minWin=25, winSum=422
2653 23:02:56.855582 TX Vref=28, minBit 10, minWin=26, winSum=434
2654 23:02:56.858493 TX Vref=30, minBit 5, minWin=26, winSum=430
2655 23:02:56.865564 TX Vref=32, minBit 5, minWin=26, winSum=430
2656 23:02:56.868572 [TxChooseVref] Worse bit 10, Min win 26, Win sum 434, Final Vref 28
2657 23:02:56.868654
2658 23:02:56.872200 Final TX Range 1 Vref 28
2659 23:02:56.872282
2660 23:02:56.872345 ==
2661 23:02:56.874931 Dram Type= 6, Freq= 0, CH_0, rank 0
2662 23:02:56.878477 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2663 23:02:56.881861 ==
2664 23:02:56.881940
2665 23:02:56.882003
2666 23:02:56.882061 TX Vref Scan disable
2667 23:02:56.885289 == TX Byte 0 ==
2668 23:02:56.889215 Update DQ dly =850 (3 ,2, 18) DQ OEN =(2 ,7)
2669 23:02:56.895965 Update DQM dly =850 (3 ,2, 18) DQM OEN =(2 ,7)
2670 23:02:56.896046 == TX Byte 1 ==
2671 23:02:56.898977 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
2672 23:02:56.901990 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
2673 23:02:56.905987
2674 23:02:56.906068 [DATLAT]
2675 23:02:56.906132 Freq=1200, CH0 RK0
2676 23:02:56.906191
2677 23:02:56.908891 DATLAT Default: 0xd
2678 23:02:56.908970 0, 0xFFFF, sum = 0
2679 23:02:56.912191 1, 0xFFFF, sum = 0
2680 23:02:56.912273 2, 0xFFFF, sum = 0
2681 23:02:56.915564 3, 0xFFFF, sum = 0
2682 23:02:56.918840 4, 0xFFFF, sum = 0
2683 23:02:56.918926 5, 0xFFFF, sum = 0
2684 23:02:56.922292 6, 0xFFFF, sum = 0
2685 23:02:56.922374 7, 0xFFFF, sum = 0
2686 23:02:56.925614 8, 0xFFFF, sum = 0
2687 23:02:56.925696 9, 0xFFFF, sum = 0
2688 23:02:56.928420 10, 0xFFFF, sum = 0
2689 23:02:56.928502 11, 0xFFFF, sum = 0
2690 23:02:56.932040 12, 0x0, sum = 1
2691 23:02:56.932122 13, 0x0, sum = 2
2692 23:02:56.935648 14, 0x0, sum = 3
2693 23:02:56.935731 15, 0x0, sum = 4
2694 23:02:56.935795 best_step = 13
2695 23:02:56.938397
2696 23:02:56.938477 ==
2697 23:02:56.941849 Dram Type= 6, Freq= 0, CH_0, rank 0
2698 23:02:56.945169 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2699 23:02:56.945251 ==
2700 23:02:56.945314 RX Vref Scan: 1
2701 23:02:56.945373
2702 23:02:56.948881 Set Vref Range= 32 -> 127
2703 23:02:56.948961
2704 23:02:56.952299 RX Vref 32 -> 127, step: 1
2705 23:02:56.952380
2706 23:02:56.955107 RX Delay -21 -> 252, step: 4
2707 23:02:56.955187
2708 23:02:56.958388 Set Vref, RX VrefLevel [Byte0]: 32
2709 23:02:56.962120 [Byte1]: 32
2710 23:02:56.962201
2711 23:02:56.965006 Set Vref, RX VrefLevel [Byte0]: 33
2712 23:02:56.968562 [Byte1]: 33
2713 23:02:56.972168
2714 23:02:56.972248 Set Vref, RX VrefLevel [Byte0]: 34
2715 23:02:56.975325 [Byte1]: 34
2716 23:02:56.979760
2717 23:02:56.979842 Set Vref, RX VrefLevel [Byte0]: 35
2718 23:02:56.983317 [Byte1]: 35
2719 23:02:56.987779
2720 23:02:56.987869 Set Vref, RX VrefLevel [Byte0]: 36
2721 23:02:56.990730 [Byte1]: 36
2722 23:02:56.995409
2723 23:02:56.995498 Set Vref, RX VrefLevel [Byte0]: 37
2724 23:02:56.998793 [Byte1]: 37
2725 23:02:57.003793
2726 23:02:57.003880 Set Vref, RX VrefLevel [Byte0]: 38
2727 23:02:57.006600 [Byte1]: 38
2728 23:02:57.011719
2729 23:02:57.011805 Set Vref, RX VrefLevel [Byte0]: 39
2730 23:02:57.014844 [Byte1]: 39
2731 23:02:57.019729
2732 23:02:57.019827 Set Vref, RX VrefLevel [Byte0]: 40
2733 23:02:57.022706 [Byte1]: 40
2734 23:02:57.027677
2735 23:02:57.027760 Set Vref, RX VrefLevel [Byte0]: 41
2736 23:02:57.030997 [Byte1]: 41
2737 23:02:57.035553
2738 23:02:57.035640 Set Vref, RX VrefLevel [Byte0]: 42
2739 23:02:57.038704 [Byte1]: 42
2740 23:02:57.043107
2741 23:02:57.043188 Set Vref, RX VrefLevel [Byte0]: 43
2742 23:02:57.046536 [Byte1]: 43
2743 23:02:57.051957
2744 23:02:57.052040 Set Vref, RX VrefLevel [Byte0]: 44
2745 23:02:57.054311 [Byte1]: 44
2746 23:02:57.058777
2747 23:02:57.058865 Set Vref, RX VrefLevel [Byte0]: 45
2748 23:02:57.062065 [Byte1]: 45
2749 23:02:57.067031
2750 23:02:57.067117 Set Vref, RX VrefLevel [Byte0]: 46
2751 23:02:57.070072 [Byte1]: 46
2752 23:02:57.075645
2753 23:02:57.075731 Set Vref, RX VrefLevel [Byte0]: 47
2754 23:02:57.077856 [Byte1]: 47
2755 23:02:57.083010
2756 23:02:57.083098 Set Vref, RX VrefLevel [Byte0]: 48
2757 23:02:57.086103 [Byte1]: 48
2758 23:02:57.090595
2759 23:02:57.090695 Set Vref, RX VrefLevel [Byte0]: 49
2760 23:02:57.093863 [Byte1]: 49
2761 23:02:57.098859
2762 23:02:57.098952 Set Vref, RX VrefLevel [Byte0]: 50
2763 23:02:57.102012 [Byte1]: 50
2764 23:02:57.106462
2765 23:02:57.106562 Set Vref, RX VrefLevel [Byte0]: 51
2766 23:02:57.110258 [Byte1]: 51
2767 23:02:57.114901
2768 23:02:57.114993 Set Vref, RX VrefLevel [Byte0]: 52
2769 23:02:57.117971 [Byte1]: 52
2770 23:02:57.122920
2771 23:02:57.123013 Set Vref, RX VrefLevel [Byte0]: 53
2772 23:02:57.125782 [Byte1]: 53
2773 23:02:57.130431
2774 23:02:57.130517 Set Vref, RX VrefLevel [Byte0]: 54
2775 23:02:57.133663 [Byte1]: 54
2776 23:02:57.138552
2777 23:02:57.138638 Set Vref, RX VrefLevel [Byte0]: 55
2778 23:02:57.144713 [Byte1]: 55
2779 23:02:57.144806
2780 23:02:57.148115 Set Vref, RX VrefLevel [Byte0]: 56
2781 23:02:57.151715 [Byte1]: 56
2782 23:02:57.151802
2783 23:02:57.154650 Set Vref, RX VrefLevel [Byte0]: 57
2784 23:02:57.157918 [Byte1]: 57
2785 23:02:57.162063
2786 23:02:57.162168 Set Vref, RX VrefLevel [Byte0]: 58
2787 23:02:57.165727 [Byte1]: 58
2788 23:02:57.170342
2789 23:02:57.170461 Set Vref, RX VrefLevel [Byte0]: 59
2790 23:02:57.173386 [Byte1]: 59
2791 23:02:57.177747
2792 23:02:57.177849 Set Vref, RX VrefLevel [Byte0]: 60
2793 23:02:57.181120 [Byte1]: 60
2794 23:02:57.185740
2795 23:02:57.185833 Set Vref, RX VrefLevel [Byte0]: 61
2796 23:02:57.189004 [Byte1]: 61
2797 23:02:57.193851
2798 23:02:57.193966 Set Vref, RX VrefLevel [Byte0]: 62
2799 23:02:57.197022 [Byte1]: 62
2800 23:02:57.201770
2801 23:02:57.201871 Set Vref, RX VrefLevel [Byte0]: 63
2802 23:02:57.205377 [Byte1]: 63
2803 23:02:57.209623
2804 23:02:57.209717 Set Vref, RX VrefLevel [Byte0]: 64
2805 23:02:57.212995 [Byte1]: 64
2806 23:02:57.217608
2807 23:02:57.217728 Set Vref, RX VrefLevel [Byte0]: 65
2808 23:02:57.220985 [Byte1]: 65
2809 23:02:57.225296
2810 23:02:57.225422 Set Vref, RX VrefLevel [Byte0]: 66
2811 23:02:57.228931 [Byte1]: 66
2812 23:02:57.233626
2813 23:02:57.233712 Set Vref, RX VrefLevel [Byte0]: 67
2814 23:02:57.237034 [Byte1]: 67
2815 23:02:57.241127
2816 23:02:57.241212 Set Vref, RX VrefLevel [Byte0]: 68
2817 23:02:57.244818 [Byte1]: 68
2818 23:02:57.249186
2819 23:02:57.249268 Set Vref, RX VrefLevel [Byte0]: 69
2820 23:02:57.252721 [Byte1]: 69
2821 23:02:57.256964
2822 23:02:57.257045 Set Vref, RX VrefLevel [Byte0]: 70
2823 23:02:57.261063 [Byte1]: 70
2824 23:02:57.265109
2825 23:02:57.265216 Set Vref, RX VrefLevel [Byte0]: 71
2826 23:02:57.268303 [Byte1]: 71
2827 23:02:57.272914
2828 23:02:57.273019 Set Vref, RX VrefLevel [Byte0]: 72
2829 23:02:57.276141 [Byte1]: 72
2830 23:02:57.281110
2831 23:02:57.281198 Set Vref, RX VrefLevel [Byte0]: 73
2832 23:02:57.284743 [Byte1]: 73
2833 23:02:57.288693
2834 23:02:57.288837 Set Vref, RX VrefLevel [Byte0]: 74
2835 23:02:57.292569 [Byte1]: 74
2836 23:02:57.296767
2837 23:02:57.296852 Set Vref, RX VrefLevel [Byte0]: 75
2838 23:02:57.299937 [Byte1]: 75
2839 23:02:57.304599
2840 23:02:57.304677 Set Vref, RX VrefLevel [Byte0]: 76
2841 23:02:57.308060 [Byte1]: 76
2842 23:02:57.312859
2843 23:02:57.312944 Set Vref, RX VrefLevel [Byte0]: 77
2844 23:02:57.315696 [Byte1]: 77
2845 23:02:57.320454
2846 23:02:57.320556 Set Vref, RX VrefLevel [Byte0]: 78
2847 23:02:57.324031 [Byte1]: 78
2848 23:02:57.328579
2849 23:02:57.328662 Final RX Vref Byte 0 = 61 to rank0
2850 23:02:57.331916 Final RX Vref Byte 1 = 48 to rank0
2851 23:02:57.335054 Final RX Vref Byte 0 = 61 to rank1
2852 23:02:57.338589 Final RX Vref Byte 1 = 48 to rank1==
2853 23:02:57.341709 Dram Type= 6, Freq= 0, CH_0, rank 0
2854 23:02:57.348174 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2855 23:02:57.348275 ==
2856 23:02:57.348342 DQS Delay:
2857 23:02:57.348402 DQS0 = 0, DQS1 = 0
2858 23:02:57.351622 DQM Delay:
2859 23:02:57.351704 DQM0 = 119, DQM1 = 106
2860 23:02:57.354790 DQ Delay:
2861 23:02:57.358753 DQ0 =118, DQ1 =120, DQ2 =116, DQ3 =116
2862 23:02:57.361537 DQ4 =120, DQ5 =114, DQ6 =126, DQ7 =126
2863 23:02:57.365179 DQ8 =96, DQ9 =92, DQ10 =110, DQ11 =100
2864 23:02:57.368505 DQ12 =112, DQ13 =110, DQ14 =118, DQ15 =116
2865 23:02:57.368588
2866 23:02:57.368652
2867 23:02:57.374976 [DQSOSCAuto] RK0, (LSB)MR18= 0x13ff, (MSB)MR19= 0x403, tDQSOscB0 = 410 ps tDQSOscB1 = 402 ps
2868 23:02:57.378370 CH0 RK0: MR19=403, MR18=13FF
2869 23:02:57.384770 CH0_RK0: MR19=0x403, MR18=0x13FF, DQSOSC=402, MR23=63, INC=40, DEC=27
2870 23:02:57.384929
2871 23:02:57.388084 ----->DramcWriteLeveling(PI) begin...
2872 23:02:57.388175 ==
2873 23:02:57.391663 Dram Type= 6, Freq= 0, CH_0, rank 1
2874 23:02:57.397847 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2875 23:02:57.397964 ==
2876 23:02:57.401302 Write leveling (Byte 0): 30 => 30
2877 23:02:57.401435 Write leveling (Byte 1): 28 => 28
2878 23:02:57.404888 DramcWriteLeveling(PI) end<-----
2879 23:02:57.404970
2880 23:02:57.405034 ==
2881 23:02:57.407986 Dram Type= 6, Freq= 0, CH_0, rank 1
2882 23:02:57.414893 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2883 23:02:57.415031 ==
2884 23:02:57.418163 [Gating] SW mode calibration
2885 23:02:57.424953 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2886 23:02:57.428737 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2887 23:02:57.435104 0 15 0 | B1->B0 | 2525 3434 | 0 1 | (0 0) (1 1)
2888 23:02:57.437726 0 15 4 | B1->B0 | 3131 3434 | 1 1 | (0 0) (1 1)
2889 23:02:57.440988 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2890 23:02:57.447628 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2891 23:02:57.451078 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2892 23:02:57.454423 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2893 23:02:57.460891 0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2894 23:02:57.464410 0 15 28 | B1->B0 | 3434 3232 | 1 0 | (1 1) (0 1)
2895 23:02:57.467897 1 0 0 | B1->B0 | 2c2c 2323 | 0 0 | (1 0) (0 0)
2896 23:02:57.474306 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2897 23:02:57.477675 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2898 23:02:57.480931 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2899 23:02:57.487596 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2900 23:02:57.490727 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2901 23:02:57.494107 1 0 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2902 23:02:57.500729 1 0 28 | B1->B0 | 2323 2e2e | 0 0 | (0 0) (0 0)
2903 23:02:57.503912 1 1 0 | B1->B0 | 3838 4646 | 0 0 | (0 0) (0 0)
2904 23:02:57.507505 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2905 23:02:57.510944 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2906 23:02:57.517291 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2907 23:02:57.520711 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2908 23:02:57.524215 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2909 23:02:57.530674 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2910 23:02:57.534199 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2911 23:02:57.537404 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2912 23:02:57.543861 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2913 23:02:57.547281 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2914 23:02:57.550671 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2915 23:02:57.557612 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2916 23:02:57.560409 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2917 23:02:57.563883 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2918 23:02:57.570232 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2919 23:02:57.573497 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2920 23:02:57.577100 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2921 23:02:57.584296 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2922 23:02:57.587343 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2923 23:02:57.590249 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2924 23:02:57.596847 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2925 23:02:57.600312 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2926 23:02:57.603575 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2927 23:02:57.610203 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2928 23:02:57.610289 Total UI for P1: 0, mck2ui 16
2929 23:02:57.616629 best dqsien dly found for B0: ( 1, 3, 28)
2930 23:02:57.620010 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2931 23:02:57.623596 Total UI for P1: 0, mck2ui 16
2932 23:02:57.626862 best dqsien dly found for B1: ( 1, 3, 30)
2933 23:02:57.630535 best DQS0 dly(MCK, UI, PI) = (1, 3, 28)
2934 23:02:57.633500 best DQS1 dly(MCK, UI, PI) = (1, 3, 30)
2935 23:02:57.633582
2936 23:02:57.636374 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)
2937 23:02:57.640114 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 30)
2938 23:02:57.643169 [Gating] SW calibration Done
2939 23:02:57.643250 ==
2940 23:02:57.646305 Dram Type= 6, Freq= 0, CH_0, rank 1
2941 23:02:57.653190 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2942 23:02:57.653272 ==
2943 23:02:57.653336 RX Vref Scan: 0
2944 23:02:57.653395
2945 23:02:57.656505 RX Vref 0 -> 0, step: 1
2946 23:02:57.656584
2947 23:02:57.659827 RX Delay -40 -> 252, step: 8
2948 23:02:57.663038 iDelay=200, Bit 0, Center 111 (40 ~ 183) 144
2949 23:02:57.666757 iDelay=200, Bit 1, Center 123 (48 ~ 199) 152
2950 23:02:57.669649 iDelay=200, Bit 2, Center 111 (40 ~ 183) 144
2951 23:02:57.672973 iDelay=200, Bit 3, Center 115 (40 ~ 191) 152
2952 23:02:57.679926 iDelay=200, Bit 4, Center 115 (40 ~ 191) 152
2953 23:02:57.682813 iDelay=200, Bit 5, Center 111 (40 ~ 183) 144
2954 23:02:57.686518 iDelay=200, Bit 6, Center 123 (48 ~ 199) 152
2955 23:02:57.689623 iDelay=200, Bit 7, Center 123 (48 ~ 199) 152
2956 23:02:57.693404 iDelay=200, Bit 8, Center 95 (24 ~ 167) 144
2957 23:02:57.699388 iDelay=200, Bit 9, Center 95 (24 ~ 167) 144
2958 23:02:57.702935 iDelay=200, Bit 10, Center 111 (40 ~ 183) 144
2959 23:02:57.706388 iDelay=200, Bit 11, Center 103 (32 ~ 175) 144
2960 23:02:57.709632 iDelay=200, Bit 12, Center 111 (40 ~ 183) 144
2961 23:02:57.712762 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
2962 23:02:57.720027 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
2963 23:02:57.722617 iDelay=200, Bit 15, Center 111 (40 ~ 183) 144
2964 23:02:57.722705 ==
2965 23:02:57.725902 Dram Type= 6, Freq= 0, CH_0, rank 1
2966 23:02:57.729182 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2967 23:02:57.729289 ==
2968 23:02:57.732802 DQS Delay:
2969 23:02:57.732885 DQS0 = 0, DQS1 = 0
2970 23:02:57.732947 DQM Delay:
2971 23:02:57.735783 DQM0 = 116, DQM1 = 108
2972 23:02:57.735865 DQ Delay:
2973 23:02:57.739311 DQ0 =111, DQ1 =123, DQ2 =111, DQ3 =115
2974 23:02:57.742437 DQ4 =115, DQ5 =111, DQ6 =123, DQ7 =123
2975 23:02:57.745704 DQ8 =95, DQ9 =95, DQ10 =111, DQ11 =103
2976 23:02:57.752501 DQ12 =111, DQ13 =119, DQ14 =119, DQ15 =111
2977 23:02:57.752587
2978 23:02:57.752651
2979 23:02:57.752710 ==
2980 23:02:57.755735 Dram Type= 6, Freq= 0, CH_0, rank 1
2981 23:02:57.759130 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2982 23:02:57.759212 ==
2983 23:02:57.759275
2984 23:02:57.759333
2985 23:02:57.762948 TX Vref Scan disable
2986 23:02:57.763036 == TX Byte 0 ==
2987 23:02:57.769218 Update DQ dly =850 (3 ,2, 18) DQ OEN =(2 ,7)
2988 23:02:57.772260 Update DQM dly =850 (3 ,2, 18) DQM OEN =(2 ,7)
2989 23:02:57.772346 == TX Byte 1 ==
2990 23:02:57.779257 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
2991 23:02:57.782275 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
2992 23:02:57.782368 ==
2993 23:02:57.785717 Dram Type= 6, Freq= 0, CH_0, rank 1
2994 23:02:57.788879 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2995 23:02:57.788964 ==
2996 23:02:57.802149 TX Vref=22, minBit 8, minWin=25, winSum=416
2997 23:02:57.805682 TX Vref=24, minBit 13, minWin=25, winSum=421
2998 23:02:57.808512 TX Vref=26, minBit 13, minWin=25, winSum=422
2999 23:02:57.811894 TX Vref=28, minBit 0, minWin=26, winSum=426
3000 23:02:57.815076 TX Vref=30, minBit 9, minWin=26, winSum=430
3001 23:02:57.821774 TX Vref=32, minBit 13, minWin=25, winSum=429
3002 23:02:57.825993 [TxChooseVref] Worse bit 9, Min win 26, Win sum 430, Final Vref 30
3003 23:02:57.826090
3004 23:02:57.828657 Final TX Range 1 Vref 30
3005 23:02:57.828740
3006 23:02:57.828804 ==
3007 23:02:57.832066 Dram Type= 6, Freq= 0, CH_0, rank 1
3008 23:02:57.838439 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3009 23:02:57.838531 ==
3010 23:02:57.838596
3011 23:02:57.838655
3012 23:02:57.838711 TX Vref Scan disable
3013 23:02:57.841987 == TX Byte 0 ==
3014 23:02:57.845162 Update DQ dly =849 (3 ,2, 17) DQ OEN =(2 ,7)
3015 23:02:57.851771 Update DQM dly =849 (3 ,2, 17) DQM OEN =(2 ,7)
3016 23:02:57.851862 == TX Byte 1 ==
3017 23:02:57.855211 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3018 23:02:57.861970 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3019 23:02:57.862067
3020 23:02:57.862132 [DATLAT]
3021 23:02:57.862192 Freq=1200, CH0 RK1
3022 23:02:57.862250
3023 23:02:57.865221 DATLAT Default: 0xd
3024 23:02:57.865304 0, 0xFFFF, sum = 0
3025 23:02:57.868879 1, 0xFFFF, sum = 0
3026 23:02:57.871447 2, 0xFFFF, sum = 0
3027 23:02:57.871530 3, 0xFFFF, sum = 0
3028 23:02:57.874926 4, 0xFFFF, sum = 0
3029 23:02:57.875012 5, 0xFFFF, sum = 0
3030 23:02:57.878381 6, 0xFFFF, sum = 0
3031 23:02:57.878468 7, 0xFFFF, sum = 0
3032 23:02:57.881939 8, 0xFFFF, sum = 0
3033 23:02:57.882024 9, 0xFFFF, sum = 0
3034 23:02:57.884577 10, 0xFFFF, sum = 0
3035 23:02:57.884661 11, 0xFFFF, sum = 0
3036 23:02:57.888630 12, 0x0, sum = 1
3037 23:02:57.888734 13, 0x0, sum = 2
3038 23:02:57.891782 14, 0x0, sum = 3
3039 23:02:57.891867 15, 0x0, sum = 4
3040 23:02:57.894988 best_step = 13
3041 23:02:57.895072
3042 23:02:57.895136 ==
3043 23:02:57.898291 Dram Type= 6, Freq= 0, CH_0, rank 1
3044 23:02:57.901387 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3045 23:02:57.901538 ==
3046 23:02:57.904692 RX Vref Scan: 0
3047 23:02:57.904776
3048 23:02:57.904841 RX Vref 0 -> 0, step: 1
3049 23:02:57.904901
3050 23:02:57.908276 RX Delay -21 -> 252, step: 4
3051 23:02:57.914241 iDelay=195, Bit 0, Center 114 (47 ~ 182) 136
3052 23:02:57.918203 iDelay=195, Bit 1, Center 118 (47 ~ 190) 144
3053 23:02:57.920793 iDelay=195, Bit 2, Center 110 (43 ~ 178) 136
3054 23:02:57.924251 iDelay=195, Bit 3, Center 112 (43 ~ 182) 140
3055 23:02:57.927728 iDelay=195, Bit 4, Center 116 (47 ~ 186) 140
3056 23:02:57.934725 iDelay=195, Bit 5, Center 110 (43 ~ 178) 136
3057 23:02:57.937623 iDelay=195, Bit 6, Center 124 (55 ~ 194) 140
3058 23:02:57.941366 iDelay=195, Bit 7, Center 124 (55 ~ 194) 140
3059 23:02:57.944283 iDelay=195, Bit 8, Center 96 (27 ~ 166) 140
3060 23:02:57.947784 iDelay=195, Bit 9, Center 94 (27 ~ 162) 136
3061 23:02:57.954026 iDelay=195, Bit 10, Center 110 (43 ~ 178) 136
3062 23:02:57.957323 iDelay=195, Bit 11, Center 100 (35 ~ 166) 132
3063 23:02:57.960809 iDelay=195, Bit 12, Center 112 (47 ~ 178) 132
3064 23:02:57.963866 iDelay=195, Bit 13, Center 114 (47 ~ 182) 136
3065 23:02:57.970709 iDelay=195, Bit 14, Center 118 (55 ~ 182) 128
3066 23:02:57.973953 iDelay=195, Bit 15, Center 116 (51 ~ 182) 132
3067 23:02:57.974046 ==
3068 23:02:57.977300 Dram Type= 6, Freq= 0, CH_0, rank 1
3069 23:02:57.980826 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3070 23:02:57.980913 ==
3071 23:02:57.980977 DQS Delay:
3072 23:02:57.983983 DQS0 = 0, DQS1 = 0
3073 23:02:57.984067 DQM Delay:
3074 23:02:57.987276 DQM0 = 116, DQM1 = 107
3075 23:02:57.987358 DQ Delay:
3076 23:02:57.990374 DQ0 =114, DQ1 =118, DQ2 =110, DQ3 =112
3077 23:02:57.994055 DQ4 =116, DQ5 =110, DQ6 =124, DQ7 =124
3078 23:02:57.997301 DQ8 =96, DQ9 =94, DQ10 =110, DQ11 =100
3079 23:02:58.000525 DQ12 =112, DQ13 =114, DQ14 =118, DQ15 =116
3080 23:02:58.003754
3081 23:02:58.003838
3082 23:02:58.010509 [DQSOSCAuto] RK1, (LSB)MR18= 0x10ea, (MSB)MR19= 0x403, tDQSOscB0 = 419 ps tDQSOscB1 = 403 ps
3083 23:02:58.013768 CH0 RK1: MR19=403, MR18=10EA
3084 23:02:58.020269 CH0_RK1: MR19=0x403, MR18=0x10EA, DQSOSC=403, MR23=63, INC=40, DEC=26
3085 23:02:58.023564 [RxdqsGatingPostProcess] freq 1200
3086 23:02:58.027233 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3087 23:02:58.030134 best DQS0 dly(2T, 0.5T) = (0, 11)
3088 23:02:58.033284 best DQS1 dly(2T, 0.5T) = (0, 12)
3089 23:02:58.037041 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3090 23:02:58.040049 best DQS1 P1 dly(2T, 0.5T) = (1, 0)
3091 23:02:58.043669 best DQS0 dly(2T, 0.5T) = (0, 11)
3092 23:02:58.046772 best DQS1 dly(2T, 0.5T) = (0, 11)
3093 23:02:58.049842 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3094 23:02:58.053042 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3095 23:02:58.056602 Pre-setting of DQS Precalculation
3096 23:02:58.060071 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3097 23:02:58.060161 ==
3098 23:02:58.063444 Dram Type= 6, Freq= 0, CH_1, rank 0
3099 23:02:58.069966 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3100 23:02:58.070064 ==
3101 23:02:58.073554 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3102 23:02:58.079715 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
3103 23:02:58.088324 [CA 0] Center 37 (7~67) winsize 61
3104 23:02:58.091788 [CA 1] Center 37 (7~68) winsize 62
3105 23:02:58.095602 [CA 2] Center 34 (4~64) winsize 61
3106 23:02:58.098684 [CA 3] Center 33 (3~64) winsize 62
3107 23:02:58.101885 [CA 4] Center 34 (4~64) winsize 61
3108 23:02:58.105095 [CA 5] Center 33 (3~64) winsize 62
3109 23:02:58.105178
3110 23:02:58.108232 [CmdBusTrainingLP45] Vref(ca) range 1: 33
3111 23:02:58.108313
3112 23:02:58.111483 [CATrainingPosCal] consider 1 rank data
3113 23:02:58.114709 u2DelayCellTimex100 = 270/100 ps
3114 23:02:58.117955 CA0 delay=37 (7~67),Diff = 4 PI (19 cell)
3115 23:02:58.124819 CA1 delay=37 (7~68),Diff = 4 PI (19 cell)
3116 23:02:58.127960 CA2 delay=34 (4~64),Diff = 1 PI (4 cell)
3117 23:02:58.132102 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
3118 23:02:58.134610 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
3119 23:02:58.138420 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3120 23:02:58.138505
3121 23:02:58.141245 CA PerBit enable=1, Macro0, CA PI delay=33
3122 23:02:58.141328
3123 23:02:58.144225 [CBTSetCACLKResult] CA Dly = 33
3124 23:02:58.147633 CS Dly: 5 (0~36)
3125 23:02:58.147715 ==
3126 23:02:58.150935 Dram Type= 6, Freq= 0, CH_1, rank 1
3127 23:02:58.154480 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3128 23:02:58.154565 ==
3129 23:02:58.161388 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3130 23:02:58.164487 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
3131 23:02:58.174251 [CA 0] Center 37 (7~68) winsize 62
3132 23:02:58.177224 [CA 1] Center 38 (8~68) winsize 61
3133 23:02:58.180641 [CA 2] Center 34 (4~65) winsize 62
3134 23:02:58.183822 [CA 3] Center 33 (3~64) winsize 62
3135 23:02:58.187091 [CA 4] Center 34 (3~65) winsize 63
3136 23:02:58.190934 [CA 5] Center 33 (3~64) winsize 62
3137 23:02:58.191019
3138 23:02:58.194017 [CmdBusTrainingLP45] Vref(ca) range 1: 37
3139 23:02:58.194098
3140 23:02:58.197189 [CATrainingPosCal] consider 2 rank data
3141 23:02:58.200480 u2DelayCellTimex100 = 270/100 ps
3142 23:02:58.203983 CA0 delay=37 (7~67),Diff = 4 PI (19 cell)
3143 23:02:58.210254 CA1 delay=38 (8~68),Diff = 5 PI (24 cell)
3144 23:02:58.213828 CA2 delay=34 (4~64),Diff = 1 PI (4 cell)
3145 23:02:58.217384 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
3146 23:02:58.220402 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
3147 23:02:58.223809 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3148 23:02:58.223893
3149 23:02:58.227266 CA PerBit enable=1, Macro0, CA PI delay=33
3150 23:02:58.227347
3151 23:02:58.230212 [CBTSetCACLKResult] CA Dly = 33
3152 23:02:58.230293 CS Dly: 7 (0~40)
3153 23:02:58.233466
3154 23:02:58.237290 ----->DramcWriteLeveling(PI) begin...
3155 23:02:58.237373 ==
3156 23:02:58.240025 Dram Type= 6, Freq= 0, CH_1, rank 0
3157 23:02:58.244047 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3158 23:02:58.244131 ==
3159 23:02:58.246854 Write leveling (Byte 0): 24 => 24
3160 23:02:58.250134 Write leveling (Byte 1): 26 => 26
3161 23:02:58.253226 DramcWriteLeveling(PI) end<-----
3162 23:02:58.253307
3163 23:02:58.253370 ==
3164 23:02:58.256601 Dram Type= 6, Freq= 0, CH_1, rank 0
3165 23:02:58.259887 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3166 23:02:58.259992 ==
3167 23:02:58.263341 [Gating] SW mode calibration
3168 23:02:58.270112 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3169 23:02:58.276690 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3170 23:02:58.279801 0 15 0 | B1->B0 | 3232 3434 | 0 1 | (0 0) (1 1)
3171 23:02:58.283126 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3172 23:02:58.290132 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3173 23:02:58.292970 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3174 23:02:58.296417 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3175 23:02:58.302891 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3176 23:02:58.306078 0 15 24 | B1->B0 | 3333 3333 | 1 0 | (1 1) (0 1)
3177 23:02:58.309712 0 15 28 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
3178 23:02:58.316444 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3179 23:02:58.319266 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3180 23:02:58.322551 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3181 23:02:58.329650 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3182 23:02:58.332422 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3183 23:02:58.335835 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3184 23:02:58.342764 1 0 24 | B1->B0 | 2626 3938 | 0 1 | (0 0) (0 0)
3185 23:02:58.346279 1 0 28 | B1->B0 | 4141 4646 | 0 0 | (0 0) (0 0)
3186 23:02:58.349091 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3187 23:02:58.356466 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3188 23:02:58.359431 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3189 23:02:58.362278 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3190 23:02:58.368926 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3191 23:02:58.372310 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3192 23:02:58.376151 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3193 23:02:58.382241 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3194 23:02:58.385729 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3195 23:02:58.388961 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3196 23:02:58.395383 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3197 23:02:58.398955 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3198 23:02:58.402735 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3199 23:02:58.409269 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3200 23:02:58.412349 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3201 23:02:58.415881 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3202 23:02:58.421948 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3203 23:02:58.426015 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3204 23:02:58.428914 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3205 23:02:58.431880 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3206 23:02:58.438674 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3207 23:02:58.442088 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3208 23:02:58.445347 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3209 23:02:58.452124 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
3210 23:02:58.455242 Total UI for P1: 0, mck2ui 16
3211 23:02:58.458774 best dqsien dly found for B0: ( 1, 3, 24)
3212 23:02:58.461615 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3213 23:02:58.464855 Total UI for P1: 0, mck2ui 16
3214 23:02:58.468771 best dqsien dly found for B1: ( 1, 3, 26)
3215 23:02:58.471632 best DQS0 dly(MCK, UI, PI) = (1, 3, 24)
3216 23:02:58.474852 best DQS1 dly(MCK, UI, PI) = (1, 3, 26)
3217 23:02:58.474934
3218 23:02:58.478649 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 24)
3219 23:02:58.484959 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 26)
3220 23:02:58.485041 [Gating] SW calibration Done
3221 23:02:58.485105 ==
3222 23:02:58.488635 Dram Type= 6, Freq= 0, CH_1, rank 0
3223 23:02:58.495216 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3224 23:02:58.495297 ==
3225 23:02:58.495362 RX Vref Scan: 0
3226 23:02:58.495421
3227 23:02:58.498226 RX Vref 0 -> 0, step: 1
3228 23:02:58.498307
3229 23:02:58.501526 RX Delay -40 -> 252, step: 8
3230 23:02:58.504890 iDelay=208, Bit 0, Center 123 (48 ~ 199) 152
3231 23:02:58.508610 iDelay=208, Bit 1, Center 111 (40 ~ 183) 144
3232 23:02:58.511617 iDelay=208, Bit 2, Center 111 (40 ~ 183) 144
3233 23:02:58.517927 iDelay=208, Bit 3, Center 115 (40 ~ 191) 152
3234 23:02:58.521796 iDelay=208, Bit 4, Center 111 (40 ~ 183) 144
3235 23:02:58.524675 iDelay=208, Bit 5, Center 131 (56 ~ 207) 152
3236 23:02:58.528221 iDelay=208, Bit 6, Center 123 (48 ~ 199) 152
3237 23:02:58.531490 iDelay=208, Bit 7, Center 115 (48 ~ 183) 136
3238 23:02:58.534909 iDelay=208, Bit 8, Center 95 (24 ~ 167) 144
3239 23:02:58.541315 iDelay=208, Bit 9, Center 99 (24 ~ 175) 152
3240 23:02:58.544608 iDelay=208, Bit 10, Center 111 (40 ~ 183) 144
3241 23:02:58.548302 iDelay=208, Bit 11, Center 99 (32 ~ 167) 136
3242 23:02:58.551545 iDelay=208, Bit 12, Center 119 (48 ~ 191) 144
3243 23:02:58.558164 iDelay=208, Bit 13, Center 119 (48 ~ 191) 144
3244 23:02:58.561263 iDelay=208, Bit 14, Center 115 (40 ~ 191) 152
3245 23:02:58.564855 iDelay=208, Bit 15, Center 119 (48 ~ 191) 144
3246 23:02:58.564965 ==
3247 23:02:58.567945 Dram Type= 6, Freq= 0, CH_1, rank 0
3248 23:02:58.571399 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3249 23:02:58.571482 ==
3250 23:02:58.575123 DQS Delay:
3251 23:02:58.575204 DQS0 = 0, DQS1 = 0
3252 23:02:58.577683 DQM Delay:
3253 23:02:58.577764 DQM0 = 117, DQM1 = 109
3254 23:02:58.577828 DQ Delay:
3255 23:02:58.581165 DQ0 =123, DQ1 =111, DQ2 =111, DQ3 =115
3256 23:02:58.584685 DQ4 =111, DQ5 =131, DQ6 =123, DQ7 =115
3257 23:02:58.591084 DQ8 =95, DQ9 =99, DQ10 =111, DQ11 =99
3258 23:02:58.594502 DQ12 =119, DQ13 =119, DQ14 =115, DQ15 =119
3259 23:02:58.594584
3260 23:02:58.594649
3261 23:02:58.594708 ==
3262 23:02:58.597615 Dram Type= 6, Freq= 0, CH_1, rank 0
3263 23:02:58.601125 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3264 23:02:58.601207 ==
3265 23:02:58.601271
3266 23:02:58.601331
3267 23:02:58.604528 TX Vref Scan disable
3268 23:02:58.607282 == TX Byte 0 ==
3269 23:02:58.610758 Update DQ dly =841 (3 ,1, 41) DQ OEN =(2 ,6)
3270 23:02:58.614718 Update DQM dly =841 (3 ,1, 41) DQM OEN =(2 ,6)
3271 23:02:58.617211 == TX Byte 1 ==
3272 23:02:58.620633 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3273 23:02:58.624264 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3274 23:02:58.624347 ==
3275 23:02:58.627612 Dram Type= 6, Freq= 0, CH_1, rank 0
3276 23:02:58.630759 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3277 23:02:58.634008 ==
3278 23:02:58.644128 TX Vref=22, minBit 9, minWin=25, winSum=417
3279 23:02:58.647272 TX Vref=24, minBit 10, minWin=25, winSum=420
3280 23:02:58.650756 TX Vref=26, minBit 11, minWin=25, winSum=426
3281 23:02:58.653964 TX Vref=28, minBit 11, minWin=25, winSum=432
3282 23:02:58.656857 TX Vref=30, minBit 10, minWin=25, winSum=427
3283 23:02:58.663462 TX Vref=32, minBit 9, minWin=25, winSum=425
3284 23:02:58.666981 [TxChooseVref] Worse bit 11, Min win 25, Win sum 432, Final Vref 28
3285 23:02:58.667064
3286 23:02:58.670324 Final TX Range 1 Vref 28
3287 23:02:58.670406
3288 23:02:58.670471 ==
3289 23:02:58.673346 Dram Type= 6, Freq= 0, CH_1, rank 0
3290 23:02:58.680892 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3291 23:02:58.680976 ==
3292 23:02:58.681040
3293 23:02:58.681100
3294 23:02:58.681157 TX Vref Scan disable
3295 23:02:58.683770 == TX Byte 0 ==
3296 23:02:58.687442 Update DQ dly =841 (3 ,1, 41) DQ OEN =(2 ,6)
3297 23:02:58.693828 Update DQM dly =841 (3 ,1, 41) DQM OEN =(2 ,6)
3298 23:02:58.693911 == TX Byte 1 ==
3299 23:02:58.697527 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3300 23:02:58.703739 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3301 23:02:58.703820
3302 23:02:58.703884 [DATLAT]
3303 23:02:58.703944 Freq=1200, CH1 RK0
3304 23:02:58.704001
3305 23:02:58.707158 DATLAT Default: 0xd
3306 23:02:58.710559 0, 0xFFFF, sum = 0
3307 23:02:58.710642 1, 0xFFFF, sum = 0
3308 23:02:58.713643 2, 0xFFFF, sum = 0
3309 23:02:58.713725 3, 0xFFFF, sum = 0
3310 23:02:58.716867 4, 0xFFFF, sum = 0
3311 23:02:58.716949 5, 0xFFFF, sum = 0
3312 23:02:58.720359 6, 0xFFFF, sum = 0
3313 23:02:58.720443 7, 0xFFFF, sum = 0
3314 23:02:58.723468 8, 0xFFFF, sum = 0
3315 23:02:58.723552 9, 0xFFFF, sum = 0
3316 23:02:58.726971 10, 0xFFFF, sum = 0
3317 23:02:58.727053 11, 0xFFFF, sum = 0
3318 23:02:58.730360 12, 0x0, sum = 1
3319 23:02:58.730442 13, 0x0, sum = 2
3320 23:02:58.733962 14, 0x0, sum = 3
3321 23:02:58.734043 15, 0x0, sum = 4
3322 23:02:58.737077 best_step = 13
3323 23:02:58.737157
3324 23:02:58.737221 ==
3325 23:02:58.740134 Dram Type= 6, Freq= 0, CH_1, rank 0
3326 23:02:58.744058 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3327 23:02:58.744141 ==
3328 23:02:58.747154 RX Vref Scan: 1
3329 23:02:58.747235
3330 23:02:58.747299 Set Vref Range= 32 -> 127
3331 23:02:58.747358
3332 23:02:58.750094 RX Vref 32 -> 127, step: 1
3333 23:02:58.750175
3334 23:02:58.753289 RX Delay -21 -> 252, step: 4
3335 23:02:58.753385
3336 23:02:58.756491 Set Vref, RX VrefLevel [Byte0]: 32
3337 23:02:58.760331 [Byte1]: 32
3338 23:02:58.760413
3339 23:02:58.763163 Set Vref, RX VrefLevel [Byte0]: 33
3340 23:02:58.766274 [Byte1]: 33
3341 23:02:58.770738
3342 23:02:58.770818 Set Vref, RX VrefLevel [Byte0]: 34
3343 23:02:58.773935 [Byte1]: 34
3344 23:02:58.778097
3345 23:02:58.778178 Set Vref, RX VrefLevel [Byte0]: 35
3346 23:02:58.781933 [Byte1]: 35
3347 23:02:58.786069
3348 23:02:58.786149 Set Vref, RX VrefLevel [Byte0]: 36
3349 23:02:58.789818 [Byte1]: 36
3350 23:02:58.794482
3351 23:02:58.794563 Set Vref, RX VrefLevel [Byte0]: 37
3352 23:02:58.797445 [Byte1]: 37
3353 23:02:58.802116
3354 23:02:58.802195 Set Vref, RX VrefLevel [Byte0]: 38
3355 23:02:58.805370 [Byte1]: 38
3356 23:02:58.810401
3357 23:02:58.810481 Set Vref, RX VrefLevel [Byte0]: 39
3358 23:02:58.813152 [Byte1]: 39
3359 23:02:58.817803
3360 23:02:58.817883 Set Vref, RX VrefLevel [Byte0]: 40
3361 23:02:58.821604 [Byte1]: 40
3362 23:02:58.825623
3363 23:02:58.825703 Set Vref, RX VrefLevel [Byte0]: 41
3364 23:02:58.829348 [Byte1]: 41
3365 23:02:58.833757
3366 23:02:58.833837 Set Vref, RX VrefLevel [Byte0]: 42
3367 23:02:58.837029 [Byte1]: 42
3368 23:02:58.841618
3369 23:02:58.841701 Set Vref, RX VrefLevel [Byte0]: 43
3370 23:02:58.844992 [Byte1]: 43
3371 23:02:58.849391
3372 23:02:58.849479 Set Vref, RX VrefLevel [Byte0]: 44
3373 23:02:58.852876 [Byte1]: 44
3374 23:02:58.857861
3375 23:02:58.857942 Set Vref, RX VrefLevel [Byte0]: 45
3376 23:02:58.860601 [Byte1]: 45
3377 23:02:58.865421
3378 23:02:58.865521 Set Vref, RX VrefLevel [Byte0]: 46
3379 23:02:58.868894 [Byte1]: 46
3380 23:02:58.873511
3381 23:02:58.873592 Set Vref, RX VrefLevel [Byte0]: 47
3382 23:02:58.876740 [Byte1]: 47
3383 23:02:58.881133
3384 23:02:58.881213 Set Vref, RX VrefLevel [Byte0]: 48
3385 23:02:58.884692 [Byte1]: 48
3386 23:02:58.889073
3387 23:02:58.889153 Set Vref, RX VrefLevel [Byte0]: 49
3388 23:02:58.895433 [Byte1]: 49
3389 23:02:58.895515
3390 23:02:58.898860 Set Vref, RX VrefLevel [Byte0]: 50
3391 23:02:58.902438 [Byte1]: 50
3392 23:02:58.902518
3393 23:02:58.905355 Set Vref, RX VrefLevel [Byte0]: 51
3394 23:02:58.908692 [Byte1]: 51
3395 23:02:58.912749
3396 23:02:58.912830 Set Vref, RX VrefLevel [Byte0]: 52
3397 23:02:58.916317 [Byte1]: 52
3398 23:02:58.920978
3399 23:02:58.921064 Set Vref, RX VrefLevel [Byte0]: 53
3400 23:02:58.924084 [Byte1]: 53
3401 23:02:58.928581
3402 23:02:58.928662 Set Vref, RX VrefLevel [Byte0]: 54
3403 23:02:58.932480 [Byte1]: 54
3404 23:02:58.936892
3405 23:02:58.936973 Set Vref, RX VrefLevel [Byte0]: 55
3406 23:02:58.939953 [Byte1]: 55
3407 23:02:58.944505
3408 23:02:58.944586 Set Vref, RX VrefLevel [Byte0]: 56
3409 23:02:58.948094 [Byte1]: 56
3410 23:02:58.952653
3411 23:02:58.952738 Set Vref, RX VrefLevel [Byte0]: 57
3412 23:02:58.956039 [Byte1]: 57
3413 23:02:58.960756
3414 23:02:58.960838 Set Vref, RX VrefLevel [Byte0]: 58
3415 23:02:58.964133 [Byte1]: 58
3416 23:02:58.968569
3417 23:02:58.968651 Set Vref, RX VrefLevel [Byte0]: 59
3418 23:02:58.971631 [Byte1]: 59
3419 23:02:58.976455
3420 23:02:58.976537 Set Vref, RX VrefLevel [Byte0]: 60
3421 23:02:58.979562 [Byte1]: 60
3422 23:02:58.984364
3423 23:02:58.984446 Set Vref, RX VrefLevel [Byte0]: 61
3424 23:02:58.987483 [Byte1]: 61
3425 23:02:58.992107
3426 23:02:58.992189 Set Vref, RX VrefLevel [Byte0]: 62
3427 23:02:58.995848 [Byte1]: 62
3428 23:02:59.000619
3429 23:02:59.000733 Set Vref, RX VrefLevel [Byte0]: 63
3430 23:02:59.003364 [Byte1]: 63
3431 23:02:59.008200
3432 23:02:59.008306 Set Vref, RX VrefLevel [Byte0]: 64
3433 23:02:59.011502 [Byte1]: 64
3434 23:02:59.016079
3435 23:02:59.016180 Set Vref, RX VrefLevel [Byte0]: 65
3436 23:02:59.019210 [Byte1]: 65
3437 23:02:59.023779
3438 23:02:59.023897 Set Vref, RX VrefLevel [Byte0]: 66
3439 23:02:59.027612 [Byte1]: 66
3440 23:02:59.031512
3441 23:02:59.031620 Final RX Vref Byte 0 = 46 to rank0
3442 23:02:59.035000 Final RX Vref Byte 1 = 60 to rank0
3443 23:02:59.038505 Final RX Vref Byte 0 = 46 to rank1
3444 23:02:59.041586 Final RX Vref Byte 1 = 60 to rank1==
3445 23:02:59.045203 Dram Type= 6, Freq= 0, CH_1, rank 0
3446 23:02:59.051812 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3447 23:02:59.051931 ==
3448 23:02:59.052026 DQS Delay:
3449 23:02:59.055129 DQS0 = 0, DQS1 = 0
3450 23:02:59.055240 DQM Delay:
3451 23:02:59.055456 DQM0 = 115, DQM1 = 111
3452 23:02:59.058491 DQ Delay:
3453 23:02:59.061320 DQ0 =118, DQ1 =112, DQ2 =106, DQ3 =112
3454 23:02:59.064727 DQ4 =112, DQ5 =126, DQ6 =126, DQ7 =114
3455 23:02:59.068323 DQ8 =100, DQ9 =100, DQ10 =116, DQ11 =102
3456 23:02:59.071448 DQ12 =118, DQ13 =118, DQ14 =120, DQ15 =118
3457 23:02:59.071551
3458 23:02:59.071647
3459 23:02:59.081373 [DQSOSCAuto] RK0, (LSB)MR18= 0x4f8, (MSB)MR19= 0x403, tDQSOscB0 = 413 ps tDQSOscB1 = 408 ps
3460 23:02:59.081497 CH1 RK0: MR19=403, MR18=4F8
3461 23:02:59.088144 CH1_RK0: MR19=0x403, MR18=0x4F8, DQSOSC=408, MR23=63, INC=39, DEC=26
3462 23:02:59.088276
3463 23:02:59.091327 ----->DramcWriteLeveling(PI) begin...
3464 23:02:59.091428 ==
3465 23:02:59.094662 Dram Type= 6, Freq= 0, CH_1, rank 1
3466 23:02:59.098109 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3467 23:02:59.102119 ==
3468 23:02:59.102218 Write leveling (Byte 0): 25 => 25
3469 23:02:59.104735 Write leveling (Byte 1): 29 => 29
3470 23:02:59.108162 DramcWriteLeveling(PI) end<-----
3471 23:02:59.108239
3472 23:02:59.108303 ==
3473 23:02:59.111094 Dram Type= 6, Freq= 0, CH_1, rank 1
3474 23:02:59.117876 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3475 23:02:59.117950 ==
3476 23:02:59.121042 [Gating] SW mode calibration
3477 23:02:59.127636 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3478 23:02:59.131283 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3479 23:02:59.137479 0 15 0 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
3480 23:02:59.141926 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3481 23:02:59.144329 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3482 23:02:59.150966 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3483 23:02:59.154785 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3484 23:02:59.157897 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3485 23:02:59.164012 0 15 24 | B1->B0 | 2e2e 3232 | 0 1 | (0 1) (1 0)
3486 23:02:59.167475 0 15 28 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
3487 23:02:59.170580 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3488 23:02:59.177563 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3489 23:02:59.180598 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3490 23:02:59.183842 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3491 23:02:59.190554 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3492 23:02:59.193776 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3493 23:02:59.196960 1 0 24 | B1->B0 | 3e3e 2e2e | 0 1 | (0 0) (0 0)
3494 23:02:59.203786 1 0 28 | B1->B0 | 4646 4444 | 0 0 | (0 0) (0 0)
3495 23:02:59.207185 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3496 23:02:59.210334 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3497 23:02:59.216828 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3498 23:02:59.220054 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3499 23:02:59.223736 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3500 23:02:59.230070 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3501 23:02:59.233474 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3502 23:02:59.236598 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3503 23:02:59.243584 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3504 23:02:59.246468 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3505 23:02:59.249722 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3506 23:02:59.256453 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3507 23:02:59.259605 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3508 23:02:59.263441 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3509 23:02:59.270105 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3510 23:02:59.272901 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3511 23:02:59.276630 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3512 23:02:59.283083 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3513 23:02:59.286161 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3514 23:02:59.289341 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3515 23:02:59.296218 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3516 23:02:59.299267 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3517 23:02:59.302566 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3518 23:02:59.309027 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
3519 23:02:59.309132 Total UI for P1: 0, mck2ui 16
3520 23:02:59.312753 best dqsien dly found for B1: ( 1, 3, 24)
3521 23:02:59.319205 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3522 23:02:59.322487 Total UI for P1: 0, mck2ui 16
3523 23:02:59.325654 best dqsien dly found for B0: ( 1, 3, 26)
3524 23:02:59.328974 best DQS0 dly(MCK, UI, PI) = (1, 3, 26)
3525 23:02:59.332327 best DQS1 dly(MCK, UI, PI) = (1, 3, 24)
3526 23:02:59.332398
3527 23:02:59.335809 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 26)
3528 23:02:59.338856 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 24)
3529 23:02:59.342444 [Gating] SW calibration Done
3530 23:02:59.342540 ==
3531 23:02:59.345365 Dram Type= 6, Freq= 0, CH_1, rank 1
3532 23:02:59.348556 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3533 23:02:59.352041 ==
3534 23:02:59.352139 RX Vref Scan: 0
3535 23:02:59.352232
3536 23:02:59.355747 RX Vref 0 -> 0, step: 1
3537 23:02:59.355821
3538 23:02:59.355883 RX Delay -40 -> 252, step: 8
3539 23:02:59.362191 iDelay=200, Bit 0, Center 123 (56 ~ 191) 136
3540 23:02:59.365697 iDelay=200, Bit 1, Center 111 (40 ~ 183) 144
3541 23:02:59.368686 iDelay=200, Bit 2, Center 107 (40 ~ 175) 136
3542 23:02:59.372628 iDelay=200, Bit 3, Center 111 (40 ~ 183) 144
3543 23:02:59.375538 iDelay=200, Bit 4, Center 115 (40 ~ 191) 152
3544 23:02:59.382388 iDelay=200, Bit 5, Center 127 (56 ~ 199) 144
3545 23:02:59.385335 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
3546 23:02:59.389135 iDelay=200, Bit 7, Center 115 (40 ~ 191) 152
3547 23:02:59.391851 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
3548 23:02:59.395387 iDelay=200, Bit 9, Center 99 (32 ~ 167) 136
3549 23:02:59.401765 iDelay=200, Bit 10, Center 111 (40 ~ 183) 144
3550 23:02:59.405027 iDelay=200, Bit 11, Center 103 (32 ~ 175) 144
3551 23:02:59.408591 iDelay=200, Bit 12, Center 119 (48 ~ 191) 144
3552 23:02:59.412460 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
3553 23:02:59.418473 iDelay=200, Bit 14, Center 115 (40 ~ 191) 152
3554 23:02:59.421822 iDelay=200, Bit 15, Center 119 (48 ~ 191) 144
3555 23:02:59.421913 ==
3556 23:02:59.424827 Dram Type= 6, Freq= 0, CH_1, rank 1
3557 23:02:59.428347 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3558 23:02:59.428447 ==
3559 23:02:59.431785 DQS Delay:
3560 23:02:59.431859 DQS0 = 0, DQS1 = 0
3561 23:02:59.431922 DQM Delay:
3562 23:02:59.434878 DQM0 = 117, DQM1 = 110
3563 23:02:59.434951 DQ Delay:
3564 23:02:59.438720 DQ0 =123, DQ1 =111, DQ2 =107, DQ3 =111
3565 23:02:59.441351 DQ4 =115, DQ5 =127, DQ6 =127, DQ7 =115
3566 23:02:59.444877 DQ8 =99, DQ9 =99, DQ10 =111, DQ11 =103
3567 23:02:59.451463 DQ12 =119, DQ13 =119, DQ14 =115, DQ15 =119
3568 23:02:59.451543
3569 23:02:59.451611
3570 23:02:59.451698 ==
3571 23:02:59.454943 Dram Type= 6, Freq= 0, CH_1, rank 1
3572 23:02:59.457883 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3573 23:02:59.457958 ==
3574 23:02:59.458019
3575 23:02:59.458077
3576 23:02:59.461340 TX Vref Scan disable
3577 23:02:59.461478 == TX Byte 0 ==
3578 23:02:59.467886 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3579 23:02:59.470982 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3580 23:02:59.471082 == TX Byte 1 ==
3581 23:02:59.477903 Update DQ dly =846 (3 ,2, 14) DQ OEN =(2 ,7)
3582 23:02:59.481084 Update DQM dly =846 (3 ,2, 14) DQM OEN =(2 ,7)
3583 23:02:59.481184 ==
3584 23:02:59.484061 Dram Type= 6, Freq= 0, CH_1, rank 1
3585 23:02:59.487426 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3586 23:02:59.487525 ==
3587 23:02:59.500646 TX Vref=22, minBit 9, minWin=25, winSum=425
3588 23:02:59.504727 TX Vref=24, minBit 9, minWin=25, winSum=429
3589 23:02:59.507301 TX Vref=26, minBit 9, minWin=25, winSum=431
3590 23:02:59.510878 TX Vref=28, minBit 8, minWin=26, winSum=435
3591 23:02:59.514037 TX Vref=30, minBit 8, minWin=26, winSum=431
3592 23:02:59.520666 TX Vref=32, minBit 7, minWin=26, winSum=431
3593 23:02:59.523654 [TxChooseVref] Worse bit 8, Min win 26, Win sum 435, Final Vref 28
3594 23:02:59.523759
3595 23:02:59.527395 Final TX Range 1 Vref 28
3596 23:02:59.527484
3597 23:02:59.527573 ==
3598 23:02:59.530590 Dram Type= 6, Freq= 0, CH_1, rank 1
3599 23:02:59.533774 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3600 23:02:59.537117 ==
3601 23:02:59.537211
3602 23:02:59.537301
3603 23:02:59.537391 TX Vref Scan disable
3604 23:02:59.540282 == TX Byte 0 ==
3605 23:02:59.543561 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3606 23:02:59.547219 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3607 23:02:59.550306 == TX Byte 1 ==
3608 23:02:59.553685 Update DQ dly =846 (3 ,2, 14) DQ OEN =(2 ,7)
3609 23:02:59.560225 Update DQM dly =846 (3 ,2, 14) DQM OEN =(2 ,7)
3610 23:02:59.560324
3611 23:02:59.560417 [DATLAT]
3612 23:02:59.560507 Freq=1200, CH1 RK1
3613 23:02:59.560593
3614 23:02:59.563381 DATLAT Default: 0xd
3615 23:02:59.567074 0, 0xFFFF, sum = 0
3616 23:02:59.567153 1, 0xFFFF, sum = 0
3617 23:02:59.570428 2, 0xFFFF, sum = 0
3618 23:02:59.570502 3, 0xFFFF, sum = 0
3619 23:02:59.573316 4, 0xFFFF, sum = 0
3620 23:02:59.573418 5, 0xFFFF, sum = 0
3621 23:02:59.576714 6, 0xFFFF, sum = 0
3622 23:02:59.576815 7, 0xFFFF, sum = 0
3623 23:02:59.580204 8, 0xFFFF, sum = 0
3624 23:02:59.580306 9, 0xFFFF, sum = 0
3625 23:02:59.583669 10, 0xFFFF, sum = 0
3626 23:02:59.583767 11, 0xFFFF, sum = 0
3627 23:02:59.586983 12, 0x0, sum = 1
3628 23:02:59.587085 13, 0x0, sum = 2
3629 23:02:59.590082 14, 0x0, sum = 3
3630 23:02:59.590181 15, 0x0, sum = 4
3631 23:02:59.593289 best_step = 13
3632 23:02:59.593386
3633 23:02:59.593522 ==
3634 23:02:59.596362 Dram Type= 6, Freq= 0, CH_1, rank 1
3635 23:02:59.599974 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3636 23:02:59.600071 ==
3637 23:02:59.603415 RX Vref Scan: 0
3638 23:02:59.603514
3639 23:02:59.603608 RX Vref 0 -> 0, step: 1
3640 23:02:59.603697
3641 23:02:59.606638 RX Delay -13 -> 252, step: 4
3642 23:02:59.613107 iDelay=199, Bit 0, Center 120 (55 ~ 186) 132
3643 23:02:59.616511 iDelay=199, Bit 1, Center 112 (47 ~ 178) 132
3644 23:02:59.619641 iDelay=199, Bit 2, Center 106 (43 ~ 170) 128
3645 23:02:59.623150 iDelay=199, Bit 3, Center 112 (47 ~ 178) 132
3646 23:02:59.626192 iDelay=199, Bit 4, Center 114 (47 ~ 182) 136
3647 23:02:59.633398 iDelay=199, Bit 5, Center 124 (59 ~ 190) 132
3648 23:02:59.636476 iDelay=199, Bit 6, Center 132 (67 ~ 198) 132
3649 23:02:59.639228 iDelay=199, Bit 7, Center 112 (47 ~ 178) 132
3650 23:02:59.642896 iDelay=199, Bit 8, Center 98 (31 ~ 166) 136
3651 23:02:59.646113 iDelay=199, Bit 9, Center 100 (35 ~ 166) 132
3652 23:02:59.653020 iDelay=199, Bit 10, Center 112 (47 ~ 178) 132
3653 23:02:59.656363 iDelay=199, Bit 11, Center 102 (35 ~ 170) 136
3654 23:02:59.659275 iDelay=199, Bit 12, Center 120 (55 ~ 186) 132
3655 23:02:59.662626 iDelay=199, Bit 13, Center 118 (51 ~ 186) 136
3656 23:02:59.669445 iDelay=199, Bit 14, Center 118 (51 ~ 186) 136
3657 23:02:59.672473 iDelay=199, Bit 15, Center 120 (51 ~ 190) 140
3658 23:02:59.672573 ==
3659 23:02:59.675855 Dram Type= 6, Freq= 0, CH_1, rank 1
3660 23:02:59.678826 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3661 23:02:59.678904 ==
3662 23:02:59.682494 DQS Delay:
3663 23:02:59.682598 DQS0 = 0, DQS1 = 0
3664 23:02:59.682694 DQM Delay:
3665 23:02:59.685351 DQM0 = 116, DQM1 = 111
3666 23:02:59.685486 DQ Delay:
3667 23:02:59.688596 DQ0 =120, DQ1 =112, DQ2 =106, DQ3 =112
3668 23:02:59.692086 DQ4 =114, DQ5 =124, DQ6 =132, DQ7 =112
3669 23:02:59.695457 DQ8 =98, DQ9 =100, DQ10 =112, DQ11 =102
3670 23:02:59.702005 DQ12 =120, DQ13 =118, DQ14 =118, DQ15 =120
3671 23:02:59.702112
3672 23:02:59.702207
3673 23:02:59.708815 [DQSOSCAuto] RK1, (LSB)MR18= 0xf7f2, (MSB)MR19= 0x303, tDQSOscB0 = 415 ps tDQSOscB1 = 413 ps
3674 23:02:59.711801 CH1 RK1: MR19=303, MR18=F7F2
3675 23:02:59.718552 CH1_RK1: MR19=0x303, MR18=0xF7F2, DQSOSC=413, MR23=63, INC=38, DEC=25
3676 23:02:59.722037 [RxdqsGatingPostProcess] freq 1200
3677 23:02:59.724991 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3678 23:02:59.728475 best DQS0 dly(2T, 0.5T) = (0, 11)
3679 23:02:59.732124 best DQS1 dly(2T, 0.5T) = (0, 11)
3680 23:02:59.735005 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3681 23:02:59.738482 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3682 23:02:59.741519 best DQS0 dly(2T, 0.5T) = (0, 11)
3683 23:02:59.745388 best DQS1 dly(2T, 0.5T) = (0, 11)
3684 23:02:59.748302 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3685 23:02:59.751708 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3686 23:02:59.754985 Pre-setting of DQS Precalculation
3687 23:02:59.758237 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3688 23:02:59.768201 sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2
3689 23:02:59.774901 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
3690 23:02:59.774990
3691 23:02:59.775076
3692 23:02:59.778014 [Calibration Summary] 2400 Mbps
3693 23:02:59.778099 CH 0, Rank 0
3694 23:02:59.781496 SW Impedance : PASS
3695 23:02:59.781580 DUTY Scan : NO K
3696 23:02:59.784343 ZQ Calibration : PASS
3697 23:02:59.788309 Jitter Meter : NO K
3698 23:02:59.788393 CBT Training : PASS
3699 23:02:59.790948 Write leveling : PASS
3700 23:02:59.794749 RX DQS gating : PASS
3701 23:02:59.794834 RX DQ/DQS(RDDQC) : PASS
3702 23:02:59.797925 TX DQ/DQS : PASS
3703 23:02:59.801217 RX DATLAT : PASS
3704 23:02:59.801299 RX DQ/DQS(Engine): PASS
3705 23:02:59.804187 TX OE : NO K
3706 23:02:59.804295 All Pass.
3707 23:02:59.804397
3708 23:02:59.807928 CH 0, Rank 1
3709 23:02:59.808012 SW Impedance : PASS
3710 23:02:59.811166 DUTY Scan : NO K
3711 23:02:59.813928 ZQ Calibration : PASS
3712 23:02:59.814010 Jitter Meter : NO K
3713 23:02:59.817710 CBT Training : PASS
3714 23:02:59.820593 Write leveling : PASS
3715 23:02:59.820694 RX DQS gating : PASS
3716 23:02:59.824247 RX DQ/DQS(RDDQC) : PASS
3717 23:02:59.827289 TX DQ/DQS : PASS
3718 23:02:59.827374 RX DATLAT : PASS
3719 23:02:59.830581 RX DQ/DQS(Engine): PASS
3720 23:02:59.833862 TX OE : NO K
3721 23:02:59.833947 All Pass.
3722 23:02:59.834031
3723 23:02:59.834110 CH 1, Rank 0
3724 23:02:59.837089 SW Impedance : PASS
3725 23:02:59.840466 DUTY Scan : NO K
3726 23:02:59.840550 ZQ Calibration : PASS
3727 23:02:59.844192 Jitter Meter : NO K
3728 23:02:59.847365 CBT Training : PASS
3729 23:02:59.847450 Write leveling : PASS
3730 23:02:59.850223 RX DQS gating : PASS
3731 23:02:59.854085 RX DQ/DQS(RDDQC) : PASS
3732 23:02:59.854168 TX DQ/DQS : PASS
3733 23:02:59.857472 RX DATLAT : PASS
3734 23:02:59.857555 RX DQ/DQS(Engine): PASS
3735 23:02:59.860269 TX OE : NO K
3736 23:02:59.860379 All Pass.
3737 23:02:59.860480
3738 23:02:59.863737 CH 1, Rank 1
3739 23:02:59.867087 SW Impedance : PASS
3740 23:02:59.867171 DUTY Scan : NO K
3741 23:02:59.870499 ZQ Calibration : PASS
3742 23:02:59.870582 Jitter Meter : NO K
3743 23:02:59.873171 CBT Training : PASS
3744 23:02:59.876679 Write leveling : PASS
3745 23:02:59.876763 RX DQS gating : PASS
3746 23:02:59.880064 RX DQ/DQS(RDDQC) : PASS
3747 23:02:59.883303 TX DQ/DQS : PASS
3748 23:02:59.883384 RX DATLAT : PASS
3749 23:02:59.886313 RX DQ/DQS(Engine): PASS
3750 23:02:59.889883 TX OE : NO K
3751 23:02:59.889966 All Pass.
3752 23:02:59.890030
3753 23:02:59.893182 DramC Write-DBI off
3754 23:02:59.893264 PER_BANK_REFRESH: Hybrid Mode
3755 23:02:59.896660 TX_TRACKING: ON
3756 23:02:59.906362 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1
3757 23:02:59.909581 [FAST_K] Save calibration result to emmc
3758 23:02:59.913029 dramc_set_vcore_voltage set vcore to 650000
3759 23:02:59.913113 Read voltage for 600, 5
3760 23:02:59.916060 Vio18 = 0
3761 23:02:59.916142 Vcore = 650000
3762 23:02:59.916206 Vdram = 0
3763 23:02:59.919480 Vddq = 0
3764 23:02:59.919561 Vmddr = 0
3765 23:02:59.926346 [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0
3766 23:02:59.929343 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
3767 23:02:59.932632 MEM_TYPE=3, freq_sel=19
3768 23:02:59.936148 sv_algorithm_assistance_LP4_1600
3769 23:02:59.939431 ============ PULL DRAM RESETB DOWN ============
3770 23:02:59.942782 ========== PULL DRAM RESETB DOWN end =========
3771 23:02:59.949117 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3772 23:02:59.952334 ===================================
3773 23:02:59.952416 LPDDR4 DRAM CONFIGURATION
3774 23:02:59.955648 ===================================
3775 23:02:59.959380 EX_ROW_EN[0] = 0x0
3776 23:02:59.962541 EX_ROW_EN[1] = 0x0
3777 23:02:59.962624 LP4Y_EN = 0x0
3778 23:02:59.966222 WORK_FSP = 0x0
3779 23:02:59.966304 WL = 0x2
3780 23:02:59.969007 RL = 0x2
3781 23:02:59.969088 BL = 0x2
3782 23:02:59.972369 RPST = 0x0
3783 23:02:59.972450 RD_PRE = 0x0
3784 23:02:59.975922 WR_PRE = 0x1
3785 23:02:59.976004 WR_PST = 0x0
3786 23:02:59.978865 DBI_WR = 0x0
3787 23:02:59.978947 DBI_RD = 0x0
3788 23:02:59.981950 OTF = 0x1
3789 23:02:59.985279 ===================================
3790 23:02:59.988737 ===================================
3791 23:02:59.988819 ANA top config
3792 23:02:59.992097 ===================================
3793 23:02:59.995344 DLL_ASYNC_EN = 0
3794 23:02:59.998536 ALL_SLAVE_EN = 1
3795 23:03:00.002060 NEW_RANK_MODE = 1
3796 23:03:00.002143 DLL_IDLE_MODE = 1
3797 23:03:00.005683 LP45_APHY_COMB_EN = 1
3798 23:03:00.008478 TX_ODT_DIS = 1
3799 23:03:00.011846 NEW_8X_MODE = 1
3800 23:03:00.015478 ===================================
3801 23:03:00.018592 ===================================
3802 23:03:00.021772 data_rate = 1200
3803 23:03:00.021858 CKR = 1
3804 23:03:00.025520 DQ_P2S_RATIO = 8
3805 23:03:00.028402 ===================================
3806 23:03:00.031697 CA_P2S_RATIO = 8
3807 23:03:00.034733 DQ_CA_OPEN = 0
3808 23:03:00.038306 DQ_SEMI_OPEN = 0
3809 23:03:00.041272 CA_SEMI_OPEN = 0
3810 23:03:00.041359 CA_FULL_RATE = 0
3811 23:03:00.044931 DQ_CKDIV4_EN = 1
3812 23:03:00.048191 CA_CKDIV4_EN = 1
3813 23:03:00.051580 CA_PREDIV_EN = 0
3814 23:03:00.055006 PH8_DLY = 0
3815 23:03:00.057714 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
3816 23:03:00.061270 DQ_AAMCK_DIV = 4
3817 23:03:00.061369 CA_AAMCK_DIV = 4
3818 23:03:00.064450 CA_ADMCK_DIV = 4
3819 23:03:00.067643 DQ_TRACK_CA_EN = 0
3820 23:03:00.071547 CA_PICK = 600
3821 23:03:00.074300 CA_MCKIO = 600
3822 23:03:00.077740 MCKIO_SEMI = 0
3823 23:03:00.080717 PLL_FREQ = 2288
3824 23:03:00.080799 DQ_UI_PI_RATIO = 32
3825 23:03:00.084065 CA_UI_PI_RATIO = 0
3826 23:03:00.087303 ===================================
3827 23:03:00.091122 ===================================
3828 23:03:00.094050 memory_type:LPDDR4
3829 23:03:00.097149 GP_NUM : 10
3830 23:03:00.097230 SRAM_EN : 1
3831 23:03:00.101037 MD32_EN : 0
3832 23:03:00.104263 ===================================
3833 23:03:00.107447 [ANA_INIT] >>>>>>>>>>>>>>
3834 23:03:00.107529 <<<<<< [CONFIGURE PHASE]: ANA_TX
3835 23:03:00.113860 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
3836 23:03:00.117395 ===================================
3837 23:03:00.117517 data_rate = 1200,PCW = 0X5800
3838 23:03:00.120953 ===================================
3839 23:03:00.123675 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
3840 23:03:00.130392 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3841 23:03:00.136772 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3842 23:03:00.140214 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
3843 23:03:00.143590 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
3844 23:03:00.146667 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
3845 23:03:00.150048 [ANA_INIT] flow start
3846 23:03:00.153400 [ANA_INIT] PLL >>>>>>>>
3847 23:03:00.153530 [ANA_INIT] PLL <<<<<<<<
3848 23:03:00.156601 [ANA_INIT] MIDPI >>>>>>>>
3849 23:03:00.159854 [ANA_INIT] MIDPI <<<<<<<<
3850 23:03:00.159938 [ANA_INIT] DLL >>>>>>>>
3851 23:03:00.163315 [ANA_INIT] flow end
3852 23:03:00.166848 ============ LP4 DIFF to SE enter ============
3853 23:03:00.169805 ============ LP4 DIFF to SE exit ============
3854 23:03:00.173287 [ANA_INIT] <<<<<<<<<<<<<
3855 23:03:00.176180 [Flow] Enable top DCM control >>>>>
3856 23:03:00.179292 [Flow] Enable top DCM control <<<<<
3857 23:03:00.182396 Enable DLL master slave shuffle
3858 23:03:00.189256 ==============================================================
3859 23:03:00.189374 Gating Mode config
3860 23:03:00.195811 ==============================================================
3861 23:03:00.199265 Config description:
3862 23:03:00.209146 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
3863 23:03:00.215978 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
3864 23:03:00.219246 SELPH_MODE 0: By rank 1: By Phase
3865 23:03:00.225741 ==============================================================
3866 23:03:00.229006 GAT_TRACK_EN = 1
3867 23:03:00.229091 RX_GATING_MODE = 2
3868 23:03:00.232080 RX_GATING_TRACK_MODE = 2
3869 23:03:00.235456 SELPH_MODE = 1
3870 23:03:00.238728 PICG_EARLY_EN = 1
3871 23:03:00.242319 VALID_LAT_VALUE = 1
3872 23:03:00.248795 ==============================================================
3873 23:03:00.252489 Enter into Gating configuration >>>>
3874 23:03:00.255358 Exit from Gating configuration <<<<
3875 23:03:00.258785 Enter into DVFS_PRE_config >>>>>
3876 23:03:00.268504 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
3877 23:03:00.271567 Exit from DVFS_PRE_config <<<<<
3878 23:03:00.275004 Enter into PICG configuration >>>>
3879 23:03:00.278356 Exit from PICG configuration <<<<
3880 23:03:00.281319 [RX_INPUT] configuration >>>>>
3881 23:03:00.284624 [RX_INPUT] configuration <<<<<
3882 23:03:00.288753 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
3883 23:03:00.294920 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
3884 23:03:00.301443 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
3885 23:03:00.307602 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
3886 23:03:00.314385 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
3887 23:03:00.317853 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
3888 23:03:00.324602 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
3889 23:03:00.327853 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
3890 23:03:00.330980 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
3891 23:03:00.334399 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
3892 23:03:00.341148 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
3893 23:03:00.344216 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3894 23:03:00.347455 ===================================
3895 23:03:00.350857 LPDDR4 DRAM CONFIGURATION
3896 23:03:00.354457 ===================================
3897 23:03:00.354540 EX_ROW_EN[0] = 0x0
3898 23:03:00.357306 EX_ROW_EN[1] = 0x0
3899 23:03:00.357388 LP4Y_EN = 0x0
3900 23:03:00.360507 WORK_FSP = 0x0
3901 23:03:00.360589 WL = 0x2
3902 23:03:00.363921 RL = 0x2
3903 23:03:00.364004 BL = 0x2
3904 23:03:00.367189 RPST = 0x0
3905 23:03:00.370341 RD_PRE = 0x0
3906 23:03:00.370452 WR_PRE = 0x1
3907 23:03:00.373796 WR_PST = 0x0
3908 23:03:00.373878 DBI_WR = 0x0
3909 23:03:00.376901 DBI_RD = 0x0
3910 23:03:00.376982 OTF = 0x1
3911 23:03:00.380619 ===================================
3912 23:03:00.383955 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
3913 23:03:00.390694 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
3914 23:03:00.393840 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3915 23:03:00.397295 ===================================
3916 23:03:00.400433 LPDDR4 DRAM CONFIGURATION
3917 23:03:00.403346 ===================================
3918 23:03:00.403442 EX_ROW_EN[0] = 0x10
3919 23:03:00.406854 EX_ROW_EN[1] = 0x0
3920 23:03:00.406935 LP4Y_EN = 0x0
3921 23:03:00.410426 WORK_FSP = 0x0
3922 23:03:00.410509 WL = 0x2
3923 23:03:00.413253 RL = 0x2
3924 23:03:00.413334 BL = 0x2
3925 23:03:00.416861 RPST = 0x0
3926 23:03:00.420134 RD_PRE = 0x0
3927 23:03:00.420217 WR_PRE = 0x1
3928 23:03:00.423342 WR_PST = 0x0
3929 23:03:00.423457 DBI_WR = 0x0
3930 23:03:00.426677 DBI_RD = 0x0
3931 23:03:00.426760 OTF = 0x1
3932 23:03:00.429640 ===================================
3933 23:03:00.436709 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
3934 23:03:00.440280 nWR fixed to 30
3935 23:03:00.443843 [ModeRegInit_LP4] CH0 RK0
3936 23:03:00.443934 [ModeRegInit_LP4] CH0 RK1
3937 23:03:00.447039 [ModeRegInit_LP4] CH1 RK0
3938 23:03:00.450499 [ModeRegInit_LP4] CH1 RK1
3939 23:03:00.450583 match AC timing 17
3940 23:03:00.457034 dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 1
3941 23:03:00.460093 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3942 23:03:00.463900 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
3943 23:03:00.470343 [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17
3944 23:03:00.473269 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
3945 23:03:00.473378 ==
3946 23:03:00.477016 Dram Type= 6, Freq= 0, CH_0, rank 0
3947 23:03:00.480088 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3948 23:03:00.480191 ==
3949 23:03:00.486427 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3950 23:03:00.493224 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
3951 23:03:00.496781 [CA 0] Center 36 (6~66) winsize 61
3952 23:03:00.500065 [CA 1] Center 36 (6~66) winsize 61
3953 23:03:00.503136 [CA 2] Center 34 (3~65) winsize 63
3954 23:03:00.506680 [CA 3] Center 34 (4~65) winsize 62
3955 23:03:00.509484 [CA 4] Center 33 (3~64) winsize 62
3956 23:03:00.512789 [CA 5] Center 33 (2~64) winsize 63
3957 23:03:00.512888
3958 23:03:00.516146 [CmdBusTrainingLP45] Vref(ca) range 1: 33
3959 23:03:00.516246
3960 23:03:00.519611 [CATrainingPosCal] consider 1 rank data
3961 23:03:00.522725 u2DelayCellTimex100 = 270/100 ps
3962 23:03:00.526430 CA0 delay=36 (6~66),Diff = 3 PI (28 cell)
3963 23:03:00.529483 CA1 delay=36 (6~66),Diff = 3 PI (28 cell)
3964 23:03:00.532469 CA2 delay=34 (3~65),Diff = 1 PI (9 cell)
3965 23:03:00.536215 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
3966 23:03:00.542481 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
3967 23:03:00.545869 CA5 delay=33 (2~64),Diff = 0 PI (0 cell)
3968 23:03:00.545954
3969 23:03:00.549819 CA PerBit enable=1, Macro0, CA PI delay=33
3970 23:03:00.549895
3971 23:03:00.552551 [CBTSetCACLKResult] CA Dly = 33
3972 23:03:00.552649 CS Dly: 5 (0~36)
3973 23:03:00.552743 ==
3974 23:03:00.556058 Dram Type= 6, Freq= 0, CH_0, rank 1
3975 23:03:00.562616 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3976 23:03:00.562717 ==
3977 23:03:00.565978 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3978 23:03:00.572491 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
3979 23:03:00.575743 [CA 0] Center 36 (6~66) winsize 61
3980 23:03:00.578804 [CA 1] Center 36 (6~66) winsize 61
3981 23:03:00.582129 [CA 2] Center 33 (3~64) winsize 62
3982 23:03:00.585727 [CA 3] Center 33 (3~64) winsize 62
3983 23:03:00.588536 [CA 4] Center 33 (3~64) winsize 62
3984 23:03:00.592002 [CA 5] Center 33 (2~64) winsize 63
3985 23:03:00.592102
3986 23:03:00.595800 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3987 23:03:00.595907
3988 23:03:00.598685 [CATrainingPosCal] consider 2 rank data
3989 23:03:00.602029 u2DelayCellTimex100 = 270/100 ps
3990 23:03:00.605640 CA0 delay=36 (6~66),Diff = 3 PI (28 cell)
3991 23:03:00.611762 CA1 delay=36 (6~66),Diff = 3 PI (28 cell)
3992 23:03:00.615394 CA2 delay=33 (3~64),Diff = 0 PI (0 cell)
3993 23:03:00.618219 CA3 delay=34 (4~64),Diff = 1 PI (9 cell)
3994 23:03:00.622064 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
3995 23:03:00.624986 CA5 delay=33 (2~64),Diff = 0 PI (0 cell)
3996 23:03:00.625074
3997 23:03:00.628379 CA PerBit enable=1, Macro0, CA PI delay=33
3998 23:03:00.628460
3999 23:03:00.631967 [CBTSetCACLKResult] CA Dly = 33
4000 23:03:00.634787 CS Dly: 5 (0~37)
4001 23:03:00.634870
4002 23:03:00.638234 ----->DramcWriteLeveling(PI) begin...
4003 23:03:00.638317 ==
4004 23:03:00.641484 Dram Type= 6, Freq= 0, CH_0, rank 0
4005 23:03:00.644865 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4006 23:03:00.644972 ==
4007 23:03:00.648348 Write leveling (Byte 0): 35 => 35
4008 23:03:00.651384 Write leveling (Byte 1): 31 => 31
4009 23:03:00.654786 DramcWriteLeveling(PI) end<-----
4010 23:03:00.654886
4011 23:03:00.654976 ==
4012 23:03:00.658379 Dram Type= 6, Freq= 0, CH_0, rank 0
4013 23:03:00.661619 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4014 23:03:00.661719 ==
4015 23:03:00.664834 [Gating] SW mode calibration
4016 23:03:00.671779 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4017 23:03:00.677908 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4018 23:03:00.681471 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4019 23:03:00.684615 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4020 23:03:00.691039 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4021 23:03:00.694659 0 9 12 | B1->B0 | 3434 3333 | 1 0 | (1 0) (0 1)
4022 23:03:00.697714 0 9 16 | B1->B0 | 2e2e 2323 | 0 0 | (1 1) (0 0)
4023 23:03:00.704233 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4024 23:03:00.707947 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4025 23:03:00.711150 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4026 23:03:00.717575 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4027 23:03:00.721101 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4028 23:03:00.724368 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4029 23:03:00.730677 0 10 12 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
4030 23:03:00.734214 0 10 16 | B1->B0 | 3636 4444 | 1 0 | (1 1) (0 0)
4031 23:03:00.737585 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4032 23:03:00.744020 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4033 23:03:00.747609 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4034 23:03:00.750683 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4035 23:03:00.757469 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4036 23:03:00.761004 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4037 23:03:00.764051 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4038 23:03:00.770677 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4039 23:03:00.773821 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4040 23:03:00.777178 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4041 23:03:00.784134 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4042 23:03:00.786939 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4043 23:03:00.790456 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4044 23:03:00.796835 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4045 23:03:00.800375 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4046 23:03:00.803526 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4047 23:03:00.810325 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4048 23:03:00.813724 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4049 23:03:00.816768 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4050 23:03:00.823418 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4051 23:03:00.826419 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4052 23:03:00.829823 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4053 23:03:00.836435 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4054 23:03:00.839997 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
4055 23:03:00.842893 Total UI for P1: 0, mck2ui 16
4056 23:03:00.846607 best dqsien dly found for B0: ( 0, 13, 14)
4057 23:03:00.849610 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4058 23:03:00.853096 Total UI for P1: 0, mck2ui 16
4059 23:03:00.856405 best dqsien dly found for B1: ( 0, 13, 18)
4060 23:03:00.859569 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
4061 23:03:00.862840 best DQS1 dly(MCK, UI, PI) = (0, 13, 18)
4062 23:03:00.862940
4063 23:03:00.869429 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
4064 23:03:00.872892 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 18)
4065 23:03:00.876016 [Gating] SW calibration Done
4066 23:03:00.876118 ==
4067 23:03:00.879177 Dram Type= 6, Freq= 0, CH_0, rank 0
4068 23:03:00.882505 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4069 23:03:00.882607 ==
4070 23:03:00.882700 RX Vref Scan: 0
4071 23:03:00.885766
4072 23:03:00.885864 RX Vref 0 -> 0, step: 1
4073 23:03:00.885959
4074 23:03:00.889664 RX Delay -230 -> 252, step: 16
4075 23:03:00.892693 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
4076 23:03:00.899418 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4077 23:03:00.902408 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4078 23:03:00.905544 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4079 23:03:00.909044 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4080 23:03:00.915200 iDelay=218, Bit 5, Center 33 (-134 ~ 201) 336
4081 23:03:00.918876 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4082 23:03:00.921876 iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336
4083 23:03:00.925398 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4084 23:03:00.928547 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
4085 23:03:00.935495 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4086 23:03:00.938528 iDelay=218, Bit 11, Center 25 (-150 ~ 201) 352
4087 23:03:00.942248 iDelay=218, Bit 12, Center 33 (-134 ~ 201) 336
4088 23:03:00.945417 iDelay=218, Bit 13, Center 33 (-134 ~ 201) 336
4089 23:03:00.952107 iDelay=218, Bit 14, Center 49 (-118 ~ 217) 336
4090 23:03:00.954979 iDelay=218, Bit 15, Center 33 (-134 ~ 201) 336
4091 23:03:00.955061 ==
4092 23:03:00.958514 Dram Type= 6, Freq= 0, CH_0, rank 0
4093 23:03:00.961576 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4094 23:03:00.961658 ==
4095 23:03:00.965057 DQS Delay:
4096 23:03:00.965138 DQS0 = 0, DQS1 = 0
4097 23:03:00.968140 DQM Delay:
4098 23:03:00.968254 DQM0 = 43, DQM1 = 30
4099 23:03:00.968320 DQ Delay:
4100 23:03:00.971510 DQ0 =41, DQ1 =41, DQ2 =41, DQ3 =41
4101 23:03:00.974648 DQ4 =41, DQ5 =33, DQ6 =57, DQ7 =49
4102 23:03:00.977893 DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =25
4103 23:03:00.981497 DQ12 =33, DQ13 =33, DQ14 =49, DQ15 =33
4104 23:03:00.981578
4105 23:03:00.981643
4106 23:03:00.984637 ==
4107 23:03:00.984718 Dram Type= 6, Freq= 0, CH_0, rank 0
4108 23:03:00.991129 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4109 23:03:00.991236 ==
4110 23:03:00.991334
4111 23:03:00.991423
4112 23:03:00.995109 TX Vref Scan disable
4113 23:03:00.995215 == TX Byte 0 ==
4114 23:03:01.000882 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
4115 23:03:01.004590 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
4116 23:03:01.004696 == TX Byte 1 ==
4117 23:03:01.010835 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4118 23:03:01.014461 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4119 23:03:01.014563 ==
4120 23:03:01.017960 Dram Type= 6, Freq= 0, CH_0, rank 0
4121 23:03:01.021213 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4122 23:03:01.021311 ==
4123 23:03:01.021439
4124 23:03:01.021544
4125 23:03:01.024249 TX Vref Scan disable
4126 23:03:01.027560 == TX Byte 0 ==
4127 23:03:01.030780 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
4128 23:03:01.034214 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
4129 23:03:01.037496 == TX Byte 1 ==
4130 23:03:01.040654 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4131 23:03:01.043947 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4132 23:03:01.044050
4133 23:03:01.047452 [DATLAT]
4134 23:03:01.047549 Freq=600, CH0 RK0
4135 23:03:01.047651
4136 23:03:01.050490 DATLAT Default: 0x9
4137 23:03:01.050579 0, 0xFFFF, sum = 0
4138 23:03:01.054241 1, 0xFFFF, sum = 0
4139 23:03:01.054340 2, 0xFFFF, sum = 0
4140 23:03:01.057609 3, 0xFFFF, sum = 0
4141 23:03:01.057717 4, 0xFFFF, sum = 0
4142 23:03:01.060602 5, 0xFFFF, sum = 0
4143 23:03:01.060699 6, 0xFFFF, sum = 0
4144 23:03:01.063664 7, 0xFFFF, sum = 0
4145 23:03:01.063764 8, 0x0, sum = 1
4146 23:03:01.067439 9, 0x0, sum = 2
4147 23:03:01.067546 10, 0x0, sum = 3
4148 23:03:01.070646 11, 0x0, sum = 4
4149 23:03:01.070724 best_step = 9
4150 23:03:01.070791
4151 23:03:01.070853 ==
4152 23:03:01.073822 Dram Type= 6, Freq= 0, CH_0, rank 0
4153 23:03:01.080272 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4154 23:03:01.080373 ==
4155 23:03:01.080469 RX Vref Scan: 1
4156 23:03:01.080559
4157 23:03:01.084063 RX Vref 0 -> 0, step: 1
4158 23:03:01.084159
4159 23:03:01.087440 RX Delay -195 -> 252, step: 8
4160 23:03:01.087534
4161 23:03:01.090699 Set Vref, RX VrefLevel [Byte0]: 61
4162 23:03:01.093737 [Byte1]: 48
4163 23:03:01.093817
4164 23:03:01.097320 Final RX Vref Byte 0 = 61 to rank0
4165 23:03:01.100590 Final RX Vref Byte 1 = 48 to rank0
4166 23:03:01.103946 Final RX Vref Byte 0 = 61 to rank1
4167 23:03:01.106797 Final RX Vref Byte 1 = 48 to rank1==
4168 23:03:01.110274 Dram Type= 6, Freq= 0, CH_0, rank 0
4169 23:03:01.113733 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4170 23:03:01.113815 ==
4171 23:03:01.116980 DQS Delay:
4172 23:03:01.117080 DQS0 = 0, DQS1 = 0
4173 23:03:01.120448 DQM Delay:
4174 23:03:01.120560 DQM0 = 43, DQM1 = 32
4175 23:03:01.120626 DQ Delay:
4176 23:03:01.123244 DQ0 =44, DQ1 =44, DQ2 =40, DQ3 =40
4177 23:03:01.127166 DQ4 =44, DQ5 =36, DQ6 =52, DQ7 =48
4178 23:03:01.129965 DQ8 =24, DQ9 =20, DQ10 =32, DQ11 =24
4179 23:03:01.133676 DQ12 =36, DQ13 =36, DQ14 =44, DQ15 =40
4180 23:03:01.133757
4181 23:03:01.133821
4182 23:03:01.143303 [DQSOSCAuto] RK0, (LSB)MR18= 0x6940, (MSB)MR19= 0x808, tDQSOscB0 = 397 ps tDQSOscB1 = 390 ps
4183 23:03:01.146626 CH0 RK0: MR19=808, MR18=6940
4184 23:03:01.153568 CH0_RK0: MR19=0x808, MR18=0x6940, DQSOSC=390, MR23=63, INC=172, DEC=114
4185 23:03:01.153679
4186 23:03:01.156978 ----->DramcWriteLeveling(PI) begin...
4187 23:03:01.157086 ==
4188 23:03:01.159591 Dram Type= 6, Freq= 0, CH_0, rank 1
4189 23:03:01.163393 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4190 23:03:01.163483 ==
4191 23:03:01.166677 Write leveling (Byte 0): 31 => 31
4192 23:03:01.169444 Write leveling (Byte 1): 31 => 31
4193 23:03:01.173007 DramcWriteLeveling(PI) end<-----
4194 23:03:01.173104
4195 23:03:01.173206 ==
4196 23:03:01.176117 Dram Type= 6, Freq= 0, CH_0, rank 1
4197 23:03:01.179575 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4198 23:03:01.179674 ==
4199 23:03:01.182695 [Gating] SW mode calibration
4200 23:03:01.189579 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4201 23:03:01.196108 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4202 23:03:01.199311 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4203 23:03:01.203086 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4204 23:03:01.209183 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4205 23:03:01.212669 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4206 23:03:01.215701 0 9 16 | B1->B0 | 2e2e 2727 | 1 1 | (1 0) (1 0)
4207 23:03:01.222644 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4208 23:03:01.225424 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4209 23:03:01.228764 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4210 23:03:01.235433 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4211 23:03:01.238658 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4212 23:03:01.242325 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4213 23:03:01.248958 0 10 12 | B1->B0 | 2323 2828 | 0 0 | (0 0) (0 0)
4214 23:03:01.252124 0 10 16 | B1->B0 | 3737 4141 | 0 0 | (0 0) (0 0)
4215 23:03:01.255292 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4216 23:03:01.261944 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4217 23:03:01.265697 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4218 23:03:01.268481 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4219 23:03:01.275433 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4220 23:03:01.278782 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4221 23:03:01.281857 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4222 23:03:01.288630 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4223 23:03:01.291779 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4224 23:03:01.295173 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4225 23:03:01.301289 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4226 23:03:01.304714 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4227 23:03:01.307914 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4228 23:03:01.314514 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4229 23:03:01.317866 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4230 23:03:01.321104 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4231 23:03:01.327731 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4232 23:03:01.330915 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4233 23:03:01.334354 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4234 23:03:01.340944 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4235 23:03:01.344235 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4236 23:03:01.347530 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4237 23:03:01.354186 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
4238 23:03:01.357988 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
4239 23:03:01.360744 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4240 23:03:01.364280 Total UI for P1: 0, mck2ui 16
4241 23:03:01.367525 best dqsien dly found for B0: ( 0, 13, 14)
4242 23:03:01.370589 Total UI for P1: 0, mck2ui 16
4243 23:03:01.373996 best dqsien dly found for B1: ( 0, 13, 14)
4244 23:03:01.377542 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
4245 23:03:01.383657 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4246 23:03:01.383735
4247 23:03:01.387043 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
4248 23:03:01.390718 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4249 23:03:01.393599 [Gating] SW calibration Done
4250 23:03:01.393705 ==
4251 23:03:01.396909 Dram Type= 6, Freq= 0, CH_0, rank 1
4252 23:03:01.400412 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4253 23:03:01.400489 ==
4254 23:03:01.403698 RX Vref Scan: 0
4255 23:03:01.403776
4256 23:03:01.403839 RX Vref 0 -> 0, step: 1
4257 23:03:01.403901
4258 23:03:01.407019 RX Delay -230 -> 252, step: 16
4259 23:03:01.410187 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
4260 23:03:01.416913 iDelay=218, Bit 1, Center 49 (-118 ~ 217) 336
4261 23:03:01.420296 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4262 23:03:01.423725 iDelay=218, Bit 3, Center 33 (-134 ~ 201) 336
4263 23:03:01.426905 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4264 23:03:01.433377 iDelay=218, Bit 5, Center 33 (-134 ~ 201) 336
4265 23:03:01.436904 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4266 23:03:01.439758 iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336
4267 23:03:01.443491 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4268 23:03:01.447077 iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320
4269 23:03:01.452972 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4270 23:03:01.456589 iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320
4271 23:03:01.459475 iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320
4272 23:03:01.463128 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4273 23:03:01.469526 iDelay=218, Bit 14, Center 49 (-118 ~ 217) 336
4274 23:03:01.472793 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4275 23:03:01.472893 ==
4276 23:03:01.476158 Dram Type= 6, Freq= 0, CH_0, rank 1
4277 23:03:01.479527 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4278 23:03:01.479609 ==
4279 23:03:01.482832 DQS Delay:
4280 23:03:01.482903 DQS0 = 0, DQS1 = 0
4281 23:03:01.485748 DQM Delay:
4282 23:03:01.485880 DQM0 = 41, DQM1 = 36
4283 23:03:01.485943 DQ Delay:
4284 23:03:01.489217 DQ0 =41, DQ1 =49, DQ2 =33, DQ3 =33
4285 23:03:01.492642 DQ4 =41, DQ5 =33, DQ6 =49, DQ7 =49
4286 23:03:01.495975 DQ8 =25, DQ9 =25, DQ10 =33, DQ11 =25
4287 23:03:01.499167 DQ12 =41, DQ13 =49, DQ14 =49, DQ15 =41
4288 23:03:01.499273
4289 23:03:01.499370
4290 23:03:01.502798 ==
4291 23:03:01.505533 Dram Type= 6, Freq= 0, CH_0, rank 1
4292 23:03:01.508856 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4293 23:03:01.508939 ==
4294 23:03:01.508999
4295 23:03:01.509057
4296 23:03:01.512177 TX Vref Scan disable
4297 23:03:01.512248 == TX Byte 0 ==
4298 23:03:01.518592 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4299 23:03:01.521814 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4300 23:03:01.521894 == TX Byte 1 ==
4301 23:03:01.528533 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4302 23:03:01.531846 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4303 23:03:01.531922 ==
4304 23:03:01.535276 Dram Type= 6, Freq= 0, CH_0, rank 1
4305 23:03:01.539108 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4306 23:03:01.539186 ==
4307 23:03:01.539248
4308 23:03:01.539306
4309 23:03:01.541730 TX Vref Scan disable
4310 23:03:01.545190 == TX Byte 0 ==
4311 23:03:01.548238 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4312 23:03:01.551457 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4313 23:03:01.555251 == TX Byte 1 ==
4314 23:03:01.558277 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4315 23:03:01.564768 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4316 23:03:01.564884
4317 23:03:01.564975 [DATLAT]
4318 23:03:01.565068 Freq=600, CH0 RK1
4319 23:03:01.565157
4320 23:03:01.568512 DATLAT Default: 0x9
4321 23:03:01.568647 0, 0xFFFF, sum = 0
4322 23:03:01.572043 1, 0xFFFF, sum = 0
4323 23:03:01.572163 2, 0xFFFF, sum = 0
4324 23:03:01.574655 3, 0xFFFF, sum = 0
4325 23:03:01.577986 4, 0xFFFF, sum = 0
4326 23:03:01.578068 5, 0xFFFF, sum = 0
4327 23:03:01.581596 6, 0xFFFF, sum = 0
4328 23:03:01.581681 7, 0xFFFF, sum = 0
4329 23:03:01.584757 8, 0x0, sum = 1
4330 23:03:01.584839 9, 0x0, sum = 2
4331 23:03:01.584904 10, 0x0, sum = 3
4332 23:03:01.588198 11, 0x0, sum = 4
4333 23:03:01.588304 best_step = 9
4334 23:03:01.588374
4335 23:03:01.588435 ==
4336 23:03:01.591622 Dram Type= 6, Freq= 0, CH_0, rank 1
4337 23:03:01.597907 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4338 23:03:01.597993 ==
4339 23:03:01.598059 RX Vref Scan: 0
4340 23:03:01.598120
4341 23:03:01.601350 RX Vref 0 -> 0, step: 1
4342 23:03:01.601472
4343 23:03:01.604246 RX Delay -179 -> 252, step: 8
4344 23:03:01.610894 iDelay=205, Bit 0, Center 36 (-115 ~ 188) 304
4345 23:03:01.614261 iDelay=205, Bit 1, Center 44 (-107 ~ 196) 304
4346 23:03:01.617443 iDelay=205, Bit 2, Center 36 (-115 ~ 188) 304
4347 23:03:01.621099 iDelay=205, Bit 3, Center 40 (-115 ~ 196) 312
4348 23:03:01.624326 iDelay=205, Bit 4, Center 44 (-107 ~ 196) 304
4349 23:03:01.631428 iDelay=205, Bit 5, Center 32 (-123 ~ 188) 312
4350 23:03:01.634449 iDelay=205, Bit 6, Center 48 (-107 ~ 204) 312
4351 23:03:01.637303 iDelay=205, Bit 7, Center 52 (-99 ~ 204) 304
4352 23:03:01.641128 iDelay=205, Bit 8, Center 28 (-123 ~ 180) 304
4353 23:03:01.647327 iDelay=205, Bit 9, Center 20 (-131 ~ 172) 304
4354 23:03:01.650978 iDelay=205, Bit 10, Center 40 (-115 ~ 196) 312
4355 23:03:01.653998 iDelay=205, Bit 11, Center 28 (-123 ~ 180) 304
4356 23:03:01.657645 iDelay=205, Bit 12, Center 44 (-107 ~ 196) 304
4357 23:03:01.663481 iDelay=205, Bit 13, Center 44 (-107 ~ 196) 304
4358 23:03:01.666987 iDelay=205, Bit 14, Center 48 (-99 ~ 196) 296
4359 23:03:01.670098 iDelay=205, Bit 15, Center 44 (-107 ~ 196) 304
4360 23:03:01.670179 ==
4361 23:03:01.673564 Dram Type= 6, Freq= 0, CH_0, rank 1
4362 23:03:01.677112 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4363 23:03:01.677192 ==
4364 23:03:01.680474 DQS Delay:
4365 23:03:01.680554 DQS0 = 0, DQS1 = 0
4366 23:03:01.683521 DQM Delay:
4367 23:03:01.683610 DQM0 = 41, DQM1 = 37
4368 23:03:01.686549 DQ Delay:
4369 23:03:01.686629 DQ0 =36, DQ1 =44, DQ2 =36, DQ3 =40
4370 23:03:01.689949 DQ4 =44, DQ5 =32, DQ6 =48, DQ7 =52
4371 23:03:01.693166 DQ8 =28, DQ9 =20, DQ10 =40, DQ11 =28
4372 23:03:01.696431 DQ12 =44, DQ13 =44, DQ14 =48, DQ15 =44
4373 23:03:01.699877
4374 23:03:01.699955
4375 23:03:01.706291 [DQSOSCAuto] RK1, (LSB)MR18= 0x681b, (MSB)MR19= 0x808, tDQSOscB0 = 404 ps tDQSOscB1 = 390 ps
4376 23:03:01.710002 CH0 RK1: MR19=808, MR18=681B
4377 23:03:01.716348 CH0_RK1: MR19=0x808, MR18=0x681B, DQSOSC=390, MR23=63, INC=172, DEC=114
4378 23:03:01.719789 [RxdqsGatingPostProcess] freq 600
4379 23:03:01.723113 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4380 23:03:01.726740 Pre-setting of DQS Precalculation
4381 23:03:01.733183 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4382 23:03:01.733288 ==
4383 23:03:01.736631 Dram Type= 6, Freq= 0, CH_1, rank 0
4384 23:03:01.739455 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4385 23:03:01.739535 ==
4386 23:03:01.746352 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4387 23:03:01.749462 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
4388 23:03:01.753736 [CA 0] Center 35 (5~66) winsize 62
4389 23:03:01.757046 [CA 1] Center 35 (5~66) winsize 62
4390 23:03:01.760132 [CA 2] Center 34 (3~65) winsize 63
4391 23:03:01.763504 [CA 3] Center 33 (3~64) winsize 62
4392 23:03:01.767063 [CA 4] Center 34 (4~64) winsize 61
4393 23:03:01.770380 [CA 5] Center 33 (3~64) winsize 62
4394 23:03:01.770460
4395 23:03:01.773396 [CmdBusTrainingLP45] Vref(ca) range 1: 33
4396 23:03:01.773482
4397 23:03:01.776798 [CATrainingPosCal] consider 1 rank data
4398 23:03:01.779927 u2DelayCellTimex100 = 270/100 ps
4399 23:03:01.783520 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4400 23:03:01.790597 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4401 23:03:01.793144 CA2 delay=34 (3~65),Diff = 1 PI (9 cell)
4402 23:03:01.796374 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
4403 23:03:01.799830 CA4 delay=34 (4~64),Diff = 1 PI (9 cell)
4404 23:03:01.802973 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4405 23:03:01.803053
4406 23:03:01.806391 CA PerBit enable=1, Macro0, CA PI delay=33
4407 23:03:01.806487
4408 23:03:01.809777 [CBTSetCACLKResult] CA Dly = 33
4409 23:03:01.813144 CS Dly: 4 (0~35)
4410 23:03:01.813217 ==
4411 23:03:01.816288 Dram Type= 6, Freq= 0, CH_1, rank 1
4412 23:03:01.819555 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4413 23:03:01.819656 ==
4414 23:03:01.826005 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4415 23:03:01.829827 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
4416 23:03:01.833739 [CA 0] Center 35 (5~66) winsize 62
4417 23:03:01.837422 [CA 1] Center 36 (6~66) winsize 61
4418 23:03:01.840528 [CA 2] Center 34 (4~65) winsize 62
4419 23:03:01.843881 [CA 3] Center 34 (3~65) winsize 63
4420 23:03:01.847666 [CA 4] Center 34 (4~65) winsize 62
4421 23:03:01.850378 [CA 5] Center 34 (3~65) winsize 63
4422 23:03:01.850457
4423 23:03:01.853934 [CmdBusTrainingLP45] Vref(ca) range 1: 37
4424 23:03:01.854013
4425 23:03:01.857364 [CATrainingPosCal] consider 2 rank data
4426 23:03:01.860393 u2DelayCellTimex100 = 270/100 ps
4427 23:03:01.864123 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4428 23:03:01.870715 CA1 delay=36 (6~66),Diff = 3 PI (28 cell)
4429 23:03:01.874203 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
4430 23:03:01.877094 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
4431 23:03:01.880538 CA4 delay=34 (4~64),Diff = 1 PI (9 cell)
4432 23:03:01.883930 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4433 23:03:01.884010
4434 23:03:01.887347 CA PerBit enable=1, Macro0, CA PI delay=33
4435 23:03:01.887437
4436 23:03:01.890720 [CBTSetCACLKResult] CA Dly = 33
4437 23:03:01.890792 CS Dly: 5 (0~37)
4438 23:03:01.893875
4439 23:03:01.897220 ----->DramcWriteLeveling(PI) begin...
4440 23:03:01.897318 ==
4441 23:03:01.900201 Dram Type= 6, Freq= 0, CH_1, rank 0
4442 23:03:01.903402 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4443 23:03:01.903472 ==
4444 23:03:01.907232 Write leveling (Byte 0): 28 => 28
4445 23:03:01.910200 Write leveling (Byte 1): 28 => 28
4446 23:03:01.913403 DramcWriteLeveling(PI) end<-----
4447 23:03:01.913534
4448 23:03:01.913614 ==
4449 23:03:01.917001 Dram Type= 6, Freq= 0, CH_1, rank 0
4450 23:03:01.920482 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4451 23:03:01.920581 ==
4452 23:03:01.923100 [Gating] SW mode calibration
4453 23:03:01.929752 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4454 23:03:01.936566 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4455 23:03:01.939878 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4456 23:03:01.943296 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4457 23:03:01.949574 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4458 23:03:01.952803 0 9 12 | B1->B0 | 3131 2f2f | 0 1 | (0 1) (1 0)
4459 23:03:01.956004 0 9 16 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
4460 23:03:01.962900 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4461 23:03:01.966323 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4462 23:03:01.969330 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4463 23:03:01.976100 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4464 23:03:01.979179 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4465 23:03:01.982849 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4466 23:03:01.988942 0 10 12 | B1->B0 | 2a2a 3b3b | 0 0 | (0 0) (0 0)
4467 23:03:01.992321 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4468 23:03:01.995700 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4469 23:03:02.002081 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4470 23:03:02.005341 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4471 23:03:02.009201 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4472 23:03:02.015734 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4473 23:03:02.018836 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4474 23:03:02.022081 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4475 23:03:02.028573 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4476 23:03:02.032024 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4477 23:03:02.035093 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4478 23:03:02.041918 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4479 23:03:02.045318 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4480 23:03:02.048795 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4481 23:03:02.054928 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4482 23:03:02.058168 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4483 23:03:02.061764 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4484 23:03:02.067870 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4485 23:03:02.071374 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4486 23:03:02.074538 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4487 23:03:02.081267 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4488 23:03:02.084812 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4489 23:03:02.087949 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4490 23:03:02.094084 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4491 23:03:02.097457 Total UI for P1: 0, mck2ui 16
4492 23:03:02.100996 best dqsien dly found for B0: ( 0, 13, 10)
4493 23:03:02.104042 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4494 23:03:02.107208 Total UI for P1: 0, mck2ui 16
4495 23:03:02.110379 best dqsien dly found for B1: ( 0, 13, 12)
4496 23:03:02.113658 best DQS0 dly(MCK, UI, PI) = (0, 13, 10)
4497 23:03:02.117325 best DQS1 dly(MCK, UI, PI) = (0, 13, 12)
4498 23:03:02.117405
4499 23:03:02.120533 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)
4500 23:03:02.127133 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 12)
4501 23:03:02.127214 [Gating] SW calibration Done
4502 23:03:02.130349 ==
4503 23:03:02.130429 Dram Type= 6, Freq= 0, CH_1, rank 0
4504 23:03:02.136925 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4505 23:03:02.137007 ==
4506 23:03:02.137070 RX Vref Scan: 0
4507 23:03:02.137128
4508 23:03:02.140845 RX Vref 0 -> 0, step: 1
4509 23:03:02.140926
4510 23:03:02.143437 RX Delay -230 -> 252, step: 16
4511 23:03:02.146845 iDelay=218, Bit 0, Center 57 (-102 ~ 217) 320
4512 23:03:02.150222 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4513 23:03:02.156756 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4514 23:03:02.159878 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4515 23:03:02.163515 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4516 23:03:02.167370 iDelay=218, Bit 5, Center 57 (-102 ~ 217) 320
4517 23:03:02.173085 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4518 23:03:02.176545 iDelay=218, Bit 7, Center 41 (-118 ~ 201) 320
4519 23:03:02.180053 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4520 23:03:02.183345 iDelay=218, Bit 9, Center 25 (-150 ~ 201) 352
4521 23:03:02.186622 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4522 23:03:02.193265 iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320
4523 23:03:02.196076 iDelay=218, Bit 12, Center 49 (-118 ~ 217) 336
4524 23:03:02.199591 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4525 23:03:02.202778 iDelay=218, Bit 14, Center 49 (-118 ~ 217) 336
4526 23:03:02.209265 iDelay=218, Bit 15, Center 49 (-118 ~ 217) 336
4527 23:03:02.209346 ==
4528 23:03:02.212578 Dram Type= 6, Freq= 0, CH_1, rank 0
4529 23:03:02.216353 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4530 23:03:02.216434 ==
4531 23:03:02.216499 DQS Delay:
4532 23:03:02.219322 DQS0 = 0, DQS1 = 0
4533 23:03:02.219403 DQM Delay:
4534 23:03:02.222616 DQM0 = 47, DQM1 = 37
4535 23:03:02.222697 DQ Delay:
4536 23:03:02.226004 DQ0 =57, DQ1 =41, DQ2 =41, DQ3 =41
4537 23:03:02.229452 DQ4 =41, DQ5 =57, DQ6 =57, DQ7 =41
4538 23:03:02.232365 DQ8 =17, DQ9 =25, DQ10 =33, DQ11 =25
4539 23:03:02.235994 DQ12 =49, DQ13 =49, DQ14 =49, DQ15 =49
4540 23:03:02.236076
4541 23:03:02.236139
4542 23:03:02.236198 ==
4543 23:03:02.239028 Dram Type= 6, Freq= 0, CH_1, rank 0
4544 23:03:02.245536 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4545 23:03:02.245617 ==
4546 23:03:02.245680
4547 23:03:02.245738
4548 23:03:02.245794 TX Vref Scan disable
4549 23:03:02.249312 == TX Byte 0 ==
4550 23:03:02.252217 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4551 23:03:02.259250 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4552 23:03:02.259331 == TX Byte 1 ==
4553 23:03:02.261972 Update DQ dly =572 (2 ,1, 28) DQ OEN =(1 ,6)
4554 23:03:02.268626 Update DQM dly =572 (2 ,1, 28) DQM OEN =(1 ,6)
4555 23:03:02.268707 ==
4556 23:03:02.272369 Dram Type= 6, Freq= 0, CH_1, rank 0
4557 23:03:02.275445 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4558 23:03:02.275527 ==
4559 23:03:02.275590
4560 23:03:02.275649
4561 23:03:02.278749 TX Vref Scan disable
4562 23:03:02.282020 == TX Byte 0 ==
4563 23:03:02.285138 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4564 23:03:02.288766 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4565 23:03:02.292242 == TX Byte 1 ==
4566 23:03:02.295215 Update DQ dly =572 (2 ,1, 28) DQ OEN =(1 ,6)
4567 23:03:02.298484 Update DQM dly =572 (2 ,1, 28) DQM OEN =(1 ,6)
4568 23:03:02.298564
4569 23:03:02.302058 [DATLAT]
4570 23:03:02.302138 Freq=600, CH1 RK0
4571 23:03:02.302202
4572 23:03:02.304978 DATLAT Default: 0x9
4573 23:03:02.305059 0, 0xFFFF, sum = 0
4574 23:03:02.308343 1, 0xFFFF, sum = 0
4575 23:03:02.308425 2, 0xFFFF, sum = 0
4576 23:03:02.311413 3, 0xFFFF, sum = 0
4577 23:03:02.311495 4, 0xFFFF, sum = 0
4578 23:03:02.314753 5, 0xFFFF, sum = 0
4579 23:03:02.314836 6, 0xFFFF, sum = 0
4580 23:03:02.318018 7, 0xFFFF, sum = 0
4581 23:03:02.318109 8, 0x0, sum = 1
4582 23:03:02.321493 9, 0x0, sum = 2
4583 23:03:02.321576 10, 0x0, sum = 3
4584 23:03:02.324740 11, 0x0, sum = 4
4585 23:03:02.324822 best_step = 9
4586 23:03:02.324885
4587 23:03:02.324943 ==
4588 23:03:02.328035 Dram Type= 6, Freq= 0, CH_1, rank 0
4589 23:03:02.331039 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4590 23:03:02.334292 ==
4591 23:03:02.334372 RX Vref Scan: 1
4592 23:03:02.334436
4593 23:03:02.337868 RX Vref 0 -> 0, step: 1
4594 23:03:02.337949
4595 23:03:02.341266 RX Delay -195 -> 252, step: 8
4596 23:03:02.341372
4597 23:03:02.344455 Set Vref, RX VrefLevel [Byte0]: 46
4598 23:03:02.347649 [Byte1]: 60
4599 23:03:02.347730
4600 23:03:02.351168 Final RX Vref Byte 0 = 46 to rank0
4601 23:03:02.354911 Final RX Vref Byte 1 = 60 to rank0
4602 23:03:02.357462 Final RX Vref Byte 0 = 46 to rank1
4603 23:03:02.361174 Final RX Vref Byte 1 = 60 to rank1==
4604 23:03:02.364354 Dram Type= 6, Freq= 0, CH_1, rank 0
4605 23:03:02.367609 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4606 23:03:02.367690 ==
4607 23:03:02.370787 DQS Delay:
4608 23:03:02.370866 DQS0 = 0, DQS1 = 0
4609 23:03:02.370929 DQM Delay:
4610 23:03:02.373798 DQM0 = 48, DQM1 = 37
4611 23:03:02.373877 DQ Delay:
4612 23:03:02.377247 DQ0 =52, DQ1 =44, DQ2 =40, DQ3 =44
4613 23:03:02.380631 DQ4 =44, DQ5 =60, DQ6 =60, DQ7 =40
4614 23:03:02.383558 DQ8 =24, DQ9 =24, DQ10 =40, DQ11 =28
4615 23:03:02.386884 DQ12 =44, DQ13 =44, DQ14 =48, DQ15 =48
4616 23:03:02.386964
4617 23:03:02.387027
4618 23:03:02.397205 [DQSOSCAuto] RK0, (LSB)MR18= 0x4d31, (MSB)MR19= 0x808, tDQSOscB0 = 400 ps tDQSOscB1 = 395 ps
4619 23:03:02.400573 CH1 RK0: MR19=808, MR18=4D31
4620 23:03:02.404051 CH1_RK0: MR19=0x808, MR18=0x4D31, DQSOSC=395, MR23=63, INC=168, DEC=112
4621 23:03:02.404131
4622 23:03:02.410912 ----->DramcWriteLeveling(PI) begin...
4623 23:03:02.410993 ==
4624 23:03:02.413528 Dram Type= 6, Freq= 0, CH_1, rank 1
4625 23:03:02.416898 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4626 23:03:02.416978 ==
4627 23:03:02.420225 Write leveling (Byte 0): 30 => 30
4628 23:03:02.423676 Write leveling (Byte 1): 32 => 32
4629 23:03:02.426977 DramcWriteLeveling(PI) end<-----
4630 23:03:02.427058
4631 23:03:02.427145 ==
4632 23:03:02.430422 Dram Type= 6, Freq= 0, CH_1, rank 1
4633 23:03:02.433510 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4634 23:03:02.433590 ==
4635 23:03:02.436605 [Gating] SW mode calibration
4636 23:03:02.443517 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4637 23:03:02.450057 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4638 23:03:02.453355 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4639 23:03:02.456768 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4640 23:03:02.463023 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4641 23:03:02.466353 0 9 12 | B1->B0 | 2f2f 3434 | 1 0 | (1 0) (0 1)
4642 23:03:02.469990 0 9 16 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
4643 23:03:02.476373 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4644 23:03:02.479745 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4645 23:03:02.483169 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4646 23:03:02.489791 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4647 23:03:02.493126 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4648 23:03:02.496278 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4649 23:03:02.503303 0 10 12 | B1->B0 | 3332 2c2c | 1 0 | (0 0) (0 0)
4650 23:03:02.505958 0 10 16 | B1->B0 | 4545 4646 | 1 0 | (0 0) (0 0)
4651 23:03:02.509294 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4652 23:03:02.515956 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4653 23:03:02.519090 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4654 23:03:02.522347 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4655 23:03:02.529067 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4656 23:03:02.532570 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4657 23:03:02.535705 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
4658 23:03:02.542033 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
4659 23:03:02.545507 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4660 23:03:02.548942 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4661 23:03:02.555622 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4662 23:03:02.558635 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4663 23:03:02.562028 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4664 23:03:02.568877 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4665 23:03:02.571827 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4666 23:03:02.575416 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4667 23:03:02.582063 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4668 23:03:02.585072 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4669 23:03:02.588540 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4670 23:03:02.595062 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4671 23:03:02.598293 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4672 23:03:02.602107 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4673 23:03:02.608050 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4674 23:03:02.611568 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4675 23:03:02.615017 Total UI for P1: 0, mck2ui 16
4676 23:03:02.618340 best dqsien dly found for B0: ( 0, 13, 14)
4677 23:03:02.621537 Total UI for P1: 0, mck2ui 16
4678 23:03:02.624572 best dqsien dly found for B1: ( 0, 13, 14)
4679 23:03:02.627648 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
4680 23:03:02.630968 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4681 23:03:02.631050
4682 23:03:02.634262 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
4683 23:03:02.637600 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4684 23:03:02.640883 [Gating] SW calibration Done
4685 23:03:02.640964 ==
4686 23:03:02.644285 Dram Type= 6, Freq= 0, CH_1, rank 1
4687 23:03:02.651185 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4688 23:03:02.651275 ==
4689 23:03:02.651341 RX Vref Scan: 0
4690 23:03:02.651401
4691 23:03:02.654162 RX Vref 0 -> 0, step: 1
4692 23:03:02.654243
4693 23:03:02.657136 RX Delay -230 -> 252, step: 16
4694 23:03:02.660861 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4695 23:03:02.664267 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4696 23:03:02.667307 iDelay=218, Bit 2, Center 25 (-134 ~ 185) 320
4697 23:03:02.674446 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4698 23:03:02.676992 iDelay=218, Bit 4, Center 33 (-134 ~ 201) 336
4699 23:03:02.680667 iDelay=218, Bit 5, Center 57 (-102 ~ 217) 320
4700 23:03:02.683827 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4701 23:03:02.690223 iDelay=218, Bit 7, Center 41 (-118 ~ 201) 320
4702 23:03:02.693542 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4703 23:03:02.696761 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
4704 23:03:02.700071 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4705 23:03:02.707037 iDelay=218, Bit 11, Center 33 (-134 ~ 201) 336
4706 23:03:02.710116 iDelay=218, Bit 12, Center 49 (-118 ~ 217) 336
4707 23:03:02.713593 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4708 23:03:02.716649 iDelay=218, Bit 14, Center 49 (-118 ~ 217) 336
4709 23:03:02.723215 iDelay=218, Bit 15, Center 41 (-134 ~ 217) 352
4710 23:03:02.723350 ==
4711 23:03:02.726864 Dram Type= 6, Freq= 0, CH_1, rank 1
4712 23:03:02.729946 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4713 23:03:02.730029 ==
4714 23:03:02.730093 DQS Delay:
4715 23:03:02.733111 DQS0 = 0, DQS1 = 0
4716 23:03:02.733191 DQM Delay:
4717 23:03:02.736465 DQM0 = 43, DQM1 = 36
4718 23:03:02.736546 DQ Delay:
4719 23:03:02.740075 DQ0 =49, DQ1 =41, DQ2 =25, DQ3 =41
4720 23:03:02.743274 DQ4 =33, DQ5 =57, DQ6 =57, DQ7 =41
4721 23:03:02.746898 DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =33
4722 23:03:02.750079 DQ12 =49, DQ13 =49, DQ14 =49, DQ15 =41
4723 23:03:02.750159
4724 23:03:02.750222
4725 23:03:02.750281 ==
4726 23:03:02.753529 Dram Type= 6, Freq= 0, CH_1, rank 1
4727 23:03:02.756152 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4728 23:03:02.756237 ==
4729 23:03:02.759612
4730 23:03:02.759692
4731 23:03:02.759756 TX Vref Scan disable
4732 23:03:02.763159 == TX Byte 0 ==
4733 23:03:02.766086 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4734 23:03:02.769194 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4735 23:03:02.773063 == TX Byte 1 ==
4736 23:03:02.775926 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4737 23:03:02.779291 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4738 23:03:02.782455 ==
4739 23:03:02.786001 Dram Type= 6, Freq= 0, CH_1, rank 1
4740 23:03:02.789032 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4741 23:03:02.789115 ==
4742 23:03:02.789178
4743 23:03:02.789237
4744 23:03:02.792579 TX Vref Scan disable
4745 23:03:02.792660 == TX Byte 0 ==
4746 23:03:02.799009 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4747 23:03:02.802431 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4748 23:03:02.805635 == TX Byte 1 ==
4749 23:03:02.808765 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4750 23:03:02.812143 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4751 23:03:02.812224
4752 23:03:02.812288 [DATLAT]
4753 23:03:02.815829 Freq=600, CH1 RK1
4754 23:03:02.815908
4755 23:03:02.815972 DATLAT Default: 0x9
4756 23:03:02.818785 0, 0xFFFF, sum = 0
4757 23:03:02.818867 1, 0xFFFF, sum = 0
4758 23:03:02.822183 2, 0xFFFF, sum = 0
4759 23:03:02.825955 3, 0xFFFF, sum = 0
4760 23:03:02.826038 4, 0xFFFF, sum = 0
4761 23:03:02.828981 5, 0xFFFF, sum = 0
4762 23:03:02.829133 6, 0xFFFF, sum = 0
4763 23:03:02.832055 7, 0xFFFF, sum = 0
4764 23:03:02.832137 8, 0x0, sum = 1
4765 23:03:02.835434 9, 0x0, sum = 2
4766 23:03:02.835516 10, 0x0, sum = 3
4767 23:03:02.835580 11, 0x0, sum = 4
4768 23:03:02.838855 best_step = 9
4769 23:03:02.838935
4770 23:03:02.838998 ==
4771 23:03:02.842132 Dram Type= 6, Freq= 0, CH_1, rank 1
4772 23:03:02.845655 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4773 23:03:02.845737 ==
4774 23:03:02.848625 RX Vref Scan: 0
4775 23:03:02.848705
4776 23:03:02.852155 RX Vref 0 -> 0, step: 1
4777 23:03:02.852238
4778 23:03:02.852301 RX Delay -195 -> 252, step: 8
4779 23:03:02.859704 iDelay=205, Bit 0, Center 48 (-99 ~ 196) 296
4780 23:03:02.862586 iDelay=205, Bit 1, Center 40 (-107 ~ 188) 296
4781 23:03:02.866071 iDelay=205, Bit 2, Center 32 (-115 ~ 180) 296
4782 23:03:02.870040 iDelay=205, Bit 3, Center 44 (-99 ~ 188) 288
4783 23:03:02.876124 iDelay=205, Bit 4, Center 44 (-107 ~ 196) 304
4784 23:03:02.879620 iDelay=205, Bit 5, Center 56 (-91 ~ 204) 296
4785 23:03:02.882795 iDelay=205, Bit 6, Center 56 (-91 ~ 204) 296
4786 23:03:02.885749 iDelay=205, Bit 7, Center 40 (-107 ~ 188) 296
4787 23:03:02.889080 iDelay=205, Bit 8, Center 24 (-131 ~ 180) 312
4788 23:03:02.895465 iDelay=205, Bit 9, Center 24 (-131 ~ 180) 312
4789 23:03:02.898954 iDelay=205, Bit 10, Center 40 (-115 ~ 196) 312
4790 23:03:02.902359 iDelay=205, Bit 11, Center 24 (-131 ~ 180) 312
4791 23:03:02.905796 iDelay=205, Bit 12, Center 48 (-107 ~ 204) 312
4792 23:03:02.912491 iDelay=205, Bit 13, Center 48 (-107 ~ 204) 312
4793 23:03:02.915533 iDelay=205, Bit 14, Center 52 (-99 ~ 204) 304
4794 23:03:02.919051 iDelay=205, Bit 15, Center 48 (-107 ~ 204) 312
4795 23:03:02.919161 ==
4796 23:03:02.922330 Dram Type= 6, Freq= 0, CH_1, rank 1
4797 23:03:02.929277 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4798 23:03:02.929359 ==
4799 23:03:02.929447 DQS Delay:
4800 23:03:02.929522 DQS0 = 0, DQS1 = 0
4801 23:03:02.932518 DQM Delay:
4802 23:03:02.932597 DQM0 = 45, DQM1 = 38
4803 23:03:02.935117 DQ Delay:
4804 23:03:02.938704 DQ0 =48, DQ1 =40, DQ2 =32, DQ3 =44
4805 23:03:02.942023 DQ4 =44, DQ5 =56, DQ6 =56, DQ7 =40
4806 23:03:02.945158 DQ8 =24, DQ9 =24, DQ10 =40, DQ11 =24
4807 23:03:02.948802 DQ12 =48, DQ13 =48, DQ14 =52, DQ15 =48
4808 23:03:02.948875
4809 23:03:02.948935
4810 23:03:02.955409 [DQSOSCAuto] RK1, (LSB)MR18= 0x2f25, (MSB)MR19= 0x808, tDQSOscB0 = 402 ps tDQSOscB1 = 400 ps
4811 23:03:02.958254 CH1 RK1: MR19=808, MR18=2F25
4812 23:03:02.964848 CH1_RK1: MR19=0x808, MR18=0x2F25, DQSOSC=400, MR23=63, INC=163, DEC=109
4813 23:03:02.968325 [RxdqsGatingPostProcess] freq 600
4814 23:03:02.971932 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4815 23:03:02.974914 Pre-setting of DQS Precalculation
4816 23:03:02.981536 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4817 23:03:02.988323 sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5
4818 23:03:02.994617 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
4819 23:03:02.994709
4820 23:03:02.994817
4821 23:03:02.997592 [Calibration Summary] 1200 Mbps
4822 23:03:03.001216 CH 0, Rank 0
4823 23:03:03.001315 SW Impedance : PASS
4824 23:03:03.004603 DUTY Scan : NO K
4825 23:03:03.004684 ZQ Calibration : PASS
4826 23:03:03.008328 Jitter Meter : NO K
4827 23:03:03.010843 CBT Training : PASS
4828 23:03:03.010939 Write leveling : PASS
4829 23:03:03.014061 RX DQS gating : PASS
4830 23:03:03.017759 RX DQ/DQS(RDDQC) : PASS
4831 23:03:03.017840 TX DQ/DQS : PASS
4832 23:03:03.021754 RX DATLAT : PASS
4833 23:03:03.024042 RX DQ/DQS(Engine): PASS
4834 23:03:03.024135 TX OE : NO K
4835 23:03:03.027569 All Pass.
4836 23:03:03.027703
4837 23:03:03.027805 CH 0, Rank 1
4838 23:03:03.030517 SW Impedance : PASS
4839 23:03:03.030619 DUTY Scan : NO K
4840 23:03:03.034195 ZQ Calibration : PASS
4841 23:03:03.037390 Jitter Meter : NO K
4842 23:03:03.037517 CBT Training : PASS
4843 23:03:03.040698 Write leveling : PASS
4844 23:03:03.044242 RX DQS gating : PASS
4845 23:03:03.044362 RX DQ/DQS(RDDQC) : PASS
4846 23:03:03.047803 TX DQ/DQS : PASS
4847 23:03:03.051123 RX DATLAT : PASS
4848 23:03:03.051243 RX DQ/DQS(Engine): PASS
4849 23:03:03.053727 TX OE : NO K
4850 23:03:03.053808 All Pass.
4851 23:03:03.053894
4852 23:03:03.057898 CH 1, Rank 0
4853 23:03:03.057980 SW Impedance : PASS
4854 23:03:03.060499 DUTY Scan : NO K
4855 23:03:03.063850 ZQ Calibration : PASS
4856 23:03:03.063961 Jitter Meter : NO K
4857 23:03:03.067045 CBT Training : PASS
4858 23:03:03.067174 Write leveling : PASS
4859 23:03:03.070197 RX DQS gating : PASS
4860 23:03:03.073906 RX DQ/DQS(RDDQC) : PASS
4861 23:03:03.074004 TX DQ/DQS : PASS
4862 23:03:03.077009 RX DATLAT : PASS
4863 23:03:03.080304 RX DQ/DQS(Engine): PASS
4864 23:03:03.080409 TX OE : NO K
4865 23:03:03.083567 All Pass.
4866 23:03:03.083708
4867 23:03:03.083831 CH 1, Rank 1
4868 23:03:03.087013 SW Impedance : PASS
4869 23:03:03.087103 DUTY Scan : NO K
4870 23:03:03.090328 ZQ Calibration : PASS
4871 23:03:03.093750 Jitter Meter : NO K
4872 23:03:03.093861 CBT Training : PASS
4873 23:03:03.097008 Write leveling : PASS
4874 23:03:03.100475 RX DQS gating : PASS
4875 23:03:03.100584 RX DQ/DQS(RDDQC) : PASS
4876 23:03:03.103527 TX DQ/DQS : PASS
4877 23:03:03.106391 RX DATLAT : PASS
4878 23:03:03.106479 RX DQ/DQS(Engine): PASS
4879 23:03:03.110109 TX OE : NO K
4880 23:03:03.110183 All Pass.
4881 23:03:03.110259
4882 23:03:03.113029 DramC Write-DBI off
4883 23:03:03.116917 PER_BANK_REFRESH: Hybrid Mode
4884 23:03:03.117027 TX_TRACKING: ON
4885 23:03:03.126428 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1
4886 23:03:03.129638 [FAST_K] Save calibration result to emmc
4887 23:03:03.133005 dramc_set_vcore_voltage set vcore to 662500
4888 23:03:03.136844 Read voltage for 933, 3
4889 23:03:03.136967 Vio18 = 0
4890 23:03:03.137061 Vcore = 662500
4891 23:03:03.139814 Vdram = 0
4892 23:03:03.139930 Vddq = 0
4893 23:03:03.140024 Vmddr = 0
4894 23:03:03.146434 [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0
4895 23:03:03.149804 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
4896 23:03:03.153055 MEM_TYPE=3, freq_sel=17
4897 23:03:03.156270 sv_algorithm_assistance_LP4_1600
4898 23:03:03.159407 ============ PULL DRAM RESETB DOWN ============
4899 23:03:03.162864 ========== PULL DRAM RESETB DOWN end =========
4900 23:03:03.169398 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4901 23:03:03.172906 ===================================
4902 23:03:03.176241 LPDDR4 DRAM CONFIGURATION
4903 23:03:03.179155 ===================================
4904 23:03:03.179239 EX_ROW_EN[0] = 0x0
4905 23:03:03.182521 EX_ROW_EN[1] = 0x0
4906 23:03:03.182604 LP4Y_EN = 0x0
4907 23:03:03.186117 WORK_FSP = 0x0
4908 23:03:03.186199 WL = 0x3
4909 23:03:03.189316 RL = 0x3
4910 23:03:03.189432 BL = 0x2
4911 23:03:03.192739 RPST = 0x0
4912 23:03:03.192821 RD_PRE = 0x0
4913 23:03:03.196036 WR_PRE = 0x1
4914 23:03:03.196118 WR_PST = 0x0
4915 23:03:03.199588 DBI_WR = 0x0
4916 23:03:03.199670 DBI_RD = 0x0
4917 23:03:03.202337 OTF = 0x1
4918 23:03:03.205626 ===================================
4919 23:03:03.208875 ===================================
4920 23:03:03.208983 ANA top config
4921 23:03:03.212350 ===================================
4922 23:03:03.215646 DLL_ASYNC_EN = 0
4923 23:03:03.218938 ALL_SLAVE_EN = 1
4924 23:03:03.222538 NEW_RANK_MODE = 1
4925 23:03:03.222619 DLL_IDLE_MODE = 1
4926 23:03:03.225704 LP45_APHY_COMB_EN = 1
4927 23:03:03.229239 TX_ODT_DIS = 1
4928 23:03:03.232276 NEW_8X_MODE = 1
4929 23:03:03.235611 ===================================
4930 23:03:03.238958 ===================================
4931 23:03:03.242633 data_rate = 1866
4932 23:03:03.245369 CKR = 1
4933 23:03:03.245483 DQ_P2S_RATIO = 8
4934 23:03:03.248543 ===================================
4935 23:03:03.252403 CA_P2S_RATIO = 8
4936 23:03:03.255360 DQ_CA_OPEN = 0
4937 23:03:03.258750 DQ_SEMI_OPEN = 0
4938 23:03:03.261758 CA_SEMI_OPEN = 0
4939 23:03:03.265249 CA_FULL_RATE = 0
4940 23:03:03.265354 DQ_CKDIV4_EN = 1
4941 23:03:03.268580 CA_CKDIV4_EN = 1
4942 23:03:03.272018 CA_PREDIV_EN = 0
4943 23:03:03.275243 PH8_DLY = 0
4944 23:03:03.278694 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
4945 23:03:03.281810 DQ_AAMCK_DIV = 4
4946 23:03:03.281885 CA_AAMCK_DIV = 4
4947 23:03:03.285120 CA_ADMCK_DIV = 4
4948 23:03:03.288443 DQ_TRACK_CA_EN = 0
4949 23:03:03.291615 CA_PICK = 933
4950 23:03:03.294882 CA_MCKIO = 933
4951 23:03:03.298348 MCKIO_SEMI = 0
4952 23:03:03.301344 PLL_FREQ = 3732
4953 23:03:03.304650 DQ_UI_PI_RATIO = 32
4954 23:03:03.304724 CA_UI_PI_RATIO = 0
4955 23:03:03.308275 ===================================
4956 23:03:03.311375 ===================================
4957 23:03:03.314922 memory_type:LPDDR4
4958 23:03:03.317887 GP_NUM : 10
4959 23:03:03.317996 SRAM_EN : 1
4960 23:03:03.321404 MD32_EN : 0
4961 23:03:03.324784 ===================================
4962 23:03:03.327889 [ANA_INIT] >>>>>>>>>>>>>>
4963 23:03:03.331169 <<<<<< [CONFIGURE PHASE]: ANA_TX
4964 23:03:03.334495 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
4965 23:03:03.337547 ===================================
4966 23:03:03.337621 data_rate = 1866,PCW = 0X8f00
4967 23:03:03.340874 ===================================
4968 23:03:03.344477 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
4969 23:03:03.350967 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4970 23:03:03.357822 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4971 23:03:03.360858 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
4972 23:03:03.364541 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
4973 23:03:03.367687 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
4974 23:03:03.371373 [ANA_INIT] flow start
4975 23:03:03.371454 [ANA_INIT] PLL >>>>>>>>
4976 23:03:03.374119 [ANA_INIT] PLL <<<<<<<<
4977 23:03:03.377685 [ANA_INIT] MIDPI >>>>>>>>
4978 23:03:03.380940 [ANA_INIT] MIDPI <<<<<<<<
4979 23:03:03.381040 [ANA_INIT] DLL >>>>>>>>
4980 23:03:03.384254 [ANA_INIT] flow end
4981 23:03:03.387362 ============ LP4 DIFF to SE enter ============
4982 23:03:03.390617 ============ LP4 DIFF to SE exit ============
4983 23:03:03.394817 [ANA_INIT] <<<<<<<<<<<<<
4984 23:03:03.397274 [Flow] Enable top DCM control >>>>>
4985 23:03:03.400684 [Flow] Enable top DCM control <<<<<
4986 23:03:03.404001 Enable DLL master slave shuffle
4987 23:03:03.410691 ==============================================================
4988 23:03:03.410778 Gating Mode config
4989 23:03:03.416851 ==============================================================
4990 23:03:03.420321 Config description:
4991 23:03:03.426878 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
4992 23:03:03.433546 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
4993 23:03:03.440327 SELPH_MODE 0: By rank 1: By Phase
4994 23:03:03.446552 ==============================================================
4995 23:03:03.446666 GAT_TRACK_EN = 1
4996 23:03:03.449953 RX_GATING_MODE = 2
4997 23:03:03.453186 RX_GATING_TRACK_MODE = 2
4998 23:03:03.456422 SELPH_MODE = 1
4999 23:03:03.459628 PICG_EARLY_EN = 1
5000 23:03:03.463360 VALID_LAT_VALUE = 1
5001 23:03:03.469890 ==============================================================
5002 23:03:03.473043 Enter into Gating configuration >>>>
5003 23:03:03.476021 Exit from Gating configuration <<<<
5004 23:03:03.479751 Enter into DVFS_PRE_config >>>>>
5005 23:03:03.489289 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
5006 23:03:03.492787 Exit from DVFS_PRE_config <<<<<
5007 23:03:03.496104 Enter into PICG configuration >>>>
5008 23:03:03.499234 Exit from PICG configuration <<<<
5009 23:03:03.502694 [RX_INPUT] configuration >>>>>
5010 23:03:03.506309 [RX_INPUT] configuration <<<<<
5011 23:03:03.509024 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
5012 23:03:03.515717 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
5013 23:03:03.522511 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
5014 23:03:03.529236 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
5015 23:03:03.532759 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
5016 23:03:03.538542 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
5017 23:03:03.541936 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
5018 23:03:03.548582 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
5019 23:03:03.552374 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
5020 23:03:03.555702 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
5021 23:03:03.559092 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
5022 23:03:03.565176 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
5023 23:03:03.576095 ===================================
5024 23:03:03.576264 LPDDR4 DRAM CONFIGURATION
5025 23:03:03.576346 ===================================
5026 23:03:03.576438 EX_ROW_EN[0] = 0x0
5027 23:03:03.578696 EX_ROW_EN[1] = 0x0
5028 23:03:03.578777 LP4Y_EN = 0x0
5029 23:03:03.581654 WORK_FSP = 0x0
5030 23:03:03.581736 WL = 0x3
5031 23:03:03.585531 RL = 0x3
5032 23:03:03.585607 BL = 0x2
5033 23:03:03.588635 RPST = 0x0
5034 23:03:03.588729 RD_PRE = 0x0
5035 23:03:03.591713 WR_PRE = 0x1
5036 23:03:03.591793 WR_PST = 0x0
5037 23:03:03.595142 DBI_WR = 0x0
5038 23:03:03.595213 DBI_RD = 0x0
5039 23:03:03.598728 OTF = 0x1
5040 23:03:03.602145 ===================================
5041 23:03:03.604829 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
5042 23:03:03.608489 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
5043 23:03:03.615632 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
5044 23:03:03.618404 ===================================
5045 23:03:03.621439 LPDDR4 DRAM CONFIGURATION
5046 23:03:03.624676 ===================================
5047 23:03:03.624759 EX_ROW_EN[0] = 0x10
5048 23:03:03.627798 EX_ROW_EN[1] = 0x0
5049 23:03:03.627882 LP4Y_EN = 0x0
5050 23:03:03.631384 WORK_FSP = 0x0
5051 23:03:03.631470 WL = 0x3
5052 23:03:03.634782 RL = 0x3
5053 23:03:03.634855 BL = 0x2
5054 23:03:03.637779 RPST = 0x0
5055 23:03:03.637852 RD_PRE = 0x0
5056 23:03:03.640982 WR_PRE = 0x1
5057 23:03:03.641054 WR_PST = 0x0
5058 23:03:03.644271 DBI_WR = 0x0
5059 23:03:03.647674 DBI_RD = 0x0
5060 23:03:03.647749 OTF = 0x1
5061 23:03:03.651087 ===================================
5062 23:03:03.657868 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
5063 23:03:03.661209 nWR fixed to 30
5064 23:03:03.664677 [ModeRegInit_LP4] CH0 RK0
5065 23:03:03.664764 [ModeRegInit_LP4] CH0 RK1
5066 23:03:03.667940 [ModeRegInit_LP4] CH1 RK0
5067 23:03:03.671073 [ModeRegInit_LP4] CH1 RK1
5068 23:03:03.671152 match AC timing 9
5069 23:03:03.677560 dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 1
5070 23:03:03.680628 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
5071 23:03:03.684463 [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10
5072 23:03:03.690581 [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21
5073 23:03:03.694165 [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)
5074 23:03:03.694248 ==
5075 23:03:03.697542 Dram Type= 6, Freq= 0, CH_0, rank 0
5076 23:03:03.700651 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5077 23:03:03.700729 ==
5078 23:03:03.707648 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5079 23:03:03.714324 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
5080 23:03:03.717170 [CA 0] Center 37 (7~68) winsize 62
5081 23:03:03.720299 [CA 1] Center 37 (7~68) winsize 62
5082 23:03:03.724050 [CA 2] Center 34 (4~65) winsize 62
5083 23:03:03.727362 [CA 3] Center 34 (4~65) winsize 62
5084 23:03:03.730585 [CA 4] Center 33 (3~64) winsize 62
5085 23:03:03.733658 [CA 5] Center 33 (3~63) winsize 61
5086 23:03:03.733735
5087 23:03:03.737161 [CmdBusTrainingLP45] Vref(ca) range 1: 33
5088 23:03:03.737269
5089 23:03:03.740360 [CATrainingPosCal] consider 1 rank data
5090 23:03:03.743347 u2DelayCellTimex100 = 270/100 ps
5091 23:03:03.746887 CA0 delay=37 (7~68),Diff = 4 PI (24 cell)
5092 23:03:03.750232 CA1 delay=37 (7~68),Diff = 4 PI (24 cell)
5093 23:03:03.753768 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5094 23:03:03.756751 CA3 delay=34 (4~65),Diff = 1 PI (6 cell)
5095 23:03:03.763673 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
5096 23:03:03.766960 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
5097 23:03:03.767038
5098 23:03:03.770141 CA PerBit enable=1, Macro0, CA PI delay=33
5099 23:03:03.770222
5100 23:03:03.773159 [CBTSetCACLKResult] CA Dly = 33
5101 23:03:03.773231 CS Dly: 7 (0~38)
5102 23:03:03.773292 ==
5103 23:03:03.776713 Dram Type= 6, Freq= 0, CH_0, rank 1
5104 23:03:03.783171 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5105 23:03:03.783247 ==
5106 23:03:03.786464 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5107 23:03:03.793132 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5108 23:03:03.796292 [CA 0] Center 37 (7~68) winsize 62
5109 23:03:03.799498 [CA 1] Center 37 (7~68) winsize 62
5110 23:03:03.803339 [CA 2] Center 34 (4~65) winsize 62
5111 23:03:03.806079 [CA 3] Center 34 (4~65) winsize 62
5112 23:03:03.809391 [CA 4] Center 33 (3~64) winsize 62
5113 23:03:03.812794 [CA 5] Center 32 (2~63) winsize 62
5114 23:03:03.812866
5115 23:03:03.816336 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5116 23:03:03.816412
5117 23:03:03.819604 [CATrainingPosCal] consider 2 rank data
5118 23:03:03.822650 u2DelayCellTimex100 = 270/100 ps
5119 23:03:03.825980 CA0 delay=37 (7~68),Diff = 4 PI (24 cell)
5120 23:03:03.832865 CA1 delay=37 (7~68),Diff = 4 PI (24 cell)
5121 23:03:03.836224 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5122 23:03:03.839240 CA3 delay=34 (4~65),Diff = 1 PI (6 cell)
5123 23:03:03.842369 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
5124 23:03:03.845812 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
5125 23:03:03.845890
5126 23:03:03.849270 CA PerBit enable=1, Macro0, CA PI delay=33
5127 23:03:03.849377
5128 23:03:03.852379 [CBTSetCACLKResult] CA Dly = 33
5129 23:03:03.852463 CS Dly: 7 (0~39)
5130 23:03:03.855765
5131 23:03:03.859251 ----->DramcWriteLeveling(PI) begin...
5132 23:03:03.859333 ==
5133 23:03:03.862322 Dram Type= 6, Freq= 0, CH_0, rank 0
5134 23:03:03.865816 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5135 23:03:03.865892 ==
5136 23:03:03.869195 Write leveling (Byte 0): 34 => 34
5137 23:03:03.872533 Write leveling (Byte 1): 28 => 28
5138 23:03:03.875749 DramcWriteLeveling(PI) end<-----
5139 23:03:03.875824
5140 23:03:03.875893 ==
5141 23:03:03.878915 Dram Type= 6, Freq= 0, CH_0, rank 0
5142 23:03:03.882300 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5143 23:03:03.882372 ==
5144 23:03:03.885857 [Gating] SW mode calibration
5145 23:03:03.892100 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5146 23:03:03.898606 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5147 23:03:03.901744 0 14 0 | B1->B0 | 2322 3030 | 1 0 | (0 0) (0 0)
5148 23:03:03.905196 0 14 4 | B1->B0 | 3232 3434 | 0 1 | (0 0) (1 1)
5149 23:03:03.912202 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5150 23:03:03.915072 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5151 23:03:03.918658 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5152 23:03:03.925254 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5153 23:03:03.928822 0 14 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5154 23:03:03.931963 0 14 28 | B1->B0 | 3434 2b2b | 1 0 | (1 0) (1 0)
5155 23:03:03.938172 0 15 0 | B1->B0 | 3131 2626 | 1 0 | (1 1) (1 0)
5156 23:03:03.941894 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
5157 23:03:03.945121 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5158 23:03:03.951241 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5159 23:03:03.954668 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5160 23:03:03.957848 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5161 23:03:03.964667 0 15 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5162 23:03:03.968114 0 15 28 | B1->B0 | 2323 3333 | 0 0 | (0 0) (1 1)
5163 23:03:03.971284 1 0 0 | B1->B0 | 3736 4646 | 1 0 | (0 0) (0 0)
5164 23:03:03.977830 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5165 23:03:03.981045 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5166 23:03:03.984480 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5167 23:03:03.991003 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5168 23:03:03.994304 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5169 23:03:03.997479 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5170 23:03:04.004181 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5171 23:03:04.007561 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5172 23:03:04.011318 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5173 23:03:04.017565 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5174 23:03:04.021082 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5175 23:03:04.024177 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5176 23:03:04.030744 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5177 23:03:04.033978 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5178 23:03:04.037337 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5179 23:03:04.043898 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5180 23:03:04.047182 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5181 23:03:04.050429 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5182 23:03:04.056957 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5183 23:03:04.060601 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5184 23:03:04.063792 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5185 23:03:04.070426 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5186 23:03:04.073755 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5187 23:03:04.077179 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5188 23:03:04.080256 Total UI for P1: 0, mck2ui 16
5189 23:03:04.083408 best dqsien dly found for B0: ( 1, 2, 28)
5190 23:03:04.090218 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5191 23:03:04.090295 Total UI for P1: 0, mck2ui 16
5192 23:03:04.097077 best dqsien dly found for B1: ( 1, 2, 30)
5193 23:03:04.099750 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5194 23:03:04.103068 best DQS1 dly(MCK, UI, PI) = (1, 2, 30)
5195 23:03:04.103142
5196 23:03:04.107336 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5197 23:03:04.109701 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 30)
5198 23:03:04.113092 [Gating] SW calibration Done
5199 23:03:04.113164 ==
5200 23:03:04.116413 Dram Type= 6, Freq= 0, CH_0, rank 0
5201 23:03:04.119584 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5202 23:03:04.119682 ==
5203 23:03:04.122797 RX Vref Scan: 0
5204 23:03:04.122864
5205 23:03:04.122924 RX Vref 0 -> 0, step: 1
5206 23:03:04.122987
5207 23:03:04.127152 RX Delay -80 -> 252, step: 8
5208 23:03:04.129543 iDelay=208, Bit 0, Center 99 (0 ~ 199) 200
5209 23:03:04.136501 iDelay=208, Bit 1, Center 99 (0 ~ 199) 200
5210 23:03:04.139704 iDelay=208, Bit 2, Center 91 (-8 ~ 191) 200
5211 23:03:04.142732 iDelay=208, Bit 3, Center 91 (-8 ~ 191) 200
5212 23:03:04.146486 iDelay=208, Bit 4, Center 99 (0 ~ 199) 200
5213 23:03:04.149520 iDelay=208, Bit 5, Center 87 (-8 ~ 183) 192
5214 23:03:04.152443 iDelay=208, Bit 6, Center 107 (8 ~ 207) 200
5215 23:03:04.159103 iDelay=208, Bit 7, Center 107 (8 ~ 207) 200
5216 23:03:04.162250 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5217 23:03:04.166117 iDelay=208, Bit 9, Center 75 (-24 ~ 175) 200
5218 23:03:04.169062 iDelay=208, Bit 10, Center 87 (-8 ~ 183) 192
5219 23:03:04.172499 iDelay=208, Bit 11, Center 83 (-8 ~ 175) 184
5220 23:03:04.179341 iDelay=208, Bit 12, Center 91 (-8 ~ 191) 200
5221 23:03:04.182568 iDelay=208, Bit 13, Center 91 (-8 ~ 191) 200
5222 23:03:04.185727 iDelay=208, Bit 14, Center 91 (-8 ~ 191) 200
5223 23:03:04.189342 iDelay=208, Bit 15, Center 91 (-8 ~ 191) 200
5224 23:03:04.189483 ==
5225 23:03:04.192129 Dram Type= 6, Freq= 0, CH_0, rank 0
5226 23:03:04.198923 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5227 23:03:04.199004 ==
5228 23:03:04.199067 DQS Delay:
5229 23:03:04.202152 DQS0 = 0, DQS1 = 0
5230 23:03:04.202231 DQM Delay:
5231 23:03:04.202294 DQM0 = 97, DQM1 = 86
5232 23:03:04.205714 DQ Delay:
5233 23:03:04.208757 DQ0 =99, DQ1 =99, DQ2 =91, DQ3 =91
5234 23:03:04.212317 DQ4 =99, DQ5 =87, DQ6 =107, DQ7 =107
5235 23:03:04.215433 DQ8 =83, DQ9 =75, DQ10 =87, DQ11 =83
5236 23:03:04.218858 DQ12 =91, DQ13 =91, DQ14 =91, DQ15 =91
5237 23:03:04.218938
5238 23:03:04.219001
5239 23:03:04.219059 ==
5240 23:03:04.222009 Dram Type= 6, Freq= 0, CH_0, rank 0
5241 23:03:04.225624 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5242 23:03:04.225704 ==
5243 23:03:04.225797
5244 23:03:04.225884
5245 23:03:04.228629 TX Vref Scan disable
5246 23:03:04.228726 == TX Byte 0 ==
5247 23:03:04.235187 Update DQ dly =717 (2 ,6, 13) DQ OEN =(2 ,3)
5248 23:03:04.238856 Update DQM dly =717 (2 ,6, 13) DQM OEN =(2 ,3)
5249 23:03:04.238936 == TX Byte 1 ==
5250 23:03:04.245086 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5251 23:03:04.248328 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5252 23:03:04.248407 ==
5253 23:03:04.251743 Dram Type= 6, Freq= 0, CH_0, rank 0
5254 23:03:04.255251 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5255 23:03:04.255332 ==
5256 23:03:04.258737
5257 23:03:04.258815
5258 23:03:04.258891 TX Vref Scan disable
5259 23:03:04.261776 == TX Byte 0 ==
5260 23:03:04.265208 Update DQ dly =717 (2 ,6, 13) DQ OEN =(2 ,3)
5261 23:03:04.271663 Update DQM dly =717 (2 ,6, 13) DQM OEN =(2 ,3)
5262 23:03:04.271758 == TX Byte 1 ==
5263 23:03:04.275322 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5264 23:03:04.281607 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5265 23:03:04.281688
5266 23:03:04.281765 [DATLAT]
5267 23:03:04.281839 Freq=933, CH0 RK0
5268 23:03:04.281896
5269 23:03:04.285061 DATLAT Default: 0xd
5270 23:03:04.285139 0, 0xFFFF, sum = 0
5271 23:03:04.288067 1, 0xFFFF, sum = 0
5272 23:03:04.291535 2, 0xFFFF, sum = 0
5273 23:03:04.291616 3, 0xFFFF, sum = 0
5274 23:03:04.294865 4, 0xFFFF, sum = 0
5275 23:03:04.294986 5, 0xFFFF, sum = 0
5276 23:03:04.298069 6, 0xFFFF, sum = 0
5277 23:03:04.298150 7, 0xFFFF, sum = 0
5278 23:03:04.301266 8, 0xFFFF, sum = 0
5279 23:03:04.301347 9, 0xFFFF, sum = 0
5280 23:03:04.304756 10, 0x0, sum = 1
5281 23:03:04.304837 11, 0x0, sum = 2
5282 23:03:04.308086 12, 0x0, sum = 3
5283 23:03:04.308167 13, 0x0, sum = 4
5284 23:03:04.311622 best_step = 11
5285 23:03:04.311702
5286 23:03:04.311765 ==
5287 23:03:04.314504 Dram Type= 6, Freq= 0, CH_0, rank 0
5288 23:03:04.317659 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5289 23:03:04.317739 ==
5290 23:03:04.317802 RX Vref Scan: 1
5291 23:03:04.317861
5292 23:03:04.321232 RX Vref 0 -> 0, step: 1
5293 23:03:04.321315
5294 23:03:04.324582 RX Delay -69 -> 252, step: 4
5295 23:03:04.324663
5296 23:03:04.328161 Set Vref, RX VrefLevel [Byte0]: 61
5297 23:03:04.330738 [Byte1]: 48
5298 23:03:04.334701
5299 23:03:04.334774 Final RX Vref Byte 0 = 61 to rank0
5300 23:03:04.337888 Final RX Vref Byte 1 = 48 to rank0
5301 23:03:04.340929 Final RX Vref Byte 0 = 61 to rank1
5302 23:03:04.344557 Final RX Vref Byte 1 = 48 to rank1==
5303 23:03:04.347998 Dram Type= 6, Freq= 0, CH_0, rank 0
5304 23:03:04.354030 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5305 23:03:04.354115 ==
5306 23:03:04.354182 DQS Delay:
5307 23:03:04.357596 DQS0 = 0, DQS1 = 0
5308 23:03:04.357667 DQM Delay:
5309 23:03:04.357734 DQM0 = 97, DQM1 = 85
5310 23:03:04.360901 DQ Delay:
5311 23:03:04.364355 DQ0 =96, DQ1 =98, DQ2 =92, DQ3 =94
5312 23:03:04.367749 DQ4 =96, DQ5 =88, DQ6 =108, DQ7 =106
5313 23:03:04.371027 DQ8 =78, DQ9 =74, DQ10 =86, DQ11 =78
5314 23:03:04.373932 DQ12 =90, DQ13 =90, DQ14 =94, DQ15 =92
5315 23:03:04.374006
5316 23:03:04.374066
5317 23:03:04.380569 [DQSOSCAuto] RK0, (LSB)MR18= 0x280e, (MSB)MR19= 0x505, tDQSOscB0 = 417 ps tDQSOscB1 = 409 ps
5318 23:03:04.384060 CH0 RK0: MR19=505, MR18=280E
5319 23:03:04.390756 CH0_RK0: MR19=0x505, MR18=0x280E, DQSOSC=409, MR23=63, INC=64, DEC=43
5320 23:03:04.390831
5321 23:03:04.394187 ----->DramcWriteLeveling(PI) begin...
5322 23:03:04.394264 ==
5323 23:03:04.396900 Dram Type= 6, Freq= 0, CH_0, rank 1
5324 23:03:04.400251 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5325 23:03:04.400324 ==
5326 23:03:04.403714 Write leveling (Byte 0): 36 => 36
5327 23:03:04.407111 Write leveling (Byte 1): 30 => 30
5328 23:03:04.410689 DramcWriteLeveling(PI) end<-----
5329 23:03:04.410766
5330 23:03:04.410826 ==
5331 23:03:04.413506 Dram Type= 6, Freq= 0, CH_0, rank 1
5332 23:03:04.416688 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5333 23:03:04.419918 ==
5334 23:03:04.419995 [Gating] SW mode calibration
5335 23:03:04.430160 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5336 23:03:04.433258 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5337 23:03:04.436907 0 14 0 | B1->B0 | 2828 3131 | 0 1 | (1 1) (1 1)
5338 23:03:04.443447 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5339 23:03:04.446984 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5340 23:03:04.450441 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5341 23:03:04.456799 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5342 23:03:04.459953 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5343 23:03:04.464035 0 14 24 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
5344 23:03:04.470042 0 14 28 | B1->B0 | 3434 2f2f | 0 1 | (0 0) (1 1)
5345 23:03:04.473714 0 15 0 | B1->B0 | 2b2b 2323 | 0 0 | (0 1) (0 0)
5346 23:03:04.476437 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5347 23:03:04.483527 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5348 23:03:04.486661 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5349 23:03:04.489900 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5350 23:03:04.496697 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5351 23:03:04.499611 0 15 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5352 23:03:04.503048 0 15 28 | B1->B0 | 2727 3a3a | 0 0 | (0 0) (0 0)
5353 23:03:04.509279 1 0 0 | B1->B0 | 4141 4343 | 0 0 | (0 0) (0 0)
5354 23:03:04.512698 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5355 23:03:04.516291 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5356 23:03:04.522574 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5357 23:03:04.526053 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5358 23:03:04.529616 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5359 23:03:04.536065 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5360 23:03:04.539390 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5361 23:03:04.542464 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5362 23:03:04.549212 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5363 23:03:04.552525 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5364 23:03:04.555883 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5365 23:03:04.562261 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5366 23:03:04.565351 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5367 23:03:04.568816 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5368 23:03:04.575797 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5369 23:03:04.579054 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5370 23:03:04.582308 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5371 23:03:04.588825 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5372 23:03:04.591956 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5373 23:03:04.595286 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5374 23:03:04.601953 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5375 23:03:04.604995 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5376 23:03:04.608163 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5377 23:03:04.614959 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5378 23:03:04.615043 Total UI for P1: 0, mck2ui 16
5379 23:03:04.621531 best dqsien dly found for B0: ( 1, 2, 28)
5380 23:03:04.624941 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5381 23:03:04.628076 Total UI for P1: 0, mck2ui 16
5382 23:03:04.631407 best dqsien dly found for B1: ( 1, 3, 0)
5383 23:03:04.635028 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5384 23:03:04.638345 best DQS1 dly(MCK, UI, PI) = (1, 3, 0)
5385 23:03:04.638433
5386 23:03:04.641574 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5387 23:03:04.644483 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 0)
5388 23:03:04.647751 [Gating] SW calibration Done
5389 23:03:04.647828 ==
5390 23:03:04.651132 Dram Type= 6, Freq= 0, CH_0, rank 1
5391 23:03:04.654473 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5392 23:03:04.658100 ==
5393 23:03:04.658171 RX Vref Scan: 0
5394 23:03:04.658231
5395 23:03:04.661470 RX Vref 0 -> 0, step: 1
5396 23:03:04.661539
5397 23:03:04.664203 RX Delay -80 -> 252, step: 8
5398 23:03:04.667637 iDelay=208, Bit 0, Center 95 (0 ~ 191) 192
5399 23:03:04.670881 iDelay=208, Bit 1, Center 99 (0 ~ 199) 200
5400 23:03:04.674055 iDelay=208, Bit 2, Center 91 (-8 ~ 191) 200
5401 23:03:04.677601 iDelay=208, Bit 3, Center 91 (-8 ~ 191) 200
5402 23:03:04.680683 iDelay=208, Bit 4, Center 99 (0 ~ 199) 200
5403 23:03:04.687515 iDelay=208, Bit 5, Center 87 (-8 ~ 183) 192
5404 23:03:04.690534 iDelay=208, Bit 6, Center 107 (8 ~ 207) 200
5405 23:03:04.693861 iDelay=208, Bit 7, Center 107 (8 ~ 207) 200
5406 23:03:04.697406 iDelay=208, Bit 8, Center 79 (-16 ~ 175) 192
5407 23:03:04.700808 iDelay=208, Bit 9, Center 79 (-16 ~ 175) 192
5408 23:03:04.707411 iDelay=208, Bit 10, Center 91 (-8 ~ 191) 200
5409 23:03:04.710707 iDelay=208, Bit 11, Center 79 (-16 ~ 175) 192
5410 23:03:04.713902 iDelay=208, Bit 12, Center 91 (-8 ~ 191) 200
5411 23:03:04.717188 iDelay=208, Bit 13, Center 91 (-8 ~ 191) 200
5412 23:03:04.720420 iDelay=208, Bit 14, Center 95 (0 ~ 191) 192
5413 23:03:04.727980 iDelay=208, Bit 15, Center 91 (-8 ~ 191) 200
5414 23:03:04.728057 ==
5415 23:03:04.730314 Dram Type= 6, Freq= 0, CH_0, rank 1
5416 23:03:04.733853 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5417 23:03:04.733926 ==
5418 23:03:04.733989 DQS Delay:
5419 23:03:04.737291 DQS0 = 0, DQS1 = 0
5420 23:03:04.737364 DQM Delay:
5421 23:03:04.740306 DQM0 = 97, DQM1 = 87
5422 23:03:04.740383 DQ Delay:
5423 23:03:04.743844 DQ0 =95, DQ1 =99, DQ2 =91, DQ3 =91
5424 23:03:04.747024 DQ4 =99, DQ5 =87, DQ6 =107, DQ7 =107
5425 23:03:04.750194 DQ8 =79, DQ9 =79, DQ10 =91, DQ11 =79
5426 23:03:04.754116 DQ12 =91, DQ13 =91, DQ14 =95, DQ15 =91
5427 23:03:04.754197
5428 23:03:04.754301
5429 23:03:04.754360 ==
5430 23:03:04.756886 Dram Type= 6, Freq= 0, CH_0, rank 1
5431 23:03:04.760563 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5432 23:03:04.760634 ==
5433 23:03:04.763494
5434 23:03:04.763562
5435 23:03:04.763622 TX Vref Scan disable
5436 23:03:04.766624 == TX Byte 0 ==
5437 23:03:04.770491 Update DQ dly =720 (2 ,6, 16) DQ OEN =(2 ,3)
5438 23:03:04.773276 Update DQM dly =720 (2 ,6, 16) DQM OEN =(2 ,3)
5439 23:03:04.776968 == TX Byte 1 ==
5440 23:03:04.779821 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5441 23:03:04.783253 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5442 23:03:04.786632 ==
5443 23:03:04.789793 Dram Type= 6, Freq= 0, CH_0, rank 1
5444 23:03:04.793033 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5445 23:03:04.793107 ==
5446 23:03:04.793167
5447 23:03:04.793225
5448 23:03:04.796453 TX Vref Scan disable
5449 23:03:04.796520 == TX Byte 0 ==
5450 23:03:04.803113 Update DQ dly =719 (2 ,6, 15) DQ OEN =(2 ,3)
5451 23:03:04.806420 Update DQM dly =719 (2 ,6, 15) DQM OEN =(2 ,3)
5452 23:03:04.806494 == TX Byte 1 ==
5453 23:03:04.812792 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5454 23:03:04.816258 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5455 23:03:04.816335
5456 23:03:04.816396 [DATLAT]
5457 23:03:04.819348 Freq=933, CH0 RK1
5458 23:03:04.819424
5459 23:03:04.819489 DATLAT Default: 0xb
5460 23:03:04.822814 0, 0xFFFF, sum = 0
5461 23:03:04.822904 1, 0xFFFF, sum = 0
5462 23:03:04.826022 2, 0xFFFF, sum = 0
5463 23:03:04.826092 3, 0xFFFF, sum = 0
5464 23:03:04.829291 4, 0xFFFF, sum = 0
5465 23:03:04.829363 5, 0xFFFF, sum = 0
5466 23:03:04.832632 6, 0xFFFF, sum = 0
5467 23:03:04.836199 7, 0xFFFF, sum = 0
5468 23:03:04.836283 8, 0xFFFF, sum = 0
5469 23:03:04.839137 9, 0xFFFF, sum = 0
5470 23:03:04.839215 10, 0x0, sum = 1
5471 23:03:04.842604 11, 0x0, sum = 2
5472 23:03:04.842678 12, 0x0, sum = 3
5473 23:03:04.842765 13, 0x0, sum = 4
5474 23:03:04.846150 best_step = 11
5475 23:03:04.846227
5476 23:03:04.846288 ==
5477 23:03:04.849676 Dram Type= 6, Freq= 0, CH_0, rank 1
5478 23:03:04.852833 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5479 23:03:04.852904 ==
5480 23:03:04.855736 RX Vref Scan: 0
5481 23:03:04.855805
5482 23:03:04.855962 RX Vref 0 -> 0, step: 1
5483 23:03:04.859190
5484 23:03:04.859264 RX Delay -61 -> 252, step: 4
5485 23:03:04.866712 iDelay=203, Bit 0, Center 94 (3 ~ 186) 184
5486 23:03:04.869866 iDelay=203, Bit 1, Center 98 (3 ~ 194) 192
5487 23:03:04.873151 iDelay=203, Bit 2, Center 88 (-5 ~ 182) 188
5488 23:03:04.876544 iDelay=203, Bit 3, Center 94 (-1 ~ 190) 192
5489 23:03:04.880052 iDelay=203, Bit 4, Center 96 (3 ~ 190) 188
5490 23:03:04.886754 iDelay=203, Bit 5, Center 86 (-9 ~ 182) 192
5491 23:03:04.889515 iDelay=203, Bit 6, Center 104 (7 ~ 202) 196
5492 23:03:04.893087 iDelay=203, Bit 7, Center 104 (11 ~ 198) 188
5493 23:03:04.895903 iDelay=203, Bit 8, Center 78 (-13 ~ 170) 184
5494 23:03:04.899443 iDelay=203, Bit 9, Center 74 (-17 ~ 166) 184
5495 23:03:04.906630 iDelay=203, Bit 10, Center 86 (-9 ~ 182) 192
5496 23:03:04.909196 iDelay=203, Bit 11, Center 78 (-13 ~ 170) 184
5497 23:03:04.912622 iDelay=203, Bit 12, Center 94 (3 ~ 186) 184
5498 23:03:04.915614 iDelay=203, Bit 13, Center 94 (3 ~ 186) 184
5499 23:03:04.918856 iDelay=203, Bit 14, Center 94 (3 ~ 186) 184
5500 23:03:04.925693 iDelay=203, Bit 15, Center 94 (3 ~ 186) 184
5501 23:03:04.925767 ==
5502 23:03:04.929151 Dram Type= 6, Freq= 0, CH_0, rank 1
5503 23:03:04.932948 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5504 23:03:04.933031 ==
5505 23:03:04.933106 DQS Delay:
5506 23:03:04.935399 DQS0 = 0, DQS1 = 0
5507 23:03:04.935476 DQM Delay:
5508 23:03:04.938787 DQM0 = 95, DQM1 = 86
5509 23:03:04.938860 DQ Delay:
5510 23:03:04.942312 DQ0 =94, DQ1 =98, DQ2 =88, DQ3 =94
5511 23:03:04.945398 DQ4 =96, DQ5 =86, DQ6 =104, DQ7 =104
5512 23:03:04.948601 DQ8 =78, DQ9 =74, DQ10 =86, DQ11 =78
5513 23:03:04.952095 DQ12 =94, DQ13 =94, DQ14 =94, DQ15 =94
5514 23:03:04.952167
5515 23:03:04.952229
5516 23:03:04.962029 [DQSOSCAuto] RK1, (LSB)MR18= 0x28f7, (MSB)MR19= 0x504, tDQSOscB0 = 425 ps tDQSOscB1 = 409 ps
5517 23:03:04.962106 CH0 RK1: MR19=504, MR18=28F7
5518 23:03:04.968295 CH0_RK1: MR19=0x504, MR18=0x28F7, DQSOSC=409, MR23=63, INC=64, DEC=43
5519 23:03:04.971628 [RxdqsGatingPostProcess] freq 933
5520 23:03:04.978291 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5521 23:03:04.981587 best DQS0 dly(2T, 0.5T) = (0, 10)
5522 23:03:04.984918 best DQS1 dly(2T, 0.5T) = (0, 10)
5523 23:03:04.988174 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5524 23:03:04.991403 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5525 23:03:04.991475 best DQS0 dly(2T, 0.5T) = (0, 10)
5526 23:03:04.994721 best DQS1 dly(2T, 0.5T) = (0, 11)
5527 23:03:04.998187 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5528 23:03:05.001325 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
5529 23:03:05.004856 Pre-setting of DQS Precalculation
5530 23:03:05.011688 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5531 23:03:05.011760 ==
5532 23:03:05.014503 Dram Type= 6, Freq= 0, CH_1, rank 0
5533 23:03:05.018285 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5534 23:03:05.018371 ==
5535 23:03:05.024652 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5536 23:03:05.031384 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
5537 23:03:05.034681 [CA 0] Center 36 (6~67) winsize 62
5538 23:03:05.037606 [CA 1] Center 37 (7~68) winsize 62
5539 23:03:05.040831 [CA 2] Center 34 (4~65) winsize 62
5540 23:03:05.044188 [CA 3] Center 34 (3~65) winsize 63
5541 23:03:05.047520 [CA 4] Center 34 (4~65) winsize 62
5542 23:03:05.050922 [CA 5] Center 33 (3~64) winsize 62
5543 23:03:05.050996
5544 23:03:05.054152 [CmdBusTrainingLP45] Vref(ca) range 1: 33
5545 23:03:05.054220
5546 23:03:05.057209 [CATrainingPosCal] consider 1 rank data
5547 23:03:05.060472 u2DelayCellTimex100 = 270/100 ps
5548 23:03:05.063673 CA0 delay=36 (6~67),Diff = 3 PI (18 cell)
5549 23:03:05.067654 CA1 delay=37 (7~68),Diff = 4 PI (24 cell)
5550 23:03:05.070505 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5551 23:03:05.073968 CA3 delay=34 (3~65),Diff = 1 PI (6 cell)
5552 23:03:05.077047 CA4 delay=34 (4~65),Diff = 1 PI (6 cell)
5553 23:03:05.080442 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5554 23:03:05.083833
5555 23:03:05.087407 CA PerBit enable=1, Macro0, CA PI delay=33
5556 23:03:05.087481
5557 23:03:05.090664 [CBTSetCACLKResult] CA Dly = 33
5558 23:03:05.090734 CS Dly: 6 (0~37)
5559 23:03:05.090805 ==
5560 23:03:05.093951 Dram Type= 6, Freq= 0, CH_1, rank 1
5561 23:03:05.097264 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5562 23:03:05.097339 ==
5563 23:03:05.103678 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5564 23:03:05.110286 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
5565 23:03:05.113369 [CA 0] Center 37 (7~67) winsize 61
5566 23:03:05.116613 [CA 1] Center 37 (7~67) winsize 61
5567 23:03:05.119910 [CA 2] Center 34 (4~65) winsize 62
5568 23:03:05.123232 [CA 3] Center 34 (3~65) winsize 63
5569 23:03:05.126792 [CA 4] Center 34 (3~65) winsize 63
5570 23:03:05.129831 [CA 5] Center 33 (3~64) winsize 62
5571 23:03:05.129930
5572 23:03:05.133000 [CmdBusTrainingLP45] Vref(ca) range 1: 37
5573 23:03:05.133085
5574 23:03:05.136848 [CATrainingPosCal] consider 2 rank data
5575 23:03:05.139659 u2DelayCellTimex100 = 270/100 ps
5576 23:03:05.143058 CA0 delay=37 (7~67),Diff = 4 PI (24 cell)
5577 23:03:05.146261 CA1 delay=37 (7~67),Diff = 4 PI (24 cell)
5578 23:03:05.149862 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5579 23:03:05.152928 CA3 delay=34 (3~65),Diff = 1 PI (6 cell)
5580 23:03:05.159512 CA4 delay=34 (4~65),Diff = 1 PI (6 cell)
5581 23:03:05.162853 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5582 23:03:05.162924
5583 23:03:05.166084 CA PerBit enable=1, Macro0, CA PI delay=33
5584 23:03:05.166157
5585 23:03:05.169787 [CBTSetCACLKResult] CA Dly = 33
5586 23:03:05.169854 CS Dly: 7 (0~39)
5587 23:03:05.169913
5588 23:03:05.173108 ----->DramcWriteLeveling(PI) begin...
5589 23:03:05.173183 ==
5590 23:03:05.176076 Dram Type= 6, Freq= 0, CH_1, rank 0
5591 23:03:05.183102 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5592 23:03:05.183187 ==
5593 23:03:05.186529 Write leveling (Byte 0): 27 => 27
5594 23:03:05.189249 Write leveling (Byte 1): 29 => 29
5595 23:03:05.189319 DramcWriteLeveling(PI) end<-----
5596 23:03:05.192720
5597 23:03:05.192798 ==
5598 23:03:05.196268 Dram Type= 6, Freq= 0, CH_1, rank 0
5599 23:03:05.199378 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5600 23:03:05.199451 ==
5601 23:03:05.202908 [Gating] SW mode calibration
5602 23:03:05.209405 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5603 23:03:05.215687 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5604 23:03:05.219296 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5605 23:03:05.222228 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5606 23:03:05.226121 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5607 23:03:05.232744 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5608 23:03:05.235568 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5609 23:03:05.239060 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5610 23:03:05.246280 0 14 24 | B1->B0 | 3434 3333 | 1 1 | (0 1) (0 0)
5611 23:03:05.248794 0 14 28 | B1->B0 | 2d2d 2626 | 0 0 | (1 1) (1 1)
5612 23:03:05.255221 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5613 23:03:05.258517 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5614 23:03:05.261805 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5615 23:03:05.264998 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5616 23:03:05.271739 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5617 23:03:05.275076 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5618 23:03:05.278457 0 15 24 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
5619 23:03:05.285240 0 15 28 | B1->B0 | 3736 4141 | 1 0 | (0 0) (0 0)
5620 23:03:05.288264 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5621 23:03:05.291851 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5622 23:03:05.298161 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5623 23:03:05.301320 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5624 23:03:05.304657 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5625 23:03:05.311237 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5626 23:03:05.314605 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5627 23:03:05.318237 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5628 23:03:05.325039 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5629 23:03:05.327963 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5630 23:03:05.331366 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5631 23:03:05.337742 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5632 23:03:05.341056 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5633 23:03:05.344505 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5634 23:03:05.350944 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5635 23:03:05.354050 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5636 23:03:05.357554 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5637 23:03:05.364129 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5638 23:03:05.367544 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5639 23:03:05.370563 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5640 23:03:05.377405 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5641 23:03:05.380422 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5642 23:03:05.384244 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5643 23:03:05.390374 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5644 23:03:05.393668 Total UI for P1: 0, mck2ui 16
5645 23:03:05.397306 best dqsien dly found for B0: ( 1, 2, 24)
5646 23:03:05.400553 Total UI for P1: 0, mck2ui 16
5647 23:03:05.403539 best dqsien dly found for B1: ( 1, 2, 24)
5648 23:03:05.406725 best DQS0 dly(MCK, UI, PI) = (1, 2, 24)
5649 23:03:05.410249 best DQS1 dly(MCK, UI, PI) = (1, 2, 24)
5650 23:03:05.410332
5651 23:03:05.413660 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 24)
5652 23:03:05.416999 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 24)
5653 23:03:05.420388 [Gating] SW calibration Done
5654 23:03:05.420468 ==
5655 23:03:05.423270 Dram Type= 6, Freq= 0, CH_1, rank 0
5656 23:03:05.426551 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5657 23:03:05.426631 ==
5658 23:03:05.430297 RX Vref Scan: 0
5659 23:03:05.430376
5660 23:03:05.433007 RX Vref 0 -> 0, step: 1
5661 23:03:05.433088
5662 23:03:05.433151 RX Delay -80 -> 252, step: 8
5663 23:03:05.440040 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5664 23:03:05.443564 iDelay=208, Bit 1, Center 99 (8 ~ 191) 184
5665 23:03:05.446822 iDelay=208, Bit 2, Center 95 (0 ~ 191) 192
5666 23:03:05.449851 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5667 23:03:05.453235 iDelay=208, Bit 4, Center 99 (8 ~ 191) 184
5668 23:03:05.459450 iDelay=208, Bit 5, Center 111 (16 ~ 207) 192
5669 23:03:05.462826 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5670 23:03:05.466200 iDelay=208, Bit 7, Center 99 (8 ~ 191) 184
5671 23:03:05.469393 iDelay=208, Bit 8, Center 75 (-24 ~ 175) 200
5672 23:03:05.472995 iDelay=208, Bit 9, Center 83 (-16 ~ 183) 200
5673 23:03:05.476347 iDelay=208, Bit 10, Center 91 (-8 ~ 191) 200
5674 23:03:05.482817 iDelay=208, Bit 11, Center 79 (-16 ~ 175) 192
5675 23:03:05.486132 iDelay=208, Bit 12, Center 99 (0 ~ 199) 200
5676 23:03:05.489360 iDelay=208, Bit 13, Center 99 (0 ~ 199) 200
5677 23:03:05.492731 iDelay=208, Bit 14, Center 99 (0 ~ 199) 200
5678 23:03:05.495712 iDelay=208, Bit 15, Center 103 (8 ~ 199) 192
5679 23:03:05.498982 ==
5680 23:03:05.502700 Dram Type= 6, Freq= 0, CH_1, rank 0
5681 23:03:05.505825 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5682 23:03:05.505905 ==
5683 23:03:05.505970 DQS Delay:
5684 23:03:05.509199 DQS0 = 0, DQS1 = 0
5685 23:03:05.509294 DQM Delay:
5686 23:03:05.512111 DQM0 = 102, DQM1 = 91
5687 23:03:05.512182 DQ Delay:
5688 23:03:05.515470 DQ0 =107, DQ1 =99, DQ2 =95, DQ3 =99
5689 23:03:05.518716 DQ4 =99, DQ5 =111, DQ6 =111, DQ7 =99
5690 23:03:05.522001 DQ8 =75, DQ9 =83, DQ10 =91, DQ11 =79
5691 23:03:05.525366 DQ12 =99, DQ13 =99, DQ14 =99, DQ15 =103
5692 23:03:05.525480
5693 23:03:05.525582
5694 23:03:05.525639 ==
5695 23:03:05.528615 Dram Type= 6, Freq= 0, CH_1, rank 0
5696 23:03:05.532088 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5697 23:03:05.535636 ==
5698 23:03:05.535717
5699 23:03:05.535780
5700 23:03:05.535838 TX Vref Scan disable
5701 23:03:05.538634 == TX Byte 0 ==
5702 23:03:05.541991 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5703 23:03:05.545151 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5704 23:03:05.548689 == TX Byte 1 ==
5705 23:03:05.551996 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5706 23:03:05.555510 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5707 23:03:05.558466 ==
5708 23:03:05.558564 Dram Type= 6, Freq= 0, CH_1, rank 0
5709 23:03:05.565050 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5710 23:03:05.565130 ==
5711 23:03:05.565193
5712 23:03:05.565251
5713 23:03:05.568283 TX Vref Scan disable
5714 23:03:05.568352 == TX Byte 0 ==
5715 23:03:05.575075 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5716 23:03:05.578210 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5717 23:03:05.578290 == TX Byte 1 ==
5718 23:03:05.584930 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5719 23:03:05.588047 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5720 23:03:05.588127
5721 23:03:05.588208 [DATLAT]
5722 23:03:05.591676 Freq=933, CH1 RK0
5723 23:03:05.591770
5724 23:03:05.591833 DATLAT Default: 0xd
5725 23:03:05.594567 0, 0xFFFF, sum = 0
5726 23:03:05.594648 1, 0xFFFF, sum = 0
5727 23:03:05.598156 2, 0xFFFF, sum = 0
5728 23:03:05.598236 3, 0xFFFF, sum = 0
5729 23:03:05.601382 4, 0xFFFF, sum = 0
5730 23:03:05.601524 5, 0xFFFF, sum = 0
5731 23:03:05.604701 6, 0xFFFF, sum = 0
5732 23:03:05.608240 7, 0xFFFF, sum = 0
5733 23:03:05.608321 8, 0xFFFF, sum = 0
5734 23:03:05.610964 9, 0xFFFF, sum = 0
5735 23:03:05.611045 10, 0x0, sum = 1
5736 23:03:05.614330 11, 0x0, sum = 2
5737 23:03:05.614442 12, 0x0, sum = 3
5738 23:03:05.614555 13, 0x0, sum = 4
5739 23:03:05.617958 best_step = 11
5740 23:03:05.618038
5741 23:03:05.618101 ==
5742 23:03:05.621199 Dram Type= 6, Freq= 0, CH_1, rank 0
5743 23:03:05.624528 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5744 23:03:05.624609 ==
5745 23:03:05.628001 RX Vref Scan: 1
5746 23:03:05.628080
5747 23:03:05.630851 RX Vref 0 -> 0, step: 1
5748 23:03:05.630931
5749 23:03:05.630994 RX Delay -69 -> 252, step: 4
5750 23:03:05.631052
5751 23:03:05.634427 Set Vref, RX VrefLevel [Byte0]: 46
5752 23:03:05.638140 [Byte1]: 60
5753 23:03:05.642046
5754 23:03:05.642126 Final RX Vref Byte 0 = 46 to rank0
5755 23:03:05.645736 Final RX Vref Byte 1 = 60 to rank0
5756 23:03:05.648678 Final RX Vref Byte 0 = 46 to rank1
5757 23:03:05.651883 Final RX Vref Byte 1 = 60 to rank1==
5758 23:03:05.655512 Dram Type= 6, Freq= 0, CH_1, rank 0
5759 23:03:05.661807 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5760 23:03:05.661888 ==
5761 23:03:05.661952 DQS Delay:
5762 23:03:05.664988 DQS0 = 0, DQS1 = 0
5763 23:03:05.665056 DQM Delay:
5764 23:03:05.665114 DQM0 = 101, DQM1 = 95
5765 23:03:05.668441 DQ Delay:
5766 23:03:05.671690 DQ0 =106, DQ1 =98, DQ2 =94, DQ3 =100
5767 23:03:05.674772 DQ4 =98, DQ5 =112, DQ6 =110, DQ7 =96
5768 23:03:05.678097 DQ8 =84, DQ9 =86, DQ10 =98, DQ11 =88
5769 23:03:05.681564 DQ12 =100, DQ13 =100, DQ14 =104, DQ15 =104
5770 23:03:05.681677
5771 23:03:05.681757
5772 23:03:05.691248 [DQSOSCAuto] RK0, (LSB)MR18= 0x1c0c, (MSB)MR19= 0x505, tDQSOscB0 = 418 ps tDQSOscB1 = 412 ps
5773 23:03:05.691329 CH1 RK0: MR19=505, MR18=1C0C
5774 23:03:05.697803 CH1_RK0: MR19=0x505, MR18=0x1C0C, DQSOSC=412, MR23=63, INC=63, DEC=42
5775 23:03:05.697886
5776 23:03:05.700905 ----->DramcWriteLeveling(PI) begin...
5777 23:03:05.700986 ==
5778 23:03:05.704461 Dram Type= 6, Freq= 0, CH_1, rank 1
5779 23:03:05.710718 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5780 23:03:05.710798 ==
5781 23:03:05.714562 Write leveling (Byte 0): 26 => 26
5782 23:03:05.717237 Write leveling (Byte 1): 28 => 28
5783 23:03:05.717317 DramcWriteLeveling(PI) end<-----
5784 23:03:05.717381
5785 23:03:05.720913 ==
5786 23:03:05.724340 Dram Type= 6, Freq= 0, CH_1, rank 1
5787 23:03:05.727599 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5788 23:03:05.727700 ==
5789 23:03:05.730978 [Gating] SW mode calibration
5790 23:03:05.737292 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5791 23:03:05.740531 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5792 23:03:05.747472 0 14 0 | B1->B0 | 3434 3131 | 1 1 | (1 1) (1 1)
5793 23:03:05.750625 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5794 23:03:05.754035 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5795 23:03:05.760349 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5796 23:03:05.763947 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5797 23:03:05.766952 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5798 23:03:05.773566 0 14 24 | B1->B0 | 3232 3434 | 1 1 | (1 0) (1 0)
5799 23:03:05.776614 0 14 28 | B1->B0 | 2c2c 3030 | 0 0 | (0 0) (0 1)
5800 23:03:05.780103 0 15 0 | B1->B0 | 2323 2929 | 0 0 | (0 0) (0 0)
5801 23:03:05.787186 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5802 23:03:05.789863 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5803 23:03:05.793226 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5804 23:03:05.799895 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5805 23:03:05.803212 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5806 23:03:05.806401 0 15 24 | B1->B0 | 2b2b 2323 | 0 0 | (0 0) (0 0)
5807 23:03:05.813117 0 15 28 | B1->B0 | 3b3b 2e2e | 0 1 | (1 1) (0 0)
5808 23:03:05.816758 1 0 0 | B1->B0 | 4646 4040 | 0 0 | (0 0) (0 0)
5809 23:03:05.819694 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5810 23:03:05.826394 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5811 23:03:05.829704 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5812 23:03:05.832988 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5813 23:03:05.839725 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
5814 23:03:05.842796 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5815 23:03:05.846407 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5816 23:03:05.852576 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5817 23:03:05.856200 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5818 23:03:05.859289 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5819 23:03:05.866269 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5820 23:03:05.869705 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5821 23:03:05.873106 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5822 23:03:05.879371 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5823 23:03:05.883036 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5824 23:03:05.886220 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5825 23:03:05.892415 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5826 23:03:05.896014 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5827 23:03:05.899025 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5828 23:03:05.906051 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5829 23:03:05.908952 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5830 23:03:05.912149 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
5831 23:03:05.918981 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
5832 23:03:05.919057 Total UI for P1: 0, mck2ui 16
5833 23:03:05.925216 best dqsien dly found for B1: ( 1, 2, 24)
5834 23:03:05.928978 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5835 23:03:05.932036 Total UI for P1: 0, mck2ui 16
5836 23:03:05.935565 best dqsien dly found for B0: ( 1, 2, 28)
5837 23:03:05.938732 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5838 23:03:05.941985 best DQS1 dly(MCK, UI, PI) = (1, 2, 24)
5839 23:03:05.942057
5840 23:03:05.945264 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5841 23:03:05.948256 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 24)
5842 23:03:05.951851 [Gating] SW calibration Done
5843 23:03:05.951924 ==
5844 23:03:05.954998 Dram Type= 6, Freq= 0, CH_1, rank 1
5845 23:03:05.961374 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5846 23:03:05.961496 ==
5847 23:03:05.961587 RX Vref Scan: 0
5848 23:03:05.961676
5849 23:03:05.965261 RX Vref 0 -> 0, step: 1
5850 23:03:05.965376
5851 23:03:05.968225 RX Delay -80 -> 252, step: 8
5852 23:03:05.971306 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5853 23:03:05.974649 iDelay=208, Bit 1, Center 95 (8 ~ 183) 176
5854 23:03:05.978342 iDelay=208, Bit 2, Center 91 (0 ~ 183) 184
5855 23:03:05.981959 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5856 23:03:05.984881 iDelay=208, Bit 4, Center 99 (8 ~ 191) 184
5857 23:03:05.991522 iDelay=208, Bit 5, Center 107 (16 ~ 199) 184
5858 23:03:05.994841 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5859 23:03:05.998271 iDelay=208, Bit 7, Center 99 (8 ~ 191) 184
5860 23:03:06.000977 iDelay=208, Bit 8, Center 79 (-16 ~ 175) 192
5861 23:03:06.004401 iDelay=208, Bit 9, Center 79 (-16 ~ 175) 192
5862 23:03:06.010991 iDelay=208, Bit 10, Center 91 (-8 ~ 191) 200
5863 23:03:06.014278 iDelay=208, Bit 11, Center 83 (-16 ~ 183) 200
5864 23:03:06.017610 iDelay=208, Bit 12, Center 103 (8 ~ 199) 192
5865 23:03:06.020897 iDelay=208, Bit 13, Center 103 (8 ~ 199) 192
5866 23:03:06.027735 iDelay=208, Bit 14, Center 103 (8 ~ 199) 192
5867 23:03:06.031242 iDelay=208, Bit 15, Center 99 (0 ~ 199) 200
5868 23:03:06.031323 ==
5869 23:03:06.034106 Dram Type= 6, Freq= 0, CH_1, rank 1
5870 23:03:06.037260 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5871 23:03:06.037348 ==
5872 23:03:06.037429 DQS Delay:
5873 23:03:06.040865 DQS0 = 0, DQS1 = 0
5874 23:03:06.040944 DQM Delay:
5875 23:03:06.043767 DQM0 = 100, DQM1 = 92
5876 23:03:06.043837 DQ Delay:
5877 23:03:06.047289 DQ0 =103, DQ1 =95, DQ2 =91, DQ3 =99
5878 23:03:06.050345 DQ4 =99, DQ5 =107, DQ6 =111, DQ7 =99
5879 23:03:06.053780 DQ8 =79, DQ9 =79, DQ10 =91, DQ11 =83
5880 23:03:06.057101 DQ12 =103, DQ13 =103, DQ14 =103, DQ15 =99
5881 23:03:06.057181
5882 23:03:06.057247
5883 23:03:06.057305 ==
5884 23:03:06.060235 Dram Type= 6, Freq= 0, CH_1, rank 1
5885 23:03:06.067164 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5886 23:03:06.067241 ==
5887 23:03:06.067314
5888 23:03:06.067374
5889 23:03:06.067432 TX Vref Scan disable
5890 23:03:06.070580 == TX Byte 0 ==
5891 23:03:06.074107 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5892 23:03:06.080731 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5893 23:03:06.080813 == TX Byte 1 ==
5894 23:03:06.084099 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5895 23:03:06.090452 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5896 23:03:06.090532 ==
5897 23:03:06.093492 Dram Type= 6, Freq= 0, CH_1, rank 1
5898 23:03:06.096822 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5899 23:03:06.096897 ==
5900 23:03:06.096965
5901 23:03:06.097028
5902 23:03:06.100491 TX Vref Scan disable
5903 23:03:06.100562 == TX Byte 0 ==
5904 23:03:06.106718 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5905 23:03:06.110673 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5906 23:03:06.113767 == TX Byte 1 ==
5907 23:03:06.116769 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5908 23:03:06.120188 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5909 23:03:06.120262
5910 23:03:06.120323 [DATLAT]
5911 23:03:06.123605 Freq=933, CH1 RK1
5912 23:03:06.123674
5913 23:03:06.123735 DATLAT Default: 0xb
5914 23:03:06.126971 0, 0xFFFF, sum = 0
5915 23:03:06.130635 1, 0xFFFF, sum = 0
5916 23:03:06.130711 2, 0xFFFF, sum = 0
5917 23:03:06.133331 3, 0xFFFF, sum = 0
5918 23:03:06.133426 4, 0xFFFF, sum = 0
5919 23:03:06.136791 5, 0xFFFF, sum = 0
5920 23:03:06.136868 6, 0xFFFF, sum = 0
5921 23:03:06.139996 7, 0xFFFF, sum = 0
5922 23:03:06.140078 8, 0xFFFF, sum = 0
5923 23:03:06.143246 9, 0xFFFF, sum = 0
5924 23:03:06.143319 10, 0x0, sum = 1
5925 23:03:06.146609 11, 0x0, sum = 2
5926 23:03:06.146683 12, 0x0, sum = 3
5927 23:03:06.149917 13, 0x0, sum = 4
5928 23:03:06.149992 best_step = 11
5929 23:03:06.150057
5930 23:03:06.150115 ==
5931 23:03:06.153246 Dram Type= 6, Freq= 0, CH_1, rank 1
5932 23:03:06.156880 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5933 23:03:06.156949 ==
5934 23:03:06.160020 RX Vref Scan: 0
5935 23:03:06.160089
5936 23:03:06.163534 RX Vref 0 -> 0, step: 1
5937 23:03:06.163601
5938 23:03:06.163662 RX Delay -61 -> 252, step: 4
5939 23:03:06.171128 iDelay=203, Bit 0, Center 106 (19 ~ 194) 176
5940 23:03:06.175305 iDelay=203, Bit 1, Center 96 (11 ~ 182) 172
5941 23:03:06.177797 iDelay=203, Bit 2, Center 90 (3 ~ 178) 176
5942 23:03:06.181146 iDelay=203, Bit 3, Center 98 (15 ~ 182) 168
5943 23:03:06.184519 iDelay=203, Bit 4, Center 100 (11 ~ 190) 180
5944 23:03:06.191498 iDelay=203, Bit 5, Center 112 (27 ~ 198) 172
5945 23:03:06.193981 iDelay=203, Bit 6, Center 116 (31 ~ 202) 172
5946 23:03:06.197312 iDelay=203, Bit 7, Center 96 (7 ~ 186) 180
5947 23:03:06.200960 iDelay=203, Bit 8, Center 82 (-9 ~ 174) 184
5948 23:03:06.204235 iDelay=203, Bit 9, Center 84 (-5 ~ 174) 180
5949 23:03:06.207560 iDelay=203, Bit 10, Center 94 (3 ~ 186) 184
5950 23:03:06.214148 iDelay=203, Bit 11, Center 84 (-5 ~ 174) 180
5951 23:03:06.217198 iDelay=203, Bit 12, Center 104 (15 ~ 194) 180
5952 23:03:06.220372 iDelay=203, Bit 13, Center 100 (7 ~ 194) 188
5953 23:03:06.223849 iDelay=203, Bit 14, Center 100 (7 ~ 194) 188
5954 23:03:06.230699 iDelay=203, Bit 15, Center 102 (11 ~ 194) 184
5955 23:03:06.230774 ==
5956 23:03:06.233589 Dram Type= 6, Freq= 0, CH_1, rank 1
5957 23:03:06.236987 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5958 23:03:06.237087 ==
5959 23:03:06.237181 DQS Delay:
5960 23:03:06.240778 DQS0 = 0, DQS1 = 0
5961 23:03:06.240923 DQM Delay:
5962 23:03:06.243856 DQM0 = 101, DQM1 = 93
5963 23:03:06.243928 DQ Delay:
5964 23:03:06.247495 DQ0 =106, DQ1 =96, DQ2 =90, DQ3 =98
5965 23:03:06.250134 DQ4 =100, DQ5 =112, DQ6 =116, DQ7 =96
5966 23:03:06.253630 DQ8 =82, DQ9 =84, DQ10 =94, DQ11 =84
5967 23:03:06.256802 DQ12 =104, DQ13 =100, DQ14 =100, DQ15 =102
5968 23:03:06.256904
5969 23:03:06.256995
5970 23:03:06.266764 [DQSOSCAuto] RK1, (LSB)MR18= 0xa04, (MSB)MR19= 0x505, tDQSOscB0 = 420 ps tDQSOscB1 = 418 ps
5971 23:03:06.266839 CH1 RK1: MR19=505, MR18=A04
5972 23:03:06.273099 CH1_RK1: MR19=0x505, MR18=0xA04, DQSOSC=418, MR23=63, INC=62, DEC=41
5973 23:03:06.276923 [RxdqsGatingPostProcess] freq 933
5974 23:03:06.283339 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5975 23:03:06.286346 best DQS0 dly(2T, 0.5T) = (0, 10)
5976 23:03:06.289970 best DQS1 dly(2T, 0.5T) = (0, 10)
5977 23:03:06.293308 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5978 23:03:06.296377 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5979 23:03:06.299585 best DQS0 dly(2T, 0.5T) = (0, 10)
5980 23:03:06.303143 best DQS1 dly(2T, 0.5T) = (0, 10)
5981 23:03:06.303241 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5982 23:03:06.306772 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5983 23:03:06.309773 Pre-setting of DQS Precalculation
5984 23:03:06.316204 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5985 23:03:06.323088 sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3
5986 23:03:06.329803 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
5987 23:03:06.329880
5988 23:03:06.329943
5989 23:03:06.333128 [Calibration Summary] 1866 Mbps
5990 23:03:06.336518 CH 0, Rank 0
5991 23:03:06.336595 SW Impedance : PASS
5992 23:03:06.339554 DUTY Scan : NO K
5993 23:03:06.342832 ZQ Calibration : PASS
5994 23:03:06.342915 Jitter Meter : NO K
5995 23:03:06.345904 CBT Training : PASS
5996 23:03:06.349519 Write leveling : PASS
5997 23:03:06.349610 RX DQS gating : PASS
5998 23:03:06.352366 RX DQ/DQS(RDDQC) : PASS
5999 23:03:06.352438 TX DQ/DQS : PASS
6000 23:03:06.355738 RX DATLAT : PASS
6001 23:03:06.359453 RX DQ/DQS(Engine): PASS
6002 23:03:06.359527 TX OE : NO K
6003 23:03:06.362519 All Pass.
6004 23:03:06.362586
6005 23:03:06.362645 CH 0, Rank 1
6006 23:03:06.365503 SW Impedance : PASS
6007 23:03:06.365569 DUTY Scan : NO K
6008 23:03:06.369418 ZQ Calibration : PASS
6009 23:03:06.372625 Jitter Meter : NO K
6010 23:03:06.372691 CBT Training : PASS
6011 23:03:06.375453 Write leveling : PASS
6012 23:03:06.378822 RX DQS gating : PASS
6013 23:03:06.378889 RX DQ/DQS(RDDQC) : PASS
6014 23:03:06.382010 TX DQ/DQS : PASS
6015 23:03:06.385261 RX DATLAT : PASS
6016 23:03:06.385356 RX DQ/DQS(Engine): PASS
6017 23:03:06.388912 TX OE : NO K
6018 23:03:06.388980 All Pass.
6019 23:03:06.389039
6020 23:03:06.392199 CH 1, Rank 0
6021 23:03:06.392268 SW Impedance : PASS
6022 23:03:06.395404 DUTY Scan : NO K
6023 23:03:06.398687 ZQ Calibration : PASS
6024 23:03:06.398757 Jitter Meter : NO K
6025 23:03:06.402332 CBT Training : PASS
6026 23:03:06.405396 Write leveling : PASS
6027 23:03:06.405471 RX DQS gating : PASS
6028 23:03:06.408752 RX DQ/DQS(RDDQC) : PASS
6029 23:03:06.411513 TX DQ/DQS : PASS
6030 23:03:06.411588 RX DATLAT : PASS
6031 23:03:06.415115 RX DQ/DQS(Engine): PASS
6032 23:03:06.418340 TX OE : NO K
6033 23:03:06.418411 All Pass.
6034 23:03:06.418471
6035 23:03:06.418531 CH 1, Rank 1
6036 23:03:06.421656 SW Impedance : PASS
6037 23:03:06.425166 DUTY Scan : NO K
6038 23:03:06.425263 ZQ Calibration : PASS
6039 23:03:06.428296 Jitter Meter : NO K
6040 23:03:06.431248 CBT Training : PASS
6041 23:03:06.431347 Write leveling : PASS
6042 23:03:06.434799 RX DQS gating : PASS
6043 23:03:06.437832 RX DQ/DQS(RDDQC) : PASS
6044 23:03:06.437906 TX DQ/DQS : PASS
6045 23:03:06.441810 RX DATLAT : PASS
6046 23:03:06.444441 RX DQ/DQS(Engine): PASS
6047 23:03:06.444543 TX OE : NO K
6048 23:03:06.444632 All Pass.
6049 23:03:06.447725
6050 23:03:06.447799 DramC Write-DBI off
6051 23:03:06.450878 PER_BANK_REFRESH: Hybrid Mode
6052 23:03:06.450947 TX_TRACKING: ON
6053 23:03:06.461005 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0
6054 23:03:06.464217 [FAST_K] Save calibration result to emmc
6055 23:03:06.467499 dramc_set_vcore_voltage set vcore to 650000
6056 23:03:06.471129 Read voltage for 400, 6
6057 23:03:06.471201 Vio18 = 0
6058 23:03:06.474152 Vcore = 650000
6059 23:03:06.474260 Vdram = 0
6060 23:03:06.474321 Vddq = 0
6061 23:03:06.474378 Vmddr = 0
6062 23:03:06.480863 [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0
6063 23:03:06.487502 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
6064 23:03:06.487574 MEM_TYPE=3, freq_sel=20
6065 23:03:06.490476 sv_algorithm_assistance_LP4_800
6066 23:03:06.493887 ============ PULL DRAM RESETB DOWN ============
6067 23:03:06.500547 ========== PULL DRAM RESETB DOWN end =========
6068 23:03:06.503928 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6069 23:03:06.507042 ===================================
6070 23:03:06.510349 LPDDR4 DRAM CONFIGURATION
6071 23:03:06.513628 ===================================
6072 23:03:06.513703 EX_ROW_EN[0] = 0x0
6073 23:03:06.517059 EX_ROW_EN[1] = 0x0
6074 23:03:06.520379 LP4Y_EN = 0x0
6075 23:03:06.520450 WORK_FSP = 0x0
6076 23:03:06.523715 WL = 0x2
6077 23:03:06.523782 RL = 0x2
6078 23:03:06.526769 BL = 0x2
6079 23:03:06.526836 RPST = 0x0
6080 23:03:06.530126 RD_PRE = 0x0
6081 23:03:06.530222 WR_PRE = 0x1
6082 23:03:06.533287 WR_PST = 0x0
6083 23:03:06.533389 DBI_WR = 0x0
6084 23:03:06.536915 DBI_RD = 0x0
6085 23:03:06.536986 OTF = 0x1
6086 23:03:06.540087 ===================================
6087 23:03:06.543343 ===================================
6088 23:03:06.546654 ANA top config
6089 23:03:06.550249 ===================================
6090 23:03:06.550335 DLL_ASYNC_EN = 0
6091 23:03:06.553168 ALL_SLAVE_EN = 1
6092 23:03:06.556630 NEW_RANK_MODE = 1
6093 23:03:06.560284 DLL_IDLE_MODE = 1
6094 23:03:06.563279 LP45_APHY_COMB_EN = 1
6095 23:03:06.563353 TX_ODT_DIS = 1
6096 23:03:06.566762 NEW_8X_MODE = 1
6097 23:03:06.569812 ===================================
6098 23:03:06.573196 ===================================
6099 23:03:06.576100 data_rate = 800
6100 23:03:06.579876 CKR = 1
6101 23:03:06.583011 DQ_P2S_RATIO = 4
6102 23:03:06.586109 ===================================
6103 23:03:06.589180 CA_P2S_RATIO = 4
6104 23:03:06.589265 DQ_CA_OPEN = 0
6105 23:03:06.592834 DQ_SEMI_OPEN = 1
6106 23:03:06.595864 CA_SEMI_OPEN = 1
6107 23:03:06.599323 CA_FULL_RATE = 0
6108 23:03:06.602533 DQ_CKDIV4_EN = 0
6109 23:03:06.605995 CA_CKDIV4_EN = 1
6110 23:03:06.609311 CA_PREDIV_EN = 0
6111 23:03:06.609435 PH8_DLY = 0
6112 23:03:06.612250 SEMI_OPEN_CA_PICK_MCK_RATIO= 4
6113 23:03:06.615645 DQ_AAMCK_DIV = 0
6114 23:03:06.619242 CA_AAMCK_DIV = 0
6115 23:03:06.623068 CA_ADMCK_DIV = 4
6116 23:03:06.625521 DQ_TRACK_CA_EN = 0
6117 23:03:06.625594 CA_PICK = 800
6118 23:03:06.628795 CA_MCKIO = 400
6119 23:03:06.632577 MCKIO_SEMI = 400
6120 23:03:06.635913 PLL_FREQ = 3016
6121 23:03:06.638696 DQ_UI_PI_RATIO = 32
6122 23:03:06.642088 CA_UI_PI_RATIO = 32
6123 23:03:06.645564 ===================================
6124 23:03:06.648290 ===================================
6125 23:03:06.651754 memory_type:LPDDR4
6126 23:03:06.651847 GP_NUM : 10
6127 23:03:06.655089 SRAM_EN : 1
6128 23:03:06.658058 MD32_EN : 0
6129 23:03:06.661755 ===================================
6130 23:03:06.661853 [ANA_INIT] >>>>>>>>>>>>>>
6131 23:03:06.664746 <<<<<< [CONFIGURE PHASE]: ANA_TX
6132 23:03:06.667906 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
6133 23:03:06.671383 ===================================
6134 23:03:06.674939 data_rate = 800,PCW = 0X7400
6135 23:03:06.677904 ===================================
6136 23:03:06.681290 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
6137 23:03:06.688386 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6138 23:03:06.697929 WARN: tr->DQ_AAMCK_DIV= 0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6139 23:03:06.701569 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
6140 23:03:06.707639 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
6141 23:03:06.711263 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
6142 23:03:06.711342 [ANA_INIT] flow start
6143 23:03:06.714308 [ANA_INIT] PLL >>>>>>>>
6144 23:03:06.717907 [ANA_INIT] PLL <<<<<<<<
6145 23:03:06.717981 [ANA_INIT] MIDPI >>>>>>>>
6146 23:03:06.721110 [ANA_INIT] MIDPI <<<<<<<<
6147 23:03:06.724548 [ANA_INIT] DLL >>>>>>>>
6148 23:03:06.724626 [ANA_INIT] flow end
6149 23:03:06.728089 ============ LP4 DIFF to SE enter ============
6150 23:03:06.734322 ============ LP4 DIFF to SE exit ============
6151 23:03:06.734428 [ANA_INIT] <<<<<<<<<<<<<
6152 23:03:06.737589 [Flow] Enable top DCM control >>>>>
6153 23:03:06.741034 [Flow] Enable top DCM control <<<<<
6154 23:03:06.744384 Enable DLL master slave shuffle
6155 23:03:06.750912 ==============================================================
6156 23:03:06.753879 Gating Mode config
6157 23:03:06.757142 ==============================================================
6158 23:03:06.761115 Config description:
6159 23:03:06.770868 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
6160 23:03:06.777617 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
6161 23:03:06.780876 SELPH_MODE 0: By rank 1: By Phase
6162 23:03:06.787460 ==============================================================
6163 23:03:06.790517 GAT_TRACK_EN = 0
6164 23:03:06.793889 RX_GATING_MODE = 2
6165 23:03:06.797124 RX_GATING_TRACK_MODE = 2
6166 23:03:06.797195 SELPH_MODE = 1
6167 23:03:06.800330 PICG_EARLY_EN = 1
6168 23:03:06.803969 VALID_LAT_VALUE = 1
6169 23:03:06.810461 ==============================================================
6170 23:03:06.813657 Enter into Gating configuration >>>>
6171 23:03:06.817046 Exit from Gating configuration <<<<
6172 23:03:06.820237 Enter into DVFS_PRE_config >>>>>
6173 23:03:06.830029 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
6174 23:03:06.833036 Exit from DVFS_PRE_config <<<<<
6175 23:03:06.836918 Enter into PICG configuration >>>>
6176 23:03:06.840118 Exit from PICG configuration <<<<
6177 23:03:06.843467 [RX_INPUT] configuration >>>>>
6178 23:03:06.846291 [RX_INPUT] configuration <<<<<
6179 23:03:06.849879 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
6180 23:03:06.856642 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
6181 23:03:06.863135 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
6182 23:03:06.869260 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
6183 23:03:06.876025 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
6184 23:03:06.882623 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
6185 23:03:06.885939 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
6186 23:03:06.889345 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
6187 23:03:06.892756 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
6188 23:03:06.898945 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
6189 23:03:06.902300 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
6190 23:03:06.905549 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6191 23:03:06.909033 ===================================
6192 23:03:06.912534 LPDDR4 DRAM CONFIGURATION
6193 23:03:06.915588 ===================================
6194 23:03:06.918557 EX_ROW_EN[0] = 0x0
6195 23:03:06.918657 EX_ROW_EN[1] = 0x0
6196 23:03:06.922140 LP4Y_EN = 0x0
6197 23:03:06.922215 WORK_FSP = 0x0
6198 23:03:06.925435 WL = 0x2
6199 23:03:06.925522 RL = 0x2
6200 23:03:06.928649 BL = 0x2
6201 23:03:06.928722 RPST = 0x0
6202 23:03:06.931714 RD_PRE = 0x0
6203 23:03:06.931792 WR_PRE = 0x1
6204 23:03:06.935126 WR_PST = 0x0
6205 23:03:06.935203 DBI_WR = 0x0
6206 23:03:06.938597 DBI_RD = 0x0
6207 23:03:06.938691 OTF = 0x1
6208 23:03:06.941948 ===================================
6209 23:03:06.948551 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
6210 23:03:06.951826 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
6211 23:03:06.955040 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6212 23:03:06.958767 ===================================
6213 23:03:06.961681 LPDDR4 DRAM CONFIGURATION
6214 23:03:06.965115 ===================================
6215 23:03:06.965184 EX_ROW_EN[0] = 0x10
6216 23:03:06.968525 EX_ROW_EN[1] = 0x0
6217 23:03:06.971730 LP4Y_EN = 0x0
6218 23:03:06.971821 WORK_FSP = 0x0
6219 23:03:06.975236 WL = 0x2
6220 23:03:06.975323 RL = 0x2
6221 23:03:06.978123 BL = 0x2
6222 23:03:06.978197 RPST = 0x0
6223 23:03:06.981579 RD_PRE = 0x0
6224 23:03:06.981653 WR_PRE = 0x1
6225 23:03:06.984901 WR_PST = 0x0
6226 23:03:06.984980 DBI_WR = 0x0
6227 23:03:06.988564 DBI_RD = 0x0
6228 23:03:06.988653 OTF = 0x1
6229 23:03:06.992047 ===================================
6230 23:03:06.998138 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
6231 23:03:07.002361 nWR fixed to 30
6232 23:03:07.006049 [ModeRegInit_LP4] CH0 RK0
6233 23:03:07.006137 [ModeRegInit_LP4] CH0 RK1
6234 23:03:07.009236 [ModeRegInit_LP4] CH1 RK0
6235 23:03:07.012610 [ModeRegInit_LP4] CH1 RK1
6236 23:03:07.012685 match AC timing 19
6237 23:03:07.019273 dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 1
6238 23:03:07.022851 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
6239 23:03:07.025923 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
6240 23:03:07.032242 [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17
6241 23:03:07.035861 [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)
6242 23:03:07.035943 ==
6243 23:03:07.038781 Dram Type= 6, Freq= 0, CH_0, rank 0
6244 23:03:07.042418 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6245 23:03:07.042500 ==
6246 23:03:07.048741 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6247 23:03:07.055422 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
6248 23:03:07.058783 [CA 0] Center 36 (8~64) winsize 57
6249 23:03:07.061880 [CA 1] Center 36 (8~64) winsize 57
6250 23:03:07.065204 [CA 2] Center 36 (8~64) winsize 57
6251 23:03:07.068582 [CA 3] Center 36 (8~64) winsize 57
6252 23:03:07.071857 [CA 4] Center 36 (8~64) winsize 57
6253 23:03:07.075055 [CA 5] Center 36 (8~64) winsize 57
6254 23:03:07.075132
6255 23:03:07.078521 [CmdBusTrainingLP45] Vref(ca) range 1: 33
6256 23:03:07.078593
6257 23:03:07.082066 [CATrainingPosCal] consider 1 rank data
6258 23:03:07.085291 u2DelayCellTimex100 = 270/100 ps
6259 23:03:07.088863 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6260 23:03:07.091755 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6261 23:03:07.095130 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6262 23:03:07.098391 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6263 23:03:07.101546 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6264 23:03:07.105081 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6265 23:03:07.105158
6266 23:03:07.108383 CA PerBit enable=1, Macro0, CA PI delay=36
6267 23:03:07.111287
6268 23:03:07.111368 [CBTSetCACLKResult] CA Dly = 36
6269 23:03:07.114769 CS Dly: 1 (0~32)
6270 23:03:07.114848 ==
6271 23:03:07.118034 Dram Type= 6, Freq= 0, CH_0, rank 1
6272 23:03:07.121397 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6273 23:03:07.121521 ==
6274 23:03:07.128259 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6275 23:03:07.134642 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6276 23:03:07.137994 [CA 0] Center 36 (8~64) winsize 57
6277 23:03:07.141559 [CA 1] Center 36 (8~64) winsize 57
6278 23:03:07.141660 [CA 2] Center 36 (8~64) winsize 57
6279 23:03:07.145097 [CA 3] Center 36 (8~64) winsize 57
6280 23:03:07.147995 [CA 4] Center 36 (8~64) winsize 57
6281 23:03:07.151728 [CA 5] Center 36 (8~64) winsize 57
6282 23:03:07.151802
6283 23:03:07.157702 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6284 23:03:07.157778
6285 23:03:07.161560 [CATrainingPosCal] consider 2 rank data
6286 23:03:07.161631 u2DelayCellTimex100 = 270/100 ps
6287 23:03:07.167828 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6288 23:03:07.171277 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6289 23:03:07.174152 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6290 23:03:07.177632 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6291 23:03:07.180843 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6292 23:03:07.184459 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6293 23:03:07.184535
6294 23:03:07.187774 CA PerBit enable=1, Macro0, CA PI delay=36
6295 23:03:07.187846
6296 23:03:07.191421 [CBTSetCACLKResult] CA Dly = 36
6297 23:03:07.194826 CS Dly: 1 (0~32)
6298 23:03:07.194900
6299 23:03:07.197643 ----->DramcWriteLeveling(PI) begin...
6300 23:03:07.197717 ==
6301 23:03:07.200934 Dram Type= 6, Freq= 0, CH_0, rank 0
6302 23:03:07.204545 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6303 23:03:07.204618 ==
6304 23:03:07.207243 Write leveling (Byte 0): 40 => 8
6305 23:03:07.210925 Write leveling (Byte 1): 32 => 0
6306 23:03:07.214158 DramcWriteLeveling(PI) end<-----
6307 23:03:07.214232
6308 23:03:07.214293 ==
6309 23:03:07.217558 Dram Type= 6, Freq= 0, CH_0, rank 0
6310 23:03:07.220483 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6311 23:03:07.220559 ==
6312 23:03:07.223934 [Gating] SW mode calibration
6313 23:03:07.230519 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6314 23:03:07.236805 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6315 23:03:07.240507 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6316 23:03:07.246896 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6317 23:03:07.250197 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6318 23:03:07.253539 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6319 23:03:07.259814 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6320 23:03:07.263771 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6321 23:03:07.267096 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6322 23:03:07.273025 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6323 23:03:07.276752 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6324 23:03:07.279639 Total UI for P1: 0, mck2ui 16
6325 23:03:07.283257 best dqsien dly found for B0: ( 0, 14, 24)
6326 23:03:07.286143 Total UI for P1: 0, mck2ui 16
6327 23:03:07.289667 best dqsien dly found for B1: ( 0, 14, 24)
6328 23:03:07.293399 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6329 23:03:07.296453 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6330 23:03:07.296529
6331 23:03:07.300038 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6332 23:03:07.302821 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6333 23:03:07.306006 [Gating] SW calibration Done
6334 23:03:07.306093 ==
6335 23:03:07.309537 Dram Type= 6, Freq= 0, CH_0, rank 0
6336 23:03:07.312610 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6337 23:03:07.315953 ==
6338 23:03:07.316028 RX Vref Scan: 0
6339 23:03:07.316098
6340 23:03:07.319463 RX Vref 0 -> 0, step: 1
6341 23:03:07.319556
6342 23:03:07.322754 RX Delay -410 -> 252, step: 16
6343 23:03:07.326318 iDelay=230, Bit 0, Center -35 (-282 ~ 213) 496
6344 23:03:07.329737 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6345 23:03:07.332344 iDelay=230, Bit 2, Center -35 (-282 ~ 213) 496
6346 23:03:07.339245 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6347 23:03:07.343434 iDelay=230, Bit 4, Center -27 (-282 ~ 229) 512
6348 23:03:07.346013 iDelay=230, Bit 5, Center -43 (-298 ~ 213) 512
6349 23:03:07.349273 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6350 23:03:07.356153 iDelay=230, Bit 7, Center -27 (-282 ~ 229) 512
6351 23:03:07.359579 iDelay=230, Bit 8, Center -59 (-314 ~ 197) 512
6352 23:03:07.362459 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6353 23:03:07.365631 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6354 23:03:07.372054 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6355 23:03:07.375541 iDelay=230, Bit 12, Center -43 (-298 ~ 213) 512
6356 23:03:07.378823 iDelay=230, Bit 13, Center -43 (-298 ~ 213) 512
6357 23:03:07.385769 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6358 23:03:07.388597 iDelay=230, Bit 15, Center -43 (-298 ~ 213) 512
6359 23:03:07.388676 ==
6360 23:03:07.391769 Dram Type= 6, Freq= 0, CH_0, rank 0
6361 23:03:07.395042 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6362 23:03:07.395135 ==
6363 23:03:07.398205 DQS Delay:
6364 23:03:07.398311 DQS0 = 43, DQS1 = 59
6365 23:03:07.401968 DQM Delay:
6366 23:03:07.402050 DQM0 = 10, DQM1 = 12
6367 23:03:07.402115 DQ Delay:
6368 23:03:07.404902 DQ0 =8, DQ1 =8, DQ2 =8, DQ3 =8
6369 23:03:07.408428 DQ4 =16, DQ5 =0, DQ6 =16, DQ7 =16
6370 23:03:07.411556 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6371 23:03:07.414991 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =16
6372 23:03:07.415072
6373 23:03:07.415137
6374 23:03:07.415195 ==
6375 23:03:07.418172 Dram Type= 6, Freq= 0, CH_0, rank 0
6376 23:03:07.424761 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6377 23:03:07.424843 ==
6378 23:03:07.424908
6379 23:03:07.424968
6380 23:03:07.425025 TX Vref Scan disable
6381 23:03:07.427989 == TX Byte 0 ==
6382 23:03:07.431359 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6383 23:03:07.434527 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6384 23:03:07.438006 == TX Byte 1 ==
6385 23:03:07.441156 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6386 23:03:07.444335 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6387 23:03:07.447605 ==
6388 23:03:07.451087 Dram Type= 6, Freq= 0, CH_0, rank 0
6389 23:03:07.454688 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6390 23:03:07.454803 ==
6391 23:03:07.454910
6392 23:03:07.455023
6393 23:03:07.457847 TX Vref Scan disable
6394 23:03:07.457927 == TX Byte 0 ==
6395 23:03:07.460933 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6396 23:03:07.467838 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6397 23:03:07.467917 == TX Byte 1 ==
6398 23:03:07.471295 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6399 23:03:07.477928 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6400 23:03:07.478005
6401 23:03:07.478069 [DATLAT]
6402 23:03:07.478155 Freq=400, CH0 RK0
6403 23:03:07.478217
6404 23:03:07.480611 DATLAT Default: 0xf
6405 23:03:07.484011 0, 0xFFFF, sum = 0
6406 23:03:07.484095 1, 0xFFFF, sum = 0
6407 23:03:07.487639 2, 0xFFFF, sum = 0
6408 23:03:07.487720 3, 0xFFFF, sum = 0
6409 23:03:07.490667 4, 0xFFFF, sum = 0
6410 23:03:07.490771 5, 0xFFFF, sum = 0
6411 23:03:07.494089 6, 0xFFFF, sum = 0
6412 23:03:07.494195 7, 0xFFFF, sum = 0
6413 23:03:07.497461 8, 0xFFFF, sum = 0
6414 23:03:07.497531 9, 0xFFFF, sum = 0
6415 23:03:07.500325 10, 0xFFFF, sum = 0
6416 23:03:07.500406 11, 0xFFFF, sum = 0
6417 23:03:07.503722 12, 0xFFFF, sum = 0
6418 23:03:07.503804 13, 0x0, sum = 1
6419 23:03:07.507097 14, 0x0, sum = 2
6420 23:03:07.507202 15, 0x0, sum = 3
6421 23:03:07.510402 16, 0x0, sum = 4
6422 23:03:07.510491 best_step = 14
6423 23:03:07.510588
6424 23:03:07.510696 ==
6425 23:03:07.513951 Dram Type= 6, Freq= 0, CH_0, rank 0
6426 23:03:07.520575 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6427 23:03:07.520655 ==
6428 23:03:07.520744 RX Vref Scan: 1
6429 23:03:07.520826
6430 23:03:07.523505 RX Vref 0 -> 0, step: 1
6431 23:03:07.523604
6432 23:03:07.526676 RX Delay -359 -> 252, step: 8
6433 23:03:07.526783
6434 23:03:07.530371 Set Vref, RX VrefLevel [Byte0]: 61
6435 23:03:07.533663 [Byte1]: 48
6436 23:03:07.533786
6437 23:03:07.536491 Final RX Vref Byte 0 = 61 to rank0
6438 23:03:07.539797 Final RX Vref Byte 1 = 48 to rank0
6439 23:03:07.543138 Final RX Vref Byte 0 = 61 to rank1
6440 23:03:07.546850 Final RX Vref Byte 1 = 48 to rank1==
6441 23:03:07.549693 Dram Type= 6, Freq= 0, CH_0, rank 0
6442 23:03:07.556259 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6443 23:03:07.556343 ==
6444 23:03:07.556407 DQS Delay:
6445 23:03:07.559582 DQS0 = 48, DQS1 = 60
6446 23:03:07.559657 DQM Delay:
6447 23:03:07.559729 DQM0 = 12, DQM1 = 12
6448 23:03:07.563259 DQ Delay:
6449 23:03:07.566377 DQ0 =12, DQ1 =16, DQ2 =8, DQ3 =8
6450 23:03:07.569964 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =20
6451 23:03:07.570046 DQ8 =4, DQ9 =0, DQ10 =12, DQ11 =4
6452 23:03:07.576111 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =20
6453 23:03:07.576190
6454 23:03:07.576264
6455 23:03:07.582894 [DQSOSCAuto] RK0, (LSB)MR18= 0xc587, (MSB)MR19= 0xc0c, tDQSOscB0 = 392 ps tDQSOscB1 = 385 ps
6456 23:03:07.585787 CH0 RK0: MR19=C0C, MR18=C587
6457 23:03:07.592363 CH0_RK0: MR19=0xC0C, MR18=0xC587, DQSOSC=385, MR23=63, INC=398, DEC=265
6458 23:03:07.592445 ==
6459 23:03:07.595706 Dram Type= 6, Freq= 0, CH_0, rank 1
6460 23:03:07.599144 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6461 23:03:07.599226 ==
6462 23:03:07.602093 [Gating] SW mode calibration
6463 23:03:07.608910 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6464 23:03:07.615542 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6465 23:03:07.618617 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6466 23:03:07.622272 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6467 23:03:07.628728 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6468 23:03:07.631905 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6469 23:03:07.635273 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6470 23:03:07.641647 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6471 23:03:07.644949 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6472 23:03:07.648490 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6473 23:03:07.655175 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6474 23:03:07.658510 Total UI for P1: 0, mck2ui 16
6475 23:03:07.661909 best dqsien dly found for B0: ( 0, 14, 24)
6476 23:03:07.665161 Total UI for P1: 0, mck2ui 16
6477 23:03:07.668516 best dqsien dly found for B1: ( 0, 14, 24)
6478 23:03:07.671189 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6479 23:03:07.675183 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6480 23:03:07.675264
6481 23:03:07.678362 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6482 23:03:07.681644 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6483 23:03:07.684785 [Gating] SW calibration Done
6484 23:03:07.684914 ==
6485 23:03:07.688199 Dram Type= 6, Freq= 0, CH_0, rank 1
6486 23:03:07.691095 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6487 23:03:07.691177 ==
6488 23:03:07.695114 RX Vref Scan: 0
6489 23:03:07.695195
6490 23:03:07.697849 RX Vref 0 -> 0, step: 1
6491 23:03:07.697932
6492 23:03:07.698001 RX Delay -410 -> 252, step: 16
6493 23:03:07.704688 iDelay=230, Bit 0, Center -35 (-282 ~ 213) 496
6494 23:03:07.708006 iDelay=230, Bit 1, Center -27 (-282 ~ 229) 512
6495 23:03:07.711308 iDelay=230, Bit 2, Center -35 (-282 ~ 213) 496
6496 23:03:07.714986 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6497 23:03:07.721247 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6498 23:03:07.724637 iDelay=230, Bit 5, Center -43 (-298 ~ 213) 512
6499 23:03:07.727892 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6500 23:03:07.734722 iDelay=230, Bit 7, Center -27 (-282 ~ 229) 512
6501 23:03:07.737628 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6502 23:03:07.740846 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6503 23:03:07.744163 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6504 23:03:07.751073 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6505 23:03:07.754528 iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496
6506 23:03:07.757311 iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496
6507 23:03:07.760495 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6508 23:03:07.767494 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6509 23:03:07.767575 ==
6510 23:03:07.770418 Dram Type= 6, Freq= 0, CH_0, rank 1
6511 23:03:07.773878 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6512 23:03:07.773986 ==
6513 23:03:07.776983 DQS Delay:
6514 23:03:07.777108 DQS0 = 43, DQS1 = 59
6515 23:03:07.777188 DQM Delay:
6516 23:03:07.780636 DQM0 = 10, DQM1 = 16
6517 23:03:07.780711 DQ Delay:
6518 23:03:07.784049 DQ0 =8, DQ1 =16, DQ2 =8, DQ3 =8
6519 23:03:07.787229 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6520 23:03:07.790428 DQ8 =8, DQ9 =0, DQ10 =16, DQ11 =8
6521 23:03:07.793782 DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =24
6522 23:03:07.793885
6523 23:03:07.793953
6524 23:03:07.794014 ==
6525 23:03:07.797191 Dram Type= 6, Freq= 0, CH_0, rank 1
6526 23:03:07.801004 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6527 23:03:07.801100 ==
6528 23:03:07.803913
6529 23:03:07.803985
6530 23:03:07.804048 TX Vref Scan disable
6531 23:03:07.806859 == TX Byte 0 ==
6532 23:03:07.810538 Update DQ dly =582 (4 ,2, 6) DQ OEN =(3 ,3)
6533 23:03:07.814137 Update DQM dly =582 (4 ,2, 6) DQM OEN =(3 ,3)
6534 23:03:07.817512 == TX Byte 1 ==
6535 23:03:07.820090 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6536 23:03:07.823757 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6537 23:03:07.823832 ==
6538 23:03:07.827070 Dram Type= 6, Freq= 0, CH_0, rank 1
6539 23:03:07.829948 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6540 23:03:07.833262 ==
6541 23:03:07.833343
6542 23:03:07.833416
6543 23:03:07.833484 TX Vref Scan disable
6544 23:03:07.837018 == TX Byte 0 ==
6545 23:03:07.840220 Update DQ dly =582 (4 ,2, 6) DQ OEN =(3 ,3)
6546 23:03:07.843271 Update DQM dly =582 (4 ,2, 6) DQM OEN =(3 ,3)
6547 23:03:07.846540 == TX Byte 1 ==
6548 23:03:07.849791 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6549 23:03:07.853161 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6550 23:03:07.853244
6551 23:03:07.856560 [DATLAT]
6552 23:03:07.856643 Freq=400, CH0 RK1
6553 23:03:07.856709
6554 23:03:07.859789 DATLAT Default: 0xe
6555 23:03:07.859873 0, 0xFFFF, sum = 0
6556 23:03:07.863352 1, 0xFFFF, sum = 0
6557 23:03:07.863436 2, 0xFFFF, sum = 0
6558 23:03:07.866550 3, 0xFFFF, sum = 0
6559 23:03:07.866661 4, 0xFFFF, sum = 0
6560 23:03:07.869725 5, 0xFFFF, sum = 0
6561 23:03:07.869809 6, 0xFFFF, sum = 0
6562 23:03:07.873003 7, 0xFFFF, sum = 0
6563 23:03:07.873086 8, 0xFFFF, sum = 0
6564 23:03:07.876213 9, 0xFFFF, sum = 0
6565 23:03:07.876301 10, 0xFFFF, sum = 0
6566 23:03:07.879655 11, 0xFFFF, sum = 0
6567 23:03:07.883003 12, 0xFFFF, sum = 0
6568 23:03:07.883077 13, 0x0, sum = 1
6569 23:03:07.883139 14, 0x0, sum = 2
6570 23:03:07.885979 15, 0x0, sum = 3
6571 23:03:07.886049 16, 0x0, sum = 4
6572 23:03:07.889296 best_step = 14
6573 23:03:07.889375
6574 23:03:07.889479 ==
6575 23:03:07.892578 Dram Type= 6, Freq= 0, CH_0, rank 1
6576 23:03:07.896014 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6577 23:03:07.896089 ==
6578 23:03:07.899563 RX Vref Scan: 0
6579 23:03:07.899642
6580 23:03:07.899705 RX Vref 0 -> 0, step: 1
6581 23:03:07.903215
6582 23:03:07.903294 RX Delay -359 -> 252, step: 8
6583 23:03:07.910805 iDelay=217, Bit 0, Center -40 (-279 ~ 200) 480
6584 23:03:07.914560 iDelay=217, Bit 1, Center -32 (-271 ~ 208) 480
6585 23:03:07.917345 iDelay=217, Bit 2, Center -40 (-279 ~ 200) 480
6586 23:03:07.924086 iDelay=217, Bit 3, Center -40 (-287 ~ 208) 496
6587 23:03:07.927414 iDelay=217, Bit 4, Center -36 (-279 ~ 208) 488
6588 23:03:07.930945 iDelay=217, Bit 5, Center -44 (-287 ~ 200) 488
6589 23:03:07.934516 iDelay=217, Bit 6, Center -28 (-271 ~ 216) 488
6590 23:03:07.940674 iDelay=217, Bit 7, Center -28 (-271 ~ 216) 488
6591 23:03:07.943689 iDelay=217, Bit 8, Center -52 (-295 ~ 192) 488
6592 23:03:07.947233 iDelay=217, Bit 9, Center -60 (-303 ~ 184) 488
6593 23:03:07.950319 iDelay=217, Bit 10, Center -44 (-287 ~ 200) 488
6594 23:03:07.957251 iDelay=217, Bit 11, Center -52 (-295 ~ 192) 488
6595 23:03:07.960410 iDelay=217, Bit 12, Center -40 (-287 ~ 208) 496
6596 23:03:07.963555 iDelay=217, Bit 13, Center -40 (-287 ~ 208) 496
6597 23:03:07.967252 iDelay=217, Bit 14, Center -36 (-279 ~ 208) 488
6598 23:03:07.974218 iDelay=217, Bit 15, Center -36 (-279 ~ 208) 488
6599 23:03:07.974351 ==
6600 23:03:07.976906 Dram Type= 6, Freq= 0, CH_0, rank 1
6601 23:03:07.980166 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6602 23:03:07.980245 ==
6603 23:03:07.980309 DQS Delay:
6604 23:03:07.983802 DQS0 = 44, DQS1 = 60
6605 23:03:07.983880 DQM Delay:
6606 23:03:07.986731 DQM0 = 8, DQM1 = 15
6607 23:03:07.986802 DQ Delay:
6608 23:03:07.990341 DQ0 =4, DQ1 =12, DQ2 =4, DQ3 =4
6609 23:03:07.993022 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6610 23:03:07.996693 DQ8 =8, DQ9 =0, DQ10 =16, DQ11 =8
6611 23:03:07.999772 DQ12 =20, DQ13 =20, DQ14 =24, DQ15 =24
6612 23:03:07.999854
6613 23:03:07.999919
6614 23:03:08.009790 [DQSOSCAuto] RK1, (LSB)MR18= 0xbb46, (MSB)MR19= 0xc0c, tDQSOscB0 = 401 ps tDQSOscB1 = 386 ps
6615 23:03:08.009874 CH0 RK1: MR19=C0C, MR18=BB46
6616 23:03:08.016391 CH0_RK1: MR19=0xC0C, MR18=0xBB46, DQSOSC=386, MR23=63, INC=396, DEC=264
6617 23:03:08.021934 [RxdqsGatingPostProcess] freq 400
6618 23:03:08.026692 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6619 23:03:08.029706 best DQS0 dly(2T, 0.5T) = (0, 10)
6620 23:03:08.032835 best DQS1 dly(2T, 0.5T) = (0, 10)
6621 23:03:08.035826 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6622 23:03:08.039131 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6623 23:03:08.042738 best DQS0 dly(2T, 0.5T) = (0, 10)
6624 23:03:08.042820 best DQS1 dly(2T, 0.5T) = (0, 10)
6625 23:03:08.045891 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6626 23:03:08.049247 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6627 23:03:08.052461 Pre-setting of DQS Precalculation
6628 23:03:08.059299 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6629 23:03:08.059412 ==
6630 23:03:08.062357 Dram Type= 6, Freq= 0, CH_1, rank 0
6631 23:03:08.065552 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6632 23:03:08.065634 ==
6633 23:03:08.072136 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6634 23:03:08.079064 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
6635 23:03:08.081942 [CA 0] Center 36 (8~64) winsize 57
6636 23:03:08.085530 [CA 1] Center 36 (8~64) winsize 57
6637 23:03:08.088713 [CA 2] Center 36 (8~64) winsize 57
6638 23:03:08.091976 [CA 3] Center 36 (8~64) winsize 57
6639 23:03:08.092058 [CA 4] Center 36 (8~64) winsize 57
6640 23:03:08.095324 [CA 5] Center 36 (8~64) winsize 57
6641 23:03:08.095420
6642 23:03:08.101869 [CmdBusTrainingLP45] Vref(ca) range 1: 33
6643 23:03:08.101951
6644 23:03:08.105304 [CATrainingPosCal] consider 1 rank data
6645 23:03:08.108288 u2DelayCellTimex100 = 270/100 ps
6646 23:03:08.111924 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6647 23:03:08.115014 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6648 23:03:08.118238 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6649 23:03:08.121371 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6650 23:03:08.124935 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6651 23:03:08.128159 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6652 23:03:08.128240
6653 23:03:08.131468 CA PerBit enable=1, Macro0, CA PI delay=36
6654 23:03:08.131552
6655 23:03:08.135089 [CBTSetCACLKResult] CA Dly = 36
6656 23:03:08.138334 CS Dly: 1 (0~32)
6657 23:03:08.138416 ==
6658 23:03:08.141558 Dram Type= 6, Freq= 0, CH_1, rank 1
6659 23:03:08.145090 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6660 23:03:08.145163 ==
6661 23:03:08.151721 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6662 23:03:08.157961 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
6663 23:03:08.161535 [CA 0] Center 36 (8~64) winsize 57
6664 23:03:08.164281 [CA 1] Center 36 (8~64) winsize 57
6665 23:03:08.164362 [CA 2] Center 36 (8~64) winsize 57
6666 23:03:08.168131 [CA 3] Center 36 (8~64) winsize 57
6667 23:03:08.171208 [CA 4] Center 36 (8~64) winsize 57
6668 23:03:08.174432 [CA 5] Center 36 (8~64) winsize 57
6669 23:03:08.174514
6670 23:03:08.178032 [CmdBusTrainingLP45] Vref(ca) range 1: 37
6671 23:03:08.178114
6672 23:03:08.184323 [CATrainingPosCal] consider 2 rank data
6673 23:03:08.184404 u2DelayCellTimex100 = 270/100 ps
6674 23:03:08.191037 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6675 23:03:08.195076 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6676 23:03:08.197576 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6677 23:03:08.200909 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6678 23:03:08.204060 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6679 23:03:08.207420 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6680 23:03:08.207516
6681 23:03:08.210509 CA PerBit enable=1, Macro0, CA PI delay=36
6682 23:03:08.210606
6683 23:03:08.214181 [CBTSetCACLKResult] CA Dly = 36
6684 23:03:08.217285 CS Dly: 1 (0~32)
6685 23:03:08.217369
6686 23:03:08.220451 ----->DramcWriteLeveling(PI) begin...
6687 23:03:08.220533 ==
6688 23:03:08.223696 Dram Type= 6, Freq= 0, CH_1, rank 0
6689 23:03:08.227047 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6690 23:03:08.227128 ==
6691 23:03:08.230680 Write leveling (Byte 0): 40 => 8
6692 23:03:08.233613 Write leveling (Byte 1): 40 => 8
6693 23:03:08.236794 DramcWriteLeveling(PI) end<-----
6694 23:03:08.236872
6695 23:03:08.236937 ==
6696 23:03:08.240337 Dram Type= 6, Freq= 0, CH_1, rank 0
6697 23:03:08.243669 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6698 23:03:08.243800 ==
6699 23:03:08.246723 [Gating] SW mode calibration
6700 23:03:08.253473 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6701 23:03:08.260294 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6702 23:03:08.263319 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6703 23:03:08.270247 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6704 23:03:08.273365 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6705 23:03:08.276526 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6706 23:03:08.283783 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6707 23:03:08.286602 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6708 23:03:08.289638 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6709 23:03:08.296244 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6710 23:03:08.299126 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6711 23:03:08.302352 Total UI for P1: 0, mck2ui 16
6712 23:03:08.306118 best dqsien dly found for B0: ( 0, 14, 24)
6713 23:03:08.309923 Total UI for P1: 0, mck2ui 16
6714 23:03:08.312550 best dqsien dly found for B1: ( 0, 14, 24)
6715 23:03:08.315660 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6716 23:03:08.319005 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6717 23:03:08.319088
6718 23:03:08.322407 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6719 23:03:08.325778 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6720 23:03:08.328808 [Gating] SW calibration Done
6721 23:03:08.328905 ==
6722 23:03:08.332661 Dram Type= 6, Freq= 0, CH_1, rank 0
6723 23:03:08.335394 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6724 23:03:08.338857 ==
6725 23:03:08.338939 RX Vref Scan: 0
6726 23:03:08.339036
6727 23:03:08.342292 RX Vref 0 -> 0, step: 1
6728 23:03:08.342404
6729 23:03:08.346087 RX Delay -410 -> 252, step: 16
6730 23:03:08.348728 iDelay=230, Bit 0, Center -27 (-282 ~ 229) 512
6731 23:03:08.352081 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6732 23:03:08.355561 iDelay=230, Bit 2, Center -43 (-298 ~ 213) 512
6733 23:03:08.362336 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6734 23:03:08.365329 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6735 23:03:08.368636 iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496
6736 23:03:08.375663 iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496
6737 23:03:08.378261 iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496
6738 23:03:08.381564 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6739 23:03:08.384910 iDelay=230, Bit 9, Center -43 (-298 ~ 213) 512
6740 23:03:08.391990 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6741 23:03:08.395461 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6742 23:03:08.398219 iDelay=230, Bit 12, Center -27 (-282 ~ 229) 512
6743 23:03:08.401571 iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512
6744 23:03:08.408284 iDelay=230, Bit 14, Center -27 (-282 ~ 229) 512
6745 23:03:08.411238 iDelay=230, Bit 15, Center -27 (-282 ~ 229) 512
6746 23:03:08.411318 ==
6747 23:03:08.414494 Dram Type= 6, Freq= 0, CH_1, rank 0
6748 23:03:08.418171 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6749 23:03:08.418255 ==
6750 23:03:08.421175 DQS Delay:
6751 23:03:08.421252 DQS0 = 43, DQS1 = 51
6752 23:03:08.424563 DQM Delay:
6753 23:03:08.424640 DQM0 = 12, DQM1 = 14
6754 23:03:08.424721 DQ Delay:
6755 23:03:08.428036 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =8
6756 23:03:08.431545 DQ4 =8, DQ5 =24, DQ6 =24, DQ7 =8
6757 23:03:08.434756 DQ8 =0, DQ9 =8, DQ10 =8, DQ11 =0
6758 23:03:08.438307 DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =24
6759 23:03:08.438396
6760 23:03:08.438479
6761 23:03:08.438558 ==
6762 23:03:08.441396 Dram Type= 6, Freq= 0, CH_1, rank 0
6763 23:03:08.447717 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6764 23:03:08.447795 ==
6765 23:03:08.447881
6766 23:03:08.447958
6767 23:03:08.448033 TX Vref Scan disable
6768 23:03:08.450904 == TX Byte 0 ==
6769 23:03:08.454482 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6770 23:03:08.457580 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6771 23:03:08.461177 == TX Byte 1 ==
6772 23:03:08.463786 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6773 23:03:08.467398 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6774 23:03:08.470399 ==
6775 23:03:08.473560 Dram Type= 6, Freq= 0, CH_1, rank 0
6776 23:03:08.476869 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6777 23:03:08.476976 ==
6778 23:03:08.477070
6779 23:03:08.477160
6780 23:03:08.480804 TX Vref Scan disable
6781 23:03:08.480921 == TX Byte 0 ==
6782 23:03:08.484001 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6783 23:03:08.490187 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6784 23:03:08.490284 == TX Byte 1 ==
6785 23:03:08.493559 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6786 23:03:08.500113 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6787 23:03:08.500193
6788 23:03:08.500287 [DATLAT]
6789 23:03:08.500347 Freq=400, CH1 RK0
6790 23:03:08.500403
6791 23:03:08.503703 DATLAT Default: 0xf
6792 23:03:08.503782 0, 0xFFFF, sum = 0
6793 23:03:08.507013 1, 0xFFFF, sum = 0
6794 23:03:08.510377 2, 0xFFFF, sum = 0
6795 23:03:08.510458 3, 0xFFFF, sum = 0
6796 23:03:08.513271 4, 0xFFFF, sum = 0
6797 23:03:08.513366 5, 0xFFFF, sum = 0
6798 23:03:08.516888 6, 0xFFFF, sum = 0
6799 23:03:08.516969 7, 0xFFFF, sum = 0
6800 23:03:08.520343 8, 0xFFFF, sum = 0
6801 23:03:08.520425 9, 0xFFFF, sum = 0
6802 23:03:08.524026 10, 0xFFFF, sum = 0
6803 23:03:08.524121 11, 0xFFFF, sum = 0
6804 23:03:08.526646 12, 0xFFFF, sum = 0
6805 23:03:08.526741 13, 0x0, sum = 1
6806 23:03:08.529963 14, 0x0, sum = 2
6807 23:03:08.530044 15, 0x0, sum = 3
6808 23:03:08.533595 16, 0x0, sum = 4
6809 23:03:08.533676 best_step = 14
6810 23:03:08.533753
6811 23:03:08.533825 ==
6812 23:03:08.536802 Dram Type= 6, Freq= 0, CH_1, rank 0
6813 23:03:08.539973 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6814 23:03:08.543406 ==
6815 23:03:08.543485 RX Vref Scan: 1
6816 23:03:08.543548
6817 23:03:08.546356 RX Vref 0 -> 0, step: 1
6818 23:03:08.546437
6819 23:03:08.549928 RX Delay -343 -> 252, step: 8
6820 23:03:08.550007
6821 23:03:08.553331 Set Vref, RX VrefLevel [Byte0]: 46
6822 23:03:08.556791 [Byte1]: 60
6823 23:03:08.556871
6824 23:03:08.559745 Final RX Vref Byte 0 = 46 to rank0
6825 23:03:08.563579 Final RX Vref Byte 1 = 60 to rank0
6826 23:03:08.566445 Final RX Vref Byte 0 = 46 to rank1
6827 23:03:08.569937 Final RX Vref Byte 1 = 60 to rank1==
6828 23:03:08.573024 Dram Type= 6, Freq= 0, CH_1, rank 0
6829 23:03:08.576054 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6830 23:03:08.579274 ==
6831 23:03:08.579362 DQS Delay:
6832 23:03:08.579467 DQS0 = 44, DQS1 = 56
6833 23:03:08.582660 DQM Delay:
6834 23:03:08.582732 DQM0 = 8, DQM1 = 12
6835 23:03:08.586342 DQ Delay:
6836 23:03:08.586417 DQ0 =12, DQ1 =4, DQ2 =0, DQ3 =4
6837 23:03:08.589471 DQ4 =8, DQ5 =20, DQ6 =16, DQ7 =4
6838 23:03:08.592927 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =4
6839 23:03:08.596110 DQ12 =20, DQ13 =16, DQ14 =20, DQ15 =24
6840 23:03:08.596223
6841 23:03:08.596318
6842 23:03:08.606122 [DQSOSCAuto] RK0, (LSB)MR18= 0x996f, (MSB)MR19= 0xc0c, tDQSOscB0 = 395 ps tDQSOscB1 = 390 ps
6843 23:03:08.609540 CH1 RK0: MR19=C0C, MR18=996F
6844 23:03:08.612903 CH1_RK0: MR19=0xC0C, MR18=0x996F, DQSOSC=390, MR23=63, INC=388, DEC=258
6845 23:03:08.616128 ==
6846 23:03:08.619139 Dram Type= 6, Freq= 0, CH_1, rank 1
6847 23:03:08.622792 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6848 23:03:08.622874 ==
6849 23:03:08.625675 [Gating] SW mode calibration
6850 23:03:08.632764 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6851 23:03:08.635626 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6852 23:03:08.642467 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6853 23:03:08.645530 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6854 23:03:08.649095 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6855 23:03:08.655311 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6856 23:03:08.658807 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6857 23:03:08.662297 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6858 23:03:08.669186 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6859 23:03:08.671991 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6860 23:03:08.675251 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6861 23:03:08.678648 Total UI for P1: 0, mck2ui 16
6862 23:03:08.682085 best dqsien dly found for B0: ( 0, 14, 24)
6863 23:03:08.685312 Total UI for P1: 0, mck2ui 16
6864 23:03:08.688491 best dqsien dly found for B1: ( 0, 14, 24)
6865 23:03:08.691855 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6866 23:03:08.695017 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6867 23:03:08.698272
6868 23:03:08.701657 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6869 23:03:08.705058 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6870 23:03:08.708438 [Gating] SW calibration Done
6871 23:03:08.708532 ==
6872 23:03:08.712303 Dram Type= 6, Freq= 0, CH_1, rank 1
6873 23:03:08.714896 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6874 23:03:08.714977 ==
6875 23:03:08.715041 RX Vref Scan: 0
6876 23:03:08.718148
6877 23:03:08.718255 RX Vref 0 -> 0, step: 1
6878 23:03:08.718349
6879 23:03:08.721518 RX Delay -410 -> 252, step: 16
6880 23:03:08.724922 iDelay=230, Bit 0, Center -27 (-266 ~ 213) 480
6881 23:03:08.731640 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6882 23:03:08.734866 iDelay=230, Bit 2, Center -51 (-298 ~ 197) 496
6883 23:03:08.738390 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6884 23:03:08.741942 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6885 23:03:08.748231 iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496
6886 23:03:08.751254 iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496
6887 23:03:08.754854 iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496
6888 23:03:08.758156 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6889 23:03:08.764461 iDelay=230, Bit 9, Center -43 (-298 ~ 213) 512
6890 23:03:08.767845 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6891 23:03:08.771005 iDelay=230, Bit 11, Center -43 (-298 ~ 213) 512
6892 23:03:08.774320 iDelay=230, Bit 12, Center -27 (-282 ~ 229) 512
6893 23:03:08.780978 iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512
6894 23:03:08.784480 iDelay=230, Bit 14, Center -27 (-282 ~ 229) 512
6895 23:03:08.787988 iDelay=230, Bit 15, Center -27 (-282 ~ 229) 512
6896 23:03:08.788116 ==
6897 23:03:08.790842 Dram Type= 6, Freq= 0, CH_1, rank 1
6898 23:03:08.797390 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6899 23:03:08.797500 ==
6900 23:03:08.797619 DQS Delay:
6901 23:03:08.800674 DQS0 = 51, DQS1 = 51
6902 23:03:08.800784 DQM Delay:
6903 23:03:08.804375 DQM0 = 19, DQM1 = 15
6904 23:03:08.804459 DQ Delay:
6905 23:03:08.807724 DQ0 =24, DQ1 =16, DQ2 =0, DQ3 =16
6906 23:03:08.810592 DQ4 =16, DQ5 =32, DQ6 =32, DQ7 =16
6907 23:03:08.814252 DQ8 =0, DQ9 =8, DQ10 =8, DQ11 =8
6908 23:03:08.817271 DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =24
6909 23:03:08.817355
6910 23:03:08.817433
6911 23:03:08.817497 ==
6912 23:03:08.820621 Dram Type= 6, Freq= 0, CH_1, rank 1
6913 23:03:08.824190 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6914 23:03:08.824291 ==
6915 23:03:08.824359
6916 23:03:08.824421
6917 23:03:08.827355 TX Vref Scan disable
6918 23:03:08.827438 == TX Byte 0 ==
6919 23:03:08.833954 Update DQ dly =582 (4 ,2, 6) DQ OEN =(3 ,3)
6920 23:03:08.837307 Update DQM dly =582 (4 ,2, 6) DQM OEN =(3 ,3)
6921 23:03:08.837428 == TX Byte 1 ==
6922 23:03:08.843803 Update DQ dly =582 (4 ,2, 6) DQ OEN =(3 ,3)
6923 23:03:08.847278 Update DQM dly =582 (4 ,2, 6) DQM OEN =(3 ,3)
6924 23:03:08.847362 ==
6925 23:03:08.850567 Dram Type= 6, Freq= 0, CH_1, rank 1
6926 23:03:08.853847 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6927 23:03:08.853931 ==
6928 23:03:08.853996
6929 23:03:08.854057
6930 23:03:08.856726 TX Vref Scan disable
6931 23:03:08.856809 == TX Byte 0 ==
6932 23:03:08.863516 Update DQ dly =582 (4 ,2, 6) DQ OEN =(3 ,3)
6933 23:03:08.867103 Update DQM dly =582 (4 ,2, 6) DQM OEN =(3 ,3)
6934 23:03:08.867186 == TX Byte 1 ==
6935 23:03:08.873323 Update DQ dly =582 (4 ,2, 6) DQ OEN =(3 ,3)
6936 23:03:08.876632 Update DQM dly =582 (4 ,2, 6) DQM OEN =(3 ,3)
6937 23:03:08.876715
6938 23:03:08.876781 [DATLAT]
6939 23:03:08.879949 Freq=400, CH1 RK1
6940 23:03:08.880030
6941 23:03:08.880110 DATLAT Default: 0xe
6942 23:03:08.883177 0, 0xFFFF, sum = 0
6943 23:03:08.883260 1, 0xFFFF, sum = 0
6944 23:03:08.886837 2, 0xFFFF, sum = 0
6945 23:03:08.886920 3, 0xFFFF, sum = 0
6946 23:03:08.889930 4, 0xFFFF, sum = 0
6947 23:03:08.890012 5, 0xFFFF, sum = 0
6948 23:03:08.893292 6, 0xFFFF, sum = 0
6949 23:03:08.896759 7, 0xFFFF, sum = 0
6950 23:03:08.896841 8, 0xFFFF, sum = 0
6951 23:03:08.899862 9, 0xFFFF, sum = 0
6952 23:03:08.899944 10, 0xFFFF, sum = 0
6953 23:03:08.903264 11, 0xFFFF, sum = 0
6954 23:03:08.903377 12, 0xFFFF, sum = 0
6955 23:03:08.906112 13, 0x0, sum = 1
6956 23:03:08.906193 14, 0x0, sum = 2
6957 23:03:08.909594 15, 0x0, sum = 3
6958 23:03:08.909676 16, 0x0, sum = 4
6959 23:03:08.913034 best_step = 14
6960 23:03:08.913115
6961 23:03:08.913179 ==
6962 23:03:08.916302 Dram Type= 6, Freq= 0, CH_1, rank 1
6963 23:03:08.919586 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6964 23:03:08.919667 ==
6965 23:03:08.919747 RX Vref Scan: 0
6966 23:03:08.919821
6967 23:03:08.922704 RX Vref 0 -> 0, step: 1
6968 23:03:08.922784
6969 23:03:08.927032 RX Delay -343 -> 252, step: 8
6970 23:03:08.933266 iDelay=217, Bit 0, Center -32 (-271 ~ 208) 480
6971 23:03:08.936581 iDelay=217, Bit 1, Center -40 (-279 ~ 200) 480
6972 23:03:08.939874 iDelay=217, Bit 2, Center -48 (-287 ~ 192) 480
6973 23:03:08.946799 iDelay=217, Bit 3, Center -40 (-279 ~ 200) 480
6974 23:03:08.949886 iDelay=217, Bit 4, Center -36 (-279 ~ 208) 488
6975 23:03:08.953230 iDelay=217, Bit 5, Center -24 (-263 ~ 216) 480
6976 23:03:08.956634 iDelay=217, Bit 6, Center -24 (-263 ~ 216) 480
6977 23:03:08.963166 iDelay=217, Bit 7, Center -36 (-279 ~ 208) 488
6978 23:03:08.966409 iDelay=217, Bit 8, Center -56 (-303 ~ 192) 496
6979 23:03:08.969742 iDelay=217, Bit 9, Center -56 (-303 ~ 192) 496
6980 23:03:08.972624 iDelay=217, Bit 10, Center -44 (-295 ~ 208) 504
6981 23:03:08.979477 iDelay=217, Bit 11, Center -52 (-303 ~ 200) 504
6982 23:03:08.982813 iDelay=217, Bit 12, Center -36 (-287 ~ 216) 504
6983 23:03:08.986107 iDelay=217, Bit 13, Center -36 (-287 ~ 216) 504
6984 23:03:08.989228 iDelay=217, Bit 14, Center -40 (-287 ~ 208) 496
6985 23:03:08.996151 iDelay=217, Bit 15, Center -36 (-287 ~ 216) 504
6986 23:03:08.996232 ==
6987 23:03:08.999206 Dram Type= 6, Freq= 0, CH_1, rank 1
6988 23:03:09.002581 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6989 23:03:09.002663 ==
6990 23:03:09.002728 DQS Delay:
6991 23:03:09.006063 DQS0 = 48, DQS1 = 56
6992 23:03:09.006144 DQM Delay:
6993 23:03:09.008975 DQM0 = 13, DQM1 = 11
6994 23:03:09.009055 DQ Delay:
6995 23:03:09.012371 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =8
6996 23:03:09.015519 DQ4 =12, DQ5 =24, DQ6 =24, DQ7 =12
6997 23:03:09.019187 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =4
6998 23:03:09.022494 DQ12 =20, DQ13 =20, DQ14 =16, DQ15 =20
6999 23:03:09.022576
7000 23:03:09.022640
7001 23:03:09.031980 [DQSOSCAuto] RK1, (LSB)MR18= 0x6757, (MSB)MR19= 0xc0c, tDQSOscB0 = 398 ps tDQSOscB1 = 396 ps
7002 23:03:09.032061 CH1 RK1: MR19=C0C, MR18=6757
7003 23:03:09.038374 CH1_RK1: MR19=0xC0C, MR18=0x6757, DQSOSC=396, MR23=63, INC=376, DEC=251
7004 23:03:09.041809 [RxdqsGatingPostProcess] freq 400
7005 23:03:09.048532 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
7006 23:03:09.051455 best DQS0 dly(2T, 0.5T) = (0, 10)
7007 23:03:09.054999 best DQS1 dly(2T, 0.5T) = (0, 10)
7008 23:03:09.058679 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
7009 23:03:09.061965 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
7010 23:03:09.065323 best DQS0 dly(2T, 0.5T) = (0, 10)
7011 23:03:09.068090 best DQS1 dly(2T, 0.5T) = (0, 10)
7012 23:03:09.071724 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
7013 23:03:09.075182 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
7014 23:03:09.075263 Pre-setting of DQS Precalculation
7015 23:03:09.081678 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
7016 23:03:09.088373 sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6
7017 23:03:09.094860 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
7018 23:03:09.094942
7019 23:03:09.095007
7020 23:03:09.098163 [Calibration Summary] 800 Mbps
7021 23:03:09.101216 CH 0, Rank 0
7022 23:03:09.101296 SW Impedance : PASS
7023 23:03:09.104671 DUTY Scan : NO K
7024 23:03:09.107818 ZQ Calibration : PASS
7025 23:03:09.107899 Jitter Meter : NO K
7026 23:03:09.111196 CBT Training : PASS
7027 23:03:09.114516 Write leveling : PASS
7028 23:03:09.114596 RX DQS gating : PASS
7029 23:03:09.117939 RX DQ/DQS(RDDQC) : PASS
7030 23:03:09.118020 TX DQ/DQS : PASS
7031 23:03:09.121220 RX DATLAT : PASS
7032 23:03:09.124589 RX DQ/DQS(Engine): PASS
7033 23:03:09.124670 TX OE : NO K
7034 23:03:09.128182 All Pass.
7035 23:03:09.128263
7036 23:03:09.128327 CH 0, Rank 1
7037 23:03:09.130892 SW Impedance : PASS
7038 23:03:09.130972 DUTY Scan : NO K
7039 23:03:09.135050 ZQ Calibration : PASS
7040 23:03:09.137550 Jitter Meter : NO K
7041 23:03:09.137660 CBT Training : PASS
7042 23:03:09.141555 Write leveling : NO K
7043 23:03:09.144201 RX DQS gating : PASS
7044 23:03:09.144281 RX DQ/DQS(RDDQC) : PASS
7045 23:03:09.148054 TX DQ/DQS : PASS
7046 23:03:09.150908 RX DATLAT : PASS
7047 23:03:09.150989 RX DQ/DQS(Engine): PASS
7048 23:03:09.154487 TX OE : NO K
7049 23:03:09.154569 All Pass.
7050 23:03:09.154634
7051 23:03:09.157578 CH 1, Rank 0
7052 23:03:09.157659 SW Impedance : PASS
7053 23:03:09.160575 DUTY Scan : NO K
7054 23:03:09.163892 ZQ Calibration : PASS
7055 23:03:09.163973 Jitter Meter : NO K
7056 23:03:09.167639 CBT Training : PASS
7057 23:03:09.170699 Write leveling : PASS
7058 23:03:09.170779 RX DQS gating : PASS
7059 23:03:09.173834 RX DQ/DQS(RDDQC) : PASS
7060 23:03:09.177457 TX DQ/DQS : PASS
7061 23:03:09.177584 RX DATLAT : PASS
7062 23:03:09.180465 RX DQ/DQS(Engine): PASS
7063 23:03:09.184378 TX OE : NO K
7064 23:03:09.184459 All Pass.
7065 23:03:09.184524
7066 23:03:09.184583 CH 1, Rank 1
7067 23:03:09.187063 SW Impedance : PASS
7068 23:03:09.190502 DUTY Scan : NO K
7069 23:03:09.190584 ZQ Calibration : PASS
7070 23:03:09.193606 Jitter Meter : NO K
7071 23:03:09.197075 CBT Training : PASS
7072 23:03:09.197155 Write leveling : NO K
7073 23:03:09.200281 RX DQS gating : PASS
7074 23:03:09.200362 RX DQ/DQS(RDDQC) : PASS
7075 23:03:09.203591 TX DQ/DQS : PASS
7076 23:03:09.206911 RX DATLAT : PASS
7077 23:03:09.206992 RX DQ/DQS(Engine): PASS
7078 23:03:09.210380 TX OE : NO K
7079 23:03:09.210462 All Pass.
7080 23:03:09.210527
7081 23:03:09.213333 DramC Write-DBI off
7082 23:03:09.216684 PER_BANK_REFRESH: Hybrid Mode
7083 23:03:09.216765 TX_TRACKING: ON
7084 23:03:09.226362 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
7085 23:03:09.230054 [FAST_K] Save calibration result to emmc
7086 23:03:09.233267 dramc_set_vcore_voltage set vcore to 725000
7087 23:03:09.236513 Read voltage for 1600, 0
7088 23:03:09.236598 Vio18 = 0
7089 23:03:09.239724 Vcore = 725000
7090 23:03:09.239806 Vdram = 0
7091 23:03:09.239871 Vddq = 0
7092 23:03:09.239931 Vmddr = 0
7093 23:03:09.246444 [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0
7094 23:03:09.252796 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
7095 23:03:09.252878 MEM_TYPE=3, freq_sel=13
7096 23:03:09.256242 sv_algorithm_assistance_LP4_3733
7097 23:03:09.259370 ============ PULL DRAM RESETB DOWN ============
7098 23:03:09.266340 ========== PULL DRAM RESETB DOWN end =========
7099 23:03:09.269819 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7100 23:03:09.272926 ===================================
7101 23:03:09.275808 LPDDR4 DRAM CONFIGURATION
7102 23:03:09.279394 ===================================
7103 23:03:09.279475 EX_ROW_EN[0] = 0x0
7104 23:03:09.282979 EX_ROW_EN[1] = 0x0
7105 23:03:09.286026 LP4Y_EN = 0x0
7106 23:03:09.286108 WORK_FSP = 0x1
7107 23:03:09.289238 WL = 0x5
7108 23:03:09.289318 RL = 0x5
7109 23:03:09.292295 BL = 0x2
7110 23:03:09.292418 RPST = 0x0
7111 23:03:09.295624 RD_PRE = 0x0
7112 23:03:09.295704 WR_PRE = 0x1
7113 23:03:09.299149 WR_PST = 0x1
7114 23:03:09.299232 DBI_WR = 0x0
7115 23:03:09.302438 DBI_RD = 0x0
7116 23:03:09.302542 OTF = 0x1
7117 23:03:09.305578 ===================================
7118 23:03:09.308986 ===================================
7119 23:03:09.312213 ANA top config
7120 23:03:09.316073 ===================================
7121 23:03:09.316149 DLL_ASYNC_EN = 0
7122 23:03:09.319149 ALL_SLAVE_EN = 0
7123 23:03:09.322444 NEW_RANK_MODE = 1
7124 23:03:09.325704 DLL_IDLE_MODE = 1
7125 23:03:09.329311 LP45_APHY_COMB_EN = 1
7126 23:03:09.329395 TX_ODT_DIS = 0
7127 23:03:09.332563 NEW_8X_MODE = 1
7128 23:03:09.335957 ===================================
7129 23:03:09.338797 ===================================
7130 23:03:09.342423 data_rate = 3200
7131 23:03:09.345589 CKR = 1
7132 23:03:09.348707 DQ_P2S_RATIO = 8
7133 23:03:09.352211 ===================================
7134 23:03:09.355611 CA_P2S_RATIO = 8
7135 23:03:09.355724 DQ_CA_OPEN = 0
7136 23:03:09.358946 DQ_SEMI_OPEN = 0
7137 23:03:09.361671 CA_SEMI_OPEN = 0
7138 23:03:09.365295 CA_FULL_RATE = 0
7139 23:03:09.368478 DQ_CKDIV4_EN = 0
7140 23:03:09.371834 CA_CKDIV4_EN = 0
7141 23:03:09.371916 CA_PREDIV_EN = 0
7142 23:03:09.374944 PH8_DLY = 12
7143 23:03:09.378238 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
7144 23:03:09.381677 DQ_AAMCK_DIV = 4
7145 23:03:09.384806 CA_AAMCK_DIV = 4
7146 23:03:09.388654 CA_ADMCK_DIV = 4
7147 23:03:09.388752 DQ_TRACK_CA_EN = 0
7148 23:03:09.391516 CA_PICK = 1600
7149 23:03:09.394793 CA_MCKIO = 1600
7150 23:03:09.398215 MCKIO_SEMI = 0
7151 23:03:09.401802 PLL_FREQ = 3068
7152 23:03:09.404857 DQ_UI_PI_RATIO = 32
7153 23:03:09.408085 CA_UI_PI_RATIO = 0
7154 23:03:09.411395 ===================================
7155 23:03:09.414672 ===================================
7156 23:03:09.414754 memory_type:LPDDR4
7157 23:03:09.418032 GP_NUM : 10
7158 23:03:09.421163 SRAM_EN : 1
7159 23:03:09.421244 MD32_EN : 0
7160 23:03:09.424726 ===================================
7161 23:03:09.428223 [ANA_INIT] >>>>>>>>>>>>>>
7162 23:03:09.431019 <<<<<< [CONFIGURE PHASE]: ANA_TX
7163 23:03:09.434582 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
7164 23:03:09.437838 ===================================
7165 23:03:09.441310 data_rate = 3200,PCW = 0X7600
7166 23:03:09.444323 ===================================
7167 23:03:09.447718 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
7168 23:03:09.451167 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7169 23:03:09.457801 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7170 23:03:09.461247 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
7171 23:03:09.467441 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
7172 23:03:09.470745 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
7173 23:03:09.470826 [ANA_INIT] flow start
7174 23:03:09.474047 [ANA_INIT] PLL >>>>>>>>
7175 23:03:09.477579 [ANA_INIT] PLL <<<<<<<<
7176 23:03:09.477679 [ANA_INIT] MIDPI >>>>>>>>
7177 23:03:09.480630 [ANA_INIT] MIDPI <<<<<<<<
7178 23:03:09.484183 [ANA_INIT] DLL >>>>>>>>
7179 23:03:09.484265 [ANA_INIT] DLL <<<<<<<<
7180 23:03:09.487295 [ANA_INIT] flow end
7181 23:03:09.490918 ============ LP4 DIFF to SE enter ============
7182 23:03:09.494012 ============ LP4 DIFF to SE exit ============
7183 23:03:09.497260 [ANA_INIT] <<<<<<<<<<<<<
7184 23:03:09.500202 [Flow] Enable top DCM control >>>>>
7185 23:03:09.504203 [Flow] Enable top DCM control <<<<<
7186 23:03:09.506795 Enable DLL master slave shuffle
7187 23:03:09.514112 ==============================================================
7188 23:03:09.514225 Gating Mode config
7189 23:03:09.520315 ==============================================================
7190 23:03:09.523325 Config description:
7191 23:03:09.530019 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
7192 23:03:09.536506 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
7193 23:03:09.543479 SELPH_MODE 0: By rank 1: By Phase
7194 23:03:09.550082 ==============================================================
7195 23:03:09.553085 GAT_TRACK_EN = 1
7196 23:03:09.553184 RX_GATING_MODE = 2
7197 23:03:09.556396 RX_GATING_TRACK_MODE = 2
7198 23:03:09.560136 SELPH_MODE = 1
7199 23:03:09.563281 PICG_EARLY_EN = 1
7200 23:03:09.566969 VALID_LAT_VALUE = 1
7201 23:03:09.572968 ==============================================================
7202 23:03:09.576363 Enter into Gating configuration >>>>
7203 23:03:09.579491 Exit from Gating configuration <<<<
7204 23:03:09.582803 Enter into DVFS_PRE_config >>>>>
7205 23:03:09.592766 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
7206 23:03:09.595984 Exit from DVFS_PRE_config <<<<<
7207 23:03:09.599652 Enter into PICG configuration >>>>
7208 23:03:09.602836 Exit from PICG configuration <<<<
7209 23:03:09.605739 [RX_INPUT] configuration >>>>>
7210 23:03:09.608979 [RX_INPUT] configuration <<<<<
7211 23:03:09.612211 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
7212 23:03:09.618841 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
7213 23:03:09.625390 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
7214 23:03:09.632645 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
7215 23:03:09.638855 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
7216 23:03:09.642516 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
7217 23:03:09.648536 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
7218 23:03:09.651919 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
7219 23:03:09.655597 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
7220 23:03:09.658796 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
7221 23:03:09.665008 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
7222 23:03:09.668587 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7223 23:03:09.671583 ===================================
7224 23:03:09.674833 LPDDR4 DRAM CONFIGURATION
7225 23:03:09.678211 ===================================
7226 23:03:09.678288 EX_ROW_EN[0] = 0x0
7227 23:03:09.681574 EX_ROW_EN[1] = 0x0
7228 23:03:09.681648 LP4Y_EN = 0x0
7229 23:03:09.684786 WORK_FSP = 0x1
7230 23:03:09.684865 WL = 0x5
7231 23:03:09.688173 RL = 0x5
7232 23:03:09.688247 BL = 0x2
7233 23:03:09.691610 RPST = 0x0
7234 23:03:09.694513 RD_PRE = 0x0
7235 23:03:09.694591 WR_PRE = 0x1
7236 23:03:09.697824 WR_PST = 0x1
7237 23:03:09.697919 DBI_WR = 0x0
7238 23:03:09.701262 DBI_RD = 0x0
7239 23:03:09.701362 OTF = 0x1
7240 23:03:09.704465 ===================================
7241 23:03:09.707981 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
7242 23:03:09.714466 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
7243 23:03:09.717983 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7244 23:03:09.721145 ===================================
7245 23:03:09.724577 LPDDR4 DRAM CONFIGURATION
7246 23:03:09.727648 ===================================
7247 23:03:09.727754 EX_ROW_EN[0] = 0x10
7248 23:03:09.731070 EX_ROW_EN[1] = 0x0
7249 23:03:09.731146 LP4Y_EN = 0x0
7250 23:03:09.734308 WORK_FSP = 0x1
7251 23:03:09.734384 WL = 0x5
7252 23:03:09.737698 RL = 0x5
7253 23:03:09.741003 BL = 0x2
7254 23:03:09.741086 RPST = 0x0
7255 23:03:09.744097 RD_PRE = 0x0
7256 23:03:09.744192 WR_PRE = 0x1
7257 23:03:09.747531 WR_PST = 0x1
7258 23:03:09.747632 DBI_WR = 0x0
7259 23:03:09.750464 DBI_RD = 0x0
7260 23:03:09.750537 OTF = 0x1
7261 23:03:09.753920 ===================================
7262 23:03:09.760710 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
7263 23:03:09.760812 ==
7264 23:03:09.763743 Dram Type= 6, Freq= 0, CH_0, rank 0
7265 23:03:09.767170 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7266 23:03:09.767247 ==
7267 23:03:09.770666 [Duty_Offset_Calibration]
7268 23:03:09.773903 B0:1 B1:-1 CA:0
7269 23:03:09.774003
7270 23:03:09.777164 [DutyScan_Calibration_Flow] k_type=0
7271 23:03:09.785574
7272 23:03:09.785649 ==CLK 0==
7273 23:03:09.789076 Final CLK duty delay cell = 0
7274 23:03:09.792095 [0] MAX Duty = 5125%(X100), DQS PI = 20
7275 23:03:09.795869 [0] MIN Duty = 4907%(X100), DQS PI = 8
7276 23:03:09.795944 [0] AVG Duty = 5016%(X100)
7277 23:03:09.799330
7278 23:03:09.802478 CH0 CLK Duty spec in!! Max-Min= 218%
7279 23:03:09.805653 [DutyScan_Calibration_Flow] ====Done====
7280 23:03:09.805734
7281 23:03:09.808707 [DutyScan_Calibration_Flow] k_type=1
7282 23:03:09.824671
7283 23:03:09.824758 ==DQS 0 ==
7284 23:03:09.827833 Final DQS duty delay cell = -4
7285 23:03:09.831276 [-4] MAX Duty = 4969%(X100), DQS PI = 18
7286 23:03:09.834913 [-4] MIN Duty = 4844%(X100), DQS PI = 52
7287 23:03:09.838357 [-4] AVG Duty = 4906%(X100)
7288 23:03:09.838442
7289 23:03:09.838518 ==DQS 1 ==
7290 23:03:09.841082 Final DQS duty delay cell = 0
7291 23:03:09.844744 [0] MAX Duty = 5156%(X100), DQS PI = 0
7292 23:03:09.847758 [0] MIN Duty = 5031%(X100), DQS PI = 18
7293 23:03:09.851396 [0] AVG Duty = 5093%(X100)
7294 23:03:09.851501
7295 23:03:09.854867 CH0 DQS 0 Duty spec in!! Max-Min= 125%
7296 23:03:09.854967
7297 23:03:09.857884 CH0 DQS 1 Duty spec in!! Max-Min= 125%
7298 23:03:09.861433 [DutyScan_Calibration_Flow] ====Done====
7299 23:03:09.861548
7300 23:03:09.864408 [DutyScan_Calibration_Flow] k_type=3
7301 23:03:09.882340
7302 23:03:09.882422 ==DQM 0 ==
7303 23:03:09.885614 Final DQM duty delay cell = 0
7304 23:03:09.889275 [0] MAX Duty = 5124%(X100), DQS PI = 24
7305 23:03:09.892069 [0] MIN Duty = 4907%(X100), DQS PI = 8
7306 23:03:09.895413 [0] AVG Duty = 5015%(X100)
7307 23:03:09.895496
7308 23:03:09.895560 ==DQM 1 ==
7309 23:03:09.898602 Final DQM duty delay cell = 0
7310 23:03:09.902156 [0] MAX Duty = 5000%(X100), DQS PI = 6
7311 23:03:09.905357 [0] MIN Duty = 4813%(X100), DQS PI = 18
7312 23:03:09.908617 [0] AVG Duty = 4906%(X100)
7313 23:03:09.908692
7314 23:03:09.912483 CH0 DQM 0 Duty spec in!! Max-Min= 217%
7315 23:03:09.912582
7316 23:03:09.915237 CH0 DQM 1 Duty spec in!! Max-Min= 187%
7317 23:03:09.918964 [DutyScan_Calibration_Flow] ====Done====
7318 23:03:09.919037
7319 23:03:09.921914 [DutyScan_Calibration_Flow] k_type=2
7320 23:03:09.938683
7321 23:03:09.938767 ==DQ 0 ==
7322 23:03:09.941569 Final DQ duty delay cell = -4
7323 23:03:09.945035 [-4] MAX Duty = 5031%(X100), DQS PI = 26
7324 23:03:09.948293 [-4] MIN Duty = 4876%(X100), DQS PI = 52
7325 23:03:09.951725 [-4] AVG Duty = 4953%(X100)
7326 23:03:09.951837
7327 23:03:09.951928 ==DQ 1 ==
7328 23:03:09.955121 Final DQ duty delay cell = 0
7329 23:03:09.958714 [0] MAX Duty = 5125%(X100), DQS PI = 4
7330 23:03:09.961611 [0] MIN Duty = 5000%(X100), DQS PI = 36
7331 23:03:09.964820 [0] AVG Duty = 5062%(X100)
7332 23:03:09.964927
7333 23:03:09.968139 CH0 DQ 0 Duty spec in!! Max-Min= 155%
7334 23:03:09.968238
7335 23:03:09.971861 CH0 DQ 1 Duty spec in!! Max-Min= 125%
7336 23:03:09.974701 [DutyScan_Calibration_Flow] ====Done====
7337 23:03:09.974772 ==
7338 23:03:09.978226 Dram Type= 6, Freq= 0, CH_1, rank 0
7339 23:03:09.981704 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7340 23:03:09.981793 ==
7341 23:03:09.984762 [Duty_Offset_Calibration]
7342 23:03:09.984859 B0:-1 B1:1 CA:2
7343 23:03:09.984947
7344 23:03:09.987852 [DutyScan_Calibration_Flow] k_type=0
7345 23:03:09.999086
7346 23:03:09.999167 ==CLK 0==
7347 23:03:10.002688 Final CLK duty delay cell = 0
7348 23:03:10.005932 [0] MAX Duty = 5187%(X100), DQS PI = 22
7349 23:03:10.009171 [0] MIN Duty = 4969%(X100), DQS PI = 0
7350 23:03:10.009276 [0] AVG Duty = 5078%(X100)
7351 23:03:10.012601
7352 23:03:10.015504 CH1 CLK Duty spec in!! Max-Min= 218%
7353 23:03:10.018793 [DutyScan_Calibration_Flow] ====Done====
7354 23:03:10.018873
7355 23:03:10.022056 [DutyScan_Calibration_Flow] k_type=1
7356 23:03:10.038746
7357 23:03:10.038871 ==DQS 0 ==
7358 23:03:10.042093 Final DQS duty delay cell = 0
7359 23:03:10.045617 [0] MAX Duty = 5156%(X100), DQS PI = 18
7360 23:03:10.048476 [0] MIN Duty = 4907%(X100), DQS PI = 10
7361 23:03:10.051914 [0] AVG Duty = 5031%(X100)
7362 23:03:10.052017
7363 23:03:10.052106 ==DQS 1 ==
7364 23:03:10.055246 Final DQS duty delay cell = 0
7365 23:03:10.058449 [0] MAX Duty = 5093%(X100), DQS PI = 22
7366 23:03:10.062093 [0] MIN Duty = 4969%(X100), DQS PI = 54
7367 23:03:10.065170 [0] AVG Duty = 5031%(X100)
7368 23:03:10.065266
7369 23:03:10.068640 CH1 DQS 0 Duty spec in!! Max-Min= 249%
7370 23:03:10.068748
7371 23:03:10.071618 CH1 DQS 1 Duty spec in!! Max-Min= 124%
7372 23:03:10.074962 [DutyScan_Calibration_Flow] ====Done====
7373 23:03:10.075032
7374 23:03:10.078716 [DutyScan_Calibration_Flow] k_type=3
7375 23:03:10.094751
7376 23:03:10.094856 ==DQM 0 ==
7377 23:03:10.098340 Final DQM duty delay cell = -4
7378 23:03:10.101791 [-4] MAX Duty = 5062%(X100), DQS PI = 34
7379 23:03:10.104713 [-4] MIN Duty = 4782%(X100), DQS PI = 8
7380 23:03:10.108010 [-4] AVG Duty = 4922%(X100)
7381 23:03:10.108113
7382 23:03:10.108203 ==DQM 1 ==
7383 23:03:10.111361 Final DQM duty delay cell = 0
7384 23:03:10.115275 [0] MAX Duty = 5125%(X100), DQS PI = 0
7385 23:03:10.118372 [0] MIN Duty = 4969%(X100), DQS PI = 32
7386 23:03:10.121278 [0] AVG Duty = 5047%(X100)
7387 23:03:10.121381
7388 23:03:10.124961 CH1 DQM 0 Duty spec in!! Max-Min= 280%
7389 23:03:10.125067
7390 23:03:10.127831 CH1 DQM 1 Duty spec in!! Max-Min= 156%
7391 23:03:10.131247 [DutyScan_Calibration_Flow] ====Done====
7392 23:03:10.131319
7393 23:03:10.134620 [DutyScan_Calibration_Flow] k_type=2
7394 23:03:10.152132
7395 23:03:10.152247 ==DQ 0 ==
7396 23:03:10.155290 Final DQ duty delay cell = 0
7397 23:03:10.158504 [0] MAX Duty = 5156%(X100), DQS PI = 28
7398 23:03:10.162539 [0] MIN Duty = 4906%(X100), DQS PI = 10
7399 23:03:10.162636 [0] AVG Duty = 5031%(X100)
7400 23:03:10.165598
7401 23:03:10.165668 ==DQ 1 ==
7402 23:03:10.168851 Final DQ duty delay cell = 0
7403 23:03:10.172065 [0] MAX Duty = 5125%(X100), DQS PI = 10
7404 23:03:10.175347 [0] MIN Duty = 4969%(X100), DQS PI = 56
7405 23:03:10.175417 [0] AVG Duty = 5047%(X100)
7406 23:03:10.175502
7407 23:03:10.181765 CH1 DQ 0 Duty spec in!! Max-Min= 250%
7408 23:03:10.181839
7409 23:03:10.185782 CH1 DQ 1 Duty spec in!! Max-Min= 156%
7410 23:03:10.188497 [DutyScan_Calibration_Flow] ====Done====
7411 23:03:10.191809 nWR fixed to 30
7412 23:03:10.191881 [ModeRegInit_LP4] CH0 RK0
7413 23:03:10.194981 [ModeRegInit_LP4] CH0 RK1
7414 23:03:10.198826 [ModeRegInit_LP4] CH1 RK0
7415 23:03:10.201850 [ModeRegInit_LP4] CH1 RK1
7416 23:03:10.201948 match AC timing 5
7417 23:03:10.208299 dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 1
7418 23:03:10.211597 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
7419 23:03:10.214875 [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14
7420 23:03:10.221602 [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29
7421 23:03:10.224769 [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)
7422 23:03:10.224844 [MiockJmeterHQA]
7423 23:03:10.224908
7424 23:03:10.228235 [DramcMiockJmeter] u1RxGatingPI = 0
7425 23:03:10.231386 0 : 4366, 4137
7426 23:03:10.231473 4 : 4252, 4027
7427 23:03:10.234888 8 : 4363, 4137
7428 23:03:10.234972 12 : 4363, 4138
7429 23:03:10.235039 16 : 4363, 4137
7430 23:03:10.238256 20 : 4252, 4027
7431 23:03:10.238327 24 : 4252, 4026
7432 23:03:10.241736 28 : 4252, 4027
7433 23:03:10.241813 32 : 4252, 4027
7434 23:03:10.244955 36 : 4255, 4029
7435 23:03:10.245032 40 : 4363, 4137
7436 23:03:10.248631 44 : 4252, 4027
7437 23:03:10.248700 48 : 4252, 4027
7438 23:03:10.248760 52 : 4253, 4026
7439 23:03:10.251217 56 : 4255, 4030
7440 23:03:10.251287 60 : 4252, 4027
7441 23:03:10.254560 64 : 4363, 4137
7442 23:03:10.254659 68 : 4363, 4138
7443 23:03:10.258042 72 : 4250, 4027
7444 23:03:10.258129 76 : 4250, 4026
7445 23:03:10.261526 80 : 4253, 4027
7446 23:03:10.261621 84 : 4249, 4027
7447 23:03:10.264520 88 : 4253, 4029
7448 23:03:10.264627 92 : 4360, 767
7449 23:03:10.264719 96 : 4252, 0
7450 23:03:10.268073 100 : 4252, 0
7451 23:03:10.268180 104 : 4361, 0
7452 23:03:10.268272 108 : 4249, 0
7453 23:03:10.271132 112 : 4250, 0
7454 23:03:10.271205 116 : 4249, 0
7455 23:03:10.274544 120 : 4250, 0
7456 23:03:10.274633 124 : 4253, 0
7457 23:03:10.274697 128 : 4250, 0
7458 23:03:10.277598 132 : 4249, 0
7459 23:03:10.277698 136 : 4252, 0
7460 23:03:10.280779 140 : 4250, 0
7461 23:03:10.280879 144 : 4361, 0
7462 23:03:10.280969 148 : 4249, 0
7463 23:03:10.284074 152 : 4361, 0
7464 23:03:10.284178 156 : 4360, 0
7465 23:03:10.287730 160 : 4249, 0
7466 23:03:10.287829 164 : 4250, 0
7467 23:03:10.287919 168 : 4250, 0
7468 23:03:10.290745 172 : 4249, 0
7469 23:03:10.290844 176 : 4250, 0
7470 23:03:10.293872 180 : 4249, 0
7471 23:03:10.293948 184 : 4250, 0
7472 23:03:10.294010 188 : 4252, 0
7473 23:03:10.297473 192 : 4360, 0
7474 23:03:10.297544 196 : 4360, 0
7475 23:03:10.297611 200 : 4363, 0
7476 23:03:10.300571 204 : 4250, 0
7477 23:03:10.300673 208 : 4250, 0
7478 23:03:10.304913 212 : 4250, 0
7479 23:03:10.304986 216 : 4250, 0
7480 23:03:10.305049 220 : 4250, 0
7481 23:03:10.307457 224 : 4250, 491
7482 23:03:10.307529 228 : 4250, 3489
7483 23:03:10.310357 232 : 4250, 4026
7484 23:03:10.310425 236 : 4361, 4137
7485 23:03:10.313860 240 : 4250, 4027
7486 23:03:10.313931 244 : 4250, 4027
7487 23:03:10.317491 248 : 4250, 4026
7488 23:03:10.317563 252 : 4252, 4030
7489 23:03:10.320396 256 : 4250, 4027
7490 23:03:10.320472 260 : 4250, 4027
7491 23:03:10.323562 264 : 4360, 4137
7492 23:03:10.323631 268 : 4250, 4027
7493 23:03:10.327014 272 : 4250, 4027
7494 23:03:10.327086 276 : 4361, 4138
7495 23:03:10.327147 280 : 4250, 4027
7496 23:03:10.330571 284 : 4250, 4026
7497 23:03:10.330651 288 : 4363, 4140
7498 23:03:10.333669 292 : 4250, 4026
7499 23:03:10.333776 296 : 4250, 4027
7500 23:03:10.336984 300 : 4250, 4026
7501 23:03:10.337092 304 : 4253, 4029
7502 23:03:10.340072 308 : 4249, 4027
7503 23:03:10.340151 312 : 4250, 4027
7504 23:03:10.343625 316 : 4360, 4137
7505 23:03:10.343733 320 : 4250, 4027
7506 23:03:10.347058 324 : 4250, 4027
7507 23:03:10.347131 328 : 4361, 4138
7508 23:03:10.349873 332 : 4250, 4027
7509 23:03:10.349946 336 : 4250, 3868
7510 23:03:10.353283 340 : 4363, 2165
7511 23:03:10.353395
7512 23:03:10.353499 MIOCK jitter meter ch=0
7513 23:03:10.353560
7514 23:03:10.356894 1T = (340-92) = 248 dly cells
7515 23:03:10.363079 Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 262/100 ps
7516 23:03:10.363155 ==
7517 23:03:10.366293 Dram Type= 6, Freq= 0, CH_0, rank 0
7518 23:03:10.369685 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7519 23:03:10.369763 ==
7520 23:03:10.376638 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7521 23:03:10.379466 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7522 23:03:10.383062 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7523 23:03:10.389391 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7524 23:03:10.399644 [CA 0] Center 43 (12~74) winsize 63
7525 23:03:10.402421 [CA 1] Center 42 (12~73) winsize 62
7526 23:03:10.406540 [CA 2] Center 38 (9~68) winsize 60
7527 23:03:10.409289 [CA 3] Center 38 (8~68) winsize 61
7528 23:03:10.412809 [CA 4] Center 36 (7~66) winsize 60
7529 23:03:10.415821 [CA 5] Center 35 (6~65) winsize 60
7530 23:03:10.415921
7531 23:03:10.419308 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7532 23:03:10.419381
7533 23:03:10.422682 [CATrainingPosCal] consider 1 rank data
7534 23:03:10.425663 u2DelayCellTimex100 = 262/100 ps
7535 23:03:10.432128 CA0 delay=43 (12~74),Diff = 8 PI (29 cell)
7536 23:03:10.435459 CA1 delay=42 (12~73),Diff = 7 PI (26 cell)
7537 23:03:10.438512 CA2 delay=38 (9~68),Diff = 3 PI (11 cell)
7538 23:03:10.442095 CA3 delay=38 (8~68),Diff = 3 PI (11 cell)
7539 23:03:10.445540 CA4 delay=36 (7~66),Diff = 1 PI (3 cell)
7540 23:03:10.448301 CA5 delay=35 (6~65),Diff = 0 PI (0 cell)
7541 23:03:10.448373
7542 23:03:10.452066 CA PerBit enable=1, Macro0, CA PI delay=35
7543 23:03:10.452218
7544 23:03:10.454985 [CBTSetCACLKResult] CA Dly = 35
7545 23:03:10.458777 CS Dly: 12 (0~43)
7546 23:03:10.461744 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7547 23:03:10.465137 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7548 23:03:10.465217 ==
7549 23:03:10.468213 Dram Type= 6, Freq= 0, CH_0, rank 1
7550 23:03:10.474999 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7551 23:03:10.475080 ==
7552 23:03:10.478222 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7553 23:03:10.484858 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7554 23:03:10.488304 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7555 23:03:10.495050 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7556 23:03:10.502592 [CA 0] Center 42 (12~73) winsize 62
7557 23:03:10.505967 [CA 1] Center 43 (13~73) winsize 61
7558 23:03:10.509618 [CA 2] Center 37 (8~67) winsize 60
7559 23:03:10.512661 [CA 3] Center 37 (7~67) winsize 61
7560 23:03:10.516529 [CA 4] Center 35 (6~65) winsize 60
7561 23:03:10.519781 [CA 5] Center 35 (5~65) winsize 61
7562 23:03:10.519882
7563 23:03:10.522892 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7564 23:03:10.522964
7565 23:03:10.525778 [CATrainingPosCal] consider 2 rank data
7566 23:03:10.529419 u2DelayCellTimex100 = 262/100 ps
7567 23:03:10.536280 CA0 delay=42 (12~73),Diff = 7 PI (26 cell)
7568 23:03:10.539407 CA1 delay=43 (13~73),Diff = 8 PI (29 cell)
7569 23:03:10.542485 CA2 delay=38 (9~67),Diff = 3 PI (11 cell)
7570 23:03:10.545783 CA3 delay=37 (8~67),Diff = 2 PI (7 cell)
7571 23:03:10.548859 CA4 delay=36 (7~65),Diff = 1 PI (3 cell)
7572 23:03:10.552133 CA5 delay=35 (6~65),Diff = 0 PI (0 cell)
7573 23:03:10.552207
7574 23:03:10.555851 CA PerBit enable=1, Macro0, CA PI delay=35
7575 23:03:10.555938
7576 23:03:10.558758 [CBTSetCACLKResult] CA Dly = 35
7577 23:03:10.562447 CS Dly: 12 (0~44)
7578 23:03:10.565578 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7579 23:03:10.569355 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7580 23:03:10.569468
7581 23:03:10.572503 ----->DramcWriteLeveling(PI) begin...
7582 23:03:10.572578 ==
7583 23:03:10.575356 Dram Type= 6, Freq= 0, CH_0, rank 0
7584 23:03:10.581826 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7585 23:03:10.581908 ==
7586 23:03:10.585346 Write leveling (Byte 0): 36 => 36
7587 23:03:10.588397 Write leveling (Byte 1): 27 => 27
7588 23:03:10.588500 DramcWriteLeveling(PI) end<-----
7589 23:03:10.592668
7590 23:03:10.592755 ==
7591 23:03:10.595026 Dram Type= 6, Freq= 0, CH_0, rank 0
7592 23:03:10.598373 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7593 23:03:10.598449 ==
7594 23:03:10.601720 [Gating] SW mode calibration
7595 23:03:10.608497 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7596 23:03:10.614853 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7597 23:03:10.617938 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7598 23:03:10.621482 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7599 23:03:10.627922 1 4 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7600 23:03:10.631455 1 4 12 | B1->B0 | 2323 2928 | 0 1 | (0 0) (0 0)
7601 23:03:10.634443 1 4 16 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
7602 23:03:10.640950 1 4 20 | B1->B0 | 2727 3434 | 1 1 | (1 1) (1 1)
7603 23:03:10.644295 1 4 24 | B1->B0 | 2e2e 3434 | 0 1 | (0 0) (1 1)
7604 23:03:10.647726 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7605 23:03:10.654037 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7606 23:03:10.657998 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7607 23:03:10.660898 1 5 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
7608 23:03:10.667803 1 5 12 | B1->B0 | 3434 2c2c | 1 0 | (1 1) (1 0)
7609 23:03:10.670768 1 5 16 | B1->B0 | 3434 2323 | 1 0 | (1 1) (0 0)
7610 23:03:10.673995 1 5 20 | B1->B0 | 3434 2323 | 0 0 | (0 1) (0 0)
7611 23:03:10.680757 1 5 24 | B1->B0 | 2828 2323 | 0 0 | (0 1) (0 0)
7612 23:03:10.684081 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7613 23:03:10.687848 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7614 23:03:10.693867 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7615 23:03:10.697734 1 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7616 23:03:10.700814 1 6 12 | B1->B0 | 2323 3838 | 0 0 | (0 0) (0 0)
7617 23:03:10.704047 1 6 16 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
7618 23:03:10.710393 1 6 20 | B1->B0 | 3030 4646 | 0 0 | (0 0) (0 0)
7619 23:03:10.713701 1 6 24 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)
7620 23:03:10.717620 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7621 23:03:10.723755 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7622 23:03:10.727200 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7623 23:03:10.730437 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7624 23:03:10.737141 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7625 23:03:10.740355 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7626 23:03:10.743290 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7627 23:03:10.750160 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7628 23:03:10.753443 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7629 23:03:10.756756 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7630 23:03:10.763224 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7631 23:03:10.766771 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7632 23:03:10.769722 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7633 23:03:10.776580 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7634 23:03:10.780165 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7635 23:03:10.783245 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7636 23:03:10.789547 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7637 23:03:10.792732 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7638 23:03:10.796453 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7639 23:03:10.802674 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7640 23:03:10.806601 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7641 23:03:10.809703 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7642 23:03:10.813005 Total UI for P1: 0, mck2ui 16
7643 23:03:10.816246 best dqsien dly found for B0: ( 1, 9, 10)
7644 23:03:10.823085 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7645 23:03:10.826003 1 9 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7646 23:03:10.829755 Total UI for P1: 0, mck2ui 16
7647 23:03:10.832539 best dqsien dly found for B1: ( 1, 9, 18)
7648 23:03:10.835831 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
7649 23:03:10.839383 best DQS1 dly(MCK, UI, PI) = (1, 9, 18)
7650 23:03:10.839544
7651 23:03:10.842992 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
7652 23:03:10.849251 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 18)
7653 23:03:10.849374 [Gating] SW calibration Done
7654 23:03:10.849474 ==
7655 23:03:10.852381 Dram Type= 6, Freq= 0, CH_0, rank 0
7656 23:03:10.859395 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7657 23:03:10.859506 ==
7658 23:03:10.859600 RX Vref Scan: 0
7659 23:03:10.859674
7660 23:03:10.862727 RX Vref 0 -> 0, step: 1
7661 23:03:10.862808
7662 23:03:10.865670 RX Delay 0 -> 252, step: 8
7663 23:03:10.868951 iDelay=200, Bit 0, Center 131 (80 ~ 183) 104
7664 23:03:10.872382 iDelay=200, Bit 1, Center 139 (88 ~ 191) 104
7665 23:03:10.875720 iDelay=200, Bit 2, Center 131 (80 ~ 183) 104
7666 23:03:10.878766 iDelay=200, Bit 3, Center 131 (80 ~ 183) 104
7667 23:03:10.885887 iDelay=200, Bit 4, Center 135 (80 ~ 191) 112
7668 23:03:10.888838 iDelay=200, Bit 5, Center 123 (72 ~ 175) 104
7669 23:03:10.892941 iDelay=200, Bit 6, Center 143 (88 ~ 199) 112
7670 23:03:10.895468 iDelay=200, Bit 7, Center 147 (96 ~ 199) 104
7671 23:03:10.899204 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
7672 23:03:10.905556 iDelay=200, Bit 9, Center 115 (64 ~ 167) 104
7673 23:03:10.909023 iDelay=200, Bit 10, Center 127 (72 ~ 183) 112
7674 23:03:10.912330 iDelay=200, Bit 11, Center 119 (64 ~ 175) 112
7675 23:03:10.915417 iDelay=200, Bit 12, Center 131 (80 ~ 183) 104
7676 23:03:10.922202 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
7677 23:03:10.925115 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
7678 23:03:10.928837 iDelay=200, Bit 15, Center 131 (72 ~ 191) 120
7679 23:03:10.928918 ==
7680 23:03:10.931797 Dram Type= 6, Freq= 0, CH_0, rank 0
7681 23:03:10.935479 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7682 23:03:10.935570 ==
7683 23:03:10.938647 DQS Delay:
7684 23:03:10.938726 DQS0 = 0, DQS1 = 0
7685 23:03:10.941679 DQM Delay:
7686 23:03:10.941775 DQM0 = 135, DQM1 = 127
7687 23:03:10.945200 DQ Delay:
7688 23:03:10.948480 DQ0 =131, DQ1 =139, DQ2 =131, DQ3 =131
7689 23:03:10.951560 DQ4 =135, DQ5 =123, DQ6 =143, DQ7 =147
7690 23:03:10.955214 DQ8 =119, DQ9 =115, DQ10 =127, DQ11 =119
7691 23:03:10.958396 DQ12 =131, DQ13 =135, DQ14 =139, DQ15 =131
7692 23:03:10.958476
7693 23:03:10.958539
7694 23:03:10.958597 ==
7695 23:03:10.961758 Dram Type= 6, Freq= 0, CH_0, rank 0
7696 23:03:10.965369 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7697 23:03:10.965483 ==
7698 23:03:10.965566
7699 23:03:10.968713
7700 23:03:10.968794 TX Vref Scan disable
7701 23:03:10.971605 == TX Byte 0 ==
7702 23:03:10.974990 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
7703 23:03:10.978105 Update DQM dly =991 (3 ,6, 31) DQM OEN =(3 ,3)
7704 23:03:10.981398 == TX Byte 1 ==
7705 23:03:10.984762 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
7706 23:03:10.988000 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
7707 23:03:10.988082 ==
7708 23:03:10.991488 Dram Type= 6, Freq= 0, CH_0, rank 0
7709 23:03:10.997867 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7710 23:03:10.997984 ==
7711 23:03:11.010507
7712 23:03:11.013925 TX Vref early break, caculate TX vref
7713 23:03:11.016672 TX Vref=16, minBit 4, minWin=22, winSum=369
7714 23:03:11.020265 TX Vref=18, minBit 1, minWin=23, winSum=379
7715 23:03:11.023303 TX Vref=20, minBit 1, minWin=24, winSum=393
7716 23:03:11.026610 TX Vref=22, minBit 3, minWin=24, winSum=399
7717 23:03:11.029910 TX Vref=24, minBit 7, minWin=24, winSum=408
7718 23:03:11.036485 TX Vref=26, minBit 2, minWin=25, winSum=416
7719 23:03:11.040300 TX Vref=28, minBit 0, minWin=25, winSum=416
7720 23:03:11.043578 TX Vref=30, minBit 1, minWin=24, winSum=409
7721 23:03:11.046753 TX Vref=32, minBit 0, minWin=24, winSum=400
7722 23:03:11.049800 TX Vref=34, minBit 5, minWin=23, winSum=389
7723 23:03:11.056320 [TxChooseVref] Worse bit 2, Min win 25, Win sum 416, Final Vref 26
7724 23:03:11.056403
7725 23:03:11.059719 Final TX Range 0 Vref 26
7726 23:03:11.059802
7727 23:03:11.059866 ==
7728 23:03:11.062877 Dram Type= 6, Freq= 0, CH_0, rank 0
7729 23:03:11.066730 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7730 23:03:11.066813 ==
7731 23:03:11.066912
7732 23:03:11.067001
7733 23:03:11.069524 TX Vref Scan disable
7734 23:03:11.075903 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =262/100 ps
7735 23:03:11.076004 == TX Byte 0 ==
7736 23:03:11.079297 u2DelayCellOfst[0]=14 cells (4 PI)
7737 23:03:11.082674 u2DelayCellOfst[1]=18 cells (5 PI)
7738 23:03:11.085991 u2DelayCellOfst[2]=14 cells (4 PI)
7739 23:03:11.089388 u2DelayCellOfst[3]=14 cells (4 PI)
7740 23:03:11.092770 u2DelayCellOfst[4]=11 cells (3 PI)
7741 23:03:11.095964 u2DelayCellOfst[5]=0 cells (0 PI)
7742 23:03:11.099315 u2DelayCellOfst[6]=22 cells (6 PI)
7743 23:03:11.102674 u2DelayCellOfst[7]=22 cells (6 PI)
7744 23:03:11.106087 Update DQ dly =988 (3 ,6, 28) DQ OEN =(3 ,3)
7745 23:03:11.109196 Update DQM dly =991 (3 ,6, 31) DQM OEN =(3 ,3)
7746 23:03:11.112511 == TX Byte 1 ==
7747 23:03:11.115731 u2DelayCellOfst[8]=0 cells (0 PI)
7748 23:03:11.119098 u2DelayCellOfst[9]=0 cells (0 PI)
7749 23:03:11.119169 u2DelayCellOfst[10]=3 cells (1 PI)
7750 23:03:11.122438 u2DelayCellOfst[11]=0 cells (0 PI)
7751 23:03:11.125873 u2DelayCellOfst[12]=7 cells (2 PI)
7752 23:03:11.128950 u2DelayCellOfst[13]=11 cells (3 PI)
7753 23:03:11.132932 u2DelayCellOfst[14]=11 cells (3 PI)
7754 23:03:11.135507 u2DelayCellOfst[15]=7 cells (2 PI)
7755 23:03:11.142572 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
7756 23:03:11.145512 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
7757 23:03:11.145586 DramC Write-DBI on
7758 23:03:11.145648 ==
7759 23:03:11.148872 Dram Type= 6, Freq= 0, CH_0, rank 0
7760 23:03:11.155515 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7761 23:03:11.155615 ==
7762 23:03:11.155712
7763 23:03:11.155802
7764 23:03:11.155887 TX Vref Scan disable
7765 23:03:11.159719 == TX Byte 0 ==
7766 23:03:11.162801 Update DQM dly =736 (2 ,6, 32) DQM OEN =(3 ,3)
7767 23:03:11.166326 == TX Byte 1 ==
7768 23:03:11.169725 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
7769 23:03:11.172981 DramC Write-DBI off
7770 23:03:11.173052
7771 23:03:11.173151 [DATLAT]
7772 23:03:11.173239 Freq=1600, CH0 RK0
7773 23:03:11.173334
7774 23:03:11.176345 DATLAT Default: 0xf
7775 23:03:11.176413 0, 0xFFFF, sum = 0
7776 23:03:11.179599 1, 0xFFFF, sum = 0
7777 23:03:11.182953 2, 0xFFFF, sum = 0
7778 23:03:11.183025 3, 0xFFFF, sum = 0
7779 23:03:11.186549 4, 0xFFFF, sum = 0
7780 23:03:11.186619 5, 0xFFFF, sum = 0
7781 23:03:11.189291 6, 0xFFFF, sum = 0
7782 23:03:11.189385 7, 0xFFFF, sum = 0
7783 23:03:11.192541 8, 0xFFFF, sum = 0
7784 23:03:11.192646 9, 0xFFFF, sum = 0
7785 23:03:11.195935 10, 0xFFFF, sum = 0
7786 23:03:11.196023 11, 0xFFFF, sum = 0
7787 23:03:11.199739 12, 0xFFFF, sum = 0
7788 23:03:11.199811 13, 0xFFFF, sum = 0
7789 23:03:11.202577 14, 0x0, sum = 1
7790 23:03:11.202676 15, 0x0, sum = 2
7791 23:03:11.205910 16, 0x0, sum = 3
7792 23:03:11.205986 17, 0x0, sum = 4
7793 23:03:11.209305 best_step = 15
7794 23:03:11.209405
7795 23:03:11.209477 ==
7796 23:03:11.212593 Dram Type= 6, Freq= 0, CH_0, rank 0
7797 23:03:11.216154 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7798 23:03:11.216235 ==
7799 23:03:11.219269 RX Vref Scan: 1
7800 23:03:11.219347
7801 23:03:11.219438 Set Vref Range= 24 -> 127
7802 23:03:11.219524
7803 23:03:11.222389 RX Vref 24 -> 127, step: 1
7804 23:03:11.222457
7805 23:03:11.225656 RX Delay 19 -> 252, step: 4
7806 23:03:11.225742
7807 23:03:11.229223 Set Vref, RX VrefLevel [Byte0]: 24
7808 23:03:11.232629 [Byte1]: 24
7809 23:03:11.232698
7810 23:03:11.235554 Set Vref, RX VrefLevel [Byte0]: 25
7811 23:03:11.238738 [Byte1]: 25
7812 23:03:11.242809
7813 23:03:11.242911 Set Vref, RX VrefLevel [Byte0]: 26
7814 23:03:11.245933 [Byte1]: 26
7815 23:03:11.249691
7816 23:03:11.249758 Set Vref, RX VrefLevel [Byte0]: 27
7817 23:03:11.253087 [Byte1]: 27
7818 23:03:11.257553
7819 23:03:11.257627 Set Vref, RX VrefLevel [Byte0]: 28
7820 23:03:11.260893 [Byte1]: 28
7821 23:03:11.265042
7822 23:03:11.265135 Set Vref, RX VrefLevel [Byte0]: 29
7823 23:03:11.268441 [Byte1]: 29
7824 23:03:11.272446
7825 23:03:11.272539 Set Vref, RX VrefLevel [Byte0]: 30
7826 23:03:11.276360 [Byte1]: 30
7827 23:03:11.280147
7828 23:03:11.280217 Set Vref, RX VrefLevel [Byte0]: 31
7829 23:03:11.283295 [Byte1]: 31
7830 23:03:11.287824
7831 23:03:11.287893 Set Vref, RX VrefLevel [Byte0]: 32
7832 23:03:11.290933 [Byte1]: 32
7833 23:03:11.295167
7834 23:03:11.295243 Set Vref, RX VrefLevel [Byte0]: 33
7835 23:03:11.298459 [Byte1]: 33
7836 23:03:11.303012
7837 23:03:11.303093 Set Vref, RX VrefLevel [Byte0]: 34
7838 23:03:11.306238 [Byte1]: 34
7839 23:03:11.311131
7840 23:03:11.311214 Set Vref, RX VrefLevel [Byte0]: 35
7841 23:03:11.313843 [Byte1]: 35
7842 23:03:11.318124
7843 23:03:11.318206 Set Vref, RX VrefLevel [Byte0]: 36
7844 23:03:11.321356 [Byte1]: 36
7845 23:03:11.325720
7846 23:03:11.325809 Set Vref, RX VrefLevel [Byte0]: 37
7847 23:03:11.329254 [Byte1]: 37
7848 23:03:11.333575
7849 23:03:11.333651 Set Vref, RX VrefLevel [Byte0]: 38
7850 23:03:11.336543 [Byte1]: 38
7851 23:03:11.340956
7852 23:03:11.341030 Set Vref, RX VrefLevel [Byte0]: 39
7853 23:03:11.344247 [Byte1]: 39
7854 23:03:11.348815
7855 23:03:11.348894 Set Vref, RX VrefLevel [Byte0]: 40
7856 23:03:11.351655 [Byte1]: 40
7857 23:03:11.356186
7858 23:03:11.356280 Set Vref, RX VrefLevel [Byte0]: 41
7859 23:03:11.359482 [Byte1]: 41
7860 23:03:11.363407
7861 23:03:11.363486 Set Vref, RX VrefLevel [Byte0]: 42
7862 23:03:11.367096 [Byte1]: 42
7863 23:03:11.371256
7864 23:03:11.371335 Set Vref, RX VrefLevel [Byte0]: 43
7865 23:03:11.374535 [Byte1]: 43
7866 23:03:11.378842
7867 23:03:11.378921 Set Vref, RX VrefLevel [Byte0]: 44
7868 23:03:11.381759 [Byte1]: 44
7869 23:03:11.386117
7870 23:03:11.386191 Set Vref, RX VrefLevel [Byte0]: 45
7871 23:03:11.389681 [Byte1]: 45
7872 23:03:11.394312
7873 23:03:11.394421 Set Vref, RX VrefLevel [Byte0]: 46
7874 23:03:11.397370 [Byte1]: 46
7875 23:03:11.401210
7876 23:03:11.404770 Set Vref, RX VrefLevel [Byte0]: 47
7877 23:03:11.408040 [Byte1]: 47
7878 23:03:11.408139
7879 23:03:11.410968 Set Vref, RX VrefLevel [Byte0]: 48
7880 23:03:11.414203 [Byte1]: 48
7881 23:03:11.414275
7882 23:03:11.417980 Set Vref, RX VrefLevel [Byte0]: 49
7883 23:03:11.421022 [Byte1]: 49
7884 23:03:11.421101
7885 23:03:11.424083 Set Vref, RX VrefLevel [Byte0]: 50
7886 23:03:11.427492 [Byte1]: 50
7887 23:03:11.431823
7888 23:03:11.431894 Set Vref, RX VrefLevel [Byte0]: 51
7889 23:03:11.434877 [Byte1]: 51
7890 23:03:11.439399
7891 23:03:11.439500 Set Vref, RX VrefLevel [Byte0]: 52
7892 23:03:11.442660 [Byte1]: 52
7893 23:03:11.447222
7894 23:03:11.447328 Set Vref, RX VrefLevel [Byte0]: 53
7895 23:03:11.449856 [Byte1]: 53
7896 23:03:11.454281
7897 23:03:11.454354 Set Vref, RX VrefLevel [Byte0]: 54
7898 23:03:11.457607 [Byte1]: 54
7899 23:03:11.462366
7900 23:03:11.462466 Set Vref, RX VrefLevel [Byte0]: 55
7901 23:03:11.465143 [Byte1]: 55
7902 23:03:11.469513
7903 23:03:11.469586 Set Vref, RX VrefLevel [Byte0]: 56
7904 23:03:11.472828 [Byte1]: 56
7905 23:03:11.476856
7906 23:03:11.476934 Set Vref, RX VrefLevel [Byte0]: 57
7907 23:03:11.480099 [Byte1]: 57
7908 23:03:11.485173
7909 23:03:11.485251 Set Vref, RX VrefLevel [Byte0]: 58
7910 23:03:11.488179 [Byte1]: 58
7911 23:03:11.492396
7912 23:03:11.492489 Set Vref, RX VrefLevel [Byte0]: 59
7913 23:03:11.496145 [Byte1]: 59
7914 23:03:11.499944
7915 23:03:11.500034 Set Vref, RX VrefLevel [Byte0]: 60
7916 23:03:11.503568 [Byte1]: 60
7917 23:03:11.507365
7918 23:03:11.507438 Set Vref, RX VrefLevel [Byte0]: 61
7919 23:03:11.511093 [Byte1]: 61
7920 23:03:11.514815
7921 23:03:11.514886 Set Vref, RX VrefLevel [Byte0]: 62
7922 23:03:11.518195 [Byte1]: 62
7923 23:03:11.522294
7924 23:03:11.522367 Set Vref, RX VrefLevel [Byte0]: 63
7925 23:03:11.525823 [Byte1]: 63
7926 23:03:11.529929
7927 23:03:11.530017 Set Vref, RX VrefLevel [Byte0]: 64
7928 23:03:11.533812 [Byte1]: 64
7929 23:03:11.537517
7930 23:03:11.537616 Set Vref, RX VrefLevel [Byte0]: 65
7931 23:03:11.540776 [Byte1]: 65
7932 23:03:11.545158
7933 23:03:11.545259 Set Vref, RX VrefLevel [Byte0]: 66
7934 23:03:11.548648 [Byte1]: 66
7935 23:03:11.552778
7936 23:03:11.552858 Set Vref, RX VrefLevel [Byte0]: 67
7937 23:03:11.556390 [Byte1]: 67
7938 23:03:11.560445
7939 23:03:11.560546 Set Vref, RX VrefLevel [Byte0]: 68
7940 23:03:11.563817 [Byte1]: 68
7941 23:03:11.567855
7942 23:03:11.567929 Set Vref, RX VrefLevel [Byte0]: 69
7943 23:03:11.571356 [Byte1]: 69
7944 23:03:11.575253
7945 23:03:11.575360 Set Vref, RX VrefLevel [Byte0]: 70
7946 23:03:11.579003 [Byte1]: 70
7947 23:03:11.583291
7948 23:03:11.583401 Set Vref, RX VrefLevel [Byte0]: 71
7949 23:03:11.586490 [Byte1]: 71
7950 23:03:11.591080
7951 23:03:11.591155 Set Vref, RX VrefLevel [Byte0]: 72
7952 23:03:11.593694 [Byte1]: 72
7953 23:03:11.598332
7954 23:03:11.598409 Set Vref, RX VrefLevel [Byte0]: 73
7955 23:03:11.601629 [Byte1]: 73
7956 23:03:11.605914
7957 23:03:11.606015 Set Vref, RX VrefLevel [Byte0]: 74
7958 23:03:11.609194 [Byte1]: 74
7959 23:03:11.613501
7960 23:03:11.613595 Set Vref, RX VrefLevel [Byte0]: 75
7961 23:03:11.616728 [Byte1]: 75
7962 23:03:11.621226
7963 23:03:11.621327 Set Vref, RX VrefLevel [Byte0]: 76
7964 23:03:11.624005 [Byte1]: 76
7965 23:03:11.628341
7966 23:03:11.628438 Set Vref, RX VrefLevel [Byte0]: 77
7967 23:03:11.632002 [Byte1]: 77
7968 23:03:11.636527
7969 23:03:11.636630 Set Vref, RX VrefLevel [Byte0]: 78
7970 23:03:11.639523 [Byte1]: 78
7971 23:03:11.643524
7972 23:03:11.643632 Set Vref, RX VrefLevel [Byte0]: 79
7973 23:03:11.646823 [Byte1]: 79
7974 23:03:11.651090
7975 23:03:11.651191 Set Vref, RX VrefLevel [Byte0]: 80
7976 23:03:11.654646 [Byte1]: 80
7977 23:03:11.658982
7978 23:03:11.659058 Final RX Vref Byte 0 = 68 to rank0
7979 23:03:11.662051 Final RX Vref Byte 1 = 57 to rank0
7980 23:03:11.665646 Final RX Vref Byte 0 = 68 to rank1
7981 23:03:11.668652 Final RX Vref Byte 1 = 57 to rank1==
7982 23:03:11.671916 Dram Type= 6, Freq= 0, CH_0, rank 0
7983 23:03:11.679049 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7984 23:03:11.679141 ==
7985 23:03:11.679208 DQS Delay:
7986 23:03:11.682097 DQS0 = 0, DQS1 = 0
7987 23:03:11.682176 DQM Delay:
7988 23:03:11.682238 DQM0 = 133, DQM1 = 123
7989 23:03:11.685066 DQ Delay:
7990 23:03:11.688538 DQ0 =132, DQ1 =136, DQ2 =132, DQ3 =132
7991 23:03:11.691741 DQ4 =134, DQ5 =120, DQ6 =142, DQ7 =142
7992 23:03:11.694968 DQ8 =114, DQ9 =110, DQ10 =124, DQ11 =118
7993 23:03:11.698523 DQ12 =128, DQ13 =128, DQ14 =136, DQ15 =128
7994 23:03:11.698613
7995 23:03:11.698678
7996 23:03:11.698738
7997 23:03:11.702083 [DramC_TX_OE_Calibration] TA2
7998 23:03:11.705205 Original DQ_B0 (3 6) =30, OEN = 27
7999 23:03:11.708234 Original DQ_B1 (3 6) =30, OEN = 27
8000 23:03:11.711887 24, 0x0, End_B0=24 End_B1=24
8001 23:03:11.711963 25, 0x0, End_B0=25 End_B1=25
8002 23:03:11.714924 26, 0x0, End_B0=26 End_B1=26
8003 23:03:11.718179 27, 0x0, End_B0=27 End_B1=27
8004 23:03:11.721836 28, 0x0, End_B0=28 End_B1=28
8005 23:03:11.724657 29, 0x0, End_B0=29 End_B1=29
8006 23:03:11.724762 30, 0x0, End_B0=30 End_B1=30
8007 23:03:11.727925 31, 0x4141, End_B0=30 End_B1=30
8008 23:03:11.731341 Byte0 end_step=30 best_step=27
8009 23:03:11.734953 Byte1 end_step=30 best_step=27
8010 23:03:11.737634 Byte0 TX OE(2T, 0.5T) = (3, 3)
8011 23:03:11.741109 Byte1 TX OE(2T, 0.5T) = (3, 3)
8012 23:03:11.741241
8013 23:03:11.741336
8014 23:03:11.747707 [DQSOSCAuto] RK0, (LSB)MR18= 0x2314, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 392 ps
8015 23:03:11.750931 CH0 RK0: MR19=303, MR18=2314
8016 23:03:11.757351 CH0_RK0: MR19=0x303, MR18=0x2314, DQSOSC=392, MR23=63, INC=24, DEC=16
8017 23:03:11.757490
8018 23:03:11.760783 ----->DramcWriteLeveling(PI) begin...
8019 23:03:11.760892 ==
8020 23:03:11.763833 Dram Type= 6, Freq= 0, CH_0, rank 1
8021 23:03:11.767772 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8022 23:03:11.767882 ==
8023 23:03:11.770864 Write leveling (Byte 0): 34 => 34
8024 23:03:11.774096 Write leveling (Byte 1): 27 => 27
8025 23:03:11.777234 DramcWriteLeveling(PI) end<-----
8026 23:03:11.777331
8027 23:03:11.777447 ==
8028 23:03:11.780645 Dram Type= 6, Freq= 0, CH_0, rank 1
8029 23:03:11.786708 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8030 23:03:11.786810 ==
8031 23:03:11.790674 [Gating] SW mode calibration
8032 23:03:11.796607 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8033 23:03:11.800291 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8034 23:03:11.806598 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8035 23:03:11.810165 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8036 23:03:11.813203 1 4 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8037 23:03:11.820173 1 4 12 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
8038 23:03:11.823005 1 4 16 | B1->B0 | 2323 3333 | 1 1 | (1 1) (1 1)
8039 23:03:11.826777 1 4 20 | B1->B0 | 2f2f 3434 | 1 1 | (0 0) (1 1)
8040 23:03:11.833325 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8041 23:03:11.836854 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8042 23:03:11.839996 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8043 23:03:11.846321 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8044 23:03:11.849530 1 5 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
8045 23:03:11.852894 1 5 12 | B1->B0 | 3434 3232 | 1 1 | (1 1) (1 0)
8046 23:03:11.859619 1 5 16 | B1->B0 | 3434 2b2b | 1 0 | (1 1) (0 1)
8047 23:03:11.862693 1 5 20 | B1->B0 | 2e2e 2323 | 0 0 | (0 1) (0 0)
8048 23:03:11.866110 1 5 24 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
8049 23:03:11.872969 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8050 23:03:11.876557 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8051 23:03:11.879409 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8052 23:03:11.885734 1 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8053 23:03:11.888918 1 6 12 | B1->B0 | 2323 2a2a | 0 1 | (0 0) (0 0)
8054 23:03:11.892211 1 6 16 | B1->B0 | 2626 4444 | 0 0 | (0 0) (0 0)
8055 23:03:11.898855 1 6 20 | B1->B0 | 3a3a 4646 | 1 0 | (0 0) (0 0)
8056 23:03:11.902060 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8057 23:03:11.905639 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8058 23:03:11.912136 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8059 23:03:11.915301 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8060 23:03:11.918456 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8061 23:03:11.925122 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8062 23:03:11.928324 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8063 23:03:11.931373 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8064 23:03:11.938402 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8065 23:03:11.941691 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8066 23:03:11.944634 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8067 23:03:11.951153 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8068 23:03:11.954687 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8069 23:03:11.958151 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8070 23:03:11.964283 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8071 23:03:11.967629 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8072 23:03:11.970995 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8073 23:03:11.977672 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8074 23:03:11.981060 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8075 23:03:11.984089 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8076 23:03:11.991132 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8077 23:03:11.994527 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8078 23:03:11.997611 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8079 23:03:12.003983 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8080 23:03:12.007659 Total UI for P1: 0, mck2ui 16
8081 23:03:12.010581 best dqsien dly found for B0: ( 1, 9, 14)
8082 23:03:12.013948 1 9 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8083 23:03:12.017393 Total UI for P1: 0, mck2ui 16
8084 23:03:12.020859 best dqsien dly found for B1: ( 1, 9, 20)
8085 23:03:12.024009 best DQS0 dly(MCK, UI, PI) = (1, 9, 14)
8086 23:03:12.027064 best DQS1 dly(MCK, UI, PI) = (1, 9, 20)
8087 23:03:12.027166
8088 23:03:12.030784 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 14)
8089 23:03:12.033912 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 20)
8090 23:03:12.037068 [Gating] SW calibration Done
8091 23:03:12.037168 ==
8092 23:03:12.040512 Dram Type= 6, Freq= 0, CH_0, rank 1
8093 23:03:12.047043 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8094 23:03:12.047149 ==
8095 23:03:12.047247 RX Vref Scan: 0
8096 23:03:12.047335
8097 23:03:12.050450 RX Vref 0 -> 0, step: 1
8098 23:03:12.050554
8099 23:03:12.053386 RX Delay 0 -> 252, step: 8
8100 23:03:12.056792 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8101 23:03:12.060119 iDelay=200, Bit 1, Center 139 (80 ~ 199) 120
8102 23:03:12.063393 iDelay=200, Bit 2, Center 131 (72 ~ 191) 120
8103 23:03:12.066482 iDelay=200, Bit 3, Center 127 (72 ~ 183) 112
8104 23:03:12.073388 iDelay=200, Bit 4, Center 135 (80 ~ 191) 112
8105 23:03:12.077117 iDelay=200, Bit 5, Center 123 (64 ~ 183) 120
8106 23:03:12.079658 iDelay=200, Bit 6, Center 139 (80 ~ 199) 120
8107 23:03:12.083189 iDelay=200, Bit 7, Center 143 (88 ~ 199) 112
8108 23:03:12.089533 iDelay=200, Bit 8, Center 115 (56 ~ 175) 120
8109 23:03:12.093255 iDelay=200, Bit 9, Center 115 (56 ~ 175) 120
8110 23:03:12.096381 iDelay=200, Bit 10, Center 131 (72 ~ 191) 120
8111 23:03:12.099644 iDelay=200, Bit 11, Center 123 (64 ~ 183) 120
8112 23:03:12.103568 iDelay=200, Bit 12, Center 135 (80 ~ 191) 112
8113 23:03:12.110024 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
8114 23:03:12.112669 iDelay=200, Bit 14, Center 139 (80 ~ 199) 120
8115 23:03:12.116252 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8116 23:03:12.116330 ==
8117 23:03:12.119676 Dram Type= 6, Freq= 0, CH_0, rank 1
8118 23:03:12.122806 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8119 23:03:12.125753 ==
8120 23:03:12.125828 DQS Delay:
8121 23:03:12.125893 DQS0 = 0, DQS1 = 0
8122 23:03:12.129215 DQM Delay:
8123 23:03:12.129288 DQM0 = 134, DQM1 = 128
8124 23:03:12.132632 DQ Delay:
8125 23:03:12.136094 DQ0 =135, DQ1 =139, DQ2 =131, DQ3 =127
8126 23:03:12.139481 DQ4 =135, DQ5 =123, DQ6 =139, DQ7 =143
8127 23:03:12.142541 DQ8 =115, DQ9 =115, DQ10 =131, DQ11 =123
8128 23:03:12.145982 DQ12 =135, DQ13 =135, DQ14 =139, DQ15 =135
8129 23:03:12.146054
8130 23:03:12.146122
8131 23:03:12.146182 ==
8132 23:03:12.149303 Dram Type= 6, Freq= 0, CH_0, rank 1
8133 23:03:12.152253 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8134 23:03:12.152326 ==
8135 23:03:12.155718
8136 23:03:12.155786
8137 23:03:12.155853 TX Vref Scan disable
8138 23:03:12.159138 == TX Byte 0 ==
8139 23:03:12.162022 Update DQ dly =990 (3 ,6, 30) DQ OEN =(3 ,3)
8140 23:03:12.166006 Update DQM dly =990 (3 ,6, 30) DQM OEN =(3 ,3)
8141 23:03:12.168969 == TX Byte 1 ==
8142 23:03:12.172390 Update DQ dly =983 (3 ,6, 23) DQ OEN =(3 ,3)
8143 23:03:12.175604 Update DQM dly =983 (3 ,6, 23) DQM OEN =(3 ,3)
8144 23:03:12.175677 ==
8145 23:03:12.179154 Dram Type= 6, Freq= 0, CH_0, rank 1
8146 23:03:12.185563 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8147 23:03:12.185637 ==
8148 23:03:12.197830
8149 23:03:12.201162 TX Vref early break, caculate TX vref
8150 23:03:12.204569 TX Vref=16, minBit 1, minWin=22, winSum=377
8151 23:03:12.207507 TX Vref=18, minBit 1, minWin=22, winSum=387
8152 23:03:12.210953 TX Vref=20, minBit 0, minWin=24, winSum=395
8153 23:03:12.214239 TX Vref=22, minBit 0, minWin=24, winSum=400
8154 23:03:12.217847 TX Vref=24, minBit 1, minWin=24, winSum=405
8155 23:03:12.224485 TX Vref=26, minBit 1, minWin=24, winSum=411
8156 23:03:12.227702 TX Vref=28, minBit 7, minWin=24, winSum=409
8157 23:03:12.230888 TX Vref=30, minBit 1, minWin=23, winSum=402
8158 23:03:12.234267 TX Vref=32, minBit 1, minWin=23, winSum=393
8159 23:03:12.237339 TX Vref=34, minBit 3, minWin=23, winSum=387
8160 23:03:12.244106 [TxChooseVref] Worse bit 1, Min win 24, Win sum 411, Final Vref 26
8161 23:03:12.244185
8162 23:03:12.247376 Final TX Range 0 Vref 26
8163 23:03:12.247447
8164 23:03:12.247507 ==
8165 23:03:12.250534 Dram Type= 6, Freq= 0, CH_0, rank 1
8166 23:03:12.254117 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8167 23:03:12.254187 ==
8168 23:03:12.254247
8169 23:03:12.254303
8170 23:03:12.257145 TX Vref Scan disable
8171 23:03:12.263886 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =262/100 ps
8172 23:03:12.263962 == TX Byte 0 ==
8173 23:03:12.267430 u2DelayCellOfst[0]=14 cells (4 PI)
8174 23:03:12.270751 u2DelayCellOfst[1]=18 cells (5 PI)
8175 23:03:12.274097 u2DelayCellOfst[2]=14 cells (4 PI)
8176 23:03:12.276921 u2DelayCellOfst[3]=14 cells (4 PI)
8177 23:03:12.280753 u2DelayCellOfst[4]=11 cells (3 PI)
8178 23:03:12.283334 u2DelayCellOfst[5]=0 cells (0 PI)
8179 23:03:12.286838 u2DelayCellOfst[6]=22 cells (6 PI)
8180 23:03:12.290122 u2DelayCellOfst[7]=22 cells (6 PI)
8181 23:03:12.293267 Update DQ dly =987 (3 ,6, 27) DQ OEN =(3 ,3)
8182 23:03:12.296971 Update DQM dly =990 (3 ,6, 30) DQM OEN =(3 ,3)
8183 23:03:12.300201 == TX Byte 1 ==
8184 23:03:12.303299 u2DelayCellOfst[8]=0 cells (0 PI)
8185 23:03:12.306767 u2DelayCellOfst[9]=0 cells (0 PI)
8186 23:03:12.310026 u2DelayCellOfst[10]=7 cells (2 PI)
8187 23:03:12.310096 u2DelayCellOfst[11]=3 cells (1 PI)
8188 23:03:12.312943 u2DelayCellOfst[12]=11 cells (3 PI)
8189 23:03:12.316542 u2DelayCellOfst[13]=11 cells (3 PI)
8190 23:03:12.320155 u2DelayCellOfst[14]=14 cells (4 PI)
8191 23:03:12.322826 u2DelayCellOfst[15]=11 cells (3 PI)
8192 23:03:12.329493 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8193 23:03:12.332721 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8194 23:03:12.332792 DramC Write-DBI on
8195 23:03:12.336477 ==
8196 23:03:12.339575 Dram Type= 6, Freq= 0, CH_0, rank 1
8197 23:03:12.342940 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8198 23:03:12.343048 ==
8199 23:03:12.343140
8200 23:03:12.343235
8201 23:03:12.346905 TX Vref Scan disable
8202 23:03:12.347011 == TX Byte 0 ==
8203 23:03:12.352601 Update DQM dly =735 (2 ,6, 31) DQM OEN =(3 ,3)
8204 23:03:12.352704 == TX Byte 1 ==
8205 23:03:12.356042 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8206 23:03:12.359497 DramC Write-DBI off
8207 23:03:12.359594
8208 23:03:12.359682 [DATLAT]
8209 23:03:12.362929 Freq=1600, CH0 RK1
8210 23:03:12.363033
8211 23:03:12.363122 DATLAT Default: 0xf
8212 23:03:12.365693 0, 0xFFFF, sum = 0
8213 23:03:12.365797 1, 0xFFFF, sum = 0
8214 23:03:12.368995 2, 0xFFFF, sum = 0
8215 23:03:12.369090 3, 0xFFFF, sum = 0
8216 23:03:12.372569 4, 0xFFFF, sum = 0
8217 23:03:12.375981 5, 0xFFFF, sum = 0
8218 23:03:12.376077 6, 0xFFFF, sum = 0
8219 23:03:12.379388 7, 0xFFFF, sum = 0
8220 23:03:12.379490 8, 0xFFFF, sum = 0
8221 23:03:12.382429 9, 0xFFFF, sum = 0
8222 23:03:12.382499 10, 0xFFFF, sum = 0
8223 23:03:12.385596 11, 0xFFFF, sum = 0
8224 23:03:12.385677 12, 0xFFFF, sum = 0
8225 23:03:12.389109 13, 0xFFFF, sum = 0
8226 23:03:12.389207 14, 0x0, sum = 1
8227 23:03:12.392397 15, 0x0, sum = 2
8228 23:03:12.392506 16, 0x0, sum = 3
8229 23:03:12.395785 17, 0x0, sum = 4
8230 23:03:12.395882 best_step = 15
8231 23:03:12.395978
8232 23:03:12.396066 ==
8233 23:03:12.399228 Dram Type= 6, Freq= 0, CH_0, rank 1
8234 23:03:12.402355 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8235 23:03:12.405603 ==
8236 23:03:12.405677 RX Vref Scan: 0
8237 23:03:12.405761
8238 23:03:12.408917 RX Vref 0 -> 0, step: 1
8239 23:03:12.409014
8240 23:03:12.409103 RX Delay 11 -> 252, step: 4
8241 23:03:12.416653 iDelay=195, Bit 0, Center 126 (75 ~ 178) 104
8242 23:03:12.419556 iDelay=195, Bit 1, Center 134 (79 ~ 190) 112
8243 23:03:12.422742 iDelay=195, Bit 2, Center 124 (71 ~ 178) 108
8244 23:03:12.426040 iDelay=195, Bit 3, Center 126 (75 ~ 178) 104
8245 23:03:12.432785 iDelay=195, Bit 4, Center 132 (79 ~ 186) 108
8246 23:03:12.436659 iDelay=195, Bit 5, Center 120 (67 ~ 174) 108
8247 23:03:12.439656 iDelay=195, Bit 6, Center 136 (83 ~ 190) 108
8248 23:03:12.443001 iDelay=195, Bit 7, Center 140 (87 ~ 194) 108
8249 23:03:12.446072 iDelay=195, Bit 8, Center 114 (59 ~ 170) 112
8250 23:03:12.449281 iDelay=195, Bit 9, Center 112 (59 ~ 166) 108
8251 23:03:12.456283 iDelay=195, Bit 10, Center 126 (71 ~ 182) 112
8252 23:03:12.459474 iDelay=195, Bit 11, Center 120 (67 ~ 174) 108
8253 23:03:12.462817 iDelay=195, Bit 12, Center 132 (79 ~ 186) 108
8254 23:03:12.465815 iDelay=195, Bit 13, Center 132 (79 ~ 186) 108
8255 23:03:12.472588 iDelay=195, Bit 14, Center 136 (83 ~ 190) 108
8256 23:03:12.475991 iDelay=195, Bit 15, Center 132 (79 ~ 186) 108
8257 23:03:12.476088 ==
8258 23:03:12.479250 Dram Type= 6, Freq= 0, CH_0, rank 1
8259 23:03:12.482232 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8260 23:03:12.482304 ==
8261 23:03:12.485988 DQS Delay:
8262 23:03:12.486059 DQS0 = 0, DQS1 = 0
8263 23:03:12.486119 DQM Delay:
8264 23:03:12.489335 DQM0 = 129, DQM1 = 125
8265 23:03:12.489453 DQ Delay:
8266 23:03:12.492503 DQ0 =126, DQ1 =134, DQ2 =124, DQ3 =126
8267 23:03:12.495495 DQ4 =132, DQ5 =120, DQ6 =136, DQ7 =140
8268 23:03:12.502047 DQ8 =114, DQ9 =112, DQ10 =126, DQ11 =120
8269 23:03:12.505561 DQ12 =132, DQ13 =132, DQ14 =136, DQ15 =132
8270 23:03:12.505633
8271 23:03:12.505694
8272 23:03:12.505751
8273 23:03:12.508521 [DramC_TX_OE_Calibration] TA2
8274 23:03:12.512442 Original DQ_B0 (3 6) =30, OEN = 27
8275 23:03:12.515245 Original DQ_B1 (3 6) =30, OEN = 27
8276 23:03:12.515315 24, 0x0, End_B0=24 End_B1=24
8277 23:03:12.518732 25, 0x0, End_B0=25 End_B1=25
8278 23:03:12.522078 26, 0x0, End_B0=26 End_B1=26
8279 23:03:12.525034 27, 0x0, End_B0=27 End_B1=27
8280 23:03:12.525103 28, 0x0, End_B0=28 End_B1=28
8281 23:03:12.528723 29, 0x0, End_B0=29 End_B1=29
8282 23:03:12.531848 30, 0x0, End_B0=30 End_B1=30
8283 23:03:12.534773 31, 0x4141, End_B0=30 End_B1=30
8284 23:03:12.538211 Byte0 end_step=30 best_step=27
8285 23:03:12.541402 Byte1 end_step=30 best_step=27
8286 23:03:12.544881 Byte0 TX OE(2T, 0.5T) = (3, 3)
8287 23:03:12.544954 Byte1 TX OE(2T, 0.5T) = (3, 3)
8288 23:03:12.545013
8289 23:03:12.545070
8290 23:03:12.555029 [DQSOSCAuto] RK1, (LSB)MR18= 0x2206, (MSB)MR19= 0x303, tDQSOscB0 = 406 ps tDQSOscB1 = 392 ps
8291 23:03:12.558266 CH0 RK1: MR19=303, MR18=2206
8292 23:03:12.564419 CH0_RK1: MR19=0x303, MR18=0x2206, DQSOSC=392, MR23=63, INC=24, DEC=16
8293 23:03:12.564501 [RxdqsGatingPostProcess] freq 1600
8294 23:03:12.571446 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8295 23:03:12.575244 best DQS0 dly(2T, 0.5T) = (1, 1)
8296 23:03:12.577858 best DQS1 dly(2T, 0.5T) = (1, 1)
8297 23:03:12.580839 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8298 23:03:12.584070 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8299 23:03:12.587766 best DQS0 dly(2T, 0.5T) = (1, 1)
8300 23:03:12.590886 best DQS1 dly(2T, 0.5T) = (1, 1)
8301 23:03:12.594041 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8302 23:03:12.597663 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8303 23:03:12.600901 Pre-setting of DQS Precalculation
8304 23:03:12.604167 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
8305 23:03:12.604265 ==
8306 23:03:12.607571 Dram Type= 6, Freq= 0, CH_1, rank 0
8307 23:03:12.611069 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8308 23:03:12.611167 ==
8309 23:03:12.617223 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8310 23:03:12.620675 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8311 23:03:12.627745 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8312 23:03:12.630435 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8313 23:03:12.640591 [CA 0] Center 42 (13~72) winsize 60
8314 23:03:12.643696 [CA 1] Center 42 (13~72) winsize 60
8315 23:03:12.647459 [CA 2] Center 38 (9~67) winsize 59
8316 23:03:12.650595 [CA 3] Center 36 (7~66) winsize 60
8317 23:03:12.654030 [CA 4] Center 38 (9~67) winsize 59
8318 23:03:12.657677 [CA 5] Center 37 (8~67) winsize 60
8319 23:03:12.657752
8320 23:03:12.660618 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8321 23:03:12.660692
8322 23:03:12.663840 [CATrainingPosCal] consider 1 rank data
8323 23:03:12.667582 u2DelayCellTimex100 = 262/100 ps
8324 23:03:12.670233 CA0 delay=42 (13~72),Diff = 6 PI (22 cell)
8325 23:03:12.676940 CA1 delay=42 (13~72),Diff = 6 PI (22 cell)
8326 23:03:12.680603 CA2 delay=38 (9~67),Diff = 2 PI (7 cell)
8327 23:03:12.683486 CA3 delay=36 (7~66),Diff = 0 PI (0 cell)
8328 23:03:12.686814 CA4 delay=38 (9~67),Diff = 2 PI (7 cell)
8329 23:03:12.690133 CA5 delay=37 (8~67),Diff = 1 PI (3 cell)
8330 23:03:12.690212
8331 23:03:12.693230 CA PerBit enable=1, Macro0, CA PI delay=36
8332 23:03:12.693298
8333 23:03:12.696698 [CBTSetCACLKResult] CA Dly = 36
8334 23:03:12.699940 CS Dly: 9 (0~40)
8335 23:03:12.703377 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8336 23:03:12.706590 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8337 23:03:12.706685 ==
8338 23:03:12.709808 Dram Type= 6, Freq= 0, CH_1, rank 1
8339 23:03:12.716465 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8340 23:03:12.716550 ==
8341 23:03:12.719884 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8342 23:03:12.723501 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8343 23:03:12.729974 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8344 23:03:12.736249 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8345 23:03:12.743896 [CA 0] Center 42 (13~72) winsize 60
8346 23:03:12.747001 [CA 1] Center 42 (13~72) winsize 60
8347 23:03:12.750428 [CA 2] Center 37 (8~67) winsize 60
8348 23:03:12.753745 [CA 3] Center 37 (7~67) winsize 61
8349 23:03:12.756895 [CA 4] Center 37 (8~67) winsize 60
8350 23:03:12.760553 [CA 5] Center 37 (8~67) winsize 60
8351 23:03:12.760661
8352 23:03:12.763498 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8353 23:03:12.763574
8354 23:03:12.769964 [CATrainingPosCal] consider 2 rank data
8355 23:03:12.770040 u2DelayCellTimex100 = 262/100 ps
8356 23:03:12.776605 CA0 delay=42 (13~72),Diff = 6 PI (22 cell)
8357 23:03:12.780143 CA1 delay=42 (13~72),Diff = 6 PI (22 cell)
8358 23:03:12.783030 CA2 delay=38 (9~67),Diff = 2 PI (7 cell)
8359 23:03:12.786876 CA3 delay=36 (7~66),Diff = 0 PI (0 cell)
8360 23:03:12.789831 CA4 delay=38 (9~67),Diff = 2 PI (7 cell)
8361 23:03:12.792981 CA5 delay=37 (8~67),Diff = 1 PI (3 cell)
8362 23:03:12.793078
8363 23:03:12.796187 CA PerBit enable=1, Macro0, CA PI delay=36
8364 23:03:12.796284
8365 23:03:12.799502 [CBTSetCACLKResult] CA Dly = 36
8366 23:03:12.803339 CS Dly: 10 (0~43)
8367 23:03:12.806183 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8368 23:03:12.809330 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8369 23:03:12.809447
8370 23:03:12.812895 ----->DramcWriteLeveling(PI) begin...
8371 23:03:12.812999 ==
8372 23:03:12.816402 Dram Type= 6, Freq= 0, CH_1, rank 0
8373 23:03:12.822758 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8374 23:03:12.822859 ==
8375 23:03:12.826133 Write leveling (Byte 0): 23 => 23
8376 23:03:12.829337 Write leveling (Byte 1): 26 => 26
8377 23:03:12.832412 DramcWriteLeveling(PI) end<-----
8378 23:03:12.832505
8379 23:03:12.832567 ==
8380 23:03:12.836099 Dram Type= 6, Freq= 0, CH_1, rank 0
8381 23:03:12.839425 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8382 23:03:12.839493 ==
8383 23:03:12.842562 [Gating] SW mode calibration
8384 23:03:12.849025 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8385 23:03:12.855601 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8386 23:03:12.858667 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8387 23:03:12.862133 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8388 23:03:12.869263 1 4 8 | B1->B0 | 2323 2322 | 0 1 | (0 0) (0 0)
8389 23:03:12.872200 1 4 12 | B1->B0 | 2525 3434 | 0 1 | (1 1) (1 1)
8390 23:03:12.875656 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8391 23:03:12.881842 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8392 23:03:12.885549 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8393 23:03:12.888896 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8394 23:03:12.894937 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8395 23:03:12.898203 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8396 23:03:12.901545 1 5 8 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 0)
8397 23:03:12.908538 1 5 12 | B1->B0 | 3434 2a2a | 1 1 | (1 0) (1 0)
8398 23:03:12.911884 1 5 16 | B1->B0 | 2424 2323 | 0 0 | (1 0) (0 0)
8399 23:03:12.915120 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8400 23:03:12.921358 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8401 23:03:12.924941 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8402 23:03:12.928284 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8403 23:03:12.934854 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8404 23:03:12.938150 1 6 8 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
8405 23:03:12.941362 1 6 12 | B1->B0 | 2f2f 4545 | 0 0 | (0 0) (0 0)
8406 23:03:12.944797 1 6 16 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)
8407 23:03:12.951627 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8408 23:03:12.954653 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8409 23:03:12.958176 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8410 23:03:12.964980 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8411 23:03:12.967850 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8412 23:03:12.971175 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8413 23:03:12.978292 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8414 23:03:12.981510 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8415 23:03:12.984291 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8416 23:03:12.991066 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8417 23:03:12.994446 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8418 23:03:12.997978 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8419 23:03:13.004387 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8420 23:03:13.007591 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8421 23:03:13.011019 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8422 23:03:13.017521 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8423 23:03:13.020823 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8424 23:03:13.024094 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8425 23:03:13.030953 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8426 23:03:13.033921 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8427 23:03:13.037050 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8428 23:03:13.043910 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8429 23:03:13.047000 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8430 23:03:13.050589 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8431 23:03:13.053699 Total UI for P1: 0, mck2ui 16
8432 23:03:13.057375 best dqsien dly found for B0: ( 1, 9, 10)
8433 23:03:13.060273 Total UI for P1: 0, mck2ui 16
8434 23:03:13.063782 best dqsien dly found for B1: ( 1, 9, 12)
8435 23:03:13.067124 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
8436 23:03:13.070292 best DQS1 dly(MCK, UI, PI) = (1, 9, 12)
8437 23:03:13.070363
8438 23:03:13.076994 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
8439 23:03:13.080153 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 12)
8440 23:03:13.083312 [Gating] SW calibration Done
8441 23:03:13.083388 ==
8442 23:03:13.086732 Dram Type= 6, Freq= 0, CH_1, rank 0
8443 23:03:13.089813 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8444 23:03:13.089916 ==
8445 23:03:13.093377 RX Vref Scan: 0
8446 23:03:13.093498
8447 23:03:13.093561 RX Vref 0 -> 0, step: 1
8448 23:03:13.093626
8449 23:03:13.097078 RX Delay 0 -> 252, step: 8
8450 23:03:13.100364 iDelay=208, Bit 0, Center 143 (88 ~ 199) 112
8451 23:03:13.103315 iDelay=208, Bit 1, Center 131 (80 ~ 183) 104
8452 23:03:13.110312 iDelay=208, Bit 2, Center 127 (72 ~ 183) 112
8453 23:03:13.113429 iDelay=208, Bit 3, Center 139 (88 ~ 191) 104
8454 23:03:13.116789 iDelay=208, Bit 4, Center 135 (80 ~ 191) 112
8455 23:03:13.119835 iDelay=208, Bit 5, Center 151 (96 ~ 207) 112
8456 23:03:13.123006 iDelay=208, Bit 6, Center 147 (96 ~ 199) 104
8457 23:03:13.130059 iDelay=208, Bit 7, Center 135 (80 ~ 191) 112
8458 23:03:13.132947 iDelay=208, Bit 8, Center 119 (64 ~ 175) 112
8459 23:03:13.136681 iDelay=208, Bit 9, Center 115 (56 ~ 175) 120
8460 23:03:13.139473 iDelay=208, Bit 10, Center 127 (72 ~ 183) 112
8461 23:03:13.145961 iDelay=208, Bit 11, Center 123 (72 ~ 175) 104
8462 23:03:13.149349 iDelay=208, Bit 12, Center 135 (80 ~ 191) 112
8463 23:03:13.152745 iDelay=208, Bit 13, Center 139 (80 ~ 199) 120
8464 23:03:13.156164 iDelay=208, Bit 14, Center 139 (80 ~ 199) 120
8465 23:03:13.159514 iDelay=208, Bit 15, Center 135 (80 ~ 191) 112
8466 23:03:13.162896 ==
8467 23:03:13.162977 Dram Type= 6, Freq= 0, CH_1, rank 0
8468 23:03:13.169192 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8469 23:03:13.169308 ==
8470 23:03:13.169401 DQS Delay:
8471 23:03:13.172424 DQS0 = 0, DQS1 = 0
8472 23:03:13.172531 DQM Delay:
8473 23:03:13.176152 DQM0 = 138, DQM1 = 129
8474 23:03:13.176248 DQ Delay:
8475 23:03:13.179474 DQ0 =143, DQ1 =131, DQ2 =127, DQ3 =139
8476 23:03:13.182163 DQ4 =135, DQ5 =151, DQ6 =147, DQ7 =135
8477 23:03:13.185875 DQ8 =119, DQ9 =115, DQ10 =127, DQ11 =123
8478 23:03:13.189063 DQ12 =135, DQ13 =139, DQ14 =139, DQ15 =135
8479 23:03:13.189159
8480 23:03:13.189247
8481 23:03:13.189332 ==
8482 23:03:13.192276 Dram Type= 6, Freq= 0, CH_1, rank 0
8483 23:03:13.198898 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8484 23:03:13.198974 ==
8485 23:03:13.199038
8486 23:03:13.199096
8487 23:03:13.202047 TX Vref Scan disable
8488 23:03:13.202143 == TX Byte 0 ==
8489 23:03:13.205705 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8490 23:03:13.211846 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8491 23:03:13.211975 == TX Byte 1 ==
8492 23:03:13.215190 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8493 23:03:13.221805 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8494 23:03:13.221885 ==
8495 23:03:13.225040 Dram Type= 6, Freq= 0, CH_1, rank 0
8496 23:03:13.228336 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8497 23:03:13.228418 ==
8498 23:03:13.241791
8499 23:03:13.244793 TX Vref early break, caculate TX vref
8500 23:03:13.248242 TX Vref=16, minBit 0, minWin=22, winSum=378
8501 23:03:13.251492 TX Vref=18, minBit 0, minWin=23, winSum=389
8502 23:03:13.255120 TX Vref=20, minBit 5, minWin=22, winSum=391
8503 23:03:13.258369 TX Vref=22, minBit 0, minWin=23, winSum=406
8504 23:03:13.261699 TX Vref=24, minBit 0, minWin=24, winSum=412
8505 23:03:13.268174 TX Vref=26, minBit 0, minWin=25, winSum=419
8506 23:03:13.271082 TX Vref=28, minBit 0, minWin=24, winSum=419
8507 23:03:13.274356 TX Vref=30, minBit 0, minWin=24, winSum=415
8508 23:03:13.277838 TX Vref=32, minBit 5, minWin=23, winSum=400
8509 23:03:13.281335 TX Vref=34, minBit 0, minWin=23, winSum=395
8510 23:03:13.287513 [TxChooseVref] Worse bit 0, Min win 25, Win sum 419, Final Vref 26
8511 23:03:13.287587
8512 23:03:13.290961 Final TX Range 0 Vref 26
8513 23:03:13.291058
8514 23:03:13.291153 ==
8515 23:03:13.294313 Dram Type= 6, Freq= 0, CH_1, rank 0
8516 23:03:13.297594 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8517 23:03:13.297667 ==
8518 23:03:13.297734
8519 23:03:13.297793
8520 23:03:13.301133 TX Vref Scan disable
8521 23:03:13.307291 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =262/100 ps
8522 23:03:13.307371 == TX Byte 0 ==
8523 23:03:13.310547 u2DelayCellOfst[0]=22 cells (6 PI)
8524 23:03:13.313956 u2DelayCellOfst[1]=14 cells (4 PI)
8525 23:03:13.317832 u2DelayCellOfst[2]=0 cells (0 PI)
8526 23:03:13.320497 u2DelayCellOfst[3]=7 cells (2 PI)
8527 23:03:13.324140 u2DelayCellOfst[4]=11 cells (3 PI)
8528 23:03:13.327181 u2DelayCellOfst[5]=22 cells (6 PI)
8529 23:03:13.330271 u2DelayCellOfst[6]=22 cells (6 PI)
8530 23:03:13.333578 u2DelayCellOfst[7]=7 cells (2 PI)
8531 23:03:13.337160 Update DQ dly =976 (3 ,6, 16) DQ OEN =(3 ,3)
8532 23:03:13.340322 Update DQM dly =979 (3 ,6, 19) DQM OEN =(3 ,3)
8533 23:03:13.343536 == TX Byte 1 ==
8534 23:03:13.346695 u2DelayCellOfst[8]=0 cells (0 PI)
8535 23:03:13.350263 u2DelayCellOfst[9]=3 cells (1 PI)
8536 23:03:13.353864 u2DelayCellOfst[10]=11 cells (3 PI)
8537 23:03:13.353949 u2DelayCellOfst[11]=3 cells (1 PI)
8538 23:03:13.356847 u2DelayCellOfst[12]=14 cells (4 PI)
8539 23:03:13.360359 u2DelayCellOfst[13]=14 cells (4 PI)
8540 23:03:13.363375 u2DelayCellOfst[14]=18 cells (5 PI)
8541 23:03:13.366803 u2DelayCellOfst[15]=18 cells (5 PI)
8542 23:03:13.373371 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
8543 23:03:13.376519 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8544 23:03:13.376593 DramC Write-DBI on
8545 23:03:13.379843 ==
8546 23:03:13.379915 Dram Type= 6, Freq= 0, CH_1, rank 0
8547 23:03:13.386791 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8548 23:03:13.386866 ==
8549 23:03:13.386928
8550 23:03:13.386994
8551 23:03:13.389597 TX Vref Scan disable
8552 23:03:13.389666 == TX Byte 0 ==
8553 23:03:13.396851 Update DQM dly =720 (2 ,6, 16) DQM OEN =(3 ,3)
8554 23:03:13.396928 == TX Byte 1 ==
8555 23:03:13.399901 Update DQM dly =721 (2 ,6, 17) DQM OEN =(3 ,3)
8556 23:03:13.403364 DramC Write-DBI off
8557 23:03:13.403438
8558 23:03:13.403507 [DATLAT]
8559 23:03:13.406275 Freq=1600, CH1 RK0
8560 23:03:13.406348
8561 23:03:13.406419 DATLAT Default: 0xf
8562 23:03:13.409405 0, 0xFFFF, sum = 0
8563 23:03:13.409519 1, 0xFFFF, sum = 0
8564 23:03:13.412557 2, 0xFFFF, sum = 0
8565 23:03:13.412635 3, 0xFFFF, sum = 0
8566 23:03:13.416299 4, 0xFFFF, sum = 0
8567 23:03:13.416375 5, 0xFFFF, sum = 0
8568 23:03:13.419557 6, 0xFFFF, sum = 0
8569 23:03:13.423027 7, 0xFFFF, sum = 0
8570 23:03:13.423101 8, 0xFFFF, sum = 0
8571 23:03:13.426058 9, 0xFFFF, sum = 0
8572 23:03:13.426129 10, 0xFFFF, sum = 0
8573 23:03:13.429557 11, 0xFFFF, sum = 0
8574 23:03:13.429636 12, 0xFFFF, sum = 0
8575 23:03:13.432312 13, 0xFFFF, sum = 0
8576 23:03:13.432381 14, 0x0, sum = 1
8577 23:03:13.435756 15, 0x0, sum = 2
8578 23:03:13.435831 16, 0x0, sum = 3
8579 23:03:13.439222 17, 0x0, sum = 4
8580 23:03:13.439293 best_step = 15
8581 23:03:13.439360
8582 23:03:13.439418 ==
8583 23:03:13.442196 Dram Type= 6, Freq= 0, CH_1, rank 0
8584 23:03:13.445586 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8585 23:03:13.448794 ==
8586 23:03:13.448866 RX Vref Scan: 1
8587 23:03:13.448927
8588 23:03:13.452547 Set Vref Range= 24 -> 127
8589 23:03:13.452616
8590 23:03:13.455521 RX Vref 24 -> 127, step: 1
8591 23:03:13.455587
8592 23:03:13.455645 RX Delay 11 -> 252, step: 4
8593 23:03:13.455708
8594 23:03:13.458624 Set Vref, RX VrefLevel [Byte0]: 24
8595 23:03:13.462036 [Byte1]: 24
8596 23:03:13.466013
8597 23:03:13.466086 Set Vref, RX VrefLevel [Byte0]: 25
8598 23:03:13.469019 [Byte1]: 25
8599 23:03:13.473777
8600 23:03:13.473848 Set Vref, RX VrefLevel [Byte0]: 26
8601 23:03:13.476804 [Byte1]: 26
8602 23:03:13.481184
8603 23:03:13.481257 Set Vref, RX VrefLevel [Byte0]: 27
8604 23:03:13.484459 [Byte1]: 27
8605 23:03:13.488643
8606 23:03:13.488717 Set Vref, RX VrefLevel [Byte0]: 28
8607 23:03:13.491948 [Byte1]: 28
8608 23:03:13.496557
8609 23:03:13.496640 Set Vref, RX VrefLevel [Byte0]: 29
8610 23:03:13.499848 [Byte1]: 29
8611 23:03:13.503848
8612 23:03:13.503922 Set Vref, RX VrefLevel [Byte0]: 30
8613 23:03:13.507401 [Byte1]: 30
8614 23:03:13.511725
8615 23:03:13.511801 Set Vref, RX VrefLevel [Byte0]: 31
8616 23:03:13.515124 [Byte1]: 31
8617 23:03:13.519436
8618 23:03:13.519519 Set Vref, RX VrefLevel [Byte0]: 32
8619 23:03:13.522323 [Byte1]: 32
8620 23:03:13.526731
8621 23:03:13.526796 Set Vref, RX VrefLevel [Byte0]: 33
8622 23:03:13.530416 [Byte1]: 33
8623 23:03:13.534517
8624 23:03:13.534589 Set Vref, RX VrefLevel [Byte0]: 34
8625 23:03:13.537697 [Byte1]: 34
8626 23:03:13.542266
8627 23:03:13.542339 Set Vref, RX VrefLevel [Byte0]: 35
8628 23:03:13.545380 [Byte1]: 35
8629 23:03:13.549934
8630 23:03:13.550003 Set Vref, RX VrefLevel [Byte0]: 36
8631 23:03:13.553105 [Byte1]: 36
8632 23:03:13.557305
8633 23:03:13.557377 Set Vref, RX VrefLevel [Byte0]: 37
8634 23:03:13.560500 [Byte1]: 37
8635 23:03:13.564963
8636 23:03:13.565029 Set Vref, RX VrefLevel [Byte0]: 38
8637 23:03:13.568341 [Byte1]: 38
8638 23:03:13.572542
8639 23:03:13.572616 Set Vref, RX VrefLevel [Byte0]: 39
8640 23:03:13.575815 [Byte1]: 39
8641 23:03:13.580107
8642 23:03:13.580173 Set Vref, RX VrefLevel [Byte0]: 40
8643 23:03:13.583216 [Byte1]: 40
8644 23:03:13.587934
8645 23:03:13.588008 Set Vref, RX VrefLevel [Byte0]: 41
8646 23:03:13.590937 [Byte1]: 41
8647 23:03:13.595361
8648 23:03:13.595437 Set Vref, RX VrefLevel [Byte0]: 42
8649 23:03:13.598557 [Byte1]: 42
8650 23:03:13.602913
8651 23:03:13.602987 Set Vref, RX VrefLevel [Byte0]: 43
8652 23:03:13.606221 [Byte1]: 43
8653 23:03:13.610713
8654 23:03:13.610784 Set Vref, RX VrefLevel [Byte0]: 44
8655 23:03:13.613913 [Byte1]: 44
8656 23:03:13.618465
8657 23:03:13.618560 Set Vref, RX VrefLevel [Byte0]: 45
8658 23:03:13.622029 [Byte1]: 45
8659 23:03:13.626268
8660 23:03:13.626343 Set Vref, RX VrefLevel [Byte0]: 46
8661 23:03:13.629030 [Byte1]: 46
8662 23:03:13.633356
8663 23:03:13.633430 Set Vref, RX VrefLevel [Byte0]: 47
8664 23:03:13.636995 [Byte1]: 47
8665 23:03:13.641151
8666 23:03:13.641219 Set Vref, RX VrefLevel [Byte0]: 48
8667 23:03:13.644510 [Byte1]: 48
8668 23:03:13.648726
8669 23:03:13.648842 Set Vref, RX VrefLevel [Byte0]: 49
8670 23:03:13.652083 [Byte1]: 49
8671 23:03:13.656542
8672 23:03:13.656645 Set Vref, RX VrefLevel [Byte0]: 50
8673 23:03:13.659708 [Byte1]: 50
8674 23:03:13.663744
8675 23:03:13.663842 Set Vref, RX VrefLevel [Byte0]: 51
8676 23:03:13.667156 [Byte1]: 51
8677 23:03:13.671673
8678 23:03:13.671753 Set Vref, RX VrefLevel [Byte0]: 52
8679 23:03:13.675170 [Byte1]: 52
8680 23:03:13.679292
8681 23:03:13.679372 Set Vref, RX VrefLevel [Byte0]: 53
8682 23:03:13.682611 [Byte1]: 53
8683 23:03:13.686789
8684 23:03:13.686868 Set Vref, RX VrefLevel [Byte0]: 54
8685 23:03:13.689899 [Byte1]: 54
8686 23:03:13.694296
8687 23:03:13.694375 Set Vref, RX VrefLevel [Byte0]: 55
8688 23:03:13.697580 [Byte1]: 55
8689 23:03:13.702146
8690 23:03:13.702230 Set Vref, RX VrefLevel [Byte0]: 56
8691 23:03:13.705047 [Byte1]: 56
8692 23:03:13.709756
8693 23:03:13.709828 Set Vref, RX VrefLevel [Byte0]: 57
8694 23:03:13.712981 [Byte1]: 57
8695 23:03:13.717575
8696 23:03:13.717645 Set Vref, RX VrefLevel [Byte0]: 58
8697 23:03:13.720378 [Byte1]: 58
8698 23:03:13.725136
8699 23:03:13.725273 Set Vref, RX VrefLevel [Byte0]: 59
8700 23:03:13.728197 [Byte1]: 59
8701 23:03:13.732220
8702 23:03:13.732309 Set Vref, RX VrefLevel [Byte0]: 60
8703 23:03:13.735677 [Byte1]: 60
8704 23:03:13.740271
8705 23:03:13.740346 Set Vref, RX VrefLevel [Byte0]: 61
8706 23:03:13.743650 [Byte1]: 61
8707 23:03:13.747685
8708 23:03:13.747768 Set Vref, RX VrefLevel [Byte0]: 62
8709 23:03:13.751060 [Byte1]: 62
8710 23:03:13.755233
8711 23:03:13.755308 Set Vref, RX VrefLevel [Byte0]: 63
8712 23:03:13.758775 [Byte1]: 63
8713 23:03:13.762700
8714 23:03:13.762775 Set Vref, RX VrefLevel [Byte0]: 64
8715 23:03:13.766247 [Byte1]: 64
8716 23:03:13.770866
8717 23:03:13.770944 Set Vref, RX VrefLevel [Byte0]: 65
8718 23:03:13.774339 [Byte1]: 65
8719 23:03:13.778019
8720 23:03:13.778096 Set Vref, RX VrefLevel [Byte0]: 66
8721 23:03:13.781165 [Byte1]: 66
8722 23:03:13.785642
8723 23:03:13.785717 Set Vref, RX VrefLevel [Byte0]: 67
8724 23:03:13.788900 [Byte1]: 67
8725 23:03:13.793337
8726 23:03:13.793455 Set Vref, RX VrefLevel [Byte0]: 68
8727 23:03:13.796673 [Byte1]: 68
8728 23:03:13.800739
8729 23:03:13.800841 Set Vref, RX VrefLevel [Byte0]: 69
8730 23:03:13.804298 [Byte1]: 69
8731 23:03:13.808415
8732 23:03:13.808517 Set Vref, RX VrefLevel [Byte0]: 70
8733 23:03:13.812098 [Byte1]: 70
8734 23:03:13.815838
8735 23:03:13.815936 Set Vref, RX VrefLevel [Byte0]: 71
8736 23:03:13.819577 [Byte1]: 71
8737 23:03:13.823933
8738 23:03:13.824018 Set Vref, RX VrefLevel [Byte0]: 72
8739 23:03:13.827091 [Byte1]: 72
8740 23:03:13.831421
8741 23:03:13.831537 Set Vref, RX VrefLevel [Byte0]: 73
8742 23:03:13.834703 [Byte1]: 73
8743 23:03:13.838798
8744 23:03:13.838868 Set Vref, RX VrefLevel [Byte0]: 74
8745 23:03:13.842131 [Byte1]: 74
8746 23:03:13.846405
8747 23:03:13.846485 Set Vref, RX VrefLevel [Byte0]: 75
8748 23:03:13.849856 [Byte1]: 75
8749 23:03:13.854210
8750 23:03:13.854283 Final RX Vref Byte 0 = 51 to rank0
8751 23:03:13.857272 Final RX Vref Byte 1 = 61 to rank0
8752 23:03:13.860666 Final RX Vref Byte 0 = 51 to rank1
8753 23:03:13.864185 Final RX Vref Byte 1 = 61 to rank1==
8754 23:03:13.867515 Dram Type= 6, Freq= 0, CH_1, rank 0
8755 23:03:13.873764 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8756 23:03:13.873856 ==
8757 23:03:13.873918 DQS Delay:
8758 23:03:13.877255 DQS0 = 0, DQS1 = 0
8759 23:03:13.877358 DQM Delay:
8760 23:03:13.877466 DQM0 = 134, DQM1 = 127
8761 23:03:13.880786 DQ Delay:
8762 23:03:13.884079 DQ0 =142, DQ1 =128, DQ2 =124, DQ3 =132
8763 23:03:13.887177 DQ4 =132, DQ5 =148, DQ6 =144, DQ7 =128
8764 23:03:13.890643 DQ8 =114, DQ9 =114, DQ10 =130, DQ11 =118
8765 23:03:13.893811 DQ12 =136, DQ13 =134, DQ14 =138, DQ15 =138
8766 23:03:13.893885
8767 23:03:13.893948
8768 23:03:13.894007
8769 23:03:13.897024 [DramC_TX_OE_Calibration] TA2
8770 23:03:13.900489 Original DQ_B0 (3 6) =30, OEN = 27
8771 23:03:13.903958 Original DQ_B1 (3 6) =30, OEN = 27
8772 23:03:13.906953 24, 0x0, End_B0=24 End_B1=24
8773 23:03:13.910042 25, 0x0, End_B0=25 End_B1=25
8774 23:03:13.910128 26, 0x0, End_B0=26 End_B1=26
8775 23:03:13.913260 27, 0x0, End_B0=27 End_B1=27
8776 23:03:13.917044 28, 0x0, End_B0=28 End_B1=28
8777 23:03:13.919951 29, 0x0, End_B0=29 End_B1=29
8778 23:03:13.920029 30, 0x0, End_B0=30 End_B1=30
8779 23:03:13.923354 31, 0x4141, End_B0=30 End_B1=30
8780 23:03:13.926819 Byte0 end_step=30 best_step=27
8781 23:03:13.930152 Byte1 end_step=30 best_step=27
8782 23:03:13.933294 Byte0 TX OE(2T, 0.5T) = (3, 3)
8783 23:03:13.936463 Byte1 TX OE(2T, 0.5T) = (3, 3)
8784 23:03:13.936569
8785 23:03:13.936666
8786 23:03:13.943007 [DQSOSCAuto] RK0, (LSB)MR18= 0x180e, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 397 ps
8787 23:03:13.946523 CH1 RK0: MR19=303, MR18=180E
8788 23:03:13.952856 CH1_RK0: MR19=0x303, MR18=0x180E, DQSOSC=397, MR23=63, INC=23, DEC=15
8789 23:03:13.952944
8790 23:03:13.956438 ----->DramcWriteLeveling(PI) begin...
8791 23:03:13.956541 ==
8792 23:03:13.959785 Dram Type= 6, Freq= 0, CH_1, rank 1
8793 23:03:13.963181 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8794 23:03:13.963290 ==
8795 23:03:13.966240 Write leveling (Byte 0): 22 => 22
8796 23:03:13.969393 Write leveling (Byte 1): 28 => 28
8797 23:03:13.972450 DramcWriteLeveling(PI) end<-----
8798 23:03:13.972526
8799 23:03:13.972591 ==
8800 23:03:13.975989 Dram Type= 6, Freq= 0, CH_1, rank 1
8801 23:03:13.982748 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8802 23:03:13.982855 ==
8803 23:03:13.982954 [Gating] SW mode calibration
8804 23:03:13.992350 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8805 23:03:13.995815 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8806 23:03:14.002688 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8807 23:03:14.006155 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8808 23:03:14.008648 1 4 8 | B1->B0 | 2323 2323 | 1 0 | (1 1) (0 0)
8809 23:03:14.015261 1 4 12 | B1->B0 | 3232 2928 | 0 1 | (0 0) (0 0)
8810 23:03:14.018831 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8811 23:03:14.021905 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8812 23:03:14.025166 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8813 23:03:14.031770 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8814 23:03:14.035057 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8815 23:03:14.038706 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8816 23:03:14.045274 1 5 8 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 0)
8817 23:03:14.048575 1 5 12 | B1->B0 | 2e2e 3333 | 1 1 | (0 1) (0 1)
8818 23:03:14.055171 1 5 16 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 1)
8819 23:03:14.058521 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8820 23:03:14.061479 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8821 23:03:14.068397 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8822 23:03:14.071402 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8823 23:03:14.074604 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8824 23:03:14.081142 1 6 8 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
8825 23:03:14.084670 1 6 12 | B1->B0 | 4444 3231 | 0 1 | (0 0) (0 0)
8826 23:03:14.088101 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8827 23:03:14.094274 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8828 23:03:14.097647 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8829 23:03:14.100856 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8830 23:03:14.107367 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8831 23:03:14.111105 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8832 23:03:14.114332 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
8833 23:03:14.120571 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8834 23:03:14.124192 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8835 23:03:14.127356 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8836 23:03:14.134221 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8837 23:03:14.137497 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8838 23:03:14.140311 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8839 23:03:14.146933 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8840 23:03:14.150233 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8841 23:03:14.153500 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8842 23:03:14.160335 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8843 23:03:14.163774 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8844 23:03:14.167175 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8845 23:03:14.173384 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8846 23:03:14.176618 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8847 23:03:14.180577 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8848 23:03:14.186585 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
8849 23:03:14.190009 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8850 23:03:14.193351 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8851 23:03:14.196639 Total UI for P1: 0, mck2ui 16
8852 23:03:14.200059 best dqsien dly found for B0: ( 1, 9, 12)
8853 23:03:14.203609 Total UI for P1: 0, mck2ui 16
8854 23:03:14.206604 best dqsien dly found for B1: ( 1, 9, 10)
8855 23:03:14.210040 best DQS0 dly(MCK, UI, PI) = (1, 9, 12)
8856 23:03:14.213201 best DQS1 dly(MCK, UI, PI) = (1, 9, 10)
8857 23:03:14.213309
8858 23:03:14.216557 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 12)
8859 23:03:14.223368 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 10)
8860 23:03:14.223480 [Gating] SW calibration Done
8861 23:03:14.226427 ==
8862 23:03:14.226545 Dram Type= 6, Freq= 0, CH_1, rank 1
8863 23:03:14.233096 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8864 23:03:14.233203 ==
8865 23:03:14.233307 RX Vref Scan: 0
8866 23:03:14.233403
8867 23:03:14.236273 RX Vref 0 -> 0, step: 1
8868 23:03:14.236379
8869 23:03:14.240146 RX Delay 0 -> 252, step: 8
8870 23:03:14.243181 iDelay=208, Bit 0, Center 143 (88 ~ 199) 112
8871 23:03:14.246208 iDelay=208, Bit 1, Center 135 (80 ~ 191) 112
8872 23:03:14.249647 iDelay=208, Bit 2, Center 123 (64 ~ 183) 120
8873 23:03:14.255970 iDelay=208, Bit 3, Center 135 (80 ~ 191) 112
8874 23:03:14.259383 iDelay=208, Bit 4, Center 135 (80 ~ 191) 112
8875 23:03:14.262941 iDelay=208, Bit 5, Center 151 (96 ~ 207) 112
8876 23:03:14.265865 iDelay=208, Bit 6, Center 151 (96 ~ 207) 112
8877 23:03:14.269133 iDelay=208, Bit 7, Center 135 (80 ~ 191) 112
8878 23:03:14.275757 iDelay=208, Bit 8, Center 115 (56 ~ 175) 120
8879 23:03:14.279587 iDelay=208, Bit 9, Center 115 (56 ~ 175) 120
8880 23:03:14.282805 iDelay=208, Bit 10, Center 131 (72 ~ 191) 120
8881 23:03:14.285464 iDelay=208, Bit 11, Center 123 (64 ~ 183) 120
8882 23:03:14.292429 iDelay=208, Bit 12, Center 139 (80 ~ 199) 120
8883 23:03:14.295671 iDelay=208, Bit 13, Center 139 (80 ~ 199) 120
8884 23:03:14.298865 iDelay=208, Bit 14, Center 135 (80 ~ 191) 112
8885 23:03:14.301985 iDelay=208, Bit 15, Center 139 (80 ~ 199) 120
8886 23:03:14.302088 ==
8887 23:03:14.306001 Dram Type= 6, Freq= 0, CH_1, rank 1
8888 23:03:14.312142 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8889 23:03:14.312244 ==
8890 23:03:14.312341 DQS Delay:
8891 23:03:14.315090 DQS0 = 0, DQS1 = 0
8892 23:03:14.315167 DQM Delay:
8893 23:03:14.315232 DQM0 = 138, DQM1 = 129
8894 23:03:14.318449 DQ Delay:
8895 23:03:14.322315 DQ0 =143, DQ1 =135, DQ2 =123, DQ3 =135
8896 23:03:14.325214 DQ4 =135, DQ5 =151, DQ6 =151, DQ7 =135
8897 23:03:14.328715 DQ8 =115, DQ9 =115, DQ10 =131, DQ11 =123
8898 23:03:14.331868 DQ12 =139, DQ13 =139, DQ14 =135, DQ15 =139
8899 23:03:14.331952
8900 23:03:14.332022
8901 23:03:14.332083 ==
8902 23:03:14.335371 Dram Type= 6, Freq= 0, CH_1, rank 1
8903 23:03:14.341498 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8904 23:03:14.341601 ==
8905 23:03:14.341698
8906 23:03:14.341789
8907 23:03:14.341877 TX Vref Scan disable
8908 23:03:14.345118 == TX Byte 0 ==
8909 23:03:14.348280 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8910 23:03:14.355029 Update DQM dly =979 (3 ,6, 19) DQM OEN =(3 ,3)
8911 23:03:14.355134 == TX Byte 1 ==
8912 23:03:14.357967 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8913 23:03:14.364478 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8914 23:03:14.364585 ==
8915 23:03:14.367765 Dram Type= 6, Freq= 0, CH_1, rank 1
8916 23:03:14.370993 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8917 23:03:14.371096 ==
8918 23:03:14.383926
8919 23:03:14.387382 TX Vref early break, caculate TX vref
8920 23:03:14.391109 TX Vref=16, minBit 1, minWin=22, winSum=383
8921 23:03:14.394033 TX Vref=18, minBit 0, minWin=22, winSum=390
8922 23:03:14.397178 TX Vref=20, minBit 1, minWin=23, winSum=399
8923 23:03:14.400664 TX Vref=22, minBit 0, minWin=24, winSum=408
8924 23:03:14.404034 TX Vref=24, minBit 0, minWin=24, winSum=413
8925 23:03:14.410595 TX Vref=26, minBit 0, minWin=25, winSum=421
8926 23:03:14.413911 TX Vref=28, minBit 0, minWin=24, winSum=423
8927 23:03:14.417574 TX Vref=30, minBit 5, minWin=24, winSum=415
8928 23:03:14.420173 TX Vref=32, minBit 0, minWin=23, winSum=406
8929 23:03:14.423595 TX Vref=34, minBit 0, minWin=22, winSum=394
8930 23:03:14.430471 [TxChooseVref] Worse bit 0, Min win 25, Win sum 421, Final Vref 26
8931 23:03:14.430558
8932 23:03:14.433850 Final TX Range 0 Vref 26
8933 23:03:14.433934
8934 23:03:14.434000 ==
8935 23:03:14.436746 Dram Type= 6, Freq= 0, CH_1, rank 1
8936 23:03:14.439934 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8937 23:03:14.440017 ==
8938 23:03:14.440083
8939 23:03:14.440145
8940 23:03:14.443450 TX Vref Scan disable
8941 23:03:14.450456 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =262/100 ps
8942 23:03:14.450542 == TX Byte 0 ==
8943 23:03:14.453516 u2DelayCellOfst[0]=22 cells (6 PI)
8944 23:03:14.457070 u2DelayCellOfst[1]=14 cells (4 PI)
8945 23:03:14.459904 u2DelayCellOfst[2]=0 cells (0 PI)
8946 23:03:14.463288 u2DelayCellOfst[3]=7 cells (2 PI)
8947 23:03:14.466654 u2DelayCellOfst[4]=7 cells (2 PI)
8948 23:03:14.469645 u2DelayCellOfst[5]=22 cells (6 PI)
8949 23:03:14.473374 u2DelayCellOfst[6]=22 cells (6 PI)
8950 23:03:14.476295 u2DelayCellOfst[7]=7 cells (2 PI)
8951 23:03:14.479742 Update DQ dly =976 (3 ,6, 16) DQ OEN =(3 ,3)
8952 23:03:14.483229 Update DQM dly =979 (3 ,6, 19) DQM OEN =(3 ,3)
8953 23:03:14.486239 == TX Byte 1 ==
8954 23:03:14.489825 u2DelayCellOfst[8]=0 cells (0 PI)
8955 23:03:14.489909 u2DelayCellOfst[9]=7 cells (2 PI)
8956 23:03:14.493291 u2DelayCellOfst[10]=11 cells (3 PI)
8957 23:03:14.496530 u2DelayCellOfst[11]=3 cells (1 PI)
8958 23:03:14.500342 u2DelayCellOfst[12]=14 cells (4 PI)
8959 23:03:14.502936 u2DelayCellOfst[13]=14 cells (4 PI)
8960 23:03:14.506480 u2DelayCellOfst[14]=18 cells (5 PI)
8961 23:03:14.509052 u2DelayCellOfst[15]=18 cells (5 PI)
8962 23:03:14.515984 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8963 23:03:14.519206 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8964 23:03:14.519290 DramC Write-DBI on
8965 23:03:14.522566 ==
8966 23:03:14.522649 Dram Type= 6, Freq= 0, CH_1, rank 1
8967 23:03:14.529302 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8968 23:03:14.529422 ==
8969 23:03:14.529492
8970 23:03:14.529553
8971 23:03:14.532200 TX Vref Scan disable
8972 23:03:14.532285 == TX Byte 0 ==
8973 23:03:14.539077 Update DQM dly =720 (2 ,6, 16) DQM OEN =(3 ,3)
8974 23:03:14.539161 == TX Byte 1 ==
8975 23:03:14.542100 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8976 23:03:14.545303 DramC Write-DBI off
8977 23:03:14.545430
8978 23:03:14.545536 [DATLAT]
8979 23:03:14.548811 Freq=1600, CH1 RK1
8980 23:03:14.548923
8981 23:03:14.549018 DATLAT Default: 0xf
8982 23:03:14.552022 0, 0xFFFF, sum = 0
8983 23:03:14.552133 1, 0xFFFF, sum = 0
8984 23:03:14.555288 2, 0xFFFF, sum = 0
8985 23:03:14.555372 3, 0xFFFF, sum = 0
8986 23:03:14.558766 4, 0xFFFF, sum = 0
8987 23:03:14.562700 5, 0xFFFF, sum = 0
8988 23:03:14.562815 6, 0xFFFF, sum = 0
8989 23:03:14.565089 7, 0xFFFF, sum = 0
8990 23:03:14.565205 8, 0xFFFF, sum = 0
8991 23:03:14.568338 9, 0xFFFF, sum = 0
8992 23:03:14.568441 10, 0xFFFF, sum = 0
8993 23:03:14.571575 11, 0xFFFF, sum = 0
8994 23:03:14.571676 12, 0xFFFF, sum = 0
8995 23:03:14.574820 13, 0xFFFF, sum = 0
8996 23:03:14.574926 14, 0x0, sum = 1
8997 23:03:14.578067 15, 0x0, sum = 2
8998 23:03:14.578143 16, 0x0, sum = 3
8999 23:03:14.581962 17, 0x0, sum = 4
9000 23:03:14.582057 best_step = 15
9001 23:03:14.582119
9002 23:03:14.582178 ==
9003 23:03:14.584965 Dram Type= 6, Freq= 0, CH_1, rank 1
9004 23:03:14.588084 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
9005 23:03:14.591198 ==
9006 23:03:14.591269 RX Vref Scan: 0
9007 23:03:14.591330
9008 23:03:14.594568 RX Vref 0 -> 0, step: 1
9009 23:03:14.594643
9010 23:03:14.598048 RX Delay 11 -> 252, step: 4
9011 23:03:14.601660 iDelay=203, Bit 0, Center 138 (87 ~ 190) 104
9012 23:03:14.604161 iDelay=203, Bit 1, Center 128 (75 ~ 182) 108
9013 23:03:14.607830 iDelay=203, Bit 2, Center 122 (67 ~ 178) 112
9014 23:03:14.614571 iDelay=203, Bit 3, Center 132 (83 ~ 182) 100
9015 23:03:14.617889 iDelay=203, Bit 4, Center 134 (79 ~ 190) 112
9016 23:03:14.620680 iDelay=203, Bit 5, Center 146 (95 ~ 198) 104
9017 23:03:14.624063 iDelay=203, Bit 6, Center 148 (95 ~ 202) 108
9018 23:03:14.630716 iDelay=203, Bit 7, Center 132 (79 ~ 186) 108
9019 23:03:14.634340 iDelay=203, Bit 8, Center 112 (55 ~ 170) 116
9020 23:03:14.637496 iDelay=203, Bit 9, Center 114 (59 ~ 170) 112
9021 23:03:14.640778 iDelay=203, Bit 10, Center 126 (71 ~ 182) 112
9022 23:03:14.643982 iDelay=203, Bit 11, Center 118 (63 ~ 174) 112
9023 23:03:14.650283 iDelay=203, Bit 12, Center 134 (79 ~ 190) 112
9024 23:03:14.653828 iDelay=203, Bit 13, Center 136 (83 ~ 190) 108
9025 23:03:14.657384 iDelay=203, Bit 14, Center 134 (79 ~ 190) 112
9026 23:03:14.660073 iDelay=203, Bit 15, Center 138 (83 ~ 194) 112
9027 23:03:14.660149 ==
9028 23:03:14.663495 Dram Type= 6, Freq= 0, CH_1, rank 1
9029 23:03:14.670170 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
9030 23:03:14.670251 ==
9031 23:03:14.670315 DQS Delay:
9032 23:03:14.673423 DQS0 = 0, DQS1 = 0
9033 23:03:14.673498 DQM Delay:
9034 23:03:14.676782 DQM0 = 135, DQM1 = 126
9035 23:03:14.676857 DQ Delay:
9036 23:03:14.679880 DQ0 =138, DQ1 =128, DQ2 =122, DQ3 =132
9037 23:03:14.683121 DQ4 =134, DQ5 =146, DQ6 =148, DQ7 =132
9038 23:03:14.686358 DQ8 =112, DQ9 =114, DQ10 =126, DQ11 =118
9039 23:03:14.689722 DQ12 =134, DQ13 =136, DQ14 =134, DQ15 =138
9040 23:03:14.689802
9041 23:03:14.689867
9042 23:03:14.689928
9043 23:03:14.693242 [DramC_TX_OE_Calibration] TA2
9044 23:03:14.696804 Original DQ_B0 (3 6) =30, OEN = 27
9045 23:03:14.699696 Original DQ_B1 (3 6) =30, OEN = 27
9046 23:03:14.703187 24, 0x0, End_B0=24 End_B1=24
9047 23:03:14.706562 25, 0x0, End_B0=25 End_B1=25
9048 23:03:14.706669 26, 0x0, End_B0=26 End_B1=26
9049 23:03:14.709663 27, 0x0, End_B0=27 End_B1=27
9050 23:03:14.712891 28, 0x0, End_B0=28 End_B1=28
9051 23:03:14.716141 29, 0x0, End_B0=29 End_B1=29
9052 23:03:14.719843 30, 0x0, End_B0=30 End_B1=30
9053 23:03:14.719928 31, 0x4141, End_B0=30 End_B1=30
9054 23:03:14.722737 Byte0 end_step=30 best_step=27
9055 23:03:14.726380 Byte1 end_step=30 best_step=27
9056 23:03:14.729826 Byte0 TX OE(2T, 0.5T) = (3, 3)
9057 23:03:14.733090 Byte1 TX OE(2T, 0.5T) = (3, 3)
9058 23:03:14.733193
9059 23:03:14.733286
9060 23:03:14.739493 [DQSOSCAuto] RK1, (LSB)MR18= 0xc09, (MSB)MR19= 0x303, tDQSOscB0 = 405 ps tDQSOscB1 = 403 ps
9061 23:03:14.742545 CH1 RK1: MR19=303, MR18=C09
9062 23:03:14.749634 CH1_RK1: MR19=0x303, MR18=0xC09, DQSOSC=403, MR23=63, INC=22, DEC=15
9063 23:03:14.752313 [RxdqsGatingPostProcess] freq 1600
9064 23:03:14.759207 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
9065 23:03:14.759292 best DQS0 dly(2T, 0.5T) = (1, 1)
9066 23:03:14.762774 best DQS1 dly(2T, 0.5T) = (1, 1)
9067 23:03:14.766215 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
9068 23:03:14.769237 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9069 23:03:14.772987 best DQS0 dly(2T, 0.5T) = (1, 1)
9070 23:03:14.775863 best DQS1 dly(2T, 0.5T) = (1, 1)
9071 23:03:14.779064 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
9072 23:03:14.782461 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9073 23:03:14.785566 Pre-setting of DQS Precalculation
9074 23:03:14.789154 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
9075 23:03:14.799032 sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0
9076 23:03:14.805375 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9077 23:03:14.805489
9078 23:03:14.805583
9079 23:03:14.809393 [Calibration Summary] 3200 Mbps
9080 23:03:14.809500 CH 0, Rank 0
9081 23:03:14.812049 SW Impedance : PASS
9082 23:03:14.812120 DUTY Scan : NO K
9083 23:03:14.815310 ZQ Calibration : PASS
9084 23:03:14.819345 Jitter Meter : NO K
9085 23:03:14.819421 CBT Training : PASS
9086 23:03:14.822084 Write leveling : PASS
9087 23:03:14.825851 RX DQS gating : PASS
9088 23:03:14.825923 RX DQ/DQS(RDDQC) : PASS
9089 23:03:14.828794 TX DQ/DQS : PASS
9090 23:03:14.832186 RX DATLAT : PASS
9091 23:03:14.832264 RX DQ/DQS(Engine): PASS
9092 23:03:14.835383 TX OE : PASS
9093 23:03:14.835490 All Pass.
9094 23:03:14.835581
9095 23:03:14.838703 CH 0, Rank 1
9096 23:03:14.838784 SW Impedance : PASS
9097 23:03:14.842098 DUTY Scan : NO K
9098 23:03:14.842169 ZQ Calibration : PASS
9099 23:03:14.845636 Jitter Meter : NO K
9100 23:03:14.848522 CBT Training : PASS
9101 23:03:14.848606 Write leveling : PASS
9102 23:03:14.851882 RX DQS gating : PASS
9103 23:03:14.855107 RX DQ/DQS(RDDQC) : PASS
9104 23:03:14.855190 TX DQ/DQS : PASS
9105 23:03:14.858466 RX DATLAT : PASS
9106 23:03:14.861705 RX DQ/DQS(Engine): PASS
9107 23:03:14.861792 TX OE : PASS
9108 23:03:14.865173 All Pass.
9109 23:03:14.865259
9110 23:03:14.865354 CH 1, Rank 0
9111 23:03:14.868785 SW Impedance : PASS
9112 23:03:14.868891 DUTY Scan : NO K
9113 23:03:14.871519 ZQ Calibration : PASS
9114 23:03:14.875026 Jitter Meter : NO K
9115 23:03:14.875110 CBT Training : PASS
9116 23:03:14.878482 Write leveling : PASS
9117 23:03:14.881940 RX DQS gating : PASS
9118 23:03:14.882022 RX DQ/DQS(RDDQC) : PASS
9119 23:03:14.885282 TX DQ/DQS : PASS
9120 23:03:14.888110 RX DATLAT : PASS
9121 23:03:14.888193 RX DQ/DQS(Engine): PASS
9122 23:03:14.891729 TX OE : PASS
9123 23:03:14.891813 All Pass.
9124 23:03:14.891878
9125 23:03:14.894580 CH 1, Rank 1
9126 23:03:14.894685 SW Impedance : PASS
9127 23:03:14.897883 DUTY Scan : NO K
9128 23:03:14.901581 ZQ Calibration : PASS
9129 23:03:14.901681 Jitter Meter : NO K
9130 23:03:14.904621 CBT Training : PASS
9131 23:03:14.908017 Write leveling : PASS
9132 23:03:14.908121 RX DQS gating : PASS
9133 23:03:14.911258 RX DQ/DQS(RDDQC) : PASS
9134 23:03:14.911333 TX DQ/DQS : PASS
9135 23:03:14.914271 RX DATLAT : PASS
9136 23:03:14.917571 RX DQ/DQS(Engine): PASS
9137 23:03:14.917648 TX OE : PASS
9138 23:03:14.921186 All Pass.
9139 23:03:14.921263
9140 23:03:14.921325 DramC Write-DBI on
9141 23:03:14.924516 PER_BANK_REFRESH: Hybrid Mode
9142 23:03:14.927597 TX_TRACKING: ON
9143 23:03:14.934778 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0
9144 23:03:14.944096 sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1
9145 23:03:14.950711 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9146 23:03:14.954240 [FAST_K] Save calibration result to emmc
9147 23:03:14.957342 sync common calibartion params.
9148 23:03:14.957452 sync cbt_mode0:1, 1:1
9149 23:03:14.960681 dram_init: ddr_geometry: 2
9150 23:03:14.963809 dram_init: ddr_geometry: 2
9151 23:03:14.967653 dram_init: ddr_geometry: 2
9152 23:03:14.967738 0:dram_rank_size:100000000
9153 23:03:14.970338 1:dram_rank_size:100000000
9154 23:03:14.977047 sync rank num:2, rank0_size:0x100000000, rank1_size:0x100000000
9155 23:03:14.980612 DFS_SHUFFLE_HW_MODE: ON
9156 23:03:14.983677 dramc_set_vcore_voltage set vcore to 725000
9157 23:03:14.983772 Read voltage for 1600, 0
9158 23:03:14.987220 Vio18 = 0
9159 23:03:14.987307 Vcore = 725000
9160 23:03:14.987373 Vdram = 0
9161 23:03:14.990746 Vddq = 0
9162 23:03:14.990847 Vmddr = 0
9163 23:03:14.993545 switch to 3200 Mbps bootup
9164 23:03:14.993629 [DramcRunTimeConfig]
9165 23:03:14.993698 PHYPLL
9166 23:03:14.996687 DPM_CONTROL_AFTERK: ON
9167 23:03:15.000062 PER_BANK_REFRESH: ON
9168 23:03:15.003153 REFRESH_OVERHEAD_REDUCTION: ON
9169 23:03:15.003237 CMD_PICG_NEW_MODE: OFF
9170 23:03:15.006636 XRTWTW_NEW_MODE: ON
9171 23:03:15.006740 XRTRTR_NEW_MODE: ON
9172 23:03:15.010234 TX_TRACKING: ON
9173 23:03:15.010336 RDSEL_TRACKING: OFF
9174 23:03:15.012903 DQS Precalculation for DVFS: ON
9175 23:03:15.016551 RX_TRACKING: OFF
9176 23:03:15.016625 HW_GATING DBG: ON
9177 23:03:15.019758 ZQCS_ENABLE_LP4: ON
9178 23:03:15.019857 RX_PICG_NEW_MODE: ON
9179 23:03:15.023359 TX_PICG_NEW_MODE: ON
9180 23:03:15.023459 ENABLE_RX_DCM_DPHY: ON
9181 23:03:15.026348 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
9182 23:03:15.029385 DUMMY_READ_FOR_TRACKING: OFF
9183 23:03:15.032809 !!! SPM_CONTROL_AFTERK: OFF
9184 23:03:15.036386 !!! SPM could not control APHY
9185 23:03:15.036465 IMPEDANCE_TRACKING: ON
9186 23:03:15.039346 TEMP_SENSOR: ON
9187 23:03:15.039419 HW_SAVE_FOR_SR: OFF
9188 23:03:15.042647 CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF
9189 23:03:15.046105 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF
9190 23:03:15.049082 Read ODT Tracking: ON
9191 23:03:15.052626 Refresh Rate DeBounce: ON
9192 23:03:15.052727 DFS_NO_QUEUE_FLUSH: ON
9193 23:03:15.055845 DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF
9194 23:03:15.059192 ENABLE_DFS_RUNTIME_MRW: OFF
9195 23:03:15.062522 DDR_RESERVE_NEW_MODE: ON
9196 23:03:15.062625 MR_CBT_SWITCH_FREQ: ON
9197 23:03:15.065931 =========================
9198 23:03:15.084880 [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)
9199 23:03:15.088303 dram_init: ddr_geometry: 2
9200 23:03:15.106347 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
9201 23:03:15.109694 dram_init: dram init end (result: 0)
9202 23:03:15.116309 DRAM-K: Full calibration passed in 24642 msecs
9203 23:03:15.119921 MRC: failed to locate region type 0.
9204 23:03:15.120007 DRAM rank0 size:0x100000000,
9205 23:03:15.122758 DRAM rank1 size=0x100000000
9206 23:03:15.132682 Mapping address range [0x40000000:0x240000000) as cacheable | read-write | non-secure | normal
9207 23:03:15.139638 Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal
9208 23:03:15.146100 Backing address range [0x40000000:0x80000000) with new page table @0x00112000
9209 23:03:15.155764 Backing address range [0x40000000:0x40200000) with new page table @0x00113000
9210 23:03:15.155852 DRAM rank0 size:0x100000000,
9211 23:03:15.158862 DRAM rank1 size=0x100000000
9212 23:03:15.158945 CBMEM:
9213 23:03:15.161845 IMD: root @ 0xfffff000 254 entries.
9214 23:03:15.165607 IMD: root @ 0xffffec00 62 entries.
9215 23:03:15.172295 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
9216 23:03:15.175219 WARNING: RO_VPD is uninitialized or empty.
9217 23:03:15.178907 FMAP: area RW_VPD found @ 577000 (16384 bytes)
9218 23:03:15.186432 CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80
9219 23:03:15.199133 read SPI 0x42894 0xe01e: 6225 us, 9216 KB/s, 73.728 Mbps
9220 23:03:15.210303 BS: romstage times (exec / console): total (unknown) / 24134 ms
9221 23:03:15.210417
9222 23:03:15.210513
9223 23:03:15.220300 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...
9224 23:03:15.223382 ARM64: Exception handlers installed.
9225 23:03:15.227005 ARM64: Testing exception
9226 23:03:15.230555 ARM64: Done test exception
9227 23:03:15.230643 Enumerating buses...
9228 23:03:15.233705 Show all devs... Before device enumeration.
9229 23:03:15.237510 Root Device: enabled 1
9230 23:03:15.240353 CPU_CLUSTER: 0: enabled 1
9231 23:03:15.240512 CPU: 00: enabled 1
9232 23:03:15.243289 Compare with tree...
9233 23:03:15.243402 Root Device: enabled 1
9234 23:03:15.247101 CPU_CLUSTER: 0: enabled 1
9235 23:03:15.250161 CPU: 00: enabled 1
9236 23:03:15.250252 Root Device scanning...
9237 23:03:15.253326 scan_static_bus for Root Device
9238 23:03:15.257012 CPU_CLUSTER: 0 enabled
9239 23:03:15.259633 scan_static_bus for Root Device done
9240 23:03:15.263536 scan_bus: bus Root Device finished in 8 msecs
9241 23:03:15.263656 done
9242 23:03:15.269505 BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms
9243 23:03:15.272956 FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)
9244 23:03:15.279761 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
9245 23:03:15.286112 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms
9246 23:03:15.286202 Allocating resources...
9247 23:03:15.289294 Reading resources...
9248 23:03:15.292753 Root Device read_resources bus 0 link: 0
9249 23:03:15.296043 DRAM rank0 size:0x100000000,
9250 23:03:15.296147 DRAM rank1 size=0x100000000
9251 23:03:15.303057 CPU_CLUSTER: 0 read_resources bus 0 link: 0
9252 23:03:15.303163 CPU: 00 missing read_resources
9253 23:03:15.309324 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
9254 23:03:15.312295 Root Device read_resources bus 0 link: 0 done
9255 23:03:15.315711 Done reading resources.
9256 23:03:15.319271 Show resources in subtree (Root Device)...After reading.
9257 23:03:15.322243 Root Device child on link 0 CPU_CLUSTER: 0
9258 23:03:15.325864 CPU_CLUSTER: 0 child on link 0 CPU: 00
9259 23:03:15.335532 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9260 23:03:15.335615 CPU: 00
9261 23:03:15.342144 Root Device assign_resources, bus 0 link: 0
9262 23:03:15.345250 CPU_CLUSTER: 0 missing set_resources
9263 23:03:15.348711 Root Device assign_resources, bus 0 link: 0 done
9264 23:03:15.352456 Done setting resources.
9265 23:03:15.355647 Show resources in subtree (Root Device)...After assigning values.
9266 23:03:15.358528 Root Device child on link 0 CPU_CLUSTER: 0
9267 23:03:15.365350 CPU_CLUSTER: 0 child on link 0 CPU: 00
9268 23:03:15.372182 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9269 23:03:15.375066 CPU: 00
9270 23:03:15.375145 Done allocating resources.
9271 23:03:15.381682 BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms
9272 23:03:15.381759 Enabling resources...
9273 23:03:15.385058 done.
9274 23:03:15.388561 BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms
9275 23:03:15.391630 Initializing devices...
9276 23:03:15.391730 Root Device init
9277 23:03:15.394913 init hardware done!
9278 23:03:15.395007 0x00000018: ctrlr->caps
9279 23:03:15.398922 52.000 MHz: ctrlr->f_max
9280 23:03:15.401546 0.400 MHz: ctrlr->f_min
9281 23:03:15.401654 0x40ff8080: ctrlr->voltages
9282 23:03:15.404945 sclk: 390625
9283 23:03:15.405017 Bus Width = 1
9284 23:03:15.408796 sclk: 390625
9285 23:03:15.408897 Bus Width = 1
9286 23:03:15.411469 Early init status = 3
9287 23:03:15.415210 out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00
9288 23:03:15.418022 in-header: 03 fc 00 00 01 00 00 00
9289 23:03:15.421316 in-data: 00
9290 23:03:15.424577 out: cmd=0x12d: 03 c8 2d 01 00 00 05 00 01 00 00 00 01
9291 23:03:15.430152 in-header: 03 fd 00 00 00 00 00 00
9292 23:03:15.433477 in-data:
9293 23:03:15.436386 out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00
9294 23:03:15.440916 in-header: 03 fc 00 00 01 00 00 00
9295 23:03:15.444638 in-data: 00
9296 23:03:15.447333 out: cmd=0x12d: 03 c9 2d 01 00 00 05 00 00 00 00 00 01
9297 23:03:15.452663 in-header: 03 fd 00 00 00 00 00 00
9298 23:03:15.455813 in-data:
9299 23:03:15.459283 [SSUSB] Setting up USB HOST controller...
9300 23:03:15.462502 [SSUSB] u3phy_ports_enable u2p:1, u3p:1
9301 23:03:15.466391 [SSUSB] phy power-on done.
9302 23:03:15.469275 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
9303 23:03:15.475694 CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c
9304 23:03:15.479164 mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)
9305 23:03:15.485624 CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c
9306 23:03:15.492321 read SPI 0x50eb0 0x2ad3: 1174 us, 9338 KB/s, 74.704 Mbps
9307 23:03:15.498886 mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)
9308 23:03:15.505430 CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204
9309 23:03:15.511768 read SPI 0x705bc 0x1f6a: 924 us, 8703 KB/s, 69.624 Mbps
9310 23:03:15.515349 SPM: binary array size = 0x9dc
9311 23:03:15.521737 SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)
9312 23:03:15.524806 spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18
9313 23:03:15.531366 mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)
9314 23:03:15.538433 SPM: spm_init done in 34 msecs, spm pc = 0x3f4
9315 23:03:15.541289 configure_display: Starting display init
9316 23:03:15.575984 anx7625_power_on_init: Init interface.
9317 23:03:15.579563 anx7625_disable_pd_protocol: Disabled PD feature.
9318 23:03:15.582589 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
9319 23:03:15.610178 anx7625_start_dp_work: Secure OCM version=00
9320 23:03:15.613881 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
9321 23:03:15.628917 sp_tx_get_edid_block: EDID Block = 1
9322 23:03:15.731336 Extracted contents:
9323 23:03:15.734406 header: 00 ff ff ff ff ff ff 00
9324 23:03:15.738045 serial number: 26 cf 7d 05 00 00 00 00 00 1e
9325 23:03:15.740976 version: 01 04
9326 23:03:15.744611 basic params: 95 1f 11 78 0a
9327 23:03:15.747454 chroma info: 76 90 94 55 54 90 27 21 50 54
9328 23:03:15.750839 established: 00 00 00
9329 23:03:15.757875 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
9330 23:03:15.760939 descriptor 1: 38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19
9331 23:03:15.767415 descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9332 23:03:15.774083 descriptor 3: 00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20
9333 23:03:15.781115 descriptor 4: 00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a
9334 23:03:15.784142 extensions: 00
9335 23:03:15.784220 checksum: fb
9336 23:03:15.784283
9337 23:03:15.787082 Manufacturer: IVO Model 57d Serial Number 0
9338 23:03:15.790432 Made week 0 of 2020
9339 23:03:15.793798 EDID version: 1.4
9340 23:03:15.793871 Digital display
9341 23:03:15.797112 6 bits per primary color channel
9342 23:03:15.797187 DisplayPort interface
9343 23:03:15.801087 Maximum image size: 31 cm x 17 cm
9344 23:03:15.803783 Gamma: 220%
9345 23:03:15.803873 Check DPMS levels
9346 23:03:15.807016 Supported color formats: RGB 4:4:4, YCrCb 4:2:2
9347 23:03:15.813551 First detailed timing is preferred timing
9348 23:03:15.813645 Established timings supported:
9349 23:03:15.816842 Standard timings supported:
9350 23:03:15.820206 Detailed timings
9351 23:03:15.823257 Hex of detail: 383680a07038204018303c0035ae10000019
9352 23:03:15.830109 Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm
9353 23:03:15.833566 0780 0798 07c8 0820 hborder 0
9354 23:03:15.836654 0438 043b 0447 0458 vborder 0
9355 23:03:15.839945 -hsync -vsync
9356 23:03:15.840047 Did detailed timing
9357 23:03:15.846756 Hex of detail: 000000000000000000000000000000000000
9358 23:03:15.849914 Manufacturer-specified data, tag 0
9359 23:03:15.853191 Hex of detail: 000000fe00496e666f566973696f6e0a2020
9360 23:03:15.856333 ASCII string: InfoVision
9361 23:03:15.859557 Hex of detail: 000000fe00523134304e574635205248200a
9362 23:03:15.863071 ASCII string: R140NWF5 RH
9363 23:03:15.863202 Checksum
9364 23:03:15.866474 Checksum: 0xfb (valid)
9365 23:03:15.869690 configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz
9366 23:03:15.873546 DSI data_rate: 832800000 bps
9367 23:03:15.879629 anx7625_parse_edid: detected IVO panel, use k value 0x3b
9368 23:03:15.882880 anx7625_parse_edid: pixelclock(138800).
9369 23:03:15.886064 hactive(1920), hsync(48), hfp(24), hbp(88)
9370 23:03:15.889495 vactive(1080), vsync(12), vfp(3), vbp(17)
9371 23:03:15.892727 anx7625_dsi_config: config dsi.
9372 23:03:15.899191 anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).
9373 23:03:15.913271 anx7625_dsi_config: success to config DSI
9374 23:03:15.916710 anx7625_dp_start: MIPI phy setup OK.
9375 23:03:15.919449 mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4
9376 23:03:15.922983 mtk_ddp_mode_set invalid vrefresh 60
9377 23:03:15.926662 main_disp_path_setup
9378 23:03:15.926750 ovl_layer_smi_id_en
9379 23:03:15.929592 ovl_layer_smi_id_en
9380 23:03:15.929688 ccorr_config
9381 23:03:15.929805 aal_config
9382 23:03:15.932798 gamma_config
9383 23:03:15.932899 postmask_config
9384 23:03:15.936268 dither_config
9385 23:03:15.939164 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
9386 23:03:15.946197 x_res x y_res: 1920 x 1080, size: 8294400 at 0x0
9387 23:03:15.949769 Root Device init finished in 553 msecs
9388 23:03:15.952452 CPU_CLUSTER: 0 init
9389 23:03:15.959212 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | device
9390 23:03:15.965904 INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff
9391 23:03:15.965987 APU_MBOX 0x190000b0 = 0x10001
9392 23:03:15.969078 APU_MBOX 0x190001b0 = 0x10001
9393 23:03:15.972599 APU_MBOX 0x190005b0 = 0x10001
9394 23:03:15.975969 APU_MBOX 0x190006b0 = 0x10001
9395 23:03:15.982127 CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c
9396 23:03:15.992043 read SPI 0x539f4 0xe237: 6247 us, 9270 KB/s, 74.160 Mbps
9397 23:03:16.004263 mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)
9398 23:03:16.011369 CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0
9399 23:03:16.022776 read SPI 0x61c74 0xe8ef: 6409 us, 9304 KB/s, 74.432 Mbps
9400 23:03:16.032430 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)
9401 23:03:16.035417 CPU_CLUSTER: 0 init finished in 81 msecs
9402 23:03:16.038912 Devices initialized
9403 23:03:16.041832 Show all devs... After init.
9404 23:03:16.041905 Root Device: enabled 1
9405 23:03:16.045106 CPU_CLUSTER: 0: enabled 1
9406 23:03:16.048562 CPU: 00: enabled 1
9407 23:03:16.052040 BS: BS_DEV_INIT run times (exec / console): 211 / 447 ms
9408 23:03:16.055616 FMAP: area RW_ELOG found @ 57f000 (4096 bytes)
9409 23:03:16.058380 ELOG: NV offset 0x57f000 size 0x1000
9410 23:03:16.064935 read SPI 0x57f000 0x1000: 487 us, 8410 KB/s, 67.280 Mbps
9411 23:03:16.072035 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
9412 23:03:16.075065 ELOG: Event(17) added with size 13 at 2023-12-01 23:03:16 UTC
9413 23:03:16.081389 out: cmd=0x121: 03 db 21 01 00 00 00 00
9414 23:03:16.084869 in-header: 03 b5 00 00 2c 00 00 00
9415 23:03:16.095044 in-data: aa 68 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9416 23:03:16.101349 ELOG: Event(A1) added with size 10 at 2023-12-01 23:03:16 UTC
9417 23:03:16.108100 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
9418 23:03:16.114505 ELOG: Event(A0) added with size 9 at 2023-12-01 23:03:16 UTC
9419 23:03:16.117814 elog_add_boot_reason: Logged dev mode boot
9420 23:03:16.124301 BS: BS_POST_DEVICE entry times (exec / console): 2 / 64 ms
9421 23:03:16.124388 Finalize devices...
9422 23:03:16.127655 Devices finalized
9423 23:03:16.131025 BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
9424 23:03:16.134614 Writing coreboot table at 0xffe64000
9425 23:03:16.137516 0. 000000000010a000-0000000000113fff: RAMSTAGE
9426 23:03:16.144094 1. 0000000040000000-00000000400fffff: RAM
9427 23:03:16.147275 2. 0000000040100000-000000004032afff: RAMSTAGE
9428 23:03:16.150829 3. 000000004032b000-00000000545fffff: RAM
9429 23:03:16.153756 4. 0000000054600000-000000005465ffff: BL31
9430 23:03:16.157473 5. 0000000054660000-00000000ffe63fff: RAM
9431 23:03:16.163804 6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES
9432 23:03:16.167402 7. 0000000100000000-000000023fffffff: RAM
9433 23:03:16.170319 Passing 5 GPIOs to payload:
9434 23:03:16.173516 NAME | PORT | POLARITY | VALUE
9435 23:03:16.180120 EC in RW | 0x000000aa | low | undefined
9436 23:03:16.183522 EC interrupt | 0x00000005 | low | undefined
9437 23:03:16.186890 TPM interrupt | 0x000000ab | high | undefined
9438 23:03:16.193683 SD card detect | 0x00000011 | high | undefined
9439 23:03:16.196698 speaker enable | 0x00000093 | high | undefined
9440 23:03:16.200025 out: cmd=0x6: 03 f7 06 00 00 00 00 00
9441 23:03:16.203802 in-header: 03 f9 00 00 02 00 00 00
9442 23:03:16.206591 in-data: 02 00
9443 23:03:16.209786 ADC[4]: Raw value=900813 ID=7
9444 23:03:16.213181 ADC[3]: Raw value=214021 ID=1
9445 23:03:16.213251 RAM Code: 0x71
9446 23:03:16.216540 ADC[6]: Raw value=75036 ID=0
9447 23:03:16.219728 ADC[5]: Raw value=212912 ID=1
9448 23:03:16.219821 SKU Code: 0x1
9449 23:03:16.226591 Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum a1a9
9450 23:03:16.226666 coreboot table: 964 bytes.
9451 23:03:16.229673 IMD ROOT 0. 0xfffff000 0x00001000
9452 23:03:16.233453 IMD SMALL 1. 0xffffe000 0x00001000
9453 23:03:16.236687 RO MCACHE 2. 0xffffc000 0x00001104
9454 23:03:16.239614 CONSOLE 3. 0xfff7c000 0x00080000
9455 23:03:16.243155 FMAP 4. 0xfff7b000 0x00000452
9456 23:03:16.246146 TIME STAMP 5. 0xfff7a000 0x00000910
9457 23:03:16.249326 VBOOT WORK 6. 0xfff66000 0x00014000
9458 23:03:16.252705 RAMOOPS 7. 0xffe66000 0x00100000
9459 23:03:16.256372 COREBOOT 8. 0xffe64000 0x00002000
9460 23:03:16.259329 IMD small region:
9461 23:03:16.263141 IMD ROOT 0. 0xffffec00 0x00000400
9462 23:03:16.265962 VPD 1. 0xffffeb80 0x0000006c
9463 23:03:16.269470 MMC STATUS 2. 0xffffeb60 0x00000004
9464 23:03:16.276389 BS: BS_WRITE_TABLES run times (exec / console): 1 / 137 ms
9465 23:03:16.276478 Probing TPM: done!
9466 23:03:16.279483 Connected to device vid:did:rid of 1ae0:0028:00
9467 23:03:16.291125 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.30/cr50_v1.9308_B.954-4f0f77dec8
9468 23:03:16.294350 Initialized TPM device CR50 revision 0
9469 23:03:16.297754 Checking cr50 for pending updates
9470 23:03:16.301648 Reading cr50 TPM mode
9471 23:03:16.310168 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms
9472 23:03:16.316639 CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098
9473 23:03:16.357116 read SPI 0x3990ec 0x4f1b0: 34847 us, 9298 KB/s, 74.384 Mbps
9474 23:03:16.360675 Checking segment from ROM address 0x40100000
9475 23:03:16.363772 Checking segment from ROM address 0x4010001c
9476 23:03:16.370410 Loading segment from ROM address 0x40100000
9477 23:03:16.370493 code (compression=0)
9478 23:03:16.380370 New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178
9479 23:03:16.387089 Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178
9480 23:03:16.387164 it's not compressed!
9481 23:03:16.393564 [ 0x80000000, 8004f178, 0x821a7280) <- 40100038
9482 23:03:16.399939 Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108
9483 23:03:16.417385 Loading segment from ROM address 0x4010001c
9484 23:03:16.417489 Entry Point 0x80000000
9485 23:03:16.420612 Loaded segments
9486 23:03:16.423964 BS: BS_PAYLOAD_LOAD run times (exec / console): 48 / 61 ms
9487 23:03:16.430691 Jumping to boot code at 0x80000000(0xffe64000)
9488 23:03:16.437346 CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes
9489 23:03:16.443967 CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290
9490 23:03:16.451884 read SPI 0x8eb68 0x74a8: 3224 us, 9263 KB/s, 74.104 Mbps
9491 23:03:16.455254 Checking segment from ROM address 0x40100000
9492 23:03:16.458596 Checking segment from ROM address 0x4010001c
9493 23:03:16.465440 Loading segment from ROM address 0x40100000
9494 23:03:16.465535 code (compression=1)
9495 23:03:16.471546 New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470
9496 23:03:16.481556 Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470
9497 23:03:16.481639 using LZMA
9498 23:03:16.490204 [ 0x54600000, 54614abc, 0x5462e000) <- 40100038
9499 23:03:16.496833 Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544
9500 23:03:16.500058 Loading segment from ROM address 0x4010001c
9501 23:03:16.500170 Entry Point 0x54601000
9502 23:03:16.503465 Loaded segments
9503 23:03:16.506848 NOTICE: MT8192 bl31_setup
9504 23:03:16.513895 NOTICE: BL31: v2.4(debug):v2.4-448-gce3ebc861
9505 23:03:16.517506 NOTICE: BL31: Built : Sat Sep 11 09:59:37 UTC 2021
9506 23:03:16.520590 WARNING: region 0:
9507 23:03:16.523649 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9508 23:03:16.523736 WARNING: region 1:
9509 23:03:16.530247 WARNING: sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d
9510 23:03:16.533713 WARNING: region 2:
9511 23:03:16.537092 WARNING: sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d
9512 23:03:16.540106 WARNING: region 3:
9513 23:03:16.543467 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9514 23:03:16.546838 WARNING: region 4:
9515 23:03:16.553701 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9516 23:03:16.553814 WARNING: region 5:
9517 23:03:16.556914 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9518 23:03:16.559980 WARNING: region 6:
9519 23:03:16.563461 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9520 23:03:16.566668 WARNING: region 7:
9521 23:03:16.570248 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9522 23:03:16.576934 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000
9523 23:03:16.580338 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0
9524 23:03:16.583756 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff
9525 23:03:16.590118 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff
9526 23:03:16.593172 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff
9527 23:03:16.597226 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00
9528 23:03:16.603620 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff
9529 23:03:16.606341 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff
9530 23:03:16.613727 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff
9531 23:03:16.616493 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff
9532 23:03:16.619744 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff
9533 23:03:16.626747 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff
9534 23:03:16.629904 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff
9535 23:03:16.633220 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff
9536 23:03:16.640074 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff
9537 23:03:16.643380 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff
9538 23:03:16.649770 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff
9539 23:03:16.652932 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff
9540 23:03:16.656207 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff
9541 23:03:16.663193 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff
9542 23:03:16.666818 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff
9543 23:03:16.673181 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff
9544 23:03:16.676531 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff
9545 23:03:16.679660 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff
9546 23:03:16.686098 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff
9547 23:03:16.689283 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff
9548 23:03:16.696338 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff
9549 23:03:16.699617 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff
9550 23:03:16.702620 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff
9551 23:03:16.709796 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff
9552 23:03:16.713166 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff
9553 23:03:16.719595 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff
9554 23:03:16.722419 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0
9555 23:03:16.725900 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0
9556 23:03:16.729179 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0
9557 23:03:16.736074 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0
9558 23:03:16.738978 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0
9559 23:03:16.742380 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0
9560 23:03:16.745692 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0
9561 23:03:16.752680 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0
9562 23:03:16.755588 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0
9563 23:03:16.759146 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0
9564 23:03:16.762626 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0
9565 23:03:16.769060 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0
9566 23:03:16.772687 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0
9567 23:03:16.775869 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0
9568 23:03:16.778952 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0
9569 23:03:16.785589 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0
9570 23:03:16.788977 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff
9571 23:03:16.795395 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff
9572 23:03:16.798791 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff
9573 23:03:16.802464 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff
9574 23:03:16.808529 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff
9575 23:03:16.812115 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff
9576 23:03:16.818897 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff
9577 23:03:16.821871 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff
9578 23:03:16.828540 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff
9579 23:03:16.831789 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff
9580 23:03:16.838925 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff
9581 23:03:16.841802 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff
9582 23:03:16.845290 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff
9583 23:03:16.851945 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff
9584 23:03:16.855285 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff
9585 23:03:16.861535 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff
9586 23:03:16.864953 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff
9587 23:03:16.871588 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff
9588 23:03:16.875070 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff
9589 23:03:16.882077 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff
9590 23:03:16.884997 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff
9591 23:03:16.888441 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff
9592 23:03:16.894805 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff
9593 23:03:16.898174 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff
9594 23:03:16.904700 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff
9595 23:03:16.908297 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff
9596 23:03:16.914807 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff
9597 23:03:16.917876 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff
9598 23:03:16.924815 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff
9599 23:03:16.928131 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff
9600 23:03:16.931180 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff
9601 23:03:16.937869 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff
9602 23:03:16.941325 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff
9603 23:03:16.948013 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff
9604 23:03:16.951179 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff
9605 23:03:16.957656 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff
9606 23:03:16.961092 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff
9607 23:03:16.964451 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff
9608 23:03:16.971102 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff
9609 23:03:16.974714 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff
9610 23:03:16.980883 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff
9611 23:03:16.984537 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff
9612 23:03:16.991270 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff
9613 23:03:16.994414 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff
9614 23:03:17.000854 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff
9615 23:03:17.004239 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff
9616 23:03:17.007865 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff
9617 23:03:17.013968 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff
9618 23:03:17.017558 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0
9619 23:03:17.020864 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0
9620 23:03:17.027108 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0
9621 23:03:17.030888 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0
9622 23:03:17.034105 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0
9623 23:03:17.041357 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff
9624 23:03:17.043870 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff
9625 23:03:17.047039 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff
9626 23:03:17.053851 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff
9627 23:03:17.057237 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff
9628 23:03:17.064378 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff
9629 23:03:17.067304 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff
9630 23:03:17.070239 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff
9631 23:03:17.077403 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff
9632 23:03:17.080171 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff
9633 23:03:17.086689 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff
9634 23:03:17.089999 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff
9635 23:03:17.096571 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff
9636 23:03:17.099779 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff
9637 23:03:17.103505 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff
9638 23:03:17.106374 INFO: [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18
9639 23:03:17.112981 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000
9640 23:03:17.116445 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004
9641 23:03:17.120546 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0
9642 23:03:17.126599 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0
9643 23:03:17.129818 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0
9644 23:03:17.133367 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0
9645 23:03:17.136211 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000
9646 23:03:17.142655 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff
9647 23:03:17.146262 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff
9648 23:03:17.153339 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff
9649 23:03:17.156093 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff
9650 23:03:17.162612 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff
9651 23:03:17.165998 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff
9652 23:03:17.169377 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff
9653 23:03:17.176116 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc
9654 23:03:17.179791 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff
9655 23:03:17.182791 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf
9656 23:03:17.189243 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff
9657 23:03:17.192573 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc
9658 23:03:17.199416 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff
9659 23:03:17.202871 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff
9660 23:03:17.205947 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff
9661 23:03:17.212726 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff
9662 23:03:17.216147 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff
9663 23:03:17.222328 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff
9664 23:03:17.225558 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff
9665 23:03:17.229381 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff
9666 23:03:17.235598 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff
9667 23:03:17.239132 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff
9668 23:03:17.245768 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff
9669 23:03:17.248784 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff
9670 23:03:17.252609 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff
9671 23:03:17.258778 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff
9672 23:03:17.262498 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff
9673 23:03:17.269010 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff
9674 23:03:17.271748 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff
9675 23:03:17.275276 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff
9676 23:03:17.281779 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff
9677 23:03:17.285111 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff
9678 23:03:17.291550 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff
9679 23:03:17.294891 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff
9680 23:03:17.298077 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff
9681 23:03:17.304913 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff
9682 23:03:17.308317 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff
9683 23:03:17.314665 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff
9684 23:03:17.318071 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff
9685 23:03:17.321507 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff
9686 23:03:17.327992 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff
9687 23:03:17.331075 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff
9688 23:03:17.337657 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff
9689 23:03:17.340692 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff
9690 23:03:17.344539 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff
9691 23:03:17.350553 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff
9692 23:03:17.354049 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff
9693 23:03:17.360580 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff
9694 23:03:17.364191 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff
9695 23:03:17.367930 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff
9696 23:03:17.374084 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff
9697 23:03:17.377468 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff
9698 23:03:17.383944 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff
9699 23:03:17.387198 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff
9700 23:03:17.390315 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff
9701 23:03:17.396906 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff
9702 23:03:17.400318 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff
9703 23:03:17.406674 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff
9704 23:03:17.410039 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff
9705 23:03:17.413634 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff
9706 23:03:17.420867 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff
9707 23:03:17.424002 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff
9708 23:03:17.429859 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff
9709 23:03:17.433350 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff
9710 23:03:17.436781 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff
9711 23:03:17.443273 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff
9712 23:03:17.446756 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff
9713 23:03:17.453387 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff
9714 23:03:17.456672 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff
9715 23:03:17.463079 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff
9716 23:03:17.466416 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff
9717 23:03:17.470080 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff
9718 23:03:17.476460 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff
9719 23:03:17.479889 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff
9720 23:03:17.486681 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff
9721 23:03:17.489936 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff
9722 23:03:17.492900 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff
9723 23:03:17.499966 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff
9724 23:03:17.502914 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff
9725 23:03:17.509893 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff
9726 23:03:17.512780 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff
9727 23:03:17.519674 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff
9728 23:03:17.523088 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff
9729 23:03:17.526318 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff
9730 23:03:17.532735 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff
9731 23:03:17.535956 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff
9732 23:03:17.542266 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff
9733 23:03:17.545541 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff
9734 23:03:17.552296 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff
9735 23:03:17.555797 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff
9736 23:03:17.559021 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff
9737 23:03:17.565806 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff
9738 23:03:17.568690 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff
9739 23:03:17.575306 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff
9740 23:03:17.578314 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff
9741 23:03:17.585183 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff
9742 23:03:17.588464 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff
9743 23:03:17.591984 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff
9744 23:03:17.598469 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff
9745 23:03:17.601551 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff
9746 23:03:17.607997 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff
9747 23:03:17.611314 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff
9748 23:03:17.618243 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff
9749 23:03:17.621299 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff
9750 23:03:17.624487 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff
9751 23:03:17.631292 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0
9752 23:03:17.634250 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0
9753 23:03:17.637642 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0
9754 23:03:17.641023 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0
9755 23:03:17.647664 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0
9756 23:03:17.650912 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff
9757 23:03:17.654612 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff
9758 23:03:17.661178 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff
9759 23:03:17.664113 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff
9760 23:03:17.667243 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf
9761 23:03:17.674070 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff
9762 23:03:17.677376 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff
9763 23:03:17.684324 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff
9764 23:03:17.687089 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff
9765 23:03:17.691221 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf
9766 23:03:17.696968 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff
9767 23:03:17.700501 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff
9768 23:03:17.706760 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff
9769 23:03:17.710333 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff
9770 23:03:17.713692 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf
9771 23:03:17.720282 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff
9772 23:03:17.723712 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff
9773 23:03:17.727111 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff
9774 23:03:17.733364 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff
9775 23:03:17.736832 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf
9776 23:03:17.743281 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff
9777 23:03:17.746700 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff
9778 23:03:17.750177 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff
9779 23:03:17.756256 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff
9780 23:03:17.759898 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf
9781 23:03:17.763197 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff
9782 23:03:17.769439 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff
9783 23:03:17.773015 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff
9784 23:03:17.779480 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff
9785 23:03:17.782697 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf
9786 23:03:17.785934 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff
9787 23:03:17.792967 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff
9788 23:03:17.795840 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff
9789 23:03:17.802305 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff
9790 23:03:17.805851 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf
9791 23:03:17.808963 INFO: [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0
9792 23:03:17.812346 INFO: [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3
9793 23:03:17.815868 INFO: [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3
9794 23:03:17.822136 INFO: [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3
9795 23:03:17.825334 INFO: [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0
9796 23:03:17.828612 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400
9797 23:03:17.832005 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0
9798 23:03:17.838926 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0
9799 23:03:17.841894 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0
9800 23:03:17.844963 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0
9801 23:03:17.851837 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0
9802 23:03:17.855149 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000
9803 23:03:17.858491 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0
9804 23:03:17.864975 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff
9805 23:03:17.868293 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff
9806 23:03:17.871810 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff
9807 23:03:17.878098 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff
9808 23:03:17.881662 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff
9809 23:03:17.888052 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff
9810 23:03:17.891216 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff
9811 23:03:17.894485 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f
9812 23:03:17.901051 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3
9813 23:03:17.904601 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff
9814 23:03:17.911476 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff
9815 23:03:17.914689 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff
9816 23:03:17.921273 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff
9817 23:03:17.924652 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff
9818 23:03:17.928012 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff
9819 23:03:17.934604 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f
9820 23:03:17.937449 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff
9821 23:03:17.944317 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff
9822 23:03:17.947629 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff
9823 23:03:17.954710 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff
9824 23:03:17.957746 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff
9825 23:03:17.960682 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff
9826 23:03:17.967566 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff
9827 23:03:17.970480 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f
9828 23:03:17.977194 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff
9829 23:03:17.980389 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff
9830 23:03:17.984056 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff
9831 23:03:17.990145 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff
9832 23:03:17.993922 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff
9833 23:03:18.000365 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff
9834 23:03:18.003797 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff
9835 23:03:18.010014 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f
9836 23:03:18.013336 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff
9837 23:03:18.017193 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff
9838 23:03:18.023207 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff
9839 23:03:18.026688 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff
9840 23:03:18.033370 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff
9841 23:03:18.036322 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff
9842 23:03:18.043465 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff
9843 23:03:18.046409 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f
9844 23:03:18.049559 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff
9845 23:03:18.056186 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff
9846 23:03:18.059620 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff
9847 23:03:18.066271 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff
9848 23:03:18.069532 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff
9849 23:03:18.072890 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff
9850 23:03:18.079521 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff
9851 23:03:18.083145 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f
9852 23:03:18.089338 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff
9853 23:03:18.092394 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff
9854 23:03:18.098869 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff
9855 23:03:18.102623 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff
9856 23:03:18.105347 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff
9857 23:03:18.112087 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff
9858 23:03:18.115454 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff
9859 23:03:18.122151 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f
9860 23:03:18.125606 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff
9861 23:03:18.128582 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff
9862 23:03:18.135300 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff
9863 23:03:18.138459 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff
9864 23:03:18.145320 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff
9865 23:03:18.148859 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff
9866 23:03:18.155217 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff
9867 23:03:18.158121 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f
9868 23:03:18.161878 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff
9869 23:03:18.168487 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff
9870 23:03:18.171174 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff
9871 23:03:18.178034 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff
9872 23:03:18.181187 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff
9873 23:03:18.187714 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff
9874 23:03:18.191219 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff
9875 23:03:18.194351 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f
9876 23:03:18.200944 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff
9877 23:03:18.203959 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff
9878 23:03:18.211400 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff
9879 23:03:18.214548 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff
9880 23:03:18.220970 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff
9881 23:03:18.224314 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff
9882 23:03:18.230834 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff
9883 23:03:18.233757 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f
9884 23:03:18.237259 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff
9885 23:03:18.243905 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff
9886 23:03:18.247101 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff
9887 23:03:18.254223 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff
9888 23:03:18.257292 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff
9889 23:03:18.263569 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff
9890 23:03:18.267262 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff
9891 23:03:18.270798 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f
9892 23:03:18.277257 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff
9893 23:03:18.280570 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff
9894 23:03:18.287051 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff
9895 23:03:18.290378 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff
9896 23:03:18.296823 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff
9897 23:03:18.300541 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff
9898 23:03:18.306874 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff
9899 23:03:18.310424 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f
9900 23:03:18.313244 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff
9901 23:03:18.319982 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff
9902 23:03:18.323475 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff
9903 23:03:18.329868 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff
9904 23:03:18.333136 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff
9905 23:03:18.339815 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff
9906 23:03:18.342937 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff
9907 23:03:18.346550 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f
9908 23:03:18.352987 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff
9909 23:03:18.356300 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff
9910 23:03:18.362884 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff
9911 23:03:18.366619 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff
9912 23:03:18.372852 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff
9913 23:03:18.376406 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff
9914 23:03:18.382895 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff
9915 23:03:18.386034 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f
9916 23:03:18.389037 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff
9917 23:03:18.395943 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff
9918 23:03:18.399193 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff
9919 23:03:18.405894 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff
9920 23:03:18.409291 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff
9921 23:03:18.416079 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff
9922 23:03:18.419486 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff
9923 23:03:18.422785 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f
9924 23:03:18.429242 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0
9925 23:03:18.432476 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000
9926 23:03:18.439359 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff
9927 23:03:18.442586 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff
9928 23:03:18.449332 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3
9929 23:03:18.452349 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff
9930 23:03:18.458958 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff
9931 23:03:18.462408 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff
9932 23:03:18.468921 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff
9933 23:03:18.472501 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff
9934 23:03:18.479181 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff
9935 23:03:18.482246 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff
9936 23:03:18.488886 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff
9937 23:03:18.492209 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff
9938 23:03:18.495779 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff
9939 23:03:18.502116 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff
9940 23:03:18.505228 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff
9941 23:03:18.511900 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff
9942 23:03:18.515539 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff
9943 23:03:18.521786 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff
9944 23:03:18.525469 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff
9945 23:03:18.531628 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff
9946 23:03:18.534917 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff
9947 23:03:18.541760 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff
9948 23:03:18.544980 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff
9949 23:03:18.551723 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff
9950 23:03:18.557865 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff
9951 23:03:18.561449 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff
9952 23:03:18.567920 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff
9953 23:03:18.571251 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff
9954 23:03:18.577805 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff
9955 23:03:18.581117 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff
9956 23:03:18.584323 INFO: [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0
9957 23:03:18.587768 INFO: [APUAPC] vio 0
9958 23:03:18.594083 INFO: [APUAPC] set_apusys_ao_apc - SUCCESS!
9959 23:03:18.597649 INFO: [APUAPC] set_apusys_noc_dapc - SUCCESS!
9960 23:03:18.601130 INFO: [APUAPC] D0_APC_0: 0x400510
9961 23:03:18.604120 INFO: [APUAPC] D0_APC_1: 0x0
9962 23:03:18.607076 INFO: [APUAPC] D0_APC_2: 0x1540
9963 23:03:18.610584 INFO: [APUAPC] D0_APC_3: 0x0
9964 23:03:18.613834 INFO: [APUAPC] D1_APC_0: 0xffffffff
9965 23:03:18.617340 INFO: [APUAPC] D1_APC_1: 0xffffffff
9966 23:03:18.620503 INFO: [APUAPC] D1_APC_2: 0x3fffff
9967 23:03:18.623865 INFO: [APUAPC] D1_APC_3: 0x0
9968 23:03:18.627226 INFO: [APUAPC] D2_APC_0: 0xffffffff
9969 23:03:18.630281 INFO: [APUAPC] D2_APC_1: 0xffffffff
9970 23:03:18.633784 INFO: [APUAPC] D2_APC_2: 0x3fffff
9971 23:03:18.633867 INFO: [APUAPC] D2_APC_3: 0x0
9972 23:03:18.640080 INFO: [APUAPC] D3_APC_0: 0xffffffff
9973 23:03:18.643899 INFO: [APUAPC] D3_APC_1: 0xffffffff
9974 23:03:18.646564 INFO: [APUAPC] D3_APC_2: 0x3fffff
9975 23:03:18.646645 INFO: [APUAPC] D3_APC_3: 0x0
9976 23:03:18.653346 INFO: [APUAPC] D4_APC_0: 0xffffffff
9977 23:03:18.656664 INFO: [APUAPC] D4_APC_1: 0xffffffff
9978 23:03:18.660062 INFO: [APUAPC] D4_APC_2: 0x3fffff
9979 23:03:18.660144 INFO: [APUAPC] D4_APC_3: 0x0
9980 23:03:18.663363 INFO: [APUAPC] D5_APC_0: 0xffffffff
9981 23:03:18.669815 INFO: [APUAPC] D5_APC_1: 0xffffffff
9982 23:03:18.673228 INFO: [APUAPC] D5_APC_2: 0x3fffff
9983 23:03:18.673314 INFO: [APUAPC] D5_APC_3: 0x0
9984 23:03:18.676724 INFO: [APUAPC] D6_APC_0: 0xffffffff
9985 23:03:18.679523 INFO: [APUAPC] D6_APC_1: 0xffffffff
9986 23:03:18.682816 INFO: [APUAPC] D6_APC_2: 0x3fffff
9987 23:03:18.686111 INFO: [APUAPC] D6_APC_3: 0x0
9988 23:03:18.689978 INFO: [APUAPC] D7_APC_0: 0xffffffff
9989 23:03:18.692724 INFO: [APUAPC] D7_APC_1: 0xffffffff
9990 23:03:18.696035 INFO: [APUAPC] D7_APC_2: 0x3fffff
9991 23:03:18.699377 INFO: [APUAPC] D7_APC_3: 0x0
9992 23:03:18.702707 INFO: [APUAPC] D8_APC_0: 0xffffffff
9993 23:03:18.706144 INFO: [APUAPC] D8_APC_1: 0xffffffff
9994 23:03:18.709052 INFO: [APUAPC] D8_APC_2: 0x3fffff
9995 23:03:18.712936 INFO: [APUAPC] D8_APC_3: 0x0
9996 23:03:18.716347 INFO: [APUAPC] D9_APC_0: 0xffffffff
9997 23:03:18.719666 INFO: [APUAPC] D9_APC_1: 0xffffffff
9998 23:03:18.722690 INFO: [APUAPC] D9_APC_2: 0x3fffff
9999 23:03:18.725551 INFO: [APUAPC] D9_APC_3: 0x0
10000 23:03:18.728879 INFO: [APUAPC] D10_APC_0: 0xffffffff
10001 23:03:18.732616 INFO: [APUAPC] D10_APC_1: 0xffffffff
10002 23:03:18.735523 INFO: [APUAPC] D10_APC_2: 0x3fffff
10003 23:03:18.738624 INFO: [APUAPC] D10_APC_3: 0x0
10004 23:03:18.742233 INFO: [APUAPC] D11_APC_0: 0xffffffff
10005 23:03:18.745686 INFO: [APUAPC] D11_APC_1: 0xffffffff
10006 23:03:18.749098 INFO: [APUAPC] D11_APC_2: 0x3fffff
10007 23:03:18.752127 INFO: [APUAPC] D11_APC_3: 0x0
10008 23:03:18.755293 INFO: [APUAPC] D12_APC_0: 0xffffffff
10009 23:03:18.759090 INFO: [APUAPC] D12_APC_1: 0xffffffff
10010 23:03:18.762048 INFO: [APUAPC] D12_APC_2: 0x3fffff
10011 23:03:18.765636 INFO: [APUAPC] D12_APC_3: 0x0
10012 23:03:18.768747 INFO: [APUAPC] D13_APC_0: 0xffffffff
10013 23:03:18.772003 INFO: [APUAPC] D13_APC_1: 0xffffffff
10014 23:03:18.778468 INFO: [APUAPC] D13_APC_2: 0x3fffff
10015 23:03:18.778550 INFO: [APUAPC] D13_APC_3: 0x0
10016 23:03:18.781669 INFO: [APUAPC] D14_APC_0: 0xffffffff
10017 23:03:18.788344 INFO: [APUAPC] D14_APC_1: 0xffffffff
10018 23:03:18.791511 INFO: [APUAPC] D14_APC_2: 0x3fffff
10019 23:03:18.791608 INFO: [APUAPC] D14_APC_3: 0x0
10020 23:03:18.798369 INFO: [APUAPC] D15_APC_0: 0xffffffff
10021 23:03:18.801487 INFO: [APUAPC] D15_APC_1: 0xffffffff
10022 23:03:18.804989 INFO: [APUAPC] D15_APC_2: 0x3fffff
10023 23:03:18.808336 INFO: [APUAPC] D15_APC_3: 0x0
10024 23:03:18.808418 INFO: [APUAPC] APC_CON: 0x4
10025 23:03:18.811656 INFO: [NOCDAPC] D0_APC_0: 0x0
10026 23:03:18.815065 INFO: [NOCDAPC] D0_APC_1: 0x0
10027 23:03:18.817941 INFO: [NOCDAPC] D1_APC_0: 0x0
10028 23:03:18.821291 INFO: [NOCDAPC] D1_APC_1: 0xfff
10029 23:03:18.824696 INFO: [NOCDAPC] D2_APC_0: 0x0
10030 23:03:18.828070 INFO: [NOCDAPC] D2_APC_1: 0xfff
10031 23:03:18.831407 INFO: [NOCDAPC] D3_APC_0: 0x0
10032 23:03:18.834396 INFO: [NOCDAPC] D3_APC_1: 0xfff
10033 23:03:18.834477 INFO: [NOCDAPC] D4_APC_0: 0x0
10034 23:03:18.837910 INFO: [NOCDAPC] D4_APC_1: 0xfff
10035 23:03:18.841433 INFO: [NOCDAPC] D5_APC_0: 0x0
10036 23:03:18.844538 INFO: [NOCDAPC] D5_APC_1: 0xfff
10037 23:03:18.847596 INFO: [NOCDAPC] D6_APC_0: 0x0
10038 23:03:18.851617 INFO: [NOCDAPC] D6_APC_1: 0xfff
10039 23:03:18.854723 INFO: [NOCDAPC] D7_APC_0: 0x0
10040 23:03:18.857618 INFO: [NOCDAPC] D7_APC_1: 0xfff
10041 23:03:18.861129 INFO: [NOCDAPC] D8_APC_0: 0x0
10042 23:03:18.864159 INFO: [NOCDAPC] D8_APC_1: 0xfff
10043 23:03:18.867872 INFO: [NOCDAPC] D9_APC_0: 0x0
10044 23:03:18.871102 INFO: [NOCDAPC] D9_APC_1: 0xfff
10045 23:03:18.871185 INFO: [NOCDAPC] D10_APC_0: 0x0
10046 23:03:18.874208 INFO: [NOCDAPC] D10_APC_1: 0xfff
10047 23:03:18.877394 INFO: [NOCDAPC] D11_APC_0: 0x0
10048 23:03:18.880784 INFO: [NOCDAPC] D11_APC_1: 0xfff
10049 23:03:18.884319 INFO: [NOCDAPC] D12_APC_0: 0x0
10050 23:03:18.887516 INFO: [NOCDAPC] D12_APC_1: 0xfff
10051 23:03:18.890702 INFO: [NOCDAPC] D13_APC_0: 0x0
10052 23:03:18.893808 INFO: [NOCDAPC] D13_APC_1: 0xfff
10053 23:03:18.897642 INFO: [NOCDAPC] D14_APC_0: 0x0
10054 23:03:18.900845 INFO: [NOCDAPC] D14_APC_1: 0xfff
10055 23:03:18.903889 INFO: [NOCDAPC] D15_APC_0: 0x0
10056 23:03:18.907524 INFO: [NOCDAPC] D15_APC_1: 0xfff
10057 23:03:18.910376 INFO: [NOCDAPC] APC_CON: 0x4
10058 23:03:18.913742 INFO: [APUAPC] set_apusys_apc done
10059 23:03:18.917338 INFO: [DEVAPC] devapc_init done
10060 23:03:18.920230 INFO: GICv3 without legacy support detected.
10061 23:03:18.923461 INFO: ARM GICv3 driver initialized in EL3
10062 23:03:18.927129 INFO: Maximum SPI INTID supported: 639
10063 23:03:18.933590 INFO: BL31: Initializing runtime services
10064 23:03:18.936554 WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!
10065 23:03:18.941019 INFO: SPM: enable CPC mode
10066 23:03:18.946688 INFO: mcdi ready for mcusys-off-idle and system suspend
10067 23:03:18.950010 INFO: BL31: Preparing for EL3 exit to normal world
10068 23:03:18.952974 INFO: Entry point address = 0x80000000
10069 23:03:18.956699 INFO: SPSR = 0x8
10070 23:03:18.961586
10071 23:03:18.961671
10072 23:03:18.961736
10073 23:03:18.964848 Starting depthcharge on Spherion...
10074 23:03:18.964929
10075 23:03:18.965035 Wipe memory regions:
10076 23:03:18.965096
10077 23:03:18.965803 end: 2.2.3 depthcharge-start (duration 00:00:30) [common]
10078 23:03:18.965903 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
10079 23:03:18.965983 Setting prompt string to ['asurada:']
10080 23:03:18.966061 bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:25)
10081 23:03:18.968197 [0x00000040000000, 0x00000054600000)
10082 23:03:19.090440
10083 23:03:19.093679 [0x00000054660000, 0x00000080000000)
10084 23:03:19.350907
10085 23:03:19.351063 [0x000000821a7280, 0x000000ffe64000)
10086 23:03:20.095878
10087 23:03:20.096026 [0x00000100000000, 0x00000240000000)
10088 23:03:21.985711
10089 23:03:21.989440 Initializing XHCI USB controller at 0x11200000.
10090 23:03:22.970541
10091 23:03:22.970686 R8152: Initializing
10092 23:03:22.970756
10093 23:03:22.974166 Version 9 (ocp_data = 6010)
10094 23:03:22.974248
10095 23:03:22.977166 R8152: Done initializing
10096 23:03:22.977248
10097 23:03:22.977316 Adding net device
10098 23:03:23.498370
10099 23:03:23.501742 [firmware-asurada-13885.B-collabora] Dec 14 2021 15:21:43
10100 23:03:23.501835
10101 23:03:23.501946
10102 23:03:23.502042
10103 23:03:23.502339 Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10105 23:03:23.602646 asurada: tftpboot 192.168.201.1 12154408/tftp-deploy-1u7ryz3t/kernel/image.itb 12154408/tftp-deploy-1u7ryz3t/kernel/cmdline
10106 23:03:23.602792 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10107 23:03:23.602875 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:20)
10108 23:03:23.607120 tftpboot 192.168.201.1 12154408/tftp-deploy-1u7ryz3t/kernel/image.itp-deploy-1u7ryz3t/kernel/cmdline
10109 23:03:23.607202
10110 23:03:23.607265 Waiting for link
10111 23:03:23.809569
10112 23:03:23.809709 done.
10113 23:03:23.809780
10114 23:03:23.809849 MAC: f4:f5:e8:50:de:0a
10115 23:03:23.809908
10116 23:03:23.813032 Sending DHCP discover... done.
10117 23:03:23.813114
10118 23:03:23.816196 Waiting for reply... done.
10119 23:03:23.816271
10120 23:03:23.819716 Sending DHCP request... done.
10121 23:03:23.819793
10122 23:03:23.819856 Waiting for reply... done.
10123 23:03:23.819915
10124 23:03:23.822683 My ip is 192.168.201.14
10125 23:03:23.822751
10126 23:03:23.825755 The DHCP server ip is 192.168.201.1
10127 23:03:23.825826
10128 23:03:23.829503 TFTP server IP predefined by user: 192.168.201.1
10129 23:03:23.829574
10130 23:03:23.835991 Bootfile predefined by user: 12154408/tftp-deploy-1u7ryz3t/kernel/image.itb
10131 23:03:23.836081
10132 23:03:23.839337 Sending tftp read request... done.
10133 23:03:23.839419
10134 23:03:23.842349 Waiting for the transfer...
10135 23:03:23.842442
10136 23:03:24.070655 00000000 ################################################################
10137 23:03:24.070843
10138 23:03:24.297352 00080000 ################################################################
10139 23:03:24.297532
10140 23:03:24.521740 00100000 ################################################################
10141 23:03:24.521893
10142 23:03:24.746495 00180000 ################################################################
10143 23:03:24.746643
10144 23:03:24.981657 00200000 ################################################################
10145 23:03:24.981809
10146 23:03:25.206461 00280000 ################################################################
10147 23:03:25.206610
10148 23:03:25.430349 00300000 ################################################################
10149 23:03:25.430493
10150 23:03:25.655840 00380000 ################################################################
10151 23:03:25.655998
10152 23:03:25.881293 00400000 ################################################################
10153 23:03:25.881496
10154 23:03:26.104607 00480000 ################################################################
10155 23:03:26.104764
10156 23:03:26.329800 00500000 ################################################################
10157 23:03:26.329983
10158 23:03:26.555348 00580000 ################################################################
10159 23:03:26.555488
10160 23:03:26.780528 00600000 ################################################################
10161 23:03:26.780679
10162 23:03:27.005661 00680000 ################################################################
10163 23:03:27.005808
10164 23:03:27.237127 00700000 ################################################################
10165 23:03:27.237274
10166 23:03:27.462498 00780000 ################################################################
10167 23:03:27.462724
10168 23:03:27.687189 00800000 ################################################################
10169 23:03:27.687340
10170 23:03:27.912796 00880000 ################################################################
10171 23:03:27.912957
10172 23:03:28.139648 00900000 ################################################################
10173 23:03:28.139818
10174 23:03:28.364896 00980000 ################################################################
10175 23:03:28.365042
10176 23:03:28.591337 00a00000 ################################################################
10177 23:03:28.591483
10178 23:03:28.816719 00a80000 ################################################################
10179 23:03:28.816853
10180 23:03:29.043976 00b00000 ################################################################
10181 23:03:29.044117
10182 23:03:29.274817 00b80000 ################################################################
10183 23:03:29.275005
10184 23:03:29.505181 00c00000 ################################################################
10185 23:03:29.505385
10186 23:03:29.732818 00c80000 ################################################################
10187 23:03:29.732965
10188 23:03:29.972564 00d00000 ################################################################
10189 23:03:29.972751
10190 23:03:30.219104 00d80000 ################################################################
10191 23:03:30.219268
10192 23:03:30.443052 00e00000 ################################################################
10193 23:03:30.443224
10194 23:03:30.668615 00e80000 ################################################################
10195 23:03:30.668756
10196 23:03:30.895415 00f00000 ################################################################
10197 23:03:30.895551
10198 23:03:31.126337 00f80000 ################################################################
10199 23:03:31.126475
10200 23:03:31.351591 01000000 ################################################################
10201 23:03:31.351722
10202 23:03:31.578601 01080000 ################################################################
10203 23:03:31.578745
10204 23:03:31.804035 01100000 ################################################################
10205 23:03:31.804169
10206 23:03:32.032281 01180000 ################################################################
10207 23:03:32.032413
10208 23:03:32.278358 01200000 ################################################################
10209 23:03:32.278494
10210 23:03:32.503538 01280000 ################################################################
10211 23:03:32.503692
10212 23:03:32.739903 01300000 ################################################################
10213 23:03:32.740051
10214 23:03:32.981295 01380000 ################################################################
10215 23:03:32.981482
10216 23:03:33.227735 01400000 ################################################################
10217 23:03:33.227871
10218 23:03:33.458516 01480000 ################################################################
10219 23:03:33.458668
10220 23:03:33.688944 01500000 ################################################################
10221 23:03:33.689116
10222 23:03:33.932533 01580000 ################################################################
10223 23:03:33.932708
10224 23:03:34.172939 01600000 ################################################################
10225 23:03:34.173109
10226 23:03:34.412116 01680000 ################################################################
10227 23:03:34.412272
10228 23:03:34.640619 01700000 ################################################################
10229 23:03:34.640763
10230 23:03:34.868047 01780000 ################################################################
10231 23:03:34.868196
10232 23:03:35.097213 01800000 ################################################################
10233 23:03:35.097358
10234 23:03:35.330769 01880000 ################################################################
10235 23:03:35.330940
10236 23:03:35.558415 01900000 ################################################################
10237 23:03:35.558576
10238 23:03:35.783065 01980000 ################################################################
10239 23:03:35.783215
10240 23:03:36.008591 01a00000 ################################################################
10241 23:03:36.008725
10242 23:03:36.236341 01a80000 ################################################################
10243 23:03:36.236480
10244 23:03:36.476685 01b00000 ################################################################
10245 23:03:36.476843
10246 23:03:36.703679 01b80000 ################################################################
10247 23:03:36.703841
10248 23:03:36.933800 01c00000 ################################################################
10249 23:03:36.933935
10250 23:03:37.159947 01c80000 ################################################################
10251 23:03:37.160085
10252 23:03:37.438935 01d00000 ################################################################
10253 23:03:37.439076
10254 23:03:37.776238 01d80000 ################################################################
10255 23:03:37.776375
10256 23:03:38.097879 01e00000 ################################################################
10257 23:03:38.098065
10258 23:03:38.408449 01e80000 ################################################################
10259 23:03:38.408584
10260 23:03:38.718739 01f00000 ################################################################
10261 23:03:38.718901
10262 23:03:38.942633 01f80000 ################################################################
10263 23:03:38.942794
10264 23:03:39.180213 02000000 ################################################################
10265 23:03:39.180354
10266 23:03:39.421151 02080000 ################################################################
10267 23:03:39.421291
10268 23:03:39.660279 02100000 ################################################################
10269 23:03:39.660419
10270 23:03:39.899149 02180000 ################################################################
10271 23:03:39.899315
10272 23:03:40.139729 02200000 ################################################################
10273 23:03:40.139890
10274 23:03:40.378611 02280000 ################################################################
10275 23:03:40.378769
10276 23:03:40.615114 02300000 ################################################################
10277 23:03:40.615277
10278 23:03:40.855712 02380000 ################################################################
10279 23:03:40.855881
10280 23:03:41.095736 02400000 ################################################################
10281 23:03:41.095879
10282 23:03:41.321587 02480000 ################################################################
10283 23:03:41.321716
10284 23:03:41.559374 02500000 ################################################################
10285 23:03:41.559534
10286 23:03:41.789117 02580000 ################################################################
10287 23:03:41.789261
10288 23:03:42.026496 02600000 ################################################################
10289 23:03:42.026644
10290 23:03:42.255626 02680000 ################################################################
10291 23:03:42.255767
10292 23:03:42.485246 02700000 ################################################################
10293 23:03:42.485402
10294 23:03:42.718078 02780000 ################################################################
10295 23:03:42.718218
10296 23:03:42.945565 02800000 ################################################################
10297 23:03:42.945700
10298 23:03:43.187575 02880000 ################################################################
10299 23:03:43.187711
10300 23:03:43.426998 02900000 ################################################################
10301 23:03:43.427157
10302 23:03:43.655059 02980000 ################################################################
10303 23:03:43.655192
10304 23:03:43.882679 02a00000 ################################################################
10305 23:03:43.882814
10306 23:03:44.115724 02a80000 ################################################################
10307 23:03:44.115857
10308 23:03:44.348442 02b00000 ################################################################
10309 23:03:44.348577
10310 23:03:44.584831 02b80000 ################################################################
10311 23:03:44.584961
10312 23:03:44.816182 02c00000 ################################################################
10313 23:03:44.816313
10314 23:03:45.074186 02c80000 ################################################################
10315 23:03:45.074318
10316 23:03:45.302992 02d00000 ################################################################
10317 23:03:45.303124
10318 23:03:45.550926 02d80000 ################################################################
10319 23:03:45.551060
10320 23:03:45.783257 02e00000 ################################################################
10321 23:03:45.783391
10322 23:03:46.026463 02e80000 ################################################################
10323 23:03:46.026601
10324 23:03:46.260379 02f00000 ################################################################
10325 23:03:46.260512
10326 23:03:46.502285 02f80000 ################################################################
10327 23:03:46.502420
10328 23:03:46.781936 03000000 ################################################################
10329 23:03:46.782431
10330 23:03:47.137475 03080000 ################################################################
10331 23:03:47.138050
10332 23:03:47.488949 03100000 ################################################################
10333 23:03:47.489602
10334 23:03:47.841381 03180000 ################################################################
10335 23:03:47.841941
10336 23:03:48.205319 03200000 ################################################################
10337 23:03:48.205837
10338 23:03:48.499448 03280000 ################################################################
10339 23:03:48.499592
10340 23:03:48.759530 03300000 ################################################################
10341 23:03:48.759661
10342 23:03:49.014990 03380000 ################################################################
10343 23:03:49.015126
10344 23:03:49.287656 03400000 ################################################################
10345 23:03:49.287794
10346 23:03:49.557591 03480000 ################################################################
10347 23:03:49.557759
10348 23:03:49.821207 03500000 ################################################################
10349 23:03:49.821350
10350 23:03:50.086916 03580000 ################################################################
10351 23:03:50.087057
10352 23:03:50.333456 03600000 ################################################################
10353 23:03:50.333599
10354 23:03:50.606722 03680000 ################################################################
10355 23:03:50.606859
10356 23:03:50.871825 03700000 ################################################################
10357 23:03:50.871966
10358 23:03:51.120153 03780000 ################################################################
10359 23:03:51.120291
10360 23:03:51.361642 03800000 ################################################################
10361 23:03:51.361782
10362 23:03:51.607414 03880000 ################################################################
10363 23:03:51.607552
10364 23:03:51.859662 03900000 ################################################################
10365 23:03:51.859807
10366 23:03:52.122033 03980000 ################################################################
10367 23:03:52.122180
10368 23:03:52.376931 03a00000 ################################################################
10369 23:03:52.377097
10370 23:03:52.612336 03a80000 ################################################################
10371 23:03:52.612498
10372 23:03:52.843887 03b00000 ################################################################
10373 23:03:52.844050
10374 23:03:53.099250 03b80000 ################################################################
10375 23:03:53.099392
10376 23:03:53.353268 03c00000 ################################################################
10377 23:03:53.353416
10378 23:03:53.624268 03c80000 ################################################################
10379 23:03:53.624432
10380 23:03:53.892274 03d00000 ################################################################
10381 23:03:53.892434
10382 23:03:54.134140 03d80000 ################################################################
10383 23:03:54.134276
10384 23:03:54.404647 03e00000 ################################################################
10385 23:03:54.404793
10386 23:03:54.673643 03e80000 ################################################################
10387 23:03:54.673786
10388 23:03:54.951147 03f00000 ################################################################
10389 23:03:54.951294
10390 23:03:55.215694 03f80000 ################################################################
10391 23:03:55.215857
10392 23:03:55.431163 04000000 #################################################### done.
10393 23:03:55.431321
10394 23:03:55.434943 The bootfile was 67528326 bytes long.
10395 23:03:55.435031
10396 23:03:55.437722 Sending tftp read request... done.
10397 23:03:55.437816
10398 23:03:55.441234 Waiting for the transfer...
10399 23:03:55.441345
10400 23:03:55.441433 00000000 # done.
10401 23:03:55.441511
10402 23:03:55.451175 Command line loaded dynamically from TFTP file: 12154408/tftp-deploy-1u7ryz3t/kernel/cmdline
10403 23:03:55.451382
10404 23:03:55.464517 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10405 23:03:55.464750
10406 23:03:55.464883 Loading FIT.
10407 23:03:55.465003
10408 23:03:55.468761 Image ramdisk-1 has 56435029 bytes.
10409 23:03:55.469009
10410 23:03:55.471278 Image fdt-1 has 47278 bytes.
10411 23:03:55.471570
10412 23:03:55.474635 Image kernel-1 has 11043984 bytes.
10413 23:03:55.474920
10414 23:03:55.481105 Compat preference: google,spherion-rev2-sku1 google,spherion-rev2 google,spherion-sku1 google,spherion
10415 23:03:55.481394
10416 23:03:55.501320 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 google,spherion-rev2 (match) google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192
10417 23:03:55.501880
10418 23:03:55.504143 Choosing best match conf-1 for compat google,spherion-rev2.
10419 23:03:55.510150
10420 23:03:55.514147 Connected to device vid:did:rid of 1ae0:0028:00
10421 23:03:55.521008
10422 23:03:55.524800 tpm_get_response: command 0x17b, return code 0x0
10423 23:03:55.525312
10424 23:03:55.528104 ec_init: CrosEC protocol v3 supported (256, 248)
10425 23:03:55.532348
10426 23:03:55.535046 tpm_cleanup: add release locality here.
10427 23:03:55.535497
10428 23:03:55.535838 Shutting down all USB controllers.
10429 23:03:55.538435
10430 23:03:55.538848 Removing current net device
10431 23:03:55.539179
10432 23:03:55.545119 Exiting depthcharge with code 4 at timestamp: 66019315
10433 23:03:55.545572
10434 23:03:55.548620 LZMA decompressing kernel-1 to 0x821a6718
10435 23:03:55.549035
10436 23:03:55.551750 LZMA decompressing kernel-1 to 0x40000000
10437 23:03:56.946471
10438 23:03:56.947035 jumping to kernel
10439 23:03:56.949166 end: 2.2.4 bootloader-commands (duration 00:00:38) [common]
10440 23:03:56.949721 start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
10441 23:03:56.950130 Setting prompt string to ['Linux version [0-9]']
10442 23:03:56.950513 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10443 23:03:56.950899 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10444 23:03:57.029181
10445 23:03:57.032162 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
10446 23:03:57.035948 start: 2.2.5.1 login-action (timeout 00:03:47) [common]
10447 23:03:57.036471 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10448 23:03:57.037053 Setting prompt string to []
10449 23:03:57.037753 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10450 23:03:57.038183 Using line separator: #'\n'#
10451 23:03:57.038526 No login prompt set.
10452 23:03:57.038867 Parsing kernel messages
10453 23:03:57.039212 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10454 23:03:57.039804 [login-action] Waiting for messages, (timeout 00:03:47)
10455 23:03:57.055816 [ 0.000000] Linux version 6.1.64-cip10 (KernelCI@build-j31357-arm64-gcc-10-defconfig-arm64-chromebook-69txj) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Dec 1 22:47:09 UTC 2023
10456 23:03:57.058610 [ 0.000000] random: crng init done
10457 23:03:57.064714 [ 0.000000] Machine model: Google Spherion (rev0 - 3)
10458 23:03:57.068019 [ 0.000000] efi: UEFI not found.
10459 23:03:57.074908 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
10460 23:03:57.084780 [ 0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool
10461 23:03:57.094927 [ 0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB
10462 23:03:57.101521 [ 0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool
10463 23:03:57.107674 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
10464 23:03:57.114412 [ 0.000000] printk: bootconsole [mtk8250] enabled
10465 23:03:57.121252 [ 0.000000] NUMA: No NUMA configuration found
10466 23:03:57.127715 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000023fffffff]
10467 23:03:57.134069 [ 0.000000] NUMA: NODE_DATA [mem 0x23efd0a00-0x23efd2fff]
10468 23:03:57.134597 [ 0.000000] Zone ranges:
10469 23:03:57.140770 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
10470 23:03:57.144156 [ 0.000000] DMA32 empty
10471 23:03:57.150386 [ 0.000000] Normal [mem 0x0000000100000000-0x000000023fffffff]
10472 23:03:57.153968 [ 0.000000] Movable zone start for each node
10473 23:03:57.157309 [ 0.000000] Early memory node ranges
10474 23:03:57.164471 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
10475 23:03:57.170616 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
10476 23:03:57.177041 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
10477 23:03:57.183338 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
10478 23:03:57.189955 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000023fffffff]
10479 23:03:57.196850 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000023fffffff]
10480 23:03:57.252536 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
10481 23:03:57.258983 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
10482 23:03:57.266067 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
10483 23:03:57.268882 [ 0.000000] psci: probing for conduit method from DT.
10484 23:03:57.276709 [ 0.000000] psci: PSCIv1.1 detected in firmware.
10485 23:03:57.278954 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
10486 23:03:57.285815 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
10487 23:03:57.289397 [ 0.000000] psci: SMC Calling Convention v1.2
10488 23:03:57.295318 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
10489 23:03:57.299090 [ 0.000000] Detected VIPT I-cache on CPU0
10490 23:03:57.305790 [ 0.000000] CPU features: detected: GIC system register CPU interface
10491 23:03:57.312364 [ 0.000000] CPU features: detected: Virtualization Host Extensions
10492 23:03:57.318567 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
10493 23:03:57.325175 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
10494 23:03:57.335121 [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
10495 23:03:57.341575 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
10496 23:03:57.345062 [ 0.000000] alternatives: applying boot alternatives
10497 23:03:57.351581 [ 0.000000] Fallback order for Node 0: 0
10498 23:03:57.358633 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2063616
10499 23:03:57.361525 [ 0.000000] Policy zone: Normal
10500 23:03:57.374919 [ 0.000000] Kernel command line: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10501 23:03:57.384509 <5>[ 0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.
10502 23:03:57.397227 <6>[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
10503 23:03:57.407235 <6>[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
10504 23:03:57.413688 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
10505 23:03:57.416976 <6>[ 0.000000] software IO TLB: area num 8.
10506 23:03:57.473350 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
10507 23:03:57.622635 <6>[ 0.000000] Memory: 7914440K/8385536K available (17984K kernel code, 4116K rwdata, 17316K rodata, 8448K init, 615K bss, 438328K reserved, 32768K cma-reserved)
10508 23:03:57.628669 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
10509 23:03:57.635479 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
10510 23:03:57.638618 <6>[ 0.000000] rcu: RCU event tracing is enabled.
10511 23:03:57.645582 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
10512 23:03:57.652390 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
10513 23:03:57.655191 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
10514 23:03:57.664956 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
10515 23:03:57.672381 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
10516 23:03:57.678489 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
10517 23:03:57.685378 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
10518 23:03:57.687940 <6>[ 0.000000] GICv3: 608 SPIs implemented
10519 23:03:57.691679 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
10520 23:03:57.698119 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
10521 23:03:57.701395 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
10522 23:03:57.708111 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000
10523 23:03:57.721142 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
10524 23:03:57.734584 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
10525 23:03:57.740933 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
10526 23:03:57.748752 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
10527 23:03:57.761918 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
10528 23:03:57.768886 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
10529 23:03:57.775554 <6>[ 0.009184] Console: colour dummy device 80x25
10530 23:03:57.785277 <6>[ 0.013942] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
10531 23:03:57.791438 <6>[ 0.024384] pid_max: default: 32768 minimum: 301
10532 23:03:57.795725 <6>[ 0.029255] LSM: Security Framework initializing
10533 23:03:57.801846 <6>[ 0.034193] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10534 23:03:57.811656 <6>[ 0.042008] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10535 23:03:57.821655 <6>[ 0.051426] cblist_init_generic: Setting adjustable number of callback queues.
10536 23:03:57.825068 <6>[ 0.058868] cblist_init_generic: Setting shift to 3 and lim to 1.
10537 23:03:57.834934 <6>[ 0.065208] cblist_init_generic: Setting adjustable number of callback queues.
10538 23:03:57.841946 <6>[ 0.072635] cblist_init_generic: Setting shift to 3 and lim to 1.
10539 23:03:57.844457 <6>[ 0.079077] rcu: Hierarchical SRCU implementation.
10540 23:03:57.851362 <6>[ 0.084093] rcu: Max phase no-delay instances is 1000.
10541 23:03:57.857936 <6>[ 0.091126] EFI services will not be available.
10542 23:03:57.861002 <6>[ 0.096113] smp: Bringing up secondary CPUs ...
10543 23:03:57.869373 <6>[ 0.101164] Detected VIPT I-cache on CPU1
10544 23:03:57.876431 <6>[ 0.101234] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
10545 23:03:57.882604 <6>[ 0.101265] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
10546 23:03:57.885951 <6>[ 0.101612] Detected VIPT I-cache on CPU2
10547 23:03:57.896704 <6>[ 0.101664] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000
10548 23:03:57.902841 <6>[ 0.101681] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]
10549 23:03:57.905543 <6>[ 0.101935] Detected VIPT I-cache on CPU3
10550 23:03:57.912411 <6>[ 0.101982] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000
10551 23:03:57.918781 <6>[ 0.101996] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]
10552 23:03:57.925643 <6>[ 0.102298] CPU features: detected: Spectre-v4
10553 23:03:57.928881 <6>[ 0.102305] CPU features: detected: Spectre-BHB
10554 23:03:57.931954 <6>[ 0.102310] Detected PIPT I-cache on CPU4
10555 23:03:57.938429 <6>[ 0.102367] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000
10556 23:03:57.945597 <6>[ 0.102384] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]
10557 23:03:57.951646 <6>[ 0.102673] Detected PIPT I-cache on CPU5
10558 23:03:57.958505 <6>[ 0.102735] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000
10559 23:03:57.965027 <6>[ 0.102752] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]
10560 23:03:57.968195 <6>[ 0.103031] Detected PIPT I-cache on CPU6
10561 23:03:57.978145 <6>[ 0.103095] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000
10562 23:03:57.985404 <6>[ 0.103111] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]
10563 23:03:57.988121 <6>[ 0.103407] Detected PIPT I-cache on CPU7
10564 23:03:57.994550 <6>[ 0.103471] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000
10565 23:03:58.001549 <6>[ 0.103487] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]
10566 23:03:58.005199 <6>[ 0.103534] smp: Brought up 1 node, 8 CPUs
10567 23:03:58.011026 <6>[ 0.244823] SMP: Total of 8 processors activated.
10568 23:03:58.018098 <6>[ 0.249744] CPU features: detected: 32-bit EL0 Support
10569 23:03:58.024366 <6>[ 0.255141] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
10570 23:03:58.030655 <6>[ 0.263996] CPU features: detected: Common not Private translations
10571 23:03:58.037832 <6>[ 0.270512] CPU features: detected: CRC32 instructions
10572 23:03:58.044424 <6>[ 0.275863] CPU features: detected: RCpc load-acquire (LDAPR)
10573 23:03:58.047731 <6>[ 0.281822] CPU features: detected: LSE atomic instructions
10574 23:03:58.054249 <6>[ 0.287604] CPU features: detected: Privileged Access Never
10575 23:03:58.060611 <6>[ 0.293419] CPU features: detected: RAS Extension Support
10576 23:03:58.066861 <6>[ 0.299062] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
10577 23:03:58.070183 <6>[ 0.306328] CPU: All CPU(s) started at EL2
10578 23:03:58.076780 <6>[ 0.310644] alternatives: applying system-wide alternatives
10579 23:03:58.087173 <6>[ 0.321350] devtmpfs: initialized
10580 23:03:58.103162 <6>[ 0.330271] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
10581 23:03:58.109554 <6>[ 0.340227] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
10582 23:03:58.117138 <6>[ 0.348455] pinctrl core: initialized pinctrl subsystem
10583 23:03:58.120093 <6>[ 0.355095] DMI not present or invalid.
10584 23:03:58.125783 <6>[ 0.359501] NET: Registered PF_NETLINK/PF_ROUTE protocol family
10585 23:03:58.135992 <6>[ 0.366376] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
10586 23:03:58.142485 <6>[ 0.373946] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
10587 23:03:58.152008 <6>[ 0.382173] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
10588 23:03:58.155680 <6>[ 0.390417] audit: initializing netlink subsys (disabled)
10589 23:03:58.165993 <5>[ 0.396108] audit: type=2000 audit(0.280:1): state=initialized audit_enabled=0 res=1
10590 23:03:58.172314 <6>[ 0.396805] thermal_sys: Registered thermal governor 'step_wise'
10591 23:03:58.178825 <6>[ 0.404073] thermal_sys: Registered thermal governor 'power_allocator'
10592 23:03:58.182091 <6>[ 0.410328] cpuidle: using governor menu
10593 23:03:58.188609 <6>[ 0.421285] NET: Registered PF_QIPCRTR protocol family
10594 23:03:58.195633 <6>[ 0.426760] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
10595 23:03:58.201649 <6>[ 0.433863] ASID allocator initialised with 32768 entries
10596 23:03:58.204911 <6>[ 0.440421] Serial: AMBA PL011 UART driver
10597 23:03:58.215013 <4>[ 0.449159] Trying to register duplicate clock ID: 134
10598 23:03:58.269496 <6>[ 0.506631] KASLR enabled
10599 23:03:58.284041 <6>[ 0.514350] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
10600 23:03:58.290196 <6>[ 0.521363] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
10601 23:03:58.297301 <6>[ 0.527852] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
10602 23:03:58.303276 <6>[ 0.534856] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
10603 23:03:58.310415 <6>[ 0.541343] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
10604 23:03:58.316721 <6>[ 0.548347] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
10605 23:03:58.323558 <6>[ 0.554833] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
10606 23:03:58.329770 <6>[ 0.561837] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
10607 23:03:58.333057 <6>[ 0.569344] ACPI: Interpreter disabled.
10608 23:03:58.341938 <6>[ 0.575701] iommu: Default domain type: Translated
10609 23:03:58.348541 <6>[ 0.580813] iommu: DMA domain TLB invalidation policy: strict mode
10610 23:03:58.352162 <5>[ 0.587475] SCSI subsystem initialized
10611 23:03:58.358487 <6>[ 0.591637] usbcore: registered new interface driver usbfs
10612 23:03:58.364891 <6>[ 0.597370] usbcore: registered new interface driver hub
10613 23:03:58.368061 <6>[ 0.602923] usbcore: registered new device driver usb
10614 23:03:58.375097 <6>[ 0.609016] pps_core: LinuxPPS API ver. 1 registered
10615 23:03:58.385130 <6>[ 0.614209] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
10616 23:03:58.388004 <6>[ 0.623557] PTP clock support registered
10617 23:03:58.391213 <6>[ 0.627800] EDAC MC: Ver: 3.0.0
10618 23:03:58.399992 <6>[ 0.632948] FPGA manager framework
10619 23:03:58.405800 <6>[ 0.636629] Advanced Linux Sound Architecture Driver Initialized.
10620 23:03:58.408558 <6>[ 0.643407] vgaarb: loaded
10621 23:03:58.415272 <6>[ 0.646563] clocksource: Switched to clocksource arch_sys_counter
10622 23:03:58.418758 <5>[ 0.653005] VFS: Disk quotas dquot_6.6.0
10623 23:03:58.424929 <6>[ 0.657192] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
10624 23:03:58.428401 <6>[ 0.664379] pnp: PnP ACPI: disabled
10625 23:03:58.437114 <6>[ 0.671059] NET: Registered PF_INET protocol family
10626 23:03:58.446884 <6>[ 0.676642] IP idents hash table entries: 131072 (order: 8, 1048576 bytes, linear)
10627 23:03:58.458079 <6>[ 0.688976] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
10628 23:03:58.468268 <6>[ 0.697790] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
10629 23:03:58.475021 <6>[ 0.705759] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
10630 23:03:58.484792 <6>[ 0.714457] TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
10631 23:03:58.491274 <6>[ 0.724207] TCP: Hash tables configured (established 65536 bind 65536)
10632 23:03:58.497808 <6>[ 0.731072] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
10633 23:03:58.507567 <6>[ 0.738267] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
10634 23:03:58.514092 <6>[ 0.745971] NET: Registered PF_UNIX/PF_LOCAL protocol family
10635 23:03:58.521316 <6>[ 0.752120] RPC: Registered named UNIX socket transport module.
10636 23:03:58.524319 <6>[ 0.758275] RPC: Registered udp transport module.
10637 23:03:58.530658 <6>[ 0.763206] RPC: Registered tcp transport module.
10638 23:03:58.536996 <6>[ 0.768138] RPC: Registered tcp NFSv4.1 backchannel transport module.
10639 23:03:58.540469 <6>[ 0.774801] PCI: CLS 0 bytes, default 64
10640 23:03:58.543926 <6>[ 0.779207] Unpacking initramfs...
10641 23:03:58.553777 <6>[ 0.782911] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available
10642 23:03:58.560057 <6>[ 0.791547] hw perfevents: enabled with armv8_cortex_a76 PMU driver, 7 counters available
10643 23:03:58.566710 <6>[ 0.800397] kvm [1]: IPA Size Limit: 40 bits
10644 23:03:58.570277 <6>[ 0.804930] kvm [1]: GICv3: no GICV resource entry
10645 23:03:58.576792 <6>[ 0.809950] kvm [1]: disabling GICv2 emulation
10646 23:03:58.583170 <6>[ 0.814636] kvm [1]: GIC system register CPU interface enabled
10647 23:03:58.586661 <6>[ 0.820807] kvm [1]: vgic interrupt IRQ18
10648 23:03:58.593231 <6>[ 0.826606] kvm [1]: VHE mode initialized successfully
10649 23:03:58.600238 <5>[ 0.833089] Initialise system trusted keyrings
10650 23:03:58.606478 <6>[ 0.837893] workingset: timestamp_bits=42 max_order=21 bucket_order=0
10651 23:03:58.614117 <6>[ 0.847896] squashfs: version 4.0 (2009/01/31) Phillip Lougher
10652 23:03:58.621307 <5>[ 0.854262] NFS: Registering the id_resolver key type
10653 23:03:58.623933 <5>[ 0.859579] Key type id_resolver registered
10654 23:03:58.630952 <5>[ 0.863995] Key type id_legacy registered
10655 23:03:58.637016 <6>[ 0.868273] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
10656 23:03:58.643531 <6>[ 0.875193] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
10657 23:03:58.650134 <6>[ 0.882909] 9p: Installing v9fs 9p2000 file system support
10658 23:03:58.686659 <5>[ 0.920742] Key type asymmetric registered
10659 23:03:58.690305 <5>[ 0.925077] Asymmetric key parser 'x509' registered
10660 23:03:58.700054 <6>[ 0.930223] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
10661 23:03:58.703392 <6>[ 0.937838] io scheduler mq-deadline registered
10662 23:03:58.706253 <6>[ 0.942599] io scheduler kyber registered
10663 23:03:58.725596 <6>[ 0.959577] EINJ: ACPI disabled.
10664 23:03:58.757844 <4>[ 0.985167] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10665 23:03:58.767387 <4>[ 0.995791] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10666 23:03:58.782485 <6>[ 1.016441] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
10667 23:03:58.790170 <6>[ 1.024464] printk: console [ttyS0] disabled
10668 23:03:58.818454 <6>[ 1.049114] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 255, base_baud = 1625000) is a ST16650V2
10669 23:03:58.825266 <6>[ 1.058594] printk: console [ttyS0] enabled
10670 23:03:58.828585 <6>[ 1.058594] printk: console [ttyS0] enabled
10671 23:03:58.834645 <6>[ 1.067488] printk: bootconsole [mtk8250] disabled
10672 23:03:58.837954 <6>[ 1.067488] printk: bootconsole [mtk8250] disabled
10673 23:03:58.845067 <6>[ 1.078592] SuperH (H)SCI(F) driver initialized
10674 23:03:58.848425 <6>[ 1.083869] msm_serial: driver initialized
10675 23:03:58.862241 <6>[ 1.092857] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000
10676 23:03:58.872421 <6>[ 1.101413] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000
10677 23:03:58.878876 <6>[ 1.109955] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000
10678 23:03:58.888424 <6>[ 1.118584] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000
10679 23:03:58.898398 <6>[ 1.127291] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000
10680 23:03:58.905475 <6>[ 1.136003] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000
10681 23:03:58.915085 <6>[ 1.144542] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000
10682 23:03:58.921373 <6>[ 1.153354] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000
10683 23:03:58.932080 <6>[ 1.161898] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000
10684 23:03:58.943589 <6>[ 1.177513] loop: module loaded
10685 23:03:58.950468 <6>[ 1.183569] vgpu11_sshub: Bringing 400000uV into 575000-575000uV
10686 23:03:58.973270 <4>[ 1.206912] mtk-pmic-keys: Failed to locate of_node [id: -1]
10687 23:03:58.980767 <6>[ 1.214025] megasas: 07.719.03.00-rc1
10688 23:03:58.990080 <6>[ 1.223787] spi-nor spi2.0: w25q64jwm (8192 Kbytes)
10689 23:03:58.996448 <6>[ 1.229936] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2
10690 23:03:59.011808 <6>[ 1.245801] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)
10691 23:03:59.071291 <6>[ 1.299037] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.30/cr50_v1.9308_B.954-4f0f7
10692 23:04:00.957969 <6>[ 3.191984] Freeing initrd memory: 55112K
10693 23:04:00.968235 <6>[ 3.202488] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz
10694 23:04:00.978977 <6>[ 3.213386] tun: Universal TUN/TAP device driver, 1.6
10695 23:04:00.982357 <6>[ 3.219447] thunder_xcv, ver 1.0
10696 23:04:00.985942 <6>[ 3.222954] thunder_bgx, ver 1.0
10697 23:04:00.988865 <6>[ 3.226444] nicpf, ver 1.0
10698 23:04:00.999664 <6>[ 3.230452] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
10699 23:04:01.002962 <6>[ 3.237928] hns3: Copyright (c) 2017 Huawei Corporation.
10700 23:04:01.009744 <6>[ 3.243513] hclge is initializing
10701 23:04:01.012703 <6>[ 3.247092] e1000: Intel(R) PRO/1000 Network Driver
10702 23:04:01.019346 <6>[ 3.252221] e1000: Copyright (c) 1999-2006 Intel Corporation.
10703 23:04:01.026295 <6>[ 3.258232] e1000e: Intel(R) PRO/1000 Network Driver
10704 23:04:01.028825 <6>[ 3.263448] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
10705 23:04:01.035478 <6>[ 3.269632] igb: Intel(R) Gigabit Ethernet Network Driver
10706 23:04:01.042797 <6>[ 3.275282] igb: Copyright (c) 2007-2014 Intel Corporation.
10707 23:04:01.048572 <6>[ 3.281121] igbvf: Intel(R) Gigabit Virtual Function Network Driver
10708 23:04:01.055528 <6>[ 3.287638] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
10709 23:04:01.058485 <6>[ 3.294100] sky2: driver version 1.30
10710 23:04:01.064754 <6>[ 3.299096] VFIO - User Level meta-driver version: 0.3
10711 23:04:01.073888 <6>[ 3.307350] usbcore: registered new interface driver usb-storage
10712 23:04:01.079904 <6>[ 3.313795] usbcore: registered new device driver onboard-usb-hub
10713 23:04:01.088985 <6>[ 3.322929] mt6397-rtc mt6359-rtc: registered as rtc0
10714 23:04:01.099012 <6>[ 3.328395] mt6397-rtc mt6359-rtc: setting system clock to 2023-12-01T23:04:01 UTC (1701471841)
10715 23:04:01.101942 <6>[ 3.337978] i2c_dev: i2c /dev entries driver
10716 23:04:01.119314 <6>[ 3.349613] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
10717 23:04:01.139890 <6>[ 3.373611] cpu cpu0: EM: created perf domain
10718 23:04:01.142573 <6>[ 3.378530] cpu cpu4: EM: created perf domain
10719 23:04:01.149983 <6>[ 3.384134] sdhci: Secure Digital Host Controller Interface driver
10720 23:04:01.156357 <6>[ 3.390564] sdhci: Copyright(c) Pierre Ossman
10721 23:04:01.163374 <6>[ 3.395525] Synopsys Designware Multimedia Card Interface Driver
10722 23:04:01.169760 <6>[ 3.402158] sdhci-pltfm: SDHCI platform and OF driver helper
10723 23:04:01.173100 <6>[ 3.402186] mmc0: CQHCI version 5.10
10724 23:04:01.179578 <6>[ 3.412208] ledtrig-cpu: registered to indicate activity on CPUs
10725 23:04:01.186255 <6>[ 3.419202] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000
10726 23:04:01.192836 <6>[ 3.426261] usbcore: registered new interface driver usbhid
10727 23:04:01.196544 <6>[ 3.432083] usbhid: USB HID core driver
10728 23:04:01.202476 <6>[ 3.436297] spi_master spi0: will run message pump with realtime priority
10729 23:04:01.250430 <6>[ 3.478156] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0
10730 23:04:01.272101 <6>[ 3.495768] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1
10731 23:04:01.275102 <6>[ 3.509380] mmc0: Command Queue Engine enabled
10732 23:04:01.281335 <6>[ 3.514209] mmc0: new HS400 Enhanced strobe MMC card at address 0001
10733 23:04:01.288235 <6>[ 3.521506] mmcblk0: mmc0:0001 DA4128 116 GiB
10734 23:04:01.291503 <6>[ 3.526468] cros-ec-spi spi0.0: Chrome EC device registered
10735 23:04:01.298312 <6>[ 3.530347] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
10736 23:04:01.305934 <6>[ 3.540198] mmcblk0boot0: mmc0:0001 DA4128 4.00 MiB
10737 23:04:01.312739 <6>[ 3.546186] mmcblk0boot1: mmc0:0001 DA4128 4.00 MiB
10738 23:04:01.319440 <6>[ 3.552434] mmcblk0rpmb: mmc0:0001 DA4128 16.0 MiB, chardev (507:0)
10739 23:04:01.336789 <6>[ 3.567629] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)
10740 23:04:01.343963 <6>[ 3.578264] NET: Registered PF_PACKET protocol family
10741 23:04:01.347426 <6>[ 3.583670] 9pnet: Installing 9P2000 support
10742 23:04:01.353964 <5>[ 3.588241] Key type dns_resolver registered
10743 23:04:01.357431 <6>[ 3.593246] registered taskstats version 1
10744 23:04:01.364243 <5>[ 3.597632] Loading compiled-in X.509 certificates
10745 23:04:01.395664 <4>[ 3.623279] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10746 23:04:01.405472 <4>[ 3.634054] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10747 23:04:01.412436 <3>[ 3.644608] debugfs: File 'uA_load' in directory '/' already present!
10748 23:04:01.419084 <3>[ 3.651315] debugfs: File 'min_uV' in directory '/' already present!
10749 23:04:01.426181 <3>[ 3.657923] debugfs: File 'max_uV' in directory '/' already present!
10750 23:04:01.431880 <3>[ 3.664528] debugfs: File 'constraint_flags' in directory '/' already present!
10751 23:04:01.443693 <3>[ 3.674349] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)
10752 23:04:01.452593 <6>[ 3.686909] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102
10753 23:04:01.459746 <6>[ 3.693700] xhci-mtk 11200000.usb: xHCI Host Controller
10754 23:04:01.466323 <6>[ 3.699195] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
10755 23:04:01.476901 <6>[ 3.707064] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
10756 23:04:01.483039 <6>[ 3.716490] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000
10757 23:04:01.489766 <6>[ 3.722572] xhci-mtk 11200000.usb: xHCI Host Controller
10758 23:04:01.495888 <6>[ 3.728051] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
10759 23:04:01.502869 <6>[ 3.735696] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed
10760 23:04:01.509123 <6>[ 3.743368] hub 1-0:1.0: USB hub found
10761 23:04:01.512901 <6>[ 3.747379] hub 1-0:1.0: 1 port detected
10762 23:04:01.522421 <6>[ 3.751654] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
10763 23:04:01.525746 <6>[ 3.760206] hub 2-0:1.0: USB hub found
10764 23:04:01.528894 <6>[ 3.764213] hub 2-0:1.0: 1 port detected
10765 23:04:01.538034 <6>[ 3.772078] mtk-msdc 11f70000.mmc: Got CD GPIO
10766 23:04:01.549950 <6>[ 3.780951] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()
10767 23:04:01.556550 <6>[ 3.788984] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()
10768 23:04:01.566465 <4>[ 3.796918] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW
10769 23:04:01.576932 <6>[ 3.806445] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()
10770 23:04:01.583063 <6>[ 3.814521] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()
10771 23:04:01.589883 <6>[ 3.822547] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()
10772 23:04:01.599557 <6>[ 3.830471] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()
10773 23:04:01.606397 <6>[ 3.838288] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()
10774 23:04:01.616137 <6>[ 3.846106] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39
10775 23:04:01.626681 <6>[ 3.856462] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)
10776 23:04:01.633029 <6>[ 3.864821] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)
10777 23:04:01.642678 <6>[ 3.873170] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)
10778 23:04:01.649111 <6>[ 3.881509] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)
10779 23:04:01.659087 <6>[ 3.889848] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)
10780 23:04:01.668764 <6>[ 3.898190] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)
10781 23:04:01.675659 <6>[ 3.906528] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)
10782 23:04:01.685681 <6>[ 3.914867] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)
10783 23:04:01.691626 <6>[ 3.923206] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
10784 23:04:01.701818 <6>[ 3.931544] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
10785 23:04:01.708171 <6>[ 3.939883] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)
10786 23:04:01.718104 <6>[ 3.948222] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)
10787 23:04:01.724501 <6>[ 3.956565] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)
10788 23:04:01.734560 <6>[ 3.964905] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)
10789 23:04:01.741483 <6>[ 3.973243] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)
10790 23:04:01.748031 <6>[ 3.981980] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0
10791 23:04:01.754636 <6>[ 3.989166] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0
10792 23:04:01.761194 <6>[ 3.995926] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0
10793 23:04:01.771491 <6>[ 4.002697] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0
10794 23:04:01.778253 <6>[ 4.009627] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0
10795 23:04:01.784597 <6>[ 4.016469] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)
10796 23:04:01.794360 <6>[ 4.025601] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)
10797 23:04:01.804393 <6>[ 4.034721] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)
10798 23:04:01.814244 <6>[ 4.044014] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)
10799 23:04:01.824732 <6>[ 4.053483] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)
10800 23:04:01.834409 <6>[ 4.062950] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)
10801 23:04:01.841367 <6>[ 4.072071] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)
10802 23:04:01.851225 <6>[ 4.081538] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)
10803 23:04:01.860641 <6>[ 4.090656] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)
10804 23:04:01.870141 <6>[ 4.099950] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing
10805 23:04:01.880382 <6>[ 4.110110] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing
10806 23:04:01.890674 <6>[ 4.121735] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0
10807 23:04:01.939995 <6>[ 4.170837] usb 1-1: new high-speed USB device number 2 using xhci-mtk
10808 23:04:02.094523 <6>[ 4.328937] hub 1-1:1.0: USB hub found
10809 23:04:02.098045 <6>[ 4.333456] hub 1-1:1.0: 4 ports detected
10810 23:04:02.107761 <6>[ 4.342188] hub 1-1:1.0: USB hub found
10811 23:04:02.110770 <6>[ 4.346568] hub 1-1:1.0: 4 ports detected
10812 23:04:02.220680 <6>[ 4.451197] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
10813 23:04:02.245854 <6>[ 4.480373] hub 2-1:1.0: USB hub found
10814 23:04:02.249314 <6>[ 4.484920] hub 2-1:1.0: 3 ports detected
10815 23:04:02.258778 <6>[ 4.492963] hub 2-1:1.0: USB hub found
10816 23:04:02.262247 <6>[ 4.497416] hub 2-1:1.0: 3 ports detected
10817 23:04:02.436030 <6>[ 4.666873] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
10818 23:04:02.567343 <6>[ 4.801084] hub 1-1.1:1.0: USB hub found
10819 23:04:02.569967 <6>[ 4.805431] hub 1-1.1:1.0: 4 ports detected
10820 23:04:02.684161 <6>[ 4.914999] usb 1-1.4: new high-speed USB device number 4 using xhci-mtk
10821 23:04:02.816333 <6>[ 5.050670] hub 1-1.4:1.0: USB hub found
10822 23:04:02.819896 <6>[ 5.055331] hub 1-1.4:1.0: 2 ports detected
10823 23:04:02.828816 <6>[ 5.063398] hub 1-1.4:1.0: USB hub found
10824 23:04:02.832165 <6>[ 5.067950] hub 1-1.4:1.0: 2 ports detected
10825 23:04:02.895166 <6>[ 5.126679] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
10826 23:04:03.084030 <6>[ 5.314872] usb 1-1.1.4: new full-speed USB device number 6 using xhci-mtk
10827 23:04:03.168676 <3>[ 5.403060] usb 1-1.1.4: device descriptor read/64, error -32
10828 23:04:03.360301 <3>[ 5.595066] usb 1-1.1.4: device descriptor read/64, error -32
10829 23:04:03.555470 <6>[ 5.786875] usb 1-1.1.4: new full-speed USB device number 7 using xhci-mtk
10830 23:04:03.640729 <3>[ 5.875063] usb 1-1.1.4: device descriptor read/64, error -32
10831 23:04:03.832710 <3>[ 6.067056] usb 1-1.1.4: device descriptor read/64, error -32
10832 23:04:03.945005 <6>[ 6.179388] usb 1-1.1-port4: attempt power cycle
10833 23:04:04.027299 <6>[ 6.258830] usb 1-1.4.1: new high-speed USB device number 8 using xhci-mtk
10834 23:04:04.219180 <6>[ 6.450873] usb 1-1.4.2: new high-speed USB device number 9 using xhci-mtk
10835 23:04:04.615486 <6>[ 6.846872] usb 1-1.1.4: new full-speed USB device number 10 using xhci-mtk
10836 23:04:04.621904 <4>[ 6.854353] usb 1-1.1.4: Device not responding to setup address.
10837 23:04:04.832268 <4>[ 7.067155] usb 1-1.1.4: Device not responding to setup address.
10838 23:04:05.044160 <3>[ 7.278840] usb 1-1.1.4: device not accepting address 10, error -71
10839 23:04:05.131401 <6>[ 7.362867] usb 1-1.1.4: new full-speed USB device number 11 using xhci-mtk
10840 23:04:05.137716 <4>[ 7.370271] usb 1-1.1.4: Device not responding to setup address.
10841 23:04:05.348688 <4>[ 7.583114] usb 1-1.1.4: Device not responding to setup address.
10842 23:04:05.559869 <3>[ 7.794863] usb 1-1.1.4: device not accepting address 11, error -71
10843 23:04:05.566912 <3>[ 7.801902] usb 1-1.1-port4: unable to enumerate USB device
10844 23:04:14.192657 <6>[ 16.431835] ALSA device list:
10845 23:04:14.198982 <6>[ 16.435126] No soundcards found.
10846 23:04:14.208054 <6>[ 16.443138] Freeing unused kernel memory: 8448K
10847 23:04:14.210616 <6>[ 16.448154] Run /init as init process
10848 23:04:14.259671 <6>[ 16.495240] NET: Registered PF_INET6 protocol family
10849 23:04:14.266235 <6>[ 16.501573] Segment Routing with IPv6
10850 23:04:14.269459 <6>[ 16.505534] In-situ OAM (IOAM) with IPv6
10851 23:04:14.304320 <30>[ 16.520294] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
10852 23:04:14.307312 <30>[ 16.544367] systemd[1]: Detected architecture arm64.
10853 23:04:14.310991
10854 23:04:14.314365 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
10855 23:04:14.314777
10856 23:04:14.326884 <30>[ 16.562882] systemd[1]: Set hostname to <debian-bullseye-arm64>.
10857 23:04:14.522344 <30>[ 16.755131] systemd[1]: Queued start job for default target Graphical Interface.
10858 23:04:14.567994 <30>[ 16.803883] systemd[1]: Created slice system-getty.slice.
10859 23:04:14.574297 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
10860 23:04:14.591895 <30>[ 16.827534] systemd[1]: Created slice system-modprobe.slice.
10861 23:04:14.598261 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
10862 23:04:14.615607 <30>[ 16.851352] systemd[1]: Created slice system-serial\x2dgetty.slice.
10863 23:04:14.625283 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
10864 23:04:14.639657 <30>[ 16.875499] systemd[1]: Created slice User and Session Slice.
10865 23:04:14.646181 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
10866 23:04:14.667256 <30>[ 16.899599] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
10867 23:04:14.677058 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
10868 23:04:14.695075 <30>[ 16.927613] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
10869 23:04:14.702029 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
10870 23:04:14.725540 <30>[ 16.954930] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.
10871 23:04:14.732107 <30>[ 16.967068] systemd[1]: Reached target Local Encrypted Volumes.
10872 23:04:14.738903 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
10873 23:04:14.755766 <30>[ 16.991343] systemd[1]: Reached target Paths.
10874 23:04:14.759157 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
10875 23:04:14.775883 <30>[ 17.010839] systemd[1]: Reached target Remote File Systems.
10876 23:04:14.781859 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
10877 23:04:14.794798 <30>[ 17.030820] systemd[1]: Reached target Slices.
10878 23:04:14.798512 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
10879 23:04:14.815151 <30>[ 17.050867] systemd[1]: Reached target Swap.
10880 23:04:14.817956 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
10881 23:04:14.838673 <30>[ 17.071327] systemd[1]: Listening on initctl Compatibility Named Pipe.
10882 23:04:14.845191 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
10883 23:04:14.851824 <30>[ 17.086410] systemd[1]: Listening on Journal Audit Socket.
10884 23:04:14.858699 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
10885 23:04:14.871471 <30>[ 17.107325] systemd[1]: Listening on Journal Socket (/dev/log).
10886 23:04:14.878625 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
10887 23:04:14.896653 <30>[ 17.132059] systemd[1]: Listening on Journal Socket.
10888 23:04:14.902840 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
10889 23:04:14.915572 <30>[ 17.151408] systemd[1]: Listening on udev Control Socket.
10890 23:04:14.922155 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
10891 23:04:14.939924 <30>[ 17.175865] systemd[1]: Listening on udev Kernel Socket.
10892 23:04:14.946612 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
10893 23:04:14.995376 <30>[ 17.231112] systemd[1]: Mounting Huge Pages File System...
10894 23:04:15.002107 Mounting [0;1;39mHuge Pages File System[0m...
10895 23:04:15.017873 <30>[ 17.253807] systemd[1]: Mounting POSIX Message Queue File System...
10896 23:04:15.025187 Mounting [0;1;39mPOSIX Message Queue File System[0m...
10897 23:04:15.043589 <30>[ 17.278953] systemd[1]: Mounting Kernel Debug File System...
10898 23:04:15.049921 Mounting [0;1;39mKernel Debug File System[0m...
10899 23:04:15.066762 <30>[ 17.299283] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
10900 23:04:15.079981 <30>[ 17.312228] systemd[1]: Starting Create list of static device nodes for the current kernel...
10901 23:04:15.086279 Starting [0;1;39mCreate list of st…odes for the current kernel[0m...
10902 23:04:15.139623 <30>[ 17.375172] systemd[1]: Starting Load Kernel Module configfs...
10903 23:04:15.145800 Starting [0;1;39mLoad Kernel Module configfs[0m...
10904 23:04:15.163410 <30>[ 17.399231] systemd[1]: Starting Load Kernel Module drm...
10905 23:04:15.169952 Starting [0;1;39mLoad Kernel Module drm[0m...
10906 23:04:15.190739 <30>[ 17.423251] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.
10907 23:04:15.235652 <30>[ 17.471382] systemd[1]: Starting Journal Service...
10908 23:04:15.238874 Starting [0;1;39mJournal Service[0m...
10909 23:04:15.257982 <30>[ 17.493987] systemd[1]: Starting Load Kernel Modules...
10910 23:04:15.264558 Starting [0;1;39mLoad Kernel Modules[0m...
10911 23:04:15.284782 <30>[ 17.517191] systemd[1]: Starting Remount Root and Kernel File Systems...
10912 23:04:15.291083 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
10913 23:04:15.309753 <30>[ 17.545629] systemd[1]: Starting Coldplug All udev Devices...
10914 23:04:15.316475 Starting [0;1;39mColdplug All udev Devices[0m...
10915 23:04:15.334357 <30>[ 17.569977] systemd[1]: Started Journal Service.
10916 23:04:15.340681 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
10917 23:04:15.357332 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
10918 23:04:15.376320 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
10919 23:04:15.396495 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
10920 23:04:15.416281 [[0;32m OK [0m] Finished [0;1;39mCreate list of st… nodes for the current kernel[0m.
10921 23:04:15.436993 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
10922 23:04:15.452478 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
10923 23:04:15.468895 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
10924 23:04:15.489085 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
10925 23:04:15.502900 See 'systemctl status systemd-remount-fs.service' for details.
10926 23:04:15.545344 Mounting [0;1;39mKernel Configuration File System[0m...
10927 23:04:15.562281 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
10928 23:04:15.575660 <46>[ 17.808221] systemd-journald[176]: Received client request to flush runtime journal.
10929 23:04:15.584688 Starting [0;1;39mLoad/Save Random Seed[0m...
10930 23:04:15.607817 Starting [0;1;39mApply Kernel Variables[0m...
10931 23:04:15.627816 Starting [0;1;39mCreate System Users[0m...
10932 23:04:15.653378 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
10933 23:04:15.671738 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
10934 23:04:15.692079 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
10935 23:04:15.704472 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
10936 23:04:15.720105 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
10937 23:04:15.739970 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
10938 23:04:15.804151 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
10939 23:04:15.838956 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
10940 23:04:15.852243 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
10941 23:04:15.867065 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
10942 23:04:15.927480 Starting [0;1;39mCreate Volatile Files and Directories[0m...
10943 23:04:15.952296 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
10944 23:04:15.973462 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
10945 23:04:15.992783 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
10946 23:04:16.053312 Starting [0;1;39mNetwork Time Synchronization[0m...
10947 23:04:16.077684 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
10948 23:04:16.130898 [[0;32m OK [0m] Created slice [0;1;39msystem-systemd\x2dbacklight.slice[0m.
10949 23:04:16.148378 <6>[ 18.381189] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000
10950 23:04:16.155361 <6>[ 18.381796] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:
10951 23:04:16.164961 <6>[ 18.397608] mtk-pcie-gen3 11230000.pcie: MEM 0x0012000000..0x00127fffff -> 0x0012000000
10952 23:04:16.171334 <6>[ 18.397629] remoteproc remoteproc0: scp is available
10953 23:04:16.177870 <6>[ 18.407172] mtk-pcie-gen3 11230000.pcie: IO 0x0012800000..0x0012ffffff -> 0x0012800000
10954 23:04:16.184365 <6>[ 18.411746] remoteproc remoteproc0: powering up scp
10955 23:04:16.195091 <6>[ 18.426461] remoteproc remoteproc0: Booting fw image mediatek/mt8192/scp.img, size 309164
10956 23:04:16.197634 <6>[ 18.435037] mtk-scp 10500000.scp: IPI buf addr 0x000ffdb0
10957 23:04:16.214798 Starting [0;1;39mLoad/Save Screen …of leds:white:kbd<6>[ 18.449245] mc: Linux media interface: v0.10
10958 23:04:16.221359 _backlight[0m..<4>[ 18.449724] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator
10959 23:04:16.221538 .
10960 23:04:16.231898 <3>[ 18.464840] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10961 23:04:16.238885 <3>[ 18.473076] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10962 23:04:16.248121 <4>[ 18.473653] elants_i2c 4-0010: supply vccio not found, using dummy regulator
10963 23:04:16.254682 <3>[ 18.481163] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10964 23:04:16.261635 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
10965 23:04:16.271296 <3>[ 18.504054] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10966 23:04:16.278432 <3>[ 18.512218] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10967 23:04:16.288144 <3>[ 18.520306] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10968 23:04:16.294917 <3>[ 18.528458] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10969 23:04:16.301807 <6>[ 18.533240] videodev: Linux video capture interface: v2.00
10970 23:04:16.308058 <3>[ 18.536540] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10971 23:04:16.317988 <3>[ 18.536604] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10972 23:04:16.324351 <6>[ 18.549363] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00
10973 23:04:16.330985 <3>[ 18.562208] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10974 23:04:16.337648 <6>[ 18.565576] pci_bus 0000:00: root bus resource [bus 00-ff]
10975 23:04:16.344117 <6>[ 18.566618] mtk-scp 10500000.scp: creating channel cros-ec-rpmsg addr 0xd
10976 23:04:16.354314 <6>[ 18.566854] mtk-scp 10500000.scp: SCP is ready. FW version asurada_scp_v2.0.20536+a3bcde3e
10977 23:04:16.360877 <6>[ 18.566891] remoteproc remoteproc0: remote processor scp is now up
10978 23:04:16.367645 <6>[ 18.568647] usbcore: registered new interface driver r8152
10979 23:04:16.373928 <3>[ 18.574042] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10980 23:04:16.380729 <6>[ 18.579661] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]
10981 23:04:16.390648 <3>[ 18.586507] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10982 23:04:16.396915 <3>[ 18.586848] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10983 23:04:16.407002 <6>[ 18.596732] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])
10984 23:04:16.417545 <3>[ 18.601789] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10985 23:04:16.423931 <3>[ 18.601797] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10986 23:04:16.433673 <3>[ 18.601805] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10987 23:04:16.440012 <3>[ 18.601810] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10988 23:04:16.446515 <6>[ 18.607657] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400
10989 23:04:16.453457 <6>[ 18.607682] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]
10990 23:04:16.463205 <3>[ 18.618058] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10991 23:04:16.469601 <6>[ 18.621847] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered
10992 23:04:16.479657 <6>[ 18.622907] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input2
10993 23:04:16.483052 <6>[ 18.623241] pci 0000:00:00.0: supports D1 D2
10994 23:04:16.493441 <6>[ 18.624448] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0001, Sample: 0x0001, IAP: 0x0003
10995 23:04:16.503342 <6>[ 18.640494] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input3
10996 23:04:16.510411 <6>[ 18.649377] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10997 23:04:16.520208 <4>[ 18.651133] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
10998 23:04:16.523630 <4>[ 18.651133] Fallback method does not support PEC.
10999 23:04:16.531033 <6>[ 18.666928] cros-ec-dev cros-ec-dev.10.auto: CrOS System Control Processor MCU detected
11000 23:04:16.540824 <6>[ 18.673650] usb 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
11001 23:04:16.547053 <6>[ 18.675908] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
11002 23:04:16.553795 <6>[ 18.676580] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000
11003 23:04:16.559983 <6>[ 18.676620] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
11004 23:04:16.570550 <6>[ 18.676644] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
11005 23:04:16.574401 <6>[ 18.676661] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
11006 23:04:16.581708 <6>[ 18.676776] pci 0000:01:00.0: supports D1 D2
11007 23:04:16.588629 <6>[ 18.676777] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
11008 23:04:16.594518 <6>[ 18.688643] usbcore: registered new interface driver cdc_ether
11009 23:04:16.601623 <6>[ 18.690801] cros-ec-rpmsg 10500000.scp.cros-ec-rpmsg.13.-1: Chrome EC device registered
11010 23:04:16.607819 <6>[ 18.694615] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
11011 23:04:16.617855 <6>[ 18.694655] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]
11012 23:04:16.624991 <6>[ 18.694659] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]
11013 23:04:16.631919 <6>[ 18.694667] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]
11014 23:04:16.641583 <6>[ 18.694680] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]
11015 23:04:16.648305 <6>[ 18.694693] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]
11016 23:04:16.655206 <6>[ 18.694706] pci 0000:00:00.0: PCI bridge to [bus 01]
11017 23:04:16.661684 <6>[ 18.694711] pci 0000:00:00.0: bridge window [mem 0x12000000-0x121fffff 64bit pref]
11018 23:04:16.668790 <6>[ 18.694870] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
11019 23:04:16.675193 <6>[ 18.695696] pcieport 0000:00:00.0: PME: Signaling with IRQ 282
11020 23:04:16.681730 <6>[ 18.711555] usbcore: registered new interface driver r8153_ecm
11021 23:04:16.688513 <6>[ 18.721024] pcieport 0000:00:00.0: AER: enabled with IRQ 282
11022 23:04:16.692015 <6>[ 18.721215] Bluetooth: Core ver 2.22
11023 23:04:16.695783 <6>[ 18.721320] NET: Registered PF_BLUETOOTH protocol family
11024 23:04:16.702320 <6>[ 18.721322] Bluetooth: HCI device and connection manager initialized
11025 23:04:16.709090 <6>[ 18.721344] Bluetooth: HCI socket layer initialized
11026 23:04:16.712076 <6>[ 18.721351] Bluetooth: L2CAP socket layer initialized
11027 23:04:16.719270 <6>[ 18.721368] Bluetooth: SCO socket layer initialized
11028 23:04:16.725680 <6>[ 18.726816] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)
11029 23:04:16.736221 <3>[ 18.757297] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11030 23:04:16.742418 <3>[ 18.759132] power_supply sbs-5-000b: driver failed to report `voltage_now' property: -6
11031 23:04:16.755393 <6>[ 18.765864] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4
11032 23:04:16.762486 <5>[ 18.768167] cfg80211: Loading compiled-in X.509 certificates for regulatory database
11033 23:04:16.768438 <6>[ 18.773855] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0
11034 23:04:16.778590 <3>[ 18.773965] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11035 23:04:16.785295 <3>[ 18.774938] power_supply sbs-5-000b: driver failed to report `status' property: -6
11036 23:04:16.791832 <6>[ 18.780632] usbcore: registered new interface driver uvcvideo
11037 23:04:16.798109 <6>[ 18.780938] usbcore: registered new interface driver btusb
11038 23:04:16.805065 <5>[ 18.781049] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
11039 23:04:16.811881 <4>[ 18.781255] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
11040 23:04:16.818307 <6>[ 18.781268] cfg80211: failed to load regulatory.db
11041 23:04:16.828189 <4>[ 18.781474] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2
11042 23:04:16.834865 <3>[ 18.781482] Bluetooth: hci0: Failed to load firmware file (-2)
11043 23:04:16.841378 <3>[ 18.781488] Bluetooth: hci0: Failed to set up firmware (-2)
11044 23:04:16.852281 <4>[ 18.781493] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.
11045 23:04:16.858654 <3>[ 18.816226] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11046 23:04:16.868225 <4>[ 18.838646] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
11047 23:04:16.875549 <3>[ 18.845225] power_supply sbs-5-000b: driver failed to report `temp' property: -6
11048 23:04:16.886127 <4>[ 18.849967] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
11049 23:04:16.893309 <3>[ 18.868451] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11050 23:04:16.900230 <6>[ 18.876996] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000
11051 23:04:16.909576 <3>[ 18.901996] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11052 23:04:16.913041 <6>[ 18.902740] r8152 1-1.1.1:1.0 eth0: v1.12.13
11053 23:04:16.919981 <6>[ 18.903467] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)
11054 23:04:16.926888 <6>[ 18.915162] r8152 1-1.1.1:1.0 enxf4f5e850de0a: renamed from eth0
11055 23:04:16.936641 <3>[ 18.933921] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11056 23:04:16.940194 <6>[ 18.937395] mt7921e 0000:01:00.0: ASIC revision: 79610010
11057 23:04:16.950095 <3>[ 18.967119] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
11058 23:04:16.963382 <4>[ 19.069740] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11059 23:04:16.969542 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
11060 23:04:16.988376 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Screen …s of leds:white:kbd_backlight[0m.
11061 23:04:17.009324 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyS0[0m.
11062 23:04:17.079162 <4>[ 19.308706] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11063 23:04:17.164667 [[0;32m OK [0m] Reached target [0;1;39mBluetooth[0m.
11064 23:04:17.184383 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
11065 23:04:17.197893 <4>[ 19.425882] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11066 23:04:17.204095 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
11067 23:04:17.210781 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
11068 23:04:17.226713 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
11069 23:04:17.246399 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
11070 23:04:17.258606 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
11071 23:04:17.278757 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
11072 23:04:17.290877 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
11073 23:04:17.317708 [[0;32m OK [0m] Reached targ<4>[ 19.545543] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11074 23:04:17.320671 et [0;1;39mBasic System[0m.
11075 23:04:17.340990 [[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
11076 23:04:17.383986 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
11077 23:04:17.417881 Starting [0;1;39mUser Login Management[0m...
11078 23:04:17.437388 <4>[ 19.667244] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11079 23:04:17.455429 Starting [0;1;39mPermit User Sessions[0m...
11080 23:04:17.482918 Starting [0;1;39mLoad/Save RF Kill Switch Status[0m...
11081 23:04:17.499426 [[0;32m OK [0m] Started [0;1;39mLoad/Save RF Kill Switch Status[0m.
11082 23:04:17.520618 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
11083 23:04:17.545334 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
11084 23:04:17.559959 <4>[ 19.789411] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11085 23:04:17.600512 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
11086 23:04:17.622090 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS0[0m.
11087 23:04:17.640488 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
11088 23:04:17.655539 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
11089 23:04:17.677977 [[0;32m OK [<4>[ 19.908904] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11090 23:04:17.684882 0m] Reached target [0;1;39mGraphical Interface[0m.
11091 23:04:17.731452 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
11092 23:04:17.769965 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
11093 23:04:17.800666 <4>[ 20.030746] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11094 23:04:17.820756
11095 23:04:17.820856
11096 23:04:17.823637 Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0
11097 23:04:17.823717
11098 23:04:17.826748 debian-bullseye-arm64 login: root (automatic login)
11099 23:04:17.826830
11100 23:04:17.826893
11101 23:04:17.843053 Linux debian-bullseye-arm64 6.1.64-cip10 #1 SMP PREEMPT Fri Dec 1 22:47:09 UTC 2023 aarch64
11102 23:04:17.843156
11103 23:04:17.849620 The programs included with the Debian GNU/Linux system are free software;
11104 23:04:17.856178 the exact distribution terms for each program are described in the
11105 23:04:17.859430 individual files in /usr/share/doc/*/copyright.
11106 23:04:17.859510
11107 23:04:17.865966 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
11108 23:04:17.869250 permitted by applicable law.
11109 23:04:17.869634 Matched prompt #10: / #
11111 23:04:17.869833 Setting prompt string to ['/ #']
11112 23:04:17.869923 end: 2.2.5.1 login-action (duration 00:00:21) [common]
11114 23:04:17.870109 end: 2.2.5 auto-login-action (duration 00:00:21) [common]
11115 23:04:17.870193 start: 2.2.6 expect-shell-connection (timeout 00:03:26) [common]
11116 23:04:17.870262 Setting prompt string to ['/ #']
11117 23:04:17.870320 Forcing a shell prompt, looking for ['/ #']
11119 23:04:17.920542 / #
11120 23:04:17.920696 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
11121 23:04:17.920781 Waiting using forced prompt support (timeout 00:02:30)
11122 23:04:17.920881 <4>[ 20.149599] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11123 23:04:17.926014
11124 23:04:17.926294 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
11125 23:04:17.926387 start: 2.2.7 export-device-env (timeout 00:03:26) [common]
11126 23:04:17.926480 end: 2.2.7 export-device-env (duration 00:00:00) [common]
11127 23:04:17.926565 end: 2.2 depthcharge-retry (duration 00:01:34) [common]
11128 23:04:17.926646 end: 2 depthcharge-action (duration 00:01:34) [common]
11129 23:04:17.926733 start: 3 lava-test-retry (timeout 00:07:59) [common]
11130 23:04:17.926815 start: 3.1 lava-test-shell (timeout 00:07:59) [common]
11131 23:04:17.926885 Using namespace: common
11133 23:04:18.027234 / # #
11134 23:04:18.027408 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
11135 23:04:18.032684 #
11136 23:04:18.043181 <4>[ 20.273713] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11137 23:04:18.043451 Using /lava-12154408
11139 23:04:18.143803 / # export SHELL=/bin/sh
11140 23:04:18.149755 export SHELL=/bin/sh
11141 23:04:18.156079 <3>[ 20.391573] mt7921e 0000:01:00.0: hardware init failed
11143 23:04:18.256624 / # . /lava-12154408/environment
11144 23:04:18.261798 . /lava-12154408/environment
11146 23:04:18.362314 / # /lava-12154408/bin/lava-test-runner /lava-12154408/0
11147 23:04:18.362472 Test shell timeout: 10s (minimum of the action and connection timeout)
11148 23:04:18.367780 /lava-12154408/bin/lava-test-runner /lava-12154408/0
11149 23:04:18.393923 + export TESTRUN_ID=0_igt-kms-me<8>[ 20.628846] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 12154408_1.5.2.3.1>
11150 23:04:18.394193 Received signal: <STARTRUN> 0_igt-kms-mediatek 12154408_1.5.2.3.1
11151 23:04:18.394271 Starting test lava.0_igt-kms-mediatek (12154408_1.5.2.3.1)
11152 23:04:18.394354 Skipping test definition patterns.
11153 23:04:18.397352 diatek
11154 23:04:18.400289 + cd /lava-12154408/0/tests/0_igt-kms-mediatek
11155 23:04:18.400371 + cat uuid
11156 23:04:18.403746 + UUID=12154408_1.5.2.3.1
11157 23:04:18.403827 + set +x
11158 23:04:18.416906 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats core_getversi<8>[ 20.654948] <LAVA_SIGNAL_TESTSET START core_auth>
11159 23:04:18.417160 Received signal: <TESTSET> START core_auth
11160 23:04:18.417232 Starting test_set core_auth
11161 23:04:18.430127 on core_setmaster_vs_auth drm_read kms_addfb_basic kms_atomic kms_flip_event_leak kms_prop_blob kms_setmode kms_vblank
11162 23:04:18.432920 <14>[ 20.672246] [IGT] core_auth: executing
11163 23:04:18.443105 IGT-Version: 1.2<14>[ 20.676669] [IGT] core_auth: starting subtest getclient-simple
11164 23:04:18.449781 7.1-g621c2d3 (aa<14>[ 20.684463] [IGT] core_auth: finished subtest getclient-simple, SUCCESS
11165 23:04:18.456493 rch64) (Linux: 6<14>[ 20.692641] [IGT] core_auth: exiting, ret=0
11166 23:04:18.460214 .1.64-cip10 aarch64)
11167 23:04:18.463189 Starting subtest: getclient-simple
11168 23:04:18.470187 Opened<8>[ 20.702805] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
11169 23:04:18.470442 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
11171 23:04:18.472612 device: /dev/dri/card0
11172 23:04:18.475869 [1mSubtest getclient-simple: SUCCESS (0.000s)[0m
11173 23:04:18.501828 <14>[ 20.738401] [IGT] core_auth: executing
11174 23:04:18.508294 IGT-Version: 1.2<14>[ 20.743147] [IGT] core_auth: starting subtest getclient-master-drop
11175 23:04:18.517940 7.1-g621c2d3 (aa<14>[ 20.751137] [IGT] core_auth: finished subtest getclient-master-drop, SUCCESS
11176 23:04:18.524866 rch64) (Linux: 6<14>[ 20.759855] [IGT] core_auth: exiting, ret=0
11177 23:04:18.524948 .1.64-cip10 aarch64)
11178 23:04:18.528038 Starting subtest: getclient-master-drop
11179 23:04:18.538317 O<8>[ 20.770907] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
11180 23:04:18.538577 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
11182 23:04:18.541174 pened device: /dev/dri/card0
11183 23:04:18.544650 [1mSubtest getclient-master-drop: SUCCESS (0.000s)[0m
11184 23:04:18.554490 <14>[ 20.791402] [IGT] core_auth: executing
11185 23:04:18.561532 IGT-Version: 1.2<14>[ 20.795778] [IGT] core_auth: starting subtest basic-auth
11186 23:04:18.567654 7.1-g621c2d3 (aa<14>[ 20.802806] [IGT] core_auth: finished subtest basic-auth, SUCCESS
11187 23:04:18.574530 rch64) (Linux: 6<14>[ 20.810546] [IGT] core_auth: exiting, ret=0
11188 23:04:18.577606 .1.64-cip10 aarch64)
11189 23:04:18.577687 Opened device: /dev/dri/card0
11190 23:04:18.587538 Starting su<8>[ 20.820759] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
11191 23:04:18.587620 btest: basic-auth
11192 23:04:18.587857 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
11194 23:04:18.594214 [1mSubtest basic-auth: SUCCESS (0.000s)[0m
11195 23:04:18.604521 <14>[ 20.840975] [IGT] core_auth: executing
11196 23:04:18.610727 IGT-Version: 1.2<14>[ 20.845418] [IGT] core_auth: starting subtest many-magics
11197 23:04:18.614273 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11198 23:04:18.617370 Opened device: /dev/dri/card0
11199 23:04:18.624133 Starting su<14>[ 20.859491] [IGT] core_auth: finished subtest many-magics, SUCCESS
11200 23:04:18.630935 btest: many-magi<14>[ 20.867334] [IGT] core_auth: exiting, ret=0
11201 23:04:18.631019 cs
11202 23:04:18.634175 Reopening device failed after 1020 opens
11203 23:04:18.643782 [1mSubtest many-magics: SUCCESS (<8>[ 20.879011] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
11204 23:04:18.644039 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
11206 23:04:18.646945 0.007s)[0m
11207 23:04:18.650495 <8>[ 20.888780] <LAVA_SIGNAL_TESTSET STOP>
11208 23:04:18.650744 Received signal: <TESTSET> STOP
11209 23:04:18.650816 Closing test_set core_auth
11210 23:04:18.680867 <14>[ 20.917805] [IGT] core_getclient: executing
11211 23:04:18.688131 IGT-Version: 1.2<14>[ 20.922869] [IGT] core_getclient: exiting, ret=0
11212 23:04:18.691145 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11213 23:04:18.700890 Opened dev<8>[ 20.933464] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
11214 23:04:18.700974 ice: /dev/dri/card0
11215 23:04:18.701248 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
11217 23:04:18.704169 SUCCESS (0.006s)
11218 23:04:18.730838 <14>[ 20.967038] [IGT] core_getstats: executing
11219 23:04:18.737261 IGT-Version: 1.2<14>[ 20.971807] [IGT] core_getstats: exiting, ret=0
11220 23:04:18.740907 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11221 23:04:18.750112 Opened dev<8>[ 20.982447] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
11222 23:04:18.750197 ice: /dev/dri/card0
11223 23:04:18.750436 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
11225 23:04:18.752982 SUCCESS (0.006s)
11226 23:04:18.779211 <14>[ 21.015976] [IGT] core_getversion: executing
11227 23:04:18.785811 IGT-Version: 1.2<14>[ 21.020875] [IGT] core_getversion: exiting, ret=0
11228 23:04:18.789395 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11229 23:04:18.798903 Opened dev<8>[ 21.031808] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
11230 23:04:18.798990 ice: /dev/dri/card0
11231 23:04:18.799230 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
11233 23:04:18.802539 SUCCESS (0.006s)
11234 23:04:18.841665 <14>[ 21.078239] [IGT] core_setmaster_vs_auth: executing
11235 23:04:18.848501 IGT-Version: 1.2<14>[ 21.083855] [IGT] core_setmaster_vs_auth: exiting, ret=0
11236 23:04:18.854876 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11237 23:04:18.861311 Opened dev<8>[ 21.095332] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
11238 23:04:18.861629 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
11240 23:04:18.864512 ice: /dev/dri/card0
11241 23:04:18.864593 SUCCESS (0.007s)
11242 23:04:18.882887 <8>[ 21.119386] <LAVA_SIGNAL_TESTSET START drm_read>
11243 23:04:18.883146 Received signal: <TESTSET> START drm_read
11244 23:04:18.883219 Starting test_set drm_read
11245 23:04:18.901717 <14>[ 21.138343] [IGT] drm_read: executing
11246 23:04:18.908879 IGT-Version: 1.2<14>[ 21.142966] [IGT] drm_read: exiting, ret=77
11247 23:04:18.912183 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11248 23:04:18.915176 Opened device: /dev/dri/card0
11249 23:04:18.921520 No KMS driv<8>[ 21.155607] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>
11250 23:04:18.921773 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
11252 23:04:18.924684 er or no outputs, pipes: 8, outputs: 0
11253 23:04:18.931569 [1mSubtest invalid-buffer: SKIP (0.000s)[0m
11254 23:04:18.939300 <14>[ 21.176188] [IGT] drm_read: executing
11255 23:04:18.945767 IGT-Version: 1.2<14>[ 21.180684] [IGT] drm_read: exiting, ret=77
11256 23:04:18.949227 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11257 23:04:18.955757 Opened dev<8>[ 21.191206] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>
11258 23:04:18.956008 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
11260 23:04:18.959176 ice: /dev/dri/card0
11261 23:04:18.962563 No KMS driver or no outputs, pipes: 8, outputs: 0
11262 23:04:18.966022 [1mSubtest fault-buffer: SKIP (0.000s)[0m
11263 23:04:18.973833 <14>[ 21.210684] [IGT] drm_read: executing
11264 23:04:18.980413 IGT-Version: 1.2<14>[ 21.215316] [IGT] drm_read: exiting, ret=77
11265 23:04:18.983864 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11266 23:04:18.991154 Opened dev<8>[ 21.225622] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>
11267 23:04:18.991402 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
11269 23:04:18.993546 ice: /dev/dri/card0
11270 23:04:18.997452 No KMS driver or no outputs, pipes: 8, outputs: 0
11271 23:04:19.000006 [1mSubtest empty-block: SKIP (0.000s)[0m
11272 23:04:19.008732 <14>[ 21.245779] [IGT] drm_read: executing
11273 23:04:19.015528 IGT-Version: 1.2<14>[ 21.250191] [IGT] drm_read: exiting, ret=77
11274 23:04:19.018725 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11275 23:04:19.025395 Opened dev<8>[ 21.260421] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>
11276 23:04:19.025682 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
11278 23:04:19.028722 ice: /dev/dri/card0
11279 23:04:19.031850 No KMS driver or no outputs, pipes: 8, outputs: 0
11280 23:04:19.038339 [1mSubtest empty-nonblock: SKIP (0.000s)[0m
11281 23:04:19.042145 <14>[ 21.280501] [IGT] drm_read: executing
11282 23:04:19.048489 IGT-Version: 1.2<14>[ 21.285120] [IGT] drm_read: exiting, ret=77
11283 23:04:19.054850 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11284 23:04:19.061601 Opened dev<8>[ 21.295403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>
11285 23:04:19.061885 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
11287 23:04:19.064718 ice: /dev/dri/card0
11288 23:04:19.068170 No KMS driver or no outputs, pipes: 8, outputs: 0
11289 23:04:19.071499 [1mSubtest short-buffer-block: SKIP (0.000s)[0m
11290 23:04:19.079348 <14>[ 21.315913] [IGT] drm_read: executing
11291 23:04:19.085809 IGT-Version: 1.2<14>[ 21.320453] [IGT] drm_read: exiting, ret=77
11292 23:04:19.088842 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11293 23:04:19.098719 Opened dev<8>[ 21.330482] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>
11294 23:04:19.098801 ice: /dev/dri/card0
11295 23:04:19.099038 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
11297 23:04:19.105587 No KMS driver or no outputs, pipes: 8, outputs: 0
11298 23:04:19.108896 [1mSubtest short-buffer-nonblock: SKIP (0.000s)[0m
11299 23:04:19.115558 <14>[ 21.351494] [IGT] drm_read: executing
11300 23:04:19.118477 IGT-Version: 1.2<14>[ 21.356061] [IGT] drm_read: exiting, ret=77
11301 23:04:19.125368 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11302 23:04:19.131676 Opened dev<8>[ 21.366052] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>
11303 23:04:19.131934 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
11305 23:04:19.135128 ice: /dev/dri/card0
11306 23:04:19.138280 No KMS driv<8>[ 21.376241] <LAVA_SIGNAL_TESTSET STOP>
11307 23:04:19.138530 Received signal: <TESTSET> STOP
11308 23:04:19.138596 Closing test_set drm_read
11309 23:04:19.144992 er or no outputs, pipes: 8, outputs: 0
11310 23:04:19.148101 [1mSubtest short-buffer-wakeup: SKIP (0.000s)[0m
11311 23:04:19.160197 <8>[ 21.396888] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
11312 23:04:19.160450 Received signal: <TESTSET> START kms_addfb_basic
11313 23:04:19.160520 Starting test_set kms_addfb_basic
11314 23:04:19.181566 <14>[ 21.418104] [IGT] kms_addfb_basic: executing
11315 23:04:19.194558 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarc<14>[ 21.427334] [IGT] kms_addfb_basic: starting subtest unused-handle
11316 23:04:19.194659 h64)
11317 23:04:19.200997 Opened dev<14>[ 21.435139] [IGT] kms_addfb_basic: finished subtest unused-handle, SUCCESS
11318 23:04:19.204758 ice: /dev/dri/card0
11319 23:04:19.207504 Starting subtest: unused-handle
11320 23:04:19.214145 [1mSubtest unused-handle: SUCCESS (0.000s<14>[ 21.451837] [IGT] kms_addfb_basic: exiting, ret=0
11321 23:04:19.217752 )[0m
11322 23:04:19.227462 Test requirement not met in function igt_require_i915, fi<8>[ 21.461692] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
11323 23:04:19.227731 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
11325 23:04:19.230954 le ../lib/drmtest.c:720:
11326 23:04:19.234475 Test requirement: is_i915_device(fd)
11327 23:04:19.244315 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720<14>[ 21.482158] [IGT] kms_addfb_basic: executing
11328 23:04:19.244406 :
11329 23:04:19.247343 Test requirement: is_i915_device(fd)
11330 23:04:19.257000 No KMS driver or no out<14>[ 21.491447] [IGT] kms_addfb_basic: starting subtest unused-pitches
11331 23:04:19.266828 puts, pipes: 8, <14>[ 21.499384] [IGT] kms_addfb_basic: finished subtest unused-pitches, SUCCESS
11332 23:04:19.266941 outputs: 0
11333 23:04:19.274026 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11334 23:04:19.280452 Opened device:<14>[ 21.516266] [IGT] kms_addfb_basic: exiting, ret=0
11335 23:04:19.280542 /dev/dri/card0
11336 23:04:19.283841 Starting subtest: unused-pitches
11337 23:04:19.293682 [1mSubtest u<8>[ 21.525882] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
11338 23:04:19.293942 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
11340 23:04:19.297195 nused-pitches: SUCCESS (0.000s)[0m
11341 23:04:19.303686 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11342 23:04:19.309992 Test requirement: is_i91<14>[ 21.546275] [IGT] kms_addfb_basic: executing
11343 23:04:19.310078 5_device(fd)
11344 23:04:19.322893 Test requirement not met in function igt_require_i<14>[ 21.555790] [IGT] kms_addfb_basic: starting subtest unused-offsets
11345 23:04:19.329658 915, file ../lib<14>[ 21.563583] [IGT] kms_addfb_basic: finished subtest unused-offsets, SUCCESS
11346 23:04:19.333578 /drmtest.c:720:
11347 23:04:19.336014 Test requirement: is_i915_device(fd)
11348 23:04:19.343096 No KMS driver or no outputs, pipes: 8, ou<14>[ 21.580317] [IGT] kms_addfb_basic: exiting, ret=0
11349 23:04:19.346093 tputs: 0
11350 23:04:19.356162 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-<8>[ 21.590032] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
11351 23:04:19.356426 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
11353 23:04:19.359531 cip10 aarch64)
11354 23:04:19.359613 Opened device: /dev/dri/card0
11355 23:04:19.362698 Starting subtest: unused-offsets
11356 23:04:19.369273 [1mSubtest unused-offsets: SUCCESS (0.000s)[0m
11357 23:04:19.372446 Test requirem<14>[ 21.610409] [IGT] kms_addfb_basic: executing
11358 23:04:19.386076 ent not met in function igt_require_i915, file ../lib/drmtest.c:<14>[ 21.620015] [IGT] kms_addfb_basic: starting subtest unused-modifier
11359 23:04:19.386171 720:
11360 23:04:19.395715 Test requi<14>[ 21.628032] [IGT] kms_addfb_basic: finished subtest unused-modifier, SUCCESS
11361 23:04:19.395801 rement: is_i915_device(fd)
11362 23:04:19.409257 Test requirement not met in function igt_require_i915, file ../lib/d<14>[ 21.644580] [IGT] kms_addfb_basic: exiting, ret=0
11363 23:04:19.409351 rmtest.c:720:
11364 23:04:19.412107 Test requirement: is_i915_device(fd)
11365 23:04:19.422272 No KMS driver or no outputs<8>[ 21.655990] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
11366 23:04:19.422569 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11368 23:04:19.425396 , pipes: 8, outputs: 0
11369 23:04:19.431902 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11370 23:04:19.432013 Opened device: /dev/dri/card0
11371 23:04:19.435353 Starting subtest: unused-modifier
11372 23:04:19.441937 <14>[ 21.676947] [IGT] kms_addfb_basic: executing
11373 23:04:19.445025 [1mSubtest unused-modifier: SUCCESS (0.000s)[0m
11374 23:04:19.454709 Test requirem<14>[ 21.687215] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
11375 23:04:19.461699 ent not met in f<14>[ 21.695552] [IGT] kms_addfb_basic: finished subtest clobberred-modifier, SKIP
11376 23:04:19.468300 unction igt_require_i915, file ../lib/drmtest.c:720:
11377 23:04:19.471459 Test requirement: is_i915_device(fd)
11378 23:04:19.474621 Test<14>[ 21.712200] [IGT] kms_addfb_basic: exiting, ret=77
11379 23:04:19.481568 requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11380 23:04:19.491422 T<8>[ 21.723716] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
11381 23:04:19.491683 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11383 23:04:19.494461 est requirement: is_i915_device(fd)
11384 23:04:19.498360 No KMS driver or no outputs, pipes: 8, outputs: 0
11385 23:04:19.504627 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11386 23:04:19.507834 Op<14>[ 21.745049] [IGT] kms_addfb_basic: executing
11387 23:04:19.511002 ened device: /dev/dri/card0
11388 23:04:19.520855 Starting subtest: clobberred-modifi<14>[ 21.755446] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
11389 23:04:19.524118 er
11390 23:04:19.530781 Test require<14>[ 21.764359] [IGT] kms_addfb_basic: finished subtest invalid-smem-bo-on-discrete, SKIP
11391 23:04:19.537501 ment not met in function igt_require_i915, file ../lib/drmtest.c:720:
11392 23:04:19.544101 Test requirement: is_i915<14>[ 21.781773] [IGT] kms_addfb_basic: exiting, ret=77
11393 23:04:19.547561 _device(fd)
11394 23:04:19.550475 [1mSubtest clobberred-modifier: SKIP (0.000s)[0m
11395 23:04:19.560372 Test requiremen<8>[ 21.793136] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
11396 23:04:19.560635 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11398 23:04:19.568338 t not met in function igt_require_i915, file ../lib/drmtest.c:720:
11399 23:04:19.570406 Test requirement: is_i915_device(fd)
11400 23:04:19.576941 Test requirement not met in function i<14>[ 21.815098] [IGT] kms_addfb_basic: executing
11401 23:04:19.580335 gt_require_i915, file ../lib/drmtest.c:720:
11402 23:04:19.590293 Test requirement: i<14>[ 21.824291] [IGT] kms_addfb_basic: starting subtest legacy-format
11403 23:04:19.590388 s_i915_device(fd)
11404 23:04:19.596832 No KMS driver or no outputs, pipes: 8, outputs: 0
11405 23:04:19.604118 IGT-Versio<14>[ 21.838242] [IGT] kms_addfb_basic: finished subtest legacy-format, SUCCESS
11406 23:04:19.610120 n: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11407 23:04:19.613803 Opened device: /dev/dri/card0
11408 23:04:19.616982 Start<14>[ 21.854045] [IGT] kms_addfb_basic: exiting, ret=0
11409 23:04:19.620168 ing subtest: invalid-smem-bo-on-discrete
11410 23:04:19.630256 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11412 23:04:19.633406 Test requirement not met in function i<8>[ 21.865307] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
11413 23:04:19.636529 gt_require_intel, file ../lib/drmtest.c:715:
11414 23:04:19.639994 Test requirement: is_intel_device(fd)
11415 23:04:19.643012 [1mSubtest invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
11416 23:04:19.649998 <14>[ 21.885959] [IGT] kms_addfb_basic: executing
11417 23:04:19.650083
11418 23:04:19.663074 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 21.897130] [IGT] kms_addfb_basic: starting subtest no-handle
11419 23:04:19.663160 0:
11420 23:04:19.669750 Test require<14>[ 21.904012] [IGT] kms_addfb_basic: finished subtest no-handle, SUCCESS
11421 23:04:19.673034 ment: is_i915_device(fd)
11422 23:04:19.682653 Test requirement not met in function igt_require_i915,<14>[ 21.917878] [IGT] kms_addfb_basic: exiting, ret=0
11423 23:04:19.685970 file ../lib/drmtest.c:720:
11424 23:04:19.689165 Test requirement: is_i915_device(fd)
11425 23:04:19.695785 No KMS driver<8>[ 21.930007] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
11426 23:04:19.696046 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11428 23:04:19.699267 or no outputs, pipes: 8, outputs: 0
11429 23:04:19.706016 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11430 23:04:19.709320 Opened device: /dev/dri/card0
11431 23:04:19.712434 Starting subtest: legacy-format
11432 23:04:19.715863 Successfully fuzzed 10000 {bpp, depth} variations
11433 23:04:19.718859 [1mSubtest legacy-format: SUCCESS (0.006s)[0m
11434 23:04:19.725657 <14>[ 21.961111] [IGT] kms_addfb_basic: executing
11435 23:04:19.732315 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11436 23:04:19.739294 Test requirem<14>[ 21.973452] [IGT] kms_addfb_basic: starting subtest basic
11437 23:04:19.745174 ent: is_i915_dev<14>[ 21.980407] [IGT] kms_addfb_basic: finished subtest basic, SUCCESS
11438 23:04:19.748814 ice(fd)
11439 23:04:19.758678 Test requirement not met in function igt_require_i915, file ../lib/drmt<14>[ 21.994824] [IGT] kms_addfb_basic: exiting, ret=0
11440 23:04:19.758766 est.c:720:
11441 23:04:19.761999 Test requirement: is_i915_device(fd)
11442 23:04:19.771718 No KMS driver <8>[ 22.005503] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11443 23:04:19.771978 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11445 23:04:19.774905 or no outputs, pipes: 8, outputs: 0
11446 23:04:19.778419 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11447 23:04:19.781978 Opened device: /dev/dri/card0
11448 23:04:19.788088 Starti<14>[ 22.024607] [IGT] kms_addfb_basic: executing
11449 23:04:19.788171 ng subtest: no-handle
11450 23:04:19.794620 [1mSubtest no-handle: SUCCESS (0.000s)[0m
11451 23:04:19.801649 Test require<14>[ 22.035879] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
11452 23:04:19.808560 ment not met in <14>[ 22.042825] [IGT] kms_addfb_basic: finished subtest bad-pitch-0, SUCCESS
11453 23:04:19.814684 function igt_require_i915, file ../lib/drmtest.c:720:
11454 23:04:19.821202 Test requirement: is_i915<14>[ 22.057099] [IGT] kms_addfb_basic: exiting, ret=0
11455 23:04:19.821285 _device(fd)
11456 23:04:19.834769 Test requirement not met in function igt_require_i915, file ../lib/<8>[ 22.068873] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
11457 23:04:19.835135 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11459 23:04:19.837945 drmtest.c:720:
11460 23:04:19.840886 Test requirement: is_i915_device(fd)
11461 23:04:19.844330 No KMS driver or no outputs, pipes: 8, outputs: 0
11462 23:04:19.854283 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-c<14>[ 22.089655] [IGT] kms_addfb_basic: executing
11463 23:04:19.854368 ip10 aarch64)
11464 23:04:19.857474 Opened device: /dev/dri/card0
11465 23:04:19.860856 Starting subtest: basic
11466 23:04:19.867474 [1mSubte<14>[ 22.102351] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
11467 23:04:19.877260 st basic: SUCCES<14>[ 22.109218] [IGT] kms_addfb_basic: finished subtest bad-pitch-32, SUCCESS
11468 23:04:19.877345 S (0.000s)[0m
11469 23:04:19.887106 Test requirement not met in function igt_require_i915, file ../l<14>[ 22.123549] [IGT] kms_addfb_basic: exiting, ret=0
11470 23:04:19.890645 ib/drmtest.c:720:
11471 23:04:19.893589 Test requirement: is_i915_device(fd)
11472 23:04:19.900168 Test requirement not me<8>[ 22.135451] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
11473 23:04:19.900428 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11475 23:04:19.907078 t in function igt_require_i915, file ../lib/drmtest.c:720:
11476 23:04:19.910794 Test requirement: is_i915_device(fd)
11477 23:04:19.913338 No KMS driver or no outputs, pipes: 8, outputs: 0
11478 23:04:19.920255 IGT-Version<14>[ 22.156156] [IGT] kms_addfb_basic: executing
11479 23:04:19.926774 : 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11480 23:04:19.933123 Opened device: /dev/d<14>[ 22.168706] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
11481 23:04:19.933208 ri/card0
11482 23:04:19.942878 Starti<14>[ 22.175586] [IGT] kms_addfb_basic: finished subtest bad-pitch-63, SUCCESS
11483 23:04:19.942962 ng subtest: bad-pitch-0
11484 23:04:19.949583 [1mSubtest bad-pitch-0: SUCCESS (0.000s)[0m
11485 23:04:19.952899 Test req<14>[ 22.190062] [IGT] kms_addfb_basic: exiting, ret=0
11486 23:04:19.959507 uirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11487 23:04:19.969563 Test <8>[ 22.201920] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
11488 23:04:19.969648 requirement: is_i915_device(fd)
11489 23:04:19.969890 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11491 23:04:19.979390 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11492 23:04:19.985998 Test requirement: is_i915_de<14>[ 22.222383] [IGT] kms_addfb_basic: executing
11493 23:04:19.986081 vice(fd)
11494 23:04:19.989007 No KMS driver or no outputs, pipes: 8, outputs: 0
11495 23:04:19.999083 IGT-Version: 1.27.1<14>[ 22.233830] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
11496 23:04:20.008874 -g621c2d3 (aarch<14>[ 22.240876] [IGT] kms_addfb_basic: finished subtest bad-pitch-128, SUCCESS
11497 23:04:20.008960 64) (Linux: 6.1.64-cip10 aarch64)
11498 23:04:20.012491 Opened device: /dev/dri/card0
11499 23:04:20.019154 Starting subte<14>[ 22.255141] [IGT] kms_addfb_basic: exiting, ret=0
11500 23:04:20.022381 st: bad-pitch-32
11501 23:04:20.025719 [1mSubtest bad-pitch-32: SUCCESS (0.000s)[0m
11502 23:04:20.031884 Test requireme<8>[ 22.267191] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
11503 23:04:20.032146 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11505 23:04:20.039075 nt not met in function igt_require_i915, file ../lib/drmtest.c:720:
11506 23:04:20.042084 Test requirement: is_i915_device(fd)
11507 23:04:20.052243 Test requirement not met in function igt_require_i915<14>[ 22.288264] [IGT] kms_addfb_basic: executing
11508 23:04:20.055546 , file ../lib/drmtest.c:720:
11509 23:04:20.058980 Test requirement: is_i915_device(fd)
11510 23:04:20.065159 No KMS drive<14>[ 22.300714] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
11511 23:04:20.075160 r or no outputs,<14>[ 22.307629] [IGT] kms_addfb_basic: finished subtest bad-pitch-256, SUCCESS
11512 23:04:20.075244 pipes: 8, outputs: 0
11513 23:04:20.084825 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip<14>[ 22.321990] [IGT] kms_addfb_basic: exiting, ret=0
11514 23:04:20.088842 10 aarch64)
11515 23:04:20.091603 Opened device: /dev/dri/card0
11516 23:04:20.091686 Starting subtest: bad-pitch-63
11517 23:04:20.101453 [1m<8>[ 22.334118] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
11518 23:04:20.101713 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11520 23:04:20.104627 Subtest bad-pitch-63: SUCCESS (0.000s)[0m
11521 23:04:20.111411 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11522 23:04:20.118599 Test requirement: is_i915_device(<14>[ 22.354762] [IGT] kms_addfb_basic: executing
11523 23:04:20.118683 fd)
11524 23:04:20.131709 Test requirement not met in function igt_require_i915, file ../lib/drmtest.<14>[ 22.367332] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
11525 23:04:20.134689 c:720:
11526 23:04:20.140869 Test req<14>[ 22.374400] [IGT] kms_addfb_basic: finished subtest bad-pitch-1024, SUCCESS
11527 23:04:20.144445 uirement: is_i915_device(fd)
11528 23:04:20.147958 No KMS driver or no outputs, pipes: 8, outputs: 0
11529 23:04:20.154019 <14>[ 22.389028] [IGT] kms_addfb_basic: exiting, ret=0
11530 23:04:20.154102
11531 23:04:20.160881 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11532 23:04:20.167376 Opened de<8>[ 22.401048] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
11533 23:04:20.167636 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11535 23:04:20.170675 vice: /dev/dri/card0
11536 23:04:20.170756 Starting subtest: bad-pitch-128
11537 23:04:20.177159 [1mSubtest bad-pitch-128: SUCCESS (0.000s)[0m
11538 23:04:20.187196 Test requirement not met in function igt_require_i915, f<14>[ 22.421797] [IGT] kms_addfb_basic: executing
11539 23:04:20.187281 ile ../lib/drmtest.c:720:
11540 23:04:20.190434 Test requirement: is_i915_device(fd)
11541 23:04:20.200706 Test requiremen<14>[ 22.434358] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
11542 23:04:20.206952 t not met in fun<14>[ 22.441387] [IGT] kms_addfb_basic: finished subtest bad-pitch-999, SUCCESS
11543 23:04:20.213443 ction igt_require_i915, file ../lib/drmtest.c:720:
11544 23:04:20.220438 Test requirement: is_i915_de<14>[ 22.455791] [IGT] kms_addfb_basic: exiting, ret=0
11545 23:04:20.220522 vice(fd)
11546 23:04:20.227354 No KMS driver or no outputs, pipes: 8, outputs: 0
11547 23:04:20.233455 IGT-Version: 1.27.1<8>[ 22.468024] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
11548 23:04:20.233717 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11550 23:04:20.239819 -g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11551 23:04:20.239904 Opened device: /dev/dri/card0
11552 23:04:20.242966 Starting subtest: bad-pitch-256
11553 23:04:20.249810 [1mSubtest bad-pitch-256: SU<14>[ 22.488543] [IGT] kms_addfb_basic: executing
11554 23:04:20.253023 CCESS (0.000s)[0m
11555 23:04:20.266742 Test requirement not met in function igt_require_i915, file <14>[ 22.499865] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
11556 23:04:20.273040 ../lib/drmtest.c<14>[ 22.507047] [IGT] kms_addfb_basic: finished subtest bad-pitch-65536, SUCCESS
11557 23:04:20.275977 :720:
11558 23:04:20.279652 Test requirement: is_i915_device(fd)
11559 23:04:20.286586 Test requirement not met in functio<14>[ 22.521580] [IGT] kms_addfb_basic: exiting, ret=0
11560 23:04:20.289164 n igt_require_i915, file ../lib/drmtest.c:720:
11561 23:04:20.299331 Test requirement: is_i915_device<8>[ 22.533550] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
11562 23:04:20.299421 (fd)
11563 23:04:20.299663 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11565 23:04:20.305722 No KMS driver or no outputs, pipes: 8, outputs: 0
11566 23:04:20.312194 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11567 23:04:20.315733 Opened device: /d<14>[ 22.554373] [IGT] kms_addfb_basic: executing
11568 23:04:20.318776 ev/dri/card0
11569 23:04:20.322223 Starting subtest: bad-pitch-1024
11570 23:04:20.325381 [1mSubtest bad-pitch-1024: SUCCESS (0.000s)[0m
11571 23:04:20.336638 Test requireme<14>[ 22.567921] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
11572 23:04:20.342087 nt not met in fu<14>[ 22.576181] [IGT] kms_addfb_basic: finished subtest invalid-get-prop-any, SUCCESS
11573 23:04:20.352385 nction igt_require_i915, file ../lib/drmtest.c:7<14>[ 22.589248] [IGT] kms_addfb_basic: exiting, ret=0
11574 23:04:20.352475 20:
11575 23:04:20.355298 Test requirement: is_i915_device(fd)
11576 23:04:20.368589 Test requirement not met in function <8>[ 22.600390] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11577 23:04:20.368858 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11579 23:04:20.371607 igt_require_i915, file ../lib/drmtest.c:720:
11580 23:04:20.375256 Test requirement: is_i915_device(fd)
11581 23:04:20.378194 No KMS driver or no outputs, pipes: 8, outputs: 0
11582 23:04:20.384922 IGT-Versi<14>[ 22.621581] [IGT] kms_addfb_basic: executing
11583 23:04:20.388217 on: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11584 23:04:20.391641 Opened device: /dev/dri/card0
11585 23:04:20.401526 Starting subtest: ba<14>[ 22.635162] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
11586 23:04:20.401619 d-pitch-999
11587 23:04:20.411329 [1<14>[ 22.643062] [IGT] kms_addfb_basic: finished subtest invalid-get-prop, SUCCESS
11588 23:04:20.414778 mSubtest bad-pitch-999: SUCCESS (0.000s)[0m
11589 23:04:20.417976 Te<14>[ 22.655817] [IGT] kms_addfb_basic: exiting, ret=0
11590 23:04:20.427638 st requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11591 23:04:20.434506 <8>[ 22.667031] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11592 23:04:20.434597
11593 23:04:20.434839 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11595 23:04:20.437862 Test requirement: is_i915_device(fd)
11596 23:04:20.444371 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11597 23:04:20.448045 Test requirement: is_i915_device(fd)
11598 23:04:20.450797 <14>[ 22.688181] [IGT] kms_addfb_basic: executing
11599 23:04:20.457564 No KMS driver or no outputs, pipes: 8, outputs: 0
11600 23:04:20.467170 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 a<14>[ 22.702653] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
11601 23:04:20.470466 arch64)
11602 23:04:20.476998 Opened <14>[ 22.711026] [IGT] kms_addfb_basic: finished subtest invalid-set-prop-any, SUCCESS
11603 23:04:20.480479 device: /dev/dri/card0
11604 23:04:20.487194 Starting subtest: bad-pi<14>[ 22.724176] [IGT] kms_addfb_basic: exiting, ret=0
11605 23:04:20.487279 tch-65536
11606 23:04:20.493849 [1mSubtest bad-pitch-65536: SUCCESS (0.000s)[0m
11607 23:04:20.500552 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11609 23:04:20.503867 Test requirement n<8>[ 22.735034] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11610 23:04:20.506814 ot met in function igt_require_i915, file ../lib/drmtest.c:720:
11611 23:04:20.510298 Test requirement: is_i915_device(fd)
11612 23:04:20.519955 Test requirement not met in function igt_require_i915, fi<14>[ 22.756600] [IGT] kms_addfb_basic: executing
11613 23:04:20.523524 le ../lib/drmtest.c:720:
11614 23:04:20.526974 Test requirement: is_i915_device(fd)
11615 23:04:20.536418 No KMS driver or no outputs, pipes: 8, outputs: <14>[ 22.771176] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
11616 23:04:20.536518 0
11617 23:04:20.547198 IGT-Version: <14>[ 22.779328] [IGT] kms_addfb_basic: finished subtest invalid-set-prop, SUCCESS
11618 23:04:20.556167 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 a<14>[ 22.792216] [IGT] kms_addfb_basic: exiting, ret=0
11619 23:04:20.556269 arch64)
11620 23:04:20.559705 Opened device: /dev/dri/card0
11621 23:04:20.569612 Starting subtest: invali<8>[ 22.801772] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11622 23:04:20.569697 d-get-prop-any
11623 23:04:20.569939 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11625 23:04:20.576032 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
11626 23:04:20.585985 Test requirement not met in function igt_require_i915, file ../lib/drmte<14>[ 22.822526] [IGT] kms_addfb_basic: executing
11627 23:04:20.586079 st.c:720:
11628 23:04:20.589136 Test requirement: is_i915_device(fd)
11629 23:04:20.602446 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 22.837926] [IGT] kms_addfb_basic: starting subtest master-rmfb
11630 23:04:20.602548 0:
11631 23:04:20.612377 Test require<14>[ 22.845056] [IGT] kms_addfb_basic: finished subtest master-rmfb, SUCCESS
11632 23:04:20.612494 ment: is_i915_device(fd)
11633 23:04:20.618977 No KMS<14>[ 22.855459] [IGT] kms_addfb_basic: exiting, ret=0
11634 23:04:20.622305 driver or no outputs, pipes: 8, outputs: 0
11635 23:04:20.632682 IGT-Version: 1.27.1-g621c2d3 (aarch<8>[ 22.866871] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
11636 23:04:20.632956 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11638 23:04:20.635285 64) (Linux: 6.1.64-cip10 aarch64)
11639 23:04:20.638821 Opened device: /dev/dri/card0
11640 23:04:20.642365 Starting subtest: invalid-get-prop
11641 23:04:20.645527 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
11642 23:04:20.652467 Test r<14>[ 22.887786] [IGT] kms_addfb_basic: executing
11643 23:04:20.659213 equirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11644 23:04:20.661831 Test requirement: is_i915_device(fd)
11645 23:04:20.672119 Test requirement not met in function igt_requ<14>[ 22.906222] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
11646 23:04:20.682055 ire_i915, file .<14>[ 22.915122] [IGT] kms_addfb_basic: finished subtest addfb25-modifier-no-flag, SUCCESS
11647 23:04:20.688192 ./lib/drmtest.c:<14>[ 22.924833] [IGT] kms_addfb_basic: exiting, ret=0
11648 23:04:20.688276 720:
11649 23:04:20.691601 Test requirement: is_i915_device(fd)
11650 23:04:20.701802 No KMS driver or no <8>[ 22.935571] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
11651 23:04:20.702063 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11653 23:04:20.704772 outputs, pipes: 8, outputs: 0
11654 23:04:20.711366 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11655 23:04:20.714462 Opened device: /dev/dri/card0
11656 23:04:20.721217 Starting sub<14>[ 22.956513] [IGT] kms_addfb_basic: executing
11657 23:04:20.721300 test: invalid-set-prop-any
11658 23:04:20.727526 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
11659 23:04:20.740846 Test requirement not met in function igt_require_i915, file <14>[ 22.974153] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
11660 23:04:20.740946 ../lib/drmtest.c:720:
11661 23:04:20.744395 Test requirement: is_i915_device(fd)
11662 23:04:20.754034 Tes<14>[ 22.986869] [IGT] kms_addfb_basic: finished subtest addfb25-bad-modifier, FAIL
11663 23:04:20.760635 t requirement no<14>[ 22.994948] [IGT] kms_addfb_basic: exiting, ret=98
11664 23:04:20.764325 t met in function igt_require_i915, file ../lib/drmtest.c:720:
11665 23:04:20.773908 Test requirement<8>[ 23.007239] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
11666 23:04:20.774172 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11668 23:04:20.777546 : is_i915_device(fd)
11669 23:04:20.780838 No KMS driver or no outputs, pipes: 8, outputs: 0
11670 23:04:20.787474 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11671 23:04:20.790416 Opened device: /dev/dri/card0
11672 23:04:20.793635 Starting subtest: invalid-set-prop
11673 23:04:20.797568 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
11674 23:04:20.804468 Test requirement not met i<14>[ 23.039578] [IGT] kms_addfb_basic: executing
11675 23:04:20.807262 n function igt_require_i915, file ../lib/drmtest.c:720:
11676 23:04:20.810483 Test requirement: is_i915_device(fd)
11677 23:04:20.824014 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:<14>[ 23.059836] [IGT] kms_addfb_basic: exiting, ret=77
11678 23:04:20.824125
11679 23:04:20.826597 Test requirement: is_i915_device(fd)
11680 23:04:20.836781 No KMS driver or no outp<8>[ 23.071523] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
11681 23:04:20.837050 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11683 23:04:20.839796 uts, pipes: 8, outputs: 0
11684 23:04:20.846538 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11685 23:04:20.849800 Opened device: /dev/dri/card0
11686 23:04:20.856676 Starting subtest<14>[ 23.092604] [IGT] kms_addfb_basic: executing
11687 23:04:20.856762 : master-rmfb
11688 23:04:20.859864 [1mSubtest master-rmfb: SUCCESS (0.000s)[0m
11689 23:04:20.869945 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11690 23:04:20.873219 Test requiremen<14>[ 23.110059] [IGT] kms_addfb_basic: exiting, ret=77
11691 23:04:20.876129 t: is_i915_device(fd)
11692 23:04:20.889305 Test requirement not met in function igt_<8>[ 23.121002] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
11693 23:04:20.889602 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11695 23:04:20.892590 require_i915, file ../lib/drmtest.c:720:
11696 23:04:20.895970 Test requirement: is_i915_device(fd)
11697 23:04:20.899192 No KMS driver or no outputs, pipes: 8, outputs: 0
11698 23:04:20.905715 IGT-Version: <14>[ 23.141842] [IGT] kms_addfb_basic: executing
11699 23:04:20.909015 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11700 23:04:20.912370 Opened device: /dev/dri/card0
11701 23:04:20.915973 Starting subtest: addfb25-modifier-no-flag
11702 23:04:20.925445 [1mSubtest addfb25-modifier<14>[ 23.160008] [IGT] kms_addfb_basic: exiting, ret=77
11703 23:04:20.925548 -no-flag: SUCCESS (0.000s)[0m
11704 23:04:20.939573 Test requirement not met in func<8>[ 23.170886] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
11705 23:04:20.939849 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11707 23:04:20.942957 tion igt_require_i915, file ../lib/drmtest.c:720:
11708 23:04:20.946116 Test requirement: is_i915_device(fd)
11709 23:04:20.955257 Test requirement not met in function igt_require_i915, <14>[ 23.192665] [IGT] kms_addfb_basic: executing
11710 23:04:20.958589 file ../lib/drmtest.c:720:
11711 23:04:20.962005 Test requirement: is_i915_device(fd)
11712 23:04:20.965246 No KMS driver or no outputs, pipes: 8, outputs: 0
11713 23:04:20.975288 IGT-Version: 1.27.1-g621c2d<14>[ 23.210396] [IGT] kms_addfb_basic: exiting, ret=77
11714 23:04:20.978889 3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11715 23:04:20.985354 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11717 23:04:20.988491 Opened device: /dev/d<8>[ 23.220107] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
11718 23:04:20.988575 ri/card0
11719 23:04:20.991763 Starting subtest: addfb25-bad-modifier
11720 23:04:21.004966 (kms_addfb_basic:421) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/k<14>[ 23.240566] [IGT] kms_addfb_basic: executing
11721 23:04:21.005052 ms_addfb_basic.c:662:
11722 23:04:21.021346 (kms_addfb_basic:421) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | ((<14>[ 23.258519] [IGT] kms_addfb_basic: exiting, ret=77
11723 23:04:21.034692 (0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)<8>[ 23.268519] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
11724 23:04:21.035011 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11726 23:04:21.037758 +8)))), (&f)) == -1
11727 23:04:21.041116 (kms_addfb_basic:421) CRITICAL: error: 0 != -1
11728 23:04:21.041200 Stack trace:
11729 23:04:21.048433 #0 ../lib/igt_core.c:1971 __igt_fail_assert()
11730 23:04:21.051206 #1 [<unkno<14>[ 23.289738] [IGT] kms_addfb_basic: executing
11731 23:04:21.054435 wn>+0xd20447e0]
11732 23:04:21.057720 #2 [<unknown>+0xd2046278]
11733 23:04:21.057803 #3 [<unknown>+0xd204167c]
11734 23:04:21.061246 #4 [__libc_start_main+0xe8]
11735 23:04:21.064805 #5 [<unknown>+0xd20416b4]
11736 23:04:21.067498 #6 [<unknown>+0xd20416b4]
11737 23:04:21.071300 Subtest addfb25-bad-modifier failed.
11738 23:04:21.071376 **** DEBUG ****
11739 23:04:21.080703 (kms_addfb_basic:421) ioctl_wrappers-DEBUG: Test requirement passed: igt_has_fb_modifiers(fd)
11740 23:04:21.090549 (kms_addfb_basic:421) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:662:
11741 23:04:21.107304 (kms_addfb_basic:421) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11742 23:04:21.110214 (kms_addfb_basic:421) CRITICAL: error: 0 != -1
11743 23:04:21.117012 (kms_addfb_basic:421) igt_core-INFO: Stack trace:
11744 23:04:21.124242 (kms_addfb_basic:421) igt_core-INFO: #0 ../lib/igt_core.c:1971 __igt_fail_assert()
11745 23:04:21.130254 (kms_addfb_basic:421) igt_core-INFO: #1 [<unknown>+0xd20447e0]
11746 23:04:21.137343 (kms_addfb_basic:421) igt_core-INFO: #2 [<unknown>+0xd2046278]
11747 23:04:21.140334 (kms_addfb_basic:421) igt_core-INFO: #3 [<unknown>+0xd204167c]
11748 23:04:21.146734 (kms_addfb_basic:421) igt_core-INFO: #4 [__libc_start_main+0xe8]
11749 23:04:21.154106 (kms_addfb_basic:421) igt_core-INFO: #5 [<unknown>+0xd20416b4]
11750 23:04:21.160172 (kms_addfb_basic:421) igt_core-INFO: #6 [<unknown>+0xd20416b4]
11751 23:04:21.160258 **** END ****
11752 23:04:21.163471 [1mSubtest addfb25-bad-modifier: FAIL (0.005s)[0m
11753 23:04:21.173234 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11754 23:04:21.176854 Test requirement: is_i915_device(fd)
11755 23:04:21.183203 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11756 23:04:21.186431 Test requirement: is_i915_device(fd)
11757 23:04:21.189547 No KMS driver or no outputs, pipes: 8, outputs: 0
11758 23:04:21.196616 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11759 23:04:21.199712 Opened device: /dev/dri/card0
11760 23:04:21.206369 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11761 23:04:21.209573 Test requirement: is_i915_device(fd)
11762 23:04:21.216159 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
11763 23:04:21.222703 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11764 23:04:21.226115 Test requirement: is_i915_device(fd)
11765 23:04:21.229332 No KMS driver or no outputs, pipes: 8, outputs: 0
11766 23:04:21.236234 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11767 23:04:21.239172 Opened device: /dev/dri/card0
11768 23:04:21.245830 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11769 23:04:21.249126 Test requirement: is_i915_device(fd)
11770 23:04:21.252479 [1mSubtest addfb25-x-tiled-legacy: SKIP (0.000s)[0m
11771 23:04:21.262296 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11772 23:04:21.265725 Test requirement: is_i915_device(fd)
11773 23:04:21.269567 No KMS driver or no outputs, pipes: 8, outputs: 0
11774 23:04:21.275481 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11775 23:04:21.278729 Opened device: /dev/dri/card0
11776 23:04:21.285668 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11777 23:04:21.288795 Test requirement: is_i915_device(fd)
11778 23:04:21.295197 [1mSubtest addfb25-framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11779 23:04:21.302080 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11780 23:04:21.305024 Test requirement: is_i915_device(fd)
11781 23:04:21.309184 No KMS driver or no outputs, pipes: 8, outputs: 0
11782 23:04:21.314959 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11783 23:04:21.318145 Opened device: /dev/dri/card0
11784 23:04:21.325005 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11785 23:04:21.328531 Test requirement: is_i915_device(fd)
11786 23:04:21.334853 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11787 23:04:21.338086 Test requirement: is_i915_device(fd)
11788 23:04:21.344940 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
11789 23:04:21.348463 No KMS driver or no outputs, pipes: 8, outputs: 0
11790 23:04:21.354557 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11791 23:04:21.358405 Opened device: /dev/dri/card0
11792 23:04:21.364497 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11793 23:04:21.367958 Test requirement: is_i915_device(fd)
11794 23:04:21.374797 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11795 23:04:21.377729 Test requirement: is_i915_device(fd)
11796 23:04:21.381081 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11797 23:04:21.387873 No KMS driver or no outputs, pipes: 8, outputs: 0
11798 23:04:21.394375 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11799 23:04:21.394458 Opened device: /dev/dri/card0
11800 23:04:21.404204 Test requirement not met in function igt_require_i<14>[ 23.640866] [IGT] kms_addfb_basic: exiting, ret=77
11801 23:04:21.407113 915, file ../lib/drmtest.c:720:
11802 23:04:21.417273 Test requirement: is_i915_devic<8>[ 23.651678] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
11803 23:04:21.417543 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11805 23:04:21.420673 e(fd)
11806 23:04:21.427444 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11807 23:04:21.430298 Test requirement: is_i915_device(fd)
11808 23:04:21.437021 [1mSubtest tile<14>[ 23.672283] [IGT] kms_addfb_basic: executing
11809 23:04:21.437107 -pitch-mismatch: SKIP (0.000s)[0m
11810 23:04:21.443757 No KMS driver or no outputs, pipes: 8, outputs: 0
11811 23:04:21.453310 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip<14>[ 23.690010] [IGT] kms_addfb_basic: exiting, ret=77
11812 23:04:21.453398 10 aarch64)
11813 23:04:21.456773 Opened device: /dev/dri/card0
11814 23:04:21.466548 Test requirement not<8>[ 23.699773] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
11815 23:04:21.466807 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11817 23:04:21.473073 met in function igt_require_i915, file ../lib/drmtest.c:720:
11818 23:04:21.477102 Test requirement: is_i915_device(fd)
11819 23:04:21.483311 Test requirement not met in function igt_re<14>[ 23.720338] [IGT] kms_addfb_basic: executing
11820 23:04:21.486403 quire_i915, file ../lib/drmtest.c:720:
11821 23:04:21.489590 Test requirement: is_i915_device(fd)
11822 23:04:21.496337 [1mSubtest basic-y-tiled-legacy: SKIP (0.000s)[0m
11823 23:04:21.499592 No KMS driver<14>[ 23.738102] [IGT] kms_addfb_basic: exiting, ret=77
11824 23:04:21.503150 or no outputs, pipes: 8, outputs: 0
11825 23:04:21.512969 IGT-Version: 1.27.1-g621c2<8>[ 23.747856] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>
11826 23:04:21.513227 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11828 23:04:21.516518 d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11829 23:04:21.520325 Opened device: /dev/dri/card0
11830 23:04:21.529363 Test requirement not met in function igt_require_i915, file ../lib/dr<14>[ 23.767314] [IGT] kms_addfb_basic: executing
11831 23:04:21.532654 mtest.c:720:
11832 23:04:21.536406 Test requirement: is_i915_device(fd)
11833 23:04:21.542637 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11834 23:04:21.549590 Test requ<14>[ 23.785348] [IGT] kms_addfb_basic: exiting, ret=77
11835 23:04:21.552691 irement: is_i915_device(fd)
11836 23:04:21.559074 No KMS driver or no outputs, pipes:<8>[ 23.795190] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>
11837 23:04:21.559328 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11839 23:04:21.562421 8, outputs: 0
11840 23:04:21.565643 [1mSubtest size-max: SKIP (0.000s)[0m
11841 23:04:21.572603 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11842 23:04:21.579031 Opened device: /d<14>[ 23.814486] [IGT] kms_addfb_basic: executing
11843 23:04:21.579117 ev/dri/card0
11844 23:04:21.585752 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11845 23:04:21.588784 Test requirement: is_i915_device(fd)
11846 23:04:21.595662 Test requirement not met <14>[ 23.832561] [IGT] kms_addfb_basic: exiting, ret=77
11847 23:04:21.602277 in function igt_require_i915, file ../lib/drmtest.c:720:
11848 23:04:21.608803 Test r<8>[ 23.843698] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>
11849 23:04:21.609057 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11851 23:04:21.612209 equirement: is_i915_device(fd)
11852 23:04:21.615302 No KMS driver or no outputs, pipes: 8, outputs: 0
11853 23:04:21.618459 [1mSubtest too-wide: SKIP (0.000s)[0m
11854 23:04:21.625847 IGT-Version: 1.27.1-<14>[ 23.862691] [IGT] kms_addfb_basic: executing
11855 23:04:21.631672 g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11856 23:04:21.635065 Opened device: /dev/dri/card0
11857 23:04:21.645598 Test requirement not met in function igt_require_i915, file ../<14>[ 23.880942] [IGT] kms_addfb_basic: exiting, ret=77
11858 23:04:21.645689 lib/drmtest.c:720:
11859 23:04:21.648069 Test requirement: is_i915_device(fd)
11860 23:04:21.655449 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11862 23:04:21.658749 Test r<8>[ 23.891029] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>
11863 23:04:21.664575 equirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11864 23:04:21.667966 Test requirement: is_i915_device(fd)
11865 23:04:21.674931 No KMS driver or no outputs, <14>[ 23.910510] [IGT] kms_addfb_basic: executing
11866 23:04:21.675014 pipes: 8, outputs: 0
11867 23:04:21.678553 [1mSubtest too-high: SKIP (0.000s)[0m
11868 23:04:21.684737 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11869 23:04:21.694981 Opened device: /dev/dri/car<14>[ 23.928582] [IGT] kms_addfb_basic: exiting, ret=77
11870 23:04:21.695067 d0
11871 23:04:21.707650 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c<8>[ 23.941321] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>
11872 23:04:21.707738 :720:
11873 23:04:21.707978 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11875 23:04:21.710760 Test requirement: is_i915_device(fd)
11876 23:04:21.717710 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11877 23:04:21.724051 Test requirement<14>[ 23.960574] [IGT] kms_addfb_basic: executing
11878 23:04:21.724137 : is_i915_device(fd)
11879 23:04:21.730728 No KMS driver or no outputs, pipes: 8, outputs: 0
11880 23:04:21.734047 [1mSubtest bo-too-small: SKIP (0.000s)[0m
11881 23:04:21.743742 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Li<14>[ 23.978391] [IGT] kms_addfb_basic: exiting, ret=77
11882 23:04:21.743829 nux: 6.1.64-cip10 aarch64)
11883 23:04:21.747668 Opened device: /dev/dri/card0
11884 23:04:21.757127 Test <8>[ 23.989510] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
11885 23:04:21.757386 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11887 23:04:21.763592 requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11888 23:04:21.767129 Test requirement: is_i915_device(fd)
11889 23:04:21.773316 Test requirement not met in <14>[ 24.011070] [IGT] kms_addfb_basic: executing
11890 23:04:21.779973 function igt_require_i915, file ../lib/drmtest.c:720:
11891 23:04:21.783686 Test requirement: is_i915_device(fd)
11892 23:04:21.786974 No KMS driver or no outputs, pipes: 8, outputs: 0
11893 23:04:21.793739 [1mSubtest smal<14>[ 24.028625] [IGT] kms_addfb_basic: exiting, ret=77
11894 23:04:21.796962 l-bo: SKIP (0.000s)[0m
11895 23:04:21.806359 IGT-Version: 1.27.1-g621c2d3 (aarch64) <8>[ 24.039738] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
11896 23:04:21.806636 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11898 23:04:21.810632 (Linux: 6.1.64-cip10 aarch64)
11899 23:04:21.813141 Opened device: /dev/dri/card0
11900 23:04:21.819889 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11901 23:04:21.823109 <14>[ 24.060232] [IGT] kms_addfb_basic: executing
11902 23:04:21.823184
11903 23:04:21.826731 Test requirement: is_i915_device(fd)
11904 23:04:21.832875 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11905 23:04:21.836785 Test requirement: is_i915_device(fd)
11906 23:04:21.842886 <14>[ 24.078322] [IGT] kms_addfb_basic: exiting, ret=77
11907 23:04:21.846378 No KMS driver or no outputs, pipes: 8, outputs: 0
11908 23:04:21.856403 [1mSubtest b<8>[ 24.089636] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
11909 23:04:21.856660 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11911 23:04:21.859316 o-too-small-due-to-tiling: SKIP (0.000s)[0m
11912 23:04:21.865819 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11913 23:04:21.872641 Opened device: /dev/dri/card<14>[ 24.110410] [IGT] kms_addfb_basic: executing
11914 23:04:21.872715 0
11915 23:04:21.882545 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11916 23:04:21.885856 Test requirement: is_i915_device(fd)
11917 23:04:21.892295 Test requirement not met in function<14>[ 24.128051] [IGT] kms_addfb_basic: exiting, ret=77
11918 23:04:21.895584 igt_require_i915, file ../lib/drmtest.c:720:
11919 23:04:21.905636 Test requirement:<8>[ 24.139633] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
11920 23:04:21.905889 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11922 23:04:21.908896 is_i915_device(fd)
11923 23:04:21.912041 No KMS driver or no outputs, pipes: 8, outputs: 0
11924 23:04:21.918977 [1mSubtest addfb25-y-tiled-legacy: SKIP (0.000s)[0m
11925 23:04:21.922149 IGT-Version: 1.27<14>[ 24.160341] [IGT] kms_addfb_basic: executing
11926 23:04:21.928775 .1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11927 23:04:21.932158 Opened device: /dev/dri/card0
11928 23:04:21.941660 Test requirement not met in function igt_require_i915, file <14>[ 24.178211] [IGT] kms_addfb_basic: exiting, ret=77
11929 23:04:21.941752 ../lib/drmtest.c:720:
11930 23:04:21.945312 Test requirement: is_i915_device(fd)
11931 23:04:21.955435 Tes<8>[ 24.188352] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
11932 23:04:21.955695 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11934 23:04:21.961419 t requirement not met in functio<8>[ 24.197813] <LAVA_SIGNAL_TESTSET STOP>
11935 23:04:21.961676 Received signal: <TESTSET> STOP
11936 23:04:21.961744 Closing test_set kms_addfb_basic
11937 23:04:21.965025 n igt_require_i915, file ../lib/drmtest.c:720:
11938 23:04:21.968268 Test requirement: is_i915_device(fd)
11939 23:04:21.971945 No KMS driver or no outputs, pipes: 8, outputs: 0
11940 23:04:21.981546 [1mSubtest addfb25-yf-tiled-legacy: SK<8>[ 24.217982] <LAVA_SIGNAL_TESTSET START kms_atomic>
11941 23:04:21.981631 IP (0.000s)[0m
11942 23:04:21.981869 Received signal: <TESTSET> START kms_atomic
11943 23:04:21.981936 Starting test_set kms_atomic
11944 23:04:21.987889 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11945 23:04:21.991605 Opened device: /dev/dri/card0
11946 23:04:22.001174 Test requirement not met in function igt_r<14>[ 24.236216] [IGT] kms_atomic: executing
11947 23:04:22.004948 equire_i915, fil<14>[ 24.242107] [IGT] kms_atomic: exiting, ret=77
11948 23:04:22.007779 e ../lib/drmtest.c:720:
11949 23:04:22.010936 Test requirement: is_i915_device(fd)
11950 23:04:22.017548 T<8>[ 24.252296] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>
11951 23:04:22.017798 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11953 23:04:22.027510 est requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11954 23:04:22.030849 Test requirement: is_i915_device(fd)
11955 23:04:22.034030 No KMS driver or no outp<14>[ 24.273188] [IGT] kms_atomic: executing
11956 23:04:22.040917 uts, pipes: 8, o<14>[ 24.278261] [IGT] kms_atomic: exiting, ret=77
11957 23:04:22.044444 utputs: 0
11958 23:04:22.053728 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000<8>[ 24.288437] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>
11959 23:04:22.053991 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11961 23:04:22.057243 s)[0m
11962 23:04:22.060461 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11963 23:04:22.063939 Opened device: /dev/dri/card0
11964 23:04:22.070447 Test requirement not met in functio<14>[ 24.309324] [IGT] kms_atomic: executing
11965 23:04:22.077092 n igt_require_i9<14>[ 24.314535] [IGT] kms_atomic: exiting, ret=77
11966 23:04:22.081007 15, file ../lib/drmtest.c:720:
11967 23:04:22.094202 Test requirement: is_i915_device<8>[ 24.324508] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
11968 23:04:22.094290 (fd)
11969 23:04:22.094530 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11971 23:04:22.099743 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11972 23:04:22.103216 Test requirement: is_i915_device(fd)
11973 23:04:22.110027 No KMS driver or <14>[ 24.346613] [IGT] kms_atomic: executing
11974 23:04:22.116745 no outputs, pipe<14>[ 24.351832] [IGT] kms_atomic: exiting, ret=77
11975 23:04:22.116830 s: 8, outputs: 0
11976 23:04:22.129392 [1mSubtest addfb25-4-tiled: SKIP (0.000s)[0m<8>[ 24.362012] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
11977 23:04:22.129519
11978 23:04:22.129759 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11980 23:04:22.136165 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11981 23:04:22.136250 Opened device: /dev/dri/card0
11982 23:04:22.146155 No KMS driver or no outputs, pipes: 8, ou<14>[ 24.383235] [IGT] kms_atomic: executing
11983 23:04:22.146242 tputs: 0
11984 23:04:22.152492 [1mSu<14>[ 24.388043] [IGT] kms_atomic: exiting, ret=77
11985 23:04:22.156299 btest plane-overlay-legacy: SKIP (0.000s)[0m
11986 23:04:22.162451 IGT-Version: 1.27<8>[ 24.398173] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>
11987 23:04:22.162710 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11989 23:04:22.168941 .1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
11990 23:04:22.172428 Opened device: /dev/dri/card0
11991 23:04:22.175811 No KMS driver or no outputs, pipes: 8, outputs: 0
11992 23:04:22.179031 [1mSubte<14>[ 24.418295] [IGT] kms_atomic: executing
11993 23:04:22.185994 st plane-primary<14>[ 24.423163] [IGT] kms_atomic: exiting, ret=77
11994 23:04:22.189023 -legacy: SKIP (0.000s)[0m
11995 23:04:22.199313 IGT-Version: 1.27.1-g621c2d3 (aarch6<8>[ 24.433518] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>
11996 23:04:22.199578 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11998 23:04:22.202212 4) (Linux: 6.1.64-cip10 aarch64)
11999 23:04:22.205257 Opened device: /dev/dri/card0
12000 23:04:22.208514 No KMS driver or no outputs, pipes: 8, outputs: 0
12001 23:04:22.215248 [1mSubtest plane-primary-ov<14>[ 24.454359] [IGT] kms_atomic: executing
12002 23:04:22.221905 erlay-mutable-zp<14>[ 24.459335] [IGT] kms_atomic: exiting, ret=77
12003 23:04:22.225150 os: SKIP (0.000s)[0m
12004 23:04:22.235703 IGT-Version: 1.27.1-g621c2d3 (aarch64) (L<8>[ 24.469573] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>
12005 23:04:22.235971 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
12007 23:04:22.239155 inux: 6.1.64-cip10 aarch64)
12008 23:04:22.241702 Opened device: /dev/dri/card0
12009 23:04:22.245231 No KMS driver or no outputs, pipes: 8, outputs: 0
12010 23:04:22.251806 [1mSubtest plane-immutable-zpos:<14>[ 24.489971] [IGT] kms_atomic: executing
12011 23:04:22.258413 SKIP (0.000s)[<14>[ 24.495418] [IGT] kms_atomic: exiting, ret=77
12012 23:04:22.258497 0m
12013 23:04:22.271562 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 <8>[ 24.505694] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
12014 23:04:22.271823 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
12016 23:04:22.274953 aarch64)
12017 23:04:22.278231 Opened device: /dev/dri/card0
12018 23:04:22.281741 No KMS driver or no outputs, pipes: 8, outputs: 0
12019 23:04:22.285385 [1mSubtest test-only: SKIP (0.000s)[0m
12020 23:04:22.288672 IGT-Versio<14>[ 24.527265] [IGT] kms_atomic: executing
12021 23:04:22.295062 n: 1.27.1-g621c2<14>[ 24.532113] [IGT] kms_atomic: exiting, ret=77
12022 23:04:22.301046 d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12023 23:04:22.307957 Opened device: /dev/<8>[ 24.542339] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>
12024 23:04:22.308219 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
12026 23:04:22.311156 dri/card0
12027 23:04:22.314521 No KMS driver or no outputs, pipes: 8, outputs: 0
12028 23:04:22.317762 [1mSubtest plane-cursor-legacy: SKIP (0.000s)[0m
12029 23:04:22.324385 IGT-Version: 1.27.1-g621c2d3 (<14>[ 24.563184] [IGT] kms_atomic: executing
12030 23:04:22.330670 aarch64) (Linux:<14>[ 24.568207] [IGT] kms_atomic: exiting, ret=77
12031 23:04:22.334247 6.1.64-cip10 aarch64)
12032 23:04:22.337651 Opened device: /dev/dri/card0
12033 23:04:22.344003 No KMS dr<8>[ 24.578476] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
12034 23:04:22.344262 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
12036 23:04:22.351152 iver or no outputs, pipes: 8, outputs: 0
12037 23:04:22.354268 [1mSubtest plane-invalid-params: SKIP (0.000s)[0m
12038 23:04:22.363751 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.<14>[ 24.599661] [IGT] kms_atomic: executing
12039 23:04:22.367613 1.64-cip10 aarch<14>[ 24.604885] [IGT] kms_atomic: exiting, ret=77
12040 23:04:22.370425 64)
12041 23:04:22.370508 Opened device: /dev/dri/card0
12042 23:04:22.380667 No KMS driver or no outputs,<8>[ 24.615055] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>
12043 23:04:22.380928 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
12045 23:04:22.383392 pipes: 8, outputs: 0
12046 23:04:22.390258 [1mSubtest plane-invalid-params-fence: SKIP (0.000s)[0m
12047 23:04:22.400183 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aa<14>[ 24.635873] [IGT] kms_atomic: executing
12048 23:04:22.400266 rch64)
12049 23:04:22.403215 Opened d<14>[ 24.641171] [IGT] kms_atomic: exiting, ret=77
12050 23:04:22.406938 evice: /dev/dri/card0
12051 23:04:22.416368 No KMS driver or no outputs, pipes: 8, ou<8>[ 24.651251] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>
12052 23:04:22.416628 Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
12054 23:04:22.419674 tputs: 0
12055 23:04:22.423307 [1mSubtest crtc-inval<8>[ 24.661338] <LAVA_SIGNAL_TESTSET STOP>
12056 23:04:22.423559 Received signal: <TESTSET> STOP
12057 23:04:22.423631 Closing test_set kms_atomic
12058 23:04:22.426598 id-params: SKIP (0.000s)[0m
12059 23:04:22.433121 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12060 23:04:22.436351 Opened device: /dev/dri/card0
12061 23:04:22.446964 No KMS driver or no outputs, pipes: 8, output<8>[ 24.681473] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
12062 23:04:22.447052 s: 0
12063 23:04:22.447288 Received signal: <TESTSET> START kms_flip_event_leak
12064 23:04:22.447358 Starting test_set kms_flip_event_leak
12065 23:04:22.452682 [1mSubtest crtc-invalid-params-fence: SKIP (0.000s)[0m
12066 23:04:22.455952 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12067 23:04:22.465702 Opened device: /dev/dri/ca<14>[ 24.700958] [IGT] kms_flip_event_leak: executing
12068 23:04:22.465786 rd0
12069 23:04:22.472778 No KMS driv<14>[ 24.707189] [IGT] kms_flip_event_leak: exiting, ret=77
12070 23:04:22.475913 er or no outputs, pipes: 8, outputs: 0
12071 23:04:22.482360 [1mSubtest atomic-inval<8>[ 24.718695] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
12072 23:04:22.482618 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
12074 23:04:22.485886 id-params: SKIP (0.000s)[0m
12075 23:04:22.488664 IG<8>[ 24.727147] <LAVA_SIGNAL_TESTSET STOP>
12076 23:04:22.488916 Received signal: <TESTSET> STOP
12077 23:04:22.488985 Closing test_set kms_flip_event_leak
12078 23:04:22.495404 T-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12079 23:04:22.499113 Opened device: /dev/dri/card0
12080 23:04:22.502208 No KMS driver or no outputs, pipes: 8, outputs: 0
12081 23:04:22.511692 [1mSubtest atomic_plane_damage: SKIP (0.0<8>[ 24.749036] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
12082 23:04:22.511776 00s)[0m
12083 23:04:22.512015 Received signal: <TESTSET> START kms_prop_blob
12084 23:04:22.512085 Starting test_set kms_prop_blob
12085 23:04:22.518549 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12086 23:04:22.521794 Opened device: /dev/dri/card0
12087 23:04:22.528455 No KMS driver or no outputs, pipe<14>[ 24.766153] [IGT] kms_prop_blob: executing
12088 23:04:22.535121 s: 8, outputs: 0<14>[ 24.772035] [IGT] kms_prop_blob: starting subtest basic
12089 23:04:22.535207
12090 23:04:22.545293 [1mSubtest ba<14>[ 24.778797] [IGT] kms_prop_blob: finished subtest basic, SUCCESS
12091 23:04:22.551544 sic: SKIP (0.000<14>[ 24.786509] [IGT] kms_prop_blob: exiting, ret=0
12092 23:04:22.551629 s)[0m
12093 23:04:22.561380 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.64-ci<8>[ 24.796965] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
12094 23:04:22.561687 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
12096 23:04:22.564485 p10 aarch64)
12097 23:04:22.568493 Opened device: /dev/dri/card0
12098 23:04:22.568575 Starting subtest: basic
12099 23:04:22.571204 [1mSubtest basic: SUCCESS (0.000s)[0m
12100 23:04:22.590786 <14>[ 24.827631] [IGT] kms_prop_blob: executing
12101 23:04:22.596880 IGT-Version: 1.2<14>[ 24.832610] [IGT] kms_prop_blob: starting subtest blob-prop-core
12102 23:04:22.609361 7.1-g621c2d3 (aa<14>[ 24.840359] [IGT] kms_prop_blob: finished subtest blob-prop-core, SUCCESS
12103 23:04:22.613257 rch64) (Linux: 6<14>[ 24.848673] [IGT] kms_prop_blob: exiting, ret=0
12104 23:04:22.613341 .1.64-cip10 aarch64)
12105 23:04:22.616738 Opened device: /dev/dri/card0
12106 23:04:22.626995 Starting su<8>[ 24.860158] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
12107 23:04:22.627129 btest: blob-prop-core
12108 23:04:22.627401 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
12110 23:04:22.633274 [1mSubtest blob-prop-core: SUCCESS (0.000s)[0m
12111 23:04:22.642920 <14>[ 24.880161] [IGT] kms_prop_blob: executing
12112 23:04:22.649778 IGT-Version: 1.2<14>[ 24.884905] [IGT] kms_prop_blob: starting subtest blob-prop-validate
12113 23:04:22.659522 7.1-g621c2d3 (aa<14>[ 24.892953] [IGT] kms_prop_blob: finished subtest blob-prop-validate, SUCCESS
12114 23:04:22.666283 rch64) (Linux: 6<14>[ 24.901772] [IGT] kms_prop_blob: exiting, ret=0
12115 23:04:22.669763 .1.64-cip10 aarch64)
12116 23:04:22.669846 Opened device: /dev/dri/card0
12117 23:04:22.679391 Starting su<8>[ 24.912577] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
12118 23:04:22.679652 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
12120 23:04:22.682951 btest: blob-prop-validate
12121 23:04:22.686165 [1mSubtest blob-prop-validate: SUCCESS (0.000s)[0m
12122 23:04:22.695685 <14>[ 24.933091] [IGT] kms_prop_blob: executing
12123 23:04:22.702467 IGT-Version: 1.2<14>[ 24.937833] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
12124 23:04:22.712469 7.1-g621c2d3 (aa<14>[ 24.945866] [IGT] kms_prop_blob: finished subtest blob-prop-lifetime, SUCCESS
12125 23:04:22.719037 rch64) (Linux: 6<14>[ 24.954745] [IGT] kms_prop_blob: exiting, ret=0
12126 23:04:22.722448 .1.64-cip10 aarch64)
12127 23:04:22.722532 Opened device: /dev/dri/card0
12128 23:04:22.732312 Starting su<8>[ 24.965323] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
12129 23:04:22.732576 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
12131 23:04:22.735272 btest: blob-prop-lifetime
12132 23:04:22.739306 [1mSubtest blob-prop-lifetime: SUCCESS (0.000s)[0m
12133 23:04:22.748983 <14>[ 24.986376] [IGT] kms_prop_blob: executing
12134 23:04:22.755579 IGT-Version: 1.2<14>[ 24.991105] [IGT] kms_prop_blob: starting subtest blob-multiple
12135 23:04:22.765702 7.1-g621c2d3 (aa<14>[ 24.998795] [IGT] kms_prop_blob: finished subtest blob-multiple, SUCCESS
12136 23:04:22.769200 <14>[ 25.007155] [IGT] kms_prop_blob: exiting, ret=0
12137 23:04:22.772077 rch64) (Linux: 6.1.64-cip10 aarch64)
12138 23:04:22.782403 Opened device: /dev/dri/ca<8>[ 25.016318] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
12139 23:04:22.782491 rd0
12140 23:04:22.782764 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
12142 23:04:22.785643 Starting subtest: blob-multiple
12143 23:04:22.789005 [1mSubtest blob-multiple: SUCCESS (0.000s)[0m
12144 23:04:22.799981 <14>[ 25.036992] [IGT] kms_prop_blob: executing
12145 23:04:22.806378 IGT-Version: 1.2<14>[ 25.041850] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
12146 23:04:22.816171 7.1-g621c2d3 (aa<14>[ 25.050015] [IGT] kms_prop_blob: finished subtest invalid-get-prop-any, SUCCESS
12147 23:04:22.823144 rch64) (Linux: 6<14>[ 25.059150] [IGT] kms_prop_blob: exiting, ret=0
12148 23:04:22.826270 .1.64-cip10 aarch64)
12149 23:04:22.826352 Opened device: /dev/dri/card0
12150 23:04:22.836483 Starting su<8>[ 25.069740] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
12151 23:04:22.836751 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
12153 23:04:22.839338 btest: invalid-get-prop-any
12154 23:04:22.842575 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
12155 23:04:22.853439 <14>[ 25.090627] [IGT] kms_prop_blob: executing
12156 23:04:22.860980 IGT-Version: 1.2<14>[ 25.095409] [IGT] kms_prop_blob: starting subtest invalid-get-prop
12157 23:04:22.870196 7.1-g621c2d3 (aa<14>[ 25.103205] [IGT] kms_prop_blob: finished subtest invalid-get-prop, SUCCESS
12158 23:04:22.876637 rch64) (Linux: 6<14>[ 25.111922] [IGT] kms_prop_blob: exiting, ret=0
12159 23:04:22.876723 .1.64-cip10 aarch64)
12160 23:04:22.879592 Opened device: /dev/dri/card0
12161 23:04:22.889837 Starting su<8>[ 25.122502] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
12162 23:04:22.889923 btest: invalid-get-prop
12163 23:04:22.890164 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
12165 23:04:22.896352 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
12166 23:04:22.906001 <14>[ 25.143218] [IGT] kms_prop_blob: executing
12167 23:04:22.912411 IGT-Version: 1.2<14>[ 25.148067] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
12168 23:04:22.922560 7.1-g621c2d3 (aa<14>[ 25.156218] [IGT] kms_prop_blob: finished subtest invalid-set-prop-any, SUCCESS
12169 23:04:22.929369 rch64) (Linux: 6<14>[ 25.165305] [IGT] kms_prop_blob: exiting, ret=0
12170 23:04:22.932264 .1.64-cip10 aarch64)
12171 23:04:22.942051 Opened device: /dev/dri/ca<8>[ 25.175583] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
12172 23:04:22.942150 rd0
12173 23:04:22.942393 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
12175 23:04:22.945315 Starting subtest: invalid-set-prop-any
12176 23:04:22.949086 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
12177 23:04:22.958507 <14>[ 25.195547] [IGT] kms_prop_blob: executing
12178 23:04:22.964974 IGT-Version: 1.2<14>[ 25.200397] [IGT] kms_prop_blob: starting subtest invalid-set-prop
12179 23:04:22.975240 7.1-g621c2d3 (aa<14>[ 25.208243] [IGT] kms_prop_blob: finished subtest invalid-set-prop, SUCCESS
12180 23:04:22.981182 rch64) (Linux: 6<14>[ 25.216988] [IGT] kms_prop_blob: exiting, ret=0
12181 23:04:22.981266 .1.64-cip10 aarch64)
12182 23:04:22.991043 Opened device: /dev/dri/ca<8>[ 25.227307] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
12183 23:04:22.991128 rd0
12184 23:04:22.991369 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
12186 23:04:22.997731 Starting su<8>[ 25.235791] <LAVA_SIGNAL_TESTSET STOP>
12187 23:04:22.997983 Received signal: <TESTSET> STOP
12188 23:04:22.998052 Closing test_set kms_prop_blob
12189 23:04:23.001585 btest: invalid-set-prop
12190 23:04:23.004625 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
12191 23:04:23.018055 <8>[ 25.255497] <LAVA_SIGNAL_TESTSET START kms_setmode>
12192 23:04:23.018316 Received signal: <TESTSET> START kms_setmode
12193 23:04:23.018389 Starting test_set kms_setmode
12194 23:04:23.035671 <14>[ 25.272874] [IGT] kms_setmode: executing
12195 23:04:23.042971 IGT-Version: 1.2<14>[ 25.277539] [IGT] kms_setmode: starting subtest basic
12196 23:04:23.049240 7.1-g621c2d3 (aa<14>[ 25.284171] [IGT] kms_setmode: finished subtest basic, SKIP
12197 23:04:23.055297 rch64) (Linux: 6<14>[ 25.291508] [IGT] kms_setmode: exiting, ret=77
12198 23:04:23.058862 .1.64-cip10 aarch64)
12199 23:04:23.058945 Opened device: /dev/dri/card0
12200 23:04:23.068887 Starting su<8>[ 25.301988] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
12201 23:04:23.068971 btest: basic
12202 23:04:23.069211 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
12204 23:04:23.072154 No dynamic tests executed.
12205 23:04:23.075170 [1mSubtest basic: SKIP (0.000s)[0m
12206 23:04:23.084154 <14>[ 25.321668] [IGT] kms_setmode: executing
12207 23:04:23.091083 IGT-Version: 1.2<14>[ 25.326309] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
12208 23:04:23.100935 7.1-g621c2d3 (aa<14>[ 25.334487] [IGT] kms_setmode: finished subtest basic-clone-single-crtc, SKIP
12209 23:04:23.107399 rch64) (Linux: 6<14>[ 25.343384] [IGT] kms_setmode: exiting, ret=77
12210 23:04:23.111073 .1.64-cip10 aarch64)
12211 23:04:23.111157 Opened device: /dev/dri/card0
12212 23:04:23.120541 Starting su<8>[ 25.353864] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
12213 23:04:23.120802 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
12215 23:04:23.124395 btest: basic-clone-single-crtc
12216 23:04:23.127266 No dynamic tests executed.
12217 23:04:23.130692 [1mSubtest basic-clone-single-crtc: SKIP (0.000s)[0m
12218 23:04:23.138026 <14>[ 25.375418] [IGT] kms_setmode: executing
12219 23:04:23.145337 IGT-Version: 1.2<14>[ 25.380047] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
12220 23:04:23.154886 7.1-g621c2d3 (aa<14>[ 25.388472] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc, SKIP
12221 23:04:23.161252 rch64) (Linux: 6<14>[ 25.397485] [IGT] kms_setmode: exiting, ret=77
12222 23:04:23.164269 .1.64-cip10 aarch64)
12223 23:04:23.164352 Opened device: /dev/dri/card0
12224 23:04:23.175014 Starting su<8>[ 25.409170] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
12225 23:04:23.175276 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
12227 23:04:23.177547 btest: invalid-clone-single-crtc
12228 23:04:23.180956 No dynamic tests executed.
12229 23:04:23.184227 [1mSubtest invalid-clone-single-crtc: SKIP (0.000s)[0m
12230 23:04:23.192870 <14>[ 25.429979] [IGT] kms_setmode: executing
12231 23:04:23.199945 IGT-Version: 1.2<14>[ 25.434817] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
12232 23:04:23.209320 7.1-g621c2d3 (aa<14>[ 25.443316] [IGT] kms_setmode: finished subtest invalid-clone-exclusive-crtc, SKIP
12233 23:04:23.215750 rch64) (Linux: 6<14>[ 25.452592] [IGT] kms_setmode: exiting, ret=77
12234 23:04:23.219122 .1.64-cip10 aarch64)
12235 23:04:23.222427 Opened device: /dev/dri/card0
12236 23:04:23.229172 Starting su<8>[ 25.463222] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
12237 23:04:23.229457 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
12239 23:04:23.232254 btest: invalid-clone-exclusive-crtc
12240 23:04:23.235736 No dynamic tests executed.
12241 23:04:23.242482 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
12242 23:04:23.245441 <14>[ 25.484519] [IGT] kms_setmode: executing
12243 23:04:23.255228 IGT-Version: 1.2<14>[ 25.489171] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
12244 23:04:23.261761 7.1-g621c2d3 (aa<14>[ 25.497092] [IGT] kms_setmode: finished subtest clone-exclusive-crtc, SKIP
12245 23:04:23.268335 rch64) (Linux: 6<14>[ 25.505730] [IGT] kms_setmode: exiting, ret=77
12246 23:04:23.271516 .1.64-cip10 aarch64)
12247 23:04:23.275369 Opened device: /dev/dri/card0
12248 23:04:23.281782 Starting su<8>[ 25.516225] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
12249 23:04:23.282043 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
12251 23:04:23.284966 btest: clone-exclusive-crtc
12252 23:04:23.288114 No dynamic tests executed.
12253 23:04:23.291339 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
12254 23:04:23.299816 <14>[ 25.537020] [IGT] kms_setmode: executing
12255 23:04:23.309731 IGT-Version: 1.2<14>[ 25.541777] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
12256 23:04:23.319475 7.1-g621c2d3 (aa<14>[ 25.550911] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc-stealing, SKIP
12257 23:04:23.326146 rch64) (Linux: 6<14>[ 25.560805] [IGT] kms_setmode: exiting, ret=77
12258 23:04:23.326249 .1.64-cip10 aarch64)
12259 23:04:23.329423 Opened device: /dev/dri/card0
12260 23:04:23.339073 Starting su<8>[ 25.571383] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
12261 23:04:23.339343 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
12263 23:04:23.345865 btest: invalid-c<8>[ 25.582744] <LAVA_SIGNAL_TESTSET STOP>
12264 23:04:23.345949 lone-single-crtc-stealing
12265 23:04:23.346183 Received signal: <TESTSET> STOP
12266 23:04:23.346249 Closing test_set kms_setmode
12267 23:04:23.349158 No dynamic tests executed.
12268 23:04:23.355982 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
12269 23:04:23.364377 <8>[ 25.601794] <LAVA_SIGNAL_TESTSET START kms_vblank>
12270 23:04:23.364632 Received signal: <TESTSET> START kms_vblank
12271 23:04:23.364704 Starting test_set kms_vblank
12272 23:04:23.383316 <14>[ 25.620472] [IGT] kms_vblank: executing
12273 23:04:23.389733 IGT-Version: 1.2<14>[ 25.625320] [IGT] kms_vblank: exiting, ret=77
12274 23:04:23.393267 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12275 23:04:23.399876 Opened dev<8>[ 25.635949] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>
12276 23:04:23.400134 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
12278 23:04:23.402929 ice: /dev/dri/card0
12279 23:04:23.406204 No KMS driver or no outputs, pipes: 8, outputs: 0
12280 23:04:23.409721 [1mSubtest invalid: SKIP (0.000s)[0m
12281 23:04:23.418491 <14>[ 25.655562] [IGT] kms_vblank: executing
12282 23:04:23.425012 IGT-Version: 1.2<14>[ 25.660277] [IGT] kms_vblank: exiting, ret=77
12283 23:04:23.428231 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12284 23:04:23.434898 Opened dev<8>[ 25.670472] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>
12285 23:04:23.435162 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
12287 23:04:23.437882 ice: /dev/dri/card0
12288 23:04:23.441122 No KMS driver or no outputs, pipes: 8, outputs: 0
12289 23:04:23.444415 [1mSubtest crtc-id: SKIP (0.000s)[0m
12290 23:04:23.453337 <14>[ 25.690640] [IGT] kms_vblank: executing
12291 23:04:23.459787 IGT-Version: 1.2<14>[ 25.695402] [IGT] kms_vblank: exiting, ret=77
12292 23:04:23.463318 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12293 23:04:23.473446 Opened dev<8>[ 25.705461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>
12294 23:04:23.473549 ice: /dev/dri/card0
12295 23:04:23.473829 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
12297 23:04:23.479750 No KMS driver or no outputs, pipes: 8, outputs: 0
12298 23:04:23.482938 [1mSubtest pipe-A-accuracy-idle: SKIP (0.000s)[0m
12299 23:04:23.489445 <14>[ 25.726317] [IGT] kms_vblank: executing
12300 23:04:23.493031 IGT-Version: 1.2<14>[ 25.731166] [IGT] kms_vblank: exiting, ret=77
12301 23:04:23.499496 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12302 23:04:23.506306 Opened dev<8>[ 25.741299] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>
12303 23:04:23.506562 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
12305 23:04:23.509477 ice: /dev/dri/card0
12306 23:04:23.512853 No KMS driver or no outputs, pipes: 8, outputs: 0
12307 23:04:23.519410 [1mSubtest pipe-A-query-idle: SKIP (0.000s)[0m
12308 23:04:23.522734 <14>[ 25.761869] [IGT] kms_vblank: executing
12309 23:04:23.529157 IGT-Version: 1.2<14>[ 25.766677] [IGT] kms_vblank: exiting, ret=77
12310 23:04:23.536405 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12311 23:04:23.542557 Opened dev<8>[ 25.777083] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>
12312 23:04:23.542822 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
12314 23:04:23.545705 ice: /dev/dri/card0
12315 23:04:23.549011 No KMS driver or no outputs, pipes: 8, outputs: 0
12316 23:04:23.555808 [1mSubtest pipe-A-query-idle-hang: SKIP (0.000s)[0m
12317 23:04:23.558688 <14>[ 25.797843] [IGT] kms_vblank: executing
12318 23:04:23.565540 IGT-Version: 1.2<14>[ 25.802545] [IGT] kms_vblank: exiting, ret=77
12319 23:04:23.572349 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12320 23:04:23.578742 Opened dev<8>[ 25.812812] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>
12321 23:04:23.578993 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
12323 23:04:23.582700 ice: /dev/dri/card0
12324 23:04:23.585600 No KMS driver or no outputs, pipes: 8, outputs: 0
12325 23:04:23.588881 [1mSubtest pipe-A-query-forked: SKIP (0.000s)[0m
12326 23:04:23.596070 <14>[ 25.833429] [IGT] kms_vblank: executing
12327 23:04:23.602783 IGT-Version: 1.2<14>[ 25.838150] [IGT] kms_vblank: exiting, ret=77
12328 23:04:23.606573 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12329 23:04:23.616017 Opened dev<8>[ 25.848301] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>
12330 23:04:23.616099 ice: /dev/dri/card0
12331 23:04:23.616334 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
12333 23:04:23.622292 No KMS driver or no outputs, pipes: 8, outputs: 0
12334 23:04:23.626075 [1mSubtest pipe-A-query-forked-hang: SKIP (0.000s)[0m
12335 23:04:23.632875 <14>[ 25.870164] [IGT] kms_vblank: executing
12336 23:04:23.639363 IGT-Version: 1.2<14>[ 25.875074] [IGT] kms_vblank: exiting, ret=77
12337 23:04:23.642645 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12338 23:04:23.652589 Opened dev<8>[ 25.885173] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>
12339 23:04:23.652672 ice: /dev/dri/card0
12340 23:04:23.652910 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
12342 23:04:23.659586 No KMS driver or no outputs, pipes: 8, outputs: 0
12343 23:04:23.663511 [1mSubtest pipe-A-query-busy: SKIP (0.000s)[0m
12344 23:04:23.666562 <14>[ 25.905274] [IGT] kms_vblank: executing
12345 23:04:23.672474 IGT-Version: 1.2<14>[ 25.910087] [IGT] kms_vblank: exiting, ret=77
12346 23:04:23.679043 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12347 23:04:23.685878 Opened dev<8>[ 25.920239] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>
12348 23:04:23.686138 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
12350 23:04:23.689099 ice: /dev/dri/card0
12351 23:04:23.691994 No KMS driver or no outputs, pipes: 8, outputs: 0
12352 23:04:23.699064 [1mSubtest pipe-A-query-busy-hang: SKIP (0.000s)[0m
12353 23:04:23.702469 <14>[ 25.941148] [IGT] kms_vblank: executing
12354 23:04:23.708960 IGT-Version: 1.2<14>[ 25.946011] [IGT] kms_vblank: exiting, ret=77
12355 23:04:23.715633 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12356 23:04:23.722023 Opened dev<8>[ 25.956143] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>
12357 23:04:23.722282 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12359 23:04:23.725243 ice: /dev/dri/card0
12360 23:04:23.728485 No KMS driver or no outputs, pipes: 8, outputs: 0
12361 23:04:23.734978 [1mSubtest pipe-A-query-forked-busy: SKIP (0.000s)[0m
12362 23:04:23.738556 <14>[ 25.977102] [IGT] kms_vblank: executing
12363 23:04:23.744757 IGT-Version: 1.2<14>[ 25.981862] [IGT] kms_vblank: exiting, ret=77
12364 23:04:23.751659 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12365 23:04:23.758197 Opened dev<8>[ 25.991972] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>
12366 23:04:23.758492 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12368 23:04:23.761543 ice: /dev/dri/card0
12369 23:04:23.764826 No KMS driver or no outputs, pipes: 8, outputs: 0
12370 23:04:23.771323 [1mSubtest pipe-A-query-forked-busy-hang: SKIP (0.000s)[0m
12371 23:04:23.774389 <14>[ 26.013298] [IGT] kms_vblank: executing
12372 23:04:23.780893 IGT-Version: 1.2<14>[ 26.018040] [IGT] kms_vblank: exiting, ret=77
12373 23:04:23.787808 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12374 23:04:23.794120 Opened dev<8>[ 26.028126] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>
12375 23:04:23.794380 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12377 23:04:23.798086 ice: /dev/dri/card0
12378 23:04:23.800857 No KMS driver or no outputs, pipes: 8, outputs: 0
12379 23:04:23.804231 [1mSubtest pipe-A-wait-idle: SKIP (0.000s)[0m
12380 23:04:23.811512 <14>[ 26.048561] [IGT] kms_vblank: executing
12381 23:04:23.817842 IGT-Version: 1.2<14>[ 26.053318] [IGT] kms_vblank: exiting, ret=77
12382 23:04:23.820840 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12383 23:04:23.830852 Opened dev<8>[ 26.063482] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>
12384 23:04:23.831059 ice: /dev/dri/card0
12385 23:04:23.831371 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12387 23:04:23.837336 No KMS driver or no outputs, pipes: 8, outputs: 0
12388 23:04:23.841015 [1mSubtest pipe-A-wait-idle-hang: SKIP (0.000s)[0m
12389 23:04:23.847244 <14>[ 26.084310] [IGT] kms_vblank: executing
12390 23:04:23.853846 IGT-Version: 1.2<14>[ 26.089164] [IGT] kms_vblank: exiting, ret=77
12391 23:04:23.857310 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12392 23:04:23.864058 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12394 23:04:23.867025 Opened dev<8>[ 26.099457] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>
12395 23:04:23.867147 ice: /dev/dri/card0
12396 23:04:23.870259 No KMS driver or no outputs, pipes: 8, outputs: 0
12397 23:04:23.877879 [1mSubtest pipe-A-wait-forked: SKIP (0.000s)[0m
12398 23:04:23.880625 <14>[ 26.120009] [IGT] kms_vblank: executing
12399 23:04:23.886841 IGT-Version: 1.2<14>[ 26.124750] [IGT] kms_vblank: exiting, ret=77
12400 23:04:23.893697 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12401 23:04:23.899972 Opened dev<8>[ 26.135187] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>
12402 23:04:23.900240 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12404 23:04:23.903891 ice: /dev/dri/card0
12405 23:04:23.906807 No KMS driver or no outputs, pipes: 8, outputs: 0
12406 23:04:23.913774 [1mSubtest pipe-A-wait-forked-hang: SKIP (0.000s)[0m
12407 23:04:23.916709 <14>[ 26.155892] [IGT] kms_vblank: executing
12408 23:04:23.923807 IGT-Version: 1.2<14>[ 26.160656] [IGT] kms_vblank: exiting, ret=77
12409 23:04:23.929783 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12410 23:04:23.936606 Opened dev<8>[ 26.171115] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>
12411 23:04:23.936870 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12413 23:04:23.939758 ice: /dev/dri/card0
12414 23:04:23.943083 No KMS driver or no outputs, pipes: 8, outputs: 0
12415 23:04:23.946069 [1mSubtest pipe-A-wait-busy: SKIP (0.000s)[0m
12416 23:04:23.954005 <14>[ 26.191441] [IGT] kms_vblank: executing
12417 23:04:23.960591 IGT-Version: 1.2<14>[ 26.196155] [IGT] kms_vblank: exiting, ret=77
12418 23:04:23.963613 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12419 23:04:23.973828 Opened dev<8>[ 26.206288] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>
12420 23:04:23.973912 ice: /dev/dri/card0
12421 23:04:23.974151 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12423 23:04:23.980521 No KMS driver or no outputs, pipes: 8, outputs: 0
12424 23:04:23.983780 [1mSubtest pipe-A-wait-busy-hang: SKIP (0.000s)[0m
12425 23:04:23.990374 <14>[ 26.227528] [IGT] kms_vblank: executing
12426 23:04:23.996836 IGT-Version: 1.2<14>[ 26.232327] [IGT] kms_vblank: exiting, ret=77
12427 23:04:24.000149 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12428 23:04:24.009685 Opened dev<8>[ 26.242511] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>
12429 23:04:24.009769 ice: /dev/dri/card0
12430 23:04:24.010008 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12432 23:04:24.016301 No KMS driver or no outputs, pipes: 8, outputs: 0
12433 23:04:24.019741 [1mSubtest pipe-A-wait-forked-busy: SKIP (0.000s)[0m
12434 23:04:24.026649 <14>[ 26.263651] [IGT] kms_vblank: executing
12435 23:04:24.033157 IGT-Version: 1.2<14>[ 26.268481] [IGT] kms_vblank: exiting, ret=77
12436 23:04:24.036492 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12437 23:04:24.045921 Opened dev<8>[ 26.278615] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>
12438 23:04:24.046007 ice: /dev/dri/card0
12439 23:04:24.046247 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12441 23:04:24.052912 No KMS driver or no outputs, pipes: 8, outputs: 0
12442 23:04:24.055886 [1mSubtest pipe-A-wait-forked-busy-hang: SKIP (0.000s)[0m
12443 23:04:24.063425 <14>[ 26.300305] [IGT] kms_vblank: executing
12444 23:04:24.069391 IGT-Version: 1.2<14>[ 26.305050] [IGT] kms_vblank: exiting, ret=77
12445 23:04:24.072761 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12446 23:04:24.082804 Opened dev<8>[ 26.315376] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>
12447 23:04:24.082886 ice: /dev/dri/card0
12448 23:04:24.083124 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12450 23:04:24.089282 No KMS driver or no outputs, pipes: 8, outputs: 0
12451 23:04:24.092494 [1mSubtest pipe-A-ts-continuation-idle: SKIP (0.000s)[0m
12452 23:04:24.099253 <14>[ 26.336580] [IGT] kms_vblank: executing
12453 23:04:24.105888 IGT-Version: 1.2<14>[ 26.341317] [IGT] kms_vblank: exiting, ret=77
12454 23:04:24.109107 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12455 23:04:24.119108 Opened dev<8>[ 26.351556] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>
12456 23:04:24.119367 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12458 23:04:24.122531 ice: /dev/dri/card0
12459 23:04:24.125522 No KMS driver or no outputs, pipes: 8, outputs: 0
12460 23:04:24.132692 [1mSubtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)[0m
12461 23:04:24.135184 <14>[ 26.373463] [IGT] kms_vblank: executing
12462 23:04:24.141656 IGT-Version: 1.2<14>[ 26.378200] [IGT] kms_vblank: exiting, ret=77
12463 23:04:24.145690 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12464 23:04:24.155063 Opened dev<8>[ 26.388398] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>
12465 23:04:24.155323 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12467 23:04:24.158576 ice: /dev/dri/card0
12468 23:04:24.161705 No KMS driver or no outputs, pipes: 8, outputs: 0
12469 23:04:24.168150 [1mSubtest pipe-A-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12470 23:04:24.172049 <14>[ 26.409927] [IGT] kms_vblank: executing
12471 23:04:24.177881 IGT-Version: 1.2<14>[ 26.414862] [IGT] kms_vblank: exiting, ret=77
12472 23:04:24.181236 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12473 23:04:24.191978 Opened dev<8>[ 26.425295] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>
12474 23:04:24.192236 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12476 23:04:24.194765 ice: /dev/dri/card0
12477 23:04:24.197975 No KMS driver or no outputs, pipes: 8, outputs: 0
12478 23:04:24.204364 [1mSubtest pipe-A-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12479 23:04:24.207771 <14>[ 26.446668] [IGT] kms_vblank: executing
12480 23:04:24.214246 IGT-Version: 1.2<14>[ 26.451917] [IGT] kms_vblank: exiting, ret=77
12481 23:04:24.221299 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12482 23:04:24.230747 Opened dev<8>[ 26.462102] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>
12483 23:04:24.230833 ice: /dev/dri/card0
12484 23:04:24.231072 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12486 23:04:24.237163 No KMS driver or no outputs, pipes: 8, outputs: 0
12487 23:04:24.240638 [1mSubtest pipe-A-ts-continuation-suspend: SKIP (0.000s)[0m
12488 23:04:24.247095 <14>[ 26.484120] [IGT] kms_vblank: executing
12489 23:04:24.253517 IGT-Version: 1.2<14>[ 26.488860] [IGT] kms_vblank: exiting, ret=77
12490 23:04:24.256801 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12491 23:04:24.266815 Opened dev<8>[ 26.499238] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>
12492 23:04:24.266903 ice: /dev/dri/card0
12493 23:04:24.267142 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12495 23:04:24.273224 No KMS driver or no outputs, pipes: 8, outputs: 0
12496 23:04:24.276141 [1mSubtest pipe-A-ts-continuation-modeset: SKIP (0.000s)[0m
12497 23:04:24.284557 <14>[ 26.521619] [IGT] kms_vblank: executing
12498 23:04:24.290934 IGT-Version: 1.2<14>[ 26.526460] [IGT] kms_vblank: exiting, ret=77
12499 23:04:24.294171 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12500 23:04:24.304030 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12502 23:04:24.307173 Opened device: /dev/dri/ca<8>[ 26.537844] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>
12503 23:04:24.307255 rd0
12504 23:04:24.310588 No KMS driver or no outputs, pipes: 8, outputs: 0
12505 23:04:24.317632 [1mSubtest pipe-A-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12506 23:04:24.323407 <14>[ 26.560893] [IGT] kms_vblank: executing
12507 23:04:24.330347 IGT-Version: 1.2<14>[ 26.565649] [IGT] kms_vblank: exiting, ret=77
12508 23:04:24.333696 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12509 23:04:24.344392 Opened dev<8>[ 26.575728] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>
12510 23:04:24.344657 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12512 23:04:24.346651 ice: /dev/dri/card0
12513 23:04:24.350219 No KMS driver or no outputs, pipes: 8, outputs: 0
12514 23:04:24.356943 [1mSubtest pipe-A-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12515 23:04:24.359755 <14>[ 26.597525] [IGT] kms_vblank: executing
12516 23:04:24.367051 IGT-Version: 1.2<14>[ 26.602725] [IGT] kms_vblank: exiting, ret=77
12517 23:04:24.370073 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12518 23:04:24.379573 Opened dev<8>[ 26.613063] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>
12519 23:04:24.379658 ice: /dev/dri/card0
12520 23:04:24.379895 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12522 23:04:24.386462 No KMS driver or no outputs, pipes: 8, outputs: 0
12523 23:04:24.389507 [1mSubtest pipe-B-accuracy-idle: SKIP (0.000s)[0m
12524 23:04:24.397000 <14>[ 26.634076] [IGT] kms_vblank: executing
12525 23:04:24.403405 IGT-Version: 1.2<14>[ 26.638932] [IGT] kms_vblank: exiting, ret=77
12526 23:04:24.406339 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12527 23:04:24.416483 Opened dev<8>[ 26.648982] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>
12528 23:04:24.416567 ice: /dev/dri/card0
12529 23:04:24.416805 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12531 23:04:24.422849 No KMS driver or no outputs, pipes: 8, outputs: 0
12532 23:04:24.426656 [1mSubtest pipe-B-query-idle: SKIP (0.000s)[0m
12533 23:04:24.433015 <14>[ 26.669953] [IGT] kms_vblank: executing
12534 23:04:24.439466 IGT-Version: 1.2<14>[ 26.674749] [IGT] kms_vblank: exiting, ret=77
12535 23:04:24.442776 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12536 23:04:24.452657 Opened dev<8>[ 26.684858] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>
12537 23:04:24.452743 ice: /dev/dri/card0
12538 23:04:24.452982 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12540 23:04:24.459509 No KMS driver or no outputs, pipes: 8, outputs: 0
12541 23:04:24.462399 [1mSubtest pipe-B-query-idle-hang: SKIP (0.000s)[0m
12542 23:04:24.469049 <14>[ 26.706308] [IGT] kms_vblank: executing
12543 23:04:24.475673 IGT-Version: 1.2<14>[ 26.711220] [IGT] kms_vblank: exiting, ret=77
12544 23:04:24.478833 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12545 23:04:24.489062 Opened dev<8>[ 26.721182] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>
12546 23:04:24.489147 ice: /dev/dri/card0
12547 23:04:24.489385 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12549 23:04:24.492038 No KMS driver or no outputs, pipes: 8, outputs: 0
12550 23:04:24.499087 [1mSubtest pipe-B-query-forked: SKIP (0.000s)[0m
12551 23:04:24.515231 <14>[ 26.752677] [IGT] kms_vblank: executing
12552 23:04:24.521638 IGT-Version: 1.2<14>[ 26.757673] [IGT] kms_vblank: exiting, ret=77
12553 23:04:24.525393 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12554 23:04:24.528219 Opened device: /dev/dri/card0
12555 23:04:24.538316 No KMS driv<8>[ 26.771285] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>
12556 23:04:24.538585 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12558 23:04:24.541751 er or no outputs, pipes: 8, outputs: 0
12559 23:04:24.544767 [1mSubtest pipe-B-query-forked-hang: SKIP (0.000s)[0m
12560 23:04:24.555131 <14>[ 26.791790] [IGT] kms_vblank: executing
12561 23:04:24.560772 IGT-Version: 1.2<14>[ 26.796512] [IGT] kms_vblank: exiting, ret=77
12562 23:04:24.564270 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12563 23:04:24.573916 Opened dev<8>[ 26.806963] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>
12564 23:04:24.573999 ice: /dev/dri/card0
12565 23:04:24.574237 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12567 23:04:24.580640 No KMS driver or no outputs, pipes: 8, outputs: 0
12568 23:04:24.584017 [1mSubtest pipe-B-query-busy: SKIP (0.000s)[0m
12569 23:04:24.590574 <14>[ 26.827676] [IGT] kms_vblank: executing
12570 23:04:24.597128 IGT-Version: 1.2<14>[ 26.832613] [IGT] kms_vblank: exiting, ret=77
12571 23:04:24.600284 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12572 23:04:24.610377 Opened dev<8>[ 26.843213] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>
12573 23:04:24.610463 ice: /dev/dri/card0
12574 23:04:24.610700 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12576 23:04:24.616726 No KMS driver or no outputs, pipes: 8, outputs: 0
12577 23:04:24.620299 [1mSubtest pipe-B-query-busy-hang: SKIP (0.000s)[0m
12578 23:04:24.626667 <14>[ 26.863675] [IGT] kms_vblank: executing
12579 23:04:24.629993 IGT-Version: 1.2<14>[ 26.868435] [IGT] kms_vblank: exiting, ret=77
12580 23:04:24.636485 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12581 23:04:24.646630 Opened dev<8>[ 26.878641] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>
12582 23:04:24.646720 ice: /dev/dri/card0
12583 23:04:24.646959 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12585 23:04:24.654132 No KMS driver or no outputs, pipes: 8, outputs: 0
12586 23:04:24.656756 [1mSubtest pipe-B-query-forked-busy: SKIP (0.000s)[0m
12587 23:04:24.662939 <14>[ 26.899749] [IGT] kms_vblank: executing
12588 23:04:24.666173 IGT-Version: 1.2<14>[ 26.904455] [IGT] kms_vblank: exiting, ret=77
12589 23:04:24.673059 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12590 23:04:24.682959 Opened dev<8>[ 26.915028] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>
12591 23:04:24.683046 ice: /dev/dri/card0
12592 23:04:24.683298 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12594 23:04:24.689355 No KMS driver or no outputs, pipes: 8, outputs: 0
12595 23:04:24.692642 [1mSubtest pipe-B-query-forked-busy-hang: SKIP (0.000s)[0m
12596 23:04:24.699537 <14>[ 26.936325] [IGT] kms_vblank: executing
12597 23:04:24.702650 IGT-Version: 1.2<14>[ 26.941047] [IGT] kms_vblank: exiting, ret=77
12598 23:04:24.709568 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12599 23:04:24.715969 Opened dev<8>[ 26.951260] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>
12600 23:04:24.716237 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12602 23:04:24.719167 ice: /dev/dri/card0
12603 23:04:24.722610 No KMS driver or no outputs, pipes: 8, outputs: 0
12604 23:04:24.728853 [1mSubtest pipe-B-wait-idle: SKIP (0.000s)[0m
12605 23:04:24.732460 <14>[ 26.971790] [IGT] kms_vblank: executing
12606 23:04:24.739217 IGT-Version: 1.2<14>[ 26.976712] [IGT] kms_vblank: exiting, ret=77
12607 23:04:24.745358 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12608 23:04:24.751958 Opened dev<8>[ 26.986986] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>
12609 23:04:24.752223 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12611 23:04:24.755537 ice: /dev/dri/card0
12612 23:04:24.758735 No KMS driver or no outputs, pipes: 8, outputs: 0
12613 23:04:24.765021 [1mSubtest pipe-B-wait-idle-hang: SKIP (0.000s)[0m
12614 23:04:24.768633 <14>[ 27.007745] [IGT] kms_vblank: executing
12615 23:04:24.774991 IGT-Version: 1.2<14>[ 27.012519] [IGT] kms_vblank: exiting, ret=77
12616 23:04:24.781652 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12617 23:04:24.788019 Opened dev<8>[ 27.022652] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>
12618 23:04:24.788277 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12620 23:04:24.791577 ice: /dev/dri/card0
12621 23:04:24.794824 No KMS driver or no outputs, pipes: 8, outputs: 0
12622 23:04:24.798100 [1mSubtest pipe-B-wait-forked: SKIP (0.000s)[0m
12623 23:04:24.806168 <14>[ 27.043592] [IGT] kms_vblank: executing
12624 23:04:24.812694 IGT-Version: 1.2<14>[ 27.048328] [IGT] kms_vblank: exiting, ret=77
12625 23:04:24.816046 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12626 23:04:24.825907 Opened dev<8>[ 27.058461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>
12627 23:04:24.825992 ice: /dev/dri/card0
12628 23:04:24.826230 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12630 23:04:24.832536 No KMS driver or no outputs, pipes: 8, outputs: 0
12631 23:04:24.836141 [1mSubtest pipe-B-wait-forked-hang: SKIP (0.000s)[0m
12632 23:04:24.842549 <14>[ 27.079729] [IGT] kms_vblank: executing
12633 23:04:24.848706 IGT-Version: 1.2<14>[ 27.084456] [IGT] kms_vblank: exiting, ret=77
12634 23:04:24.852714 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12635 23:04:24.859107 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12637 23:04:24.862290 Opened dev<8>[ 27.095021] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>
12638 23:04:24.862373 ice: /dev/dri/card0
12639 23:04:24.865309 No KMS driver or no outputs, pipes: 8, outputs: 0
12640 23:04:24.871757 [1mSubtest pipe-B-wait-busy: SKIP (0.000s)[0m
12641 23:04:24.875411 <14>[ 27.115043] [IGT] kms_vblank: executing
12642 23:04:24.881968 IGT-Version: 1.2<14>[ 27.119782] [IGT] kms_vblank: exiting, ret=77
12643 23:04:24.888987 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12644 23:04:24.895554 Opened dev<8>[ 27.130002] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>
12645 23:04:24.895814 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12647 23:04:24.898260 ice: /dev/dri/card0
12648 23:04:24.901797 No KMS driver or no outputs, pipes: 8, outputs: 0
12649 23:04:24.908376 [1mSubtest pipe-B-wait-busy-hang: SKIP (0.000s)[0m
12650 23:04:24.911707 <14>[ 27.150916] [IGT] kms_vblank: executing
12651 23:04:24.918544 IGT-Version: 1.2<14>[ 27.155649] [IGT] kms_vblank: exiting, ret=77
12652 23:04:24.924899 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12653 23:04:24.931714 Opened dev<8>[ 27.165834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>
12654 23:04:24.932003 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12656 23:04:24.934545 ice: /dev/dri/card0
12657 23:04:24.938113 No KMS driver or no outputs, pipes: 8, outputs: 0
12658 23:04:24.945305 [1mSubtest pipe-B-wait-forked-busy: SKIP (0.000s)[0m
12659 23:04:24.948262 <14>[ 27.186820] [IGT] kms_vblank: executing
12660 23:04:24.954524 IGT-Version: 1.2<14>[ 27.191556] [IGT] kms_vblank: exiting, ret=77
12661 23:04:24.961186 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12662 23:04:24.967767 Opened dev<8>[ 27.201756] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>
12663 23:04:24.968048 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12665 23:04:24.971310 ice: /dev/dri/card0
12666 23:04:24.974367 No KMS driver or no outputs, pipes: 8, outputs: 0
12667 23:04:24.981364 [1mSubtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)[0m
12668 23:04:24.984492 <14>[ 27.223337] [IGT] kms_vblank: executing
12669 23:04:24.991040 IGT-Version: 1.2<14>[ 27.228067] [IGT] kms_vblank: exiting, ret=77
12670 23:04:24.997675 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12671 23:04:25.004468 Opened dev<8>[ 27.238163] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>
12672 23:04:25.004727 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12674 23:04:25.007712 ice: /dev/dri/card0
12675 23:04:25.010650 No KMS driver or no outputs, pipes: 8, outputs: 0
12676 23:04:25.017353 [1mSubtest pipe-B-ts-continuation-idle: SKIP (0.000s)[0m
12677 23:04:25.020758 <14>[ 27.259745] [IGT] kms_vblank: executing
12678 23:04:25.027423 IGT-Version: 1.2<14>[ 27.264516] [IGT] kms_vblank: exiting, ret=77
12679 23:04:25.033841 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12680 23:04:25.040192 Opened dev<8>[ 27.274868] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>
12681 23:04:25.040469 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12683 23:04:25.043503 ice: /dev/dri/card0
12684 23:04:25.047374 No KMS driver or no outputs, pipes: 8, outputs: 0
12685 23:04:25.053588 [1mSubtest pipe-B-ts-continuation-idle-hang: SKIP (0.000s)[0m
12686 23:04:25.056944 <14>[ 27.296467] [IGT] kms_vblank: executing
12687 23:04:25.063523 IGT-Version: 1.2<14>[ 27.301272] [IGT] kms_vblank: exiting, ret=77
12688 23:04:25.070223 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12689 23:04:25.080100 Opened dev<8>[ 27.311499] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>
12690 23:04:25.080192 ice: /dev/dri/card0
12691 23:04:25.080433 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12693 23:04:25.086704 No KMS driver or no outputs, pipes: 8, outputs: 0
12694 23:04:25.089729 [1mSubtest pipe-B-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12695 23:04:25.092981 <14>[ 27.333120] [IGT] kms_vblank: executing
12696 23:04:25.099892 IGT-Version: 1.2<14>[ 27.337862] [IGT] kms_vblank: exiting, ret=77
12697 23:04:25.106701 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12698 23:04:25.116389 Opened dev<8>[ 27.347974] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>
12699 23:04:25.116481 ice: /dev/dri/card0
12700 23:04:25.116723 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12702 23:04:25.122871 No KMS driver or no outputs, pipes: 8, outputs: 0
12703 23:04:25.126473 [1mSubtest pipe-B-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12704 23:04:25.132797 <14>[ 27.369701] [IGT] kms_vblank: executing
12705 23:04:25.139604 IGT-Version: 1.2<14>[ 27.375258] [IGT] kms_vblank: exiting, ret=77
12706 23:04:25.142765 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12707 23:04:25.152575 Opened dev<8>[ 27.385341] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>
12708 23:04:25.152883 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12710 23:04:25.155693 ice: /dev/dri/card0
12711 23:04:25.159133 No KMS driver or no outputs, pipes: 8, outputs: 0
12712 23:04:25.165898 [1mSubtest pipe-B-ts-continuation-suspend: SKIP (0.000s)[0m
12713 23:04:25.169059 <14>[ 27.407069] [IGT] kms_vblank: executing
12714 23:04:25.175580 IGT-Version: 1.2<14>[ 27.411820] [IGT] kms_vblank: exiting, ret=77
12715 23:04:25.178739 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12716 23:04:25.189059 Opened dev<8>[ 27.422098] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>
12717 23:04:25.189329 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12719 23:04:25.192394 ice: /dev/dri/card0
12720 23:04:25.195325 No KMS driver or no outputs, pipes: 8, outputs: 0
12721 23:04:25.202393 [1mSubtest pipe-B-ts-continuation-modeset: SKIP (0.000s)[0m
12722 23:04:25.204977 <14>[ 27.443968] [IGT] kms_vblank: executing
12723 23:04:25.211854 IGT-Version: 1.2<14>[ 27.448721] [IGT] kms_vblank: exiting, ret=77
12724 23:04:25.215324 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12725 23:04:25.224989 Opened dev<8>[ 27.459074] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>
12726 23:04:25.225266 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12728 23:04:25.228548 ice: /dev/dri/card0
12729 23:04:25.231620 No KMS driver or no outputs, pipes: 8, outputs: 0
12730 23:04:25.238071 [1mSubtest pipe-B-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12731 23:04:25.241329 <14>[ 27.481028] [IGT] kms_vblank: executing
12732 23:04:25.248413 IGT-Version: 1.2<14>[ 27.485926] [IGT] kms_vblank: exiting, ret=77
12733 23:04:25.254466 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12734 23:04:25.264993 Opened dev<8>[ 27.495939] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>
12735 23:04:25.265080 ice: /dev/dri/card0
12736 23:04:25.265320 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12738 23:04:25.270858 No KMS driver or no outputs, pipes: 8, outputs: 0
12739 23:04:25.274517 [1mSubtest pipe-B-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12740 23:04:25.280949 <14>[ 27.517795] [IGT] kms_vblank: executing
12741 23:04:25.289566 IGT-Version: 1.2<14>[ 27.523103] [IGT] kms_vblank: exiting, ret=77
12742 23:04:25.290950 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12743 23:04:25.300987 Opened dev<8>[ 27.533022] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>
12744 23:04:25.301100 ice: /dev/dri/card0
12745 23:04:25.301367 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12747 23:04:25.304095 No KMS driver or no outputs, pipes: 8, outputs: 0
12748 23:04:25.310652 [1mSubtest pipe-C-accuracy-idle: SKIP (0.000s)[0m
12749 23:04:25.317311 <14>[ 27.554170] [IGT] kms_vblank: executing
12750 23:04:25.320580 IGT-Version: 1.2<14>[ 27.559148] [IGT] kms_vblank: exiting, ret=77
12751 23:04:25.327454 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12752 23:04:25.333604 Opened dev<8>[ 27.569446] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>
12753 23:04:25.333866 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12755 23:04:25.337264 ice: /dev/dri/card0
12756 23:04:25.340013 No KMS driver or no outputs, pipes: 8, outputs: 0
12757 23:04:25.347160 [1mSubtest pipe-C-query-idle: SKIP (0.000s)[0m
12758 23:04:25.350319 <14>[ 27.589541] [IGT] kms_vblank: executing
12759 23:04:25.356568 IGT-Version: 1.2<14>[ 27.594267] [IGT] kms_vblank: exiting, ret=77
12760 23:04:25.363235 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12761 23:04:25.370261 Opened dev<8>[ 27.604475] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>
12762 23:04:25.370528 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12764 23:04:25.373209 ice: /dev/dri/card0
12765 23:04:25.376529 No KMS driver or no outputs, pipes: 8, outputs: 0
12766 23:04:25.383006 [1mSubtest pipe-C-query-idle-hang: SKIP (0.000s)[0m
12767 23:04:25.386658 <14>[ 27.626311] [IGT] kms_vblank: executing
12768 23:04:25.392867 IGT-Version: 1.2<14>[ 27.631240] [IGT] kms_vblank: exiting, ret=77
12769 23:04:25.399969 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12770 23:04:25.406313 Opened dev<8>[ 27.641281] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>
12771 23:04:25.406604 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12773 23:04:25.409699 ice: /dev/dri/card0
12774 23:04:25.413231 No KMS driver or no outputs, pipes: 8, outputs: 0
12775 23:04:25.419411 [1mSubtest pipe-C-query-forked: SKIP (0.000s)[0m
12776 23:04:25.422987 <14>[ 27.661800] [IGT] kms_vblank: executing
12777 23:04:25.429367 IGT-Version: 1.2<14>[ 27.666586] [IGT] kms_vblank: exiting, ret=77
12778 23:04:25.435666 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12779 23:04:25.442493 Opened dev<8>[ 27.676802] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>
12780 23:04:25.442764 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12782 23:04:25.446448 ice: /dev/dri/card0
12783 23:04:25.448930 No KMS driver or no outputs, pipes: 8, outputs: 0
12784 23:04:25.455698 [1mSubtest pipe-C-query-forked-hang: SKIP (0.000s)[0m
12785 23:04:25.458969 <14>[ 27.697655] [IGT] kms_vblank: executing
12786 23:04:25.465422 IGT-Version: 1.2<14>[ 27.702394] [IGT] kms_vblank: exiting, ret=77
12787 23:04:25.469378 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12788 23:04:25.479528 Opened dev<8>[ 27.712575] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>
12789 23:04:25.479621 ice: /dev/dri/card0
12790 23:04:25.479864 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12792 23:04:25.485288 No KMS driver or no outputs, pipes: 8, outputs: 0
12793 23:04:25.488804 [1mSubtest pipe-C-query-busy: SKIP (0.000s)[0m
12794 23:04:25.495676 <14>[ 27.733233] [IGT] kms_vblank: executing
12795 23:04:25.502330 IGT-Version: 1.2<14>[ 27.738004] [IGT] kms_vblank: exiting, ret=77
12796 23:04:25.505611 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12797 23:04:25.515870 Opened dev<8>[ 27.748303] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>
12798 23:04:25.515963 ice: /dev/dri/card0
12799 23:04:25.516205 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12801 23:04:25.521740 No KMS driver or no outputs, pipes: 8, outputs: 0
12802 23:04:25.525165 [1mSubtest pipe-C-query-busy-hang: SKIP (0.000s)[0m
12803 23:04:25.531742 <14>[ 27.769426] [IGT] kms_vblank: executing
12804 23:04:25.538318 IGT-Version: 1.2<14>[ 27.774183] [IGT] kms_vblank: exiting, ret=77
12805 23:04:25.541667 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12806 23:04:25.551693 Opened dev<8>[ 27.784174] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>
12807 23:04:25.551783 ice: /dev/dri/card0
12808 23:04:25.552030 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12810 23:04:25.558380 No KMS driver or no outputs, pipes: 8, outputs: 0
12811 23:04:25.561451 [1mSubtest pipe-C-query-forked-busy: SKIP (0.000s)[0m
12812 23:04:25.569149 <14>[ 27.806265] [IGT] kms_vblank: executing
12813 23:04:25.575353 IGT-Version: 1.2<14>[ 27.811150] [IGT] kms_vblank: exiting, ret=77
12814 23:04:25.579137 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12815 23:04:25.589029 Opened dev<8>[ 27.821099] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>
12816 23:04:25.589117 ice: /dev/dri/card0
12817 23:04:25.589366 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12819 23:04:25.594932 No KMS driver or no outputs, pipes: 8, outputs: 0
12820 23:04:25.598536 [1mSubtest pipe-C-query-forked-busy-hang: SKIP (0.000s)[0m
12821 23:04:25.605030 <14>[ 27.842565] [IGT] kms_vblank: executing
12822 23:04:25.611369 IGT-Version: 1.2<14>[ 27.847282] [IGT] kms_vblank: exiting, ret=77
12823 23:04:25.614925 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12824 23:04:25.621750 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12826 23:04:25.625124 Opened dev<8>[ 27.857685] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>
12827 23:04:25.625208 ice: /dev/dri/card0
12828 23:04:25.628129 No KMS driver or no outputs, pipes: 8, outputs: 0
12829 23:04:25.635374 [1mSubtest pipe-C-wait-idle: SKIP (0.000s)[0m
12830 23:04:25.641629 <14>[ 27.878095] [IGT] kms_vblank: executing
12831 23:04:25.644380 IGT-Version: 1.2<14>[ 27.882913] [IGT] kms_vblank: exiting, ret=77
12832 23:04:25.651438 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12833 23:04:25.658067 Opened dev<8>[ 27.893306] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>
12834 23:04:25.658327 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12836 23:04:25.661833 ice: /dev/dri/card0
12837 23:04:25.664371 No KMS driver or no outputs, pipes: 8, outputs: 0
12838 23:04:25.670996 [1mSubtest pipe-C-wait-idle-hang: SKIP (0.000s)[0m
12839 23:04:25.674547 <14>[ 27.913522] [IGT] kms_vblank: executing
12840 23:04:25.680799 IGT-Version: 1.2<14>[ 27.918331] [IGT] kms_vblank: exiting, ret=77
12841 23:04:25.687674 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12842 23:04:25.694501 Opened dev<8>[ 27.929104] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>
12843 23:04:25.694761 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12845 23:04:25.697207 ice: /dev/dri/card0
12846 23:04:25.700814 No KMS driver or no outputs, pipes: 8, outputs: 0
12847 23:04:25.704030 [1mSubtest pipe-C-wait-forked: SKIP (0.000s)[0m
12848 23:04:25.712056 <14>[ 27.949745] [IGT] kms_vblank: executing
12849 23:04:25.718556 IGT-Version: 1.2<14>[ 27.954479] [IGT] kms_vblank: exiting, ret=77
12850 23:04:25.721898 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12851 23:04:25.731814 Opened dev<8>[ 27.964766] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>
12852 23:04:25.731901 ice: /dev/dri/card0
12853 23:04:25.732143 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12855 23:04:25.738523 No KMS driver or no outputs, pipes: 8, outputs: 0
12856 23:04:25.742071 [1mSubtest pipe-C-wait-forked-hang: SKIP (0.000s)[0m
12857 23:04:25.748231 <14>[ 27.985935] [IGT] kms_vblank: executing
12858 23:04:25.754960 IGT-Version: 1.2<14>[ 27.990692] [IGT] kms_vblank: exiting, ret=77
12859 23:04:25.758069 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12860 23:04:25.768036 Opened dev<8>[ 28.000797] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>
12861 23:04:25.768123 ice: /dev/dri/card0
12862 23:04:25.768363 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12864 23:04:25.774666 No KMS driver or no outputs, pipes: 8, outputs: 0
12865 23:04:25.777739 [1mSubtest pipe-C-wait-busy: SKIP (0.000s)[0m
12866 23:04:25.781142 <14>[ 28.021195] [IGT] kms_vblank: executing
12867 23:04:25.787971 IGT-Version: 1.2<14>[ 28.025941] [IGT] kms_vblank: exiting, ret=77
12868 23:04:25.794371 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12869 23:04:25.801628 Opened dev<8>[ 28.036075] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>
12870 23:04:25.801954 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12872 23:04:25.804231 ice: /dev/dri/card0
12873 23:04:25.808089 No KMS driver or no outputs, pipes: 8, outputs: 0
12874 23:04:25.814680 [1mSubtest pipe-C-wait-busy-hang: SKIP (0.000s)[0m
12875 23:04:25.817425 <14>[ 28.056987] [IGT] kms_vblank: executing
12876 23:04:25.824102 IGT-Version: 1.2<14>[ 28.061732] [IGT] kms_vblank: exiting, ret=77
12877 23:04:25.830694 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12878 23:04:25.837929 Opened dev<8>[ 28.071785] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>
12879 23:04:25.838191 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12881 23:04:25.840528 ice: /dev/dri/card0
12882 23:04:25.844278 No KMS driver or no outputs, pipes: 8, outputs: 0
12883 23:04:25.850036 [1mSubtest pipe-C-wait-forked-busy: SKIP (0.000s)[0m
12884 23:04:25.853483 <14>[ 28.093025] [IGT] kms_vblank: executing
12885 23:04:25.860097 IGT-Version: 1.2<14>[ 28.097802] [IGT] kms_vblank: exiting, ret=77
12886 23:04:25.866724 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12887 23:04:25.873450 Opened dev<8>[ 28.107943] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>
12888 23:04:25.873709 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12890 23:04:25.876264 ice: /dev/dri/card0
12891 23:04:25.880312 No KMS driver or no outputs, pipes: 8, outputs: 0
12892 23:04:25.886307 [1mSubtest pipe-C-wait-forked-busy-hang: SKIP (0.000s)[0m
12893 23:04:25.895826 <14>[ 28.133375] [IGT] kms_vblank: executing
12894 23:04:25.902148 IGT-Version: 1.2<14>[ 28.138124] [IGT] kms_vblank: exiting, ret=77
12895 23:04:25.905929 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12896 23:04:25.915515 Opened dev<8>[ 28.148698] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>
12897 23:04:25.915605 ice: /dev/dri/card0
12898 23:04:25.915848 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12900 23:04:25.922106 No KMS driver or no outputs, pipes: 8, outputs: 0
12901 23:04:25.925397 [1mSubtest pipe-C-ts-continuation-idle: SKIP (0.000s)[0m
12902 23:04:25.932554 <14>[ 28.169982] [IGT] kms_vblank: executing
12903 23:04:25.938659 IGT-Version: 1.2<14>[ 28.174801] [IGT] kms_vblank: exiting, ret=77
12904 23:04:25.942409 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12905 23:04:25.952555 Opened dev<8>[ 28.185416] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>
12906 23:04:25.952819 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12908 23:04:25.955200 ice: /dev/dri/card0
12909 23:04:25.958631 No KMS driver or no outputs, pipes: 8, outputs: 0
12910 23:04:25.965581 [1mSubtest pipe-C-ts-continuation-idle-hang: SKIP (0.000s)[0m
12911 23:04:25.968544 <14>[ 28.206530] [IGT] kms_vblank: executing
12912 23:04:25.975388 IGT-Version: 1.2<14>[ 28.211444] [IGT] kms_vblank: exiting, ret=77
12913 23:04:25.978808 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12914 23:04:25.988846 Opened dev<8>[ 28.221790] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>
12915 23:04:25.989107 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12917 23:04:25.991734 ice: /dev/dri/card0
12918 23:04:25.995004 No KMS driver or no outputs, pipes: 8, outputs: 0
12919 23:04:26.001577 [1mSubtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12920 23:04:26.005014 <14>[ 28.243365] [IGT] kms_vblank: executing
12921 23:04:26.011631 IGT-Version: 1.2<14>[ 28.248106] [IGT] kms_vblank: exiting, ret=77
12922 23:04:26.015070 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12923 23:04:26.024602 Opened dev<8>[ 28.258363] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>
12924 23:04:26.024866 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12926 23:04:26.028378 ice: /dev/dri/card0
12927 23:04:26.031486 No KMS driver or no outputs, pipes: 8, outputs: 0
12928 23:04:26.038062 [1mSubtest pipe-C-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12929 23:04:26.041248 <14>[ 28.280302] [IGT] kms_vblank: executing
12930 23:04:26.048354 IGT-Version: 1.2<14>[ 28.285284] [IGT] kms_vblank: exiting, ret=77
12931 23:04:26.054745 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12932 23:04:26.061204 Opened dev<8>[ 28.295574] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>
12933 23:04:26.061465 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12935 23:04:26.064341 ice: /dev/dri/card0
12936 23:04:26.067785 No KMS driver or no outputs, pipes: 8, outputs: 0
12937 23:04:26.074605 [1mSubtest pipe-C-ts-continuation-suspend: SKIP (0.000s)[0m
12938 23:04:26.077666 <14>[ 28.317068] [IGT] kms_vblank: executing
12939 23:04:26.084454 IGT-Version: 1.2<14>[ 28.321823] [IGT] kms_vblank: exiting, ret=77
12940 23:04:26.091074 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12941 23:04:26.097587 Opened dev<8>[ 28.331918] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>
12942 23:04:26.097860 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12944 23:04:26.100847 ice: /dev/dri/card0
12945 23:04:26.104172 No KMS driver or no outputs, pipes: 8, outputs: 0
12946 23:04:26.110584 [1mSubtest pipe-C-ts-continuation-modeset: SKIP (0.000s)[0m
12947 23:04:26.114204 <14>[ 28.353348] [IGT] kms_vblank: executing
12948 23:04:26.120993 IGT-Version: 1.2<14>[ 28.358113] [IGT] kms_vblank: exiting, ret=77
12949 23:04:26.127641 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12950 23:04:26.137240 Opened dev<8>[ 28.368263] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>
12951 23:04:26.137368 ice: /dev/dri/card0
12952 23:04:26.137663 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12954 23:04:26.143495 No KMS driver or no outputs, pipes: 8, outputs: 0
12955 23:04:26.147452 [1mSubtest pipe-C-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12956 23:04:26.153552 <14>[ 28.390171] [IGT] kms_vblank: executing
12957 23:04:26.156707 IGT-Version: 1.2<14>[ 28.395345] [IGT] kms_vblank: exiting, ret=77
12958 23:04:26.163367 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12959 23:04:26.173184 Opened dev<8>[ 28.405780] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>
12960 23:04:26.173303 ice: /dev/dri/card0
12961 23:04:26.173572 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12963 23:04:26.179939 No KMS driver or no outputs, pipes: 8, outputs: 0
12964 23:04:26.186778 [1mSubtest pipe-C-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12965 23:04:26.189823 <14>[ 28.427737] [IGT] kms_vblank: executing
12966 23:04:26.196554 IGT-Version: 1.2<14>[ 28.432445] [IGT] kms_vblank: exiting, ret=77
12967 23:04:26.199764 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12968 23:04:26.209660 Opened dev<8>[ 28.442675] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>
12969 23:04:26.209753 ice: /dev/dri/card0
12970 23:04:26.209995 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12972 23:04:26.215974 No KMS driver or no outputs, pipes: 8, outputs: 0
12973 23:04:26.219890 [1mSubtest pipe-D-accuracy-idle: SKIP (0.000s)[0m
12974 23:04:26.226445 <14>[ 28.463277] [IGT] kms_vblank: executing
12975 23:04:26.232525 IGT-Version: 1.2<14>[ 28.468082] [IGT] kms_vblank: exiting, ret=77
12976 23:04:26.236117 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12977 23:04:26.242372 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12979 23:04:26.245759 Opened dev<8>[ 28.478246] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>
12980 23:04:26.245843 ice: /dev/dri/card0
12981 23:04:26.249168 No KMS driver or no outputs, pipes: 8, outputs: 0
12982 23:04:26.255520 [1mSubtest pipe-D-query-idle: SKIP (0.000s)[0m
12983 23:04:26.262004 <14>[ 28.499143] [IGT] kms_vblank: executing
12984 23:04:26.265473 IGT-Version: 1.2<14>[ 28.503888] [IGT] kms_vblank: exiting, ret=77
12985 23:04:26.272514 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12986 23:04:26.281608 Opened dev<8>[ 28.513993] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>
12987 23:04:26.281695 ice: /dev/dri/card0
12988 23:04:26.281934 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12990 23:04:26.284799 No KMS driver or no outputs, pipes: 8, outputs: 0
12991 23:04:26.291665 [1mSubtest pipe-D-query-idle-hang: SKIP (0.000s)[0m
12992 23:04:26.298140 <14>[ 28.535260] [IGT] kms_vblank: executing
12993 23:04:26.301329 IGT-Version: 1.2<14>[ 28.540008] [IGT] kms_vblank: exiting, ret=77
12994 23:04:26.308335 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
12995 23:04:26.314718 Opened dev<8>[ 28.550230] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>
12996 23:04:26.314978 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12998 23:04:26.318050 ice: /dev/dri/card0
12999 23:04:26.321273 No KMS driver or no outputs, pipes: 8, outputs: 0
13000 23:04:26.328552 [1mSubtest pipe-D-query-forked: SKIP (0.000s)[0m
13001 23:04:26.331637 <14>[ 28.571124] [IGT] kms_vblank: executing
13002 23:04:26.337926 IGT-Version: 1.2<14>[ 28.576001] [IGT] kms_vblank: exiting, ret=77
13003 23:04:26.344510 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13004 23:04:26.351673 Opened dev<8>[ 28.586080] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>
13005 23:04:26.351964 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
13007 23:04:26.354333 ice: /dev/dri/card0
13008 23:04:26.357580 No KMS driver or no outputs, pipes: 8, outputs: 0
13009 23:04:26.364398 [1mSubtest pipe-D-query-forked-hang: SKIP (0.000s)[0m
13010 23:04:26.380900 <14>[ 28.618297] [IGT] kms_vblank: executing
13011 23:04:26.387308 IGT-Version: 1.2<14>[ 28.623605] [IGT] kms_vblank: exiting, ret=77
13012 23:04:26.390561 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13013 23:04:26.400739 Opened device: /dev/dri/ca<8>[ 28.635087] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>
13014 23:04:26.400828 rd0
13015 23:04:26.401070 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
13017 23:04:26.407320 No KMS driver or no outputs, pipes: 8, outputs: 0
13018 23:04:26.410383 [1mSubtest pipe-D-query-busy: SKIP (0.000s)[0m
13019 23:04:26.418613 <14>[ 28.656188] [IGT] kms_vblank: executing
13020 23:04:26.425395 IGT-Version: 1.2<14>[ 28.660993] [IGT] kms_vblank: exiting, ret=77
13021 23:04:26.428597 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13022 23:04:26.438368 Opened dev<8>[ 28.671079] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>
13023 23:04:26.438454 ice: /dev/dri/card0
13024 23:04:26.438694 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
13026 23:04:26.444962 No KMS driver or no outputs, pipes: 8, outputs: 0
13027 23:04:26.448156 [1mSubtest pipe-D-query-busy-hang: SKIP (0.000s)[0m
13028 23:04:26.454970 <14>[ 28.691989] [IGT] kms_vblank: executing
13029 23:04:26.461637 IGT-Version: 1.2<14>[ 28.696863] [IGT] kms_vblank: exiting, ret=77
13030 23:04:26.465100 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13031 23:04:26.474747 Opened dev<8>[ 28.707024] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>
13032 23:04:26.474833 ice: /dev/dri/card0
13033 23:04:26.475073 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
13035 23:04:26.481183 No KMS driver or no outputs, pipes: 8, outputs: 0
13036 23:04:26.484495 [1mSubtest pipe-D-query-forked-busy: SKIP (0.000s)[0m
13037 23:04:26.491149 <14>[ 28.728371] [IGT] kms_vblank: executing
13038 23:04:26.498188 IGT-Version: 1.2<14>[ 28.733241] [IGT] kms_vblank: exiting, ret=77
13039 23:04:26.500959 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13040 23:04:26.511171 Opened dev<8>[ 28.743435] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>
13041 23:04:26.511257 ice: /dev/dri/card0
13042 23:04:26.511496 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
13044 23:04:26.517307 No KMS driver or no outputs, pipes: 8, outputs: 0
13045 23:04:26.520952 [1mSubtest pipe-D-query-forked-busy-hang: SKIP (0.000s)[0m
13046 23:04:26.527899 <14>[ 28.765342] [IGT] kms_vblank: executing
13047 23:04:26.534577 IGT-Version: 1.2<14>[ 28.770074] [IGT] kms_vblank: exiting, ret=77
13048 23:04:26.537840 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13049 23:04:26.547255 Opened dev<8>[ 28.780309] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>
13050 23:04:26.547353 ice: /dev/dri/card0
13051 23:04:26.547596 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
13053 23:04:26.550838 No KMS driver or no outputs, pipes: 8, outputs: 0
13054 23:04:26.557142 [1mSubtest pipe-D-wait-idle: SKIP (0.000s)[0m
13055 23:04:26.564054 <14>[ 28.800886] [IGT] kms_vblank: executing
13056 23:04:26.567154 IGT-Version: 1.2<14>[ 28.805617] [IGT] kms_vblank: exiting, ret=77
13057 23:04:26.573614 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13058 23:04:26.583430 Opened device: /dev/dri/ca<8>[ 28.817180] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>
13059 23:04:26.583519 rd0
13060 23:04:26.583760 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
13062 23:04:26.587209 No KMS driver or no outputs, pipes: 8, outputs: 0
13063 23:04:26.593629 [1mSubtest pipe-D-wait-idle-hang: SKIP (0.000s)[0m
13064 23:04:26.600471 <14>[ 28.838185] [IGT] kms_vblank: executing
13065 23:04:26.607052 IGT-Version: 1.2<14>[ 28.843049] [IGT] kms_vblank: exiting, ret=77
13066 23:04:26.610527 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13067 23:04:26.620135 Opened dev<8>[ 28.853095] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>
13068 23:04:26.620221 ice: /dev/dri/card0
13069 23:04:26.620481 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
13071 23:04:26.626761 No KMS driver or no outputs, pipes: 8, outputs: 0
13072 23:04:26.630419 [1mSubtest pipe-D-wait-forked: SKIP (0.000s)[0m
13073 23:04:26.633597 <14>[ 28.873500] [IGT] kms_vblank: executing
13074 23:04:26.639971 IGT-Version: 1.2<14>[ 28.878227] [IGT] kms_vblank: exiting, ret=77
13075 23:04:26.646538 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13076 23:04:26.653297 Opened dev<8>[ 28.888446] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>
13077 23:04:26.653578 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
13079 23:04:26.656602 ice: /dev/dri/card0
13080 23:04:26.660125 No KMS driver or no outputs, pipes: 8, outputs: 0
13081 23:04:26.666291 [1mSubtest pipe-D-wait-forked-hang: SKIP (0.000s)[0m
13082 23:04:26.669736 <14>[ 28.909211] [IGT] kms_vblank: executing
13083 23:04:26.676725 IGT-Version: 1.2<14>[ 28.913970] [IGT] kms_vblank: exiting, ret=77
13084 23:04:26.682917 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13085 23:04:26.689444 Opened dev<8>[ 28.924652] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>
13086 23:04:26.689714 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
13088 23:04:26.693169 ice: /dev/dri/card0
13089 23:04:26.696541 No KMS driver or no outputs, pipes: 8, outputs: 0
13090 23:04:26.699619 [1mSubtest pipe-D-wait-busy: SKIP (0.000s)[0m
13091 23:04:26.707293 <14>[ 28.944997] [IGT] kms_vblank: executing
13092 23:04:26.713970 IGT-Version: 1.2<14>[ 28.949762] [IGT] kms_vblank: exiting, ret=77
13093 23:04:26.717507 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13094 23:04:26.727122 Opened dev<8>[ 28.960008] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>
13095 23:04:26.727205 ice: /dev/dri/card0
13096 23:04:26.727442 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
13098 23:04:26.733657 No KMS driver or no outputs, pipes: 8, outputs: 0
13099 23:04:26.737197 [1mSubtest pipe-D-wait-busy-hang: SKIP (0.000s)[0m
13100 23:04:26.743411 <14>[ 28.980982] [IGT] kms_vblank: executing
13101 23:04:26.750095 IGT-Version: 1.2<14>[ 28.985711] [IGT] kms_vblank: exiting, ret=77
13102 23:04:26.754089 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13103 23:04:26.763622 Opened dev<8>[ 28.996083] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>
13104 23:04:26.763721 ice: /dev/dri/card0
13105 23:04:26.763962 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
13107 23:04:26.770016 No KMS driver or no outputs, pipes: 8, outputs: 0
13108 23:04:26.772989 [1mSubtest pipe-D-wait-forked-busy: SKIP (0.000s)[0m
13109 23:04:26.780100 <14>[ 29.017628] [IGT] kms_vblank: executing
13110 23:04:26.786844 IGT-Version: 1.2<14>[ 29.022389] [IGT] kms_vblank: exiting, ret=77
13111 23:04:26.790106 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13112 23:04:26.799689 Opened device: /dev/dri/ca<8>[ 29.033996] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>
13113 23:04:26.799776 rd0
13114 23:04:26.800016 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
13116 23:04:26.806989 No KMS driver or no outputs, pipes: 8, outputs: 0
13117 23:04:26.809577 [1mSubtest pipe-D-wait-forked-busy-hang: SKIP (0.000s)[0m
13118 23:04:26.818747 <14>[ 29.055965] [IGT] kms_vblank: executing
13119 23:04:26.824686 IGT-Version: 1.2<14>[ 29.060731] [IGT] kms_vblank: exiting, ret=77
13120 23:04:26.828589 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13121 23:04:26.838315 Opened dev<8>[ 29.071455] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>
13122 23:04:26.838399 ice: /dev/dri/card0
13123 23:04:26.838635 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
13125 23:04:26.844807 No KMS driver or no outputs, pipes: 8, outputs: 0
13126 23:04:26.847875 [1mSubtest pipe-D-ts-continuation-idle: SKIP (0.000s)[0m
13127 23:04:26.854686 <14>[ 29.092224] [IGT] kms_vblank: executing
13128 23:04:26.861028 IGT-Version: 1.2<14>[ 29.096948] [IGT] kms_vblank: exiting, ret=77
13129 23:04:26.864323 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13130 23:04:26.874243 Opened dev<8>[ 29.107726] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>
13131 23:04:26.874499 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
13133 23:04:26.877982 ice: /dev/dri/card0
13134 23:04:26.880943 No KMS driver or no outputs, pipes: 8, outputs: 0
13135 23:04:26.887676 [1mSubtest pipe-D-ts-continuation-idle-hang: SKIP (0.000s)[0m
13136 23:04:26.890811 <14>[ 29.129180] [IGT] kms_vblank: executing
13137 23:04:26.897228 IGT-Version: 1.2<14>[ 29.133934] [IGT] kms_vblank: exiting, ret=77
13138 23:04:26.900519 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13139 23:04:26.910349 Opened dev<8>[ 29.144438] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>
13140 23:04:26.910605 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
13142 23:04:26.914108 ice: /dev/dri/card0
13143 23:04:26.917339 No KMS driver or no outputs, pipes: 8, outputs: 0
13144 23:04:26.923734 [1mSubtest pipe-D-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13145 23:04:26.931836 <14>[ 29.169354] [IGT] kms_vblank: executing
13146 23:04:26.938162 IGT-Version: 1.2<14>[ 29.174172] [IGT] kms_vblank: exiting, ret=77
13147 23:04:26.942042 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13148 23:04:26.951476 Opened dev<8>[ 29.184432] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>
13149 23:04:26.951738 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
13151 23:04:26.955073 ice: /dev/dri/card0
13152 23:04:26.958674 No KMS driver or no outputs, pipes: 8, outputs: 0
13153 23:04:26.964554 [1mSubtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13154 23:04:26.968163 <14>[ 29.206953] [IGT] kms_vblank: executing
13155 23:04:26.974380 IGT-Version: 1.2<14>[ 29.211691] [IGT] kms_vblank: exiting, ret=77
13156 23:04:26.980915 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13157 23:04:26.988183 Opened dev<8>[ 29.221940] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>
13158 23:04:26.988438 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
13160 23:04:26.990888 ice: /dev/dri/card0
13161 23:04:26.994049 No KMS driver or no outputs, pipes: 8, outputs: 0
13162 23:04:27.000954 [1mSubtest pipe-D-ts-continuation-suspend: SKIP (0.000s)[0m
13163 23:04:27.004513 <14>[ 29.243619] [IGT] kms_vblank: executing
13164 23:04:27.011230 IGT-Version: 1.2<14>[ 29.248352] [IGT] kms_vblank: exiting, ret=77
13165 23:04:27.017470 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13166 23:04:27.023992 Opened dev<8>[ 29.258546] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>
13167 23:04:27.024247 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
13169 23:04:27.027186 ice: /dev/dri/card0
13170 23:04:27.030659 No KMS driver or no outputs, pipes: 8, outputs: 0
13171 23:04:27.037397 [1mSubtest pipe-D-ts-continuation-modeset: SKIP (0.000s)[0m
13172 23:04:27.040312 <14>[ 29.280522] [IGT] kms_vblank: executing
13173 23:04:27.047376 IGT-Version: 1.2<14>[ 29.285270] [IGT] kms_vblank: exiting, ret=77
13174 23:04:27.054000 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13175 23:04:27.063564 Opened dev<8>[ 29.295447] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>
13176 23:04:27.063649 ice: /dev/dri/card0
13177 23:04:27.063887 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
13179 23:04:27.069997 No KMS driver or no outputs, pipes: 8, outputs: 0
13180 23:04:27.073456 [1mSubtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13181 23:04:27.080428 <14>[ 29.317058] [IGT] kms_vblank: executing
13182 23:04:27.086570 IGT-Version: 1.2<14>[ 29.322438] [IGT] kms_vblank: exiting, ret=77
13183 23:04:27.090092 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13184 23:04:27.099629 Opened dev<8>[ 29.332616] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>
13185 23:04:27.099885 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
13187 23:04:27.103143 ice: /dev/dri/card0
13188 23:04:27.106129 No KMS driver or no outputs, pipes: 8, outputs: 0
13189 23:04:27.112878 [1mSubtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13190 23:04:27.116162 <14>[ 29.354792] [IGT] kms_vblank: executing
13191 23:04:27.122826 IGT-Version: 1.2<14>[ 29.359515] [IGT] kms_vblank: exiting, ret=77
13192 23:04:27.126174 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13193 23:04:27.136176 Opened dev<8>[ 29.369704] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>
13194 23:04:27.136432 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
13196 23:04:27.139035 ice: /dev/dri/card0
13197 23:04:27.142900 No KMS driver or no outputs, pipes: 8, outputs: 0
13198 23:04:27.145861 [1mSubtest pipe-E-accuracy-idle: SKIP (0.000s)[0m
13199 23:04:27.153014 <14>[ 29.390859] [IGT] kms_vblank: executing
13200 23:04:27.159741 IGT-Version: 1.2<14>[ 29.395603] [IGT] kms_vblank: exiting, ret=77
13201 23:04:27.162697 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13202 23:04:27.172636 Opened dev<8>[ 29.405806] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>
13203 23:04:27.172721 ice: /dev/dri/card0
13204 23:04:27.172960 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
13206 23:04:27.179389 No KMS driver or no outputs, pipes: 8, outputs: 0
13207 23:04:27.182887 [1mSubtest pipe-E-query-idle: SKIP (0.000s)[0m
13208 23:04:27.189055 <14>[ 29.426893] [IGT] kms_vblank: executing
13209 23:04:27.195791 IGT-Version: 1.2<14>[ 29.431625] [IGT] kms_vblank: exiting, ret=77
13210 23:04:27.199446 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13211 23:04:27.209134 Opened dev<8>[ 29.441804] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>
13212 23:04:27.209243 ice: /dev/dri/card0
13213 23:04:27.209514 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
13215 23:04:27.215503 No KMS driver or no outputs, pipes: 8, outputs: 0
13216 23:04:27.218606 [1mSubtest pipe-E-query-idle-hang: SKIP (0.000s)[0m
13217 23:04:27.225650 <14>[ 29.463008] [IGT] kms_vblank: executing
13218 23:04:27.231796 IGT-Version: 1.2<14>[ 29.467760] [IGT] kms_vblank: exiting, ret=77
13219 23:04:27.235117 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13220 23:04:27.245131 Opened dev<8>[ 29.477850] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>
13221 23:04:27.245245 ice: /dev/dri/card0
13222 23:04:27.245510 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
13224 23:04:27.251762 No KMS driver or no outputs, pipes: 8, outputs: 0
13225 23:04:27.255189 [1mSubtest pipe-E-query-forked: SKIP (0.000s)[0m
13226 23:04:27.261466 <14>[ 29.498929] [IGT] kms_vblank: executing
13227 23:04:27.267991 IGT-Version: 1.2<14>[ 29.503655] [IGT] kms_vblank: exiting, ret=77
13228 23:04:27.271371 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13229 23:04:27.281080 Opened dev<8>[ 29.513822] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>
13230 23:04:27.281164 ice: /dev/dri/card0
13231 23:04:27.281400 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
13233 23:04:27.287695 No KMS driver or no outputs, pipes: 8, outputs: 0
13234 23:04:27.291801 [1mSubtest pipe-E-query-forked-hang: SKIP (0.000s)[0m
13235 23:04:27.297711 <14>[ 29.535247] [IGT] kms_vblank: executing
13236 23:04:27.304566 IGT-Version: 1.2<14>[ 29.540049] [IGT] kms_vblank: exiting, ret=77
13237 23:04:27.307807 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13238 23:04:27.317792 Opened dev<8>[ 29.550162] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>
13239 23:04:27.317875 ice: /dev/dri/card0
13240 23:04:27.318110 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
13242 23:04:27.324211 No KMS driver or no outputs, pipes: 8, outputs: 0
13243 23:04:27.327400 [1mSubtest pipe-E-query-busy: SKIP (0.000s)[0m
13244 23:04:27.333735 <14>[ 29.571137] [IGT] kms_vblank: executing
13245 23:04:27.340608 IGT-Version: 1.2<14>[ 29.575887] [IGT] kms_vblank: exiting, ret=77
13246 23:04:27.343512 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13247 23:04:27.353904 Opened dev<8>[ 29.586016] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>
13248 23:04:27.353989 ice: /dev/dri/card0
13249 23:04:27.354226 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
13251 23:04:27.357075 No KMS driver or no outputs, pipes: 8, outputs: 0
13252 23:04:27.363515 [1mSubtest pipe-E-query-busy-hang: SKIP (0.000s)[0m
13253 23:04:27.370818 <14>[ 29.607344] [IGT] kms_vblank: executing
13254 23:04:27.376529 IGT-Version: 1.2<14>[ 29.612222] [IGT] kms_vblank: exiting, ret=77
13255 23:04:27.380199 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13256 23:04:27.389614 Opened dev<8>[ 29.622362] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>
13257 23:04:27.389696 ice: /dev/dri/card0
13258 23:04:27.389932 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
13260 23:04:27.396483 No KMS driver or no outputs, pipes: 8, outputs: 0
13261 23:04:27.399297 [1mSubtest pipe-E-query-forked-busy: SKIP (0.000s)[0m
13262 23:04:27.406111 <14>[ 29.643934] [IGT] kms_vblank: executing
13263 23:04:27.413001 IGT-Version: 1.2<14>[ 29.648658] [IGT] kms_vblank: exiting, ret=77
13264 23:04:27.416555 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13265 23:04:27.426103 Opened dev<8>[ 29.659072] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>
13266 23:04:27.426185 ice: /dev/dri/card0
13267 23:04:27.426420 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
13269 23:04:27.432615 No KMS driver or no outputs, pipes: 8, outputs: 0
13270 23:04:27.435750 [1mSubtest pipe-E-query-forked-busy-hang: SKIP (0.000s)[0m
13271 23:04:27.443294 <14>[ 29.680457] [IGT] kms_vblank: executing
13272 23:04:27.449774 IGT-Version: 1.2<14>[ 29.685208] [IGT] kms_vblank: exiting, ret=77
13273 23:04:27.452683 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13274 23:04:27.462439 Opened dev<8>[ 29.695409] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>
13275 23:04:27.462544 ice: /dev/dri/card0
13276 23:04:27.462787 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
13278 23:04:27.465731 No KMS driver or no outputs, pipes: 8, outputs: 0
13279 23:04:27.473286 [1mSubtest pipe-E-wait-idle: SKIP (0.000s)[0m
13280 23:04:27.476192 <14>[ 29.715832] [IGT] kms_vblank: executing
13281 23:04:27.482774 IGT-Version: 1.2<14>[ 29.720540] [IGT] kms_vblank: exiting, ret=77
13282 23:04:27.489279 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13283 23:04:27.495600 Opened dev<8>[ 29.731022] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>
13284 23:04:27.495859 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
13286 23:04:27.499072 ice: /dev/dri/card0
13287 23:04:27.502215 No KMS driver or no outputs, pipes: 8, outputs: 0
13288 23:04:27.509076 [1mSubtest pipe-E-wait-idle-hang: SKIP (0.000s)[0m
13289 23:04:27.512528 <14>[ 29.751913] [IGT] kms_vblank: executing
13290 23:04:27.519140 IGT-Version: 1.2<14>[ 29.756738] [IGT] kms_vblank: exiting, ret=77
13291 23:04:27.525596 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13292 23:04:27.531916 Opened dev<8>[ 29.767056] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>
13293 23:04:27.532178 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
13295 23:04:27.535238 ice: /dev/dri/card0
13296 23:04:27.538556 No KMS driver or no outputs, pipes: 8, outputs: 0
13297 23:04:27.541858 [1mSubtest pipe-E-wait-forked: SKIP (0.000s)[0m
13298 23:04:27.550088 <14>[ 29.787873] [IGT] kms_vblank: executing
13299 23:04:27.556869 IGT-Version: 1.2<14>[ 29.792593] [IGT] kms_vblank: exiting, ret=77
13300 23:04:27.560100 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13301 23:04:27.570368 Opened dev<8>[ 29.803032] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>
13302 23:04:27.570452 ice: /dev/dri/card0
13303 23:04:27.570693 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
13305 23:04:27.576572 No KMS driver or no outputs, pipes: 8, outputs: 0
13306 23:04:27.579723 [1mSubtest pipe-E-wait-forked-hang: SKIP (0.000s)[0m
13307 23:04:27.586564 <14>[ 29.823698] [IGT] kms_vblank: executing
13308 23:04:27.592997 IGT-Version: 1.2<14>[ 29.828490] [IGT] kms_vblank: exiting, ret=77
13309 23:04:27.595969 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13310 23:04:27.602790 Opened dev<8>[ 29.838691] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>
13311 23:04:27.603043 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
13313 23:04:27.605996 ice: /dev/dri/card0
13314 23:04:27.609851 No KMS driver or no outputs, pipes: 8, outputs: 0
13315 23:04:27.615885 [1mSubtest pipe-E-wait-busy: SKIP (0.000s)[0m
13316 23:04:27.619107 <14>[ 29.859374] [IGT] kms_vblank: executing
13317 23:04:27.625952 IGT-Version: 1.2<14>[ 29.864118] [IGT] kms_vblank: exiting, ret=77
13318 23:04:27.632660 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13319 23:04:27.639056 Opened dev<8>[ 29.874203] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>
13320 23:04:27.639309 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
13322 23:04:27.642460 ice: /dev/dri/card0
13323 23:04:27.645759 No KMS driver or no outputs, pipes: 8, outputs: 0
13324 23:04:27.652212 [1mSubtest pipe-E-wait-busy-hang: SKIP (0.000s)[0m
13325 23:04:27.655680 <14>[ 29.895271] [IGT] kms_vblank: executing
13326 23:04:27.662492 IGT-Version: 1.2<14>[ 29.900135] [IGT] kms_vblank: exiting, ret=77
13327 23:04:27.669220 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13328 23:04:27.676053 Opened dev<8>[ 29.910356] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>
13329 23:04:27.676306 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
13331 23:04:27.678572 ice: /dev/dri/card0
13332 23:04:27.682003 No KMS driver or no outputs, pipes: 8, outputs: 0
13333 23:04:27.689138 [1mSubtest pipe-E-wait-forked-busy: SKIP (0.000s)[0m
13334 23:04:27.691953 <14>[ 29.931714] [IGT] kms_vblank: executing
13335 23:04:27.699051 IGT-Version: 1.2<14>[ 29.936559] [IGT] kms_vblank: exiting, ret=77
13336 23:04:27.705236 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13337 23:04:27.711742 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
13339 23:04:27.715039 Opened dev<8>[ 29.946768] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>
13340 23:04:27.715147 ice: /dev/dri/card0
13341 23:04:27.718135 No KMS driver or no outputs, pipes: 8, outputs: 0
13342 23:04:27.725392 [1mSubtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)[0m
13343 23:04:27.731677 <14>[ 29.968391] [IGT] kms_vblank: executing
13344 23:04:27.734664 IGT-Version: 1.2<14>[ 29.973126] [IGT] kms_vblank: exiting, ret=77
13345 23:04:27.741151 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13346 23:04:27.751346 Opened dev<8>[ 29.983390] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>
13347 23:04:27.751429 ice: /dev/dri/card0
13348 23:04:27.751665 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
13350 23:04:27.758102 No KMS driver or no outputs, pipes: 8, outputs: 0
13351 23:04:27.761590 [1mSubtest pipe-E-ts-continuation-idle: SKIP (0.000s)[0m
13352 23:04:27.765240 <14>[ 30.004524] [IGT] kms_vblank: executing
13353 23:04:27.771067 IGT-Version: 1.2<14>[ 30.009307] [IGT] kms_vblank: exiting, ret=77
13354 23:04:27.777673 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13355 23:04:27.787685 Opened dev<8>[ 30.019570] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>
13356 23:04:27.787766 ice: /dev/dri/card0
13357 23:04:27.787999 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13359 23:04:27.794103 No KMS driver or no outputs, pipes: 8, outputs: 0
13360 23:04:27.797364 [1mSubtest pipe-E-ts-continuation-idle-hang: SKIP (0.000s)[0m
13361 23:04:27.804239 <14>[ 30.041151] [IGT] kms_vblank: executing
13362 23:04:27.810739 IGT-Version: 1.2<14>[ 30.046331] [IGT] kms_vblank: exiting, ret=77
13363 23:04:27.814045 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13364 23:04:27.823806 Opened dev<8>[ 30.056694] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>
13365 23:04:27.823888 ice: /dev/dri/card0
13366 23:04:27.824131 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13368 23:04:27.830306 No KMS driver or no outputs, pipes: 8, outputs: 0
13369 23:04:27.837750 [1mSubtest pipe-E-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13370 23:04:27.840465 <14>[ 30.078016] [IGT] kms_vblank: executing
13371 23:04:27.846862 IGT-Version: 1.2<14>[ 30.083035] [IGT] kms_vblank: exiting, ret=77
13372 23:04:27.850208 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13373 23:04:27.859896 Opened dev<8>[ 30.093364] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>
13374 23:04:27.860164 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13376 23:04:27.863543 ice: /dev/dri/card0
13377 23:04:27.866927 No KMS driver or no outputs, pipes: 8, outputs: 0
13378 23:04:27.873621 [1mSubtest pipe-E-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13379 23:04:27.876669 <14>[ 30.115018] [IGT] kms_vblank: executing
13380 23:04:27.883415 IGT-Version: 1.2<14>[ 30.120168] [IGT] kms_vblank: exiting, ret=77
13381 23:04:27.886523 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13382 23:04:27.896348 Opened dev<8>[ 30.130581] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>
13383 23:04:27.896599 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13385 23:04:27.899971 ice: /dev/dri/card0
13386 23:04:27.902852 No KMS driver or no outputs, pipes: 8, outputs: 0
13387 23:04:27.909714 [1mSubtest pipe-E-ts-continuation-suspend: SKIP (0.000s)[0m
13388 23:04:27.912819 <14>[ 30.152239] [IGT] kms_vblank: executing
13389 23:04:27.919590 IGT-Version: 1.2<14>[ 30.157094] [IGT] kms_vblank: exiting, ret=77
13390 23:04:27.925988 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13391 23:04:27.932867 Opened dev<8>[ 30.167438] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>
13392 23:04:27.933117 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13394 23:04:27.935972 ice: /dev/dri/card0
13395 23:04:27.939243 No KMS driver or no outputs, pipes: 8, outputs: 0
13396 23:04:27.945809 [1mSubtest pipe-E-ts-continuation-modeset: SKIP (0.000s)[0m
13397 23:04:27.949029 <14>[ 30.188839] [IGT] kms_vblank: executing
13398 23:04:27.955594 IGT-Version: 1.2<14>[ 30.193581] [IGT] kms_vblank: exiting, ret=77
13399 23:04:27.963195 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13400 23:04:27.972237 Opened dev<8>[ 30.203644] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>
13401 23:04:27.972347 ice: /dev/dri/card0
13402 23:04:27.972581 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13404 23:04:27.978772 No KMS driver or no outputs, pipes: 8, outputs: 0
13405 23:04:27.982150 [1mSubtest pipe-E-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13406 23:04:27.988846 <14>[ 30.225448] [IGT] kms_vblank: executing
13407 23:04:27.992494 IGT-Version: 1.2<14>[ 30.230959] [IGT] kms_vblank: exiting, ret=77
13408 23:04:27.999293 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13409 23:04:28.008860 Opened dev<8>[ 30.241045] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>
13410 23:04:28.008967 ice: /dev/dri/card0
13411 23:04:28.009223 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13413 23:04:28.015311 No KMS driver or no outputs, pipes: 8, outputs: 0
13414 23:04:28.022461 [1mSubtest pipe-E-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13415 23:04:28.025430 <14>[ 30.262967] [IGT] kms_vblank: executing
13416 23:04:28.031738 IGT-Version: 1.2<14>[ 30.267939] [IGT] kms_vblank: exiting, ret=77
13417 23:04:28.035068 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13418 23:04:28.044805 Opened dev<8>[ 30.278084] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>
13419 23:04:28.044916 ice: /dev/dri/card0
13420 23:04:28.045165 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13422 23:04:28.051584 No KMS driver or no outputs, pipes: 8, outputs: 0
13423 23:04:28.054886 [1mSubtest pipe-F-accuracy-idle: SKIP (0.000s)[0m
13424 23:04:28.061798 <14>[ 30.299178] [IGT] kms_vblank: executing
13425 23:04:28.068066 IGT-Version: 1.2<14>[ 30.303904] [IGT] kms_vblank: exiting, ret=77
13426 23:04:28.071180 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13427 23:04:28.081700 Opened dev<8>[ 30.314034] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>
13428 23:04:28.081781 ice: /dev/dri/card0
13429 23:04:28.082015 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13431 23:04:28.084645 No KMS driver or no outputs, pipes: 8, outputs: 0
13432 23:04:28.090960 [1mSubtest pipe-F-query-idle: SKIP (0.000s)[0m
13433 23:04:28.097917 <14>[ 30.334672] [IGT] kms_vblank: executing
13434 23:04:28.101070 IGT-Version: 1.2<14>[ 30.339497] [IGT] kms_vblank: exiting, ret=77
13435 23:04:28.107770 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13436 23:04:28.114376 Opened dev<8>[ 30.349621] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>
13437 23:04:28.114627 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13439 23:04:28.118058 ice: /dev/dri/card0
13440 23:04:28.120807 No KMS driver or no outputs, pipes: 8, outputs: 0
13441 23:04:28.127471 [1mSubtest pipe-F-query-idle-hang: SKIP (0.000s)[0m
13442 23:04:28.134005 <14>[ 30.371052] [IGT] kms_vblank: executing
13443 23:04:28.137979 IGT-Version: 1.2<14>[ 30.375797] [IGT] kms_vblank: exiting, ret=77
13444 23:04:28.144114 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13445 23:04:28.150581 Opened dev<8>[ 30.385949] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>
13446 23:04:28.150833 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13448 23:04:28.153953 ice: /dev/dri/card0
13449 23:04:28.157274 No KMS driver or no outputs, pipes: 8, outputs: 0
13450 23:04:28.164126 [1mSubtest pipe-F-query-forked: SKIP (0.000s)[0m
13451 23:04:28.167033 <14>[ 30.406534] [IGT] kms_vblank: executing
13452 23:04:28.173874 IGT-Version: 1.2<14>[ 30.411398] [IGT] kms_vblank: exiting, ret=77
13453 23:04:28.180401 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13454 23:04:28.187233 Opened dev<8>[ 30.421442] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>
13455 23:04:28.187485 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13457 23:04:28.190470 ice: /dev/dri/card0
13458 23:04:28.193310 No KMS driver or no outputs, pipes: 8, outputs: 0
13459 23:04:28.200204 [1mSubtest pipe-F-query-forked-hang: SKIP (0.000s)[0m
13460 23:04:28.203111 <14>[ 30.443325] [IGT] kms_vblank: executing
13461 23:04:28.209809 IGT-Version: 1.2<14>[ 30.448068] [IGT] kms_vblank: exiting, ret=77
13462 23:04:28.216828 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13463 23:04:28.223059 Opened dev<8>[ 30.458189] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>
13464 23:04:28.223313 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13466 23:04:28.226546 ice: /dev/dri/card0
13467 23:04:28.229544 No KMS driver or no outputs, pipes: 8, outputs: 0
13468 23:04:28.232865 [1mSubtest pipe-F-query-busy: SKIP (0.000s)[0m
13469 23:04:28.240801 <14>[ 30.478648] [IGT] kms_vblank: executing
13470 23:04:28.247413 IGT-Version: 1.2<14>[ 30.483385] [IGT] kms_vblank: exiting, ret=77
13471 23:04:28.250961 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13472 23:04:28.260607 Opened dev<8>[ 30.493540] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>
13473 23:04:28.260710 ice: /dev/dri/card0
13474 23:04:28.260982 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13476 23:04:28.267728 No KMS driver or no outputs, pipes: 8, outputs: 0
13477 23:04:28.271171 [1mSubtest pipe-F-query-busy-hang: SKIP (0.000s)[0m
13478 23:04:28.276928 <14>[ 30.514557] [IGT] kms_vblank: executing
13479 23:04:28.283676 IGT-Version: 1.2<14>[ 30.519312] [IGT] kms_vblank: exiting, ret=77
13480 23:04:28.287049 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13481 23:04:28.297084 Opened dev<8>[ 30.529285] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>
13482 23:04:28.297182 ice: /dev/dri/card0
13483 23:04:28.297469 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13485 23:04:28.303410 No KMS driver or no outputs, pipes: 8, outputs: 0
13486 23:04:28.306598 [1mSubtest pipe-F-query-forked-busy: SKIP (0.000s)[0m
13487 23:04:28.313243 <14>[ 30.550883] [IGT] kms_vblank: executing
13488 23:04:28.319730 IGT-Version: 1.2<14>[ 30.555620] [IGT] kms_vblank: exiting, ret=77
13489 23:04:28.323184 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13490 23:04:28.332850 Opened dev<8>[ 30.565920] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>
13491 23:04:28.332937 ice: /dev/dri/card0
13492 23:04:28.333175 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13494 23:04:28.339496 No KMS driver or no outputs, pipes: 8, outputs: 0
13495 23:04:28.342939 [1mSubtest pipe-F-query-forked-busy-hang: SKIP (0.000s)[0m
13496 23:04:28.350391 <14>[ 30.587532] [IGT] kms_vblank: executing
13497 23:04:28.356503 IGT-Version: 1.2<14>[ 30.592463] [IGT] kms_vblank: exiting, ret=77
13498 23:04:28.359637 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13499 23:04:28.370133 Opened dev<8>[ 30.602680] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>
13500 23:04:28.370219 ice: /dev/dri/card0
13501 23:04:28.370459 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13503 23:04:28.375894 No KMS driver or no outputs, pipes: 8, outputs: 0
13504 23:04:28.379257 [1mSubtest pipe-F-wait-idle: SKIP (0.000s)[0m
13505 23:04:28.385735 <14>[ 30.623199] [IGT] kms_vblank: executing
13506 23:04:28.389577 IGT-Version: 1.2<14>[ 30.627941] [IGT] kms_vblank: exiting, ret=77
13507 23:04:28.396097 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13508 23:04:28.402585 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13510 23:04:28.405519 Opened dev<8>[ 30.638011] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>
13511 23:04:28.405603 ice: /dev/dri/card0
13512 23:04:28.409250 No KMS driver or no outputs, pipes: 8, outputs: 0
13513 23:04:28.415391 [1mSubtest pipe-F-wait-idle-hang: SKIP (0.000s)[0m
13514 23:04:28.422194 <14>[ 30.659304] [IGT] kms_vblank: executing
13515 23:04:28.425734 IGT-Version: 1.2<14>[ 30.664031] [IGT] kms_vblank: exiting, ret=77
13516 23:04:28.431994 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13517 23:04:28.438437 Opened dev<8>[ 30.674006] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>
13518 23:04:28.438695 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13520 23:04:28.442053 ice: /dev/dri/card0
13521 23:04:28.445166 No KMS driver or no outputs, pipes: 8, outputs: 0
13522 23:04:28.452022 [1mSubtest pipe-F-wait-forked: SKIP (0.000s)[0m
13523 23:04:28.455542 <14>[ 30.694997] [IGT] kms_vblank: executing
13524 23:04:28.462228 IGT-Version: 1.2<14>[ 30.699677] [IGT] kms_vblank: exiting, ret=77
13525 23:04:28.468848 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13526 23:04:28.474611 Opened dev<8>[ 30.710017] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>
13527 23:04:28.474871 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13529 23:04:28.478421 ice: /dev/dri/card0
13530 23:04:28.481230 No KMS driver or no outputs, pipes: 8, outputs: 0
13531 23:04:28.487855 [1mSubtest pipe-F-wait-forked-hang: SKIP (0.000s)[0m
13532 23:04:28.491590 <14>[ 30.731223] [IGT] kms_vblank: executing
13533 23:04:28.497810 IGT-Version: 1.2<14>[ 30.735947] [IGT] kms_vblank: exiting, ret=77
13534 23:04:28.504768 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13535 23:04:28.510870 Opened dev<8>[ 30.746118] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>
13536 23:04:28.511127 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13538 23:04:28.514583 ice: /dev/dri/card0
13539 23:04:28.518015 No KMS driver or no outputs, pipes: 8, outputs: 0
13540 23:04:28.520680 [1mSubtest pipe-F-wait-busy: SKIP (0.000s)[0m
13541 23:04:28.528618 <14>[ 30.766609] [IGT] kms_vblank: executing
13542 23:04:28.535487 IGT-Version: 1.2<14>[ 30.771532] [IGT] kms_vblank: exiting, ret=77
13543 23:04:28.538604 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13544 23:04:28.548670 Opened dev<8>[ 30.781644] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>
13545 23:04:28.548759 ice: /dev/dri/card0
13546 23:04:28.549018 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13548 23:04:28.555032 No KMS driver or no outputs, pipes: 8, outputs: 0
13549 23:04:28.558827 [1mSubtest pipe-F-wait-busy-hang: SKIP (0.000s)[0m
13550 23:04:28.565381 <14>[ 30.802607] [IGT] kms_vblank: executing
13551 23:04:28.571674 IGT-Version: 1.2<14>[ 30.807370] [IGT] kms_vblank: exiting, ret=77
13552 23:04:28.574663 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13553 23:04:28.584887 Opened dev<8>[ 30.817494] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>
13554 23:04:28.584970 ice: /dev/dri/card0
13555 23:04:28.585205 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13557 23:04:28.591435 No KMS driver or no outputs, pipes: 8, outputs: 0
13558 23:04:28.594881 [1mSubtest pipe-F-wait-forked-busy: SKIP (0.000s)[0m
13559 23:04:28.601116 <14>[ 30.838884] [IGT] kms_vblank: executing
13560 23:04:28.607525 IGT-Version: 1.2<14>[ 30.843794] [IGT] kms_vblank: exiting, ret=77
13561 23:04:28.611056 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13562 23:04:28.620746 Opened dev<8>[ 30.853912] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>
13563 23:04:28.621005 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13565 23:04:28.624016 ice: /dev/dri/card0
13566 23:04:28.631345 No KMS driver or no outputs, pipes: 8, outputs: 0
13567 23:04:28.631431 [1mSubtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)[0m
13568 23:04:28.638198 <14>[ 30.875584] [IGT] kms_vblank: executing
13569 23:04:28.644436 IGT-Version: 1.2<14>[ 30.880355] [IGT] kms_vblank: exiting, ret=77
13570 23:04:28.648033 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13571 23:04:28.657691 Opened dev<8>[ 30.890952] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>
13572 23:04:28.657777 ice: /dev/dri/card0
13573 23:04:28.658016 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13575 23:04:28.663929 No KMS driver or no outputs, pipes: 8, outputs: 0
13576 23:04:28.667558 [1mSubtest pipe-F-ts-continuation-idle: SKIP (0.000s)[0m
13577 23:04:28.674753 <14>[ 30.912083] [IGT] kms_vblank: executing
13578 23:04:28.681149 IGT-Version: 1.2<14>[ 30.916797] [IGT] kms_vblank: exiting, ret=77
13579 23:04:28.684212 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13580 23:04:28.694401 Opened dev<8>[ 30.927147] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>
13581 23:04:28.694659 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13583 23:04:28.697737 ice: /dev/dri/card0
13584 23:04:28.700561 No KMS driver or no outputs, pipes: 8, outputs: 0
13585 23:04:28.707594 [1mSubtest pipe-F-ts-continuation-idle-hang: SKIP (0.000s)[0m
13586 23:04:28.710330 <14>[ 30.948696] [IGT] kms_vblank: executing
13587 23:04:28.717103 IGT-Version: 1.2<14>[ 30.953514] [IGT] kms_vblank: exiting, ret=77
13588 23:04:28.720178 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13589 23:04:28.730093 Opened dev<8>[ 30.963596] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>
13590 23:04:28.730359 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13592 23:04:28.733690 ice: /dev/dri/card0
13593 23:04:28.737189 No KMS driver or no outputs, pipes: 8, outputs: 0
13594 23:04:28.743578 [1mSubtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13595 23:04:28.747428 <14>[ 30.985470] [IGT] kms_vblank: executing
13596 23:04:28.753956 IGT-Version: 1.2<14>[ 30.990247] [IGT] kms_vblank: exiting, ret=77
13597 23:04:28.756820 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13598 23:04:28.768105 Opened dev<8>[ 31.000438] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>
13599 23:04:28.768396 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13601 23:04:28.769844 ice: /dev/dri/card0
13602 23:04:28.773528 No KMS driver or no outputs, pipes: 8, outputs: 0
13603 23:04:28.779852 [1mSubtest pipe-F-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13604 23:04:28.783797 <14>[ 31.022429] [IGT] kms_vblank: executing
13605 23:04:28.790020 IGT-Version: 1.2<14>[ 31.027527] [IGT] kms_vblank: exiting, ret=77
13606 23:04:28.796017 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13607 23:04:28.803058 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13609 23:04:28.806102 Opened dev<8>[ 31.037654] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>
13610 23:04:28.806188 ice: /dev/dri/card0
13611 23:04:28.809287 No KMS driver or no outputs, pipes: 8, outputs: 0
13612 23:04:28.815892 [1mSubtest pipe-F-ts-continuation-suspend: SKIP (0.000s)[0m
13613 23:04:28.819118 <14>[ 31.059465] [IGT] kms_vblank: executing
13614 23:04:28.825873 IGT-Version: 1.2<14>[ 31.064193] [IGT] kms_vblank: exiting, ret=77
13615 23:04:28.832700 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13616 23:04:28.842252 Opened dev<8>[ 31.074312] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>
13617 23:04:28.842369 ice: /dev/dri/card0
13618 23:04:28.842615 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13620 23:04:28.848778 No KMS driver or no outputs, pipes: 8, outputs: 0
13621 23:04:28.852278 [1mSubtest pipe-F-ts-continuation-modeset: SKIP (0.000s)[0m
13622 23:04:28.858691 <14>[ 31.096084] [IGT] kms_vblank: executing
13623 23:04:28.862372 IGT-Version: 1.2<14>[ 31.100872] [IGT] kms_vblank: exiting, ret=77
13624 23:04:28.868703 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13625 23:04:28.878551 Opened dev<8>[ 31.111229] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>
13626 23:04:28.878655 ice: /dev/dri/card0
13627 23:04:28.878900 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13629 23:04:28.885304 No KMS driver or no outputs, pipes: 8, outputs: 0
13630 23:04:28.891763 [1mSubtest pipe-F-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13631 23:04:28.895382 <14>[ 31.132900] [IGT] kms_vblank: executing
13632 23:04:28.901702 IGT-Version: 1.2<14>[ 31.138213] [IGT] kms_vblank: exiting, ret=77
13633 23:04:28.905187 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13634 23:04:28.915170 Opened dev<8>[ 31.148340] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>
13635 23:04:28.915451 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13637 23:04:28.918117 ice: /dev/dri/card0
13638 23:04:28.921737 No KMS driver or no outputs, pipes: 8, outputs: 0
13639 23:04:28.928551 [1mSubtest pipe-F-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13640 23:04:28.931632 <14>[ 31.170276] [IGT] kms_vblank: executing
13641 23:04:28.938523 IGT-Version: 1.2<14>[ 31.175261] [IGT] kms_vblank: exiting, ret=77
13642 23:04:28.941662 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13643 23:04:28.951836 Opened dev<8>[ 31.185554] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>
13644 23:04:28.952119 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13646 23:04:28.954629 ice: /dev/dri/card0
13647 23:04:28.958003 No KMS driver or no outputs, pipes: 8, outputs: 0
13648 23:04:28.961568 [1mSubtest pipe-G-accuracy-idle: SKIP (0.000s)[0m
13649 23:04:28.969337 <14>[ 31.206709] [IGT] kms_vblank: executing
13650 23:04:28.975489 IGT-Version: 1.2<14>[ 31.211430] [IGT] kms_vblank: exiting, ret=77
13651 23:04:28.978784 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13652 23:04:28.989475 Opened dev<8>[ 31.221772] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>
13653 23:04:28.989597 ice: /dev/dri/card0
13654 23:04:28.989854 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13656 23:04:28.995237 No KMS driver or no outputs, pipes: 8, outputs: 0
13657 23:04:28.998351 [1mSubtest pipe-G-query-idle: SKIP (0.000s)[0m
13658 23:04:29.004917 <14>[ 31.242199] [IGT] kms_vblank: executing
13659 23:04:29.008536 IGT-Version: 1.2<14>[ 31.247090] [IGT] kms_vblank: exiting, ret=77
13660 23:04:29.015378 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13661 23:04:29.021398 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13663 23:04:29.024529 Opened dev<8>[ 31.257170] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>
13664 23:04:29.024612 ice: /dev/dri/card0
13665 23:04:29.027783 No KMS driver or no outputs, pipes: 8, outputs: 0
13666 23:04:29.034570 [1mSubtest pipe-G-query-idle-hang: SKIP (0.000s)[0m
13667 23:04:29.041211 <14>[ 31.278403] [IGT] kms_vblank: executing
13668 23:04:29.044669 IGT-Version: 1.2<14>[ 31.283296] [IGT] kms_vblank: exiting, ret=77
13669 23:04:29.050758 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13670 23:04:29.057400 Opened dev<8>[ 31.293413] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>
13671 23:04:29.057683 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13673 23:04:29.061195 ice: /dev/dri/card0
13674 23:04:29.064713 No KMS driver or no outputs, pipes: 8, outputs: 0
13675 23:04:29.071042 [1mSubtest pipe-G-query-forked: SKIP (0.000s)[0m
13676 23:04:29.074277 <14>[ 31.313936] [IGT] kms_vblank: executing
13677 23:04:29.080456 IGT-Version: 1.2<14>[ 31.318772] [IGT] kms_vblank: exiting, ret=77
13678 23:04:29.087345 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13679 23:04:29.094430 Opened dev<8>[ 31.329159] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>
13680 23:04:29.094694 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13682 23:04:29.097818 ice: /dev/dri/card0
13683 23:04:29.100741 No KMS driver or no outputs, pipes: 8, outputs: 0
13684 23:04:29.107213 [1mSubtest pipe-G-query-forked-hang: SKIP (0.000s)[0m
13685 23:04:29.111310 <14>[ 31.350171] [IGT] kms_vblank: executing
13686 23:04:29.117137 IGT-Version: 1.2<14>[ 31.355073] [IGT] kms_vblank: exiting, ret=77
13687 23:04:29.124033 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13688 23:04:29.130245 Opened dev<8>[ 31.365159] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>
13689 23:04:29.130516 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13691 23:04:29.133443 ice: /dev/dri/card0
13692 23:04:29.136855 No KMS driver or no outputs, pipes: 8, outputs: 0
13693 23:04:29.140686 [1mSubtest pipe-G-query-busy: SKIP (0.000s)[0m
13694 23:04:29.148154 <14>[ 31.385875] [IGT] kms_vblank: executing
13695 23:04:29.154984 IGT-Version: 1.2<14>[ 31.390650] [IGT] kms_vblank: exiting, ret=77
13696 23:04:29.157717 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13697 23:04:29.167764 Opened dev<8>[ 31.401127] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>
13698 23:04:29.167876 ice: /dev/dri/card0
13699 23:04:29.168118 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13701 23:04:29.174557 No KMS driver or no outputs, pipes: 8, outputs: 0
13702 23:04:29.177431 [1mSubtest pipe-G-query-busy-hang: SKIP (0.000s)[0m
13703 23:04:29.194668 <14>[ 31.432508] [IGT] kms_vblank: executing
13704 23:04:29.201023 IGT-Version: 1.2<14>[ 31.437634] [IGT] kms_vblank: exiting, ret=77
13705 23:04:29.204677 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13706 23:04:29.214168 Opened device: /dev/dri/ca<8>[ 31.448940] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>
13707 23:04:29.214289 rd0
13708 23:04:29.214535 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13710 23:04:29.220802 No KMS driver or no outputs, pipes: 8, outputs: 0
13711 23:04:29.224010 [1mSubtest pipe-G-query-forked-busy: SKIP (0.000s)[0m
13712 23:04:29.232759 <14>[ 31.470784] [IGT] kms_vblank: executing
13713 23:04:29.239527 IGT-Version: 1.2<14>[ 31.475503] [IGT] kms_vblank: exiting, ret=77
13714 23:04:29.242840 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13715 23:04:29.252476 Opened dev<8>[ 31.485812] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>
13716 23:04:29.252614 ice: /dev/dri/card0
13717 23:04:29.252858 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13719 23:04:29.259096 No KMS driver or no outputs, pipes: 8, outputs: 0
13720 23:04:29.262550 [1mSubtest pipe-G-query-forked-busy-hang: SKIP (0.000s)[0m
13721 23:04:29.269227 <14>[ 31.507124] [IGT] kms_vblank: executing
13722 23:04:29.276016 IGT-Version: 1.2<14>[ 31.511793] [IGT] kms_vblank: exiting, ret=77
13723 23:04:29.279663 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13724 23:04:29.286259 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13726 23:04:29.289018 Opened dev<8>[ 31.522240] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>
13727 23:04:29.289103 ice: /dev/dri/card0
13728 23:04:29.292270 No KMS driver or no outputs, pipes: 8, outputs: 0
13729 23:04:29.298942 [1mSubtest pipe-G-wait-idle: SKIP (0.000s)[0m
13730 23:04:29.305400 <14>[ 31.542925] [IGT] kms_vblank: executing
13731 23:04:29.308791 IGT-Version: 1.2<14>[ 31.547692] [IGT] kms_vblank: exiting, ret=77
13732 23:04:29.315570 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13733 23:04:29.322309 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13735 23:04:29.325684 Opened dev<8>[ 31.557996] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>
13736 23:04:29.325771 ice: /dev/dri/card0
13737 23:04:29.329808 No KMS driver or no outputs, pipes: 8, outputs: 0
13738 23:04:29.335380 [1mSubtest pipe-G-wait-idle-hang: SKIP (0.000s)[0m
13739 23:04:29.338457 <14>[ 31.578682] [IGT] kms_vblank: executing
13740 23:04:29.345853 IGT-Version: 1.2<14>[ 31.583568] [IGT] kms_vblank: exiting, ret=77
13741 23:04:29.351888 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13742 23:04:29.358418 Opened dev<8>[ 31.593927] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>
13743 23:04:29.358740 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13745 23:04:29.361974 ice: /dev/dri/card0
13746 23:04:29.365634 No KMS driver or no outputs, pipes: 8, outputs: 0
13747 23:04:29.371289 [1mSubtest pipe-G-wait-forked: SKIP (0.000s)[0m
13748 23:04:29.374746 <14>[ 31.614592] [IGT] kms_vblank: executing
13749 23:04:29.381739 IGT-Version: 1.2<14>[ 31.619365] [IGT] kms_vblank: exiting, ret=77
13750 23:04:29.388415 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13751 23:04:29.394966 Opened dev<8>[ 31.629559] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>
13752 23:04:29.395261 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13754 23:04:29.397861 ice: /dev/dri/card0
13755 23:04:29.401188 No KMS driver or no outputs, pipes: 8, outputs: 0
13756 23:04:29.407794 [1mSubtest pipe-G-wait-forked-hang: SKIP (0.000s)[0m
13757 23:04:29.410951 <14>[ 31.650521] [IGT] kms_vblank: executing
13758 23:04:29.418576 IGT-Version: 1.2<14>[ 31.655344] [IGT] kms_vblank: exiting, ret=77
13759 23:04:29.424565 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13760 23:04:29.430993 Opened dev<8>[ 31.665647] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>
13761 23:04:29.431274 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13763 23:04:29.434334 ice: /dev/dri/card0
13764 23:04:29.437376 No KMS driver or no outputs, pipes: 8, outputs: 0
13765 23:04:29.440547 [1mSubtest pipe-G-wait-busy: SKIP (0.000s)[0m
13766 23:04:29.459273 <14>[ 31.697133] [IGT] kms_vblank: executing
13767 23:04:29.465841 IGT-Version: 1.2<14>[ 31.702127] [IGT] kms_vblank: exiting, ret=77
13768 23:04:29.469567 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13769 23:04:29.478994 Opened device: /dev/dri/ca<8>[ 31.713602] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>
13770 23:04:29.479109 rd0
13771 23:04:29.479353 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13773 23:04:29.486055 No KMS driver or no outputs, pipes: 8, outputs: 0
13774 23:04:29.488899 [1mSubtest pipe-G-wait-busy-hang: SKIP (0.000s)[0m
13775 23:04:29.496550 <14>[ 31.734590] [IGT] kms_vblank: executing
13776 23:04:29.503299 IGT-Version: 1.2<14>[ 31.739389] [IGT] kms_vblank: exiting, ret=77
13777 23:04:29.506819 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13778 23:04:29.516383 Opened dev<8>[ 31.749606] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>
13779 23:04:29.516513 ice: /dev/dri/card0
13780 23:04:29.516760 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13782 23:04:29.522890 No KMS driver or no outputs, pipes: 8, outputs: 0
13783 23:04:29.526093 [1mSubtest pipe-G-wait-forked-busy: SKIP (0.000s)[0m
13784 23:04:29.533315 <14>[ 31.770504] [IGT] kms_vblank: executing
13785 23:04:29.539629 IGT-Version: 1.2<14>[ 31.775380] [IGT] kms_vblank: exiting, ret=77
13786 23:04:29.542861 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13787 23:04:29.553066 Opened dev<8>[ 31.785557] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>
13788 23:04:29.553164 ice: /dev/dri/card0
13789 23:04:29.553405 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13791 23:04:29.559041 No KMS driver or no outputs, pipes: 8, outputs: 0
13792 23:04:29.562356 [1mSubtest pipe-G-wait-forked-busy-hang: SKIP (0.000s)[0m
13793 23:04:29.572720 <14>[ 31.810440] [IGT] kms_vblank: executing
13794 23:04:29.578863 IGT-Version: 1.2<14>[ 31.815526] [IGT] kms_vblank: exiting, ret=77
13795 23:04:29.582412 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13796 23:04:29.592250 Opened dev<8>[ 31.825773] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>
13797 23:04:29.592544 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13799 23:04:29.595658 ice: /dev/dri/card0
13800 23:04:29.599328 No KMS driver or no outputs, pipes: 8, outputs: 0
13801 23:04:29.602260 [1mSubtest pipe-G-ts-continuation-idle: SKIP (0.000s)[0m
13802 23:04:29.609223 <14>[ 31.847282] [IGT] kms_vblank: executing
13803 23:04:29.615862 IGT-Version: 1.2<14>[ 31.852113] [IGT] kms_vblank: exiting, ret=77
13804 23:04:29.619325 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13805 23:04:29.629245 Opened dev<8>[ 31.862277] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>
13806 23:04:29.629563 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13808 23:04:29.632466 ice: /dev/dri/card0
13809 23:04:29.635875 No KMS driver or no outputs, pipes: 8, outputs: 0
13810 23:04:29.642587 [1mSubtest pipe-G-ts-continuation-idle-hang: SKIP (0.000s)[0m
13811 23:04:29.645846 <14>[ 31.884712] [IGT] kms_vblank: executing
13812 23:04:29.652215 IGT-Version: 1.2<14>[ 31.889545] [IGT] kms_vblank: exiting, ret=77
13813 23:04:29.655838 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13814 23:04:29.665631 Opened dev<8>[ 31.899585] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>
13815 23:04:29.665956 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13817 23:04:29.668771 ice: /dev/dri/card0
13818 23:04:29.671992 No KMS driver or no outputs, pipes: 8, outputs: 0
13819 23:04:29.678447 [1mSubtest pipe-G-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13820 23:04:29.682109 <14>[ 31.921219] [IGT] kms_vblank: executing
13821 23:04:29.688959 IGT-Version: 1.2<14>[ 31.926120] [IGT] kms_vblank: exiting, ret=77
13822 23:04:29.695310 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13823 23:04:29.701935 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13825 23:04:29.705398 Opened dev<8>[ 31.936372] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>
13826 23:04:29.705529 ice: /dev/dri/card0
13827 23:04:29.708852 No KMS driver or no outputs, pipes: 8, outputs: 0
13828 23:04:29.714874 [1mSubtest pipe-G-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13829 23:04:29.718019 <14>[ 31.958321] [IGT] kms_vblank: executing
13830 23:04:29.725441 IGT-Version: 1.2<14>[ 31.963382] [IGT] kms_vblank: exiting, ret=77
13831 23:04:29.731572 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13832 23:04:29.741543 Opened dev<8>[ 31.973495] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>
13833 23:04:29.741631 ice: /dev/dri/card0
13834 23:04:29.741871 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13836 23:04:29.748575 No KMS driver or no outputs, pipes: 8, outputs: 0
13837 23:04:29.751113 [1mSubtest pipe-G-ts-continuation-suspend: SKIP (0.000s)[0m
13838 23:04:29.757867 <14>[ 31.995136] [IGT] kms_vblank: executing
13839 23:04:29.761899 IGT-Version: 1.2<14>[ 31.999842] [IGT] kms_vblank: exiting, ret=77
13840 23:04:29.767895 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13841 23:04:29.777774 Opened dev<8>[ 32.010168] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>
13842 23:04:29.777874 ice: /dev/dri/card0
13843 23:04:29.778116 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13845 23:04:29.784171 No KMS driver or no outputs, pipes: 8, outputs: 0
13846 23:04:29.787999 [1mSubtest pipe-G-ts-continuation-modeset: SKIP (0.000s)[0m
13847 23:04:29.794247 <14>[ 32.031877] [IGT] kms_vblank: executing
13848 23:04:29.800878 IGT-Version: 1.2<14>[ 32.036627] [IGT] kms_vblank: exiting, ret=77
13849 23:04:29.804300 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13850 23:04:29.813982 Opened dev<8>[ 32.046840] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>
13851 23:04:29.814256 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13853 23:04:29.817046 ice: /dev/dri/card0
13854 23:04:29.820532 No KMS driver or no outputs, pipes: 8, outputs: 0
13855 23:04:29.827160 [1mSubtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13856 23:04:29.830750 <14>[ 32.068921] [IGT] kms_vblank: executing
13857 23:04:29.836994 IGT-Version: 1.2<14>[ 32.074007] [IGT] kms_vblank: exiting, ret=77
13858 23:04:29.840312 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13859 23:04:29.850055 Opened dev<8>[ 32.084184] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>
13860 23:04:29.850352 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13862 23:04:29.853733 ice: /dev/dri/card0
13863 23:04:29.856945 No KMS driver or no outputs, pipes: 8, outputs: 0
13864 23:04:29.863332 [1mSubtest pipe-G-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13865 23:04:29.866774 <14>[ 32.105798] [IGT] kms_vblank: executing
13866 23:04:29.873527 IGT-Version: 1.2<14>[ 32.111249] [IGT] kms_vblank: exiting, ret=77
13867 23:04:29.879915 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13868 23:04:29.886711 Opened dev<8>[ 32.121354] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>
13869 23:04:29.887003 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13871 23:04:29.890050 ice: /dev/dri/card0
13872 23:04:29.893170 No KMS driver or no outputs, pipes: 8, outputs: 0
13873 23:04:29.896679 [1mSubtest pipe-H-accuracy-idle: SKIP (0.000s)[0m
13874 23:04:29.905025 <14>[ 32.142564] [IGT] kms_vblank: executing
13875 23:04:29.911121 IGT-Version: 1.2<14>[ 32.147435] [IGT] kms_vblank: exiting, ret=77
13876 23:04:29.914595 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13877 23:04:29.924894 Opened dev<8>[ 32.157608] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>
13878 23:04:29.925036 ice: /dev/dri/card0
13879 23:04:29.925285 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13881 23:04:29.931292 No KMS driver or no outputs, pipes: 8, outputs: 0
13882 23:04:29.934509 [1mSubtest pipe-H-query-idle: SKIP (0.000s)[0m
13883 23:04:29.937846 <14>[ 32.178046] [IGT] kms_vblank: executing
13884 23:04:29.944612 IGT-Version: 1.2<14>[ 32.182872] [IGT] kms_vblank: exiting, ret=77
13885 23:04:29.951200 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13886 23:04:29.957371 Opened dev<8>[ 32.193030] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>
13887 23:04:29.957706 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13889 23:04:29.960624 ice: /dev/dri/card0
13890 23:04:29.963903 No KMS driver or no outputs, pipes: 8, outputs: 0
13891 23:04:29.971392 [1mSubtest pipe-H-query-idle-hang: SKIP (0.000s)[0m
13892 23:04:29.977067 <14>[ 32.214720] [IGT] kms_vblank: executing
13893 23:04:29.980802 IGT-Version: 1.2<14>[ 32.219534] [IGT] kms_vblank: exiting, ret=77
13894 23:04:29.987625 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13895 23:04:29.993678 Opened dev<8>[ 32.230061] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>
13896 23:04:29.993972 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13898 23:04:29.997332 ice: /dev/dri/card0
13899 23:04:30.000676 No KMS driver or no outputs, pipes: 8, outputs: 0
13900 23:04:30.007136 [1mSubtest pipe-H-query-forked: SKIP (0.000s)[0m
13901 23:04:30.010355 <14>[ 32.250375] [IGT] kms_vblank: executing
13902 23:04:30.016849 IGT-Version: 1.2<14>[ 32.255285] [IGT] kms_vblank: exiting, ret=77
13903 23:04:30.023432 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13904 23:04:30.029940 Opened dev<8>[ 32.265439] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>
13905 23:04:30.030201 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13907 23:04:30.033279 ice: /dev/dri/card0
13908 23:04:30.037533 No KMS driver or no outputs, pipes: 8, outputs: 0
13909 23:04:30.043652 [1mSubtest pipe-H-query-forked-hang: SKIP (0.000s)[0m
13910 23:04:30.046768 <14>[ 32.286580] [IGT] kms_vblank: executing
13911 23:04:30.053585 IGT-Version: 1.2<14>[ 32.291322] [IGT] kms_vblank: exiting, ret=77
13912 23:04:30.059951 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13913 23:04:30.066487 Opened dev<8>[ 32.301498] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>
13914 23:04:30.066748 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13916 23:04:30.069598 ice: /dev/dri/card0
13917 23:04:30.072952 No KMS driver or no outputs, pipes: 8, outputs: 0
13918 23:04:30.076341 [1mSubtest pipe-H-query-busy: SKIP (0.000s)[0m
13919 23:04:30.084321 <14>[ 32.322309] [IGT] kms_vblank: executing
13920 23:04:30.090853 IGT-Version: 1.2<14>[ 32.327205] [IGT] kms_vblank: exiting, ret=77
13921 23:04:30.094123 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13922 23:04:30.104395 Opened dev<8>[ 32.337278] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>
13923 23:04:30.104537 ice: /dev/dri/card0
13924 23:04:30.104781 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13926 23:04:30.110513 No KMS driver or no outputs, pipes: 8, outputs: 0
13927 23:04:30.113964 [1mSubtest pipe-H-query-busy-hang: SKIP (0.000s)[0m
13928 23:04:30.120759 <14>[ 32.358046] [IGT] kms_vblank: executing
13929 23:04:30.127628 IGT-Version: 1.2<14>[ 32.362822] [IGT] kms_vblank: exiting, ret=77
13930 23:04:30.130170 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13931 23:04:30.140316 Opened dev<8>[ 32.373349] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>
13932 23:04:30.140457 ice: /dev/dri/card0
13933 23:04:30.140705 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13935 23:04:30.146599 No KMS driver or no outputs, pipes: 8, outputs: 0
13936 23:04:30.150210 [1mSubtest pipe-H-query-forked-busy: SKIP (0.000s)[0m
13937 23:04:30.156854 <14>[ 32.394670] [IGT] kms_vblank: executing
13938 23:04:30.163385 IGT-Version: 1.2<14>[ 32.399417] [IGT] kms_vblank: exiting, ret=77
13939 23:04:30.166758 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13940 23:04:30.176735 Opened dev<8>[ 32.409706] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>
13941 23:04:30.176819 ice: /dev/dri/card0
13942 23:04:30.177060 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13944 23:04:30.183207 No KMS driver or no outputs, pipes: 8, outputs: 0
13945 23:04:30.186224 [1mSubtest pipe-H-query-forked-busy-hang: SKIP (0.000s)[0m
13946 23:04:30.193118 <14>[ 32.431097] [IGT] kms_vblank: executing
13947 23:04:30.199772 IGT-Version: 1.2<14>[ 32.435796] [IGT] kms_vblank: exiting, ret=77
13948 23:04:30.203422 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13949 23:04:30.212809 Opened dev<8>[ 32.446045] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>
13950 23:04:30.212898 ice: /dev/dri/card0
13951 23:04:30.213137 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13953 23:04:30.216394 No KMS driver or no outputs, pipes: 8, outputs: 0
13954 23:04:30.223119 [1mSubtest pipe-H-wait-idle: SKIP (0.000s)[0m
13955 23:04:30.229342 <14>[ 32.466909] [IGT] kms_vblank: executing
13956 23:04:30.236042 IGT-Version: 1.2<14>[ 32.471643] [IGT] kms_vblank: exiting, ret=77
13957 23:04:30.239348 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13958 23:04:30.249570 Opened dev<8>[ 32.481829] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>
13959 23:04:30.249725 ice: /dev/dri/card0
13960 23:04:30.249973 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13962 23:04:30.252376 No KMS driver or no outputs, pipes: 8, outputs: 0
13963 23:04:30.259384 [1mSubtest pipe-H-wait-idle-hang: SKIP (0.000s)[0m
13964 23:04:30.262117 <14>[ 32.502731] [IGT] kms_vblank: executing
13965 23:04:30.268877 IGT-Version: 1.2<14>[ 32.507508] [IGT] kms_vblank: exiting, ret=77
13966 23:04:30.276376 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13967 23:04:30.282590 Opened dev<8>[ 32.517663] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>
13968 23:04:30.282936 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13970 23:04:30.286447 ice: /dev/dri/card0
13971 23:04:30.289010 No KMS driver or no outputs, pipes: 8, outputs: 0
13972 23:04:30.295452 [1mSubtest pipe-H-wait-forked: SKIP (0.000s)[0m
13973 23:04:30.298878 <14>[ 32.538689] [IGT] kms_vblank: executing
13974 23:04:30.305639 IGT-Version: 1.2<14>[ 32.543412] [IGT] kms_vblank: exiting, ret=77
13975 23:04:30.312525 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13976 23:04:30.318408 Opened dev<8>[ 32.553694] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>
13977 23:04:30.318783 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13979 23:04:30.322340 ice: /dev/dri/card0
13980 23:04:30.325307 No KMS driver or no outputs, pipes: 8, outputs: 0
13981 23:04:30.331712 [1mSubtest pipe-H-wait-forked-hang: SKIP (0.000s)[0m
13982 23:04:30.335130 <14>[ 32.574913] [IGT] kms_vblank: executing
13983 23:04:30.341986 IGT-Version: 1.2<14>[ 32.579645] [IGT] kms_vblank: exiting, ret=77
13984 23:04:30.349095 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13985 23:04:30.355431 Opened dev<8>[ 32.589843] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>
13986 23:04:30.356152 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13988 23:04:30.358635 ice: /dev/dri/card0
13989 23:04:30.361824 No KMS driver or no outputs, pipes: 8, outputs: 0
13990 23:04:30.364933 [1mSubtest pipe-H-wait-busy: SKIP (0.000s)[0m
13991 23:04:30.372618 <14>[ 32.610377] [IGT] kms_vblank: executing
13992 23:04:30.379511 IGT-Version: 1.2<14>[ 32.615250] [IGT] kms_vblank: exiting, ret=77
13993 23:04:30.382685 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
13994 23:04:30.392849 Opened dev<8>[ 32.625487] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>
13995 23:04:30.393327 ice: /dev/dri/card0
13996 23:04:30.393953 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13998 23:04:30.399487 No KMS driver or no outputs, pipes: 8, outputs: 0
13999 23:04:30.402285 [1mSubtest pipe-H-wait-busy-hang: SKIP (0.000s)[0m
14000 23:04:30.409501 <14>[ 32.646867] [IGT] kms_vblank: executing
14001 23:04:30.416350 IGT-Version: 1.2<14>[ 32.651630] [IGT] kms_vblank: exiting, ret=77
14002 23:04:30.419119 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14003 23:04:30.429151 Opened dev<8>[ 32.661970] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>
14004 23:04:30.429648 ice: /dev/dri/card0
14005 23:04:30.430194 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
14007 23:04:30.436131 No KMS driver or no outputs, pipes: 8, outputs: 0
14008 23:04:30.438716 [1mSubtest pipe-H-wait-forked-busy: SKIP (0.000s)[0m
14009 23:04:30.445650 <14>[ 32.682889] [IGT] kms_vblank: executing
14010 23:04:30.452190 IGT-Version: 1.2<14>[ 32.687636] [IGT] kms_vblank: exiting, ret=77
14011 23:04:30.455212 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14012 23:04:30.465064 Opened dev<8>[ 32.697875] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>
14013 23:04:30.465471 ice: /dev/dri/card0
14014 23:04:30.466018 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
14016 23:04:30.471837 No KMS driver or no outputs, pipes: 8, outputs: 0
14017 23:04:30.475004 [1mSubtest pipe-H-wait-forked-busy-hang: SKIP (0.000s)[0m
14018 23:04:30.481696 <14>[ 32.719452] [IGT] kms_vblank: executing
14019 23:04:30.488622 IGT-Version: 1.2<14>[ 32.724240] [IGT] kms_vblank: exiting, ret=77
14020 23:04:30.491582 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14021 23:04:30.501469 Opened dev<8>[ 32.734588] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>
14022 23:04:30.501916 ice: /dev/dri/card0
14023 23:04:30.502444 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
14025 23:04:30.508313 No KMS driver or no outputs, pipes: 8, outputs: 0
14026 23:04:30.511609 [1mSubtest pipe-H-ts-continuation-idle: SKIP (0.000s)[0m
14027 23:04:30.517957 <14>[ 32.756001] [IGT] kms_vblank: executing
14028 23:04:30.524644 IGT-Version: 1.2<14>[ 32.760810] [IGT] kms_vblank: exiting, ret=77
14029 23:04:30.527973 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14030 23:04:30.538176 Opened dev<8>[ 32.771067] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>
14031 23:04:30.538782 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
14033 23:04:30.541595 ice: /dev/dri/card0
14034 23:04:30.544946 No KMS driver or no outputs, pipes: 8, outputs: 0
14035 23:04:30.550906 [1mSubtest pipe-H-ts-continuation-idle-hang: SKIP (0.000s)[0m
14036 23:04:30.554210 <14>[ 32.792819] [IGT] kms_vblank: executing
14037 23:04:30.560962 IGT-Version: 1.2<14>[ 32.797685] [IGT] kms_vblank: exiting, ret=77
14038 23:04:30.564493 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14039 23:04:30.574634 Opened dev<8>[ 32.807742] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>
14040 23:04:30.575338 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
14042 23:04:30.577363 ice: /dev/dri/card0
14043 23:04:30.580878 No KMS driver or no outputs, pipes: 8, outputs: 0
14044 23:04:30.587213 [1mSubtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
14045 23:04:30.590459 <14>[ 32.829037] [IGT] kms_vblank: executing
14046 23:04:30.598147 IGT-Version: 1.2<14>[ 32.834283] [IGT] kms_vblank: exiting, ret=77
14047 23:04:30.600518 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14048 23:04:30.610727 Opened dev<8>[ 32.844473] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>
14049 23:04:30.611449 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
14051 23:04:30.613840 ice: /dev/dri/card0
14052 23:04:30.617058 No KMS driver or no outputs, pipes: 8, outputs: 0
14053 23:04:30.623825 [1mSubtest pipe-H-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
14054 23:04:30.627770 <14>[ 32.866460] [IGT] kms_vblank: executing
14055 23:04:30.633486 IGT-Version: 1.2<14>[ 32.871558] [IGT] kms_vblank: exiting, ret=77
14056 23:04:30.640207 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14057 23:04:30.650068 Opened dev<8>[ 32.881793] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>
14058 23:04:30.650547 ice: /dev/dri/card0
14059 23:04:30.651247 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
14061 23:04:30.657243 No KMS driver or no outputs, pipes: 8, outputs: 0
14062 23:04:30.660065 [1mSubtest pipe-H-ts-continuation-suspend: SKIP (0.000s)[0m
14063 23:04:30.666565 <14>[ 32.903575] [IGT] kms_vblank: executing
14064 23:04:30.669768 IGT-Version: 1.2<14>[ 32.908329] [IGT] kms_vblank: exiting, ret=77
14065 23:04:30.676383 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14066 23:04:30.686447 Opened dev<8>[ 32.918482] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>
14067 23:04:30.686972 ice: /dev/dri/card0
14068 23:04:30.687577 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
14070 23:04:30.692944 No KMS driver or no outputs, pipes: 8, outputs: 0
14071 23:04:30.696182 [1mSubtest pipe-H-ts-continuation-modeset: SKIP (0.000s)[0m
14072 23:04:30.703687 <14>[ 32.940086] [IGT] kms_vblank: executing
14073 23:04:30.709896 IGT-Version: 1.2<14>[ 32.944851] [IGT] kms_vblank: exiting, ret=77
14074 23:04:30.713089 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14075 23:04:30.723140 Opened dev<8>[ 32.955374] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>
14076 23:04:30.723931 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
14078 23:04:30.725863 ice: /dev/dri/card0
14079 23:04:30.729933 No KMS driver or no outputs, pipes: 8, outputs: 0
14080 23:04:30.736425 [1mSubtest pipe-H-ts-continuation-modeset-hang: SKIP (0.000s)[0m
14081 23:04:30.739289 <14>[ 32.977006] [IGT] kms_vblank: executing
14082 23:04:30.745548 IGT-Version: 1.2<14>[ 32.982085] [IGT] kms_vblank: exiting, ret=77
14083 23:04:30.748804 7.1-g621c2d3 (aarch64) (Linux: 6.1.64-cip10 aarch64)
14084 23:04:30.758740 Opened dev<8>[ 32.992484] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>
14085 23:04:30.759511 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
14087 23:04:30.762582 ice: /dev/dri/card0
14088 23:04:30.765394 No KMS driv<8>[ 33.003665] <LAVA_SIGNAL_TESTSET STOP>
14089 23:04:30.766115 Received signal: <TESTSET> STOP
14090 23:04:30.766477 Closing test_set kms_vblank
14091 23:04:30.775268 er or no outputs<8>[ 33.010214] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 12154408_1.5.2.3.1>
14092 23:04:30.775797 , pipes: 8, outputs: 0
14093 23:04:30.776631 Received signal: <ENDRUN> 0_igt-kms-mediatek 12154408_1.5.2.3.1
14094 23:04:30.777369 Ending use of test pattern.
14095 23:04:30.777928 Ending test lava.0_igt-kms-mediatek (12154408_1.5.2.3.1), duration 12.38
14097 23:04:30.781710 [1mSubtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
14098 23:04:30.782242 + set +x
14099 23:04:30.784979 <LAVA_TEST_RUNNER EXIT>
14100 23:04:30.785805 ok: lava_test_shell seems to have completed
14101 23:04:30.810763 addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: skip
set: kms_atomic
atomic_plane_damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: skip
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: skip
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: skip
set: kms_vblank
crtc-invalid-params:
result: skip
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: skip
set: drm_read
empty-nonblock:
result: skip
set: drm_read
fault-buffer:
result: skip
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: skip
set: kms_vblank
invalid-buffer:
result: skip
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
pipe-A-accuracy-idle:
result: skip
set: kms_vblank
pipe-A-query-busy:
result: skip
set: kms_vblank
pipe-A-query-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked:
result: skip
set: kms_vblank
pipe-A-query-forked-busy:
result: skip
set: kms_vblank
pipe-A-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked-hang:
result: skip
set: kms_vblank
pipe-A-query-idle:
result: skip
set: kms_vblank
pipe-A-query-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-A-wait-busy:
result: skip
set: kms_vblank
pipe-A-wait-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked-hang:
result: skip
set: kms_vblank
pipe-A-wait-idle:
result: skip
set: kms_vblank
pipe-A-wait-idle-hang:
result: skip
set: kms_vblank
pipe-B-accuracy-idle:
result: skip
set: kms_vblank
pipe-B-query-busy:
result: skip
set: kms_vblank
pipe-B-query-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked:
result: skip
set: kms_vblank
pipe-B-query-forked-busy:
result: skip
set: kms_vblank
pipe-B-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked-hang:
result: skip
set: kms_vblank
pipe-B-query-idle:
result: skip
set: kms_vblank
pipe-B-query-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-B-wait-busy:
result: skip
set: kms_vblank
pipe-B-wait-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked-hang:
result: skip
set: kms_vblank
pipe-B-wait-idle:
result: skip
set: kms_vblank
pipe-B-wait-idle-hang:
result: skip
set: kms_vblank
pipe-C-accuracy-idle:
result: skip
set: kms_vblank
pipe-C-query-busy:
result: skip
set: kms_vblank
pipe-C-query-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked:
result: skip
set: kms_vblank
pipe-C-query-forked-busy:
result: skip
set: kms_vblank
pipe-C-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked-hang:
result: skip
set: kms_vblank
pipe-C-query-idle:
result: skip
set: kms_vblank
pipe-C-query-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-C-wait-busy:
result: skip
set: kms_vblank
pipe-C-wait-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked-hang:
result: skip
set: kms_vblank
pipe-C-wait-idle:
result: skip
set: kms_vblank
pipe-C-wait-idle-hang:
result: skip
set: kms_vblank
pipe-D-accuracy-idle:
result: skip
set: kms_vblank
pipe-D-query-busy:
result: skip
set: kms_vblank
pipe-D-query-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked:
result: skip
set: kms_vblank
pipe-D-query-forked-busy:
result: skip
set: kms_vblank
pipe-D-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked-hang:
result: skip
set: kms_vblank
pipe-D-query-idle:
result: skip
set: kms_vblank
pipe-D-query-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-D-wait-busy:
result: skip
set: kms_vblank
pipe-D-wait-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked-hang:
result: skip
set: kms_vblank
pipe-D-wait-idle:
result: skip
set: kms_vblank
pipe-D-wait-idle-hang:
result: skip
set: kms_vblank
pipe-E-accuracy-idle:
result: skip
set: kms_vblank
pipe-E-query-busy:
result: skip
set: kms_vblank
pipe-E-query-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked:
result: skip
set: kms_vblank
pipe-E-query-forked-busy:
result: skip
set: kms_vblank
pipe-E-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked-hang:
result: skip
set: kms_vblank
pipe-E-query-idle:
result: skip
set: kms_vblank
pipe-E-query-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-E-wait-busy:
result: skip
set: kms_vblank
pipe-E-wait-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked-hang:
result: skip
set: kms_vblank
pipe-E-wait-idle:
result: skip
set: kms_vblank
pipe-E-wait-idle-hang:
result: skip
set: kms_vblank
pipe-F-accuracy-idle:
result: skip
set: kms_vblank
pipe-F-query-busy:
result: skip
set: kms_vblank
pipe-F-query-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked:
result: skip
set: kms_vblank
pipe-F-query-forked-busy:
result: skip
set: kms_vblank
pipe-F-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked-hang:
result: skip
set: kms_vblank
pipe-F-query-idle:
result: skip
set: kms_vblank
pipe-F-query-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-F-wait-busy:
result: skip
set: kms_vblank
pipe-F-wait-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked-hang:
result: skip
set: kms_vblank
pipe-F-wait-idle:
result: skip
set: kms_vblank
pipe-F-wait-idle-hang:
result: skip
set: kms_vblank
pipe-G-accuracy-idle:
result: skip
set: kms_vblank
pipe-G-query-busy:
result: skip
set: kms_vblank
pipe-G-query-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked:
result: skip
set: kms_vblank
pipe-G-query-forked-busy:
result: skip
set: kms_vblank
pipe-G-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked-hang:
result: skip
set: kms_vblank
pipe-G-query-idle:
result: skip
set: kms_vblank
pipe-G-query-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-G-wait-busy:
result: skip
set: kms_vblank
pipe-G-wait-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked-hang:
result: skip
set: kms_vblank
pipe-G-wait-idle:
result: skip
set: kms_vblank
pipe-G-wait-idle-hang:
result: skip
set: kms_vblank
pipe-H-accuracy-idle:
result: skip
set: kms_vblank
pipe-H-query-busy:
result: skip
set: kms_vblank
pipe-H-query-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked:
result: skip
set: kms_vblank
pipe-H-query-forked-busy:
result: skip
set: kms_vblank
pipe-H-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked-hang:
result: skip
set: kms_vblank
pipe-H-query-idle:
result: skip
set: kms_vblank
pipe-H-query-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-H-wait-busy:
result: skip
set: kms_vblank
pipe-H-wait-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked-hang:
result: skip
set: kms_vblank
pipe-H-wait-idle:
result: skip
set: kms_vblank
pipe-H-wait-idle-hang:
result: skip
set: kms_vblank
plane-cursor-legacy:
result: skip
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: skip
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: skip
set: kms_atomic
plane-primary-legacy:
result: skip
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
short-buffer-block:
result: skip
set: drm_read
short-buffer-nonblock:
result: skip
set: drm_read
short-buffer-wakeup:
result: skip
set: drm_read
size-max:
result: skip
set: kms_addfb_basic
small-bo:
result: skip
set: kms_addfb_basic
test-only:
result: skip
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: skip
set: kms_addfb_basic
too-wide:
result: skip
set: kms_addfb_basic
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
14102 23:04:30.811635 end: 3.1 lava-test-shell (duration 00:00:13) [common]
14103 23:04:30.811902 end: 3 lava-test-retry (duration 00:00:13) [common]
14104 23:04:30.812161 start: 4 finalize (timeout 00:07:46) [common]
14105 23:04:30.812463 start: 4.1 power-off (timeout 00:00:30) [common]
14106 23:04:30.812971 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-9' '--port=1' '--command=off'
14107 23:04:30.896248 >> Command sent successfully.
14108 23:04:30.906405 Returned 0 in 0 seconds
14109 23:04:31.007275 end: 4.1 power-off (duration 00:00:00) [common]
14111 23:04:31.007786 start: 4.2 read-feedback (timeout 00:07:46) [common]
14112 23:04:31.008213 Listened to connection for namespace 'common' for up to 1s
14113 23:04:32.009198 Finalising connection for namespace 'common'
14114 23:04:32.009833 Disconnecting from shell: Finalise
14115 23:04:32.010164 / #
14116 23:04:32.110984 end: 4.2 read-feedback (duration 00:00:01) [common]
14117 23:04:32.111505 end: 4 finalize (duration 00:00:01) [common]
14118 23:04:32.111866 Cleaning after the job
14119 23:04:32.112178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/ramdisk
14120 23:04:32.135040 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/kernel
14121 23:04:32.153846 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/dtb
14122 23:04:32.154203 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12154408/tftp-deploy-1u7ryz3t/modules
14123 23:04:32.164424 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12154408
14124 23:04:32.284228 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12154408
14125 23:04:32.284416 Job finished correctly