Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 50
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 14:46:43.466277 lava-dispatcher, installed at version: 2024.03
2 14:46:43.466494 start: 0 validate
3 14:46:43.466636 Start time: 2024-06-04 14:46:43.466629+00:00 (UTC)
4 14:46:43.466763 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:46:43.466894 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:46:43.729093 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:46:43.730018 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 14:46:43.990752 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:46:43.990924 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 14:46:44.250003 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:46:44.250154 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:46:44.508802 Using caching service: 'http://localhost/cache/?uri=%s'
13 14:46:44.508984 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 14:46:44.768506 validate duration: 1.30
16 14:46:44.768813 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:46:44.768920 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:46:44.769007 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:46:44.769130 Not decompressing ramdisk as can be used compressed.
20 14:46:44.769214 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 14:46:44.769315 saving as /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/ramdisk/initrd.cpio.gz
22 14:46:44.769399 total size: 5628169 (5 MB)
23 14:46:44.770484 progress 0 % (0 MB)
24 14:46:44.772199 progress 5 % (0 MB)
25 14:46:44.773829 progress 10 % (0 MB)
26 14:46:44.775343 progress 15 % (0 MB)
27 14:46:44.776915 progress 20 % (1 MB)
28 14:46:44.778442 progress 25 % (1 MB)
29 14:46:44.780023 progress 30 % (1 MB)
30 14:46:44.781589 progress 35 % (1 MB)
31 14:46:44.782942 progress 40 % (2 MB)
32 14:46:44.784509 progress 45 % (2 MB)
33 14:46:44.785912 progress 50 % (2 MB)
34 14:46:44.787423 progress 55 % (2 MB)
35 14:46:44.788949 progress 60 % (3 MB)
36 14:46:44.790448 progress 65 % (3 MB)
37 14:46:44.792091 progress 70 % (3 MB)
38 14:46:44.793485 progress 75 % (4 MB)
39 14:46:44.795114 progress 80 % (4 MB)
40 14:46:44.796494 progress 85 % (4 MB)
41 14:46:44.798067 progress 90 % (4 MB)
42 14:46:44.799582 progress 95 % (5 MB)
43 14:46:44.800987 progress 100 % (5 MB)
44 14:46:44.801200 5 MB downloaded in 0.03 s (168.78 MB/s)
45 14:46:44.801401 end: 1.1.1 http-download (duration 00:00:00) [common]
47 14:46:44.801648 end: 1.1 download-retry (duration 00:00:00) [common]
48 14:46:44.801738 start: 1.2 download-retry (timeout 00:10:00) [common]
49 14:46:44.801821 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 14:46:44.801983 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 14:46:44.802071 saving as /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/kernel/Image
52 14:46:44.802134 total size: 54682112 (52 MB)
53 14:46:44.802197 No compression specified
54 14:46:44.803344 progress 0 % (0 MB)
55 14:46:44.817806 progress 5 % (2 MB)
56 14:46:44.831853 progress 10 % (5 MB)
57 14:46:44.846123 progress 15 % (7 MB)
58 14:46:44.860315 progress 20 % (10 MB)
59 14:46:44.874583 progress 25 % (13 MB)
60 14:46:44.888559 progress 30 % (15 MB)
61 14:46:44.902849 progress 35 % (18 MB)
62 14:46:44.916848 progress 40 % (20 MB)
63 14:46:44.931172 progress 45 % (23 MB)
64 14:46:44.946317 progress 50 % (26 MB)
65 14:46:44.960319 progress 55 % (28 MB)
66 14:46:44.974211 progress 60 % (31 MB)
67 14:46:44.988589 progress 65 % (33 MB)
68 14:46:45.002449 progress 70 % (36 MB)
69 14:46:45.016276 progress 75 % (39 MB)
70 14:46:45.031009 progress 80 % (41 MB)
71 14:46:45.046086 progress 85 % (44 MB)
72 14:46:45.059889 progress 90 % (46 MB)
73 14:46:45.073923 progress 95 % (49 MB)
74 14:46:45.087653 progress 100 % (52 MB)
75 14:46:45.087906 52 MB downloaded in 0.29 s (182.49 MB/s)
76 14:46:45.088061 end: 1.2.1 http-download (duration 00:00:00) [common]
78 14:46:45.088292 end: 1.2 download-retry (duration 00:00:00) [common]
79 14:46:45.088378 start: 1.3 download-retry (timeout 00:10:00) [common]
80 14:46:45.088464 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 14:46:45.088596 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 14:46:45.088672 saving as /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 14:46:45.088733 total size: 57695 (0 MB)
84 14:46:45.088794 No compression specified
85 14:46:45.089977 progress 56 % (0 MB)
86 14:46:45.090275 progress 100 % (0 MB)
87 14:46:45.090481 0 MB downloaded in 0.00 s (31.51 MB/s)
88 14:46:45.090605 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:46:45.090833 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:46:45.090918 start: 1.4 download-retry (timeout 00:10:00) [common]
92 14:46:45.091001 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 14:46:45.091114 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 14:46:45.091182 saving as /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/nfsrootfs/full.rootfs.tar
95 14:46:45.091242 total size: 120894716 (115 MB)
96 14:46:45.091304 Using unxz to decompress xz
97 14:46:45.095414 progress 0 % (0 MB)
98 14:46:45.443687 progress 5 % (5 MB)
99 14:46:45.802278 progress 10 % (11 MB)
100 14:46:46.153612 progress 15 % (17 MB)
101 14:46:46.481600 progress 20 % (23 MB)
102 14:46:46.775242 progress 25 % (28 MB)
103 14:46:47.134626 progress 30 % (34 MB)
104 14:46:47.479462 progress 35 % (40 MB)
105 14:46:47.644582 progress 40 % (46 MB)
106 14:46:47.821387 progress 45 % (51 MB)
107 14:46:48.132670 progress 50 % (57 MB)
108 14:46:48.507876 progress 55 % (63 MB)
109 14:46:48.852553 progress 60 % (69 MB)
110 14:46:49.192833 progress 65 % (74 MB)
111 14:46:49.537690 progress 70 % (80 MB)
112 14:46:49.900872 progress 75 % (86 MB)
113 14:46:50.244343 progress 80 % (92 MB)
114 14:46:50.584630 progress 85 % (98 MB)
115 14:46:50.946512 progress 90 % (103 MB)
116 14:46:51.274899 progress 95 % (109 MB)
117 14:46:51.630592 progress 100 % (115 MB)
118 14:46:51.635957 115 MB downloaded in 6.54 s (17.62 MB/s)
119 14:46:51.636205 end: 1.4.1 http-download (duration 00:00:07) [common]
121 14:46:51.636475 end: 1.4 download-retry (duration 00:00:07) [common]
122 14:46:51.636568 start: 1.5 download-retry (timeout 00:09:53) [common]
123 14:46:51.636657 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 14:46:51.636799 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 14:46:51.636872 saving as /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/modules/modules.tar
126 14:46:51.636971 total size: 8608920 (8 MB)
127 14:46:51.637040 Using unxz to decompress xz
128 14:46:51.641187 progress 0 % (0 MB)
129 14:46:51.660067 progress 5 % (0 MB)
130 14:46:51.688071 progress 10 % (0 MB)
131 14:46:51.718847 progress 15 % (1 MB)
132 14:46:51.742570 progress 20 % (1 MB)
133 14:46:51.766535 progress 25 % (2 MB)
134 14:46:51.790249 progress 30 % (2 MB)
135 14:46:51.814763 progress 35 % (2 MB)
136 14:46:51.841971 progress 40 % (3 MB)
137 14:46:51.864989 progress 45 % (3 MB)
138 14:46:51.889150 progress 50 % (4 MB)
139 14:46:51.914676 progress 55 % (4 MB)
140 14:46:51.939629 progress 60 % (4 MB)
141 14:46:51.964978 progress 65 % (5 MB)
142 14:46:51.991235 progress 70 % (5 MB)
143 14:46:52.018004 progress 75 % (6 MB)
144 14:46:52.045759 progress 80 % (6 MB)
145 14:46:52.071423 progress 85 % (7 MB)
146 14:46:52.097758 progress 90 % (7 MB)
147 14:46:52.123372 progress 95 % (7 MB)
148 14:46:52.149063 progress 100 % (8 MB)
149 14:46:52.154730 8 MB downloaded in 0.52 s (15.86 MB/s)
150 14:46:52.155015 end: 1.5.1 http-download (duration 00:00:01) [common]
152 14:46:52.155318 end: 1.5 download-retry (duration 00:00:01) [common]
153 14:46:52.155427 start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
154 14:46:52.155537 start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
155 14:46:55.621528 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip
156 14:46:55.621716 end: 1.6.1 extract-nfsrootfs (duration 00:00:03) [common]
157 14:46:55.621815 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 14:46:55.622036 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg
159 14:46:55.622177 makedir: /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin
160 14:46:55.622304 makedir: /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/tests
161 14:46:55.622400 makedir: /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/results
162 14:46:55.622529 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-add-keys
163 14:46:55.622671 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-add-sources
164 14:46:55.622798 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-background-process-start
165 14:46:55.622924 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-background-process-stop
166 14:46:55.623048 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-common-functions
167 14:46:55.623171 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-echo-ipv4
168 14:46:55.623296 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-install-packages
169 14:46:55.623419 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-installed-packages
170 14:46:55.623542 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-os-build
171 14:46:55.623666 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-probe-channel
172 14:46:55.623789 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-probe-ip
173 14:46:55.623912 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-target-ip
174 14:46:55.624048 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-target-mac
175 14:46:55.624176 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-target-storage
176 14:46:55.624304 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-case
177 14:46:55.624432 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-event
178 14:46:55.624570 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-feedback
179 14:46:55.624728 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-raise
180 14:46:55.624882 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-reference
181 14:46:55.625039 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-runner
182 14:46:55.625194 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-set
183 14:46:55.625389 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-test-shell
184 14:46:55.625547 Updating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-add-keys (debian)
185 14:46:55.625729 Updating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-add-sources (debian)
186 14:46:55.625896 Updating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-install-packages (debian)
187 14:46:55.626064 Updating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-installed-packages (debian)
188 14:46:55.626228 Updating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/bin/lava-os-build (debian)
189 14:46:55.626347 Creating /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/environment
190 14:46:55.626449 LAVA metadata
191 14:46:55.626516 - LAVA_JOB_ID=14167061
192 14:46:55.626577 - LAVA_DISPATCHER_IP=192.168.201.1
193 14:46:55.626679 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 14:46:55.626744 skipped lava-vland-overlay
195 14:46:55.626817 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 14:46:55.626894 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 14:46:55.626953 skipped lava-multinode-overlay
198 14:46:55.627044 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 14:46:55.627123 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 14:46:55.627196 Loading test definitions
201 14:46:55.627282 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 14:46:55.627351 Using /lava-14167061 at stage 0
203 14:46:55.627631 uuid=14167061_1.6.2.3.1 testdef=None
204 14:46:55.627719 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 14:46:55.627801 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 14:46:55.628250 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 14:46:55.628469 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 14:46:55.629028 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 14:46:55.629264 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 14:46:55.629840 runner path: /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/0/tests/0_timesync-off test_uuid 14167061_1.6.2.3.1
213 14:46:55.629998 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 14:46:55.630232 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 14:46:55.630305 Using /lava-14167061 at stage 0
217 14:46:55.630401 Fetching tests from https://github.com/kernelci/test-definitions.git
218 14:46:55.630487 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/0/tests/1_kselftest-tpm2'
219 14:46:59.470843 Running '/usr/bin/git checkout kernelci.org
220 14:46:59.618066 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 14:46:59.619020 uuid=14167061_1.6.2.3.5 testdef=None
222 14:46:59.619183 end: 1.6.2.3.5 git-repo-action (duration 00:00:04) [common]
224 14:46:59.619429 start: 1.6.2.3.6 test-overlay (timeout 00:09:45) [common]
225 14:46:59.620381 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 14:46:59.620749 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:45) [common]
228 14:46:59.622208 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 14:46:59.622594 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
231 14:46:59.624038 runner path: /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/0/tests/1_kselftest-tpm2 test_uuid 14167061_1.6.2.3.5
232 14:46:59.624161 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 14:46:59.624253 BRANCH='cip'
234 14:46:59.624342 SKIPFILE='/dev/null'
235 14:46:59.624435 SKIP_INSTALL='True'
236 14:46:59.624521 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 14:46:59.624607 TST_CASENAME=''
238 14:46:59.624695 TST_CMDFILES='tpm2'
239 14:46:59.624881 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 14:46:59.625232 Creating lava-test-runner.conf files
242 14:46:59.625344 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14167061/lava-overlay-7r8_78kg/lava-14167061/0 for stage 0
243 14:46:59.625441 - 0_timesync-off
244 14:46:59.625511 - 1_kselftest-tpm2
245 14:46:59.625610 end: 1.6.2.3 test-definition (duration 00:00:04) [common]
246 14:46:59.625701 start: 1.6.2.4 compress-overlay (timeout 00:09:45) [common]
247 14:47:07.106990 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 14:47:07.107138 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
249 14:47:07.107227 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 14:47:07.107325 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 14:47:07.107416 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
252 14:47:07.272098 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 14:47:07.272501 start: 1.6.4 extract-modules (timeout 00:09:37) [common]
254 14:47:07.272611 extracting modules file /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip
255 14:47:07.483840 extracting modules file /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14167061/extract-overlay-ramdisk-4hf6chrm/ramdisk
256 14:47:07.701769 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 14:47:07.701939 start: 1.6.5 apply-overlay-tftp (timeout 00:09:37) [common]
258 14:47:07.702030 [common] Applying overlay to NFS
259 14:47:07.702102 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14167061/compress-overlay-sabpipjb/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip
260 14:47:08.614229 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 14:47:08.614398 start: 1.6.6 configure-preseed-file (timeout 00:09:36) [common]
262 14:47:08.614492 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 14:47:08.614581 start: 1.6.7 compress-ramdisk (timeout 00:09:36) [common]
264 14:47:08.614663 Building ramdisk /var/lib/lava/dispatcher/tmp/14167061/extract-overlay-ramdisk-4hf6chrm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14167061/extract-overlay-ramdisk-4hf6chrm/ramdisk
265 14:47:08.962967 >> 130335 blocks
266 14:47:11.008659 rename /var/lib/lava/dispatcher/tmp/14167061/extract-overlay-ramdisk-4hf6chrm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/ramdisk/ramdisk.cpio.gz
267 14:47:11.009103 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 14:47:11.009226 start: 1.6.8 prepare-kernel (timeout 00:09:34) [common]
269 14:47:11.009392 start: 1.6.8.1 prepare-fit (timeout 00:09:34) [common]
270 14:47:11.009525 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/kernel/Image']
271 14:47:24.627264 Returned 0 in 13 seconds
272 14:47:24.727881 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/kernel/image.itb
273 14:47:25.104156 output: FIT description: Kernel Image image with one or more FDT blobs
274 14:47:25.104521 output: Created: Tue Jun 4 15:47:25 2024
275 14:47:25.104599 output: Image 0 (kernel-1)
276 14:47:25.104674 output: Description:
277 14:47:25.104743 output: Created: Tue Jun 4 15:47:25 2024
278 14:47:25.104810 output: Type: Kernel Image
279 14:47:25.104870 output: Compression: lzma compressed
280 14:47:25.104929 output: Data Size: 13060619 Bytes = 12754.51 KiB = 12.46 MiB
281 14:47:25.104987 output: Architecture: AArch64
282 14:47:25.105045 output: OS: Linux
283 14:47:25.105101 output: Load Address: 0x00000000
284 14:47:25.105158 output: Entry Point: 0x00000000
285 14:47:25.105215 output: Hash algo: crc32
286 14:47:25.105312 output: Hash value: 88dcd836
287 14:47:25.105368 output: Image 1 (fdt-1)
288 14:47:25.105424 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 14:47:25.105479 output: Created: Tue Jun 4 15:47:25 2024
290 14:47:25.105534 output: Type: Flat Device Tree
291 14:47:25.105588 output: Compression: uncompressed
292 14:47:25.105640 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 14:47:25.105693 output: Architecture: AArch64
294 14:47:25.105748 output: Hash algo: crc32
295 14:47:25.105801 output: Hash value: a9713552
296 14:47:25.105860 output: Image 2 (ramdisk-1)
297 14:47:25.105920 output: Description: unavailable
298 14:47:25.106011 output: Created: Tue Jun 4 15:47:25 2024
299 14:47:25.106088 output: Type: RAMDisk Image
300 14:47:25.106158 output: Compression: Unknown Compression
301 14:47:25.106210 output: Data Size: 18719838 Bytes = 18281.09 KiB = 17.85 MiB
302 14:47:25.106295 output: Architecture: AArch64
303 14:47:25.106348 output: OS: Linux
304 14:47:25.106400 output: Load Address: unavailable
305 14:47:25.106451 output: Entry Point: unavailable
306 14:47:25.106503 output: Hash algo: crc32
307 14:47:25.106554 output: Hash value: 99d3bf3b
308 14:47:25.106606 output: Default Configuration: 'conf-1'
309 14:47:25.106658 output: Configuration 0 (conf-1)
310 14:47:25.106711 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 14:47:25.106763 output: Kernel: kernel-1
312 14:47:25.106848 output: Init Ramdisk: ramdisk-1
313 14:47:25.106901 output: FDT: fdt-1
314 14:47:25.106952 output: Loadables: kernel-1
315 14:47:25.107004 output:
316 14:47:25.107200 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 14:47:25.107320 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 14:47:25.107447 end: 1.6 prepare-tftp-overlay (duration 00:00:33) [common]
319 14:47:25.107576 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
320 14:47:25.107655 No LXC device requested
321 14:47:25.107733 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 14:47:25.107819 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
323 14:47:25.107960 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 14:47:25.108028 Checking files for TFTP limit of 4294967296 bytes.
325 14:47:25.108554 end: 1 tftp-deploy (duration 00:00:40) [common]
326 14:47:25.108662 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 14:47:25.108750 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 14:47:25.108877 substitutions:
329 14:47:25.108958 - {DTB}: 14167061/tftp-deploy-fplw_y1k/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 14:47:25.109042 - {INITRD}: 14167061/tftp-deploy-fplw_y1k/ramdisk/ramdisk.cpio.gz
331 14:47:25.109102 - {KERNEL}: 14167061/tftp-deploy-fplw_y1k/kernel/Image
332 14:47:25.109160 - {LAVA_MAC}: None
333 14:47:25.109218 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip
334 14:47:25.109300 - {NFS_SERVER_IP}: 192.168.201.1
335 14:47:25.109370 - {PRESEED_CONFIG}: None
336 14:47:25.109425 - {PRESEED_LOCAL}: None
337 14:47:25.109493 - {RAMDISK}: 14167061/tftp-deploy-fplw_y1k/ramdisk/ramdisk.cpio.gz
338 14:47:25.109564 - {ROOT_PART}: None
339 14:47:25.109617 - {ROOT}: None
340 14:47:25.109671 - {SERVER_IP}: 192.168.201.1
341 14:47:25.109723 - {TEE}: None
342 14:47:25.109776 Parsed boot commands:
343 14:47:25.109828 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 14:47:25.109997 Parsed boot commands: tftpboot 192.168.201.1 14167061/tftp-deploy-fplw_y1k/kernel/image.itb 14167061/tftp-deploy-fplw_y1k/kernel/cmdline
345 14:47:25.110120 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 14:47:25.110202 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 14:47:25.110292 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 14:47:25.110380 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 14:47:25.110452 Not connected, no need to disconnect.
350 14:47:25.110526 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 14:47:25.110625 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 14:47:25.110708 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 14:47:25.114771 Setting prompt string to ['lava-test: # ']
354 14:47:25.115181 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 14:47:25.115325 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 14:47:25.115458 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 14:47:25.115594 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 14:47:25.115900 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
359 14:47:48.365499 Returned 0 in 23 seconds
360 14:47:48.466140 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
362 14:47:48.466451 end: 2.2.2 reset-device (duration 00:00:23) [common]
363 14:47:48.466549 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
364 14:47:48.466640 Setting prompt string to 'Starting depthcharge on Juniper...'
365 14:47:48.466709 Changing prompt to 'Starting depthcharge on Juniper...'
366 14:47:48.466779 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 14:47:48.467197 [Enter `^Ec?' for help]
368 14:47:48.467332 [DL] 00000000 00000000 010701
369 14:47:48.467414
370 14:47:48.467478
371 14:47:48.467539 F0: 102B 0000
372 14:47:48.467603
373 14:47:48.467663 F3: 1006 0033 [0200]
374 14:47:48.467719
375 14:47:48.467777 F3: 4001 00E0 [0200]
376 14:47:48.467835
377 14:47:48.467890 F3: 0000 0000
378 14:47:48.467943
379 14:47:48.467996 V0: 0000 0000 [0001]
380 14:47:48.468052
381 14:47:48.468105 00: 1027 0002
382 14:47:48.468161
383 14:47:48.468214 01: 0000 0000
384 14:47:48.468269
385 14:47:48.468324 BP: 0C00 0251 [0000]
386 14:47:48.468378
387 14:47:48.468430 G0: 1182 0000
388 14:47:48.468484
389 14:47:48.468536 EC: 0004 0000 [0001]
390 14:47:48.468592
391 14:47:48.468645 S7: 0000 0000 [0000]
392 14:47:48.468698
393 14:47:48.468750 CC: 0000 0000 [0001]
394 14:47:48.468802
395 14:47:48.468857 T0: 0000 00DB [000F]
396 14:47:48.468912
397 14:47:48.468964 Jump to BL
398 14:47:48.469016
399 14:47:48.469074
400 14:47:48.469126
401 14:47:48.469178 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 14:47:48.469235 ARM64: Exception handlers installed.
403 14:47:48.469334 ARM64: Testing exception
404 14:47:48.469388 ARM64: Done test exception
405 14:47:48.469442 WDT: Last reset was cold boot
406 14:47:48.469494 SPI0(PAD0) initialized at 992727 Hz
407 14:47:48.469547 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 14:47:48.469603 Manufacturer: ef
409 14:47:48.469656 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 14:47:48.469709 Probing TPM: . done!
411 14:47:48.469761 TPM ready after 0 ms
412 14:47:48.469817 Connected to device vid:did:rid of 1ae0:0028:00
413 14:47:48.469873 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 14:47:48.469927 Initialized TPM device CR50 revision 0
415 14:47:48.469980 tlcl_send_startup: Startup return code is 0
416 14:47:48.470032 TPM: setup succeeded
417 14:47:48.470087 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 14:47:48.470140 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 14:47:48.470193 in-header: 03 19 00 00 08 00 00 00
420 14:47:48.470245 in-data: a2 e0 47 00 13 00 00 00
421 14:47:48.470298 Chrome EC: UHEPI supported
422 14:47:48.470353 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 14:47:48.470409 in-header: 03 a1 00 00 08 00 00 00
424 14:47:48.470462 in-data: 84 60 60 10 00 00 00 00
425 14:47:48.470514 Phase 1
426 14:47:48.470569 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 14:47:48.470622 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 14:47:48.470676 VB2:vb2_check_recovery() Recovery was requested manually
429 14:47:48.470729 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 14:47:48.470782 Recovery requested (1009000e)
431 14:47:48.470838 tlcl_extend: response is 0
432 14:47:48.470892 tlcl_extend: response is 0
433 14:47:48.470944
434 14:47:48.470996
435 14:47:48.471048 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 14:47:48.471104 ARM64: Exception handlers installed.
437 14:47:48.471157 ARM64: Testing exception
438 14:47:48.471210 ARM64: Done test exception
439 14:47:48.471262 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
440 14:47:48.471317 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 14:47:48.471371 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 14:47:48.471444 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
443 14:47:48.471500 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
444 14:47:48.471553 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
445 14:47:48.471610 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
446 14:47:48.471663 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
447 14:47:48.471716 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
448 14:47:48.471769 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
449 14:47:48.471824 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
450 14:47:48.471878 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
451 14:47:48.471931 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
452 14:47:48.471984 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
453 14:47:48.472038 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
454 14:47:48.472096 in-header: 03 19 00 00 08 00 00 00
455 14:47:48.472149 in-data: a2 e0 47 00 13 00 00 00
456 14:47:48.472202 Chrome EC: UHEPI supported
457 14:47:48.472255 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
458 14:47:48.472308 in-header: 03 a1 00 00 08 00 00 00
459 14:47:48.472364 in-data: 84 60 60 10 00 00 00 00
460 14:47:48.472418 Skip loading cached calibration data
461 14:47:48.472471 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
462 14:47:48.472524 in-header: 03 a1 00 00 08 00 00 00
463 14:47:48.472579 in-data: 84 60 60 10 00 00 00 00
464 14:47:48.472631 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
465 14:47:48.472684 in-header: 03 a1 00 00 08 00 00 00
466 14:47:48.472736 in-data: 84 60 60 10 00 00 00 00
467 14:47:48.472789 ADC[3]: Raw value=1037476 ID=8
468 14:47:48.472844 Manufacturer: ef
469 14:47:48.472898 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
470 14:47:48.472951 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
471 14:47:48.473004 CBFS @ 21000 size 3d4000
472 14:47:48.473059 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
473 14:47:48.473113 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
474 14:47:48.473165 CBFS: Found @ offset 3c880 size 4b
475 14:47:48.473217 DRAM-K: Full Calibration
476 14:47:48.473321 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
477 14:47:48.473381 CBFS @ 21000 size 3d4000
478 14:47:48.473435 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
479 14:47:48.473488 CBFS: Locating 'fallback/dram'
480 14:47:48.473541 CBFS: Found @ offset 24b00 size 12268
481 14:47:48.473597 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
482 14:47:48.473650 ddr_geometry: 1, config: 0x0
483 14:47:48.473703 header.status = 0x0
484 14:47:48.473755 header.magic = 0x44524d4b (expected: 0x44524d4b)
485 14:47:48.473810 header.version = 0x5 (expected: 0x5)
486 14:47:48.474068 header.size = 0x8f0 (expected: 0x8f0)
487 14:47:48.474163 header.config = 0x0
488 14:47:48.474218 header.flags = 0x0
489 14:47:48.474272 header.checksum = 0x0
490 14:47:48.474329 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
491 14:47:48.474386 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
492 14:47:48.474441 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
493 14:47:48.474495 ddr_geometry:1
494 14:47:48.474550 [EMI] new MDL number = 1
495 14:47:48.474606 dram_cbt_mode_extern: 0
496 14:47:48.474660 dram_cbt_mode [RK0]: 0, [RK1]: 0
497 14:47:48.474714 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
498 14:47:48.474768
499 14:47:48.474837
500 14:47:48.474891 [Bianco] ETT version 0.0.0.1
501 14:47:48.474944 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
502 14:47:48.474997
503 14:47:48.475049 vSetVcoreByFreq with vcore:762500, freq=1600
504 14:47:48.475107
505 14:47:48.475159 [DramcInit]
506 14:47:48.475212 AutoRefreshCKEOff AutoREF OFF
507 14:47:48.475264 DDRPhyPLLSetting-CKEOFF
508 14:47:48.475319 DDRPhyPLLSetting-CKEON
509 14:47:48.475371
510 14:47:48.475425 Enable WDQS
511 14:47:48.475477 [ModeRegInit_LP4] CH0 RK0
512 14:47:48.475530 Write Rank0 MR13 =0x18
513 14:47:48.475585 Write Rank0 MR12 =0x5d
514 14:47:48.475637 Write Rank0 MR1 =0x56
515 14:47:48.475689 Write Rank0 MR2 =0x1a
516 14:47:48.475758 Write Rank0 MR11 =0x0
517 14:47:48.475824 Write Rank0 MR22 =0x38
518 14:47:48.475879 Write Rank0 MR14 =0x5d
519 14:47:48.475932 Write Rank0 MR3 =0x30
520 14:47:48.475984 Write Rank0 MR13 =0x58
521 14:47:48.476036 Write Rank0 MR12 =0x5d
522 14:47:48.476091 Write Rank0 MR1 =0x56
523 14:47:48.476143 Write Rank0 MR2 =0x2d
524 14:47:48.476195 Write Rank0 MR11 =0x23
525 14:47:48.476247 Write Rank0 MR22 =0x34
526 14:47:48.476299 Write Rank0 MR14 =0x10
527 14:47:48.476372 Write Rank0 MR3 =0x30
528 14:47:48.476425 Write Rank0 MR13 =0xd8
529 14:47:48.476478 [ModeRegInit_LP4] CH0 RK1
530 14:47:48.476532 Write Rank1 MR13 =0x18
531 14:47:48.476587 Write Rank1 MR12 =0x5d
532 14:47:48.476640 Write Rank1 MR1 =0x56
533 14:47:48.476693 Write Rank1 MR2 =0x1a
534 14:47:48.476746 Write Rank1 MR11 =0x0
535 14:47:48.476799 Write Rank1 MR22 =0x38
536 14:47:48.476855 Write Rank1 MR14 =0x5d
537 14:47:48.476909 Write Rank1 MR3 =0x30
538 14:47:48.476962 Write Rank1 MR13 =0x58
539 14:47:48.477015 Write Rank1 MR12 =0x5d
540 14:47:48.477070 Write Rank1 MR1 =0x56
541 14:47:48.477124 Write Rank1 MR2 =0x2d
542 14:47:48.477177 Write Rank1 MR11 =0x23
543 14:47:48.477230 Write Rank1 MR22 =0x34
544 14:47:48.477308 Write Rank1 MR14 =0x10
545 14:47:48.477364 Write Rank1 MR3 =0x30
546 14:47:48.477418 Write Rank1 MR13 =0xd8
547 14:47:48.477470 [ModeRegInit_LP4] CH1 RK0
548 14:47:48.477523 Write Rank0 MR13 =0x18
549 14:47:48.477578 Write Rank0 MR12 =0x5d
550 14:47:48.477631 Write Rank0 MR1 =0x56
551 14:47:48.477683 Write Rank0 MR2 =0x1a
552 14:47:48.477736 Write Rank0 MR11 =0x0
553 14:47:48.477788 Write Rank0 MR22 =0x38
554 14:47:48.477843 Write Rank0 MR14 =0x5d
555 14:47:48.477897 Write Rank0 MR3 =0x30
556 14:47:48.477949 Write Rank0 MR13 =0x58
557 14:47:48.478000 Write Rank0 MR12 =0x5d
558 14:47:48.478052 Write Rank0 MR1 =0x56
559 14:47:48.478106 Write Rank0 MR2 =0x2d
560 14:47:48.478158 Write Rank0 MR11 =0x23
561 14:47:48.478210 Write Rank0 MR22 =0x34
562 14:47:48.478262 Write Rank0 MR14 =0x10
563 14:47:48.478316 Write Rank0 MR3 =0x30
564 14:47:48.478369 Write Rank0 MR13 =0xd8
565 14:47:48.478439 [ModeRegInit_LP4] CH1 RK1
566 14:47:48.478506 Write Rank1 MR13 =0x18
567 14:47:48.478560 Write Rank1 MR12 =0x5d
568 14:47:48.478613 Write Rank1 MR1 =0x56
569 14:47:48.478665 Write Rank1 MR2 =0x1a
570 14:47:48.478716 Write Rank1 MR11 =0x0
571 14:47:48.478768 Write Rank1 MR22 =0x38
572 14:47:48.478824 Write Rank1 MR14 =0x5d
573 14:47:48.478878 Write Rank1 MR3 =0x30
574 14:47:48.478930 Write Rank1 MR13 =0x58
575 14:47:48.478982 Write Rank1 MR12 =0x5d
576 14:47:48.479034 Write Rank1 MR1 =0x56
577 14:47:48.479089 Write Rank1 MR2 =0x2d
578 14:47:48.479141 Write Rank1 MR11 =0x23
579 14:47:48.479197 Write Rank1 MR22 =0x34
580 14:47:48.479250 Write Rank1 MR14 =0x10
581 14:47:48.479302 Write Rank1 MR3 =0x30
582 14:47:48.479356 Write Rank1 MR13 =0xd8
583 14:47:48.479410 match AC timing 3
584 14:47:48.479463 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
585 14:47:48.479516 [MiockJmeterHQA]
586 14:47:48.479571 vSetVcoreByFreq with vcore:762500, freq=1600
587 14:47:48.479624
588 14:47:48.479677 MIOCK jitter meter ch=0
589 14:47:48.479729
590 14:47:48.479781 1T = (99-17) = 82 dly cells
591 14:47:48.479838 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
592 14:47:48.479893 vSetVcoreByFreq with vcore:725000, freq=1200
593 14:47:48.479946
594 14:47:48.479998 MIOCK jitter meter ch=0
595 14:47:48.480050
596 14:47:48.480107 1T = (94-16) = 78 dly cells
597 14:47:48.480161 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
598 14:47:48.480215 vSetVcoreByFreq with vcore:725000, freq=800
599 14:47:48.480268
600 14:47:48.480323 MIOCK jitter meter ch=0
601 14:47:48.480377
602 14:47:48.480429 1T = (94-16) = 78 dly cells
603 14:47:48.480483 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
604 14:47:48.480536 vSetVcoreByFreq with vcore:762500, freq=1600
605 14:47:48.480591 vSetVcoreByFreq with vcore:762500, freq=1600
606 14:47:48.480644
607 14:47:48.480696 K DRVP
608 14:47:48.480748 1. OCD DRVP=0 CALOUT=0
609 14:47:48.480802 1. OCD DRVP=1 CALOUT=0
610 14:47:48.480858 1. OCD DRVP=2 CALOUT=0
611 14:47:48.480914 1. OCD DRVP=3 CALOUT=0
612 14:47:48.480967 1. OCD DRVP=4 CALOUT=0
613 14:47:48.481021 1. OCD DRVP=5 CALOUT=0
614 14:47:48.481077 1. OCD DRVP=6 CALOUT=0
615 14:47:48.481130 1. OCD DRVP=7 CALOUT=0
616 14:47:48.481182 1. OCD DRVP=8 CALOUT=0
617 14:47:48.481236 1. OCD DRVP=9 CALOUT=1
618 14:47:48.481336
619 14:47:48.481392 1. OCD DRVP calibration OK! DRVP=9
620 14:47:48.481446
621 14:47:48.481499
622 14:47:48.481553
623 14:47:48.481605 K ODTN
624 14:47:48.481658 3. OCD ODTN=0 ,CALOUT=1
625 14:47:48.481713 3. OCD ODTN=1 ,CALOUT=1
626 14:47:48.481766 3. OCD ODTN=2 ,CALOUT=1
627 14:47:48.481822 3. OCD ODTN=3 ,CALOUT=1
628 14:47:48.481877 3. OCD ODTN=4 ,CALOUT=1
629 14:47:48.481930 3. OCD ODTN=5 ,CALOUT=1
630 14:47:48.481983 3. OCD ODTN=6 ,CALOUT=1
631 14:47:48.482036 3. OCD ODTN=7 ,CALOUT=0
632 14:47:48.482091
633 14:47:48.482175 3. OCD ODTN calibration OK! ODTN=7
634 14:47:48.482228
635 14:47:48.482281 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
636 14:47:48.482336 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
637 14:47:48.482390 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
638 14:47:48.482443
639 14:47:48.482495 K DRVP
640 14:47:48.482547 1. OCD DRVP=0 CALOUT=0
641 14:47:48.482603 1. OCD DRVP=1 CALOUT=0
642 14:47:48.482657 1. OCD DRVP=2 CALOUT=0
643 14:47:48.482710 1. OCD DRVP=3 CALOUT=0
644 14:47:48.482763 1. OCD DRVP=4 CALOUT=0
645 14:47:48.482819 1. OCD DRVP=5 CALOUT=0
646 14:47:48.482874 1. OCD DRVP=6 CALOUT=0
647 14:47:48.482928 1. OCD DRVP=7 CALOUT=0
648 14:47:48.482980 1. OCD DRVP=8 CALOUT=0
649 14:47:48.483033 1. OCD DRVP=9 CALOUT=0
650 14:47:48.483306 1. OCD DRVP=10 CALOUT=1
651 14:47:48.483385
652 14:47:48.483440 1. OCD DRVP calibration OK! DRVP=10
653 14:47:48.483495
654 14:47:48.483547
655 14:47:48.483602
656 14:47:48.483654 K ODTN
657 14:47:48.483707 3. OCD ODTN=0 ,CALOUT=1
658 14:47:48.483760 3. OCD ODTN=1 ,CALOUT=1
659 14:47:48.483816 3. OCD ODTN=2 ,CALOUT=1
660 14:47:48.483869 3. OCD ODTN=3 ,CALOUT=1
661 14:47:48.483923 3. OCD ODTN=4 ,CALOUT=1
662 14:47:48.483976 3. OCD ODTN=5 ,CALOUT=1
663 14:47:48.484030 3. OCD ODTN=6 ,CALOUT=1
664 14:47:48.484086 3. OCD ODTN=7 ,CALOUT=1
665 14:47:48.484138 3. OCD ODTN=8 ,CALOUT=1
666 14:47:48.484192 3. OCD ODTN=9 ,CALOUT=1
667 14:47:48.484245 3. OCD ODTN=10 ,CALOUT=1
668 14:47:48.484298 3. OCD ODTN=11 ,CALOUT=1
669 14:47:48.484354 3. OCD ODTN=12 ,CALOUT=1
670 14:47:48.484409 3. OCD ODTN=13 ,CALOUT=1
671 14:47:48.484462 3. OCD ODTN=14 ,CALOUT=0
672 14:47:48.484514
673 14:47:48.484569 3. OCD ODTN calibration OK! ODTN=14
674 14:47:48.484623
675 14:47:48.484675 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
676 14:47:48.484727 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
677 14:47:48.484780 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
678 14:47:48.484836
679 14:47:48.484890 [DramcInit]
680 14:47:48.484942 AutoRefreshCKEOff AutoREF OFF
681 14:47:48.484995 DDRPhyPLLSetting-CKEOFF
682 14:47:48.485046 DDRPhyPLLSetting-CKEON
683 14:47:48.485101
684 14:47:48.485153 Enable WDQS
685 14:47:48.485205 ==
686 14:47:48.485263 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 14:47:48.485353 fsp= 1, odt_onoff= 1, Byte mode= 0
688 14:47:48.485407 ==
689 14:47:48.485460 [Duty_Offset_Calibration]
690 14:47:48.485544
691 14:47:48.485630 ===========================
692 14:47:48.485682 B0:0 B1:1 CA:1
693 14:47:48.485734 ==
694 14:47:48.485787 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 14:47:48.485842 fsp= 1, odt_onoff= 1, Byte mode= 0
696 14:47:48.485896 ==
697 14:47:48.485948 [Duty_Offset_Calibration]
698 14:47:48.486000
699 14:47:48.486052 ===========================
700 14:47:48.486107 B0:1 B1:2 CA:0
701 14:47:48.486159 [ModeRegInit_LP4] CH0 RK0
702 14:47:48.486211 Write Rank0 MR13 =0x18
703 14:47:48.486263 Write Rank0 MR12 =0x5d
704 14:47:48.486318 Write Rank0 MR1 =0x56
705 14:47:48.486372 Write Rank0 MR2 =0x1a
706 14:47:48.486424 Write Rank0 MR11 =0x0
707 14:47:48.486476 Write Rank0 MR22 =0x38
708 14:47:48.486528 Write Rank0 MR14 =0x5d
709 14:47:48.486583 Write Rank0 MR3 =0x30
710 14:47:48.486635 Write Rank0 MR13 =0x58
711 14:47:48.486686 Write Rank0 MR12 =0x5d
712 14:47:48.486738 Write Rank0 MR1 =0x56
713 14:47:48.486790 Write Rank0 MR2 =0x2d
714 14:47:48.486845 Write Rank0 MR11 =0x23
715 14:47:48.486897 Write Rank0 MR22 =0x34
716 14:47:48.486949 Write Rank0 MR14 =0x10
717 14:47:48.487002 Write Rank0 MR3 =0x30
718 14:47:48.487053 Write Rank0 MR13 =0xd8
719 14:47:48.487108 [ModeRegInit_LP4] CH0 RK1
720 14:47:48.487160 Write Rank1 MR13 =0x18
721 14:47:48.487212 Write Rank1 MR12 =0x5d
722 14:47:48.487264 Write Rank1 MR1 =0x56
723 14:47:48.487318 Write Rank1 MR2 =0x1a
724 14:47:48.487372 Write Rank1 MR11 =0x0
725 14:47:48.487424 Write Rank1 MR22 =0x38
726 14:47:48.487476 Write Rank1 MR14 =0x5d
727 14:47:48.487527 Write Rank1 MR3 =0x30
728 14:47:48.487582 Write Rank1 MR13 =0x58
729 14:47:48.487634 Write Rank1 MR12 =0x5d
730 14:47:48.487686 Write Rank1 MR1 =0x56
731 14:47:48.487738 Write Rank1 MR2 =0x2d
732 14:47:48.487789 Write Rank1 MR11 =0x23
733 14:47:48.487844 Write Rank1 MR22 =0x34
734 14:47:48.487897 Write Rank1 MR14 =0x10
735 14:47:48.487949 Write Rank1 MR3 =0x30
736 14:47:48.488001 Write Rank1 MR13 =0xd8
737 14:47:48.488053 [ModeRegInit_LP4] CH1 RK0
738 14:47:48.488109 Write Rank0 MR13 =0x18
739 14:47:48.488160 Write Rank0 MR12 =0x5d
740 14:47:48.488212 Write Rank0 MR1 =0x56
741 14:47:48.488264 Write Rank0 MR2 =0x1a
742 14:47:48.488319 Write Rank0 MR11 =0x0
743 14:47:48.488370 Write Rank0 MR22 =0x38
744 14:47:48.488424 Write Rank0 MR14 =0x5d
745 14:47:48.488477 Write Rank0 MR3 =0x30
746 14:47:48.488528 Write Rank0 MR13 =0x58
747 14:47:48.488583 Write Rank0 MR12 =0x5d
748 14:47:48.488635 Write Rank0 MR1 =0x56
749 14:47:48.488687 Write Rank0 MR2 =0x2d
750 14:47:48.488738 Write Rank0 MR11 =0x23
751 14:47:48.488790 Write Rank0 MR22 =0x34
752 14:47:48.488878 Write Rank0 MR14 =0x10
753 14:47:48.488930 Write Rank0 MR3 =0x30
754 14:47:48.488982 Write Rank0 MR13 =0xd8
755 14:47:48.489034 [ModeRegInit_LP4] CH1 RK1
756 14:47:48.489089 Write Rank1 MR13 =0x18
757 14:47:48.489141 Write Rank1 MR12 =0x5d
758 14:47:48.489192 Write Rank1 MR1 =0x56
759 14:47:48.489244 Write Rank1 MR2 =0x1a
760 14:47:48.489338 Write Rank1 MR11 =0x0
761 14:47:48.489392 Write Rank1 MR22 =0x38
762 14:47:48.489445 Write Rank1 MR14 =0x5d
763 14:47:48.489496 Write Rank1 MR3 =0x30
764 14:47:48.489549 Write Rank1 MR13 =0x58
765 14:47:48.489603 Write Rank1 MR12 =0x5d
766 14:47:48.489655 Write Rank1 MR1 =0x56
767 14:47:48.489706 Write Rank1 MR2 =0x2d
768 14:47:48.489758 Write Rank1 MR11 =0x23
769 14:47:48.489810 Write Rank1 MR22 =0x34
770 14:47:48.489865 Write Rank1 MR14 =0x10
771 14:47:48.489920 Write Rank1 MR3 =0x30
772 14:47:48.489973 Write Rank1 MR13 =0xd8
773 14:47:48.490024 match AC timing 3
774 14:47:48.490079 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 14:47:48.490132 DramC Write-DBI off
776 14:47:48.490184 DramC Read-DBI off
777 14:47:48.490235 Write Rank0 MR13 =0x59
778 14:47:48.490287 ==
779 14:47:48.490341 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 14:47:48.490395 fsp= 1, odt_onoff= 1, Byte mode= 0
781 14:47:48.490448 ==
782 14:47:48.490500 === u2Vref_new: 0x56 --> 0x2d
783 14:47:48.490552 === u2Vref_new: 0x58 --> 0x38
784 14:47:48.490607 === u2Vref_new: 0x5a --> 0x39
785 14:47:48.490659 === u2Vref_new: 0x5c --> 0x3c
786 14:47:48.490712 === u2Vref_new: 0x5e --> 0x3d
787 14:47:48.490764 === u2Vref_new: 0x60 --> 0xa0
788 14:47:48.490818
789 14:47:48.490870 CBT Vref found, early break!
790 14:47:48.490924 [CA 0] Center 33 (4~63) winsize 60
791 14:47:48.490976 [CA 1] Center 34 (5~63) winsize 59
792 14:47:48.491028 [CA 2] Center 29 (1~57) winsize 57
793 14:47:48.491083 [CA 3] Center 24 (-3~51) winsize 55
794 14:47:48.491135 [CA 4] Center 25 (-2~52) winsize 55
795 14:47:48.491187 [CA 5] Center 30 (2~58) winsize 57
796 14:47:48.491256
797 14:47:48.491342 [CATrainingPosCal] consider 1 rank data
798 14:47:48.491411 u2DelayCellTimex100 = 762/100 ps
799 14:47:48.491463 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
800 14:47:48.491516 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
801 14:47:48.491571 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
802 14:47:48.491624 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
803 14:47:48.491676 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
804 14:47:48.491728 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
805 14:47:48.491781
806 14:47:48.491835 CA PerBit enable=1, Macro0, CA PI delay=24
807 14:47:48.491890 === u2Vref_new: 0x56 --> 0x2d
808 14:47:48.491974
809 14:47:48.492025 Vref(ca) range 1: 22
810 14:47:48.492079
811 14:47:48.492131 CS Dly= 10 (41-0-32)
812 14:47:48.492183 Write Rank0 MR13 =0xd8
813 14:47:48.492236 Write Rank0 MR13 =0xd8
814 14:47:48.492288 Write Rank0 MR12 =0x56
815 14:47:48.492552 Write Rank1 MR13 =0x59
816 14:47:48.492632 ==
817 14:47:48.492717 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
818 14:47:48.492803 fsp= 1, odt_onoff= 1, Byte mode= 0
819 14:47:48.492876 ==
820 14:47:48.492947 === u2Vref_new: 0x56 --> 0x2d
821 14:47:48.493032 === u2Vref_new: 0x58 --> 0x38
822 14:47:48.493118 === u2Vref_new: 0x5a --> 0x39
823 14:47:48.493172 === u2Vref_new: 0x5c --> 0x3c
824 14:47:48.493225 === u2Vref_new: 0x5e --> 0x3d
825 14:47:48.493287 === u2Vref_new: 0x60 --> 0xa0
826 14:47:48.493345 [CA 0] Center 34 (5~63) winsize 59
827 14:47:48.493401 [CA 1] Center 34 (6~63) winsize 58
828 14:47:48.493455 [CA 2] Center 29 (0~58) winsize 59
829 14:47:48.493508 [CA 3] Center 23 (-4~50) winsize 55
830 14:47:48.493565 [CA 4] Center 24 (-3~52) winsize 56
831 14:47:48.493619 [CA 5] Center 30 (1~59) winsize 59
832 14:47:48.493672
833 14:47:48.493726 [CATrainingPosCal] consider 2 rank data
834 14:47:48.493794 u2DelayCellTimex100 = 762/100 ps
835 14:47:48.493849 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
836 14:47:48.493902 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
837 14:47:48.493955 CA2 delay=29 (1~57),Diff = 6 PI (7 cell)
838 14:47:48.494008 CA3 delay=23 (-3~50),Diff = 0 PI (0 cell)
839 14:47:48.494062 CA4 delay=25 (-2~52),Diff = 2 PI (2 cell)
840 14:47:48.494115 CA5 delay=30 (2~58),Diff = 7 PI (8 cell)
841 14:47:48.494167
842 14:47:48.494220 CA PerBit enable=1, Macro0, CA PI delay=23
843 14:47:48.494272 === u2Vref_new: 0x56 --> 0x2d
844 14:47:48.494327
845 14:47:48.494381 Vref(ca) range 1: 22
846 14:47:48.494434
847 14:47:48.494486 CS Dly= 11 (42-0-32)
848 14:47:48.494538 Write Rank1 MR13 =0xd8
849 14:47:48.494594 Write Rank1 MR13 =0xd8
850 14:47:48.494645 Write Rank1 MR12 =0x56
851 14:47:48.494714 [RankSwap] Rank num 2, (Multi 1), Rank 0
852 14:47:48.494782 Write Rank0 MR2 =0xad
853 14:47:48.494838 [Write Leveling]
854 14:47:48.494892 delay byte0 byte1 byte2 byte3
855 14:47:48.494945
856 14:47:48.494996 10 0 0
857 14:47:48.495050 11 0 0
858 14:47:48.495106 12 0 0
859 14:47:48.495159 13 0 0
860 14:47:48.495243 14 0 0
861 14:47:48.495296 15 0 0
862 14:47:48.495352 16 0 0
863 14:47:48.495407 17 0 0
864 14:47:48.495460 18 0 0
865 14:47:48.495513 19 0 0
866 14:47:48.495568 20 0 0
867 14:47:48.495621 21 0 0
868 14:47:48.495674 22 0 0
869 14:47:48.495729 23 0 0
870 14:47:48.495782 24 0 0
871 14:47:48.495838 25 0 0
872 14:47:48.495893 26 0 0
873 14:47:48.495946 27 0 ff
874 14:47:48.496000 28 0 ff
875 14:47:48.496053 29 0 ff
876 14:47:48.496110 30 0 ff
877 14:47:48.496163 31 0 ff
878 14:47:48.496216 32 0 ff
879 14:47:48.496269 33 ff ff
880 14:47:48.496371 34 ff ff
881 14:47:48.496441 35 ff ff
882 14:47:48.496494 36 ff ff
883 14:47:48.496547 37 ff ff
884 14:47:48.496603 38 ff ff
885 14:47:48.496656 39 ff ff
886 14:47:48.496709 pass bytecount = 0xff (0xff: all bytes pass)
887 14:47:48.496762
888 14:47:48.496817 DQS0 dly: 33
889 14:47:48.496870 DQS1 dly: 27
890 14:47:48.496924 Write Rank0 MR2 =0x2d
891 14:47:48.496976 [RankSwap] Rank num 2, (Multi 1), Rank 0
892 14:47:48.497028 Write Rank0 MR1 =0xd6
893 14:47:48.497083 [Gating]
894 14:47:48.497135 ==
895 14:47:48.497187 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
896 14:47:48.497241 fsp= 1, odt_onoff= 1, Byte mode= 0
897 14:47:48.497331 ==
898 14:47:48.497384 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0
899 14:47:48.497439 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 14:47:48.497493 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 14:47:48.497547 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 14:47:48.497604 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 14:47:48.497658 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 14:47:48.497711 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
905 14:47:48.497764 3 1 28 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
906 14:47:48.497820 3 2 0 |807 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
907 14:47:48.497875 3 2 4 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
908 14:47:48.497929 3 2 8 |3534 1818 |(11 11)(11 11) |(0 0)(0 0)| 0
909 14:47:48.497982 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 14:47:48.498036 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 14:47:48.498092 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 14:47:48.498182 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
913 14:47:48.498237 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
914 14:47:48.498290 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
915 14:47:48.498347 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 14:47:48.498402 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
917 14:47:48.498455 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 14:47:48.498508 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 14:47:48.498564 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 14:47:48.498618 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
921 14:47:48.498672 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
922 14:47:48.498725 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
923 14:47:48.498778 3 4 4 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
924 14:47:48.498834 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 14:47:48.498889 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 14:47:48.498943 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 14:47:48.498997 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 14:47:48.499050 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 14:47:48.499106 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 14:47:48.499160 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 14:47:48.499213 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 14:47:48.499266 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 14:47:48.499322 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 14:47:48.499377 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 14:47:48.499431 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 14:47:48.499501 [Byte 0] Lead/lag falling Transition (3, 5, 20)
937 14:47:48.499589 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
938 14:47:48.499657 [Byte 1] Lead/lag falling Transition (3, 5, 24)
939 14:47:48.499709 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
940 14:47:48.499953 [Byte 0] Lead/lag Transition tap number (3)
941 14:47:48.500069 [Byte 1] Lead/lag Transition tap number (2)
942 14:47:48.500156 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
943 14:47:48.500224 3 6 4 |4646 1e1e |(0 0)(11 11) |(0 0)(0 0)| 0
944 14:47:48.500278 [Byte 0]First pass (3, 6, 4)
945 14:47:48.500334 3 6 8 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
946 14:47:48.500390 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 14:47:48.500444 [Byte 1]First pass (3, 6, 12)
948 14:47:48.500497 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 14:47:48.500550 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 14:47:48.500606 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 14:47:48.500660 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 14:47:48.500714 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 14:47:48.500768 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 14:47:48.500824 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 14:47:48.500879 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 14:47:48.500933 All bytes gating window > 1UI, Early break!
957 14:47:48.500986
958 14:47:48.501039 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
959 14:47:48.501093
960 14:47:48.501146 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
961 14:47:48.501198
962 14:47:48.501250
963 14:47:48.501343
964 14:47:48.501395 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
965 14:47:48.501449
966 14:47:48.501501 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
967 14:47:48.501555
968 14:47:48.501607
969 14:47:48.501659 Write Rank0 MR1 =0x56
970 14:47:48.501712
971 14:47:48.501764 best RODT dly(2T, 0.5T) = (2, 2)
972 14:47:48.501819
973 14:47:48.501871 best RODT dly(2T, 0.5T) = (2, 2)
974 14:47:48.501925 ==
975 14:47:48.501977 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 14:47:48.502030 fsp= 1, odt_onoff= 1, Byte mode= 0
977 14:47:48.502085 ==
978 14:47:48.502136 Start DQ dly to find pass range UseTestEngine =0
979 14:47:48.502189 x-axis: bit #, y-axis: DQ dly (-127~63)
980 14:47:48.502241 RX Vref Scan = 0
981 14:47:48.502293 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 14:47:48.502350 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 14:47:48.502405 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 14:47:48.502459 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 14:47:48.502512 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 14:47:48.502568 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 14:47:48.502621 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 14:47:48.502675 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 14:47:48.502728 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 14:47:48.502782 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 14:47:48.502838 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 14:47:48.502892 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 14:47:48.502946 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 14:47:48.502999 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 14:47:48.503052 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 14:47:48.503107 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 14:47:48.503160 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 14:47:48.503213 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 14:47:48.503266 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 14:47:48.503323 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 14:47:48.503377 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 14:47:48.503431 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 14:47:48.503484 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 14:47:48.503536 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1005 14:47:48.503592 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1006 14:47:48.503645 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1007 14:47:48.503698 0, [0] xxxoxoxx xxxxxxxx [MSB]
1008 14:47:48.503751 1, [0] xxxoxoxo xxxoxoxx [MSB]
1009 14:47:48.503805 2, [0] xxxoxoxo xxxoxoxx [MSB]
1010 14:47:48.503860 3, [0] xxxoxooo oxxoxoox [MSB]
1011 14:47:48.503916 4, [0] xxxoxooo oxxoxoox [MSB]
1012 14:47:48.503970 5, [0] xxxoxooo ooxooooo [MSB]
1013 14:47:48.504023 6, [0] xxxooooo ooxooooo [MSB]
1014 14:47:48.504083 7, [0] xxoooooo ooxooooo [MSB]
1015 14:47:48.504137 8, [0] xooooooo oooooooo [MSB]
1016 14:47:48.504190 9, [0] xooooooo oooooooo [MSB]
1017 14:47:48.504244 10, [0] xooooooo oooooooo [MSB]
1018 14:47:48.504297 32, [0] oooxoooo oooooooo [MSB]
1019 14:47:48.504353 33, [0] oooxoooo oooooxoo [MSB]
1020 14:47:48.504407 34, [0] oooxoxxo oooooxxo [MSB]
1021 14:47:48.504460 35, [0] oooxoxxx xooooxxo [MSB]
1022 14:47:48.504513 36, [0] oooxoxxx xooxoxxo [MSB]
1023 14:47:48.504566 37, [0] oooxoxxx xxoxxxxx [MSB]
1024 14:47:48.504622 38, [0] oooxoxxx xxoxxxxx [MSB]
1025 14:47:48.504681 39, [0] oooxoxxx xxoxxxxx [MSB]
1026 14:47:48.504736 40, [0] oooxoxxx xxoxxxxx [MSB]
1027 14:47:48.504790 41, [0] xxxxxxxx xxoxxxxx [MSB]
1028 14:47:48.504846 42, [0] xxxxxxxx xxxxxxxx [MSB]
1029 14:47:48.504900 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
1030 14:47:48.504953 iDelay=42, Bit 1, Center 24 (8 ~ 40) 33
1031 14:47:48.505004 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
1032 14:47:48.505058 iDelay=42, Bit 3, Center 15 (-1 ~ 31) 33
1033 14:47:48.505110 iDelay=42, Bit 4, Center 23 (6 ~ 40) 35
1034 14:47:48.505162 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
1035 14:47:48.505213 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
1036 14:47:48.505273 iDelay=42, Bit 7, Center 17 (1 ~ 34) 34
1037 14:47:48.505328 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
1038 14:47:48.505381 iDelay=42, Bit 9, Center 20 (5 ~ 36) 32
1039 14:47:48.505433 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
1040 14:47:48.505484 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
1041 14:47:48.505536 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
1042 14:47:48.505590 iDelay=42, Bit 13, Center 16 (1 ~ 32) 32
1043 14:47:48.505641 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1044 14:47:48.505693 iDelay=42, Bit 15, Center 20 (5 ~ 36) 32
1045 14:47:48.505744 ==
1046 14:47:48.505796 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1047 14:47:48.505851 fsp= 1, odt_onoff= 1, Byte mode= 0
1048 14:47:48.505905 ==
1049 14:47:48.505957 DQS Delay:
1050 14:47:48.506008 DQS0 = 0, DQS1 = 0
1051 14:47:48.506062 DQM Delay:
1052 14:47:48.506114 DQM0 = 20, DQM1 = 19
1053 14:47:48.506165 DQ Delay:
1054 14:47:48.506217 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1055 14:47:48.506269 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =17
1056 14:47:48.506323 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
1057 14:47:48.506376 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1058 14:47:48.506427
1059 14:47:48.506478
1060 14:47:48.506530 DramC Write-DBI off
1061 14:47:48.506584 ==
1062 14:47:48.506635 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1063 14:47:48.506686 fsp= 1, odt_onoff= 1, Byte mode= 0
1064 14:47:48.506738 ==
1065 14:47:48.506789 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1066 14:47:48.506843
1067 14:47:48.506896 Begin, DQ Scan Range 923~1179
1068 14:47:48.506948
1069 14:47:48.506998
1070 14:47:48.507049 TX Vref Scan disable
1071 14:47:48.507103 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1072 14:47:48.507349 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1073 14:47:48.507412 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1074 14:47:48.507466 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1075 14:47:48.507553 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1076 14:47:48.507642 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1077 14:47:48.507695 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1078 14:47:48.507749 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1079 14:47:48.507801 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1080 14:47:48.507857 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1081 14:47:48.507911 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1082 14:47:48.507963 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1083 14:47:48.508034 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1084 14:47:48.508104 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1085 14:47:48.508157 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1086 14:47:48.508210 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1087 14:47:48.508262 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1088 14:47:48.508317 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1089 14:47:48.508370 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1090 14:47:48.508424 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1091 14:47:48.508494 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1092 14:47:48.508549 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1093 14:47:48.508605 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1094 14:47:48.508658 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1095 14:47:48.508711 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1096 14:47:48.508764 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1097 14:47:48.508819 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1098 14:47:48.508873 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1099 14:47:48.508925 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1100 14:47:48.508978 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1101 14:47:48.509031 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1102 14:47:48.509086 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1103 14:47:48.509138 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1104 14:47:48.509191 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1105 14:47:48.509243 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1106 14:47:48.509310 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1107 14:47:48.509364 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1108 14:47:48.509419 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1109 14:47:48.509472 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1110 14:47:48.509524 962 |3 6 2|[0] xxxxxxxx oxxoxoxx [MSB]
1111 14:47:48.509580 963 |3 6 3|[0] xxxxxxxx oxxoooxx [MSB]
1112 14:47:48.509632 964 |3 6 4|[0] xxxxxxxx ooxoooxx [MSB]
1113 14:47:48.509685 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1114 14:47:48.509738 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1115 14:47:48.509791 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1116 14:47:48.509847 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1117 14:47:48.509901 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1118 14:47:48.509954 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1119 14:47:48.510006 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1120 14:47:48.510061 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1121 14:47:48.510115 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1122 14:47:48.510168 974 |3 6 14|[0] xxxoooox oooooooo [MSB]
1123 14:47:48.510220 975 |3 6 15|[0] xxxooooo oooooooo [MSB]
1124 14:47:48.510273 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1125 14:47:48.510328 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1126 14:47:48.510382 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1127 14:47:48.510435 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1128 14:47:48.510488 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1129 14:47:48.510540 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1130 14:47:48.510597 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1131 14:47:48.510649 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1132 14:47:48.510702 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1133 14:47:48.510755 Byte0, DQ PI dly=982, DQM PI dly= 982
1134 14:47:48.510810 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1135 14:47:48.510863
1136 14:47:48.510916 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1137 14:47:48.510969
1138 14:47:48.511020 Byte1, DQ PI dly=974, DQM PI dly= 974
1139 14:47:48.511075 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1140 14:47:48.511127
1141 14:47:48.511178 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1142 14:47:48.511230
1143 14:47:48.511281 ==
1144 14:47:48.511337 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1145 14:47:48.511391 fsp= 1, odt_onoff= 1, Byte mode= 0
1146 14:47:48.511443 ==
1147 14:47:48.511495 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1148 14:47:48.511550
1149 14:47:48.511601 Begin, DQ Scan Range 950~1014
1150 14:47:48.511653 Write Rank0 MR14 =0x0
1151 14:47:48.511704
1152 14:47:48.511756 CH=0, VrefRange= 0, VrefLevel = 0
1153 14:47:48.511809 TX Bit0 (978~994) 17 986, Bit8 (965~983) 19 974,
1154 14:47:48.511864 TX Bit1 (977~993) 17 985, Bit9 (967~983) 17 975,
1155 14:47:48.511918 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1156 14:47:48.511970 TX Bit3 (971~986) 16 978, Bit11 (965~983) 19 974,
1157 14:47:48.512021 TX Bit4 (977~993) 17 985, Bit12 (966~983) 18 974,
1158 14:47:48.512095 TX Bit5 (973~988) 16 980, Bit13 (965~982) 18 973,
1159 14:47:48.512150 TX Bit6 (974~989) 16 981, Bit14 (967~983) 17 975,
1160 14:47:48.512202 TX Bit7 (977~991) 15 984, Bit15 (969~984) 16 976,
1161 14:47:48.512254
1162 14:47:48.512307 Write Rank0 MR14 =0x2
1163 14:47:48.512360
1164 14:47:48.512413 CH=0, VrefRange= 0, VrefLevel = 2
1165 14:47:48.512465 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1166 14:47:48.512517 TX Bit1 (977~994) 18 985, Bit9 (966~984) 19 975,
1167 14:47:48.512571 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1168 14:47:48.512623 TX Bit3 (971~987) 17 979, Bit11 (964~983) 20 973,
1169 14:47:48.512676 TX Bit4 (976~994) 19 985, Bit12 (966~983) 18 974,
1170 14:47:48.512728 TX Bit5 (972~988) 17 980, Bit13 (965~982) 18 973,
1171 14:47:48.512780 TX Bit6 (974~989) 16 981, Bit14 (967~983) 17 975,
1172 14:47:48.512835 TX Bit7 (977~991) 15 984, Bit15 (968~985) 18 976,
1173 14:47:48.512889
1174 14:47:48.512940 Write Rank0 MR14 =0x4
1175 14:47:48.512992
1176 14:47:48.513043 CH=0, VrefRange= 0, VrefLevel = 4
1177 14:47:48.513098 TX Bit0 (978~995) 18 986, Bit8 (964~984) 21 974,
1178 14:47:48.513150 TX Bit1 (976~994) 19 985, Bit9 (966~984) 19 975,
1179 14:47:48.513412 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1180 14:47:48.513474 TX Bit3 (970~987) 18 978, Bit11 (963~983) 21 973,
1181 14:47:48.513557 TX Bit4 (976~994) 19 985, Bit12 (966~984) 19 975,
1182 14:47:48.513628 TX Bit5 (972~989) 18 980, Bit13 (965~983) 19 974,
1183 14:47:48.513699 TX Bit6 (973~990) 18 981, Bit14 (966~984) 19 975,
1184 14:47:48.513782 TX Bit7 (976~992) 17 984, Bit15 (968~986) 19 977,
1185 14:47:48.513868
1186 14:47:48.513936 Write Rank0 MR14 =0x6
1187 14:47:48.514006
1188 14:47:48.514093 CH=0, VrefRange= 0, VrefLevel = 6
1189 14:47:48.514146 TX Bit0 (977~996) 20 986, Bit8 (964~984) 21 974,
1190 14:47:48.514199 TX Bit1 (977~994) 18 985, Bit9 (965~984) 20 974,
1191 14:47:48.514253 TX Bit2 (976~994) 19 985, Bit10 (969~989) 21 979,
1192 14:47:48.514306 TX Bit3 (970~987) 18 978, Bit11 (963~984) 22 973,
1193 14:47:48.514361 TX Bit4 (975~994) 20 984, Bit12 (965~984) 20 974,
1194 14:47:48.514416 TX Bit5 (971~990) 20 980, Bit13 (964~983) 20 973,
1195 14:47:48.514469 TX Bit6 (973~991) 19 982, Bit14 (966~984) 19 975,
1196 14:47:48.514522 TX Bit7 (976~992) 17 984, Bit15 (968~987) 20 977,
1197 14:47:48.514577
1198 14:47:48.514629 Write Rank0 MR14 =0x8
1199 14:47:48.514681
1200 14:47:48.514733 CH=0, VrefRange= 0, VrefLevel = 8
1201 14:47:48.514786 TX Bit0 (977~996) 20 986, Bit8 (963~984) 22 973,
1202 14:47:48.514841 TX Bit1 (977~994) 18 985, Bit9 (965~984) 20 974,
1203 14:47:48.514897 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1204 14:47:48.514950 TX Bit3 (970~988) 19 979, Bit11 (963~984) 22 973,
1205 14:47:48.515003 TX Bit4 (975~995) 21 985, Bit12 (965~985) 21 975,
1206 14:47:48.515059 TX Bit5 (971~991) 21 981, Bit13 (964~983) 20 973,
1207 14:47:48.515112 TX Bit6 (972~991) 20 981, Bit14 (966~985) 20 975,
1208 14:47:48.515166 TX Bit7 (976~992) 17 984, Bit15 (968~987) 20 977,
1209 14:47:48.515218
1210 14:47:48.515270 Write Rank0 MR14 =0xa
1211 14:47:48.515326
1212 14:47:48.515380 CH=0, VrefRange= 0, VrefLevel = 10
1213 14:47:48.515433 TX Bit0 (977~997) 21 987, Bit8 (963~985) 23 974,
1214 14:47:48.515487 TX Bit1 (976~995) 20 985, Bit9 (965~985) 21 975,
1215 14:47:48.515541 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1216 14:47:48.515597 TX Bit3 (970~989) 20 979, Bit11 (962~984) 23 973,
1217 14:47:48.515664 TX Bit4 (975~995) 21 985, Bit12 (964~985) 22 974,
1218 14:47:48.515731 TX Bit5 (971~991) 21 981, Bit13 (963~984) 22 973,
1219 14:47:48.515787 TX Bit6 (972~991) 20 981, Bit14 (966~986) 21 976,
1220 14:47:48.515842 TX Bit7 (976~993) 18 984, Bit15 (968~988) 21 978,
1221 14:47:48.515896
1222 14:47:48.515948 Write Rank0 MR14 =0xc
1223 14:47:48.516000
1224 14:47:48.516051 CH=0, VrefRange= 0, VrefLevel = 12
1225 14:47:48.516106 TX Bit0 (977~997) 21 987, Bit8 (963~985) 23 974,
1226 14:47:48.516158 TX Bit1 (976~995) 20 985, Bit9 (964~985) 22 974,
1227 14:47:48.516210 TX Bit2 (976~995) 20 985, Bit10 (968~990) 23 979,
1228 14:47:48.516262 TX Bit3 (969~990) 22 979, Bit11 (962~985) 24 973,
1229 14:47:48.516317 TX Bit4 (975~996) 22 985, Bit12 (964~985) 22 974,
1230 14:47:48.516368 TX Bit5 (971~991) 21 981, Bit13 (963~984) 22 973,
1231 14:47:48.516423 TX Bit6 (971~992) 22 981, Bit14 (965~986) 22 975,
1232 14:47:48.516491 TX Bit7 (975~993) 19 984, Bit15 (968~989) 22 978,
1233 14:47:48.516557
1234 14:47:48.516611 Write Rank0 MR14 =0xe
1235 14:47:48.516693
1236 14:47:48.516744 CH=0, VrefRange= 0, VrefLevel = 14
1237 14:47:48.516795 TX Bit0 (977~997) 21 987, Bit8 (962~985) 24 973,
1238 14:47:48.516850 TX Bit1 (976~996) 21 986, Bit9 (963~986) 24 974,
1239 14:47:48.516904 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1240 14:47:48.516955 TX Bit3 (969~991) 23 980, Bit11 (962~985) 24 973,
1241 14:47:48.517008 TX Bit4 (974~996) 23 985, Bit12 (963~986) 24 974,
1242 14:47:48.517061 TX Bit5 (970~991) 22 980, Bit13 (962~984) 23 973,
1243 14:47:48.517114 TX Bit6 (971~992) 22 981, Bit14 (965~987) 23 976,
1244 14:47:48.517166 TX Bit7 (975~994) 20 984, Bit15 (967~989) 23 978,
1245 14:47:48.517217
1246 14:47:48.517296 Write Rank0 MR14 =0x10
1247 14:47:48.517367
1248 14:47:48.517418 CH=0, VrefRange= 0, VrefLevel = 16
1249 14:47:48.517470 TX Bit0 (976~998) 23 987, Bit8 (962~986) 25 974,
1250 14:47:48.517522 TX Bit1 (976~996) 21 986, Bit9 (963~986) 24 974,
1251 14:47:48.517576 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1252 14:47:48.517628 TX Bit3 (969~991) 23 980, Bit11 (962~986) 25 974,
1253 14:47:48.517680 TX Bit4 (974~996) 23 985, Bit12 (965~986) 22 975,
1254 14:47:48.517731 TX Bit5 (970~992) 23 981, Bit13 (962~985) 24 973,
1255 14:47:48.517783 TX Bit6 (970~992) 23 981, Bit14 (965~988) 24 976,
1256 14:47:48.517838 TX Bit7 (975~994) 20 984, Bit15 (967~989) 23 978,
1257 14:47:48.517891
1258 14:47:48.517941 Write Rank0 MR14 =0x12
1259 14:47:48.517992
1260 14:47:48.518043 CH=0, VrefRange= 0, VrefLevel = 18
1261 14:47:48.518097 TX Bit0 (976~999) 24 987, Bit8 (962~987) 26 974,
1262 14:47:48.518149 TX Bit1 (976~997) 22 986, Bit9 (963~987) 25 975,
1263 14:47:48.518201 TX Bit2 (975~996) 22 985, Bit10 (968~991) 24 979,
1264 14:47:48.518253 TX Bit3 (969~991) 23 980, Bit11 (961~986) 26 973,
1265 14:47:48.518305 TX Bit4 (974~997) 24 985, Bit12 (963~987) 25 975,
1266 14:47:48.518359 TX Bit5 (970~992) 23 981, Bit13 (962~986) 25 974,
1267 14:47:48.518413 TX Bit6 (970~993) 24 981, Bit14 (964~988) 25 976,
1268 14:47:48.518465 TX Bit7 (974~994) 21 984, Bit15 (967~989) 23 978,
1269 14:47:48.518516
1270 14:47:48.518570 Write Rank0 MR14 =0x14
1271 14:47:48.518621
1272 14:47:48.518672 CH=0, VrefRange= 0, VrefLevel = 20
1273 14:47:48.518724 TX Bit0 (976~999) 24 987, Bit8 (962~987) 26 974,
1274 14:47:48.518777 TX Bit1 (976~997) 22 986, Bit9 (963~988) 26 975,
1275 14:47:48.518831 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1276 14:47:48.518885 TX Bit3 (969~992) 24 980, Bit11 (962~986) 25 974,
1277 14:47:48.518937 TX Bit4 (973~998) 26 985, Bit12 (962~988) 27 975,
1278 14:47:48.518989 TX Bit5 (970~992) 23 981, Bit13 (962~986) 25 974,
1279 14:47:48.519231 TX Bit6 (970~993) 24 981, Bit14 (963~988) 26 975,
1280 14:47:48.519349 TX Bit7 (973~995) 23 984, Bit15 (966~990) 25 978,
1281 14:47:48.519405
1282 14:47:48.519458 Write Rank0 MR14 =0x16
1283 14:47:48.519511
1284 14:47:48.519566 CH=0, VrefRange= 0, VrefLevel = 22
1285 14:47:48.519620 TX Bit0 (976~999) 24 987, Bit8 (961~986) 26 973,
1286 14:47:48.519673 TX Bit1 (975~998) 24 986, Bit9 (962~988) 27 975,
1287 14:47:48.519726 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
1288 14:47:48.519792 TX Bit3 (968~992) 25 980, Bit11 (961~987) 27 974,
1289 14:47:48.519847 TX Bit4 (974~999) 26 986, Bit12 (962~988) 27 975,
1290 14:47:48.519901 TX Bit5 (969~993) 25 981, Bit13 (961~986) 26 973,
1291 14:47:48.519953 TX Bit6 (970~993) 24 981, Bit14 (963~988) 26 975,
1292 14:47:48.520005 TX Bit7 (973~995) 23 984, Bit15 (966~990) 25 978,
1293 14:47:48.520061
1294 14:47:48.520113 Write Rank0 MR14 =0x18
1295 14:47:48.520164
1296 14:47:48.520215 CH=0, VrefRange= 0, VrefLevel = 24
1297 14:47:48.520266 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1298 14:47:48.520321 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1299 14:47:48.520392 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
1300 14:47:48.520445 TX Bit3 (968~992) 25 980, Bit11 (961~987) 27 974,
1301 14:47:48.520498 TX Bit4 (974~999) 26 986, Bit12 (962~988) 27 975,
1302 14:47:48.520551 TX Bit5 (969~993) 25 981, Bit13 (961~987) 27 974,
1303 14:47:48.520606 TX Bit6 (970~994) 25 982, Bit14 (963~987) 25 975,
1304 14:47:48.520673 TX Bit7 (973~996) 24 984, Bit15 (966~990) 25 978,
1305 14:47:48.520724
1306 14:47:48.520775 Write Rank0 MR14 =0x1a
1307 14:47:48.520829
1308 14:47:48.520881 CH=0, VrefRange= 0, VrefLevel = 26
1309 14:47:48.520933 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1310 14:47:48.520985 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1311 14:47:48.521037 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
1312 14:47:48.521091 TX Bit3 (968~992) 25 980, Bit11 (961~987) 27 974,
1313 14:47:48.521144 TX Bit4 (974~999) 26 986, Bit12 (962~988) 27 975,
1314 14:47:48.521195 TX Bit5 (969~993) 25 981, Bit13 (961~987) 27 974,
1315 14:47:48.521247 TX Bit6 (970~994) 25 982, Bit14 (963~987) 25 975,
1316 14:47:48.521346 TX Bit7 (973~996) 24 984, Bit15 (966~990) 25 978,
1317 14:47:48.521400
1318 14:47:48.521451 Write Rank0 MR14 =0x1c
1319 14:47:48.521502
1320 14:47:48.521553 CH=0, VrefRange= 0, VrefLevel = 28
1321 14:47:48.521608 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1322 14:47:48.521660 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1323 14:47:48.521711 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
1324 14:47:48.521763 TX Bit3 (968~992) 25 980, Bit11 (961~987) 27 974,
1325 14:47:48.521818 TX Bit4 (974~999) 26 986, Bit12 (962~988) 27 975,
1326 14:47:48.521871 TX Bit5 (969~993) 25 981, Bit13 (961~987) 27 974,
1327 14:47:48.521923 TX Bit6 (970~994) 25 982, Bit14 (963~987) 25 975,
1328 14:47:48.521975 TX Bit7 (973~996) 24 984, Bit15 (966~990) 25 978,
1329 14:47:48.522027
1330 14:47:48.522080 Write Rank0 MR14 =0x1e
1331 14:47:48.522132
1332 14:47:48.522183 CH=0, VrefRange= 0, VrefLevel = 30
1333 14:47:48.522234 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1334 14:47:48.522286 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1335 14:47:48.522341 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
1336 14:47:48.522395 TX Bit3 (968~992) 25 980, Bit11 (961~987) 27 974,
1337 14:47:48.522447 TX Bit4 (974~999) 26 986, Bit12 (962~988) 27 975,
1338 14:47:48.522498 TX Bit5 (969~993) 25 981, Bit13 (961~987) 27 974,
1339 14:47:48.522550 TX Bit6 (970~994) 25 982, Bit14 (963~987) 25 975,
1340 14:47:48.522604 TX Bit7 (973~996) 24 984, Bit15 (966~990) 25 978,
1341 14:47:48.522656
1342 14:47:48.522718
1343 14:47:48.522815 TX Vref found, early break! 376< 386
1344 14:47:48.522873 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1345 14:47:48.522928 u1DelayCellOfst[0]=8 cells (7 PI)
1346 14:47:48.522980 u1DelayCellOfst[1]=7 cells (6 PI)
1347 14:47:48.523032 u1DelayCellOfst[2]=7 cells (6 PI)
1348 14:47:48.523087 u1DelayCellOfst[3]=0 cells (0 PI)
1349 14:47:48.523140 u1DelayCellOfst[4]=7 cells (6 PI)
1350 14:47:48.523209 u1DelayCellOfst[5]=1 cells (1 PI)
1351 14:47:48.523276 u1DelayCellOfst[6]=2 cells (2 PI)
1352 14:47:48.523331 u1DelayCellOfst[7]=5 cells (4 PI)
1353 14:47:48.523384 Byte0, DQ PI dly=980, DQM PI dly= 983
1354 14:47:48.523436 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1355 14:47:48.523488
1356 14:47:48.523539 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1357 14:47:48.523594
1358 14:47:48.523645 u1DelayCellOfst[8]=0 cells (0 PI)
1359 14:47:48.523696 u1DelayCellOfst[9]=2 cells (2 PI)
1360 14:47:48.523748 u1DelayCellOfst[10]=7 cells (6 PI)
1361 14:47:48.523799 u1DelayCellOfst[11]=1 cells (1 PI)
1362 14:47:48.523853 u1DelayCellOfst[12]=2 cells (2 PI)
1363 14:47:48.523913 u1DelayCellOfst[13]=1 cells (1 PI)
1364 14:47:48.523967 u1DelayCellOfst[14]=2 cells (2 PI)
1365 14:47:48.524018 u1DelayCellOfst[15]=6 cells (5 PI)
1366 14:47:48.524073 Byte1, DQ PI dly=973, DQM PI dly= 976
1367 14:47:48.524124 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1368 14:47:48.524177
1369 14:47:48.524228 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1370 14:47:48.524279
1371 14:47:48.524333 Write Rank0 MR14 =0x18
1372 14:47:48.524386
1373 14:47:48.524436 Final TX Range 0 Vref 24
1374 14:47:48.524488
1375 14:47:48.524539 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1376 14:47:48.524595
1377 14:47:48.524663 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1378 14:47:48.524728 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1379 14:47:48.524779 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1380 14:47:48.524833 Write Rank0 MR3 =0xb0
1381 14:47:48.524886 DramC Write-DBI on
1382 14:47:48.524937 ==
1383 14:47:48.524988 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1384 14:47:48.525040 fsp= 1, odt_onoff= 1, Byte mode= 0
1385 14:47:48.525094 ==
1386 14:47:48.525145 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1387 14:47:48.525197
1388 14:47:48.525247 Begin, DQ Scan Range 696~760
1389 14:47:48.525341
1390 14:47:48.525394
1391 14:47:48.525637 TX Vref Scan disable
1392 14:47:48.525712 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1393 14:47:48.525768 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1394 14:47:48.525825 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1395 14:47:48.525881 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1396 14:47:48.525935 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1397 14:47:48.525988 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1398 14:47:48.526042 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1399 14:47:48.526111 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1400 14:47:48.526164 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1401 14:47:48.526217 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1402 14:47:48.526269 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1403 14:47:48.526324 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1404 14:47:48.526378 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1405 14:47:48.526431 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1406 14:47:48.526483 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1407 14:47:48.526536 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1408 14:47:48.526591 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1409 14:47:48.526658 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1410 14:47:48.526711 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1411 14:47:48.526778 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1412 14:47:48.526833 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1413 14:47:48.526887 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1414 14:47:48.526939 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1415 14:47:48.526992 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1416 14:47:48.527044 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1417 14:47:48.527099 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1418 14:47:48.527169 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1419 14:47:48.527224 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1420 14:47:48.527276 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1421 14:47:48.527333 Byte0, DQ PI dly=728, DQM PI dly= 728
1422 14:47:48.527386 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
1423 14:47:48.527437
1424 14:47:48.527489 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
1425 14:47:48.527540
1426 14:47:48.527594 Byte1, DQ PI dly=718, DQM PI dly= 718
1427 14:47:48.527645 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1428 14:47:48.527697
1429 14:47:48.527747 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1430 14:47:48.527798
1431 14:47:48.527851 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1432 14:47:48.527904 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1433 14:47:48.527957 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1434 14:47:48.528026 Write Rank0 MR3 =0x30
1435 14:47:48.528099 DramC Write-DBI off
1436 14:47:48.528150
1437 14:47:48.528201 [DATLAT]
1438 14:47:48.528252 Freq=1600, CH0 RK0, use_rxtx_scan=0
1439 14:47:48.528304
1440 14:47:48.528356 DATLAT Default: 0xf
1441 14:47:48.528409 7, 0xFFFF, sum=0
1442 14:47:48.528461 8, 0xFFFF, sum=0
1443 14:47:48.528512 9, 0xFFFF, sum=0
1444 14:47:48.528564 10, 0xFFFF, sum=0
1445 14:47:48.528619 11, 0xFFFF, sum=0
1446 14:47:48.528670 12, 0xFFFF, sum=0
1447 14:47:48.528721 13, 0xFFFF, sum=0
1448 14:47:48.528772 14, 0x0, sum=1
1449 14:47:48.528827 15, 0x0, sum=2
1450 14:47:48.528879 16, 0x0, sum=3
1451 14:47:48.528931 17, 0x0, sum=4
1452 14:47:48.528983 pattern=2 first_step=14 total pass=5 best_step=16
1453 14:47:48.529034 ==
1454 14:47:48.529088 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1455 14:47:48.529160 fsp= 1, odt_onoff= 1, Byte mode= 0
1456 14:47:48.529242 ==
1457 14:47:48.529343 Start DQ dly to find pass range UseTestEngine =1
1458 14:47:48.529399 x-axis: bit #, y-axis: DQ dly (-127~63)
1459 14:47:48.529451 RX Vref Scan = 1
1460 14:47:48.529502
1461 14:47:48.529556 RX Vref found, early break!
1462 14:47:48.529607
1463 14:47:48.529658 Final RX Vref 12, apply to both rank0 and 1
1464 14:47:48.529709 ==
1465 14:47:48.529761 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1466 14:47:48.529814 fsp= 1, odt_onoff= 1, Byte mode= 0
1467 14:47:48.529867 ==
1468 14:47:48.529918 DQS Delay:
1469 14:47:48.529969 DQS0 = 0, DQS1 = 0
1470 14:47:48.530020 DQM Delay:
1471 14:47:48.530073 DQM0 = 20, DQM1 = 18
1472 14:47:48.530124 DQ Delay:
1473 14:47:48.530174 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1474 14:47:48.530226 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1475 14:47:48.530277 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =16
1476 14:47:48.530330 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1477 14:47:48.530383
1478 14:47:48.530434
1479 14:47:48.530485
1480 14:47:48.530535 [DramC_TX_OE_Calibration] TA2
1481 14:47:48.530590 Original DQ_B0 (3 6) =30, OEN = 27
1482 14:47:48.530642 Original DQ_B1 (3 6) =30, OEN = 27
1483 14:47:48.530693 23, 0x0, End_B0=23 End_B1=23
1484 14:47:48.530745 24, 0x0, End_B0=24 End_B1=24
1485 14:47:48.530796 25, 0x0, End_B0=25 End_B1=25
1486 14:47:48.530850 26, 0x0, End_B0=26 End_B1=26
1487 14:47:48.530903 27, 0x0, End_B0=27 End_B1=27
1488 14:47:48.530955 28, 0x0, End_B0=28 End_B1=28
1489 14:47:48.531006 29, 0x0, End_B0=29 End_B1=29
1490 14:47:48.531058 30, 0x0, End_B0=30 End_B1=30
1491 14:47:48.531129 31, 0xFFFF, End_B0=30 End_B1=30
1492 14:47:48.531222 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1493 14:47:48.531324 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1494 14:47:48.531384
1495 14:47:48.531436
1496 14:47:48.531487 Write Rank0 MR23 =0x3f
1497 14:47:48.531538 [DQSOSC]
1498 14:47:48.531593 [DQSOSCAuto] RK0, (LSB)MR18= 0xae, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
1499 14:47:48.531645 CH0_RK0: MR19=0x3, MR18=0xAE, DQSOSC=334, MR23=63, INC=22, DEC=33
1500 14:47:48.531697 Write Rank0 MR23 =0x3f
1501 14:47:48.531749 [DQSOSC]
1502 14:47:48.531800 [DQSOSCAuto] RK0, (LSB)MR18= 0xa8, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1503 14:47:48.531855 CH0 RK0: MR19=3, MR18=A8
1504 14:47:48.531908 [RankSwap] Rank num 2, (Multi 1), Rank 1
1505 14:47:48.531959 Write Rank0 MR2 =0xad
1506 14:47:48.532010 [Write Leveling]
1507 14:47:48.532063 delay byte0 byte1 byte2 byte3
1508 14:47:48.532115
1509 14:47:48.532165 10 0 0
1510 14:47:48.532234 11 0 0
1511 14:47:48.532300 12 0 0
1512 14:47:48.532354 13 0 0
1513 14:47:48.532408 14 0 0
1514 14:47:48.532460 15 0 0
1515 14:47:48.532511 16 0 0
1516 14:47:48.532563 17 0 0
1517 14:47:48.532620 18 0 0
1518 14:47:48.532671 19 0 0
1519 14:47:48.532723 20 0 0
1520 14:47:48.532774 21 0 0
1521 14:47:48.532828 22 0 0
1522 14:47:48.532882 23 0 0
1523 14:47:48.532934 24 0 0
1524 14:47:48.532986 25 0 0
1525 14:47:48.533037 26 0 0
1526 14:47:48.533091 27 0 0
1527 14:47:48.533143 28 0 0
1528 14:47:48.533195 29 0 ff
1529 14:47:48.533272 30 0 ff
1530 14:47:48.533341 31 0 ff
1531 14:47:48.533395 32 0 ff
1532 14:47:48.533447 33 0 ff
1533 14:47:48.533499 34 ff ff
1534 14:47:48.533743 35 ff ff
1535 14:47:48.533858 36 ff ff
1536 14:47:48.533914 37 ff ff
1537 14:47:48.533968 38 ff ff
1538 14:47:48.534021 39 ff ff
1539 14:47:48.534078 40 ff ff
1540 14:47:48.534131 pass bytecount = 0xff (0xff: all bytes pass)
1541 14:47:48.534183
1542 14:47:48.534249 DQS0 dly: 34
1543 14:47:48.534300 DQS1 dly: 29
1544 14:47:48.534354 Write Rank0 MR2 =0x2d
1545 14:47:48.534407 [RankSwap] Rank num 2, (Multi 1), Rank 0
1546 14:47:48.534458 Write Rank1 MR1 =0xd6
1547 14:47:48.534509 [Gating]
1548 14:47:48.534562 ==
1549 14:47:48.534613 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1550 14:47:48.534664 fsp= 1, odt_onoff= 1, Byte mode= 0
1551 14:47:48.534715 ==
1552 14:47:48.534765 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1553 14:47:48.534820 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1554 14:47:48.534874 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1555 14:47:48.534926 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1556 14:47:48.534979 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1557 14:47:48.535030 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1558 14:47:48.535085 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1559 14:47:48.535154 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1560 14:47:48.535219 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1561 14:47:48.535271 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1562 14:47:48.535326 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(0 0)(0 0)| 0
1563 14:47:48.535380 3 2 12 |201 2c2c |(11 11)(11 10) |(0 0)(0 0)| 0
1564 14:47:48.535449 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1565 14:47:48.535515 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1566 14:47:48.535569 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1567 14:47:48.535621 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1568 14:47:48.535673 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1569 14:47:48.535728 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1570 14:47:48.535780 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1571 14:47:48.535835 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1572 14:47:48.535889 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1573 14:47:48.535940 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1574 14:47:48.535992 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1575 14:47:48.536076 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1576 14:47:48.536132 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1577 14:47:48.536184 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1578 14:47:48.536235 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1579 14:47:48.536287 3 4 12 |908 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1580 14:47:48.536342 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1581 14:47:48.536396 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 14:47:48.536447 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 14:47:48.536498 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 14:47:48.536550 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 14:47:48.536605 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 14:47:48.536657 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 14:47:48.536708 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 14:47:48.536760 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 14:47:48.536813 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 14:47:48.536865 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 14:47:48.536919 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 14:47:48.536970 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1593 14:47:48.537021 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1594 14:47:48.537076 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1595 14:47:48.537127 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1596 14:47:48.537178 [Byte 0] Lead/lag Transition tap number (2)
1597 14:47:48.537229 3 6 8 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1598 14:47:48.537318 [Byte 1] Lead/lag Transition tap number (3)
1599 14:47:48.537387 3 6 12 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1600 14:47:48.537439 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
1601 14:47:48.537492 [Byte 0]First pass (3, 6, 16)
1602 14:47:48.537543 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 14:47:48.537598 [Byte 1]First pass (3, 6, 20)
1604 14:47:48.537648 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 14:47:48.537700 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 14:47:48.537751 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 14:47:48.537803 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 14:47:48.537858 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 14:47:48.537911 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1610 14:47:48.537963 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 14:47:48.538014 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 14:47:48.538068 All bytes gating window > 1UI, Early break!
1613 14:47:48.538120
1614 14:47:48.538171 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1615 14:47:48.538222
1616 14:47:48.538272 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1617 14:47:48.538326
1618 14:47:48.538378
1619 14:47:48.538428
1620 14:47:48.538478 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1621 14:47:48.538529
1622 14:47:48.538583 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1623 14:47:48.538650
1624 14:47:48.538713
1625 14:47:48.538763 Write Rank1 MR1 =0x56
1626 14:47:48.538816
1627 14:47:48.538867 best RODT dly(2T, 0.5T) = (2, 3)
1628 14:47:48.538919
1629 14:47:48.538969 best RODT dly(2T, 0.5T) = (2, 3)
1630 14:47:48.539020 ==
1631 14:47:48.539073 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1632 14:47:48.539134 fsp= 1, odt_onoff= 1, Byte mode= 0
1633 14:47:48.539187 ==
1634 14:47:48.539238 Start DQ dly to find pass range UseTestEngine =0
1635 14:47:48.539290 x-axis: bit #, y-axis: DQ dly (-127~63)
1636 14:47:48.539376 RX Vref Scan = 0
1637 14:47:48.539427 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1638 14:47:48.539480 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1639 14:47:48.539532 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1640 14:47:48.539586 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1641 14:47:48.539637 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1642 14:47:48.539689 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1643 14:47:48.539740 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1644 14:47:48.539988 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1645 14:47:48.540047 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1646 14:47:48.540103 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1647 14:47:48.540156 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1648 14:47:48.540208 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1649 14:47:48.540260 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1650 14:47:48.540315 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1651 14:47:48.540367 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1652 14:47:48.540421 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1653 14:47:48.540473 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1654 14:47:48.540525 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1655 14:47:48.540579 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1656 14:47:48.540631 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1657 14:47:48.540704 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1658 14:47:48.540808 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1659 14:47:48.540865 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1660 14:47:48.540919 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1661 14:47:48.540980 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1662 14:47:48.541032 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1663 14:47:48.541086 0, [0] xxxoxoxx xxxoxoxx [MSB]
1664 14:47:48.541139 1, [0] xxxoxoxx oxxoxoxx [MSB]
1665 14:47:48.541190 2, [0] xxxoxoxx ooxoooox [MSB]
1666 14:47:48.541242 3, [0] xxxoxooo ooxoooox [MSB]
1667 14:47:48.541356 4, [0] xxxoxooo ooxooooo [MSB]
1668 14:47:48.541412 5, [0] xxxoxooo ooxooooo [MSB]
1669 14:47:48.541464 6, [0] xxxoxooo oooooooo [MSB]
1670 14:47:48.541516 7, [0] xoxooooo oooooooo [MSB]
1671 14:47:48.541571 8, [0] xooooooo oooooooo [MSB]
1672 14:47:48.541623 9, [0] xooooooo oooooooo [MSB]
1673 14:47:48.541674 33, [0] oooooooo oooooooo [MSB]
1674 14:47:48.541726 34, [0] oooxoooo oooooooo [MSB]
1675 14:47:48.541778 35, [0] oooxooxo oooooxxo [MSB]
1676 14:47:48.541833 36, [0] oooxooxx xooxoxxo [MSB]
1677 14:47:48.541888 37, [0] oooxoxxx xxoxxxxo [MSB]
1678 14:47:48.541940 38, [0] oooxoxxx xxoxxxxo [MSB]
1679 14:47:48.541992 39, [0] oooxoxxx xxoxxxxx [MSB]
1680 14:47:48.542043 40, [0] oooxoxxx xxoxxxxx [MSB]
1681 14:47:48.542099 41, [0] xooxxxxx xxoxxxxx [MSB]
1682 14:47:48.542150 42, [0] xoxxxxxx xxoxxxxx [MSB]
1683 14:47:48.542202 43, [0] xxxxxxxx xxxxxxxx [MSB]
1684 14:47:48.542254 iDelay=43, Bit 0, Center 25 (10 ~ 40) 31
1685 14:47:48.542307 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
1686 14:47:48.542359 iDelay=43, Bit 2, Center 24 (8 ~ 41) 34
1687 14:47:48.542411 iDelay=43, Bit 3, Center 16 (0 ~ 33) 34
1688 14:47:48.542461 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34
1689 14:47:48.542511 iDelay=43, Bit 5, Center 18 (0 ~ 36) 37
1690 14:47:48.542564 iDelay=43, Bit 6, Center 18 (3 ~ 34) 32
1691 14:47:48.542615 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
1692 14:47:48.542666 iDelay=43, Bit 8, Center 18 (1 ~ 35) 35
1693 14:47:48.542716 iDelay=43, Bit 9, Center 19 (2 ~ 36) 35
1694 14:47:48.542767 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1695 14:47:48.542820 iDelay=43, Bit 11, Center 17 (0 ~ 35) 36
1696 14:47:48.542872 iDelay=43, Bit 12, Center 19 (2 ~ 36) 35
1697 14:47:48.542922 iDelay=43, Bit 13, Center 17 (0 ~ 34) 35
1698 14:47:48.542974 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
1699 14:47:48.543024 iDelay=43, Bit 15, Center 21 (4 ~ 38) 35
1700 14:47:48.543078 ==
1701 14:47:48.543129 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1702 14:47:48.543180 fsp= 1, odt_onoff= 1, Byte mode= 0
1703 14:47:48.543231 ==
1704 14:47:48.543282 DQS Delay:
1705 14:47:48.543370 DQS0 = 0, DQS1 = 0
1706 14:47:48.543441 DQM Delay:
1707 14:47:48.543494 DQM0 = 20, DQM1 = 19
1708 14:47:48.543545 DQ Delay:
1709 14:47:48.543600 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1710 14:47:48.543651 DQ4 =23, DQ5 =18, DQ6 =18, DQ7 =19
1711 14:47:48.543702 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17
1712 14:47:48.543753 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =21
1713 14:47:48.543804
1714 14:47:48.543857
1715 14:47:48.543909 DramC Write-DBI off
1716 14:47:48.543960 ==
1717 14:47:48.544011 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1718 14:47:48.544066 fsp= 1, odt_onoff= 1, Byte mode= 0
1719 14:47:48.544117 ==
1720 14:47:48.544168 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1721 14:47:48.544219
1722 14:47:48.544269 Begin, DQ Scan Range 925~1181
1723 14:47:48.544322
1724 14:47:48.544373
1725 14:47:48.544424 TX Vref Scan disable
1726 14:47:48.544475 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1727 14:47:48.544527 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1728 14:47:48.544583 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1729 14:47:48.544635 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1730 14:47:48.544687 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1731 14:47:48.544738 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1732 14:47:48.544790 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1733 14:47:48.544844 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1734 14:47:48.544898 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1735 14:47:48.544950 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1736 14:47:48.545001 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1737 14:47:48.545053 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1738 14:47:48.545108 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1739 14:47:48.545160 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1740 14:47:48.545211 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1741 14:47:48.545288 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1742 14:47:48.545359 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1743 14:47:48.545412 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1744 14:47:48.545465 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1745 14:47:48.545516 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1746 14:47:48.545570 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1747 14:47:48.545623 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1748 14:47:48.545675 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1749 14:47:48.545727 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1750 14:47:48.545778 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1751 14:47:48.545835 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1752 14:47:48.545889 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1753 14:47:48.545941 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1754 14:47:48.545993 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1755 14:47:48.546046 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1756 14:47:48.546101 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1757 14:47:48.546153 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1758 14:47:48.546205 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1759 14:47:48.546257 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1760 14:47:48.546311 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1761 14:47:48.546363 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1762 14:47:48.546417 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1763 14:47:48.546469 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1764 14:47:48.546711 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1765 14:47:48.546771 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1766 14:47:48.546827 965 |3 6 5|[0] xxxxxxxx xxxxxoxx [MSB]
1767 14:47:48.546881 966 |3 6 6|[0] xxxxxxxx xxxoxoxx [MSB]
1768 14:47:48.546934 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1769 14:47:48.546986 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1770 14:47:48.547038 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1771 14:47:48.547093 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1772 14:47:48.547145 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1773 14:47:48.547197 972 |3 6 12|[0] xxxoxxxx oooooooo [MSB]
1774 14:47:48.547249 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1775 14:47:48.547303 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1776 14:47:48.547356 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1777 14:47:48.547410 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1778 14:47:48.547462 977 |3 6 17|[0] xoxoxooo oooooooo [MSB]
1779 14:47:48.547514 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1780 14:47:48.547568 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1781 14:47:48.547620 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1782 14:47:48.547672 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1783 14:47:48.547724 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1784 14:47:48.547776 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1785 14:47:48.547830 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1786 14:47:48.547884 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1787 14:47:48.547936 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1788 14:47:48.547987 Byte0, DQ PI dly=985, DQM PI dly= 985
1789 14:47:48.548038 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1790 14:47:48.548093
1791 14:47:48.548143 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1792 14:47:48.548195
1793 14:47:48.548245 Byte1, DQ PI dly=978, DQM PI dly= 978
1794 14:47:48.548299 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1795 14:47:48.548350
1796 14:47:48.548402 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1797 14:47:48.548453
1798 14:47:48.548504 ==
1799 14:47:48.548555 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1800 14:47:48.548609 fsp= 1, odt_onoff= 1, Byte mode= 0
1801 14:47:48.548691 ==
1802 14:47:48.548742 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1803 14:47:48.548793
1804 14:47:48.548847 Begin, DQ Scan Range 954~1018
1805 14:47:48.548899 Write Rank1 MR14 =0x0
1806 14:47:48.548950
1807 14:47:48.549000 CH=0, VrefRange= 0, VrefLevel = 0
1808 14:47:48.549051 TX Bit0 (980~998) 19 989, Bit8 (968~985) 18 976,
1809 14:47:48.549105 TX Bit1 (979~997) 19 988, Bit9 (969~986) 18 977,
1810 14:47:48.549156 TX Bit2 (979~996) 18 987, Bit10 (973~990) 18 981,
1811 14:47:48.549210 TX Bit3 (974~991) 18 982, Bit11 (968~985) 18 976,
1812 14:47:48.549287 TX Bit4 (979~997) 19 988, Bit12 (968~986) 19 977,
1813 14:47:48.549358 TX Bit5 (977~991) 15 984, Bit13 (968~985) 18 976,
1814 14:47:48.549412 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1815 14:47:48.549463 TX Bit7 (978~994) 17 986, Bit15 (971~989) 19 980,
1816 14:47:48.549515
1817 14:47:48.549567 Write Rank1 MR14 =0x2
1818 14:47:48.549618
1819 14:47:48.549668 CH=0, VrefRange= 0, VrefLevel = 2
1820 14:47:48.549719 TX Bit0 (980~999) 20 989, Bit8 (968~986) 19 977,
1821 14:47:48.549770 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1822 14:47:48.549823 TX Bit2 (979~996) 18 987, Bit10 (972~990) 19 981,
1823 14:47:48.549876 TX Bit3 (974~992) 19 983, Bit11 (967~986) 20 976,
1824 14:47:48.549927 TX Bit4 (979~998) 20 988, Bit12 (968~987) 20 977,
1825 14:47:48.549978 TX Bit5 (977~991) 15 984, Bit13 (968~985) 18 976,
1826 14:47:48.550029 TX Bit6 (976~992) 17 984, Bit14 (968~986) 19 977,
1827 14:47:48.550083 TX Bit7 (978~993) 16 985, Bit15 (970~989) 20 979,
1828 14:47:48.550134
1829 14:47:48.550184 wait MRW command Rank1 MR14 =0x4 fired (1)
1830 14:47:48.550236 Write Rank1 MR14 =0x4
1831 14:47:48.550287
1832 14:47:48.550340 CH=0, VrefRange= 0, VrefLevel = 4
1833 14:47:48.550393 TX Bit0 (980~999) 20 989, Bit8 (968~986) 19 977,
1834 14:47:48.550444 TX Bit1 (978~998) 21 988, Bit9 (968~987) 20 977,
1835 14:47:48.550495 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
1836 14:47:48.550547 TX Bit3 (974~992) 19 983, Bit11 (967~986) 20 976,
1837 14:47:48.550601 TX Bit4 (979~998) 20 988, Bit12 (968~988) 21 978,
1838 14:47:48.550652 TX Bit5 (976~991) 16 983, Bit13 (967~985) 19 976,
1839 14:47:48.550703 TX Bit6 (976~993) 18 984, Bit14 (968~987) 20 977,
1840 14:47:48.550754 TX Bit7 (978~995) 18 986, Bit15 (971~989) 19 980,
1841 14:47:48.550805
1842 14:47:48.550858 Write Rank1 MR14 =0x6
1843 14:47:48.550910
1844 14:47:48.550960 CH=0, VrefRange= 0, VrefLevel = 6
1845 14:47:48.551011 TX Bit0 (979~999) 21 989, Bit8 (968~987) 20 977,
1846 14:47:48.551065 TX Bit1 (978~998) 21 988, Bit9 (968~988) 21 978,
1847 14:47:48.551116 TX Bit2 (978~998) 21 988, Bit10 (973~991) 19 982,
1848 14:47:48.551168 TX Bit3 (973~992) 20 982, Bit11 (967~987) 21 977,
1849 14:47:48.551219 TX Bit4 (978~998) 21 988, Bit12 (968~988) 21 978,
1850 14:47:48.551287 TX Bit5 (976~992) 17 984, Bit13 (967~986) 20 976,
1851 14:47:48.551342 TX Bit6 (975~994) 20 984, Bit14 (968~988) 21 978,
1852 14:47:48.551395 TX Bit7 (978~995) 18 986, Bit15 (970~990) 21 980,
1853 14:47:48.551446
1854 14:47:48.551496 Write Rank1 MR14 =0x8
1855 14:47:48.551546
1856 14:47:48.551599 CH=0, VrefRange= 0, VrefLevel = 8
1857 14:47:48.551649 TX Bit0 (979~999) 21 989, Bit8 (968~988) 21 978,
1858 14:47:48.551701 TX Bit1 (978~998) 21 988, Bit9 (968~989) 22 978,
1859 14:47:48.551752 TX Bit2 (978~998) 21 988, Bit10 (971~991) 21 981,
1860 14:47:48.551828 TX Bit3 (972~993) 22 982, Bit11 (966~988) 23 977,
1861 14:47:48.551883 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1862 14:47:48.551934 TX Bit5 (976~992) 17 984, Bit13 (967~986) 20 976,
1863 14:47:48.551985 TX Bit6 (975~994) 20 984, Bit14 (968~988) 21 978,
1864 14:47:48.552037 TX Bit7 (978~995) 18 986, Bit15 (970~990) 21 980,
1865 14:47:48.552091
1866 14:47:48.552154 Write Rank1 MR14 =0xa
1867 14:47:48.552227
1868 14:47:48.552281 CH=0, VrefRange= 0, VrefLevel = 10
1869 14:47:48.552335 TX Bit0 (978~1000) 23 989, Bit8 (967~988) 22 977,
1870 14:47:48.552389 TX Bit1 (978~999) 22 988, Bit9 (968~989) 22 978,
1871 14:47:48.552633 TX Bit2 (978~998) 21 988, Bit10 (971~991) 21 981,
1872 14:47:48.552692 TX Bit3 (972~993) 22 982, Bit11 (966~988) 23 977,
1873 14:47:48.552745 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1874 14:47:48.552821 TX Bit5 (975~992) 18 983, Bit13 (967~988) 22 977,
1875 14:47:48.552887 TX Bit6 (975~995) 21 985, Bit14 (968~989) 22 978,
1876 14:47:48.552943 TX Bit7 (977~997) 21 987, Bit15 (969~990) 22 979,
1877 14:47:48.552994
1878 14:47:48.553047 Write Rank1 MR14 =0xc
1879 14:47:48.553099
1880 14:47:48.553164 CH=0, VrefRange= 0, VrefLevel = 12
1881 14:47:48.553218 TX Bit0 (979~1000) 22 989, Bit8 (967~989) 23 978,
1882 14:47:48.553312 TX Bit1 (978~999) 22 988, Bit9 (968~989) 22 978,
1883 14:47:48.553368 TX Bit2 (978~999) 22 988, Bit10 (971~992) 22 981,
1884 14:47:48.553422 TX Bit3 (972~993) 22 982, Bit11 (966~989) 24 977,
1885 14:47:48.553474 TX Bit4 (978~999) 22 988, Bit12 (967~989) 23 978,
1886 14:47:48.553525 TX Bit5 (975~993) 19 984, Bit13 (966~988) 23 977,
1887 14:47:48.553579 TX Bit6 (975~995) 21 985, Bit14 (967~989) 23 978,
1888 14:47:48.553631 TX Bit7 (977~998) 22 987, Bit15 (969~990) 22 979,
1889 14:47:48.553682
1890 14:47:48.553732 Write Rank1 MR14 =0xe
1891 14:47:48.553783
1892 14:47:48.553837 CH=0, VrefRange= 0, VrefLevel = 14
1893 14:47:48.553889 TX Bit0 (978~1001) 24 989, Bit8 (967~989) 23 978,
1894 14:47:48.553940 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
1895 14:47:48.553991 TX Bit2 (978~999) 22 988, Bit10 (970~992) 23 981,
1896 14:47:48.554042 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1897 14:47:48.554096 TX Bit4 (977~999) 23 988, Bit12 (967~990) 24 978,
1898 14:47:48.554147 TX Bit5 (974~993) 20 983, Bit13 (966~989) 24 977,
1899 14:47:48.554198 TX Bit6 (975~996) 22 985, Bit14 (967~990) 24 978,
1900 14:47:48.554249 TX Bit7 (977~998) 22 987, Bit15 (969~991) 23 980,
1901 14:47:48.554300
1902 14:47:48.554353 Write Rank1 MR14 =0x10
1903 14:47:48.554405
1904 14:47:48.554457 CH=0, VrefRange= 0, VrefLevel = 16
1905 14:47:48.554508 TX Bit0 (978~1001) 24 989, Bit8 (966~989) 24 977,
1906 14:47:48.554562 TX Bit1 (978~999) 22 988, Bit9 (967~990) 24 978,
1907 14:47:48.554613 TX Bit2 (977~999) 23 988, Bit10 (970~992) 23 981,
1908 14:47:48.554664 TX Bit3 (971~995) 25 983, Bit11 (965~989) 25 977,
1909 14:47:48.554715 TX Bit4 (977~1000) 24 988, Bit12 (967~990) 24 978,
1910 14:47:48.554766 TX Bit5 (974~994) 21 984, Bit13 (965~989) 25 977,
1911 14:47:48.554819 TX Bit6 (974~996) 23 985, Bit14 (967~990) 24 978,
1912 14:47:48.554870 TX Bit7 (977~998) 22 987, Bit15 (969~991) 23 980,
1913 14:47:48.554922
1914 14:47:48.554973 Write Rank1 MR14 =0x12
1915 14:47:48.555023
1916 14:47:48.555076 CH=0, VrefRange= 0, VrefLevel = 18
1917 14:47:48.555127 TX Bit0 (978~1001) 24 989, Bit8 (966~990) 25 978,
1918 14:47:48.555179 TX Bit1 (978~1000) 23 989, Bit9 (967~990) 24 978,
1919 14:47:48.555230 TX Bit2 (977~999) 23 988, Bit10 (970~993) 24 981,
1920 14:47:48.555281 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1921 14:47:48.555335 TX Bit4 (977~1000) 24 988, Bit12 (966~990) 25 978,
1922 14:47:48.555388 TX Bit5 (973~994) 22 983, Bit13 (965~989) 25 977,
1923 14:47:48.555439 TX Bit6 (973~997) 25 985, Bit14 (967~990) 24 978,
1924 14:47:48.555491 TX Bit7 (976~998) 23 987, Bit15 (969~991) 23 980,
1925 14:47:48.555542
1926 14:47:48.555595 Write Rank1 MR14 =0x14
1927 14:47:48.555645
1928 14:47:48.555695 CH=0, VrefRange= 0, VrefLevel = 20
1929 14:47:48.555746 TX Bit0 (978~1002) 25 990, Bit8 (966~989) 24 977,
1930 14:47:48.555797 TX Bit1 (977~1000) 24 988, Bit9 (966~990) 25 978,
1931 14:47:48.555851 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1932 14:47:48.555903 TX Bit3 (970~996) 27 983, Bit11 (965~990) 26 977,
1933 14:47:48.555954 TX Bit4 (977~1000) 24 988, Bit12 (966~990) 25 978,
1934 14:47:48.556005 TX Bit5 (972~995) 24 983, Bit13 (965~989) 25 977,
1935 14:47:48.556056 TX Bit6 (973~997) 25 985, Bit14 (967~990) 24 978,
1936 14:47:48.556110 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1937 14:47:48.556161
1938 14:47:48.556211 Write Rank1 MR14 =0x16
1939 14:47:48.556261
1940 14:47:48.556313 CH=0, VrefRange= 0, VrefLevel = 22
1941 14:47:48.556365 TX Bit0 (977~1002) 26 989, Bit8 (965~990) 26 977,
1942 14:47:48.556418 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
1943 14:47:48.556469 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1944 14:47:48.556520 TX Bit3 (970~996) 27 983, Bit11 (964~990) 27 977,
1945 14:47:48.556574 TX Bit4 (976~1001) 26 988, Bit12 (966~990) 25 978,
1946 14:47:48.556625 TX Bit5 (972~995) 24 983, Bit13 (964~989) 26 976,
1947 14:47:48.556677 TX Bit6 (972~998) 27 985, Bit14 (966~990) 25 978,
1948 14:47:48.556728 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1949 14:47:48.556779
1950 14:47:48.556833 Write Rank1 MR14 =0x18
1951 14:47:48.556886
1952 14:47:48.556936 CH=0, VrefRange= 0, VrefLevel = 24
1953 14:47:48.556987 TX Bit0 (978~1002) 25 990, Bit8 (965~990) 26 977,
1954 14:47:48.557038 TX Bit1 (977~1001) 25 989, Bit9 (967~990) 24 978,
1955 14:47:48.557092 TX Bit2 (977~1000) 24 988, Bit10 (969~993) 25 981,
1956 14:47:48.557158 TX Bit3 (970~995) 26 982, Bit11 (964~990) 27 977,
1957 14:47:48.557241 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1958 14:47:48.557341 TX Bit5 (971~996) 26 983, Bit13 (963~989) 27 976,
1959 14:47:48.557396 TX Bit6 (972~998) 27 985, Bit14 (965~990) 26 977,
1960 14:47:48.557448 TX Bit7 (975~999) 25 987, Bit15 (968~991) 24 979,
1961 14:47:48.557499
1962 14:47:48.557550 Write Rank1 MR14 =0x1a
1963 14:47:48.557603
1964 14:47:48.557654 CH=0, VrefRange= 0, VrefLevel = 26
1965 14:47:48.557705 TX Bit0 (978~1002) 25 990, Bit8 (965~990) 26 977,
1966 14:47:48.557756 TX Bit1 (977~1001) 25 989, Bit9 (967~990) 24 978,
1967 14:47:48.557810 TX Bit2 (977~1000) 24 988, Bit10 (969~993) 25 981,
1968 14:47:48.557861 TX Bit3 (970~995) 26 982, Bit11 (964~990) 27 977,
1969 14:47:48.557914 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1970 14:47:48.558156 TX Bit5 (971~996) 26 983, Bit13 (963~989) 27 976,
1971 14:47:48.558215 TX Bit6 (972~998) 27 985, Bit14 (965~990) 26 977,
1972 14:47:48.558268 TX Bit7 (975~999) 25 987, Bit15 (968~991) 24 979,
1973 14:47:48.558322
1974 14:47:48.558375 Write Rank1 MR14 =0x1c
1975 14:47:48.558426
1976 14:47:48.558476 CH=0, VrefRange= 0, VrefLevel = 28
1977 14:47:48.827429 TX Bit0 (978~1002) 25 990, Bit8 (965~990) 26 977,
1978 14:47:48.827560 TX Bit1 (977~1001) 25 989, Bit9 (967~990) 24 978,
1979 14:47:48.827630 TX Bit2 (977~1000) 24 988, Bit10 (969~993) 25 981,
1980 14:47:48.827692 TX Bit3 (970~995) 26 982, Bit11 (964~990) 27 977,
1981 14:47:48.827766 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1982 14:47:48.827822 TX Bit5 (971~996) 26 983, Bit13 (963~989) 27 976,
1983 14:47:48.827878 TX Bit6 (972~998) 27 985, Bit14 (965~990) 26 977,
1984 14:47:48.827933 TX Bit7 (975~999) 25 987, Bit15 (968~991) 24 979,
1985 14:47:48.827988
1986 14:47:48.828041 Write Rank1 MR14 =0x1e
1987 14:47:48.828095
1988 14:47:48.828166 CH=0, VrefRange= 0, VrefLevel = 30
1989 14:47:48.828235 TX Bit0 (978~1002) 25 990, Bit8 (965~990) 26 977,
1990 14:47:48.828307 TX Bit1 (977~1001) 25 989, Bit9 (967~990) 24 978,
1991 14:47:48.828362 TX Bit2 (977~1000) 24 988, Bit10 (969~993) 25 981,
1992 14:47:48.828416 TX Bit3 (970~995) 26 982, Bit11 (964~990) 27 977,
1993 14:47:48.828471 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1994 14:47:48.828525 TX Bit5 (971~996) 26 983, Bit13 (963~989) 27 976,
1995 14:47:48.828593 TX Bit6 (972~998) 27 985, Bit14 (965~990) 26 977,
1996 14:47:48.828647 TX Bit7 (975~999) 25 987, Bit15 (968~991) 24 979,
1997 14:47:48.828699
1998 14:47:48.828751
1999 14:47:48.828802 TX Vref found, early break! 385< 386
2000 14:47:48.828855 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2001 14:47:48.828907 u1DelayCellOfst[0]=10 cells (8 PI)
2002 14:47:48.828960 u1DelayCellOfst[1]=8 cells (7 PI)
2003 14:47:48.829012 u1DelayCellOfst[2]=7 cells (6 PI)
2004 14:47:48.829064 u1DelayCellOfst[3]=0 cells (0 PI)
2005 14:47:48.829116 u1DelayCellOfst[4]=7 cells (6 PI)
2006 14:47:48.829168 u1DelayCellOfst[5]=1 cells (1 PI)
2007 14:47:48.829219 u1DelayCellOfst[6]=3 cells (3 PI)
2008 14:47:48.829300 u1DelayCellOfst[7]=6 cells (5 PI)
2009 14:47:48.829369 Byte0, DQ PI dly=982, DQM PI dly= 986
2010 14:47:48.829440 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2011 14:47:48.829526
2012 14:47:48.829579 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2013 14:47:48.829633
2014 14:47:48.829686 u1DelayCellOfst[8]=1 cells (1 PI)
2015 14:47:48.829740 u1DelayCellOfst[9]=2 cells (2 PI)
2016 14:47:48.829793 u1DelayCellOfst[10]=6 cells (5 PI)
2017 14:47:48.829846 u1DelayCellOfst[11]=1 cells (1 PI)
2018 14:47:48.829914 u1DelayCellOfst[12]=2 cells (2 PI)
2019 14:47:48.829966 u1DelayCellOfst[13]=0 cells (0 PI)
2020 14:47:48.830018 u1DelayCellOfst[14]=1 cells (1 PI)
2021 14:47:48.830070 u1DelayCellOfst[15]=3 cells (3 PI)
2022 14:47:48.830121 Byte1, DQ PI dly=976, DQM PI dly= 978
2023 14:47:48.830173 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2024 14:47:48.830226
2025 14:47:48.830277 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2026 14:47:48.830329
2027 14:47:48.830381 Write Rank1 MR14 =0x18
2028 14:47:48.830432
2029 14:47:48.830483 Final TX Range 0 Vref 24
2030 14:47:48.830536
2031 14:47:48.830587 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2032 14:47:48.830640
2033 14:47:48.830691 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2034 14:47:48.830744 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2035 14:47:48.830797 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2036 14:47:48.830849 Write Rank1 MR3 =0xb0
2037 14:47:48.830900 DramC Write-DBI on
2038 14:47:48.830953 ==
2039 14:47:48.831005 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2040 14:47:48.831058 fsp= 1, odt_onoff= 1, Byte mode= 0
2041 14:47:48.831111 ==
2042 14:47:48.831162 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2043 14:47:48.831215
2044 14:47:48.831266 Begin, DQ Scan Range 698~762
2045 14:47:48.831318
2046 14:47:48.831369
2047 14:47:48.831420 TX Vref Scan disable
2048 14:47:48.831472 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2049 14:47:48.831525 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2050 14:47:48.831577 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2051 14:47:48.831630 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2052 14:47:48.831683 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2053 14:47:48.831737 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2054 14:47:48.831790 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2055 14:47:48.831843 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2056 14:47:48.831897 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2057 14:47:48.831949 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2058 14:47:48.832002 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2059 14:47:48.832072 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2060 14:47:48.832141 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2061 14:47:48.832211 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2062 14:47:48.832280 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2063 14:47:48.832333 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2064 14:47:48.832385 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2065 14:47:48.832439 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2066 14:47:48.832508 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2067 14:47:48.832593 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2068 14:47:48.832647 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2069 14:47:48.832702 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2070 14:47:48.832756 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2071 14:47:48.832810 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2072 14:47:48.832879 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2073 14:47:48.832932 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2074 14:47:48.833013 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2075 14:47:48.833115 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2076 14:47:48.833200 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2077 14:47:48.833335 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2078 14:47:48.833425 Byte0, DQ PI dly=730, DQM PI dly= 730
2079 14:47:48.833526 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2080 14:47:48.833624
2081 14:47:48.833707 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2082 14:47:48.833789
2083 14:47:48.833871 Byte1, DQ PI dly=720, DQM PI dly= 720
2084 14:47:48.834163 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2085 14:47:48.834251
2086 14:47:48.834334 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2087 14:47:48.834417
2088 14:47:48.834518 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2089 14:47:48.834617 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2090 14:47:48.834701 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2091 14:47:48.834783 Write Rank1 MR3 =0x30
2092 14:47:48.834865 DramC Write-DBI off
2093 14:47:48.834947
2094 14:47:48.835046 [DATLAT]
2095 14:47:48.835143 Freq=1600, CH0 RK1, use_rxtx_scan=0
2096 14:47:48.835225
2097 14:47:48.835325 DATLAT Default: 0x10
2098 14:47:48.835453 7, 0xFFFF, sum=0
2099 14:47:48.835537 8, 0xFFFF, sum=0
2100 14:47:48.835621 9, 0xFFFF, sum=0
2101 14:47:48.835710 10, 0xFFFF, sum=0
2102 14:47:48.835770 11, 0xFFFF, sum=0
2103 14:47:48.835824 12, 0xFFFF, sum=0
2104 14:47:48.835878 13, 0xFFFF, sum=0
2105 14:47:48.835932 14, 0x0, sum=1
2106 14:47:48.836003 15, 0x0, sum=2
2107 14:47:48.836071 16, 0x0, sum=3
2108 14:47:48.836124 17, 0x0, sum=4
2109 14:47:48.836177 pattern=2 first_step=14 total pass=5 best_step=16
2110 14:47:48.836246 ==
2111 14:47:48.836341 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2112 14:47:48.836399 fsp= 1, odt_onoff= 1, Byte mode= 0
2113 14:47:48.836454 ==
2114 14:47:48.836535 Start DQ dly to find pass range UseTestEngine =1
2115 14:47:48.836634 x-axis: bit #, y-axis: DQ dly (-127~63)
2116 14:47:48.836690 RX Vref Scan = 0
2117 14:47:48.836744 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2118 14:47:48.836800 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2119 14:47:48.836870 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2120 14:47:48.836924 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2121 14:47:48.836978 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2122 14:47:48.837032 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2123 14:47:48.837152 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2124 14:47:48.837241 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2125 14:47:48.837313 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2126 14:47:48.837396 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2127 14:47:48.837454 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2128 14:47:48.837524 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2129 14:47:48.837578 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2130 14:47:48.837631 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2131 14:47:48.837685 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2132 14:47:48.837739 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2133 14:47:48.837819 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2134 14:47:48.837880 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2135 14:47:48.837954 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2136 14:47:48.838009 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2137 14:47:48.838063 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2138 14:47:48.838142 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2139 14:47:48.838198 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2140 14:47:48.838252 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2141 14:47:48.838306 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2142 14:47:48.838383 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2143 14:47:48.838464 0, [0] xxxoxoxx oxxoxoxx [MSB]
2144 14:47:48.838546 1, [0] xxxoxoxx oxxoxoxx [MSB]
2145 14:47:48.838603 2, [0] xxxoxoxx ooxoooox [MSB]
2146 14:47:48.838657 3, [0] xxxoxooo ooxoooox [MSB]
2147 14:47:48.838711 4, [0] xxxoxooo ooxooooo [MSB]
2148 14:47:48.838765 5, [0] xxxoxooo oooooooo [MSB]
2149 14:47:48.838819 6, [0] xxxooooo oooooooo [MSB]
2150 14:47:48.838873 7, [0] xoxooooo oooooooo [MSB]
2151 14:47:48.838927 8, [0] xooooooo oooooooo [MSB]
2152 14:47:48.838981 33, [0] oooxoooo oooooooo [MSB]
2153 14:47:48.839035 34, [0] oooxoooo oooooxoo [MSB]
2154 14:47:48.839089 35, [0] oooxoooo oooxoxoo [MSB]
2155 14:47:48.839142 36, [0] oooxoxoo oooxoxxo [MSB]
2156 14:47:48.839195 37, [0] oooxoxxx xooxoxxo [MSB]
2157 14:47:48.839248 38, [0] oooxoxxx xxoxxxxx [MSB]
2158 14:47:48.839302 39, [0] oooxoxxx xxoxxxxx [MSB]
2159 14:47:48.839360 40, [0] oooxoxxx xxoxxxxx [MSB]
2160 14:47:48.839456 41, [0] oooxxxxx xxoxxxxx [MSB]
2161 14:47:48.839546 42, [0] oooxxxxx xxoxxxxx [MSB]
2162 14:47:48.839639 43, [0] xxxxxxxx xxxxxxxx [MSB]
2163 14:47:48.839735 iDelay=43, Bit 0, Center 25 (9 ~ 42) 34
2164 14:47:48.839821 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2165 14:47:48.839903 iDelay=43, Bit 2, Center 25 (8 ~ 42) 35
2166 14:47:48.840003 iDelay=43, Bit 3, Center 15 (-1 ~ 32) 34
2167 14:47:48.840117 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2168 14:47:48.840233 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
2169 14:47:48.840317 iDelay=43, Bit 6, Center 19 (3 ~ 36) 34
2170 14:47:48.840411 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
2171 14:47:48.840471 iDelay=43, Bit 8, Center 18 (0 ~ 36) 37
2172 14:47:48.840539 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
2173 14:47:48.840592 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
2174 14:47:48.840645 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2175 14:47:48.840697 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
2176 14:47:48.840750 iDelay=43, Bit 13, Center 16 (0 ~ 33) 34
2177 14:47:48.840803 iDelay=43, Bit 14, Center 18 (2 ~ 35) 34
2178 14:47:48.840889 iDelay=43, Bit 15, Center 20 (4 ~ 37) 34
2179 14:47:48.840941 ==
2180 14:47:48.841015 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2181 14:47:48.841101 fsp= 1, odt_onoff= 1, Byte mode= 0
2182 14:47:48.841183 ==
2183 14:47:48.841297 DQS Delay:
2184 14:47:48.841369 DQS0 = 0, DQS1 = 0
2185 14:47:48.841423 DQM Delay:
2186 14:47:48.841476 DQM0 = 20, DQM1 = 18
2187 14:47:48.841529 DQ Delay:
2188 14:47:48.841582 DQ0 =25, DQ1 =24, DQ2 =25, DQ3 =15
2189 14:47:48.841635 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
2190 14:47:48.841687 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2191 14:47:48.841764 DQ12 =19, DQ13 =16, DQ14 =18, DQ15 =20
2192 14:47:48.841821
2193 14:47:48.841899
2194 14:47:48.841965
2195 14:47:48.842046 [DramC_TX_OE_Calibration] TA2
2196 14:47:48.842102 Original DQ_B0 (3 6) =30, OEN = 27
2197 14:47:48.842156 Original DQ_B1 (3 6) =30, OEN = 27
2198 14:47:48.842210 23, 0x0, End_B0=23 End_B1=23
2199 14:47:48.842264 24, 0x0, End_B0=24 End_B1=24
2200 14:47:48.842318 25, 0x0, End_B0=25 End_B1=25
2201 14:47:48.842371 26, 0x0, End_B0=26 End_B1=26
2202 14:47:48.842425 27, 0x0, End_B0=27 End_B1=27
2203 14:47:48.842478 28, 0x0, End_B0=28 End_B1=28
2204 14:47:48.842531 29, 0x0, End_B0=29 End_B1=29
2205 14:47:48.842585 30, 0x0, End_B0=30 End_B1=30
2206 14:47:48.842638 31, 0xFFFE, End_B0=30 End_B1=30
2207 14:47:48.842692 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2208 14:47:48.842771 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2209 14:47:48.842826
2210 14:47:48.842879
2211 14:47:48.842932 Write Rank1 MR23 =0x3f
2212 14:47:48.842984 [DQSOSC]
2213 14:47:48.843038 [DQSOSCAuto] RK1, (LSB)MR18= 0x7a, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2214 14:47:48.843293 CH0_RK1: MR19=0x3, MR18=0x7A, DQSOSC=353, MR23=63, INC=19, DEC=29
2215 14:47:48.843356 Write Rank1 MR23 =0x3f
2216 14:47:48.843411 [DQSOSC]
2217 14:47:48.843465 [DQSOSCAuto] RK1, (LSB)MR18= 0x79, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps
2218 14:47:48.843519 CH0 RK1: MR19=3, MR18=79
2219 14:47:48.843572 [RxdqsGatingPostProcess] freq 1600
2220 14:47:48.843626 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2221 14:47:48.843679 Rank: 0
2222 14:47:48.843732 best DQS0 dly(2T, 0.5T) = (2, 5)
2223 14:47:48.843785 best DQS1 dly(2T, 0.5T) = (2, 5)
2224 14:47:48.843866 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2225 14:47:48.843979 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2226 14:47:48.844095 Rank: 1
2227 14:47:48.844179 best DQS0 dly(2T, 0.5T) = (2, 6)
2228 14:47:48.844263 best DQS1 dly(2T, 0.5T) = (2, 6)
2229 14:47:48.844361 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2230 14:47:48.844443 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2231 14:47:48.844526 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2232 14:47:48.844609 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2233 14:47:48.844692 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2234 14:47:48.844774 Write Rank0 MR13 =0x59
2235 14:47:48.844855 ==
2236 14:47:48.844982 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2237 14:47:48.845078 fsp= 1, odt_onoff= 1, Byte mode= 0
2238 14:47:48.845161 ==
2239 14:47:48.845244 === u2Vref_new: 0x56 --> 0x3a
2240 14:47:48.845369 === u2Vref_new: 0x58 --> 0x58
2241 14:47:48.845426 === u2Vref_new: 0x5a --> 0x5a
2242 14:47:48.845479 === u2Vref_new: 0x5c --> 0x78
2243 14:47:48.845536 === u2Vref_new: 0x5e --> 0x7a
2244 14:47:48.845627 === u2Vref_new: 0x60 --> 0x90
2245 14:47:48.845682 [CA 0] Center 36 (9~63) winsize 55
2246 14:47:48.845737 [CA 1] Center 35 (7~63) winsize 57
2247 14:47:48.845790 [CA 2] Center 32 (3~62) winsize 60
2248 14:47:48.845868 [CA 3] Center 32 (3~62) winsize 60
2249 14:47:48.845926 [CA 4] Center 34 (5~63) winsize 59
2250 14:47:48.845994 [CA 5] Center 25 (-2~52) winsize 55
2251 14:47:48.846047
2252 14:47:48.846100 [CATrainingPosCal] consider 1 rank data
2253 14:47:48.846153 u2DelayCellTimex100 = 762/100 ps
2254 14:47:48.846206 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2255 14:47:48.846259 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2256 14:47:48.846312 CA2 delay=32 (3~62),Diff = 7 PI (8 cell)
2257 14:47:48.846365 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2258 14:47:48.846436 CA4 delay=34 (5~63),Diff = 9 PI (11 cell)
2259 14:47:48.846493 CA5 delay=25 (-2~52),Diff = 0 PI (0 cell)
2260 14:47:48.846546
2261 14:47:48.846603 CA PerBit enable=1, Macro0, CA PI delay=25
2262 14:47:48.846698 === u2Vref_new: 0x56 --> 0x3a
2263 14:47:48.846788
2264 14:47:48.846876 Vref(ca) range 1: 22
2265 14:47:48.846958
2266 14:47:48.847040 CS Dly= 10 (41-0-32)
2267 14:47:48.847121 Write Rank0 MR13 =0xd8
2268 14:47:48.847203 Write Rank0 MR13 =0xd8
2269 14:47:48.847285 Write Rank0 MR12 =0x56
2270 14:47:48.847377 Write Rank1 MR13 =0x59
2271 14:47:48.847436 ==
2272 14:47:48.847489 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2273 14:47:48.847542 fsp= 1, odt_onoff= 1, Byte mode= 0
2274 14:47:48.847595 ==
2275 14:47:48.847648 === u2Vref_new: 0x56 --> 0x3a
2276 14:47:48.847701 === u2Vref_new: 0x58 --> 0x58
2277 14:47:48.847754 === u2Vref_new: 0x5a --> 0x5a
2278 14:47:48.847807 === u2Vref_new: 0x5c --> 0x78
2279 14:47:48.847860 === u2Vref_new: 0x5e --> 0x7a
2280 14:47:48.847921 === u2Vref_new: 0x60 --> 0x90
2281 14:47:48.847976 [CA 0] Center 36 (10~63) winsize 54
2282 14:47:48.848045 [CA 1] Center 35 (7~63) winsize 57
2283 14:47:48.848132 [CA 2] Center 33 (4~63) winsize 60
2284 14:47:48.848227 [CA 3] Center 33 (3~63) winsize 61
2285 14:47:48.848310 [CA 4] Center 33 (4~63) winsize 60
2286 14:47:48.848419 [CA 5] Center 26 (-1~53) winsize 55
2287 14:47:48.848511
2288 14:47:48.848566 [CATrainingPosCal] consider 2 rank data
2289 14:47:48.848620 u2DelayCellTimex100 = 762/100 ps
2290 14:47:48.848674 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2291 14:47:48.848729 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2292 14:47:48.848797 CA2 delay=33 (4~62),Diff = 8 PI (10 cell)
2293 14:47:48.848849 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2294 14:47:48.848903 CA4 delay=34 (5~63),Diff = 9 PI (11 cell)
2295 14:47:48.848995 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2296 14:47:48.849089
2297 14:47:48.849173 CA PerBit enable=1, Macro0, CA PI delay=25
2298 14:47:48.849281 === u2Vref_new: 0x58 --> 0x58
2299 14:47:48.849381
2300 14:47:48.849437 Vref(ca) range 1: 24
2301 14:47:48.849490
2302 14:47:48.849543 CS Dly= 12 (43-0-32)
2303 14:47:48.849596 Write Rank1 MR13 =0xd8
2304 14:47:48.849688 Write Rank1 MR13 =0xd8
2305 14:47:48.849809 Write Rank1 MR12 =0x58
2306 14:47:48.849864 [RankSwap] Rank num 2, (Multi 1), Rank 0
2307 14:47:48.851427 Write Rank0 MR2 =0xad
2308 14:47:48.851526 [Write Leveling]
2309 14:47:48.854743 delay byte0 byte1 byte2 byte3
2310 14:47:48.854828
2311 14:47:48.857874 10 0 0
2312 14:47:48.857967 11 0 0
2313 14:47:48.861380 12 0 0
2314 14:47:48.861454 13 0 0
2315 14:47:48.861522 14 0 0
2316 14:47:48.864933 15 0 0
2317 14:47:48.865029 16 0 0
2318 14:47:48.868148 17 0 0
2319 14:47:48.868272 18 0 0
2320 14:47:48.871074 19 0 0
2321 14:47:48.871180 20 0 0
2322 14:47:48.871286 21 0 0
2323 14:47:48.874377 22 0 0
2324 14:47:48.874494 23 0 0
2325 14:47:48.878052 24 0 0
2326 14:47:48.878180 25 0 0
2327 14:47:48.878298 26 0 0
2328 14:47:48.881690 27 0 0
2329 14:47:48.881801 28 0 0
2330 14:47:48.884490 29 0 0
2331 14:47:48.884568 30 0 ff
2332 14:47:48.887986 31 0 ff
2333 14:47:48.888088 32 0 ff
2334 14:47:48.888183 33 0 ff
2335 14:47:48.891624 34 ff ff
2336 14:47:48.891738 35 ff ff
2337 14:47:48.894838 36 ff ff
2338 14:47:48.894911 37 ff ff
2339 14:47:48.898132 38 ff ff
2340 14:47:48.898208 39 ff ff
2341 14:47:48.901666 40 ff ff
2342 14:47:48.904919 pass bytecount = 0xff (0xff: all bytes pass)
2343 14:47:48.905027
2344 14:47:48.905117 DQS0 dly: 34
2345 14:47:48.908041 DQS1 dly: 30
2346 14:47:48.908109 Write Rank0 MR2 =0x2d
2347 14:47:48.911719 [RankSwap] Rank num 2, (Multi 1), Rank 0
2348 14:47:48.914621 Write Rank0 MR1 =0xd6
2349 14:47:48.914695 [Gating]
2350 14:47:48.914756 ==
2351 14:47:48.921654 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2352 14:47:48.924909 fsp= 1, odt_onoff= 1, Byte mode= 0
2353 14:47:48.925018 ==
2354 14:47:48.928240 3 1 0 |2e2e 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2355 14:47:48.931713 3 1 4 |1312 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2356 14:47:48.938329 3 1 8 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2357 14:47:48.941840 3 1 12 |d0d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2358 14:47:48.945576 3 1 16 |303 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2359 14:47:48.948818 3 1 20 |2d2c 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2360 14:47:48.955317 3 1 24 |2b2a 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2361 14:47:48.958822 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2362 14:47:48.961762 3 2 0 |d0c 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2363 14:47:48.968595 3 2 4 |505 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2364 14:47:48.972016 [Byte 0] Lead/lag Transition tap number (1)
2365 14:47:48.975121 3 2 8 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2366 14:47:48.978921 3 2 12 |3535 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2367 14:47:48.985409 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2368 14:47:48.988700 3 2 20 |3535 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2369 14:47:48.992072 3 2 24 |3736 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2370 14:47:48.995227 3 2 28 |807 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2371 14:47:49.001971 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2372 14:47:49.005555 3 3 4 |3534 202 |(11 11)(11 11) |(0 1)(1 1)| 0
2373 14:47:49.008586 3 3 8 |3534 807 |(11 11)(11 11) |(0 1)(1 1)| 0
2374 14:47:49.015354 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2375 14:47:49.018566 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2376 14:47:49.021771 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2377 14:47:49.028722 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2378 14:47:49.031895 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2379 14:47:49.035319 3 3 28 |706 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2380 14:47:49.038573 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2381 14:47:49.045623 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 14:47:49.049156 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 14:47:49.052280 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 14:47:49.058994 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 14:47:49.062113 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 14:47:49.065436 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 14:47:49.072458 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 14:47:49.075721 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 14:47:49.078883 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 14:47:49.082194 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 14:47:49.088754 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 14:47:49.092346 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 14:47:49.095843 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2394 14:47:49.102327 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2395 14:47:49.105926 [Byte 0] Lead/lag Transition tap number (2)
2396 14:47:49.108857 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2397 14:47:49.112632 [Byte 1] Lead/lag Transition tap number (1)
2398 14:47:49.115878 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2399 14:47:49.122421 3 6 0 |4646 605 |(0 0)(11 11) |(0 0)(0 0)| 0
2400 14:47:49.122543 [Byte 0]First pass (3, 6, 0)
2401 14:47:49.129294 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2402 14:47:49.129392 [Byte 1]First pass (3, 6, 4)
2403 14:47:49.135974 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2404 14:47:49.139470 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2405 14:47:49.142395 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 14:47:49.145793 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 14:47:49.149089 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 14:47:49.155706 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 14:47:49.159097 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 14:47:49.162669 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 14:47:49.166112 All bytes gating window > 1UI, Early break!
2412 14:47:49.166214
2413 14:47:49.169197 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2414 14:47:49.169339
2415 14:47:49.172867 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
2416 14:47:49.173002
2417 14:47:49.173097
2418 14:47:49.176292
2419 14:47:49.179292 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2420 14:47:49.179393
2421 14:47:49.182847 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
2422 14:47:49.182922
2423 14:47:49.182983
2424 14:47:49.186461 Write Rank0 MR1 =0x56
2425 14:47:49.186536
2426 14:47:49.186598 best RODT dly(2T, 0.5T) = (2, 2)
2427 14:47:49.189860
2428 14:47:49.189961 best RODT dly(2T, 0.5T) = (2, 2)
2429 14:47:49.193221 ==
2430 14:47:49.196510 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2431 14:47:49.199679 fsp= 1, odt_onoff= 1, Byte mode= 0
2432 14:47:49.199759 ==
2433 14:47:49.203303 Start DQ dly to find pass range UseTestEngine =0
2434 14:47:49.206568 x-axis: bit #, y-axis: DQ dly (-127~63)
2435 14:47:49.209715 RX Vref Scan = 0
2436 14:47:49.213653 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2437 14:47:49.216646 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2438 14:47:49.216736 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2439 14:47:49.219883 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2440 14:47:49.223607 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2441 14:47:49.226750 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2442 14:47:49.230283 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2443 14:47:49.233098 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2444 14:47:49.236995 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2445 14:47:49.239935 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2446 14:47:49.240051 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2447 14:47:49.243400 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2448 14:47:49.246555 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2449 14:47:49.250509 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2450 14:47:49.253799 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2451 14:47:49.256965 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2452 14:47:49.260048 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2453 14:47:49.263094 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2454 14:47:49.263171 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2455 14:47:49.266748 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2456 14:47:49.269974 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2457 14:47:49.273666 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2458 14:47:49.276937 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2459 14:47:49.280278 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2460 14:47:49.280368 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2461 14:47:49.283362 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2462 14:47:49.287111 0, [0] xxxoxxxx xxxxxxxx [MSB]
2463 14:47:49.290280 1, [0] xxooxxxx xxxxxxxo [MSB]
2464 14:47:49.293347 2, [0] xxooxxxx xxxxxxxo [MSB]
2465 14:47:49.296719 3, [0] xxooxxxo xxxxxxxo [MSB]
2466 14:47:49.296833 4, [0] xxoooxxo oooooooo [MSB]
2467 14:47:49.300215 5, [0] xxoooxxo oooooooo [MSB]
2468 14:47:49.303643 6, [0] xooooxxo oooooooo [MSB]
2469 14:47:49.307114 7, [0] xoooooxo oooooooo [MSB]
2470 14:47:49.310046 8, [0] ooooooxo oooooooo [MSB]
2471 14:47:49.313771 32, [0] ooxxoooo oooooooo [MSB]
2472 14:47:49.313888 33, [0] ooxxoooo ooooooox [MSB]
2473 14:47:49.316544 34, [0] ooxxoooo ooooooox [MSB]
2474 14:47:49.320243 35, [0] ooxxxooo ooxoooox [MSB]
2475 14:47:49.323424 36, [0] ooxxxoox xoxoooox [MSB]
2476 14:47:49.327317 37, [0] ooxxxoox xxxxoxxx [MSB]
2477 14:47:49.330578 38, [0] ooxxxoox xxxxoxxx [MSB]
2478 14:47:49.333747 39, [0] ooxxxoox xxxxxxxx [MSB]
2479 14:47:49.333824 40, [0] oxxxxoox xxxxxxxx [MSB]
2480 14:47:49.337017 41, [0] xxxxxxxx xxxxxxxx [MSB]
2481 14:47:49.340003 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2482 14:47:49.343558 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2483 14:47:49.347012 iDelay=41, Bit 2, Center 16 (1 ~ 31) 31
2484 14:47:49.354021 iDelay=41, Bit 3, Center 15 (-1 ~ 31) 33
2485 14:47:49.357076 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2486 14:47:49.360209 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2487 14:47:49.363665 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2488 14:47:49.367125 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2489 14:47:49.370041 iDelay=41, Bit 8, Center 19 (4 ~ 35) 32
2490 14:47:49.373756 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2491 14:47:49.376829 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2492 14:47:49.380578 iDelay=41, Bit 11, Center 20 (4 ~ 36) 33
2493 14:47:49.383717 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2494 14:47:49.386933 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2495 14:47:49.390587 iDelay=41, Bit 14, Center 20 (4 ~ 36) 33
2496 14:47:49.393361 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2497 14:47:49.396760 ==
2498 14:47:49.400378 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2499 14:47:49.403702 fsp= 1, odt_onoff= 1, Byte mode= 0
2500 14:47:49.403777 ==
2501 14:47:49.403840 DQS Delay:
2502 14:47:49.406837 DQS0 = 0, DQS1 = 0
2503 14:47:49.406919 DQM Delay:
2504 14:47:49.409904 DQM0 = 20, DQM1 = 19
2505 14:47:49.409979 DQ Delay:
2506 14:47:49.413928 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2507 14:47:49.416656 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2508 14:47:49.420216 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
2509 14:47:49.423317 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2510 14:47:49.423385
2511 14:47:49.423445
2512 14:47:49.426714 DramC Write-DBI off
2513 14:47:49.426785 ==
2514 14:47:49.430303 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2515 14:47:49.433620 fsp= 1, odt_onoff= 1, Byte mode= 0
2516 14:47:49.433687 ==
2517 14:47:49.436647 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2518 14:47:49.436715
2519 14:47:49.440327 Begin, DQ Scan Range 926~1182
2520 14:47:49.440400
2521 14:47:49.440464
2522 14:47:49.443692 TX Vref Scan disable
2523 14:47:49.446877 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2524 14:47:49.450675 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2525 14:47:49.453288 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2526 14:47:49.456586 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2527 14:47:49.460553 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2528 14:47:49.463480 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2529 14:47:49.466918 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2530 14:47:49.470175 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2531 14:47:49.477050 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2532 14:47:49.480059 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2533 14:47:49.483492 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2534 14:47:49.486972 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2535 14:47:49.490498 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2536 14:47:49.493831 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2537 14:47:49.496866 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2538 14:47:49.500493 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2539 14:47:49.503626 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2540 14:47:49.506930 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2541 14:47:49.510334 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2542 14:47:49.513283 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2543 14:47:49.517181 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2544 14:47:49.520099 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2545 14:47:49.523654 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2546 14:47:49.526810 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2547 14:47:49.533555 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2548 14:47:49.536729 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2549 14:47:49.540089 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2550 14:47:49.543366 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2551 14:47:49.546753 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2552 14:47:49.549875 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2553 14:47:49.553296 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2554 14:47:49.556434 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2555 14:47:49.559865 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2556 14:47:49.563738 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2557 14:47:49.566757 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2558 14:47:49.570306 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2559 14:47:49.573228 962 |3 6 2|[0] xxxxxxxx xxxxxxxo [MSB]
2560 14:47:49.576987 963 |3 6 3|[0] xxxxxxxx xxxxxxxo [MSB]
2561 14:47:49.580370 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
2562 14:47:49.583158 965 |3 6 5|[0] xxxxxxxx ooxxxxxo [MSB]
2563 14:47:49.586712 966 |3 6 6|[0] xxxxxxxx ooxxxxxo [MSB]
2564 14:47:49.590055 967 |3 6 7|[0] xxxxxxxx oooxxxxo [MSB]
2565 14:47:49.593097 968 |3 6 8|[0] xxxxxxxx oooooxoo [MSB]
2566 14:47:49.597043 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
2567 14:47:49.599902 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2568 14:47:49.604058 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2569 14:47:49.610255 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2570 14:47:49.613496 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2571 14:47:49.617272 974 |3 6 14|[0] xxoooxxo oooooooo [MSB]
2572 14:47:49.620494 975 |3 6 15|[0] xooooxxo oooooooo [MSB]
2573 14:47:49.623676 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2574 14:47:49.626782 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2575 14:47:49.629872 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2576 14:47:49.633411 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2577 14:47:49.639952 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2578 14:47:49.643711 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2579 14:47:49.646908 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
2580 14:47:49.650201 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2581 14:47:49.653343 995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]
2582 14:47:49.656673 996 |3 6 36|[0] ooxxxoox xxxxxxxx [MSB]
2583 14:47:49.659958 997 |3 6 37|[0] oxxxxxxx xxxxxxxx [MSB]
2584 14:47:49.663123 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2585 14:47:49.666625 Byte0, DQ PI dly=985, DQM PI dly= 985
2586 14:47:49.670087 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2587 14:47:49.670169
2588 14:47:49.676850 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2589 14:47:49.676933
2590 14:47:49.679708 Byte1, DQ PI dly=976, DQM PI dly= 976
2591 14:47:49.683482 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2592 14:47:49.683564
2593 14:47:49.686712 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2594 14:47:49.686795
2595 14:47:49.690102 ==
2596 14:47:49.693445 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2597 14:47:49.696710 fsp= 1, odt_onoff= 1, Byte mode= 0
2598 14:47:49.696792 ==
2599 14:47:49.700366 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2600 14:47:49.700448
2601 14:47:49.703321 Begin, DQ Scan Range 952~1016
2602 14:47:49.706425 Write Rank0 MR14 =0x0
2603 14:47:49.714635
2604 14:47:49.714716 CH=1, VrefRange= 0, VrefLevel = 0
2605 14:47:49.721020 TX Bit0 (978~996) 19 987, Bit8 (968~984) 17 976,
2606 14:47:49.724349 TX Bit1 (977~994) 18 985, Bit9 (968~984) 17 976,
2607 14:47:49.731264 TX Bit2 (976~990) 15 983, Bit10 (969~984) 16 976,
2608 14:47:49.734379 TX Bit3 (974~989) 16 981, Bit11 (970~986) 17 978,
2609 14:47:49.737649 TX Bit4 (976~992) 17 984, Bit12 (969~987) 19 978,
2610 14:47:49.744725 TX Bit5 (977~995) 19 986, Bit13 (970~986) 17 978,
2611 14:47:49.747764 TX Bit6 (978~995) 18 986, Bit14 (969~985) 17 977,
2612 14:47:49.751273 TX Bit7 (976~990) 15 983, Bit15 (966~984) 19 975,
2613 14:47:49.751346
2614 14:47:49.754541 Write Rank0 MR14 =0x2
2615 14:47:49.763519
2616 14:47:49.763594 CH=1, VrefRange= 0, VrefLevel = 2
2617 14:47:49.770204 TX Bit0 (977~996) 20 986, Bit8 (968~984) 17 976,
2618 14:47:49.773201 TX Bit1 (977~994) 18 985, Bit9 (968~984) 17 976,
2619 14:47:49.780046 TX Bit2 (976~991) 16 983, Bit10 (969~985) 17 977,
2620 14:47:49.783158 TX Bit3 (974~990) 17 982, Bit11 (970~987) 18 978,
2621 14:47:49.786660 TX Bit4 (976~992) 17 984, Bit12 (969~987) 19 978,
2622 14:47:49.793276 TX Bit5 (977~995) 19 986, Bit13 (970~987) 18 978,
2623 14:47:49.797007 TX Bit6 (978~995) 18 986, Bit14 (969~985) 17 977,
2624 14:47:49.800202 TX Bit7 (976~991) 16 983, Bit15 (965~984) 20 974,
2625 14:47:49.800280
2626 14:47:49.803638 Write Rank0 MR14 =0x4
2627 14:47:49.812553
2628 14:47:49.812634 CH=1, VrefRange= 0, VrefLevel = 4
2629 14:47:49.819412 TX Bit0 (978~997) 20 987, Bit8 (967~985) 19 976,
2630 14:47:49.822980 TX Bit1 (976~994) 19 985, Bit9 (967~985) 19 976,
2631 14:47:49.829265 TX Bit2 (975~991) 17 983, Bit10 (969~985) 17 977,
2632 14:47:49.832613 TX Bit3 (973~990) 18 981, Bit11 (970~988) 19 979,
2633 14:47:49.835761 TX Bit4 (976~992) 17 984, Bit12 (969~988) 20 978,
2634 14:47:49.843013 TX Bit5 (977~997) 21 987, Bit13 (970~987) 18 978,
2635 14:47:49.846122 TX Bit6 (978~996) 19 987, Bit14 (969~986) 18 977,
2636 14:47:49.849432 TX Bit7 (976~992) 17 984, Bit15 (965~984) 20 974,
2637 14:47:49.849528
2638 14:47:49.852964 Write Rank0 MR14 =0x6
2639 14:47:49.861721
2640 14:47:49.861803 CH=1, VrefRange= 0, VrefLevel = 6
2641 14:47:49.868278 TX Bit0 (977~997) 21 987, Bit8 (967~985) 19 976,
2642 14:47:49.871197 TX Bit1 (976~996) 21 986, Bit9 (967~985) 19 976,
2643 14:47:49.878206 TX Bit2 (975~992) 18 983, Bit10 (968~986) 19 977,
2644 14:47:49.881302 TX Bit3 (972~990) 19 981, Bit11 (969~988) 20 978,
2645 14:47:49.884638 TX Bit4 (976~993) 18 984, Bit12 (969~989) 21 979,
2646 14:47:49.891219 TX Bit5 (977~997) 21 987, Bit13 (970~988) 19 979,
2647 14:47:49.894818 TX Bit6 (978~997) 20 987, Bit14 (969~987) 19 978,
2648 14:47:49.897805 TX Bit7 (976~992) 17 984, Bit15 (964~985) 22 974,
2649 14:47:49.901085
2650 14:47:49.901167 Write Rank0 MR14 =0x8
2651 14:47:49.910572
2652 14:47:49.910669 CH=1, VrefRange= 0, VrefLevel = 8
2653 14:47:49.917306 TX Bit0 (977~998) 22 987, Bit8 (967~986) 20 976,
2654 14:47:49.920539 TX Bit1 (976~996) 21 986, Bit9 (966~985) 20 975,
2655 14:47:49.927228 TX Bit2 (975~992) 18 983, Bit10 (968~986) 19 977,
2656 14:47:49.930441 TX Bit3 (972~990) 19 981, Bit11 (969~989) 21 979,
2657 14:47:49.933843 TX Bit4 (976~993) 18 984, Bit12 (968~989) 22 978,
2658 14:47:49.940909 TX Bit5 (977~997) 21 987, Bit13 (969~989) 21 979,
2659 14:47:49.943968 TX Bit6 (977~997) 21 987, Bit14 (969~987) 19 978,
2660 14:47:49.947543 TX Bit7 (976~992) 17 984, Bit15 (964~985) 22 974,
2661 14:47:49.947628
2662 14:47:49.950745 Write Rank0 MR14 =0xa
2663 14:47:49.959933
2664 14:47:49.963228 CH=1, VrefRange= 0, VrefLevel = 10
2665 14:47:49.966303 TX Bit0 (977~998) 22 987, Bit8 (967~987) 21 977,
2666 14:47:49.970076 TX Bit1 (976~996) 21 986, Bit9 (967~986) 20 976,
2667 14:47:49.976628 TX Bit2 (974~992) 19 983, Bit10 (968~987) 20 977,
2668 14:47:49.979692 TX Bit3 (971~991) 21 981, Bit11 (969~990) 22 979,
2669 14:47:49.983372 TX Bit4 (976~994) 19 985, Bit12 (969~990) 22 979,
2670 14:47:49.989989 TX Bit5 (976~998) 23 987, Bit13 (969~990) 22 979,
2671 14:47:49.993161 TX Bit6 (977~998) 22 987, Bit14 (968~988) 21 978,
2672 14:47:49.996523 TX Bit7 (975~992) 18 983, Bit15 (963~986) 24 974,
2673 14:47:49.999718
2674 14:47:49.999819 Write Rank0 MR14 =0xc
2675 14:47:50.009218
2676 14:47:50.012744 CH=1, VrefRange= 0, VrefLevel = 12
2677 14:47:50.015728 TX Bit0 (977~998) 22 987, Bit8 (967~987) 21 977,
2678 14:47:50.019286 TX Bit1 (975~997) 23 986, Bit9 (966~987) 22 976,
2679 14:47:50.026028 TX Bit2 (974~993) 20 983, Bit10 (968~988) 21 978,
2680 14:47:50.029202 TX Bit3 (971~991) 21 981, Bit11 (969~990) 22 979,
2681 14:47:50.032700 TX Bit4 (975~994) 20 984, Bit12 (968~990) 23 979,
2682 14:47:50.039355 TX Bit5 (976~998) 23 987, Bit13 (969~990) 22 979,
2683 14:47:50.042783 TX Bit6 (977~998) 22 987, Bit14 (968~989) 22 978,
2684 14:47:50.045995 TX Bit7 (975~993) 19 984, Bit15 (963~986) 24 974,
2685 14:47:50.049134
2686 14:47:50.052393 wait MRW command Rank0 MR14 =0xe fired (1)
2687 14:47:50.052476 Write Rank0 MR14 =0xe
2688 14:47:50.062260
2689 14:47:50.066018 CH=1, VrefRange= 0, VrefLevel = 14
2690 14:47:50.069003 TX Bit0 (977~999) 23 988, Bit8 (966~988) 23 977,
2691 14:47:50.072656 TX Bit1 (976~997) 22 986, Bit9 (966~987) 22 976,
2692 14:47:50.079266 TX Bit2 (974~993) 20 983, Bit10 (967~988) 22 977,
2693 14:47:50.082416 TX Bit3 (971~992) 22 981, Bit11 (969~990) 22 979,
2694 14:47:50.085904 TX Bit4 (975~996) 22 985, Bit12 (968~990) 23 979,
2695 14:47:50.092652 TX Bit5 (976~998) 23 987, Bit13 (969~990) 22 979,
2696 14:47:50.095950 TX Bit6 (977~998) 22 987, Bit14 (968~989) 22 978,
2697 14:47:50.098876 TX Bit7 (975~994) 20 984, Bit15 (963~986) 24 974,
2698 14:47:50.098973
2699 14:47:50.102287 Write Rank0 MR14 =0x10
2700 14:47:50.111849
2701 14:47:50.115408 CH=1, VrefRange= 0, VrefLevel = 16
2702 14:47:50.118735 TX Bit0 (977~999) 23 988, Bit8 (966~988) 23 977,
2703 14:47:50.122038 TX Bit1 (975~998) 24 986, Bit9 (966~988) 23 977,
2704 14:47:50.128525 TX Bit2 (973~993) 21 983, Bit10 (967~989) 23 978,
2705 14:47:50.131788 TX Bit3 (970~992) 23 981, Bit11 (969~991) 23 980,
2706 14:47:50.135269 TX Bit4 (975~996) 22 985, Bit12 (968~991) 24 979,
2707 14:47:50.141724 TX Bit5 (976~998) 23 987, Bit13 (968~990) 23 979,
2708 14:47:50.144909 TX Bit6 (977~999) 23 988, Bit14 (967~990) 24 978,
2709 14:47:50.148420 TX Bit7 (974~994) 21 984, Bit15 (963~987) 25 975,
2710 14:47:50.151521
2711 14:47:50.151603 Write Rank0 MR14 =0x12
2712 14:47:50.161447
2713 14:47:50.165095 CH=1, VrefRange= 0, VrefLevel = 18
2714 14:47:50.168545 TX Bit0 (977~999) 23 988, Bit8 (965~989) 25 977,
2715 14:47:50.171742 TX Bit1 (975~998) 24 986, Bit9 (965~988) 24 976,
2716 14:47:50.178420 TX Bit2 (973~994) 22 983, Bit10 (967~990) 24 978,
2717 14:47:50.181465 TX Bit3 (970~992) 23 981, Bit11 (968~991) 24 979,
2718 14:47:50.184678 TX Bit4 (974~996) 23 985, Bit12 (967~991) 25 979,
2719 14:47:50.191211 TX Bit5 (976~999) 24 987, Bit13 (968~991) 24 979,
2720 14:47:50.194826 TX Bit6 (977~999) 23 988, Bit14 (968~990) 23 979,
2721 14:47:50.197992 TX Bit7 (974~994) 21 984, Bit15 (962~987) 26 974,
2722 14:47:50.198075
2723 14:47:50.201504 Write Rank0 MR14 =0x14
2724 14:47:50.210814
2725 14:47:50.214538 CH=1, VrefRange= 0, VrefLevel = 20
2726 14:47:50.217839 TX Bit0 (976~999) 24 987, Bit8 (964~990) 27 977,
2727 14:47:50.221518 TX Bit1 (975~998) 24 986, Bit9 (965~989) 25 977,
2728 14:47:50.227732 TX Bit2 (972~995) 24 983, Bit10 (967~990) 24 978,
2729 14:47:50.231228 TX Bit3 (970~992) 23 981, Bit11 (968~991) 24 979,
2730 14:47:50.234451 TX Bit4 (974~997) 24 985, Bit12 (967~991) 25 979,
2731 14:47:50.241101 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2732 14:47:50.245017 TX Bit6 (976~999) 24 987, Bit14 (967~990) 24 978,
2733 14:47:50.248384 TX Bit7 (974~995) 22 984, Bit15 (962~987) 26 974,
2734 14:47:50.248467
2735 14:47:50.250826 Write Rank0 MR14 =0x16
2736 14:47:50.261042
2737 14:47:50.264469 CH=1, VrefRange= 0, VrefLevel = 22
2738 14:47:50.267305 TX Bit0 (976~999) 24 987, Bit8 (964~990) 27 977,
2739 14:47:50.270767 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
2740 14:47:50.277120 TX Bit2 (971~995) 25 983, Bit10 (966~990) 25 978,
2741 14:47:50.280686 TX Bit3 (969~993) 25 981, Bit11 (968~991) 24 979,
2742 14:47:50.284328 TX Bit4 (973~998) 26 985, Bit12 (967~991) 25 979,
2743 14:47:50.291032 TX Bit5 (975~999) 25 987, Bit13 (968~990) 23 979,
2744 14:47:50.294182 TX Bit6 (976~999) 24 987, Bit14 (967~990) 24 978,
2745 14:47:50.297418 TX Bit7 (974~996) 23 985, Bit15 (962~987) 26 974,
2746 14:47:50.297514
2747 14:47:50.300509 Write Rank0 MR14 =0x18
2748 14:47:50.310529
2749 14:47:50.313555 CH=1, VrefRange= 0, VrefLevel = 24
2750 14:47:50.317389 TX Bit0 (976~1000) 25 988, Bit8 (965~990) 26 977,
2751 14:47:50.320470 TX Bit1 (975~999) 25 987, Bit9 (964~990) 27 977,
2752 14:47:50.326957 TX Bit2 (971~995) 25 983, Bit10 (966~990) 25 978,
2753 14:47:50.330105 TX Bit3 (969~993) 25 981, Bit11 (968~991) 24 979,
2754 14:47:50.333594 TX Bit4 (973~997) 25 985, Bit12 (967~991) 25 979,
2755 14:47:50.340505 TX Bit5 (975~999) 25 987, Bit13 (968~990) 23 979,
2756 14:47:50.343434 TX Bit6 (976~1000) 25 988, Bit14 (967~990) 24 978,
2757 14:47:50.350573 TX Bit7 (973~997) 25 985, Bit15 (962~987) 26 974,
2758 14:47:50.350989
2759 14:47:50.351320 Write Rank0 MR14 =0x1a
2760 14:47:50.360574
2761 14:47:50.363490 CH=1, VrefRange= 0, VrefLevel = 26
2762 14:47:50.367276 TX Bit0 (976~1000) 25 988, Bit8 (965~990) 26 977,
2763 14:47:50.370601 TX Bit1 (974~999) 26 986, Bit9 (964~989) 26 976,
2764 14:47:50.377027 TX Bit2 (971~995) 25 983, Bit10 (966~990) 25 978,
2765 14:47:50.380555 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
2766 14:47:50.383800 TX Bit4 (972~997) 26 984, Bit12 (966~991) 26 978,
2767 14:47:50.390589 TX Bit5 (975~999) 25 987, Bit13 (968~990) 23 979,
2768 14:47:50.393734 TX Bit6 (976~1000) 25 988, Bit14 (966~989) 24 977,
2769 14:47:50.399995 TX Bit7 (972~997) 26 984, Bit15 (962~986) 25 974,
2770 14:47:50.400580
2771 14:47:50.400958 Write Rank0 MR14 =0x1c
2772 14:47:50.410149
2773 14:47:50.413987 CH=1, VrefRange= 0, VrefLevel = 28
2774 14:47:50.417094 TX Bit0 (976~1000) 25 988, Bit8 (965~990) 26 977,
2775 14:47:50.420468 TX Bit1 (974~999) 26 986, Bit9 (964~989) 26 976,
2776 14:47:50.426781 TX Bit2 (971~995) 25 983, Bit10 (966~990) 25 978,
2777 14:47:50.430193 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
2778 14:47:50.433737 TX Bit4 (972~997) 26 984, Bit12 (966~991) 26 978,
2779 14:47:50.440860 TX Bit5 (975~999) 25 987, Bit13 (968~990) 23 979,
2780 14:47:50.443640 TX Bit6 (976~1000) 25 988, Bit14 (966~989) 24 977,
2781 14:47:50.447390 TX Bit7 (972~997) 26 984, Bit15 (962~986) 25 974,
2782 14:47:50.450435
2783 14:47:50.450858 Write Rank0 MR14 =0x1e
2784 14:47:50.460408
2785 14:47:50.463482 CH=1, VrefRange= 0, VrefLevel = 30
2786 14:47:50.466459 TX Bit0 (976~1000) 25 988, Bit8 (965~990) 26 977,
2787 14:47:50.470303 TX Bit1 (974~999) 26 986, Bit9 (964~989) 26 976,
2788 14:47:50.476754 TX Bit2 (971~995) 25 983, Bit10 (966~990) 25 978,
2789 14:47:50.480062 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
2790 14:47:50.483092 TX Bit4 (972~997) 26 984, Bit12 (966~991) 26 978,
2791 14:47:50.490044 TX Bit5 (975~999) 25 987, Bit13 (968~990) 23 979,
2792 14:47:50.493120 TX Bit6 (976~1000) 25 988, Bit14 (966~989) 24 977,
2793 14:47:50.496587 TX Bit7 (972~997) 26 984, Bit15 (962~986) 25 974,
2794 14:47:50.499752
2795 14:47:50.500201 Write Rank0 MR14 =0x20
2796 14:47:50.509574
2797 14:47:50.513364 CH=1, VrefRange= 0, VrefLevel = 32
2798 14:47:50.516811 TX Bit0 (976~1000) 25 988, Bit8 (965~990) 26 977,
2799 14:47:50.519743 TX Bit1 (974~999) 26 986, Bit9 (964~989) 26 976,
2800 14:47:50.526622 TX Bit2 (971~995) 25 983, Bit10 (966~990) 25 978,
2801 14:47:50.530057 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
2802 14:47:50.533202 TX Bit4 (972~997) 26 984, Bit12 (966~991) 26 978,
2803 14:47:50.539966 TX Bit5 (975~999) 25 987, Bit13 (968~990) 23 979,
2804 14:47:50.543302 TX Bit6 (976~1000) 25 988, Bit14 (966~989) 24 977,
2805 14:47:50.546562 TX Bit7 (972~997) 26 984, Bit15 (962~986) 25 974,
2806 14:47:50.547004
2807 14:47:50.549752
2808 14:47:50.550189 TX Vref found, early break! 366< 382
2809 14:47:50.556636 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2810 14:47:50.559835 u1DelayCellOfst[0]=8 cells (7 PI)
2811 14:47:50.563542 u1DelayCellOfst[1]=6 cells (5 PI)
2812 14:47:50.566704 u1DelayCellOfst[2]=2 cells (2 PI)
2813 14:47:50.567144 u1DelayCellOfst[3]=0 cells (0 PI)
2814 14:47:50.570376 u1DelayCellOfst[4]=3 cells (3 PI)
2815 14:47:50.573334 u1DelayCellOfst[5]=7 cells (6 PI)
2816 14:47:50.576586 u1DelayCellOfst[6]=8 cells (7 PI)
2817 14:47:50.580703 u1DelayCellOfst[7]=3 cells (3 PI)
2818 14:47:50.583282 Byte0, DQ PI dly=981, DQM PI dly= 984
2819 14:47:50.586680 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2820 14:47:50.587103
2821 14:47:50.593806 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2822 14:47:50.594240
2823 14:47:50.596729 u1DelayCellOfst[8]=3 cells (3 PI)
2824 14:47:50.600074 u1DelayCellOfst[9]=2 cells (2 PI)
2825 14:47:50.603554 u1DelayCellOfst[10]=5 cells (4 PI)
2826 14:47:50.606419 u1DelayCellOfst[11]=6 cells (5 PI)
2827 14:47:50.606871 u1DelayCellOfst[12]=5 cells (4 PI)
2828 14:47:50.610078 u1DelayCellOfst[13]=6 cells (5 PI)
2829 14:47:50.613427 u1DelayCellOfst[14]=3 cells (3 PI)
2830 14:47:50.616683 u1DelayCellOfst[15]=0 cells (0 PI)
2831 14:47:50.620021 Byte1, DQ PI dly=974, DQM PI dly= 976
2832 14:47:50.626984 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
2833 14:47:50.627410
2834 14:47:50.630182 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
2835 14:47:50.630747
2836 14:47:50.633026 Write Rank0 MR14 =0x1a
2837 14:47:50.633509
2838 14:47:50.633850 Final TX Range 0 Vref 26
2839 14:47:50.634166
2840 14:47:50.639900 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2841 14:47:50.640329
2842 14:47:50.646346 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2843 14:47:50.653179 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2844 14:47:50.660188 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2845 14:47:50.663320 Write Rank0 MR3 =0xb0
2846 14:47:50.666883 DramC Write-DBI on
2847 14:47:50.667257 ==
2848 14:47:50.669677 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2849 14:47:50.673362 fsp= 1, odt_onoff= 1, Byte mode= 0
2850 14:47:50.673791 ==
2851 14:47:50.680197 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2852 14:47:50.680637
2853 14:47:50.680980 Begin, DQ Scan Range 696~760
2854 14:47:50.681334
2855 14:47:50.681664
2856 14:47:50.683196 TX Vref Scan disable
2857 14:47:50.686752 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2858 14:47:50.689724 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2859 14:47:50.693349 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2860 14:47:50.696440 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2861 14:47:50.700551 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2862 14:47:50.703169 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2863 14:47:50.706415 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2864 14:47:50.713331 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2865 14:47:50.716265 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2866 14:47:50.719581 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2867 14:47:50.722924 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
2868 14:47:50.726315 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2869 14:47:50.730235 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2870 14:47:50.733201 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2871 14:47:50.736564 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2872 14:47:50.740087 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2873 14:47:50.743347 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2874 14:47:50.746262 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2875 14:47:50.749561 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2876 14:47:50.753135 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2877 14:47:50.760938 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2878 14:47:50.764583 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2879 14:47:50.767844 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2880 14:47:50.770742 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2881 14:47:50.774300 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2882 14:47:50.778175 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2883 14:47:50.781111 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2884 14:47:50.784320 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2885 14:47:50.787782 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2886 14:47:50.791131 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2887 14:47:50.794598 Byte0, DQ PI dly=729, DQM PI dly= 729
2888 14:47:50.797936 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2889 14:47:50.798427
2890 14:47:50.804103 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2891 14:47:50.804592
2892 14:47:50.807481 Byte1, DQ PI dly=720, DQM PI dly= 720
2893 14:47:50.810800 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2894 14:47:50.811229
2895 14:47:50.814507 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2896 14:47:50.817800
2897 14:47:50.821022 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2898 14:47:50.831006 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2899 14:47:50.837529 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2900 14:47:50.837957 Write Rank0 MR3 =0x30
2901 14:47:50.841164 DramC Write-DBI off
2902 14:47:50.841614
2903 14:47:50.841950 [DATLAT]
2904 14:47:50.844427 Freq=1600, CH1 RK0, use_rxtx_scan=0
2905 14:47:50.844857
2906 14:47:50.847902 DATLAT Default: 0xf
2907 14:47:50.848323 7, 0xFFFF, sum=0
2908 14:47:50.851456 8, 0xFFFF, sum=0
2909 14:47:50.851883 9, 0xFFFF, sum=0
2910 14:47:50.854279 10, 0xFFFF, sum=0
2911 14:47:50.854709 11, 0xFFFF, sum=0
2912 14:47:50.857791 12, 0xFFFF, sum=0
2913 14:47:50.858221 13, 0xFFFF, sum=0
2914 14:47:50.858559 14, 0x0, sum=1
2915 14:47:50.860879 15, 0x0, sum=2
2916 14:47:50.861419 16, 0x0, sum=3
2917 14:47:50.864337 17, 0x0, sum=4
2918 14:47:50.868003 pattern=2 first_step=14 total pass=5 best_step=16
2919 14:47:50.868428 ==
2920 14:47:50.874384 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2921 14:47:50.875070 fsp= 1, odt_onoff= 1, Byte mode= 0
2922 14:47:50.877908 ==
2923 14:47:50.880829 Start DQ dly to find pass range UseTestEngine =1
2924 14:47:50.884078 x-axis: bit #, y-axis: DQ dly (-127~63)
2925 14:47:50.884506 RX Vref Scan = 1
2926 14:47:51.000786
2927 14:47:51.001358 RX Vref found, early break!
2928 14:47:51.001903
2929 14:47:51.007361 Final RX Vref 13, apply to both rank0 and 1
2930 14:47:51.007784 ==
2931 14:47:51.010903 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2932 14:47:51.014237 fsp= 1, odt_onoff= 1, Byte mode= 0
2933 14:47:51.014654 ==
2934 14:47:51.015028 DQS Delay:
2935 14:47:51.017221 DQS0 = 0, DQS1 = 0
2936 14:47:51.017683 DQM Delay:
2937 14:47:51.020463 DQM0 = 20, DQM1 = 18
2938 14:47:51.020885 DQ Delay:
2939 14:47:51.024145 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2940 14:47:51.027428 DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =19
2941 14:47:51.030745 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2942 14:47:51.033834 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2943 14:47:51.034261
2944 14:47:51.034594
2945 14:47:51.034902
2946 14:47:51.037318 [DramC_TX_OE_Calibration] TA2
2947 14:47:51.040398 Original DQ_B0 (3 6) =30, OEN = 27
2948 14:47:51.044358 Original DQ_B1 (3 6) =30, OEN = 27
2949 14:47:51.047132 23, 0x0, End_B0=23 End_B1=23
2950 14:47:51.047561 24, 0x0, End_B0=24 End_B1=24
2951 14:47:51.050620 25, 0x0, End_B0=25 End_B1=25
2952 14:47:51.053928 26, 0x0, End_B0=26 End_B1=26
2953 14:47:51.057346 27, 0x0, End_B0=27 End_B1=27
2954 14:47:51.057781 28, 0x0, End_B0=28 End_B1=28
2955 14:47:51.061108 29, 0x0, End_B0=29 End_B1=29
2956 14:47:51.064125 30, 0x0, End_B0=30 End_B1=30
2957 14:47:51.067480 31, 0xFFFF, End_B0=30 End_B1=30
2958 14:47:51.074145 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2959 14:47:51.077360 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2960 14:47:51.077798
2961 14:47:51.078145
2962 14:47:51.080377 Write Rank0 MR23 =0x3f
2963 14:47:51.080803 [DQSOSC]
2964 14:47:51.087406 [DQSOSCAuto] RK0, (LSB)MR18= 0xb9, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2965 14:47:51.093732 CH1_RK0: MR19=0x3, MR18=0xB9, DQSOSC=330, MR23=63, INC=22, DEC=33
2966 14:47:51.096997 Write Rank0 MR23 =0x3f
2967 14:47:51.097459 [DQSOSC]
2968 14:47:51.103847 [DQSOSCAuto] RK0, (LSB)MR18= 0xbf, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2969 14:47:51.107200 CH1 RK0: MR19=3, MR18=BF
2970 14:47:51.110636 [RankSwap] Rank num 2, (Multi 1), Rank 1
2971 14:47:51.114094 Write Rank0 MR2 =0xad
2972 14:47:51.114517 [Write Leveling]
2973 14:47:51.117059 delay byte0 byte1 byte2 byte3
2974 14:47:51.117516
2975 14:47:51.120322 10 0 0
2976 14:47:51.120750 11 0 0
2977 14:47:51.121090 12 0 0
2978 14:47:51.123897 13 0 0
2979 14:47:51.124324 14 0 0
2980 14:47:51.127031 15 0 0
2981 14:47:51.127460 16 0 0
2982 14:47:51.127797 17 0 0
2983 14:47:51.130514 18 0 0
2984 14:47:51.131149 19 0 0
2985 14:47:51.133923 20 0 0
2986 14:47:51.134347 21 0 0
2987 14:47:51.136847 22 0 0
2988 14:47:51.137302 23 0 0
2989 14:47:51.137651 24 0 0
2990 14:47:51.140490 25 0 0
2991 14:47:51.140916 26 0 0
2992 14:47:51.144113 27 0 0
2993 14:47:51.144543 28 0 0
2994 14:47:51.144884 29 0 0
2995 14:47:51.146790 30 0 0
2996 14:47:51.147218 31 0 0
2997 14:47:51.150256 32 0 ff
2998 14:47:51.150685 33 0 ff
2999 14:47:51.153765 34 0 ff
3000 14:47:51.154193 35 ff ff
3001 14:47:51.156868 36 ff ff
3002 14:47:51.157339 37 ff ff
3003 14:47:51.157715 38 ff ff
3004 14:47:51.160328 39 ff ff
3005 14:47:51.160756 40 ff ff
3006 14:47:51.164015 41 ff ff
3007 14:47:51.167140 pass bytecount = 0xff (0xff: all bytes pass)
3008 14:47:51.167644
3009 14:47:51.168114 DQS0 dly: 35
3010 14:47:51.170489 DQS1 dly: 32
3011 14:47:51.170913 Write Rank0 MR2 =0x2d
3012 14:47:51.177288 [RankSwap] Rank num 2, (Multi 1), Rank 0
3013 14:47:51.177718 Write Rank1 MR1 =0xd6
3014 14:47:51.178058 [Gating]
3015 14:47:51.178370 ==
3016 14:47:51.183774 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3017 14:47:51.187385 fsp= 1, odt_onoff= 1, Byte mode= 0
3018 14:47:51.187810 ==
3019 14:47:51.190452 3 1 0 |808 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3020 14:47:51.197032 3 1 4 |2c2c 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3021 14:47:51.200495 3 1 8 |2c2c 3534 |(0 0)(11 11) |(1 0)(0 1)| 0
3022 14:47:51.203589 3 1 12 |302f 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3023 14:47:51.207123 3 1 16 |2c2c 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3024 14:47:51.213442 3 1 20 |2e2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3025 14:47:51.216857 3 1 24 |2d2d 3534 |(11 0)(11 11) |(1 1)(0 1)| 0
3026 14:47:51.220251 3 1 28 |606 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3027 14:47:51.226940 3 2 0 |3635 b0a |(11 11)(11 11) |(1 1)(1 1)| 0
3028 14:47:51.230548 3 2 4 |3636 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
3029 14:47:51.233708 [Byte 0] Lead/lag Transition tap number (1)
3030 14:47:51.237303 3 2 8 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3031 14:47:51.244069 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3032 14:47:51.247140 3 2 16 |e0e 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3033 14:47:51.250288 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3034 14:47:51.253640 3 2 24 |3535 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
3035 14:47:51.260316 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3036 14:47:51.263533 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3037 14:47:51.267278 3 3 4 |3534 605 |(11 11)(11 11) |(0 1)(1 1)| 0
3038 14:47:51.273765 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3039 14:47:51.276983 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3040 14:47:51.280352 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3041 14:47:51.287057 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3042 14:47:51.290500 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3043 14:47:51.293616 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3044 14:47:51.296706 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3045 14:47:51.303644 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
3046 14:47:51.306930 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3047 14:47:51.310235 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3048 14:47:51.316945 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3049 14:47:51.320229 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3050 14:47:51.323805 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3051 14:47:51.330061 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3052 14:47:51.333735 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3053 14:47:51.337293 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3054 14:47:51.343509 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3055 14:47:51.347043 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3056 14:47:51.350221 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3057 14:47:51.353366 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3058 14:47:51.360458 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3059 14:47:51.363462 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3060 14:47:51.366791 [Byte 0] Lead/lag Transition tap number (2)
3061 14:47:51.373512 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3062 14:47:51.377320 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3063 14:47:51.380151 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3064 14:47:51.383715 [Byte 1] Lead/lag Transition tap number (2)
3065 14:47:51.387112 3 6 0 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
3066 14:47:51.390691 [Byte 0]First pass (3, 6, 0)
3067 14:47:51.393312 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3068 14:47:51.396820 [Byte 1]First pass (3, 6, 4)
3069 14:47:51.400560 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3070 14:47:51.406777 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3071 14:47:51.410308 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3072 14:47:51.413249 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3073 14:47:51.416869 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3074 14:47:51.419918 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3075 14:47:51.426466 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3076 14:47:51.430004 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3077 14:47:51.433561 All bytes gating window > 1UI, Early break!
3078 14:47:51.434042
3079 14:47:51.436910 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3080 14:47:51.437385
3081 14:47:51.440429 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
3082 14:47:51.440854
3083 14:47:51.441187
3084 14:47:51.441577
3085 14:47:51.446952 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3086 14:47:51.447417
3087 14:47:51.450568 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3088 14:47:51.450993
3089 14:47:51.451322
3090 14:47:51.451649 Write Rank1 MR1 =0x56
3091 14:47:51.453566
3092 14:47:51.453985 best RODT dly(2T, 0.5T) = (2, 2)
3093 14:47:51.454323
3094 14:47:51.456700 best RODT dly(2T, 0.5T) = (2, 2)
3095 14:47:51.457123 ==
3096 14:47:51.463705 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3097 14:47:51.466826 fsp= 1, odt_onoff= 1, Byte mode= 0
3098 14:47:51.467254 ==
3099 14:47:51.470421 Start DQ dly to find pass range UseTestEngine =0
3100 14:47:51.473591 x-axis: bit #, y-axis: DQ dly (-127~63)
3101 14:47:51.476736 RX Vref Scan = 0
3102 14:47:51.480130 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3103 14:47:51.483696 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3104 14:47:51.484134 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3105 14:47:51.486861 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3106 14:47:51.490233 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3107 14:47:51.493700 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3108 14:47:51.496982 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3109 14:47:51.500479 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3110 14:47:51.503459 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3111 14:47:51.506740 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3112 14:47:51.507173 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3113 14:47:51.510349 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3114 14:47:51.513716 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3115 14:47:51.516531 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3116 14:47:51.520205 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3117 14:47:51.523581 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3118 14:47:51.526609 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3119 14:47:51.529940 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3120 14:47:51.530371 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3121 14:47:51.533673 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3122 14:47:51.537056 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3123 14:47:51.540127 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3124 14:47:51.543117 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3125 14:47:51.546688 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3126 14:47:51.549750 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3127 14:47:51.550181 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3128 14:47:51.553459 0, [0] xxxoxxxx xxxxxxxo [MSB]
3129 14:47:51.556374 1, [0] xxoooxxo xxxxxxxo [MSB]
3130 14:47:51.559690 2, [0] xxoooxxo xxxxxxxo [MSB]
3131 14:47:51.563516 3, [0] xxoooxxo ooooxooo [MSB]
3132 14:47:51.566400 4, [0] xxoooxxo ooooxooo [MSB]
3133 14:47:51.566835 5, [0] xoooooxo oooooooo [MSB]
3134 14:47:51.569617 6, [0] xoooooxo oooooooo [MSB]
3135 14:47:51.573041 33, [0] oooxoooo oooooooo [MSB]
3136 14:47:51.576812 34, [0] ooxxoooo oooooooo [MSB]
3137 14:47:51.579761 35, [0] ooxxoooo ooooooox [MSB]
3138 14:47:51.583354 36, [0] ooxxoooo ooooooox [MSB]
3139 14:47:51.586546 37, [0] ooxxxooo ooxoooox [MSB]
3140 14:47:51.586979 38, [0] ooxxxooo xoxoooox [MSB]
3141 14:47:51.589923 39, [0] ooxxxoox xxxxoxxx [MSB]
3142 14:47:51.593419 40, [0] ooxxxoox xxxxoxxx [MSB]
3143 14:47:51.596740 41, [0] ooxxxoox xxxxxxxx [MSB]
3144 14:47:51.599717 42, [0] xxxxxxxx xxxxxxxx [MSB]
3145 14:47:51.602784 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3146 14:47:51.606514 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3147 14:47:51.609653 iDelay=42, Bit 2, Center 17 (1 ~ 33) 33
3148 14:47:51.613185 iDelay=42, Bit 3, Center 14 (-3 ~ 32) 36
3149 14:47:51.616354 iDelay=42, Bit 4, Center 18 (1 ~ 36) 36
3150 14:47:51.619583 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3151 14:47:51.622958 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3152 14:47:51.626378 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3153 14:47:51.630078 iDelay=42, Bit 8, Center 20 (3 ~ 37) 35
3154 14:47:51.636513 iDelay=42, Bit 9, Center 20 (3 ~ 38) 36
3155 14:47:51.639448 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3156 14:47:51.643357 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3157 14:47:51.646503 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3158 14:47:51.649855 iDelay=42, Bit 13, Center 20 (3 ~ 38) 36
3159 14:47:51.653247 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3160 14:47:51.656469 iDelay=42, Bit 15, Center 17 (0 ~ 34) 35
3161 14:47:51.656896 ==
3162 14:47:51.662958 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3163 14:47:51.666230 fsp= 1, odt_onoff= 1, Byte mode= 0
3164 14:47:51.666679 ==
3165 14:47:51.667016 DQS Delay:
3166 14:47:51.669479 DQS0 = 0, DQS1 = 0
3167 14:47:51.669904 DQM Delay:
3168 14:47:51.670241 DQM0 = 20, DQM1 = 19
3169 14:47:51.672722 DQ Delay:
3170 14:47:51.676297 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =14
3171 14:47:51.679371 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
3172 14:47:51.683059 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
3173 14:47:51.686050 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =17
3174 14:47:51.686518
3175 14:47:51.686852
3176 14:47:51.687189 DramC Write-DBI off
3177 14:47:51.687515 ==
3178 14:47:51.692945 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3179 14:47:51.696394 fsp= 1, odt_onoff= 1, Byte mode= 0
3180 14:47:51.696817 ==
3181 14:47:51.699316 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3182 14:47:51.699740
3183 14:47:51.702997 Begin, DQ Scan Range 928~1184
3184 14:47:51.703421
3185 14:47:51.703753
3186 14:47:51.706213 TX Vref Scan disable
3187 14:47:51.709515 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3188 14:47:51.712679 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3189 14:47:51.716172 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3190 14:47:51.719396 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3191 14:47:51.722918 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3192 14:47:51.726016 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3193 14:47:51.729353 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3194 14:47:51.732625 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3195 14:47:51.735891 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3196 14:47:51.739338 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3197 14:47:51.742677 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3198 14:47:51.746062 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3199 14:47:51.750125 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3200 14:47:51.755914 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3201 14:47:51.759598 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3202 14:47:51.762789 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3203 14:47:51.766064 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3204 14:47:51.769650 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3205 14:47:51.772668 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3206 14:47:51.775867 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3207 14:47:51.779409 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3208 14:47:51.782492 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3209 14:47:51.786025 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3210 14:47:51.789104 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3211 14:47:51.792770 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3212 14:47:51.795720 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3213 14:47:51.799334 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3214 14:47:51.803059 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3215 14:47:51.805833 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3216 14:47:51.812464 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3217 14:47:51.815686 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3218 14:47:51.819350 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3219 14:47:51.822452 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3220 14:47:51.825753 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3221 14:47:51.829315 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3222 14:47:51.832344 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3223 14:47:51.836106 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3224 14:47:51.839113 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3225 14:47:51.842364 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3226 14:47:51.845837 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3227 14:47:51.849067 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3228 14:47:51.852491 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3229 14:47:51.855732 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
3230 14:47:51.859087 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3231 14:47:51.862485 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3232 14:47:51.866047 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
3233 14:47:51.869669 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3234 14:47:51.872511 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3235 14:47:51.875709 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3236 14:47:51.884097 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3237 14:47:51.887348 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3238 14:47:51.890930 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3239 14:47:51.893649 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3240 14:47:51.897210 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3241 14:47:51.900784 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3242 14:47:51.904032 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3243 14:47:51.907199 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3244 14:47:51.910443 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3245 14:47:51.913900 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3246 14:47:51.917107 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3247 14:47:51.920472 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3248 14:47:51.924002 Byte0, DQ PI dly=985, DQM PI dly= 985
3249 14:47:51.930687 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3250 14:47:51.931151
3251 14:47:51.933643 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3252 14:47:51.934072
3253 14:47:51.937443 Byte1, DQ PI dly=978, DQM PI dly= 978
3254 14:47:51.940668 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3255 14:47:51.941096
3256 14:47:51.947125 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3257 14:47:51.947557
3258 14:47:51.947895 ==
3259 14:47:51.950652 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3260 14:47:51.953610 fsp= 1, odt_onoff= 1, Byte mode= 0
3261 14:47:51.954037 ==
3262 14:47:51.960272 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3263 14:47:51.960700
3264 14:47:51.961032 Begin, DQ Scan Range 954~1018
3265 14:47:51.963342 Write Rank1 MR14 =0x0
3266 14:47:51.972787
3267 14:47:51.973235 CH=1, VrefRange= 0, VrefLevel = 0
3268 14:47:51.978982 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3269 14:47:51.982534 TX Bit1 (978~996) 19 987, Bit9 (970~986) 17 978,
3270 14:47:51.989552 TX Bit2 (976~991) 16 983, Bit10 (971~986) 16 978,
3271 14:47:51.993199 TX Bit3 (975~990) 16 982, Bit11 (974~990) 17 982,
3272 14:47:51.995855 TX Bit4 (977~992) 16 984, Bit12 (973~988) 16 980,
3273 14:47:52.002739 TX Bit5 (978~997) 20 987, Bit13 (975~987) 13 981,
3274 14:47:52.006101 TX Bit6 (978~997) 20 987, Bit14 (972~987) 16 979,
3275 14:47:52.009550 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
3276 14:47:52.009978
3277 14:47:52.012732 Write Rank1 MR14 =0x2
3278 14:47:52.021866
3279 14:47:52.022287 CH=1, VrefRange= 0, VrefLevel = 2
3280 14:47:52.028338 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3281 14:47:52.031770 TX Bit1 (978~996) 19 987, Bit9 (971~986) 16 978,
3282 14:47:52.038269 TX Bit2 (976~991) 16 983, Bit10 (971~986) 16 978,
3283 14:47:52.041525 TX Bit3 (974~991) 18 982, Bit11 (974~991) 18 982,
3284 14:47:52.044937 TX Bit4 (977~993) 17 985, Bit12 (972~988) 17 980,
3285 14:47:52.051717 TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980,
3286 14:47:52.055261 TX Bit6 (978~998) 21 988, Bit14 (973~988) 16 980,
3287 14:47:52.058272 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3288 14:47:52.058697
3289 14:47:52.061483 Write Rank1 MR14 =0x4
3290 14:47:52.071034
3291 14:47:52.071555 CH=1, VrefRange= 0, VrefLevel = 4
3292 14:47:52.077690 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3293 14:47:52.080677 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3294 14:47:52.087415 TX Bit2 (976~992) 17 984, Bit10 (971~988) 18 979,
3295 14:47:52.090513 TX Bit3 (974~991) 18 982, Bit11 (973~991) 19 982,
3296 14:47:52.094217 TX Bit4 (976~993) 18 984, Bit12 (972~989) 18 980,
3297 14:47:52.100530 TX Bit5 (978~997) 20 987, Bit13 (974~988) 15 981,
3298 14:47:52.103980 TX Bit6 (978~998) 21 988, Bit14 (972~989) 18 980,
3299 14:47:52.107032 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3300 14:47:52.107462
3301 14:47:52.111140 Write Rank1 MR14 =0x6
3302 14:47:52.120306
3303 14:47:52.120800 CH=1, VrefRange= 0, VrefLevel = 6
3304 14:47:52.126758 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3305 14:47:52.129692 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3306 14:47:52.136367 TX Bit2 (975~992) 18 983, Bit10 (971~988) 18 979,
3307 14:47:52.139627 TX Bit3 (974~991) 18 982, Bit11 (972~991) 20 981,
3308 14:47:52.143415 TX Bit4 (976~994) 19 985, Bit12 (971~990) 20 980,
3309 14:47:52.149590 TX Bit5 (978~997) 20 987, Bit13 (973~988) 16 980,
3310 14:47:52.152922 TX Bit6 (978~998) 21 988, Bit14 (972~989) 18 980,
3311 14:47:52.156295 TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977,
3312 14:47:52.156722
3313 14:47:52.159545 Write Rank1 MR14 =0x8
3314 14:47:52.169015
3315 14:47:52.169479 CH=1, VrefRange= 0, VrefLevel = 8
3316 14:47:52.175827 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3317 14:47:52.179085 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
3318 14:47:52.186025 TX Bit2 (975~992) 18 983, Bit10 (970~988) 19 979,
3319 14:47:52.188739 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3320 14:47:52.192557 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3321 14:47:52.199103 TX Bit5 (978~998) 21 988, Bit13 (972~989) 18 980,
3322 14:47:52.202262 TX Bit6 (978~999) 22 988, Bit14 (972~990) 19 981,
3323 14:47:52.205642 TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976,
3324 14:47:52.206074
3325 14:47:52.208843 Write Rank1 MR14 =0xa
3326 14:47:52.218042
3327 14:47:52.221676 CH=1, VrefRange= 0, VrefLevel = 10
3328 14:47:52.224819 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979,
3329 14:47:52.228245 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3330 14:47:52.234637 TX Bit2 (974~993) 20 983, Bit10 (970~989) 20 979,
3331 14:47:52.238093 TX Bit3 (973~992) 20 982, Bit11 (971~992) 22 981,
3332 14:47:52.241478 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3333 14:47:52.247926 TX Bit5 (977~998) 22 987, Bit13 (973~990) 18 981,
3334 14:47:52.253232 TX Bit6 (977~998) 22 987, Bit14 (971~990) 20 980,
3335 14:47:52.254698 TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976,
3336 14:47:52.257528
3337 14:47:52.257942 Write Rank1 MR14 =0xc
3338 14:47:52.267377
3339 14:47:52.270835 CH=1, VrefRange= 0, VrefLevel = 12
3340 14:47:52.274142 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
3341 14:47:52.277413 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3342 14:47:52.284359 TX Bit2 (975~994) 20 984, Bit10 (970~990) 21 980,
3343 14:47:52.287715 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3344 14:47:52.290865 TX Bit4 (975~996) 22 985, Bit12 (970~991) 22 980,
3345 14:47:52.297491 TX Bit5 (977~998) 22 987, Bit13 (972~990) 19 981,
3346 14:47:52.300884 TX Bit6 (977~999) 23 988, Bit14 (971~991) 21 981,
3347 14:47:52.303932 TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977,
3348 14:47:52.307257
3349 14:47:52.307689 Write Rank1 MR14 =0xe
3350 14:47:52.317112
3351 14:47:52.320238 CH=1, VrefRange= 0, VrefLevel = 14
3352 14:47:52.324000 TX Bit0 (977~1000) 24 988, Bit8 (969~990) 22 979,
3353 14:47:52.327353 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3354 14:47:52.333447 TX Bit2 (974~994) 21 984, Bit10 (969~990) 22 979,
3355 14:47:52.337232 TX Bit3 (971~993) 23 982, Bit11 (971~992) 22 981,
3356 14:47:52.340478 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3357 14:47:52.346685 TX Bit5 (977~998) 22 987, Bit13 (972~991) 20 981,
3358 14:47:52.350137 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3359 14:47:52.353556 TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977,
3360 14:47:52.357058
3361 14:47:52.357550 Write Rank1 MR14 =0x10
3362 14:47:52.366450
3363 14:47:52.370382 CH=1, VrefRange= 0, VrefLevel = 16
3364 14:47:52.373119 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3365 14:47:52.376223 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3366 14:47:52.383011 TX Bit2 (974~994) 21 984, Bit10 (969~991) 23 980,
3367 14:47:52.386501 TX Bit3 (971~994) 24 982, Bit11 (970~992) 23 981,
3368 14:47:52.389503 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3369 14:47:52.396380 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3370 14:47:52.399617 TX Bit6 (978~1000) 23 989, Bit14 (970~991) 22 980,
3371 14:47:52.403576 TX Bit7 (976~996) 21 986, Bit15 (967~988) 22 977,
3372 14:47:52.406366
3373 14:47:52.406769 Write Rank1 MR14 =0x12
3374 14:47:52.416092
3375 14:47:52.419524 CH=1, VrefRange= 0, VrefLevel = 18
3376 14:47:52.422830 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3377 14:47:52.426160 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3378 14:47:52.432486 TX Bit2 (973~995) 23 984, Bit10 (970~991) 22 980,
3379 14:47:52.435710 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3380 14:47:52.439682 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3381 14:47:52.445977 TX Bit5 (976~999) 24 987, Bit13 (971~991) 21 981,
3382 14:47:52.449525 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3383 14:47:52.452634 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3384 14:47:52.455750
3385 14:47:52.456168 Write Rank1 MR14 =0x14
3386 14:47:52.465792
3387 14:47:52.469450 CH=1, VrefRange= 0, VrefLevel = 20
3388 14:47:52.472730 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3389 14:47:52.475866 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3390 14:47:52.482694 TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979,
3391 14:47:52.485847 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3392 14:47:52.489464 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3393 14:47:52.496033 TX Bit5 (976~999) 24 987, Bit13 (971~992) 22 981,
3394 14:47:52.499540 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
3395 14:47:52.503075 TX Bit7 (975~997) 23 986, Bit15 (967~988) 22 977,
3396 14:47:52.505772
3397 14:47:52.506193 Write Rank1 MR14 =0x16
3398 14:47:52.515534
3399 14:47:52.519253 CH=1, VrefRange= 0, VrefLevel = 22
3400 14:47:52.522354 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3401 14:47:52.525702 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3402 14:47:52.532125 TX Bit2 (972~996) 25 984, Bit10 (968~991) 24 979,
3403 14:47:52.536097 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3404 14:47:52.539145 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3405 14:47:52.545793 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3406 14:47:52.549390 TX Bit6 (976~1001) 26 988, Bit14 (970~992) 23 981,
3407 14:47:52.555638 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3408 14:47:52.556094
3409 14:47:52.556429 Write Rank1 MR14 =0x18
3410 14:47:52.565778
3411 14:47:52.569192 CH=1, VrefRange= 0, VrefLevel = 24
3412 14:47:52.572386 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3413 14:47:52.575523 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3414 14:47:52.582338 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3415 14:47:52.585762 TX Bit3 (970~995) 26 982, Bit11 (969~992) 24 980,
3416 14:47:52.588994 TX Bit4 (973~998) 26 985, Bit12 (969~993) 25 981,
3417 14:47:52.595682 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3418 14:47:52.599058 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3419 14:47:52.605612 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3420 14:47:52.606074
3421 14:47:52.606403 Write Rank1 MR14 =0x1a
3422 14:47:52.616045
3423 14:47:52.619372 CH=1, VrefRange= 0, VrefLevel = 26
3424 14:47:52.622368 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3425 14:47:52.625808 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3426 14:47:52.632897 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3427 14:47:52.635967 TX Bit3 (970~995) 26 982, Bit11 (969~992) 24 980,
3428 14:47:52.639358 TX Bit4 (973~998) 26 985, Bit12 (969~993) 25 981,
3429 14:47:52.646102 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3430 14:47:52.649078 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3431 14:47:52.655577 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3432 14:47:52.656164
3433 14:47:52.656513 Write Rank1 MR14 =0x1c
3434 14:47:52.665950
3435 14:47:52.666385 CH=1, VrefRange= 0, VrefLevel = 28
3436 14:47:52.672836 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3437 14:47:52.676013 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3438 14:47:52.682665 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3439 14:47:52.685699 TX Bit3 (970~995) 26 982, Bit11 (969~992) 24 980,
3440 14:47:52.688988 TX Bit4 (973~998) 26 985, Bit12 (969~993) 25 981,
3441 14:47:52.695886 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3442 14:47:52.698910 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3443 14:47:52.705751 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3444 14:47:52.706197
3445 14:47:52.706531 Write Rank1 MR14 =0x1e
3446 14:47:52.715725
3447 14:47:52.719349 CH=1, VrefRange= 0, VrefLevel = 30
3448 14:47:52.722771 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3449 14:47:52.725800 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3450 14:47:52.732996 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3451 14:47:52.736041 TX Bit3 (970~995) 26 982, Bit11 (969~992) 24 980,
3452 14:47:52.739158 TX Bit4 (973~998) 26 985, Bit12 (969~993) 25 981,
3453 14:47:52.746031 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3454 14:47:52.749129 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3455 14:47:52.755722 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3456 14:47:52.756187
3457 14:47:52.756705
3458 14:47:52.759319 TX Vref found, early break! 370< 374
3459 14:47:52.762480 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3460 14:47:52.765981 u1DelayCellOfst[0]=8 cells (7 PI)
3461 14:47:52.769555 u1DelayCellOfst[1]=7 cells (6 PI)
3462 14:47:52.772426 u1DelayCellOfst[2]=2 cells (2 PI)
3463 14:47:52.775537 u1DelayCellOfst[3]=0 cells (0 PI)
3464 14:47:52.779086 u1DelayCellOfst[4]=3 cells (3 PI)
3465 14:47:52.779650 u1DelayCellOfst[5]=7 cells (6 PI)
3466 14:47:52.782702 u1DelayCellOfst[6]=7 cells (6 PI)
3467 14:47:52.786132 u1DelayCellOfst[7]=5 cells (4 PI)
3468 14:47:52.789357 Byte0, DQ PI dly=982, DQM PI dly= 985
3469 14:47:52.796137 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3470 14:47:52.796610
3471 14:47:52.799465 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3472 14:47:52.799889
3473 14:47:52.802907 u1DelayCellOfst[8]=2 cells (2 PI)
3474 14:47:52.806087 u1DelayCellOfst[9]=2 cells (2 PI)
3475 14:47:52.809694 u1DelayCellOfst[10]=3 cells (3 PI)
3476 14:47:52.812602 u1DelayCellOfst[11]=3 cells (3 PI)
3477 14:47:52.815566 u1DelayCellOfst[12]=5 cells (4 PI)
3478 14:47:52.819268 u1DelayCellOfst[13]=5 cells (4 PI)
3479 14:47:52.819694 u1DelayCellOfst[14]=3 cells (3 PI)
3480 14:47:52.822268 u1DelayCellOfst[15]=0 cells (0 PI)
3481 14:47:52.826095 Byte1, DQ PI dly=977, DQM PI dly= 979
3482 14:47:52.832710 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3483 14:47:52.833188
3484 14:47:52.835914 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3485 14:47:52.836343
3486 14:47:52.839088 Write Rank1 MR14 =0x18
3487 14:47:52.839640
3488 14:47:52.839989 Final TX Range 0 Vref 24
3489 14:47:52.840309
3490 14:47:52.845865 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3491 14:47:52.846294
3492 14:47:52.852451 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3493 14:47:52.859328 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3494 14:47:52.869201 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3495 14:47:52.869673 Write Rank1 MR3 =0xb0
3496 14:47:52.872590 DramC Write-DBI on
3497 14:47:52.873013 ==
3498 14:47:52.875707 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3499 14:47:52.878961 fsp= 1, odt_onoff= 1, Byte mode= 0
3500 14:47:52.879389 ==
3501 14:47:52.886172 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3502 14:47:52.886680
3503 14:47:52.887019 Begin, DQ Scan Range 699~763
3504 14:47:52.887333
3505 14:47:52.889468
3506 14:47:52.889890 TX Vref Scan disable
3507 14:47:52.892757 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3508 14:47:52.895923 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3509 14:47:52.899253 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3510 14:47:52.902908 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3511 14:47:52.906163 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3512 14:47:52.909372 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3513 14:47:52.912544 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3514 14:47:52.916247 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3515 14:47:52.922413 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3516 14:47:52.926131 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3517 14:47:52.929466 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3518 14:47:52.932834 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3519 14:47:52.936145 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3520 14:47:52.939277 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3521 14:47:52.942594 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3522 14:47:52.946116 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3523 14:47:52.949295 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3524 14:47:52.952495 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3525 14:47:52.955830 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3526 14:47:52.963821 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3527 14:47:52.967086 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3528 14:47:52.970738 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3529 14:47:52.973780 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3530 14:47:52.977286 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3531 14:47:52.980351 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3532 14:47:52.983759 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3533 14:47:52.987477 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3534 14:47:52.990548 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3535 14:47:52.993776 Byte0, DQ PI dly=731, DQM PI dly= 731
3536 14:47:52.997371 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3537 14:47:52.997803
3538 14:47:53.003825 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3539 14:47:53.004254
3540 14:47:53.007424 Byte1, DQ PI dly=723, DQM PI dly= 723
3541 14:47:53.010982 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3542 14:47:53.011457
3543 14:47:53.013602 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3544 14:47:53.014058
3545 14:47:53.020607 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3546 14:47:53.030483 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3547 14:47:53.037289 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3548 14:47:53.037848 Write Rank1 MR3 =0x30
3549 14:47:53.040040 DramC Write-DBI off
3550 14:47:53.040456
3551 14:47:53.040783 [DATLAT]
3552 14:47:53.044063 Freq=1600, CH1 RK1, use_rxtx_scan=0
3553 14:47:53.044493
3554 14:47:53.046880 DATLAT Default: 0x10
3555 14:47:53.047354 7, 0xFFFF, sum=0
3556 14:47:53.050412 8, 0xFFFF, sum=0
3557 14:47:53.050892 9, 0xFFFF, sum=0
3558 14:47:53.053584 10, 0xFFFF, sum=0
3559 14:47:53.054013 11, 0xFFFF, sum=0
3560 14:47:53.057081 12, 0xFFFF, sum=0
3561 14:47:53.057588 13, 0xFFFF, sum=0
3562 14:47:53.058045 14, 0x0, sum=1
3563 14:47:53.060279 15, 0x0, sum=2
3564 14:47:53.060703 16, 0x0, sum=3
3565 14:47:53.064210 17, 0x0, sum=4
3566 14:47:53.066939 pattern=2 first_step=14 total pass=5 best_step=16
3567 14:47:53.067360 ==
3568 14:47:53.073744 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3569 14:47:53.074175 fsp= 1, odt_onoff= 1, Byte mode= 0
3570 14:47:53.077055 ==
3571 14:47:53.080340 Start DQ dly to find pass range UseTestEngine =1
3572 14:47:53.083789 x-axis: bit #, y-axis: DQ dly (-127~63)
3573 14:47:53.084214 RX Vref Scan = 0
3574 14:47:53.087208 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3575 14:47:53.090421 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3576 14:47:53.093685 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3577 14:47:53.097169 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3578 14:47:53.100489 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3579 14:47:53.103769 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3580 14:47:53.107069 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3581 14:47:53.107496 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3582 14:47:53.110364 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3583 14:47:53.113964 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3584 14:47:53.117233 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3585 14:47:53.120146 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3586 14:47:53.123649 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3587 14:47:53.127168 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3588 14:47:53.130593 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3589 14:47:53.131026 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3590 14:47:53.133909 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3591 14:47:53.137087 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3592 14:47:53.140438 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3593 14:47:53.143565 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3594 14:47:53.147233 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3595 14:47:53.150207 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3596 14:47:53.150633 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3597 14:47:53.153535 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3598 14:47:53.156810 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3599 14:47:53.160139 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3600 14:47:53.163700 0, [0] xxooxxxx xxxxxxxo [MSB]
3601 14:47:53.167032 1, [0] xxoooxxo xxxxxxxo [MSB]
3602 14:47:53.170178 2, [0] xxoooxxo oooxxxxo [MSB]
3603 14:47:53.170678 3, [0] xxoooxxo ooooxooo [MSB]
3604 14:47:53.173538 4, [0] xxoooxxo oooooooo [MSB]
3605 14:47:53.176810 5, [0] xoooooxo oooooooo [MSB]
3606 14:47:53.180337 6, [0] xoooooxo oooooooo [MSB]
3607 14:47:53.183745 34, [0] oooxoooo oooooooo [MSB]
3608 14:47:53.186893 35, [0] oooxoooo ooooooox [MSB]
3609 14:47:53.190216 36, [0] ooxxoooo ooooooox [MSB]
3610 14:47:53.193633 37, [0] ooxxxoox ooxooxxx [MSB]
3611 14:47:53.197069 38, [0] ooxxxoox xxxooxxx [MSB]
3612 14:47:53.200136 39, [0] ooxxxoox xxxxoxxx [MSB]
3613 14:47:53.200560 40, [0] ooxxxoox xxxxxxxx [MSB]
3614 14:47:53.203731 41, [0] oxxxxoox xxxxxxxx [MSB]
3615 14:47:53.207511 42, [0] oxxxxxox xxxxxxxx [MSB]
3616 14:47:53.210338 43, [0] xxxxxxxx xxxxxxxx [MSB]
3617 14:47:53.213512 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3618 14:47:53.217098 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3619 14:47:53.220048 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3620 14:47:53.223641 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3621 14:47:53.226970 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3622 14:47:53.230149 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3623 14:47:53.233581 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3624 14:47:53.240242 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3625 14:47:53.243558 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3626 14:47:53.247113 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3627 14:47:53.250473 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3628 14:47:53.253812 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3629 14:47:53.257008 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3630 14:47:53.260535 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3631 14:47:53.263508 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3632 14:47:53.267276 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3633 14:47:53.267696 ==
3634 14:47:53.273374 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3635 14:47:53.276672 fsp= 1, odt_onoff= 1, Byte mode= 0
3636 14:47:53.277118 ==
3637 14:47:53.277697 DQS Delay:
3638 14:47:53.280498 DQS0 = 0, DQS1 = 0
3639 14:47:53.280936 DQM Delay:
3640 14:47:53.283379 DQM0 = 20, DQM1 = 19
3641 14:47:53.283815 DQ Delay:
3642 14:47:53.287226 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3643 14:47:53.290514 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3644 14:47:53.293684 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3645 14:47:53.297554 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3646 14:47:53.297994
3647 14:47:53.298435
3648 14:47:53.298848
3649 14:47:53.300238 [DramC_TX_OE_Calibration] TA2
3650 14:47:53.303756 Original DQ_B0 (3 6) =30, OEN = 27
3651 14:47:53.304210 Original DQ_B1 (3 6) =30, OEN = 27
3652 14:47:53.307298 23, 0x0, End_B0=23 End_B1=23
3653 14:47:53.310912 24, 0x0, End_B0=24 End_B1=24
3654 14:47:53.313782 25, 0x0, End_B0=25 End_B1=25
3655 14:47:53.317150 26, 0x0, End_B0=26 End_B1=26
3656 14:47:53.317640 27, 0x0, End_B0=27 End_B1=27
3657 14:47:53.320779 28, 0x0, End_B0=28 End_B1=28
3658 14:47:53.324034 29, 0x0, End_B0=29 End_B1=29
3659 14:47:53.327684 30, 0x0, End_B0=30 End_B1=30
3660 14:47:53.328130 31, 0xFFFF, End_B0=30 End_B1=30
3661 14:47:53.334036 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3662 14:47:53.340246 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3663 14:47:53.340686
3664 14:47:53.341283
3665 14:47:53.343612 Write Rank1 MR23 =0x3f
3666 14:47:53.344050 [DQSOSC]
3667 14:47:53.350387 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3668 14:47:53.357371 CH1_RK1: MR19=0x3, MR18=0xB4, DQSOSC=332, MR23=63, INC=22, DEC=33
3669 14:47:53.357817 Write Rank1 MR23 =0x3f
3670 14:47:53.360416 [DQSOSC]
3671 14:47:53.367036 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3672 14:47:53.370495 CH1 RK1: MR19=3, MR18=AF
3673 14:47:53.373680 [RxdqsGatingPostProcess] freq 1600
3674 14:47:53.376910 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3675 14:47:53.377395 Rank: 0
3676 14:47:53.380151 best DQS0 dly(2T, 0.5T) = (2, 5)
3677 14:47:53.383478 best DQS1 dly(2T, 0.5T) = (2, 5)
3678 14:47:53.387020 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3679 14:47:53.390186 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3680 14:47:53.390625 Rank: 1
3681 14:47:53.393700 best DQS0 dly(2T, 0.5T) = (2, 5)
3682 14:47:53.397168 best DQS1 dly(2T, 0.5T) = (2, 5)
3683 14:47:53.400223 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3684 14:47:53.403561 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3685 14:47:53.410139 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3686 14:47:53.413845 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3687 14:47:53.416942 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3688 14:47:53.417474
3689 14:47:53.417915
3690 14:47:53.420346 [Calibration Summary] Freqency 1600
3691 14:47:53.420786 CH 0, Rank 0
3692 14:47:53.423671 All Pass.
3693 14:47:53.424109
3694 14:47:53.424572 CH 0, Rank 1
3695 14:47:53.424994 All Pass.
3696 14:47:53.425495
3697 14:47:53.426669 CH 1, Rank 0
3698 14:47:53.427106 All Pass.
3699 14:47:53.427544
3700 14:47:53.427955 CH 1, Rank 1
3701 14:47:53.430536 All Pass.
3702 14:47:53.430971
3703 14:47:53.437147 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3704 14:47:53.443765 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3705 14:47:53.450251 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3706 14:47:53.453298 Write Rank0 MR3 =0xb0
3707 14:47:53.460134 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3708 14:47:53.466798 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3709 14:47:53.473585 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3710 14:47:53.474028 Write Rank1 MR3 =0xb0
3711 14:47:53.480247 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3712 14:47:53.486920 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3713 14:47:53.493850 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3714 14:47:53.496775 Write Rank0 MR3 =0xb0
3715 14:47:53.503574 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3716 14:47:53.510780 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3717 14:47:53.516873 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3718 14:47:53.520089 Write Rank1 MR3 =0xb0
3719 14:47:53.520522 DramC Write-DBI on
3720 14:47:53.524009 [GetDramInforAfterCalByMRR] Vendor 1.
3721 14:47:53.527061 [GetDramInforAfterCalByMRR] Revision 7.
3722 14:47:53.530210 MR8 12
3723 14:47:53.533324 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3724 14:47:53.533779 MR8 12
3725 14:47:53.540401 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3726 14:47:53.540827 MR8 12
3727 14:47:53.543631 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3728 14:47:53.547338 MR8 12
3729 14:47:53.550334 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3730 14:47:53.560309 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3731 14:47:53.560883 Write Rank0 MR13 =0xd0
3732 14:47:53.563474 Write Rank1 MR13 =0xd0
3733 14:47:53.566776 Write Rank0 MR13 =0xd0
3734 14:47:53.567217 Write Rank1 MR13 =0xd0
3735 14:47:53.570124 Save calibration result to emmc
3736 14:47:53.570679
3737 14:47:53.571108
3738 14:47:53.573530 [DramcModeReg_Check] Freq_1600, FSP_1
3739 14:47:53.577090 FSP_1, CH_0, RK0
3740 14:47:53.577560 Write Rank0 MR13 =0xd8
3741 14:47:53.580479 MR12 = 0x56 (global = 0x56) match
3742 14:47:53.583740 MR14 = 0x18 (global = 0x18) match
3743 14:47:53.586843 FSP_1, CH_0, RK1
3744 14:47:53.587269 Write Rank1 MR13 =0xd8
3745 14:47:53.590117 MR12 = 0x56 (global = 0x56) match
3746 14:47:53.593343 MR14 = 0x18 (global = 0x18) match
3747 14:47:53.596742 FSP_1, CH_1, RK0
3748 14:47:53.597166 Write Rank0 MR13 =0xd8
3749 14:47:53.600249 MR12 = 0x56 (global = 0x56) match
3750 14:47:53.603352 MR14 = 0x1a (global = 0x1a) match
3751 14:47:53.606953 FSP_1, CH_1, RK1
3752 14:47:53.607462 Write Rank1 MR13 =0xd8
3753 14:47:53.609971 MR12 = 0x58 (global = 0x58) match
3754 14:47:53.613660 MR14 = 0x18 (global = 0x18) match
3755 14:47:53.614104
3756 14:47:53.620397 [MEM_TEST] 02: After DFS, before run time config
3757 14:47:53.626635 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3758 14:47:53.627065
3759 14:47:53.630125 [TA2_TEST]
3760 14:47:53.630554 === TA2 HW
3761 14:47:53.630982 TA2 PAT: XTALK
3762 14:47:53.636851 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3763 14:47:53.639943 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3764 14:47:53.646577 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3765 14:47:53.649823 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3766 14:47:53.650250
3767 14:47:53.650584
3768 14:47:53.653145 Settings after calibration
3769 14:47:53.653600
3770 14:47:53.656517 [DramcRunTimeConfig]
3771 14:47:53.660209 TransferPLLToSPMControl - MODE SW PHYPLL
3772 14:47:53.660634 TX_TRACKING: ON
3773 14:47:53.663704 RX_TRACKING: ON
3774 14:47:53.664194 HW_GATING: ON
3775 14:47:53.667130 HW_GATING DBG: OFF
3776 14:47:53.667560 ddr_geometry:1
3777 14:47:53.668010 ddr_geometry:1
3778 14:47:53.670381 ddr_geometry:1
3779 14:47:53.670843 ddr_geometry:1
3780 14:47:53.673712 ddr_geometry:1
3781 14:47:53.674303 ddr_geometry:1
3782 14:47:53.674781 ddr_geometry:1
3783 14:47:53.677041 ddr_geometry:1
3784 14:47:53.680029 High Freq DUMMY_READ_FOR_TRACKING: ON
3785 14:47:53.680457 ZQCS_ENABLE_LP4: OFF
3786 14:47:53.683540 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3787 14:47:53.686696 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3788 14:47:53.689973 SPM_CONTROL_AFTERK: ON
3789 14:47:53.693447 IMPEDANCE_TRACKING: ON
3790 14:47:53.693872 TEMP_SENSOR: ON
3791 14:47:53.696806 PER_BANK_REFRESH: ON
3792 14:47:53.697229 HW_SAVE_FOR_SR: ON
3793 14:47:53.700666 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3794 14:47:53.703898 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3795 14:47:53.707162 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3796 14:47:53.710522 Read ODT Tracking: ON
3797 14:47:53.711051 =========================
3798 14:47:53.711506
3799 14:47:53.713751 [TA2_TEST]
3800 14:47:53.714210 === TA2 HW
3801 14:47:53.716866 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3802 14:47:53.723589 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3803 14:47:53.726732 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3804 14:47:53.733750 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3805 14:47:53.734203
3806 14:47:53.736631 [MEM_TEST] 03: After run time config
3807 14:47:53.747448 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3808 14:47:53.750745 [complex_mem_test] start addr:0x40024000, len:131072
3809 14:47:53.954758 1st complex R/W mem test pass
3810 14:47:53.961229 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3811 14:47:53.964636 sync preloader write leveling
3812 14:47:53.967508 sync preloader cbt_mr12
3813 14:47:53.970807 sync preloader cbt_clk_dly
3814 14:47:53.971197 sync preloader cbt_cmd_dly
3815 14:47:53.974788 sync preloader cbt_cs
3816 14:47:53.977462 sync preloader cbt_ca_perbit_delay
3817 14:47:53.977785 sync preloader clk_delay
3818 14:47:53.981358 sync preloader dqs_delay
3819 14:47:53.984587 sync preloader u1Gating2T_Save
3820 14:47:53.987587 sync preloader u1Gating05T_Save
3821 14:47:53.990903 sync preloader u1Gatingfine_tune_Save
3822 14:47:53.994472 sync preloader u1Gatingucpass_count_Save
3823 14:47:53.997840 sync preloader u1TxWindowPerbitVref_Save
3824 14:47:54.001431 sync preloader u1TxCenter_min_Save
3825 14:47:54.004642 sync preloader u1TxCenter_max_Save
3826 14:47:54.007877 sync preloader u1Txwin_center_Save
3827 14:47:54.011337 sync preloader u1Txfirst_pass_Save
3828 14:47:54.014603 sync preloader u1Txlast_pass_Save
3829 14:47:54.015057 sync preloader u1RxDatlat_Save
3830 14:47:54.018129 sync preloader u1RxWinPerbitVref_Save
3831 14:47:54.024423 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3832 14:47:54.027683 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3833 14:47:54.031338 sync preloader delay_cell_unit
3834 14:47:54.038059 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3835 14:47:54.041073 sync preloader write leveling
3836 14:47:54.041755 sync preloader cbt_mr12
3837 14:47:54.044217 sync preloader cbt_clk_dly
3838 14:47:54.047614 sync preloader cbt_cmd_dly
3839 14:47:54.048184 sync preloader cbt_cs
3840 14:47:54.051239 sync preloader cbt_ca_perbit_delay
3841 14:47:54.054422 sync preloader clk_delay
3842 14:47:54.057691 sync preloader dqs_delay
3843 14:47:54.058141 sync preloader u1Gating2T_Save
3844 14:47:54.060969 sync preloader u1Gating05T_Save
3845 14:47:54.064159 sync preloader u1Gatingfine_tune_Save
3846 14:47:54.067573 sync preloader u1Gatingucpass_count_Save
3847 14:47:54.070887 sync preloader u1TxWindowPerbitVref_Save
3848 14:47:54.074293 sync preloader u1TxCenter_min_Save
3849 14:47:54.078015 sync preloader u1TxCenter_max_Save
3850 14:47:54.081091 sync preloader u1Txwin_center_Save
3851 14:47:54.084663 sync preloader u1Txfirst_pass_Save
3852 14:47:54.087832 sync preloader u1Txlast_pass_Save
3853 14:47:54.091091 sync preloader u1RxDatlat_Save
3854 14:47:54.094716 sync preloader u1RxWinPerbitVref_Save
3855 14:47:54.097768 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3856 14:47:54.101213 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3857 14:47:54.104381 sync preloader delay_cell_unit
3858 14:47:54.111094 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3859 14:47:54.114428 sync preloader write leveling
3860 14:47:54.117869 sync preloader cbt_mr12
3861 14:47:54.118296 sync preloader cbt_clk_dly
3862 14:47:54.121205 sync preloader cbt_cmd_dly
3863 14:47:54.124199 sync preloader cbt_cs
3864 14:47:54.127680 sync preloader cbt_ca_perbit_delay
3865 14:47:54.128117 sync preloader clk_delay
3866 14:47:54.130757 sync preloader dqs_delay
3867 14:47:54.133965 sync preloader u1Gating2T_Save
3868 14:47:54.137374 sync preloader u1Gating05T_Save
3869 14:47:54.141014 sync preloader u1Gatingfine_tune_Save
3870 14:47:54.144184 sync preloader u1Gatingucpass_count_Save
3871 14:47:54.147309 sync preloader u1TxWindowPerbitVref_Save
3872 14:47:54.150789 sync preloader u1TxCenter_min_Save
3873 14:47:54.153993 sync preloader u1TxCenter_max_Save
3874 14:47:54.157377 sync preloader u1Txwin_center_Save
3875 14:47:54.160880 sync preloader u1Txfirst_pass_Save
3876 14:47:54.164105 sync preloader u1Txlast_pass_Save
3877 14:47:54.164669 sync preloader u1RxDatlat_Save
3878 14:47:54.167476 sync preloader u1RxWinPerbitVref_Save
3879 14:47:54.174466 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3880 14:47:54.177647 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3881 14:47:54.180573 sync preloader delay_cell_unit
3882 14:47:54.183960 just_for_test_dump_coreboot_params dump all params
3883 14:47:54.187678 dump source = 0x0
3884 14:47:54.188174 dump params frequency:1600
3885 14:47:54.190383 dump params rank number:2
3886 14:47:54.191052
3887 14:47:54.193904 dump params write leveling
3888 14:47:54.197456 write leveling[0][0][0] = 0x21
3889 14:47:54.197882 write leveling[0][0][1] = 0x1b
3890 14:47:54.200990 write leveling[0][1][0] = 0x22
3891 14:47:54.203792 write leveling[0][1][1] = 0x1d
3892 14:47:54.207700 write leveling[1][0][0] = 0x22
3893 14:47:54.210785 write leveling[1][0][1] = 0x1e
3894 14:47:54.213759 write leveling[1][1][0] = 0x23
3895 14:47:54.214186 write leveling[1][1][1] = 0x20
3896 14:47:54.217586 dump params cbt_cs
3897 14:47:54.218027 cbt_cs[0][0] = 0xa
3898 14:47:54.220882 cbt_cs[0][1] = 0xa
3899 14:47:54.223968 cbt_cs[1][0] = 0xb
3900 14:47:54.224447 cbt_cs[1][1] = 0xb
3901 14:47:54.227479 dump params cbt_mr12
3902 14:47:54.228003 cbt_mr12[0][0] = 0x16
3903 14:47:54.230817 cbt_mr12[0][1] = 0x16
3904 14:47:54.231413 cbt_mr12[1][0] = 0x16
3905 14:47:54.233894 cbt_mr12[1][1] = 0x18
3906 14:47:54.237149 dump params tx window
3907 14:47:54.237647 tx_center_min[0][0][0] = 980
3908 14:47:54.240790 tx_center_max[0][0][0] = 987
3909 14:47:54.243808 tx_center_min[0][0][1] = 973
3910 14:47:54.247199 tx_center_max[0][0][1] = 979
3911 14:47:54.250722 tx_center_min[0][1][0] = 982
3912 14:47:54.251150 tx_center_max[0][1][0] = 990
3913 14:47:54.253724 tx_center_min[0][1][1] = 976
3914 14:47:54.257122 tx_center_max[0][1][1] = 981
3915 14:47:54.260569 tx_center_min[1][0][0] = 981
3916 14:47:54.260994 tx_center_max[1][0][0] = 988
3917 14:47:54.264010 tx_center_min[1][0][1] = 974
3918 14:47:54.267415 tx_center_max[1][0][1] = 979
3919 14:47:54.270823 tx_center_min[1][1][0] = 982
3920 14:47:54.274156 tx_center_max[1][1][0] = 989
3921 14:47:54.274592 tx_center_min[1][1][1] = 977
3922 14:47:54.277137 tx_center_max[1][1][1] = 981
3923 14:47:54.280633 dump params tx window
3924 14:47:54.283842 tx_win_center[0][0][0] = 987
3925 14:47:54.284277 tx_first_pass[0][0][0] = 975
3926 14:47:54.287444 tx_last_pass[0][0][0] = 999
3927 14:47:54.290744 tx_win_center[0][0][1] = 986
3928 14:47:54.294172 tx_first_pass[0][0][1] = 975
3929 14:47:54.294726 tx_last_pass[0][0][1] = 998
3930 14:47:54.297576 tx_win_center[0][0][2] = 986
3931 14:47:54.300585 tx_first_pass[0][0][2] = 974
3932 14:47:54.303810 tx_last_pass[0][0][2] = 998
3933 14:47:54.307220 tx_win_center[0][0][3] = 980
3934 14:47:54.307649 tx_first_pass[0][0][3] = 968
3935 14:47:54.310653 tx_last_pass[0][0][3] = 992
3936 14:47:54.313734 tx_win_center[0][0][4] = 986
3937 14:47:54.317115 tx_first_pass[0][0][4] = 974
3938 14:47:54.317590 tx_last_pass[0][0][4] = 999
3939 14:47:54.320274 tx_win_center[0][0][5] = 981
3940 14:47:54.323545 tx_first_pass[0][0][5] = 969
3941 14:47:54.326892 tx_last_pass[0][0][5] = 993
3942 14:47:54.330521 tx_win_center[0][0][6] = 982
3943 14:47:54.330953 tx_first_pass[0][0][6] = 970
3944 14:47:54.333769 tx_last_pass[0][0][6] = 994
3945 14:47:54.337705 tx_win_center[0][0][7] = 984
3946 14:47:54.340640 tx_first_pass[0][0][7] = 973
3947 14:47:54.341071 tx_last_pass[0][0][7] = 996
3948 14:47:54.343745 tx_win_center[0][0][8] = 973
3949 14:47:54.347276 tx_first_pass[0][0][8] = 961
3950 14:47:54.350296 tx_last_pass[0][0][8] = 986
3951 14:47:54.354034 tx_win_center[0][0][9] = 975
3952 14:47:54.354635 tx_first_pass[0][0][9] = 963
3953 14:47:54.357007 tx_last_pass[0][0][9] = 988
3954 14:47:54.360616 tx_win_center[0][0][10] = 979
3955 14:47:54.364304 tx_first_pass[0][0][10] = 967
3956 14:47:54.364720 tx_last_pass[0][0][10] = 991
3957 14:47:54.367216 tx_win_center[0][0][11] = 974
3958 14:47:54.370721 tx_first_pass[0][0][11] = 961
3959 14:47:54.374154 tx_last_pass[0][0][11] = 987
3960 14:47:54.376997 tx_win_center[0][0][12] = 975
3961 14:47:54.380750 tx_first_pass[0][0][12] = 962
3962 14:47:54.381168 tx_last_pass[0][0][12] = 988
3963 14:47:54.384107 tx_win_center[0][0][13] = 974
3964 14:47:54.387376 tx_first_pass[0][0][13] = 961
3965 14:47:54.390586 tx_last_pass[0][0][13] = 987
3966 14:47:54.393545 tx_win_center[0][0][14] = 975
3967 14:47:54.394049 tx_first_pass[0][0][14] = 963
3968 14:47:54.397173 tx_last_pass[0][0][14] = 987
3969 14:47:54.400568 tx_win_center[0][0][15] = 978
3970 14:47:54.403490 tx_first_pass[0][0][15] = 966
3971 14:47:54.407084 tx_last_pass[0][0][15] = 990
3972 14:47:54.407500 tx_win_center[0][1][0] = 990
3973 14:47:54.410492 tx_first_pass[0][1][0] = 978
3974 14:47:54.413765 tx_last_pass[0][1][0] = 1002
3975 14:47:54.417001 tx_win_center[0][1][1] = 989
3976 14:47:54.420290 tx_first_pass[0][1][1] = 977
3977 14:47:54.420707 tx_last_pass[0][1][1] = 1001
3978 14:47:54.423480 tx_win_center[0][1][2] = 988
3979 14:47:54.426791 tx_first_pass[0][1][2] = 977
3980 14:47:54.430429 tx_last_pass[0][1][2] = 1000
3981 14:47:54.430847 tx_win_center[0][1][3] = 982
3982 14:47:54.433536 tx_first_pass[0][1][3] = 970
3983 14:47:54.437078 tx_last_pass[0][1][3] = 995
3984 14:47:54.439923 tx_win_center[0][1][4] = 988
3985 14:47:54.443405 tx_first_pass[0][1][4] = 976
3986 14:47:54.443900 tx_last_pass[0][1][4] = 1000
3987 14:47:54.446841 tx_win_center[0][1][5] = 983
3988 14:47:54.450136 tx_first_pass[0][1][5] = 971
3989 14:47:54.453313 tx_last_pass[0][1][5] = 996
3990 14:47:54.453808 tx_win_center[0][1][6] = 985
3991 14:47:54.456897 tx_first_pass[0][1][6] = 972
3992 14:47:54.460073 tx_last_pass[0][1][6] = 998
3993 14:47:54.463195 tx_win_center[0][1][7] = 987
3994 14:47:54.466727 tx_first_pass[0][1][7] = 975
3995 14:47:54.467157 tx_last_pass[0][1][7] = 999
3996 14:47:54.469837 tx_win_center[0][1][8] = 977
3997 14:47:54.473344 tx_first_pass[0][1][8] = 965
3998 14:47:54.477033 tx_last_pass[0][1][8] = 990
3999 14:47:54.477573 tx_win_center[0][1][9] = 978
4000 14:47:54.480173 tx_first_pass[0][1][9] = 967
4001 14:47:54.483392 tx_last_pass[0][1][9] = 990
4002 14:47:54.486734 tx_win_center[0][1][10] = 981
4003 14:47:54.490367 tx_first_pass[0][1][10] = 969
4004 14:47:54.490793 tx_last_pass[0][1][10] = 993
4005 14:47:54.493364 tx_win_center[0][1][11] = 977
4006 14:47:54.496823 tx_first_pass[0][1][11] = 964
4007 14:47:54.499817 tx_last_pass[0][1][11] = 990
4008 14:47:54.503301 tx_win_center[0][1][12] = 978
4009 14:47:54.503728 tx_first_pass[0][1][12] = 966
4010 14:47:54.506516 tx_last_pass[0][1][12] = 990
4011 14:47:54.510443 tx_win_center[0][1][13] = 976
4012 14:47:54.513605 tx_first_pass[0][1][13] = 963
4013 14:47:54.516540 tx_last_pass[0][1][13] = 989
4014 14:47:54.516966 tx_win_center[0][1][14] = 977
4015 14:47:54.520054 tx_first_pass[0][1][14] = 965
4016 14:47:54.523556 tx_last_pass[0][1][14] = 990
4017 14:47:54.526529 tx_win_center[0][1][15] = 979
4018 14:47:54.529787 tx_first_pass[0][1][15] = 968
4019 14:47:54.530212 tx_last_pass[0][1][15] = 991
4020 14:47:54.533596 tx_win_center[1][0][0] = 988
4021 14:47:54.536549 tx_first_pass[1][0][0] = 976
4022 14:47:54.539996 tx_last_pass[1][0][0] = 1000
4023 14:47:54.543301 tx_win_center[1][0][1] = 986
4024 14:47:54.543893 tx_first_pass[1][0][1] = 974
4025 14:47:54.546776 tx_last_pass[1][0][1] = 999
4026 14:47:54.549935 tx_win_center[1][0][2] = 983
4027 14:47:54.553423 tx_first_pass[1][0][2] = 971
4028 14:47:54.553852 tx_last_pass[1][0][2] = 995
4029 14:47:54.556671 tx_win_center[1][0][3] = 981
4030 14:47:54.560338 tx_first_pass[1][0][3] = 969
4031 14:47:54.563082 tx_last_pass[1][0][3] = 993
4032 14:47:54.566981 tx_win_center[1][0][4] = 984
4033 14:47:54.567553 tx_first_pass[1][0][4] = 972
4034 14:47:54.570093 tx_last_pass[1][0][4] = 997
4035 14:47:54.573519 tx_win_center[1][0][5] = 987
4036 14:47:54.576828 tx_first_pass[1][0][5] = 975
4037 14:47:54.577243 tx_last_pass[1][0][5] = 999
4038 14:47:54.579841 tx_win_center[1][0][6] = 988
4039 14:47:54.583332 tx_first_pass[1][0][6] = 976
4040 14:47:54.586681 tx_last_pass[1][0][6] = 1000
4041 14:47:54.589936 tx_win_center[1][0][7] = 984
4042 14:47:54.590386 tx_first_pass[1][0][7] = 972
4043 14:47:54.593138 tx_last_pass[1][0][7] = 997
4044 14:47:54.596508 tx_win_center[1][0][8] = 977
4045 14:47:54.600226 tx_first_pass[1][0][8] = 965
4046 14:47:54.600645 tx_last_pass[1][0][8] = 990
4047 14:47:54.603095 tx_win_center[1][0][9] = 976
4048 14:47:54.606819 tx_first_pass[1][0][9] = 964
4049 14:47:54.610357 tx_last_pass[1][0][9] = 989
4050 14:47:54.613120 tx_win_center[1][0][10] = 978
4051 14:47:54.613581 tx_first_pass[1][0][10] = 966
4052 14:47:54.616282 tx_last_pass[1][0][10] = 990
4053 14:47:54.620078 tx_win_center[1][0][11] = 979
4054 14:47:54.623420 tx_first_pass[1][0][11] = 967
4055 14:47:54.626567 tx_last_pass[1][0][11] = 991
4056 14:47:54.627019 tx_win_center[1][0][12] = 978
4057 14:47:54.629671 tx_first_pass[1][0][12] = 966
4058 14:47:54.633037 tx_last_pass[1][0][12] = 991
4059 14:47:54.636046 tx_win_center[1][0][13] = 979
4060 14:47:54.639338 tx_first_pass[1][0][13] = 968
4061 14:47:54.643219 tx_last_pass[1][0][13] = 990
4062 14:47:54.643638 tx_win_center[1][0][14] = 977
4063 14:47:54.646127 tx_first_pass[1][0][14] = 966
4064 14:47:54.649464 tx_last_pass[1][0][14] = 989
4065 14:47:54.652712 tx_win_center[1][0][15] = 974
4066 14:47:54.656382 tx_first_pass[1][0][15] = 962
4067 14:47:54.656803 tx_last_pass[1][0][15] = 986
4068 14:47:54.659410 tx_win_center[1][1][0] = 989
4069 14:47:54.663167 tx_first_pass[1][1][0] = 977
4070 14:47:54.665963 tx_last_pass[1][1][0] = 1002
4071 14:47:54.666381 tx_win_center[1][1][1] = 988
4072 14:47:54.669295 tx_first_pass[1][1][1] = 977
4073 14:47:54.672778 tx_last_pass[1][1][1] = 1000
4074 14:47:54.675852 tx_win_center[1][1][2] = 984
4075 14:47:54.679319 tx_first_pass[1][1][2] = 972
4076 14:47:54.679963 tx_last_pass[1][1][2] = 997
4077 14:47:54.683059 tx_win_center[1][1][3] = 982
4078 14:47:54.685913 tx_first_pass[1][1][3] = 970
4079 14:47:54.689119 tx_last_pass[1][1][3] = 995
4080 14:47:54.692743 tx_win_center[1][1][4] = 985
4081 14:47:54.693236 tx_first_pass[1][1][4] = 973
4082 14:47:54.695765 tx_last_pass[1][1][4] = 998
4083 14:47:54.699192 tx_win_center[1][1][5] = 988
4084 14:47:54.702584 tx_first_pass[1][1][5] = 976
4085 14:47:54.703025 tx_last_pass[1][1][5] = 1000
4086 14:47:54.705963 tx_win_center[1][1][6] = 988
4087 14:47:54.709388 tx_first_pass[1][1][6] = 976
4088 14:47:54.712793 tx_last_pass[1][1][6] = 1001
4089 14:47:54.716123 tx_win_center[1][1][7] = 986
4090 14:47:54.716598 tx_first_pass[1][1][7] = 975
4091 14:47:54.719384 tx_last_pass[1][1][7] = 998
4092 14:47:54.722693 tx_win_center[1][1][8] = 979
4093 14:47:54.725960 tx_first_pass[1][1][8] = 968
4094 14:47:54.726380 tx_last_pass[1][1][8] = 991
4095 14:47:54.729388 tx_win_center[1][1][9] = 979
4096 14:47:54.732889 tx_first_pass[1][1][9] = 968
4097 14:47:54.736170 tx_last_pass[1][1][9] = 991
4098 14:47:54.739403 tx_win_center[1][1][10] = 980
4099 14:47:54.739822 tx_first_pass[1][1][10] = 969
4100 14:47:54.742865 tx_last_pass[1][1][10] = 991
4101 14:47:54.746102 tx_win_center[1][1][11] = 980
4102 14:47:54.749489 tx_first_pass[1][1][11] = 969
4103 14:47:54.752622 tx_last_pass[1][1][11] = 992
4104 14:47:54.753152 tx_win_center[1][1][12] = 981
4105 14:47:54.755629 tx_first_pass[1][1][12] = 969
4106 14:47:54.759414 tx_last_pass[1][1][12] = 993
4107 14:47:54.762431 tx_win_center[1][1][13] = 981
4108 14:47:54.765616 tx_first_pass[1][1][13] = 970
4109 14:47:54.765698 tx_last_pass[1][1][13] = 992
4110 14:47:54.769057 tx_win_center[1][1][14] = 980
4111 14:47:54.772439 tx_first_pass[1][1][14] = 969
4112 14:47:54.775794 tx_last_pass[1][1][14] = 992
4113 14:47:54.779684 tx_win_center[1][1][15] = 977
4114 14:47:54.779765 tx_first_pass[1][1][15] = 966
4115 14:47:54.782300 tx_last_pass[1][1][15] = 989
4116 14:47:54.785630 dump params rx window
4117 14:47:54.785711 rx_firspass[0][0][0] = 9
4118 14:47:54.788842 rx_lastpass[0][0][0] = 42
4119 14:47:54.792432 rx_firspass[0][0][1] = 9
4120 14:47:54.795600 rx_lastpass[0][0][1] = 40
4121 14:47:54.795681 rx_firspass[0][0][2] = 9
4122 14:47:54.798997 rx_lastpass[0][0][2] = 39
4123 14:47:54.802506 rx_firspass[0][0][3] = -1
4124 14:47:54.802587 rx_lastpass[0][0][3] = 31
4125 14:47:54.806003 rx_firspass[0][0][4] = 7
4126 14:47:54.809140 rx_lastpass[0][0][4] = 39
4127 14:47:54.809247 rx_firspass[0][0][5] = 3
4128 14:47:54.812700 rx_lastpass[0][0][5] = 29
4129 14:47:54.816168 rx_firspass[0][0][6] = 2
4130 14:47:54.818901 rx_lastpass[0][0][6] = 32
4131 14:47:54.818982 rx_firspass[0][0][7] = 4
4132 14:47:54.822467 rx_lastpass[0][0][7] = 34
4133 14:47:54.825740 rx_firspass[0][0][8] = 3
4134 14:47:54.825820 rx_lastpass[0][0][8] = 34
4135 14:47:54.829454 rx_firspass[0][0][9] = 5
4136 14:47:54.832564 rx_lastpass[0][0][9] = 35
4137 14:47:54.832645 rx_firspass[0][0][10] = 9
4138 14:47:54.835434 rx_lastpass[0][0][10] = 38
4139 14:47:54.839117 rx_firspass[0][0][11] = 3
4140 14:47:54.842275 rx_lastpass[0][0][11] = 30
4141 14:47:54.842356 rx_firspass[0][0][12] = 5
4142 14:47:54.846053 rx_lastpass[0][0][12] = 34
4143 14:47:54.849065 rx_firspass[0][0][13] = 1
4144 14:47:54.852372 rx_lastpass[0][0][13] = 31
4145 14:47:54.852454 rx_firspass[0][0][14] = 3
4146 14:47:54.855683 rx_lastpass[0][0][14] = 32
4147 14:47:54.858817 rx_firspass[0][0][15] = 4
4148 14:47:54.858898 rx_lastpass[0][0][15] = 35
4149 14:47:54.862206 rx_firspass[0][1][0] = 9
4150 14:47:54.865641 rx_lastpass[0][1][0] = 42
4151 14:47:54.865722 rx_firspass[0][1][1] = 7
4152 14:47:54.869388 rx_lastpass[0][1][1] = 42
4153 14:47:54.872220 rx_firspass[0][1][2] = 8
4154 14:47:54.875524 rx_lastpass[0][1][2] = 42
4155 14:47:54.875605 rx_firspass[0][1][3] = -1
4156 14:47:54.878838 rx_lastpass[0][1][3] = 32
4157 14:47:54.882491 rx_firspass[0][1][4] = 6
4158 14:47:54.882573 rx_lastpass[0][1][4] = 40
4159 14:47:54.885546 rx_firspass[0][1][5] = 0
4160 14:47:54.888897 rx_lastpass[0][1][5] = 35
4161 14:47:54.892107 rx_firspass[0][1][6] = 3
4162 14:47:54.892189 rx_lastpass[0][1][6] = 36
4163 14:47:54.895556 rx_firspass[0][1][7] = 3
4164 14:47:54.898813 rx_lastpass[0][1][7] = 36
4165 14:47:54.898906 rx_firspass[0][1][8] = 0
4166 14:47:54.902344 rx_lastpass[0][1][8] = 36
4167 14:47:54.905539 rx_firspass[0][1][9] = 2
4168 14:47:54.905642 rx_lastpass[0][1][9] = 37
4169 14:47:54.909129 rx_firspass[0][1][10] = 5
4170 14:47:54.912774 rx_lastpass[0][1][10] = 42
4171 14:47:54.915808 rx_firspass[0][1][11] = 0
4172 14:47:54.915889 rx_lastpass[0][1][11] = 34
4173 14:47:54.918995 rx_firspass[0][1][12] = 2
4174 14:47:54.922934 rx_lastpass[0][1][12] = 37
4175 14:47:54.923015 rx_firspass[0][1][13] = 0
4176 14:47:54.925665 rx_lastpass[0][1][13] = 33
4177 14:47:54.929061 rx_firspass[0][1][14] = 2
4178 14:47:54.932630 rx_lastpass[0][1][14] = 35
4179 14:47:54.932711 rx_firspass[0][1][15] = 4
4180 14:47:54.935867 rx_lastpass[0][1][15] = 37
4181 14:47:54.939519 rx_firspass[1][0][0] = 7
4182 14:47:54.939601 rx_lastpass[1][0][0] = 42
4183 14:47:54.942761 rx_firspass[1][0][1] = 6
4184 14:47:54.945675 rx_lastpass[1][0][1] = 40
4185 14:47:54.949353 rx_firspass[1][0][2] = -1
4186 14:47:54.949441 rx_lastpass[1][0][2] = 33
4187 14:47:54.952365 rx_firspass[1][0][3] = -1
4188 14:47:54.955490 rx_lastpass[1][0][3] = 32
4189 14:47:54.955599 rx_firspass[1][0][4] = 3
4190 14:47:54.959091 rx_lastpass[1][0][4] = 34
4191 14:47:54.962231 rx_firspass[1][0][5] = 8
4192 14:47:54.965642 rx_lastpass[1][0][5] = 40
4193 14:47:54.965724 rx_firspass[1][0][6] = 9
4194 14:47:54.968871 rx_lastpass[1][0][6] = 41
4195 14:47:54.972314 rx_firspass[1][0][7] = 4
4196 14:47:54.972395 rx_lastpass[1][0][7] = 34
4197 14:47:54.975893 rx_firspass[1][0][8] = 2
4198 14:47:54.979025 rx_lastpass[1][0][8] = 36
4199 14:47:54.979106 rx_firspass[1][0][9] = 3
4200 14:47:54.982368 rx_lastpass[1][0][9] = 36
4201 14:47:54.985621 rx_firspass[1][0][10] = 1
4202 14:47:54.989209 rx_lastpass[1][0][10] = 35
4203 14:47:54.989330 rx_firspass[1][0][11] = 3
4204 14:47:54.992397 rx_lastpass[1][0][11] = 36
4205 14:47:54.995788 rx_firspass[1][0][12] = 5
4206 14:47:54.995868 rx_lastpass[1][0][12] = 36
4207 14:47:54.998945 rx_firspass[1][0][13] = 5
4208 14:47:55.002495 rx_lastpass[1][0][13] = 34
4209 14:47:55.005672 rx_firspass[1][0][14] = 2
4210 14:47:55.005753 rx_lastpass[1][0][14] = 35
4211 14:47:55.009446 rx_firspass[1][0][15] = 0
4212 14:47:55.012273 rx_lastpass[1][0][15] = 33
4213 14:47:55.012354 rx_firspass[1][1][0] = 7
4214 14:47:55.015899 rx_lastpass[1][1][0] = 42
4215 14:47:55.018874 rx_firspass[1][1][1] = 5
4216 14:47:55.022675 rx_lastpass[1][1][1] = 40
4217 14:47:55.022756 rx_firspass[1][1][2] = 0
4218 14:47:55.025662 rx_lastpass[1][1][2] = 35
4219 14:47:55.028990 rx_firspass[1][1][3] = -2
4220 14:47:55.029071 rx_lastpass[1][1][3] = 33
4221 14:47:55.032546 rx_firspass[1][1][4] = 1
4222 14:47:55.035764 rx_lastpass[1][1][4] = 36
4223 14:47:55.035846 rx_firspass[1][1][5] = 5
4224 14:47:55.039681 rx_lastpass[1][1][5] = 41
4225 14:47:55.042142 rx_firspass[1][1][6] = 7
4226 14:47:55.045751 rx_lastpass[1][1][6] = 42
4227 14:47:55.045833 rx_firspass[1][1][7] = 1
4228 14:47:55.048830 rx_lastpass[1][1][7] = 36
4229 14:47:55.052175 rx_firspass[1][1][8] = 2
4230 14:47:55.052257 rx_lastpass[1][1][8] = 37
4231 14:47:55.055681 rx_firspass[1][1][9] = 2
4232 14:47:55.058844 rx_lastpass[1][1][9] = 37
4233 14:47:55.062474 rx_firspass[1][1][10] = 2
4234 14:47:55.062557 rx_lastpass[1][1][10] = 36
4235 14:47:55.065383 rx_firspass[1][1][11] = 3
4236 14:47:55.068886 rx_lastpass[1][1][11] = 38
4237 14:47:55.068967 rx_firspass[1][1][12] = 4
4238 14:47:55.071983 rx_lastpass[1][1][12] = 39
4239 14:47:55.075694 rx_firspass[1][1][13] = 3
4240 14:47:55.078714 rx_lastpass[1][1][13] = 36
4241 14:47:55.078795 rx_firspass[1][1][14] = 3
4242 14:47:55.082423 rx_lastpass[1][1][14] = 36
4243 14:47:55.085590 rx_firspass[1][1][15] = 0
4244 14:47:55.089262 rx_lastpass[1][1][15] = 34
4245 14:47:55.089379 dump params clk_delay
4246 14:47:55.091982 clk_delay[0] = -1
4247 14:47:55.092067 clk_delay[1] = 0
4248 14:47:55.095384 dump params dqs_delay
4249 14:47:55.095465 dqs_delay[0][0] = -1
4250 14:47:55.098702 dqs_delay[0][1] = 0
4251 14:47:55.098783 dqs_delay[1][0] = -1
4252 14:47:55.101962 dqs_delay[1][1] = 0
4253 14:47:55.105145 dump params delay_cell_unit = 762
4254 14:47:55.105252 dump source = 0x0
4255 14:47:55.109090 dump params frequency:1200
4256 14:47:55.112247 dump params rank number:2
4257 14:47:55.112328
4258 14:47:55.115872 dump params write leveling
4259 14:47:55.115957 write leveling[0][0][0] = 0x0
4260 14:47:55.118665 write leveling[0][0][1] = 0x0
4261 14:47:55.122061 write leveling[0][1][0] = 0x0
4262 14:47:55.125145 write leveling[0][1][1] = 0x0
4263 14:47:55.128655 write leveling[1][0][0] = 0x0
4264 14:47:55.128736 write leveling[1][0][1] = 0x0
4265 14:47:55.131860 write leveling[1][1][0] = 0x0
4266 14:47:55.135376 write leveling[1][1][1] = 0x0
4267 14:47:55.135457 dump params cbt_cs
4268 14:47:55.138864 cbt_cs[0][0] = 0x0
4269 14:47:55.141929 cbt_cs[0][1] = 0x0
4270 14:47:55.142010 cbt_cs[1][0] = 0x0
4271 14:47:55.145462 cbt_cs[1][1] = 0x0
4272 14:47:55.145544 dump params cbt_mr12
4273 14:47:55.148677 cbt_mr12[0][0] = 0x0
4274 14:47:55.148761 cbt_mr12[0][1] = 0x0
4275 14:47:55.152432 cbt_mr12[1][0] = 0x0
4276 14:47:55.152514 cbt_mr12[1][1] = 0x0
4277 14:47:55.155295 dump params tx window
4278 14:47:55.158543 tx_center_min[0][0][0] = 0
4279 14:47:55.158625 tx_center_max[0][0][0] = 0
4280 14:47:55.161875 tx_center_min[0][0][1] = 0
4281 14:47:55.165421 tx_center_max[0][0][1] = 0
4282 14:47:55.168408 tx_center_min[0][1][0] = 0
4283 14:47:55.168490 tx_center_max[0][1][0] = 0
4284 14:47:55.171719 tx_center_min[0][1][1] = 0
4285 14:47:55.175273 tx_center_max[0][1][1] = 0
4286 14:47:55.178463 tx_center_min[1][0][0] = 0
4287 14:47:55.178545 tx_center_max[1][0][0] = 0
4288 14:47:55.181717 tx_center_min[1][0][1] = 0
4289 14:47:55.185022 tx_center_max[1][0][1] = 0
4290 14:47:55.188820 tx_center_min[1][1][0] = 0
4291 14:47:55.188902 tx_center_max[1][1][0] = 0
4292 14:47:55.191725 tx_center_min[1][1][1] = 0
4293 14:47:55.195126 tx_center_max[1][1][1] = 0
4294 14:47:55.195208 dump params tx window
4295 14:47:55.198420 tx_win_center[0][0][0] = 0
4296 14:47:55.201842 tx_first_pass[0][0][0] = 0
4297 14:47:55.204999 tx_last_pass[0][0][0] = 0
4298 14:47:55.205080 tx_win_center[0][0][1] = 0
4299 14:47:55.208927 tx_first_pass[0][0][1] = 0
4300 14:47:55.211798 tx_last_pass[0][0][1] = 0
4301 14:47:55.215136 tx_win_center[0][0][2] = 0
4302 14:47:55.215218 tx_first_pass[0][0][2] = 0
4303 14:47:55.218324 tx_last_pass[0][0][2] = 0
4304 14:47:55.221534 tx_win_center[0][0][3] = 0
4305 14:47:55.221615 tx_first_pass[0][0][3] = 0
4306 14:47:55.224840 tx_last_pass[0][0][3] = 0
4307 14:47:55.228309 tx_win_center[0][0][4] = 0
4308 14:47:55.231481 tx_first_pass[0][0][4] = 0
4309 14:47:55.231563 tx_last_pass[0][0][4] = 0
4310 14:47:55.234863 tx_win_center[0][0][5] = 0
4311 14:47:55.238091 tx_first_pass[0][0][5] = 0
4312 14:47:55.241787 tx_last_pass[0][0][5] = 0
4313 14:47:55.241869 tx_win_center[0][0][6] = 0
4314 14:47:55.244873 tx_first_pass[0][0][6] = 0
4315 14:47:55.248001 tx_last_pass[0][0][6] = 0
4316 14:47:55.248082 tx_win_center[0][0][7] = 0
4317 14:47:55.251758 tx_first_pass[0][0][7] = 0
4318 14:47:55.255383 tx_last_pass[0][0][7] = 0
4319 14:47:55.258538 tx_win_center[0][0][8] = 0
4320 14:47:55.258619 tx_first_pass[0][0][8] = 0
4321 14:47:55.261564 tx_last_pass[0][0][8] = 0
4322 14:47:55.264877 tx_win_center[0][0][9] = 0
4323 14:47:55.268428 tx_first_pass[0][0][9] = 0
4324 14:47:55.268509 tx_last_pass[0][0][9] = 0
4325 14:47:55.271314 tx_win_center[0][0][10] = 0
4326 14:47:55.275037 tx_first_pass[0][0][10] = 0
4327 14:47:55.275119 tx_last_pass[0][0][10] = 0
4328 14:47:55.278205 tx_win_center[0][0][11] = 0
4329 14:47:55.281851 tx_first_pass[0][0][11] = 0
4330 14:47:55.284956 tx_last_pass[0][0][11] = 0
4331 14:47:55.285038 tx_win_center[0][0][12] = 0
4332 14:47:55.288179 tx_first_pass[0][0][12] = 0
4333 14:47:55.291540 tx_last_pass[0][0][12] = 0
4334 14:47:55.295126 tx_win_center[0][0][13] = 0
4335 14:47:55.295208 tx_first_pass[0][0][13] = 0
4336 14:47:55.298043 tx_last_pass[0][0][13] = 0
4337 14:47:55.301254 tx_win_center[0][0][14] = 0
4338 14:47:55.304686 tx_first_pass[0][0][14] = 0
4339 14:47:55.304768 tx_last_pass[0][0][14] = 0
4340 14:47:55.308262 tx_win_center[0][0][15] = 0
4341 14:47:55.311723 tx_first_pass[0][0][15] = 0
4342 14:47:55.314600 tx_last_pass[0][0][15] = 0
4343 14:47:55.314682 tx_win_center[0][1][0] = 0
4344 14:47:55.318315 tx_first_pass[0][1][0] = 0
4345 14:47:55.321611 tx_last_pass[0][1][0] = 0
4346 14:47:55.324715 tx_win_center[0][1][1] = 0
4347 14:47:55.324797 tx_first_pass[0][1][1] = 0
4348 14:47:55.327928 tx_last_pass[0][1][1] = 0
4349 14:47:55.331255 tx_win_center[0][1][2] = 0
4350 14:47:55.334952 tx_first_pass[0][1][2] = 0
4351 14:47:55.335034 tx_last_pass[0][1][2] = 0
4352 14:47:55.338339 tx_win_center[0][1][3] = 0
4353 14:47:55.341159 tx_first_pass[0][1][3] = 0
4354 14:47:55.341275 tx_last_pass[0][1][3] = 0
4355 14:47:55.344598 tx_win_center[0][1][4] = 0
4356 14:47:55.347796 tx_first_pass[0][1][4] = 0
4357 14:47:55.351239 tx_last_pass[0][1][4] = 0
4358 14:47:55.351322 tx_win_center[0][1][5] = 0
4359 14:47:55.354674 tx_first_pass[0][1][5] = 0
4360 14:47:55.358243 tx_last_pass[0][1][5] = 0
4361 14:47:55.361248 tx_win_center[0][1][6] = 0
4362 14:47:55.361376 tx_first_pass[0][1][6] = 0
4363 14:47:55.364616 tx_last_pass[0][1][6] = 0
4364 14:47:55.368023 tx_win_center[0][1][7] = 0
4365 14:47:55.368107 tx_first_pass[0][1][7] = 0
4366 14:47:55.371555 tx_last_pass[0][1][7] = 0
4367 14:47:55.374506 tx_win_center[0][1][8] = 0
4368 14:47:55.377955 tx_first_pass[0][1][8] = 0
4369 14:47:55.378036 tx_last_pass[0][1][8] = 0
4370 14:47:55.381114 tx_win_center[0][1][9] = 0
4371 14:47:55.384798 tx_first_pass[0][1][9] = 0
4372 14:47:55.387803 tx_last_pass[0][1][9] = 0
4373 14:47:55.387883 tx_win_center[0][1][10] = 0
4374 14:47:55.390983 tx_first_pass[0][1][10] = 0
4375 14:47:55.394354 tx_last_pass[0][1][10] = 0
4376 14:47:55.398121 tx_win_center[0][1][11] = 0
4377 14:47:55.398202 tx_first_pass[0][1][11] = 0
4378 14:47:55.401422 tx_last_pass[0][1][11] = 0
4379 14:47:55.404713 tx_win_center[0][1][12] = 0
4380 14:47:55.407588 tx_first_pass[0][1][12] = 0
4381 14:47:55.407717 tx_last_pass[0][1][12] = 0
4382 14:47:55.411441 tx_win_center[0][1][13] = 0
4383 14:47:55.414412 tx_first_pass[0][1][13] = 0
4384 14:47:55.417493 tx_last_pass[0][1][13] = 0
4385 14:47:55.417575 tx_win_center[0][1][14] = 0
4386 14:47:55.421114 tx_first_pass[0][1][14] = 0
4387 14:47:55.424216 tx_last_pass[0][1][14] = 0
4388 14:47:55.427585 tx_win_center[0][1][15] = 0
4389 14:47:55.427692 tx_first_pass[0][1][15] = 0
4390 14:47:55.431313 tx_last_pass[0][1][15] = 0
4391 14:47:55.434740 tx_win_center[1][0][0] = 0
4392 14:47:55.437779 tx_first_pass[1][0][0] = 0
4393 14:47:55.437860 tx_last_pass[1][0][0] = 0
4394 14:47:55.441035 tx_win_center[1][0][1] = 0
4395 14:47:55.444259 tx_first_pass[1][0][1] = 0
4396 14:47:55.444340 tx_last_pass[1][0][1] = 0
4397 14:47:55.447834 tx_win_center[1][0][2] = 0
4398 14:47:55.450862 tx_first_pass[1][0][2] = 0
4399 14:47:55.454074 tx_last_pass[1][0][2] = 0
4400 14:47:55.454157 tx_win_center[1][0][3] = 0
4401 14:47:55.457302 tx_first_pass[1][0][3] = 0
4402 14:47:55.461113 tx_last_pass[1][0][3] = 0
4403 14:47:55.464322 tx_win_center[1][0][4] = 0
4404 14:47:55.464405 tx_first_pass[1][0][4] = 0
4405 14:47:55.467499 tx_last_pass[1][0][4] = 0
4406 14:47:55.470610 tx_win_center[1][0][5] = 0
4407 14:47:55.470692 tx_first_pass[1][0][5] = 0
4408 14:47:55.474319 tx_last_pass[1][0][5] = 0
4409 14:47:55.477500 tx_win_center[1][0][6] = 0
4410 14:47:55.480627 tx_first_pass[1][0][6] = 0
4411 14:47:55.480708 tx_last_pass[1][0][6] = 0
4412 14:47:55.483912 tx_win_center[1][0][7] = 0
4413 14:47:55.487558 tx_first_pass[1][0][7] = 0
4414 14:47:55.490623 tx_last_pass[1][0][7] = 0
4415 14:47:55.490705 tx_win_center[1][0][8] = 0
4416 14:47:55.494233 tx_first_pass[1][0][8] = 0
4417 14:47:55.497226 tx_last_pass[1][0][8] = 0
4418 14:47:55.497346 tx_win_center[1][0][9] = 0
4419 14:47:55.500598 tx_first_pass[1][0][9] = 0
4420 14:47:55.504311 tx_last_pass[1][0][9] = 0
4421 14:47:55.507396 tx_win_center[1][0][10] = 0
4422 14:47:55.507478 tx_first_pass[1][0][10] = 0
4423 14:47:55.511018 tx_last_pass[1][0][10] = 0
4424 14:47:55.513843 tx_win_center[1][0][11] = 0
4425 14:47:55.517375 tx_first_pass[1][0][11] = 0
4426 14:47:55.517457 tx_last_pass[1][0][11] = 0
4427 14:47:55.520649 tx_win_center[1][0][12] = 0
4428 14:47:55.523942 tx_first_pass[1][0][12] = 0
4429 14:47:55.527339 tx_last_pass[1][0][12] = 0
4430 14:47:55.527421 tx_win_center[1][0][13] = 0
4431 14:47:55.530986 tx_first_pass[1][0][13] = 0
4432 14:47:55.534334 tx_last_pass[1][0][13] = 0
4433 14:47:55.537453 tx_win_center[1][0][14] = 0
4434 14:47:55.537535 tx_first_pass[1][0][14] = 0
4435 14:47:55.540815 tx_last_pass[1][0][14] = 0
4436 14:47:55.544052 tx_win_center[1][0][15] = 0
4437 14:47:55.547252 tx_first_pass[1][0][15] = 0
4438 14:47:55.547347 tx_last_pass[1][0][15] = 0
4439 14:47:55.551122 tx_win_center[1][1][0] = 0
4440 14:47:55.554030 tx_first_pass[1][1][0] = 0
4441 14:47:55.557233 tx_last_pass[1][1][0] = 0
4442 14:47:55.557358 tx_win_center[1][1][1] = 0
4443 14:47:55.560859 tx_first_pass[1][1][1] = 0
4444 14:47:55.564261 tx_last_pass[1][1][1] = 0
4445 14:47:55.564384 tx_win_center[1][1][2] = 0
4446 14:47:55.567401 tx_first_pass[1][1][2] = 0
4447 14:47:55.570816 tx_last_pass[1][1][2] = 0
4448 14:47:55.574305 tx_win_center[1][1][3] = 0
4449 14:47:55.574458 tx_first_pass[1][1][3] = 0
4450 14:47:55.577941 tx_last_pass[1][1][3] = 0
4451 14:47:55.580872 tx_win_center[1][1][4] = 0
4452 14:47:55.581086 tx_first_pass[1][1][4] = 0
4453 14:47:55.584071 tx_last_pass[1][1][4] = 0
4454 14:47:55.587691 tx_win_center[1][1][5] = 0
4455 14:47:55.591160 tx_first_pass[1][1][5] = 0
4456 14:47:55.591464 tx_last_pass[1][1][5] = 0
4457 14:47:55.594835 tx_win_center[1][1][6] = 0
4458 14:47:55.597820 tx_first_pass[1][1][6] = 0
4459 14:47:55.601035 tx_last_pass[1][1][6] = 0
4460 14:47:55.601589 tx_win_center[1][1][7] = 0
4461 14:47:55.604777 tx_first_pass[1][1][7] = 0
4462 14:47:55.607664 tx_last_pass[1][1][7] = 0
4463 14:47:55.608092 tx_win_center[1][1][8] = 0
4464 14:47:55.611044 tx_first_pass[1][1][8] = 0
4465 14:47:55.614429 tx_last_pass[1][1][8] = 0
4466 14:47:55.618163 tx_win_center[1][1][9] = 0
4467 14:47:55.618687 tx_first_pass[1][1][9] = 0
4468 14:47:55.621406 tx_last_pass[1][1][9] = 0
4469 14:47:55.624500 tx_win_center[1][1][10] = 0
4470 14:47:55.627727 tx_first_pass[1][1][10] = 0
4471 14:47:55.628213 tx_last_pass[1][1][10] = 0
4472 14:47:55.631272 tx_win_center[1][1][11] = 0
4473 14:47:55.634918 tx_first_pass[1][1][11] = 0
4474 14:47:55.637802 tx_last_pass[1][1][11] = 0
4475 14:47:55.638334 tx_win_center[1][1][12] = 0
4476 14:47:55.641113 tx_first_pass[1][1][12] = 0
4477 14:47:55.644142 tx_last_pass[1][1][12] = 0
4478 14:47:55.647744 tx_win_center[1][1][13] = 0
4479 14:47:55.648185 tx_first_pass[1][1][13] = 0
4480 14:47:55.651078 tx_last_pass[1][1][13] = 0
4481 14:47:55.654287 tx_win_center[1][1][14] = 0
4482 14:47:55.657608 tx_first_pass[1][1][14] = 0
4483 14:47:55.658032 tx_last_pass[1][1][14] = 0
4484 14:47:55.660776 tx_win_center[1][1][15] = 0
4485 14:47:55.664298 tx_first_pass[1][1][15] = 0
4486 14:47:55.667665 tx_last_pass[1][1][15] = 0
4487 14:47:55.668093 dump params rx window
4488 14:47:55.670979 rx_firspass[0][0][0] = 0
4489 14:47:55.674134 rx_lastpass[0][0][0] = 0
4490 14:47:55.674559 rx_firspass[0][0][1] = 0
4491 14:47:55.677639 rx_lastpass[0][0][1] = 0
4492 14:47:55.680986 rx_firspass[0][0][2] = 0
4493 14:47:55.681451 rx_lastpass[0][0][2] = 0
4494 14:47:55.684175 rx_firspass[0][0][3] = 0
4495 14:47:55.687759 rx_lastpass[0][0][3] = 0
4496 14:47:55.688181 rx_firspass[0][0][4] = 0
4497 14:47:55.690824 rx_lastpass[0][0][4] = 0
4498 14:47:55.694365 rx_firspass[0][0][5] = 0
4499 14:47:55.694788 rx_lastpass[0][0][5] = 0
4500 14:47:55.698016 rx_firspass[0][0][6] = 0
4501 14:47:55.701086 rx_lastpass[0][0][6] = 0
4502 14:47:55.701597 rx_firspass[0][0][7] = 0
4503 14:47:55.704398 rx_lastpass[0][0][7] = 0
4504 14:47:55.708090 rx_firspass[0][0][8] = 0
4505 14:47:55.708515 rx_lastpass[0][0][8] = 0
4506 14:47:55.710843 rx_firspass[0][0][9] = 0
4507 14:47:55.714484 rx_lastpass[0][0][9] = 0
4508 14:47:55.717883 rx_firspass[0][0][10] = 0
4509 14:47:55.718310 rx_lastpass[0][0][10] = 0
4510 14:47:55.721190 rx_firspass[0][0][11] = 0
4511 14:47:55.724274 rx_lastpass[0][0][11] = 0
4512 14:47:55.724697 rx_firspass[0][0][12] = 0
4513 14:47:55.727383 rx_lastpass[0][0][12] = 0
4514 14:47:55.731050 rx_firspass[0][0][13] = 0
4515 14:47:55.734450 rx_lastpass[0][0][13] = 0
4516 14:47:55.734907 rx_firspass[0][0][14] = 0
4517 14:47:55.737930 rx_lastpass[0][0][14] = 0
4518 14:47:55.741074 rx_firspass[0][0][15] = 0
4519 14:47:55.741538 rx_lastpass[0][0][15] = 0
4520 14:47:55.744254 rx_firspass[0][1][0] = 0
4521 14:47:55.747925 rx_lastpass[0][1][0] = 0
4522 14:47:55.748447 rx_firspass[0][1][1] = 0
4523 14:47:55.751022 rx_lastpass[0][1][1] = 0
4524 14:47:55.754312 rx_firspass[0][1][2] = 0
4525 14:47:55.757604 rx_lastpass[0][1][2] = 0
4526 14:47:55.758030 rx_firspass[0][1][3] = 0
4527 14:47:55.760807 rx_lastpass[0][1][3] = 0
4528 14:47:55.764310 rx_firspass[0][1][4] = 0
4529 14:47:55.764740 rx_lastpass[0][1][4] = 0
4530 14:47:55.767420 rx_firspass[0][1][5] = 0
4531 14:47:55.771316 rx_lastpass[0][1][5] = 0
4532 14:47:55.771739 rx_firspass[0][1][6] = 0
4533 14:47:55.774380 rx_lastpass[0][1][6] = 0
4534 14:47:55.777717 rx_firspass[0][1][7] = 0
4535 14:47:55.778142 rx_lastpass[0][1][7] = 0
4536 14:47:55.781111 rx_firspass[0][1][8] = 0
4537 14:47:55.784517 rx_lastpass[0][1][8] = 0
4538 14:47:55.784938 rx_firspass[0][1][9] = 0
4539 14:47:55.787385 rx_lastpass[0][1][9] = 0
4540 14:47:55.790895 rx_firspass[0][1][10] = 0
4541 14:47:55.794277 rx_lastpass[0][1][10] = 0
4542 14:47:55.794717 rx_firspass[0][1][11] = 0
4543 14:47:55.797993 rx_lastpass[0][1][11] = 0
4544 14:47:55.800882 rx_firspass[0][1][12] = 0
4545 14:47:55.801485 rx_lastpass[0][1][12] = 0
4546 14:47:55.804598 rx_firspass[0][1][13] = 0
4547 14:47:55.807826 rx_lastpass[0][1][13] = 0
4548 14:47:55.810988 rx_firspass[0][1][14] = 0
4549 14:47:55.811411 rx_lastpass[0][1][14] = 0
4550 14:47:55.814083 rx_firspass[0][1][15] = 0
4551 14:47:55.817724 rx_lastpass[0][1][15] = 0
4552 14:47:55.818149 rx_firspass[1][0][0] = 0
4553 14:47:55.821155 rx_lastpass[1][0][0] = 0
4554 14:47:55.824473 rx_firspass[1][0][1] = 0
4555 14:47:55.825033 rx_lastpass[1][0][1] = 0
4556 14:47:55.827640 rx_firspass[1][0][2] = 0
4557 14:47:55.831179 rx_lastpass[1][0][2] = 0
4558 14:47:55.831628 rx_firspass[1][0][3] = 0
4559 14:47:55.834271 rx_lastpass[1][0][3] = 0
4560 14:47:55.837688 rx_firspass[1][0][4] = 0
4561 14:47:55.838108 rx_lastpass[1][0][4] = 0
4562 14:47:55.841107 rx_firspass[1][0][5] = 0
4563 14:47:55.844054 rx_lastpass[1][0][5] = 0
4564 14:47:55.848203 rx_firspass[1][0][6] = 0
4565 14:47:55.848626 rx_lastpass[1][0][6] = 0
4566 14:47:55.851072 rx_firspass[1][0][7] = 0
4567 14:47:55.854464 rx_lastpass[1][0][7] = 0
4568 14:47:55.854918 rx_firspass[1][0][8] = 0
4569 14:47:55.857550 rx_lastpass[1][0][8] = 0
4570 14:47:55.860997 rx_firspass[1][0][9] = 0
4571 14:47:55.861538 rx_lastpass[1][0][9] = 0
4572 14:47:55.864321 rx_firspass[1][0][10] = 0
4573 14:47:55.867565 rx_lastpass[1][0][10] = 0
4574 14:47:55.867988 rx_firspass[1][0][11] = 0
4575 14:47:55.870968 rx_lastpass[1][0][11] = 0
4576 14:47:55.874187 rx_firspass[1][0][12] = 0
4577 14:47:55.877566 rx_lastpass[1][0][12] = 0
4578 14:47:55.877993 rx_firspass[1][0][13] = 0
4579 14:47:55.880768 rx_lastpass[1][0][13] = 0
4580 14:47:55.884251 rx_firspass[1][0][14] = 0
4581 14:47:55.884675 rx_lastpass[1][0][14] = 0
4582 14:47:55.887705 rx_firspass[1][0][15] = 0
4583 14:47:55.890882 rx_lastpass[1][0][15] = 0
4584 14:47:55.893981 rx_firspass[1][1][0] = 0
4585 14:47:55.894406 rx_lastpass[1][1][0] = 0
4586 14:47:55.897297 rx_firspass[1][1][1] = 0
4587 14:47:55.900569 rx_lastpass[1][1][1] = 0
4588 14:47:55.900992 rx_firspass[1][1][2] = 0
4589 14:47:55.904405 rx_lastpass[1][1][2] = 0
4590 14:47:55.907410 rx_firspass[1][1][3] = 0
4591 14:47:55.907832 rx_lastpass[1][1][3] = 0
4592 14:47:55.910897 rx_firspass[1][1][4] = 0
4593 14:47:55.914099 rx_lastpass[1][1][4] = 0
4594 14:47:55.914522 rx_firspass[1][1][5] = 0
4595 14:47:55.917400 rx_lastpass[1][1][5] = 0
4596 14:47:55.920652 rx_firspass[1][1][6] = 0
4597 14:47:55.923848 rx_lastpass[1][1][6] = 0
4598 14:47:55.924274 rx_firspass[1][1][7] = 0
4599 14:47:55.927208 rx_lastpass[1][1][7] = 0
4600 14:47:55.930621 rx_firspass[1][1][8] = 0
4601 14:47:55.931043 rx_lastpass[1][1][8] = 0
4602 14:47:55.934189 rx_firspass[1][1][9] = 0
4603 14:47:55.937424 rx_lastpass[1][1][9] = 0
4604 14:47:55.937951 rx_firspass[1][1][10] = 0
4605 14:47:55.940641 rx_lastpass[1][1][10] = 0
4606 14:47:55.944207 rx_firspass[1][1][11] = 0
4607 14:47:55.947550 rx_lastpass[1][1][11] = 0
4608 14:47:55.947996 rx_firspass[1][1][12] = 0
4609 14:47:55.950763 rx_lastpass[1][1][12] = 0
4610 14:47:55.953930 rx_firspass[1][1][13] = 0
4611 14:47:55.954352 rx_lastpass[1][1][13] = 0
4612 14:47:55.957087 rx_firspass[1][1][14] = 0
4613 14:47:55.960430 rx_lastpass[1][1][14] = 0
4614 14:47:55.964229 rx_firspass[1][1][15] = 0
4615 14:47:55.964652 rx_lastpass[1][1][15] = 0
4616 14:47:55.967497 dump params clk_delay
4617 14:47:55.967922 clk_delay[0] = 0
4618 14:47:55.970891 clk_delay[1] = 0
4619 14:47:55.971316 dump params dqs_delay
4620 14:47:55.973788 dqs_delay[0][0] = 0
4621 14:47:55.974209 dqs_delay[0][1] = 0
4622 14:47:55.977660 dqs_delay[1][0] = 0
4623 14:47:55.980312 dqs_delay[1][1] = 0
4624 14:47:55.980736 dump params delay_cell_unit = 762
4625 14:47:55.983855 dump source = 0x0
4626 14:47:55.987165 dump params frequency:800
4627 14:47:55.987590 dump params rank number:2
4628 14:47:55.987922
4629 14:47:55.990420 dump params write leveling
4630 14:47:55.993788 write leveling[0][0][0] = 0x0
4631 14:47:55.997139 write leveling[0][0][1] = 0x0
4632 14:47:56.000355 write leveling[0][1][0] = 0x0
4633 14:47:56.000780 write leveling[0][1][1] = 0x0
4634 14:47:56.004088 write leveling[1][0][0] = 0x0
4635 14:47:56.007018 write leveling[1][0][1] = 0x0
4636 14:47:56.010588 write leveling[1][1][0] = 0x0
4637 14:47:56.014155 write leveling[1][1][1] = 0x0
4638 14:47:56.014584 dump params cbt_cs
4639 14:47:56.017517 cbt_cs[0][0] = 0x0
4640 14:47:56.017942 cbt_cs[0][1] = 0x0
4641 14:47:56.020446 cbt_cs[1][0] = 0x0
4642 14:47:56.020870 cbt_cs[1][1] = 0x0
4643 14:47:56.023903 dump params cbt_mr12
4644 14:47:56.024327 cbt_mr12[0][0] = 0x0
4645 14:47:56.027221 cbt_mr12[0][1] = 0x0
4646 14:47:56.027685 cbt_mr12[1][0] = 0x0
4647 14:47:56.030580 cbt_mr12[1][1] = 0x0
4648 14:47:56.033935 dump params tx window
4649 14:47:56.034360 tx_center_min[0][0][0] = 0
4650 14:47:56.037298 tx_center_max[0][0][0] = 0
4651 14:47:56.040417 tx_center_min[0][0][1] = 0
4652 14:47:56.043870 tx_center_max[0][0][1] = 0
4653 14:47:56.044296 tx_center_min[0][1][0] = 0
4654 14:47:56.046990 tx_center_max[0][1][0] = 0
4655 14:47:56.050414 tx_center_min[0][1][1] = 0
4656 14:47:56.050841 tx_center_max[0][1][1] = 0
4657 14:47:56.053818 tx_center_min[1][0][0] = 0
4658 14:47:56.057198 tx_center_max[1][0][0] = 0
4659 14:47:56.060595 tx_center_min[1][0][1] = 0
4660 14:47:56.061020 tx_center_max[1][0][1] = 0
4661 14:47:56.063939 tx_center_min[1][1][0] = 0
4662 14:47:56.067055 tx_center_max[1][1][0] = 0
4663 14:47:56.070856 tx_center_min[1][1][1] = 0
4664 14:47:56.071282 tx_center_max[1][1][1] = 0
4665 14:47:56.074079 dump params tx window
4666 14:47:56.076846 tx_win_center[0][0][0] = 0
4667 14:47:56.077291 tx_first_pass[0][0][0] = 0
4668 14:47:56.080309 tx_last_pass[0][0][0] = 0
4669 14:47:56.083743 tx_win_center[0][0][1] = 0
4670 14:47:56.087105 tx_first_pass[0][0][1] = 0
4671 14:47:56.087528 tx_last_pass[0][0][1] = 0
4672 14:47:56.090274 tx_win_center[0][0][2] = 0
4673 14:47:56.093630 tx_first_pass[0][0][2] = 0
4674 14:47:56.094056 tx_last_pass[0][0][2] = 0
4675 14:47:56.097029 tx_win_center[0][0][3] = 0
4676 14:47:56.100235 tx_first_pass[0][0][3] = 0
4677 14:47:56.104012 tx_last_pass[0][0][3] = 0
4678 14:47:56.104438 tx_win_center[0][0][4] = 0
4679 14:47:56.107447 tx_first_pass[0][0][4] = 0
4680 14:47:56.110359 tx_last_pass[0][0][4] = 0
4681 14:47:56.110783 tx_win_center[0][0][5] = 0
4682 14:47:56.114106 tx_first_pass[0][0][5] = 0
4683 14:47:56.117041 tx_last_pass[0][0][5] = 0
4684 14:47:56.120433 tx_win_center[0][0][6] = 0
4685 14:47:56.120858 tx_first_pass[0][0][6] = 0
4686 14:47:56.124146 tx_last_pass[0][0][6] = 0
4687 14:47:56.127448 tx_win_center[0][0][7] = 0
4688 14:47:56.130600 tx_first_pass[0][0][7] = 0
4689 14:47:56.131024 tx_last_pass[0][0][7] = 0
4690 14:47:56.133914 tx_win_center[0][0][8] = 0
4691 14:47:56.137587 tx_first_pass[0][0][8] = 0
4692 14:47:56.138132 tx_last_pass[0][0][8] = 0
4693 14:47:56.140429 tx_win_center[0][0][9] = 0
4694 14:47:56.143802 tx_first_pass[0][0][9] = 0
4695 14:47:56.147070 tx_last_pass[0][0][9] = 0
4696 14:47:56.147509 tx_win_center[0][0][10] = 0
4697 14:47:56.150766 tx_first_pass[0][0][10] = 0
4698 14:47:56.154256 tx_last_pass[0][0][10] = 0
4699 14:47:56.157548 tx_win_center[0][0][11] = 0
4700 14:47:56.157987 tx_first_pass[0][0][11] = 0
4701 14:47:56.161117 tx_last_pass[0][0][11] = 0
4702 14:47:56.163869 tx_win_center[0][0][12] = 0
4703 14:47:56.167452 tx_first_pass[0][0][12] = 0
4704 14:47:56.167889 tx_last_pass[0][0][12] = 0
4705 14:47:56.170574 tx_win_center[0][0][13] = 0
4706 14:47:56.174007 tx_first_pass[0][0][13] = 0
4707 14:47:56.177434 tx_last_pass[0][0][13] = 0
4708 14:47:56.177849 tx_win_center[0][0][14] = 0
4709 14:47:56.180579 tx_first_pass[0][0][14] = 0
4710 14:47:56.183903 tx_last_pass[0][0][14] = 0
4711 14:47:56.187169 tx_win_center[0][0][15] = 0
4712 14:47:56.187610 tx_first_pass[0][0][15] = 0
4713 14:47:56.190735 tx_last_pass[0][0][15] = 0
4714 14:47:56.194310 tx_win_center[0][1][0] = 0
4715 14:47:56.197569 tx_first_pass[0][1][0] = 0
4716 14:47:56.198009 tx_last_pass[0][1][0] = 0
4717 14:47:56.200952 tx_win_center[0][1][1] = 0
4718 14:47:56.203999 tx_first_pass[0][1][1] = 0
4719 14:47:56.204437 tx_last_pass[0][1][1] = 0
4720 14:47:56.206973 tx_win_center[0][1][2] = 0
4721 14:47:56.210473 tx_first_pass[0][1][2] = 0
4722 14:47:56.213764 tx_last_pass[0][1][2] = 0
4723 14:47:56.214204 tx_win_center[0][1][3] = 0
4724 14:47:56.217526 tx_first_pass[0][1][3] = 0
4725 14:47:56.220402 tx_last_pass[0][1][3] = 0
4726 14:47:56.223929 tx_win_center[0][1][4] = 0
4727 14:47:56.224419 tx_first_pass[0][1][4] = 0
4728 14:47:56.227244 tx_last_pass[0][1][4] = 0
4729 14:47:56.230405 tx_win_center[0][1][5] = 0
4730 14:47:56.233606 tx_first_pass[0][1][5] = 0
4731 14:47:56.234043 tx_last_pass[0][1][5] = 0
4732 14:47:56.237083 tx_win_center[0][1][6] = 0
4733 14:47:56.240009 tx_first_pass[0][1][6] = 0
4734 14:47:56.240462 tx_last_pass[0][1][6] = 0
4735 14:47:56.243469 tx_win_center[0][1][7] = 0
4736 14:47:56.246789 tx_first_pass[0][1][7] = 0
4737 14:47:56.250094 tx_last_pass[0][1][7] = 0
4738 14:47:56.250204 tx_win_center[0][1][8] = 0
4739 14:47:56.253194 tx_first_pass[0][1][8] = 0
4740 14:47:56.256493 tx_last_pass[0][1][8] = 0
4741 14:47:56.256576 tx_win_center[0][1][9] = 0
4742 14:47:56.259682 tx_first_pass[0][1][9] = 0
4743 14:47:56.263230 tx_last_pass[0][1][9] = 0
4744 14:47:56.266468 tx_win_center[0][1][10] = 0
4745 14:47:56.266551 tx_first_pass[0][1][10] = 0
4746 14:47:56.269794 tx_last_pass[0][1][10] = 0
4747 14:47:56.273402 tx_win_center[0][1][11] = 0
4748 14:47:56.276561 tx_first_pass[0][1][11] = 0
4749 14:47:56.276644 tx_last_pass[0][1][11] = 0
4750 14:47:56.279862 tx_win_center[0][1][12] = 0
4751 14:47:56.283111 tx_first_pass[0][1][12] = 0
4752 14:47:56.286704 tx_last_pass[0][1][12] = 0
4753 14:47:56.286786 tx_win_center[0][1][13] = 0
4754 14:47:56.289821 tx_first_pass[0][1][13] = 0
4755 14:47:56.293198 tx_last_pass[0][1][13] = 0
4756 14:47:56.296429 tx_win_center[0][1][14] = 0
4757 14:47:56.296537 tx_first_pass[0][1][14] = 0
4758 14:47:56.299715 tx_last_pass[0][1][14] = 0
4759 14:47:56.302952 tx_win_center[0][1][15] = 0
4760 14:47:56.306668 tx_first_pass[0][1][15] = 0
4761 14:47:56.306750 tx_last_pass[0][1][15] = 0
4762 14:47:56.309946 tx_win_center[1][0][0] = 0
4763 14:47:56.313157 tx_first_pass[1][0][0] = 0
4764 14:47:56.316354 tx_last_pass[1][0][0] = 0
4765 14:47:56.316444 tx_win_center[1][0][1] = 0
4766 14:47:56.319531 tx_first_pass[1][0][1] = 0
4767 14:47:56.322842 tx_last_pass[1][0][1] = 0
4768 14:47:56.326573 tx_win_center[1][0][2] = 0
4769 14:47:56.326661 tx_first_pass[1][0][2] = 0
4770 14:47:56.329782 tx_last_pass[1][0][2] = 0
4771 14:47:56.333160 tx_win_center[1][0][3] = 0
4772 14:47:56.333248 tx_first_pass[1][0][3] = 0
4773 14:47:56.336920 tx_last_pass[1][0][3] = 0
4774 14:47:56.340050 tx_win_center[1][0][4] = 0
4775 14:47:56.343794 tx_first_pass[1][0][4] = 0
4776 14:47:56.343896 tx_last_pass[1][0][4] = 0
4777 14:47:56.347046 tx_win_center[1][0][5] = 0
4778 14:47:56.350176 tx_first_pass[1][0][5] = 0
4779 14:47:56.350287 tx_last_pass[1][0][5] = 0
4780 14:47:56.353198 tx_win_center[1][0][6] = 0
4781 14:47:56.357022 tx_first_pass[1][0][6] = 0
4782 14:47:56.359934 tx_last_pass[1][0][6] = 0
4783 14:47:56.360071 tx_win_center[1][0][7] = 0
4784 14:47:56.363496 tx_first_pass[1][0][7] = 0
4785 14:47:56.366926 tx_last_pass[1][0][7] = 0
4786 14:47:56.370150 tx_win_center[1][0][8] = 0
4787 14:47:56.370326 tx_first_pass[1][0][8] = 0
4788 14:47:56.373100 tx_last_pass[1][0][8] = 0
4789 14:47:56.376948 tx_win_center[1][0][9] = 0
4790 14:47:56.377191 tx_first_pass[1][0][9] = 0
4791 14:47:56.380083 tx_last_pass[1][0][9] = 0
4792 14:47:56.383372 tx_win_center[1][0][10] = 0
4793 14:47:56.386846 tx_first_pass[1][0][10] = 0
4794 14:47:56.387385 tx_last_pass[1][0][10] = 0
4795 14:47:56.390050 tx_win_center[1][0][11] = 0
4796 14:47:56.393373 tx_first_pass[1][0][11] = 0
4797 14:47:56.396739 tx_last_pass[1][0][11] = 0
4798 14:47:56.397164 tx_win_center[1][0][12] = 0
4799 14:47:56.400074 tx_first_pass[1][0][12] = 0
4800 14:47:56.403720 tx_last_pass[1][0][12] = 0
4801 14:47:56.406896 tx_win_center[1][0][13] = 0
4802 14:47:56.407322 tx_first_pass[1][0][13] = 0
4803 14:47:56.410408 tx_last_pass[1][0][13] = 0
4804 14:47:56.413462 tx_win_center[1][0][14] = 0
4805 14:47:56.416956 tx_first_pass[1][0][14] = 0
4806 14:47:56.417428 tx_last_pass[1][0][14] = 0
4807 14:47:56.420295 tx_win_center[1][0][15] = 0
4808 14:47:56.423961 tx_first_pass[1][0][15] = 0
4809 14:47:56.427212 tx_last_pass[1][0][15] = 0
4810 14:47:56.427637 tx_win_center[1][1][0] = 0
4811 14:47:56.430156 tx_first_pass[1][1][0] = 0
4812 14:47:56.433811 tx_last_pass[1][1][0] = 0
4813 14:47:56.436797 tx_win_center[1][1][1] = 0
4814 14:47:56.437388 tx_first_pass[1][1][1] = 0
4815 14:47:56.440401 tx_last_pass[1][1][1] = 0
4816 14:47:56.443488 tx_win_center[1][1][2] = 0
4817 14:47:56.443913 tx_first_pass[1][1][2] = 0
4818 14:47:56.447007 tx_last_pass[1][1][2] = 0
4819 14:47:56.450410 tx_win_center[1][1][3] = 0
4820 14:47:56.453452 tx_first_pass[1][1][3] = 0
4821 14:47:56.453879 tx_last_pass[1][1][3] = 0
4822 14:47:56.456659 tx_win_center[1][1][4] = 0
4823 14:47:56.460005 tx_first_pass[1][1][4] = 0
4824 14:47:56.463331 tx_last_pass[1][1][4] = 0
4825 14:47:56.463756 tx_win_center[1][1][5] = 0
4826 14:47:56.466754 tx_first_pass[1][1][5] = 0
4827 14:47:56.470169 tx_last_pass[1][1][5] = 0
4828 14:47:56.470592 tx_win_center[1][1][6] = 0
4829 14:47:56.473486 tx_first_pass[1][1][6] = 0
4830 14:47:56.476727 tx_last_pass[1][1][6] = 0
4831 14:47:56.480446 tx_win_center[1][1][7] = 0
4832 14:47:56.480869 tx_first_pass[1][1][7] = 0
4833 14:47:56.483610 tx_last_pass[1][1][7] = 0
4834 14:47:56.487139 tx_win_center[1][1][8] = 0
4835 14:47:56.487563 tx_first_pass[1][1][8] = 0
4836 14:47:56.490104 tx_last_pass[1][1][8] = 0
4837 14:47:56.493616 tx_win_center[1][1][9] = 0
4838 14:47:56.496815 tx_first_pass[1][1][9] = 0
4839 14:47:56.497242 tx_last_pass[1][1][9] = 0
4840 14:47:56.500110 tx_win_center[1][1][10] = 0
4841 14:47:56.504042 tx_first_pass[1][1][10] = 0
4842 14:47:56.507087 tx_last_pass[1][1][10] = 0
4843 14:47:56.507515 tx_win_center[1][1][11] = 0
4844 14:47:56.510567 tx_first_pass[1][1][11] = 0
4845 14:47:56.513745 tx_last_pass[1][1][11] = 0
4846 14:47:56.516793 tx_win_center[1][1][12] = 0
4847 14:47:56.517219 tx_first_pass[1][1][12] = 0
4848 14:47:56.520097 tx_last_pass[1][1][12] = 0
4849 14:47:56.523529 tx_win_center[1][1][13] = 0
4850 14:47:56.527149 tx_first_pass[1][1][13] = 0
4851 14:47:56.527571 tx_last_pass[1][1][13] = 0
4852 14:47:56.530138 tx_win_center[1][1][14] = 0
4853 14:47:56.533656 tx_first_pass[1][1][14] = 0
4854 14:47:56.536954 tx_last_pass[1][1][14] = 0
4855 14:47:56.537420 tx_win_center[1][1][15] = 0
4856 14:47:56.540307 tx_first_pass[1][1][15] = 0
4857 14:47:56.543660 tx_last_pass[1][1][15] = 0
4858 14:47:56.544082 dump params rx window
4859 14:47:56.546853 rx_firspass[0][0][0] = 0
4860 14:47:56.550684 rx_lastpass[0][0][0] = 0
4861 14:47:56.551109 rx_firspass[0][0][1] = 0
4862 14:47:56.553776 rx_lastpass[0][0][1] = 0
4863 14:47:56.557023 rx_firspass[0][0][2] = 0
4864 14:47:56.557499 rx_lastpass[0][0][2] = 0
4865 14:47:56.560622 rx_firspass[0][0][3] = 0
4866 14:47:56.563729 rx_lastpass[0][0][3] = 0
4867 14:47:56.567154 rx_firspass[0][0][4] = 0
4868 14:47:56.567575 rx_lastpass[0][0][4] = 0
4869 14:47:56.570296 rx_firspass[0][0][5] = 0
4870 14:47:56.573904 rx_lastpass[0][0][5] = 0
4871 14:47:56.574349 rx_firspass[0][0][6] = 0
4872 14:47:56.577047 rx_lastpass[0][0][6] = 0
4873 14:47:56.580569 rx_firspass[0][0][7] = 0
4874 14:47:56.580989 rx_lastpass[0][0][7] = 0
4875 14:47:56.583720 rx_firspass[0][0][8] = 0
4876 14:47:56.587020 rx_lastpass[0][0][8] = 0
4877 14:47:56.587442 rx_firspass[0][0][9] = 0
4878 14:47:56.590209 rx_lastpass[0][0][9] = 0
4879 14:47:56.593593 rx_firspass[0][0][10] = 0
4880 14:47:56.597140 rx_lastpass[0][0][10] = 0
4881 14:47:56.597647 rx_firspass[0][0][11] = 0
4882 14:47:56.600381 rx_lastpass[0][0][11] = 0
4883 14:47:56.603381 rx_firspass[0][0][12] = 0
4884 14:47:56.603838 rx_lastpass[0][0][12] = 0
4885 14:47:56.606805 rx_firspass[0][0][13] = 0
4886 14:47:56.610438 rx_lastpass[0][0][13] = 0
4887 14:47:56.610867 rx_firspass[0][0][14] = 0
4888 14:47:56.613589 rx_lastpass[0][0][14] = 0
4889 14:47:56.616879 rx_firspass[0][0][15] = 0
4890 14:47:56.620016 rx_lastpass[0][0][15] = 0
4891 14:47:56.620317 rx_firspass[0][1][0] = 0
4892 14:47:56.623511 rx_lastpass[0][1][0] = 0
4893 14:47:56.626893 rx_firspass[0][1][1] = 0
4894 14:47:56.627202 rx_lastpass[0][1][1] = 0
4895 14:47:56.630307 rx_firspass[0][1][2] = 0
4896 14:47:56.633493 rx_lastpass[0][1][2] = 0
4897 14:47:56.633801 rx_firspass[0][1][3] = 0
4898 14:47:56.636590 rx_lastpass[0][1][3] = 0
4899 14:47:56.640200 rx_firspass[0][1][4] = 0
4900 14:47:56.643496 rx_lastpass[0][1][4] = 0
4901 14:47:56.643817 rx_firspass[0][1][5] = 0
4902 14:47:56.646581 rx_lastpass[0][1][5] = 0
4903 14:47:56.649881 rx_firspass[0][1][6] = 0
4904 14:47:56.650185 rx_lastpass[0][1][6] = 0
4905 14:47:56.653615 rx_firspass[0][1][7] = 0
4906 14:47:56.657221 rx_lastpass[0][1][7] = 0
4907 14:47:56.657574 rx_firspass[0][1][8] = 0
4908 14:47:56.660235 rx_lastpass[0][1][8] = 0
4909 14:47:56.663808 rx_firspass[0][1][9] = 0
4910 14:47:56.664157 rx_lastpass[0][1][9] = 0
4911 14:47:56.666747 rx_firspass[0][1][10] = 0
4912 14:47:56.670246 rx_lastpass[0][1][10] = 0
4913 14:47:56.670547 rx_firspass[0][1][11] = 0
4914 14:47:56.673345 rx_lastpass[0][1][11] = 0
4915 14:47:56.677082 rx_firspass[0][1][12] = 0
4916 14:47:56.680476 rx_lastpass[0][1][12] = 0
4917 14:47:56.680777 rx_firspass[0][1][13] = 0
4918 14:47:56.683631 rx_lastpass[0][1][13] = 0
4919 14:47:56.687159 rx_firspass[0][1][14] = 0
4920 14:47:56.687460 rx_lastpass[0][1][14] = 0
4921 14:47:56.690484 rx_firspass[0][1][15] = 0
4922 14:47:56.693512 rx_lastpass[0][1][15] = 0
4923 14:47:56.693932 rx_firspass[1][0][0] = 0
4924 14:47:56.697060 rx_lastpass[1][0][0] = 0
4925 14:47:56.700297 rx_firspass[1][0][1] = 0
4926 14:47:56.703894 rx_lastpass[1][0][1] = 0
4927 14:47:56.704290 rx_firspass[1][0][2] = 0
4928 14:47:56.707174 rx_lastpass[1][0][2] = 0
4929 14:47:56.710268 rx_firspass[1][0][3] = 0
4930 14:47:56.710568 rx_lastpass[1][0][3] = 0
4931 14:47:56.713693 rx_firspass[1][0][4] = 0
4932 14:47:56.717358 rx_lastpass[1][0][4] = 0
4933 14:47:56.717661 rx_firspass[1][0][5] = 0
4934 14:47:56.720122 rx_lastpass[1][0][5] = 0
4935 14:47:56.723434 rx_firspass[1][0][6] = 0
4936 14:47:56.723745 rx_lastpass[1][0][6] = 0
4937 14:47:56.726921 rx_firspass[1][0][7] = 0
4938 14:47:56.730075 rx_lastpass[1][0][7] = 0
4939 14:47:56.730375 rx_firspass[1][0][8] = 0
4940 14:47:56.733512 rx_lastpass[1][0][8] = 0
4941 14:47:56.737313 rx_firspass[1][0][9] = 0
4942 14:47:56.740140 rx_lastpass[1][0][9] = 0
4943 14:47:56.740442 rx_firspass[1][0][10] = 0
4944 14:47:56.743604 rx_lastpass[1][0][10] = 0
4945 14:47:56.747005 rx_firspass[1][0][11] = 0
4946 14:47:56.747308 rx_lastpass[1][0][11] = 0
4947 14:47:56.750139 rx_firspass[1][0][12] = 0
4948 14:47:56.753483 rx_lastpass[1][0][12] = 0
4949 14:47:56.753785 rx_firspass[1][0][13] = 0
4950 14:47:56.756780 rx_lastpass[1][0][13] = 0
4951 14:47:56.760535 rx_firspass[1][0][14] = 0
4952 14:47:56.763485 rx_lastpass[1][0][14] = 0
4953 14:47:56.763787 rx_firspass[1][0][15] = 0
4954 14:47:56.767193 rx_lastpass[1][0][15] = 0
4955 14:47:56.770290 rx_firspass[1][1][0] = 0
4956 14:47:56.770590 rx_lastpass[1][1][0] = 0
4957 14:47:56.773510 rx_firspass[1][1][1] = 0
4958 14:47:56.776671 rx_lastpass[1][1][1] = 0
4959 14:47:56.779930 rx_firspass[1][1][2] = 0
4960 14:47:56.780231 rx_lastpass[1][1][2] = 0
4961 14:47:56.783222 rx_firspass[1][1][3] = 0
4962 14:47:56.786635 rx_lastpass[1][1][3] = 0
4963 14:47:56.786936 rx_firspass[1][1][4] = 0
4964 14:47:56.789950 rx_lastpass[1][1][4] = 0
4965 14:47:56.793552 rx_firspass[1][1][5] = 0
4966 14:47:56.793942 rx_lastpass[1][1][5] = 0
4967 14:47:56.797042 rx_firspass[1][1][6] = 0
4968 14:47:56.800715 rx_lastpass[1][1][6] = 0
4969 14:47:56.801146 rx_firspass[1][1][7] = 0
4970 14:47:56.803613 rx_lastpass[1][1][7] = 0
4971 14:47:56.807070 rx_firspass[1][1][8] = 0
4972 14:47:56.807494 rx_lastpass[1][1][8] = 0
4973 14:47:56.810224 rx_firspass[1][1][9] = 0
4974 14:47:56.813978 rx_lastpass[1][1][9] = 0
4975 14:47:56.814403 rx_firspass[1][1][10] = 0
4976 14:47:56.817078 rx_lastpass[1][1][10] = 0
4977 14:47:56.820334 rx_firspass[1][1][11] = 0
4978 14:47:56.823630 rx_lastpass[1][1][11] = 0
4979 14:47:56.824054 rx_firspass[1][1][12] = 0
4980 14:47:56.826928 rx_lastpass[1][1][12] = 0
4981 14:47:56.830266 rx_firspass[1][1][13] = 0
4982 14:47:56.830686 rx_lastpass[1][1][13] = 0
4983 14:47:56.834025 rx_firspass[1][1][14] = 0
4984 14:47:56.836715 rx_lastpass[1][1][14] = 0
4985 14:47:56.840445 rx_firspass[1][1][15] = 0
4986 14:47:56.840864 rx_lastpass[1][1][15] = 0
4987 14:47:56.843589 dump params clk_delay
4988 14:47:56.843958 clk_delay[0] = 0
4989 14:47:56.846719 clk_delay[1] = 0
4990 14:47:56.847277 dump params dqs_delay
4991 14:47:56.850304 dqs_delay[0][0] = 0
4992 14:47:56.853715 dqs_delay[0][1] = 0
4993 14:47:56.854147 dqs_delay[1][0] = 0
4994 14:47:56.857097 dqs_delay[1][1] = 0
4995 14:47:56.860579 dump params delay_cell_unit = 762
4996 14:47:56.861003 mt_set_emi_preloader end
4997 14:47:56.866803 [mt_mem_init] dram size: 0x100000000, rank number: 2
4998 14:47:56.870153 [complex_mem_test] start addr:0x40000000, len:20480
4999 14:47:56.907071 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5000 14:47:56.913669 [complex_mem_test] start addr:0x80000000, len:20480
5001 14:47:56.949309 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5002 14:47:56.955882 [complex_mem_test] start addr:0xc0000000, len:20480
5003 14:47:56.991730 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5004 14:47:56.997986 [complex_mem_test] start addr:0x56000000, len:8192
5005 14:47:57.015144 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5006 14:47:57.015626 ddr_geometry:1
5007 14:47:57.021213 [complex_mem_test] start addr:0x80000000, len:8192
5008 14:47:57.038711 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5009 14:47:57.041806 dram_init: dram init end (result: 0)
5010 14:47:57.048521 Successfully loaded DRAM blobs and ran DRAM calibration
5011 14:47:57.058418 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5012 14:47:57.058851 CBMEM:
5013 14:47:57.061759 IMD: root @ 00000000fffff000 254 entries.
5014 14:47:57.065498 IMD: root @ 00000000ffffec00 62 entries.
5015 14:47:57.072198 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5016 14:47:57.078697 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5017 14:47:57.082025 in-header: 03 a1 00 00 08 00 00 00
5018 14:47:57.085180 in-data: 84 60 60 10 00 00 00 00
5019 14:47:57.088579 Chrome EC: clear events_b mask to 0x0000000020004000
5020 14:47:57.096000 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5021 14:47:57.099272 in-header: 03 fd 00 00 00 00 00 00
5022 14:47:57.099754 in-data:
5023 14:47:57.106057 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5024 14:47:57.106541 CBFS @ 21000 size 3d4000
5025 14:47:57.112676 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5026 14:47:57.115784 CBFS: Locating 'fallback/ramstage'
5027 14:47:57.119067 CBFS: Found @ offset 10d40 size d563
5028 14:47:57.140449 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5029 14:47:57.153004 Accumulated console time in romstage 12792 ms
5030 14:47:57.153460
5031 14:47:57.153799
5032 14:47:57.162394 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5033 14:47:57.165589 ARM64: Exception handlers installed.
5034 14:47:57.166017 ARM64: Testing exception
5035 14:47:57.168885 ARM64: Done test exception
5036 14:47:57.172240 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5037 14:47:57.175904 Manufacturer: ef
5038 14:47:57.178955 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5039 14:47:57.185551 WARNING: RO_VPD is uninitialized or empty.
5040 14:47:57.189120 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5041 14:47:57.192740 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5042 14:47:57.202440 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5043 14:47:57.205455 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5044 14:47:57.212328 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5045 14:47:57.212913 Enumerating buses...
5046 14:47:57.218621 Show all devs... Before device enumeration.
5047 14:47:57.219104 Root Device: enabled 1
5048 14:47:57.222125 CPU_CLUSTER: 0: enabled 1
5049 14:47:57.222560 CPU: 00: enabled 1
5050 14:47:57.225595 Compare with tree...
5051 14:47:57.228663 Root Device: enabled 1
5052 14:47:57.229102 CPU_CLUSTER: 0: enabled 1
5053 14:47:57.232461 CPU: 00: enabled 1
5054 14:47:57.235532 Root Device scanning...
5055 14:47:57.235956 root_dev_scan_bus for Root Device
5056 14:47:57.238659 CPU_CLUSTER: 0 enabled
5057 14:47:57.242097 root_dev_scan_bus for Root Device done
5058 14:47:57.245803 scan_bus: scanning of bus Root Device took 10690 usecs
5059 14:47:57.248835 done
5060 14:47:57.253164 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5061 14:47:57.255424 Allocating resources...
5062 14:47:57.255865 Reading resources...
5063 14:47:57.258731 Root Device read_resources bus 0 link: 0
5064 14:47:57.265725 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5065 14:47:57.266150 CPU: 00 missing read_resources
5066 14:47:57.272053 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5067 14:47:57.275369 Root Device read_resources bus 0 link: 0 done
5068 14:47:57.278609 Done reading resources.
5069 14:47:57.282229 Show resources in subtree (Root Device)...After reading.
5070 14:47:57.285192 Root Device child on link 0 CPU_CLUSTER: 0
5071 14:47:57.288706 CPU_CLUSTER: 0 child on link 0 CPU: 00
5072 14:47:57.298692 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5073 14:47:57.299118 CPU: 00
5074 14:47:57.301869 Setting resources...
5075 14:47:57.305320 Root Device assign_resources, bus 0 link: 0
5076 14:47:57.308756 CPU_CLUSTER: 0 missing set_resources
5077 14:47:57.312177 Root Device assign_resources, bus 0 link: 0
5078 14:47:57.315033 Done setting resources.
5079 14:47:57.322406 Show resources in subtree (Root Device)...After assigning values.
5080 14:47:57.325306 Root Device child on link 0 CPU_CLUSTER: 0
5081 14:47:57.329003 CPU_CLUSTER: 0 child on link 0 CPU: 00
5082 14:47:57.335284 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5083 14:47:57.338685 CPU: 00
5084 14:47:57.342258 Done allocating resources.
5085 14:47:57.345181 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5086 14:47:57.348982 Enabling resources...
5087 14:47:57.349541 done.
5088 14:47:57.352291 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5089 14:47:57.355363 Initializing devices...
5090 14:47:57.355937 Root Device init ...
5091 14:47:57.358892 mainboard_init: Starting display init.
5092 14:47:57.362207 ADC[4]: Raw value=76494 ID=0
5093 14:47:57.385007 anx7625_power_on_init: Init interface.
5094 14:47:57.388701 anx7625_disable_pd_protocol: Disabled PD feature.
5095 14:47:57.394672 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5096 14:47:57.441712 anx7625_start_dp_work: Secure OCM version=00
5097 14:47:57.444567 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5098 14:47:57.461993 sp_tx_get_edid_block: EDID Block = 1
5099 14:47:57.578687 Extracted contents:
5100 14:47:57.582068 header: 00 ff ff ff ff ff ff 00
5101 14:47:57.585265 serial number: 06 af 5c 14 00 00 00 00 00 1a
5102 14:47:57.588657 version: 01 04
5103 14:47:57.592250 basic params: 95 1a 0e 78 02
5104 14:47:57.595517 chroma info: 99 85 95 55 56 92 28 22 50 54
5105 14:47:57.598909 established: 00 00 00
5106 14:47:57.605820 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5107 14:47:57.609119 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5108 14:47:57.615708 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5109 14:47:57.621873 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5110 14:47:57.628574 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5111 14:47:57.631889 extensions: 00
5112 14:47:57.631972 checksum: ae
5113 14:47:57.632039
5114 14:47:57.635206 Manufacturer: AUO Model 145c Serial Number 0
5115 14:47:57.639075 Made week 0 of 2016
5116 14:47:57.639159 EDID version: 1.4
5117 14:47:57.642545 Digital display
5118 14:47:57.645414 6 bits per primary color channel
5119 14:47:57.645498 DisplayPort interface
5120 14:47:57.648448 Maximum image size: 26 cm x 14 cm
5121 14:47:57.651966 Gamma: 220%
5122 14:47:57.652058 Check DPMS levels
5123 14:47:57.655333 Supported color formats: RGB 4:4:4
5124 14:47:57.658960 First detailed timing is preferred timing
5125 14:47:57.662136 Established timings supported:
5126 14:47:57.665361 Standard timings supported:
5127 14:47:57.665456 Detailed timings
5128 14:47:57.671889 Hex of detail: ce1d56ea50001a3030204600009010000018
5129 14:47:57.675042 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5130 14:47:57.678384 0556 0586 05a6 0640 hborder 0
5131 14:47:57.682035 0300 0304 030a 031a vborder 0
5132 14:47:57.685014 -hsync -vsync
5133 14:47:57.688520 Did detailed timing
5134 14:47:57.691887 Hex of detail: 0000000f0000000000000000000000000020
5135 14:47:57.695221 Manufacturer-specified data, tag 15
5136 14:47:57.698655 Hex of detail: 000000fe0041554f0a202020202020202020
5137 14:47:57.701921 ASCII string: AUO
5138 14:47:57.704978 Hex of detail: 000000fe004231313658414230312e34200a
5139 14:47:57.708342 ASCII string: B116XAB01.4
5140 14:47:57.708441 Checksum
5141 14:47:57.711697 Checksum: 0xae (valid)
5142 14:47:57.718903 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5143 14:47:57.718998 DSI data_rate: 457800000 bps
5144 14:47:57.726357 anx7625_parse_edid: set default k value to 0x3d for panel
5145 14:47:57.729116 anx7625_parse_edid: pixelclock(76300).
5146 14:47:57.732470 hactive(1366), hsync(32), hfp(48), hbp(154)
5147 14:47:57.736121 vactive(768), vsync(6), vfp(4), vbp(16)
5148 14:47:57.739239 anx7625_dsi_config: config dsi.
5149 14:47:57.747236 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5150 14:47:57.768220 anx7625_dsi_config: success to config DSI
5151 14:47:57.771690 anx7625_dp_start: MIPI phy setup OK.
5152 14:47:57.775160 [SSUSB] Setting up USB HOST controller...
5153 14:47:57.778514 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5154 14:47:57.782034 [SSUSB] phy power-on done.
5155 14:47:57.785704 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5156 14:47:57.788856 in-header: 03 fc 01 00 00 00 00 00
5157 14:47:57.789376 in-data:
5158 14:47:57.792223 handle_proto3_response: EC response with error code: 1
5159 14:47:57.796007 SPM: pcm index = 1
5160 14:47:57.799344 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5161 14:47:57.802415 CBFS @ 21000 size 3d4000
5162 14:47:57.809119 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5163 14:47:57.812304 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5164 14:47:57.816164 CBFS: Found @ offset 1e7c0 size 1026
5165 14:47:57.822328 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5166 14:47:57.825796 SPM: binary array size = 2988
5167 14:47:57.829035 SPM: version = pcm_allinone_v1.17.2_20180829
5168 14:47:57.831866 SPM binary loaded in 32 msecs
5169 14:47:57.839524 spm_kick_im_to_fetch: ptr = 000000004021eec2
5170 14:47:57.843285 spm_kick_im_to_fetch: len = 2988
5171 14:47:57.843743 SPM: spm_kick_pcm_to_run
5172 14:47:57.846441 SPM: spm_kick_pcm_to_run done
5173 14:47:57.849583 SPM: spm_init done in 52 msecs
5174 14:47:57.852743 Root Device init finished in 494991 usecs
5175 14:47:57.856380 CPU_CLUSTER: 0 init ...
5176 14:47:57.866209 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5177 14:47:57.869556 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5178 14:47:57.873115 CBFS @ 21000 size 3d4000
5179 14:47:57.876390 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5180 14:47:57.879391 CBFS: Locating 'sspm.bin'
5181 14:47:57.883052 CBFS: Found @ offset 208c0 size 41cb
5182 14:47:57.892897 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5183 14:47:57.900853 CPU_CLUSTER: 0 init finished in 42802 usecs
5184 14:47:57.901327 Devices initialized
5185 14:47:57.904089 Show all devs... After init.
5186 14:47:57.907348 Root Device: enabled 1
5187 14:47:57.907778 CPU_CLUSTER: 0: enabled 1
5188 14:47:57.910736 CPU: 00: enabled 1
5189 14:47:57.913983 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5190 14:47:57.917209 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5191 14:47:57.920615 ELOG: NV offset 0x558000 size 0x1000
5192 14:47:57.928075 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5193 14:47:57.934772 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5194 14:47:57.937733 ELOG: Event(17) added with size 13 at 2024-06-04 14:47:57 UTC
5195 14:47:57.941119 out: cmd=0x121: 03 db 21 01 00 00 00 00
5196 14:47:57.944816 in-header: 03 83 00 00 2c 00 00 00
5197 14:47:57.957897 in-data: f8 47 00 00 00 00 00 00 02 10 00 00 06 80 00 00 2f 3b 01 00 06 80 00 00 26 98 08 00 06 80 00 00 8e 77 01 00 06 80 00 00 31 7b 02 00
5198 14:47:57.961515 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5199 14:47:57.964798 in-header: 03 19 00 00 08 00 00 00
5200 14:47:57.968007 in-data: a2 e0 47 00 13 00 00 00
5201 14:47:57.971386 Chrome EC: UHEPI supported
5202 14:47:57.978046 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5203 14:47:57.981698 in-header: 03 e1 00 00 08 00 00 00
5204 14:47:57.984309 in-data: 84 20 60 10 00 00 00 00
5205 14:47:57.987634 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5206 14:47:57.994600 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5207 14:47:57.997871 in-header: 03 e1 00 00 08 00 00 00
5208 14:47:58.001179 in-data: 84 20 60 10 00 00 00 00
5209 14:47:58.007796 ELOG: Event(A1) added with size 10 at 2024-06-04 14:47:57 UTC
5210 14:47:58.014315 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5211 14:47:58.018244 ELOG: Event(A0) added with size 9 at 2024-06-04 14:47:57 UTC
5212 14:47:58.024856 elog_add_boot_reason: Logged dev mode boot
5213 14:47:58.024939 Finalize devices...
5214 14:47:58.028207 Devices finalized
5215 14:47:58.031458 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5216 14:47:58.034658 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5217 14:47:58.041374 ELOG: Event(91) added with size 10 at 2024-06-04 14:47:57 UTC
5218 14:47:58.044456 Writing coreboot table at 0xffeda000
5219 14:47:58.047856 0. 0000000000114000-000000000011efff: RAMSTAGE
5220 14:47:58.054488 1. 0000000040000000-000000004023cfff: RAMSTAGE
5221 14:47:58.057498 2. 000000004023d000-00000000545fffff: RAM
5222 14:47:58.061280 3. 0000000054600000-000000005465ffff: BL31
5223 14:47:58.064186 4. 0000000054660000-00000000ffed9fff: RAM
5224 14:47:58.071079 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5225 14:47:58.074364 6. 0000000100000000-000000013fffffff: RAM
5226 14:47:58.077540 Passing 5 GPIOs to payload:
5227 14:47:58.081375 NAME | PORT | POLARITY | VALUE
5228 14:47:58.084534 write protect | 0x00000096 | low | high
5229 14:47:58.090769 EC in RW | 0x000000b1 | high | undefined
5230 14:47:58.094384 EC interrupt | 0x00000097 | low | undefined
5231 14:47:58.100695 TPM interrupt | 0x00000099 | high | undefined
5232 14:47:58.103928 speaker enable | 0x000000af | high | undefined
5233 14:47:58.107481 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5234 14:47:58.110767 in-header: 03 f7 00 00 02 00 00 00
5235 14:47:58.110850 in-data: 04 00
5236 14:47:58.114142 Board ID: 4
5237 14:47:58.117835 ADC[3]: Raw value=1034629 ID=8
5238 14:47:58.117918 RAM code: 8
5239 14:47:58.117983 SKU ID: 16
5240 14:47:58.124587 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5241 14:47:58.124670 CBFS @ 21000 size 3d4000
5242 14:47:58.130973 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5243 14:47:58.137310 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 3897
5244 14:47:58.137460 coreboot table: 940 bytes.
5245 14:47:58.143796 IMD ROOT 0. 00000000fffff000 00001000
5246 14:47:58.147862 IMD SMALL 1. 00000000ffffe000 00001000
5247 14:47:58.150777 CONSOLE 2. 00000000fffde000 00020000
5248 14:47:58.154169 FMAP 3. 00000000fffdd000 0000047c
5249 14:47:58.157241 TIME STAMP 4. 00000000fffdc000 00000910
5250 14:47:58.160843 RAMOOPS 5. 00000000ffedc000 00100000
5251 14:47:58.164200 COREBOOT 6. 00000000ffeda000 00002000
5252 14:47:58.167700 IMD small region:
5253 14:47:58.170483 IMD ROOT 0. 00000000ffffec00 00000400
5254 14:47:58.173756 VBOOT WORK 1. 00000000ffffeb00 00000100
5255 14:47:58.177071 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5256 14:47:58.180784 VPD 3. 00000000ffffea60 0000006c
5257 14:47:58.187187 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5258 14:47:58.193891 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5259 14:47:58.197282 in-header: 03 e1 00 00 08 00 00 00
5260 14:47:58.200561 in-data: 84 20 60 10 00 00 00 00
5261 14:47:58.203674 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5262 14:47:58.207414 CBFS @ 21000 size 3d4000
5263 14:47:58.210235 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5264 14:47:58.213745 CBFS: Locating 'fallback/payload'
5265 14:47:58.221994 CBFS: Found @ offset dc040 size 439a0
5266 14:47:58.310621 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5267 14:47:58.313537 Checking segment from ROM address 0x0000000040003a00
5268 14:47:58.320855 Checking segment from ROM address 0x0000000040003a1c
5269 14:47:58.323879 Loading segment from ROM address 0x0000000040003a00
5270 14:47:58.326856 code (compression=0)
5271 14:47:58.336846 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5272 14:47:58.343493 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5273 14:47:58.346910 it's not compressed!
5274 14:47:58.350509 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5275 14:47:58.356628 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5276 14:47:58.365146 Loading segment from ROM address 0x0000000040003a1c
5277 14:47:58.368074 Entry Point 0x0000000080000000
5278 14:47:58.368500 Loaded segments
5279 14:47:58.374770 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5280 14:47:58.377949 Jumping to boot code at 0000000080000000(00000000ffeda000)
5281 14:47:58.388255 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5282 14:47:58.391402 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5283 14:47:58.394710 CBFS @ 21000 size 3d4000
5284 14:47:58.401130 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5285 14:47:58.404357 CBFS: Locating 'fallback/bl31'
5286 14:47:58.407743 CBFS: Found @ offset 36dc0 size 5820
5287 14:47:58.418617 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5288 14:47:58.422296 Checking segment from ROM address 0x0000000040003a00
5289 14:47:58.428636 Checking segment from ROM address 0x0000000040003a1c
5290 14:47:58.432317 Loading segment from ROM address 0x0000000040003a00
5291 14:47:58.435233 code (compression=1)
5292 14:47:58.441843 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5293 14:47:58.452009 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5294 14:47:58.452437 using LZMA
5295 14:47:58.460680 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5296 14:47:58.467158 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5297 14:47:58.470757 Loading segment from ROM address 0x0000000040003a1c
5298 14:47:58.474167 Entry Point 0x0000000054601000
5299 14:47:58.474826 Loaded segments
5300 14:47:58.477061 NOTICE: MT8183 bl31_setup
5301 14:47:58.484072 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5302 14:47:58.487622 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5303 14:47:58.491169 INFO: [DEVAPC] dump DEVAPC registers:
5304 14:47:58.501063 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5305 14:47:58.507931 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5306 14:47:58.517580 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5307 14:47:58.523680 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5308 14:47:58.533962 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5309 14:47:58.540491 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5310 14:47:58.550403 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5311 14:47:58.557050 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5312 14:47:58.567568 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5313 14:47:58.573807 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5314 14:47:58.580157 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5315 14:47:58.590439 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5316 14:47:58.597024 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5317 14:47:58.606826 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5318 14:47:58.613518 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5319 14:47:58.620665 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5320 14:47:58.627251 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5321 14:47:58.633520 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5322 14:47:58.643472 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5323 14:47:58.650476 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5324 14:47:58.656912 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5325 14:47:58.663593 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5326 14:47:58.666736 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5327 14:47:58.670544 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5328 14:47:58.673661 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5329 14:47:58.677102 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5330 14:47:58.680170 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5331 14:47:58.686976 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5332 14:47:58.693662 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5333 14:47:58.694099 WARNING: region 0:
5334 14:47:58.696721 WARNING: apc:0x168, sa:0x0, ea:0xfff
5335 14:47:58.700395 WARNING: region 1:
5336 14:47:58.703544 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5337 14:47:58.704003 WARNING: region 2:
5338 14:47:58.707077 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5339 14:47:58.710272 WARNING: region 3:
5340 14:47:58.713366 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5341 14:47:58.716503 WARNING: region 4:
5342 14:47:58.720288 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5343 14:47:58.720832 WARNING: region 5:
5344 14:47:58.723623 WARNING: apc:0x0, sa:0x0, ea:0x0
5345 14:47:58.726785 WARNING: region 6:
5346 14:47:58.727261 WARNING: apc:0x0, sa:0x0, ea:0x0
5347 14:47:58.730143 WARNING: region 7:
5348 14:47:58.733520 WARNING: apc:0x0, sa:0x0, ea:0x0
5349 14:47:58.740147 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5350 14:47:58.743673 INFO: SPM: enable SPMC mode
5351 14:47:58.747236 NOTICE: spm_boot_init() start
5352 14:47:58.750298 NOTICE: spm_boot_init() end
5353 14:47:58.753710 INFO: BL31: Initializing runtime services
5354 14:47:58.757250 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5355 14:47:58.763661 INFO: BL31: Preparing for EL3 exit to normal world
5356 14:47:58.767041 INFO: Entry point address = 0x80000000
5357 14:47:58.770042 INFO: SPSR = 0x8
5358 14:47:58.790620
5359 14:47:58.791066
5360 14:47:58.791547
5361 14:47:58.793858 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5362 14:47:58.794593 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5363 14:47:58.795331 Setting prompt string to ['jacuzzi:']
5364 14:47:58.796037 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5365 14:47:58.797123 Starting depthcharge on Juniper...
5366 14:47:58.797709
5367 14:47:58.798280 vboot_handoff: creating legacy vboot_handoff structure
5368 14:47:58.798784
5369 14:47:58.800361 ec_init(0): CrosEC protocol v3 supported (544, 544)
5370 14:47:58.800947
5371 14:47:58.804096 Wipe memory regions:
5372 14:47:58.804615
5373 14:47:58.807017 [0x00000040000000, 0x00000054600000)
5374 14:47:58.849737
5375 14:47:58.849843 [0x00000054660000, 0x00000080000000)
5376 14:47:58.941546
5377 14:47:58.942146 [0x000000811994a0, 0x000000ffeda000)
5378 14:47:59.200955
5379 14:47:59.201874 [0x00000100000000, 0x00000140000000)
5380 14:47:59.333699
5381 14:47:59.336690 Initializing XHCI USB controller at 0x11200000.
5382 14:47:59.359678
5383 14:47:59.363217 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5384 14:47:59.363296
5385 14:47:59.363361
5386 14:47:59.363641 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5388 14:47:59.464134 jacuzzi: tftpboot 192.168.201.1 14167061/tftp-deploy-fplw_y1k/kernel/image.itb 14167061/tftp-deploy-fplw_y1k/kernel/cmdline
5389 14:47:59.464902 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5390 14:47:59.465574 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5391 14:47:59.469813 tftpboot 192.168.201.1 14167061/tftp-deploy-fplw_y1k/kernel/image.ittp-deploy-fplw_y1k/kernel/cmdline
5392 14:47:59.470450
5393 14:47:59.470890 Waiting for link
5394 14:47:59.874308
5395 14:47:59.874997 R8152: Initializing
5396 14:47:59.875569
5397 14:47:59.877645 Version 9 (ocp_data = 6010)
5398 14:47:59.878381
5399 14:47:59.880861 R8152: Done initializing
5400 14:47:59.881564
5401 14:47:59.882062 Adding net device
5402 14:48:00.266305
5403 14:48:00.266453 done.
5404 14:48:00.266524
5405 14:48:00.266585 MAC: 00:e0:4c:71:a7:1f
5406 14:48:00.266644
5407 14:48:00.269176 Sending DHCP discover... done.
5408 14:48:00.269323
5409 14:48:00.272619 Waiting for reply... done.
5410 14:48:00.272704
5411 14:48:00.276194 Sending DHCP request... done.
5412 14:48:00.276274
5413 14:48:00.280774 Waiting for reply... done.
5414 14:48:00.280850
5415 14:48:00.280920 My ip is 192.168.201.23
5416 14:48:00.280982
5417 14:48:00.284346 The DHCP server ip is 192.168.201.1
5418 14:48:00.284444
5419 14:48:00.290640 TFTP server IP predefined by user: 192.168.201.1
5420 14:48:00.290718
5421 14:48:00.297658 Bootfile predefined by user: 14167061/tftp-deploy-fplw_y1k/kernel/image.itb
5422 14:48:00.297739
5423 14:48:00.297811 Sending tftp read request... done.
5424 14:48:00.300753
5425 14:48:00.304325 Waiting for the transfer...
5426 14:48:00.304408
5427 14:48:00.577369 00000000 ################################################################
5428 14:48:00.577505
5429 14:48:00.829085 00080000 ################################################################
5430 14:48:00.829281
5431 14:48:01.081482 00100000 ################################################################
5432 14:48:01.081634
5433 14:48:01.327077 00180000 ################################################################
5434 14:48:01.327221
5435 14:48:01.577857 00200000 ################################################################
5436 14:48:01.577995
5437 14:48:01.838591 00280000 ################################################################
5438 14:48:01.838720
5439 14:48:02.090750 00300000 ################################################################
5440 14:48:02.090887
5441 14:48:02.341239 00380000 ################################################################
5442 14:48:02.341421
5443 14:48:02.590431 00400000 ################################################################
5444 14:48:02.590572
5445 14:48:02.839933 00480000 ################################################################
5446 14:48:02.840081
5447 14:48:03.102588 00500000 ################################################################
5448 14:48:03.102737
5449 14:48:03.361164 00580000 ################################################################
5450 14:48:03.361331
5451 14:48:03.616970 00600000 ################################################################
5452 14:48:03.617117
5453 14:48:03.863353 00680000 ################################################################
5454 14:48:03.863498
5455 14:48:04.114655 00700000 ################################################################
5456 14:48:04.114817
5457 14:48:04.361136 00780000 ################################################################
5458 14:48:04.361304
5459 14:48:04.621018 00800000 ################################################################
5460 14:48:04.621149
5461 14:48:04.894657 00880000 ################################################################
5462 14:48:04.894793
5463 14:48:05.159150 00900000 ################################################################
5464 14:48:05.159296
5465 14:48:05.415663 00980000 ################################################################
5466 14:48:05.415807
5467 14:48:05.698942 00a00000 ################################################################
5468 14:48:05.699137
5469 14:48:05.952081 00a80000 ################################################################
5470 14:48:05.952225
5471 14:48:06.216425 00b00000 ################################################################
5472 14:48:06.216570
5473 14:48:06.486999 00b80000 ################################################################
5474 14:48:06.487153
5475 14:48:06.748541 00c00000 ################################################################
5476 14:48:06.748713
5477 14:48:07.027810 00c80000 ################################################################
5478 14:48:07.027943
5479 14:48:07.283945 00d00000 ################################################################
5480 14:48:07.284088
5481 14:48:07.541955 00d80000 ################################################################
5482 14:48:07.542094
5483 14:48:07.795070 00e00000 ################################################################
5484 14:48:07.795202
5485 14:48:08.070014 00e80000 ################################################################
5486 14:48:08.070158
5487 14:48:08.333428 00f00000 ################################################################
5488 14:48:08.333580
5489 14:48:08.584891 00f80000 ################################################################
5490 14:48:08.585033
5491 14:48:08.845059 01000000 ################################################################
5492 14:48:08.845224
5493 14:48:09.100198 01080000 ################################################################
5494 14:48:09.100371
5495 14:48:09.354919 01100000 ################################################################
5496 14:48:09.355066
5497 14:48:09.609694 01180000 ################################################################
5498 14:48:09.609831
5499 14:48:09.870543 01200000 ################################################################
5500 14:48:09.870673
5501 14:48:10.128886 01280000 ################################################################
5502 14:48:10.129023
5503 14:48:10.401861 01300000 ################################################################
5504 14:48:10.402027
5505 14:48:10.663737 01380000 ################################################################
5506 14:48:10.663870
5507 14:48:10.924266 01400000 ################################################################
5508 14:48:10.924411
5509 14:48:11.176342 01480000 ################################################################
5510 14:48:11.176500
5511 14:48:11.426937 01500000 ################################################################
5512 14:48:11.427111
5513 14:48:11.698403 01580000 ################################################################
5514 14:48:11.698534
5515 14:48:11.965145 01600000 ################################################################
5516 14:48:11.965348
5517 14:48:12.229442 01680000 ################################################################
5518 14:48:12.229571
5519 14:48:12.513269 01700000 ################################################################
5520 14:48:12.513426
5521 14:48:12.807597 01780000 ################################################################
5522 14:48:12.807775
5523 14:48:13.097047 01800000 ################################################################
5524 14:48:13.097224
5525 14:48:13.377610 01880000 ################################################################
5526 14:48:13.377750
5527 14:48:13.661217 01900000 ################################################################
5528 14:48:13.661403
5529 14:48:13.951434 01980000 ################################################################
5530 14:48:13.951585
5531 14:48:14.247986 01a00000 ################################################################
5532 14:48:14.248164
5533 14:48:14.527915 01a80000 ################################################################
5534 14:48:14.528089
5535 14:48:14.804734 01b00000 ################################################################
5536 14:48:14.804912
5537 14:48:15.077902 01b80000 ################################################################
5538 14:48:15.078068
5539 14:48:15.368903 01c00000 ################################################################
5540 14:48:15.369057
5541 14:48:15.654446 01c80000 ################################################################
5542 14:48:15.654602
5543 14:48:15.937212 01d00000 ################################################################
5544 14:48:15.937410
5545 14:48:16.231624 01d80000 ################################################################
5546 14:48:16.231825
5547 14:48:16.449010 01e00000 ############################################### done.
5548 14:48:16.449189
5549 14:48:16.452028 The bootfile was 31840202 bytes long.
5550 14:48:16.452121
5551 14:48:16.455445 Sending tftp read request... done.
5552 14:48:16.455536
5553 14:48:16.455602 Waiting for the transfer...
5554 14:48:16.455667
5555 14:48:16.458838 00000000 # done.
5556 14:48:16.458929
5557 14:48:16.465361 Command line loaded dynamically from TFTP file: 14167061/tftp-deploy-fplw_y1k/kernel/cmdline
5558 14:48:16.465489
5559 14:48:16.492256 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5560 14:48:16.492409
5561 14:48:16.492478 Loading FIT.
5562 14:48:16.492539
5563 14:48:16.495549 Image ramdisk-1 has 18719838 bytes.
5564 14:48:16.495636
5565 14:48:16.498753 Image fdt-1 has 57695 bytes.
5566 14:48:16.498840
5567 14:48:16.502282 Image kernel-1 has 13060619 bytes.
5568 14:48:16.502370
5569 14:48:16.511975 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5570 14:48:16.512101
5571 14:48:16.522179 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5572 14:48:16.522311
5573 14:48:16.528704 Choosing best match conf-1 for compat google,juniper-sku16.
5574 14:48:16.532426
5575 14:48:16.537029 Connected to device vid:did:rid of 1ae0:0028:00
5576 14:48:16.544916
5577 14:48:16.548390 tpm_get_response: command 0x17b, return code 0x0
5578 14:48:16.548486
5579 14:48:16.551831 tpm_cleanup: add release locality here.
5580 14:48:16.551919
5581 14:48:16.555039 Shutting down all USB controllers.
5582 14:48:16.555126
5583 14:48:16.558236 Removing current net device
5584 14:48:16.558321
5585 14:48:16.562102 Exiting depthcharge with code 4 at timestamp: 34115303
5586 14:48:16.562193
5587 14:48:16.564972 LZMA decompressing kernel-1 to 0x80193568
5588 14:48:16.565059
5589 14:48:16.571869 LZMA decompressing kernel-1 to 0x40000000
5590 14:48:18.430068
5591 14:48:18.430221 jumping to kernel
5592 14:48:18.430681 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5593 14:48:18.430781 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5594 14:48:18.430861 Setting prompt string to ['Linux version [0-9]']
5595 14:48:18.430930 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5596 14:48:18.430997 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5597 14:48:18.505212
5598 14:48:18.508476 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5599 14:48:18.512004 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5600 14:48:18.512103 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5601 14:48:18.512178 Setting prompt string to []
5602 14:48:18.512256 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5603 14:48:18.512332 Using line separator: #'\n'#
5604 14:48:18.512392 No login prompt set.
5605 14:48:18.512456 Parsing kernel messages
5606 14:48:18.512512 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5607 14:48:18.512616 [login-action] Waiting for messages, (timeout 00:04:07)
5608 14:48:18.512683 Waiting using forced prompt support (timeout 00:02:03)
5609 14:48:18.531919 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j216541-arm64-gcc-10-defconfig-arm64-chromebook-f7c97) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024
5610 14:48:18.534790 [ 0.000000] random: crng init done
5611 14:48:18.541565 [ 0.000000] Machine model: Google juniper sku16 board
5612 14:48:18.544764 [ 0.000000] efi: UEFI not found.
5613 14:48:18.551458 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5614 14:48:18.561505 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5615 14:48:18.568089 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5616 14:48:18.571788 [ 0.000000] printk: bootconsole [mtk8250] enabled
5617 14:48:18.580041 [ 0.000000] NUMA: No NUMA configuration found
5618 14:48:18.586615 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5619 14:48:18.593573 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5620 14:48:18.593682 [ 0.000000] Zone ranges:
5621 14:48:18.600446 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5622 14:48:18.603026 [ 0.000000] DMA32 empty
5623 14:48:18.610048 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5624 14:48:18.613412 [ 0.000000] Movable zone start for each node
5625 14:48:18.616632 [ 0.000000] Early memory node ranges
5626 14:48:18.623531 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5627 14:48:18.629767 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5628 14:48:18.636705 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5629 14:48:18.643259 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5630 14:48:18.649735 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5631 14:48:18.656390 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5632 14:48:18.672704 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5633 14:48:18.678927 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5634 14:48:18.685816 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5635 14:48:18.689242 [ 0.000000] psci: probing for conduit method from DT.
5636 14:48:18.695670 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5637 14:48:18.698927 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5638 14:48:18.705762 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5639 14:48:18.709198 [ 0.000000] psci: SMC Calling Convention v1.1
5640 14:48:18.715890 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5641 14:48:18.719245 [ 0.000000] Detected VIPT I-cache on CPU0
5642 14:48:18.725676 [ 0.000000] CPU features: detected: GIC system register CPU interface
5643 14:48:18.732316 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5644 14:48:18.738941 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5645 14:48:18.742744 [ 0.000000] CPU features: detected: ARM erratum 845719
5646 14:48:18.749099 [ 0.000000] alternatives: applying boot alternatives
5647 14:48:18.752389 [ 0.000000] Fallback order for Node 0: 0
5648 14:48:18.759298 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5649 14:48:18.762420 [ 0.000000] Policy zone: Normal
5650 14:48:18.788872 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5651 14:48:18.802163 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5652 14:48:18.812241 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5653 14:48:18.818886 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5654 14:48:18.825370 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5655 14:48:18.828985 <6>[ 0.000000] software IO TLB: area num 8.
5656 14:48:18.855916 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5657 14:48:18.913591 <6>[ 0.000000] Memory: 3896916K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 261548K reserved, 32768K cma-reserved)
5658 14:48:18.920931 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5659 14:48:18.927375 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5660 14:48:18.930329 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5661 14:48:18.937090 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5662 14:48:18.943554 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5663 14:48:18.946996 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5664 14:48:18.956982 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5665 14:48:18.963912 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5666 14:48:18.967160 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5667 14:48:18.978656 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5668 14:48:18.985464 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5669 14:48:18.988697 <6>[ 0.000000] GICv3: 640 SPIs implemented
5670 14:48:18.992598 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5671 14:48:18.995785 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5672 14:48:19.002425 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5673 14:48:19.008769 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5674 14:48:19.018854 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5675 14:48:19.032246 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5676 14:48:19.038638 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5677 14:48:19.050861 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5678 14:48:19.063910 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5679 14:48:19.070589 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5680 14:48:19.077271 <6>[ 0.009470] Console: colour dummy device 80x25
5681 14:48:19.080585 <6>[ 0.014533] printk: console [tty1] enabled
5682 14:48:19.090752 <6>[ 0.018921] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5683 14:48:19.097672 <6>[ 0.029385] pid_max: default: 32768 minimum: 301
5684 14:48:19.101031 <6>[ 0.034267] LSM: Security Framework initializing
5685 14:48:19.111006 <6>[ 0.039180] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5686 14:48:19.117397 <6>[ 0.046804] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5687 14:48:19.124027 <4>[ 0.055682] cacheinfo: Unable to detect cache hierarchy for CPU 0
5688 14:48:19.134452 <6>[ 0.062307] cblist_init_generic: Setting adjustable number of callback queues.
5689 14:48:19.137678 <6>[ 0.069753] cblist_init_generic: Setting shift to 3 and lim to 1.
5690 14:48:19.147623 <6>[ 0.076105] cblist_init_generic: Setting adjustable number of callback queues.
5691 14:48:19.154136 <6>[ 0.083550] cblist_init_generic: Setting shift to 3 and lim to 1.
5692 14:48:19.157133 <6>[ 0.089949] rcu: Hierarchical SRCU implementation.
5693 14:48:19.163767 <6>[ 0.094975] rcu: Max phase no-delay instances is 1000.
5694 14:48:19.170902 <6>[ 0.102900] EFI services will not be available.
5695 14:48:19.173996 <6>[ 0.107848] smp: Bringing up secondary CPUs ...
5696 14:48:19.184495 <6>[ 0.113091] Detected VIPT I-cache on CPU1
5697 14:48:19.191518 <4>[ 0.113136] cacheinfo: Unable to detect cache hierarchy for CPU 1
5698 14:48:19.198074 <6>[ 0.113145] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5699 14:48:19.204574 <6>[ 0.113176] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5700 14:48:19.207801 <6>[ 0.113661] Detected VIPT I-cache on CPU2
5701 14:48:19.214599 <4>[ 0.113694] cacheinfo: Unable to detect cache hierarchy for CPU 2
5702 14:48:19.221160 <6>[ 0.113699] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5703 14:48:19.227861 <6>[ 0.113712] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5704 14:48:19.231087 <6>[ 0.114156] Detected VIPT I-cache on CPU3
5705 14:48:19.238069 <4>[ 0.114187] cacheinfo: Unable to detect cache hierarchy for CPU 3
5706 14:48:19.244417 <6>[ 0.114192] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5707 14:48:19.251162 <6>[ 0.114203] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5708 14:48:19.258143 <6>[ 0.114778] CPU features: detected: Spectre-v2
5709 14:48:19.261121 <6>[ 0.114788] CPU features: detected: Spectre-BHB
5710 14:48:19.267851 <6>[ 0.114792] CPU features: detected: ARM erratum 858921
5711 14:48:19.271024 <6>[ 0.114797] Detected VIPT I-cache on CPU4
5712 14:48:19.277996 <4>[ 0.114845] cacheinfo: Unable to detect cache hierarchy for CPU 4
5713 14:48:19.284802 <6>[ 0.114852] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5714 14:48:19.291112 <6>[ 0.114861] arch_timer: Enabling local workaround for ARM erratum 858921
5715 14:48:19.297819 <6>[ 0.114871] arch_timer: CPU4: Trapping CNTVCT access
5716 14:48:19.304670 <6>[ 0.114879] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5717 14:48:19.307895 <6>[ 0.115364] Detected VIPT I-cache on CPU5
5718 14:48:19.314465 <4>[ 0.115405] cacheinfo: Unable to detect cache hierarchy for CPU 5
5719 14:48:19.320804 <6>[ 0.115411] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5720 14:48:19.327340 <6>[ 0.115418] arch_timer: Enabling local workaround for ARM erratum 858921
5721 14:48:19.334137 <6>[ 0.115424] arch_timer: CPU5: Trapping CNTVCT access
5722 14:48:19.340824 <6>[ 0.115429] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5723 14:48:19.344009 <6>[ 0.115964] Detected VIPT I-cache on CPU6
5724 14:48:19.350835 <4>[ 0.116009] cacheinfo: Unable to detect cache hierarchy for CPU 6
5725 14:48:19.357216 <6>[ 0.116015] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5726 14:48:19.363901 <6>[ 0.116022] arch_timer: Enabling local workaround for ARM erratum 858921
5727 14:48:19.370534 <6>[ 0.116028] arch_timer: CPU6: Trapping CNTVCT access
5728 14:48:19.377364 <6>[ 0.116033] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5729 14:48:19.380569 <6>[ 0.116564] Detected VIPT I-cache on CPU7
5730 14:48:19.387189 <4>[ 0.116608] cacheinfo: Unable to detect cache hierarchy for CPU 7
5731 14:48:19.393862 <6>[ 0.116614] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5732 14:48:19.403783 <6>[ 0.116621] arch_timer: Enabling local workaround for ARM erratum 858921
5733 14:48:19.407071 <6>[ 0.116627] arch_timer: CPU7: Trapping CNTVCT access
5734 14:48:19.413866 <6>[ 0.116633] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5735 14:48:19.417622 <6>[ 0.116680] smp: Brought up 1 node, 8 CPUs
5736 14:48:19.423804 <6>[ 0.355562] SMP: Total of 8 processors activated.
5737 14:48:19.430339 <6>[ 0.360498] CPU features: detected: 32-bit EL0 Support
5738 14:48:19.433745 <6>[ 0.365870] CPU features: detected: 32-bit EL1 Support
5739 14:48:19.440375 <6>[ 0.371236] CPU features: detected: CRC32 instructions
5740 14:48:19.443543 <6>[ 0.376662] CPU: All CPU(s) started at EL2
5741 14:48:19.450283 <6>[ 0.381001] alternatives: applying system-wide alternatives
5742 14:48:19.457134 <6>[ 0.389100] devtmpfs: initialized
5743 14:48:19.469557 <6>[ 0.398052] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5744 14:48:19.479232 <6>[ 0.408001] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5745 14:48:19.482805 <6>[ 0.415729] pinctrl core: initialized pinctrl subsystem
5746 14:48:19.490818 <6>[ 0.422843] DMI not present or invalid.
5747 14:48:19.497442 <6>[ 0.427211] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5748 14:48:19.504132 <6>[ 0.434109] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5749 14:48:19.514171 <6>[ 0.441621] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5750 14:48:19.520904 <6>[ 0.449799] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5751 14:48:19.527458 <6>[ 0.457946] audit: initializing netlink subsys (disabled)
5752 14:48:19.533954 <5>[ 0.463627] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5753 14:48:19.540557 <6>[ 0.464580] thermal_sys: Registered thermal governor 'step_wise'
5754 14:48:19.547442 <6>[ 0.471578] thermal_sys: Registered thermal governor 'power_allocator'
5755 14:48:19.550843 <6>[ 0.477825] cpuidle: using governor menu
5756 14:48:19.557676 <6>[ 0.488771] NET: Registered PF_QIPCRTR protocol family
5757 14:48:19.563928 <6>[ 0.494260] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5758 14:48:19.570649 <6>[ 0.501352] ASID allocator initialised with 32768 entries
5759 14:48:19.573856 <6>[ 0.508140] Serial: AMBA PL011 UART driver
5760 14:48:19.586747 <4>[ 0.518527] Trying to register duplicate clock ID: 113
5761 14:48:19.646144 <6>[ 0.574759] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5762 14:48:19.660554 <6>[ 0.589103] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5763 14:48:19.664212 <6>[ 0.598842] KASLR enabled
5764 14:48:19.678727 <6>[ 0.606863] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5765 14:48:19.685027 <6>[ 0.613865] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5766 14:48:19.691420 <6>[ 0.620343] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5767 14:48:19.698304 <6>[ 0.627334] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5768 14:48:19.704712 <6>[ 0.633808] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5769 14:48:19.711795 <6>[ 0.640799] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5770 14:48:19.718310 <6>[ 0.647274] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5771 14:48:19.724720 <6>[ 0.654263] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5772 14:48:19.728045 <6>[ 0.661826] ACPI: Interpreter disabled.
5773 14:48:19.737606 <6>[ 0.669784] iommu: Default domain type: Translated
5774 14:48:19.744549 <6>[ 0.674892] iommu: DMA domain TLB invalidation policy: strict mode
5775 14:48:19.747582 <5>[ 0.681526] SCSI subsystem initialized
5776 14:48:19.754377 <6>[ 0.685947] usbcore: registered new interface driver usbfs
5777 14:48:19.761602 <6>[ 0.691674] usbcore: registered new interface driver hub
5778 14:48:19.764109 <6>[ 0.697216] usbcore: registered new device driver usb
5779 14:48:19.771435 <6>[ 0.703506] pps_core: LinuxPPS API ver. 1 registered
5780 14:48:19.781627 <6>[ 0.708690] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5781 14:48:19.784757 <6>[ 0.718014] PTP clock support registered
5782 14:48:19.788192 <6>[ 0.722265] EDAC MC: Ver: 3.0.0
5783 14:48:19.796225 <6>[ 0.727907] FPGA manager framework
5784 14:48:19.803032 <6>[ 0.731594] Advanced Linux Sound Architecture Driver Initialized.
5785 14:48:19.805907 <6>[ 0.738337] vgaarb: loaded
5786 14:48:19.809401 <6>[ 0.741464] clocksource: Switched to clocksource arch_sys_counter
5787 14:48:19.815617 <5>[ 0.747893] VFS: Disk quotas dquot_6.6.0
5788 14:48:19.822495 <6>[ 0.752069] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5789 14:48:19.825762 <6>[ 0.759240] pnp: PnP ACPI: disabled
5790 14:48:19.833932 <6>[ 0.766077] NET: Registered PF_INET protocol family
5791 14:48:19.840539 <6>[ 0.771311] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5792 14:48:19.852548 <6>[ 0.781225] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5793 14:48:19.862429 <6>[ 0.789980] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5794 14:48:19.869552 <6>[ 0.797932] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5795 14:48:19.875804 <6>[ 0.806165] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5796 14:48:19.882291 <6>[ 0.814257] TCP: Hash tables configured (established 32768 bind 32768)
5797 14:48:19.892547 <6>[ 0.821085] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5798 14:48:19.899109 <6>[ 0.828057] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5799 14:48:19.905840 <6>[ 0.835537] NET: Registered PF_UNIX/PF_LOCAL protocol family
5800 14:48:19.912135 <6>[ 0.841676] RPC: Registered named UNIX socket transport module.
5801 14:48:19.915603 <6>[ 0.847822] RPC: Registered udp transport module.
5802 14:48:19.919427 <6>[ 0.852748] RPC: Registered tcp transport module.
5803 14:48:19.925922 <6>[ 0.857671] RPC: Registered tcp NFSv4.1 backchannel transport module.
5804 14:48:19.932507 <6>[ 0.864328] PCI: CLS 0 bytes, default 64
5805 14:48:19.935534 <6>[ 0.868610] Unpacking initramfs...
5806 14:48:19.949461 <6>[ 0.878112] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5807 14:48:19.959381 <6>[ 0.886737] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5808 14:48:19.962546 <6>[ 0.895589] kvm [1]: IPA Size Limit: 40 bits
5809 14:48:19.969917 <6>[ 0.901908] kvm [1]: vgic-v2@c420000
5810 14:48:19.972946 <6>[ 0.905724] kvm [1]: GIC system register CPU interface enabled
5811 14:48:19.981544 <6>[ 0.913566] kvm [1]: vgic interrupt IRQ18
5812 14:48:19.984983 <6>[ 0.917945] kvm [1]: Hyp mode initialized successfully
5813 14:48:19.992291 <5>[ 0.924326] Initialise system trusted keyrings
5814 14:48:19.998822 <6>[ 0.929188] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5815 14:48:20.007255 <6>[ 0.939206] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5816 14:48:20.013941 <5>[ 0.945693] NFS: Registering the id_resolver key type
5817 14:48:20.017254 <5>[ 0.951001] Key type id_resolver registered
5818 14:48:20.023932 <5>[ 0.955415] Key type id_legacy registered
5819 14:48:20.030726 <6>[ 0.959723] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5820 14:48:20.037242 <6>[ 0.966670] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5821 14:48:20.043906 <6>[ 0.974418] 9p: Installing v9fs 9p2000 file system support
5822 14:48:20.071614 <5>[ 1.003379] Key type asymmetric registered
5823 14:48:20.074509 <5>[ 1.007719] Asymmetric key parser 'x509' registered
5824 14:48:20.085103 <6>[ 1.012882] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5825 14:48:20.088191 <6>[ 1.020495] io scheduler mq-deadline registered
5826 14:48:20.091416 <6>[ 1.025251] io scheduler kyber registered
5827 14:48:20.113939 <6>[ 1.045830] EINJ: ACPI disabled.
5828 14:48:20.120339 <4>[ 1.049573] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5829 14:48:20.158487 <6>[ 1.089999] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5830 14:48:20.166906 <6>[ 1.098513] printk: console [ttyS0] disabled
5831 14:48:20.194900 <6>[ 1.123163] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5832 14:48:20.201468 <6>[ 1.132637] printk: console [ttyS0] enabled
5833 14:48:20.204612 <6>[ 1.132637] printk: console [ttyS0] enabled
5834 14:48:20.211384 <6>[ 1.141560] printk: bootconsole [mtk8250] disabled
5835 14:48:20.214305 <6>[ 1.141560] printk: bootconsole [mtk8250] disabled
5836 14:48:20.224917 <3>[ 1.152098] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5837 14:48:20.231361 <3>[ 1.160486] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5838 14:48:20.260353 <6>[ 1.188885] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5839 14:48:20.267129 <6>[ 1.198537] serial serial0: tty port ttyS1 registered
5840 14:48:20.273753 <6>[ 1.205098] SuperH (H)SCI(F) driver initialized
5841 14:48:20.276883 <6>[ 1.210596] msm_serial: driver initialized
5842 14:48:20.292384 <6>[ 1.220857] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5843 14:48:20.302418 <6>[ 1.229453] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5844 14:48:20.308854 <6>[ 1.238036] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5845 14:48:20.318842 <6>[ 1.246611] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5846 14:48:20.325565 <6>[ 1.255267] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5847 14:48:20.335475 <6>[ 1.263931] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5848 14:48:20.345560 <6>[ 1.272673] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5849 14:48:20.352328 <6>[ 1.281414] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5850 14:48:20.362195 <6>[ 1.289980] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5851 14:48:20.368750 <6>[ 1.298790] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5852 14:48:20.378998 <4>[ 1.311156] cacheinfo: Unable to detect cache hierarchy for CPU 0
5853 14:48:20.388186 <6>[ 1.320470] loop: module loaded
5854 14:48:20.400289 <6>[ 1.332363] vsim1: Bringing 1800000uV into 2700000-2700000uV
5855 14:48:20.418246 <6>[ 1.350261] megasas: 07.719.03.00-rc1
5856 14:48:20.427078 <6>[ 1.359002] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5857 14:48:20.436957 <6>[ 1.368867] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5858 14:48:20.453818 <6>[ 1.385645] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5859 14:48:20.510591 <6>[ 1.435879] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5860 14:48:20.551805 <6>[ 1.483586] Freeing initrd memory: 18280K
5861 14:48:20.566696 <4>[ 1.495380] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5862 14:48:20.573211 <4>[ 1.504612] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
5863 14:48:20.579895 <4>[ 1.511311] Hardware name: Google juniper sku16 board (DT)
5864 14:48:20.583522 <4>[ 1.517050] Call trace:
5865 14:48:20.586684 <4>[ 1.519751] dump_backtrace.part.0+0xe0/0xf0
5866 14:48:20.590350 <4>[ 1.524287] show_stack+0x18/0x30
5867 14:48:20.593371 <4>[ 1.527859] dump_stack_lvl+0x68/0x84
5868 14:48:20.599965 <4>[ 1.531781] dump_stack+0x18/0x34
5869 14:48:20.603468 <4>[ 1.535351] sysfs_warn_dup+0x64/0x80
5870 14:48:20.606558 <4>[ 1.539273] sysfs_do_create_link_sd+0xf0/0x100
5871 14:48:20.609903 <4>[ 1.544061] sysfs_create_link+0x20/0x40
5872 14:48:20.616564 <4>[ 1.548240] bus_add_device+0x68/0x10c
5873 14:48:20.620295 <4>[ 1.552246] device_add+0x340/0x7ac
5874 14:48:20.623542 <4>[ 1.555989] of_device_add+0x44/0x60
5875 14:48:20.630001 <4>[ 1.559824] of_platform_device_create_pdata+0x90/0x120
5876 14:48:20.633553 <4>[ 1.565305] of_platform_bus_create+0x170/0x370
5877 14:48:20.636916 <4>[ 1.570092] of_platform_populate+0x50/0xfc
5878 14:48:20.643546 <4>[ 1.574531] parse_mtd_partitions+0x1dc/0x510
5879 14:48:20.647089 <4>[ 1.579144] mtd_device_parse_register+0xf8/0x2e0
5880 14:48:20.650383 <4>[ 1.584102] spi_nor_probe+0x21c/0x2f0
5881 14:48:20.653451 <4>[ 1.588108] spi_mem_probe+0x6c/0xb0
5882 14:48:20.656766 <4>[ 1.591941] spi_probe+0x84/0xe4
5883 14:48:20.663450 <4>[ 1.595423] really_probe+0xbc/0x2e0
5884 14:48:20.666835 <4>[ 1.599253] __driver_probe_device+0x78/0x11c
5885 14:48:20.670032 <4>[ 1.603864] driver_probe_device+0xd8/0x160
5886 14:48:20.677081 <4>[ 1.608302] __device_attach_driver+0xb8/0x134
5887 14:48:20.680409 <4>[ 1.613000] bus_for_each_drv+0x78/0xd0
5888 14:48:20.683502 <4>[ 1.617090] __device_attach+0xa8/0x1c0
5889 14:48:20.690174 <4>[ 1.621181] device_initial_probe+0x14/0x20
5890 14:48:20.693687 <4>[ 1.625619] bus_probe_device+0x9c/0xa4
5891 14:48:20.697278 <4>[ 1.629709] device_add+0x3ac/0x7ac
5892 14:48:20.700532 <4>[ 1.633451] __spi_add_device+0x78/0x120
5893 14:48:20.703589 <4>[ 1.637629] spi_add_device+0x40/0x7c
5894 14:48:20.710661 <4>[ 1.641547] spi_register_controller+0x610/0xad0
5895 14:48:20.714315 <4>[ 1.646419] devm_spi_register_controller+0x4c/0xa4
5896 14:48:20.717399 <4>[ 1.651552] mtk_spi_probe+0x3f8/0x650
5897 14:48:20.723942 <4>[ 1.655556] platform_probe+0x68/0xe0
5898 14:48:20.727401 <4>[ 1.659475] really_probe+0xbc/0x2e0
5899 14:48:20.731040 <4>[ 1.663304] __driver_probe_device+0x78/0x11c
5900 14:48:20.733788 <4>[ 1.667916] driver_probe_device+0xd8/0x160
5901 14:48:20.740504 <4>[ 1.672353] __driver_attach+0x94/0x19c
5902 14:48:20.743709 <4>[ 1.676444] bus_for_each_dev+0x70/0xd0
5903 14:48:20.747189 <4>[ 1.680533] driver_attach+0x24/0x30
5904 14:48:20.750463 <4>[ 1.684363] bus_add_driver+0x154/0x20c
5905 14:48:20.757044 <4>[ 1.688453] driver_register+0x78/0x130
5906 14:48:20.760883 <4>[ 1.692544] __platform_driver_register+0x28/0x34
5907 14:48:20.764045 <4>[ 1.697504] mtk_spi_driver_init+0x1c/0x28
5908 14:48:20.770659 <4>[ 1.701858] do_one_initcall+0x50/0x1d0
5909 14:48:20.773665 <4>[ 1.705948] kernel_init_freeable+0x21c/0x288
5910 14:48:20.777278 <4>[ 1.710562] kernel_init+0x24/0x12c
5911 14:48:20.780388 <4>[ 1.714307] ret_from_fork+0x10/0x20
5912 14:48:20.791768 <6>[ 1.723184] tun: Universal TUN/TAP device driver, 1.6
5913 14:48:20.794782 <6>[ 1.729480] thunder_xcv, ver 1.0
5914 14:48:20.798375 <6>[ 1.732983] thunder_bgx, ver 1.0
5915 14:48:20.801489 <6>[ 1.736489] nicpf, ver 1.0
5916 14:48:20.812714 <6>[ 1.740840] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5917 14:48:20.816073 <6>[ 1.748326] hns3: Copyright (c) 2017 Huawei Corporation.
5918 14:48:20.819320 <6>[ 1.753922] hclge is initializing
5919 14:48:20.825641 <6>[ 1.757509] e1000: Intel(R) PRO/1000 Network Driver
5920 14:48:20.832457 <6>[ 1.762645] e1000: Copyright (c) 1999-2006 Intel Corporation.
5921 14:48:20.835871 <6>[ 1.768669] e1000e: Intel(R) PRO/1000 Network Driver
5922 14:48:20.842390 <6>[ 1.773892] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5923 14:48:20.849309 <6>[ 1.780087] igb: Intel(R) Gigabit Ethernet Network Driver
5924 14:48:20.855959 <6>[ 1.785743] igb: Copyright (c) 2007-2014 Intel Corporation.
5925 14:48:20.862941 <6>[ 1.791588] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5926 14:48:20.869497 <6>[ 1.798113] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5927 14:48:20.872931 <6>[ 1.804662] sky2: driver version 1.30
5928 14:48:20.879374 <6>[ 1.809907] usbcore: registered new device driver r8152-cfgselector
5929 14:48:20.885817 <6>[ 1.816453] usbcore: registered new interface driver r8152
5930 14:48:20.892623 <6>[ 1.822288] VFIO - User Level meta-driver version: 0.3
5931 14:48:20.898880 <6>[ 1.830078] mtu3 11201000.usb: uwk - reg:0x420, version:101
5932 14:48:20.905814 <4>[ 1.835952] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5933 14:48:20.911950 <6>[ 1.843222] mtu3 11201000.usb: dr_mode: 1, drd: auto
5934 14:48:20.919013 <6>[ 1.848447] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5935 14:48:20.921900 <6>[ 1.854634] mtu3 11201000.usb: usb3-drd: 0
5936 14:48:20.928683 <6>[ 1.860182] mtu3 11201000.usb: xHCI platform device register success...
5937 14:48:20.940397 <4>[ 1.868801] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5938 14:48:20.947068 <6>[ 1.876756] xhci-mtk 11200000.usb: xHCI Host Controller
5939 14:48:20.953908 <6>[ 1.882263] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5940 14:48:20.960230 <6>[ 1.889983] xhci-mtk 11200000.usb: USB3 root hub has no ports
5941 14:48:20.967228 <6>[ 1.895991] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5942 14:48:20.973637 <6>[ 1.905417] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5943 14:48:20.980589 <6>[ 1.911499] xhci-mtk 11200000.usb: xHCI Host Controller
5944 14:48:20.986984 <6>[ 1.916987] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5945 14:48:20.994240 <6>[ 1.924668] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5946 14:48:20.997351 <6>[ 1.931484] hub 1-0:1.0: USB hub found
5947 14:48:21.003984 <6>[ 1.935514] hub 1-0:1.0: 1 port detected
5948 14:48:21.014057 <6>[ 1.940865] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5949 14:48:21.017405 <6>[ 1.949492] hub 2-0:1.0: USB hub found
5950 14:48:21.023935 <3>[ 1.953515] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5951 14:48:21.030539 <6>[ 1.961402] usbcore: registered new interface driver usb-storage
5952 14:48:21.037408 <6>[ 1.968011] usbcore: registered new device driver onboard-usb-hub
5953 14:48:21.053278 <4>[ 1.981572] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5954 14:48:21.062168 <6>[ 1.993790] mt6397-rtc mt6358-rtc: registered as rtc0
5955 14:48:21.072118 <6>[ 1.999269] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-04T14:48:20 UTC (1717512500)
5956 14:48:21.075131 <6>[ 2.009148] i2c_dev: i2c /dev entries driver
5957 14:48:21.087056 <6>[ 2.015535] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5958 14:48:21.097005 <6>[ 2.023920] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5959 14:48:21.100194 <6>[ 2.032828] i2c 4-0058: Fixed dependency cycle(s) with /panel
5960 14:48:21.110392 <6>[ 2.038897] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5961 14:48:21.117277 <3>[ 2.046356] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5962 14:48:21.135044 <6>[ 2.063429] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
5963 14:48:21.142647 <6>[ 2.074827] cpu cpu0: EM: created perf domain
5964 14:48:21.152708 <6>[ 2.080315] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5965 14:48:21.159595 <6>[ 2.091628] cpu cpu4: EM: created perf domain
5966 14:48:21.166691 <6>[ 2.098531] sdhci: Secure Digital Host Controller Interface driver
5967 14:48:21.173262 <6>[ 2.104987] sdhci: Copyright(c) Pierre Ossman
5968 14:48:21.180446 <6>[ 2.110380] Synopsys Designware Multimedia Card Interface Driver
5969 14:48:21.186916 <6>[ 2.110921] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5970 14:48:21.189809 <6>[ 2.117450] sdhci-pltfm: SDHCI platform and OF driver helper
5971 14:48:21.198767 <6>[ 2.130889] ledtrig-cpu: registered to indicate activity on CPUs
5972 14:48:21.206641 <6>[ 2.138622] usbcore: registered new interface driver usbhid
5973 14:48:21.210215 <6>[ 2.144465] usbhid: USB HID core driver
5974 14:48:21.221024 <6>[ 2.148759] spi_master spi2: will run message pump with realtime priority
5975 14:48:21.225130 <4>[ 2.148802] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5976 14:48:21.232106 <4>[ 2.163022] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5977 14:48:21.245877 <6>[ 2.168222] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5978 14:48:21.266357 <6>[ 2.187782] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5979 14:48:21.272855 <4>[ 2.197170] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5980 14:48:21.276037 <6>[ 2.203491] cros-ec-spi spi2.0: Chrome EC device registered
5981 14:48:21.291910 <4>[ 2.220525] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5982 14:48:21.301329 <6>[ 2.232900] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5983 14:48:21.311560 <4>[ 2.233899] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5984 14:48:21.314327 <6>[ 2.239939] mmc0: new HS400 MMC card at address 0001
5985 14:48:21.321026 <4>[ 2.247971] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5986 14:48:21.327984 <6>[ 2.259095] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5987 14:48:21.337931 <6>[ 2.269442] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5988 14:48:21.348499 <6>[ 2.279847] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5989 14:48:21.355055 <6>[ 2.284539] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5990 14:48:21.362142 <6>[ 2.286812] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5991 14:48:21.368600 <6>[ 2.295795] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5992 14:48:21.375315 <6>[ 2.298237] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5993 14:48:21.385221 <6>[ 2.310358] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5994 14:48:21.393320 <6>[ 2.324918] NET: Registered PF_PACKET protocol family
5995 14:48:21.406731 <6>[ 2.327533] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5996 14:48:21.409845 <6>[ 2.330353] 9pnet: Installing 9P2000 support
5997 14:48:21.420124 <6>[ 2.342445] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5998 14:48:21.423495 <5>[ 2.346901] Key type dns_resolver registered
5999 14:48:21.430076 <6>[ 2.357482] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6000 14:48:21.437195 <6>[ 2.361888] registered taskstats version 1
6001 14:48:21.440481 <5>[ 2.372441] Loading compiled-in X.509 certificates
6002 14:48:21.483983 <3>[ 2.412104] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6003 14:48:21.511608 <4>[ 2.440123] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6004 14:48:21.522316 <6>[ 2.450707] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6005 14:48:21.538579 <6>[ 2.463570] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6006 14:48:21.551778 <3>[ 2.474805] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6007 14:48:21.565741 <3>[ 2.490317] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6008 14:48:21.572136 <3>[ 2.502753] debugfs: File 'Playback' in directory 'dapm' already present!
6009 14:48:21.578699 <3>[ 2.509806] debugfs: File 'Capture' in directory 'dapm' already present!
6010 14:48:21.585634 <6>[ 2.516814] hub 1-1:1.0: USB hub found
6011 14:48:21.595162 <6>[ 2.520833] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6012 14:48:21.598559 <6>[ 2.521213] hub 1-1:1.0: 3 ports detected
6013 14:48:21.608543 <6>[ 2.534396] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6014 14:48:21.615212 <6>[ 2.544318] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6015 14:48:21.625150 <6>[ 2.552837] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6016 14:48:21.631933 <6>[ 2.561357] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6017 14:48:21.641944 <6>[ 2.569875] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6018 14:48:21.652108 <6>[ 2.578397] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6019 14:48:21.658250 <6>[ 2.586918] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6020 14:48:21.664913 <6>[ 2.596112] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6021 14:48:21.671914 <6>[ 2.603587] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6022 14:48:21.679349 <6>[ 2.610902] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6023 14:48:21.689791 <6>[ 2.618205] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6024 14:48:21.696587 <6>[ 2.625671] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6025 14:48:21.702977 <6>[ 2.633921] panfrost 13040000.gpu: clock rate = 511999970
6026 14:48:21.713214 <6>[ 2.639614] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6027 14:48:21.719892 <6>[ 2.649842] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6028 14:48:21.730040 <6>[ 2.657852] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6029 14:48:21.742969 <6>[ 2.666285] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6030 14:48:21.749953 <6>[ 2.678361] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6031 14:48:21.760989 <6>[ 2.689318] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6032 14:48:21.771118 <6>[ 2.698533] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6033 14:48:21.781591 <6>[ 2.707706] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6034 14:48:21.791452 <6>[ 2.716837] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6035 14:48:21.797540 <6>[ 2.725964] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6036 14:48:21.807519 <6>[ 2.735265] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6037 14:48:21.817312 <6>[ 2.744564] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6038 14:48:21.827756 <6>[ 2.754038] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6039 14:48:21.837253 <6>[ 2.763512] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6040 14:48:21.844063 <6>[ 2.772639] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6041 14:48:21.917115 <6>[ 2.844991] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6042 14:48:21.926797 <6>[ 2.853899] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6043 14:48:21.937399 <6>[ 2.865831] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6044 14:48:21.953374 <6>[ 2.881479] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6045 14:48:22.642797 <6>[ 3.073889] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6046 14:48:22.652765 <4>[ 3.187276] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6047 14:48:22.660030 <4>[ 3.187294] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6048 14:48:22.666421 <6>[ 3.223458] r8152 1-1.2:1.0 eth0: v1.12.13
6049 14:48:22.672903 <6>[ 3.301492] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6050 14:48:22.679439 <6>[ 3.554490] Console: switching to colour frame buffer device 170x48
6051 14:48:22.686165 <6>[ 3.615133] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6052 14:48:22.702829 <6>[ 3.631030] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6053 14:48:22.709322 <6>[ 3.639145] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6054 14:48:23.882887 <6>[ 4.814393] r8152 1-1.2:1.0 eth0: carrier on
6055 14:48:26.049851 <5>[ 4.845500] Sending DHCP requests .., OK
6056 14:48:26.056703 <6>[ 6.985869] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6057 14:48:26.060008 <6>[ 6.994372] IP-Config: Complete:
6058 14:48:26.073382 <6>[ 6.997946] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6059 14:48:26.079897 <6>[ 7.008855] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6060 14:48:26.090188 <6>[ 7.018342] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6061 14:48:26.093392 <6>[ 7.018352] nameserver0=192.168.201.1
6062 14:48:26.100439 <6>[ 7.031466] clk: Disabling unused clocks
6063 14:48:26.103685 <6>[ 7.036995] ALSA device list:
6064 14:48:26.112725 <6>[ 7.044200] #0: mt8183_mt6358_ts3a227_max98357
6065 14:48:26.125499 <6>[ 7.056511] Freeing unused kernel memory: 8512K
6066 14:48:26.133299 <6>[ 7.064967] Run /init as init process
6067 14:48:26.147861 Loading, please wait...
6068 14:48:26.182453 Starting systemd-udevd version 252.22-1~deb12u1
6069 14:48:26.522788 <3>[ 7.454377] mtk-scp 10500000.scp: invalid resource
6070 14:48:26.529466 <3>[ 7.456206] thermal_sys: Failed to find 'trips' node
6071 14:48:26.536234 <6>[ 7.459823] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6072 14:48:26.542805 <3>[ 7.464722] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6073 14:48:26.552981 <3>[ 7.464976] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6074 14:48:26.559487 <3>[ 7.464983] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6075 14:48:26.569461 <3>[ 7.464987] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6076 14:48:26.579772 <3>[ 7.464991] elan_i2c 2-0015: Error applying setting, reverse things back
6077 14:48:26.582670 <6>[ 7.473355] remoteproc remoteproc0: scp is available
6078 14:48:26.592337 <3>[ 7.479757] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6079 14:48:26.599296 <4>[ 7.489761] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6080 14:48:26.605899 <4>[ 7.491536] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6081 14:48:26.615891 <4>[ 7.492114] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6082 14:48:26.622271 <3>[ 7.493225] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6083 14:48:26.632314 <3>[ 7.493240] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6084 14:48:26.639227 <3>[ 7.493247] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6085 14:48:26.650068 <3>[ 7.494516] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6086 14:48:26.656990 <3>[ 7.494541] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6087 14:48:26.666400 <3>[ 7.494550] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6088 14:48:26.673373 <3>[ 7.494560] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6089 14:48:26.683030 <3>[ 7.494568] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6090 14:48:26.692810 <3>[ 7.494633] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6091 14:48:26.699555 <4>[ 7.496528] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6092 14:48:26.706364 <6>[ 7.507414] remoteproc remoteproc0: powering up scp
6093 14:48:26.709746 <3>[ 7.517817] thermal_sys: Failed to find 'trips' node
6094 14:48:26.720274 <4>[ 7.519614] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6095 14:48:26.727209 <6>[ 7.520909] mc: Linux media interface: v0.10
6096 14:48:26.733638 <3>[ 7.528139] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6097 14:48:26.740475 <3>[ 7.536456] remoteproc remoteproc0: request_firmware failed: -2
6098 14:48:26.746545 <3>[ 7.543852] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6099 14:48:26.756610 <6>[ 7.556594] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6100 14:48:26.763362 <6>[ 7.556630] cs_system_cfg: CoreSight Configuration manager initialised
6101 14:48:26.769774 <5>[ 7.557162] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6102 14:48:26.776603 <6>[ 7.559090] videodev: Linux video capture interface: v2.00
6103 14:48:26.786742 <4>[ 7.559659] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6104 14:48:26.793217 <6>[ 7.559994] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6105 14:48:26.799712 <5>[ 7.568827] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6106 14:48:26.811495 <6>[ 7.577086] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6107 14:48:26.822282 <5>[ 7.585864] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6108 14:48:26.828681 <6>[ 7.594130] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6109 14:48:26.838419 <4>[ 7.602463] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6110 14:48:26.845253 <6>[ 7.611238] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6111 14:48:26.853606 <6>[ 7.619677] cfg80211: failed to load regulatory.db
6112 14:48:26.863681 <6>[ 7.626150] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6113 14:48:26.870154 <6>[ 7.635637] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6114 14:48:26.876899 <6>[ 7.658675] Bluetooth: Core ver 2.22
6115 14:48:26.883456 <6>[ 7.662424] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6116 14:48:26.890529 <6>[ 7.669520] NET: Registered PF_BLUETOOTH protocol family
6117 14:48:26.897208 <6>[ 7.670131] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6118 14:48:26.903414 <6>[ 7.670179] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6119 14:48:26.913792 <6>[ 7.670565] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6120 14:48:26.923577 <6>[ 7.670764] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6121 14:48:26.930220 <6>[ 7.671067] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6122 14:48:26.937516 <6>[ 7.675777] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6123 14:48:26.943948 <6>[ 7.684068] Bluetooth: HCI device and connection manager initialized
6124 14:48:26.957232 <6>[ 7.689861] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6125 14:48:26.964086 <6>[ 7.690092] usbcore: registered new interface driver uvcvideo
6126 14:48:26.973617 <6>[ 7.691936] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6127 14:48:26.977160 <6>[ 7.698683] Bluetooth: HCI socket layer initialized
6128 14:48:26.988272 <6>[ 7.714037] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6129 14:48:26.991842 <6>[ 7.714420] Bluetooth: L2CAP socket layer initialized
6130 14:48:27.001732 <6>[ 7.722039] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6131 14:48:27.008236 <6>[ 7.729776] Bluetooth: SCO socket layer initialized
6132 14:48:27.011724 <6>[ 7.750629] Bluetooth: HCI UART driver ver 2.3
6133 14:48:27.024661 <6>[ 7.759111] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6134 14:48:27.031390 <6>[ 7.766563] Bluetooth: HCI UART protocol H4 registered
6135 14:48:27.034611 <6>[ 7.766606] Bluetooth: HCI UART protocol LL registered
6136 14:48:27.044939 <4>[ 7.903250] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6137 14:48:27.051682 <4>[ 7.903250] Fallback method does not support PEC.
6138 14:48:27.058224 <6>[ 7.908926] Bluetooth: HCI UART protocol Three-wire (H5) registered
6139 14:48:27.064902 <6>[ 7.923845] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6140 14:48:27.071223 <6>[ 7.924398] Bluetooth: HCI UART protocol Broadcom registered
6141 14:48:27.101872 <6>[ 8.033581] Bluetooth: HCI UART protocol QCA registered
6142 14:48:27.109052 <6>[ 8.034642] Bluetooth: hci0: setting up ROME/QCA6390
6143 14:48:27.112106 <6>[ 8.039321] Bluetooth: HCI UART protocol Marvell registered
6144 14:48:27.125927 <3>[ 8.054287] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6145 14:48:27.129721 Begin: Loading essential drivers ... done.
6146 14:48:27.132670 Begin: Running /scripts/init-premount ... done.
6147 14:48:27.147543 Begin: Mounting root file system ..<3>[ 8.073212] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6148 14:48:27.150812 . Begin: Running /scripts/nfs-top ... done.
6149 14:48:27.157425 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6150 14:48:27.160715 Device /sys/class/net/eth0 found
6151 14:48:27.161153 done.
6152 14:48:27.170249 Begin: Waiting up to 180 secs for any network device to become available ... done.
6153 14:48:27.210012 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6154 14:48:27.216583 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6155 14:48:27.223163 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6156 14:48:27.229681 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6157 14:48:27.236858 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6158 14:48:27.242892 domain : lava-rack
6159 14:48:27.246561 rootserver: 192.168.201.1 rootpath:
6160 14:48:27.246647 filename :
6161 14:48:27.324889 <3>[ 8.256550] Bluetooth: hci0: Frame reassembly failed (-84)
6162 14:48:27.340034 done.
6163 14:48:27.349521 Begin: Running /scripts/nfs-bottom ... done.
6164 14:48:27.359028 Be<6>[ 8.284017] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6165 14:48:27.362314 gin: Running /scripts/init-bottom ... done.
6166 14:48:27.451588 <4>[ 8.380336] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6167 14:48:27.471864 <4>[ 8.399891] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6168 14:48:27.488166 <4>[ 8.416603] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6169 14:48:27.496045 <4>[ 8.427848] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6170 14:48:27.614854 <6>[ 8.546511] Bluetooth: hci0: QCA Product ID :0x00000008
6171 14:48:27.625580 <6>[ 8.556791] Bluetooth: hci0: QCA SOC Version :0x00000044
6172 14:48:27.635363 <6>[ 8.566903] Bluetooth: hci0: QCA ROM Version :0x00000302
6173 14:48:27.645607 <6>[ 8.576914] Bluetooth: hci0: QCA Patch Version:0x00000111
6174 14:48:27.655551 <6>[ 8.586826] Bluetooth: hci0: QCA controller version 0x00440302
6175 14:48:27.667906 <6>[ 8.596197] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6176 14:48:27.680296 <4>[ 8.608644] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6177 14:48:27.692474 <3>[ 8.620936] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6178 14:48:27.700199 <3>[ 8.632208] Bluetooth: hci0: QCA Failed to download patch (-2)
6179 14:48:28.683644 <6>[ 9.615367] NET: Registered PF_INET6 protocol family
6180 14:48:28.696121 <6>[ 9.627372] Segment Routing with IPv6
6181 14:48:28.704005 <6>[ 9.635469] In-situ OAM (IOAM) with IPv6
6182 14:48:28.887420 <30>[ 9.792163] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6183 14:48:28.907499 <30>[ 9.838571] systemd[1]: Detected architecture arm64.
6184 14:48:28.918931
6185 14:48:28.922681 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6186 14:48:28.923193
6187 14:48:28.948023 <30>[ 9.879197] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6188 14:48:30.048954 <30>[ 10.977298] systemd[1]: Queued start job for default target graphical.target.
6189 14:48:30.087181 <30>[ 11.015106] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6190 14:48:30.099573 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6191 14:48:30.119660 <30>[ 11.047779] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6192 14:48:30.132889 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6193 14:48:30.152028 <30>[ 11.080013] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6194 14:48:30.165563 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6195 14:48:30.182892 <30>[ 11.111210] systemd[1]: Created slice user.slice - User and Session Slice.
6196 14:48:30.194672 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6197 14:48:30.217082 <30>[ 11.142059] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6198 14:48:30.229905 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6199 14:48:30.248888 <30>[ 11.173878] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6200 14:48:30.261035 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6201 14:48:30.287497 <30>[ 11.205825] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6202 14:48:30.306054 <30>[ 11.234233] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6203 14:48:30.313925 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6204 14:48:30.333450 <30>[ 11.261667] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6205 14:48:30.346540 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6206 14:48:30.365631 <30>[ 11.293744] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6207 14:48:30.379494 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6208 14:48:30.394436 <30>[ 11.325753] systemd[1]: Reached target paths.target - Path Units.
6209 14:48:30.408463 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6210 14:48:30.426706 <30>[ 11.353661] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6211 14:48:30.437487 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6212 14:48:30.450048 <30>[ 11.381638] systemd[1]: Reached target slices.target - Slice Units.
6213 14:48:30.464451 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6214 14:48:30.478219 <30>[ 11.409708] systemd[1]: Reached target swap.target - Swaps.
6215 14:48:30.488734 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6216 14:48:30.509435 <30>[ 11.437726] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6217 14:48:30.523013 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6218 14:48:30.541985 <30>[ 11.470064] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6219 14:48:30.555763 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6220 14:48:30.576301 <30>[ 11.504791] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6221 14:48:30.589953 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6222 14:48:30.607232 <30>[ 11.535547] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6223 14:48:30.620973 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6224 14:48:30.638139 <30>[ 11.566390] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6225 14:48:30.650112 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6226 14:48:30.671318 <30>[ 11.599477] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6227 14:48:30.684346 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6228 14:48:30.704182 <30>[ 11.632537] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6229 14:48:30.716960 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6230 14:48:30.733976 <30>[ 11.662254] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6231 14:48:30.746836 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6232 14:48:30.789846 <30>[ 11.718127] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6233 14:48:30.802338 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6234 14:48:30.823309 <30>[ 11.751523] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6235 14:48:30.836366 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6236 14:48:30.858063 <30>[ 11.785936] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6237 14:48:30.869994 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6238 14:48:30.892974 <30>[ 11.814312] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6239 14:48:30.916266 <30>[ 11.844466] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6240 14:48:30.928130 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6241 14:48:30.951050 <30>[ 11.878894] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6242 14:48:30.962929 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6243 14:48:31.018662 <30>[ 11.946972] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6244 14:48:31.031334 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6245 14:48:31.056190 <30>[ 11.984194] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6246 14:48:31.072280 Starting [0;1;39mmodpr<6>[ 11.998384] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6247 14:48:31.075669 obe@drm.service[0m - Load Kernel Module drm...
6248 14:48:31.100404 <30>[ 12.028509] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6249 14:48:31.112406 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6250 14:48:31.133124 <30>[ 12.061270] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6251 14:48:31.144097 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6252 14:48:31.165995 <30>[ 12.093989] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6253 14:48:31.177165 Starting [0;1;39mmodpr<6>[ 12.107129] fuse: init (API version 7.37)
6254 14:48:31.180830 obe@loop.ser…e[0m - Load Kernel Module loop...
6255 14:48:31.222749 <30>[ 12.150566] systemd[1]: Starting systemd-journald.service - Journal Service...
6256 14:48:31.233082 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6257 14:48:31.259693 <30>[ 12.187923] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6258 14:48:31.269846 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6259 14:48:31.292592 <30>[ 12.217518] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6260 14:48:31.304212 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6261 14:48:31.326010 <30>[ 12.254129] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6262 14:48:31.339798 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6263 14:48:31.363623 <30>[ 12.291272] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6264 14:48:31.376074 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6265 14:48:31.399418 <30>[ 12.327505] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6266 14:48:31.409889 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6267 14:48:31.426656 <30>[ 12.354635] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6268 14:48:31.439120 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6269 14:48:31.450392 <3>[ 12.378218] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6270 14:48:31.460611 <30>[ 12.387378] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6271 14:48:31.470928 [[0;32m OK [<3>[ 12.398436] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6272 14:48:31.477333 0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6273 14:48:31.493849 <3>[ 12.421212] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6274 14:48:31.505345 <30>[ 12.430705] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6275 14:48:31.511261 <3>[ 12.439179] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6276 14:48:31.525658 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6277 14:48:31.532125 <3>[ 12.459911] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6278 14:48:31.540818 <30>[ 12.470965] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6279 14:48:31.553217 <3>[ 12.479500] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6280 14:48:31.560151 <30>[ 12.481670] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6281 14:48:31.572022 <3>[ 12.498200] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6282 14:48:31.585696 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6283 14:48:31.592375 <3>[ 12.520733] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6284 14:48:31.601561 <30>[ 12.530928] systemd[1]: modprobe@dm_mod.service: Deactivated successfully.
6285 14:48:31.615974 <30>[ 12.543029] systemd[1]: Finished modprobe@dm_mod.service - Load Kernel Module dm_mod.
6286 14:48:31.627042 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6287 14:48:31.646320 <30>[ 12.574306] systemd[1]: Started systemd-journald.service - Journal Service.
6288 14:48:31.658175 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6289 14:48:31.679649 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6290 14:48:31.700835 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6291 14:48:31.720063 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6292 14:48:31.740613 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6293 14:48:31.759310 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6294 14:48:31.783336 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6295 14:48:31.803108 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6296 14:48:31.833665 <4>[ 12.755126] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6297 14:48:31.845197 <3>[ 12.772917] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6298 14:48:31.859517 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6299 14:48:31.914613 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6300 14:48:31.943927 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6301 14:48:31.970365 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6302 14:48:31.997127 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6303 14:48:32.033301 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Ke<46>[ 12.959515] systemd-journald[319]: Received client request to flush runtime journal.
6304 14:48:32.033745 rnel Variables...
6305 14:48:32.106476 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6306 14:48:32.367891 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6307 14:48:32.387488 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6308 14:48:32.406541 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6309 14:48:32.427377 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6310 14:48:32.829821 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6311 14:48:33.219022 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6312 14:48:33.254425 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6313 14:48:33.518793 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6314 14:48:33.636067 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6315 14:48:33.654703 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6316 14:48:33.674167 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6317 14:48:33.718851 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6318 14:48:33.743710 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6319 14:48:33.996059 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6320 14:48:34.058094 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6321 14:48:34.103581 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6322 14:48:34.326593 <4>[ 15.257811] power_supply_show_property: 4 callbacks suppressed
6323 14:48:34.340347 <3>[ 15.257826] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6324 14:48:34.346906 <3>[ 15.269487] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6325 14:48:34.353945 <3>[ 15.269908] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6326 14:48:34.365197 <3>[ 15.275407] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6327 14:48:34.387465 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 15.313946] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 14:48:34.387554 d-backlight.
6329 14:48:34.401972 <3>[ 15.330102] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6330 14:48:34.418587 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m<3>[ 15.346487] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6331 14:48:34.421564 - Bluetooth Support.
6332 14:48:34.435727 <3>[ 15.363587] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 14:48:34.450145 <3>[ 15.378009] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 14:48:34.466162 <3>[ 15.393607] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6335 14:48:34.479540 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6336 14:48:34.503948 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6337 14:48:34.570750 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6338 14:48:34.642986 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6339 14:48:34.687571 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6340 14:48:34.699500 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6341 14:48:34.745676 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6342 14:48:34.841726 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6343 14:48:34.894759 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6344 14:48:34.918270 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6345 14:48:34.937935 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6346 14:48:34.988218 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6347 14:48:35.009577 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6348 14:48:35.029573 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6349 14:48:35.050096 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6350 14:48:35.069886 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6351 14:48:35.087215 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6352 14:48:35.108203 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6353 14:48:35.126005 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6354 14:48:35.142694 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6355 14:48:35.166504 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6356 14:48:35.185209 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6357 14:48:35.202807 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6358 14:48:35.221545 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6359 14:48:35.242870 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6360 14:48:35.262232 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6361 14:48:35.278323 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6362 14:48:35.297457 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6363 14:48:35.314135 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6364 14:48:35.330433 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6365 14:48:35.374765 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6366 14:48:35.395472 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6367 14:48:35.430910 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6368 14:48:35.551139 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6369 14:48:35.580575 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6370 14:48:35.601987 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6371 14:48:35.618176 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6372 14:48:35.724825 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6373 14:48:35.771074 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6374 14:48:35.791682 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6375 14:48:35.811577 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6376 14:48:35.828961 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6377 14:48:35.874854 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6378 14:48:35.898224 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6379 14:48:35.923489 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6380 14:48:35.944550 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6381 14:48:35.989899 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6382 14:48:36.040336 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6383 14:48:36.133386
6384 14:48:36.136541 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6385 14:48:36.136964
6386 14:48:36.139909 debian-bookworm-arm64 login: root (automatic login)
6387 14:48:36.140328
6388 14:48:36.476821 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024 aarch64
6389 14:48:36.476951
6390 14:48:36.483069 The programs included with the Debian GNU/Linux system are free software;
6391 14:48:36.489884 the exact distribution terms for each program are described in the
6392 14:48:36.493166 individual files in /usr/share/doc/*/copyright.
6393 14:48:36.493301
6394 14:48:36.499803 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6395 14:48:36.503105 permitted by applicable law.
6396 14:48:37.572487 Matched prompt #10: / #
6398 14:48:37.572756 Setting prompt string to ['/ #']
6399 14:48:37.572850 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6401 14:48:37.573043 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6402 14:48:37.573137 start: 2.2.6 expect-shell-connection (timeout 00:03:48) [common]
6403 14:48:37.573208 Setting prompt string to ['/ #']
6404 14:48:37.573297 Forcing a shell prompt, looking for ['/ #']
6406 14:48:37.623531 / #
6407 14:48:37.623634 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6408 14:48:37.623707 Waiting using forced prompt support (timeout 00:02:30)
6409 14:48:37.629446
6410 14:48:37.629715 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6411 14:48:37.629811 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6413 14:48:37.730098 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip'
6414 14:48:37.735314 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14167061/extract-nfsrootfs-90jhucip'
6416 14:48:37.835840 / # export NFS_SERVER_IP='192.168.201.1'
6417 14:48:37.841278 export NFS_SERVER_IP='192.168.201.1'
6418 14:48:37.841576 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6419 14:48:37.841672 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6420 14:48:37.841766 end: 2 depthcharge-action (duration 00:01:13) [common]
6421 14:48:37.841855 start: 3 lava-test-retry (timeout 00:08:07) [common]
6422 14:48:37.841940 start: 3.1 lava-test-shell (timeout 00:08:07) [common]
6423 14:48:37.842019 Using namespace: common
6425 14:48:37.942314 / # #
6426 14:48:37.942428 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6427 14:48:37.947463 #
6428 14:48:37.947727 Using /lava-14167061
6430 14:48:38.048058 / # export SHELL=/bin/bash
6431 14:48:38.052943 export SHELL=/bin/bash
6433 14:48:38.153459 / # . /lava-14167061/environment
6434 14:48:38.158624 . /lava-14167061/environment
6436 14:48:38.264242 / # /lava-14167061/bin/lava-test-runner /lava-14167061/0
6437 14:48:38.264365 Test shell timeout: 10s (minimum of the action and connection timeout)
6438 14:48:38.269168 /lava-14167061/bin/lava-test-runner /lava-14167061/0
6439 14:48:38.480386 + export TESTRUN_ID=0_timesync-off
6440 14:48:38.483754 + TESTRUN_ID=0_timesync-off
6441 14:48:38.487039 + cd /lava-14167061/0/tests/0_timesync-off
6442 14:48:38.490224 ++ cat uuid
6443 14:48:38.490307 + UUID=14167061_1.6.2.3.1
6444 14:48:38.493817 + set +x
6445 14:48:38.497145 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14167061_1.6.2.3.1>
6446 14:48:38.497456 Received signal: <STARTRUN> 0_timesync-off 14167061_1.6.2.3.1
6447 14:48:38.497535 Starting test lava.0_timesync-off (14167061_1.6.2.3.1)
6448 14:48:38.497624 Skipping test definition patterns.
6449 14:48:38.500306 + systemctl stop systemd-timesyncd
6450 14:48:38.584838 + set +x
6451 14:48:38.588186 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14167061_1.6.2.3.1>
6452 14:48:38.588453 Received signal: <ENDRUN> 0_timesync-off 14167061_1.6.2.3.1
6453 14:48:38.588541 Ending use of test pattern.
6454 14:48:38.588604 Ending test lava.0_timesync-off (14167061_1.6.2.3.1), duration 0.09
6456 14:48:38.641615 + export TESTRUN_ID=1_kselftest-tpm2
6457 14:48:38.644826 + TESTRUN_ID=1_kselftest-tpm2
6458 14:48:38.651926 + cd /lava-14167061/0/tests/1_kselftest-tpm2
6459 14:48:38.652011 ++ cat uuid
6460 14:48:38.654844 + UUID=14167061_1.6.2.3.5
6461 14:48:38.654949 + set +x
6462 14:48:38.657841 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14167061_1.6.2.3.5>
6463 14:48:38.658099 Received signal: <STARTRUN> 1_kselftest-tpm2 14167061_1.6.2.3.5
6464 14:48:38.658172 Starting test lava.1_kselftest-tpm2 (14167061_1.6.2.3.5)
6465 14:48:38.658251 Skipping test definition patterns.
6466 14:48:38.661590 + cd ./automated/linux/kselftest/
6467 14:48:38.691160 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6468 14:48:38.713267 INFO: install_deps skipped
6469 14:48:39.202539 --2024-06-04 14:48:39-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6470 14:48:39.209090 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6471 14:48:39.329428 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6472 14:48:39.458843 HTTP request sent, awaiting response... 200 OK
6473 14:48:39.462151 Length: 1647736 (1.6M) [application/octet-stream]
6474 14:48:39.465146 Saving to: 'kselftest_armhf.tar.gz'
6475 14:48:39.465276
6476 14:48:39.465361
6477 14:48:39.716005 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6478 14:48:39.974158 kselftest_armhf.tar 2%[ ] 44.98K 175KB/s
6479 14:48:40.364028 kselftest_armhf.tar 13%[=> ] 219.84K 427KB/s
6480 14:48:40.409603 kselftest_armhf.tar 55%[==========> ] 886.35K 979KB/s
6481 14:48:40.416553 kselftest_armhf.tar 100%[===================>] 1.57M 1.65MB/s in 1.0s
6482 14:48:40.416650
6483 14:48:40.561438 2024-06-04 14:48:40 (1.65 MB/s) - 'kselftest_armhf.tar.gz' saved [1647736/1647736]
6484 14:48:40.561582
6485 14:48:44.443142 skiplist:
6486 14:48:44.446489 ========================================
6487 14:48:44.449654 ========================================
6488 14:48:44.490920 tpm2:test_smoke.sh
6489 14:48:44.493433 tpm2:test_space.sh
6490 14:48:44.509635 ============== Tests to run ===============
6491 14:48:44.509942 tpm2:test_smoke.sh
6492 14:48:44.512849 tpm2:test_space.sh
6493 14:48:44.516638 ===========End Tests to run ===============
6494 14:48:44.517067 shardfile-tpm2 pass
6495 14:48:44.629204 <12>[ 25.560381] kselftest: Running tests in tpm2
6496 14:48:44.638168 TAP version 13
6497 14:48:44.650335 1..2
6498 14:48:44.682476 # selftests: tpm2: test_smoke.sh
6499 14:48:46.644794 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6500 14:48:46.651097 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6501 14:48:46.657707 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6502 14:48:46.661318 # Traceback (most recent call last):
6503 14:48:46.670816 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6504 14:48:46.670907 # if self.tpm:
6505 14:48:46.674390 # ^^^^^^^^
6506 14:48:46.677870 # AttributeError: 'Client' object has no attribute 'tpm'
6507 14:48:46.684193 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6508 14:48:46.691037 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6509 14:48:46.694487 # Traceback (most recent call last):
6510 14:48:46.704466 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6511 14:48:46.707707 # if self.tpm:
6512 14:48:46.707821 # ^^^^^^^^
6513 14:48:46.714250 # AttributeError: 'Client' object has no attribute 'tpm'
6514 14:48:46.721107 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6515 14:48:46.724222 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6516 14:48:46.727735 # Traceback (most recent call last):
6517 14:48:46.738147 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6518 14:48:46.741510 # if self.tpm:
6519 14:48:46.741935 # ^^^^^^^^
6520 14:48:46.748269 # AttributeError: 'Client' object has no attribute 'tpm'
6521 14:48:46.754705 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6522 14:48:46.761689 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6523 14:48:46.764497 # Traceback (most recent call last):
6524 14:48:46.774541 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6525 14:48:46.778374 # if self.tpm:
6526 14:48:46.778851 # ^^^^^^^^
6527 14:48:46.785081 # AttributeError: 'Client' object has no attribute 'tpm'
6528 14:48:46.791359 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6529 14:48:46.794840 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6530 14:48:46.798253 # Traceback (most recent call last):
6531 14:48:46.808306 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6532 14:48:46.811653 # if self.tpm:
6533 14:48:46.812080 # ^^^^^^^^
6534 14:48:46.818207 # AttributeError: 'Client' object has no attribute 'tpm'
6535 14:48:46.824719 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6536 14:48:46.831470 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6537 14:48:46.834733 # Traceback (most recent call last):
6538 14:48:46.844655 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6539 14:48:46.845092 # if self.tpm:
6540 14:48:46.848242 # ^^^^^^^^
6541 14:48:46.851431 # AttributeError: 'Client' object has no attribute 'tpm'
6542 14:48:46.858178 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6543 14:48:46.864782 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6544 14:48:46.868798 # Traceback (most recent call last):
6545 14:48:46.878347 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6546 14:48:46.882010 # if self.tpm:
6547 14:48:46.882437 # ^^^^^^^^
6548 14:48:46.888188 # AttributeError: 'Client' object has no attribute 'tpm'
6549 14:48:46.895412 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6550 14:48:46.901770 # Exception ignored in: <function Client.__del__ at 0xffffacf4ccc0>
6551 14:48:46.905232 # Traceback (most recent call last):
6552 14:48:46.915044 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6553 14:48:46.918438 # if self.tpm:
6554 14:48:46.918902 # ^^^^^^^^
6555 14:48:46.925517 # AttributeError: 'Client' object has no attribute 'tpm'
6556 14:48:46.925946 #
6557 14:48:46.932077 # ======================================================================
6558 14:48:46.938492 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6559 14:48:46.945176 # ----------------------------------------------------------------------
6560 14:48:46.948690 # Traceback (most recent call last):
6561 14:48:46.958162 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6562 14:48:46.961809 # self.root_key = self.client.create_root_key()
6563 14:48:46.968534 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6564 14:48:46.978362 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6565 14:48:46.984857 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6566 14:48:46.988555 # ^^^^^^^^^^^^^^^^^^
6567 14:48:46.998142 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6568 14:48:47.002067 # raise ProtocolError(cc, rc)
6569 14:48:47.008945 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6570 14:48:47.009426 #
6571 14:48:47.015346 # ======================================================================
6572 14:48:47.021703 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6573 14:48:47.028528 # ----------------------------------------------------------------------
6574 14:48:47.031555 # Traceback (most recent call last):
6575 14:48:47.041636 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6576 14:48:47.045221 # self.client = tpm2.Client()
6577 14:48:47.048436 # ^^^^^^^^^^^^^
6578 14:48:47.058327 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6579 14:48:47.065208 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6580 14:48:47.068732 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6581 14:48:47.075372 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6582 14:48:47.075458 #
6583 14:48:47.082538 # ======================================================================
6584 14:48:47.088818 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6585 14:48:47.095251 # ----------------------------------------------------------------------
6586 14:48:47.099031 # Traceback (most recent call last):
6587 14:48:47.108634 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6588 14:48:47.112085 # self.client = tpm2.Client()
6589 14:48:47.115437 # ^^^^^^^^^^^^^
6590 14:48:47.125540 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6591 14:48:47.128619 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6592 14:48:47.132426 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6593 14:48:47.138597 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6594 14:48:47.138682 #
6595 14:48:47.145446 # ======================================================================
6596 14:48:47.152252 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6597 14:48:47.158991 # ----------------------------------------------------------------------
6598 14:48:47.161926 # Traceback (most recent call last):
6599 14:48:47.172287 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6600 14:48:47.175323 # self.client = tpm2.Client()
6601 14:48:47.179073 # ^^^^^^^^^^^^^
6602 14:48:47.189013 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6603 14:48:47.192194 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6604 14:48:47.199269 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6605 14:48:47.202339 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6606 14:48:47.202427 #
6607 14:48:47.208900 # ======================================================================
6608 14:48:47.219585 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6609 14:48:47.225907 # ----------------------------------------------------------------------
6610 14:48:47.229039 # Traceback (most recent call last):
6611 14:48:47.239373 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6612 14:48:47.242309 # self.client = tpm2.Client()
6613 14:48:47.242393 # ^^^^^^^^^^^^^
6614 14:48:47.252499 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6615 14:48:47.259168 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6616 14:48:47.262772 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6617 14:48:47.269132 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6618 14:48:47.269249 #
6619 14:48:47.276554 # ======================================================================
6620 14:48:47.282542 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6621 14:48:47.289675 # ----------------------------------------------------------------------
6622 14:48:47.292853 # Traceback (most recent call last):
6623 14:48:47.302762 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6624 14:48:47.306429 # self.client = tpm2.Client()
6625 14:48:47.309689 # ^^^^^^^^^^^^^
6626 14:48:47.319295 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6627 14:48:47.326090 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6628 14:48:47.329510 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6629 14:48:47.336071 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6630 14:48:47.336637 #
6631 14:48:47.343114 # ======================================================================
6632 14:48:47.349339 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6633 14:48:47.356057 # ----------------------------------------------------------------------
6634 14:48:47.359214 # Traceback (most recent call last):
6635 14:48:47.369680 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6636 14:48:47.372447 # self.client = tpm2.Client()
6637 14:48:47.375917 # ^^^^^^^^^^^^^
6638 14:48:47.385980 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6639 14:48:47.389020 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6640 14:48:47.395905 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6641 14:48:47.402642 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6642 14:48:47.402731 #
6643 14:48:47.409068 # ======================================================================
6644 14:48:47.416121 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6645 14:48:47.422391 # ----------------------------------------------------------------------
6646 14:48:47.425849 # Traceback (most recent call last):
6647 14:48:47.435687 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6648 14:48:47.438928 # self.client = tpm2.Client()
6649 14:48:47.442712 # ^^^^^^^^^^^^^
6650 14:48:47.452952 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6651 14:48:47.458932 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6652 14:48:47.461862 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6653 14:48:47.469147 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6654 14:48:47.469231 #
6655 14:48:47.475824 # ======================================================================
6656 14:48:47.483283 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6657 14:48:47.489168 # ----------------------------------------------------------------------
6658 14:48:47.492586 # Traceback (most recent call last):
6659 14:48:47.503426 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6660 14:48:47.509739 # self.client = tpm2.Client()
6661 14:48:47.509894 # ^^^^^^^^^^^^^
6662 14:48:47.520135 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6663 14:48:47.523530 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6664 14:48:47.530686 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6665 14:48:47.535791 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6666 14:48:47.536276 #
6667 14:48:47.542428 # ----------------------------------------------------------------------
6668 14:48:47.542970 # Ran 9 tests in 0.081s
6669 14:48:47.543505 #
6670 14:48:47.545892 # FAILED (errors=9)
6671 14:48:47.549518 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6672 14:48:47.559612 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6673 14:48:47.560048 #
6674 14:48:47.566537 # ----------------------------------------------------------------------
6675 14:48:47.566967 # Ran 2 tests in 0.054s
6676 14:48:47.569790 #
6677 14:48:47.570217 # OK
6678 14:48:47.572783 ok 1 selftests: tpm2: test_smoke.sh
6679 14:48:47.576295 # selftests: tpm2: test_space.sh
6680 14:48:47.582642 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6681 14:48:47.586270 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6682 14:48:47.593157 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6683 14:48:47.599810 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6684 14:48:47.600243 #
6685 14:48:47.606332 # ======================================================================
6686 14:48:47.612615 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6687 14:48:47.619842 # ----------------------------------------------------------------------
6688 14:48:47.622780 # Traceback (most recent call last):
6689 14:48:47.632712 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6690 14:48:47.635676 # root1 = space1.create_root_key()
6691 14:48:47.642547 # ^^^^^^^^^^^^^^^^^^^^^^^^
6692 14:48:47.652714 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6693 14:48:47.656300 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6694 14:48:47.662836 # ^^^^^^^^^^^^^^^^^^
6695 14:48:47.672843 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6696 14:48:47.676092 # raise ProtocolError(cc, rc)
6697 14:48:47.682824 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6698 14:48:47.683502 #
6699 14:48:47.689534 # ======================================================================
6700 14:48:47.693140 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6701 14:48:47.699651 # ----------------------------------------------------------------------
6702 14:48:47.703362 # Traceback (most recent call last):
6703 14:48:47.716712 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6704 14:48:47.717153 # space1.create_root_key()
6705 14:48:47.729971 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6706 14:48:47.733419 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6707 14:48:47.739866 # ^^^^^^^^^^^^^^^^^^
6708 14:48:47.749722 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6709 14:48:47.750170 # raise ProtocolError(cc, rc)
6710 14:48:47.756705 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6711 14:48:47.757344 #
6712 14:48:47.763420 # ======================================================================
6713 14:48:47.770236 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6714 14:48:47.776717 # ----------------------------------------------------------------------
6715 14:48:47.779743 # Traceback (most recent call last):
6716 14:48:47.790086 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6717 14:48:47.793354 # root1 = space1.create_root_key()
6718 14:48:47.796773 # ^^^^^^^^^^^^^^^^^^^^^^^^
6719 14:48:47.806849 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6720 14:48:47.813317 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6721 14:48:47.820195 # ^^^^^^^^^^^^^^^^^^
6722 14:48:47.830419 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6723 14:48:47.830904 # raise ProtocolError(cc, rc)
6724 14:48:47.837039 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6725 14:48:47.837512 #
6726 14:48:47.843744 # ======================================================================
6727 14:48:47.850362 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6728 14:48:47.857135 # ----------------------------------------------------------------------
6729 14:48:47.860337 # Traceback (most recent call last):
6730 14:48:47.873792 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6731 14:48:47.877066 # root1 = space1.create_root_key()
6732 14:48:47.879949 # ^^^^^^^^^^^^^^^^^^^^^^^^
6733 14:48:47.890147 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6734 14:48:47.896837 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6735 14:48:47.900195 # ^^^^^^^^^^^^^^^^^^
6736 14:48:47.910080 # File "/lava-14167061/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6737 14:48:47.913810 # raise ProtocolError(cc, rc)
6738 14:48:47.920303 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6739 14:48:47.920886 #
6740 14:48:47.927168 # ----------------------------------------------------------------------
6741 14:48:47.927775 # Ran 4 tests in 0.115s
6742 14:48:47.928340 #
6743 14:48:47.930847 # FAILED (errors=4)
6744 14:48:47.934122 not ok 2 selftests: tpm2: test_space.sh # exit=1
6745 14:48:48.294263 tpm2_test_smoke_sh pass
6746 14:48:48.297097 tpm2_test_space_sh fail
6747 14:48:48.380590 + ../../utils/send-to-lava.sh ./output/result.txt
6748 14:48:48.446586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6749 14:48:48.447573 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6751 14:48:48.488033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6752 14:48:48.488340 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6754 14:48:48.525226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6755 14:48:48.525557 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6757 14:48:48.528478 + set +x
6758 14:48:48.532150 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14167061_1.6.2.3.5>
6759 14:48:48.532480 Received signal: <ENDRUN> 1_kselftest-tpm2 14167061_1.6.2.3.5
6760 14:48:48.532618 Ending use of test pattern.
6761 14:48:48.532746 Ending test lava.1_kselftest-tpm2 (14167061_1.6.2.3.5), duration 9.87
6763 14:48:48.535450 <LAVA_TEST_RUNNER EXIT>
6764 14:48:48.535780 ok: lava_test_shell seems to have completed
6765 14:48:48.536014 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6766 14:48:48.536194 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6767 14:48:48.536373 end: 3 lava-test-retry (duration 00:00:11) [common]
6768 14:48:48.536570 start: 4 finalize (timeout 00:07:56) [common]
6769 14:48:48.536768 start: 4.1 power-off (timeout 00:00:30) [common]
6770 14:48:48.537300 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6771 14:48:48.749065 >> Command sent successfully.
6772 14:48:48.759340 Returned 0 in 0 seconds
6773 14:48:48.860588 end: 4.1 power-off (duration 00:00:00) [common]
6775 14:48:48.862605 start: 4.2 read-feedback (timeout 00:07:56) [common]
6776 14:48:48.863851 Listened to connection for namespace 'common' for up to 1s
6777 14:48:49.864598 Finalising connection for namespace 'common'
6778 14:48:49.865239 Disconnecting from shell: Finalise
6779 14:48:49.865661 / #
6780 14:48:49.966530 end: 4.2 read-feedback (duration 00:00:01) [common]
6781 14:48:49.967165 end: 4 finalize (duration 00:00:01) [common]
6782 14:48:49.967701 Cleaning after the job
6783 14:48:49.968149 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/ramdisk
6784 14:48:49.977207 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/kernel
6785 14:48:50.010441 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/dtb
6786 14:48:50.010822 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/nfsrootfs
6787 14:48:50.079263 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167061/tftp-deploy-fplw_y1k/modules
6788 14:48:50.084763 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14167061
6789 14:48:50.656322 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14167061
6790 14:48:50.656505 Job finished correctly