Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 46
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 109
1 14:46:50.515138 lava-dispatcher, installed at version: 2024.03
2 14:46:50.515375 start: 0 validate
3 14:46:50.515533 Start time: 2024-06-04 14:46:50.515524+00:00 (UTC)
4 14:46:50.515672 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:46:50.515817 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 14:46:50.788004 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:46:50.788191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 14:46:51.045889 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:46:51.046090 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 14:46:51.303070 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:46:51.303268 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:46:51.561446 validate duration: 1.05
14 14:46:51.561761 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:46:51.561892 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:46:51.561998 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:46:51.562137 Not decompressing ramdisk as can be used compressed.
18 14:46:51.562230 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 14:46:51.562303 saving as /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/ramdisk/rootfs.cpio.gz
20 14:46:51.562373 total size: 47897469 (45 MB)
21 14:46:51.563542 progress 0 % (0 MB)
22 14:46:51.577411 progress 5 % (2 MB)
23 14:46:51.590973 progress 10 % (4 MB)
24 14:46:51.604601 progress 15 % (6 MB)
25 14:46:51.618075 progress 20 % (9 MB)
26 14:46:51.631572 progress 25 % (11 MB)
27 14:46:51.645074 progress 30 % (13 MB)
28 14:46:51.658579 progress 35 % (16 MB)
29 14:46:51.672093 progress 40 % (18 MB)
30 14:46:51.685603 progress 45 % (20 MB)
31 14:46:51.699064 progress 50 % (22 MB)
32 14:46:51.712674 progress 55 % (25 MB)
33 14:46:51.726384 progress 60 % (27 MB)
34 14:46:51.739964 progress 65 % (29 MB)
35 14:46:51.753566 progress 70 % (32 MB)
36 14:46:51.767027 progress 75 % (34 MB)
37 14:46:51.780547 progress 80 % (36 MB)
38 14:46:51.794047 progress 85 % (38 MB)
39 14:46:51.807536 progress 90 % (41 MB)
40 14:46:51.820974 progress 95 % (43 MB)
41 14:46:51.834283 progress 100 % (45 MB)
42 14:46:51.834561 45 MB downloaded in 0.27 s (167.82 MB/s)
43 14:46:51.834738 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:46:51.835013 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:46:51.835110 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:46:51.835203 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:46:51.835352 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 14:46:51.835441 saving as /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/kernel/Image
50 14:46:51.835511 total size: 54682112 (52 MB)
51 14:46:51.835579 No compression specified
52 14:46:51.836811 progress 0 % (0 MB)
53 14:46:51.852032 progress 5 % (2 MB)
54 14:46:51.867239 progress 10 % (5 MB)
55 14:46:51.882628 progress 15 % (7 MB)
56 14:46:51.897788 progress 20 % (10 MB)
57 14:46:51.913150 progress 25 % (13 MB)
58 14:46:51.928483 progress 30 % (15 MB)
59 14:46:51.944065 progress 35 % (18 MB)
60 14:46:51.959336 progress 40 % (20 MB)
61 14:46:51.974596 progress 45 % (23 MB)
62 14:46:51.989992 progress 50 % (26 MB)
63 14:46:52.005168 progress 55 % (28 MB)
64 14:46:52.020544 progress 60 % (31 MB)
65 14:46:52.035767 progress 65 % (33 MB)
66 14:46:52.051320 progress 70 % (36 MB)
67 14:46:52.066838 progress 75 % (39 MB)
68 14:46:52.082559 progress 80 % (41 MB)
69 14:46:52.098015 progress 85 % (44 MB)
70 14:46:52.113484 progress 90 % (46 MB)
71 14:46:52.129009 progress 95 % (49 MB)
72 14:46:52.144327 progress 100 % (52 MB)
73 14:46:52.144619 52 MB downloaded in 0.31 s (168.71 MB/s)
74 14:46:52.144787 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:46:52.145043 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:46:52.145138 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:46:52.145232 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:46:52.145379 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 14:46:52.145463 saving as /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 14:46:52.145530 total size: 57695 (0 MB)
82 14:46:52.145596 No compression specified
83 14:46:52.146845 progress 56 % (0 MB)
84 14:46:52.147156 progress 100 % (0 MB)
85 14:46:52.147378 0 MB downloaded in 0.00 s (29.82 MB/s)
86 14:46:52.147525 end: 1.3.1 http-download (duration 00:00:00) [common]
88 14:46:52.147778 end: 1.3 download-retry (duration 00:00:00) [common]
89 14:46:52.147872 start: 1.4 download-retry (timeout 00:09:59) [common]
90 14:46:52.147962 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 14:46:52.148086 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 14:46:52.148200 saving as /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/modules/modules.tar
93 14:46:52.148311 total size: 8608920 (8 MB)
94 14:46:52.148384 Using unxz to decompress xz
95 14:46:52.152731 progress 0 % (0 MB)
96 14:46:52.173721 progress 5 % (0 MB)
97 14:46:52.204062 progress 10 % (0 MB)
98 14:46:52.237637 progress 15 % (1 MB)
99 14:46:52.264250 progress 20 % (1 MB)
100 14:46:52.290713 progress 25 % (2 MB)
101 14:46:52.317303 progress 30 % (2 MB)
102 14:46:52.344555 progress 35 % (2 MB)
103 14:46:52.374377 progress 40 % (3 MB)
104 14:46:52.399797 progress 45 % (3 MB)
105 14:46:52.426685 progress 50 % (4 MB)
106 14:46:52.454810 progress 55 % (4 MB)
107 14:46:52.482152 progress 60 % (4 MB)
108 14:46:52.509328 progress 65 % (5 MB)
109 14:46:52.537272 progress 70 % (5 MB)
110 14:46:52.566202 progress 75 % (6 MB)
111 14:46:52.595217 progress 80 % (6 MB)
112 14:46:52.622484 progress 85 % (7 MB)
113 14:46:52.650997 progress 90 % (7 MB)
114 14:46:52.679331 progress 95 % (7 MB)
115 14:46:52.707257 progress 100 % (8 MB)
116 14:46:52.713394 8 MB downloaded in 0.57 s (14.53 MB/s)
117 14:46:52.713676 end: 1.4.1 http-download (duration 00:00:01) [common]
119 14:46:52.713971 end: 1.4 download-retry (duration 00:00:01) [common]
120 14:46:52.714075 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 14:46:52.714179 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 14:46:52.714268 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 14:46:52.714364 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 14:46:52.714611 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz
125 14:46:52.714775 makedir: /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin
126 14:46:52.714894 makedir: /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/tests
127 14:46:52.715003 makedir: /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/results
128 14:46:52.715130 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-add-keys
129 14:46:52.715290 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-add-sources
130 14:46:52.715449 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-background-process-start
131 14:46:52.715595 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-background-process-stop
132 14:46:52.715735 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-common-functions
133 14:46:52.715875 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-echo-ipv4
134 14:46:52.716014 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-install-packages
135 14:46:52.716154 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-installed-packages
136 14:46:52.716295 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-os-build
137 14:46:52.716432 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-probe-channel
138 14:46:52.716566 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-probe-ip
139 14:46:52.716705 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-target-ip
140 14:46:52.716860 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-target-mac
141 14:46:52.717042 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-target-storage
142 14:46:52.717189 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-case
143 14:46:52.717328 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-event
144 14:46:52.717466 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-feedback
145 14:46:52.717605 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-raise
146 14:46:52.717741 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-reference
147 14:46:52.717876 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-runner
148 14:46:52.718014 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-set
149 14:46:52.718151 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-test-shell
150 14:46:52.718294 Updating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-install-packages (oe)
151 14:46:52.718456 Updating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/bin/lava-installed-packages (oe)
152 14:46:52.718589 Creating /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/environment
153 14:46:52.718700 LAVA metadata
154 14:46:52.718779 - LAVA_JOB_ID=14167023
155 14:46:52.718849 - LAVA_DISPATCHER_IP=192.168.201.1
156 14:46:52.718959 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 14:46:52.719039 skipped lava-vland-overlay
158 14:46:52.719119 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 14:46:52.719213 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 14:46:52.719293 skipped lava-multinode-overlay
161 14:46:52.719381 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 14:46:52.719488 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 14:46:52.719572 Loading test definitions
164 14:46:52.719674 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 14:46:52.719754 Using /lava-14167023 at stage 0
166 14:46:52.720105 uuid=14167023_1.5.2.3.1 testdef=None
167 14:46:52.720202 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 14:46:52.720298 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 14:46:52.720883 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 14:46:52.721128 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 14:46:52.721822 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 14:46:52.722076 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 14:46:52.722740 runner path: /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/0/tests/0_igt-kms-mediatek test_uuid 14167023_1.5.2.3.1
176 14:46:52.722915 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 14:46:52.723143 Creating lava-test-runner.conf files
179 14:46:52.723212 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14167023/lava-overlay-slkoyvaz/lava-14167023/0 for stage 0
180 14:46:52.723310 - 0_igt-kms-mediatek
181 14:46:52.723428 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 14:46:52.723524 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 14:46:52.731510 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 14:46:52.731627 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 14:46:52.731723 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 14:46:52.731816 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 14:46:52.731909 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 14:46:54.703105 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 14:46:54.703565 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 14:46:54.703697 extracting modules file /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14167023/extract-overlay-ramdisk-a9rr4smh/ramdisk
191 14:46:54.960339 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 14:46:54.960528 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 14:46:54.960631 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14167023/compress-overlay-g_i025bh/overlay-1.5.2.4.tar.gz to ramdisk
194 14:46:54.960714 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14167023/compress-overlay-g_i025bh/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14167023/extract-overlay-ramdisk-a9rr4smh/ramdisk
195 14:46:54.968016 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 14:46:54.968138 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 14:46:54.968236 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 14:46:54.968336 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 14:46:54.968424 Building ramdisk /var/lib/lava/dispatcher/tmp/14167023/extract-overlay-ramdisk-a9rr4smh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14167023/extract-overlay-ramdisk-a9rr4smh/ramdisk
200 14:46:56.318063 >> 465919 blocks
201 14:47:03.304308 rename /var/lib/lava/dispatcher/tmp/14167023/extract-overlay-ramdisk-a9rr4smh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/ramdisk/ramdisk.cpio.gz
202 14:47:03.304798 end: 1.5.7 compress-ramdisk (duration 00:00:08) [common]
203 14:47:03.304930 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
204 14:47:03.305049 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
205 14:47:03.305192 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/kernel/Image']
206 14:47:17.721047 Returned 0 in 14 seconds
207 14:47:17.821688 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/kernel/image.itb
208 14:47:18.747400 output: FIT description: Kernel Image image with one or more FDT blobs
209 14:47:18.747836 output: Created: Tue Jun 4 15:47:18 2024
210 14:47:18.747956 output: Image 0 (kernel-1)
211 14:47:18.748067 output: Description:
212 14:47:18.748173 output: Created: Tue Jun 4 15:47:18 2024
213 14:47:18.748276 output: Type: Kernel Image
214 14:47:18.748374 output: Compression: lzma compressed
215 14:47:18.748471 output: Data Size: 13060619 Bytes = 12754.51 KiB = 12.46 MiB
216 14:47:18.748577 output: Architecture: AArch64
217 14:47:18.748676 output: OS: Linux
218 14:47:18.748770 output: Load Address: 0x00000000
219 14:47:18.748871 output: Entry Point: 0x00000000
220 14:47:18.748966 output: Hash algo: crc32
221 14:47:18.749059 output: Hash value: 88dcd836
222 14:47:18.749156 output: Image 1 (fdt-1)
223 14:47:18.749258 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 14:47:18.749355 output: Created: Tue Jun 4 15:47:18 2024
225 14:47:18.749452 output: Type: Flat Device Tree
226 14:47:18.749530 output: Compression: uncompressed
227 14:47:18.749612 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 14:47:18.749708 output: Architecture: AArch64
229 14:47:18.749808 output: Hash algo: crc32
230 14:47:18.749899 output: Hash value: a9713552
231 14:47:18.749994 output: Image 2 (ramdisk-1)
232 14:47:18.750092 output: Description: unavailable
233 14:47:18.750182 output: Created: Tue Jun 4 15:47:18 2024
234 14:47:18.750277 output: Type: RAMDisk Image
235 14:47:18.750368 output: Compression: Unknown Compression
236 14:47:18.750463 output: Data Size: 60991235 Bytes = 59561.75 KiB = 58.17 MiB
237 14:47:18.750559 output: Architecture: AArch64
238 14:47:18.750650 output: OS: Linux
239 14:47:18.750746 output: Load Address: unavailable
240 14:47:18.750846 output: Entry Point: unavailable
241 14:47:18.750946 output: Hash algo: crc32
242 14:47:18.751037 output: Hash value: 365a9326
243 14:47:18.751099 output: Default Configuration: 'conf-1'
244 14:47:18.751163 output: Configuration 0 (conf-1)
245 14:47:18.751225 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 14:47:18.751284 output: Kernel: kernel-1
247 14:47:18.751344 output: Init Ramdisk: ramdisk-1
248 14:47:18.751418 output: FDT: fdt-1
249 14:47:18.751479 output: Loadables: kernel-1
250 14:47:18.751538 output:
251 14:47:18.751775 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 14:47:18.751883 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 14:47:18.751998 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
254 14:47:18.752108 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 14:47:18.752194 No LXC device requested
256 14:47:18.752289 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 14:47:18.752388 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 14:47:18.752474 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 14:47:18.752559 Checking files for TFTP limit of 4294967296 bytes.
260 14:47:18.753116 end: 1 tftp-deploy (duration 00:00:27) [common]
261 14:47:18.753233 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 14:47:18.753345 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 14:47:18.753480 substitutions:
264 14:47:18.753552 - {DTB}: 14167023/tftp-deploy-n8c97886/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 14:47:18.753631 - {INITRD}: 14167023/tftp-deploy-n8c97886/ramdisk/ramdisk.cpio.gz
266 14:47:18.753697 - {KERNEL}: 14167023/tftp-deploy-n8c97886/kernel/Image
267 14:47:18.753760 - {LAVA_MAC}: None
268 14:47:18.753824 - {PRESEED_CONFIG}: None
269 14:47:18.753885 - {PRESEED_LOCAL}: None
270 14:47:18.753945 - {RAMDISK}: 14167023/tftp-deploy-n8c97886/ramdisk/ramdisk.cpio.gz
271 14:47:18.754005 - {ROOT_PART}: None
272 14:47:18.754076 - {ROOT}: None
273 14:47:18.754136 - {SERVER_IP}: 192.168.201.1
274 14:47:18.754195 - {TEE}: None
275 14:47:18.754255 Parsed boot commands:
276 14:47:18.754314 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 14:47:18.754521 Parsed boot commands: tftpboot 192.168.201.1 14167023/tftp-deploy-n8c97886/kernel/image.itb 14167023/tftp-deploy-n8c97886/kernel/cmdline
278 14:47:18.754620 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 14:47:18.754719 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 14:47:18.754817 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 14:47:18.754921 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 14:47:18.754998 Not connected, no need to disconnect.
283 14:47:18.755086 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 14:47:18.755171 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 14:47:18.755247 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 14:47:18.759151 Setting prompt string to ['lava-test: # ']
287 14:47:18.759599 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 14:47:18.759718 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 14:47:18.759835 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 14:47:18.759937 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 14:47:18.760145 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
292 14:47:42.955673 Returned 0 in 24 seconds
293 14:47:43.056767 end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
295 14:47:43.059590 end: 2.2.2 reset-device (duration 00:00:24) [common]
296 14:47:43.060138 start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
297 14:47:43.060637 Setting prompt string to 'Starting depthcharge on Juniper...'
298 14:47:43.061006 Changing prompt to 'Starting depthcharge on Juniper...'
299 14:47:43.061371 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 14:47:43.062397 [Enter `^Ec?' for help]
301 14:47:43.062487 [DL] 00000000 00000000 010701
302 14:47:43.062562
303 14:47:43.062633
304 14:47:43.062700 F0: 102B 0000
305 14:47:43.062768
306 14:47:43.062830 F3: 1006 0033 [0200]
307 14:47:43.062893
308 14:47:43.062956 F3: 4001 00E0 [0200]
309 14:47:43.063016
310 14:47:43.063078 F3: 0000 0000
311 14:47:43.063139
312 14:47:43.063198 V0: 0000 0000 [0001]
313 14:47:43.063256
314 14:47:43.063315 00: 1027 0002
315 14:47:43.063379
316 14:47:43.063449 01: 0000 0000
317 14:47:43.063511
318 14:47:43.063570 BP: 0C00 0251 [0000]
319 14:47:43.063628
320 14:47:43.063687 G0: 1182 0000
321 14:47:43.063745
322 14:47:43.063804 EC: 0004 0000 [0001]
323 14:47:43.063862
324 14:47:43.063921 S7: 0000 0000 [0000]
325 14:47:43.063979
326 14:47:43.064038 CC: 0000 0000 [0001]
327 14:47:43.064096
328 14:47:43.064154 T0: 0000 00DB [000F]
329 14:47:43.064213
330 14:47:43.064271 Jump to BL
331 14:47:43.064329
332 14:47:43.064388
333 14:47:43.064446
334 14:47:43.064504 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 14:47:43.064567 ARM64: Exception handlers installed.
336 14:47:43.064627 ARM64: Testing exception
337 14:47:43.064686 ARM64: Done test exception
338 14:47:43.064744 WDT: Last reset was cold boot
339 14:47:43.064803 SPI0(PAD0) initialized at 992727 Hz
340 14:47:43.064862 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 14:47:43.064921 Manufacturer: ef
342 14:47:43.064980 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 14:47:43.065039 Probing TPM: . done!
344 14:47:43.065098 TPM ready after 0 ms
345 14:47:43.065158 Connected to device vid:did:rid of 1ae0:0028:00
346 14:47:43.065217 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 14:47:43.065278 Initialized TPM device CR50 revision 0
348 14:47:43.065337 tlcl_send_startup: Startup return code is 0
349 14:47:43.065396 TPM: setup succeeded
350 14:47:43.065455 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 14:47:43.065514 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 14:47:43.065574 in-header: 03 19 00 00 08 00 00 00
353 14:47:43.065633 in-data: a2 e0 47 00 13 00 00 00
354 14:47:43.065692 Chrome EC: UHEPI supported
355 14:47:43.065751 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 14:47:43.065810 in-header: 03 a1 00 00 08 00 00 00
357 14:47:43.065869 in-data: 84 60 60 10 00 00 00 00
358 14:47:43.065931 Phase 1
359 14:47:43.065989 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 14:47:43.066049 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 14:47:43.066107 VB2:vb2_check_recovery() Recovery was requested manually
362 14:47:43.066167 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 14:47:43.066226 Recovery requested (1009000e)
364 14:47:43.066285 tlcl_extend: response is 0
365 14:47:43.066343 tlcl_extend: response is 0
366 14:47:43.066402
367 14:47:43.066460
368 14:47:43.066518 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 14:47:43.066578 ARM64: Exception handlers installed.
370 14:47:43.066637 ARM64: Testing exception
371 14:47:43.066695 ARM64: Done test exception
372 14:47:43.066755 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2038
373 14:47:43.066814 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 14:47:43.066873 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 14:47:43.066932 [RTC]rtc_get_frequency_meter,134: input=0xf, output=916
376 14:47:43.066991 [RTC]rtc_get_frequency_meter,134: input=0x7, output=776
377 14:47:43.067050 [RTC]rtc_get_frequency_meter,134: input=0xb, output=848
378 14:47:43.067109 [RTC]rtc_get_frequency_meter,134: input=0x9, output=813
379 14:47:43.067167 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
380 14:47:43.067226 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
381 14:47:43.067284 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 14:47:43.067343 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 14:47:43.067408 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 14:47:43.067471 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 14:47:43.067531 in-header: 03 19 00 00 08 00 00 00
386 14:47:43.067591 in-data: a2 e0 47 00 13 00 00 00
387 14:47:43.067650 Chrome EC: UHEPI supported
388 14:47:43.067708 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 14:47:43.067767 in-header: 03 a1 00 00 08 00 00 00
390 14:47:43.067826 in-data: 84 60 60 10 00 00 00 00
391 14:47:43.067884 Skip loading cached calibration data
392 14:47:43.067942 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 14:47:43.068002 in-header: 03 a1 00 00 08 00 00 00
394 14:47:43.068060 in-data: 84 60 60 10 00 00 00 00
395 14:47:43.068119 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 14:47:43.068178 in-header: 03 a1 00 00 08 00 00 00
397 14:47:43.068236 in-data: 84 60 60 10 00 00 00 00
398 14:47:43.068295 ADC[3]: Raw value=216216 ID=1
399 14:47:43.068353 Manufacturer: ef
400 14:47:43.068411 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 14:47:43.068471 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 14:47:43.068530 CBFS @ 21000 size 3d4000
403 14:47:43.068589 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 14:47:43.068647 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 14:47:43.068706 CBFS: Found @ offset 3c700 size 44
406 14:47:43.068765 DRAM-K: Full Calibration
407 14:47:43.068823 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 14:47:43.068882 CBFS @ 21000 size 3d4000
409 14:47:43.068941 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 14:47:43.069000 CBFS: Locating 'fallback/dram'
411 14:47:43.069058 CBFS: Found @ offset 24b00 size 12268
412 14:47:43.069117 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
413 14:47:43.069176 ddr_geometry: 1, config: 0x0
414 14:47:43.069235 header.status = 0x0
415 14:47:43.069294 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 14:47:43.069352 header.version = 0x5 (expected: 0x5)
417 14:47:43.069412 header.size = 0x8f0 (expected: 0x8f0)
418 14:47:43.069471 header.config = 0x0
419 14:47:43.069529 header.flags = 0x0
420 14:47:43.069588 header.checksum = 0x0
421 14:47:43.069841 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 14:47:43.069914 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 14:47:43.069976 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 14:47:43.070036 ddr_geometry:1
425 14:47:43.070095 [EMI] new MDL number = 1
426 14:47:43.070154 dram_cbt_mode_extern: 0
427 14:47:43.070213 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 14:47:43.070272 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 14:47:43.070331
430 14:47:43.070389
431 14:47:43.070447 [Bianco] ETT version 0.0.0.1
432 14:47:43.070506 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 14:47:43.070564
434 14:47:43.070623 vSetVcoreByFreq with vcore:762500, freq=1600
435 14:47:43.070684
436 14:47:43.070743 [DramcInit]
437 14:47:43.070802 AutoRefreshCKEOff AutoREF OFF
438 14:47:43.070861 DDRPhyPLLSetting-CKEOFF
439 14:47:43.070920 DDRPhyPLLSetting-CKEON
440 14:47:43.070978
441 14:47:43.071037 Enable WDQS
442 14:47:43.071095 [ModeRegInit_LP4] CH0 RK0
443 14:47:43.071154 Write Rank0 MR13 =0x18
444 14:47:43.071213 Write Rank0 MR12 =0x5d
445 14:47:43.071271 Write Rank0 MR1 =0x56
446 14:47:43.071330 Write Rank0 MR2 =0x1a
447 14:47:43.071389 Write Rank0 MR11 =0x0
448 14:47:43.071459 Write Rank0 MR22 =0x38
449 14:47:43.071517 Write Rank0 MR14 =0x5d
450 14:47:43.071575 Write Rank0 MR3 =0x30
451 14:47:43.071633 Write Rank0 MR13 =0x58
452 14:47:43.071691 Write Rank0 MR12 =0x5d
453 14:47:43.071748 Write Rank0 MR1 =0x56
454 14:47:43.071806 Write Rank0 MR2 =0x2d
455 14:47:43.071864 Write Rank0 MR11 =0x23
456 14:47:43.071922 Write Rank0 MR22 =0x34
457 14:47:43.071980 Write Rank0 MR14 =0x10
458 14:47:43.072038 Write Rank0 MR3 =0x30
459 14:47:43.072096 Write Rank0 MR13 =0xd8
460 14:47:43.072154 [ModeRegInit_LP4] CH0 RK1
461 14:47:43.072213 Write Rank1 MR13 =0x18
462 14:47:43.072271 Write Rank1 MR12 =0x5d
463 14:47:43.072329 Write Rank1 MR1 =0x56
464 14:47:43.072387 Write Rank1 MR2 =0x1a
465 14:47:43.072445 Write Rank1 MR11 =0x0
466 14:47:43.072503 Write Rank1 MR22 =0x38
467 14:47:43.072560 Write Rank1 MR14 =0x5d
468 14:47:43.072618 Write Rank1 MR3 =0x30
469 14:47:43.072676 Write Rank1 MR13 =0x58
470 14:47:43.072735 Write Rank1 MR12 =0x5d
471 14:47:43.072793 Write Rank1 MR1 =0x56
472 14:47:43.072850 Write Rank1 MR2 =0x2d
473 14:47:43.072908 Write Rank1 MR11 =0x23
474 14:47:43.072967 Write Rank1 MR22 =0x34
475 14:47:43.073025 Write Rank1 MR14 =0x10
476 14:47:43.073082 Write Rank1 MR3 =0x30
477 14:47:43.073140 Write Rank1 MR13 =0xd8
478 14:47:43.073198 [ModeRegInit_LP4] CH1 RK0
479 14:47:43.073256 Write Rank0 MR13 =0x18
480 14:47:43.073314 Write Rank0 MR12 =0x5d
481 14:47:43.073373 Write Rank0 MR1 =0x56
482 14:47:43.073441 Write Rank0 MR2 =0x1a
483 14:47:43.073499 Write Rank0 MR11 =0x0
484 14:47:43.073557 Write Rank0 MR22 =0x38
485 14:47:43.073616 Write Rank0 MR14 =0x5d
486 14:47:43.073674 Write Rank0 MR3 =0x30
487 14:47:43.073731 Write Rank0 MR13 =0x58
488 14:47:43.073789 Write Rank0 MR12 =0x5d
489 14:47:43.073847 Write Rank0 MR1 =0x56
490 14:47:43.073906 Write Rank0 MR2 =0x2d
491 14:47:43.073963 Write Rank0 MR11 =0x23
492 14:47:43.074021 Write Rank0 MR22 =0x34
493 14:47:43.074080 Write Rank0 MR14 =0x10
494 14:47:43.074138 Write Rank0 MR3 =0x30
495 14:47:43.074196 Write Rank0 MR13 =0xd8
496 14:47:43.074254 [ModeRegInit_LP4] CH1 RK1
497 14:47:43.074312 Write Rank1 MR13 =0x18
498 14:47:43.074370 Write Rank1 MR12 =0x5d
499 14:47:43.074428 Write Rank1 MR1 =0x56
500 14:47:43.074486 Write Rank1 MR2 =0x1a
501 14:47:43.074544 Write Rank1 MR11 =0x0
502 14:47:43.074602 Write Rank1 MR22 =0x38
503 14:47:43.074661 Write Rank1 MR14 =0x5d
504 14:47:43.074719 Write Rank1 MR3 =0x30
505 14:47:43.074777 Write Rank1 MR13 =0x58
506 14:47:43.074835 Write Rank1 MR12 =0x5d
507 14:47:43.074892 Write Rank1 MR1 =0x56
508 14:47:43.074950 Write Rank1 MR2 =0x2d
509 14:47:43.075008 Write Rank1 MR11 =0x23
510 14:47:43.075066 Write Rank1 MR22 =0x34
511 14:47:43.075123 Write Rank1 MR14 =0x10
512 14:47:43.075181 Write Rank1 MR3 =0x30
513 14:47:43.075240 Write Rank1 MR13 =0xd8
514 14:47:43.075297 match AC timing 3
515 14:47:43.075356 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 14:47:43.075453 [MiockJmeterHQA]
517 14:47:43.075554 vSetVcoreByFreq with vcore:762500, freq=1600
518 14:47:43.075618
519 14:47:43.075679 MIOCK jitter meter ch=0
520 14:47:43.075740
521 14:47:43.075799 1T = (102-17) = 85 dly cells
522 14:47:43.075859 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
523 14:47:43.075919 vSetVcoreByFreq with vcore:725000, freq=1200
524 14:47:43.075978
525 14:47:43.076037 MIOCK jitter meter ch=0
526 14:47:43.076096
527 14:47:43.076154 1T = (97-16) = 81 dly cells
528 14:47:43.076215 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
529 14:47:43.076274 vSetVcoreByFreq with vcore:725000, freq=800
530 14:47:43.076333
531 14:47:43.076391 MIOCK jitter meter ch=0
532 14:47:43.076450
533 14:47:43.076508 1T = (97-16) = 81 dly cells
534 14:47:43.076568 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
535 14:47:43.076627 vSetVcoreByFreq with vcore:762500, freq=1600
536 14:47:43.076687 vSetVcoreByFreq with vcore:762500, freq=1600
537 14:47:43.076745
538 14:47:43.076803 K DRVP
539 14:47:43.076861 1. OCD DRVP=0 CALOUT=0
540 14:47:43.076921 1. OCD DRVP=1 CALOUT=0
541 14:47:43.076981 1. OCD DRVP=2 CALOUT=0
542 14:47:43.077041 1. OCD DRVP=3 CALOUT=0
543 14:47:43.077101 1. OCD DRVP=4 CALOUT=0
544 14:47:43.077161 1. OCD DRVP=5 CALOUT=0
545 14:47:43.077220 1. OCD DRVP=6 CALOUT=0
546 14:47:43.077280 1. OCD DRVP=7 CALOUT=0
547 14:47:43.077340 1. OCD DRVP=8 CALOUT=0
548 14:47:43.077399 1. OCD DRVP=9 CALOUT=1
549 14:47:43.077458
550 14:47:43.077517 1. OCD DRVP calibration OK! DRVP=9
551 14:47:43.077577
552 14:47:43.077635
553 14:47:43.077693
554 14:47:43.077751 K ODTN
555 14:47:43.077809 3. OCD ODTN=0 ,CALOUT=1
556 14:47:43.077872 3. OCD ODTN=1 ,CALOUT=1
557 14:47:43.077931 3. OCD ODTN=2 ,CALOUT=1
558 14:47:43.077991 3. OCD ODTN=3 ,CALOUT=1
559 14:47:43.078050 3. OCD ODTN=4 ,CALOUT=1
560 14:47:43.078109 3. OCD ODTN=5 ,CALOUT=1
561 14:47:43.078168 3. OCD ODTN=6 ,CALOUT=1
562 14:47:43.078227 3. OCD ODTN=7 ,CALOUT=0
563 14:47:43.078287
564 14:47:43.078345 3. OCD ODTN calibration OK! ODTN=7
565 14:47:43.078405
566 14:47:43.078463 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
567 14:47:43.078521 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
568 14:47:43.078581 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
569 14:47:43.078640
570 14:47:43.078699 K DRVP
571 14:47:43.078760 1. OCD DRVP=0 CALOUT=0
572 14:47:43.078820 1. OCD DRVP=1 CALOUT=0
573 14:47:43.078880 1. OCD DRVP=2 CALOUT=0
574 14:47:43.078940 1. OCD DRVP=3 CALOUT=0
575 14:47:43.078999 1. OCD DRVP=4 CALOUT=0
576 14:47:43.079059 1. OCD DRVP=5 CALOUT=0
577 14:47:43.079119 1. OCD DRVP=6 CALOUT=0
578 14:47:43.079178 1. OCD DRVP=7 CALOUT=0
579 14:47:43.079236 1. OCD DRVP=8 CALOUT=0
580 14:47:43.079296 1. OCD DRVP=9 CALOUT=0
581 14:47:43.079355 1. OCD DRVP=10 CALOUT=0
582 14:47:43.079427 1. OCD DRVP=11 CALOUT=1
583 14:47:43.079489
584 14:47:43.079548 1. OCD DRVP calibration OK! DRVP=11
585 14:47:43.079608
586 14:47:43.079667
587 14:47:43.079725
588 14:47:43.079784 K ODTN
589 14:47:43.079842 3. OCD ODTN=0 ,CALOUT=1
590 14:47:43.080092 3. OCD ODTN=1 ,CALOUT=1
591 14:47:43.080162 3. OCD ODTN=2 ,CALOUT=1
592 14:47:43.080224 3. OCD ODTN=3 ,CALOUT=1
593 14:47:43.080284 3. OCD ODTN=4 ,CALOUT=1
594 14:47:43.080344 3. OCD ODTN=5 ,CALOUT=1
595 14:47:43.080404 3. OCD ODTN=6 ,CALOUT=1
596 14:47:43.080464 3. OCD ODTN=7 ,CALOUT=1
597 14:47:43.080524 3. OCD ODTN=8 ,CALOUT=1
598 14:47:43.080584 3. OCD ODTN=9 ,CALOUT=1
599 14:47:43.080643 3. OCD ODTN=10 ,CALOUT=1
600 14:47:43.080703 3. OCD ODTN=11 ,CALOUT=1
601 14:47:43.080762 3. OCD ODTN=12 ,CALOUT=1
602 14:47:43.080822 3. OCD ODTN=13 ,CALOUT=1
603 14:47:43.080881 3. OCD ODTN=14 ,CALOUT=1
604 14:47:43.080940 3. OCD ODTN=15 ,CALOUT=0
605 14:47:43.081000
606 14:47:43.081059 3. OCD ODTN calibration OK! ODTN=15
607 14:47:43.081119
608 14:47:43.081178 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
609 14:47:43.081237 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
610 14:47:43.081296 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
611 14:47:43.081355
612 14:47:43.081413 [DramcInit]
613 14:47:43.081471 AutoRefreshCKEOff AutoREF OFF
614 14:47:43.081530 DDRPhyPLLSetting-CKEOFF
615 14:47:43.081589 DDRPhyPLLSetting-CKEON
616 14:47:43.081648
617 14:47:43.081707 Enable WDQS
618 14:47:43.081765 ==
619 14:47:43.081824 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 14:47:43.081884 fsp= 1, odt_onoff= 1, Byte mode= 0
621 14:47:43.081943 ==
622 14:47:43.082002 [Duty_Offset_Calibration]
623 14:47:43.082061
624 14:47:43.082120 ===========================
625 14:47:43.082178 B0:1 B1:1 CA:1
626 14:47:43.082237 ==
627 14:47:43.082295 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 14:47:43.082354 fsp= 1, odt_onoff= 1, Byte mode= 0
629 14:47:43.082413 ==
630 14:47:43.082472 [Duty_Offset_Calibration]
631 14:47:43.082530
632 14:47:43.082589 ===========================
633 14:47:43.082648 B0:1 B1:0 CA:2
634 14:47:43.082706 [ModeRegInit_LP4] CH0 RK0
635 14:47:43.082765 Write Rank0 MR13 =0x18
636 14:47:43.082823 Write Rank0 MR12 =0x5d
637 14:47:43.082881 Write Rank0 MR1 =0x56
638 14:47:43.082940 Write Rank0 MR2 =0x1a
639 14:47:43.082998 Write Rank0 MR11 =0x0
640 14:47:43.083056 Write Rank0 MR22 =0x38
641 14:47:43.083114 Write Rank0 MR14 =0x5d
642 14:47:43.083171 Write Rank0 MR3 =0x30
643 14:47:43.083229 Write Rank0 MR13 =0x58
644 14:47:43.083287 Write Rank0 MR12 =0x5d
645 14:47:43.083345 Write Rank0 MR1 =0x56
646 14:47:43.083410 Write Rank0 MR2 =0x2d
647 14:47:43.083470 Write Rank0 MR11 =0x23
648 14:47:43.083529 Write Rank0 MR22 =0x34
649 14:47:43.083587 Write Rank0 MR14 =0x10
650 14:47:43.083645 Write Rank0 MR3 =0x30
651 14:47:43.083703 Write Rank0 MR13 =0xd8
652 14:47:43.083761 [ModeRegInit_LP4] CH0 RK1
653 14:47:43.083820 Write Rank1 MR13 =0x18
654 14:47:43.083878 Write Rank1 MR12 =0x5d
655 14:47:43.083936 Write Rank1 MR1 =0x56
656 14:47:43.083998 Write Rank1 MR2 =0x1a
657 14:47:43.084057 Write Rank1 MR11 =0x0
658 14:47:43.084115 Write Rank1 MR22 =0x38
659 14:47:43.084173 Write Rank1 MR14 =0x5d
660 14:47:43.084231 Write Rank1 MR3 =0x30
661 14:47:43.084290 Write Rank1 MR13 =0x58
662 14:47:43.084348 Write Rank1 MR12 =0x5d
663 14:47:43.084406 Write Rank1 MR1 =0x56
664 14:47:43.084464 Write Rank1 MR2 =0x2d
665 14:47:43.084523 Write Rank1 MR11 =0x23
666 14:47:43.084581 Write Rank1 MR22 =0x34
667 14:47:43.084639 Write Rank1 MR14 =0x10
668 14:47:43.084697 Write Rank1 MR3 =0x30
669 14:47:43.084755 Write Rank1 MR13 =0xd8
670 14:47:43.084812 [ModeRegInit_LP4] CH1 RK0
671 14:47:43.084871 Write Rank0 MR13 =0x18
672 14:47:43.084930 Write Rank0 MR12 =0x5d
673 14:47:43.084988 Write Rank0 MR1 =0x56
674 14:47:43.085046 Write Rank0 MR2 =0x1a
675 14:47:43.085104 Write Rank0 MR11 =0x0
676 14:47:43.085163 Write Rank0 MR22 =0x38
677 14:47:43.085221 Write Rank0 MR14 =0x5d
678 14:47:43.085279 Write Rank0 MR3 =0x30
679 14:47:43.085337 Write Rank0 MR13 =0x58
680 14:47:43.085395 Write Rank0 MR12 =0x5d
681 14:47:43.085453 Write Rank0 MR1 =0x56
682 14:47:43.085510 Write Rank0 MR2 =0x2d
683 14:47:43.085568 Write Rank0 MR11 =0x23
684 14:47:43.085626 Write Rank0 MR22 =0x34
685 14:47:43.085684 Write Rank0 MR14 =0x10
686 14:47:43.085742 Write Rank0 MR3 =0x30
687 14:47:43.085800 Write Rank0 MR13 =0xd8
688 14:47:43.085858 [ModeRegInit_LP4] CH1 RK1
689 14:47:43.085917 Write Rank1 MR13 =0x18
690 14:47:43.085974 Write Rank1 MR12 =0x5d
691 14:47:43.086032 Write Rank1 MR1 =0x56
692 14:47:43.086090 Write Rank1 MR2 =0x1a
693 14:47:43.086148 Write Rank1 MR11 =0x0
694 14:47:43.086207 Write Rank1 MR22 =0x38
695 14:47:43.086265 Write Rank1 MR14 =0x5d
696 14:47:43.086323 Write Rank1 MR3 =0x30
697 14:47:43.086381 Write Rank1 MR13 =0x58
698 14:47:43.086439 Write Rank1 MR12 =0x5d
699 14:47:43.086497 Write Rank1 MR1 =0x56
700 14:47:43.086555 Write Rank1 MR2 =0x2d
701 14:47:43.086614 Write Rank1 MR11 =0x23
702 14:47:43.086672 Write Rank1 MR22 =0x34
703 14:47:43.086730 Write Rank1 MR14 =0x10
704 14:47:43.086789 Write Rank1 MR3 =0x30
705 14:47:43.086847 Write Rank1 MR13 =0xd8
706 14:47:43.086905 match AC timing 3
707 14:47:43.086964 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 14:47:43.087024 DramC Write-DBI off
709 14:47:43.087082 DramC Read-DBI off
710 14:47:43.087141 Write Rank0 MR13 =0x59
711 14:47:43.087199 ==
712 14:47:43.087258 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 14:47:43.087318 fsp= 1, odt_onoff= 1, Byte mode= 0
714 14:47:43.087376 ==
715 14:47:43.087441 === u2Vref_new: 0x56 --> 0x2d
716 14:47:43.087502 === u2Vref_new: 0x58 --> 0x38
717 14:47:43.087562 === u2Vref_new: 0x5a --> 0x39
718 14:47:43.087620 === u2Vref_new: 0x5c --> 0x3c
719 14:47:43.087679 === u2Vref_new: 0x5e --> 0x3d
720 14:47:43.087739 === u2Vref_new: 0x60 --> 0xa0
721 14:47:43.087798 [CA 0] Center 34 (6~63) winsize 58
722 14:47:43.087856 [CA 1] Center 36 (9~63) winsize 55
723 14:47:43.087915 [CA 2] Center 29 (0~59) winsize 60
724 14:47:43.087974 [CA 3] Center 25 (-2~52) winsize 55
725 14:47:43.088033 [CA 4] Center 26 (-2~54) winsize 57
726 14:47:43.088092 [CA 5] Center 30 (0~60) winsize 61
727 14:47:43.088150
728 14:47:43.088209 [CATrainingPosCal] consider 1 rank data
729 14:47:43.088268 u2DelayCellTimex100 = 735/100 ps
730 14:47:43.088327 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
731 14:47:43.088386 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
732 14:47:43.088445 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
733 14:47:43.088503 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
734 14:47:43.088562 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
735 14:47:43.088621 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
736 14:47:43.088679
737 14:47:43.088739 CA PerBit enable=1, Macro0, CA PI delay=25
738 14:47:43.088797 === u2Vref_new: 0x60 --> 0xa0
739 14:47:43.088856
740 14:47:43.088915 Vref(ca) range 1: 32
741 14:47:43.088973
742 14:47:43.089032 CS Dly= 9 (40-0-32)
743 14:47:43.089090 Write Rank0 MR13 =0xd8
744 14:47:43.089148 Write Rank0 MR13 =0xd8
745 14:47:43.089206 Write Rank0 MR12 =0x60
746 14:47:43.089264 Write Rank1 MR13 =0x59
747 14:47:43.089322 ==
748 14:47:43.089381 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 14:47:43.089643 fsp= 1, odt_onoff= 1, Byte mode= 0
750 14:47:43.089710 ==
751 14:47:43.089771 === u2Vref_new: 0x56 --> 0x2d
752 14:47:43.089831 === u2Vref_new: 0x58 --> 0x38
753 14:47:43.089890 === u2Vref_new: 0x5a --> 0x39
754 14:47:43.089949 === u2Vref_new: 0x5c --> 0x3c
755 14:47:43.090008 === u2Vref_new: 0x5e --> 0x3d
756 14:47:43.090068 === u2Vref_new: 0x60 --> 0xa0
757 14:47:43.090126 [CA 0] Center 36 (9~63) winsize 55
758 14:47:43.090185 [CA 1] Center 36 (9~63) winsize 55
759 14:47:43.090244 [CA 2] Center 31 (3~60) winsize 58
760 14:47:43.090302 [CA 3] Center 26 (-2~54) winsize 57
761 14:47:43.090360 [CA 4] Center 26 (-2~55) winsize 58
762 14:47:43.090418 [CA 5] Center 31 (2~61) winsize 60
763 14:47:43.090477
764 14:47:43.090536 [CATrainingPosCal] consider 2 rank data
765 14:47:43.090594 u2DelayCellTimex100 = 735/100 ps
766 14:47:43.090653 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
767 14:47:43.090712 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
768 14:47:43.090770 CA2 delay=31 (3~59),Diff = 6 PI (7 cell)
769 14:47:43.090828 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
770 14:47:43.090887 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
771 14:47:43.090945 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
772 14:47:43.091003
773 14:47:43.091062 CA PerBit enable=1, Macro0, CA PI delay=25
774 14:47:43.091121 === u2Vref_new: 0x5e --> 0x3d
775 14:47:43.091181
776 14:47:43.091240 Vref(ca) range 1: 30
777 14:47:43.091299
778 14:47:43.091358 CS Dly= 8 (39-0-32)
779 14:47:43.091424 Write Rank1 MR13 =0xd8
780 14:47:43.091485 Write Rank1 MR13 =0xd8
781 14:47:43.091543 Write Rank1 MR12 =0x5e
782 14:47:43.091604 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 14:47:43.091663 Write Rank0 MR2 =0xad
784 14:47:43.091722 [Write Leveling]
785 14:47:43.091780 delay byte0 byte1 byte2 byte3
786 14:47:43.091839
787 14:47:43.091897 10 0 0
788 14:47:43.091957 11 0 0
789 14:47:43.092017 12 0 0
790 14:47:43.092076 13 0 0
791 14:47:43.092135 14 0 0
792 14:47:43.092195 15 0 0
793 14:47:43.092254 16 0 0
794 14:47:43.092313 17 0 0
795 14:47:43.092373 18 0 0
796 14:47:43.092431 19 0 0
797 14:47:43.092490 20 0 0
798 14:47:43.092550 21 0 0
799 14:47:43.092608 22 0 0
800 14:47:43.092668 23 0 ff
801 14:47:43.092728 24 0 ff
802 14:47:43.092787 25 0 ff
803 14:47:43.092846 26 0 ff
804 14:47:43.092906 27 0 ff
805 14:47:43.092965 28 0 ff
806 14:47:43.093024 29 0 ff
807 14:47:43.093083 30 0 ff
808 14:47:43.093143 31 0 ff
809 14:47:43.093202 32 ff ff
810 14:47:43.093261 33 ff ff
811 14:47:43.093321 34 ff ff
812 14:47:43.093379 35 ff ff
813 14:47:43.093438 36 ff ff
814 14:47:43.093497 37 ff ff
815 14:47:43.093557 38 ff ff
816 14:47:43.093616 pass bytecount = 0xff (0xff: all bytes pass)
817 14:47:43.093675
818 14:47:43.093733 DQS0 dly: 32
819 14:47:43.093792 DQS1 dly: 23
820 14:47:43.093850 Write Rank0 MR2 =0x2d
821 14:47:43.093908 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 14:47:43.093967 Write Rank0 MR1 =0xd6
823 14:47:43.094025 [Gating]
824 14:47:43.094084 ==
825 14:47:43.094142 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
826 14:47:43.094201 fsp= 1, odt_onoff= 1, Byte mode= 0
827 14:47:43.094261 ==
828 14:47:43.094320 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
829 14:47:43.094381 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
830 14:47:43.094443 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
831 14:47:43.094503 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
832 14:47:43.094562 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 14:47:43.094622 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 14:47:43.094682 3 1 24 |302 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
835 14:47:43.094742 3 1 28 |2424 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
836 14:47:43.094802 3 2 0 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
837 14:47:43.094862 3 2 4 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
838 14:47:43.094921 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
839 14:47:43.094981 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 14:47:43.095041 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 14:47:43.095101 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
842 14:47:43.095161 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
843 14:47:43.095220 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 14:47:43.095280 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
845 14:47:43.095340 3 3 4 |3534 909 |(11 11)(11 11) |(0 0)(1 1)| 0
846 14:47:43.095400 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
847 14:47:43.095469 [Byte 1] Lead/lag falling Transition (3, 3, 8)
848 14:47:43.095528 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
849 14:47:43.095589 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 14:47:43.095648 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 14:47:43.095708 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
852 14:47:43.095768 3 3 28 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
853 14:47:43.095828 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
854 14:47:43.095887 3 4 4 |3d3d 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
855 14:47:43.095947 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 14:47:43.096007 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 14:47:43.096067 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 14:47:43.096126 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 14:47:43.096186 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 14:47:43.096245 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 14:47:43.096306 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 14:47:43.096366 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 14:47:43.096425 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 14:47:43.096485 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 14:47:43.096545 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 14:47:43.096605 [Byte 0] Lead/lag falling Transition (3, 5, 16)
867 14:47:43.096664 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
868 14:47:43.096723 [Byte 0] Lead/lag Transition tap number (2)
869 14:47:43.096782 [Byte 1] Lead/lag falling Transition (3, 5, 20)
870 14:47:43.096840 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
871 14:47:43.096900 3 5 28 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
872 14:47:43.096960 [Byte 0]First pass (3, 5, 28)
873 14:47:43.097214 [Byte 1] Lead/lag Transition tap number (3)
874 14:47:43.097280 3 6 0 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
875 14:47:43.097343 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
876 14:47:43.097405 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
877 14:47:43.097466 [Byte 1]First pass (3, 6, 8)
878 14:47:43.097527 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 14:47:43.097588 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 14:47:43.097648 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 14:47:43.097708 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 14:47:43.097768 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 14:47:43.097828 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 14:47:43.097888 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 14:47:43.097948 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 14:47:43.098008 All bytes gating window > 1UI, Early break!
887 14:47:43.098067
888 14:47:43.098126 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
889 14:47:43.098185
890 14:47:43.098244 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
891 14:47:43.098303
892 14:47:43.098362
893 14:47:43.098420
894 14:47:43.098479 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
895 14:47:43.098539
896 14:47:43.098598 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
897 14:47:43.098658
898 14:47:43.098717
899 14:47:43.098775 Write Rank0 MR1 =0x56
900 14:47:43.098833
901 14:47:43.098892 best RODT dly(2T, 0.5T) = (2, 2)
902 14:47:43.098951
903 14:47:43.099010 best RODT dly(2T, 0.5T) = (2, 2)
904 14:47:43.099068 ==
905 14:47:43.099127 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
906 14:47:43.099187 fsp= 1, odt_onoff= 1, Byte mode= 0
907 14:47:43.099246 ==
908 14:47:43.099305 Start DQ dly to find pass range UseTestEngine =0
909 14:47:43.099364 x-axis: bit #, y-axis: DQ dly (-127~63)
910 14:47:43.099430 RX Vref Scan = 0
911 14:47:43.099490 -26, [0] xxxxxxxx xxxxxxxx [MSB]
912 14:47:43.099569 -25, [0] xxxxxxxx xxxxxxxx [MSB]
913 14:47:43.099632 -24, [0] xxxxxxxx xxxxxxxx [MSB]
914 14:47:43.099692 -23, [0] xxxxxxxx xxxxxxxx [MSB]
915 14:47:43.099752 -22, [0] xxxxxxxx xxxxxxxx [MSB]
916 14:47:43.099813 -21, [0] xxxxxxxx xxxxxxxx [MSB]
917 14:47:43.099873 -20, [0] xxxxxxxx xxxxxxxx [MSB]
918 14:47:43.099932 -19, [0] xxxxxxxx xxxxxxxx [MSB]
919 14:47:43.099991 -18, [0] xxxxxxxx xxxxxxxx [MSB]
920 14:47:43.100051 -17, [0] xxxxxxxx xxxxxxxx [MSB]
921 14:47:43.100111 -16, [0] xxxxxxxx xxxxxxxx [MSB]
922 14:47:43.100171 -15, [0] xxxxxxxx xxxxxxxx [MSB]
923 14:47:43.100231 -14, [0] xxxxxxxx xxxxxxxx [MSB]
924 14:47:43.100291 -13, [0] xxxxxxxx xxxxxxxx [MSB]
925 14:47:43.100351 -12, [0] xxxxxxxx xxxxxxxx [MSB]
926 14:47:43.100410 -11, [0] xxxxxxxx xxxxxxxx [MSB]
927 14:47:43.100471 -10, [0] xxxxxxxx xxxxxxxx [MSB]
928 14:47:43.100531 -9, [0] xxxxxxxx xxxxxxxx [MSB]
929 14:47:43.100590 -8, [0] xxxxxxxx xxxxxxxx [MSB]
930 14:47:43.100650 -7, [0] xxxxxxxx xxxxxxxx [MSB]
931 14:47:43.100709 -6, [0] xxxxxxxx xxxxxxxx [MSB]
932 14:47:43.100769 -5, [0] xxxxxxxx xxxxxxxx [MSB]
933 14:47:43.100829 -4, [0] xxxxxxxx xxxxxxxx [MSB]
934 14:47:43.100888 -3, [0] xxxxxxxx xxxxxxxx [MSB]
935 14:47:43.100949 -2, [0] xxxoxxxx oxxxxxxx [MSB]
936 14:47:43.101009 -1, [0] xxxoxxxx oxxxxxxx [MSB]
937 14:47:43.101068 0, [0] xxxoxoxx ooxoxoxx [MSB]
938 14:47:43.101129 1, [0] xxxoxoxx ooxoxoxx [MSB]
939 14:47:43.101189 2, [0] xxxoxoox ooxoooxx [MSB]
940 14:47:43.101249 3, [0] xxxoxooo ooxoooox [MSB]
941 14:47:43.101308 4, [0] xxxoxooo ooxoooox [MSB]
942 14:47:43.101368 5, [0] xooooooo ooxooooo [MSB]
943 14:47:43.101431 6, [0] xooooooo ooxooooo [MSB]
944 14:47:43.101491 7, [0] oooooooo ooxooooo [MSB]
945 14:47:43.101550 32, [0] oooxoooo oooooooo [MSB]
946 14:47:43.101610 33, [0] oooxoooo xooooooo [MSB]
947 14:47:43.101670 34, [0] oooxoooo xooooooo [MSB]
948 14:47:43.101729 35, [0] oooxoooo xooooooo [MSB]
949 14:47:43.101789 36, [0] oooxoxoo xooxoooo [MSB]
950 14:47:43.101848 37, [0] oooxoxxx xxoxoooo [MSB]
951 14:47:43.101908 38, [0] oooxoxxx xxoxxoxo [MSB]
952 14:47:43.101967 39, [0] oooxxxxx xxoxxxxo [MSB]
953 14:47:43.102027 40, [0] xooxxxxx xxoxxxxo [MSB]
954 14:47:43.102086 41, [0] xxxxxxxx xxoxxxxo [MSB]
955 14:47:43.102147 42, [0] xxxxxxxx xxoxxxxx [MSB]
956 14:47:43.102206 43, [0] xxxxxxxx xxoxxxxx [MSB]
957 14:47:43.102266 44, [0] xxxxxxxx xxxxxxxx [MSB]
958 14:47:43.102325 iDelay=44, Bit 0, Center 23 (7 ~ 39) 33
959 14:47:43.102383 iDelay=44, Bit 1, Center 22 (5 ~ 40) 36
960 14:47:43.102445 iDelay=44, Bit 2, Center 22 (5 ~ 40) 36
961 14:47:43.102504 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
962 14:47:43.102562 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
963 14:47:43.102620 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
964 14:47:43.102679 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
965 14:47:43.102737 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
966 14:47:43.102796 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
967 14:47:43.102853 iDelay=44, Bit 9, Center 18 (0 ~ 36) 37
968 14:47:43.102911 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
969 14:47:43.102969 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
970 14:47:43.103028 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36
971 14:47:43.103085 iDelay=44, Bit 13, Center 19 (0 ~ 38) 39
972 14:47:43.103144 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
973 14:47:43.103202 iDelay=44, Bit 15, Center 23 (5 ~ 41) 37
974 14:47:43.103260 ==
975 14:47:43.103320 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 14:47:43.103380 fsp= 1, odt_onoff= 1, Byte mode= 0
977 14:47:43.103462 ==
978 14:47:43.103523 DQS Delay:
979 14:47:43.103584 DQS0 = 0, DQS1 = 0
980 14:47:43.103661 DQM Delay:
981 14:47:43.103720 DQM0 = 19, DQM1 = 19
982 14:47:43.103779 DQ Delay:
983 14:47:43.103838 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
984 14:47:43.103897 DQ4 =21, DQ5 =17, DQ6 =19, DQ7 =19
985 14:47:43.103956 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =17
986 14:47:43.104014 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23
987 14:47:43.104073
988 14:47:43.104132
989 14:47:43.104190 DramC Write-DBI off
990 14:47:43.104249 ==
991 14:47:43.104308 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 14:47:43.104368 fsp= 1, odt_onoff= 1, Byte mode= 0
993 14:47:43.104427 ==
994 14:47:43.104486 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 14:47:43.104545
996 14:47:43.104603 Begin, DQ Scan Range 919~1175
997 14:47:43.104661
998 14:47:43.104719
999 14:47:43.104777 TX Vref Scan disable
1000 14:47:43.104837 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1001 14:47:43.104897 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1002 14:47:43.104957 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1003 14:47:43.105016 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1004 14:47:43.105272 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1005 14:47:43.105339 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1006 14:47:43.105401 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1007 14:47:43.105462 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1008 14:47:43.105521 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1009 14:47:43.105582 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1010 14:47:43.105642 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1011 14:47:43.105702 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1012 14:47:43.105762 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1013 14:47:43.105822 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1014 14:47:43.105882 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1015 14:47:43.105943 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1016 14:47:43.106002 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1017 14:47:43.106063 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1018 14:47:43.106124 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1019 14:47:43.106184 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1020 14:47:43.106245 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1021 14:47:43.106304 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1022 14:47:43.106364 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1023 14:47:43.106424 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1024 14:47:43.106484 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1025 14:47:43.106551 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1026 14:47:43.106614 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1027 14:47:43.106675 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1028 14:47:43.106734 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1029 14:47:43.106799 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1030 14:47:43.106890 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1031 14:47:43.106954 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1032 14:47:43.107014 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1033 14:47:43.107073 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1034 14:47:43.107133 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1035 14:47:43.107192 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1036 14:47:43.107252 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1037 14:47:43.107347 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1038 14:47:43.107417 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1039 14:47:43.107479 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1040 14:47:43.107539 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1041 14:47:43.107608 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1042 14:47:43.107669 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1043 14:47:43.107729 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1044 14:47:43.107789 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1045 14:47:43.107848 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1046 14:47:43.107930 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1047 14:47:43.107993 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1048 14:47:43.108053 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1049 14:47:43.108112 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1050 14:47:43.108172 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1051 14:47:43.108232 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1052 14:47:43.108292 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1053 14:47:43.108351 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1054 14:47:43.108410 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1055 14:47:43.108469 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1056 14:47:43.108528 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1057 14:47:43.108587 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1058 14:47:43.108646 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1059 14:47:43.108706 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1060 14:47:43.108765 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1061 14:47:43.108823 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1062 14:47:43.108882 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1063 14:47:43.108941 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1064 14:47:43.109000 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1065 14:47:43.109059 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1066 14:47:43.109118 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1067 14:47:43.109177 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1068 14:47:43.109236 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1069 14:47:43.109296 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1070 14:47:43.109355 996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]
1071 14:47:43.109414 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1072 14:47:43.109472 Byte0, DQ PI dly=984, DQM PI dly= 984
1073 14:47:43.109531 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1074 14:47:43.109590
1075 14:47:43.109648 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1076 14:47:43.109707
1077 14:47:43.109764 Byte1, DQ PI dly=975, DQM PI dly= 975
1078 14:47:43.109823 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1079 14:47:43.109882
1080 14:47:43.109939 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1081 14:47:43.109997
1082 14:47:43.110054 ==
1083 14:47:43.110112 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1084 14:47:43.110170 fsp= 1, odt_onoff= 1, Byte mode= 0
1085 14:47:43.110228 ==
1086 14:47:43.110286 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1087 14:47:43.110344
1088 14:47:43.110401 Begin, DQ Scan Range 951~1015
1089 14:47:43.110459 Write Rank0 MR14 =0x0
1090 14:47:43.110517
1091 14:47:43.110574 CH=0, VrefRange= 0, VrefLevel = 0
1092 14:47:43.110632 TX Bit0 (978~993) 16 985, Bit8 (967~976) 10 971,
1093 14:47:43.110690 TX Bit1 (977~992) 16 984, Bit9 (968~982) 15 975,
1094 14:47:43.110749 TX Bit2 (978~992) 15 985, Bit10 (974~985) 12 979,
1095 14:47:43.110807 TX Bit3 (975~985) 11 980, Bit11 (967~980) 14 973,
1096 14:47:43.110866 TX Bit4 (978~991) 14 984, Bit12 (969~982) 14 975,
1097 14:47:43.110923 TX Bit5 (976~989) 14 982, Bit13 (969~982) 14 975,
1098 14:47:43.110982 TX Bit6 (977~990) 14 983, Bit14 (968~983) 16 975,
1099 14:47:43.111040 TX Bit7 (978~991) 14 984, Bit15 (973~984) 12 978,
1100 14:47:43.111098
1101 14:47:43.111156 Write Rank0 MR14 =0x2
1102 14:47:43.111213
1103 14:47:43.111270 CH=0, VrefRange= 0, VrefLevel = 2
1104 14:47:43.111328 TX Bit0 (978~993) 16 985, Bit8 (966~978) 13 972,
1105 14:47:43.111387 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1106 14:47:43.111451 TX Bit2 (978~993) 16 985, Bit10 (974~986) 13 980,
1107 14:47:43.111509 TX Bit3 (975~986) 12 980, Bit11 (967~981) 15 974,
1108 14:47:43.111568 TX Bit4 (977~991) 15 984, Bit12 (969~983) 15 976,
1109 14:47:43.111659 TX Bit5 (976~991) 16 983, Bit13 (968~983) 16 975,
1110 14:47:43.111957 TX Bit6 (976~991) 16 983, Bit14 (968~983) 16 975,
1111 14:47:43.112028 TX Bit7 (978~991) 14 984, Bit15 (973~985) 13 979,
1112 14:47:43.112090
1113 14:47:43.112149 Write Rank0 MR14 =0x4
1114 14:47:43.112208
1115 14:47:43.112266 CH=0, VrefRange= 0, VrefLevel = 4
1116 14:47:43.112325 TX Bit0 (978~994) 17 986, Bit8 (966~979) 14 972,
1117 14:47:43.112384 TX Bit1 (977~993) 17 985, Bit9 (968~983) 16 975,
1118 14:47:43.112443 TX Bit2 (977~994) 18 985, Bit10 (974~987) 14 980,
1119 14:47:43.112502 TX Bit3 (974~987) 14 980, Bit11 (967~982) 16 974,
1120 14:47:43.112561 TX Bit4 (977~992) 16 984, Bit12 (969~983) 15 976,
1121 14:47:43.112620 TX Bit5 (975~991) 17 983, Bit13 (968~983) 16 975,
1122 14:47:43.112678 TX Bit6 (976~991) 16 983, Bit14 (968~984) 17 976,
1123 14:47:43.112775 TX Bit7 (977~992) 16 984, Bit15 (972~986) 15 979,
1124 14:47:43.112839
1125 14:47:43.112898 Write Rank0 MR14 =0x6
1126 14:47:43.112957
1127 14:47:43.113015 CH=0, VrefRange= 0, VrefLevel = 6
1128 14:47:43.113073 TX Bit0 (978~994) 17 986, Bit8 (966~980) 15 973,
1129 14:47:43.113132 TX Bit1 (977~993) 17 985, Bit9 (967~983) 17 975,
1130 14:47:43.113190 TX Bit2 (977~994) 18 985, Bit10 (973~988) 16 980,
1131 14:47:43.113248 TX Bit3 (974~988) 15 981, Bit11 (967~982) 16 974,
1132 14:47:43.113306 TX Bit4 (977~992) 16 984, Bit12 (968~984) 17 976,
1133 14:47:43.113365 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1134 14:47:43.113424 TX Bit6 (976~992) 17 984, Bit14 (967~985) 19 976,
1135 14:47:43.113482 TX Bit7 (977~992) 16 984, Bit15 (972~986) 15 979,
1136 14:47:43.113540
1137 14:47:43.113598 Write Rank0 MR14 =0x8
1138 14:47:43.113655
1139 14:47:43.113713 CH=0, VrefRange= 0, VrefLevel = 8
1140 14:47:43.113771 TX Bit0 (977~995) 19 986, Bit8 (966~980) 15 973,
1141 14:47:43.113830 TX Bit1 (977~994) 18 985, Bit9 (967~984) 18 975,
1142 14:47:43.113889 TX Bit2 (977~995) 19 986, Bit10 (972~989) 18 980,
1143 14:47:43.113948 TX Bit3 (973~989) 17 981, Bit11 (966~983) 18 974,
1144 14:47:43.114005 TX Bit4 (977~993) 17 985, Bit12 (968~984) 17 976,
1145 14:47:43.114064 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1146 14:47:43.114122 TX Bit6 (976~992) 17 984, Bit14 (967~985) 19 976,
1147 14:47:43.114180 TX Bit7 (977~993) 17 985, Bit15 (972~987) 16 979,
1148 14:47:43.114238
1149 14:47:43.114296 Write Rank0 MR14 =0xa
1150 14:47:43.114353
1151 14:47:43.114410 CH=0, VrefRange= 0, VrefLevel = 10
1152 14:47:43.114467 TX Bit0 (977~995) 19 986, Bit8 (965~981) 17 973,
1153 14:47:43.114526 TX Bit1 (976~994) 19 985, Bit9 (967~984) 18 975,
1154 14:47:43.114584 TX Bit2 (977~995) 19 986, Bit10 (972~990) 19 981,
1155 14:47:43.114642 TX Bit3 (972~990) 19 981, Bit11 (966~983) 18 974,
1156 14:47:43.114701 TX Bit4 (976~993) 18 984, Bit12 (968~984) 17 976,
1157 14:47:43.114759 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1158 14:47:43.114818 TX Bit6 (975~993) 19 984, Bit14 (967~986) 20 976,
1159 14:47:43.114877 TX Bit7 (977~993) 17 985, Bit15 (971~988) 18 979,
1160 14:47:43.114935
1161 14:47:43.114992 Write Rank0 MR14 =0xc
1162 14:47:43.115050
1163 14:47:43.115107 CH=0, VrefRange= 0, VrefLevel = 12
1164 14:47:43.115166 TX Bit0 (977~997) 21 987, Bit8 (965~982) 18 973,
1165 14:47:43.115224 TX Bit1 (976~995) 20 985, Bit9 (967~985) 19 976,
1166 14:47:43.115282 TX Bit2 (977~996) 20 986, Bit10 (971~990) 20 980,
1167 14:47:43.115340 TX Bit3 (972~991) 20 981, Bit11 (966~983) 18 974,
1168 14:47:43.115398 TX Bit4 (976~994) 19 985, Bit12 (968~985) 18 976,
1169 14:47:43.115468 TX Bit5 (975~993) 19 984, Bit13 (967~985) 19 976,
1170 14:47:43.115527 TX Bit6 (975~993) 19 984, Bit14 (967~986) 20 976,
1171 14:47:43.115585 TX Bit7 (977~994) 18 985, Bit15 (971~988) 18 979,
1172 14:47:43.115643
1173 14:47:43.115701 Write Rank0 MR14 =0xe
1174 14:47:43.115758
1175 14:47:43.115816 CH=0, VrefRange= 0, VrefLevel = 14
1176 14:47:43.115875 TX Bit0 (977~997) 21 987, Bit8 (965~983) 19 974,
1177 14:47:43.115933 TX Bit1 (976~996) 21 986, Bit9 (966~985) 20 975,
1178 14:47:43.115991 TX Bit2 (977~997) 21 987, Bit10 (971~990) 20 980,
1179 14:47:43.116050 TX Bit3 (971~991) 21 981, Bit11 (966~984) 19 975,
1180 14:47:43.116108 TX Bit4 (976~994) 19 985, Bit12 (967~985) 19 976,
1181 14:47:43.116166 TX Bit5 (974~993) 20 983, Bit13 (967~985) 19 976,
1182 14:47:43.116224 TX Bit6 (975~993) 19 984, Bit14 (967~987) 21 977,
1183 14:47:43.116283 TX Bit7 (977~994) 18 985, Bit15 (971~990) 20 980,
1184 14:47:43.116342
1185 14:47:43.116399 wait MRW command Rank0 MR14 =0x10 fired (1)
1186 14:47:43.116457 Write Rank0 MR14 =0x10
1187 14:47:43.116516
1188 14:47:43.116573 CH=0, VrefRange= 0, VrefLevel = 16
1189 14:47:43.116631 TX Bit0 (977~998) 22 987, Bit8 (965~983) 19 974,
1190 14:47:43.116689 TX Bit1 (976~996) 21 986, Bit9 (967~985) 19 976,
1191 14:47:43.116749 TX Bit2 (976~997) 22 986, Bit10 (970~990) 21 980,
1192 14:47:43.116807 TX Bit3 (972~991) 20 981, Bit11 (965~984) 20 974,
1193 14:47:43.116866 TX Bit4 (976~995) 20 985, Bit12 (967~985) 19 976,
1194 14:47:43.116924 TX Bit5 (974~994) 21 984, Bit13 (967~985) 19 976,
1195 14:47:43.116983 TX Bit6 (975~994) 20 984, Bit14 (966~987) 22 976,
1196 14:47:43.117041 TX Bit7 (976~994) 19 985, Bit15 (970~990) 21 980,
1197 14:47:43.117099
1198 14:47:43.117156 Write Rank0 MR14 =0x12
1199 14:47:43.117214
1200 14:47:43.117272 CH=0, VrefRange= 0, VrefLevel = 18
1201 14:47:43.117330 TX Bit0 (977~998) 22 987, Bit8 (964~983) 20 973,
1202 14:47:43.117396 TX Bit1 (976~997) 22 986, Bit9 (967~986) 20 976,
1203 14:47:43.117459 TX Bit2 (976~998) 23 987, Bit10 (970~991) 22 980,
1204 14:47:43.117518 TX Bit3 (971~992) 22 981, Bit11 (965~984) 20 974,
1205 14:47:43.117576 TX Bit4 (976~996) 21 986, Bit12 (967~986) 20 976,
1206 14:47:43.117634 TX Bit5 (973~994) 22 983, Bit13 (967~986) 20 976,
1207 14:47:43.117693 TX Bit6 (975~994) 20 984, Bit14 (966~988) 23 977,
1208 14:47:43.117751 TX Bit7 (976~996) 21 986, Bit15 (969~990) 22 979,
1209 14:47:43.117809
1210 14:47:43.117866 Write Rank0 MR14 =0x14
1211 14:47:43.117923
1212 14:47:43.117980 CH=0, VrefRange= 0, VrefLevel = 20
1213 14:47:43.118235 TX Bit0 (976~999) 24 987, Bit8 (964~984) 21 974,
1214 14:47:43.118304 TX Bit1 (976~998) 23 987, Bit9 (966~986) 21 976,
1215 14:47:43.118365 TX Bit2 (976~998) 23 987, Bit10 (969~991) 23 980,
1216 14:47:43.118424 TX Bit3 (970~992) 23 981, Bit11 (965~985) 21 975,
1217 14:47:43.118483 TX Bit4 (975~997) 23 986, Bit12 (967~986) 20 976,
1218 14:47:43.118542 TX Bit5 (973~994) 22 983, Bit13 (967~986) 20 976,
1219 14:47:43.118601 TX Bit6 (975~995) 21 985, Bit14 (966~989) 24 977,
1220 14:47:43.118659 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
1221 14:47:43.118718
1222 14:47:43.118774 Write Rank0 MR14 =0x16
1223 14:47:43.118832
1224 14:47:43.118889 CH=0, VrefRange= 0, VrefLevel = 22
1225 14:47:43.118948 TX Bit0 (976~999) 24 987, Bit8 (963~984) 22 973,
1226 14:47:43.119006 TX Bit1 (976~998) 23 987, Bit9 (966~987) 22 976,
1227 14:47:43.119064 TX Bit2 (976~999) 24 987, Bit10 (969~991) 23 980,
1228 14:47:43.119122 TX Bit3 (969~992) 24 980, Bit11 (965~985) 21 975,
1229 14:47:43.119181 TX Bit4 (975~997) 23 986, Bit12 (967~988) 22 977,
1230 14:47:43.119239 TX Bit5 (972~995) 24 983, Bit13 (967~988) 22 977,
1231 14:47:43.119297 TX Bit6 (974~995) 22 984, Bit14 (966~989) 24 977,
1232 14:47:43.119355 TX Bit7 (976~997) 22 986, Bit15 (969~991) 23 980,
1233 14:47:43.119446
1234 14:47:43.119546 Write Rank0 MR14 =0x18
1235 14:47:43.119611
1236 14:47:43.119670 CH=0, VrefRange= 0, VrefLevel = 24
1237 14:47:43.119728 TX Bit0 (977~999) 23 988, Bit8 (963~985) 23 974,
1238 14:47:43.119787 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1239 14:47:43.119846 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1240 14:47:43.119904 TX Bit3 (969~993) 25 981, Bit11 (964~986) 23 975,
1241 14:47:43.119962 TX Bit4 (975~998) 24 986, Bit12 (967~988) 22 977,
1242 14:47:43.120021 TX Bit5 (972~995) 24 983, Bit13 (966~988) 23 977,
1243 14:47:43.120079 TX Bit6 (974~996) 23 985, Bit14 (966~990) 25 978,
1244 14:47:43.120137 TX Bit7 (976~997) 22 986, Bit15 (968~991) 24 979,
1245 14:47:43.120196
1246 14:47:43.120253 Write Rank0 MR14 =0x1a
1247 14:47:43.120311
1248 14:47:43.120369 CH=0, VrefRange= 0, VrefLevel = 26
1249 14:47:43.120426 TX Bit0 (976~999) 24 987, Bit8 (962~985) 24 973,
1250 14:47:43.120485 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1251 14:47:43.120543 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1252 14:47:43.120602 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1253 14:47:43.120660 TX Bit4 (975~998) 24 986, Bit12 (966~989) 24 977,
1254 14:47:43.120718 TX Bit5 (972~996) 25 984, Bit13 (966~989) 24 977,
1255 14:47:43.120777 TX Bit6 (974~997) 24 985, Bit14 (966~990) 25 978,
1256 14:47:43.120835 TX Bit7 (975~998) 24 986, Bit15 (968~991) 24 979,
1257 14:47:43.120893
1258 14:47:43.120951 Write Rank0 MR14 =0x1c
1259 14:47:43.121008
1260 14:47:43.121066 CH=0, VrefRange= 0, VrefLevel = 28
1261 14:47:43.121124 TX Bit0 (976~1000) 25 988, Bit8 (962~985) 24 973,
1262 14:47:43.121182 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1263 14:47:43.121241 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1264 14:47:43.121299 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1265 14:47:43.121357 TX Bit4 (975~999) 25 987, Bit12 (966~989) 24 977,
1266 14:47:43.121415 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1267 14:47:43.121474 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1268 14:47:43.121533 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1269 14:47:43.121591
1270 14:47:43.121648 Write Rank0 MR14 =0x1e
1271 14:47:43.121706
1272 14:47:43.121763 CH=0, VrefRange= 0, VrefLevel = 30
1273 14:47:43.121821 TX Bit0 (976~1000) 25 988, Bit8 (962~985) 24 973,
1274 14:47:43.121878 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1275 14:47:43.121937 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1276 14:47:43.121996 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1277 14:47:43.122054 TX Bit4 (975~999) 25 987, Bit12 (966~989) 24 977,
1278 14:47:43.122112 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1279 14:47:43.122171 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1280 14:47:43.122229 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1281 14:47:43.122288
1282 14:47:43.122344 Write Rank0 MR14 =0x20
1283 14:47:43.122402
1284 14:47:43.122460 CH=0, VrefRange= 0, VrefLevel = 32
1285 14:47:43.122519 TX Bit0 (976~1000) 25 988, Bit8 (962~985) 24 973,
1286 14:47:43.122577 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1287 14:47:43.122636 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1288 14:47:43.122694 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1289 14:47:43.122753 TX Bit4 (975~999) 25 987, Bit12 (966~989) 24 977,
1290 14:47:43.122811 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1291 14:47:43.122869 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1292 14:47:43.122928 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1293 14:47:43.122986
1294 14:47:43.123044 Write Rank0 MR14 =0x22
1295 14:47:43.123101
1296 14:47:43.123158 CH=0, VrefRange= 0, VrefLevel = 34
1297 14:47:43.123215 TX Bit0 (976~1000) 25 988, Bit8 (962~985) 24 973,
1298 14:47:43.123273 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1299 14:47:43.123331 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1300 14:47:43.123388 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1301 14:47:43.123456 TX Bit4 (975~999) 25 987, Bit12 (966~989) 24 977,
1302 14:47:43.123515 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1303 14:47:43.123572 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1304 14:47:43.123630 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1305 14:47:43.123687
1306 14:47:43.123744 Write Rank0 MR14 =0x24
1307 14:47:43.123801
1308 14:47:43.123857 CH=0, VrefRange= 0, VrefLevel = 36
1309 14:47:43.123915 TX Bit0 (976~1000) 25 988, Bit8 (962~985) 24 973,
1310 14:47:43.123973 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1311 14:47:43.124031 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1312 14:47:43.124284 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1313 14:47:43.124351 TX Bit4 (975~999) 25 987, Bit12 (966~989) 24 977,
1314 14:47:43.124411 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1315 14:47:43.124470 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1316 14:47:43.124528 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1317 14:47:43.124586
1318 14:47:43.124643
1319 14:47:43.124699 TX Vref found, early break! 364< 372
1320 14:47:43.124757 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1321 14:47:43.124815 u1DelayCellOfst[0]=9 cells (7 PI)
1322 14:47:43.124872 u1DelayCellOfst[1]=7 cells (6 PI)
1323 14:47:43.124929 u1DelayCellOfst[2]=7 cells (6 PI)
1324 14:47:43.124986 u1DelayCellOfst[3]=0 cells (0 PI)
1325 14:47:43.125044 u1DelayCellOfst[4]=7 cells (6 PI)
1326 14:47:43.125102 u1DelayCellOfst[5]=2 cells (2 PI)
1327 14:47:43.125158 u1DelayCellOfst[6]=3 cells (3 PI)
1328 14:47:43.125216 u1DelayCellOfst[7]=7 cells (6 PI)
1329 14:47:43.125273 Byte0, DQ PI dly=981, DQM PI dly= 984
1330 14:47:43.125330 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1331 14:47:43.125390
1332 14:47:43.125447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1333 14:47:43.125505
1334 14:47:43.125562 u1DelayCellOfst[8]=0 cells (0 PI)
1335 14:47:43.125619 u1DelayCellOfst[9]=3 cells (3 PI)
1336 14:47:43.125675 u1DelayCellOfst[10]=9 cells (7 PI)
1337 14:47:43.125732 u1DelayCellOfst[11]=2 cells (2 PI)
1338 14:47:43.125789 u1DelayCellOfst[12]=5 cells (4 PI)
1339 14:47:43.125846 u1DelayCellOfst[13]=5 cells (4 PI)
1340 14:47:43.125903 u1DelayCellOfst[14]=6 cells (5 PI)
1341 14:47:43.125960 u1DelayCellOfst[15]=9 cells (7 PI)
1342 14:47:43.126017 Byte1, DQ PI dly=973, DQM PI dly= 976
1343 14:47:43.126074 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1344 14:47:43.126132
1345 14:47:43.126188 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1346 14:47:43.126246
1347 14:47:43.126303 Write Rank0 MR14 =0x1c
1348 14:47:43.126360
1349 14:47:43.126417 Final TX Range 0 Vref 28
1350 14:47:43.126474
1351 14:47:43.126531 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1352 14:47:43.126589
1353 14:47:43.126645 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1354 14:47:43.126703 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1355 14:47:43.126762 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1356 14:47:43.126820 Write Rank0 MR3 =0xb0
1357 14:47:43.126877 DramC Write-DBI on
1358 14:47:43.126933 ==
1359 14:47:43.126991 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1360 14:47:43.127048 fsp= 1, odt_onoff= 1, Byte mode= 0
1361 14:47:43.127106 ==
1362 14:47:43.127163 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1363 14:47:43.127221
1364 14:47:43.127277 Begin, DQ Scan Range 696~760
1365 14:47:43.127335
1366 14:47:43.127392
1367 14:47:43.127462 TX Vref Scan disable
1368 14:47:43.127520 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1369 14:47:43.127580 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1370 14:47:43.127639 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1371 14:47:43.127699 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1372 14:47:43.127758 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1373 14:47:43.127816 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1374 14:47:43.127875 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1375 14:47:43.127934 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1376 14:47:43.127993 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1377 14:47:43.128051 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1378 14:47:43.128110 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1379 14:47:43.128169 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1380 14:47:43.128227 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1381 14:47:43.128286 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1382 14:47:43.128344 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1383 14:47:43.128403 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1384 14:47:43.128461 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1385 14:47:43.128519 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1386 14:47:43.128578 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1387 14:47:43.128636 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1388 14:47:43.128694 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1389 14:47:43.128753 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1390 14:47:43.128811 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1391 14:47:43.128869 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1392 14:47:43.128927 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1393 14:47:43.128985 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1394 14:47:43.129043 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1395 14:47:43.129102 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1396 14:47:43.129160 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1397 14:47:43.129219 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1398 14:47:43.129277 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1399 14:47:43.129335 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1400 14:47:43.129393 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1401 14:47:43.129451 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1402 14:47:43.129509 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1403 14:47:43.129567 Byte0, DQ PI dly=731, DQM PI dly= 731
1404 14:47:43.129624 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1405 14:47:43.129682
1406 14:47:43.129739 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1407 14:47:43.129796
1408 14:47:43.129854 Byte1, DQ PI dly=721, DQM PI dly= 721
1409 14:47:43.129912 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1410 14:47:43.129970
1411 14:47:43.130026 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1412 14:47:43.130085
1413 14:47:43.130141 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1414 14:47:43.130199 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1415 14:47:43.130257 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1416 14:47:43.130315 Write Rank0 MR3 =0x30
1417 14:47:43.130372 DramC Write-DBI off
1418 14:47:43.130429
1419 14:47:43.130487 [DATLAT]
1420 14:47:43.130543 Freq=1600, CH0 RK0, use_rxtx_scan=0
1421 14:47:43.130601
1422 14:47:43.130657 DATLAT Default: 0xf
1423 14:47:43.130714 7, 0xFFFF, sum=0
1424 14:47:43.130772 8, 0xFFFF, sum=0
1425 14:47:43.130830 9, 0xFFFF, sum=0
1426 14:47:43.130888 10, 0xFFFF, sum=0
1427 14:47:43.130947 11, 0xFFFF, sum=0
1428 14:47:43.131005 12, 0xFFFF, sum=0
1429 14:47:43.131063 13, 0xFFFF, sum=0
1430 14:47:43.131120 14, 0x0, sum=1
1431 14:47:43.131178 15, 0x0, sum=2
1432 14:47:43.131235 16, 0x0, sum=3
1433 14:47:43.131293 17, 0x0, sum=4
1434 14:47:43.131548 pattern=2 first_step=14 total pass=5 best_step=16
1435 14:47:43.131615 ==
1436 14:47:43.131675 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1437 14:47:43.131735 fsp= 1, odt_onoff= 1, Byte mode= 0
1438 14:47:43.131793 ==
1439 14:47:43.131851 Start DQ dly to find pass range UseTestEngine =1
1440 14:47:43.131910 x-axis: bit #, y-axis: DQ dly (-127~63)
1441 14:47:43.131969 RX Vref Scan = 1
1442 14:47:43.132026
1443 14:47:43.132083 RX Vref found, early break!
1444 14:47:43.132140
1445 14:47:43.132197 Final RX Vref 12, apply to both rank0 and 1
1446 14:47:43.132256 ==
1447 14:47:43.132313 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1448 14:47:43.132371 fsp= 1, odt_onoff= 1, Byte mode= 0
1449 14:47:43.132429 ==
1450 14:47:43.132486 DQS Delay:
1451 14:47:43.132543 DQS0 = 0, DQS1 = 0
1452 14:47:43.132600 DQM Delay:
1453 14:47:43.132657 DQM0 = 19, DQM1 = 18
1454 14:47:43.132714 DQ Delay:
1455 14:47:43.132772 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1456 14:47:43.132829 DQ4 =21, DQ5 =17, DQ6 =19, DQ7 =20
1457 14:47:43.132887 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1458 14:47:43.132944 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1459 14:47:43.133002
1460 14:47:43.133059
1461 14:47:43.133116
1462 14:47:43.133172 [DramC_TX_OE_Calibration] TA2
1463 14:47:43.133229 Original DQ_B0 (3 6) =30, OEN = 27
1464 14:47:43.133286 Original DQ_B1 (3 6) =30, OEN = 27
1465 14:47:43.133343 23, 0x0, End_B0=23 End_B1=23
1466 14:47:43.133402 24, 0x0, End_B0=24 End_B1=24
1467 14:47:43.133460 25, 0x0, End_B0=25 End_B1=25
1468 14:47:43.133517 26, 0x0, End_B0=26 End_B1=26
1469 14:47:43.133598 27, 0x0, End_B0=27 End_B1=27
1470 14:47:43.133658 28, 0x0, End_B0=28 End_B1=28
1471 14:47:43.133717 29, 0x0, End_B0=29 End_B1=29
1472 14:47:43.133775 30, 0x0, End_B0=30 End_B1=30
1473 14:47:43.133832 31, 0xFBFF, End_B0=30 End_B1=30
1474 14:47:43.133891 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1475 14:47:43.133949 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1476 14:47:43.134006
1477 14:47:43.134063
1478 14:47:43.134120 Write Rank0 MR23 =0x3f
1479 14:47:43.134177 [DQSOSC]
1480 14:47:43.134234 [DQSOSCAuto] RK0, (LSB)MR18= 0x1111, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1481 14:47:43.134292 CH0_RK0: MR19=0x303, MR18=0x1111, DQSOSC=401, MR23=63, INC=15, DEC=22
1482 14:47:43.134350 Write Rank0 MR23 =0x3f
1483 14:47:43.134407 [DQSOSC]
1484 14:47:43.134465 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1485 14:47:43.134522 CH0 RK0: MR19=303, MR18=1212
1486 14:47:43.134579 [RankSwap] Rank num 2, (Multi 1), Rank 1
1487 14:47:43.134637 Write Rank0 MR2 =0xad
1488 14:47:43.134694 [Write Leveling]
1489 14:47:43.134750 delay byte0 byte1 byte2 byte3
1490 14:47:43.134807
1491 14:47:43.134865 10 0 0
1492 14:47:43.134923 11 0 0
1493 14:47:43.134982 12 0 0
1494 14:47:43.135040 13 0 0
1495 14:47:43.135098 14 0 0
1496 14:47:43.135156 15 0 0
1497 14:47:43.135214 16 0 0
1498 14:47:43.135272 17 0 0
1499 14:47:43.135345 18 0 0
1500 14:47:43.135411 19 0 0
1501 14:47:43.135471 20 0 0
1502 14:47:43.135529 21 0 0
1503 14:47:43.135587 22 0 0
1504 14:47:43.135645 23 0 0
1505 14:47:43.135703 24 0 ff
1506 14:47:43.135762 25 ff ff
1507 14:47:43.135820 26 ff ff
1508 14:47:43.135878 27 ff ff
1509 14:47:43.135936 28 ff ff
1510 14:47:43.135994 29 ff ff
1511 14:47:43.136051 30 ff ff
1512 14:47:43.136109 31 ff ff
1513 14:47:43.136167 pass bytecount = 0xff (0xff: all bytes pass)
1514 14:47:43.136224
1515 14:47:43.136282 DQS0 dly: 25
1516 14:47:43.136338 DQS1 dly: 24
1517 14:47:43.136395 Write Rank0 MR2 =0x2d
1518 14:47:43.136452 [RankSwap] Rank num 2, (Multi 1), Rank 0
1519 14:47:43.136510 Write Rank1 MR1 =0xd6
1520 14:47:43.136568 [Gating]
1521 14:47:43.136624 ==
1522 14:47:43.136681 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1523 14:47:43.136738 fsp= 1, odt_onoff= 1, Byte mode= 0
1524 14:47:43.136795 ==
1525 14:47:43.136852 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1526 14:47:43.136912 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1527 14:47:43.136971 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1528 14:47:43.137030 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1529 14:47:43.137089 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1530 14:47:43.137147 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1531 14:47:43.137206 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1532 14:47:43.137264 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1533 14:47:43.137322 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1534 14:47:43.137382 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1535 14:47:43.137441 3 2 8 |2c2c 3534 |(11 10)(11 11) |(0 0)(0 1)| 0
1536 14:47:43.137499 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1537 14:47:43.137557 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1538 14:47:43.137615 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1539 14:47:43.137674 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1540 14:47:43.137732 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1541 14:47:43.137790 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1542 14:47:43.137847 3 3 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 14:47:43.137905 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 14:47:43.137963 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1545 14:47:43.138022 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1546 14:47:43.138080 3 3 20 |3534 706 |(11 11)(11 11) |(0 0)(1 1)| 0
1547 14:47:43.138138 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1548 14:47:43.138197 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1549 14:47:43.138255 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 14:47:43.138313 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1551 14:47:43.138372 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1552 14:47:43.138430 3 4 8 |706 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1553 14:47:43.138488 3 4 12 |1716 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1554 14:47:43.138547 3 4 16 |3d3d 2323 |(11 11)(11 11) |(1 1)(1 1)| 0
1555 14:47:43.138605 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 14:47:43.138664 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 14:47:43.138723 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 14:47:43.138780 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 14:47:43.138839 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 14:47:43.138896 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 14:47:43.139151 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 14:47:43.139217 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 14:47:43.139277 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 14:47:43.139336 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 14:47:43.139395 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 14:47:43.139462 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 14:47:43.139527 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1568 14:47:43.139586 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1569 14:47:43.139645 [Byte 0] Lead/lag Transition tap number (2)
1570 14:47:43.139703 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1571 14:47:43.139761 3 6 8 |2c2c 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1572 14:47:43.139819 [Byte 1] Lead/lag Transition tap number (2)
1573 14:47:43.139877 3 6 12 |2c2c 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1574 14:47:43.139936 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1575 14:47:43.139994 [Byte 0]First pass (3, 6, 16)
1576 14:47:43.140052 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 14:47:43.140111 [Byte 1]First pass (3, 6, 20)
1578 14:47:43.140168 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 14:47:43.140227 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 14:47:43.140285 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 14:47:43.140344 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 14:47:43.140403 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 14:47:43.140461 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 14:47:43.140520 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 14:47:43.140578 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 14:47:43.140637 All bytes gating window > 1UI, Early break!
1587 14:47:43.140695
1588 14:47:43.140751 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1589 14:47:43.140809
1590 14:47:43.140866 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1591 14:47:43.140926
1592 14:47:43.140983
1593 14:47:43.141040
1594 14:47:43.141097 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1595 14:47:43.141154
1596 14:47:43.141210 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1597 14:47:43.141267
1598 14:47:43.141324
1599 14:47:43.141382 Write Rank1 MR1 =0x56
1600 14:47:43.141439
1601 14:47:43.141495 best RODT dly(2T, 0.5T) = (2, 3)
1602 14:47:43.141552
1603 14:47:43.141608 best RODT dly(2T, 0.5T) = (2, 3)
1604 14:47:43.141665 ==
1605 14:47:43.141722 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1606 14:47:43.141781 fsp= 1, odt_onoff= 1, Byte mode= 0
1607 14:47:43.141838 ==
1608 14:47:43.141895 Start DQ dly to find pass range UseTestEngine =0
1609 14:47:43.141953 x-axis: bit #, y-axis: DQ dly (-127~63)
1610 14:47:43.142011 RX Vref Scan = 0
1611 14:47:43.142068 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1612 14:47:43.142127 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1613 14:47:43.142186 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1614 14:47:43.142244 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1615 14:47:43.142303 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1616 14:47:43.142362 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1617 14:47:43.142420 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1618 14:47:43.142478 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1619 14:47:43.142540 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1620 14:47:43.142598 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1621 14:47:43.142656 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1622 14:47:43.142714 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1623 14:47:43.142772 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1624 14:47:43.142831 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1625 14:47:43.142888 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1626 14:47:43.142947 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1627 14:47:43.143005 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1628 14:47:43.143063 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1629 14:47:43.143122 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1630 14:47:43.143180 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1631 14:47:43.143238 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1632 14:47:43.143297 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1633 14:47:43.143355 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1634 14:47:43.143423 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1635 14:47:43.143483 -2, [0] xxxxxxxx oxxoxxxx [MSB]
1636 14:47:43.143541 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1637 14:47:43.143599 0, [0] xxxoxxxx oxxoxxxx [MSB]
1638 14:47:43.143658 1, [0] xxxoxoxx ooxoooxx [MSB]
1639 14:47:43.143717 2, [0] xxxoxooo ooxoooox [MSB]
1640 14:47:43.143775 3, [0] xxxooooo ooxoooox [MSB]
1641 14:47:43.143833 4, [0] xoxooooo ooxoooox [MSB]
1642 14:47:43.143890 5, [0] oooooooo ooxooooo [MSB]
1643 14:47:43.143948 6, [0] oooooooo ooxooooo [MSB]
1644 14:47:43.144006 33, [0] oooooooo xooooooo [MSB]
1645 14:47:43.144065 34, [0] oooooooo xooooooo [MSB]
1646 14:47:43.144124 35, [0] oooxoooo xooooooo [MSB]
1647 14:47:43.144183 36, [0] oooxoooo xooxoooo [MSB]
1648 14:47:43.144241 37, [0] oooxoxoo xxoxoxoo [MSB]
1649 14:47:43.144300 38, [0] oooxoxoo xxoxoxxo [MSB]
1650 14:47:43.144358 39, [0] oooxoxox xxoxxxxo [MSB]
1651 14:47:43.144416 40, [0] oooxoxxx xxoxxxxo [MSB]
1652 14:47:43.144474 41, [0] oxxxxxxx xxoxxxxx [MSB]
1653 14:47:43.144532 42, [0] oxxxxxxx xxoxxxxx [MSB]
1654 14:47:43.144590 43, [0] xxxxxxxx xxoxxxxx [MSB]
1655 14:47:43.144649 44, [0] xxxxxxxx xxoxxxxx [MSB]
1656 14:47:43.144709 45, [0] xxxxxxxx xxxxxxxx [MSB]
1657 14:47:43.144767 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1658 14:47:43.144824 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1659 14:47:43.144881 iDelay=45, Bit 2, Center 22 (5 ~ 40) 36
1660 14:47:43.144938 iDelay=45, Bit 3, Center 16 (-1 ~ 34) 36
1661 14:47:43.144995 iDelay=45, Bit 4, Center 21 (3 ~ 40) 38
1662 14:47:43.145051 iDelay=45, Bit 5, Center 18 (1 ~ 36) 36
1663 14:47:43.145108 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1664 14:47:43.145165 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1665 14:47:43.145222 iDelay=45, Bit 8, Center 14 (-3 ~ 32) 36
1666 14:47:43.145279 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1667 14:47:43.145336 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1668 14:47:43.145393 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1669 14:47:43.145451 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1670 14:47:43.145508 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1671 14:47:43.145565 iDelay=45, Bit 14, Center 19 (2 ~ 37) 36
1672 14:47:43.145622 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1673 14:47:43.145678 ==
1674 14:47:43.145736 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1675 14:47:43.145794 fsp= 1, odt_onoff= 1, Byte mode= 0
1676 14:47:43.145852 ==
1677 14:47:43.145909 DQS Delay:
1678 14:47:43.145966 DQS0 = 0, DQS1 = 0
1679 14:47:43.146023 DQM Delay:
1680 14:47:43.146080 DQM0 = 20, DQM1 = 18
1681 14:47:43.146137 DQ Delay:
1682 14:47:43.146391 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =16
1683 14:47:43.146460 DQ4 =21, DQ5 =18, DQ6 =20, DQ7 =20
1684 14:47:43.146521 DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =16
1685 14:47:43.146579 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
1686 14:47:43.146638
1687 14:47:43.146695
1688 14:47:43.146752 DramC Write-DBI off
1689 14:47:43.146809 ==
1690 14:47:43.146866 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1691 14:47:43.146924 fsp= 1, odt_onoff= 1, Byte mode= 0
1692 14:47:43.146982 ==
1693 14:47:43.147039 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1694 14:47:43.147096
1695 14:47:43.147153 Begin, DQ Scan Range 920~1176
1696 14:47:43.147210
1697 14:47:43.147268
1698 14:47:43.147325 TX Vref Scan disable
1699 14:47:43.147382 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1700 14:47:43.147450 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1701 14:47:43.147509 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1702 14:47:43.147567 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1703 14:47:43.147626 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1704 14:47:43.147684 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1705 14:47:43.147743 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1706 14:47:43.147801 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1707 14:47:43.147860 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1708 14:47:43.147917 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1709 14:47:43.147975 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1710 14:47:43.148034 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1711 14:47:43.148092 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1712 14:47:43.148150 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1713 14:47:43.148209 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1714 14:47:43.148267 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1715 14:47:43.148326 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1716 14:47:43.148385 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1717 14:47:43.148443 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1718 14:47:43.148501 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1719 14:47:43.148560 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1720 14:47:43.148618 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1721 14:47:43.148677 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1722 14:47:43.148735 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1723 14:47:43.148794 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1724 14:47:43.148853 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1725 14:47:43.148911 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1726 14:47:43.148969 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1727 14:47:43.149028 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1728 14:47:43.149086 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1729 14:47:43.149144 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1730 14:47:43.149202 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1731 14:47:43.149260 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1732 14:47:43.149318 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1733 14:47:43.149375 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1734 14:47:43.149434 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1735 14:47:43.149493 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1736 14:47:43.149551 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1737 14:47:43.149610 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1738 14:47:43.149668 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1739 14:47:43.149726 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1740 14:47:43.149785 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1741 14:47:43.149843 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1742 14:47:43.149901 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1743 14:47:43.149959 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1744 14:47:43.150018 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1745 14:47:43.150077 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1746 14:47:43.150135 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1747 14:47:43.150193 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1748 14:47:43.150251 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1749 14:47:43.150310 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1750 14:47:43.150368 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1751 14:47:43.150426 972 |3 6 12|[0] xoxooooo ooxoooox [MSB]
1752 14:47:43.150485 973 |3 6 13|[0] xoxooooo ooxooooo [MSB]
1753 14:47:43.150542 974 |3 6 14|[0] ooxooooo ooxooooo [MSB]
1754 14:47:43.150600 987 |3 6 27|[0] oooxoooo xooooooo [MSB]
1755 14:47:43.150659 988 |3 6 28|[0] oooxoooo xooxoooo [MSB]
1756 14:47:43.150717 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1757 14:47:43.150775 990 |3 6 30|[0] oooxoxoo xxxxxxxx [MSB]
1758 14:47:43.150834 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1759 14:47:43.150893 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1760 14:47:43.150952 Byte0, DQ PI dly=981, DQM PI dly= 981
1761 14:47:43.151009 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1762 14:47:43.151067
1763 14:47:43.151125 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1764 14:47:43.151183
1765 14:47:43.151240 Byte1, DQ PI dly=979, DQM PI dly= 979
1766 14:47:43.151298 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1767 14:47:43.151356
1768 14:47:43.151417 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1769 14:47:43.151476
1770 14:47:43.151533 ==
1771 14:47:43.151591 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1772 14:47:43.151648 fsp= 1, odt_onoff= 1, Byte mode= 0
1773 14:47:43.151710 ==
1774 14:47:43.151781 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1775 14:47:43.151840
1776 14:47:43.151898 Begin, DQ Scan Range 955~1019
1777 14:47:43.151955 Write Rank1 MR14 =0x0
1778 14:47:43.152013
1779 14:47:43.152070 CH=0, VrefRange= 0, VrefLevel = 0
1780 14:47:43.152128 TX Bit0 (976~990) 15 983, Bit8 (969~982) 14 975,
1781 14:47:43.152186 TX Bit1 (975~986) 12 980, Bit9 (972~984) 13 978,
1782 14:47:43.152244 TX Bit2 (976~987) 12 981, Bit10 (977~984) 8 980,
1783 14:47:43.152301 TX Bit3 (969~980) 12 974, Bit11 (970~983) 14 976,
1784 14:47:43.152359 TX Bit4 (975~987) 13 981, Bit12 (973~984) 12 978,
1785 14:47:43.152417 TX Bit5 (972~984) 13 978, Bit13 (975~983) 9 979,
1786 14:47:43.152475 TX Bit6 (973~985) 13 979, Bit14 (974~984) 11 979,
1787 14:47:43.152533 TX Bit7 (975~987) 13 981, Bit15 (976~984) 9 980,
1788 14:47:43.152591
1789 14:47:43.152648 Write Rank1 MR14 =0x2
1790 14:47:43.152705
1791 14:47:43.152762 CH=0, VrefRange= 0, VrefLevel = 2
1792 14:47:43.152819 TX Bit0 (976~990) 15 983, Bit8 (969~983) 15 976,
1793 14:47:43.152876 TX Bit1 (975~987) 13 981, Bit9 (971~985) 15 978,
1794 14:47:43.152934 TX Bit2 (976~989) 14 982, Bit10 (976~990) 15 983,
1795 14:47:43.152992 TX Bit3 (969~982) 14 975, Bit11 (970~983) 14 976,
1796 14:47:43.153263 TX Bit4 (975~987) 13 981, Bit12 (973~985) 13 979,
1797 14:47:43.153352 TX Bit5 (971~985) 15 978, Bit13 (974~983) 10 978,
1798 14:47:43.153424 TX Bit6 (972~986) 15 979, Bit14 (974~986) 13 980,
1799 14:47:43.153491 TX Bit7 (974~987) 14 980, Bit15 (976~990) 15 983,
1800 14:47:43.153553
1801 14:47:43.153614 Write Rank1 MR14 =0x4
1802 14:47:43.153673
1803 14:47:43.153732 CH=0, VrefRange= 0, VrefLevel = 4
1804 14:47:43.153810 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1805 14:47:43.153873 TX Bit1 (975~987) 13 981, Bit9 (971~986) 16 978,
1806 14:47:43.153933 TX Bit2 (976~990) 15 983, Bit10 (976~991) 16 983,
1807 14:47:43.153993 TX Bit3 (969~983) 15 976, Bit11 (970~983) 14 976,
1808 14:47:43.154050 TX Bit4 (974~988) 15 981, Bit12 (972~986) 15 979,
1809 14:47:43.154109 TX Bit5 (971~985) 15 978, Bit13 (974~984) 11 979,
1810 14:47:43.154167 TX Bit6 (972~986) 15 979, Bit14 (973~987) 15 980,
1811 14:47:43.154225 TX Bit7 (974~989) 16 981, Bit15 (976~990) 15 983,
1812 14:47:43.154282
1813 14:47:43.154338 Write Rank1 MR14 =0x6
1814 14:47:43.154410
1815 14:47:43.154469 CH=0, VrefRange= 0, VrefLevel = 6
1816 14:47:43.154532 TX Bit0 (976~991) 16 983, Bit8 (968~984) 17 976,
1817 14:47:43.154591 TX Bit1 (975~988) 14 981, Bit9 (970~987) 18 978,
1818 14:47:43.154649 TX Bit2 (976~990) 15 983, Bit10 (976~991) 16 983,
1819 14:47:43.154707 TX Bit3 (969~984) 16 976, Bit11 (969~984) 16 976,
1820 14:47:43.154765 TX Bit4 (974~990) 17 982, Bit12 (972~987) 16 979,
1821 14:47:43.154823 TX Bit5 (970~985) 16 977, Bit13 (974~984) 11 979,
1822 14:47:43.154880 TX Bit6 (972~987) 16 979, Bit14 (972~988) 17 980,
1823 14:47:43.154937 TX Bit7 (973~990) 18 981, Bit15 (975~991) 17 983,
1824 14:47:43.154995
1825 14:47:43.155050 Write Rank1 MR14 =0x8
1826 14:47:43.155108
1827 14:47:43.155164 CH=0, VrefRange= 0, VrefLevel = 8
1828 14:47:43.155221 TX Bit0 (976~991) 16 983, Bit8 (968~984) 17 976,
1829 14:47:43.155278 TX Bit1 (974~990) 17 982, Bit9 (970~987) 18 978,
1830 14:47:43.155336 TX Bit2 (976~991) 16 983, Bit10 (975~991) 17 983,
1831 14:47:43.155393 TX Bit3 (969~984) 16 976, Bit11 (969~985) 17 977,
1832 14:47:43.155459 TX Bit4 (974~990) 17 982, Bit12 (971~987) 17 979,
1833 14:47:43.155516 TX Bit5 (970~986) 17 978, Bit13 (973~985) 13 979,
1834 14:47:43.155575 TX Bit6 (971~989) 19 980, Bit14 (972~989) 18 980,
1835 14:47:43.155633 TX Bit7 (973~990) 18 981, Bit15 (975~991) 17 983,
1836 14:47:43.155690
1837 14:47:43.155746 Write Rank1 MR14 =0xa
1838 14:47:43.155807
1839 14:47:43.155880 CH=0, VrefRange= 0, VrefLevel = 10
1840 14:47:43.155953 TX Bit0 (975~992) 18 983, Bit8 (968~985) 18 976,
1841 14:47:43.156011 TX Bit1 (974~991) 18 982, Bit9 (970~988) 19 979,
1842 14:47:43.156068 TX Bit2 (976~991) 16 983, Bit10 (976~992) 17 984,
1843 14:47:43.156126 TX Bit3 (968~985) 18 976, Bit11 (969~985) 17 977,
1844 14:47:43.156183 TX Bit4 (973~991) 19 982, Bit12 (970~989) 20 979,
1845 14:47:43.156240 TX Bit5 (970~987) 18 978, Bit13 (972~986) 15 979,
1846 14:47:43.156298 TX Bit6 (971~990) 20 980, Bit14 (971~989) 19 980,
1847 14:47:43.156355 TX Bit7 (972~991) 20 981, Bit15 (975~992) 18 983,
1848 14:47:43.156412
1849 14:47:43.156468 Write Rank1 MR14 =0xc
1850 14:47:43.156525
1851 14:47:43.156581 CH=0, VrefRange= 0, VrefLevel = 12
1852 14:47:43.156638 TX Bit0 (975~992) 18 983, Bit8 (968~985) 18 976,
1853 14:47:43.156695 TX Bit1 (974~991) 18 982, Bit9 (969~989) 21 979,
1854 14:47:43.156752 TX Bit2 (975~991) 17 983, Bit10 (975~992) 18 983,
1855 14:47:43.156809 TX Bit3 (968~985) 18 976, Bit11 (968~986) 19 977,
1856 14:47:43.156866 TX Bit4 (973~991) 19 982, Bit12 (970~989) 20 979,
1857 14:47:43.156923 TX Bit5 (970~988) 19 979, Bit13 (972~987) 16 979,
1858 14:47:43.156980 TX Bit6 (970~990) 21 980, Bit14 (971~990) 20 980,
1859 14:47:43.157037 TX Bit7 (973~991) 19 982, Bit15 (975~992) 18 983,
1860 14:47:43.157094
1861 14:47:43.157150 Write Rank1 MR14 =0xe
1862 14:47:43.157207
1863 14:47:43.157263 CH=0, VrefRange= 0, VrefLevel = 14
1864 14:47:43.157320 TX Bit0 (975~993) 19 984, Bit8 (968~986) 19 977,
1865 14:47:43.157378 TX Bit1 (973~991) 19 982, Bit9 (969~989) 21 979,
1866 14:47:43.157435 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1867 14:47:43.157491 TX Bit3 (968~985) 18 976, Bit11 (968~986) 19 977,
1868 14:47:43.157548 TX Bit4 (972~991) 20 981, Bit12 (970~990) 21 980,
1869 14:47:43.157604 TX Bit5 (969~988) 20 978, Bit13 (971~988) 18 979,
1870 14:47:43.157662 TX Bit6 (970~991) 22 980, Bit14 (971~990) 20 980,
1871 14:47:43.157719 TX Bit7 (971~991) 21 981, Bit15 (974~993) 20 983,
1872 14:47:43.157793
1873 14:47:43.157858 Write Rank1 MR14 =0x10
1874 14:47:43.157924
1875 14:47:43.157981 CH=0, VrefRange= 0, VrefLevel = 16
1876 14:47:43.158039 TX Bit0 (974~993) 20 983, Bit8 (967~986) 20 976,
1877 14:47:43.158097 TX Bit1 (973~992) 20 982, Bit9 (969~990) 22 979,
1878 14:47:43.158155 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1879 14:47:43.158212 TX Bit3 (968~986) 19 977, Bit11 (968~988) 21 978,
1880 14:47:43.158270 TX Bit4 (972~992) 21 982, Bit12 (970~990) 21 980,
1881 14:47:43.158327 TX Bit5 (969~990) 22 979, Bit13 (971~989) 19 980,
1882 14:47:43.158385 TX Bit6 (970~991) 22 980, Bit14 (970~990) 21 980,
1883 14:47:43.158443 TX Bit7 (971~992) 22 981, Bit15 (974~993) 20 983,
1884 14:47:43.158500
1885 14:47:43.158556 Write Rank1 MR14 =0x12
1886 14:47:43.158614
1887 14:47:43.158670 CH=0, VrefRange= 0, VrefLevel = 18
1888 14:47:43.158727 TX Bit0 (974~993) 20 983, Bit8 (967~987) 21 977,
1889 14:47:43.158784 TX Bit1 (973~992) 20 982, Bit9 (969~990) 22 979,
1890 14:47:43.158841 TX Bit2 (975~992) 18 983, Bit10 (974~994) 21 984,
1891 14:47:43.158898 TX Bit3 (967~987) 21 977, Bit11 (968~989) 22 978,
1892 14:47:43.158955 TX Bit4 (972~992) 21 982, Bit12 (969~990) 22 979,
1893 14:47:43.159011 TX Bit5 (969~990) 22 979, Bit13 (970~989) 20 979,
1894 14:47:43.159069 TX Bit6 (970~991) 22 980, Bit14 (970~991) 22 980,
1895 14:47:43.159126 TX Bit7 (971~992) 22 981, Bit15 (974~993) 20 983,
1896 14:47:43.159183
1897 14:47:43.159452 Write Rank1 MR14 =0x14
1898 14:47:43.159550
1899 14:47:43.159642 CH=0, VrefRange= 0, VrefLevel = 20
1900 14:47:43.159733 TX Bit0 (974~994) 21 984, Bit8 (967~988) 22 977,
1901 14:47:43.159825 TX Bit1 (972~992) 21 982, Bit9 (968~990) 23 979,
1902 14:47:43.159915 TX Bit2 (974~993) 20 983, Bit10 (975~994) 20 984,
1903 14:47:43.160006 TX Bit3 (967~987) 21 977, Bit11 (968~989) 22 978,
1904 14:47:43.160097 TX Bit4 (971~992) 22 981, Bit12 (969~991) 23 980,
1905 14:47:43.160188 TX Bit5 (969~990) 22 979, Bit13 (970~990) 21 980,
1906 14:47:43.386227 TX Bit6 (969~991) 23 980, Bit14 (969~991) 23 980,
1907 14:47:43.386734 TX Bit7 (970~992) 23 981, Bit15 (974~993) 20 983,
1908 14:47:43.387061
1909 14:47:43.387354 Write Rank1 MR14 =0x16
1910 14:47:43.387694
1911 14:47:43.387973 CH=0, VrefRange= 0, VrefLevel = 22
1912 14:47:43.388248 TX Bit0 (973~994) 22 983, Bit8 (967~989) 23 978,
1913 14:47:43.388526 TX Bit1 (972~993) 22 982, Bit9 (968~991) 24 979,
1914 14:47:43.388799 TX Bit2 (974~993) 20 983, Bit10 (974~995) 22 984,
1915 14:47:43.389071 TX Bit3 (967~988) 22 977, Bit11 (967~989) 23 978,
1916 14:47:43.389342 TX Bit4 (971~993) 23 982, Bit12 (969~991) 23 980,
1917 14:47:43.389609 TX Bit5 (969~991) 23 980, Bit13 (970~990) 21 980,
1918 14:47:43.389874 TX Bit6 (969~992) 24 980, Bit14 (969~991) 23 980,
1919 14:47:43.390142 TX Bit7 (970~993) 24 981, Bit15 (973~994) 22 983,
1920 14:47:43.390447
1921 14:47:43.390712 Write Rank1 MR14 =0x18
1922 14:47:43.390975
1923 14:47:43.391236 CH=0, VrefRange= 0, VrefLevel = 24
1924 14:47:43.391536 TX Bit0 (973~995) 23 984, Bit8 (967~990) 24 978,
1925 14:47:43.391810 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1926 14:47:43.392075 TX Bit2 (974~994) 21 984, Bit10 (974~996) 23 985,
1927 14:47:43.392341 TX Bit3 (967~989) 23 978, Bit11 (967~990) 24 978,
1928 14:47:43.392604 TX Bit4 (970~993) 24 981, Bit12 (969~991) 23 980,
1929 14:47:43.392870 TX Bit5 (968~991) 24 979, Bit13 (969~990) 22 979,
1930 14:47:43.393134 TX Bit6 (969~992) 24 980, Bit14 (969~992) 24 980,
1931 14:47:43.393442 TX Bit7 (970~993) 24 981, Bit15 (973~995) 23 984,
1932 14:47:43.393715
1933 14:47:43.393974 Write Rank1 MR14 =0x1a
1934 14:47:43.394240
1935 14:47:43.394500 CH=0, VrefRange= 0, VrefLevel = 26
1936 14:47:43.394765 TX Bit0 (973~995) 23 984, Bit8 (967~990) 24 978,
1937 14:47:43.395031 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1938 14:47:43.395298 TX Bit2 (974~994) 21 984, Bit10 (973~996) 24 984,
1939 14:47:43.395626 TX Bit3 (966~989) 24 977, Bit11 (967~990) 24 978,
1940 14:47:43.395899 TX Bit4 (970~993) 24 981, Bit12 (968~992) 25 980,
1941 14:47:43.396165 TX Bit5 (968~991) 24 979, Bit13 (969~991) 23 980,
1942 14:47:43.396432 TX Bit6 (969~992) 24 980, Bit14 (969~992) 24 980,
1943 14:47:43.396693 TX Bit7 (970~993) 24 981, Bit15 (973~996) 24 984,
1944 14:47:43.396995
1945 14:47:43.397289 Write Rank1 MR14 =0x1c
1946 14:47:43.397559
1947 14:47:43.397820 CH=0, VrefRange= 0, VrefLevel = 28
1948 14:47:43.398081 TX Bit0 (973~996) 24 984, Bit8 (967~990) 24 978,
1949 14:47:43.398349 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1950 14:47:43.398612 TX Bit2 (973~994) 22 983, Bit10 (973~997) 25 985,
1951 14:47:43.398874 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1952 14:47:43.399237 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
1953 14:47:43.399621 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
1954 14:47:43.399895 TX Bit6 (969~993) 25 981, Bit14 (969~992) 24 980,
1955 14:47:43.400192 TX Bit7 (970~994) 25 982, Bit15 (971~996) 26 983,
1956 14:47:43.400466
1957 14:47:43.400729 Write Rank1 MR14 =0x1e
1958 14:47:43.400992
1959 14:47:43.401269 CH=0, VrefRange= 0, VrefLevel = 30
1960 14:47:43.401537 TX Bit0 (972~997) 26 984, Bit8 (966~990) 25 978,
1961 14:47:43.401801 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
1962 14:47:43.402064 TX Bit2 (972~994) 23 983, Bit10 (973~997) 25 985,
1963 14:47:43.402328 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1964 14:47:43.402590 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
1965 14:47:43.402853 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
1966 14:47:43.403197 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
1967 14:47:43.403626 TX Bit7 (969~994) 26 981, Bit15 (971~996) 26 983,
1968 14:47:43.403901
1969 14:47:43.404166 Write Rank1 MR14 =0x20
1970 14:47:43.404428
1971 14:47:43.404689 CH=0, VrefRange= 0, VrefLevel = 32
1972 14:47:43.404948 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
1973 14:47:43.405256 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1974 14:47:43.405537 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
1975 14:47:43.405802 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1976 14:47:43.406066 TX Bit4 (970~994) 25 982, Bit12 (968~992) 25 980,
1977 14:47:43.406329 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
1978 14:47:43.406594 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
1979 14:47:43.406929 TX Bit7 (969~995) 27 982, Bit15 (971~995) 25 983,
1980 14:47:43.407268
1981 14:47:43.407718 Write Rank1 MR14 =0x22
1982 14:47:43.408153
1983 14:47:43.408438 CH=0, VrefRange= 0, VrefLevel = 34
1984 14:47:43.408711 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
1985 14:47:43.408979 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1986 14:47:43.409279 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
1987 14:47:43.409688 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1988 14:47:43.410114 TX Bit4 (970~994) 25 982, Bit12 (968~992) 25 980,
1989 14:47:43.410546 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
1990 14:47:43.410964 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
1991 14:47:43.411379 TX Bit7 (969~995) 27 982, Bit15 (971~995) 25 983,
1992 14:47:43.411896
1993 14:47:43.412238 Write Rank1 MR14 =0x24
1994 14:47:43.412525
1995 14:47:43.412813 CH=0, VrefRange= 0, VrefLevel = 36
1996 14:47:43.413104 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
1997 14:47:43.413396 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1998 14:47:43.413962 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
1999 14:47:43.414186 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2000 14:47:43.414384 TX Bit4 (970~994) 25 982, Bit12 (968~992) 25 980,
2001 14:47:43.414575 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
2002 14:47:43.414764 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2003 14:47:43.414951 TX Bit7 (969~995) 27 982, Bit15 (971~995) 25 983,
2004 14:47:43.415139
2005 14:47:43.415324 Write Rank1 MR14 =0x26
2006 14:47:43.415563
2007 14:47:43.415757 CH=0, VrefRange= 0, VrefLevel = 38
2008 14:47:43.415952 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
2009 14:47:43.416145 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
2010 14:47:43.416336 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
2011 14:47:43.416526 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2012 14:47:43.416739 TX Bit4 (970~994) 25 982, Bit12 (968~992) 25 980,
2013 14:47:43.416934 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
2014 14:47:43.417123 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2015 14:47:43.417267 TX Bit7 (969~995) 27 982, Bit15 (971~995) 25 983,
2016 14:47:43.417415
2017 14:47:43.417604
2018 14:47:43.417749 TX Vref found, early break! 377< 380
2019 14:47:43.417896 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2020 14:47:43.418042 u1DelayCellOfst[0]=7 cells (6 PI)
2021 14:47:43.418186 u1DelayCellOfst[1]=5 cells (4 PI)
2022 14:47:43.418329 u1DelayCellOfst[2]=7 cells (6 PI)
2023 14:47:43.418472 u1DelayCellOfst[3]=0 cells (0 PI)
2024 14:47:43.418614 u1DelayCellOfst[4]=5 cells (4 PI)
2025 14:47:43.418756 u1DelayCellOfst[5]=1 cells (1 PI)
2026 14:47:43.418897 u1DelayCellOfst[6]=2 cells (2 PI)
2027 14:47:43.419040 u1DelayCellOfst[7]=5 cells (4 PI)
2028 14:47:43.419181 Byte0, DQ PI dly=978, DQM PI dly= 981
2029 14:47:43.419325 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2030 14:47:43.419502
2031 14:47:43.419647 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2032 14:47:43.419790
2033 14:47:43.419931 u1DelayCellOfst[8]=0 cells (0 PI)
2034 14:47:43.420073 u1DelayCellOfst[9]=1 cells (1 PI)
2035 14:47:43.420219 u1DelayCellOfst[10]=7 cells (6 PI)
2036 14:47:43.420389 u1DelayCellOfst[11]=0 cells (0 PI)
2037 14:47:43.420531 u1DelayCellOfst[12]=2 cells (2 PI)
2038 14:47:43.420672 u1DelayCellOfst[13]=2 cells (2 PI)
2039 14:47:43.420814 u1DelayCellOfst[14]=2 cells (2 PI)
2040 14:47:43.420955 u1DelayCellOfst[15]=6 cells (5 PI)
2041 14:47:43.421097 Byte1, DQ PI dly=978, DQM PI dly= 981
2042 14:47:43.421238 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2043 14:47:43.421382
2044 14:47:43.421537 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2045 14:47:43.421682
2046 14:47:43.421824 Write Rank1 MR14 =0x20
2047 14:47:43.421967
2048 14:47:43.422111 Final TX Range 0 Vref 32
2049 14:47:43.422227
2050 14:47:43.422340 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2051 14:47:43.422455
2052 14:47:43.422568 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2053 14:47:43.422684 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2054 14:47:43.422800 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2055 14:47:43.422914 Write Rank1 MR3 =0xb0
2056 14:47:43.423029 DramC Write-DBI on
2057 14:47:43.423144 ==
2058 14:47:43.423258 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2059 14:47:43.423374 fsp= 1, odt_onoff= 1, Byte mode= 0
2060 14:47:43.423575 ==
2061 14:47:43.423757 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2062 14:47:43.423954
2063 14:47:43.424150 Begin, DQ Scan Range 701~765
2064 14:47:43.424324
2065 14:47:43.424490
2066 14:47:43.424653 TX Vref Scan disable
2067 14:47:43.424817 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2068 14:47:43.425020 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2069 14:47:43.425233 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2070 14:47:43.425436 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2071 14:47:43.425661 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2072 14:47:43.425874 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2073 14:47:43.426080 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2074 14:47:43.426294 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2075 14:47:43.426501 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2076 14:47:43.426709 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2077 14:47:43.426922 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2078 14:47:43.427143 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2079 14:47:43.427316 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2080 14:47:43.427505 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2081 14:47:43.427618 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2082 14:47:43.427752 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2083 14:47:43.427886 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2084 14:47:43.428005 740 |2 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
2085 14:47:43.428124 Byte0, DQ PI dly=726, DQM PI dly= 726
2086 14:47:43.428260 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2087 14:47:43.428384
2088 14:47:43.428548 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2089 14:47:43.428711
2090 14:47:43.428874 Byte1, DQ PI dly=723, DQM PI dly= 723
2091 14:47:43.429039 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2092 14:47:43.429190
2093 14:47:43.429347 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2094 14:47:43.429499
2095 14:47:43.429659 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2096 14:47:43.429827 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2097 14:47:43.429982 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2098 14:47:43.430142 Write Rank1 MR3 =0x30
2099 14:47:43.430303 DramC Write-DBI off
2100 14:47:43.430470
2101 14:47:43.430600 [DATLAT]
2102 14:47:43.430700 Freq=1600, CH0 RK1, use_rxtx_scan=0
2103 14:47:43.430831
2104 14:47:43.430931 DATLAT Default: 0x10
2105 14:47:43.431087 7, 0xFFFF, sum=0
2106 14:47:43.431252 8, 0xFFFF, sum=0
2107 14:47:43.431415 9, 0xFFFF, sum=0
2108 14:47:43.431551 10, 0xFFFF, sum=0
2109 14:47:43.431655 11, 0xFFFF, sum=0
2110 14:47:43.431789 12, 0xFFFF, sum=0
2111 14:47:43.431890 13, 0xFFFF, sum=0
2112 14:47:43.432060 14, 0x0, sum=1
2113 14:47:43.432204 15, 0x0, sum=2
2114 14:47:43.432340 16, 0x0, sum=3
2115 14:47:43.432479 17, 0x0, sum=4
2116 14:47:43.432620 pattern=2 first_step=14 total pass=5 best_step=16
2117 14:47:43.432753 ==
2118 14:47:43.432894 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2119 14:47:43.433030 fsp= 1, odt_onoff= 1, Byte mode= 0
2120 14:47:43.433167 ==
2121 14:47:43.433531 Start DQ dly to find pass range UseTestEngine =1
2122 14:47:43.433682 x-axis: bit #, y-axis: DQ dly (-127~63)
2123 14:47:43.433821 RX Vref Scan = 0
2124 14:47:43.433965 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2125 14:47:43.434104 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2126 14:47:43.434245 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2127 14:47:43.434385 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2128 14:47:43.434526 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2129 14:47:43.434626 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2130 14:47:43.434728 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2131 14:47:43.434825 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2132 14:47:43.434926 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2133 14:47:43.435022 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2134 14:47:43.435121 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2135 14:47:43.435260 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2136 14:47:43.435399 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2137 14:47:43.435520 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2138 14:47:43.435664 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2139 14:47:43.435804 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2140 14:47:43.435946 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2141 14:47:43.436084 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2142 14:47:43.436224 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2143 14:47:43.436366 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2144 14:47:43.436500 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2145 14:47:43.436640 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2146 14:47:43.436781 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2147 14:47:43.436916 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2148 14:47:43.437073 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2149 14:47:43.437196 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2150 14:47:43.437320 0, [0] xxxoxxxx oxxoxxxx [MSB]
2151 14:47:43.437445 1, [0] xxxoxxxx ooxooxxx [MSB]
2152 14:47:43.437570 2, [0] xxxoxoxx ooxoooox [MSB]
2153 14:47:43.437696 3, [0] xxxoxooo ooxoooox [MSB]
2154 14:47:43.437820 4, [0] xxxoxooo ooxoooox [MSB]
2155 14:47:43.437947 5, [0] xoxooooo ooxoooox [MSB]
2156 14:47:43.438072 6, [0] oooooooo ooxooooo [MSB]
2157 14:47:43.438195 34, [0] oooooooo xooooooo [MSB]
2158 14:47:43.438318 35, [0] oooxoxoo xooxoxoo [MSB]
2159 14:47:43.438440 36, [0] oooxoxoo xooxoxoo [MSB]
2160 14:47:43.438562 37, [0] oooxoxxo xxoxoxoo [MSB]
2161 14:47:43.438684 38, [0] oooxoxxo xxoxxxoo [MSB]
2162 14:47:43.438805 39, [0] oxxxxxxx xxoxxxxx [MSB]
2163 14:47:43.438928 40, [0] oxxxxxxx xxoxxxxx [MSB]
2164 14:47:43.439054 41, [0] xxxxxxxx xxoxxxxx [MSB]
2165 14:47:43.439181 42, [0] xxxxxxxx xxoxxxxx [MSB]
2166 14:47:43.439308 43, [0] xxxxxxxx xxoxxxxx [MSB]
2167 14:47:43.439446 44, [0] xxxxxxxx xxxxxxxx [MSB]
2168 14:47:43.439571 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2169 14:47:43.439700 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2170 14:47:43.439803 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2171 14:47:43.439927 iDelay=44, Bit 3, Center 16 (-2 ~ 34) 37
2172 14:47:43.440053 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
2173 14:47:43.440177 iDelay=44, Bit 5, Center 18 (2 ~ 34) 33
2174 14:47:43.440302 iDelay=44, Bit 6, Center 19 (3 ~ 36) 34
2175 14:47:43.440427 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2176 14:47:43.440561 iDelay=44, Bit 8, Center 15 (-2 ~ 33) 36
2177 14:47:43.440678 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2178 14:47:43.440802 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2179 14:47:43.440918 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2180 14:47:43.441031 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2181 14:47:43.441144 iDelay=44, Bit 13, Center 18 (2 ~ 34) 33
2182 14:47:43.441256 iDelay=44, Bit 14, Center 20 (2 ~ 38) 37
2183 14:47:43.441369 iDelay=44, Bit 15, Center 22 (6 ~ 38) 33
2184 14:47:43.441480 ==
2185 14:47:43.441594 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2186 14:47:43.441707 fsp= 1, odt_onoff= 1, Byte mode= 0
2187 14:47:43.441820 ==
2188 14:47:43.441931 DQS Delay:
2189 14:47:43.442055 DQS0 = 0, DQS1 = 0
2190 14:47:43.442155 DQM Delay:
2191 14:47:43.442254 DQM0 = 20, DQM1 = 19
2192 14:47:43.442354 DQ Delay:
2193 14:47:43.442453 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
2194 14:47:43.442554 DQ4 =21, DQ5 =18, DQ6 =19, DQ7 =20
2195 14:47:43.442654 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2196 14:47:43.442758 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2197 14:47:43.442858
2198 14:47:43.442957
2199 14:47:43.443055
2200 14:47:43.443155 [DramC_TX_OE_Calibration] TA2
2201 14:47:43.443255 Original DQ_B0 (3 6) =30, OEN = 27
2202 14:47:43.443356 Original DQ_B1 (3 6) =30, OEN = 27
2203 14:47:43.443450 23, 0x0, End_B0=23 End_B1=23
2204 14:47:43.443518 24, 0x0, End_B0=24 End_B1=24
2205 14:47:43.443585 25, 0x0, End_B0=25 End_B1=25
2206 14:47:43.443650 26, 0x0, End_B0=26 End_B1=26
2207 14:47:43.443716 27, 0x0, End_B0=27 End_B1=27
2208 14:47:43.443791 28, 0x0, End_B0=28 End_B1=28
2209 14:47:43.443859 29, 0x0, End_B0=29 End_B1=29
2210 14:47:43.443924 30, 0x0, End_B0=30 End_B1=30
2211 14:47:43.443989 31, 0xFFFF, End_B0=30 End_B1=30
2212 14:47:43.444054 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2213 14:47:43.444119 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2214 14:47:43.444183
2215 14:47:43.444246
2216 14:47:43.444310 Write Rank1 MR23 =0x3f
2217 14:47:43.444374 [DQSOSC]
2218 14:47:43.444437 [DQSOSCAuto] RK1, (LSB)MR18= 0xdbdb, (MSB)MR19= 0x202, tDQSOscB0 = 430 ps tDQSOscB1 = 430 ps
2219 14:47:43.444503 CH0_RK1: MR19=0x202, MR18=0xDBDB, DQSOSC=430, MR23=63, INC=13, DEC=19
2220 14:47:43.444568 Write Rank1 MR23 =0x3f
2221 14:47:43.444631 [DQSOSC]
2222 14:47:43.444710 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2223 14:47:43.444778 CH0 RK1: MR19=202, MR18=D9D9
2224 14:47:43.444843 [RxdqsGatingPostProcess] freq 1600
2225 14:47:43.444927 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2226 14:47:43.444996 Rank: 0
2227 14:47:43.445061 best DQS0 dly(2T, 0.5T) = (2, 5)
2228 14:47:43.445126 best DQS1 dly(2T, 0.5T) = (2, 5)
2229 14:47:43.445190 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2230 14:47:43.447101 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2231 14:47:43.450757 Rank: 1
2232 14:47:43.453715 best DQS0 dly(2T, 0.5T) = (2, 6)
2233 14:47:43.453805 best DQS1 dly(2T, 0.5T) = (2, 6)
2234 14:47:43.457148 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2235 14:47:43.460793 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2236 14:47:43.466962 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2237 14:47:43.471076 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2238 14:47:43.473992 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2239 14:47:43.478038 Write Rank0 MR13 =0x59
2240 14:47:43.478202 ==
2241 14:47:43.480832 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2242 14:47:43.484468 fsp= 1, odt_onoff= 1, Byte mode= 0
2243 14:47:43.484607 ==
2244 14:47:43.487233 === u2Vref_new: 0x56 --> 0x3a
2245 14:47:43.490466 === u2Vref_new: 0x58 --> 0x58
2246 14:47:43.494040 === u2Vref_new: 0x5a --> 0x5a
2247 14:47:43.497231 === u2Vref_new: 0x5c --> 0x78
2248 14:47:43.500872 === u2Vref_new: 0x5e --> 0x7a
2249 14:47:43.504030 === u2Vref_new: 0x60 --> 0x90
2250 14:47:43.507687 [CA 0] Center 37 (12~63) winsize 52
2251 14:47:43.510754 [CA 1] Center 37 (11~63) winsize 53
2252 14:47:43.514251 [CA 2] Center 34 (6~63) winsize 58
2253 14:47:43.517768 [CA 3] Center 34 (6~63) winsize 58
2254 14:47:43.521447 [CA 4] Center 34 (6~63) winsize 58
2255 14:47:43.524081 [CA 5] Center 28 (-2~58) winsize 61
2256 14:47:43.524347
2257 14:47:43.527807 [CATrainingPosCal] consider 1 rank data
2258 14:47:43.531029 u2DelayCellTimex100 = 735/100 ps
2259 14:47:43.535009 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2260 14:47:43.538370 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2261 14:47:43.541782 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2262 14:47:43.544366 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2263 14:47:43.548311 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2264 14:47:43.551753 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2265 14:47:43.552315
2266 14:47:43.554573 CA PerBit enable=1, Macro0, CA PI delay=28
2267 14:47:43.557825 === u2Vref_new: 0x60 --> 0x90
2268 14:47:43.558239
2269 14:47:43.561308 Vref(ca) range 1: 32
2270 14:47:43.561872
2271 14:47:43.562210 CS Dly= 11 (42-0-32)
2272 14:47:43.564861 Write Rank0 MR13 =0xd8
2273 14:47:43.568022 Write Rank0 MR13 =0xd8
2274 14:47:43.568532 Write Rank0 MR12 =0x60
2275 14:47:43.570791 Write Rank1 MR13 =0x59
2276 14:47:43.571230 ==
2277 14:47:43.578125 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2278 14:47:43.578639 fsp= 1, odt_onoff= 1, Byte mode= 0
2279 14:47:43.581148 ==
2280 14:47:43.581657 === u2Vref_new: 0x56 --> 0x3a
2281 14:47:43.584320 === u2Vref_new: 0x58 --> 0x58
2282 14:47:43.587808 === u2Vref_new: 0x5a --> 0x5a
2283 14:47:43.591301 === u2Vref_new: 0x5c --> 0x78
2284 14:47:43.594735 === u2Vref_new: 0x5e --> 0x7a
2285 14:47:43.597854 === u2Vref_new: 0x60 --> 0x90
2286 14:47:43.601522 [CA 0] Center 37 (12~63) winsize 52
2287 14:47:43.604680 [CA 1] Center 37 (12~63) winsize 52
2288 14:47:43.608129 [CA 2] Center 34 (6~63) winsize 58
2289 14:47:43.611089 [CA 3] Center 34 (6~63) winsize 58
2290 14:47:43.615340 [CA 4] Center 34 (6~63) winsize 58
2291 14:47:43.618219 [CA 5] Center 27 (-2~57) winsize 60
2292 14:47:43.618732
2293 14:47:43.621014 [CATrainingPosCal] consider 2 rank data
2294 14:47:43.624430 u2DelayCellTimex100 = 735/100 ps
2295 14:47:43.628072 CA0 delay=37 (12~63),Diff = 10 PI (13 cell)
2296 14:47:43.631511 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2297 14:47:43.634635 CA2 delay=34 (6~63),Diff = 7 PI (9 cell)
2298 14:47:43.638202 CA3 delay=34 (6~63),Diff = 7 PI (9 cell)
2299 14:47:43.641401 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2300 14:47:43.644405 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2301 14:47:43.644835
2302 14:47:43.651317 CA PerBit enable=1, Macro0, CA PI delay=27
2303 14:47:43.652071 === u2Vref_new: 0x60 --> 0x90
2304 14:47:43.652793
2305 14:47:43.654813 Vref(ca) range 1: 32
2306 14:47:43.655222
2307 14:47:43.657986 CS Dly= 10 (41-0-32)
2308 14:47:43.658397 Write Rank1 MR13 =0xd8
2309 14:47:43.661476 Write Rank1 MR13 =0xd8
2310 14:47:43.661986 Write Rank1 MR12 =0x60
2311 14:47:43.668004 [RankSwap] Rank num 2, (Multi 1), Rank 0
2312 14:47:43.668415 Write Rank0 MR2 =0xad
2313 14:47:43.671526 [Write Leveling]
2314 14:47:43.674626 delay byte0 byte1 byte2 byte3
2315 14:47:43.675037
2316 14:47:43.675356 10 0 0
2317 14:47:43.675710 11 0 0
2318 14:47:43.677897 12 0 0
2319 14:47:43.678234 13 0 0
2320 14:47:43.682175 14 0 0
2321 14:47:43.682689 15 0 0
2322 14:47:43.683020 16 0 0
2323 14:47:43.685183 17 0 0
2324 14:47:43.685613 18 0 0
2325 14:47:43.688649 19 0 0
2326 14:47:43.689064 20 0 0
2327 14:47:43.689389 21 0 0
2328 14:47:43.691509 22 0 0
2329 14:47:43.691938 23 0 0
2330 14:47:43.694916 24 0 ff
2331 14:47:43.695468 25 0 ff
2332 14:47:43.698230 26 0 ff
2333 14:47:43.698643 27 0 ff
2334 14:47:43.701850 28 0 ff
2335 14:47:43.702406 29 0 ff
2336 14:47:43.702786 30 0 ff
2337 14:47:43.705144 31 0 ff
2338 14:47:43.705565 32 0 ff
2339 14:47:43.708422 33 0 ff
2340 14:47:43.708839 34 ff ff
2341 14:47:43.711916 35 ff ff
2342 14:47:43.712331 36 ff ff
2343 14:47:43.715559 37 ff ff
2344 14:47:43.716069 38 ff ff
2345 14:47:43.716403 39 ff ff
2346 14:47:43.718302 40 ff ff
2347 14:47:43.721897 pass bytecount = 0xff (0xff: all bytes pass)
2348 14:47:43.722400
2349 14:47:43.725373 DQS0 dly: 34
2350 14:47:43.725869 DQS1 dly: 24
2351 14:47:43.728449 Write Rank0 MR2 =0x2d
2352 14:47:43.732092 [RankSwap] Rank num 2, (Multi 1), Rank 0
2353 14:47:43.732596 Write Rank0 MR1 =0xd6
2354 14:47:43.732918 [Gating]
2355 14:47:43.735286 ==
2356 14:47:43.738634 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2357 14:47:43.741994 fsp= 1, odt_onoff= 1, Byte mode= 0
2358 14:47:43.742499 ==
2359 14:47:43.745149 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2360 14:47:43.751568 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2361 14:47:43.755160 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2362 14:47:43.758338 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2363 14:47:43.765413 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2364 14:47:43.768525 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2365 14:47:43.771965 [Byte 1] Lead/lag falling Transition (3, 1, 20)
2366 14:47:43.775434 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2367 14:47:43.781888 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2368 14:47:43.785313 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2369 14:47:43.788744 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2370 14:47:43.795654 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2371 14:47:43.798235 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2372 14:47:43.802120 3 2 16 |706 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2373 14:47:43.808203 3 2 20 |3e3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2374 14:47:43.811743 [Byte 1] Lead/lag Transition tap number (9)
2375 14:47:43.815387 3 2 24 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2376 14:47:43.818715 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2377 14:47:43.825303 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2378 14:47:43.828212 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2379 14:47:43.831945 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2380 14:47:43.838842 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2381 14:47:43.842112 3 3 16 |3333 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2382 14:47:43.845559 3 3 20 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2383 14:47:43.851968 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2384 14:47:43.854799 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2385 14:47:43.858338 [Byte 0] Lead/lag falling Transition (3, 3, 28)
2386 14:47:43.861834 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2387 14:47:43.868609 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2388 14:47:43.871842 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2389 14:47:43.875048 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2390 14:47:43.881725 3 4 16 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2391 14:47:43.884962 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2392 14:47:43.888199 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2393 14:47:43.891725 3 4 28 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 14:47:43.898897 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 14:47:43.902166 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 14:47:43.905372 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 14:47:43.912487 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 14:47:43.915556 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 14:47:43.918617 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 14:47:43.925497 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 14:47:43.928609 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 14:47:43.932051 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 14:47:43.938652 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 14:47:43.941940 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2405 14:47:43.944971 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2406 14:47:43.948595 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2407 14:47:43.954751 [Byte 0] Lead/lag Transition tap number (2)
2408 14:47:43.958198 3 6 16 |d0c 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2409 14:47:43.961473 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2410 14:47:43.965541 3 6 20 |1010 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2411 14:47:43.971294 [Byte 1] Lead/lag Transition tap number (2)
2412 14:47:43.975301 3 6 24 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2413 14:47:43.978732 [Byte 0]First pass (3, 6, 24)
2414 14:47:43.981358 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 14:47:43.985087 [Byte 1]First pass (3, 6, 28)
2416 14:47:43.988317 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 14:47:43.991630 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2418 14:47:43.994758 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 14:47:43.998585 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 14:47:44.005088 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 14:47:44.008268 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2422 14:47:44.011701 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2423 14:47:44.015561 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2424 14:47:44.018772 All bytes gating window > 1UI, Early break!
2425 14:47:44.021340
2426 14:47:44.024984 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2427 14:47:44.025508
2428 14:47:44.028277 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2429 14:47:44.028792
2430 14:47:44.029120
2431 14:47:44.029424
2432 14:47:44.031738 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2433 14:47:44.032354
2434 14:47:44.035281 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2435 14:47:44.035854
2436 14:47:44.036187
2437 14:47:44.037938 Write Rank0 MR1 =0x56
2438 14:47:44.038353
2439 14:47:44.042191 best RODT dly(2T, 0.5T) = (2, 3)
2440 14:47:44.042715
2441 14:47:44.044830 best RODT dly(2T, 0.5T) = (2, 3)
2442 14:47:44.045247 ==
2443 14:47:44.048458 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2444 14:47:44.051822 fsp= 1, odt_onoff= 1, Byte mode= 0
2445 14:47:44.054604 ==
2446 14:47:44.058167 Start DQ dly to find pass range UseTestEngine =0
2447 14:47:44.061389 x-axis: bit #, y-axis: DQ dly (-127~63)
2448 14:47:44.061807 RX Vref Scan = 0
2449 14:47:44.064629 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2450 14:47:44.068038 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2451 14:47:44.071491 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2452 14:47:44.075108 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2453 14:47:44.077979 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2454 14:47:44.081380 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2455 14:47:44.084538 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2456 14:47:44.085066 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2457 14:47:44.088327 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2458 14:47:44.091342 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2459 14:47:44.094551 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2460 14:47:44.098354 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2461 14:47:44.101632 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2462 14:47:44.105054 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2463 14:47:44.108307 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2464 14:47:44.108743 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2465 14:47:44.111630 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2466 14:47:44.114622 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2467 14:47:44.118096 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2468 14:47:44.121695 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2469 14:47:44.124647 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2470 14:47:44.127713 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2471 14:47:44.131596 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2472 14:47:44.132118 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2473 14:47:44.134481 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2474 14:47:44.137950 -1, [0] xxxxxxxx xoxxxxxo [MSB]
2475 14:47:44.141391 0, [0] xxxoxxxx ooxxxxxo [MSB]
2476 14:47:44.144638 1, [0] xxooxxxx ooxxxxxo [MSB]
2477 14:47:44.148247 2, [0] xxooxxxx oooxxxxo [MSB]
2478 14:47:44.148785 3, [0] xxooxxxo oooxxxxo [MSB]
2479 14:47:44.151058 4, [0] oooooxxo oooxooxo [MSB]
2480 14:47:44.153908 5, [0] oooooxoo ooooooxo [MSB]
2481 14:47:44.157645 6, [0] oooooooo ooooooxo [MSB]
2482 14:47:44.161308 32, [0] oooooooo ooooooox [MSB]
2483 14:47:44.164381 33, [0] oooooooo ooooooox [MSB]
2484 14:47:44.167536 34, [0] oooooooo ooooooox [MSB]
2485 14:47:44.167959 35, [0] oooxoooo xxooooox [MSB]
2486 14:47:44.171268 36, [0] oooxoooo xxooooox [MSB]
2487 14:47:44.174435 37, [0] ooxxoooo xxooooox [MSB]
2488 14:47:44.177704 38, [0] ooxxoooo xxooooox [MSB]
2489 14:47:44.180930 39, [0] ooxxooox xxooooox [MSB]
2490 14:47:44.184153 40, [0] oxxxxoox xxxoooox [MSB]
2491 14:47:44.184579 41, [0] oxxxxoox xxxxxxox [MSB]
2492 14:47:44.187399 42, [0] xxxxxxxx xxxxxxxx [MSB]
2493 14:47:44.190809 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
2494 14:47:44.194377 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2495 14:47:44.200858 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2496 14:47:44.204196 iDelay=42, Bit 3, Center 17 (0 ~ 34) 35
2497 14:47:44.207531 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2498 14:47:44.211818 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2499 14:47:44.214563 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2500 14:47:44.218066 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2501 14:47:44.221427 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2502 14:47:44.223967 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2503 14:47:44.227951 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
2504 14:47:44.230909 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2505 14:47:44.234277 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2506 14:47:44.237669 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2507 14:47:44.241327 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
2508 14:47:44.244379 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2509 14:47:44.247499 ==
2510 14:47:44.251258 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2511 14:47:44.254221 fsp= 1, odt_onoff= 1, Byte mode= 0
2512 14:47:44.254671 ==
2513 14:47:44.255000 DQS Delay:
2514 14:47:44.257759 DQS0 = 0, DQS1 = 0
2515 14:47:44.258201 DQM Delay:
2516 14:47:44.261239 DQM0 = 20, DQM1 = 19
2517 14:47:44.261755 DQ Delay:
2518 14:47:44.264671 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =17
2519 14:47:44.267864 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2520 14:47:44.271383 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2521 14:47:44.274663 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2522 14:47:44.275184
2523 14:47:44.275566
2524 14:47:44.277544 DramC Write-DBI off
2525 14:47:44.278073 ==
2526 14:47:44.280706 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2527 14:47:44.284343 fsp= 1, odt_onoff= 1, Byte mode= 0
2528 14:47:44.284862 ==
2529 14:47:44.290849 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2530 14:47:44.291383
2531 14:47:44.291763 Begin, DQ Scan Range 920~1176
2532 14:47:44.292077
2533 14:47:44.292370
2534 14:47:44.294097 TX Vref Scan disable
2535 14:47:44.297269 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2536 14:47:44.300722 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2537 14:47:44.304026 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2538 14:47:44.307592 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2539 14:47:44.310780 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2540 14:47:44.314055 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2541 14:47:44.320245 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2542 14:47:44.324126 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2543 14:47:44.327859 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2544 14:47:44.330817 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2545 14:47:44.334175 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2546 14:47:44.337575 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2547 14:47:44.340599 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2548 14:47:44.344306 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2549 14:47:44.347324 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2550 14:47:44.350369 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2551 14:47:44.353642 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2552 14:47:44.357003 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2553 14:47:44.360330 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2554 14:47:44.363369 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2555 14:47:44.366874 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2556 14:47:44.370275 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2557 14:47:44.377132 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2558 14:47:44.380464 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2559 14:47:44.383778 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2560 14:47:44.387033 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2561 14:47:44.390404 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2562 14:47:44.393710 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2563 14:47:44.397164 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2564 14:47:44.400493 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2565 14:47:44.403454 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2566 14:47:44.406662 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2567 14:47:44.410248 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2568 14:47:44.413769 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2569 14:47:44.416952 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2570 14:47:44.420378 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2571 14:47:44.423559 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2572 14:47:44.430140 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2573 14:47:44.433572 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2574 14:47:44.437069 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2575 14:47:44.440082 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2576 14:47:44.443562 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2577 14:47:44.446961 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2578 14:47:44.450279 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2579 14:47:44.453389 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2580 14:47:44.456811 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2581 14:47:44.459948 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2582 14:47:44.463609 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2583 14:47:44.466783 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2584 14:47:44.470268 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2585 14:47:44.473910 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2586 14:47:44.477109 971 |3 6 11|[0] xxxxxxxx oooxxxoo [MSB]
2587 14:47:44.480290 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2588 14:47:44.483748 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2589 14:47:44.486490 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2590 14:47:44.489881 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2591 14:47:44.493873 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2592 14:47:44.499900 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2593 14:47:44.503355 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2594 14:47:44.506697 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2595 14:47:44.510090 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2596 14:47:44.513607 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2597 14:47:44.516696 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2598 14:47:44.519838 983 |3 6 23|[0] oooooxoo oooooooo [MSB]
2599 14:47:44.523202 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2600 14:47:44.526605 987 |3 6 27|[0] oooooooo oxooooox [MSB]
2601 14:47:44.529921 988 |3 6 28|[0] oooooooo xxooooox [MSB]
2602 14:47:44.533466 989 |3 6 29|[0] oooooooo xxxoxxxx [MSB]
2603 14:47:44.536445 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2604 14:47:44.539854 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2605 14:47:44.543764 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2606 14:47:44.547045 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2607 14:47:44.553505 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2608 14:47:44.556430 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2609 14:47:44.560066 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2610 14:47:44.563690 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2611 14:47:44.566337 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2612 14:47:44.569562 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2613 14:47:44.573383 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2614 14:47:44.577037 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2615 14:47:44.580075 1002 |3 6 42|[0] ooxxooox xxxxxxxx [MSB]
2616 14:47:44.583559 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2617 14:47:44.586592 Byte0, DQ PI dly=991, DQM PI dly= 991
2618 14:47:44.593205 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2619 14:47:44.593761
2620 14:47:44.596315 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2621 14:47:44.596763
2622 14:47:44.599868 Byte1, DQ PI dly=979, DQM PI dly= 979
2623 14:47:44.603766 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2624 14:47:44.604289
2625 14:47:44.610137 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2626 14:47:44.610662
2627 14:47:44.610997 ==
2628 14:47:44.613185 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2629 14:47:44.616576 fsp= 1, odt_onoff= 1, Byte mode= 0
2630 14:47:44.617096 ==
2631 14:47:44.620017 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2632 14:47:44.623340
2633 14:47:44.623899 Begin, DQ Scan Range 955~1019
2634 14:47:44.626502 Write Rank0 MR14 =0x0
2635 14:47:44.635054
2636 14:47:44.635609 CH=1, VrefRange= 0, VrefLevel = 0
2637 14:47:44.641961 TX Bit0 (984~1000) 17 992, Bit8 (973~984) 12 978,
2638 14:47:44.645315 TX Bit1 (984~997) 14 990, Bit9 (973~983) 11 978,
2639 14:47:44.651629 TX Bit2 (983~997) 15 990, Bit10 (975~986) 12 980,
2640 14:47:44.655167 TX Bit3 (981~993) 13 987, Bit11 (976~986) 11 981,
2641 14:47:44.658366 TX Bit4 (984~999) 16 991, Bit12 (975~986) 12 980,
2642 14:47:44.665083 TX Bit5 (985~998) 14 991, Bit13 (977~987) 11 982,
2643 14:47:44.668230 TX Bit6 (984~998) 15 991, Bit14 (975~986) 12 980,
2644 14:47:44.671952 TX Bit7 (984~998) 15 991, Bit15 (970~980) 11 975,
2645 14:47:44.672375
2646 14:47:44.674902 Write Rank0 MR14 =0x2
2647 14:47:44.684756
2648 14:47:44.685292 CH=1, VrefRange= 0, VrefLevel = 2
2649 14:47:44.691592 TX Bit0 (984~1001) 18 992, Bit8 (971~984) 14 977,
2650 14:47:44.694301 TX Bit1 (984~998) 15 991, Bit9 (973~983) 11 978,
2651 14:47:44.700995 TX Bit2 (982~998) 17 990, Bit10 (974~986) 13 980,
2652 14:47:44.704682 TX Bit3 (981~994) 14 987, Bit11 (976~987) 12 981,
2653 14:47:44.707827 TX Bit4 (983~999) 17 991, Bit12 (974~987) 14 980,
2654 14:47:44.714688 TX Bit5 (985~999) 15 992, Bit13 (976~988) 13 982,
2655 14:47:44.717634 TX Bit6 (984~998) 15 991, Bit14 (975~987) 13 981,
2656 14:47:44.724126 TX Bit7 (984~998) 15 991, Bit15 (969~980) 12 974,
2657 14:47:44.724654
2658 14:47:44.724987 Write Rank0 MR14 =0x4
2659 14:47:44.733789
2660 14:47:44.734312 CH=1, VrefRange= 0, VrefLevel = 4
2661 14:47:44.740362 TX Bit0 (984~1001) 18 992, Bit8 (971~985) 15 978,
2662 14:47:44.743762 TX Bit1 (983~998) 16 990, Bit9 (972~984) 13 978,
2663 14:47:44.750424 TX Bit2 (982~998) 17 990, Bit10 (974~987) 14 980,
2664 14:47:44.753477 TX Bit3 (979~995) 17 987, Bit11 (975~988) 14 981,
2665 14:47:44.756716 TX Bit4 (983~1000) 18 991, Bit12 (974~988) 15 981,
2666 14:47:44.763465 TX Bit5 (985~1000) 16 992, Bit13 (976~989) 14 982,
2667 14:47:44.766710 TX Bit6 (984~999) 16 991, Bit14 (975~987) 13 981,
2668 14:47:44.770198 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2669 14:47:44.773504
2670 14:47:44.774021 Write Rank0 MR14 =0x6
2671 14:47:44.783095
2672 14:47:44.783657 CH=1, VrefRange= 0, VrefLevel = 6
2673 14:47:44.790265 TX Bit0 (984~1002) 19 993, Bit8 (971~985) 15 978,
2674 14:47:44.793070 TX Bit1 (983~999) 17 991, Bit9 (972~984) 13 978,
2675 14:47:44.799785 TX Bit2 (981~998) 18 989, Bit10 (974~988) 15 981,
2676 14:47:44.802993 TX Bit3 (979~996) 18 987, Bit11 (975~989) 15 982,
2677 14:47:44.806697 TX Bit4 (983~1000) 18 991, Bit12 (974~989) 16 981,
2678 14:47:44.813398 TX Bit5 (985~1000) 16 992, Bit13 (976~990) 15 983,
2679 14:47:44.816312 TX Bit6 (984~999) 16 991, Bit14 (974~989) 16 981,
2680 14:47:44.823048 TX Bit7 (983~999) 17 991, Bit15 (969~983) 15 976,
2681 14:47:44.823615
2682 14:47:44.823949 Write Rank0 MR14 =0x8
2683 14:47:44.833431
2684 14:47:44.833994 CH=1, VrefRange= 0, VrefLevel = 8
2685 14:47:44.839920 TX Bit0 (983~1002) 20 992, Bit8 (970~985) 16 977,
2686 14:47:44.843317 TX Bit1 (982~999) 18 990, Bit9 (971~984) 14 977,
2687 14:47:44.849403 TX Bit2 (980~999) 20 989, Bit10 (973~989) 17 981,
2688 14:47:44.852671 TX Bit3 (979~997) 19 988, Bit11 (974~990) 17 982,
2689 14:47:44.855869 TX Bit4 (982~1000) 19 991, Bit12 (974~990) 17 982,
2690 14:47:44.862478 TX Bit5 (985~1001) 17 993, Bit13 (975~990) 16 982,
2691 14:47:44.866067 TX Bit6 (983~1000) 18 991, Bit14 (973~990) 18 981,
2692 14:47:44.872779 TX Bit7 (983~999) 17 991, Bit15 (968~984) 17 976,
2693 14:47:44.873290
2694 14:47:44.873618 Write Rank0 MR14 =0xa
2695 14:47:44.883283
2696 14:47:44.886408 CH=1, VrefRange= 0, VrefLevel = 10
2697 14:47:44.889659 TX Bit0 (984~1003) 20 993, Bit8 (970~986) 17 978,
2698 14:47:44.892738 TX Bit1 (982~1000) 19 991, Bit9 (970~985) 16 977,
2699 14:47:44.899282 TX Bit2 (980~1000) 21 990, Bit10 (972~989) 18 980,
2700 14:47:44.902698 TX Bit3 (978~997) 20 987, Bit11 (974~990) 17 982,
2701 14:47:44.905846 TX Bit4 (982~1001) 20 991, Bit12 (974~991) 18 982,
2702 14:47:44.913189 TX Bit5 (984~1001) 18 992, Bit13 (975~991) 17 983,
2703 14:47:44.916311 TX Bit6 (983~1001) 19 992, Bit14 (973~991) 19 982,
2704 14:47:44.923089 TX Bit7 (983~1000) 18 991, Bit15 (968~984) 17 976,
2705 14:47:44.923656
2706 14:47:44.923996 Write Rank0 MR14 =0xc
2707 14:47:44.932937
2708 14:47:44.936197 CH=1, VrefRange= 0, VrefLevel = 12
2709 14:47:44.939772 TX Bit0 (983~1004) 22 993, Bit8 (971~987) 17 979,
2710 14:47:44.943294 TX Bit1 (982~1000) 19 991, Bit9 (970~985) 16 977,
2711 14:47:44.950151 TX Bit2 (980~1000) 21 990, Bit10 (973~990) 18 981,
2712 14:47:44.953234 TX Bit3 (978~998) 21 988, Bit11 (975~991) 17 983,
2713 14:47:44.956664 TX Bit4 (982~1002) 21 992, Bit12 (972~991) 20 981,
2714 14:47:44.962798 TX Bit5 (984~1002) 19 993, Bit13 (975~991) 17 983,
2715 14:47:44.966297 TX Bit6 (983~1001) 19 992, Bit14 (972~992) 21 982,
2716 14:47:44.972728 TX Bit7 (982~1000) 19 991, Bit15 (968~984) 17 976,
2717 14:47:44.973242
2718 14:47:44.973573 Write Rank0 MR14 =0xe
2719 14:47:44.983496
2720 14:47:44.987011 CH=1, VrefRange= 0, VrefLevel = 14
2721 14:47:44.990541 TX Bit0 (983~1004) 22 993, Bit8 (970~987) 18 978,
2722 14:47:44.993037 TX Bit1 (982~1001) 20 991, Bit9 (970~986) 17 978,
2723 14:47:44.999866 TX Bit2 (979~1000) 22 989, Bit10 (971~991) 21 981,
2724 14:47:45.003619 TX Bit3 (978~998) 21 988, Bit11 (973~991) 19 982,
2725 14:47:45.006472 TX Bit4 (981~1002) 22 991, Bit12 (972~992) 21 982,
2726 14:47:45.013423 TX Bit5 (983~1003) 21 993, Bit13 (975~991) 17 983,
2727 14:47:45.016600 TX Bit6 (982~1002) 21 992, Bit14 (972~992) 21 982,
2728 14:47:45.022992 TX Bit7 (982~1001) 20 991, Bit15 (968~985) 18 976,
2729 14:47:45.023591
2730 14:47:45.024019 Write Rank0 MR14 =0x10
2731 14:47:45.034381
2732 14:47:45.035078 CH=1, VrefRange= 0, VrefLevel = 16
2733 14:47:45.040784 TX Bit0 (983~1005) 23 994, Bit8 (969~988) 20 978,
2734 14:47:45.044296 TX Bit1 (981~1002) 22 991, Bit9 (970~986) 17 978,
2735 14:47:45.050626 TX Bit2 (979~1001) 23 990, Bit10 (971~991) 21 981,
2736 14:47:45.053503 TX Bit3 (978~999) 22 988, Bit11 (973~992) 20 982,
2737 14:47:45.056868 TX Bit4 (981~1003) 23 992, Bit12 (972~992) 21 982,
2738 14:47:45.063676 TX Bit5 (983~1003) 21 993, Bit13 (974~992) 19 983,
2739 14:47:45.067200 TX Bit6 (982~1002) 21 992, Bit14 (972~992) 21 982,
2740 14:47:45.073660 TX Bit7 (982~1002) 21 992, Bit15 (967~985) 19 976,
2741 14:47:45.074233
2742 14:47:45.074570 Write Rank0 MR14 =0x12
2743 14:47:45.084429
2744 14:47:45.088463 CH=1, VrefRange= 0, VrefLevel = 18
2745 14:47:45.090946 TX Bit0 (982~1005) 24 993, Bit8 (969~988) 20 978,
2746 14:47:45.094804 TX Bit1 (980~1002) 23 991, Bit9 (970~987) 18 978,
2747 14:47:45.101112 TX Bit2 (979~1002) 24 990, Bit10 (971~991) 21 981,
2748 14:47:45.104635 TX Bit3 (978~999) 22 988, Bit11 (973~992) 20 982,
2749 14:47:45.107904 TX Bit4 (980~1003) 24 991, Bit12 (972~993) 22 982,
2750 14:47:45.114317 TX Bit5 (983~1004) 22 993, Bit13 (974~992) 19 983,
2751 14:47:45.117874 TX Bit6 (981~1003) 23 992, Bit14 (971~992) 22 981,
2752 14:47:45.124342 TX Bit7 (981~1002) 22 991, Bit15 (967~986) 20 976,
2753 14:47:45.124875
2754 14:47:45.125211 Write Rank0 MR14 =0x14
2755 14:47:45.135647
2756 14:47:45.136160 CH=1, VrefRange= 0, VrefLevel = 20
2757 14:47:45.142199 TX Bit0 (982~1006) 25 994, Bit8 (969~989) 21 979,
2758 14:47:45.145729 TX Bit1 (980~1003) 24 991, Bit9 (970~987) 18 978,
2759 14:47:45.152500 TX Bit2 (979~1002) 24 990, Bit10 (971~992) 22 981,
2760 14:47:45.155848 TX Bit3 (978~999) 22 988, Bit11 (972~992) 21 982,
2761 14:47:45.158771 TX Bit4 (980~1004) 25 992, Bit12 (971~993) 23 982,
2762 14:47:45.165534 TX Bit5 (983~1005) 23 994, Bit13 (974~992) 19 983,
2763 14:47:45.169008 TX Bit6 (980~1003) 24 991, Bit14 (971~993) 23 982,
2764 14:47:45.175716 TX Bit7 (980~1003) 24 991, Bit15 (967~986) 20 976,
2765 14:47:45.176246
2766 14:47:45.176583 Write Rank0 MR14 =0x16
2767 14:47:45.186330
2768 14:47:45.189271 CH=1, VrefRange= 0, VrefLevel = 22
2769 14:47:45.192916 TX Bit0 (982~1006) 25 994, Bit8 (969~990) 22 979,
2770 14:47:45.196547 TX Bit1 (979~1004) 26 991, Bit9 (969~988) 20 978,
2771 14:47:45.202885 TX Bit2 (978~1002) 25 990, Bit10 (970~992) 23 981,
2772 14:47:45.206593 TX Bit3 (977~1000) 24 988, Bit11 (971~992) 22 981,
2773 14:47:45.209871 TX Bit4 (980~1004) 25 992, Bit12 (971~993) 23 982,
2774 14:47:45.216277 TX Bit5 (982~1005) 24 993, Bit13 (972~992) 21 982,
2775 14:47:45.219776 TX Bit6 (980~1004) 25 992, Bit14 (971~993) 23 982,
2776 14:47:45.226270 TX Bit7 (981~1004) 24 992, Bit15 (967~987) 21 977,
2777 14:47:45.226809
2778 14:47:45.227144 Write Rank0 MR14 =0x18
2779 14:47:45.237115
2780 14:47:45.240307 CH=1, VrefRange= 0, VrefLevel = 24
2781 14:47:45.243982 TX Bit0 (981~1006) 26 993, Bit8 (969~991) 23 980,
2782 14:47:45.246699 TX Bit1 (979~1004) 26 991, Bit9 (969~989) 21 979,
2783 14:47:45.253499 TX Bit2 (978~1003) 26 990, Bit10 (970~992) 23 981,
2784 14:47:45.256562 TX Bit3 (977~1000) 24 988, Bit11 (971~993) 23 982,
2785 14:47:45.260209 TX Bit4 (980~1005) 26 992, Bit12 (970~994) 25 982,
2786 14:47:45.266797 TX Bit5 (982~1006) 25 994, Bit13 (972~993) 22 982,
2787 14:47:45.270103 TX Bit6 (980~1005) 26 992, Bit14 (970~993) 24 981,
2788 14:47:45.276904 TX Bit7 (980~1003) 24 991, Bit15 (966~987) 22 976,
2789 14:47:45.277325
2790 14:47:45.277651 Write Rank0 MR14 =0x1a
2791 14:47:45.287508
2792 14:47:45.290982 CH=1, VrefRange= 0, VrefLevel = 26
2793 14:47:45.294158 TX Bit0 (981~1006) 26 993, Bit8 (968~991) 24 979,
2794 14:47:45.297341 TX Bit1 (979~1005) 27 992, Bit9 (969~989) 21 979,
2795 14:47:45.304471 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2796 14:47:45.307676 TX Bit3 (977~1000) 24 988, Bit11 (971~993) 23 982,
2797 14:47:45.310804 TX Bit4 (979~1006) 28 992, Bit12 (971~994) 24 982,
2798 14:47:45.317607 TX Bit5 (982~1006) 25 994, Bit13 (972~993) 22 982,
2799 14:47:45.321295 TX Bit6 (980~1005) 26 992, Bit14 (970~994) 25 982,
2800 14:47:45.327752 TX Bit7 (980~1005) 26 992, Bit15 (966~988) 23 977,
2801 14:47:45.328172
2802 14:47:45.328499 Write Rank0 MR14 =0x1c
2803 14:47:45.338392
2804 14:47:45.341652 CH=1, VrefRange= 0, VrefLevel = 28
2805 14:47:45.344881 TX Bit0 (981~1007) 27 994, Bit8 (968~991) 24 979,
2806 14:47:45.348170 TX Bit1 (979~1005) 27 992, Bit9 (969~990) 22 979,
2807 14:47:45.354728 TX Bit2 (978~1004) 27 991, Bit10 (970~993) 24 981,
2808 14:47:45.357842 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2809 14:47:45.361232 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2810 14:47:45.367905 TX Bit5 (981~1006) 26 993, Bit13 (972~994) 23 983,
2811 14:47:45.371068 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2812 14:47:45.377586 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2813 14:47:45.377679
2814 14:47:45.377750 Write Rank0 MR14 =0x1e
2815 14:47:45.389202
2816 14:47:45.392795 CH=1, VrefRange= 0, VrefLevel = 30
2817 14:47:45.395721 TX Bit0 (981~1007) 27 994, Bit8 (968~992) 25 980,
2818 14:47:45.398984 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2819 14:47:45.405868 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2820 14:47:45.408905 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2821 14:47:45.412973 TX Bit4 (980~1006) 27 993, Bit12 (970~994) 25 982,
2822 14:47:45.418939 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2823 14:47:45.422554 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2824 14:47:45.429226 TX Bit7 (979~1006) 28 992, Bit15 (965~988) 24 976,
2825 14:47:45.429357
2826 14:47:45.429464 Write Rank0 MR14 =0x20
2827 14:47:45.440170
2828 14:47:45.443178 CH=1, VrefRange= 0, VrefLevel = 32
2829 14:47:45.446840 TX Bit0 (981~1007) 27 994, Bit8 (968~992) 25 980,
2830 14:47:45.450133 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2831 14:47:45.456881 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2832 14:47:45.459736 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2833 14:47:45.463278 TX Bit4 (980~1006) 27 993, Bit12 (970~994) 25 982,
2834 14:47:45.469937 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2835 14:47:45.473082 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2836 14:47:45.479991 TX Bit7 (979~1006) 28 992, Bit15 (965~988) 24 976,
2837 14:47:45.480085
2838 14:47:45.480156 Write Rank0 MR14 =0x22
2839 14:47:45.490839
2840 14:47:45.494408 CH=1, VrefRange= 0, VrefLevel = 34
2841 14:47:45.497659 TX Bit0 (981~1007) 27 994, Bit8 (968~992) 25 980,
2842 14:47:45.501001 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2843 14:47:45.507289 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2844 14:47:45.510617 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2845 14:47:45.513965 TX Bit4 (980~1006) 27 993, Bit12 (970~994) 25 982,
2846 14:47:45.521034 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2847 14:47:45.523996 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2848 14:47:45.531172 TX Bit7 (979~1006) 28 992, Bit15 (965~988) 24 976,
2849 14:47:45.531268
2850 14:47:45.531340 Write Rank0 MR14 =0x24
2851 14:47:45.541656
2852 14:47:45.544953 CH=1, VrefRange= 0, VrefLevel = 36
2853 14:47:45.548428 TX Bit0 (981~1007) 27 994, Bit8 (968~992) 25 980,
2854 14:47:45.551895 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2855 14:47:45.558255 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2856 14:47:45.561494 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2857 14:47:45.564993 TX Bit4 (980~1006) 27 993, Bit12 (970~994) 25 982,
2858 14:47:45.571585 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2859 14:47:45.574822 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2860 14:47:45.581490 TX Bit7 (979~1006) 28 992, Bit15 (965~988) 24 976,
2861 14:47:45.581582
2862 14:47:45.581654 Write Rank0 MR14 =0x26
2863 14:47:45.592683
2864 14:47:45.595979 CH=1, VrefRange= 0, VrefLevel = 38
2865 14:47:45.599202 TX Bit0 (981~1007) 27 994, Bit8 (968~992) 25 980,
2866 14:47:45.602486 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2867 14:47:45.609356 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2868 14:47:45.612672 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2869 14:47:45.616077 TX Bit4 (980~1006) 27 993, Bit12 (970~994) 25 982,
2870 14:47:45.622410 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2871 14:47:45.625702 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2872 14:47:45.632368 TX Bit7 (979~1006) 28 992, Bit15 (965~988) 24 976,
2873 14:47:45.632460
2874 14:47:45.632531
2875 14:47:45.635842 TX Vref found, early break! 385< 389
2876 14:47:45.639224 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2877 14:47:45.642608 u1DelayCellOfst[0]=6 cells (5 PI)
2878 14:47:45.645925 u1DelayCellOfst[1]=3 cells (3 PI)
2879 14:47:45.648951 u1DelayCellOfst[2]=1 cells (1 PI)
2880 14:47:45.652229 u1DelayCellOfst[3]=0 cells (0 PI)
2881 14:47:45.655644 u1DelayCellOfst[4]=5 cells (4 PI)
2882 14:47:45.659123 u1DelayCellOfst[5]=5 cells (4 PI)
2883 14:47:45.659213 u1DelayCellOfst[6]=3 cells (3 PI)
2884 14:47:45.662433 u1DelayCellOfst[7]=3 cells (3 PI)
2885 14:47:45.665717 Byte0, DQ PI dly=989, DQM PI dly= 991
2886 14:47:45.672589 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2887 14:47:45.672681
2888 14:47:45.675755 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2889 14:47:45.675846
2890 14:47:45.679218 u1DelayCellOfst[8]=5 cells (4 PI)
2891 14:47:45.682433 u1DelayCellOfst[9]=3 cells (3 PI)
2892 14:47:45.685782 u1DelayCellOfst[10]=6 cells (5 PI)
2893 14:47:45.689143 u1DelayCellOfst[11]=7 cells (6 PI)
2894 14:47:45.692263 u1DelayCellOfst[12]=7 cells (6 PI)
2895 14:47:45.695441 u1DelayCellOfst[13]=7 cells (6 PI)
2896 14:47:45.698994 u1DelayCellOfst[14]=6 cells (5 PI)
2897 14:47:45.702278 u1DelayCellOfst[15]=0 cells (0 PI)
2898 14:47:45.705325 Byte1, DQ PI dly=976, DQM PI dly= 979
2899 14:47:45.708674 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2900 14:47:45.708766
2901 14:47:45.711970 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2902 14:47:45.712061
2903 14:47:45.715468 Write Rank0 MR14 =0x1e
2904 14:47:45.715559
2905 14:47:45.718632 Final TX Range 0 Vref 30
2906 14:47:45.718722
2907 14:47:45.725370 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2908 14:47:45.725462
2909 14:47:45.731855 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2910 14:47:45.738452 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2911 14:47:45.745242 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2912 14:47:45.745333 Write Rank0 MR3 =0xb0
2913 14:47:45.748687 DramC Write-DBI on
2914 14:47:45.748777 ==
2915 14:47:45.755181 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2916 14:47:45.758468 fsp= 1, odt_onoff= 1, Byte mode= 0
2917 14:47:45.758552 ==
2918 14:47:45.761984 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2919 14:47:45.762068
2920 14:47:45.765078 Begin, DQ Scan Range 699~763
2921 14:47:45.765169
2922 14:47:45.765242
2923 14:47:45.765309 TX Vref Scan disable
2924 14:47:45.771311 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2925 14:47:45.775092 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2926 14:47:45.778604 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2927 14:47:45.781399 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2928 14:47:45.784741 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2929 14:47:45.788041 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2930 14:47:45.791488 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2931 14:47:45.794723 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2932 14:47:45.797891 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2933 14:47:45.801642 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2934 14:47:45.804642 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2935 14:47:45.808165 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2936 14:47:45.811641 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2937 14:47:45.814801 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2938 14:47:45.818236 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2939 14:47:45.821669 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2940 14:47:45.824694 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2941 14:47:45.828308 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2942 14:47:45.831628 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2943 14:47:45.834982 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2944 14:47:45.841785 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2945 14:47:45.844538 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2946 14:47:45.847987 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2947 14:47:45.851339 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2948 14:47:45.854958 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2949 14:47:45.858240 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2950 14:47:45.864624 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2951 14:47:45.867965 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2952 14:47:45.871274 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2953 14:47:45.874584 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2954 14:47:45.878029 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2955 14:47:45.881353 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2956 14:47:45.884445 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2957 14:47:45.887894 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2958 14:47:45.891651 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2959 14:47:45.894704 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2960 14:47:45.898521 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2961 14:47:45.902090 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2962 14:47:45.904966 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2963 14:47:45.908225 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2964 14:47:45.911565 Byte0, DQ PI dly=737, DQM PI dly= 737
2965 14:47:45.918146 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2966 14:47:45.918374
2967 14:47:45.921820 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2968 14:47:45.922062
2969 14:47:45.924945 Byte1, DQ PI dly=724, DQM PI dly= 724
2970 14:47:45.928764 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2971 14:47:45.929036
2972 14:47:45.935413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2973 14:47:45.935726
2974 14:47:45.942078 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2975 14:47:45.948396 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2976 14:47:45.955271 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2977 14:47:45.955832 Write Rank0 MR3 =0x30
2978 14:47:45.958391 DramC Write-DBI off
2979 14:47:45.958821
2980 14:47:45.959153 [DATLAT]
2981 14:47:45.962110 Freq=1600, CH1 RK0, use_rxtx_scan=0
2982 14:47:45.962525
2983 14:47:45.964800 DATLAT Default: 0xf
2984 14:47:45.965217 7, 0xFFFF, sum=0
2985 14:47:45.968550 8, 0xFFFF, sum=0
2986 14:47:45.968976 9, 0xFFFF, sum=0
2987 14:47:45.971587 10, 0xFFFF, sum=0
2988 14:47:45.972012 11, 0xFFFF, sum=0
2989 14:47:45.975199 12, 0xFFFF, sum=0
2990 14:47:45.975666 13, 0xFFFF, sum=0
2991 14:47:45.978477 14, 0x0, sum=1
2992 14:47:45.978995 15, 0x0, sum=2
2993 14:47:45.981832 16, 0x0, sum=3
2994 14:47:45.982258 17, 0x0, sum=4
2995 14:47:45.984706 pattern=2 first_step=14 total pass=5 best_step=16
2996 14:47:45.985127 ==
2997 14:47:45.991543 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2998 14:47:45.994901 fsp= 1, odt_onoff= 1, Byte mode= 0
2999 14:47:45.995322 ==
3000 14:47:45.998203 Start DQ dly to find pass range UseTestEngine =1
3001 14:47:46.001978 x-axis: bit #, y-axis: DQ dly (-127~63)
3002 14:47:46.004909 RX Vref Scan = 1
3003 14:47:46.111292
3004 14:47:46.112018 RX Vref found, early break!
3005 14:47:46.112415
3006 14:47:46.117925 Final RX Vref 11, apply to both rank0 and 1
3007 14:47:46.118400 ==
3008 14:47:46.121777 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3009 14:47:46.124405 fsp= 1, odt_onoff= 1, Byte mode= 0
3010 14:47:46.124921 ==
3011 14:47:46.125256 DQS Delay:
3012 14:47:46.128015 DQS0 = 0, DQS1 = 0
3013 14:47:46.128523 DQM Delay:
3014 14:47:46.131257 DQM0 = 20, DQM1 = 19
3015 14:47:46.131697 DQ Delay:
3016 14:47:46.134212 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =17
3017 14:47:46.138122 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3018 14:47:46.141061 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3019 14:47:46.144434 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
3020 14:47:46.144957
3021 14:47:46.145289
3022 14:47:46.145594
3023 14:47:46.147591 [DramC_TX_OE_Calibration] TA2
3024 14:47:46.150771 Original DQ_B0 (3 6) =30, OEN = 27
3025 14:47:46.154200 Original DQ_B1 (3 6) =30, OEN = 27
3026 14:47:46.157433 23, 0x0, End_B0=23 End_B1=23
3027 14:47:46.157860 24, 0x0, End_B0=24 End_B1=24
3028 14:47:46.160817 25, 0x0, End_B0=25 End_B1=25
3029 14:47:46.164112 26, 0x0, End_B0=26 End_B1=26
3030 14:47:46.167696 27, 0x0, End_B0=27 End_B1=27
3031 14:47:46.171000 28, 0x0, End_B0=28 End_B1=28
3032 14:47:46.171563 29, 0x0, End_B0=29 End_B1=29
3033 14:47:46.174226 30, 0x0, End_B0=30 End_B1=30
3034 14:47:46.177573 31, 0xFFFF, End_B0=30 End_B1=30
3035 14:47:46.184364 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3036 14:47:46.187972 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3037 14:47:46.188389
3038 14:47:46.188716
3039 14:47:46.191330 Write Rank0 MR23 =0x3f
3040 14:47:46.191776 [DQSOSC]
3041 14:47:46.201253 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3042 14:47:46.207824 CH1_RK0: MR19=0x202, MR18=0xC2C2, DQSOSC=446, MR23=63, INC=12, DEC=18
3043 14:47:46.208353 Write Rank0 MR23 =0x3f
3044 14:47:46.208694 [DQSOSC]
3045 14:47:46.217441 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3046 14:47:46.220744 CH1 RK0: MR19=202, MR18=BEBE
3047 14:47:46.224573 [RankSwap] Rank num 2, (Multi 1), Rank 1
3048 14:47:46.225103 Write Rank0 MR2 =0xad
3049 14:47:46.227544 [Write Leveling]
3050 14:47:46.230945 delay byte0 byte1 byte2 byte3
3051 14:47:46.231564
3052 14:47:46.231913 10 0 0
3053 14:47:46.234435 11 0 0
3054 14:47:46.234985 12 0 0
3055 14:47:46.235325 13 0 0
3056 14:47:46.237422 14 0 0
3057 14:47:46.237848 15 0 0
3058 14:47:46.240948 16 0 0
3059 14:47:46.241377 17 0 0
3060 14:47:46.244181 18 0 0
3061 14:47:46.244608 19 0 0
3062 14:47:46.244942 20 0 0
3063 14:47:46.247513 21 0 0
3064 14:47:46.248039 22 0 0
3065 14:47:46.250465 23 0 0
3066 14:47:46.250903 24 0 0
3067 14:47:46.251233 25 0 ff
3068 14:47:46.254032 26 0 ff
3069 14:47:46.254566 27 0 ff
3070 14:47:46.257094 28 0 ff
3071 14:47:46.257521 29 0 ff
3072 14:47:46.260427 30 0 ff
3073 14:47:46.260853 31 0 ff
3074 14:47:46.263928 32 0 ff
3075 14:47:46.264356 33 0 ff
3076 14:47:46.264694 34 ff ff
3077 14:47:46.267150 35 ff ff
3078 14:47:46.267620 36 ff ff
3079 14:47:46.270558 37 ff ff
3080 14:47:46.271089 38 ff ff
3081 14:47:46.274076 39 ff ff
3082 14:47:46.274608 40 ff ff
3083 14:47:46.277159 pass bytecount = 0xff (0xff: all bytes pass)
3084 14:47:46.280796
3085 14:47:46.281385 DQS0 dly: 34
3086 14:47:46.281852 DQS1 dly: 25
3087 14:47:46.283946 Write Rank0 MR2 =0x2d
3088 14:47:46.287194 [RankSwap] Rank num 2, (Multi 1), Rank 0
3089 14:47:46.290779 Write Rank1 MR1 =0xd6
3090 14:47:46.291298 [Gating]
3091 14:47:46.291688 ==
3092 14:47:46.293850 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3093 14:47:46.297427 fsp= 1, odt_onoff= 1, Byte mode= 0
3094 14:47:46.297851 ==
3095 14:47:46.303766 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3096 14:47:46.307216 3 1 4 |3636 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3097 14:47:46.310238 3 1 8 |3535 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3098 14:47:46.317215 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3099 14:47:46.320015 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3100 14:47:46.323375 3 1 20 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3101 14:47:46.330369 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3102 14:47:46.333490 3 1 28 |3535 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3103 14:47:46.336935 3 2 0 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3104 14:47:46.340569 3 2 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3105 14:47:46.346857 3 2 8 |3c3b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3106 14:47:46.350525 3 2 12 |c0c 1110 |(11 11)(11 1) |(1 1)(0 0)| 0
3107 14:47:46.353897 3 2 16 |3d3d 606 |(0 0)(11 11) |(1 1)(0 0)| 0
3108 14:47:46.360051 3 2 20 |3c3c 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3109 14:47:46.363473 3 2 24 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3110 14:47:46.366879 3 2 28 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3111 14:47:46.370238 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3112 14:47:46.377148 3 3 4 |605 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3113 14:47:46.379995 3 3 8 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3114 14:47:46.383510 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3115 14:47:46.390029 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3116 14:47:46.393329 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3117 14:47:46.396584 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3118 14:47:46.399909 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3119 14:47:46.406907 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3120 14:47:46.410557 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3121 14:47:46.413825 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3122 14:47:46.420108 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3123 14:47:46.423759 3 4 12 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3124 14:47:46.426685 3 4 16 |3d3d 4d4e |(11 11)(11 11) |(1 1)(1 1)| 0
3125 14:47:46.433476 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3126 14:47:46.437060 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3127 14:47:46.439965 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3128 14:47:46.447116 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3129 14:47:46.449575 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3130 14:47:46.453069 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3131 14:47:46.459819 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3132 14:47:46.463094 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3133 14:47:46.466421 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3134 14:47:46.473111 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3135 14:47:46.476212 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3136 14:47:46.479532 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3137 14:47:46.482746 [Byte 0] Lead/lag Transition tap number (2)
3138 14:47:46.489390 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3139 14:47:46.492977 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3140 14:47:46.496184 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3141 14:47:46.499871 3 6 8 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3142 14:47:46.506432 [Byte 1] Lead/lag Transition tap number (2)
3143 14:47:46.510125 3 6 12 |4646 1010 |(0 0)(11 11) |(0 0)(0 0)| 0
3144 14:47:46.512574 [Byte 0]First pass (3, 6, 12)
3145 14:47:46.515859 3 6 16 |4646 605 |(0 0)(11 11) |(0 0)(0 0)| 0
3146 14:47:46.519396 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3147 14:47:46.522566 [Byte 1]First pass (3, 6, 20)
3148 14:47:46.525940 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3149 14:47:46.529269 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3150 14:47:46.535956 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3151 14:47:46.539443 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3152 14:47:46.542844 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3153 14:47:46.545872 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3154 14:47:46.549577 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3155 14:47:46.556229 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3156 14:47:46.559708 All bytes gating window > 1UI, Early break!
3157 14:47:46.560006
3158 14:47:46.562933 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3159 14:47:46.563230
3160 14:47:46.566549 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3161 14:47:46.567027
3162 14:47:46.567275
3163 14:47:46.567546
3164 14:47:46.569284 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3165 14:47:46.569579
3166 14:47:46.572531 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3167 14:47:46.576183
3168 14:47:46.576478
3169 14:47:46.576712 Write Rank1 MR1 =0x56
3170 14:47:46.576932
3171 14:47:46.579656 best RODT dly(2T, 0.5T) = (2, 2)
3172 14:47:46.579950
3173 14:47:46.582899 best RODT dly(2T, 0.5T) = (2, 3)
3174 14:47:46.583291 ==
3175 14:47:46.589303 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3176 14:47:46.593159 fsp= 1, odt_onoff= 1, Byte mode= 0
3177 14:47:46.593643 ==
3178 14:47:46.596404 Start DQ dly to find pass range UseTestEngine =0
3179 14:47:46.599276 x-axis: bit #, y-axis: DQ dly (-127~63)
3180 14:47:46.599728 RX Vref Scan = 0
3181 14:47:46.602844 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3182 14:47:46.606278 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3183 14:47:46.609646 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3184 14:47:46.612899 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3185 14:47:46.616051 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3186 14:47:46.619346 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3187 14:47:46.622520 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3188 14:47:46.625806 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3189 14:47:46.626390 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3190 14:47:46.629211 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3191 14:47:46.632585 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3192 14:47:46.636045 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3193 14:47:46.639585 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3194 14:47:46.642929 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3195 14:47:46.646241 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3196 14:47:46.649616 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3197 14:47:46.650150 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3198 14:47:46.652605 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3199 14:47:46.655827 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3200 14:47:46.659862 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3201 14:47:46.662687 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3202 14:47:46.666337 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3203 14:47:46.669129 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3204 14:47:46.669556 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3205 14:47:46.672573 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3206 14:47:46.675722 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3207 14:47:46.679290 0, [0] xxooxxxx xoxxxxxo [MSB]
3208 14:47:46.682475 1, [0] xxooxxxx ooxxxxxo [MSB]
3209 14:47:46.685989 2, [0] xxooxxxx ooxxxxxo [MSB]
3210 14:47:46.689670 3, [0] xxooxxxo oooxxxxo [MSB]
3211 14:47:46.690205 4, [0] oooooxoo ooooooxo [MSB]
3212 14:47:46.692648 5, [0] oooooxoo ooooooxo [MSB]
3213 14:47:46.695974 32, [0] oooooooo ooooooox [MSB]
3214 14:47:46.699454 33, [0] oooooooo ooooooox [MSB]
3215 14:47:46.702365 34, [0] oooooooo ooooooox [MSB]
3216 14:47:46.706447 35, [0] oooxoooo oxooooox [MSB]
3217 14:47:46.706970 36, [0] oooxoooo xxooooox [MSB]
3218 14:47:46.708943 37, [0] ooxxoooo xxooooox [MSB]
3219 14:47:46.712563 38, [0] ooxxoooo xxooooox [MSB]
3220 14:47:46.715854 39, [0] oxxxxoox xxooooox [MSB]
3221 14:47:46.719285 40, [0] oxxxxoox xxxoooox [MSB]
3222 14:47:46.722412 41, [0] oxxxxoox xxxxxoox [MSB]
3223 14:47:46.726073 42, [0] xxxxxxxx xxxxxxxx [MSB]
3224 14:47:46.729152 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3225 14:47:46.732156 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
3226 14:47:46.735753 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3227 14:47:46.739070 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3228 14:47:46.742743 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3229 14:47:46.746588 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3230 14:47:46.749038 iDelay=42, Bit 6, Center 22 (4 ~ 41) 38
3231 14:47:46.752326 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3232 14:47:46.755732 iDelay=42, Bit 8, Center 18 (1 ~ 35) 35
3233 14:47:46.758811 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3234 14:47:46.762189 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3235 14:47:46.769006 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3236 14:47:46.772233 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3237 14:47:46.775509 iDelay=42, Bit 13, Center 22 (4 ~ 41) 38
3238 14:47:46.778679 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3239 14:47:46.782065 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3240 14:47:46.782482 ==
3241 14:47:46.785513 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3242 14:47:46.788644 fsp= 1, odt_onoff= 1, Byte mode= 0
3243 14:47:46.789064 ==
3244 14:47:46.791942 DQS Delay:
3245 14:47:46.792465 DQS0 = 0, DQS1 = 0
3246 14:47:46.795697 DQM Delay:
3247 14:47:46.796209 DQM0 = 20, DQM1 = 19
3248 14:47:46.798490 DQ Delay:
3249 14:47:46.798912 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3250 14:47:46.802172 DQ4 =21, DQ5 =23, DQ6 =22, DQ7 =20
3251 14:47:46.805570 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =22
3252 14:47:46.809041 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3253 14:47:46.809569
3254 14:47:46.809901
3255 14:47:46.812305 DramC Write-DBI off
3256 14:47:46.812727 ==
3257 14:47:46.819507 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3258 14:47:46.822434 fsp= 1, odt_onoff= 1, Byte mode= 0
3259 14:47:46.823012 ==
3260 14:47:46.825734 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3261 14:47:46.826279
3262 14:47:46.828769 Begin, DQ Scan Range 921~1177
3263 14:47:46.829233
3264 14:47:46.829593
3265 14:47:46.832342 TX Vref Scan disable
3266 14:47:46.835733 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3267 14:47:46.838945 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3268 14:47:46.841682 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3269 14:47:46.844937 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3270 14:47:46.848809 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3271 14:47:46.851977 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3272 14:47:46.855580 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3273 14:47:46.858722 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3274 14:47:46.861744 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3275 14:47:46.864917 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3276 14:47:46.868187 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3277 14:47:46.871500 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3278 14:47:46.874885 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3279 14:47:46.878483 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3280 14:47:46.882043 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3281 14:47:46.888400 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3282 14:47:46.891504 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3283 14:47:46.895044 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3284 14:47:46.898459 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3285 14:47:46.901836 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3286 14:47:46.905389 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3287 14:47:46.908246 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3288 14:47:46.911646 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3289 14:47:46.915397 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3290 14:47:46.918617 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3291 14:47:46.921542 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3292 14:47:46.925001 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3293 14:47:46.927874 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3294 14:47:46.931107 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3295 14:47:46.934364 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3296 14:47:46.941169 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3297 14:47:46.945024 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3298 14:47:46.947607 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3299 14:47:46.951874 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3300 14:47:46.954392 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3301 14:47:46.958086 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3302 14:47:46.961178 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3303 14:47:46.964469 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3304 14:47:46.967848 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3305 14:47:46.971073 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3306 14:47:46.974173 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3307 14:47:46.978125 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3308 14:47:46.981055 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3309 14:47:46.984365 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3310 14:47:46.987724 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3311 14:47:46.990994 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3312 14:47:46.994407 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3313 14:47:46.997670 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3314 14:47:47.001031 969 |3 6 9|[0] xxxxxxxx oxxxxxxo [MSB]
3315 14:47:47.007683 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3316 14:47:47.010838 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
3317 14:47:47.014387 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
3318 14:47:47.017878 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3319 14:47:47.021360 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3320 14:47:47.024243 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3321 14:47:47.027373 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3322 14:47:47.030734 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3323 14:47:47.034325 978 |3 6 18|[0] xxoooxox oooooooo [MSB]
3324 14:47:47.037654 979 |3 6 19|[0] xoooooox oooooooo [MSB]
3325 14:47:47.041135 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3326 14:47:47.047171 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3327 14:47:47.050835 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3328 14:47:47.054556 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3329 14:47:47.057338 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3330 14:47:47.060452 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3331 14:47:47.063969 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3332 14:47:47.067263 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3333 14:47:47.070867 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3334 14:47:47.074001 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3335 14:47:47.077453 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3336 14:47:47.080800 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3337 14:47:47.083748 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3338 14:47:47.087513 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3339 14:47:47.090578 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3340 14:47:47.094117 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3341 14:47:47.097239 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3342 14:47:47.100476 Byte0, DQ PI dly=988, DQM PI dly= 988
3343 14:47:47.107224 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3344 14:47:47.107755
3345 14:47:47.110583 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3346 14:47:47.111023
3347 14:47:47.113651 Byte1, DQ PI dly=978, DQM PI dly= 978
3348 14:47:47.120565 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3349 14:47:47.121006
3350 14:47:47.123851 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3351 14:47:47.124273
3352 14:47:47.124627 ==
3353 14:47:47.130834 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3354 14:47:47.131385 fsp= 1, odt_onoff= 1, Byte mode= 0
3355 14:47:47.134243 ==
3356 14:47:47.137005 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3357 14:47:47.137570
3358 14:47:47.140488 Begin, DQ Scan Range 954~1018
3359 14:47:47.140906 Write Rank1 MR14 =0x0
3360 14:47:47.150285
3361 14:47:47.150374 CH=1, VrefRange= 0, VrefLevel = 0
3362 14:47:47.156661 TX Bit0 (983~998) 16 990, Bit8 (971~985) 15 978,
3363 14:47:47.159935 TX Bit1 (981~996) 16 988, Bit9 (972~984) 13 978,
3364 14:47:47.166783 TX Bit2 (979~993) 15 986, Bit10 (975~986) 12 980,
3365 14:47:47.170106 TX Bit3 (978~990) 13 984, Bit11 (976~987) 12 981,
3366 14:47:47.173286 TX Bit4 (981~995) 15 988, Bit12 (976~986) 11 981,
3367 14:47:47.179711 TX Bit5 (982~998) 17 990, Bit13 (976~988) 13 982,
3368 14:47:47.183440 TX Bit6 (981~997) 17 989, Bit14 (976~985) 10 980,
3369 14:47:47.186648 TX Bit7 (983~994) 12 988, Bit15 (969~979) 11 974,
3370 14:47:47.186898
3371 14:47:47.189909 Write Rank1 MR14 =0x2
3372 14:47:47.198937
3373 14:47:47.199213 CH=1, VrefRange= 0, VrefLevel = 2
3374 14:47:47.205719 TX Bit0 (982~998) 17 990, Bit8 (971~985) 15 978,
3375 14:47:47.209207 TX Bit1 (981~997) 17 989, Bit9 (972~985) 14 978,
3376 14:47:47.215509 TX Bit2 (978~994) 17 986, Bit10 (975~987) 13 981,
3377 14:47:47.219257 TX Bit3 (978~991) 14 984, Bit11 (975~988) 14 981,
3378 14:47:47.222810 TX Bit4 (980~996) 17 988, Bit12 (976~987) 12 981,
3379 14:47:47.228997 TX Bit5 (982~998) 17 990, Bit13 (976~989) 14 982,
3380 14:47:47.232190 TX Bit6 (981~998) 18 989, Bit14 (976~986) 11 981,
3381 14:47:47.235852 TX Bit7 (983~994) 12 988, Bit15 (969~981) 13 975,
3382 14:47:47.239046
3383 14:47:47.239490 Write Rank1 MR14 =0x4
3384 14:47:47.248211
3385 14:47:47.248618 CH=1, VrefRange= 0, VrefLevel = 4
3386 14:47:47.255047 TX Bit0 (982~999) 18 990, Bit8 (970~986) 17 978,
3387 14:47:47.258399 TX Bit1 (980~998) 19 989, Bit9 (971~985) 15 978,
3388 14:47:47.265016 TX Bit2 (978~995) 18 986, Bit10 (975~987) 13 981,
3389 14:47:47.268388 TX Bit3 (977~992) 16 984, Bit11 (975~989) 15 982,
3390 14:47:47.271453 TX Bit4 (980~997) 18 988, Bit12 (975~987) 13 981,
3391 14:47:47.277884 TX Bit5 (981~999) 19 990, Bit13 (975~990) 16 982,
3392 14:47:47.281293 TX Bit6 (980~998) 19 989, Bit14 (975~986) 12 980,
3393 14:47:47.284701 TX Bit7 (983~996) 14 989, Bit15 (969~981) 13 975,
3394 14:47:47.287707
3395 14:47:47.288120 Write Rank1 MR14 =0x6
3396 14:47:47.297482
3397 14:47:47.297896 CH=1, VrefRange= 0, VrefLevel = 6
3398 14:47:47.303851 TX Bit0 (981~999) 19 990, Bit8 (970~986) 17 978,
3399 14:47:47.307315 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3400 14:47:47.314308 TX Bit2 (978~996) 19 987, Bit10 (974~988) 15 981,
3401 14:47:47.317230 TX Bit3 (977~992) 16 984, Bit11 (975~989) 15 982,
3402 14:47:47.320904 TX Bit4 (979~997) 19 988, Bit12 (975~989) 15 982,
3403 14:47:47.327460 TX Bit5 (981~999) 19 990, Bit13 (975~990) 16 982,
3404 14:47:47.330502 TX Bit6 (980~998) 19 989, Bit14 (974~987) 14 980,
3405 14:47:47.333952 TX Bit7 (982~997) 16 989, Bit15 (969~983) 15 976,
3406 14:47:47.334404
3407 14:47:47.337202 Write Rank1 MR14 =0x8
3408 14:47:47.346607
3409 14:47:47.347171 CH=1, VrefRange= 0, VrefLevel = 8
3410 14:47:47.353445 TX Bit0 (981~999) 19 990, Bit8 (970~986) 17 978,
3411 14:47:47.356164 TX Bit1 (979~998) 20 988, Bit9 (971~986) 16 978,
3412 14:47:47.363212 TX Bit2 (978~997) 20 987, Bit10 (973~988) 16 980,
3413 14:47:47.366270 TX Bit3 (977~993) 17 985, Bit11 (974~991) 18 982,
3414 14:47:47.369823 TX Bit4 (979~998) 20 988, Bit12 (975~989) 15 982,
3415 14:47:47.376585 TX Bit5 (981~999) 19 990, Bit13 (975~991) 17 983,
3416 14:47:47.379518 TX Bit6 (980~999) 20 989, Bit14 (974~988) 15 981,
3417 14:47:47.383006 TX Bit7 (982~998) 17 990, Bit15 (968~984) 17 976,
3418 14:47:47.383450
3419 14:47:47.386186 Write Rank1 MR14 =0xa
3420 14:47:47.395950
3421 14:47:47.396341 CH=1, VrefRange= 0, VrefLevel = 10
3422 14:47:47.402264 TX Bit0 (980~1000) 21 990, Bit8 (970~987) 18 978,
3423 14:47:47.405896 TX Bit1 (979~999) 21 989, Bit9 (970~986) 17 978,
3424 14:47:47.412595 TX Bit2 (978~997) 20 987, Bit10 (973~989) 17 981,
3425 14:47:47.416001 TX Bit3 (977~994) 18 985, Bit11 (974~991) 18 982,
3426 14:47:47.419296 TX Bit4 (979~999) 21 989, Bit12 (974~990) 17 982,
3427 14:47:47.425918 TX Bit5 (980~1000) 21 990, Bit13 (974~991) 18 982,
3428 14:47:47.428960 TX Bit6 (979~999) 21 989, Bit14 (973~989) 17 981,
3429 14:47:47.432317 TX Bit7 (981~998) 18 989, Bit15 (968~984) 17 976,
3430 14:47:47.432729
3431 14:47:47.435474 Write Rank1 MR14 =0xc
3432 14:47:47.445403
3433 14:47:47.448387 CH=1, VrefRange= 0, VrefLevel = 12
3434 14:47:47.451930 TX Bit0 (980~1001) 22 990, Bit8 (970~988) 19 979,
3435 14:47:47.455654 TX Bit1 (980~999) 20 989, Bit9 (970~987) 18 978,
3436 14:47:47.461910 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
3437 14:47:47.465411 TX Bit3 (977~994) 18 985, Bit11 (973~991) 19 982,
3438 14:47:47.468916 TX Bit4 (978~999) 22 988, Bit12 (973~990) 18 981,
3439 14:47:47.474887 TX Bit5 (980~1000) 21 990, Bit13 (974~992) 19 983,
3440 14:47:47.478182 TX Bit6 (979~999) 21 989, Bit14 (973~990) 18 981,
3441 14:47:47.484993 TX Bit7 (981~999) 19 990, Bit15 (968~984) 17 976,
3442 14:47:47.485444
3443 14:47:47.485797 Write Rank1 MR14 =0xe
3444 14:47:47.495002
3445 14:47:47.498444 CH=1, VrefRange= 0, VrefLevel = 14
3446 14:47:47.501662 TX Bit0 (980~1001) 22 990, Bit8 (970~988) 19 979,
3447 14:47:47.504998 TX Bit1 (979~1000) 22 989, Bit9 (970~988) 19 979,
3448 14:47:47.511967 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
3449 14:47:47.515358 TX Bit3 (977~996) 20 986, Bit11 (973~992) 20 982,
3450 14:47:47.518641 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
3451 14:47:47.524705 TX Bit5 (979~1001) 23 990, Bit13 (974~992) 19 983,
3452 14:47:47.528271 TX Bit6 (979~1000) 22 989, Bit14 (972~991) 20 981,
3453 14:47:47.534513 TX Bit7 (980~999) 20 989, Bit15 (967~985) 19 976,
3454 14:47:47.534901
3455 14:47:47.535294 Write Rank1 MR14 =0x10
3456 14:47:47.545075
3457 14:47:47.545463 CH=1, VrefRange= 0, VrefLevel = 16
3458 14:47:47.551857 TX Bit0 (979~1001) 23 990, Bit8 (969~989) 21 979,
3459 14:47:47.554988 TX Bit1 (978~1000) 23 989, Bit9 (970~987) 18 978,
3460 14:47:47.561515 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
3461 14:47:47.564661 TX Bit3 (977~995) 19 986, Bit11 (973~992) 20 982,
3462 14:47:47.568372 TX Bit4 (978~1000) 23 989, Bit12 (973~992) 20 982,
3463 14:47:47.574716 TX Bit5 (979~1001) 23 990, Bit13 (973~992) 20 982,
3464 14:47:47.578096 TX Bit6 (978~1000) 23 989, Bit14 (972~991) 20 981,
3465 14:47:47.584843 TX Bit7 (980~999) 20 989, Bit15 (967~985) 19 976,
3466 14:47:47.585392
3467 14:47:47.585878 Write Rank1 MR14 =0x12
3468 14:47:47.595006
3469 14:47:47.598195 CH=1, VrefRange= 0, VrefLevel = 18
3470 14:47:47.601918 TX Bit0 (979~1002) 24 990, Bit8 (969~990) 22 979,
3471 14:47:47.605033 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
3472 14:47:47.612001 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
3473 14:47:47.615501 TX Bit3 (976~997) 22 986, Bit11 (972~992) 21 982,
3474 14:47:47.618524 TX Bit4 (978~1000) 23 989, Bit12 (972~992) 21 982,
3475 14:47:47.625257 TX Bit5 (979~1002) 24 990, Bit13 (972~993) 22 982,
3476 14:47:47.628877 TX Bit6 (978~1001) 24 989, Bit14 (971~992) 22 981,
3477 14:47:47.635657 TX Bit7 (979~999) 21 989, Bit15 (967~986) 20 976,
3478 14:47:47.636168
3479 14:47:47.636499 Write Rank1 MR14 =0x14
3480 14:47:47.645506
3481 14:47:47.646011 CH=1, VrefRange= 0, VrefLevel = 20
3482 14:47:47.652391 TX Bit0 (979~1002) 24 990, Bit8 (969~990) 22 979,
3483 14:47:47.655470 TX Bit1 (978~1000) 23 989, Bit9 (970~990) 21 980,
3484 14:47:47.662230 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
3485 14:47:47.665355 TX Bit3 (976~998) 23 987, Bit11 (972~992) 21 982,
3486 14:47:47.668781 TX Bit4 (978~1001) 24 989, Bit12 (972~992) 21 982,
3487 14:47:47.675430 TX Bit5 (978~1002) 25 990, Bit13 (972~992) 21 982,
3488 14:47:47.678385 TX Bit6 (978~1001) 24 989, Bit14 (971~992) 22 981,
3489 14:47:47.685042 TX Bit7 (979~1000) 22 989, Bit15 (967~986) 20 976,
3490 14:47:47.685573
3491 14:47:47.685928 Write Rank1 MR14 =0x16
3492 14:47:47.695642
3493 14:47:47.698959 CH=1, VrefRange= 0, VrefLevel = 22
3494 14:47:47.702589 TX Bit0 (979~1003) 25 991, Bit8 (969~991) 23 980,
3495 14:47:47.705404 TX Bit1 (978~1001) 24 989, Bit9 (969~990) 22 979,
3496 14:47:47.712489 TX Bit2 (977~999) 23 988, Bit10 (970~992) 23 981,
3497 14:47:47.715399 TX Bit3 (975~998) 24 986, Bit11 (971~993) 23 982,
3498 14:47:47.718890 TX Bit4 (978~1001) 24 989, Bit12 (972~992) 21 982,
3499 14:47:47.725886 TX Bit5 (978~1002) 25 990, Bit13 (972~993) 22 982,
3500 14:47:47.729448 TX Bit6 (978~1002) 25 990, Bit14 (971~992) 22 981,
3501 14:47:47.735305 TX Bit7 (979~1000) 22 989, Bit15 (967~987) 21 977,
3502 14:47:47.735735
3503 14:47:47.736071 Write Rank1 MR14 =0x18
3504 14:47:47.745538
3505 14:47:47.749146 CH=1, VrefRange= 0, VrefLevel = 24
3506 14:47:47.752748 TX Bit0 (978~1003) 26 990, Bit8 (969~991) 23 980,
3507 14:47:47.755920 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
3508 14:47:47.762514 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
3509 14:47:47.765498 TX Bit3 (975~998) 24 986, Bit11 (971~993) 23 982,
3510 14:47:47.769242 TX Bit4 (978~1001) 24 989, Bit12 (971~993) 23 982,
3511 14:47:47.775332 TX Bit5 (978~1003) 26 990, Bit13 (972~994) 23 983,
3512 14:47:47.779145 TX Bit6 (978~1002) 25 990, Bit14 (971~992) 22 981,
3513 14:47:47.785571 TX Bit7 (979~1000) 22 989, Bit15 (966~987) 22 976,
3514 14:47:47.785683
3515 14:47:47.785782 Write Rank1 MR14 =0x1a
3516 14:47:47.796550
3517 14:47:47.800013 CH=1, VrefRange= 0, VrefLevel = 26
3518 14:47:47.803604 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3519 14:47:47.806397 TX Bit1 (978~1002) 25 990, Bit9 (969~991) 23 980,
3520 14:47:47.813320 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3521 14:47:47.816683 TX Bit3 (975~998) 24 986, Bit11 (971~994) 24 982,
3522 14:47:47.819745 TX Bit4 (978~1002) 25 990, Bit12 (971~993) 23 982,
3523 14:47:47.826690 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3524 14:47:47.830021 TX Bit6 (978~1002) 25 990, Bit14 (970~993) 24 981,
3525 14:47:47.836472 TX Bit7 (978~1001) 24 989, Bit15 (965~988) 24 976,
3526 14:47:47.836694
3527 14:47:47.836852 Write Rank1 MR14 =0x1c
3528 14:47:47.847115
3529 14:47:47.850429 CH=1, VrefRange= 0, VrefLevel = 28
3530 14:47:47.853874 TX Bit0 (978~1005) 28 991, Bit8 (969~992) 24 980,
3531 14:47:47.857104 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
3532 14:47:47.863751 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3533 14:47:47.867510 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3534 14:47:47.870391 TX Bit4 (978~1003) 26 990, Bit12 (971~993) 23 982,
3535 14:47:47.877209 TX Bit5 (978~1005) 28 991, Bit13 (971~995) 25 983,
3536 14:47:47.880465 TX Bit6 (978~1003) 26 990, Bit14 (970~993) 24 981,
3537 14:47:47.887266 TX Bit7 (978~1002) 25 990, Bit15 (966~988) 23 977,
3538 14:47:47.887381
3539 14:47:47.887479 Write Rank1 MR14 =0x1e
3540 14:47:47.898105
3541 14:47:47.901631 CH=1, VrefRange= 0, VrefLevel = 30
3542 14:47:47.905070 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3543 14:47:47.908001 TX Bit1 (977~1003) 27 990, Bit9 (969~991) 23 980,
3544 14:47:47.914507 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3545 14:47:47.918058 TX Bit3 (974~999) 26 986, Bit11 (970~994) 25 982,
3546 14:47:47.921294 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
3547 14:47:47.928003 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3548 14:47:47.931484 TX Bit6 (977~1004) 28 990, Bit14 (970~993) 24 981,
3549 14:47:47.937862 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3550 14:47:47.937981
3551 14:47:47.938083 Write Rank1 MR14 =0x20
3552 14:47:47.949346
3553 14:47:47.949462 CH=1, VrefRange= 0, VrefLevel = 32
3554 14:47:47.955547 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3555 14:47:47.958864 TX Bit1 (977~1003) 27 990, Bit9 (969~991) 23 980,
3556 14:47:47.965436 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3557 14:47:47.968951 TX Bit3 (974~999) 26 986, Bit11 (970~994) 25 982,
3558 14:47:47.972163 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
3559 14:47:47.978876 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3560 14:47:47.982427 TX Bit6 (977~1004) 28 990, Bit14 (970~993) 24 981,
3561 14:47:47.988882 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3562 14:47:47.989002
3563 14:47:47.989105 Write Rank1 MR14 =0x22
3564 14:47:47.999646
3565 14:47:48.003016 CH=1, VrefRange= 0, VrefLevel = 34
3566 14:47:48.006600 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3567 14:47:48.009627 TX Bit1 (977~1003) 27 990, Bit9 (969~991) 23 980,
3568 14:47:48.016254 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3569 14:47:48.019829 TX Bit3 (974~999) 26 986, Bit11 (970~994) 25 982,
3570 14:47:48.023053 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
3571 14:47:48.029838 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3572 14:47:48.032925 TX Bit6 (977~1004) 28 990, Bit14 (970~993) 24 981,
3573 14:47:48.039743 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3574 14:47:48.039856
3575 14:47:48.039929 Write Rank1 MR14 =0x24
3576 14:47:48.050446
3577 14:47:48.053794 CH=1, VrefRange= 0, VrefLevel = 36
3578 14:47:48.056977 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3579 14:47:48.060516 TX Bit1 (977~1003) 27 990, Bit9 (969~991) 23 980,
3580 14:47:48.067004 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3581 14:47:48.070392 TX Bit3 (974~999) 26 986, Bit11 (970~994) 25 982,
3582 14:47:48.073939 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
3583 14:47:48.080284 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3584 14:47:48.083869 TX Bit6 (977~1004) 28 990, Bit14 (970~993) 24 981,
3585 14:47:48.090329 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3586 14:47:48.090414
3587 14:47:48.090511 Write Rank1 MR14 =0x26
3588 14:47:48.100892
3589 14:47:48.104254 CH=1, VrefRange= 0, VrefLevel = 38
3590 14:47:48.108105 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3591 14:47:48.111729 TX Bit1 (977~1003) 27 990, Bit9 (969~991) 23 980,
3592 14:47:48.118156 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3593 14:47:48.121617 TX Bit3 (974~999) 26 986, Bit11 (970~994) 25 982,
3594 14:47:48.125064 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
3595 14:47:48.131227 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3596 14:47:48.135319 TX Bit6 (977~1004) 28 990, Bit14 (970~993) 24 981,
3597 14:47:48.141705 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3598 14:47:48.142207
3599 14:47:48.142535
3600 14:47:48.144627 TX Vref found, early break! 378< 386
3601 14:47:48.148435 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3602 14:47:48.151227 u1DelayCellOfst[0]=6 cells (5 PI)
3603 14:47:48.154425 u1DelayCellOfst[1]=5 cells (4 PI)
3604 14:47:48.157968 u1DelayCellOfst[2]=2 cells (2 PI)
3605 14:47:48.161488 u1DelayCellOfst[3]=0 cells (0 PI)
3606 14:47:48.164673 u1DelayCellOfst[4]=5 cells (4 PI)
3607 14:47:48.168249 u1DelayCellOfst[5]=6 cells (5 PI)
3608 14:47:48.171280 u1DelayCellOfst[6]=5 cells (4 PI)
3609 14:47:48.171735 u1DelayCellOfst[7]=5 cells (4 PI)
3610 14:47:48.174426 Byte0, DQ PI dly=986, DQM PI dly= 988
3611 14:47:48.181304 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3612 14:47:48.181823
3613 14:47:48.184450 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3614 14:47:48.184868
3615 14:47:48.187865 u1DelayCellOfst[8]=2 cells (2 PI)
3616 14:47:48.191376 u1DelayCellOfst[9]=3 cells (3 PI)
3617 14:47:48.194879 u1DelayCellOfst[10]=5 cells (4 PI)
3618 14:47:48.198106 u1DelayCellOfst[11]=6 cells (5 PI)
3619 14:47:48.200966 u1DelayCellOfst[12]=6 cells (5 PI)
3620 14:47:48.204885 u1DelayCellOfst[13]=6 cells (5 PI)
3621 14:47:48.207805 u1DelayCellOfst[14]=5 cells (4 PI)
3622 14:47:48.211235 u1DelayCellOfst[15]=0 cells (0 PI)
3623 14:47:48.214464 Byte1, DQ PI dly=977, DQM PI dly= 979
3624 14:47:48.218236 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3625 14:47:48.218813
3626 14:47:48.221264 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3627 14:47:48.221682
3628 14:47:48.224656 Write Rank1 MR14 =0x1e
3629 14:47:48.225166
3630 14:47:48.227582 Final TX Range 0 Vref 30
3631 14:47:48.228028
3632 14:47:48.234920 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3633 14:47:48.235472
3634 14:47:48.241309 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3635 14:47:48.247867 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3636 14:47:48.254501 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3637 14:47:48.255052 Write Rank1 MR3 =0xb0
3638 14:47:48.257987 DramC Write-DBI on
3639 14:47:48.258539 ==
3640 14:47:48.260977 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3641 14:47:48.264551 fsp= 1, odt_onoff= 1, Byte mode= 0
3642 14:47:48.268333 ==
3643 14:47:48.270995 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3644 14:47:48.271550
3645 14:47:48.274828 Begin, DQ Scan Range 699~763
3646 14:47:48.275372
3647 14:47:48.275755
3648 14:47:48.276063 TX Vref Scan disable
3649 14:47:48.278195 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3650 14:47:48.281279 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3651 14:47:48.284385 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3652 14:47:48.291460 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3653 14:47:48.294879 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3654 14:47:48.298477 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3655 14:47:48.301708 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3656 14:47:48.304890 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3657 14:47:48.308260 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3658 14:47:48.311487 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3659 14:47:48.314524 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3660 14:47:48.318162 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3661 14:47:48.321104 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3662 14:47:48.324539 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3663 14:47:48.328000 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3664 14:47:48.330889 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3665 14:47:48.334904 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3666 14:47:48.337663 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3667 14:47:48.341195 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3668 14:47:48.344392 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3669 14:47:48.347673 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3670 14:47:48.351065 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3671 14:47:48.357633 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3672 14:47:48.360627 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3673 14:47:48.364286 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3674 14:47:48.367508 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3675 14:47:48.374220 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3676 14:47:48.377184 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3677 14:47:48.380755 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3678 14:47:48.384382 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3679 14:47:48.388056 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3680 14:47:48.390733 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3681 14:47:48.393952 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3682 14:47:48.397581 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3683 14:47:48.401179 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3684 14:47:48.404353 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3685 14:47:48.406927 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3686 14:47:48.410571 Byte0, DQ PI dly=735, DQM PI dly= 735
3687 14:47:48.417133 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3688 14:47:48.417688
3689 14:47:48.420707 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3690 14:47:48.421263
3691 14:47:48.424172 Byte1, DQ PI dly=724, DQM PI dly= 724
3692 14:47:48.427426 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3693 14:47:48.427987
3694 14:47:48.433974 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3695 14:47:48.434532
3696 14:47:48.440211 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3697 14:47:48.446676 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3698 14:47:48.454115 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3699 14:47:48.454666 Write Rank1 MR3 =0x30
3700 14:47:48.456982 DramC Write-DBI off
3701 14:47:48.457438
3702 14:47:48.457796 [DATLAT]
3703 14:47:48.460132 Freq=1600, CH1 RK1, use_rxtx_scan=0
3704 14:47:48.460547
3705 14:47:48.463454 DATLAT Default: 0x10
3706 14:47:48.463873 7, 0xFFFF, sum=0
3707 14:47:48.466516 8, 0xFFFF, sum=0
3708 14:47:48.466939 9, 0xFFFF, sum=0
3709 14:47:48.470293 10, 0xFFFF, sum=0
3710 14:47:48.470828 11, 0xFFFF, sum=0
3711 14:47:48.473180 12, 0xFFFF, sum=0
3712 14:47:48.473622 13, 0xFFFF, sum=0
3713 14:47:48.476668 14, 0x0, sum=1
3714 14:47:48.477088 15, 0x0, sum=2
3715 14:47:48.477418 16, 0x0, sum=3
3716 14:47:48.480160 17, 0x0, sum=4
3717 14:47:48.483586 pattern=2 first_step=14 total pass=5 best_step=16
3718 14:47:48.484113 ==
3719 14:47:48.489952 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3720 14:47:48.493412 fsp= 1, odt_onoff= 1, Byte mode= 0
3721 14:47:48.493930 ==
3722 14:47:48.496994 Start DQ dly to find pass range UseTestEngine =1
3723 14:47:48.500072 x-axis: bit #, y-axis: DQ dly (-127~63)
3724 14:47:48.503784 RX Vref Scan = 0
3725 14:47:48.507227 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3726 14:47:48.507809 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3727 14:47:48.510575 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3728 14:47:48.513283 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3729 14:47:48.516996 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3730 14:47:48.519999 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3731 14:47:48.523614 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3732 14:47:48.526989 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3733 14:47:48.530267 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3734 14:47:48.530787 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3735 14:47:48.533615 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3736 14:47:48.536965 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3737 14:47:48.540091 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3738 14:47:48.543326 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3739 14:47:48.547109 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3740 14:47:48.550324 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3741 14:47:48.553295 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3742 14:47:48.553765 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3743 14:47:48.556481 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3744 14:47:48.560134 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3745 14:47:48.563433 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3746 14:47:48.567044 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3747 14:47:48.570416 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3748 14:47:48.573588 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3749 14:47:48.574009 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3750 14:47:48.576825 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3751 14:47:48.580381 0, [0] xxooxxxx ooxxxxxo [MSB]
3752 14:47:48.583224 1, [0] xxooxxxx ooxxxxxo [MSB]
3753 14:47:48.586604 2, [0] xxooxxxx ooxxxxxo [MSB]
3754 14:47:48.589983 3, [0] xxooxxxo ooxxxxxo [MSB]
3755 14:47:48.590522 4, [0] oooooxxo ooooooxo [MSB]
3756 14:47:48.595340 32, [0] oooooooo ooooooox [MSB]
3757 14:47:48.598934 33, [0] oooooooo ooooooox [MSB]
3758 14:47:48.601790 34, [0] oooooooo ooooooox [MSB]
3759 14:47:48.605417 35, [0] oooxoooo oxooooox [MSB]
3760 14:47:48.608724 36, [0] oooxoooo xxooooox [MSB]
3761 14:47:48.611786 37, [0] ooxxoooo xxooooox [MSB]
3762 14:47:48.612210 38, [0] ooxxoooo xxooooox [MSB]
3763 14:47:48.615304 39, [0] ooxxooox xxxoooox [MSB]
3764 14:47:48.618557 40, [0] oxxxxoox xxxoooox [MSB]
3765 14:47:48.622080 41, [0] xxxxxxox xxxxxxxx [MSB]
3766 14:47:48.625243 42, [0] xxxxxxxx xxxxxxxx [MSB]
3767 14:47:48.628558 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3768 14:47:48.632117 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3769 14:47:48.634972 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3770 14:47:48.638347 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3771 14:47:48.641705 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3772 14:47:48.645115 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3773 14:47:48.648192 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3774 14:47:48.651489 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3775 14:47:48.658372 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3776 14:47:48.661714 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3777 14:47:48.664729 iDelay=42, Bit 10, Center 21 (4 ~ 38) 35
3778 14:47:48.668436 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3779 14:47:48.671813 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3780 14:47:48.674875 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3781 14:47:48.678448 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3782 14:47:48.681597 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3783 14:47:48.682011 ==
3784 14:47:48.688339 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3785 14:47:48.691694 fsp= 1, odt_onoff= 1, Byte mode= 0
3786 14:47:48.692110 ==
3787 14:47:48.692435 DQS Delay:
3788 14:47:48.694992 DQS0 = 0, DQS1 = 0
3789 14:47:48.695432 DQM Delay:
3790 14:47:48.695771 DQM0 = 20, DQM1 = 19
3791 14:47:48.698411 DQ Delay:
3792 14:47:48.701803 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3793 14:47:48.705397 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3794 14:47:48.708347 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3795 14:47:48.711767 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3796 14:47:48.712180
3797 14:47:48.712502
3798 14:47:48.712800
3799 14:47:48.715164 [DramC_TX_OE_Calibration] TA2
3800 14:47:48.718303 Original DQ_B0 (3 6) =30, OEN = 27
3801 14:47:48.718722 Original DQ_B1 (3 6) =30, OEN = 27
3802 14:47:48.721957 23, 0x0, End_B0=23 End_B1=23
3803 14:47:48.725080 24, 0x0, End_B0=24 End_B1=24
3804 14:47:48.727795 25, 0x0, End_B0=25 End_B1=25
3805 14:47:48.731215 26, 0x0, End_B0=26 End_B1=26
3806 14:47:48.731725 27, 0x0, End_B0=27 End_B1=27
3807 14:47:48.734848 28, 0x0, End_B0=28 End_B1=28
3808 14:47:48.738290 29, 0x0, End_B0=29 End_B1=29
3809 14:47:48.741837 30, 0x0, End_B0=30 End_B1=30
3810 14:47:48.745144 31, 0xFFFF, End_B0=30 End_B1=30
3811 14:47:48.747726 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3812 14:47:48.754680 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3813 14:47:48.755185
3814 14:47:48.755545
3815 14:47:48.758053 Write Rank1 MR23 =0x3f
3816 14:47:48.758559 [DQSOSC]
3817 14:47:48.764422 [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3818 14:47:48.771584 CH1_RK1: MR19=0x202, MR18=0xCECE, DQSOSC=438, MR23=63, INC=12, DEC=19
3819 14:47:48.774764 Write Rank1 MR23 =0x3f
3820 14:47:48.775292 [DQSOSC]
3821 14:47:48.781385 [DQSOSCAuto] RK1, (LSB)MR18= 0xcfcf, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3822 14:47:48.784789 CH1 RK1: MR19=202, MR18=CFCF
3823 14:47:48.788402 [RxdqsGatingPostProcess] freq 1600
3824 14:47:48.795027 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3825 14:47:48.795896 Rank: 0
3826 14:47:48.797830 best DQS0 dly(2T, 0.5T) = (2, 6)
3827 14:47:48.800981 best DQS1 dly(2T, 0.5T) = (2, 6)
3828 14:47:48.804825 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3829 14:47:48.807896 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3830 14:47:48.808311 Rank: 1
3831 14:47:48.811182 best DQS0 dly(2T, 0.5T) = (2, 5)
3832 14:47:48.814781 best DQS1 dly(2T, 0.5T) = (2, 6)
3833 14:47:48.818621 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3834 14:47:48.821771 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3835 14:47:48.825286 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3836 14:47:48.827966 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3837 14:47:48.834807 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3838 14:47:48.835223
3839 14:47:48.835591
3840 14:47:48.838256 [Calibration Summary] Freqency 1600
3841 14:47:48.838772 CH 0, Rank 0
3842 14:47:48.839105 All Pass.
3843 14:47:48.839454
3844 14:47:48.841590 CH 0, Rank 1
3845 14:47:48.842124 All Pass.
3846 14:47:48.842451
3847 14:47:48.842754 CH 1, Rank 0
3848 14:47:48.844796 All Pass.
3849 14:47:48.845208
3850 14:47:48.845530 CH 1, Rank 1
3851 14:47:48.845868 All Pass.
3852 14:47:48.846177
3853 14:47:48.851304 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3854 14:47:48.857761 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3855 14:47:48.868176 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3856 14:47:48.868596 Write Rank0 MR3 =0xb0
3857 14:47:48.874475 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3858 14:47:48.881088 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3859 14:47:48.887755 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3860 14:47:48.890679 Write Rank1 MR3 =0xb0
3861 14:47:48.897361 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3862 14:47:48.903641 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3863 14:47:48.910731 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3864 14:47:48.913846 Write Rank0 MR3 =0xb0
3865 14:47:48.920417 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3866 14:47:48.927040 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3867 14:47:48.934080 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3868 14:47:48.936992 Write Rank1 MR3 =0xb0
3869 14:47:48.937459 DramC Write-DBI on
3870 14:47:48.940750 [GetDramInforAfterCalByMRR] Vendor 6.
3871 14:47:48.943947 [GetDramInforAfterCalByMRR] Revision 505.
3872 14:47:48.944496 MR8 1111
3873 14:47:48.950292 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3874 14:47:48.950713 MR8 1111
3875 14:47:48.957343 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3876 14:47:48.957770 MR8 1111
3877 14:47:48.960399 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3878 14:47:48.963605 MR8 1111
3879 14:47:48.967079 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3880 14:47:48.977226 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3881 14:47:48.977739 Write Rank0 MR13 =0xd0
3882 14:47:48.980358 Write Rank1 MR13 =0xd0
3883 14:47:48.983688 Write Rank0 MR13 =0xd0
3884 14:47:48.984109 Write Rank1 MR13 =0xd0
3885 14:47:48.987342 Save calibration result to emmc
3886 14:47:48.987888
3887 14:47:48.988217
3888 14:47:48.990599 [DramcModeReg_Check] Freq_1600, FSP_1
3889 14:47:48.993688 FSP_1, CH_0, RK0
3890 14:47:48.994109 Write Rank0 MR13 =0xd8
3891 14:47:48.996761 MR12 = 0x60 (global = 0x60) match
3892 14:47:48.999672 MR14 = 0x1c (global = 0x1c) match
3893 14:47:49.003472 FSP_1, CH_0, RK1
3894 14:47:49.003967 Write Rank1 MR13 =0xd8
3895 14:47:49.006527 MR12 = 0x5e (global = 0x5e) match
3896 14:47:49.010220 MR14 = 0x20 (global = 0x20) match
3897 14:47:49.013710 FSP_1, CH_1, RK0
3898 14:47:49.014011 Write Rank0 MR13 =0xd8
3899 14:47:49.016738 MR12 = 0x60 (global = 0x60) match
3900 14:47:49.019606 MR14 = 0x1e (global = 0x1e) match
3901 14:47:49.023085 FSP_1, CH_1, RK1
3902 14:47:49.023266 Write Rank1 MR13 =0xd8
3903 14:47:49.026595 MR12 = 0x60 (global = 0x60) match
3904 14:47:49.029768 MR14 = 0x1e (global = 0x1e) match
3905 14:47:49.029919
3906 14:47:49.036627 [MEM_TEST] 02: After DFS, before run time config
3907 14:47:49.042980 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3908 14:47:49.046429
3909 14:47:49.046512 [TA2_TEST]
3910 14:47:49.046581 === TA2 HW
3911 14:47:49.049568 TA2 PAT: XTALK
3912 14:47:49.052921 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3913 14:47:49.059647 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3914 14:47:49.062904 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3915 14:47:49.066092 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3916 14:47:49.069601
3917 14:47:49.069691
3918 14:47:49.069763 Settings after calibration
3919 14:47:49.069829
3920 14:47:49.073050 [DramcRunTimeConfig]
3921 14:47:49.076257 TransferPLLToSPMControl - MODE SW PHYPLL
3922 14:47:49.076348 TX_TRACKING: ON
3923 14:47:49.079328 RX_TRACKING: ON
3924 14:47:49.079431 HW_GATING: ON
3925 14:47:49.083094 HW_GATING DBG: OFF
3926 14:47:49.083185 ddr_geometry:1
3927 14:47:49.085923 ddr_geometry:1
3928 14:47:49.086014 ddr_geometry:1
3929 14:47:49.086085 ddr_geometry:1
3930 14:47:49.089468 ddr_geometry:1
3931 14:47:49.089559 ddr_geometry:1
3932 14:47:49.092497 ddr_geometry:1
3933 14:47:49.092588 ddr_geometry:1
3934 14:47:49.096013 High Freq DUMMY_READ_FOR_TRACKING: ON
3935 14:47:49.099152 ZQCS_ENABLE_LP4: OFF
3936 14:47:49.102938 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3937 14:47:49.106168 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3938 14:47:49.106266 SPM_CONTROL_AFTERK: ON
3939 14:47:49.109263 IMPEDANCE_TRACKING: ON
3940 14:47:49.109370 TEMP_SENSOR: ON
3941 14:47:49.112617 PER_BANK_REFRESH: ON
3942 14:47:49.112764 HW_SAVE_FOR_SR: ON
3943 14:47:49.116093 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3944 14:47:49.119399 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3945 14:47:49.122898 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3946 14:47:49.125940 Read ODT Tracking: ON
3947 14:47:49.129498 =========================
3948 14:47:49.129626
3949 14:47:49.129737 [TA2_TEST]
3950 14:47:49.129822 === TA2 HW
3951 14:47:49.136041 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3952 14:47:49.139085 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3953 14:47:49.145958 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3954 14:47:49.149046 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3955 14:47:49.149150
3956 14:47:49.152708 [MEM_TEST] 03: After run time config
3957 14:47:49.164075 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3958 14:47:49.167496 [complex_mem_test] start addr:0x40024000, len:131072
3959 14:47:49.372277 1st complex R/W mem test pass
3960 14:47:49.378110 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3961 14:47:49.381865 sync preloader write leveling
3962 14:47:49.385171 sync preloader cbt_mr12
3963 14:47:49.388645 sync preloader cbt_clk_dly
3964 14:47:49.389060 sync preloader cbt_cmd_dly
3965 14:47:49.391949 sync preloader cbt_cs
3966 14:47:49.395119 sync preloader cbt_ca_perbit_delay
3967 14:47:49.395666 sync preloader clk_delay
3968 14:47:49.398033 sync preloader dqs_delay
3969 14:47:49.402062 sync preloader u1Gating2T_Save
3970 14:47:49.405165 sync preloader u1Gating05T_Save
3971 14:47:49.408331 sync preloader u1Gatingfine_tune_Save
3972 14:47:49.411720 sync preloader u1Gatingucpass_count_Save
3973 14:47:49.415115 sync preloader u1TxWindowPerbitVref_Save
3974 14:47:49.418889 sync preloader u1TxCenter_min_Save
3975 14:47:49.421666 sync preloader u1TxCenter_max_Save
3976 14:47:49.425447 sync preloader u1Txwin_center_Save
3977 14:47:49.428216 sync preloader u1Txfirst_pass_Save
3978 14:47:49.431709 sync preloader u1Txlast_pass_Save
3979 14:47:49.434801 sync preloader u1RxDatlat_Save
3980 14:47:49.438236 sync preloader u1RxWinPerbitVref_Save
3981 14:47:49.441597 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3982 14:47:49.444843 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3983 14:47:49.448618 sync preloader delay_cell_unit
3984 14:47:49.455247 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3985 14:47:49.458254 sync preloader write leveling
3986 14:47:49.458718 sync preloader cbt_mr12
3987 14:47:49.461484 sync preloader cbt_clk_dly
3988 14:47:49.465186 sync preloader cbt_cmd_dly
3989 14:47:49.465703 sync preloader cbt_cs
3990 14:47:49.467879 sync preloader cbt_ca_perbit_delay
3991 14:47:49.471724 sync preloader clk_delay
3992 14:47:49.474547 sync preloader dqs_delay
3993 14:47:49.478078 sync preloader u1Gating2T_Save
3994 14:47:49.478496 sync preloader u1Gating05T_Save
3995 14:47:49.481408 sync preloader u1Gatingfine_tune_Save
3996 14:47:49.487694 sync preloader u1Gatingucpass_count_Save
3997 14:47:49.491286 sync preloader u1TxWindowPerbitVref_Save
3998 14:47:49.494412 sync preloader u1TxCenter_min_Save
3999 14:47:49.494825 sync preloader u1TxCenter_max_Save
4000 14:47:49.498027 sync preloader u1Txwin_center_Save
4001 14:47:49.501235 sync preloader u1Txfirst_pass_Save
4002 14:47:49.504854 sync preloader u1Txlast_pass_Save
4003 14:47:49.508050 sync preloader u1RxDatlat_Save
4004 14:47:49.511360 sync preloader u1RxWinPerbitVref_Save
4005 14:47:49.514645 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4006 14:47:49.521639 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4007 14:47:49.522149 sync preloader delay_cell_unit
4008 14:47:49.528305 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4009 14:47:49.531441 sync preloader write leveling
4010 14:47:49.534804 sync preloader cbt_mr12
4011 14:47:49.538034 sync preloader cbt_clk_dly
4012 14:47:49.538554 sync preloader cbt_cmd_dly
4013 14:47:49.541344 sync preloader cbt_cs
4014 14:47:49.544499 sync preloader cbt_ca_perbit_delay
4015 14:47:49.544915 sync preloader clk_delay
4016 14:47:49.547962 sync preloader dqs_delay
4017 14:47:49.551457 sync preloader u1Gating2T_Save
4018 14:47:49.554544 sync preloader u1Gating05T_Save
4019 14:47:49.557913 sync preloader u1Gatingfine_tune_Save
4020 14:47:49.561339 sync preloader u1Gatingucpass_count_Save
4021 14:47:49.564519 sync preloader u1TxWindowPerbitVref_Save
4022 14:47:49.567580 sync preloader u1TxCenter_min_Save
4023 14:47:49.571306 sync preloader u1TxCenter_max_Save
4024 14:47:49.574424 sync preloader u1Txwin_center_Save
4025 14:47:49.577410 sync preloader u1Txfirst_pass_Save
4026 14:47:49.581045 sync preloader u1Txlast_pass_Save
4027 14:47:49.584511 sync preloader u1RxDatlat_Save
4028 14:47:49.587772 sync preloader u1RxWinPerbitVref_Save
4029 14:47:49.591030 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4030 14:47:49.594196 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4031 14:47:49.597786 sync preloader delay_cell_unit
4032 14:47:49.601223 just_for_test_dump_coreboot_params dump all params
4033 14:47:49.604312 dump source = 0x0
4034 14:47:49.604722 dump params frequency:1600
4035 14:47:49.607786 dump params rank number:2
4036 14:47:49.608239
4037 14:47:49.610640 dump params write leveling
4038 14:47:49.613860 write leveling[0][0][0] = 0x20
4039 14:47:49.617429 write leveling[0][0][1] = 0x17
4040 14:47:49.617850 write leveling[0][1][0] = 0x19
4041 14:47:49.621027 write leveling[0][1][1] = 0x18
4042 14:47:49.624256 write leveling[1][0][0] = 0x22
4043 14:47:49.627352 write leveling[1][0][1] = 0x18
4044 14:47:49.630626 write leveling[1][1][0] = 0x22
4045 14:47:49.634010 write leveling[1][1][1] = 0x19
4046 14:47:49.634430 dump params cbt_cs
4047 14:47:49.637687 cbt_cs[0][0] = 0x8
4048 14:47:49.638108 cbt_cs[0][1] = 0x8
4049 14:47:49.640342 cbt_cs[1][0] = 0xa
4050 14:47:49.640641 cbt_cs[1][1] = 0xa
4051 14:47:49.644107 dump params cbt_mr12
4052 14:47:49.644331 cbt_mr12[0][0] = 0x20
4053 14:47:49.647254 cbt_mr12[0][1] = 0x1e
4054 14:47:49.647520 cbt_mr12[1][0] = 0x20
4055 14:47:49.650338 cbt_mr12[1][1] = 0x20
4056 14:47:49.653783 dump params tx window
4057 14:47:49.653935 tx_center_min[0][0][0] = 981
4058 14:47:49.657125 tx_center_max[0][0][0] = 988
4059 14:47:49.660350 tx_center_min[0][0][1] = 973
4060 14:47:49.664005 tx_center_max[0][0][1] = 980
4061 14:47:49.666929 tx_center_min[0][1][0] = 978
4062 14:47:49.667082 tx_center_max[0][1][0] = 984
4063 14:47:49.670091 tx_center_min[0][1][1] = 978
4064 14:47:49.673545 tx_center_max[0][1][1] = 984
4065 14:47:49.677116 tx_center_min[1][0][0] = 989
4066 14:47:49.680459 tx_center_max[1][0][0] = 994
4067 14:47:49.680657 tx_center_min[1][0][1] = 976
4068 14:47:49.683598 tx_center_max[1][0][1] = 982
4069 14:47:49.686747 tx_center_min[1][1][0] = 986
4070 14:47:49.690104 tx_center_max[1][1][0] = 991
4071 14:47:49.693878 tx_center_min[1][1][1] = 977
4072 14:47:49.694076 tx_center_max[1][1][1] = 982
4073 14:47:49.697093 dump params tx window
4074 14:47:49.699868 tx_win_center[0][0][0] = 988
4075 14:47:49.703206 tx_first_pass[0][0][0] = 976
4076 14:47:49.703400 tx_last_pass[0][0][0] = 1000
4077 14:47:49.706628 tx_win_center[0][0][1] = 987
4078 14:47:49.709923 tx_first_pass[0][0][1] = 976
4079 14:47:49.713076 tx_last_pass[0][0][1] = 999
4080 14:47:49.713294 tx_win_center[0][0][2] = 987
4081 14:47:49.716591 tx_first_pass[0][0][2] = 976
4082 14:47:49.720435 tx_last_pass[0][0][2] = 999
4083 14:47:49.723262 tx_win_center[0][0][3] = 981
4084 14:47:49.726773 tx_first_pass[0][0][3] = 969
4085 14:47:49.726983 tx_last_pass[0][0][3] = 993
4086 14:47:49.730601 tx_win_center[0][0][4] = 987
4087 14:47:49.733181 tx_first_pass[0][0][4] = 975
4088 14:47:49.736591 tx_last_pass[0][0][4] = 999
4089 14:47:49.736902 tx_win_center[0][0][5] = 983
4090 14:47:49.740104 tx_first_pass[0][0][5] = 972
4091 14:47:49.743172 tx_last_pass[0][0][5] = 995
4092 14:47:49.746439 tx_win_center[0][0][6] = 984
4093 14:47:49.749722 tx_first_pass[0][0][6] = 973
4094 14:47:49.749923 tx_last_pass[0][0][6] = 996
4095 14:47:49.753468 tx_win_center[0][0][7] = 987
4096 14:47:49.756446 tx_first_pass[0][0][7] = 975
4097 14:47:49.759796 tx_last_pass[0][0][7] = 999
4098 14:47:49.759979 tx_win_center[0][0][8] = 973
4099 14:47:49.763182 tx_first_pass[0][0][8] = 962
4100 14:47:49.766689 tx_last_pass[0][0][8] = 985
4101 14:47:49.769781 tx_win_center[0][0][9] = 976
4102 14:47:49.773110 tx_first_pass[0][0][9] = 965
4103 14:47:49.773307 tx_last_pass[0][0][9] = 988
4104 14:47:49.776699 tx_win_center[0][0][10] = 980
4105 14:47:49.779868 tx_first_pass[0][0][10] = 968
4106 14:47:49.782782 tx_last_pass[0][0][10] = 993
4107 14:47:49.786248 tx_win_center[0][0][11] = 975
4108 14:47:49.786416 tx_first_pass[0][0][11] = 964
4109 14:47:49.789854 tx_last_pass[0][0][11] = 987
4110 14:47:49.793040 tx_win_center[0][0][12] = 977
4111 14:47:49.796133 tx_first_pass[0][0][12] = 966
4112 14:47:49.799861 tx_last_pass[0][0][12] = 989
4113 14:47:49.800029 tx_win_center[0][0][13] = 977
4114 14:47:49.802915 tx_first_pass[0][0][13] = 966
4115 14:47:49.806272 tx_last_pass[0][0][13] = 989
4116 14:47:49.809479 tx_win_center[0][0][14] = 978
4117 14:47:49.812943 tx_first_pass[0][0][14] = 966
4118 14:47:49.813112 tx_last_pass[0][0][14] = 990
4119 14:47:49.816258 tx_win_center[0][0][15] = 980
4120 14:47:49.819586 tx_first_pass[0][0][15] = 968
4121 14:47:49.823018 tx_last_pass[0][0][15] = 992
4122 14:47:49.826210 tx_win_center[0][1][0] = 984
4123 14:47:49.826366 tx_first_pass[0][1][0] = 972
4124 14:47:49.829450 tx_last_pass[0][1][0] = 996
4125 14:47:49.833000 tx_win_center[0][1][1] = 982
4126 14:47:49.836132 tx_first_pass[0][1][1] = 971
4127 14:47:49.839666 tx_last_pass[0][1][1] = 994
4128 14:47:49.839785 tx_win_center[0][1][2] = 984
4129 14:47:49.843124 tx_first_pass[0][1][2] = 972
4130 14:47:49.846114 tx_last_pass[0][1][2] = 996
4131 14:47:49.849440 tx_win_center[0][1][3] = 978
4132 14:47:49.849609 tx_first_pass[0][1][3] = 966
4133 14:47:49.853071 tx_last_pass[0][1][3] = 990
4134 14:47:49.856498 tx_win_center[0][1][4] = 982
4135 14:47:49.859689 tx_first_pass[0][1][4] = 970
4136 14:47:49.859834 tx_last_pass[0][1][4] = 994
4137 14:47:49.863094 tx_win_center[0][1][5] = 979
4138 14:47:49.866053 tx_first_pass[0][1][5] = 967
4139 14:47:49.869346 tx_last_pass[0][1][5] = 992
4140 14:47:49.872813 tx_win_center[0][1][6] = 980
4141 14:47:49.872941 tx_first_pass[0][1][6] = 968
4142 14:47:49.876389 tx_last_pass[0][1][6] = 993
4143 14:47:49.879813 tx_win_center[0][1][7] = 982
4144 14:47:49.882867 tx_first_pass[0][1][7] = 969
4145 14:47:49.883029 tx_last_pass[0][1][7] = 995
4146 14:47:49.886457 tx_win_center[0][1][8] = 978
4147 14:47:49.889777 tx_first_pass[0][1][8] = 966
4148 14:47:49.893150 tx_last_pass[0][1][8] = 990
4149 14:47:49.895835 tx_win_center[0][1][9] = 979
4150 14:47:49.896004 tx_first_pass[0][1][9] = 968
4151 14:47:49.899481 tx_last_pass[0][1][9] = 991
4152 14:47:49.903042 tx_win_center[0][1][10] = 984
4153 14:47:49.905875 tx_first_pass[0][1][10] = 972
4154 14:47:49.909524 tx_last_pass[0][1][10] = 997
4155 14:47:49.909690 tx_win_center[0][1][11] = 978
4156 14:47:49.912552 tx_first_pass[0][1][11] = 967
4157 14:47:49.916144 tx_last_pass[0][1][11] = 990
4158 14:47:49.919437 tx_win_center[0][1][12] = 980
4159 14:47:49.922459 tx_first_pass[0][1][12] = 968
4160 14:47:49.922630 tx_last_pass[0][1][12] = 992
4161 14:47:49.926220 tx_win_center[0][1][13] = 980
4162 14:47:49.929509 tx_first_pass[0][1][13] = 969
4163 14:47:49.932815 tx_last_pass[0][1][13] = 991
4164 14:47:49.935862 tx_win_center[0][1][14] = 980
4165 14:47:49.935998 tx_first_pass[0][1][14] = 968
4166 14:47:49.939314 tx_last_pass[0][1][14] = 992
4167 14:47:49.942449 tx_win_center[0][1][15] = 983
4168 14:47:49.945836 tx_first_pass[0][1][15] = 971
4169 14:47:49.949049 tx_last_pass[0][1][15] = 995
4170 14:47:49.949222 tx_win_center[1][0][0] = 994
4171 14:47:49.952518 tx_first_pass[1][0][0] = 981
4172 14:47:49.955956 tx_last_pass[1][0][0] = 1007
4173 14:47:49.959851 tx_win_center[1][0][1] = 992
4174 14:47:49.962528 tx_first_pass[1][0][1] = 979
4175 14:47:49.962655 tx_last_pass[1][0][1] = 1006
4176 14:47:49.965949 tx_win_center[1][0][2] = 990
4177 14:47:49.969086 tx_first_pass[1][0][2] = 978
4178 14:47:49.972793 tx_last_pass[1][0][2] = 1003
4179 14:47:49.972920 tx_win_center[1][0][3] = 989
4180 14:47:49.975943 tx_first_pass[1][0][3] = 977
4181 14:47:49.978949 tx_last_pass[1][0][3] = 1001
4182 14:47:49.982633 tx_win_center[1][0][4] = 993
4183 14:47:49.985524 tx_first_pass[1][0][4] = 980
4184 14:47:49.985696 tx_last_pass[1][0][4] = 1006
4185 14:47:49.989052 tx_win_center[1][0][5] = 993
4186 14:47:49.992184 tx_first_pass[1][0][5] = 981
4187 14:47:49.995668 tx_last_pass[1][0][5] = 1006
4188 14:47:49.999159 tx_win_center[1][0][6] = 992
4189 14:47:49.999334 tx_first_pass[1][0][6] = 979
4190 14:47:50.002609 tx_last_pass[1][0][6] = 1006
4191 14:47:50.005438 tx_win_center[1][0][7] = 992
4192 14:47:50.008889 tx_first_pass[1][0][7] = 979
4193 14:47:50.012007 tx_last_pass[1][0][7] = 1006
4194 14:47:50.012177 tx_win_center[1][0][8] = 980
4195 14:47:50.015830 tx_first_pass[1][0][8] = 968
4196 14:47:50.019013 tx_last_pass[1][0][8] = 992
4197 14:47:50.022416 tx_win_center[1][0][9] = 979
4198 14:47:50.022595 tx_first_pass[1][0][9] = 968
4199 14:47:50.025437 tx_last_pass[1][0][9] = 991
4200 14:47:50.028983 tx_win_center[1][0][10] = 981
4201 14:47:50.032372 tx_first_pass[1][0][10] = 970
4202 14:47:50.035333 tx_last_pass[1][0][10] = 993
4203 14:47:50.035481 tx_win_center[1][0][11] = 982
4204 14:47:50.039243 tx_first_pass[1][0][11] = 970
4205 14:47:50.042558 tx_last_pass[1][0][11] = 994
4206 14:47:50.045819 tx_win_center[1][0][12] = 982
4207 14:47:50.048965 tx_first_pass[1][0][12] = 970
4208 14:47:50.049108 tx_last_pass[1][0][12] = 994
4209 14:47:50.052556 tx_win_center[1][0][13] = 982
4210 14:47:50.055676 tx_first_pass[1][0][13] = 971
4211 14:47:50.059372 tx_last_pass[1][0][13] = 994
4212 14:47:50.062360 tx_win_center[1][0][14] = 981
4213 14:47:50.062681 tx_first_pass[1][0][14] = 970
4214 14:47:50.065977 tx_last_pass[1][0][14] = 993
4215 14:47:50.069373 tx_win_center[1][0][15] = 976
4216 14:47:50.072395 tx_first_pass[1][0][15] = 965
4217 14:47:50.076187 tx_last_pass[1][0][15] = 988
4218 14:47:50.076796 tx_win_center[1][1][0] = 991
4219 14:47:50.079583 tx_first_pass[1][1][0] = 978
4220 14:47:50.082184 tx_last_pass[1][1][0] = 1005
4221 14:47:50.085987 tx_win_center[1][1][1] = 990
4222 14:47:50.089341 tx_first_pass[1][1][1] = 977
4223 14:47:50.089753 tx_last_pass[1][1][1] = 1003
4224 14:47:50.092454 tx_win_center[1][1][2] = 988
4225 14:47:50.095693 tx_first_pass[1][1][2] = 976
4226 14:47:50.099009 tx_last_pass[1][1][2] = 1001
4227 14:47:50.099595 tx_win_center[1][1][3] = 986
4228 14:47:50.102628 tx_first_pass[1][1][3] = 974
4229 14:47:50.105737 tx_last_pass[1][1][3] = 999
4230 14:47:50.109062 tx_win_center[1][1][4] = 990
4231 14:47:50.112108 tx_first_pass[1][1][4] = 978
4232 14:47:50.112560 tx_last_pass[1][1][4] = 1003
4233 14:47:50.115764 tx_win_center[1][1][5] = 991
4234 14:47:50.119159 tx_first_pass[1][1][5] = 978
4235 14:47:50.122549 tx_last_pass[1][1][5] = 1004
4236 14:47:50.125562 tx_win_center[1][1][6] = 990
4237 14:47:50.126113 tx_first_pass[1][1][6] = 977
4238 14:47:50.129145 tx_last_pass[1][1][6] = 1004
4239 14:47:50.132595 tx_win_center[1][1][7] = 990
4240 14:47:50.135883 tx_first_pass[1][1][7] = 978
4241 14:47:50.136326 tx_last_pass[1][1][7] = 1002
4242 14:47:50.138957 tx_win_center[1][1][8] = 979
4243 14:47:50.142217 tx_first_pass[1][1][8] = 968
4244 14:47:50.145573 tx_last_pass[1][1][8] = 991
4245 14:47:50.149034 tx_win_center[1][1][9] = 980
4246 14:47:50.149579 tx_first_pass[1][1][9] = 969
4247 14:47:50.152944 tx_last_pass[1][1][9] = 991
4248 14:47:50.156296 tx_win_center[1][1][10] = 981
4249 14:47:50.159582 tx_first_pass[1][1][10] = 970
4250 14:47:50.160092 tx_last_pass[1][1][10] = 993
4251 14:47:50.162465 tx_win_center[1][1][11] = 982
4252 14:47:50.165606 tx_first_pass[1][1][11] = 970
4253 14:47:50.168756 tx_last_pass[1][1][11] = 994
4254 14:47:50.172382 tx_win_center[1][1][12] = 982
4255 14:47:50.175598 tx_first_pass[1][1][12] = 970
4256 14:47:50.176013 tx_last_pass[1][1][12] = 994
4257 14:47:50.178979 tx_win_center[1][1][13] = 982
4258 14:47:50.182131 tx_first_pass[1][1][13] = 971
4259 14:47:50.185920 tx_last_pass[1][1][13] = 994
4260 14:47:50.189371 tx_win_center[1][1][14] = 981
4261 14:47:50.189887 tx_first_pass[1][1][14] = 970
4262 14:47:50.193036 tx_last_pass[1][1][14] = 993
4263 14:47:50.195586 tx_win_center[1][1][15] = 977
4264 14:47:50.199190 tx_first_pass[1][1][15] = 965
4265 14:47:50.202318 tx_last_pass[1][1][15] = 989
4266 14:47:50.202732 dump params rx window
4267 14:47:50.205484 rx_firspass[0][0][0] = 5
4268 14:47:50.208677 rx_lastpass[0][0][0] = 38
4269 14:47:50.209087 rx_firspass[0][0][1] = 5
4270 14:47:50.212807 rx_lastpass[0][0][1] = 36
4271 14:47:50.215708 rx_firspass[0][0][2] = 6
4272 14:47:50.216123 rx_lastpass[0][0][2] = 36
4273 14:47:50.219210 rx_firspass[0][0][3] = -2
4274 14:47:50.222172 rx_lastpass[0][0][3] = 31
4275 14:47:50.225535 rx_firspass[0][0][4] = 5
4276 14:47:50.226046 rx_lastpass[0][0][4] = 36
4277 14:47:50.228872 rx_firspass[0][0][5] = 2
4278 14:47:50.232036 rx_lastpass[0][0][5] = 32
4279 14:47:50.232462 rx_firspass[0][0][6] = 3
4280 14:47:50.235628 rx_lastpass[0][0][6] = 33
4281 14:47:50.238935 rx_firspass[0][0][7] = 5
4282 14:47:50.239477 rx_lastpass[0][0][7] = 36
4283 14:47:50.242073 rx_firspass[0][0][8] = -3
4284 14:47:50.245316 rx_lastpass[0][0][8] = 32
4285 14:47:50.248725 rx_firspass[0][0][9] = 0
4286 14:47:50.249172 rx_lastpass[0][0][9] = 32
4287 14:47:50.252063 rx_firspass[0][0][10] = 8
4288 14:47:50.255809 rx_lastpass[0][0][10] = 41
4289 14:47:50.256342 rx_firspass[0][0][11] = 1
4290 14:47:50.258648 rx_lastpass[0][0][11] = 32
4291 14:47:50.261617 rx_firspass[0][0][12] = 2
4292 14:47:50.265141 rx_lastpass[0][0][12] = 36
4293 14:47:50.265619 rx_firspass[0][0][13] = 3
4294 14:47:50.268299 rx_lastpass[0][0][13] = 33
4295 14:47:50.271673 rx_firspass[0][0][14] = 2
4296 14:47:50.275224 rx_lastpass[0][0][14] = 37
4297 14:47:50.275676 rx_firspass[0][0][15] = 6
4298 14:47:50.278336 rx_lastpass[0][0][15] = 37
4299 14:47:50.281594 rx_firspass[0][1][0] = 6
4300 14:47:50.281999 rx_lastpass[0][1][0] = 40
4301 14:47:50.285147 rx_firspass[0][1][1] = 5
4302 14:47:50.288508 rx_lastpass[0][1][1] = 38
4303 14:47:50.288916 rx_firspass[0][1][2] = 6
4304 14:47:50.291846 rx_lastpass[0][1][2] = 38
4305 14:47:50.295218 rx_firspass[0][1][3] = -2
4306 14:47:50.298116 rx_lastpass[0][1][3] = 34
4307 14:47:50.298616 rx_firspass[0][1][4] = 5
4308 14:47:50.301490 rx_lastpass[0][1][4] = 38
4309 14:47:50.305218 rx_firspass[0][1][5] = 2
4310 14:47:50.305706 rx_lastpass[0][1][5] = 34
4311 14:47:50.308503 rx_firspass[0][1][6] = 3
4312 14:47:50.311694 rx_lastpass[0][1][6] = 36
4313 14:47:50.314782 rx_firspass[0][1][7] = 3
4314 14:47:50.315514 rx_lastpass[0][1][7] = 38
4315 14:47:50.317981 rx_firspass[0][1][8] = -2
4316 14:47:50.321829 rx_lastpass[0][1][8] = 33
4317 14:47:50.322431 rx_firspass[0][1][9] = 1
4318 14:47:50.325254 rx_lastpass[0][1][9] = 36
4319 14:47:50.328010 rx_firspass[0][1][10] = 7
4320 14:47:50.331634 rx_lastpass[0][1][10] = 43
4321 14:47:50.332039 rx_firspass[0][1][11] = -2
4322 14:47:50.335298 rx_lastpass[0][1][11] = 34
4323 14:47:50.338281 rx_firspass[0][1][12] = 1
4324 14:47:50.338953 rx_lastpass[0][1][12] = 37
4325 14:47:50.341307 rx_firspass[0][1][13] = 2
4326 14:47:50.344663 rx_lastpass[0][1][13] = 34
4327 14:47:50.348259 rx_firspass[0][1][14] = 2
4328 14:47:50.348669 rx_lastpass[0][1][14] = 38
4329 14:47:50.351538 rx_firspass[0][1][15] = 6
4330 14:47:50.354864 rx_lastpass[0][1][15] = 38
4331 14:47:50.358503 rx_firspass[1][0][0] = 5
4332 14:47:50.358913 rx_lastpass[1][0][0] = 39
4333 14:47:50.361624 rx_firspass[1][0][1] = 4
4334 14:47:50.364807 rx_lastpass[1][0][1] = 38
4335 14:47:50.365333 rx_firspass[1][0][2] = 2
4336 14:47:50.368017 rx_lastpass[1][0][2] = 36
4337 14:47:50.371599 rx_firspass[1][0][3] = -1
4338 14:47:50.372101 rx_lastpass[1][0][3] = 34
4339 14:47:50.374948 rx_firspass[1][0][4] = 5
4340 14:47:50.378035 rx_lastpass[1][0][4] = 38
4341 14:47:50.381394 rx_firspass[1][0][5] = 7
4342 14:47:50.381931 rx_lastpass[1][0][5] = 39
4343 14:47:50.384390 rx_firspass[1][0][6] = 7
4344 14:47:50.387931 rx_lastpass[1][0][6] = 40
4345 14:47:50.388487 rx_firspass[1][0][7] = 4
4346 14:47:50.391505 rx_lastpass[1][0][7] = 38
4347 14:47:50.394758 rx_firspass[1][0][8] = 1
4348 14:47:50.395161 rx_lastpass[1][0][8] = 33
4349 14:47:50.398315 rx_firspass[1][0][9] = 1
4350 14:47:50.401148 rx_lastpass[1][0][9] = 32
4351 14:47:50.404435 rx_firspass[1][0][10] = 5
4352 14:47:50.404844 rx_lastpass[1][0][10] = 35
4353 14:47:50.408594 rx_firspass[1][0][11] = 5
4354 14:47:50.411299 rx_lastpass[1][0][11] = 38
4355 14:47:50.411732 rx_firspass[1][0][12] = 6
4356 14:47:50.414912 rx_lastpass[1][0][12] = 38
4357 14:47:50.418268 rx_firspass[1][0][13] = 5
4358 14:47:50.421363 rx_lastpass[1][0][13] = 37
4359 14:47:50.421802 rx_firspass[1][0][14] = 7
4360 14:47:50.424665 rx_lastpass[1][0][14] = 38
4361 14:47:50.428359 rx_firspass[1][0][15] = -4
4362 14:47:50.431438 rx_lastpass[1][0][15] = 30
4363 14:47:50.431850 rx_firspass[1][1][0] = 4
4364 14:47:50.434494 rx_lastpass[1][1][0] = 40
4365 14:47:50.438564 rx_firspass[1][1][1] = 4
4366 14:47:50.439075 rx_lastpass[1][1][1] = 39
4367 14:47:50.441353 rx_firspass[1][1][2] = 0
4368 14:47:50.444553 rx_lastpass[1][1][2] = 36
4369 14:47:50.448311 rx_firspass[1][1][3] = -2
4370 14:47:50.448828 rx_lastpass[1][1][3] = 34
4371 14:47:50.451602 rx_firspass[1][1][4] = 4
4372 14:47:50.454509 rx_lastpass[1][1][4] = 39
4373 14:47:50.455015 rx_firspass[1][1][5] = 5
4374 14:47:50.458662 rx_lastpass[1][1][5] = 40
4375 14:47:50.461836 rx_firspass[1][1][6] = 5
4376 14:47:50.462358 rx_lastpass[1][1][6] = 41
4377 14:47:50.464443 rx_firspass[1][1][7] = 3
4378 14:47:50.468095 rx_lastpass[1][1][7] = 38
4379 14:47:50.470793 rx_firspass[1][1][8] = 0
4380 14:47:50.471203 rx_lastpass[1][1][8] = 35
4381 14:47:50.474430 rx_firspass[1][1][9] = -1
4382 14:47:50.478054 rx_lastpass[1][1][9] = 34
4383 14:47:50.478588 rx_firspass[1][1][10] = 4
4384 14:47:50.480935 rx_lastpass[1][1][10] = 38
4385 14:47:50.484257 rx_firspass[1][1][11] = 4
4386 14:47:50.487990 rx_lastpass[1][1][11] = 40
4387 14:47:50.488398 rx_firspass[1][1][12] = 4
4388 14:47:50.491246 rx_lastpass[1][1][12] = 40
4389 14:47:50.494077 rx_firspass[1][1][13] = 4
4390 14:47:50.494486 rx_lastpass[1][1][13] = 40
4391 14:47:50.498149 rx_firspass[1][1][14] = 5
4392 14:47:50.501282 rx_lastpass[1][1][14] = 40
4393 14:47:50.504617 rx_firspass[1][1][15] = -3
4394 14:47:50.505027 rx_lastpass[1][1][15] = 31
4395 14:47:50.507579 dump params clk_delay
4396 14:47:50.507991 clk_delay[0] = 1
4397 14:47:50.510776 clk_delay[1] = 0
4398 14:47:50.515025 dump params dqs_delay
4399 14:47:50.515601 dqs_delay[0][0] = -2
4400 14:47:50.517903 dqs_delay[0][1] = 0
4401 14:47:50.518413 dqs_delay[1][0] = 0
4402 14:47:50.520964 dqs_delay[1][1] = 0
4403 14:47:50.524195 dump params delay_cell_unit = 735
4404 14:47:50.524606 dump source = 0x0
4405 14:47:50.527431 dump params frequency:1200
4406 14:47:50.530999 dump params rank number:2
4407 14:47:50.531556
4408 14:47:50.531890 dump params write leveling
4409 14:47:50.534119 write leveling[0][0][0] = 0x0
4410 14:47:50.537651 write leveling[0][0][1] = 0x0
4411 14:47:50.540694 write leveling[0][1][0] = 0x0
4412 14:47:50.544384 write leveling[0][1][1] = 0x0
4413 14:47:50.544904 write leveling[1][0][0] = 0x0
4414 14:47:50.547325 write leveling[1][0][1] = 0x0
4415 14:47:50.551094 write leveling[1][1][0] = 0x0
4416 14:47:50.554648 write leveling[1][1][1] = 0x0
4417 14:47:50.555157 dump params cbt_cs
4418 14:47:50.557418 cbt_cs[0][0] = 0x0
4419 14:47:50.557825 cbt_cs[0][1] = 0x0
4420 14:47:50.561157 cbt_cs[1][0] = 0x0
4421 14:47:50.561667 cbt_cs[1][1] = 0x0
4422 14:47:50.564318 dump params cbt_mr12
4423 14:47:50.567380 cbt_mr12[0][0] = 0x0
4424 14:47:50.567821 cbt_mr12[0][1] = 0x0
4425 14:47:50.570792 cbt_mr12[1][0] = 0x0
4426 14:47:50.571203 cbt_mr12[1][1] = 0x0
4427 14:47:50.574093 dump params tx window
4428 14:47:50.577396 tx_center_min[0][0][0] = 0
4429 14:47:50.577815 tx_center_max[0][0][0] = 0
4430 14:47:50.581043 tx_center_min[0][0][1] = 0
4431 14:47:50.584296 tx_center_max[0][0][1] = 0
4432 14:47:50.584706 tx_center_min[0][1][0] = 0
4433 14:47:50.587449 tx_center_max[0][1][0] = 0
4434 14:47:50.591143 tx_center_min[0][1][1] = 0
4435 14:47:50.594181 tx_center_max[0][1][1] = 0
4436 14:47:50.594597 tx_center_min[1][0][0] = 0
4437 14:47:50.597646 tx_center_max[1][0][0] = 0
4438 14:47:50.601411 tx_center_min[1][0][1] = 0
4439 14:47:50.604488 tx_center_max[1][0][1] = 0
4440 14:47:50.604911 tx_center_min[1][1][0] = 0
4441 14:47:50.607626 tx_center_max[1][1][0] = 0
4442 14:47:50.610482 tx_center_min[1][1][1] = 0
4443 14:47:50.613865 tx_center_max[1][1][1] = 0
4444 14:47:50.614308 dump params tx window
4445 14:47:50.617331 tx_win_center[0][0][0] = 0
4446 14:47:50.620477 tx_first_pass[0][0][0] = 0
4447 14:47:50.620888 tx_last_pass[0][0][0] = 0
4448 14:47:50.624084 tx_win_center[0][0][1] = 0
4449 14:47:50.627372 tx_first_pass[0][0][1] = 0
4450 14:47:50.630565 tx_last_pass[0][0][1] = 0
4451 14:47:50.631050 tx_win_center[0][0][2] = 0
4452 14:47:50.633704 tx_first_pass[0][0][2] = 0
4453 14:47:50.637038 tx_last_pass[0][0][2] = 0
4454 14:47:50.640256 tx_win_center[0][0][3] = 0
4455 14:47:50.640477 tx_first_pass[0][0][3] = 0
4456 14:47:50.643510 tx_last_pass[0][0][3] = 0
4457 14:47:50.646718 tx_win_center[0][0][4] = 0
4458 14:47:50.646895 tx_first_pass[0][0][4] = 0
4459 14:47:50.650581 tx_last_pass[0][0][4] = 0
4460 14:47:50.653430 tx_win_center[0][0][5] = 0
4461 14:47:50.657201 tx_first_pass[0][0][5] = 0
4462 14:47:50.657449 tx_last_pass[0][0][5] = 0
4463 14:47:50.660760 tx_win_center[0][0][6] = 0
4464 14:47:50.663432 tx_first_pass[0][0][6] = 0
4465 14:47:50.667024 tx_last_pass[0][0][6] = 0
4466 14:47:50.667337 tx_win_center[0][0][7] = 0
4467 14:47:50.670612 tx_first_pass[0][0][7] = 0
4468 14:47:50.673952 tx_last_pass[0][0][7] = 0
4469 14:47:50.674291 tx_win_center[0][0][8] = 0
4470 14:47:50.677279 tx_first_pass[0][0][8] = 0
4471 14:47:50.679857 tx_last_pass[0][0][8] = 0
4472 14:47:50.683754 tx_win_center[0][0][9] = 0
4473 14:47:50.684163 tx_first_pass[0][0][9] = 0
4474 14:47:50.687054 tx_last_pass[0][0][9] = 0
4475 14:47:50.690224 tx_win_center[0][0][10] = 0
4476 14:47:50.693415 tx_first_pass[0][0][10] = 0
4477 14:47:50.693954 tx_last_pass[0][0][10] = 0
4478 14:47:50.696661 tx_win_center[0][0][11] = 0
4479 14:47:50.699934 tx_first_pass[0][0][11] = 0
4480 14:47:50.703320 tx_last_pass[0][0][11] = 0
4481 14:47:50.703780 tx_win_center[0][0][12] = 0
4482 14:47:50.706552 tx_first_pass[0][0][12] = 0
4483 14:47:50.709997 tx_last_pass[0][0][12] = 0
4484 14:47:50.713255 tx_win_center[0][0][13] = 0
4485 14:47:50.713857 tx_first_pass[0][0][13] = 0
4486 14:47:50.716543 tx_last_pass[0][0][13] = 0
4487 14:47:50.719970 tx_win_center[0][0][14] = 0
4488 14:47:50.723357 tx_first_pass[0][0][14] = 0
4489 14:47:50.723800 tx_last_pass[0][0][14] = 0
4490 14:47:50.726922 tx_win_center[0][0][15] = 0
4491 14:47:50.730051 tx_first_pass[0][0][15] = 0
4492 14:47:50.733372 tx_last_pass[0][0][15] = 0
4493 14:47:50.733883 tx_win_center[0][1][0] = 0
4494 14:47:50.736850 tx_first_pass[0][1][0] = 0
4495 14:47:50.739701 tx_last_pass[0][1][0] = 0
4496 14:47:50.743102 tx_win_center[0][1][1] = 0
4497 14:47:50.743580 tx_first_pass[0][1][1] = 0
4498 14:47:50.746843 tx_last_pass[0][1][1] = 0
4499 14:47:50.749954 tx_win_center[0][1][2] = 0
4500 14:47:50.750338 tx_first_pass[0][1][2] = 0
4501 14:47:50.753528 tx_last_pass[0][1][2] = 0
4502 14:47:50.756375 tx_win_center[0][1][3] = 0
4503 14:47:50.760088 tx_first_pass[0][1][3] = 0
4504 14:47:50.760501 tx_last_pass[0][1][3] = 0
4505 14:47:50.763556 tx_win_center[0][1][4] = 0
4506 14:47:50.766799 tx_first_pass[0][1][4] = 0
4507 14:47:50.769922 tx_last_pass[0][1][4] = 0
4508 14:47:50.770334 tx_win_center[0][1][5] = 0
4509 14:47:50.773226 tx_first_pass[0][1][5] = 0
4510 14:47:50.776757 tx_last_pass[0][1][5] = 0
4511 14:47:50.777270 tx_win_center[0][1][6] = 0
4512 14:47:50.779899 tx_first_pass[0][1][6] = 0
4513 14:47:50.783167 tx_last_pass[0][1][6] = 0
4514 14:47:50.786756 tx_win_center[0][1][7] = 0
4515 14:47:50.787166 tx_first_pass[0][1][7] = 0
4516 14:47:50.790224 tx_last_pass[0][1][7] = 0
4517 14:47:50.793670 tx_win_center[0][1][8] = 0
4518 14:47:50.796332 tx_first_pass[0][1][8] = 0
4519 14:47:50.796745 tx_last_pass[0][1][8] = 0
4520 14:47:50.799911 tx_win_center[0][1][9] = 0
4521 14:47:50.802977 tx_first_pass[0][1][9] = 0
4522 14:47:50.803555 tx_last_pass[0][1][9] = 0
4523 14:47:50.806905 tx_win_center[0][1][10] = 0
4524 14:47:50.810391 tx_first_pass[0][1][10] = 0
4525 14:47:50.812859 tx_last_pass[0][1][10] = 0
4526 14:47:50.813272 tx_win_center[0][1][11] = 0
4527 14:47:50.816357 tx_first_pass[0][1][11] = 0
4528 14:47:50.819745 tx_last_pass[0][1][11] = 0
4529 14:47:50.823621 tx_win_center[0][1][12] = 0
4530 14:47:50.824132 tx_first_pass[0][1][12] = 0
4531 14:47:50.826472 tx_last_pass[0][1][12] = 0
4532 14:47:50.829945 tx_win_center[0][1][13] = 0
4533 14:47:50.833588 tx_first_pass[0][1][13] = 0
4534 14:47:50.834105 tx_last_pass[0][1][13] = 0
4535 14:47:50.836623 tx_win_center[0][1][14] = 0
4536 14:47:50.840393 tx_first_pass[0][1][14] = 0
4537 14:47:50.843270 tx_last_pass[0][1][14] = 0
4538 14:47:50.843818 tx_win_center[0][1][15] = 0
4539 14:47:50.846891 tx_first_pass[0][1][15] = 0
4540 14:47:50.850237 tx_last_pass[0][1][15] = 0
4541 14:47:50.853214 tx_win_center[1][0][0] = 0
4542 14:47:50.853625 tx_first_pass[1][0][0] = 0
4543 14:47:50.856805 tx_last_pass[1][0][0] = 0
4544 14:47:50.859670 tx_win_center[1][0][1] = 0
4545 14:47:50.863091 tx_first_pass[1][0][1] = 0
4546 14:47:50.863676 tx_last_pass[1][0][1] = 0
4547 14:47:50.866234 tx_win_center[1][0][2] = 0
4548 14:47:50.869809 tx_first_pass[1][0][2] = 0
4549 14:47:50.872960 tx_last_pass[1][0][2] = 0
4550 14:47:50.873373 tx_win_center[1][0][3] = 0
4551 14:47:50.876115 tx_first_pass[1][0][3] = 0
4552 14:47:50.879584 tx_last_pass[1][0][3] = 0
4553 14:47:50.880091 tx_win_center[1][0][4] = 0
4554 14:47:50.882627 tx_first_pass[1][0][4] = 0
4555 14:47:50.885855 tx_last_pass[1][0][4] = 0
4556 14:47:50.889256 tx_win_center[1][0][5] = 0
4557 14:47:50.889703 tx_first_pass[1][0][5] = 0
4558 14:47:50.892804 tx_last_pass[1][0][5] = 0
4559 14:47:50.896428 tx_win_center[1][0][6] = 0
4560 14:47:50.899118 tx_first_pass[1][0][6] = 0
4561 14:47:50.899574 tx_last_pass[1][0][6] = 0
4562 14:47:50.902829 tx_win_center[1][0][7] = 0
4563 14:47:50.905882 tx_first_pass[1][0][7] = 0
4564 14:47:50.906300 tx_last_pass[1][0][7] = 0
4565 14:47:50.909558 tx_win_center[1][0][8] = 0
4566 14:47:50.912426 tx_first_pass[1][0][8] = 0
4567 14:47:50.915856 tx_last_pass[1][0][8] = 0
4568 14:47:50.916274 tx_win_center[1][0][9] = 0
4569 14:47:50.919032 tx_first_pass[1][0][9] = 0
4570 14:47:50.922970 tx_last_pass[1][0][9] = 0
4571 14:47:50.925802 tx_win_center[1][0][10] = 0
4572 14:47:50.926319 tx_first_pass[1][0][10] = 0
4573 14:47:50.929215 tx_last_pass[1][0][10] = 0
4574 14:47:50.932763 tx_win_center[1][0][11] = 0
4575 14:47:50.936350 tx_first_pass[1][0][11] = 0
4576 14:47:50.936878 tx_last_pass[1][0][11] = 0
4577 14:47:50.939705 tx_win_center[1][0][12] = 0
4578 14:47:50.942658 tx_first_pass[1][0][12] = 0
4579 14:47:50.945795 tx_last_pass[1][0][12] = 0
4580 14:47:50.946315 tx_win_center[1][0][13] = 0
4581 14:47:50.949263 tx_first_pass[1][0][13] = 0
4582 14:47:50.952655 tx_last_pass[1][0][13] = 0
4583 14:47:50.956369 tx_win_center[1][0][14] = 0
4584 14:47:50.956893 tx_first_pass[1][0][14] = 0
4585 14:47:50.959082 tx_last_pass[1][0][14] = 0
4586 14:47:50.962743 tx_win_center[1][0][15] = 0
4587 14:47:50.965703 tx_first_pass[1][0][15] = 0
4588 14:47:50.966215 tx_last_pass[1][0][15] = 0
4589 14:47:50.969112 tx_win_center[1][1][0] = 0
4590 14:47:50.972678 tx_first_pass[1][1][0] = 0
4591 14:47:50.976360 tx_last_pass[1][1][0] = 0
4592 14:47:50.976874 tx_win_center[1][1][1] = 0
4593 14:47:50.979275 tx_first_pass[1][1][1] = 0
4594 14:47:50.982225 tx_last_pass[1][1][1] = 0
4595 14:47:50.982662 tx_win_center[1][1][2] = 0
4596 14:47:50.985792 tx_first_pass[1][1][2] = 0
4597 14:47:50.989169 tx_last_pass[1][1][2] = 0
4598 14:47:50.992609 tx_win_center[1][1][3] = 0
4599 14:47:50.993197 tx_first_pass[1][1][3] = 0
4600 14:47:50.995848 tx_last_pass[1][1][3] = 0
4601 14:47:50.999200 tx_win_center[1][1][4] = 0
4602 14:47:51.002177 tx_first_pass[1][1][4] = 0
4603 14:47:51.002686 tx_last_pass[1][1][4] = 0
4604 14:47:51.005419 tx_win_center[1][1][5] = 0
4605 14:47:51.009494 tx_first_pass[1][1][5] = 0
4606 14:47:51.010006 tx_last_pass[1][1][5] = 0
4607 14:47:51.012057 tx_win_center[1][1][6] = 0
4608 14:47:51.016067 tx_first_pass[1][1][6] = 0
4609 14:47:51.018993 tx_last_pass[1][1][6] = 0
4610 14:47:51.019601 tx_win_center[1][1][7] = 0
4611 14:47:51.022287 tx_first_pass[1][1][7] = 0
4612 14:47:51.025787 tx_last_pass[1][1][7] = 0
4613 14:47:51.026297 tx_win_center[1][1][8] = 0
4614 14:47:51.029289 tx_first_pass[1][1][8] = 0
4615 14:47:51.032354 tx_last_pass[1][1][8] = 0
4616 14:47:51.035687 tx_win_center[1][1][9] = 0
4617 14:47:51.036102 tx_first_pass[1][1][9] = 0
4618 14:47:51.039144 tx_last_pass[1][1][9] = 0
4619 14:47:51.042303 tx_win_center[1][1][10] = 0
4620 14:47:51.045682 tx_first_pass[1][1][10] = 0
4621 14:47:51.046097 tx_last_pass[1][1][10] = 0
4622 14:47:51.049184 tx_win_center[1][1][11] = 0
4623 14:47:51.052640 tx_first_pass[1][1][11] = 0
4624 14:47:51.055987 tx_last_pass[1][1][11] = 0
4625 14:47:51.056498 tx_win_center[1][1][12] = 0
4626 14:47:51.059080 tx_first_pass[1][1][12] = 0
4627 14:47:51.062619 tx_last_pass[1][1][12] = 0
4628 14:47:51.065695 tx_win_center[1][1][13] = 0
4629 14:47:51.066207 tx_first_pass[1][1][13] = 0
4630 14:47:51.068601 tx_last_pass[1][1][13] = 0
4631 14:47:51.072251 tx_win_center[1][1][14] = 0
4632 14:47:51.075784 tx_first_pass[1][1][14] = 0
4633 14:47:51.076196 tx_last_pass[1][1][14] = 0
4634 14:47:51.079569 tx_win_center[1][1][15] = 0
4635 14:47:51.082080 tx_first_pass[1][1][15] = 0
4636 14:47:51.085475 tx_last_pass[1][1][15] = 0
4637 14:47:51.085890 dump params rx window
4638 14:47:51.089005 rx_firspass[0][0][0] = 0
4639 14:47:51.092071 rx_lastpass[0][0][0] = 0
4640 14:47:51.092482 rx_firspass[0][0][1] = 0
4641 14:47:51.095863 rx_lastpass[0][0][1] = 0
4642 14:47:51.098696 rx_firspass[0][0][2] = 0
4643 14:47:51.099108 rx_lastpass[0][0][2] = 0
4644 14:47:51.102112 rx_firspass[0][0][3] = 0
4645 14:47:51.105773 rx_lastpass[0][0][3] = 0
4646 14:47:51.106214 rx_firspass[0][0][4] = 0
4647 14:47:51.108396 rx_lastpass[0][0][4] = 0
4648 14:47:51.112198 rx_firspass[0][0][5] = 0
4649 14:47:51.115118 rx_lastpass[0][0][5] = 0
4650 14:47:51.115565 rx_firspass[0][0][6] = 0
4651 14:47:51.118576 rx_lastpass[0][0][6] = 0
4652 14:47:51.122283 rx_firspass[0][0][7] = 0
4653 14:47:51.122691 rx_lastpass[0][0][7] = 0
4654 14:47:51.125546 rx_firspass[0][0][8] = 0
4655 14:47:51.128439 rx_lastpass[0][0][8] = 0
4656 14:47:51.128853 rx_firspass[0][0][9] = 0
4657 14:47:51.132305 rx_lastpass[0][0][9] = 0
4658 14:47:51.135360 rx_firspass[0][0][10] = 0
4659 14:47:51.135807 rx_lastpass[0][0][10] = 0
4660 14:47:51.138712 rx_firspass[0][0][11] = 0
4661 14:47:51.141825 rx_lastpass[0][0][11] = 0
4662 14:47:51.144751 rx_firspass[0][0][12] = 0
4663 14:47:51.145161 rx_lastpass[0][0][12] = 0
4664 14:47:51.148000 rx_firspass[0][0][13] = 0
4665 14:47:51.151730 rx_lastpass[0][0][13] = 0
4666 14:47:51.152140 rx_firspass[0][0][14] = 0
4667 14:47:51.154882 rx_lastpass[0][0][14] = 0
4668 14:47:51.158700 rx_firspass[0][0][15] = 0
4669 14:47:51.161867 rx_lastpass[0][0][15] = 0
4670 14:47:51.162285 rx_firspass[0][1][0] = 0
4671 14:47:51.164770 rx_lastpass[0][1][0] = 0
4672 14:47:51.168596 rx_firspass[0][1][1] = 0
4673 14:47:51.169009 rx_lastpass[0][1][1] = 0
4674 14:47:51.171775 rx_firspass[0][1][2] = 0
4675 14:47:51.174531 rx_lastpass[0][1][2] = 0
4676 14:47:51.174948 rx_firspass[0][1][3] = 0
4677 14:47:51.178470 rx_lastpass[0][1][3] = 0
4678 14:47:51.181658 rx_firspass[0][1][4] = 0
4679 14:47:51.184646 rx_lastpass[0][1][4] = 0
4680 14:47:51.185058 rx_firspass[0][1][5] = 0
4681 14:47:51.187934 rx_lastpass[0][1][5] = 0
4682 14:47:51.191531 rx_firspass[0][1][6] = 0
4683 14:47:51.192050 rx_lastpass[0][1][6] = 0
4684 14:47:51.195007 rx_firspass[0][1][7] = 0
4685 14:47:51.198678 rx_lastpass[0][1][7] = 0
4686 14:47:51.199204 rx_firspass[0][1][8] = 0
4687 14:47:51.201111 rx_lastpass[0][1][8] = 0
4688 14:47:51.204938 rx_firspass[0][1][9] = 0
4689 14:47:51.205459 rx_lastpass[0][1][9] = 0
4690 14:47:51.207970 rx_firspass[0][1][10] = 0
4691 14:47:51.211441 rx_lastpass[0][1][10] = 0
4692 14:47:51.214743 rx_firspass[0][1][11] = 0
4693 14:47:51.215266 rx_lastpass[0][1][11] = 0
4694 14:47:51.218106 rx_firspass[0][1][12] = 0
4695 14:47:51.221382 rx_lastpass[0][1][12] = 0
4696 14:47:51.221803 rx_firspass[0][1][13] = 0
4697 14:47:51.224706 rx_lastpass[0][1][13] = 0
4698 14:47:51.228065 rx_firspass[0][1][14] = 0
4699 14:47:51.231059 rx_lastpass[0][1][14] = 0
4700 14:47:51.231497 rx_firspass[0][1][15] = 0
4701 14:47:51.234876 rx_lastpass[0][1][15] = 0
4702 14:47:51.238017 rx_firspass[1][0][0] = 0
4703 14:47:51.238439 rx_lastpass[1][0][0] = 0
4704 14:47:51.241180 rx_firspass[1][0][1] = 0
4705 14:47:51.244648 rx_lastpass[1][0][1] = 0
4706 14:47:51.245160 rx_firspass[1][0][2] = 0
4707 14:47:51.247935 rx_lastpass[1][0][2] = 0
4708 14:47:51.251054 rx_firspass[1][0][3] = 0
4709 14:47:51.251622 rx_lastpass[1][0][3] = 0
4710 14:47:51.254742 rx_firspass[1][0][4] = 0
4711 14:47:51.257909 rx_lastpass[1][0][4] = 0
4712 14:47:51.261004 rx_firspass[1][0][5] = 0
4713 14:47:51.261428 rx_lastpass[1][0][5] = 0
4714 14:47:51.264213 rx_firspass[1][0][6] = 0
4715 14:47:51.267711 rx_lastpass[1][0][6] = 0
4716 14:47:51.268136 rx_firspass[1][0][7] = 0
4717 14:47:51.271109 rx_lastpass[1][0][7] = 0
4718 14:47:51.274500 rx_firspass[1][0][8] = 0
4719 14:47:51.275024 rx_lastpass[1][0][8] = 0
4720 14:47:51.277504 rx_firspass[1][0][9] = 0
4721 14:47:51.281209 rx_lastpass[1][0][9] = 0
4722 14:47:51.281731 rx_firspass[1][0][10] = 0
4723 14:47:51.284185 rx_lastpass[1][0][10] = 0
4724 14:47:51.287661 rx_firspass[1][0][11] = 0
4725 14:47:51.290690 rx_lastpass[1][0][11] = 0
4726 14:47:51.291206 rx_firspass[1][0][12] = 0
4727 14:47:51.294880 rx_lastpass[1][0][12] = 0
4728 14:47:51.297580 rx_firspass[1][0][13] = 0
4729 14:47:51.297992 rx_lastpass[1][0][13] = 0
4730 14:47:51.300979 rx_firspass[1][0][14] = 0
4731 14:47:51.303823 rx_lastpass[1][0][14] = 0
4732 14:47:51.307510 rx_firspass[1][0][15] = 0
4733 14:47:51.307919 rx_lastpass[1][0][15] = 0
4734 14:47:51.310861 rx_firspass[1][1][0] = 0
4735 14:47:51.314093 rx_lastpass[1][1][0] = 0
4736 14:47:51.314599 rx_firspass[1][1][1] = 0
4737 14:47:51.317202 rx_lastpass[1][1][1] = 0
4738 14:47:51.320374 rx_firspass[1][1][2] = 0
4739 14:47:51.320786 rx_lastpass[1][1][2] = 0
4740 14:47:51.324481 rx_firspass[1][1][3] = 0
4741 14:47:51.326998 rx_lastpass[1][1][3] = 0
4742 14:47:51.330691 rx_firspass[1][1][4] = 0
4743 14:47:51.331237 rx_lastpass[1][1][4] = 0
4744 14:47:51.333637 rx_firspass[1][1][5] = 0
4745 14:47:51.336880 rx_lastpass[1][1][5] = 0
4746 14:47:51.337292 rx_firspass[1][1][6] = 0
4747 14:47:51.340102 rx_lastpass[1][1][6] = 0
4748 14:47:51.343485 rx_firspass[1][1][7] = 0
4749 14:47:51.343897 rx_lastpass[1][1][7] = 0
4750 14:47:51.347208 rx_firspass[1][1][8] = 0
4751 14:47:51.350845 rx_lastpass[1][1][8] = 0
4752 14:47:51.351541 rx_firspass[1][1][9] = 0
4753 14:47:51.353464 rx_lastpass[1][1][9] = 0
4754 14:47:51.357112 rx_firspass[1][1][10] = 0
4755 14:47:51.360043 rx_lastpass[1][1][10] = 0
4756 14:47:51.360667 rx_firspass[1][1][11] = 0
4757 14:47:51.363394 rx_lastpass[1][1][11] = 0
4758 14:47:51.366604 rx_firspass[1][1][12] = 0
4759 14:47:51.367253 rx_lastpass[1][1][12] = 0
4760 14:47:51.370095 rx_firspass[1][1][13] = 0
4761 14:47:51.373019 rx_lastpass[1][1][13] = 0
4762 14:47:51.376835 rx_firspass[1][1][14] = 0
4763 14:47:51.377164 rx_lastpass[1][1][14] = 0
4764 14:47:51.379669 rx_firspass[1][1][15] = 0
4765 14:47:51.383091 rx_lastpass[1][1][15] = 0
4766 14:47:51.383447 dump params clk_delay
4767 14:47:51.386329 clk_delay[0] = 0
4768 14:47:51.386528 clk_delay[1] = 0
4769 14:47:51.389957 dump params dqs_delay
4770 14:47:51.390085 dqs_delay[0][0] = 0
4771 14:47:51.393492 dqs_delay[0][1] = 0
4772 14:47:51.393624 dqs_delay[1][0] = 0
4773 14:47:51.396732 dqs_delay[1][1] = 0
4774 14:47:51.400081 dump params delay_cell_unit = 735
4775 14:47:51.400209 dump source = 0x0
4776 14:47:51.403093 dump params frequency:800
4777 14:47:51.406370 dump params rank number:2
4778 14:47:51.406498
4779 14:47:51.409823 dump params write leveling
4780 14:47:51.409953 write leveling[0][0][0] = 0x0
4781 14:47:51.413129 write leveling[0][0][1] = 0x0
4782 14:47:51.416774 write leveling[0][1][0] = 0x0
4783 14:47:51.419939 write leveling[0][1][1] = 0x0
4784 14:47:51.423147 write leveling[1][0][0] = 0x0
4785 14:47:51.423428 write leveling[1][0][1] = 0x0
4786 14:47:51.426562 write leveling[1][1][0] = 0x0
4787 14:47:51.429814 write leveling[1][1][1] = 0x0
4788 14:47:51.433380 dump params cbt_cs
4789 14:47:51.433650 cbt_cs[0][0] = 0x0
4790 14:47:51.436231 cbt_cs[0][1] = 0x0
4791 14:47:51.436423 cbt_cs[1][0] = 0x0
4792 14:47:51.439401 cbt_cs[1][1] = 0x0
4793 14:47:51.439638 dump params cbt_mr12
4794 14:47:51.443050 cbt_mr12[0][0] = 0x0
4795 14:47:51.443317 cbt_mr12[0][1] = 0x0
4796 14:47:51.446208 cbt_mr12[1][0] = 0x0
4797 14:47:51.449601 cbt_mr12[1][1] = 0x0
4798 14:47:51.449948 dump params tx window
4799 14:47:51.453123 tx_center_min[0][0][0] = 0
4800 14:47:51.456482 tx_center_max[0][0][0] = 0
4801 14:47:51.456996 tx_center_min[0][0][1] = 0
4802 14:47:51.460001 tx_center_max[0][0][1] = 0
4803 14:47:51.463803 tx_center_min[0][1][0] = 0
4804 14:47:51.466301 tx_center_max[0][1][0] = 0
4805 14:47:51.466712 tx_center_min[0][1][1] = 0
4806 14:47:51.469541 tx_center_max[0][1][1] = 0
4807 14:47:51.472929 tx_center_min[1][0][0] = 0
4808 14:47:51.476367 tx_center_max[1][0][0] = 0
4809 14:47:51.476777 tx_center_min[1][0][1] = 0
4810 14:47:51.479954 tx_center_max[1][0][1] = 0
4811 14:47:51.483007 tx_center_min[1][1][0] = 0
4812 14:47:51.486043 tx_center_max[1][1][0] = 0
4813 14:47:51.486557 tx_center_min[1][1][1] = 0
4814 14:47:51.489457 tx_center_max[1][1][1] = 0
4815 14:47:51.492693 dump params tx window
4816 14:47:51.493106 tx_win_center[0][0][0] = 0
4817 14:47:51.496162 tx_first_pass[0][0][0] = 0
4818 14:47:51.499546 tx_last_pass[0][0][0] = 0
4819 14:47:51.499957 tx_win_center[0][0][1] = 0
4820 14:47:51.503321 tx_first_pass[0][0][1] = 0
4821 14:47:51.506712 tx_last_pass[0][0][1] = 0
4822 14:47:51.509796 tx_win_center[0][0][2] = 0
4823 14:47:51.510308 tx_first_pass[0][0][2] = 0
4824 14:47:51.512913 tx_last_pass[0][0][2] = 0
4825 14:47:51.516095 tx_win_center[0][0][3] = 0
4826 14:47:51.520098 tx_first_pass[0][0][3] = 0
4827 14:47:51.520612 tx_last_pass[0][0][3] = 0
4828 14:47:51.523140 tx_win_center[0][0][4] = 0
4829 14:47:51.526827 tx_first_pass[0][0][4] = 0
4830 14:47:51.527339 tx_last_pass[0][0][4] = 0
4831 14:47:51.529229 tx_win_center[0][0][5] = 0
4832 14:47:51.532650 tx_first_pass[0][0][5] = 0
4833 14:47:51.536498 tx_last_pass[0][0][5] = 0
4834 14:47:51.536908 tx_win_center[0][0][6] = 0
4835 14:47:51.539751 tx_first_pass[0][0][6] = 0
4836 14:47:51.542960 tx_last_pass[0][0][6] = 0
4837 14:47:51.546023 tx_win_center[0][0][7] = 0
4838 14:47:51.546435 tx_first_pass[0][0][7] = 0
4839 14:47:51.550014 tx_last_pass[0][0][7] = 0
4840 14:47:51.552987 tx_win_center[0][0][8] = 0
4841 14:47:51.553399 tx_first_pass[0][0][8] = 0
4842 14:47:51.556479 tx_last_pass[0][0][8] = 0
4843 14:47:51.559940 tx_win_center[0][0][9] = 0
4844 14:47:51.562560 tx_first_pass[0][0][9] = 0
4845 14:47:51.562971 tx_last_pass[0][0][9] = 0
4846 14:47:51.565925 tx_win_center[0][0][10] = 0
4847 14:47:51.569434 tx_first_pass[0][0][10] = 0
4848 14:47:51.572672 tx_last_pass[0][0][10] = 0
4849 14:47:51.573083 tx_win_center[0][0][11] = 0
4850 14:47:51.576322 tx_first_pass[0][0][11] = 0
4851 14:47:51.579483 tx_last_pass[0][0][11] = 0
4852 14:47:51.583194 tx_win_center[0][0][12] = 0
4853 14:47:51.583805 tx_first_pass[0][0][12] = 0
4854 14:47:51.585990 tx_last_pass[0][0][12] = 0
4855 14:47:51.589254 tx_win_center[0][0][13] = 0
4856 14:47:51.593083 tx_first_pass[0][0][13] = 0
4857 14:47:51.593495 tx_last_pass[0][0][13] = 0
4858 14:47:51.595876 tx_win_center[0][0][14] = 0
4859 14:47:51.599369 tx_first_pass[0][0][14] = 0
4860 14:47:51.602903 tx_last_pass[0][0][14] = 0
4861 14:47:51.603449 tx_win_center[0][0][15] = 0
4862 14:47:51.606450 tx_first_pass[0][0][15] = 0
4863 14:47:51.609305 tx_last_pass[0][0][15] = 0
4864 14:47:51.612886 tx_win_center[0][1][0] = 0
4865 14:47:51.613442 tx_first_pass[0][1][0] = 0
4866 14:47:51.616341 tx_last_pass[0][1][0] = 0
4867 14:47:51.619223 tx_win_center[0][1][1] = 0
4868 14:47:51.622849 tx_first_pass[0][1][1] = 0
4869 14:47:51.623372 tx_last_pass[0][1][1] = 0
4870 14:47:51.625904 tx_win_center[0][1][2] = 0
4871 14:47:51.629514 tx_first_pass[0][1][2] = 0
4872 14:47:51.629937 tx_last_pass[0][1][2] = 0
4873 14:47:51.633298 tx_win_center[0][1][3] = 0
4874 14:47:51.636058 tx_first_pass[0][1][3] = 0
4875 14:47:51.638958 tx_last_pass[0][1][3] = 0
4876 14:47:51.639382 tx_win_center[0][1][4] = 0
4877 14:47:51.642625 tx_first_pass[0][1][4] = 0
4878 14:47:51.645599 tx_last_pass[0][1][4] = 0
4879 14:47:51.649381 tx_win_center[0][1][5] = 0
4880 14:47:51.649904 tx_first_pass[0][1][5] = 0
4881 14:47:51.652458 tx_last_pass[0][1][5] = 0
4882 14:47:51.655476 tx_win_center[0][1][6] = 0
4883 14:47:51.655910 tx_first_pass[0][1][6] = 0
4884 14:47:51.659062 tx_last_pass[0][1][6] = 0
4885 14:47:51.662507 tx_win_center[0][1][7] = 0
4886 14:47:51.665703 tx_first_pass[0][1][7] = 0
4887 14:47:51.666126 tx_last_pass[0][1][7] = 0
4888 14:47:51.669026 tx_win_center[0][1][8] = 0
4889 14:47:51.672040 tx_first_pass[0][1][8] = 0
4890 14:47:51.675585 tx_last_pass[0][1][8] = 0
4891 14:47:51.676100 tx_win_center[0][1][9] = 0
4892 14:47:51.679260 tx_first_pass[0][1][9] = 0
4893 14:47:51.682778 tx_last_pass[0][1][9] = 0
4894 14:47:51.683330 tx_win_center[0][1][10] = 0
4895 14:47:51.685770 tx_first_pass[0][1][10] = 0
4896 14:47:51.688891 tx_last_pass[0][1][10] = 0
4897 14:47:51.692030 tx_win_center[0][1][11] = 0
4898 14:47:51.692455 tx_first_pass[0][1][11] = 0
4899 14:47:51.695480 tx_last_pass[0][1][11] = 0
4900 14:47:51.698956 tx_win_center[0][1][12] = 0
4901 14:47:51.702867 tx_first_pass[0][1][12] = 0
4902 14:47:51.703455 tx_last_pass[0][1][12] = 0
4903 14:47:51.705255 tx_win_center[0][1][13] = 0
4904 14:47:51.708447 tx_first_pass[0][1][13] = 0
4905 14:47:51.711980 tx_last_pass[0][1][13] = 0
4906 14:47:51.712403 tx_win_center[0][1][14] = 0
4907 14:47:51.715147 tx_first_pass[0][1][14] = 0
4908 14:47:51.718820 tx_last_pass[0][1][14] = 0
4909 14:47:51.722734 tx_win_center[0][1][15] = 0
4910 14:47:51.725746 tx_first_pass[0][1][15] = 0
4911 14:47:51.726169 tx_last_pass[0][1][15] = 0
4912 14:47:51.729195 tx_win_center[1][0][0] = 0
4913 14:47:51.732220 tx_first_pass[1][0][0] = 0
4914 14:47:51.732642 tx_last_pass[1][0][0] = 0
4915 14:47:51.735520 tx_win_center[1][0][1] = 0
4916 14:47:51.738729 tx_first_pass[1][0][1] = 0
4917 14:47:51.742145 tx_last_pass[1][0][1] = 0
4918 14:47:51.742566 tx_win_center[1][0][2] = 0
4919 14:47:51.746152 tx_first_pass[1][0][2] = 0
4920 14:47:51.748987 tx_last_pass[1][0][2] = 0
4921 14:47:51.749408 tx_win_center[1][0][3] = 0
4922 14:47:51.752123 tx_first_pass[1][0][3] = 0
4923 14:47:51.755688 tx_last_pass[1][0][3] = 0
4924 14:47:51.758831 tx_win_center[1][0][4] = 0
4925 14:47:51.759529 tx_first_pass[1][0][4] = 0
4926 14:47:51.762218 tx_last_pass[1][0][4] = 0
4927 14:47:51.765201 tx_win_center[1][0][5] = 0
4928 14:47:51.768846 tx_first_pass[1][0][5] = 0
4929 14:47:51.769361 tx_last_pass[1][0][5] = 0
4930 14:47:51.772103 tx_win_center[1][0][6] = 0
4931 14:47:51.775530 tx_first_pass[1][0][6] = 0
4932 14:47:51.776173 tx_last_pass[1][0][6] = 0
4933 14:47:51.778660 tx_win_center[1][0][7] = 0
4934 14:47:51.782385 tx_first_pass[1][0][7] = 0
4935 14:47:51.785250 tx_last_pass[1][0][7] = 0
4936 14:47:51.785863 tx_win_center[1][0][8] = 0
4937 14:47:51.788657 tx_first_pass[1][0][8] = 0
4938 14:47:51.791995 tx_last_pass[1][0][8] = 0
4939 14:47:51.795238 tx_win_center[1][0][9] = 0
4940 14:47:51.795756 tx_first_pass[1][0][9] = 0
4941 14:47:51.798813 tx_last_pass[1][0][9] = 0
4942 14:47:51.802001 tx_win_center[1][0][10] = 0
4943 14:47:51.802423 tx_first_pass[1][0][10] = 0
4944 14:47:51.805775 tx_last_pass[1][0][10] = 0
4945 14:47:51.808958 tx_win_center[1][0][11] = 0
4946 14:47:51.812110 tx_first_pass[1][0][11] = 0
4947 14:47:51.812534 tx_last_pass[1][0][11] = 0
4948 14:47:51.815616 tx_win_center[1][0][12] = 0
4949 14:47:51.818831 tx_first_pass[1][0][12] = 0
4950 14:47:51.822244 tx_last_pass[1][0][12] = 0
4951 14:47:51.822664 tx_win_center[1][0][13] = 0
4952 14:47:51.825682 tx_first_pass[1][0][13] = 0
4953 14:47:51.828803 tx_last_pass[1][0][13] = 0
4954 14:47:51.831626 tx_win_center[1][0][14] = 0
4955 14:47:51.835392 tx_first_pass[1][0][14] = 0
4956 14:47:51.836103 tx_last_pass[1][0][14] = 0
4957 14:47:51.838905 tx_win_center[1][0][15] = 0
4958 14:47:51.842436 tx_first_pass[1][0][15] = 0
4959 14:47:51.842962 tx_last_pass[1][0][15] = 0
4960 14:47:51.845692 tx_win_center[1][1][0] = 0
4961 14:47:51.849266 tx_first_pass[1][1][0] = 0
4962 14:47:51.851914 tx_last_pass[1][1][0] = 0
4963 14:47:51.852358 tx_win_center[1][1][1] = 0
4964 14:47:51.855387 tx_first_pass[1][1][1] = 0
4965 14:47:51.858996 tx_last_pass[1][1][1] = 0
4966 14:47:51.862279 tx_win_center[1][1][2] = 0
4967 14:47:51.862791 tx_first_pass[1][1][2] = 0
4968 14:47:51.865702 tx_last_pass[1][1][2] = 0
4969 14:47:51.868915 tx_win_center[1][1][3] = 0
4970 14:47:51.869340 tx_first_pass[1][1][3] = 0
4971 14:47:51.871861 tx_last_pass[1][1][3] = 0
4972 14:47:51.875681 tx_win_center[1][1][4] = 0
4973 14:47:51.879077 tx_first_pass[1][1][4] = 0
4974 14:47:51.879676 tx_last_pass[1][1][4] = 0
4975 14:47:51.882445 tx_win_center[1][1][5] = 0
4976 14:47:51.885965 tx_first_pass[1][1][5] = 0
4977 14:47:51.888445 tx_last_pass[1][1][5] = 0
4978 14:47:51.889079 tx_win_center[1][1][6] = 0
4979 14:47:51.892034 tx_first_pass[1][1][6] = 0
4980 14:47:51.895069 tx_last_pass[1][1][6] = 0
4981 14:47:51.895522 tx_win_center[1][1][7] = 0
4982 14:47:51.898624 tx_first_pass[1][1][7] = 0
4983 14:47:51.901990 tx_last_pass[1][1][7] = 0
4984 14:47:51.905205 tx_win_center[1][1][8] = 0
4985 14:47:51.905626 tx_first_pass[1][1][8] = 0
4986 14:47:51.908574 tx_last_pass[1][1][8] = 0
4987 14:47:51.911868 tx_win_center[1][1][9] = 0
4988 14:47:51.915529 tx_first_pass[1][1][9] = 0
4989 14:47:51.916096 tx_last_pass[1][1][9] = 0
4990 14:47:51.918960 tx_win_center[1][1][10] = 0
4991 14:47:51.921907 tx_first_pass[1][1][10] = 0
4992 14:47:51.925259 tx_last_pass[1][1][10] = 0
4993 14:47:51.925786 tx_win_center[1][1][11] = 0
4994 14:47:51.928791 tx_first_pass[1][1][11] = 0
4995 14:47:51.932410 tx_last_pass[1][1][11] = 0
4996 14:47:51.935481 tx_win_center[1][1][12] = 0
4997 14:47:51.936008 tx_first_pass[1][1][12] = 0
4998 14:47:51.938541 tx_last_pass[1][1][12] = 0
4999 14:47:51.942052 tx_win_center[1][1][13] = 0
5000 14:47:51.945382 tx_first_pass[1][1][13] = 0
5001 14:47:51.945916 tx_last_pass[1][1][13] = 0
5002 14:47:51.948382 tx_win_center[1][1][14] = 0
5003 14:47:51.951912 tx_first_pass[1][1][14] = 0
5004 14:47:51.955183 tx_last_pass[1][1][14] = 0
5005 14:47:51.955740 tx_win_center[1][1][15] = 0
5006 14:47:51.958655 tx_first_pass[1][1][15] = 0
5007 14:47:51.961570 tx_last_pass[1][1][15] = 0
5008 14:47:51.961992 dump params rx window
5009 14:47:51.964645 rx_firspass[0][0][0] = 0
5010 14:47:51.968457 rx_lastpass[0][0][0] = 0
5011 14:47:51.968874 rx_firspass[0][0][1] = 0
5012 14:47:51.971378 rx_lastpass[0][0][1] = 0
5013 14:47:51.974862 rx_firspass[0][0][2] = 0
5014 14:47:51.978599 rx_lastpass[0][0][2] = 0
5015 14:47:51.979125 rx_firspass[0][0][3] = 0
5016 14:47:51.981846 rx_lastpass[0][0][3] = 0
5017 14:47:51.984880 rx_firspass[0][0][4] = 0
5018 14:47:51.985300 rx_lastpass[0][0][4] = 0
5019 14:47:51.988369 rx_firspass[0][0][5] = 0
5020 14:47:51.991467 rx_lastpass[0][0][5] = 0
5021 14:47:51.991890 rx_firspass[0][0][6] = 0
5022 14:47:51.994693 rx_lastpass[0][0][6] = 0
5023 14:47:51.998096 rx_firspass[0][0][7] = 0
5024 14:47:51.998522 rx_lastpass[0][0][7] = 0
5025 14:47:52.001670 rx_firspass[0][0][8] = 0
5026 14:47:52.005032 rx_lastpass[0][0][8] = 0
5027 14:47:52.005451 rx_firspass[0][0][9] = 0
5028 14:47:52.008274 rx_lastpass[0][0][9] = 0
5029 14:47:52.011217 rx_firspass[0][0][10] = 0
5030 14:47:52.014743 rx_lastpass[0][0][10] = 0
5031 14:47:52.015277 rx_firspass[0][0][11] = 0
5032 14:47:52.018245 rx_lastpass[0][0][11] = 0
5033 14:47:52.021464 rx_firspass[0][0][12] = 0
5034 14:47:52.021930 rx_lastpass[0][0][12] = 0
5035 14:47:52.024961 rx_firspass[0][0][13] = 0
5036 14:47:52.027955 rx_lastpass[0][0][13] = 0
5037 14:47:52.031399 rx_firspass[0][0][14] = 0
5038 14:47:52.031859 rx_lastpass[0][0][14] = 0
5039 14:47:52.034656 rx_firspass[0][0][15] = 0
5040 14:47:52.037837 rx_lastpass[0][0][15] = 0
5041 14:47:52.038258 rx_firspass[0][1][0] = 0
5042 14:47:52.041432 rx_lastpass[0][1][0] = 0
5043 14:47:52.044777 rx_firspass[0][1][1] = 0
5044 14:47:52.045307 rx_lastpass[0][1][1] = 0
5045 14:47:52.048178 rx_firspass[0][1][2] = 0
5046 14:47:52.051796 rx_lastpass[0][1][2] = 0
5047 14:47:52.054893 rx_firspass[0][1][3] = 0
5048 14:47:52.055314 rx_lastpass[0][1][3] = 0
5049 14:47:52.058415 rx_firspass[0][1][4] = 0
5050 14:47:52.061986 rx_lastpass[0][1][4] = 0
5051 14:47:52.062515 rx_firspass[0][1][5] = 0
5052 14:47:52.064373 rx_lastpass[0][1][5] = 0
5053 14:47:52.068203 rx_firspass[0][1][6] = 0
5054 14:47:52.068737 rx_lastpass[0][1][6] = 0
5055 14:47:52.071528 rx_firspass[0][1][7] = 0
5056 14:47:52.074571 rx_lastpass[0][1][7] = 0
5057 14:47:52.075094 rx_firspass[0][1][8] = 0
5058 14:47:52.078427 rx_lastpass[0][1][8] = 0
5059 14:47:52.081548 rx_firspass[0][1][9] = 0
5060 14:47:52.082075 rx_lastpass[0][1][9] = 0
5061 14:47:52.084103 rx_firspass[0][1][10] = 0
5062 14:47:52.088405 rx_lastpass[0][1][10] = 0
5063 14:47:52.091191 rx_firspass[0][1][11] = 0
5064 14:47:52.091644 rx_lastpass[0][1][11] = 0
5065 14:47:52.094454 rx_firspass[0][1][12] = 0
5066 14:47:52.097760 rx_lastpass[0][1][12] = 0
5067 14:47:52.098180 rx_firspass[0][1][13] = 0
5068 14:47:52.101120 rx_lastpass[0][1][13] = 0
5069 14:47:52.104739 rx_firspass[0][1][14] = 0
5070 14:47:52.107816 rx_lastpass[0][1][14] = 0
5071 14:47:52.108237 rx_firspass[0][1][15] = 0
5072 14:47:52.111196 rx_lastpass[0][1][15] = 0
5073 14:47:52.114262 rx_firspass[1][0][0] = 0
5074 14:47:52.114681 rx_lastpass[1][0][0] = 0
5075 14:47:52.117409 rx_firspass[1][0][1] = 0
5076 14:47:52.121240 rx_lastpass[1][0][1] = 0
5077 14:47:52.121772 rx_firspass[1][0][2] = 0
5078 14:47:52.124127 rx_lastpass[1][0][2] = 0
5079 14:47:52.127495 rx_firspass[1][0][3] = 0
5080 14:47:52.131250 rx_lastpass[1][0][3] = 0
5081 14:47:52.131831 rx_firspass[1][0][4] = 0
5082 14:47:52.134586 rx_lastpass[1][0][4] = 0
5083 14:47:52.137670 rx_firspass[1][0][5] = 0
5084 14:47:52.138090 rx_lastpass[1][0][5] = 0
5085 14:47:52.141138 rx_firspass[1][0][6] = 0
5086 14:47:52.144218 rx_lastpass[1][0][6] = 0
5087 14:47:52.144638 rx_firspass[1][0][7] = 0
5088 14:47:52.147647 rx_lastpass[1][0][7] = 0
5089 14:47:52.150748 rx_firspass[1][0][8] = 0
5090 14:47:52.151269 rx_lastpass[1][0][8] = 0
5091 14:47:52.154014 rx_firspass[1][0][9] = 0
5092 14:47:52.157371 rx_lastpass[1][0][9] = 0
5093 14:47:52.161057 rx_firspass[1][0][10] = 0
5094 14:47:52.161600 rx_lastpass[1][0][10] = 0
5095 14:47:52.164570 rx_firspass[1][0][11] = 0
5096 14:47:52.167567 rx_lastpass[1][0][11] = 0
5097 14:47:52.168092 rx_firspass[1][0][12] = 0
5098 14:47:52.170739 rx_lastpass[1][0][12] = 0
5099 14:47:52.173959 rx_firspass[1][0][13] = 0
5100 14:47:52.177212 rx_lastpass[1][0][13] = 0
5101 14:47:52.177630 rx_firspass[1][0][14] = 0
5102 14:47:52.180470 rx_lastpass[1][0][14] = 0
5103 14:47:52.184258 rx_firspass[1][0][15] = 0
5104 14:47:52.184778 rx_lastpass[1][0][15] = 0
5105 14:47:52.186851 rx_firspass[1][1][0] = 0
5106 14:47:52.190933 rx_lastpass[1][1][0] = 0
5107 14:47:52.191494 rx_firspass[1][1][1] = 0
5108 14:47:52.193906 rx_lastpass[1][1][1] = 0
5109 14:47:52.197175 rx_firspass[1][1][2] = 0
5110 14:47:52.200116 rx_lastpass[1][1][2] = 0
5111 14:47:52.200630 rx_firspass[1][1][3] = 0
5112 14:47:52.203964 rx_lastpass[1][1][3] = 0
5113 14:47:52.207355 rx_firspass[1][1][4] = 0
5114 14:47:52.207943 rx_lastpass[1][1][4] = 0
5115 14:47:52.210401 rx_firspass[1][1][5] = 0
5116 14:47:52.214215 rx_lastpass[1][1][5] = 0
5117 14:47:52.214739 rx_firspass[1][1][6] = 0
5118 14:47:52.217058 rx_lastpass[1][1][6] = 0
5119 14:47:52.220084 rx_firspass[1][1][7] = 0
5120 14:47:52.220507 rx_lastpass[1][1][7] = 0
5121 14:47:52.223683 rx_firspass[1][1][8] = 0
5122 14:47:52.226994 rx_lastpass[1][1][8] = 0
5123 14:47:52.227449 rx_firspass[1][1][9] = 0
5124 14:47:52.230478 rx_lastpass[1][1][9] = 0
5125 14:47:52.233528 rx_firspass[1][1][10] = 0
5126 14:47:52.236856 rx_lastpass[1][1][10] = 0
5127 14:47:52.237279 rx_firspass[1][1][11] = 0
5128 14:47:52.240039 rx_lastpass[1][1][11] = 0
5129 14:47:52.243574 rx_firspass[1][1][12] = 0
5130 14:47:52.244101 rx_lastpass[1][1][12] = 0
5131 14:47:52.247039 rx_firspass[1][1][13] = 0
5132 14:47:52.249983 rx_lastpass[1][1][13] = 0
5133 14:47:52.253651 rx_firspass[1][1][14] = 0
5134 14:47:52.254175 rx_lastpass[1][1][14] = 0
5135 14:47:52.256573 rx_firspass[1][1][15] = 0
5136 14:47:52.259784 rx_lastpass[1][1][15] = 0
5137 14:47:52.260206 dump params clk_delay
5138 14:47:52.263346 clk_delay[0] = 0
5139 14:47:52.263789 clk_delay[1] = 0
5140 14:47:52.266682 dump params dqs_delay
5141 14:47:52.267103 dqs_delay[0][0] = 0
5142 14:47:52.270205 dqs_delay[0][1] = 0
5143 14:47:52.273620 dqs_delay[1][0] = 0
5144 14:47:52.274144 dqs_delay[1][1] = 0
5145 14:47:52.276703 dump params delay_cell_unit = 735
5146 14:47:52.280339 mt_set_emi_preloader end
5147 14:47:52.283351 [mt_mem_init] dram size: 0x100000000, rank number: 2
5148 14:47:52.287079 [complex_mem_test] start addr:0x40000000, len:20480
5149 14:47:52.325174 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5150 14:47:52.331530 [complex_mem_test] start addr:0x80000000, len:20480
5151 14:47:52.367032 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5152 14:47:52.374160 [complex_mem_test] start addr:0xc0000000, len:20480
5153 14:47:52.409769 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5154 14:47:52.415859 [complex_mem_test] start addr:0x56000000, len:8192
5155 14:47:52.433430 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5156 14:47:52.433976 ddr_geometry:1
5157 14:47:52.439574 [complex_mem_test] start addr:0x80000000, len:8192
5158 14:47:52.456515 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5159 14:47:52.459693 dram_init: dram init end (result: 0)
5160 14:47:52.466270 Successfully loaded DRAM blobs and ran DRAM calibration
5161 14:47:52.476200 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5162 14:47:52.476626 CBMEM:
5163 14:47:52.479535 IMD: root @ 00000000fffff000 254 entries.
5164 14:47:52.482910 IMD: root @ 00000000ffffec00 62 entries.
5165 14:47:52.489489 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5166 14:47:52.496052 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5167 14:47:52.499845 in-header: 03 a1 00 00 08 00 00 00
5168 14:47:52.502733 in-data: 84 60 60 10 00 00 00 00
5169 14:47:52.505858 Chrome EC: clear events_b mask to 0x0000000020004000
5170 14:47:52.514254 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5171 14:47:52.517511 in-header: 03 fd 00 00 00 00 00 00
5172 14:47:52.518043 in-data:
5173 14:47:52.523768 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5174 14:47:52.524191 CBFS @ 21000 size 3d4000
5175 14:47:52.530816 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5176 14:47:52.534238 CBFS: Locating 'fallback/ramstage'
5177 14:47:52.537070 CBFS: Found @ offset 10d40 size d563
5178 14:47:52.558767 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5179 14:47:52.570646 Accumulated console time in romstage 13599 ms
5180 14:47:52.571194
5181 14:47:52.571560
5182 14:47:52.580797 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5183 14:47:52.583568 ARM64: Exception handlers installed.
5184 14:47:52.584089 ARM64: Testing exception
5185 14:47:52.586859 ARM64: Done test exception
5186 14:47:52.590930 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5187 14:47:52.593687 Manufacturer: ef
5188 14:47:52.596811 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5189 14:47:52.603744 WARNING: RO_VPD is uninitialized or empty.
5190 14:47:52.607336 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5191 14:47:52.610476 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5192 14:47:52.620327 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5193 14:47:52.623864 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5194 14:47:52.630447 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5195 14:47:52.631014 Enumerating buses...
5196 14:47:52.636963 Show all devs... Before device enumeration.
5197 14:47:52.637509 Root Device: enabled 1
5198 14:47:52.639972 CPU_CLUSTER: 0: enabled 1
5199 14:47:52.640392 CPU: 00: enabled 1
5200 14:47:52.643485 Compare with tree...
5201 14:47:52.646677 Root Device: enabled 1
5202 14:47:52.647097 CPU_CLUSTER: 0: enabled 1
5203 14:47:52.650017 CPU: 00: enabled 1
5204 14:47:52.653116 Root Device scanning...
5205 14:47:52.656301 root_dev_scan_bus for Root Device
5206 14:47:52.656773 CPU_CLUSTER: 0 enabled
5207 14:47:52.660015 root_dev_scan_bus for Root Device done
5208 14:47:52.666937 scan_bus: scanning of bus Root Device took 10690 usecs
5209 14:47:52.667539 done
5210 14:47:52.670110 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5211 14:47:52.672813 Allocating resources...
5212 14:47:52.673366 Reading resources...
5213 14:47:52.676158 Root Device read_resources bus 0 link: 0
5214 14:47:52.683483 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5215 14:47:52.683908 CPU: 00 missing read_resources
5216 14:47:52.689973 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5217 14:47:52.693222 Root Device read_resources bus 0 link: 0 done
5218 14:47:52.697001 Done reading resources.
5219 14:47:52.699593 Show resources in subtree (Root Device)...After reading.
5220 14:47:52.703092 Root Device child on link 0 CPU_CLUSTER: 0
5221 14:47:52.706514 CPU_CLUSTER: 0 child on link 0 CPU: 00
5222 14:47:52.716581 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5223 14:47:52.717110 CPU: 00
5224 14:47:52.719878 Setting resources...
5225 14:47:52.723558 Root Device assign_resources, bus 0 link: 0
5226 14:47:52.726771 CPU_CLUSTER: 0 missing set_resources
5227 14:47:52.730009 Root Device assign_resources, bus 0 link: 0
5228 14:47:52.733432 Done setting resources.
5229 14:47:52.740053 Show resources in subtree (Root Device)...After assigning values.
5230 14:47:52.743356 Root Device child on link 0 CPU_CLUSTER: 0
5231 14:47:52.746820 CPU_CLUSTER: 0 child on link 0 CPU: 00
5232 14:47:52.755973 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5233 14:47:52.756423 CPU: 00
5234 14:47:52.759477 Done allocating resources.
5235 14:47:52.762475 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5236 14:47:52.766395 Enabling resources...
5237 14:47:52.766828 done.
5238 14:47:52.769581 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5239 14:47:52.772627 Initializing devices...
5240 14:47:52.773063 Root Device init ...
5241 14:47:52.776355 mainboard_init: Starting display init.
5242 14:47:52.779225 ADC[4]: Raw value=76102 ID=0
5243 14:47:52.803157 anx7625_power_on_init: Init interface.
5244 14:47:52.806821 anx7625_disable_pd_protocol: Disabled PD feature.
5245 14:47:52.812833 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5246 14:47:52.859267 anx7625_start_dp_work: Secure OCM version=00
5247 14:47:52.862502 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5248 14:47:52.879920 sp_tx_get_edid_block: EDID Block = 1
5249 14:47:52.997315 Extracted contents:
5250 14:47:52.999948 header: 00 ff ff ff ff ff ff 00
5251 14:47:53.003298 serial number: 06 af 5c 14 00 00 00 00 00 1a
5252 14:47:53.007045 version: 01 04
5253 14:47:53.009979 basic params: 95 1a 0e 78 02
5254 14:47:53.013565 chroma info: 99 85 95 55 56 92 28 22 50 54
5255 14:47:53.016971 established: 00 00 00
5256 14:47:53.023519 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5257 14:47:53.026660 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5258 14:47:53.033188 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5259 14:47:53.040186 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5260 14:47:53.046864 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5261 14:47:53.050284 extensions: 00
5262 14:47:53.050373 checksum: ae
5263 14:47:53.050444
5264 14:47:53.053715 Manufacturer: AUO Model 145c Serial Number 0
5265 14:47:53.056925 Made week 0 of 2016
5266 14:47:53.057015 EDID version: 1.4
5267 14:47:53.060285 Digital display
5268 14:47:53.063260 6 bits per primary color channel
5269 14:47:53.063352 DisplayPort interface
5270 14:47:53.066473 Maximum image size: 26 cm x 14 cm
5271 14:47:53.070245 Gamma: 220%
5272 14:47:53.070334 Check DPMS levels
5273 14:47:53.073585 Supported color formats: RGB 4:4:4
5274 14:47:53.076659 First detailed timing is preferred timing
5275 14:47:53.080395 Established timings supported:
5276 14:47:53.083544 Standard timings supported:
5277 14:47:53.083633 Detailed timings
5278 14:47:53.086617 Hex of detail: ce1d56ea50001a3030204600009010000018
5279 14:47:53.093399 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5280 14:47:53.096314 0556 0586 05a6 0640 hborder 0
5281 14:47:53.099821 0300 0304 030a 031a vborder 0
5282 14:47:53.103388 -hsync -vsync
5283 14:47:53.106710 Did detailed timing
5284 14:47:53.110136 Hex of detail: 0000000f0000000000000000000000000020
5285 14:47:53.113546 Manufacturer-specified data, tag 15
5286 14:47:53.116970 Hex of detail: 000000fe0041554f0a202020202020202020
5287 14:47:53.120235 ASCII string: AUO
5288 14:47:53.123677 Hex of detail: 000000fe004231313658414230312e34200a
5289 14:47:53.126776 ASCII string: B116XAB01.4
5290 14:47:53.127150 Checksum
5291 14:47:53.130377 Checksum: 0xae (valid)
5292 14:47:53.137211 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5293 14:47:53.137766 DSI data_rate: 457800000 bps
5294 14:47:53.144059 anx7625_parse_edid: set default k value to 0x3d for panel
5295 14:47:53.147287 anx7625_parse_edid: pixelclock(76300).
5296 14:47:53.151124 hactive(1366), hsync(32), hfp(48), hbp(154)
5297 14:47:53.154160 vactive(768), vsync(6), vfp(4), vbp(16)
5298 14:47:53.157421 anx7625_dsi_config: config dsi.
5299 14:47:53.165333 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5300 14:47:53.186572 anx7625_dsi_config: success to config DSI
5301 14:47:53.189369 anx7625_dp_start: MIPI phy setup OK.
5302 14:47:53.193337 [SSUSB] Setting up USB HOST controller...
5303 14:47:53.196431 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5304 14:47:53.199532 [SSUSB] phy power-on done.
5305 14:47:53.203519 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5306 14:47:53.206737 in-header: 03 fc 01 00 00 00 00 00
5307 14:47:53.207153 in-data:
5308 14:47:53.210646 handle_proto3_response: EC response with error code: 1
5309 14:47:53.213983 SPM: pcm index = 1
5310 14:47:53.217327 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5311 14:47:53.219919 CBFS @ 21000 size 3d4000
5312 14:47:53.227087 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5313 14:47:53.230513 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5314 14:47:53.233914 CBFS: Found @ offset 1e7c0 size 1026
5315 14:47:53.240274 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5316 14:47:53.243624 SPM: binary array size = 2988
5317 14:47:53.247456 SPM: version = pcm_allinone_v1.17.2_20180829
5318 14:47:53.250273 SPM binary loaded in 32 msecs
5319 14:47:53.257976 spm_kick_im_to_fetch: ptr = 000000004021eec2
5320 14:47:53.261209 spm_kick_im_to_fetch: len = 2988
5321 14:47:53.261625 SPM: spm_kick_pcm_to_run
5322 14:47:53.263846 SPM: spm_kick_pcm_to_run done
5323 14:47:53.267893 SPM: spm_init done in 52 msecs
5324 14:47:53.271023 Root Device init finished in 494970 usecs
5325 14:47:53.274269 CPU_CLUSTER: 0 init ...
5326 14:47:53.284003 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5327 14:47:53.287251 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5328 14:47:53.290533 CBFS @ 21000 size 3d4000
5329 14:47:53.293970 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5330 14:47:53.297341 CBFS: Locating 'sspm.bin'
5331 14:47:53.300624 CBFS: Found @ offset 208c0 size 41cb
5332 14:47:53.310450 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5333 14:47:53.318746 CPU_CLUSTER: 0 init finished in 42799 usecs
5334 14:47:53.319223 Devices initialized
5335 14:47:53.322088 Show all devs... After init.
5336 14:47:53.325496 Root Device: enabled 1
5337 14:47:53.325916 CPU_CLUSTER: 0: enabled 1
5338 14:47:53.328983 CPU: 00: enabled 1
5339 14:47:53.331737 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5340 14:47:53.335462 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5341 14:47:53.338837 ELOG: NV offset 0x558000 size 0x1000
5342 14:47:53.346448 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5343 14:47:53.353144 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5344 14:47:53.355935 ELOG: Event(17) added with size 13 at 2024-06-04 14:46:56 UTC
5345 14:47:53.359651 out: cmd=0x121: 03 db 21 01 00 00 00 00
5346 14:47:53.363164 in-header: 03 97 00 00 2c 00 00 00
5347 14:47:53.375959 in-data: 61 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 47 87 03 00 06 80 00 00 2d 7c 07 00 06 80 00 00 ee 3a 01 00 06 80 00 00 2c 8c 02 00
5348 14:47:53.379735 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5349 14:47:53.382546 in-header: 03 19 00 00 08 00 00 00
5350 14:47:53.386161 in-data: a2 e0 47 00 13 00 00 00
5351 14:47:53.389211 Chrome EC: UHEPI supported
5352 14:47:53.395812 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5353 14:47:53.399457 in-header: 03 e1 00 00 08 00 00 00
5354 14:47:53.402565 in-data: 84 20 60 10 00 00 00 00
5355 14:47:53.405842 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5356 14:47:53.413080 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5357 14:47:53.416065 in-header: 03 e1 00 00 08 00 00 00
5358 14:47:53.419359 in-data: 84 20 60 10 00 00 00 00
5359 14:47:53.425985 ELOG: Event(A1) added with size 10 at 2024-06-04 14:46:56 UTC
5360 14:47:53.432783 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5361 14:47:53.436147 ELOG: Event(A0) added with size 9 at 2024-06-04 14:46:56 UTC
5362 14:47:53.442416 elog_add_boot_reason: Logged dev mode boot
5363 14:47:53.442806 Finalize devices...
5364 14:47:53.446105 Devices finalized
5365 14:47:53.449512 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5366 14:47:53.452188 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5367 14:47:53.459259 ELOG: Event(91) added with size 10 at 2024-06-04 14:46:56 UTC
5368 14:47:53.462503 Writing coreboot table at 0xffeda000
5369 14:47:53.466061 0. 0000000000114000-000000000011efff: RAMSTAGE
5370 14:47:53.472295 1. 0000000040000000-000000004023cfff: RAMSTAGE
5371 14:47:53.475631 2. 000000004023d000-00000000545fffff: RAM
5372 14:47:53.478465 3. 0000000054600000-000000005465ffff: BL31
5373 14:47:53.481843 4. 0000000054660000-00000000ffed9fff: RAM
5374 14:47:53.488412 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5375 14:47:53.491908 6. 0000000100000000-000000013fffffff: RAM
5376 14:47:53.495162 Passing 5 GPIOs to payload:
5377 14:47:53.498471 NAME | PORT | POLARITY | VALUE
5378 14:47:53.502218 write protect | 0x00000096 | low | high
5379 14:47:53.508225 EC in RW | 0x000000b1 | high | undefined
5380 14:47:53.511549 EC interrupt | 0x00000097 | low | undefined
5381 14:47:53.518357 TPM interrupt | 0x00000099 | high | undefined
5382 14:47:53.521507 speaker enable | 0x000000af | high | undefined
5383 14:47:53.525004 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5384 14:47:53.528384 in-header: 03 f7 00 00 02 00 00 00
5385 14:47:53.531860 in-data: 04 00
5386 14:47:53.532073 Board ID: 4
5387 14:47:53.535348 ADC[3]: Raw value=215504 ID=1
5388 14:47:53.535559 RAM code: 1
5389 14:47:53.535733 SKU ID: 16
5390 14:47:53.541612 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5391 14:47:53.541858 CBFS @ 21000 size 3d4000
5392 14:47:53.548798 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5393 14:47:53.555100 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum fd05
5394 14:47:53.558270 coreboot table: 940 bytes.
5395 14:47:53.561760 IMD ROOT 0. 00000000fffff000 00001000
5396 14:47:53.565060 IMD SMALL 1. 00000000ffffe000 00001000
5397 14:47:53.568809 CONSOLE 2. 00000000fffde000 00020000
5398 14:47:53.572005 FMAP 3. 00000000fffdd000 0000047c
5399 14:47:53.574881 TIME STAMP 4. 00000000fffdc000 00000910
5400 14:47:53.578433 RAMOOPS 5. 00000000ffedc000 00100000
5401 14:47:53.581708 COREBOOT 6. 00000000ffeda000 00002000
5402 14:47:53.585264 IMD small region:
5403 14:47:53.588610 IMD ROOT 0. 00000000ffffec00 00000400
5404 14:47:53.591997 VBOOT WORK 1. 00000000ffffeb00 00000100
5405 14:47:53.595186 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5406 14:47:53.598184 VPD 3. 00000000ffffea60 0000006c
5407 14:47:53.604805 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5408 14:47:53.611445 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5409 14:47:53.614927 in-header: 03 e1 00 00 08 00 00 00
5410 14:47:53.618366 in-data: 84 20 60 10 00 00 00 00
5411 14:47:53.621913 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5412 14:47:53.625207 CBFS @ 21000 size 3d4000
5413 14:47:53.628335 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5414 14:47:53.631372 CBFS: Locating 'fallback/payload'
5415 14:47:53.640349 CBFS: Found @ offset dc040 size 439a0
5416 14:47:53.728020 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5417 14:47:53.731908 Checking segment from ROM address 0x0000000040003a00
5418 14:47:53.738274 Checking segment from ROM address 0x0000000040003a1c
5419 14:47:53.741189 Loading segment from ROM address 0x0000000040003a00
5420 14:47:53.744982 code (compression=0)
5421 14:47:53.754814 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5422 14:47:53.761295 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5423 14:47:53.764866 it's not compressed!
5424 14:47:53.768346 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5425 14:47:53.774899 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5426 14:47:53.782142 Loading segment from ROM address 0x0000000040003a1c
5427 14:47:53.785596 Entry Point 0x0000000080000000
5428 14:47:53.786015 Loaded segments
5429 14:47:53.792637 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5430 14:47:53.795470 Jumping to boot code at 0000000080000000(00000000ffeda000)
5431 14:47:53.805609 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5432 14:47:53.808818 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5433 14:47:53.811700 CBFS @ 21000 size 3d4000
5434 14:47:53.818699 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5435 14:47:53.821981 CBFS: Locating 'fallback/bl31'
5436 14:47:53.825079 CBFS: Found @ offset 36dc0 size 5820
5437 14:47:53.835979 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5438 14:47:53.839011 Checking segment from ROM address 0x0000000040003a00
5439 14:47:53.845807 Checking segment from ROM address 0x0000000040003a1c
5440 14:47:53.849544 Loading segment from ROM address 0x0000000040003a00
5441 14:47:53.852826 code (compression=1)
5442 14:47:53.858864 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5443 14:47:53.868968 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5444 14:47:53.869061 using LZMA
5445 14:47:53.878249 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5446 14:47:53.884389 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5447 14:47:53.887888 Loading segment from ROM address 0x0000000040003a1c
5448 14:47:53.891195 Entry Point 0x0000000054601000
5449 14:47:53.891280 Loaded segments
5450 14:47:53.894103 NOTICE: MT8183 bl31_setup
5451 14:47:53.901343 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5452 14:47:53.905102 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5453 14:47:53.908372 INFO: [DEVAPC] dump DEVAPC registers:
5454 14:47:53.918054 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5455 14:47:53.924515 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5456 14:47:53.934678 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5457 14:47:53.941412 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5458 14:47:53.951537 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5459 14:47:53.958302 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5460 14:47:53.968019 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5461 14:47:53.975198 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5462 14:47:53.984665 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5463 14:47:53.991244 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5464 14:47:53.997912 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5465 14:47:54.007683 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5466 14:47:54.014047 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5467 14:47:54.024078 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5468 14:47:54.030944 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5469 14:47:54.037504 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5470 14:47:54.044153 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5471 14:47:54.050972 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5472 14:47:54.060630 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5473 14:47:54.067124 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5474 14:47:54.073625 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5475 14:47:54.080485 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5476 14:47:54.083921 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5477 14:47:54.086765 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5478 14:47:54.090133 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5479 14:47:54.093689 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5480 14:47:54.096925 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5481 14:47:54.103898 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5482 14:47:54.110483 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5483 14:47:54.110574 WARNING: region 0:
5484 14:47:54.113751 WARNING: apc:0x168, sa:0x0, ea:0xfff
5485 14:47:54.117006 WARNING: region 1:
5486 14:47:54.120380 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5487 14:47:54.120472 WARNING: region 2:
5488 14:47:54.123675 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5489 14:47:54.126912 WARNING: region 3:
5490 14:47:54.130263 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5491 14:47:54.133686 WARNING: region 4:
5492 14:47:54.136868 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5493 14:47:54.136959 WARNING: region 5:
5494 14:47:54.140414 WARNING: apc:0x0, sa:0x0, ea:0x0
5495 14:47:54.143803 WARNING: region 6:
5496 14:47:54.146792 WARNING: apc:0x0, sa:0x0, ea:0x0
5497 14:47:54.146884 WARNING: region 7:
5498 14:47:54.150632 WARNING: apc:0x0, sa:0x0, ea:0x0
5499 14:47:54.157140 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5500 14:47:54.160598 INFO: SPM: enable SPMC mode
5501 14:47:54.163558 NOTICE: spm_boot_init() start
5502 14:47:54.166856 NOTICE: spm_boot_init() end
5503 14:47:54.169948 INFO: BL31: Initializing runtime services
5504 14:47:54.176542 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5505 14:47:54.180062 INFO: BL31: Preparing for EL3 exit to normal world
5506 14:47:54.183564 INFO: Entry point address = 0x80000000
5507 14:47:54.186602 INFO: SPSR = 0x8
5508 14:47:54.208126
5509 14:47:54.208217
5510 14:47:54.208289
5511 14:47:54.208775 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5512 14:47:54.208885 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5513 14:47:54.208975 Setting prompt string to ['jacuzzi:']
5514 14:47:54.209062 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5515 14:47:54.211412 Starting depthcharge on Juniper...
5516 14:47:54.211505
5517 14:47:54.214552 vboot_handoff: creating legacy vboot_handoff structure
5518 14:47:54.214643
5519 14:47:54.217956 ec_init(0): CrosEC protocol v3 supported (544, 544)
5520 14:47:54.221211
5521 14:47:54.221302 Wipe memory regions:
5522 14:47:54.221374
5523 14:47:54.224828 [0x00000040000000, 0x00000054600000)
5524 14:47:54.267352
5525 14:47:54.267452 [0x00000054660000, 0x00000080000000)
5526 14:47:54.358841
5527 14:47:54.358942 [0x000000811994a0, 0x000000ffeda000)
5528 14:47:54.618444
5529 14:47:54.618694 [0x00000100000000, 0x00000140000000)
5530 14:47:54.751216
5531 14:47:54.754456 Initializing XHCI USB controller at 0x11200000.
5532 14:47:54.777726
5533 14:47:54.780956 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5534 14:47:54.781377
5535 14:47:54.781708
5536 14:47:54.782520 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5538 14:47:54.883563 jacuzzi: tftpboot 192.168.201.1 14167023/tftp-deploy-n8c97886/kernel/image.itb 14167023/tftp-deploy-n8c97886/kernel/cmdline
5539 14:47:54.884104 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5540 14:47:54.884509 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5541 14:47:54.888793 tftpboot 192.168.201.1 14167023/tftp-deploy-n8c97886/kernel/image.ittp-deploy-n8c97886/kernel/cmdline
5542 14:47:54.889223
5543 14:47:54.889549 Waiting for link
5544 14:47:55.291544
5545 14:47:55.292026 R8152: Initializing
5546 14:47:55.292359
5547 14:47:55.294731 Version 9 (ocp_data = 6010)
5548 14:47:55.295151
5549 14:47:55.297987 R8152: Done initializing
5550 14:47:55.298405
5551 14:47:55.298729 Adding net device
5552 14:47:55.683985
5553 14:47:55.684495 done.
5554 14:47:55.684824
5555 14:47:55.685132 MAC: 00:e0:4c:68:0b:b9
5556 14:47:55.685431
5557 14:47:55.686993 Sending DHCP discover... done.
5558 14:47:55.687430
5559 14:47:55.690246 Waiting for reply... done.
5560 14:47:55.690667
5561 14:47:55.693727 Sending DHCP request... done.
5562 14:47:55.694149
5563 14:47:55.698129 Waiting for reply... done.
5564 14:47:55.698645
5565 14:47:55.698979 My ip is 192.168.201.13
5566 14:47:55.699292
5567 14:47:55.701385 The DHCP server ip is 192.168.201.1
5568 14:47:55.701899
5569 14:47:55.708061 TFTP server IP predefined by user: 192.168.201.1
5570 14:47:55.708488
5571 14:47:55.714698 Bootfile predefined by user: 14167023/tftp-deploy-n8c97886/kernel/image.itb
5572 14:47:55.715121
5573 14:47:55.715489 Sending tftp read request... done.
5574 14:47:55.717832
5575 14:47:55.724343 Waiting for the transfer...
5576 14:47:55.724770
5577 14:47:55.994715 00000000 ################################################################
5578 14:47:55.994948
5579 14:47:56.265433 00080000 ################################################################
5580 14:47:56.265617
5581 14:47:56.524190 00100000 ################################################################
5582 14:47:56.524361
5583 14:47:56.789423 00180000 ################################################################
5584 14:47:56.789559
5585 14:47:57.046906 00200000 ################################################################
5586 14:47:57.047080
5587 14:47:57.317156 00280000 ################################################################
5588 14:47:57.317301
5589 14:47:57.586204 00300000 ################################################################
5590 14:47:57.586350
5591 14:47:57.847292 00380000 ################################################################
5592 14:47:57.847439
5593 14:47:58.103670 00400000 ################################################################
5594 14:47:58.103813
5595 14:47:58.359127 00480000 ################################################################
5596 14:47:58.359305
5597 14:47:58.620398 00500000 ################################################################
5598 14:47:58.620543
5599 14:47:58.882009 00580000 ################################################################
5600 14:47:58.882161
5601 14:47:59.136228 00600000 ################################################################
5602 14:47:59.136378
5603 14:47:59.395294 00680000 ################################################################
5604 14:47:59.395464
5605 14:47:59.650212 00700000 ################################################################
5606 14:47:59.650369
5607 14:47:59.904945 00780000 ################################################################
5608 14:47:59.905096
5609 14:48:00.153719 00800000 ################################################################
5610 14:48:00.153916
5611 14:48:00.409877 00880000 ################################################################
5612 14:48:00.410036
5613 14:48:00.666123 00900000 ################################################################
5614 14:48:00.666292
5615 14:48:00.950369 00980000 ################################################################
5616 14:48:00.950538
5617 14:48:01.207723 00a00000 ################################################################
5618 14:48:01.207903
5619 14:48:01.476609 00a80000 ################################################################
5620 14:48:01.476753
5621 14:48:01.730320 00b00000 ################################################################
5622 14:48:01.730459
5623 14:48:01.980758 00b80000 ################################################################
5624 14:48:01.980901
5625 14:48:02.230558 00c00000 ################################################################
5626 14:48:02.230699
5627 14:48:02.491224 00c80000 ################################################################
5628 14:48:02.491364
5629 14:48:02.759845 00d00000 ################################################################
5630 14:48:02.760004
5631 14:48:03.020217 00d80000 ################################################################
5632 14:48:03.020359
5633 14:48:03.285235 00e00000 ################################################################
5634 14:48:03.285389
5635 14:48:03.538619 00e80000 ################################################################
5636 14:48:03.538763
5637 14:48:03.795137 00f00000 ################################################################
5638 14:48:03.795281
5639 14:48:04.072149 00f80000 ################################################################
5640 14:48:04.072305
5641 14:48:04.360086 01000000 ################################################################
5642 14:48:04.360241
5643 14:48:04.636408 01080000 ################################################################
5644 14:48:04.636569
5645 14:48:04.883112 01100000 ################################################################
5646 14:48:04.883301
5647 14:48:05.132416 01180000 ################################################################
5648 14:48:05.132563
5649 14:48:05.397606 01200000 ################################################################
5650 14:48:05.397758
5651 14:48:05.652351 01280000 ################################################################
5652 14:48:05.652498
5653 14:48:05.901729 01300000 ################################################################
5654 14:48:05.901885
5655 14:48:06.169481 01380000 ################################################################
5656 14:48:06.169627
5657 14:48:06.427873 01400000 ################################################################
5658 14:48:06.428025
5659 14:48:06.698015 01480000 ################################################################
5660 14:48:06.698168
5661 14:48:06.966772 01500000 ################################################################
5662 14:48:06.966918
5663 14:48:07.226411 01580000 ################################################################
5664 14:48:07.226560
5665 14:48:07.520170 01600000 ################################################################
5666 14:48:07.520323
5667 14:48:07.794955 01680000 ################################################################
5668 14:48:07.795125
5669 14:48:08.061269 01700000 ################################################################
5670 14:48:08.061431
5671 14:48:08.312208 01780000 ################################################################
5672 14:48:08.312356
5673 14:48:08.562997 01800000 ################################################################
5674 14:48:08.563154
5675 14:48:08.811747 01880000 ################################################################
5676 14:48:08.811905
5677 14:48:09.075092 01900000 ################################################################
5678 14:48:09.075255
5679 14:48:09.323288 01980000 ################################################################
5680 14:48:09.323497
5681 14:48:09.575247 01a00000 ################################################################
5682 14:48:09.575415
5683 14:48:09.830307 01a80000 ################################################################
5684 14:48:09.830471
5685 14:48:10.081020 01b00000 ################################################################
5686 14:48:10.081177
5687 14:48:10.329955 01b80000 ################################################################
5688 14:48:10.330119
5689 14:48:10.580353 01c00000 ################################################################
5690 14:48:10.580508
5691 14:48:10.842572 01c80000 ################################################################
5692 14:48:10.842761
5693 14:48:11.106976 01d00000 ################################################################
5694 14:48:11.107131
5695 14:48:11.369357 01d80000 ################################################################
5696 14:48:11.369513
5697 14:48:11.634936 01e00000 ################################################################
5698 14:48:11.635101
5699 14:48:11.893430 01e80000 ################################################################
5700 14:48:11.893582
5701 14:48:12.155864 01f00000 ################################################################
5702 14:48:12.156019
5703 14:48:12.431282 01f80000 ################################################################
5704 14:48:12.431487
5705 14:48:12.717393 02000000 ################################################################
5706 14:48:12.717549
5707 14:48:12.999582 02080000 ################################################################
5708 14:48:12.999735
5709 14:48:13.276096 02100000 ################################################################
5710 14:48:13.276250
5711 14:48:13.540635 02180000 ################################################################
5712 14:48:13.540785
5713 14:48:13.809112 02200000 ################################################################
5714 14:48:13.809258
5715 14:48:14.093303 02280000 ################################################################
5716 14:48:14.093465
5717 14:48:14.382164 02300000 ################################################################
5718 14:48:14.382320
5719 14:48:14.670505 02380000 ################################################################
5720 14:48:14.670651
5721 14:48:14.946196 02400000 ################################################################
5722 14:48:14.946377
5723 14:48:15.224913 02480000 ################################################################
5724 14:48:15.225076
5725 14:48:15.520642 02500000 ################################################################
5726 14:48:15.520797
5727 14:48:15.801099 02580000 ################################################################
5728 14:48:15.801245
5729 14:48:16.077426 02600000 ################################################################
5730 14:48:16.077581
5731 14:48:16.333627 02680000 ################################################################
5732 14:48:16.333771
5733 14:48:16.631864 02700000 ################################################################
5734 14:48:16.632017
5735 14:48:16.930191 02780000 ################################################################
5736 14:48:16.930343
5737 14:48:17.199940 02800000 ################################################################
5738 14:48:17.200102
5739 14:48:17.469025 02880000 ################################################################
5740 14:48:17.469172
5741 14:48:17.736690 02900000 ################################################################
5742 14:48:17.736836
5743 14:48:18.009037 02980000 ################################################################
5744 14:48:18.009194
5745 14:48:18.273918 02a00000 ################################################################
5746 14:48:18.274070
5747 14:48:18.549755 02a80000 ################################################################
5748 14:48:18.549901
5749 14:48:18.828858 02b00000 ################################################################
5750 14:48:18.829011
5751 14:48:19.122780 02b80000 ################################################################
5752 14:48:19.122946
5753 14:48:19.375387 02c00000 ################################################################
5754 14:48:19.375544
5755 14:48:19.639976 02c80000 ################################################################
5756 14:48:19.640122
5757 14:48:19.895433 02d00000 ################################################################
5758 14:48:19.895588
5759 14:48:20.150473 02d80000 ################################################################
5760 14:48:20.150631
5761 14:48:20.408461 02e00000 ################################################################
5762 14:48:20.408615
5763 14:48:20.663594 02e80000 ################################################################
5764 14:48:20.663746
5765 14:48:20.950569 02f00000 ################################################################
5766 14:48:20.950726
5767 14:48:21.224419 02f80000 ################################################################
5768 14:48:21.224582
5769 14:48:21.483777 03000000 ################################################################
5770 14:48:21.483935
5771 14:48:21.758743 03080000 ################################################################
5772 14:48:21.758899
5773 14:48:22.027508 03100000 ################################################################
5774 14:48:22.027652
5775 14:48:22.294544 03180000 ################################################################
5776 14:48:22.294699
5777 14:48:22.581312 03200000 ################################################################
5778 14:48:22.581468
5779 14:48:22.871198 03280000 ################################################################
5780 14:48:22.871346
5781 14:48:23.153802 03300000 ################################################################
5782 14:48:23.153952
5783 14:48:23.443143 03380000 ################################################################
5784 14:48:23.443295
5785 14:48:23.739452 03400000 ################################################################
5786 14:48:23.739609
5787 14:48:24.036766 03480000 ################################################################
5788 14:48:24.036913
5789 14:48:24.307514 03500000 ################################################################
5790 14:48:24.307664
5791 14:48:24.589259 03580000 ################################################################
5792 14:48:24.589417
5793 14:48:24.880694 03600000 ################################################################
5794 14:48:24.880846
5795 14:48:25.177887 03680000 ################################################################
5796 14:48:25.178041
5797 14:48:25.464716 03700000 ################################################################
5798 14:48:25.464868
5799 14:48:25.717906 03780000 ################################################################
5800 14:48:25.718066
5801 14:48:25.983433 03800000 ################################################################
5802 14:48:25.983598
5803 14:48:26.251822 03880000 ################################################################
5804 14:48:26.251984
5805 14:48:26.495786 03900000 ################################################################
5806 14:48:26.495946
5807 14:48:26.742496 03980000 ################################################################
5808 14:48:26.742650
5809 14:48:26.998373 03a00000 ################################################################
5810 14:48:26.998516
5811 14:48:27.270042 03a80000 ################################################################
5812 14:48:27.270199
5813 14:48:27.554812 03b00000 ################################################################
5814 14:48:27.554959
5815 14:48:27.834246 03b80000 ################################################################
5816 14:48:27.834404
5817 14:48:28.105574 03c00000 ################################################################
5818 14:48:28.105725
5819 14:48:28.370992 03c80000 ################################################################
5820 14:48:28.371144
5821 14:48:28.625949 03d00000 ################################################################
5822 14:48:28.626099
5823 14:48:28.882467 03d80000 ################################################################
5824 14:48:28.882622
5825 14:48:29.178573 03e00000 ################################################################
5826 14:48:29.178719
5827 14:48:29.449840 03e80000 ################################################################
5828 14:48:29.450016
5829 14:48:29.734223 03f00000 ################################################################
5830 14:48:29.734378
5831 14:48:30.031347 03f80000 ################################################################
5832 14:48:30.031510
5833 14:48:30.327245 04000000 ################################################################
5834 14:48:30.327395
5835 14:48:30.612577 04080000 ################################################################
5836 14:48:30.612762
5837 14:48:30.903537 04100000 ################################################################
5838 14:48:30.903692
5839 14:48:31.199765 04180000 ################################################################
5840 14:48:31.199935
5841 14:48:31.496195 04200000 ################################################################
5842 14:48:31.496347
5843 14:48:31.788560 04280000 ################################################################
5844 14:48:31.788714
5845 14:48:32.060525 04300000 ################################################################
5846 14:48:32.060676
5847 14:48:32.343215 04380000 ################################################################
5848 14:48:32.343361
5849 14:48:32.628064 04400000 ################################################################
5850 14:48:32.628239
5851 14:48:32.902618 04480000 ################################################################
5852 14:48:32.902800
5853 14:48:33.165210 04500000 ################################################################
5854 14:48:33.165389
5855 14:48:33.425303 04580000 ################################################################
5856 14:48:33.425489
5857 14:48:33.687981 04600000 ################################################################
5858 14:48:33.688157
5859 14:48:33.781938 04680000 ####################### done.
5860 14:48:33.782121
5861 14:48:33.784798 The bootfile was 74111598 bytes long.
5862 14:48:33.784895
5863 14:48:33.788271 Sending tftp read request... done.
5864 14:48:33.788413
5865 14:48:33.788487 Waiting for the transfer...
5866 14:48:33.788556
5867 14:48:33.791262 00000000 # done.
5868 14:48:33.791388
5869 14:48:33.797906 Command line loaded dynamically from TFTP file: 14167023/tftp-deploy-n8c97886/kernel/cmdline
5870 14:48:33.797996
5871 14:48:33.814808 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5872 14:48:33.814908
5873 14:48:33.818006 Loading FIT.
5874 14:48:33.818097
5875 14:48:33.821070 Image ramdisk-1 has 60991235 bytes.
5876 14:48:33.821154
5877 14:48:33.821246 Image fdt-1 has 57695 bytes.
5878 14:48:33.824743
5879 14:48:33.824832 Image kernel-1 has 13060619 bytes.
5880 14:48:33.824915
5881 14:48:33.834680 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5882 14:48:33.834779
5883 14:48:33.847892 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5884 14:48:33.847987
5885 14:48:33.850981 Choosing best match conf-1 for compat google,juniper-sku16.
5886 14:48:33.856168
5887 14:48:33.861191 Connected to device vid:did:rid of 1ae0:0028:00
5888 14:48:33.869100
5889 14:48:33.872469 tpm_get_response: command 0x17b, return code 0x0
5890 14:48:33.872602
5891 14:48:33.875605 tpm_cleanup: add release locality here.
5892 14:48:33.875699
5893 14:48:33.879382 Shutting down all USB controllers.
5894 14:48:33.879493
5895 14:48:33.882458 Removing current net device
5896 14:48:33.882549
5897 14:48:33.885857 Exiting depthcharge with code 4 at timestamp: 56925130
5898 14:48:33.885987
5899 14:48:33.889154 LZMA decompressing kernel-1 to 0x80193568
5900 14:48:33.889274
5901 14:48:33.895998 LZMA decompressing kernel-1 to 0x40000000
5902 14:48:35.753905
5903 14:48:35.754414 jumping to kernel
5904 14:48:35.756605 end: 2.2.4 bootloader-commands (duration 00:00:42) [common]
5905 14:48:35.757103 start: 2.2.5 auto-login-action (timeout 00:03:43) [common]
5906 14:48:35.757480 Setting prompt string to ['Linux version [0-9]']
5907 14:48:35.757822 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5908 14:48:35.758155 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5909 14:48:35.829362
5910 14:48:35.832153 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5911 14:48:35.836371 start: 2.2.5.1 login-action (timeout 00:03:43) [common]
5912 14:48:35.836905 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5913 14:48:35.837419 Setting prompt string to []
5914 14:48:35.837888 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5915 14:48:35.838355 Using line separator: #'\n'#
5916 14:48:35.838719 No login prompt set.
5917 14:48:35.839227 Parsing kernel messages
5918 14:48:35.839575 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5919 14:48:35.840215 [login-action] Waiting for messages, (timeout 00:03:43)
5920 14:48:35.840653 Waiting using forced prompt support (timeout 00:01:51)
5921 14:48:35.855791 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j216541-arm64-gcc-10-defconfig-arm64-chromebook-f7c97) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024
5922 14:48:35.859191 [ 0.000000] random: crng init done
5923 14:48:35.865782 [ 0.000000] Machine model: Google juniper sku16 board
5924 14:48:35.868702 [ 0.000000] efi: UEFI not found.
5925 14:48:35.875464 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5926 14:48:35.881880 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5927 14:48:35.892042 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5928 14:48:35.895508 [ 0.000000] printk: bootconsole [mtk8250] enabled
5929 14:48:35.903985 [ 0.000000] NUMA: No NUMA configuration found
5930 14:48:35.910430 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5931 14:48:35.917631 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5932 14:48:35.918197 [ 0.000000] Zone ranges:
5933 14:48:35.923879 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5934 14:48:35.927294 [ 0.000000] DMA32 empty
5935 14:48:35.933841 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5936 14:48:35.936883 [ 0.000000] Movable zone start for each node
5937 14:48:35.940294 [ 0.000000] Early memory node ranges
5938 14:48:35.946770 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5939 14:48:35.953727 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5940 14:48:35.960725 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5941 14:48:35.966959 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5942 14:48:35.973827 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5943 14:48:35.980431 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5944 14:48:35.996714 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5945 14:48:36.003220 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5946 14:48:36.010022 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5947 14:48:36.013359 [ 0.000000] psci: probing for conduit method from DT.
5948 14:48:36.019715 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5949 14:48:36.022882 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5950 14:48:36.029554 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5951 14:48:36.033168 [ 0.000000] psci: SMC Calling Convention v1.1
5952 14:48:36.039335 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5953 14:48:36.043171 [ 0.000000] Detected VIPT I-cache on CPU0
5954 14:48:36.049327 [ 0.000000] CPU features: detected: GIC system register CPU interface
5955 14:48:36.055774 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5956 14:48:36.062764 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5957 14:48:36.068962 [ 0.000000] CPU features: detected: ARM erratum 845719
5958 14:48:36.072732 [ 0.000000] alternatives: applying boot alternatives
5959 14:48:36.076142 [ 0.000000] Fallback order for Node 0: 0
5960 14:48:36.082498 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5961 14:48:36.086026 [ 0.000000] Policy zone: Normal
5962 14:48:36.105866 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5963 14:48:36.118985 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5964 14:48:36.125889 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5965 14:48:36.135670 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5966 14:48:36.142252 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5967 14:48:36.145322 <6>[ 0.000000] software IO TLB: area num 8.
5968 14:48:36.171446 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5969 14:48:36.229480 <6>[ 0.000000] Memory: 3855640K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 302824K reserved, 32768K cma-reserved)
5970 14:48:36.235987 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5971 14:48:36.242522 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5972 14:48:36.245879 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5973 14:48:36.252820 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5974 14:48:36.259052 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5975 14:48:36.261992 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5976 14:48:36.272107 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5977 14:48:36.278956 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5978 14:48:36.285096 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5979 14:48:36.294928 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5980 14:48:36.298589 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5981 14:48:36.301890 <6>[ 0.000000] GICv3: 640 SPIs implemented
5982 14:48:36.308915 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5983 14:48:36.311594 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5984 14:48:36.318880 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5985 14:48:36.325050 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5986 14:48:36.335202 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5987 14:48:36.348493 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5988 14:48:36.354489 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5989 14:48:36.366234 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5990 14:48:36.379125 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5991 14:48:36.385864 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5992 14:48:36.392968 <6>[ 0.009477] Console: colour dummy device 80x25
5993 14:48:36.396140 <6>[ 0.014538] printk: console [tty1] enabled
5994 14:48:36.406262 <6>[ 0.018924] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5995 14:48:36.412616 <6>[ 0.029388] pid_max: default: 32768 minimum: 301
5996 14:48:36.416240 <6>[ 0.034269] LSM: Security Framework initializing
5997 14:48:36.426233 <6>[ 0.039183] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5998 14:48:36.432660 <6>[ 0.046806] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5999 14:48:36.439658 <4>[ 0.055681] cacheinfo: Unable to detect cache hierarchy for CPU 0
6000 14:48:36.449511 <6>[ 0.062306] cblist_init_generic: Setting adjustable number of callback queues.
6001 14:48:36.455953 <6>[ 0.069751] cblist_init_generic: Setting shift to 3 and lim to 1.
6002 14:48:36.462635 <6>[ 0.076104] cblist_init_generic: Setting adjustable number of callback queues.
6003 14:48:36.469164 <6>[ 0.083548] cblist_init_generic: Setting shift to 3 and lim to 1.
6004 14:48:36.472725 <6>[ 0.089945] rcu: Hierarchical SRCU implementation.
6005 14:48:36.479387 <6>[ 0.094972] rcu: Max phase no-delay instances is 1000.
6006 14:48:36.486705 <6>[ 0.102922] EFI services will not be available.
6007 14:48:36.489279 <6>[ 0.107873] smp: Bringing up secondary CPUs ...
6008 14:48:36.500191 <6>[ 0.113169] Detected VIPT I-cache on CPU1
6009 14:48:36.506478 <4>[ 0.113213] cacheinfo: Unable to detect cache hierarchy for CPU 1
6010 14:48:36.513804 <6>[ 0.113222] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6011 14:48:36.520067 <6>[ 0.113255] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6012 14:48:36.523305 <6>[ 0.113739] Detected VIPT I-cache on CPU2
6013 14:48:36.530215 <4>[ 0.113772] cacheinfo: Unable to detect cache hierarchy for CPU 2
6014 14:48:36.536740 <6>[ 0.113777] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6015 14:48:36.542995 <6>[ 0.113789] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6016 14:48:36.546667 <6>[ 0.114234] Detected VIPT I-cache on CPU3
6017 14:48:36.552771 <4>[ 0.114264] cacheinfo: Unable to detect cache hierarchy for CPU 3
6018 14:48:36.559762 <6>[ 0.114269] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6019 14:48:36.569345 <6>[ 0.114280] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6020 14:48:36.572730 <6>[ 0.114854] CPU features: detected: Spectre-v2
6021 14:48:36.576429 <6>[ 0.114864] CPU features: detected: Spectre-BHB
6022 14:48:36.583189 <6>[ 0.114868] CPU features: detected: ARM erratum 858921
6023 14:48:36.586147 <6>[ 0.114873] Detected VIPT I-cache on CPU4
6024 14:48:36.592871 <4>[ 0.114922] cacheinfo: Unable to detect cache hierarchy for CPU 4
6025 14:48:36.599379 <6>[ 0.114930] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6026 14:48:36.609711 <6>[ 0.114938] arch_timer: Enabling local workaround for ARM erratum 858921
6027 14:48:36.612335 <6>[ 0.114949] arch_timer: CPU4: Trapping CNTVCT access
6028 14:48:36.619118 <6>[ 0.114956] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6029 14:48:36.622363 <6>[ 0.115441] Detected VIPT I-cache on CPU5
6030 14:48:36.629208 <4>[ 0.115481] cacheinfo: Unable to detect cache hierarchy for CPU 5
6031 14:48:36.635961 <6>[ 0.115487] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6032 14:48:36.645606 <6>[ 0.115494] arch_timer: Enabling local workaround for ARM erratum 858921
6033 14:48:36.649120 <6>[ 0.115500] arch_timer: CPU5: Trapping CNTVCT access
6034 14:48:36.656361 <6>[ 0.115504] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6035 14:48:36.659397 <6>[ 0.115941] Detected VIPT I-cache on CPU6
6036 14:48:36.665911 <4>[ 0.115986] cacheinfo: Unable to detect cache hierarchy for CPU 6
6037 14:48:36.675756 <6>[ 0.115991] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6038 14:48:36.682302 <6>[ 0.115999] arch_timer: Enabling local workaround for ARM erratum 858921
6039 14:48:36.685963 <6>[ 0.116005] arch_timer: CPU6: Trapping CNTVCT access
6040 14:48:36.692093 <6>[ 0.116010] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6041 14:48:36.699265 <6>[ 0.116541] Detected VIPT I-cache on CPU7
6042 14:48:36.702478 <4>[ 0.116584] cacheinfo: Unable to detect cache hierarchy for CPU 7
6043 14:48:36.712013 <6>[ 0.116590] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6044 14:48:36.718696 <6>[ 0.116597] arch_timer: Enabling local workaround for ARM erratum 858921
6045 14:48:36.721937 <6>[ 0.116604] arch_timer: CPU7: Trapping CNTVCT access
6046 14:48:36.728810 <6>[ 0.116609] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6047 14:48:36.735364 <6>[ 0.116659] smp: Brought up 1 node, 8 CPUs
6048 14:48:36.738679 <6>[ 0.355540] SMP: Total of 8 processors activated.
6049 14:48:36.745209 <6>[ 0.360477] CPU features: detected: 32-bit EL0 Support
6050 14:48:36.748811 <6>[ 0.365847] CPU features: detected: 32-bit EL1 Support
6051 14:48:36.755081 <6>[ 0.371213] CPU features: detected: CRC32 instructions
6052 14:48:36.758416 <6>[ 0.376641] CPU: All CPU(s) started at EL2
6053 14:48:36.764836 <6>[ 0.380980] alternatives: applying system-wide alternatives
6054 14:48:36.772112 <6>[ 0.388959] devtmpfs: initialized
6055 14:48:36.784358 <6>[ 0.397901] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6056 14:48:36.794982 <6>[ 0.407850] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6057 14:48:36.797696 <6>[ 0.415578] pinctrl core: initialized pinctrl subsystem
6058 14:48:36.805917 <6>[ 0.422692] DMI not present or invalid.
6059 14:48:36.812825 <6>[ 0.427057] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6060 14:48:36.819494 <6>[ 0.433956] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6061 14:48:36.829236 <6>[ 0.441484] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6062 14:48:36.836399 <6>[ 0.449736] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6063 14:48:36.842744 <6>[ 0.457914] audit: initializing netlink subsys (disabled)
6064 14:48:36.848939 <5>[ 0.463619] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6065 14:48:36.855854 <6>[ 0.464592] thermal_sys: Registered thermal governor 'step_wise'
6066 14:48:36.862756 <6>[ 0.471585] thermal_sys: Registered thermal governor 'power_allocator'
6067 14:48:36.865622 <6>[ 0.477882] cpuidle: using governor menu
6068 14:48:36.872433 <6>[ 0.488847] NET: Registered PF_QIPCRTR protocol family
6069 14:48:36.878557 <6>[ 0.494331] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6070 14:48:36.885564 <6>[ 0.501432] ASID allocator initialised with 32768 entries
6071 14:48:36.892391 <6>[ 0.508203] Serial: AMBA PL011 UART driver
6072 14:48:36.902125 <4>[ 0.518628] Trying to register duplicate clock ID: 113
6073 14:48:36.962146 <6>[ 0.575414] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6074 14:48:36.976472 <6>[ 0.589771] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6075 14:48:36.979786 <6>[ 0.599511] KASLR enabled
6076 14:48:36.994076 <6>[ 0.607531] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6077 14:48:37.000692 <6>[ 0.614533] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6078 14:48:37.006882 <6>[ 0.621010] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6079 14:48:37.013555 <6>[ 0.628001] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6080 14:48:37.020431 <6>[ 0.634475] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6081 14:48:37.027204 <6>[ 0.641465] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6082 14:48:37.033822 <6>[ 0.647939] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6083 14:48:37.040915 <6>[ 0.654928] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6084 14:48:37.043612 <6>[ 0.662497] ACPI: Interpreter disabled.
6085 14:48:37.054586 <6>[ 0.670472] iommu: Default domain type: Translated
6086 14:48:37.060404 <6>[ 0.675580] iommu: DMA domain TLB invalidation policy: strict mode
6087 14:48:37.063907 <5>[ 0.682212] SCSI subsystem initialized
6088 14:48:37.070650 <6>[ 0.686624] usbcore: registered new interface driver usbfs
6089 14:48:37.077065 <6>[ 0.692351] usbcore: registered new interface driver hub
6090 14:48:37.080632 <6>[ 0.697894] usbcore: registered new device driver usb
6091 14:48:37.087551 <6>[ 0.704192] pps_core: LinuxPPS API ver. 1 registered
6092 14:48:37.097881 <6>[ 0.709376] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6093 14:48:37.101285 <6>[ 0.718701] PTP clock support registered
6094 14:48:37.103809 <6>[ 0.722951] EDAC MC: Ver: 3.0.0
6095 14:48:37.111570 <6>[ 0.728594] FPGA manager framework
6096 14:48:37.115398 <6>[ 0.732281] Advanced Linux Sound Architecture Driver Initialized.
6097 14:48:37.119433 <6>[ 0.739023] vgaarb: loaded
6098 14:48:37.125660 <6>[ 0.742141] clocksource: Switched to clocksource arch_sys_counter
6099 14:48:37.132203 <5>[ 0.748574] VFS: Disk quotas dquot_6.6.0
6100 14:48:37.138822 <6>[ 0.752749] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6101 14:48:37.142304 <6>[ 0.759922] pnp: PnP ACPI: disabled
6102 14:48:37.149927 <6>[ 0.766757] NET: Registered PF_INET protocol family
6103 14:48:37.157048 <6>[ 0.771988] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6104 14:48:37.168939 <6>[ 0.781902] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6105 14:48:37.178401 <6>[ 0.790656] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6106 14:48:37.184976 <6>[ 0.798607] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6107 14:48:37.191580 <6>[ 0.806839] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6108 14:48:37.202187 <6>[ 0.814932] TCP: Hash tables configured (established 32768 bind 32768)
6109 14:48:37.208125 <6>[ 0.821758] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6110 14:48:37.215167 <6>[ 0.828729] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6111 14:48:37.221809 <6>[ 0.836209] NET: Registered PF_UNIX/PF_LOCAL protocol family
6112 14:48:37.228325 <6>[ 0.842306] RPC: Registered named UNIX socket transport module.
6113 14:48:37.232347 <6>[ 0.848448] RPC: Registered udp transport module.
6114 14:48:37.238501 <6>[ 0.853374] RPC: Registered tcp transport module.
6115 14:48:37.244864 <6>[ 0.858297] RPC: Registered tcp NFSv4.1 backchannel transport module.
6116 14:48:37.248248 <6>[ 0.864949] PCI: CLS 0 bytes, default 64
6117 14:48:37.251560 <6>[ 0.869233] Unpacking initramfs...
6118 14:48:37.265713 <6>[ 0.878691] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6119 14:48:37.275588 <6>[ 0.887309] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6120 14:48:37.278439 <6>[ 0.896156] kvm [1]: IPA Size Limit: 40 bits
6121 14:48:37.286248 <6>[ 0.902475] kvm [1]: vgic-v2@c420000
6122 14:48:37.289284 <6>[ 0.906291] kvm [1]: GIC system register CPU interface enabled
6123 14:48:37.296109 <6>[ 0.912471] kvm [1]: vgic interrupt IRQ18
6124 14:48:37.299336 <6>[ 0.916848] kvm [1]: Hyp mode initialized successfully
6125 14:48:37.307145 <5>[ 0.923083] Initialise system trusted keyrings
6126 14:48:37.313463 <6>[ 0.927917] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6127 14:48:37.322036 <6>[ 0.937853] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6128 14:48:37.328158 <5>[ 0.944307] NFS: Registering the id_resolver key type
6129 14:48:37.331846 <5>[ 0.949624] Key type id_resolver registered
6130 14:48:37.338284 <5>[ 0.954044] Key type id_legacy registered
6131 14:48:37.345009 <6>[ 0.958361] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6132 14:48:37.351903 <6>[ 0.965284] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6133 14:48:37.357941 <6>[ 0.973076] 9p: Installing v9fs 9p2000 file system support
6134 14:48:37.385380 <5>[ 1.002005] Key type asymmetric registered
6135 14:48:37.388942 <5>[ 1.006351] Asymmetric key parser 'x509' registered
6136 14:48:37.399022 <6>[ 1.011515] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6137 14:48:37.402468 <6>[ 1.019128] io scheduler mq-deadline registered
6138 14:48:37.405170 <6>[ 1.023885] io scheduler kyber registered
6139 14:48:37.428476 <6>[ 1.044692] EINJ: ACPI disabled.
6140 14:48:37.435035 <4>[ 1.048442] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6141 14:48:37.472522 <6>[ 1.088991] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6142 14:48:37.480658 <6>[ 1.097418] printk: console [ttyS0] disabled
6143 14:48:37.508974 <6>[ 1.122072] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6144 14:48:37.515208 <6>[ 1.131546] printk: console [ttyS0] enabled
6145 14:48:37.519245 <6>[ 1.131546] printk: console [ttyS0] enabled
6146 14:48:37.525534 <6>[ 1.140464] printk: bootconsole [mtk8250] disabled
6147 14:48:37.528445 <6>[ 1.140464] printk: bootconsole [mtk8250] disabled
6148 14:48:37.538992 <3>[ 1.150997] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6149 14:48:37.545318 <3>[ 1.159379] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6150 14:48:37.574693 <6>[ 1.187788] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6151 14:48:37.580802 <6>[ 1.197447] serial serial0: tty port ttyS1 registered
6152 14:48:37.587622 <6>[ 1.204022] SuperH (H)SCI(F) driver initialized
6153 14:48:37.591113 <6>[ 1.209515] msm_serial: driver initialized
6154 14:48:37.606768 <6>[ 1.219873] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6155 14:48:37.616789 <6>[ 1.228479] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6156 14:48:37.623478 <6>[ 1.237057] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6157 14:48:37.633016 <6>[ 1.245627] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6158 14:48:37.640119 <6>[ 1.254282] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6159 14:48:37.649762 <6>[ 1.262945] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6160 14:48:37.659986 <6>[ 1.271687] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6161 14:48:37.666540 <6>[ 1.280429] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6162 14:48:37.676324 <6>[ 1.289008] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6163 14:48:37.686198 <6>[ 1.297818] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6164 14:48:37.693730 <4>[ 1.310246] cacheinfo: Unable to detect cache hierarchy for CPU 0
6165 14:48:37.703703 <6>[ 1.319633] loop: module loaded
6166 14:48:37.715165 <6>[ 1.331567] vsim1: Bringing 1800000uV into 2700000-2700000uV
6167 14:48:37.732909 <6>[ 1.349404] megasas: 07.719.03.00-rc1
6168 14:48:37.741969 <6>[ 1.358147] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6169 14:48:37.749641 <6>[ 1.365518] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6170 14:48:37.766381 <6>[ 1.382294] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6171 14:48:37.822861 <6>[ 1.432554] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6172 14:48:39.288834 <6>[ 2.905504] Freeing initrd memory: 59560K
6173 14:48:39.303939 <4>[ 2.917437] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6174 14:48:39.310984 <4>[ 2.926687] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
6175 14:48:39.317610 <4>[ 2.933386] Hardware name: Google juniper sku16 board (DT)
6176 14:48:39.320734 <4>[ 2.939125] Call trace:
6177 14:48:39.324342 <4>[ 2.941825] dump_backtrace.part.0+0xe0/0xf0
6178 14:48:39.327518 <4>[ 2.946362] show_stack+0x18/0x30
6179 14:48:39.330398 <4>[ 2.949934] dump_stack_lvl+0x68/0x84
6180 14:48:39.337350 <4>[ 2.953855] dump_stack+0x18/0x34
6181 14:48:39.340627 <4>[ 2.957424] sysfs_warn_dup+0x64/0x80
6182 14:48:39.343944 <4>[ 2.961346] sysfs_do_create_link_sd+0xf0/0x100
6183 14:48:39.347435 <4>[ 2.966134] sysfs_create_link+0x20/0x40
6184 14:48:39.353945 <4>[ 2.970313] bus_add_device+0x68/0x10c
6185 14:48:39.357339 <4>[ 2.974320] device_add+0x340/0x7ac
6186 14:48:39.360464 <4>[ 2.978063] of_device_add+0x44/0x60
6187 14:48:39.367148 <4>[ 2.981897] of_platform_device_create_pdata+0x90/0x120
6188 14:48:39.370611 <4>[ 2.987378] of_platform_bus_create+0x170/0x370
6189 14:48:39.373941 <4>[ 2.992165] of_platform_populate+0x50/0xfc
6190 14:48:39.380650 <4>[ 2.996604] parse_mtd_partitions+0x1dc/0x510
6191 14:48:39.383811 <4>[ 3.001217] mtd_device_parse_register+0xf8/0x2e0
6192 14:48:39.387006 <4>[ 3.006175] spi_nor_probe+0x21c/0x2f0
6193 14:48:39.393778 <4>[ 3.010181] spi_mem_probe+0x6c/0xb0
6194 14:48:39.396841 <4>[ 3.014014] spi_probe+0x84/0xe4
6195 14:48:39.400537 <4>[ 3.017496] really_probe+0xbc/0x2e0
6196 14:48:39.403445 <4>[ 3.021326] __driver_probe_device+0x78/0x11c
6197 14:48:39.410186 <4>[ 3.025938] driver_probe_device+0xd8/0x160
6198 14:48:39.413648 <4>[ 3.030376] __device_attach_driver+0xb8/0x134
6199 14:48:39.417115 <4>[ 3.035075] bus_for_each_drv+0x78/0xd0
6200 14:48:39.420229 <4>[ 3.039165] __device_attach+0xa8/0x1c0
6201 14:48:39.426407 <4>[ 3.043255] device_initial_probe+0x14/0x20
6202 14:48:39.429788 <4>[ 3.047693] bus_probe_device+0x9c/0xa4
6203 14:48:39.433355 <4>[ 3.051783] device_add+0x3ac/0x7ac
6204 14:48:39.436706 <4>[ 3.055526] __spi_add_device+0x78/0x120
6205 14:48:39.443383 <4>[ 3.059704] spi_add_device+0x40/0x7c
6206 14:48:39.446476 <4>[ 3.063621] spi_register_controller+0x610/0xad0
6207 14:48:39.453163 <4>[ 3.068494] devm_spi_register_controller+0x4c/0xa4
6208 14:48:39.456662 <4>[ 3.073627] mtk_spi_probe+0x3f8/0x650
6209 14:48:39.460030 <4>[ 3.077631] platform_probe+0x68/0xe0
6210 14:48:39.463061 <4>[ 3.081549] really_probe+0xbc/0x2e0
6211 14:48:39.470091 <4>[ 3.085378] __driver_probe_device+0x78/0x11c
6212 14:48:39.472928 <4>[ 3.089990] driver_probe_device+0xd8/0x160
6213 14:48:39.476268 <4>[ 3.094427] __driver_attach+0x94/0x19c
6214 14:48:39.479595 <4>[ 3.098517] bus_for_each_dev+0x70/0xd0
6215 14:48:39.486025 <4>[ 3.102607] driver_attach+0x24/0x30
6216 14:48:39.489441 <4>[ 3.106437] bus_add_driver+0x154/0x20c
6217 14:48:39.493201 <4>[ 3.110527] driver_register+0x78/0x130
6218 14:48:39.499834 <4>[ 3.114618] __platform_driver_register+0x28/0x34
6219 14:48:39.502415 <4>[ 3.119577] mtk_spi_driver_init+0x1c/0x28
6220 14:48:39.506232 <4>[ 3.123931] do_one_initcall+0x50/0x1d0
6221 14:48:39.512534 <4>[ 3.128021] kernel_init_freeable+0x21c/0x288
6222 14:48:39.516212 <4>[ 3.132634] kernel_init+0x24/0x12c
6223 14:48:39.518943 <4>[ 3.136379] ret_from_fork+0x10/0x20
6224 14:48:39.529093 <6>[ 3.145319] tun: Universal TUN/TAP device driver, 1.6
6225 14:48:39.531986 <6>[ 3.151616] thunder_xcv, ver 1.0
6226 14:48:39.535677 <6>[ 3.155133] thunder_bgx, ver 1.0
6227 14:48:39.538728 <6>[ 3.158636] nicpf, ver 1.0
6228 14:48:39.549711 <6>[ 3.163003] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6229 14:48:39.553064 <6>[ 3.170489] hns3: Copyright (c) 2017 Huawei Corporation.
6230 14:48:39.559884 <6>[ 3.176085] hclge is initializing
6231 14:48:39.562871 <6>[ 3.179674] e1000: Intel(R) PRO/1000 Network Driver
6232 14:48:39.570005 <6>[ 3.184809] e1000: Copyright (c) 1999-2006 Intel Corporation.
6233 14:48:39.572958 <6>[ 3.190830] e1000e: Intel(R) PRO/1000 Network Driver
6234 14:48:39.579352 <6>[ 3.196051] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6235 14:48:39.586186 <6>[ 3.202246] igb: Intel(R) Gigabit Ethernet Network Driver
6236 14:48:39.592831 <6>[ 3.207902] igb: Copyright (c) 2007-2014 Intel Corporation.
6237 14:48:39.599521 <6>[ 3.213745] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6238 14:48:39.606238 <6>[ 3.220268] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6239 14:48:39.609271 <6>[ 3.226820] sky2: driver version 1.30
6240 14:48:39.615849 <6>[ 3.232068] usbcore: registered new device driver r8152-cfgselector
6241 14:48:39.622454 <6>[ 3.238611] usbcore: registered new interface driver r8152
6242 14:48:39.629495 <6>[ 3.244439] VFIO - User Level meta-driver version: 0.3
6243 14:48:39.636188 <6>[ 3.252214] mtu3 11201000.usb: uwk - reg:0x420, version:101
6244 14:48:39.642419 <4>[ 3.258088] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6245 14:48:39.649207 <6>[ 3.265363] mtu3 11201000.usb: dr_mode: 1, drd: auto
6246 14:48:39.655530 <6>[ 3.270588] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6247 14:48:39.658775 <6>[ 3.276774] mtu3 11201000.usb: usb3-drd: 0
6248 14:48:39.668817 <6>[ 3.282340] mtu3 11201000.usb: xHCI platform device register success...
6249 14:48:39.675363 <4>[ 3.291020] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6250 14:48:39.682031 <6>[ 3.298949] xhci-mtk 11200000.usb: xHCI Host Controller
6251 14:48:39.688853 <6>[ 3.304453] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6252 14:48:39.695521 <6>[ 3.312173] xhci-mtk 11200000.usb: USB3 root hub has no ports
6253 14:48:39.705283 <6>[ 3.318180] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6254 14:48:39.712121 <6>[ 3.327602] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6255 14:48:39.719060 <6>[ 3.333681] xhci-mtk 11200000.usb: xHCI Host Controller
6256 14:48:39.725279 <6>[ 3.339169] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6257 14:48:39.732391 <6>[ 3.346828] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6258 14:48:39.735234 <6>[ 3.353650] hub 1-0:1.0: USB hub found
6259 14:48:39.738825 <6>[ 3.357679] hub 1-0:1.0: 1 port detected
6260 14:48:39.749970 <6>[ 3.363005] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6261 14:48:39.753128 <6>[ 3.371644] hub 2-0:1.0: USB hub found
6262 14:48:39.763215 <3>[ 3.375694] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6263 14:48:39.769875 <6>[ 3.383599] usbcore: registered new interface driver usb-storage
6264 14:48:39.776083 <6>[ 3.390193] usbcore: registered new device driver onboard-usb-hub
6265 14:48:39.785914 <4>[ 3.398243] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6266 14:48:39.794695 <6>[ 3.410493] mt6397-rtc mt6358-rtc: registered as rtc0
6267 14:48:39.804128 <6>[ 3.415976] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-04T14:47:42 UTC (1717512462)
6268 14:48:39.810773 <6>[ 3.425872] i2c_dev: i2c /dev entries driver
6269 14:48:39.820482 <6>[ 3.432281] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6270 14:48:39.827333 <6>[ 3.440600] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6271 14:48:39.833741 <6>[ 3.449505] i2c 4-0058: Fixed dependency cycle(s) with /panel
6272 14:48:39.840681 <6>[ 3.455538] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6273 14:48:39.850341 <3>[ 3.462997] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6274 14:48:39.866836 <6>[ 3.479992] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6275 14:48:39.874670 <6>[ 3.491454] cpu cpu0: EM: created perf domain
6276 14:48:39.884634 <6>[ 3.496943] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6277 14:48:39.891941 <6>[ 3.508235] cpu cpu4: EM: created perf domain
6278 14:48:39.898247 <6>[ 3.514965] sdhci: Secure Digital Host Controller Interface driver
6279 14:48:39.905461 <6>[ 3.521421] sdhci: Copyright(c) Pierre Ossman
6280 14:48:39.911654 <6>[ 3.526829] Synopsys Designware Multimedia Card Interface Driver
6281 14:48:39.918422 <6>[ 3.527343] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6282 14:48:39.921930 <6>[ 3.533892] sdhci-pltfm: SDHCI platform and OF driver helper
6283 14:48:39.930438 <6>[ 3.547019] ledtrig-cpu: registered to indicate activity on CPUs
6284 14:48:39.938549 <6>[ 3.554769] usbcore: registered new interface driver usbhid
6285 14:48:39.941621 <6>[ 3.560608] usbhid: USB HID core driver
6286 14:48:39.952432 <6>[ 3.564871] spi_master spi2: will run message pump with realtime priority
6287 14:48:39.955859 <4>[ 3.564877] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6288 14:48:39.962959 <4>[ 3.579123] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6289 14:48:39.976651 <6>[ 3.585279] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6290 14:48:39.995628 <6>[ 3.602200] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6291 14:48:40.002108 <4>[ 3.613546] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6292 14:48:40.005680 <6>[ 3.617238] cros-ec-spi spi2.0: Chrome EC device registered
6293 14:48:40.019163 <4>[ 3.632590] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6294 14:48:40.031380 <4>[ 3.644209] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6295 14:48:40.037926 <4>[ 3.653114] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6296 14:48:40.044452 <6>[ 3.655220] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6297 14:48:40.050836 <6>[ 3.666693] mmc0: new HS400 MMC card at address 0001
6298 14:48:40.057703 <6>[ 3.668121] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6299 14:48:40.064184 <6>[ 3.679951] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6300 14:48:40.072963 <6>[ 3.689497] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6301 14:48:40.082587 <6>[ 3.699072] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6302 14:48:40.092150 <6>[ 3.701984] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6303 14:48:40.095810 <6>[ 3.705946] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6304 14:48:40.109220 <6>[ 3.717310] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6305 14:48:40.115611 <6>[ 3.720493] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6306 14:48:40.125885 <6>[ 3.727138] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6307 14:48:40.135455 <6>[ 3.727318] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6308 14:48:40.142423 <6>[ 3.730839] NET: Registered PF_PACKET protocol family
6309 14:48:40.145342 <6>[ 3.763077] 9pnet: Installing 9P2000 support
6310 14:48:40.148582 <5>[ 3.767637] Key type dns_resolver registered
6311 14:48:40.155825 <6>[ 3.772515] registered taskstats version 1
6312 14:48:40.159036 <5>[ 3.776880] Loading compiled-in X.509 certificates
6313 14:48:40.173091 <6>[ 3.786160] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6314 14:48:40.204168 <3>[ 3.817623] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6315 14:48:40.230568 <4>[ 3.843775] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6316 14:48:40.244430 <6>[ 3.854330] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6317 14:48:40.254123 <6>[ 3.866458] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6318 14:48:40.267756 <3>[ 3.877791] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6319 14:48:40.283501 <3>[ 3.893559] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6320 14:48:40.290670 <3>[ 3.906606] debugfs: File 'Playback' in directory 'dapm' already present!
6321 14:48:40.299944 <3>[ 3.913661] debugfs: File 'Capture' in directory 'dapm' already present!
6322 14:48:40.314298 <6>[ 3.924521] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6323 14:48:40.325174 <6>[ 3.938486] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6324 14:48:40.328607 <6>[ 3.945929] hub 1-1:1.0: USB hub found
6325 14:48:40.338458 <6>[ 3.947031] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6326 14:48:40.341703 <6>[ 3.951482] hub 1-1:1.0: 3 ports detected
6327 14:48:40.351693 <6>[ 3.959534] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6328 14:48:40.358630 <6>[ 3.972329] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6329 14:48:40.368690 <6>[ 3.980847] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6330 14:48:40.375091 <6>[ 3.989365] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6331 14:48:40.384508 <6>[ 3.997882] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6332 14:48:40.391455 <6>[ 4.007097] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6333 14:48:40.397869 <6>[ 4.014626] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6334 14:48:40.405430 <6>[ 4.021931] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6335 14:48:40.415518 <6>[ 4.029168] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6336 14:48:40.422804 <6>[ 4.036585] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6337 14:48:40.429132 <6>[ 4.044898] panfrost 13040000.gpu: clock rate = 511999970
6338 14:48:40.439087 <6>[ 4.050601] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6339 14:48:40.445761 <6>[ 4.060875] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6340 14:48:40.455943 <6>[ 4.068885] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6341 14:48:40.469073 <6>[ 4.077319] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6342 14:48:40.475459 <6>[ 4.089398] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6343 14:48:40.487122 <6>[ 4.100427] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6344 14:48:40.496873 <6>[ 4.109419] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6345 14:48:40.507390 <6>[ 4.118567] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6346 14:48:40.514073 <6>[ 4.127698] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6347 14:48:40.523640 <6>[ 4.136825] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6348 14:48:40.533757 <6>[ 4.146126] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6349 14:48:40.543767 <6>[ 4.155427] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6350 14:48:40.553145 <6>[ 4.164900] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6351 14:48:40.563492 <6>[ 4.174373] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6352 14:48:40.570169 <6>[ 4.183500] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6353 14:48:40.645203 <6>[ 4.257962] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6354 14:48:40.655264 <6>[ 4.266881] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6355 14:48:40.665236 <6>[ 4.278443] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6356 14:48:40.681251 <6>[ 4.294172] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6357 14:48:41.380487 <6>[ 4.490722] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6358 14:48:41.389980 <4>[ 4.607525] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6359 14:48:41.397278 <4>[ 4.607544] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6360 14:48:41.403823 <6>[ 4.660692] r8152 1-1.2:1.0 eth0: v1.12.13
6361 14:48:41.410460 <6>[ 4.742173] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6362 14:48:41.416563 <6>[ 4.976992] Console: switching to colour frame buffer device 170x48
6363 14:48:41.423394 <6>[ 5.037627] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6364 14:48:41.442095 <6>[ 5.055152] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6365 14:48:41.448509 <6>[ 5.063144] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6366 14:48:42.749108 <6>[ 6.365478] r8152 1-1.2:1.0 eth0: carrier on
6367 14:48:44.957614 <5>[ 6.390175] Sending DHCP requests .., OK
6368 14:48:44.964313 <6>[ 8.578647] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6369 14:48:44.968045 <6>[ 8.587084] IP-Config: Complete:
6370 14:48:44.981412 <6>[ 8.590652] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6371 14:48:44.991120 <6>[ 8.601552] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6372 14:48:44.997671 <6>[ 8.611032] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6373 14:48:45.000841 <6>[ 8.611042] nameserver0=192.168.201.1
6374 14:48:45.007558 <6>[ 8.623440] clk: Disabling unused clocks
6375 14:48:45.010619 <6>[ 8.628523] ALSA device list:
6376 14:48:45.018639 <6>[ 8.635127] #0: mt8183_mt6358_ts3a227_max98357
6377 14:48:45.030340 <6>[ 8.646686] Freeing unused kernel memory: 8512K
6378 14:48:45.037984 <6>[ 8.654311] Run /init as init process
6379 14:48:45.072171 <6>[ 8.688334] NET: Registered PF_INET6 protocol family
6380 14:48:45.079621 <6>[ 8.696169] Segment Routing with IPv6
6381 14:48:45.082902 <6>[ 8.700812] In-situ OAM (IOAM) with IPv6
6382 14:48:45.125489 <30>[ 8.715447] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6383 14:48:45.134581 <30>[ 8.751088] systemd[1]: Detected architecture arm64.
6384 14:48:45.135108
6385 14:48:45.141699 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6386 14:48:45.142224
6387 14:48:45.153884 <30>[ 8.770534] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6388 14:48:45.309973 <30>[ 8.922945] systemd[1]: Queued start job for default target graphical.target.
6389 14:48:45.347127 <30>[ 8.959915] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6390 14:48:45.356781 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6391 14:48:45.374792 <30>[ 8.987851] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6392 14:48:45.384571 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6393 14:48:45.402467 <30>[ 9.015793] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6394 14:48:45.413979 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6395 14:48:45.433929 <30>[ 9.046951] systemd[1]: Created slice user.slice - User and Session Slice.
6396 14:48:45.443862 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6397 14:48:45.465239 <30>[ 9.074610] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6398 14:48:45.474904 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6399 14:48:45.497126 <30>[ 9.106764] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6400 14:48:45.508598 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6401 14:48:45.535214 <30>[ 9.138480] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6402 14:48:45.553736 <30>[ 9.166757] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6403 14:48:45.561065 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6404 14:48:45.581444 <30>[ 9.194337] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6405 14:48:45.593590 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6406 14:48:45.609339 <30>[ 9.222404] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6407 14:48:45.623326 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6408 14:48:45.638190 <30>[ 9.254406] systemd[1]: Reached target paths.target - Path Units.
6409 14:48:45.652592 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6410 14:48:45.669560 <30>[ 9.282768] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6411 14:48:45.682599 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6412 14:48:45.698617 <30>[ 9.314697] systemd[1]: Reached target slices.target - Slice Units.
6413 14:48:45.713472 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6414 14:48:45.726442 <30>[ 9.342384] systemd[1]: Reached target swap.target - Swaps.
6415 14:48:45.736855 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6416 14:48:45.757595 <30>[ 9.370424] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6417 14:48:45.771136 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6418 14:48:45.789967 <30>[ 9.402846] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6419 14:48:45.803743 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6420 14:48:45.823026 <30>[ 9.436015] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6421 14:48:45.835963 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6422 14:48:45.854105 <30>[ 9.467186] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6423 14:48:45.867819 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6424 14:48:45.886198 <30>[ 9.499070] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6425 14:48:45.898415 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6426 14:48:45.918099 <30>[ 9.531028] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6427 14:48:45.930792 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6428 14:48:45.950076 <30>[ 9.562822] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6429 14:48:45.962865 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6430 14:48:46.001490 <30>[ 9.614486] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6431 14:48:46.012833 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6432 14:48:46.035067 <30>[ 9.647642] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6433 14:48:46.045883 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6434 14:48:46.066776 <30>[ 9.679782] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6435 14:48:46.077965 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6436 14:48:46.101001 <30>[ 9.707010] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6437 14:48:46.142061 <30>[ 9.754890] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6438 14:48:46.154595 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6439 14:48:46.179558 <30>[ 9.792269] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6440 14:48:46.191038 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6441 14:48:46.215463 <30>[ 9.828191] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6442 14:48:46.229693 Starting [0;1;39mmodpr<6>[ 9.841663] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6443 14:48:46.233132 obe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6444 14:48:46.294106 <30>[ 9.907013] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6445 14:48:46.305460 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6446 14:48:46.326957 <30>[ 9.940208] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6447 14:48:46.339273 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6448 14:48:46.363568 <30>[ 9.976347] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6449 14:48:46.374906 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6450 14:48:46.417706 <30>[ 10.030809] systemd[1]: Starting systemd-journald.service - Journal Service...
6451 14:48:46.428722 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6452 14:48:46.448793 <30>[ 10.062200] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6453 14:48:46.459244 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6454 14:48:46.482158 <30>[ 10.092489] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6455 14:48:46.489168 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6456 14:48:46.512221 <30>[ 10.125968] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6457 14:48:46.525066 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6458 14:48:46.548145 <30>[ 10.161138] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6459 14:48:46.559136 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6460 14:48:46.585465 <30>[ 10.198021] systemd[1]: Started systemd-journald.service - Journal Service.
6461 14:48:46.595021 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6462 14:48:46.616040 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6463 14:48:46.634144 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6464 14:48:46.654581 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6465 14:48:46.675074 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6466 14:48:46.700087 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6467 14:48:46.720127 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6468 14:48:46.744681 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6469 14:48:46.762295 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6470 14:48:46.782474 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6471 14:48:46.801961 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6472 14:48:46.818239 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6473 14:48:46.835031 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6474 14:48:46.850145 See 'systemctl status systemd-remount-fs.service' for details.
6475 14:48:46.876784 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6476 14:48:46.939332 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6477 14:48:46.968159 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6478 14:48:46.991051 <46>[ 10.603950] systemd-journald[199]: Received client request to flush runtime journal.
6479 14:48:47.002618 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6480 14:48:47.059076 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6481 14:48:47.084750 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6482 14:48:47.108427 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6483 14:48:47.131648 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6484 14:48:47.152120 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6485 14:48:47.172164 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6486 14:48:47.191994 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6487 14:48:47.212386 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6488 14:48:47.266722 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6489 14:48:47.305885 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6490 14:48:47.326514 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6491 14:48:47.350057 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6492 14:48:47.386103 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6493 14:48:47.407078 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6494 14:48:47.434907 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6495 14:48:47.490712 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6496 14:48:47.512353 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6497 14:48:47.530005 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6498 14:48:47.562830 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6499 14:48:47.590432 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6500 14:48:47.606086 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6501 14:48:47.717830 <3>[ 11.327774] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6502 14:48:47.730007 <3>[ 11.342554] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6503 14:48:47.733071 <3>[ 11.344296] thermal_sys: Failed to find 'trips' node
6504 14:48:47.742698 <3>[ 11.349376] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6505 14:48:47.752980 <3>[ 11.354829] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6506 14:48:47.759550 <3>[ 11.365828] elan_i2c 2-0015: Error applying setting, reverse things back
6507 14:48:47.765952 <3>[ 11.372883] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6508 14:48:47.777304 <4>[ 11.372895] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6509 14:48:47.784215 <3>[ 11.390951] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6510 14:48:47.793516 <4>[ 11.395280] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6511 14:48:47.800437 <4>[ 11.405887] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6512 14:48:47.810683 <3>[ 11.406388] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6513 14:48:47.814199 <3>[ 11.409065] thermal_sys: Failed to find 'trips' node
6514 14:48:47.820713 <3>[ 11.409073] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6515 14:48:47.830806 <3>[ 11.409081] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6516 14:48:47.840756 <4>[ 11.409086] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6517 14:48:47.843574 <6>[ 11.425642] mc: Linux media interface: v0.10
6518 14:48:47.853908 <3>[ 11.430655] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6519 14:48:47.860823 <6>[ 11.476890] videodev: Linux video capture interface: v2.00
6520 14:48:47.871328 <3>[ 11.477375] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6521 14:48:47.878495 <6>[ 11.481384] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6522 14:48:47.884760 <6>[ 11.481529] cs_system_cfg: CoreSight Configuration manager initialised
6523 14:48:47.894293 <5>[ 11.482691] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6524 14:48:47.901619 <5>[ 11.497851] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6525 14:48:47.908331 <3>[ 11.500034] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6526 14:48:47.917479 <3>[ 11.500047] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6527 14:48:47.924509 <5>[ 11.507464] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6528 14:48:47.934465 <3>[ 11.514929] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6529 14:48:47.943882 <3>[ 11.514941] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6530 14:48:47.953902 <4>[ 11.521814] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6531 14:48:47.965409 <3>[ 11.530276] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6532 14:48:47.972936 <6>[ 11.538762] cfg80211: failed to load regulatory.db
6533 14:48:47.983571 <6>[ 11.554952] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6534 14:48:48.027176 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6535 14:48:48.035545 <3>[ 11.651574] mtk-scp 10500000.scp: invalid resource
6536 14:48:48.049022 [[0;32m OK [<6>[ 11.661838] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6537 14:48:48.055611 0m] Reached target [0;1;39msound.target[0m - Sound Card.
6538 14:48:48.059083 <6>[ 11.675933] Bluetooth: Core ver 2.22
6539 14:48:48.069134 <6>[ 11.680621] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6540 14:48:48.076024 <6>[ 11.682710] NET: Registered PF_BLUETOOTH protocol family
6541 14:48:48.088116 [[0;32m OK [<6>[ 11.702215] Bluetooth: HCI device and connection manager initialized
6542 14:48:48.094989 0m] Reached targ<6>[ 11.702282] remoteproc remoteproc0: scp is available
6543 14:48:48.101681 et [0;1;39mtime<6>[ 11.703338] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6544 14:48:48.111741 -set.target[0m - System Time Se<6>[ 11.709540] Bluetooth: HCI socket layer initialized
6545 14:48:48.112352 t.
6546 14:48:48.121663 <6>[ 11.709696] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6547 14:48:48.128394 <6>[ 11.723762] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6548 14:48:48.134934 <6>[ 11.725744] Bluetooth: L2CAP socket layer initialized
6549 14:48:48.141640 <4>[ 11.726059] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6550 14:48:48.147859 <6>[ 11.726069] remoteproc remoteproc0: powering up scp
6551 14:48:48.154530 <4>[ 11.726098] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6552 14:48:48.162519 <3>[ 11.726104] remoteproc remoteproc0: request_firmware failed: -2
6553 14:48:48.168765 <6>[ 11.733543] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6554 14:48:48.175103 <6>[ 11.734601] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6555 14:48:48.185610 <6>[ 11.741347] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6556 14:48:48.188757 <6>[ 11.741482] Bluetooth: SCO socket layer initialized
6557 14:48:48.212023 <46>[ 11.742466] systemd-journald[199]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.1 (1538 of 2047 items, 524288 file size, 340 bytes per hash table item), suggesting rotation.
6558 14:48:48.225079 <46>[ 11.742474] systemd-journald[199]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6559 14:48:48.235074 <6>[ 11.750514] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6560 14:48:48.245310 <6>[ 11.752643] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6561 14:48:48.251582 <6>[ 11.752765] usbcore: registered new interface driver uvcvideo
6562 14:48:48.258862 <6>[ 11.755577] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6563 14:48:48.262673 <6>[ 11.778361] Bluetooth: HCI UART driver ver 2.3
6564 14:48:48.272320 <6>[ 11.784693] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6565 14:48:48.283842 <6>[ 11.787094] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6566 14:48:48.291203 <6>[ 11.787106] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6567 14:48:48.302893 <6>[ 11.787441] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6568 14:48:48.309452 <6>[ 11.791095] Bluetooth: HCI UART protocol H4 registered
6569 14:48:48.319972 <6>[ 11.797616] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6570 14:48:48.322863 <6>[ 11.805454] Bluetooth: HCI UART protocol LL registered
6571 14:48:48.336000 <6>[ 11.831759] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6572 14:48:48.345872 <6>[ 11.832472] Bluetooth: HCI UART protocol Three-wire (H5) registered
6573 14:48:48.358900 <6>[ 11.847465] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6574 14:48:48.366489 <6>[ 11.855270] Bluetooth: HCI UART protocol Broadcom registered
6575 14:48:48.378479 <4>[ 11.870753] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6576 14:48:48.384998 <4>[ 11.870753] Fallback method does not support PEC.
6577 14:48:48.393092 <6>[ 11.872817] Bluetooth: HCI UART protocol QCA registered
6578 14:48:48.400079 <6>[ 11.873583] Bluetooth: hci0: setting up ROME/QCA6390
6579 14:48:48.409999 <3>[ 11.883277] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6580 14:48:48.417324 <6>[ 11.885389] Bluetooth: HCI UART protocol Marvell registered
6581 14:48:48.433603 <3>[ 11.904859] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6582 14:48:48.440746 <3>[ 11.905298] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6583 14:48:48.452493 <3>[ 11.911084] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6584 14:48:48.465874 <3>[ 11.916459] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6585 14:48:48.476405 <6>[ 11.935677] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6586 14:48:48.489610 <3>[ 11.947902] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6587 14:48:48.505467 <3>[ 12.013965] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6588 14:48:48.518200 <3>[ 12.014386] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6589 14:48:48.530699 <3>[ 12.020694] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6590 14:48:48.542068 <3>[ 12.051316] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6591 14:48:48.550534 <3>[ 12.087258] Bluetooth: hci0: Frame reassembly failed (-84)
6592 14:48:48.612390 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6593 14:48:48.631836 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6594 14:48:48.674808 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6595 14:48:48.691742 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6596 14:48:48.718713 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard <6>[ 12.330250] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6597 14:48:48.721858 unused blocks once a week.
6598 14:48:48.729644 <6>[ 12.346438] Bluetooth: hci0: QCA Product ID :0x00000008
6599 14:48:48.737694 <6>[ 12.354204] Bluetooth: hci0: QCA SOC Version :0x00000044
6600 14:48:48.746276 <6>[ 12.354213] Bluetooth: hci0: QCA ROM Version :0x00000302
6601 14:48:48.754149 <6>[ 12.354215] Bluetooth: hci0: QCA Patch Version:0x00000111
6602 14:48:48.762165 <6>[ 12.354221] Bluetooth: hci0: QCA controller version 0x00440302
6603 14:48:48.774485 <6>[ 12.354225] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6604 14:48:48.784569 <4>[ 12.354289] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6605 14:48:48.795686 <3>[ 12.354298] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6606 14:48:48.802413 <3>[ 12.354302] Bluetooth: hci0: QCA Failed to download patch (-2)
6607 14:48:48.813598 <4>[ 12.426308] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6608 14:48:48.819717 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6609 14:48:48.831806 <4>[ 12.445714] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6610 14:48:48.849924 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - <4>[ 12.461934] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6611 14:48:48.850028 Timer Units.
6612 14:48:48.856752 <4>[ 12.473832] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6613 14:48:48.868588 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6614 14:48:48.884883 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6615 14:48:48.892087 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6616 14:48:48.912622 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6617 14:48:48.947140 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6618 14:48:48.969630 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6619 14:48:48.997137 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6620 14:48:49.016238 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6621 14:48:49.050913 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6622 14:48:49.113090 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6623 14:48:49.150113 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6624 14:48:49.168740 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6625 14:48:49.207090 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6626 14:48:49.225678 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6627 14:48:49.248629 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6628 14:48:49.269830 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6629 14:48:49.290947 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6630 14:48:49.340804 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6631 14:48:49.376023 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6632 14:48:49.431616
6633 14:48:49.434646 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6634 14:48:49.435196
6635 14:48:49.437375 debian-bookworm-arm64 login: root (automatic login)
6636 14:48:49.437878
6637 14:48:49.459013 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024 aarch64
6638 14:48:49.459592
6639 14:48:49.465275 The programs included with the Debian GNU/Linux system are free software;
6640 14:48:49.472142 the exact distribution terms for each program are described in the
6641 14:48:49.475605 individual files in /usr/share/doc/*/copyright.
6642 14:48:49.476244
6643 14:48:49.482404 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6644 14:48:49.484865 permitted by applicable law.
6645 14:48:49.487970 Matched prompt #10: / #
6647 14:48:49.489504 Setting prompt string to ['/ #']
6648 14:48:49.490071 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6650 14:48:49.491654 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6651 14:48:49.492160 start: 2.2.6 expect-shell-connection (timeout 00:03:29) [common]
6652 14:48:49.492525 Setting prompt string to ['/ #']
6653 14:48:49.492832 Forcing a shell prompt, looking for ['/ #']
6655 14:48:49.543616 / #
6656 14:48:49.544301 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6657 14:48:49.544831 Waiting using forced prompt support (timeout 00:02:30)
6658 14:48:49.549788
6659 14:48:49.550605 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6660 14:48:49.551105 start: 2.2.7 export-device-env (timeout 00:03:29) [common]
6661 14:48:49.551614 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6662 14:48:49.552062 end: 2.2 depthcharge-retry (duration 00:01:31) [common]
6663 14:48:49.552480 end: 2 depthcharge-action (duration 00:01:31) [common]
6664 14:48:49.552906 start: 3 lava-test-retry (timeout 00:08:02) [common]
6665 14:48:49.553310 start: 3.1 lava-test-shell (timeout 00:08:02) [common]
6666 14:48:49.553689 Using namespace: common
6668 14:48:49.654796 / # #
6669 14:48:49.655682 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6670 14:48:49.661433 #
6671 14:48:49.662486 Using /lava-14167023
6673 14:48:49.764240 / # export SHELL=/bin/sh
6674 14:48:49.771080 export SHELL=/bin/sh
6676 14:48:49.872865 / # . /lava-14167023/environment
6677 14:48:49.878953 . /lava-14167023/environment
6679 14:48:49.980804 / # /lava-14167023/bin/lava-test-runner /lava-14167023/0
6680 14:48:49.981591 Test shell timeout: 10s (minimum of the action and connection timeout)
6681 14:48:49.987585 /lava-14167023/bin/lava-test-runner /lava-14167023/0
6682 14:48:50.020650 + export TESTRUN_ID=0_igt-kms-me<8>[ 13.635897] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 14167023_1.5.2.3.1>
6683 14:48:50.021504 Received signal: <STARTRUN> 0_igt-kms-mediatek 14167023_1.5.2.3.1
6684 14:48:50.021909 Starting test lava.0_igt-kms-mediatek (14167023_1.5.2.3.1)
6685 14:48:50.022357 Skipping test definition patterns.
6686 14:48:50.023962 diatek
6687 14:48:50.027952 + cd /lava-14167023/0/tests/0_igt-kms-mediatek
6688 14:48:50.028506 + cat uuid
6689 14:48:50.030964 + UUID=14167023_1.5.2.3.1
6690 14:48:50.031595 + set +x
6691 14:48:50.050775 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats core_getversion core_setmaster_vs_auth drm_read kms_addfb_bas<8>[ 13.665329] <LAVA_SIGNAL_TESTSET START core_auth>
6692 14:48:50.051625 Received signal: <TESTSET> START core_auth
6693 14:48:50.052032 Starting test_set core_auth
6694 14:48:50.057164 ic kms_atomic kms_flip_event_leak kms_prop_blob kms_setmode kms_vblank
6695 14:48:50.071898 <6>[ 13.687785] Console: switching to colour dummy device 80x25
6696 14:48:50.075383 <14>[ 13.693751] [IGT] core_auth: executing
6697 14:48:50.085390 IGT-Version: 1.2<14>[ 13.698301] [IGT] core_auth: starting subtest getclient-simple
6698 14:48:50.095600 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch6<14>[ 13.708969] [IGT] core_auth: finished subtest getclient-simple, SUCCESS
6699 14:48:50.096236 4)
6700 14:48:50.102316 Using IGT_SRANDOM=1717512472 for randomisation
6701 14:48:50.105684 Starting subtest: getclient-simple
6702 14:48:50.109049 Opened d<14>[ 13.725537] [IGT] core_auth: exiting, ret=0
6703 14:48:50.111753 evice: /dev/dri/card1
6704 14:48:50.114940 [1mSubtest getclient-simple: SUCCESS (0.003s)[0m
6705 14:48:50.164742 <6>[ 13.761022] Console: switching to colour frame buffer device 170x48
6706 14:48:50.180163 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
6708 14:48:50.182909 <8>[ 13.795261] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
6709 14:48:50.204574 <6>[ 13.820287] Console: switching to colour dummy device 80x25
6710 14:48:50.210931 <14>[ 13.826400] [IGT] core_auth: executing
6711 14:48:50.217174 IGT-Version: 1.2<14>[ 13.830739] [IGT] core_auth: starting subtest getclient-master-drop
6712 14:48:50.230827 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch6<14>[ 13.841782] [IGT] core_auth: finished subtest getclient-master-drop, SUCCESS
6713 14:48:50.231368 4)
6714 14:48:50.234078 Using IGT_SRANDOM=1717512472 for randomisation
6715 14:48:50.237468 Starting subtest: getclient-master-drop
6716 14:48:50.240654 Ope<14>[ 13.858598] [IGT] core_auth: exiting, ret=0
6717 14:48:50.243497 ned device: /dev/dri/card1
6718 14:48:50.250417 [1mSubtest getclient-master-drop: SUCCESS (0.003s)[0m
6719 14:48:50.297597 <6>[ 13.897122] Console: switching to colour frame buffer device 170x48
6720 14:48:50.315846 <8>[ 13.928494] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
6721 14:48:50.316705 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
6723 14:48:50.338775 <6>[ 13.955062] Console: switching to colour dummy device 80x25
6724 14:48:50.345323 <14>[ 13.961124] [IGT] core_auth: executing
6725 14:48:50.352006 IGT-Version: 1.2<14>[ 13.965869] [IGT] core_auth: starting subtest basic-auth
6726 14:48:50.358458 8-ga44ebfe (aarc<14>[ 13.972727] [IGT] core_auth: finished subtest basic-auth, SUCCESS
6727 14:48:50.361582 h64) (Linux: 6.1.91-cip21 aarch64)
6728 14:48:50.365254 Using IGT_SRANDOM=1717512473 for randomisation
6729 14:48:50.368363 Opened device: /dev/dri/card1
6730 14:48:50.375693 Starting subt<14>[ 13.991488] [IGT] core_auth: exiting, ret=0
6731 14:48:50.378760 est: basic-auth
6732 14:48:50.381517 [1mSubtest basic-auth: SUCCESS (0.000s)[0m
6733 14:48:50.431101 <6>[ 14.029734] Console: switching to colour frame buffer device 170x48
6734 14:48:50.445866 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
6736 14:48:50.448865 <8>[ 14.061701] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
6737 14:48:50.470792 <6>[ 14.086787] Console: switching to colour dummy device 80x25
6738 14:48:50.477323 <14>[ 14.093074] [IGT] core_auth: executing
6739 14:48:50.483957 IGT-Version: 1.2<14>[ 14.098575] [IGT] core_auth: starting subtest many-magics
6740 14:48:50.486753 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6741 14:48:50.494189 Using IGT_SRANDOM=1717512473 for randomisation
6742 14:48:50.500499 Opened devic<14>[ 14.114402] [IGT] core_auth: finished subtest many-magics, SUCCESS
6743 14:48:50.501044 e: /dev/dri/card1
6744 14:48:50.507508 Starting subtest: many-magics<14>[ 14.124343] [IGT] core_auth: exiting, ret=0
6745 14:48:50.510862
6746 14:48:50.514300 Reopening device failed after 1020 opens
6747 14:48:50.517400 [1mSubtest many-magics: SUCCESS (0.010s)[0m
6748 14:48:50.562631 <6>[ 14.159860] Console: switching to colour frame buffer device 170x48
6749 14:48:50.577803 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
6751 14:48:50.580265 <8>[ 14.193100] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
6752 14:48:50.583366 <8>[ 14.201811] <LAVA_SIGNAL_TESTSET STOP>
6753 14:48:50.584219 Received signal: <TESTSET> STOP
6754 14:48:50.584615 Closing test_set core_auth
6755 14:48:50.635499 <6>[ 14.251154] Console: switching to colour dummy device 80x25
6756 14:48:50.641886 <14>[ 14.257091] [IGT] core_getclient: executing
6757 14:48:50.647953 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6758 14:48:50.651689 Using IGT_SRANDOM=1717512473 for randomisation
6759 14:48:50.658201 Opened device: /dev/dri/card<14>[ 14.274273] [IGT] core_getclient: exiting, ret=0
6760 14:48:50.658670 1
6761 14:48:50.661286 SUCCESS (0.018s)
6762 14:48:50.713271 <6>[ 14.312654] Console: switching to colour frame buffer device 170x48
6763 14:48:50.731306 <8>[ 14.344548] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
6764 14:48:50.731917 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
6766 14:48:50.786507 <6>[ 14.402443] Console: switching to colour dummy device 80x25
6767 14:48:50.793502 <14>[ 14.408730] [IGT] core_getstats: executing
6768 14:48:50.799518 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6769 14:48:50.803030 Using IGT_SRANDOM=1717512473 for randomisation
6770 14:48:50.809683 Opened devic<14>[ 14.424067] [IGT] core_getstats: exiting, ret=0
6771 14:48:50.810256 e: /dev/dri/card1
6772 14:48:50.812991 SUCCESS (0.016s)
6773 14:48:50.863323 <6>[ 14.462745] Console: switching to colour frame buffer device 170x48
6774 14:48:50.882390 <8>[ 14.495316] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
6775 14:48:50.883224 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
6777 14:48:50.920806 <6>[ 14.536605] Console: switching to colour dummy device 80x25
6778 14:48:50.927249 <14>[ 14.542539] [IGT] core_getversion: executing
6779 14:48:50.934080 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6780 14:48:50.940162 Using IGT_SRANDOM=1717512473 for randomisati<14>[ 14.556745] [IGT] core_getversion: exiting, ret=0
6781 14:48:50.940716 on
6782 14:48:50.944099 Opened device: /dev/dri/card1
6783 14:48:50.946957 SUCCESS (0.015s)
6784 14:48:50.995505 <6>[ 14.594926] Console: switching to colour frame buffer device 170x48
6785 14:48:51.015063 <8>[ 14.627464] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
6786 14:48:51.015961 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
6788 14:48:51.068356 <6>[ 14.684750] Console: switching to colour dummy device 80x25
6789 14:48:51.075329 <14>[ 14.690987] [IGT] core_setmaster_vs_auth: executing
6790 14:48:51.081920 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6791 14:48:51.085084 Using IGT_SRANDOM=1717512473 for randomisation
6792 14:48:51.091835 Opened devic<14>[ 14.706429] [IGT] core_setmaster_vs_auth: exiting, ret=0
6793 14:48:51.095550 e: /dev/dri/card1
6794 14:48:51.096150 SUCCESS (0.016s)
6795 14:48:51.145197 <6>[ 14.744655] Console: switching to colour frame buffer device 170x48
6796 14:48:51.162382 <8>[ 14.775532] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
6797 14:48:51.163239 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
6799 14:48:51.197986 <8>[ 14.813804] <LAVA_SIGNAL_TESTSET START drm_read>
6800 14:48:51.198834 Received signal: <TESTSET> START drm_read
6801 14:48:51.199224 Starting test_set drm_read
6802 14:48:51.241130 <6>[ 14.856673] Console: switching to colour dummy device 80x25
6803 14:48:51.246862 <14>[ 14.862818] [IGT] drm_read: executing
6804 14:48:51.250209 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6805 14:48:51.257202 Using IGT_SRANDOM=1717512474 for randomisation
6806 14:48:51.260627 Opened device: /dev/dri/card1
6807 14:48:51.339647 <14>[ 14.955789] [IGT] drm_read: starting subtest invalid-buffer
6808 14:48:51.349633 Starting subtest<14>[ 14.961833] [IGT] drm_read: finished subtest invalid-buffer, SUCCESS
6809 14:48:51.350213 : invalid-buffer
6810 14:48:51.356142 [1mSubtest invalid-buffer: SUCCESS (0.000s)[0m
6811 14:48:51.372770 <14>[ 14.988924] [IGT] drm_read: exiting, ret=0
6812 14:48:51.428034 <6>[ 15.024197] Console: switching to colour frame buffer device 170x48
6813 14:48:51.445726 <8>[ 15.058792] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=pass>
6814 14:48:51.446501 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=pass
6816 14:48:51.466038 <6>[ 15.082385] Console: switching to colour dummy device 80x25
6817 14:48:51.469267 <14>[ 15.088321] [IGT] drm_read: executing
6818 14:48:51.475961 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6819 14:48:51.483144 Using IGT_SRANDOM=1717512474 for randomisation
6820 14:48:51.483709 Opened device: /dev/dri/card1
6821 14:48:51.538873 <14>[ 15.155176] [IGT] drm_read: starting subtest fault-buffer
6822 14:48:51.549130 Starting subtest<14>[ 15.161181] [IGT] drm_read: finished subtest fault-buffer, SUCCESS
6823 14:48:51.549713 : fault-buffer
6824 14:48:51.552447 [1mSubtest fault-buffer: SUCCESS (0.000s)[0m
6825 14:48:51.572241 <14>[ 15.188413] [IGT] drm_read: exiting, ret=0
6826 14:48:51.623948 <6>[ 15.223587] Console: switching to colour frame buffer device 170x48
6827 14:48:51.641753 <8>[ 15.254809] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=pass>
6828 14:48:51.642609 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=pass
6830 14:48:51.662452 <6>[ 15.278210] Console: switching to colour dummy device 80x25
6831 14:48:51.665502 <14>[ 15.284142] [IGT] drm_read: executing
6832 14:48:51.672386 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6833 14:48:51.679232 Using IGT_SRANDOM=1717512474 for randomisation
6834 14:48:51.682249 Opened device: /dev/dri/card1
6835 14:48:51.738162 <14>[ 15.354773] [IGT] drm_read: starting subtest empty-block
6836 14:48:51.741833 Starting subtest: empty-block
6837 14:48:52.716026 <14>[ 16.331735] [IGT] drm_read: finished subtest empty-block, SUCCESS
6838 14:48:52.722740 [1mSubtest empty-block: SUCCESS (0.971s)[0m
6839 14:48:52.752388 <14>[ 16.368868] [IGT] drm_read: exiting, ret=0
6840 14:48:52.808354 <6>[ 16.407065] Console: switching to colour frame buffer device 170x48
6841 14:48:52.826097 <8>[ 16.439129] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=pass>
6842 14:48:52.826790 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=pass
6844 14:48:52.846638 <6>[ 16.462694] Console: switching to colour dummy device 80x25
6845 14:48:52.849760 <14>[ 16.468630] [IGT] drm_read: executing
6846 14:48:52.856730 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6847 14:48:52.863301 Using IGT_SRANDOM=1717512475 for randomisation
6848 14:48:52.863765 Opened device: /dev/dri/card1
6849 14:48:52.918635 <14>[ 16.534891] [IGT] drm_read: starting subtest empty-nonblock
6850 14:48:52.924965 <14>[ 16.540926] [IGT] drm_read: finished subtest empty-nonblock, SUCCESS
6851 14:48:52.928622 Starting subtest: empty-nonblock
6852 14:48:52.935078 [1mSubtest empty-nonblock: SUCCESS (0.000s)[0m
6853 14:48:52.951765 <14>[ 16.568147] [IGT] drm_read: exiting, ret=0
6854 14:48:53.003742 <6>[ 16.603252] Console: switching to colour frame buffer device 170x48
6855 14:48:53.021799 <8>[ 16.634866] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=pass>
6856 14:48:53.022636 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=pass
6858 14:48:53.043241 <6>[ 16.659468] Console: switching to colour dummy device 80x25
6859 14:48:53.047051 <14>[ 16.665417] [IGT] drm_read: executing
6860 14:48:53.053185 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6861 14:48:53.060126 Using IGT_SRANDOM=1717512475 for randomisation
6862 14:48:53.063537 Opened device: /dev/dri/card1
6863 14:48:53.117997 <14>[ 16.734356] [IGT] drm_read: starting subtest short-buffer-block
6864 14:48:53.127969 <14>[ 16.740743] [IGT] drm_read: finished subtest short-buffer-block, SUCCESS
6865 14:48:53.131882 Starting subtest: short-buffer-block
6866 14:48:53.134378 [1mSubtest short-buffer-block: SUCCESS (0.000s)[0m
6867 14:48:53.151598 <14>[ 16.767452] [IGT] drm_read: exiting, ret=0
6868 14:48:53.206079 <6>[ 16.802715] Console: switching to colour frame buffer device 170x48
6869 14:48:53.225129 <8>[ 16.838175] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=pass>
6870 14:48:53.225967 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=pass
6872 14:48:53.257454 <6>[ 16.873630] Console: switching to colour dummy device 80x25
6873 14:48:53.260465 <14>[ 16.879573] [IGT] drm_read: executing
6874 14:48:53.267680 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6875 14:48:53.274415 Using IGT_SRANDOM=1717512476 for randomisation
6876 14:48:53.274837 Opened device: /dev/dri/card1
6877 14:48:53.334841 <14>[ 16.950550] [IGT] drm_read: starting subtest short-buffer-nonblock
6878 14:48:53.344554 Starting subtest<14>[ 16.957191] [IGT] drm_read: finished subtest short-buffer-nonblock, SUCCESS
6879 14:48:53.347878 : short-buffer-nonblock
6880 14:48:53.351130 [1mSubtest short-buffer-nonblock: SUCCESS (0.000s)[0m
6881 14:48:53.367951 <14>[ 16.983642] [IGT] drm_read: exiting, ret=0
6882 14:48:53.419868 <6>[ 17.018992] Console: switching to colour frame buffer device 170x48
6883 14:48:53.437491 <8>[ 17.050362] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=pass>
6884 14:48:53.438341 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=pass
6886 14:48:53.460195 <6>[ 17.076314] Console: switching to colour dummy device 80x25
6887 14:48:53.466864 <14>[ 17.082478] [IGT] drm_read: executing
6888 14:48:53.470275 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
6889 14:48:53.476375 Using IGT_SRANDOM=1717512476 for randomisation
6890 14:48:53.479991 Opened device: /dev/dri/card1
6891 14:48:53.533573 <14>[ 17.149863] [IGT] drm_read: starting subtest short-buffer-wakeup
6892 14:48:53.537314 Starting subtest: short-buffer-wakeup
6893 14:49:16.047843 <6>[ 39.665987] vaux18: disabling
6894 14:49:16.050107 <6>[ 39.669406] vio28: disabling
6895 14:49:25.759608 [1mSubtest shor<14>[ 49.371471] [IGT] drm_read: finished subtest short-buffer-wakeup, SUCCESS
6896 14:49:25.763195 t-buffer-wakeup: SUCCESS (32.215s)[0m
6897 14:49:25.782142 <14>[ 49.397106] [IGT] drm_read: exiting, ret=0
6898 14:49:25.842884 <6>[ 49.441820] Console: switching to colour frame buffer device 170x48
6899 14:49:25.864812 <8>[ 49.476741] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=pass>
6900 14:49:25.865666 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=pass
6902 14:49:25.871763 <8>[ 49.486930] <LAVA_SIGNAL_TESTSET STOP>
6903 14:49:25.872612 Received signal: <TESTSET> STOP
6904 14:49:25.873000 Closing test_set drm_read
6905 14:49:25.909537 <8>[ 49.524925] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
6906 14:49:25.910382 Received signal: <TESTSET> START kms_addfb_basic
6907 14:49:25.910776 Starting test_set kms_addfb_basic
6908 14:49:25.942471 <6>[ 49.557761] Console: switching to colour dummy device 80x25
6909 14:49:25.949479 <14>[ 49.563718] [IGT] kms_addfb_basic: executing
6910 14:49:25.959302 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch6<14>[ 49.573237] [IGT] kms_addfb_basic: starting subtest unused-handle
6911 14:49:25.962639 4)
6912 14:49:25.968948 Using IGT_SR<14>[ 49.581088] [IGT] kms_addfb_basic: finished subtest unused-handle, SUCCESS
6913 14:49:25.972432 ANDOM=1717512509 for randomisation
6914 14:49:25.975849 Opened device: /dev/dri/card1
6915 14:49:25.979188 Starting subtest: unused-handle
6916 14:49:25.982245 [1mSubtest unused-handle: SUCCESS (0.000s)[0m
6917 14:49:25.989241 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6918 14:49:25.991792 Test requirement: is_intel_device(fd)
6919 14:49:25.999105 <14>[ 49.613372] [IGT] kms_addfb_basic: exiting, ret=0
6920 14:49:26.005135 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6921 14:49:26.008775 Test requirement: is_intel_device(fd)
6922 14:49:26.015282 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6923 14:49:26.021780 Test requirement: is_intel_device(fd)
6924 14:49:26.052697 <6>[ 49.648702] Console: switching to colour frame buffer device 170x48
6925 14:49:26.069186 <8>[ 49.680905] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
6926 14:49:26.070041 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
6928 14:49:26.090056 <6>[ 49.705454] Console: switching to colour dummy device 80x25
6929 14:49:26.096969 <14>[ 49.711387] [IGT] kms_addfb_basic: executing
6930 14:49:26.106722 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1<14>[ 49.719800] [IGT] kms_addfb_basic: starting subtest unused-pitches
6931 14:49:26.116497 .91-cip21 aarch6<14>[ 49.727289] [IGT] kms_addfb_basic: finished subtest unused-pitches, SUCCESS
6932 14:49:26.117052 4)
6933 14:49:26.120252 Using IGT_SRANDOM=1717512509 for randomisation
6934 14:49:26.123396 Opened device: /dev/dri/card1
6935 14:49:26.126906 Starting subtest: unused-pitches
6936 14:49:26.130427 [1mSubtest unused-pitches: SUCCESS (0.000s)[0m
6937 14:49:26.136879 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6938 14:49:26.140178 Test requirement: is_intel_device(fd)
6939 14:49:26.146451 Test requireme<14>[ 49.762813] [IGT] kms_addfb_basic: exiting, ret=0
6940 14:49:26.153243 nt not met in function igt_require_intel, file ../lib/drmtest.c:880:
6941 14:49:26.156324 Test requirement: is_intel_device(fd)
6942 14:49:26.166370 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6943 14:49:26.169549 Test requirement: is_intel_device(fd)
6944 14:49:26.202080 <6>[ 49.798077] Console: switching to colour frame buffer device 170x48
6945 14:49:26.220059 <8>[ 49.831591] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
6946 14:49:26.220912 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
6948 14:49:26.240072 <6>[ 49.855274] Console: switching to colour dummy device 80x25
6949 14:49:26.246524 <14>[ 49.861232] [IGT] kms_addfb_basic: executing
6950 14:49:26.257077 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1<14>[ 49.869507] [IGT] kms_addfb_basic: starting subtest unused-offsets
6951 14:49:26.266487 .91-cip21 aarch6<14>[ 49.876988] [IGT] kms_addfb_basic: finished subtest unused-offsets, SUCCESS
6952 14:49:26.266995 4)
6953 14:49:26.269884 Using IGT_SRANDOM=1717512509 for randomisation
6954 14:49:26.273309 Opened device: /dev/dri/card1
6955 14:49:26.276346 Starting subtest: unused-offsets
6956 14:49:26.279826 [1mSubtest unused-offsets: SUCCESS (0.000s)[0m
6957 14:49:26.286824 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6958 14:49:26.289667 Test requirement: is_intel_device(fd)
6959 14:49:26.299594 Test requirement not met in fu<14>[ 49.912432] [IGT] kms_addfb_basic: exiting, ret=0
6960 14:49:26.302601 nction igt_require_intel, file ../lib/drmtest.c:880:
6961 14:49:26.306197 Test requirement: is_intel_device(fd)
6962 14:49:26.312738 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6963 14:49:26.316385 Test requirement: is_intel_device(fd)
6964 14:49:26.352076 <6>[ 49.947684] Console: switching to colour frame buffer device 170x48
6965 14:49:26.369768 <8>[ 49.981732] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
6966 14:49:26.370573 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
6968 14:49:26.401873 <6>[ 50.017443] Console: switching to colour dummy device 80x25
6969 14:49:26.408649 <14>[ 50.023612] [IGT] kms_addfb_basic: executing
6970 14:49:26.421919 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch6<14>[ 50.032877] [IGT] kms_addfb_basic: starting subtest unused-modifier
6971 14:49:26.422483 4)
6972 14:49:26.428402 Using IGT_SR<14>[ 50.041013] [IGT] kms_addfb_basic: finished subtest unused-modifier, SUCCESS
6973 14:49:26.431947 ANDOM=1717512509 for randomisation
6974 14:49:26.435604 Opened device: /dev/dri/card1
6975 14:49:26.438275 Starting subtest: unused-modifier
6976 14:49:26.442265 [1mSubtest unused-modifier: SUCCESS (0.000s)[0m
6977 14:49:26.451673 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6978 14:49:26.455313 Test requirement: is_intel_device(fd)
6979 14:49:26.465332 Test requirement not met in function igt_require_intel, file<14>[ 50.078628] [IGT] kms_addfb_basic: exiting, ret=0
6980 14:49:26.465902 ../lib/drmtest.c:880:
6981 14:49:26.468615 Test requirement: is_intel_device(fd)
6982 14:49:26.478454 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
6983 14:49:26.481967 Test requirement: is_intel_device(fd)
6984 14:49:26.518638 <6>[ 50.117659] Console: switching to colour frame buffer device 170x48
6985 14:49:26.537219 <8>[ 50.149409] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
6986 14:49:26.538354 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
6988 14:49:26.559850 <6>[ 50.174834] Console: switching to colour dummy device 80x25
6989 14:49:26.566013 <14>[ 50.181224] [IGT] kms_addfb_basic: executing
6990 14:49:26.576001 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1<14>[ 50.189994] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
6991 14:49:26.586245 .91-cip21 aarch6<14>[ 50.197599] [IGT] kms_addfb_basic: finished subtest clobberred-modifier, SKIP
6992 14:49:26.586683 4)
6993 14:49:26.589479 Using IGT_SRANDOM=1717512509 for randomisation
6994 14:49:26.592638 Opened device: /dev/dri/card1
6995 14:49:26.595912 Starting subtest: clobberred-modifier
6996 14:49:26.605501 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:885:
6997 14:49:26.609082 Test requirement: is_i915_device(fd)
6998 14:49:26.615876 [1mSubtest c<14>[ 50.228393] [IGT] kms_addfb_basic: exiting, ret=77
6999 14:49:26.619102 lobberred-modifier: SKIP (0.000s)[0m
7000 14:49:26.625797 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7001 14:49:26.629002 Test requirement: is_intel_device(fd)
7002 14:49:26.635967 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7003 14:49:26.638982 Test requirement: is_intel_device(fd)
7004 14:49:26.645533 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7005 14:49:26.648987 Test requirement: is_intel_device(fd)
7006 14:49:26.667596 <6>[ 50.263846] Console: switching to colour frame buffer device 170x48
7007 14:49:26.686541 <8>[ 50.298590] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
7008 14:49:26.687337 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
7010 14:49:26.720127 <6>[ 50.335350] Console: switching to colour dummy device 80x25
7011 14:49:26.727182 <14>[ 50.341481] [IGT] kms_addfb_basic: executing
7012 14:49:26.739992 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch6<14>[ 50.351218] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
7013 14:49:26.740552 4)
7014 14:49:26.750025 Using IGT_SR<14>[ 50.359953] [IGT] kms_addfb_basic: finished subtest invalid-smem-bo-on-discrete, SKIP
7015 14:49:26.753829 ANDOM=1717512509 for randomisation
7016 14:49:26.754318 Opened device: /dev/dri/card1
7017 14:49:26.760006 Starting subtest: invalid-smem-bo-on-discrete
7018 14:49:26.766901 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7019 14:49:26.770475 Test requirement: is_intel_device(fd)
7020 14:49:26.773170 [1mSubtest invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
7021 14:49:26.780378 Test re<14>[ 50.394687] [IGT] kms_addfb_basic: exiting, ret=77
7022 14:49:26.786625 quirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7023 14:49:26.790128 Test requirement: is_intel_device(fd)
7024 14:49:26.800321 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7025 14:49:26.803119 Test requirement: is_intel_device(fd)
7026 14:49:26.810273 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7027 14:49:26.813309 Test requirement: is_intel_device(fd)
7028 14:49:26.834184 <6>[ 50.429961] Console: switching to colour frame buffer device 170x48
7029 14:49:26.851173 <8>[ 50.463263] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
7030 14:49:26.852081 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
7032 14:49:26.872730 <6>[ 50.488329] Console: switching to colour dummy device 80x25
7033 14:49:26.880200 <14>[ 50.494290] [IGT] kms_addfb_basic: executing
7034 14:49:26.889698 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1<14>[ 50.502517] [IGT] kms_addfb_basic: starting subtest legacy-format
7035 14:49:26.893233 .91-cip21 aarch64)
7036 14:49:26.896544 Using IGT_SRANDOM=1717512509 for randomisation
7037 14:49:26.900032 Opened device: /dev/dri/card1
7038 14:49:26.909983 Starting subtest: legacy-form<14>[ 50.520970] [IGT] kms_addfb_basic: finished subtest legacy-format, SUCCESS
7039 14:49:26.910556 at
7040 14:49:26.912775 Successfully fuzzed 10000 {bpp, depth} variations
7041 14:49:26.916137 [1mSubtest legacy-format: SUCCESS (0.011s)[0m
7042 14:49:26.930019 Test requirement not met in function igt_require_intel, file ../lib/drmt<14>[ 50.544125] [IGT] kms_addfb_basic: exiting, ret=0
7043 14:49:26.930584 est.c:880:
7044 14:49:26.932936 Test requirement: is_intel_device(fd)
7045 14:49:26.939867 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7046 14:49:26.946526 Test requirement: is_intel_device(fd)
7047 14:49:26.952649 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7048 14:49:26.956456 Test requirement: is_intel_device(fd)
7049 14:49:26.980473 <6>[ 50.579118] Console: switching to colour frame buffer device 170x48
7050 14:49:26.997819 <8>[ 50.609989] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
7051 14:49:26.998697 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
7053 14:49:27.031860 <6>[ 50.647145] Console: switching to colour dummy device 80x25
7054 14:49:27.038597 <14>[ 50.653304] [IGT] kms_addfb_basic: executing
7055 14:49:27.045132 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7056 14:49:27.052033 Using IGT_SR<14>[ 50.664854] [IGT] kms_addfb_basic: starting subtest no-handle
7057 14:49:27.058561 ANDOM=1717512510<14>[ 50.671625] [IGT] kms_addfb_basic: finished subtest no-handle, SUCCESS
7058 14:49:27.061398 for randomisation
7059 14:49:27.065174 Opened device: /dev/dri/card1
7060 14:49:27.065729 Starting subtest: no-handle
7061 14:49:27.071985 [1mSubtest no-handle: SUCCESS (0.000s)[0m
7062 14:49:27.078360 Test requirement not met in function igt_require_in<14>[ 50.693699] [IGT] kms_addfb_basic: exiting, ret=0
7063 14:49:27.081452 tel, file ../lib/drmtest.c:880:
7064 14:49:27.084759 Test requirement: is_intel_device(fd)
7065 14:49:27.095039 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7066 14:49:27.097748 Test requirement: is_intel_device(fd)
7067 14:49:27.104631 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7068 14:49:27.107354 Test requirement: is_intel_device(fd)
7069 14:49:27.130789 <6>[ 50.729113] Console: switching to colour frame buffer device 170x48
7070 14:49:27.146284 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
7072 14:49:27.149107 <8>[ 50.761093] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
7073 14:49:27.181385 <6>[ 50.796904] Console: switching to colour dummy device 80x25
7074 14:49:27.188368 <14>[ 50.803088] [IGT] kms_addfb_basic: executing
7075 14:49:27.194963 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7076 14:49:27.202089 Using IGT_SR<14>[ 50.814721] [IGT] kms_addfb_basic: starting subtest basic
7077 14:49:27.208094 ANDOM=1717512510<14>[ 50.821252] [IGT] kms_addfb_basic: finished subtest basic, SUCCESS
7078 14:49:27.211585 for randomisation
7079 14:49:27.215058 Opened device: /dev/dri/card1
7080 14:49:27.215562 Starting subtest: basic
7081 14:49:27.218533 [1mSubtest basic: SUCCESS (0.000s)[0m
7082 14:49:27.228016 Test requirement not met in function igt_re<14>[ 50.843371] [IGT] kms_addfb_basic: exiting, ret=0
7083 14:49:27.231261 quire_intel, file ../lib/drmtest.c:880:
7084 14:49:27.234918 Test requirement: is_intel_device(fd)
7085 14:49:27.241187 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7086 14:49:27.245029 Test requirement: is_intel_device(fd)
7087 14:49:27.254504 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7088 14:49:27.257997 Test requirement: is_intel_device(fd)
7089 14:49:27.279894 <6>[ 50.878399] Console: switching to colour frame buffer device 170x48
7090 14:49:27.294844 <8>[ 50.909762] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
7091 14:49:27.295723 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
7093 14:49:27.332056 <6>[ 50.947380] Console: switching to colour dummy device 80x25
7094 14:49:27.338499 <14>[ 50.953564] [IGT] kms_addfb_basic: executing
7095 14:49:27.345538 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7096 14:49:27.352225 Using IGT_SR<14>[ 50.965093] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
7097 14:49:27.359105 ANDOM=1717512510<14>[ 50.971991] [IGT] kms_addfb_basic: finished subtest bad-pitch-0, SUCCESS
7098 14:49:27.362019 for randomisation
7099 14:49:27.365095 Opened device: /dev/dri/card1
7100 14:49:27.368206 Starting subtest: bad-pitch-0
7101 14:49:27.372046 [1mSubtest bad-pitch-0: SUCCESS (0.000s)[0m
7102 14:49:27.378730 Test requiremen<14>[ 50.993000] [IGT] kms_addfb_basic: exiting, ret=0
7103 14:49:27.384993 t not met in function igt_require_intel, file ../lib/drmtest.c:880:
7104 14:49:27.388253 Test requirement: is_intel_device(fd)
7105 14:49:27.395323 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7106 14:49:27.398551 Test requirement: is_intel_device(fd)
7107 14:49:27.404806 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7108 14:49:27.408304 Test requirement: is_intel_device(fd)
7109 14:49:27.429614 <6>[ 51.028514] Console: switching to colour frame buffer device 170x48
7110 14:49:27.448359 <8>[ 51.060142] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
7111 14:49:27.449219 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
7113 14:49:27.481407 <6>[ 51.096321] Console: switching to colour dummy device 80x25
7114 14:49:27.487167 <14>[ 51.102461] [IGT] kms_addfb_basic: executing
7115 14:49:27.494655 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7116 14:49:27.500645 Using IGT_SRANDOM=1717512510<14>[ 51.115414] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
7117 14:49:27.511217 for randomisati<14>[ 51.122134] [IGT] kms_addfb_basic: finished subtest bad-pitch-32, SUCCESS
7118 14:49:27.511802 on
7119 14:49:27.514759 Opened device: /dev/dri/card1
7120 14:49:27.517948 Starting subtest: bad-pitch-32
7121 14:49:27.520616 [1mSubtest bad-pitch-32: SUCCESS (0.000s)[0m
7122 14:49:27.527369 Test requirement not met in f<14>[ 51.142328] [IGT] kms_addfb_basic: exiting, ret=0
7123 14:49:27.533874 unction igt_require_intel, file ../lib/drmtest.c:880:
7124 14:49:27.537731 Test requirement: is_intel_device(fd)
7125 14:49:27.543515 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7126 14:49:27.547330 Test requirement: is_intel_device(fd)
7127 14:49:27.554012 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7128 14:49:27.557410 Test requirement: is_intel_device(fd)
7129 14:49:27.579303 <6>[ 51.177654] Console: switching to colour frame buffer device 170x48
7130 14:49:27.597661 <8>[ 51.209590] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
7131 14:49:27.598505 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
7133 14:49:27.630667 <6>[ 51.245867] Console: switching to colour dummy device 80x25
7134 14:49:27.637371 <14>[ 51.252084] [IGT] kms_addfb_basic: executing
7135 14:49:27.643817 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7136 14:49:27.650321 Using IGT_SR<14>[ 51.263873] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
7137 14:49:27.657130 ANDOM=1717512510<14>[ 51.270600] [IGT] kms_addfb_basic: finished subtest bad-pitch-63, SUCCESS
7138 14:49:27.660412 for randomisation
7139 14:49:27.664037 Opened device: /dev/dri/card1
7140 14:49:27.666941 Starting subtest: bad-pitch-63
7141 14:49:27.669899 [1mSubtest bad-pitch-63: SUCCESS (0.000s)[0m
7142 14:49:27.676609 Test requirement not met in f<14>[ 51.292300] [IGT] kms_addfb_basic: exiting, ret=0
7143 14:49:27.683340 unction igt_require_intel, file ../lib/drmtest.c:880:
7144 14:49:27.686608 Test requirement: is_intel_device(fd)
7145 14:49:27.693293 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7146 14:49:27.696305 Test requirement: is_intel_device(fd)
7147 14:49:27.702937 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7148 14:49:27.706542 Test requirement: is_intel_device(fd)
7149 14:49:27.728598 <6>[ 51.327472] Console: switching to colour frame buffer device 170x48
7150 14:49:27.746208 <8>[ 51.358228] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
7151 14:49:27.747031 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
7153 14:49:27.780227 <6>[ 51.395599] Console: switching to colour dummy device 80x25
7154 14:49:27.786821 <14>[ 51.401822] [IGT] kms_addfb_basic: executing
7155 14:49:27.793848 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7156 14:49:27.800370 Using IGT_SR<14>[ 51.413440] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
7157 14:49:27.807279 ANDOM=1717512510<14>[ 51.420471] [IGT] kms_addfb_basic: finished subtest bad-pitch-128, SUCCESS
7158 14:49:27.810446 for randomisation
7159 14:49:27.814051 Opened device: /dev/dri/card1
7160 14:49:27.817407 Starting subtest: bad-pitch-128
7161 14:49:27.819956 [1mSubtest bad-pitch-128: SUCCESS (0.000s)[0m
7162 14:49:27.827184 Test requirement not met in<14>[ 51.441535] [IGT] kms_addfb_basic: exiting, ret=0
7163 14:49:27.833007 function igt_require_intel, file ../lib/drmtest.c:880:
7164 14:49:27.837267 Test requirement: is_intel_device(fd)
7165 14:49:27.843350 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7166 14:49:27.846859 Test requirement: is_intel_device(fd)
7167 14:49:27.854044 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7168 14:49:27.857010 Test requirement: is_intel_device(fd)
7169 14:49:27.878308 <6>[ 51.477088] Console: switching to colour frame buffer device 170x48
7170 14:49:27.896700 <8>[ 51.508992] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
7171 14:49:27.897495 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
7173 14:49:27.929795 <6>[ 51.544893] Console: switching to colour dummy device 80x25
7174 14:49:27.936146 <14>[ 51.551267] [IGT] kms_addfb_basic: executing
7175 14:49:27.943165 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7176 14:49:27.949510 Using IGT_SR<14>[ 51.562425] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
7177 14:49:27.956152 ANDOM=1717512511<14>[ 51.569563] [IGT] kms_addfb_basic: finished subtest bad-pitch-256, SUCCESS
7178 14:49:27.959862 for randomisation
7179 14:49:27.963222 Opened device: /dev/dri/card1
7180 14:49:27.966376 Starting subtest: bad-pitch-256
7181 14:49:27.969509 [1mSubtest bad-pitch-256: SUCCESS (0.000s)[0m
7182 14:49:27.976458 Test requirement not met in<14>[ 51.591333] [IGT] kms_addfb_basic: exiting, ret=0
7183 14:49:27.982986 function igt_require_intel, file ../lib/drmtest.c:880:
7184 14:49:27.986976 Test requirement: is_intel_device(fd)
7185 14:49:27.992827 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7186 14:49:27.996124 Test requirement: is_intel_device(fd)
7187 14:49:28.002591 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7188 14:49:28.008964 Test requirement: is_intel_device(fd)
7189 14:49:28.027813 <6>[ 51.626423] Console: switching to colour frame buffer device 170x48
7190 14:49:28.045554 <8>[ 51.657380] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
7191 14:49:28.046340 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
7193 14:49:28.078342 <6>[ 51.693683] Console: switching to colour dummy device 80x25
7194 14:49:28.085070 <14>[ 51.699905] [IGT] kms_addfb_basic: executing
7195 14:49:28.092019 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7196 14:49:28.098430 Using IGT_SR<14>[ 51.711232] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
7197 14:49:28.108234 ANDOM=1717512511<14>[ 51.718330] [IGT] kms_addfb_basic: finished subtest bad-pitch-1024, SUCCESS
7198 14:49:28.108799 for randomisation
7199 14:49:28.111309 Opened device: /dev/dri/card1
7200 14:49:28.115026 Starting subtest: bad-pitch-1024
7201 14:49:28.118375 [1mSubtest bad-pitch-1024: SUCCESS (0.000s)[0m
7202 14:49:28.124936 Test requirement not met <14>[ 51.740732] [IGT] kms_addfb_basic: exiting, ret=0
7203 14:49:28.131272 in function igt_require_intel, file ../lib/drmtest.c:880:
7204 14:49:28.135096 Test requirement: is_intel_device(fd)
7205 14:49:28.141330 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7206 14:49:28.145023 Test requirement: is_intel_device(fd)
7207 14:49:28.151720 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7208 14:49:28.154450 Test requirement: is_intel_device(fd)
7209 14:49:28.177845 <6>[ 51.776025] Console: switching to colour frame buffer device 170x48
7210 14:49:28.196345 <8>[ 51.807888] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
7211 14:49:28.197150 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
7213 14:49:28.229229 <6>[ 51.844211] Console: switching to colour dummy device 80x25
7214 14:49:28.235520 <14>[ 51.850375] [IGT] kms_addfb_basic: executing
7215 14:49:28.242240 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7216 14:49:28.249325 Using IGT_SR<14>[ 51.862154] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
7217 14:49:28.255840 ANDOM=1717512511<14>[ 51.868970] [IGT] kms_addfb_basic: finished subtest bad-pitch-999, SUCCESS
7218 14:49:28.258452 for randomisation
7219 14:49:28.262063 Opened device: /dev/dri/card1
7220 14:49:28.265414 Starting subtest: bad-pitch-999
7221 14:49:28.268464 [1mSubtest bad-pitch-999: SUCCESS (0.000s)[0m
7222 14:49:28.275520 Test requirement not met in<14>[ 51.890518] [IGT] kms_addfb_basic: exiting, ret=0
7223 14:49:28.282328 function igt_require_intel, file ../lib/drmtest.c:880:
7224 14:49:28.285484 Test requirement: is_intel_device(fd)
7225 14:49:28.291859 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7226 14:49:28.295316 Test requirement: is_intel_device(fd)
7227 14:49:28.305320 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7228 14:49:28.308916 Test requirement: is_intel_device(fd)
7229 14:49:28.327140 <6>[ 51.925991] Console: switching to colour frame buffer device 170x48
7230 14:49:28.344897 <8>[ 51.957555] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
7231 14:49:28.345301 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
7233 14:49:28.378146 <6>[ 51.994243] Console: switching to colour dummy device 80x25
7234 14:49:28.385325 <14>[ 52.000365] [IGT] kms_addfb_basic: executing
7235 14:49:28.391890 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7236 14:49:28.398474 Using IGT_SR<14>[ 52.011497] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
7237 14:49:28.408540 ANDOM=1717512511<14>[ 52.018864] [IGT] kms_addfb_basic: finished subtest bad-pitch-65536, SUCCESS
7238 14:49:28.408655 for randomisation
7239 14:49:28.411939 Opened device: /dev/dri/card1
7240 14:49:28.414817 Starting subtest: bad-pitch-65536
7241 14:49:28.418359 [1mSubtest bad-pitch-65536: SUCCESS (0.000s)[0m
7242 14:49:28.425173 Test re<14>[ 52.039936] [IGT] kms_addfb_basic: exiting, ret=0
7243 14:49:28.431419 quirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7244 14:49:28.434771 Test requirement: is_intel_device(fd)
7245 14:49:28.441543 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7246 14:49:28.444597 Test requirement: is_intel_device(fd)
7247 14:49:28.454873 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7248 14:49:28.457996 Test requirement: is_intel_device(fd)
7249 14:49:28.476083 <6>[ 52.075233] Console: switching to colour frame buffer device 170x48
7250 14:49:28.495947 <8>[ 52.107584] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
7251 14:49:28.496744 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
7253 14:49:28.528765 <6>[ 52.144148] Console: switching to colour dummy device 80x25
7254 14:49:28.535024 <14>[ 52.150412] [IGT] kms_addfb_basic: executing
7255 14:49:28.541927 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7256 14:49:28.551773 Using IGT_SRANDOM=1717512511 for randomisati<14>[ 52.163900] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
7257 14:49:28.552197 on
7258 14:49:28.561866 Opened devic<14>[ 52.172467] [IGT] kms_addfb_basic: finished subtest invalid-get-prop-any, SUCCESS
7259 14:49:28.562375 e: /dev/dri/card1
7260 14:49:28.565207 Starting subtest: invalid-get-prop-any
7261 14:49:28.575160 [1mSubtest invalid-get-prop-any: SUC<14>[ 52.189650] [IGT] kms_addfb_basic: exiting, ret=0
7262 14:49:28.575626 CESS (0.000s)[0m
7263 14:49:28.585144 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7264 14:49:28.588162 Test requirement: is_intel_device(fd)
7265 14:49:28.595023 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7266 14:49:28.598430 Test requirement: is_intel_device(fd)
7267 14:49:28.604896 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7268 14:49:28.611689 Test requirement: is_intel_device(fd)
7269 14:49:28.626577 <6>[ 52.224892] Console: switching to colour frame buffer device 170x48
7270 14:49:28.644301 <8>[ 52.256674] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
7271 14:49:28.645457 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
7273 14:49:28.678237 <6>[ 52.293115] Console: switching to colour dummy device 80x25
7274 14:49:28.684506 <14>[ 52.299322] [IGT] kms_addfb_basic: executing
7275 14:49:28.691330 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7276 14:49:28.698329 Using IGT_SRANDOM=1717512511<14>[ 52.312514] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
7277 14:49:28.708226 for randomisati<14>[ 52.319878] [IGT] kms_addfb_basic: finished subtest invalid-get-prop, SUCCESS
7278 14:49:28.708741 on
7279 14:49:28.711506 Opened device: /dev/dri/card1
7280 14:49:28.714479 Starting subtest: invalid-get-prop
7281 14:49:28.718333 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
7282 14:49:28.724381 Test <14>[ 52.339266] [IGT] kms_addfb_basic: exiting, ret=0
7283 14:49:28.731091 requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7284 14:49:28.734515 Test requirement: is_intel_device(fd)
7285 14:49:28.744377 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7286 14:49:28.747437 Test requirement: is_intel_device(fd)
7287 14:49:28.754327 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7288 14:49:28.757711 Test requirement: is_intel_device(fd)
7289 14:49:28.775454 <6>[ 52.374648] Console: switching to colour frame buffer device 170x48
7290 14:49:28.793003 <8>[ 52.405417] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
7291 14:49:28.793352 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
7293 14:49:28.827914 <6>[ 52.443731] Console: switching to colour dummy device 80x25
7294 14:49:28.834633 <14>[ 52.449969] [IGT] kms_addfb_basic: executing
7295 14:49:28.841212 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7296 14:49:28.851088 Using IGT_SRANDOM=1717512511 for randomisati<14>[ 52.463374] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
7297 14:49:28.851209 on
7298 14:49:28.861211 Opened devic<14>[ 52.472131] [IGT] kms_addfb_basic: finished subtest invalid-set-prop-any, SUCCESS
7299 14:49:28.861324 e: /dev/dri/card1
7300 14:49:28.864167 Starting subtest: invalid-set-prop-any
7301 14:49:28.874511 [1mSubtest invalid-set-prop-any: SUC<14>[ 52.488841] [IGT] kms_addfb_basic: exiting, ret=0
7302 14:49:28.874630 CESS (0.000s)[0m
7303 14:49:28.884539 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7304 14:49:28.887982 Test requirement: is_intel_device(fd)
7305 14:49:28.894694 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7306 14:49:28.898257 Test requirement: is_intel_device(fd)
7307 14:49:28.904405 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7308 14:49:28.907810 Test requirement: is_intel_device(fd)
7309 14:49:28.925200 <6>[ 52.524237] Console: switching to colour frame buffer device 170x48
7310 14:49:28.943859 <8>[ 52.556161] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
7311 14:49:28.944227 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
7313 14:49:28.977071 <6>[ 52.592722] Console: switching to colour dummy device 80x25
7314 14:49:28.983907 <14>[ 52.598982] [IGT] kms_addfb_basic: executing
7315 14:49:28.991105 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7316 14:49:29.000766 Using IGT_SRANDOM=1717512512 for randomisati<14>[ 52.612368] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
7317 14:49:29.001287 on
7318 14:49:29.011191 Opened devic<14>[ 52.620419] [IGT] kms_addfb_basic: finished subtest invalid-set-prop, SUCCESS
7319 14:49:29.011767 e: /dev/dri/card1
7320 14:49:29.014104 Starting subtest: invalid-set-prop
7321 14:49:29.017100 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
7322 14:49:29.023856 Test <14>[ 52.638445] [IGT] kms_addfb_basic: exiting, ret=0
7323 14:49:29.030648 requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7324 14:49:29.034335 Test requirement: is_intel_device(fd)
7325 14:49:29.044040 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7326 14:49:29.047098 Test requirement: is_intel_device(fd)
7327 14:49:29.053595 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7328 14:49:29.056656 Test requirement: is_intel_device(fd)
7329 14:49:29.075193 <6>[ 52.673689] Console: switching to colour frame buffer device 170x48
7330 14:49:29.093137 <8>[ 52.704798] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
7331 14:49:29.093944 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
7333 14:49:29.127054 <6>[ 52.742279] Console: switching to colour dummy device 80x25
7334 14:49:29.133397 <14>[ 52.748425] [IGT] kms_addfb_basic: executing
7335 14:49:29.140617 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7336 14:49:29.143898 Using IGT_SRANDOM=1717512512 for randomisation
7337 14:49:29.150746 Opened devic<14>[ 52.763716] [IGT] kms_addfb_basic: starting subtest master-rmfb
7338 14:49:29.160031 e: /dev/dri/card<14>[ 52.771205] [IGT] kms_addfb_basic: finished subtest master-rmfb, SUCCESS
7339 14:49:29.160565 1
7340 14:49:29.163578 Starting subtest: master-rmfb
7341 14:49:29.166658 [1mSubtest master-rmfb: SUCCESS (0.000s)[0m
7342 14:49:29.173358 Test requirement not met in fun<14>[ 52.787974] [IGT] kms_addfb_basic: exiting, ret=0
7343 14:49:29.179735 ction igt_require_intel, file ../lib/drmtest.c:880:
7344 14:49:29.183254 Test requirement: is_intel_device(fd)
7345 14:49:29.189623 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7346 14:49:29.193069 Test requirement: is_intel_device(fd)
7347 14:49:29.199655 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7348 14:49:29.202777 Test requirement: is_intel_device(fd)
7349 14:49:29.223990 <6>[ 52.823321] Console: switching to colour frame buffer device 170x48
7350 14:49:29.239695 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
7352 14:49:29.242471 <8>[ 52.854987] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
7353 14:49:29.276255 <6>[ 52.891973] Console: switching to colour dummy device 80x25
7354 14:49:29.282841 <14>[ 52.898248] [IGT] kms_addfb_basic: executing
7355 14:49:29.289610 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7356 14:49:29.293288 Using IGT_SRANDOM=1717512512 for randomisation
7357 14:49:29.303129 Opened device: /dev/dri/card<14>[ 52.915174] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
7358 14:49:29.303313 1
7359 14:49:29.312889 Starting subtest<14>[ 52.923345] [IGT] kms_addfb_basic: finished subtest addfb25-modifier-no-flag, SUCCESS
7360 14:49:29.316629 : addfb25-modifier-no-flag
7361 14:49:29.322729 [1mSubtest addfb25-modifier-no-flag<14>[ 52.937535] [IGT] kms_addfb_basic: exiting, ret=0
7362 14:49:29.326448 : SUCCESS (0.000s)[0m
7363 14:49:29.332881 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7364 14:49:29.335961 Test requirement: is_intel_device(fd)
7365 14:49:29.343300 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7366 14:49:29.346037 Test requirement: is_intel_device(fd)
7367 14:49:29.352838 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7368 14:49:29.359504 Test requirement: is_intel_device(fd)
7369 14:49:29.374425 <6>[ 52.972970] Console: switching to colour frame buffer device 170x48
7370 14:49:29.392713 <8>[ 53.004432] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
7371 14:49:29.393568 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
7373 14:49:29.415630 <6>[ 53.030685] Console: switching to colour dummy device 80x25
7374 14:49:29.421567 <14>[ 53.036623] [IGT] kms_addfb_basic: executing
7375 14:49:29.428702 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7376 14:49:29.431485 Using IGT_SRANDOM=1717512512 for randomisation
7377 14:49:29.438259 Opened devic<14>[ 53.052024] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
7378 14:49:29.441619 e: /dev/dri/card1
7379 14:49:29.445400 Starting subtest: addfb25-bad-modifier
7380 14:49:29.455507 (kms_addfb_basic:470) CRITICAL: Test <14>[ 53.067895] [IGT] kms_addfb_basic: finished subtest addfb25-bad-modifier, FAIL
7381 14:49:29.461802 assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:714:
7382 14:49:29.475243 (kms_addfb_basic:470) CRITICAL: Failed assertion: igt_ioctl((fd)<14>[ 53.087376] [IGT] kms_addfb_basic: exiting, ret=98
7383 14:49:29.484616 , ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
7384 14:49:29.491609 (kms_addfb_basic:470) CRITICAL: error: 0 != -1
7385 14:49:29.492120 Stack trace:
7386 14:49:29.494810 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
7387 14:49:29.498542 #1 [<unknown>+0xbbee4358]
7388 14:49:29.501578 #2 [<unknown>+0xbbee5fbc]
7389 14:49:29.502093 #3 [<unknown>+0xbbee156c]
7390 14:49:29.504806 #4 [__libc_init_first+0x80]
7391 14:49:29.507886 #5 [__libc_start_main+0x98]
7392 14:49:29.511611 #6 [<unknown>+0xbbee15b0]
7393 14:49:29.515165 Subtest addfb25-bad-modifier failed.
7394 14:49:29.515727 **** DEBUG ****
7395 14:49:29.524389 (kms_addfb_basic:470) ioctl_wrappers-DEBUG<6>[ 53.122277] Console: switching to colour frame buffer device 170x48
7396 14:49:29.531515 : Test requirement passed: igt_has_fb_modifiers(fd)
7397 14:49:29.544210 (kms_addfb_basic:470) CRITICAL: Test assertion failure function addfb25_tes<8>[ 53.156119] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
7398 14:49:29.544911 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
7400 14:49:29.547639 ts, file ../tests/kms_addfb_basic.c:714:
7401 14:49:29.567447 (kms_addfb_basic:470) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
7402 14:49:29.570859 (kms_addfb_basic:470) CRITICAL: error: 0 != -1
7403 14:49:29.574199 (kms_addfb_basic:470) igt_core-INFO: Stack trace:
7404 14:49:29.580950 (kms_<6>[ 53.195316] Console: switching to colour dummy device 80x25
7405 14:49:29.587503 addfb_basic:470)<14>[ 53.202135] [IGT] kms_addfb_basic: executing
7406 14:49:29.594280 igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
7407 14:49:29.600699 (kms_addfb_basic:470) igt_core-INFO: #1 [<unknown>+0xbbee4358]
7408 14:49:29.604305 (kms_addfb_basic:470) igt_core-INFO: #2 [<unknown>+0xbbee5fbc]
7409 14:49:29.610926 (kms_addfb_basic:470) igt_core-INFO: #3 [<unknown>+0xbbee156c]
7410 14:49:29.617649 (kms_addfb_basic:470) igt_core-INFO: #4 [__libc_init_first+0x80]
7411 14:49:29.624548 (kms_<14>[ 53.237076] [IGT] kms_addfb_basic: exiting, ret=77
7412 14:49:29.627747 addfb_basic:470) igt_core-INFO: #5 [__libc_start_main+0x98]
7413 14:49:29.633968 (kms_addfb_basic:470) igt_core-INFO: #6 [<unknown>+0xbbee15b0]
7414 14:49:29.634405 **** END ****
7415 14:49:29.641159 [1mSubtest addfb25-bad-modifier: FAIL (0.008s)[0m
7416 14:49:29.647354 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7417 14:49:29.651192 Test requirement: is_intel_device(fd)
7418 14:49:29.657934 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7419 14:49:29.660980 Test requirement: is_intel_device(fd)
7420 14:49:29.671046 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7421 14:49:29.677615 Test requirement: is_intel_devi<6>[ 53.272442] Console: switching to colour frame buffer device 170x48
7422 14:49:29.681152 ce(fd)
7423 14:49:29.684121 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7424 14:49:29.697483 Using IGT_SRANDOM=17<8>[ 53.307137] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
7425 14:49:29.698008 17512512 for randomisation
7426 14:49:29.698631 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
7428 14:49:29.700537 Opened device: /dev/dri/card1
7429 14:49:29.707530 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7430 14:49:29.710901 Test requirement: is_intel_device(fd)
7431 14:49:29.717300 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
7432 14:49:29.730279 Test requirement not met in function igt_require_intel, file ../lib/drmtes<6>[ 53.343905] Console: switching to colour dummy device 80x25
7433 14:49:29.730798 t.c:880:
7434 14:49:29.737036 Test r<14>[ 53.350423] [IGT] kms_addfb_basic: executing
7435 14:49:29.737476 equirement: is_intel_device(fd)
7436 14:49:29.747244 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7437 14:49:29.750390 Test requirement: is_intel_device(fd)
7438 14:49:29.757289 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7439 14:49:29.760351 Using IGT_SRANDOM=1717512512 for randomisation
7440 14:49:29.763314 Opened device: /dev/dri/card1
7441 14:49:29.773487 Test requirement not met in function igt_require_<14>[ 53.386553] [IGT] kms_addfb_basic: exiting, ret=77
7442 14:49:29.776903 intel, file ../lib/drmtest.c:880:
7443 14:49:29.779941 Test requirement: is_intel_device(fd)
7444 14:49:29.783376 [1mSubtest addfb25-x-tiled-legacy: SKIP (0.000s)[0m
7445 14:49:29.790114 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7446 14:49:29.793245 Test requirement: is_intel_device(fd)
7447 14:49:29.803133 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7448 14:49:29.806521 Test requirement: is_intel_device(fd)
7449 14:49:29.826704 <6>[ 53.422925] Console: switching to colour frame buffer device 170x48
7450 14:49:29.843289 <8>[ 53.455392] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
7451 14:49:29.844153 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
7453 14:49:29.864351 <6>[ 53.479774] Console: switching to colour dummy device 80x25
7454 14:49:29.871361 <14>[ 53.485793] [IGT] kms_addfb_basic: executing
7455 14:49:29.878054 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7456 14:49:29.881704 Using IGT_SRANDOM=1717512512 for randomisation
7457 14:49:29.884501 Opened device: /dev/dri/card1
7458 14:49:29.891301 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7459 14:49:29.894916 Test requirement: is_intel_device(fd)
7460 14:49:29.904487 [1mSubtest addfb25-framebuffer-vs-set-tiling: SKI<14>[ 53.519569] [IGT] kms_addfb_basic: exiting, ret=77
7461 14:49:29.907673 P (0.000s)[0m
7462 14:49:29.914649 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7463 14:49:29.918028 Test requirement: is_intel_device(fd)
7464 14:49:29.924734 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7465 14:49:29.927571 Test requirement: is_intel_device(fd)
7466 14:49:29.958940 <6>[ 53.557662] Console: switching to colour frame buffer device 170x48
7467 14:49:29.975830 <8>[ 53.587977] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
7468 14:49:29.976616 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
7470 14:49:30.009914 <6>[ 53.624983] Console: switching to colour dummy device 80x25
7471 14:49:30.016335 <14>[ 53.631239] [IGT] kms_addfb_basic: executing
7472 14:49:30.022917 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7473 14:49:30.026505 Using IGT_SRANDOM=1717512513 for randomisation
7474 14:49:30.029947 Opened device: /dev/dri/card1
7475 14:49:30.035968 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7476 14:49:30.039527 Test requirement: is_intel_device(fd)
7477 14:49:30.046089 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7478 14:49:30.055793 Test requirement: is_intel_dev<14>[ 53.669344] [IGT] kms_addfb_basic: exiting, ret=77
7479 14:49:30.056298 ice(fd)
7480 14:49:30.062648 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
7481 14:49:30.069592 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7482 14:49:30.072266 Test requirement: is_intel_device(fd)
7483 14:49:30.109871 <6>[ 53.707356] Console: switching to colour frame buffer device 170x48
7484 14:49:30.125726 <8>[ 53.737841] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
7485 14:49:30.126491 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
7487 14:49:30.146630 <6>[ 53.761898] Console: switching to colour dummy device 80x25
7488 14:49:30.153445 <14>[ 53.767838] [IGT] kms_addfb_basic: executing
7489 14:49:30.159710 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7490 14:49:30.163510 Using IGT_SRANDOM=1717512513 for randomisation
7491 14:49:30.167005 Opened device: /dev/dri/card1
7492 14:49:30.173237 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7493 14:49:30.176243 Test requirement: is_intel_device(fd)
7494 14:49:30.186046 Test requirement not met in function igt_require_intel, file ../li<14>[ 53.802035] [IGT] kms_addfb_basic: exiting, ret=77
7495 14:49:30.189801 b/drmtest.c:880:
7496 14:49:30.193148 Test requirement: is_intel_device(fd)
7497 14:49:30.196283 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)[0m
7498 14:49:30.206390 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7499 14:49:30.209664 Test requirement: is_intel_device(fd)
7500 14:49:30.241390 <6>[ 53.840099] Console: switching to colour frame buffer device 170x48
7501 14:49:30.259588 <8>[ 53.871765] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
7502 14:49:30.260359 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
7504 14:49:30.292404 <6>[ 53.907746] Console: switching to colour dummy device 80x25
7505 14:49:30.299202 <14>[ 53.914175] [IGT] kms_addfb_basic: executing
7506 14:49:30.306020 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7507 14:49:30.309327 Using IGT_SRANDOM=1717512513 for randomisation
7508 14:49:30.312346 Opened device: /dev/dri/card1
7509 14:49:30.319240 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7510 14:49:30.322302 Test requirement: is_intel_device(fd)
7511 14:49:30.328789 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7512 14:49:30.338811 Test requirement: is_intel_dev<14>[ 53.951958] [IGT] kms_addfb_basic: exiting, ret=77
7513 14:49:30.339355 ice(fd)
7514 14:49:30.342269 [1mSubtest tile-pitch-mismatch: SKIP (0.000s)[0m
7515 14:49:30.352061 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7516 14:49:30.355447 Test requirement: is_intel_device(fd)
7517 14:49:30.392168 <6>[ 53.989757] Console: switching to colour frame buffer device 170x48
7518 14:49:30.409749 <8>[ 54.021556] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
7519 14:49:30.410619 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
7521 14:49:30.431850 <6>[ 54.046638] Console: switching to colour dummy device 80x25
7522 14:49:30.438069 <14>[ 54.052603] [IGT] kms_addfb_basic: executing
7523 14:49:30.444788 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7524 14:49:30.448257 Using IGT_SRANDOM=1717512513 for randomisation
7525 14:49:30.451579 Opened device: /dev/dri/card1
7526 14:49:30.457732 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7527 14:49:30.460945 Test requirement: is_intel_device(fd)
7528 14:49:30.470844 Test requirement not met in function igt_require_i<14>[ 54.084560] [IGT] kms_addfb_basic: exiting, ret=77
7529 14:49:30.474545 ntel, file ../lib/drmtest.c:880:
7530 14:49:30.477835 Test requirement: is_intel_device(fd)
7531 14:49:30.481184 [1mSubtest basic-y-tiled-legacy: SKIP (0.000s)[0m
7532 14:49:30.490378 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7533 14:49:30.493743 Test requirement: is_intel_device(fd)
7534 14:49:30.524450 <6>[ 54.119982] Console: switching to colour frame buffer device 170x48
7535 14:49:30.542316 <8>[ 54.154254] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
7536 14:49:30.543096 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
7538 14:49:30.575264 <6>[ 54.190689] Console: switching to colour dummy device 80x25
7539 14:49:30.582298 <14>[ 54.196865] [IGT] kms_addfb_basic: executing
7540 14:49:30.588626 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7541 14:49:30.591597 Using IGT_SRANDOM=1717512513 for randomisation
7542 14:49:30.595463 Opened device: /dev/dri/card1
7543 14:49:30.605273 Test requirement not met in function igt_require<14>[ 54.218705] [IGT] kms_addfb_basic: starting subtest size-max
7544 14:49:30.611976 _intel, file ../<14>[ 54.225347] [IGT] kms_addfb_basic: finished subtest size-max, SUCCESS
7545 14:49:30.618503 lib/drmtest.c:88<14>[ 54.234184] [IGT] kms_addfb_basic: exiting, ret=0
7546 14:49:30.619021 0:
7547 14:49:30.622039 Test requirement: is_intel_device(fd)
7548 14:49:30.631941 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7549 14:49:30.635072 Test requirement: is_intel_device(fd)
7550 14:49:30.638552 Starting subtest: size-max
7551 14:49:30.641653 [1mSubtest size-max: SUCCESS (0.000s)[0m
7552 14:49:30.648427 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7553 14:49:30.651867 Test requirement: is_intel_device(fd)
7554 14:49:30.671333 <6>[ 54.269873] Console: switching to colour frame buffer device 170x48
7555 14:49:30.685676 <8>[ 54.300926] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=pass>
7556 14:49:30.686512 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=pass
7558 14:49:30.721988 <6>[ 54.336761] Console: switching to colour dummy device 80x25
7559 14:49:30.728214 <14>[ 54.342900] [IGT] kms_addfb_basic: executing
7560 14:49:30.734746 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7561 14:49:30.738188 Using IGT_SRANDOM=1717512513 for randomisation
7562 14:49:30.741514 Opened device: /dev/dri/card1
7563 14:49:30.751341 Test requirement not met in function igt_requ<14>[ 54.364038] [IGT] kms_addfb_basic: starting subtest too-wide
7564 14:49:30.757895 ire_intel, file <14>[ 54.370978] [IGT] kms_addfb_basic: finished subtest too-wide, SUCCESS
7565 14:49:30.761481 ../lib/drmtest.c:880:
7566 14:49:30.764973 Test requirement: is_intel_device(fd)
7567 14:49:30.768407 Te<14>[ 54.383945] [IGT] kms_addfb_basic: exiting, ret=0
7568 14:49:30.778094 st requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7569 14:49:30.781278 Test requirement: is_intel_device(fd)
7570 14:49:30.781790 Starting subtest: too-wide
7571 14:49:30.788129 [1mSubtest too-wide: SUCCESS (0.000s)[0m
7572 14:49:30.794848 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7573 14:49:30.797788 Test requirement: is_intel_device(fd)
7574 14:49:30.820137 <6>[ 54.419631] Console: switching to colour frame buffer device 170x48
7575 14:49:30.834842 <8>[ 54.450862] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=pass>
7576 14:49:30.835116 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=pass
7578 14:49:30.871242 <6>[ 54.486934] Console: switching to colour dummy device 80x25
7579 14:49:30.878068 <14>[ 54.493124] [IGT] kms_addfb_basic: executing
7580 14:49:30.885067 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7581 14:49:30.888247 Using IGT_SRANDOM=1717512513 for randomisation
7582 14:49:30.891912 Opened device: /dev/dri/card1
7583 14:49:30.898348 Test requirement not met in f<14>[ 54.512631] [IGT] kms_addfb_basic: starting subtest too-high
7584 14:49:30.908282 unction igt_requ<14>[ 54.519623] [IGT] kms_addfb_basic: finished subtest too-high, SUCCESS
7585 14:49:30.911656 ire_intel, file ../lib/drmtest.c:880:
7586 14:49:30.918310 Test requirement: is_inte<14>[ 54.533389] [IGT] kms_addfb_basic: exiting, ret=0
7587 14:49:30.918828 l_device(fd)
7588 14:49:30.928590 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7589 14:49:30.931288 Test requirement: is_intel_device(fd)
7590 14:49:30.931753 Starting subtest: too-high
7591 14:49:30.937786 [1mSubtest too-high: SUCCESS (0.000s)[0m
7592 14:49:30.944410 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7593 14:49:30.948150 Test requirement: is_intel_device(fd)
7594 14:49:30.969712 <6>[ 54.568553] Console: switching to colour frame buffer device 170x48
7595 14:49:30.985381 <8>[ 54.600540] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=pass>
7596 14:49:30.986087 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=pass
7598 14:49:31.008644 <6>[ 54.624044] Console: switching to colour dummy device 80x25
7599 14:49:31.015207 <14>[ 54.630178] [IGT] kms_addfb_basic: executing
7600 14:49:31.021685 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7601 14:49:31.024933 Using IGT_SRANDOM=1717512514 for randomisation
7602 14:49:31.028162 Opened device: /dev/dri/card1
7603 14:49:31.034644 Test requirem<14>[ 54.649140] [IGT] kms_addfb_basic: starting subtest bo-too-small
7604 14:49:31.044777 ent not met in f<14>[ 54.655633] [IGT] kms_addfb_basic: finished subtest bo-too-small, SUCCESS
7605 14:49:31.051344 unction igt_require_intel, file <14>[ 54.666355] [IGT] kms_addfb_basic: exiting, ret=0
7606 14:49:31.054671 ../lib/drmtest.c:880:
7607 14:49:31.058217 Test requirement: is_intel_device(fd)
7608 14:49:31.064548 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7609 14:49:31.067789 Test requirement: is_intel_device(fd)
7610 14:49:31.071522 Starting subtest: bo-too-small
7611 14:49:31.074411 [1mSubtest bo-too-small: SUCCESS (0.000s)[0m
7612 14:49:31.080892 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7613 14:49:31.084321 Test requirement: is_intel_device(fd)
7614 14:49:31.102638 <6>[ 54.701508] Console: switching to colour frame buffer device 170x48
7615 14:49:31.121080 <8>[ 54.733243] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=pass>
7616 14:49:31.121394 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=pass
7618 14:49:31.141656 <6>[ 54.757471] Console: switching to colour dummy device 80x25
7619 14:49:31.148272 <14>[ 54.763463] [IGT] kms_addfb_basic: executing
7620 14:49:31.155355 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7621 14:49:31.158730 Using IGT_SRANDOM=1717512514 for randomisation
7622 14:49:31.161949 Opened device: /dev/dri/card1
7623 14:49:31.168100 Test requirement not met in f<14>[ 54.782662] [IGT] kms_addfb_basic: starting subtest small-bo
7624 14:49:31.178307 unction igt_requ<14>[ 54.790208] [IGT] kms_addfb_basic: finished subtest small-bo, SUCCESS
7625 14:49:31.184560 ire_intel, file <14>[ 54.799339] [IGT] kms_addfb_basic: exiting, ret=0
7626 14:49:31.184652 ../lib/drmtest.c:880:
7627 14:49:31.191223 Test requirement: is_intel_device(fd)
7628 14:49:31.198187 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7629 14:49:31.201069 Test requirement: is_intel_device(fd)
7630 14:49:31.204576 Starting subtest: small-bo
7631 14:49:31.207673 [1mSubtest small-bo: SUCCESS (0.000s)[0m
7632 14:49:31.214612 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7633 14:49:31.217448 Test requirement: is_intel_device(fd)
7634 14:49:31.235917 <6>[ 54.834386] Console: switching to colour frame buffer device 170x48
7635 14:49:31.249987 <8>[ 54.865689] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=pass>
7636 14:49:31.250270 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=pass
7638 14:49:31.274902 <6>[ 54.890542] Console: switching to colour dummy device 80x25
7639 14:49:31.281415 <14>[ 54.896508] [IGT] kms_addfb_basic: executing
7640 14:49:31.287927 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7641 14:49:31.291178 Using IGT_SRANDOM=1717512514 for randomisation
7642 14:49:31.294999 Opened device: /dev/dri/card1
7643 14:49:31.304512 Test requirement not met in f<14>[ 54.915979] [IGT] kms_addfb_basic: starting subtest bo-too-small-due-to-tiling
7644 14:49:31.311517 <14>[ 54.924936] [IGT] kms_addfb_basic: finished subtest bo-too-small-due-to-tiling, SKIP
7645 14:49:31.317690 unction igt_require_intel, file ../lib/drmtest.c:880:
7646 14:49:31.321189 Test requirement: is_intel_device(fd)
7647 14:49:31.327742 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7648 14:49:31.334062 Test requireme<14>[ 54.948856] [IGT] kms_addfb_basic: exiting, ret=77
7649 14:49:31.337919 nt: is_intel_device(fd)
7650 14:49:31.341181 Starting subtest: bo-too-small-due-to-tiling
7651 14:49:31.347398 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:885:
7652 14:49:31.350750 Test requirement: is_i915_device(fd)
7653 14:49:31.357484 [1mSubtest bo-too-small-due-to-tiling: SKIP (0.000s)[0m
7654 14:49:31.364300 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7655 14:49:31.367293 Test requirement: is_intel_device(fd)
7656 14:49:31.388591 <6>[ 54.984341] Console: switching to colour frame buffer device 170x48
7657 14:49:31.407140 <8>[ 55.018974] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
7658 14:49:31.407972 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
7660 14:49:31.431656 <6>[ 55.046440] Console: switching to colour dummy device 80x25
7661 14:49:31.437519 <14>[ 55.052707] [IGT] kms_addfb_basic: executing
7662 14:49:31.444225 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7663 14:49:31.447884 Using IGT_SRANDOM=1717512514 for randomisation
7664 14:49:31.451200 Opened device: /dev/dri/card1
7665 14:49:31.457722 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7666 14:49:31.460787 Test requirement: is_intel_device(fd)
7667 14:49:31.467631 Test requirement n<14>[ 55.081986] [IGT] kms_addfb_basic: exiting, ret=77
7668 14:49:31.474296 ot met in function igt_require_intel, file ../lib/drmtest.c:880:
7669 14:49:31.477933 Test requirement: is_intel_device(fd)
7670 14:49:31.484664 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7671 14:49:31.487371 Test requirement: is_intel_device(fd)
7672 14:49:31.493879 [1mSubtest addfb25-y-tiled-legacy: SKIP (0.000s)[0m
7673 14:49:31.522108 <6>[ 55.120104] Console: switching to colour frame buffer device 170x48
7674 14:49:31.539996 <8>[ 55.151849] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
7675 14:49:31.540811 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
7677 14:49:31.574524 <6>[ 55.189820] Console: switching to colour dummy device 80x25
7678 14:49:31.581126 <14>[ 55.196003] [IGT] kms_addfb_basic: executing
7679 14:49:31.587530 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7680 14:49:31.590618 Using IGT_SRANDOM=1717512514 for randomisation
7681 14:49:31.594034 Opened device: /dev/dri/card1
7682 14:49:31.600515 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7683 14:49:31.603728 Test requirement: is_intel_device(fd)
7684 14:49:31.617541 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:<14>[ 55.231553] [IGT] kms_addfb_basic: exiting, ret=77
7685 14:49:31.617711
7686 14:49:31.621175 Test requirement: is_intel_device(fd)
7687 14:49:31.627537 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7688 14:49:31.630446 Test requirement: is_intel_device(fd)
7689 14:49:31.637264 [1mSubtest addfb25-yf-tiled-legacy: SKIP (0.000s)[0m
7690 14:49:31.671337 <6>[ 55.268456] Console: switching to colour frame buffer device 170x48
7691 14:49:31.688599 <8>[ 55.300631] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
7692 14:49:31.689304 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
7694 14:49:31.709924 <6>[ 55.324978] Console: switching to colour dummy device 80x25
7695 14:49:31.716372 <14>[ 55.330913] [IGT] kms_addfb_basic: executing
7696 14:49:31.723595 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7697 14:49:31.726371 Using IGT_SRANDOM=1717512514 for randomisation
7698 14:49:31.729907 Opened device: /dev/dri/card1
7699 14:49:31.736690 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7700 14:49:31.739633 Test requirement: is_intel_device(fd)
7701 14:49:31.749499 Test requirement not met in function igt_require_intel, file ../li<14>[ 55.364598] [IGT] kms_addfb_basic: exiting, ret=77
7702 14:49:31.752818 b/drmtest.c:880:
7703 14:49:31.756311 Test requirement: is_intel_device(fd)
7704 14:49:31.762864 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7705 14:49:31.766345 Test requirement: is_intel_device(fd)
7706 14:49:31.772218 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000s)[0m
7707 14:49:31.804739 <6>[ 55.400050] Console: switching to colour frame buffer device 170x48
7708 14:49:31.822600 <8>[ 55.434903] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
7709 14:49:31.823438 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
7711 14:49:31.847055 <6>[ 55.461858] Console: switching to colour dummy device 80x25
7712 14:49:31.853651 <14>[ 55.468140] [IGT] kms_addfb_basic: executing
7713 14:49:31.860187 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7714 14:49:31.863192 Using IGT_SRANDOM=1717512514 for randomisation
7715 14:49:31.866935 Opened device: /dev/dri/card1
7716 14:49:31.873425 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7717 14:49:31.876559 Test requirement: is_intel_device(fd)
7718 14:49:31.883163 Test requirement n<14>[ 55.497771] [IGT] kms_addfb_basic: exiting, ret=77
7719 14:49:31.889719 ot met in function igt_require_intel, file ../lib/drmtest.c:880:
7720 14:49:31.892924 Test requirement: is_intel_device(fd)
7721 14:49:31.899513 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:880:
7722 14:49:31.902672 Test requirement: is_intel_device(fd)
7723 14:49:31.909624 [1mSubtest addfb25-4-tiled: SKIP (0.000s)[0m
7724 14:49:31.936675 <6>[ 55.535813] Console: switching to colour frame buffer device 170x48
7725 14:49:31.953838 <8>[ 55.565893] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
7726 14:49:31.954231 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
7728 14:49:31.960032 <8>[ 55.575568] <LAVA_SIGNAL_TESTSET STOP>
7729 14:49:31.960336 Received signal: <TESTSET> STOP
7730 14:49:31.960436 Closing test_set kms_addfb_basic
7731 14:49:31.987300 <8>[ 55.602586] <LAVA_SIGNAL_TESTSET START kms_atomic>
7732 14:49:31.987936 Received signal: <TESTSET> START kms_atomic
7733 14:49:31.988192 Starting test_set kms_atomic
7734 14:49:32.010673 <6>[ 55.625665] Console: switching to colour dummy device 80x25
7735 14:49:32.017358 <14>[ 55.631760] [IGT] kms_atomic: executing
7736 14:49:32.024021 IGT-Version: 1.2<14>[ 55.637280] [IGT] kms_atomic: starting subtest plane-overlay-legacy
7737 14:49:32.030299 8-ga44ebfe (aarc<14>[ 55.644362] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7738 14:49:32.034103 h64) (Linux: 6.1.91-cip21 aarch64)
7739 14:49:32.040662 Using IGT_SRANDOM=1717512515 for randomisation
7740 14:49:32.043502 Opened device: /dev/dri/card1
7741 14:49:32.047191 Starting subtest: plane-overlay-legacy
7742 14:49:32.050437 Starting dynamic subtest: pipe-A-eDP-1
7743 14:49:32.218962 [1mDynamic subt<14>[ 55.830929] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7744 14:49:32.228535 est pipe-A-eDP-1<14>[ 55.838987] [IGT] kms_atomic: finished subtest plane-overlay-legacy, SUCCESS
7745 14:49:32.229040 : SUCCESS (0.178s)[0m
7746 14:49:32.235464 [1mSubtest plane-overlay-legacy: SUCCESS (0.195s)[0m
7747 14:49:32.784603 <14>[ 56.399892] [IGT] kms_atomic: exiting, ret=0
7748 14:49:32.845780 <6>[ 56.444630] Console: switching to colour frame buffer device 170x48
7749 14:49:32.868166 <8>[ 56.480212] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=pass>
7750 14:49:32.868936 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=pass
7752 14:49:32.890230 <6>[ 56.504852] Console: switching to colour dummy device 80x25
7753 14:49:32.896116 <14>[ 56.510990] [IGT] kms_atomic: executing
7754 14:49:32.903314 IGT-Version: 1.2<14>[ 56.516540] [IGT] kms_atomic: starting subtest plane-primary-legacy
7755 14:49:32.909532 8-ga44ebfe (aarc<14>[ 56.523456] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7756 14:49:32.912725 h64) (Linux: 6.1.91-cip21 aarch64)
7757 14:49:32.919562 Using IGT_SRANDOM=1717512515 for randomisation
7758 14:49:32.922835 Opened device: /dev/dri/card1
7759 14:49:32.925638 Starting subtest: plane-primary-legacy
7760 14:49:32.929311 Starting dynamic subtest: pipe-A-eDP-1
7761 14:49:33.155477 [1mDynamic subt<14>[ 56.767640] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7762 14:49:33.165083 est pipe-A-eDP-1<14>[ 56.775836] [IGT] kms_atomic: finished subtest plane-primary-legacy, SUCCESS
7763 14:49:33.165511 : SUCCESS (0.236s)[0m
7764 14:49:33.171924 [1mSubtest plane-primary-legacy: SUCCESS (0.252s)[0m
7765 14:49:33.706805 <14>[ 57.322163] [IGT] kms_atomic: exiting, ret=0
7766 14:49:33.768040 <6>[ 57.366874] Console: switching to colour frame buffer device 170x48
7767 14:49:33.790869 <8>[ 57.402219] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=pass>
7768 14:49:33.791660 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=pass
7770 14:49:33.812879 <6>[ 57.428054] Console: switching to colour dummy device 80x25
7771 14:49:33.819387 <14>[ 57.434331] [IGT] kms_atomic: executing
7772 14:49:33.829693 IGT-Version: 1.2<14>[ 57.440078] [IGT] kms_atomic: starting subtest plane-primary-overlay-mutable-zpos
7773 14:49:33.832516 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7774 14:49:33.836189 Using IGT_SRANDOM=1717512516 for randomisation
7775 14:49:33.839075 Opened device: /dev/dri/card1
7776 14:49:33.843032 Starting subtest: plane-primary-overlay-mutable-zpos
7777 14:49:33.910130 <14>[ 57.522040] [IGT] kms_atomic: finished subtest plane-primary-overlay-mutable-zpos, SKIP
7778 14:49:33.913876 No dynamic tests executed.
7779 14:49:33.920160 [1mSubtest plane-primary-overlay-mutable-zpos: SKIP (0.074s)[0m
7780 14:49:33.939814 <14>[ 57.554919] [IGT] kms_atomic: exiting, ret=77
7781 14:49:33.994775 <6>[ 57.592993] Console: switching to colour frame buffer device 170x48
7782 14:49:34.014053 <8>[ 57.626159] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
7783 14:49:34.014844 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
7785 14:49:34.037021 <6>[ 57.652126] Console: switching to colour dummy device 80x25
7786 14:49:34.043499 <14>[ 57.658201] [IGT] kms_atomic: executing
7787 14:49:34.050031 IGT-Version: 1.2<14>[ 57.663814] [IGT] kms_atomic: starting subtest plane-immutable-zpos
7788 14:49:34.060183 8-ga44ebfe (aarc<14>[ 57.670966] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7789 14:49:34.063932 h64) (Linux: 6.1.91-cip21 aarch64)
7790 14:49:34.066261 Using IGT_SRANDOM=1717512517 for randomisation
7791 14:49:34.070059 Opened device: /dev/dri/card1
7792 14:49:34.073278 Starting subtest: plane-immutable-zpos
7793 14:49:34.076249 Starting dynamic subtest: pipe-A-eDP-1
7794 14:49:34.122952 <14>[ 57.737858] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SKIP
7795 14:49:34.132220 <14>[ 57.744362] [IGT] kms_atomic: finished subtest plane-immutable-zpos, SKIP
7796 14:49:34.139553 Test requirement not met in function igt_require_pipe_crc, file ../lib/igt_pipe_crc.c:211:
7797 14:49:34.146111 Test requirement: fstatat(dir, "crtc-0/crc/control", &stat, 0) == 0
7798 14:49:34.149008 CRCs not supported on this platform
7799 14:49:34.155756 Last errno: 2, No such fil<14>[ 57.770991] [IGT] kms_atomic: exiting, ret=77
7800 14:49:34.159009 e or directory
7801 14:49:34.162723 [1mDynamic subtest pipe-A-eDP-1: SKIP (0.059s)[0m
7802 14:49:34.165860 No dynamic tests executed.
7803 14:49:34.169053 [1mSubtest plane-immutable-zpos: SKIP (0.074s)[0m
7804 14:49:34.207495 <6>[ 57.805873] Console: switching to colour frame buffer device 170x48
7805 14:49:34.226518 <8>[ 57.838400] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
7806 14:49:34.227312 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
7808 14:49:34.250391 <6>[ 57.865181] Console: switching to colour dummy device 80x25
7809 14:49:34.257266 <14>[ 57.871565] [IGT] kms_atomic: executing
7810 14:49:34.263296 IGT-Version: 1.2<14>[ 57.877309] [IGT] kms_atomic: starting subtest test-only
7811 14:49:34.267031 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
7812 14:49:34.273251 Using IGT_SRANDOM=1717512517 for randomisation
7813 14:49:34.276176 Opened device: /dev/dri/card1
7814 14:49:34.276604 Starting subtest: test-only
7815 14:49:34.338948 <14>[ 57.954054] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7816 14:49:34.345766 Starting dynamic subtest: pipe-A-eDP-1
7817 14:49:35.152986 <3>[ 58.764719] anx7625 4-0058: [drm:anx7625_bridge_atomic_enable] *ERROR* mipi not set display timing yet.
7818 14:49:35.651059 [1mDynamic subt<14>[ 59.262858] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7819 14:49:35.657365 est pipe-A-eDP-1<14>[ 59.271102] [IGT] kms_atomic: finished subtest test-only, SUCCESS
7820 14:49:35.661465 : SUCCESS (1.302s)[0m
7821 14:49:35.664088 [1mSubtest test-only: SUCCESS (1.388s)[0m
7822 14:49:36.198375 <14>[ 59.813495] [IGT] kms_atomic: exiting, ret=0
7823 14:49:36.259926 <6>[ 59.858392] Console: switching to colour frame buffer device 170x48
7824 14:49:36.278784 <8>[ 59.893733] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=pass>
7825 14:49:36.279630 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=pass
7827 14:49:36.302263 <6>[ 59.917281] Console: switching to colour dummy device 80x25
7828 14:49:36.308781 <14>[ 59.923415] [IGT] kms_atomic: executing
7829 14:49:36.315347 IGT-Version: 1.2<14>[ 59.928952] [IGT] kms_atomic: starting subtest plane-cursor-legacy
7830 14:49:36.322514 8-ga44ebfe (aarc<14>[ 59.935936] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7831 14:49:36.325773 h64) (Linux: 6.1.91-cip21 aarch64)
7832 14:49:36.332152 Using IGT_SRANDOM=1717512519 for randomisation
7833 14:49:36.335510 Opened device: /dev/dri/card1
7834 14:49:36.338950 Starting subtest: plane-cursor-legacy
7835 14:49:36.342315 Starting dynamic subtest: pipe-A-eDP-1
7836 14:49:36.468891 [1mDynamic subt<14>[ 60.080351] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7837 14:49:36.478689 est pipe-A-eDP-1<14>[ 60.088517] [IGT] kms_atomic: finished subtest plane-cursor-legacy, SUCCESS
7838 14:49:36.479259 : SUCCESS (0.136s)[0m
7839 14:49:36.484730 [1mSubtest plane-cursor-legacy: SUCCESS (0.153s)[0m
7840 14:49:37.001468 <14>[ 60.616573] [IGT] kms_atomic: exiting, ret=0
7841 14:49:37.062259 <6>[ 60.661246] Console: switching to colour frame buffer device 170x48
7842 14:49:37.085445 <8>[ 60.697148] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=pass>
7843 14:49:37.086362 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=pass
7845 14:49:37.106609 <6>[ 60.721749] Console: switching to colour dummy device 80x25
7846 14:49:37.112893 <14>[ 60.727783] [IGT] kms_atomic: executing
7847 14:49:37.119487 IGT-Version: 1.2<14>[ 60.733302] [IGT] kms_atomic: starting subtest plane-invalid-params
7848 14:49:37.126445 8-ga44ebfe (aarc<14>[ 60.740255] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7849 14:49:37.129587 h64) (Linux: 6.1.91-cip21 aarch64)
7850 14:49:37.136749 Using IGT_SRANDOM=1717512520 for randomisation
7851 14:49:37.137353 Opened device: /dev/dri/card1
7852 14:49:37.143098 Starting subtest: plane-invalid-params
7853 14:49:37.146378 Starting dynamic subtest: pipe-A-eDP-1
7854 14:49:37.338691 [1mDynamic subt<14>[ 60.950261] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7855 14:49:37.348696 est pipe-A-eDP-1<14>[ 60.958415] [IGT] kms_atomic: finished subtest plane-invalid-params, SUCCESS
7856 14:49:37.349212 : SUCCESS (0.202s)[0m
7857 14:49:37.355216 [1mSubtest plane-invalid-params: SUCCESS (0.218s)[0m
7858 14:49:37.905657 <14>[ 61.520800] [IGT] kms_atomic: exiting, ret=0
7859 14:49:37.966585 <6>[ 61.565509] Console: switching to colour frame buffer device 170x48
7860 14:49:37.988912 <8>[ 61.601050] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=pass>
7861 14:49:37.989719 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=pass
7863 14:49:38.011091 <6>[ 61.625965] Console: switching to colour dummy device 80x25
7864 14:49:38.017691 <14>[ 61.631921] [IGT] kms_atomic: executing
7865 14:49:38.023814 IGT-Version: 1.2<14>[ 61.637624] [IGT] kms_atomic: starting subtest plane-invalid-params-fence
7866 14:49:38.034227 8-ga44ebfe (aarc<14>[ 61.645127] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7867 14:49:38.037134 h64) (Linux: 6.1.91-cip21 aarch64)
7868 14:49:38.041151 Using IGT_SRANDOM=1717512521 for randomisation
7869 14:49:38.044487 Opened device: /dev/dri/card1
7870 14:49:38.047125 Starting subtest: plane-invalid-params-fence
7871 14:49:38.050841 Starting dynamic subtest: pipe-A-eDP-1
7872 14:49:38.105874 <14>[ 61.720763] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SKIP
7873 14:49:38.115726 <14>[ 61.727262] [IGT] kms_atomic: finished subtest plane-invalid-params-fence, SKIP
7874 14:49:38.122589 Test requirement not met in function igt_require_sw_sync, file ../lib/sw_sync.c:265:
7875 14:49:38.125578 Test requirement: kernel_has_sw_sync()
7876 14:49:38.128939 Last errno: 2, No such file or directory
7877 14:49:38.139214 [1mDynamic subtest pipe-A-eDP-1: SKIP (<14>[ 61.753477] [IGT] kms_atomic: exiting, ret=77
7878 14:49:38.139788 0.068s)[0m
7879 14:49:38.142348 No dynamic tests executed.
7880 14:49:38.145950 [1mSubtest plane-invalid-params-fence: SKIP (0.082s)[0m
7881 14:49:38.192876 <6>[ 61.788631] Console: switching to colour frame buffer device 170x48
7882 14:49:38.210975 <8>[ 61.823020] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
7883 14:49:38.211809 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
7885 14:49:38.243020 <6>[ 61.858238] Console: switching to colour dummy device 80x25
7886 14:49:38.250180 <14>[ 61.864220] [IGT] kms_atomic: executing
7887 14:49:38.256758 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 61.870434] [IGT] kms_atomic: starting subtest crtc-invalid-params
7888 14:49:38.266359 h64) (Linux: 6.1<14>[ 61.878156] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7889 14:49:38.266908 .91-cip21 aarch64)
7890 14:49:38.273069 Using IGT_SRANDOM=1717512521 for randomisation
7891 14:49:38.273582 Opened device: /dev/dri/card1
7892 14:49:38.276064 Starting subtest: crtc-invalid-params
7893 14:49:38.283083 Starting dynamic subtest: pipe-A-eDP-1
7894 14:49:38.409355 [1mDynamic subt<14>[ 62.020852] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7895 14:49:38.419306 est pipe-A-eDP-1<14>[ 62.029051] [IGT] kms_atomic: finished subtest crtc-invalid-params, SUCCESS
7896 14:49:38.419855 : SUCCESS (0.135s)[0m
7897 14:49:38.425789 [1mSubtest crtc-invalid-params: SUCCESS (0.151s)[0m
7898 14:49:38.956865 <14>[ 62.572148] [IGT] kms_atomic: exiting, ret=0
7899 14:49:39.018480 <6>[ 62.617045] Console: switching to colour frame buffer device 170x48
7900 14:49:39.039862 <8>[ 62.651390] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=pass>
7901 14:49:39.040629 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=pass
7903 14:49:39.072780 <6>[ 62.687587] Console: switching to colour dummy device 80x25
7904 14:49:39.079335 <14>[ 62.693810] [IGT] kms_atomic: executing
7905 14:49:39.089545 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 62.699833] [IGT] kms_atomic: starting subtest crtc-invalid-params-fence
7906 14:49:39.095767 h64) (Linux: 6.1<14>[ 62.708103] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7907 14:49:39.098549 .91-cip21 aarch64)
7908 14:49:39.102092 Using IGT_SRANDOM=1717512522 for randomisation
7909 14:49:39.104830 Opened device: /dev/dri/card1
7910 14:49:39.108481 Starting subtest: crtc-invalid-params-fence
7911 14:49:39.111916 Starting dynamic subtest: pipe-A-eDP-1
7912 14:49:39.156582 <14>[ 62.772122] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SKIP
7913 14:49:39.166803 <14>[ 62.778609] [IGT] kms_atomic: finished subtest crtc-invalid-params-fence, SKIP
7914 14:49:39.173300 Test requirement not met in function igt_require_sw_sync, file ../lib/sw_sync.c:265:
7915 14:49:39.176793 Test requirement: kernel_has_sw_sync()
7916 14:49:39.180353 Last errno: 2, No such file or directory
7917 14:49:39.186900 [1mDynamic subtest pipe-A-eDP-1: SKIP (0.056s)[0m
7918 14:49:39.190084 No <14>[ 62.804760] [IGT] kms_atomic: exiting, ret=77
7919 14:49:39.193696 dynamic tests executed.
7920 14:49:39.196264 [1mSubtest crtc-invalid-params-fence: SKIP (0.071s)[0m
7921 14:49:39.240871 <6>[ 62.839758] Console: switching to colour frame buffer device 170x48
7922 14:49:39.258830 <8>[ 62.871247] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
7923 14:49:39.259107 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
7925 14:49:39.293496 <6>[ 62.909208] Console: switching to colour dummy device 80x25
7926 14:49:39.300406 <14>[ 62.915349] [IGT] kms_atomic: executing
7927 14:49:39.310391 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 62.921533] [IGT] kms_atomic: starting subtest atomic-invalid-params
7928 14:49:39.316585 h64) (Linux: 6.1<14>[ 62.929867] [IGT] kms_atomic: starting dynamic subtest pipe-A-eDP-1
7929 14:49:39.320179 .91-cip21 aarch64)
7930 14:49:39.323318 Using IGT_SRANDOM=1717512522 for randomisation
7931 14:49:39.326869 Opened device: /dev/dri/card1
7932 14:49:39.330041 Starting subtest: atomic-invalid-params
7933 14:49:39.333476 Starting dynamic subtest: pipe-A-eDP-1
7934 14:49:39.510210 [1mDynamic subt<14>[ 63.122559] [IGT] kms_atomic: finished subtest pipe-A-eDP-1, SUCCESS
7935 14:49:39.520116 est pipe-A-eDP-1<14>[ 63.130789] [IGT] kms_atomic: finished subtest atomic-invalid-params, SUCCESS
7936 14:49:39.520221 : SUCCESS (0.185s)[0m
7937 14:49:39.526308 [1mSubtest atomic-invalid-params: SUCCESS (0.201s)[0m
7938 14:49:40.077605 <14>[ 63.692579] [IGT] kms_atomic: exiting, ret=0
7939 14:49:40.138868 <6>[ 63.737091] Console: switching to colour frame buffer device 170x48
7940 14:49:40.160282 <8>[ 63.771776] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=pass>
7941 14:49:40.161133 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=pass
7943 14:49:40.182868 <6>[ 63.797896] Console: switching to colour dummy device 80x25
7944 14:49:40.189703 <14>[ 63.804298] [IGT] kms_atomic: executing
7945 14:49:40.199717 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 63.810531] [IGT] kms_atomic: starting subtest atomic-plane-damage
7946 14:49:40.202817 h64) (Linux: 6.1.91-cip21 aarch64)
7947 14:49:40.206151 Using IGT_SRANDOM=1717512523 for randomisation
7948 14:49:40.209206 Opened device: /dev/dri/card1
7949 14:49:40.212276 Starting subtest: atomic-plane-damage
7950 14:49:40.263672 <14>[ 63.875471] [IGT] kms_atomic: finished subtest atomic-plane-damage, SKIP
7951 14:49:40.264374 No dynamic tests executed.
7952 14:49:40.270313 [1mSubtest atomic-plane-damage: SKIP (0.057s)[0m
7953 14:49:40.293422 <14>[ 63.908356] [IGT] kms_atomic: exiting, ret=77
7954 14:49:40.348268 <6>[ 63.943574] Console: switching to colour frame buffer device 170x48
7955 14:49:40.366315 <8>[ 63.978015] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-plane-damage RESULT=skip>
7956 14:49:40.367083 Received signal: <TESTCASE> TEST_CASE_ID=atomic-plane-damage RESULT=skip
7958 14:49:40.372735 <8>[ 63.988015] <LAVA_SIGNAL_TESTSET STOP>
7959 14:49:40.373406 Received signal: <TESTSET> STOP
7960 14:49:40.373750 Closing test_set kms_atomic
7961 14:49:40.400319 <8>[ 64.016048] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
7962 14:49:40.400583 Received signal: <TESTSET> START kms_flip_event_leak
7963 14:49:40.400660 Starting test_set kms_flip_event_leak
7964 14:49:40.426116 <6>[ 64.041246] Console: switching to colour dummy device 80x25
7965 14:49:40.432660 <14>[ 64.047488] [IGT] kms_flip_event_leak: executing
7966 14:49:40.439088 IGT-Version: 1.2<14>[ 64.054500] [IGT] kms_flip_event_leak: starting subtest basic
7967 14:49:40.449075 8-ga44ebfe (aarc<14>[ 64.060746] [IGT] kms_flip_event_leak: starting dynamic subtest pipe-A-eDP-1
7968 14:49:40.452096 h64) (Linux: 6.1.91-cip21 aarch64)
7969 14:49:40.455363 Using IGT_SRANDOM=1717512523 for randomisation
7970 14:49:40.458904 Opened device: /dev/dri/card1
7971 14:49:40.462524 Starting subtest: basic
7972 14:49:40.465376 Starting dynamic subtest: pipe-A-eDP-1
7973 14:49:40.597128 [1mDynamic subt<14>[ 64.209438] [IGT] kms_flip_event_leak: finished subtest pipe-A-eDP-1, SUCCESS
7974 14:49:40.606870 est pipe-A-eDP-1<14>[ 64.218395] [IGT] kms_flip_event_leak: finished subtest basic, SUCCESS
7975 14:49:40.606970 : SUCCESS (0.139s)[0m
7976 14:49:40.610254 [1mSubtest basic: SUCCESS (0.158s)[0m
7977 14:49:41.163990 <14>[ 64.779263] [IGT] kms_flip_event_leak: exiting, ret=0
7978 14:49:41.225664 <6>[ 64.824037] Console: switching to colour frame buffer device 170x48
7979 14:49:41.244787 <8>[ 64.859523] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
7980 14:49:41.245574 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
7982 14:49:41.254129 <8>[ 64.869135] <LAVA_SIGNAL_TESTSET STOP>
7983 14:49:41.254898 Received signal: <TESTSET> STOP
7984 14:49:41.255247 Closing test_set kms_flip_event_leak
7985 14:49:41.292971 <8>[ 64.908107] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
7986 14:49:41.294020 Received signal: <TESTSET> START kms_prop_blob
7987 14:49:41.294685 Starting test_set kms_prop_blob
7988 14:49:41.326180 <6>[ 64.941497] Console: switching to colour dummy device 80x25
7989 14:49:41.333381 <14>[ 64.947505] [IGT] kms_prop_blob: executing
7990 14:49:41.339653 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 64.953516] [IGT] kms_prop_blob: starting subtest basic
7991 14:49:41.349734 h64) (Linux: 6.1<14>[ 64.960789] [IGT] kms_prop_blob: finished subtest basic, SUCCESS
7992 14:49:41.350256 .91-cip21 aarch64)
7993 14:49:41.353167 Using IGT_SRANDOM=1717512524 for randomisation
7994 14:49:41.356261 Opened device: /dev/dri/card1
7995 14:49:41.359790 Starting subtest: basic
7996 14:49:41.363374 [1m<14>[ 64.978982] [IGT] kms_prop_blob: exiting, ret=0
7997 14:49:41.366444 Subtest basic: SUCCESS (0.000s)[0m
7998 14:49:41.418581 <6>[ 65.014711] Console: switching to colour frame buffer device 170x48
7999 14:49:41.434081 <8>[ 65.049198] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
8000 14:49:41.434917 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
8002 14:49:41.471526 <6>[ 65.086288] Console: switching to colour dummy device 80x25
8003 14:49:41.478102 <14>[ 65.092484] [IGT] kms_prop_blob: executing
8004 14:49:41.484460 IGT-Version: 1.2<14>[ 65.098029] [IGT] kms_prop_blob: starting subtest blob-prop-core
8005 14:49:41.494667 8-ga44ebfe (aarc<14>[ 65.105200] [IGT] kms_prop_blob: finished subtest blob-prop-core, SUCCESS
8006 14:49:41.497492 h64) (Linux: 6.1.91-cip21 aarch64)
8007 14:49:41.501447 Using IGT_SRANDOM=1717512524 for randomisation
8008 14:49:41.504026 Opened device: /dev/dri/card1
8009 14:49:41.508055 Starting subtest: blob-prop-core
8010 14:49:41.514429 [1mSubtest blob-prop-core:<14>[ 65.128516] [IGT] kms_prop_blob: exiting, ret=0
8011 14:49:41.514994 SUCCESS (0.000s)[0m
8012 14:49:41.568378 <6>[ 65.163874] Console: switching to colour frame buffer device 170x48
8013 14:49:41.584315 <8>[ 65.196260] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
8014 14:49:41.585146 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
8016 14:49:41.605078 <6>[ 65.219888] Console: switching to colour dummy device 80x25
8017 14:49:41.611464 <14>[ 65.225846] [IGT] kms_prop_blob: executing
8018 14:49:41.618292 IGT-Version: 1.2<14>[ 65.231150] [IGT] kms_prop_blob: starting subtest blob-prop-validate
8019 14:49:41.627755 8-ga44ebfe (aarc<14>[ 65.238897] [IGT] kms_prop_blob: finished subtest blob-prop-validate, SUCCESS
8020 14:49:41.631600 h64) (Linux: 6.1.91-cip21 aarch64)
8021 14:49:41.634567 Using IGT_SRANDOM=1717512524 for randomisation
8022 14:49:41.637791 Opened device: /dev/dri/card1
8023 14:49:41.641225 Starting subtest: blob-prop-validate
8024 14:49:41.647978 [1mSub<14>[ 65.261361] [IGT] kms_prop_blob: exiting, ret=0
8025 14:49:41.651246 test blob-prop-validate: SUCCESS (0.000s)[0m
8026 14:49:41.701510 <6>[ 65.296650] Console: switching to colour frame buffer device 170x48
8027 14:49:41.718932 <8>[ 65.329944] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
8028 14:49:41.719846 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
8030 14:49:41.739215 <6>[ 65.354229] Console: switching to colour dummy device 80x25
8031 14:49:41.745900 <14>[ 65.360242] [IGT] kms_prop_blob: executing
8032 14:49:41.752571 IGT-Version: 1.2<14>[ 65.365339] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
8033 14:49:41.762664 8-ga44ebfe (aarc<14>[ 65.373322] [IGT] kms_prop_blob: finished subtest blob-prop-lifetime, SUCCESS
8034 14:49:41.766101 h64) (Linux: 6.1.91-cip21 aarch64)
8035 14:49:41.769252 Using IGT_SRANDOM=1717512524 for randomisation
8036 14:49:41.772397 Opened device: /dev/dri/card1
8037 14:49:41.779268 Starting subtest: blob-prop-l<14>[ 65.394190] [IGT] kms_prop_blob: exiting, ret=0
8038 14:49:41.779872 ifetime
8039 14:49:41.785805 [1mSubtest blob-prop-lifetime: SUCCESS (0.000s)[0m
8040 14:49:41.834827 <6>[ 65.429714] Console: switching to colour frame buffer device 170x48
8041 14:49:41.852631 <8>[ 65.463973] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
8042 14:49:41.853469 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
8044 14:49:41.886008 <6>[ 65.501035] Console: switching to colour dummy device 80x25
8045 14:49:41.892740 <14>[ 65.507217] [IGT] kms_prop_blob: executing
8046 14:49:41.899076 IGT-Version: 1.2<14>[ 65.512931] [IGT] kms_prop_blob: starting subtest blob-multiple
8047 14:49:41.908921 8-ga44ebfe (aarc<14>[ 65.519916] [IGT] kms_prop_blob: finished subtest blob-multiple, SUCCESS
8048 14:49:41.912267 h64) (Linux: 6.1.91-cip21 aarch64)
8049 14:49:41.915776 Using IGT_SRANDOM=1717512524 for randomisation
8050 14:49:41.918788 Opened device: /dev/dri/card1
8051 14:49:41.922176 Starting subtest: blob-multiple
8052 14:49:41.929133 [1mSubtest blob-multiple: SUCCESS (0.000s)<14>[ 65.543827] [IGT] kms_prop_blob: exiting, ret=0
8053 14:49:41.929642 [0m
8054 14:49:41.983982 <6>[ 65.582046] Console: switching to colour frame buffer device 170x48
8055 14:49:42.000933 <8>[ 65.612040] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
8056 14:49:42.001773 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
8058 14:49:42.022035 <6>[ 65.636500] Console: switching to colour dummy device 80x25
8059 14:49:42.028020 <14>[ 65.642478] [IGT] kms_prop_blob: executing
8060 14:49:42.034938 IGT-Version: 1.2<14>[ 65.647589] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
8061 14:49:42.044345 8-ga44ebfe (aarc<14>[ 65.655531] [IGT] kms_prop_blob: finished subtest invalid-get-prop-any, SUCCESS
8062 14:49:42.048008 h64) (Linux: 6.1.91-cip21 aarch64)
8063 14:49:42.051291 Using IGT_SRANDOM=1717512525 for randomisation
8064 14:49:42.054761 Opened device: /dev/dri/card1
8065 14:49:42.061363 Starting subtest: invalid-get<14>[ 65.676762] [IGT] kms_prop_blob: exiting, ret=0
8066 14:49:42.064715 -prop-any
8067 14:49:42.067774 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
8068 14:49:42.117024 <6>[ 65.714228] Console: switching to colour frame buffer device 170x48
8069 14:49:42.135491 <8>[ 65.747330] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
8070 14:49:42.136327 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
8072 14:49:42.158044 <6>[ 65.773030] Console: switching to colour dummy device 80x25
8073 14:49:42.165089 <14>[ 65.779483] [IGT] kms_prop_blob: executing
8074 14:49:42.171242 IGT-Version: 1.2<14>[ 65.784800] [IGT] kms_prop_blob: starting subtest invalid-get-prop
8075 14:49:42.181377 8-ga44ebfe (aarc<14>[ 65.792554] [IGT] kms_prop_blob: finished subtest invalid-get-prop, SUCCESS
8076 14:49:42.184757 h64) (Linux: 6.1.91-cip21 aarch64)
8077 14:49:42.187874 Using IGT_SRANDOM=1717512525 for randomisation
8078 14:49:42.194294 Opened device: /dev/dri/card<14>[ 65.809961] [IGT] kms_prop_blob: exiting, ret=0
8079 14:49:42.197873 1
8080 14:49:42.201149 Starting subtest: invalid-get-prop
8081 14:49:42.204285 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
8082 14:49:42.249468 <6>[ 65.845311] Console: switching to colour frame buffer device 170x48
8083 14:49:42.266927 <8>[ 65.878907] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
8084 14:49:42.267710 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
8086 14:49:42.290035 <6>[ 65.904745] Console: switching to colour dummy device 80x25
8087 14:49:42.296196 <14>[ 65.910685] [IGT] kms_prop_blob: executing
8088 14:49:42.302869 IGT-Version: 1.2<14>[ 65.915980] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
8089 14:49:42.312505 8-ga44ebfe (aarc<14>[ 65.923908] [IGT] kms_prop_blob: finished subtest invalid-set-prop-any, SUCCESS
8090 14:49:42.315995 h64) (Linux: 6.1.91-cip21 aarch64)
8091 14:49:42.319249 Using IGT_SRANDOM=1717512525 for randomisation
8092 14:49:42.326294 Opened device: /dev/dri/card<14>[ 65.942728] [IGT] kms_prop_blob: exiting, ret=0
8093 14:49:42.329096 1
8094 14:49:42.332791 Starting subtest: invalid-set-prop-any
8095 14:49:42.336161 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
8096 14:49:42.382578 <6>[ 65.978171] Console: switching to colour frame buffer device 170x48
8097 14:49:42.401569 <8>[ 66.013147] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
8098 14:49:42.402336 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
8100 14:49:42.435227 <6>[ 66.050071] Console: switching to colour dummy device 80x25
8101 14:49:42.441854 <14>[ 66.056487] [IGT] kms_prop_blob: executing
8102 14:49:42.451532 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 66.062521] [IGT] kms_prop_blob: starting subtest invalid-set-prop
8103 14:49:42.458285 h64) (Linux: 6.1<14>[ 66.070757] [IGT] kms_prop_blob: finished subtest invalid-set-prop, SUCCESS
8104 14:49:42.462019 .91-cip21 aarch64)
8105 14:49:42.465052 Using IGT_SRANDOM=1717512525 for randomisation
8106 14:49:42.468496 Opened device: /dev/dri/card1
8107 14:49:42.472062 Starting subtest: invalid-set-prop
8108 14:49:42.478556 [1mSubtest invalid-set-p<14>[ 66.092674] [IGT] kms_prop_blob: exiting, ret=0
8109 14:49:42.481301 rop: SUCCESS (0.000s)[0m
8110 14:49:42.532685 <6>[ 66.128048] Console: switching to colour frame buffer device 170x48
8111 14:49:42.550324 <8>[ 66.162032] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
8112 14:49:42.551184 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
8114 14:49:42.556970 <8>[ 66.171793] <LAVA_SIGNAL_TESTSET STOP>
8115 14:49:42.557798 Received signal: <TESTSET> STOP
8116 14:49:42.558211 Closing test_set kms_prop_blob
8117 14:49:42.594814 <8>[ 66.209446] <LAVA_SIGNAL_TESTSET START kms_setmode>
8118 14:49:42.595650 Received signal: <TESTSET> START kms_setmode
8119 14:49:42.596045 Starting test_set kms_setmode
8120 14:49:42.629984 <6>[ 66.245052] Console: switching to colour dummy device 80x25
8121 14:49:42.636874 <14>[ 66.251512] [IGT] kms_setmode: executing
8122 14:49:42.643602 IGT-Version: 1.2<14>[ 66.257149] [IGT] kms_setmode: starting subtest basic
8123 14:49:42.646852 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
8124 14:49:42.653140 Using IGT_SRANDOM=1717512525 for randomisation
8125 14:49:42.653693 Opened device: /dev/dri/card1
8126 14:49:42.656297 Starting subtest: basic
8127 14:49:42.659814 Testing: basic 1 connector combinations
8128 14:49:42.800373 <14>[ 66.414836] [IGT] kms_setmode: starting dynamic subtest pipe-A-eDP-1
8129 14:49:42.806953 Starting dynamic subtest: pipe-A-eDP-1
8130 14:49:42.807538 Test id#1 CRTC count 1
8131 14:49:42.813452 CRTC[51] [Pipe A] Mode: 1366x768@60Hz Connectors: eDP-1[32]
8132 14:49:45.511132 Expected frameti<14>[ 69.123105] [IGT] kms_setmode: finished subtest pipe-A-eDP-1, SUCCESS
8133 14:49:45.517965 me: 16650us; measured 16628.8us +- 45.165us accuracy 0.07% [0.59 scanlines]
8134 14:49:45.524280 [1mDynamic subtest pipe-A-eDP-1: SUCCESS (2.701s)[0m
8135 14:49:45.577450 [1mSubtest basi<14>[ 69.189260] [IGT] kms_setmode: finished subtest basic, SUCCESS
8136 14:49:45.577916 c: SUCCESS (2.926s)[0m
8137 14:49:46.118586 <14>[ 69.733452] [IGT] kms_setmode: exiting, ret=0
8138 14:49:46.179698 <6>[ 69.778182] Console: switching to colour frame buffer device 170x48
8139 14:49:46.198666 <8>[ 69.813304] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
8140 14:49:46.199526 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
8142 14:49:46.235221 <6>[ 69.849872] Console: switching to colour dummy device 80x25
8143 14:49:46.241763 <14>[ 69.856021] [IGT] kms_setmode: executing
8144 14:49:46.248044 IGT-Version: 1.2<14>[ 69.861715] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
8145 14:49:46.254703 <14>[ 69.868810] [IGT] kms_setmode: finished subtest basic-clone-single-crtc, SKIP
8146 14:49:46.262054 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
8147 14:49:46.268097 Using IGT_SRANDOM=1717512529<14>[ 69.882995] [IGT] kms_setmode: exiting, ret=77
8148 14:49:46.271733 for randomisation
8149 14:49:46.272146 Opened device: /dev/dri/card1
8150 14:49:46.278235 Starting subtest: basic-clone-single-crtc
8151 14:49:46.278734 No dynamic tests executed.
8152 14:49:46.285097 [1mSubtest basic-clone-single-crtc: SKIP (0.000s)[0m
8153 14:49:46.322864 <6>[ 69.918295] Console: switching to colour frame buffer device 170x48
8154 14:49:46.341007 <8>[ 69.952216] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
8155 14:49:46.341784 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
8157 14:49:46.373345 <6>[ 69.987777] Console: switching to colour dummy device 80x25
8158 14:49:46.379694 <14>[ 69.994135] [IGT] kms_setmode: executing
8159 14:49:46.386285 IGT-Version: 1.2<14>[ 69.999855] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
8160 14:49:46.396625 8-ga44ebfe (aarc<14>[ 70.007591] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc, SKIP
8161 14:49:46.399806 h64) (Linux: 6.1.91-cip21 aarch64)
8162 14:49:46.402592 Using IGT_SRANDOM=1717512529 for randomisation
8163 14:49:46.406145 Opened device: /dev/dri/card1
8164 14:49:46.409208 Starting subtest: invalid-clone-single-crtc
8165 14:49:46.413026 No dynamic tests executed.
8166 14:49:46.419462 [1m<14>[ 70.032605] [IGT] kms_setmode: exiting, ret=77
8167 14:49:46.422691 Subtest invalid-clone-single-crtc: SKIP (0.000s)[0m
8168 14:49:46.473157 <6>[ 70.071169] Console: switching to colour frame buffer device 170x48
8169 14:49:46.490363 <8>[ 70.102100] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
8170 14:49:46.491128 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
8172 14:49:46.512089 <6>[ 70.126932] Console: switching to colour dummy device 80x25
8173 14:49:46.519100 <14>[ 70.132875] [IGT] kms_setmode: executing
8174 14:49:46.524973 IGT-Version: 1.2<14>[ 70.138068] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
8175 14:49:46.535316 8-ga44ebfe (aarc<14>[ 70.146417] [IGT] kms_setmode: finished subtest invalid-clone-exclusive-crtc, SKIP
8176 14:49:46.538342 h64) (Linux: 6.1.91-cip21 aarch64)
8177 14:49:46.541977 Using IGT_SRANDOM=1717512529 for randomisation
8178 14:49:46.551667 Opened device: /dev/dri/card<14>[ 70.165473] [IGT] kms_setmode: exiting, ret=77
8179 14:49:46.552232 1
8180 14:49:46.554755 Starting subtest: invalid-clone-exclusive-crtc
8181 14:49:46.558196 No dynamic tests executed.
8182 14:49:46.561116 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
8183 14:49:46.605582 <6>[ 70.201095] Console: switching to colour frame buffer device 170x48
8184 14:49:46.623732 <8>[ 70.235444] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
8185 14:49:46.624714 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
8187 14:49:46.656346 <6>[ 70.271252] Console: switching to colour dummy device 80x25
8188 14:49:46.663087 <14>[ 70.277415] [IGT] kms_setmode: executing
8189 14:49:46.669673 IGT-Version: 1.2<14>[ 70.283031] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
8190 14:49:46.676077 <14>[ 70.290236] [IGT] kms_setmode: finished subtest clone-exclusive-crtc, SKIP
8191 14:49:46.682989 8-ga44ebfe (aarc<14>[ 70.298568] [IGT] kms_setmode: exiting, ret=77
8192 14:49:46.686306 h64) (Linux: 6.1.91-cip21 aarch64)
8193 14:49:46.692622 Using IGT_SRANDOM=1717512529 for randomisation
8194 14:49:46.693201 Opened device: /dev/dri/card1
8195 14:49:46.695855 Starting subtest: clone-exclusive-crtc
8196 14:49:46.699205 No dynamic tests executed.
8197 14:49:46.706121 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
8198 14:49:46.738709 <6>[ 70.336507] Console: switching to colour frame buffer device 170x48
8199 14:49:46.758751 <8>[ 70.370190] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
8200 14:49:46.759669 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
8202 14:49:46.790753 <6>[ 70.405328] Console: switching to colour dummy device 80x25
8203 14:49:46.797124 <14>[ 70.411340] [IGT] kms_setmode: executing
8204 14:49:46.803673 IGT-Version: 1.2<14>[ 70.416754] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
8205 14:49:46.813983 <14>[ 70.425282] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc-stealing, SKIP
8206 14:49:46.817119 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)
8207 14:49:46.823777 Using IGT_SRANDOM=1717512529 for randomisation
8208 14:49:46.824309 Opened device: /dev/dri/card1
8209 14:49:46.833231 Starting subtest: invalid-clone-single-crtc-s<14>[ 70.448353] [IGT] kms_setmode: exiting, ret=77
8210 14:49:46.833750 tealing
8211 14:49:46.836842 No dynamic tests executed.
8212 14:49:46.843884 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
8213 14:49:46.888502 <6>[ 70.486860] Console: switching to colour frame buffer device 170x48
8214 14:49:46.907169 <8>[ 70.518859] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
8215 14:49:46.908091 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
8217 14:49:46.916098 <8>[ 70.530627] <LAVA_SIGNAL_TESTSET STOP>
8218 14:49:46.916954 Received signal: <TESTSET> STOP
8219 14:49:46.917342 Closing test_set kms_setmode
8220 14:49:46.955077 <8>[ 70.570010] <LAVA_SIGNAL_TESTSET START kms_vblank>
8221 14:49:46.955882 Received signal: <TESTSET> START kms_vblank
8222 14:49:46.956237 Starting test_set kms_vblank
8223 14:49:46.978251 <6>[ 70.592483] Console: switching to colour dummy device 80x25
8224 14:49:46.984318 <14>[ 70.598922] [IGT] kms_vblank: executing
8225 14:49:46.991072 IGT-Version: 1.2<14>[ 70.604632] [IGT] kms_vblank: starting subtest invalid
8226 14:49:46.997641 8-ga44ebfe (aarc<14>[ 70.610835] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8227 14:49:47.001027 h64) (Linux: 6.1.91-cip21 aarch64)
8228 14:49:47.007561 Using IGT_SRANDOM=1717512530 for randomisation
8229 14:49:47.008123 Opened device: /dev/dri/card1
8230 14:49:47.010627 Starting subtest: invalid
8231 14:49:47.014176 Starting dynamic subtest: pipe-A-eDP-1
8232 14:49:47.137182 [1mDynamic subt<14>[ 70.748961] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8233 14:49:47.144071 est pipe-A-eDP-1<14>[ 70.756949] [IGT] kms_vblank: finished subtest invalid, SUCCESS
8234 14:49:47.147295 : SUCCESS (0.130s)[0m
8235 14:49:47.150590 [1mSubtest invalid: SUCCESS (0.146s)[0m
8236 14:49:47.685491 <14>[ 71.300657] [IGT] kms_vblank: exiting, ret=0
8237 14:49:47.747146 <6>[ 71.345430] Console: switching to colour frame buffer device 170x48
8238 14:49:47.764896 <8>[ 71.380157] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=pass>
8239 14:49:47.765721 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=pass
8241 14:49:47.789610 <6>[ 71.404088] Console: switching to colour dummy device 80x25
8242 14:49:47.795885 <14>[ 71.410479] [IGT] kms_vblank: executing
8243 14:49:47.802961 IGT-Version: 1.2<14>[ 71.416171] [IGT] kms_vblank: starting subtest crtc-id
8244 14:49:47.809328 8-ga44ebfe (aarc<14>[ 71.422390] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8245 14:49:47.813013 h64) (Linux: 6.1.91-cip21 aarch64)
8246 14:49:47.819275 Using IGT_SRANDOM=1717512530 for randomisation
8247 14:49:47.819889 Opened device: /dev/dri/card1
8248 14:49:47.822314 Starting subtest: crtc-id
8249 14:49:47.825681 Starting dynamic subtest: pipe-A-eDP-1
8250 14:49:47.972219 [1mDynamic subt<14>[ 71.584024] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8251 14:49:47.978785 est pipe-A-eDP-1<14>[ 71.592140] [IGT] kms_vblank: finished subtest crtc-id, SUCCESS
8252 14:49:47.982425 : SUCCESS (0.154s)[0m
8253 14:49:47.985806 [1mSubtest crtc-id: SUCCESS (0.170s)[0m
8254 14:49:48.520758 <14>[ 72.135680] [IGT] kms_vblank: exiting, ret=0
8255 14:49:48.581942 <6>[ 72.180464] Console: switching to colour frame buffer device 170x48
8256 14:49:48.600382 <8>[ 72.214852] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=pass>
8257 14:49:48.601236 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=pass
8259 14:49:48.623578 <6>[ 72.238187] Console: switching to colour dummy device 80x25
8260 14:49:48.630116 <14>[ 72.244120] [IGT] kms_vblank: executing
8261 14:49:48.636535 IGT-Version: 1.2<14>[ 72.249608] [IGT] kms_vblank: starting subtest accuracy-idle
8262 14:49:48.643401 8-ga44ebfe (aarc<14>[ 72.256155] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8263 14:49:48.647032 h64) (Linux: 6.1.91-cip21 aarch64)
8264 14:49:48.650323 Using IGT_SRANDOM=1717512531 for randomisation
8265 14:49:48.653212 Opened device: /dev/dri/card1
8266 14:49:48.657084 Starting subtest: accuracy-idle
8267 14:49:48.659721 Starting dynamic subtest: pipe-A-eDP-1
8268 14:49:50.785963 [1mDynamic subt<14>[ 74.397872] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8269 14:49:50.793132 est pipe-A-eDP-1<14>[ 74.405921] [IGT] kms_vblank: finished subtest accuracy-idle, SUCCESS
8270 14:49:50.796286 : SUCCESS (2.134s)[0m
8271 14:49:50.799228 [1mSubtest accuracy-idle: SUCCESS (2.150s)[0m
8272 14:49:51.335468 <14>[ 74.949837] [IGT] kms_vblank: exiting, ret=0
8273 14:49:51.396388 <6>[ 74.994783] Console: switching to colour frame buffer device 170x48
8274 14:49:51.417995 <8>[ 75.029414] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=accuracy-idle RESULT=pass>
8275 14:49:51.418843 Received signal: <TESTCASE> TEST_CASE_ID=accuracy-idle RESULT=pass
8277 14:49:51.440306 <6>[ 75.055182] Console: switching to colour dummy device 80x25
8278 14:49:51.447302 <14>[ 75.061547] [IGT] kms_vblank: executing
8279 14:49:51.454006 IGT-Version: 1.2<14>[ 75.067276] [IGT] kms_vblank: starting subtest query-idle
8280 14:49:51.460326 8-ga44ebfe (aarc<14>[ 75.073737] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8281 14:49:51.463492 h64) (Linux: 6.1.91-cip21 aarch64)
8282 14:49:51.470394 Using IGT_SRANDOM=1717512534 for randomisation
8283 14:49:51.470835 Opened device: /dev/dri/card1
8284 14:49:51.473500 Starting subtest: query-idle
8285 14:49:51.477112 Starting dynamic subtest: pipe-A-eDP-1
8286 14:49:53.562120 Time to query current counter (idle): 0.683µs
8287 14:49:53.599137 [1mDynamic subt<14>[ 77.211295] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8288 14:49:53.605832 <14>[ 77.219335] [IGT] kms_vblank: finished subtest query-idle, SUCCESS
8289 14:49:53.609119 est pipe-A-eDP-1: SUCCESS (2.130s)[0m
8290 14:49:53.612452 [1mSubtest query-idle: SUCCESS (2.146s)[0m
8291 14:49:54.146912 <14>[ 77.761711] [IGT] kms_vblank: exiting, ret=0
8292 14:49:54.208356 <6>[ 77.806253] Console: switching to colour frame buffer device 170x48
8293 14:49:54.227046 Received signal: <TESTCASE> TEST_CASE_ID=query-idle RESULT=pass
8295 14:49:54.230044 <8>[ 77.841309] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-idle RESULT=pass>
8296 14:49:54.251001 <6>[ 77.865611] Console: switching to colour dummy device 80x25
8297 14:49:54.257327 <14>[ 77.871826] [IGT] kms_vblank: executing
8298 14:49:54.264211 IGT-Version: 1.2<14>[ 77.877678] [IGT] kms_vblank: starting subtest query-idle-hang
8299 14:49:54.274169 8-ga44ebfe (aarc<14>[ 77.884500] [IGT] kms_vblank: finished subtest query-idle-hang, SKIP
8300 14:49:54.280595 h64) (Linux: 6.1.91-cip21 aarch6<14>[ 77.894326] [IGT] kms_vblank: exiting, ret=77
8301 14:49:54.281164 4)
8302 14:49:54.283715 Using IGT_SRANDOM=1717512537 for randomisation
8303 14:49:54.287703 Opened device: /dev/dri/card1
8304 14:49:54.290669 Starting subtest: query-idle-hang
8305 14:49:54.300677 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8306 14:49:54.303814 Test requirement: has_ban_period || has_bannable
8307 14:49:54.307552 Last errno: 22, Invalid argument
8308 14:49:54.310521 [1mSubtest query-idle-hang: SKIP (0.000s)[0m
8309 14:49:54.334866 <6>[ 77.929929] Console: switching to colour frame buffer device 170x48
8310 14:49:54.352064 <8>[ 77.963178] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-idle-hang RESULT=skip>
8311 14:49:54.352951 Received signal: <TESTCASE> TEST_CASE_ID=query-idle-hang RESULT=skip
8313 14:49:54.383494 <6>[ 77.998238] Console: switching to colour dummy device 80x25
8314 14:49:54.389836 <14>[ 78.004435] [IGT] kms_vblank: executing
8315 14:49:54.396336 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 78.010471] [IGT] kms_vblank: starting subtest query-forked
8316 14:49:54.407104 h64) (Linux: 6.1<14>[ 78.017888] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8317 14:49:54.407698 .91-cip21 aarch64)
8318 14:49:54.413881 Using IGT_SRANDOM=1717512537 for randomisation
8319 14:49:54.414403 Opened device: /dev/dri/card1
8320 14:49:54.417729 Starting subtest: query-forked
8321 14:49:54.419901 Starting dynamic subtest: pipe-A-eDP-1
8322 14:49:56.506682 Time to query current counter (idle): 3.982µs
8323 14:49:56.510250 Time to query current counter (idle): 3.980µs
8324 14:49:56.517057 Time to query current counter (idle): 3.982µs
8325 14:49:56.519785 Time to query current counter (idle): 3.981µs
8326 14:49:56.523103 Time to query current counter (idle): 4.326µs
8327 14:49:56.530398 Time to query current counter (idle): 4.340µs
8328 14:49:56.533871 Time to query current counter (idle): 4.335µs
8329 14:49:56.536510 Time to query current counter (idle): 4.340µs
8330 14:49:56.579729 [1mDynamic subt<14>[ 80.190826] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8331 14:49:56.586091 est pipe-A-eDP-1<14>[ 80.199099] [IGT] kms_vblank: finished subtest query-forked, SUCCESS
8332 14:49:56.589206 : SUCCESS (2.165s)[0m
8333 14:49:56.592834 [1mSubtest query-forked: SUCCESS (2.181s)[0m
8334 14:49:57.127514 <14>[ 80.742480] [IGT] kms_vblank: exiting, ret=0
8335 14:49:57.189075 <6>[ 80.787244] Console: switching to colour frame buffer device 170x48
8336 14:49:57.211559 <8>[ 80.822764] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-forked RESULT=pass>
8337 14:49:57.212362 Received signal: <TESTCASE> TEST_CASE_ID=query-forked RESULT=pass
8339 14:49:57.232044 <6>[ 80.846429] Console: switching to colour dummy device 80x25
8340 14:49:57.238783 <14>[ 80.852358] [IGT] kms_vblank: executing
8341 14:49:57.245212 IGT-Version: 1.2<14>[ 80.858030] [IGT] kms_vblank: starting subtest query-forked-hang
8342 14:49:57.255382 8-ga44ebfe (aarc<14>[ 80.864787] [IGT] kms_vblank: finished subtest query-forked-hang, SKIP
8343 14:49:57.261818 h64) (Linux: 6.1.91-cip21 aarch6<14>[ 80.875323] [IGT] kms_vblank: exiting, ret=77
8344 14:49:57.262395 4)
8345 14:49:57.264801 Using IGT_SRANDOM=1717512540 for randomisation
8346 14:49:57.268273 Opened device: /dev/dri/card1
8347 14:49:57.271787 Starting subtest: query-forked-hang
8348 14:49:57.281416 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8349 14:49:57.284569 Test requirement: has_ban_period || has_bannable
8350 14:49:57.287774 Last errno: 22, Invalid argument
8351 14:49:57.294613 [1mSubtest query-forked-hang: SKIP (0.000s)[0m
8352 14:49:57.315517 <6>[ 80.910672] Console: switching to colour frame buffer device 170x48
8353 14:49:57.334081 <8>[ 80.945188] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-forked-hang RESULT=skip>
8354 14:49:57.334878 Received signal: <TESTCASE> TEST_CASE_ID=query-forked-hang RESULT=skip
8356 14:49:57.365125 <6>[ 80.980070] Console: switching to colour dummy device 80x25
8357 14:49:57.372046 <14>[ 80.986064] [IGT] kms_vblank: executing
8358 14:49:57.378723 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 80.992132] [IGT] kms_vblank: starting subtest query-busy
8359 14:49:57.388206 h64) (Linux: 6.1<14>[ 80.999432] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8360 14:49:57.388634 .91-cip21 aarch64)
8361 14:49:57.394968 Using IGT_SRANDOM=1717512540 for randomisation
8362 14:49:57.395595 Opened device: /dev/dri/card1
8363 14:49:57.398297 Starting subtest: query-busy
8364 14:49:57.401905 Starting dynamic subtest: pipe-A-eDP-1
8365 14:49:59.487958 Time to query current counter (busy): 0.644µs
8366 14:49:59.708322 [1mDynamic subt<14>[ 83.319800] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8367 14:49:59.715314 est pipe-A-eDP-1<14>[ 83.327847] [IGT] kms_vblank: finished subtest query-busy, SUCCESS
8368 14:49:59.718988 : SUCCESS (2.312s)[0m
8369 14:49:59.721703 [1mSubtest query-busy: SUCCESS (2.329s)[0m
8370 14:50:00.256811 <14>[ 83.871639] [IGT] kms_vblank: exiting, ret=0
8371 14:50:00.318323 <6>[ 83.916449] Console: switching to colour frame buffer device 170x48
8372 14:50:00.336259 Received signal: <TESTCASE> TEST_CASE_ID=query-busy RESULT=pass
8374 14:50:00.339325 <8>[ 83.950308] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-busy RESULT=pass>
8375 14:50:00.372250 <6>[ 83.987181] Console: switching to colour dummy device 80x25
8376 14:50:00.379273 <14>[ 83.993354] [IGT] kms_vblank: executing
8377 14:50:00.385499 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 83.999922] [IGT] kms_vblank: starting subtest query-busy-hang
8378 14:50:00.396326 h64) (Linux: 6.1<14>[ 84.007316] [IGT] kms_vblank: finished subtest query-busy-hang, SKIP
8379 14:50:00.396901 .91-cip21 aarch64)
8380 14:50:00.402695 Using IGT_SRANDOM=1717512543 for randomisation
8381 14:50:00.409395 Opened devic<14>[ 84.021580] [IGT] kms_vblank: exiting, ret=77
8382 14:50:00.409967 e: /dev/dri/card1
8383 14:50:00.412543 Starting subtest: query-busy-hang
8384 14:50:00.422505 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8385 14:50:00.425923 Test requirement: has_ban_period || has_bannable
8386 14:50:00.429245 Last errno: 22, Invalid argument
8387 14:50:00.432762 [1mSubtest query-busy-hang: SKIP (0.000s)[0m
8388 14:50:00.458574 <6>[ 84.056590] Console: switching to colour frame buffer device 170x48
8389 14:50:00.477338 <8>[ 84.088234] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-busy-hang RESULT=skip>
8390 14:50:00.478187 Received signal: <TESTCASE> TEST_CASE_ID=query-busy-hang RESULT=skip
8392 14:50:00.510489 <6>[ 84.124557] Console: switching to colour dummy device 80x25
8393 14:50:00.517182 <14>[ 84.130747] [IGT] kms_vblank: executing
8394 14:50:00.523378 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 84.137333] [IGT] kms_vblank: starting subtest query-forked-busy
8395 14:50:00.533448 h64) (Linux: 6.1<14>[ 84.144750] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8396 14:50:00.534002 .91-cip21 aarch64)
8397 14:50:00.540307 Using IGT_SRANDOM=1717512543 for randomisation
8398 14:50:00.543174 Opened device: /dev/dri/card1
8399 14:50:00.546871 Starting subtest: query-forked-busy
8400 14:50:00.549995 Starting dynamic subtest: pipe-A-eDP-1
8401 14:50:02.634526 Time to query current counter (busy): 3.226µs
8402 14:50:02.637409 Time to query current counter (busy): 3.219µs
8403 14:50:02.643568 Time to query current counter (busy): 3.214µs
8404 14:50:02.647073 Time to query current counter (busy): 3.215µs
8405 14:50:02.650881 Time to query current counter (busy): 3.644µs
8406 14:50:02.657110 Time to query current counter (busy): 3.648µs
8407 14:50:02.660536 Time to query current counter (busy): 3.647µs
8408 14:50:02.663535 Time to query current counter (busy): 3.650µs
8409 14:50:02.872043 [1mDynamic subt<14>[ 86.483444] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8410 14:50:02.878926 est pipe-A-eDP-1<14>[ 86.491612] [IGT] kms_vblank: finished subtest query-forked-busy, SUCCESS
8411 14:50:02.882538 : SUCCESS (2.331s)[0m
8412 14:50:02.888894 [1mSubtest query-forked-busy: SUCCESS (2.347s)[0m
8413 14:50:03.422100 <14>[ 87.036650] [IGT] kms_vblank: exiting, ret=0
8414 14:50:03.482567 <6>[ 87.080854] Console: switching to colour frame buffer device 170x48
8415 14:50:03.504304 <8>[ 87.115813] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-forked-busy RESULT=pass>
8416 14:50:03.505128 Received signal: <TESTCASE> TEST_CASE_ID=query-forked-busy RESULT=pass
8418 14:50:03.525145 <6>[ 87.140000] Console: switching to colour dummy device 80x25
8419 14:50:03.531836 <14>[ 87.146132] [IGT] kms_vblank: executing
8420 14:50:03.538762 IGT-Version: 1.2<14>[ 87.151640] [IGT] kms_vblank: starting subtest query-forked-busy-hang
8421 14:50:03.546087 <14>[ 87.158808] [IGT] kms_vblank: finished subtest query-forked-busy-hang, SKIP
8422 14:50:03.555266 8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch6<14>[ 87.168986] [IGT] kms_vblank: exiting, ret=77
8423 14:50:03.555760 4)
8424 14:50:03.558585 Using IGT_SRANDOM=1717512546 for randomisation
8425 14:50:03.562747 Opened device: /dev/dri/card1
8426 14:50:03.565210 Starting subtest: query-forked-busy-hang
8427 14:50:03.575685 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8428 14:50:03.578689 Test requirement: has_ban_period || has_bannable
8429 14:50:03.582227 Last errno: 22, Invalid argument
8430 14:50:03.588541 [1mSubtest query-forked-busy-hang: SKIP (0.000s)[0m
8431 14:50:03.606827 <6>[ 87.204139] Console: switching to colour frame buffer device 170x48
8432 14:50:03.625002 <8>[ 87.236015] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=query-forked-busy-hang RESULT=skip>
8433 14:50:03.625852 Received signal: <TESTCASE> TEST_CASE_ID=query-forked-busy-hang RESULT=skip
8435 14:50:03.658232 <6>[ 87.272738] Console: switching to colour dummy device 80x25
8436 14:50:03.665005 <14>[ 87.278965] [IGT] kms_vblank: executing
8437 14:50:03.671123 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 87.285632] [IGT] kms_vblank: starting subtest wait-idle
8438 14:50:03.681714 h64) (Linux: 6.1<14>[ 87.292161] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8439 14:50:03.682247 .91-cip21 aarch64)
8440 14:50:03.684412 Using IGT_SRANDOM=1717512546 for randomisation
8441 14:50:03.688109 Opened device: /dev/dri/card1
8442 14:50:03.691156 Starting subtest: wait-idle
8443 14:50:03.694813 Starting dynamic subtest: pipe-A-eDP-1
8444 14:50:05.765744 Time to wait for 121/121 vblanks (idle): 16626.636µs
8445 14:50:05.819996 [1mDynamic subt<14>[ 89.431277] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8446 14:50:05.826938 est pipe-A-eDP-1<14>[ 89.439330] [IGT] kms_vblank: finished subtest wait-idle, SUCCESS
8447 14:50:05.830414 : SUCCESS (2.131s)[0m
8448 14:50:05.833604 [1mSubtest wait-idle: SUCCESS (2.147s)[0m
8449 14:50:06.369474 <14>[ 89.983627] [IGT] kms_vblank: exiting, ret=0
8450 14:50:06.430999 <6>[ 90.028403] Console: switching to colour frame buffer device 170x48
8451 14:50:06.448774 Received signal: <TESTCASE> TEST_CASE_ID=wait-idle RESULT=pass
8453 14:50:06.451918 <8>[ 90.062939] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-idle RESULT=pass>
8454 14:50:06.484021 <6>[ 90.098424] Console: switching to colour dummy device 80x25
8455 14:50:06.490424 <14>[ 90.104434] [IGT] kms_vblank: executing
8456 14:50:06.497163 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 90.111128] [IGT] kms_vblank: starting subtest wait-idle-hang
8457 14:50:06.507179 h64) (Linux: 6.1<14>[ 90.117989] [IGT] kms_vblank: finished subtest wait-idle-hang, SKIP
8458 14:50:06.507760 .91-cip21 aarch64)
8459 14:50:06.514325 Using IGT_SRANDOM=1717512549 for randomisation
8460 14:50:06.520556 Opened device: /dev/dri/card<14>[ 90.133257] [IGT] kms_vblank: exiting, ret=77
8461 14:50:06.521139 1
8462 14:50:06.523724 Starting subtest: wait-idle-hang
8463 14:50:06.534079 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8464 14:50:06.537180 Test requirement: has_ban_period || has_bannable
8465 14:50:06.540576 Last errno: 22, Invalid argument
8466 14:50:06.543485 [1mSubtest wait-idle-hang: SKIP (0.000s)[0m
8467 14:50:06.573987 <6>[ 90.168639] Console: switching to colour frame buffer device 170x48
8468 14:50:06.590946 <8>[ 90.201892] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-idle-hang RESULT=skip>
8469 14:50:06.591833 Received signal: <TESTCASE> TEST_CASE_ID=wait-idle-hang RESULT=skip
8471 14:50:06.611089 <6>[ 90.225220] Console: switching to colour dummy device 80x25
8472 14:50:06.617533 <14>[ 90.231179] [IGT] kms_vblank: executing
8473 14:50:06.624088 IGT-Version: 1.2<14>[ 90.236688] [IGT] kms_vblank: starting subtest wait-forked
8474 14:50:06.630626 8-ga44ebfe (aarc<14>[ 90.243141] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8475 14:50:06.634185 h64) (Linux: 6.1.91-cip21 aarch64)
8476 14:50:06.637326 Using IGT_SRANDOM=1717512549 for randomisation
8477 14:50:06.640370 Opened device: /dev/dri/card1
8478 14:50:06.643810 Starting subtest: wait-forked
8479 14:50:06.646609 Starting dynamic subtest: pipe-A-eDP-1
8480 14:50:08.729314 Time to wait for 121/121 vblanks (idle): 16594.207µs
8481 14:50:08.733202 Time to wait for 121/121 vblanks (idle): 16611.273µs
8482 14:50:08.739290 Time to wait for 121/121 vblanks (idle): 16572.058µs
8483 14:50:08.742566 Time to wait for 121/121 vblanks (idle): 16578.388µs
8484 14:50:08.749403 Time to wait for 121/121 vblanks (idle): 16572.165µs
8485 14:50:08.752852 Time to wait for 121/121 vblanks (idle): 16617.041µs
8486 14:50:08.759006 Time to wait for 121/121 vblanks (idle): 16657.074µs
8487 14:50:08.762861 Time to wait for 121/121 vblanks (idle): 16681.769µs
8488 14:50:08.800527 [1mDynamic subt<14>[ 92.412287] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8489 14:50:08.807250 est pipe-A-eDP-1<14>[ 92.420297] [IGT] kms_vblank: finished subtest wait-forked, SUCCESS
8490 14:50:08.810063 : SUCCESS (2.161s)[0m
8491 14:50:08.813704 [1mSubtest wait-forked: SUCCESS (2.177s)[0m
8492 14:50:09.349539 <14>[ 92.963958] [IGT] kms_vblank: exiting, ret=0
8493 14:50:09.410981 <6>[ 93.008750] Console: switching to colour frame buffer device 170x48
8494 14:50:09.432169 <8>[ 93.043118] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-forked RESULT=pass>
8495 14:50:09.433023 Received signal: <TESTCASE> TEST_CASE_ID=wait-forked RESULT=pass
8497 14:50:09.455396 <6>[ 93.069275] Console: switching to colour dummy device 80x25
8498 14:50:09.461725 <14>[ 93.075472] [IGT] kms_vblank: executing
8499 14:50:09.468277 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 93.081837] [IGT] kms_vblank: starting subtest wait-forked-hang
8500 14:50:09.478404 h64) (Linux: 6.1<14>[ 93.089228] [IGT] kms_vblank: finished subtest wait-forked-hang, SKIP
8501 14:50:09.481398 .91-cip21 aarch64)
8502 14:50:09.484920 Using IGT_SRANDOM=1717512552 for randomisation
8503 14:50:09.487923 Opened device: /dev/dri/card1
8504 14:50:09.491302 Starting subtest: wait-forked-hang
8505 14:50:09.498083 Test requirement not met in function gem_context_require_<14>[ 93.113690] [IGT] kms_vblank: exiting, ret=77
8506 14:50:09.505006 bannable, file ../lib/i915/gem_context.c:324:
8507 14:50:09.508366 Test requirement: has_ban_period || has_bannable
8508 14:50:09.511564 Last errno: 22, Invalid argument
8509 14:50:09.514788 [1mSubtest wait-forked-hang: SKIP (0.000s)[0m
8510 14:50:09.555368 <6>[ 93.152436] Console: switching to colour frame buffer device 170x48
8511 14:50:09.573275 <8>[ 93.184630] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-forked-hang RESULT=skip>
8512 14:50:09.574085 Received signal: <TESTCASE> TEST_CASE_ID=wait-forked-hang RESULT=skip
8514 14:50:09.596130 <6>[ 93.210332] Console: switching to colour dummy device 80x25
8515 14:50:09.602619 <14>[ 93.216785] [IGT] kms_vblank: executing
8516 14:50:09.609387 IGT-Version: 1.2<14>[ 93.222662] [IGT] kms_vblank: starting subtest wait-busy
8517 14:50:09.616046 8-ga44ebfe (aarc<14>[ 93.228629] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8518 14:50:09.619577 h64) (Linux: 6.1.91-cip21 aarch64)
8519 14:50:09.625855 Using IGT_SRANDOM=1717512552 for randomisation
8520 14:50:09.628698 Opened device: /dev/dri/card1
8521 14:50:09.629141 Starting subtest: wait-busy
8522 14:50:09.632293 Starting dynamic subtest: pipe-A-eDP-1
8523 14:50:11.709922 Time to wait for 121/121 vblanks (busy): 16623.298µs
8524 14:50:11.948000 [1mDynamic subt<14>[ 95.558679] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8525 14:50:11.953722 est pipe-A-eDP-1<14>[ 95.566742] [IGT] kms_vblank: finished subtest wait-busy, SUCCESS
8526 14:50:11.957335 : SUCCESS (2.322s)[0m
8527 14:50:11.960709 [1mSubtest wait-busy: SUCCESS (2.338s)[0m
8528 14:50:12.513483 <14>[ 96.127595] [IGT] kms_vblank: exiting, ret=0
8529 14:50:12.574392 <6>[ 96.172262] Console: switching to colour frame buffer device 170x48
8530 14:50:12.593078 Received signal: <TESTCASE> TEST_CASE_ID=wait-busy RESULT=pass
8532 14:50:12.595762 <8>[ 96.207036] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-busy RESULT=pass>
8533 14:50:12.616785 <6>[ 96.231025] Console: switching to colour dummy device 80x25
8534 14:50:12.623247 <14>[ 96.237407] [IGT] kms_vblank: executing
8535 14:50:12.630120 IGT-Version: 1.2<14>[ 96.243128] [IGT] kms_vblank: starting subtest wait-busy-hang
8536 14:50:12.636799 8-ga44ebfe (aarc<14>[ 96.249843] [IGT] kms_vblank: finished subtest wait-busy-hang, SKIP
8537 14:50:12.640313 h64) (Linux: 6.1.91-cip21 aarch64)
8538 14:50:12.647271 Using IGT_SR<14>[ 96.260676] [IGT] kms_vblank: exiting, ret=77
8539 14:50:12.650113 ANDOM=1717512555 for randomisation
8540 14:50:12.653277 Opened device: /dev/dri/card1
8541 14:50:12.656860 Starting subtest: wait-busy-hang
8542 14:50:12.667048 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8543 14:50:12.670229 Test requirement: has_ban_period || has_bannable
8544 14:50:12.673876 Last errno: 22, Invalid argument
8545 14:50:12.676412 [1mSubtest wait-busy-hang: SKIP (0.000s)[0m
8546 14:50:12.700780 <6>[ 96.295884] Console: switching to colour frame buffer device 170x48
8547 14:50:12.717100 <8>[ 96.328270] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-busy-hang RESULT=skip>
8548 14:50:12.717884 Received signal: <TESTCASE> TEST_CASE_ID=wait-busy-hang RESULT=skip
8550 14:50:12.737488 <6>[ 96.351651] Console: switching to colour dummy device 80x25
8551 14:50:12.744267 <14>[ 96.357619] [IGT] kms_vblank: executing
8552 14:50:12.750868 IGT-Version: 1.2<14>[ 96.363141] [IGT] kms_vblank: starting subtest wait-forked-busy
8553 14:50:12.757181 8-ga44ebfe (aarc<14>[ 96.369898] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8554 14:50:12.760354 h64) (Linux: 6.1.91-cip21 aarch64)
8555 14:50:12.766941 Using IGT_SRANDOM=1717512555 for randomisation
8556 14:50:12.770669 Opened device: /dev/dri/card1
8557 14:50:12.771226 Starting subtest: wait-forked-busy
8558 14:50:12.773563 Starting dynamic subtest: pipe-A-eDP-1
8559 14:50:14.857637 Time to wait for 121/121 vblanks (busy): 16593.405µs
8560 14:50:14.861254 Time to wait for 121/121 vblanks (busy): 16613.248µs
8561 14:50:14.867447 Time to wait for 121/121 vblanks (busy): 16564.174µs
8562 14:50:14.870765 Time to wait for 121/121 vblanks (busy): 16554.083µs
8563 14:50:14.877232 Time to wait for 121/121 vblanks (busy): 16629.744µs
8564 14:50:14.880601 Time to wait for 121/121 vblanks (busy): 16699.273µs
8565 14:50:14.887311 Time to wait for 121/121 vblanks (busy): 16714.694µs
8566 14:50:14.890249 Time to wait for 121/122 vblanks (busy): 16730.736µs
8567 14:50:15.094492 [1mDynamic subt<14>[ 98.705827] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8568 14:50:15.104504 est pipe-A-eDP-1<14>[ 98.713989] [IGT] kms_vblank: finished subtest wait-forked-busy, SUCCESS
8569 14:50:15.104999 : SUCCESS (2.327s)[0m
8570 14:50:15.110799 [1mSubtest wait-forked-busy: SUCCESS (2.344s)[0m
8571 14:50:15.644987 <14>[ 99.258915] [IGT] kms_vblank: exiting, ret=0
8572 14:50:15.706132 <6>[ 99.303815] Console: switching to colour frame buffer device 170x48
8573 14:50:15.727254 <8>[ 99.338097] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-forked-busy RESULT=pass>
8574 14:50:15.728131 Received signal: <TESTCASE> TEST_CASE_ID=wait-forked-busy RESULT=pass
8576 14:50:15.748865 <6>[ 99.363174] Console: switching to colour dummy device 80x25
8577 14:50:15.755842 <14>[ 99.369376] [IGT] kms_vblank: executing
8578 14:50:15.766173 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 99.375371] [IGT] kms_vblank: starting subtest wait-forked-busy-hang
8579 14:50:15.772307 h64) (Linux: 6.1<14>[ 99.383710] [IGT] kms_vblank: finished subtest wait-forked-busy-hang, SKIP
8580 14:50:15.775696 .91-cip21 aarch64)
8581 14:50:15.778770 Using IGT_SRANDOM=1717512558 for randomisation
8582 14:50:15.782581 Opened device: /dev/dri/card1
8583 14:50:15.786152 Starting subtest: wait-forked-busy-hang
8584 14:50:15.795563 Test requirement not met in function gem_context_req<14>[ 99.408701] [IGT] kms_vblank: exiting, ret=77
8585 14:50:15.799537 uire_bannable, file ../lib/i915/gem_context.c:324:
8586 14:50:15.802278 Test requirement: has_ban_period || has_bannable
8587 14:50:15.805739 Last errno: 22, Invalid argument
8588 14:50:15.812374 [1mSubtest wait-forked-busy-hang: SKIP (0.000s)[0m
8589 14:50:15.849802 <6>[ 99.447029] Console: switching to colour frame buffer device 170x48
8590 14:50:15.868539 <8>[ 99.479543] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wait-forked-busy-hang RESULT=skip>
8591 14:50:15.869366 Received signal: <TESTCASE> TEST_CASE_ID=wait-forked-busy-hang RESULT=skip
8593 14:50:15.890169 <6>[ 99.503861] Console: switching to colour dummy device 80x25
8594 14:50:15.896812 <14>[ 99.509797] [IGT] kms_vblank: executing
8595 14:50:15.903449 IGT-Version: 1.2<14>[ 99.515325] [IGT] kms_vblank: starting subtest ts-continuation-idle
8596 14:50:15.909836 8-ga44ebfe (aarc<14>[ 99.522526] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8597 14:50:15.913403 h64) (Linux: 6.1.91-cip21 aarch64)
8598 14:50:15.919787 Using IGT_SRANDOM=1717512558 for randomisation
8599 14:50:15.920297 Opened device: /dev/dri/card1
8600 14:50:15.925892 Starting subtest: ts-continuation-idle
8601 14:50:15.929429 Starting dynamic subtest: pipe-A-eDP-1
8602 14:50:16.048943 [1mDynamic subt<14>[ 99.659999] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8603 14:50:16.058882 est pipe-A-eDP-1<14>[ 99.668066] [IGT] kms_vblank: finished subtest ts-continuation-idle, SUCCESS
8604 14:50:16.059494 : SUCCESS (0.129s)[0m
8605 14:50:16.065741 [1mSubtest ts-continuation-idle: SUCCESS (0.146s)[0m
8606 14:50:16.615553 <14>[ 100.229888] [IGT] kms_vblank: exiting, ret=0
8607 14:50:16.676590 <6>[ 100.274663] Console: switching to colour frame buffer device 170x48
8608 14:50:16.697940 <8>[ 100.308932] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-idle RESULT=pass>
8609 14:50:16.698742 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-idle RESULT=pass
8611 14:50:16.719976 <6>[ 100.334149] Console: switching to colour dummy device 80x25
8612 14:50:16.726197 <14>[ 100.340245] [IGT] kms_vblank: executing
8613 14:50:16.733137 IGT-Version: 1.2<14>[ 100.345746] [IGT] kms_vblank: starting subtest ts-continuation-idle-hang
8614 14:50:16.742909 8-ga44ebfe (aarc<14>[ 100.353184] [IGT] kms_vblank: finished subtest ts-continuation-idle-hang, SKIP
8615 14:50:16.749725 h64) (Linux: 6.1<14>[ 100.362658] [IGT] kms_vblank: exiting, ret=77
8616 14:50:16.750365 .91-cip21 aarch64)
8617 14:50:16.756487 Using IGT_SRANDOM=1717512559 for randomisation
8618 14:50:16.757042 Opened device: /dev/dri/card1
8619 14:50:16.763542 Starting subtest: ts-continuation-idle-hang
8620 14:50:16.770463 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8621 14:50:16.776341 Test requirement: has_ban_period || has_bannable
8622 14:50:16.780007 Last errno: 22, Invalid argument
8623 14:50:16.782947 [1mSubtest ts-continuation-idle-hang: SKIP (0.000s)[0m
8624 14:50:16.802910 <6>[ 100.398035] Console: switching to colour frame buffer device 170x48
8625 14:50:16.819720 <8>[ 100.430932] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-idle-hang RESULT=skip>
8626 14:50:16.820552 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-idle-hang RESULT=skip
8628 14:50:16.842434 <6>[ 100.456380] Console: switching to colour dummy device 80x25
8629 14:50:16.848541 <14>[ 100.462306] [IGT] kms_vblank: executing
8630 14:50:16.855369 IGT-Version: 1.2<14>[ 100.468023] [IGT] kms_vblank: starting subtest ts-continuation-dpms-rpm
8631 14:50:16.865734 8-ga44ebfe (aarc<14>[ 100.475368] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8632 14:50:16.868790 h64) (Linux: 6.1.91-cip21 aarch64)
8633 14:50:16.872322 Using IGT_SRANDOM=1717512559 for randomisation
8634 14:50:16.875751 Opened device: /dev/dri/card1
8635 14:50:16.878760 Starting subtest: ts-continuation-dpms-rpm
8636 14:50:16.882141 Starting dynamic subtest: pipe-A-eDP-1
8637 14:50:16.951974 Test requirement<14>[ 100.562751] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SKIP
8638 14:50:16.961878 not met in func<14>[ 100.570661] [IGT] kms_vblank: finished subtest ts-continuation-dpms-rpm, SKIP
8639 14:50:16.964989 tion run_test, file ../tests/kms_vblank.c:189:
8640 14:50:16.968420 Test requirement: igt_setup_runtime_pm(fd)
8641 14:50:16.971786 Last errno: 5, Input/output error
8642 14:50:16.975096 [1mDynamic subtest pipe-A-eDP-1: SKIP (0.079s)[0m
8643 14:50:16.978317 No dynamic tests executed.
8644 14:50:16.984399 [1mSubtest ts-continuation-dpms-rpm: SKIP (0.095s)[0m
8645 14:50:16.998281 <14>[ 100.612233] [IGT] kms_vblank: exiting, ret=77
8646 14:50:17.057982 <6>[ 100.654493] Console: switching to colour frame buffer device 170x48
8647 14:50:17.077108 <8>[ 100.688101] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-dpms-rpm RESULT=skip>
8648 14:50:17.077927 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-dpms-rpm RESULT=skip
8650 14:50:17.098595 <6>[ 100.712604] Console: switching to colour dummy device 80x25
8651 14:50:17.104915 <14>[ 100.718710] [IGT] kms_vblank: executing
8652 14:50:17.111842 IGT-Version: 1.2<14>[ 100.724255] [IGT] kms_vblank: starting subtest ts-continuation-dpms-suspend
8653 14:50:17.121894 8-ga44ebfe (aarc<14>[ 100.731896] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8654 14:50:17.124906 h64) (Linux: 6.1.91-cip21 aarch64)
8655 14:50:17.128175 Using IGT_SRANDOM=1717512560 for randomisation
8656 14:50:17.131437 Opened device: /dev/dri/card1
8657 14:50:17.134661 Starting subtest: ts-continuation-dpms-suspend
8658 14:50:17.137910 Starting dynamic subtest: pipe-A-eDP-1
8659 14:50:17.273476 [cmd] rtcwake: assuming RTC uses UTC ...
8660 14:50:17.279519 rtcwake: wakeup from "mem" using /dev/rtc0 at Tue Jun 4 14:49:36 2024
8661 14:50:17.293339 <6>[ 100.907976] PM: suspend entry (deep)
8662 14:50:17.297125 <6>[ 100.911924] Filesystems sync: 0.000 seconds
8663 14:50:17.304288 <6>[ 100.918808] Freezing user space processes
8664 14:50:17.310854 <6>[ 100.924798] Freezing user space processes completed (elapsed 0.001 seconds)
8665 14:50:17.317957 <6>[ 100.932045] OOM killer disabled.
8666 14:50:17.320788 <6>[ 100.935531] Freezing remaining freezable tasks
8667 14:50:17.330834 <6>[ 100.941462] Freezing remaining freezable tasks completed (elapsed 0.001 seconds)
8668 14:50:17.404745 <6>[ 101.019041] Disabling non-boot CPUs ...
8669 14:50:17.411332 <6>[ 101.024721] psci: CPU1 killed (polled 0 ms)
8670 14:50:17.414637 <6>[ 101.031141] psci: CPU2 killed (polled 4 ms)
8671 14:50:17.423137 <6>[ 101.037549] psci: CPU3 killed (polled 0 ms)
8672 14:50:17.430119 <6>[ 101.043730] psci: CPU4 killed (polled 0 ms)
8673 14:50:17.436934 <6>[ 101.049789] psci: CPU5 killed (polled 0 ms)
8674 14:50:17.440104 <6>[ 101.055848] psci: CPU6 killed (polled 0 ms)
8675 14:50:17.447811 <6>[ 101.061878] psci: CPU7 killed (polled 0 ms)
8676 14:50:17.455089 INFO: cpu0: "DYNAMIC_SPM_FW_VERSION", wakesrc = 0xe87dde7, pcm_con1 = 0x5849
8677 14:50:17.460905 INFO: settle = 99, sec = 131041, sw_flag = 0x8809a 0x40, src_req = 0x0
8678 14:50:33.256488 INFO: suspend: wake up by R12_EINT_EVENT_B, timer_out = 0
8679 14:50:33.260139 INFO: r15 = 0xb79, r13 = 0x86040000, debug_flag = 0x1910ff 0x0
8680 14:50:33.267033 INFO: sw_flag = 0x8809a 0x40, r12 = 0x40, r12_ext = 0x0
8681 14:50:33.273783 INFO: idle_sta = 0x1ff, req_sta = 0x100000, event_reg = 0x90100000
8682 14:50:33.280361 INFO: isr = 0x10, raw_sta = 0x40, raw_ext_sta = 0x400290aa
8683 14:50:33.280455 INFO: wake_misc = 0x10000
8684 14:50:33.287025 <6>[ 101.066895] Enabling non-boot CPUs ...
8685 14:50:33.290305 <6>[ 101.071453] Detected VIPT I-cache on CPU1
8686 14:50:33.296629 <4>[ 101.075753] cacheinfo: Unable to detect cache hierarchy for CPU 1
8687 14:50:33.303874 <6>[ 101.082103] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
8688 14:50:33.310542 <6>[ 101.089267] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
8689 14:50:33.313755 <6>[ 101.096459] CPU1 is up
8690 14:50:33.316765 <6>[ 101.099423] Detected VIPT I-cache on CPU2
8691 14:50:33.323345 <4>[ 101.103697] cacheinfo: Unable to detect cache hierarchy for CPU 2
8692 14:50:33.333453 <6>[ 101.110040] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
8693 14:50:33.340232 <6>[ 101.117173] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
8694 14:50:33.340329 <6>[ 101.124128] CPU2 is up
8695 14:50:33.346653 <6>[ 101.127034] Detected VIPT I-cache on CPU3
8696 14:50:33.353069 <4>[ 101.131307] cacheinfo: Unable to detect cache hierarchy for CPU 3
8697 14:50:33.360108 <6>[ 101.137650] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
8698 14:50:33.366838 <6>[ 101.144784] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
8699 14:50:33.370125 <6>[ 101.151767] CPU3 is up
8700 14:50:33.373133 <6>[ 101.154768] Detected VIPT I-cache on CPU4
8701 14:50:33.379676 <4>[ 101.159057] cacheinfo: Unable to detect cache hierarchy for CPU 4
8702 14:50:33.386399 <6>[ 101.165404] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
8703 14:50:33.392944 <6>[ 101.172717] arch_timer: CPU4: Trapping CNTVCT access
8704 14:50:33.399603 <6>[ 101.177936] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
8705 14:50:33.403184 <6>[ 101.185081] CPU4 is up
8706 14:50:33.406360 <6>[ 101.188071] Detected VIPT I-cache on CPU5
8707 14:50:33.413122 <4>[ 101.192350] cacheinfo: Unable to detect cache hierarchy for CPU 5
8708 14:50:33.419708 <6>[ 101.198694] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
8709 14:50:33.426120 <6>[ 101.206000] arch_timer: CPU5: Trapping CNTVCT access
8710 14:50:33.432808 <6>[ 101.211217] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
8711 14:50:33.436612 <6>[ 101.218255] CPU5 is up
8712 14:50:33.439932 <6>[ 101.221183] Detected VIPT I-cache on CPU6
8713 14:50:33.446385 <4>[ 101.225463] cacheinfo: Unable to detect cache hierarchy for CPU 6
8714 14:50:33.452810 <6>[ 101.231808] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
8715 14:50:33.459333 <6>[ 101.239114] arch_timer: CPU6: Trapping CNTVCT access
8716 14:50:33.466381 <6>[ 101.244331] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
8717 14:50:33.469663 <6>[ 101.251391] CPU6 is up
8718 14:50:33.472932 <6>[ 101.254296] Detected VIPT I-cache on CPU7
8719 14:50:33.479238 <4>[ 101.258584] cacheinfo: Unable to detect cache hierarchy for CPU 7
8720 14:50:33.486037 <6>[ 101.264928] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
8721 14:50:33.492529 <6>[ 101.272234] arch_timer: CPU7: Trapping CNTVCT access
8722 14:50:33.499275 <6>[ 101.277451] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
8723 14:50:33.502406 <6>[ 101.284535] CPU7 is up
8724 14:50:33.509081 <3>[ 101.288436] Failed to prepare clk '(null)': -13
8725 14:50:33.512537 <3>[ 101.293309] Failed to prepare clk '(null)': -13
8726 14:50:33.627920 <4>[ 101.405163] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
8727 14:50:33.644172 <4>[ 101.421125] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
8728 14:50:33.656517 <4>[ 101.433550] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
8729 14:50:33.663301 <4>[ 101.442352] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
8730 14:50:33.792780 <6>[ 101.576041] OOM killer enabled.
8731 14:50:33.801492 <6>[ 101.579471] Restarting tasks ... done.
8732 14:50:33.820848 <46>[ 101.581986] systemd-journald[199]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.0 (1536 of 2047 items, 524288 file size, 341 bytes per hash table item), suggesting rotation.
8733 14:50:33.827639 <5>[ 101.585284] random: crng reseeded on system resumption
8734 14:50:33.840877 <46>[ 101.606646] systemd-journald[199]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
8735 14:50:33.844276 <6>[ 101.627941] PM: suspend exit
8736 14:50:33.850879 <6>[ 101.629985] r8152 1-1.2:1.0 eth0: carrier on
8737 14:50:34.443941 [1mDynamic subt<14>[ 102.221409] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8738 14:50:34.454318 est pipe-A-eDP-1<14>[ 102.229563] [IGT] kms_vblank: finished subtest ts-continuation-dpms-suspend, SUCCESS
8739 14:50:34.454423 : SUCCESS (1.481s)[0m
8740 14:50:34.461092 [1mSubtest ts-continuation-dpms-suspend: SUCCESS (1.498s)[0m
8741 14:50:34.994654 <14>[ 102.775108] [IGT] kms_vblank: exiting, ret=0
8742 14:50:35.055872 <6>[ 102.820045] Console: switching to colour frame buffer device 170x48
8743 14:50:35.077120 <8>[ 102.854305] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-dpms-suspend RESULT=pass>
8744 14:50:35.077430 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-dpms-suspend RESULT=pass
8746 14:50:35.113093 <6>[ 102.893064] Console: switching to colour dummy device 80x25
8747 14:50:35.119378 <14>[ 102.899291] [IGT] kms_vblank: executing
8748 14:50:35.129086 IGT-Version: 1.28-ga44ebfe (aarc<14>[ 102.905770] [IGT] kms_vblank: starting subtest ts-continuation-suspend
8749 14:50:35.135411 h64) (Linux: 6.1<14>[ 102.913473] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8750 14:50:35.139423 .91-cip21 aarch64)
8751 14:50:35.142757 Using IGT_SRANDOM=1717512578 for randomisation
8752 14:50:35.145801 Opened device: /dev/dri/card1
8753 14:50:35.148859 Starting subtest: ts-continuation-suspend
8754 14:50:35.152289 Starting dynamic subtest: pipe-A-eDP-1
8755 14:50:35.236039 [cmd] rtcwake: assuming RTC uses UTC ...
8756 14:50:35.242553 rtcwake: wakeup from "mem" using /dev/rtc0 at Tue Jun 4 14:49:53 2024
8757 14:50:35.256423 <6>[ 103.036499] PM: suspend entry (deep)
8758 14:50:35.259358 <6>[ 103.040398] Filesystems sync: 0.000 seconds
8759 14:50:35.263111 <6>[ 103.045438] Freezing user space processes
8760 14:50:35.274109 <6>[ 103.051174] Freezing user space processes completed (elapsed 0.001 seconds)
8761 14:50:35.277426 <6>[ 103.058408] OOM killer disabled.
8762 14:50:35.280994 <6>[ 103.061897] Freezing remaining freezable tasks
8763 14:50:35.291059 <6>[ 103.067859] Freezing remaining freezable tasks completed (elapsed 0.001 seconds)
8764 14:50:37.415815 <6>[ 105.196231] Disabling non-boot CPUs ...
8765 14:50:37.422407 <6>[ 105.202159] psci: CPU1 killed (polled 0 ms)
8766 14:50:37.429252 <6>[ 105.208647] psci: CPU2 killed (polled 0 ms)
8767 14:50:37.432825 <6>[ 105.214901] psci: CPU3 killed (polled 0 ms)
8768 14:50:37.441025 <6>[ 105.221285] psci: CPU4 killed (polled 0 ms)
8769 14:50:37.447750 <6>[ 105.227453] psci: CPU5 killed (polled 4 ms)
8770 14:50:37.454518 <6>[ 105.233668] psci: CPU6 killed (polled 0 ms)
8771 14:50:37.457576 <6>[ 105.239428] psci: CPU7 killed (polled 4 ms)
8772 14:50:37.467687 INFO: cpu0: "DYNAMIC_SPM_FW_VERSION", wakesrc = 0xe87dde7, pcm_con1 = 0x5849
8773 14:50:37.474019 INFO: settle = 99, sec = 131041, sw_flag = 0x8809a 0x40, src_req = 0x0
8774 14:50:50.257800 INFO: suspend: wake up by R12_EINT_EVENT_B, timer_out = 0
8775 14:50:50.261557 INFO: r15 = 0xb79, r13 = 0x86040400, debug_flag = 0x1910ff 0x0
8776 14:50:50.268233 INFO: sw_flag = 0x8809a 0x40, r12 = 0x40, r12_ext = 0x0
8777 14:50:50.275044 INFO: idle_sta = 0x1f7, req_sta = 0x100000, event_reg = 0x90100000
8778 14:50:50.278489 INFO: isr = 0x10, raw_sta = 0x40, raw_ext_sta = 0x400290aa
8779 14:50:50.281397 INFO: wake_misc = 0x10000
8780 14:50:50.285237 <6>[ 105.244316] Enabling non-boot CPUs ...
8781 14:50:50.291859 <6>[ 105.248871] Detected VIPT I-cache on CPU1
8782 14:50:50.298754 <4>[ 105.253188] cacheinfo: Unable to detect cache hierarchy for CPU 1
8783 14:50:50.305376 <6>[ 105.259543] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
8784 14:50:50.312102 <6>[ 105.266721] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
8785 14:50:50.315331 <6>[ 105.274061] CPU1 is up
8786 14:50:50.318531 <6>[ 105.277036] Detected VIPT I-cache on CPU2
8787 14:50:50.325742 <4>[ 105.281321] cacheinfo: Unable to detect cache hierarchy for CPU 2
8788 14:50:50.331675 <6>[ 105.287669] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
8789 14:50:50.337996 <6>[ 105.294812] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
8790 14:50:50.342171 <6>[ 105.301876] CPU2 is up
8791 14:50:50.348698 <6>[ 105.304846] Detected VIPT I-cache on CPU3
8792 14:50:50.355052 <4>[ 105.309131] cacheinfo: Unable to detect cache hierarchy for CPU 3
8793 14:50:50.362615 <6>[ 105.315479] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
8794 14:50:50.368220 <6>[ 105.322622] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
8795 14:50:50.371509 <6>[ 105.329703] CPU3 is up
8796 14:50:50.375294 <6>[ 105.332796] Detected VIPT I-cache on CPU4
8797 14:50:50.381846 <4>[ 105.337107] cacheinfo: Unable to detect cache hierarchy for CPU 4
8798 14:50:50.388119 <6>[ 105.343461] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
8799 14:50:50.395175 <6>[ 105.350789] arch_timer: CPU4: Trapping CNTVCT access
8800 14:50:50.401670 <6>[ 105.356017] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
8801 14:50:50.404712 <6>[ 105.363387] CPU4 is up
8802 14:50:50.407910 <6>[ 105.366390] Detected VIPT I-cache on CPU5
8803 14:50:50.414954 <4>[ 105.370684] cacheinfo: Unable to detect cache hierarchy for CPU 5
8804 14:50:50.421351 <6>[ 105.377034] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
8805 14:50:50.428025 <6>[ 105.384350] arch_timer: CPU5: Trapping CNTVCT access
8806 14:50:50.434782 <6>[ 105.389571] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
8807 14:50:50.438087 <6>[ 105.396766] CPU5 is up
8808 14:50:50.441774 <6>[ 105.399802] Detected VIPT I-cache on CPU6
8809 14:50:50.448288 <4>[ 105.404097] cacheinfo: Unable to detect cache hierarchy for CPU 6
8810 14:50:50.454999 <6>[ 105.410447] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
8811 14:50:50.461938 <6>[ 105.417763] arch_timer: CPU6: Trapping CNTVCT access
8812 14:50:50.467978 <6>[ 105.422984] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
8813 14:50:50.470978 <6>[ 105.430197] CPU6 is up
8814 14:50:50.474393 <6>[ 105.433215] Detected VIPT I-cache on CPU7
8815 14:50:50.481210 <4>[ 105.437520] cacheinfo: Unable to detect cache hierarchy for CPU 7
8816 14:50:50.487973 <6>[ 105.443869] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
8817 14:50:50.494279 <6>[ 105.451185] arch_timer: CPU7: Trapping CNTVCT access
8818 14:50:50.501197 <6>[ 105.456406] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
8819 14:50:50.504369 <6>[ 105.463658] CPU7 is up
8820 14:50:50.622672 <4>[ 105.579176] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
8821 14:50:50.642302 <4>[ 105.595257] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
8822 14:50:50.653767 <4>[ 105.606690] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
8823 14:50:50.660013 <4>[ 105.615591] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
8824 14:50:50.795525 <6>[ 105.752457] r8152 1-1.2:1.0 eth0: carrier on
8825 14:50:51.301252 <6>[ 106.258095] OOM killer enabled.
8826 14:50:51.304703 <6>[ 106.261544] Restarting tasks ... done.
8827 14:50:51.311683 <5>[ 106.267382] random: crng reseeded on system resumption
8828 14:50:51.315087 <6>[ 106.274101] PM: suspend exit
8829 14:50:51.388751 [1mDynamic subt<14>[ 106.342143] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8830 14:50:51.398505 est pipe-A-eDP-1<14>[ 106.350238] [IGT] kms_vblank: finished subtest ts-continuation-suspend, SUCCESS
8831 14:50:51.399035 : SUCCESS (3.421s)[0m
8832 14:50:51.405357 [1mSubtest ts-continuation-suspend: SUCCESS (3.437s)[0m
8833 14:50:51.938994 <14>[ 106.895375] [IGT] kms_vblank: exiting, ret=0
8834 14:50:51.999492 <6>[ 106.940092] Console: switching to colour frame buffer device 170x48
8835 14:50:52.020475 <8>[ 106.973927] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-suspend RESULT=pass>
8836 14:50:52.021323 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-suspend RESULT=pass
8838 14:50:52.042086 <6>[ 106.999091] Console: switching to colour dummy device 80x25
8839 14:50:52.048828 <14>[ 107.005029] [IGT] kms_vblank: executing
8840 14:50:52.055383 IGT-Version: 1.2<14>[ 107.010732] [IGT] kms_vblank: starting subtest ts-continuation-modeset
8841 14:50:52.065088 8-ga44ebfe (aarc<14>[ 107.017931] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8842 14:50:52.068632 h64) (Linux: 6.1.91-cip21 aarch64)
8843 14:50:52.072067 Using IGT_SRANDOM=1717512595 for randomisation
8844 14:50:52.075276 Opened device: /dev/dri/card1
8845 14:50:52.078342 Starting subtest: ts-continuation-modeset
8846 14:50:52.082147 Starting dynamic subtest: pipe-A-eDP-1
8847 14:50:52.761255 [1mDynamic subt<14>[ 107.715059] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SUCCESS
8848 14:50:52.771135 est pipe-A-eDP-1<14>[ 107.723190] [IGT] kms_vblank: finished subtest ts-continuation-modeset, SUCCESS
8849 14:50:52.771696 : SUCCESS (0.689s)[0m
8850 14:50:52.777751 [1mSubtest ts-continuation-modeset: SUCCESS (0.705s)[0m
8851 14:50:53.328618 <14>[ 108.284912] [IGT] kms_vblank: exiting, ret=0
8852 14:50:53.389695 <6>[ 108.329728] Console: switching to colour frame buffer device 170x48
8853 14:50:53.411303 <8>[ 108.364966] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-modeset RESULT=pass>
8854 14:50:53.412197 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-modeset RESULT=pass
8856 14:50:53.436086 <6>[ 108.392590] Console: switching to colour dummy device 80x25
8857 14:50:53.442832 <14>[ 108.398831] [IGT] kms_vblank: executing
8858 14:50:53.449655 IGT-Version: 1.2<14>[ 108.404698] [IGT] kms_vblank: starting subtest ts-continuation-modeset-hang
8859 14:50:53.459203 8-ga44ebfe (aarc<14>[ 108.412197] [IGT] kms_vblank: finished subtest ts-continuation-modeset-hang, SKIP
8860 14:50:53.462282 h64) (Linux: 6.1.91-cip21 aarch64)
8861 14:50:53.466264 Using IGT_SRANDOM=1717512596 for randomisation
8862 14:50:53.469685 Opened device: /dev/dri/card1
8863 14:50:53.479087 Starting subtest: ts-continuation-modeset-han<14>[ 108.434368] [IGT] kms_vblank: exiting, ret=77
8864 14:50:53.479686 g
8865 14:50:53.489000 Test requirement not met in function gem_context_require_bannable, file ../lib/i915/gem_context.c:324:
8866 14:50:53.492189 Test requirement: has_ban_period || has_bannable
8867 14:50:53.496329 Last errno: 22, Invalid argument
8868 14:50:53.502246 [1mSubtest ts-continuation-modeset-hang: SKIP (0.000s)[0m
8869 14:50:53.532844 <6>[ 108.472623] Console: switching to colour frame buffer device 170x48
8870 14:50:53.550515 <8>[ 108.503710] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-modeset-hang RESULT=skip>
8871 14:50:53.551304 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-modeset-hang RESULT=skip
8873 14:50:53.571850 <6>[ 108.528708] Console: switching to colour dummy device 80x25
8874 14:50:53.578872 <14>[ 108.534662] [IGT] kms_vblank: executing
8875 14:50:53.585232 IGT-Version: 1.2<14>[ 108.540224] [IGT] kms_vblank: starting subtest ts-continuation-modeset-rpm
8876 14:50:53.595290 8-ga44ebfe (aarc<14>[ 108.548135] [IGT] kms_vblank: starting dynamic subtest pipe-A-eDP-1
8877 14:50:53.598450 h64) (Linux: 6.1.91-cip21 aarch64)
8878 14:50:53.602011 Using IGT_SRANDOM=1717512596 for randomisation
8879 14:50:53.605044 Opened device: /dev/dri/card1
8880 14:50:53.608035 Starting subtest: ts-continuation-modeset-rpm
8881 14:50:53.611471 Starting dynamic subtest: pipe-A-eDP-1
8882 14:50:53.681125 Test requirement<14>[ 108.634383] [IGT] kms_vblank: finished subtest pipe-A-eDP-1, SKIP
8883 14:50:53.690965 not met in func<14>[ 108.642315] [IGT] kms_vblank: finished subtest ts-continuation-modeset-rpm, SKIP
8884 14:50:53.694577 tion run_test, file ../tests/kms_vblank.c:189:
8885 14:50:53.697561 Test requirement: igt_setup_runtime_pm(fd)
8886 14:50:53.701007 Last errno: 5, Input/output error
8887 14:50:53.704211 [1mDynamic subtest pipe-A-eDP-1: SKIP (0.078s)[0m
8888 14:50:53.707533 No dynamic tests executed.
8889 14:50:53.714077 [1mSubtest ts-continuation-modeset-rpm: SKIP (0.094s)[0m
8890 14:50:53.727041 <14>[ 108.683863] [IGT] kms_vblank: exiting, ret=77
8891 14:50:53.787111 <6>[ 108.726183] Console: switching to colour frame buffer device 170x48
8892 14:50:53.806546 <8>[ 108.760258] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=ts-continuation-modeset-rpm RESULT=skip>
8893 14:50:53.807319 Received signal: <TESTCASE> TEST_CASE_ID=ts-continuation-modeset-rpm RESULT=skip
8895 14:50:53.815048 <8>[ 108.771381] <LAVA_SIGNAL_TESTSET STOP>
8896 14:50:53.815834 Received signal: <TESTSET> STOP
8897 14:50:53.816199 Closing test_set kms_vblank
8898 14:50:53.818057 + set +x
8899 14:50:53.824351 <8>[ 108.777597] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 14167023_1.5.2.3.1>
8900 14:50:53.825119 Received signal: <ENDRUN> 0_igt-kms-mediatek 14167023_1.5.2.3.1
8901 14:50:53.825537 Ending use of test pattern.
8902 14:50:53.825862 Ending test lava.0_igt-kms-mediatek (14167023_1.5.2.3.1), duration 123.80
8904 14:50:53.827476 <LAVA_TEST_RUNNER EXIT>
8905 14:50:53.828084 ok: lava_test_shell seems to have completed
8906 14:50:53.836034 accuracy-idle:
result: pass
set: kms_vblank
addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: pass
set: kms_atomic
atomic-plane-damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: pass
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: pass
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: pass
set: kms_vblank
crtc-invalid-params:
result: pass
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: pass
set: drm_read
empty-nonblock:
result: pass
set: drm_read
fault-buffer:
result: pass
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: pass
set: kms_vblank
invalid-buffer:
result: pass
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
plane-cursor-legacy:
result: pass
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: pass
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: pass
set: kms_atomic
plane-primary-legacy:
result: pass
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
query-busy:
result: pass
set: kms_vblank
query-busy-hang:
result: skip
set: kms_vblank
query-forked:
result: pass
set: kms_vblank
query-forked-busy:
result: pass
set: kms_vblank
query-forked-busy-hang:
result: skip
set: kms_vblank
query-forked-hang:
result: skip
set: kms_vblank
query-idle:
result: pass
set: kms_vblank
query-idle-hang:
result: skip
set: kms_vblank
short-buffer-block:
result: pass
set: drm_read
short-buffer-nonblock:
result: pass
set: drm_read
short-buffer-wakeup:
result: pass
set: drm_read
size-max:
result: pass
set: kms_addfb_basic
small-bo:
result: pass
set: kms_addfb_basic
test-only:
result: pass
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: pass
set: kms_addfb_basic
too-wide:
result: pass
set: kms_addfb_basic
ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
ts-continuation-dpms-suspend:
result: pass
set: kms_vblank
ts-continuation-idle:
result: pass
set: kms_vblank
ts-continuation-idle-hang:
result: skip
set: kms_vblank
ts-continuation-modeset:
result: pass
set: kms_vblank
ts-continuation-modeset-hang:
result: skip
set: kms_vblank
ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
ts-continuation-suspend:
result: pass
set: kms_vblank
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
wait-busy:
result: pass
set: kms_vblank
wait-busy-hang:
result: skip
set: kms_vblank
wait-forked:
result: pass
set: kms_vblank
wait-forked-busy:
result: pass
set: kms_vblank
wait-forked-busy-hang:
result: skip
set: kms_vblank
wait-forked-hang:
result: skip
set: kms_vblank
wait-idle:
result: pass
set: kms_vblank
wait-idle-hang:
result: skip
set: kms_vblank
8907 14:50:53.836740 end: 3.1 lava-test-shell (duration 00:02:04) [common]
8908 14:50:53.837177 end: 3 lava-test-retry (duration 00:02:04) [common]
8909 14:50:53.837614 start: 4 finalize (timeout 00:05:58) [common]
8910 14:50:53.838063 start: 4.1 power-off (timeout 00:00:30) [common]
8911 14:50:53.838893 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
8912 14:50:55.328860 >> Command sent successfully.
8913 14:50:55.335265 Returned 0 in 1 seconds
8914 14:50:55.436036 end: 4.1 power-off (duration 00:00:02) [common]
8916 14:50:55.437533 start: 4.2 read-feedback (timeout 00:05:56) [common]
8917 14:50:55.438928 Listened to connection for namespace 'common' for up to 1s
8918 14:50:56.439639 Finalising connection for namespace 'common'
8919 14:50:56.440336 Disconnecting from shell: Finalise
8920 14:50:56.440775 / #
8921 14:50:56.541792 end: 4.2 read-feedback (duration 00:00:01) [common]
8922 14:50:56.542541 end: 4 finalize (duration 00:00:03) [common]
8923 14:50:56.543156 Cleaning after the job
8924 14:50:56.543694 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/ramdisk
8925 14:50:56.571488 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/kernel
8926 14:50:56.599579 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/dtb
8927 14:50:56.599850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167023/tftp-deploy-n8c97886/modules
8928 14:50:56.606456 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14167023
8929 14:50:56.725926 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14167023
8930 14:50:56.726114 Job finished correctly