Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 48
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 14:46:37.136827 lava-dispatcher, installed at version: 2024.03
2 14:46:37.137070 start: 0 validate
3 14:46:37.137220 Start time: 2024-06-04 14:46:37.137212+00:00 (UTC)
4 14:46:37.137367 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:46:37.137524 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:46:37.397113 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:46:37.397311 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 14:46:37.655340 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:46:37.655528 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 14:46:37.913306 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:46:37.913489 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:46:38.171763 Using caching service: 'http://localhost/cache/?uri=%s'
13 14:46:38.171956 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 14:46:38.431159 validate duration: 1.29
16 14:46:38.431474 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:46:38.431591 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:46:38.431688 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:46:38.431827 Not decompressing ramdisk as can be used compressed.
20 14:46:38.431922 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 14:46:38.431995 saving as /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/ramdisk/initrd.cpio.gz
22 14:46:38.432069 total size: 5628169 (5 MB)
23 14:46:38.433233 progress 0 % (0 MB)
24 14:46:38.435101 progress 5 % (0 MB)
25 14:46:38.436864 progress 10 % (0 MB)
26 14:46:38.438562 progress 15 % (0 MB)
27 14:46:38.440473 progress 20 % (1 MB)
28 14:46:38.442096 progress 25 % (1 MB)
29 14:46:38.443996 progress 30 % (1 MB)
30 14:46:38.445731 progress 35 % (1 MB)
31 14:46:38.447363 progress 40 % (2 MB)
32 14:46:38.449096 progress 45 % (2 MB)
33 14:46:38.450774 progress 50 % (2 MB)
34 14:46:38.452500 progress 55 % (2 MB)
35 14:46:38.454236 progress 60 % (3 MB)
36 14:46:38.455765 progress 65 % (3 MB)
37 14:46:38.457524 progress 70 % (3 MB)
38 14:46:38.459056 progress 75 % (4 MB)
39 14:46:38.460773 progress 80 % (4 MB)
40 14:46:38.462311 progress 85 % (4 MB)
41 14:46:38.464034 progress 90 % (4 MB)
42 14:46:38.465744 progress 95 % (5 MB)
43 14:46:38.467289 progress 100 % (5 MB)
44 14:46:38.467523 5 MB downloaded in 0.04 s (151.40 MB/s)
45 14:46:38.467691 end: 1.1.1 http-download (duration 00:00:00) [common]
47 14:46:38.467959 end: 1.1 download-retry (duration 00:00:00) [common]
48 14:46:38.468055 start: 1.2 download-retry (timeout 00:10:00) [common]
49 14:46:38.468149 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 14:46:38.468299 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 14:46:38.468381 saving as /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/kernel/Image
52 14:46:38.468452 total size: 54682112 (52 MB)
53 14:46:38.468522 No compression specified
54 14:46:38.469676 progress 0 % (0 MB)
55 14:46:38.485195 progress 5 % (2 MB)
56 14:46:38.500705 progress 10 % (5 MB)
57 14:46:38.516290 progress 15 % (7 MB)
58 14:46:38.531788 progress 20 % (10 MB)
59 14:46:38.547478 progress 25 % (13 MB)
60 14:46:38.562815 progress 30 % (15 MB)
61 14:46:38.578369 progress 35 % (18 MB)
62 14:46:38.593844 progress 40 % (20 MB)
63 14:46:38.609263 progress 45 % (23 MB)
64 14:46:38.624865 progress 50 % (26 MB)
65 14:46:38.640457 progress 55 % (28 MB)
66 14:46:38.656003 progress 60 % (31 MB)
67 14:46:38.671398 progress 65 % (33 MB)
68 14:46:38.687156 progress 70 % (36 MB)
69 14:46:38.702978 progress 75 % (39 MB)
70 14:46:38.718852 progress 80 % (41 MB)
71 14:46:38.734830 progress 85 % (44 MB)
72 14:46:38.750709 progress 90 % (46 MB)
73 14:46:38.766094 progress 95 % (49 MB)
74 14:46:38.781439 progress 100 % (52 MB)
75 14:46:38.781710 52 MB downloaded in 0.31 s (166.48 MB/s)
76 14:46:38.781877 end: 1.2.1 http-download (duration 00:00:00) [common]
78 14:46:38.782137 end: 1.2 download-retry (duration 00:00:00) [common]
79 14:46:38.782235 start: 1.3 download-retry (timeout 00:10:00) [common]
80 14:46:38.782331 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 14:46:38.782478 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 14:46:38.782564 saving as /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 14:46:38.782633 total size: 57695 (0 MB)
84 14:46:38.782718 No compression specified
85 14:46:38.783921 progress 56 % (0 MB)
86 14:46:38.784253 progress 100 % (0 MB)
87 14:46:38.784480 0 MB downloaded in 0.00 s (29.84 MB/s)
88 14:46:38.784619 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:46:38.784875 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:46:38.784970 start: 1.4 download-retry (timeout 00:10:00) [common]
92 14:46:38.785064 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 14:46:38.785187 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 14:46:38.785264 saving as /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/nfsrootfs/full.rootfs.tar
95 14:46:38.785333 total size: 120894716 (115 MB)
96 14:46:38.785403 Using unxz to decompress xz
97 14:46:38.789755 progress 0 % (0 MB)
98 14:46:39.177910 progress 5 % (5 MB)
99 14:46:39.590598 progress 10 % (11 MB)
100 14:46:40.001215 progress 15 % (17 MB)
101 14:46:40.372032 progress 20 % (23 MB)
102 14:46:40.695481 progress 25 % (28 MB)
103 14:46:41.098782 progress 30 % (34 MB)
104 14:46:41.480661 progress 35 % (40 MB)
105 14:46:41.667949 progress 40 % (46 MB)
106 14:46:41.877504 progress 45 % (51 MB)
107 14:46:42.235251 progress 50 % (57 MB)
108 14:46:42.656621 progress 55 % (63 MB)
109 14:46:43.039057 progress 60 % (69 MB)
110 14:46:43.419471 progress 65 % (74 MB)
111 14:46:43.807153 progress 70 % (80 MB)
112 14:46:44.213159 progress 75 % (86 MB)
113 14:46:44.603586 progress 80 % (92 MB)
114 14:46:44.993872 progress 85 % (98 MB)
115 14:46:45.402059 progress 90 % (103 MB)
116 14:46:45.777388 progress 95 % (109 MB)
117 14:46:46.181098 progress 100 % (115 MB)
118 14:46:46.187115 115 MB downloaded in 7.40 s (15.58 MB/s)
119 14:46:46.187441 end: 1.4.1 http-download (duration 00:00:07) [common]
121 14:46:46.187777 end: 1.4 download-retry (duration 00:00:07) [common]
122 14:46:46.187898 start: 1.5 download-retry (timeout 00:09:52) [common]
123 14:46:46.188016 start: 1.5.1 http-download (timeout 00:09:52) [common]
124 14:46:46.188204 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 14:46:46.188320 saving as /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/modules/modules.tar
126 14:46:46.188438 total size: 8608920 (8 MB)
127 14:46:46.188560 Using unxz to decompress xz
128 14:46:46.193030 progress 0 % (0 MB)
129 14:46:46.214362 progress 5 % (0 MB)
130 14:46:46.244687 progress 10 % (0 MB)
131 14:46:46.279495 progress 15 % (1 MB)
132 14:46:46.306008 progress 20 % (1 MB)
133 14:46:46.332484 progress 25 % (2 MB)
134 14:46:46.359009 progress 30 % (2 MB)
135 14:46:46.386282 progress 35 % (2 MB)
136 14:46:46.416392 progress 40 % (3 MB)
137 14:46:46.441884 progress 45 % (3 MB)
138 14:46:46.468845 progress 50 % (4 MB)
139 14:46:46.497144 progress 55 % (4 MB)
140 14:46:46.524715 progress 60 % (4 MB)
141 14:46:46.552047 progress 65 % (5 MB)
142 14:46:46.580122 progress 70 % (5 MB)
143 14:46:46.609242 progress 75 % (6 MB)
144 14:46:46.638483 progress 80 % (6 MB)
145 14:46:46.666194 progress 85 % (7 MB)
146 14:46:46.694952 progress 90 % (7 MB)
147 14:46:46.723602 progress 95 % (7 MB)
148 14:46:46.751966 progress 100 % (8 MB)
149 14:46:46.758184 8 MB downloaded in 0.57 s (14.41 MB/s)
150 14:46:46.758529 end: 1.5.1 http-download (duration 00:00:01) [common]
152 14:46:46.758867 end: 1.5 download-retry (duration 00:00:01) [common]
153 14:46:46.758991 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 14:46:46.759114 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 14:46:50.850856 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt
156 14:46:50.851100 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 14:46:50.851222 start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
158 14:46:50.851428 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod
159 14:46:50.851579 makedir: /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin
160 14:46:50.851696 makedir: /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/tests
161 14:46:50.851810 makedir: /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/results
162 14:46:50.851924 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-add-keys
163 14:46:50.852088 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-add-sources
164 14:46:50.852257 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-background-process-start
165 14:46:50.852411 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-background-process-stop
166 14:46:50.852556 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-common-functions
167 14:46:50.852717 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-echo-ipv4
168 14:46:50.852875 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-install-packages
169 14:46:50.853021 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-installed-packages
170 14:46:50.853163 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-os-build
171 14:46:50.853307 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-probe-channel
172 14:46:50.853464 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-probe-ip
173 14:46:50.853613 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-target-ip
174 14:46:50.853754 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-target-mac
175 14:46:50.853895 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-target-storage
176 14:46:50.854039 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-case
177 14:46:50.854181 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-event
178 14:46:50.854321 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-feedback
179 14:46:50.854461 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-raise
180 14:46:50.854600 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-reference
181 14:46:50.854747 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-runner
182 14:46:50.854888 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-set
183 14:46:50.855032 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-test-shell
184 14:46:50.855191 Updating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-add-keys (debian)
185 14:46:50.855407 Updating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-add-sources (debian)
186 14:46:50.855568 Updating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-install-packages (debian)
187 14:46:50.855725 Updating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-installed-packages (debian)
188 14:46:50.855880 Updating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/bin/lava-os-build (debian)
189 14:46:50.856015 Creating /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/environment
190 14:46:50.856128 LAVA metadata
191 14:46:50.856205 - LAVA_JOB_ID=14167041
192 14:46:50.856276 - LAVA_DISPATCHER_IP=192.168.201.1
193 14:46:50.856407 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
194 14:46:50.856483 skipped lava-vland-overlay
195 14:46:50.856568 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 14:46:50.856658 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
197 14:46:50.856743 skipped lava-multinode-overlay
198 14:46:50.856825 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 14:46:50.856914 start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
200 14:46:50.857000 Loading test definitions
201 14:46:50.857102 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
202 14:46:50.857181 Using /lava-14167041 at stage 0
203 14:46:50.857518 uuid=14167041_1.6.2.3.1 testdef=None
204 14:46:50.857620 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 14:46:50.857716 start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
206 14:46:50.858236 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 14:46:50.858484 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
209 14:46:50.859120 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 14:46:50.859383 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
212 14:46:50.859986 runner path: /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/0/tests/0_timesync-off test_uuid 14167041_1.6.2.3.1
213 14:46:50.860167 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 14:46:50.860452 start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
216 14:46:50.860555 Using /lava-14167041 at stage 0
217 14:46:50.860667 Fetching tests from https://github.com/kernelci/test-definitions.git
218 14:46:50.860767 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/0/tests/1_kselftest-dt'
219 14:46:54.252732 Running '/usr/bin/git checkout kernelci.org
220 14:46:54.415449 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
221 14:46:54.416291 uuid=14167041_1.6.2.3.5 testdef=None
222 14:46:54.416499 end: 1.6.2.3.5 git-repo-action (duration 00:00:04) [common]
224 14:46:54.416815 start: 1.6.2.3.6 test-overlay (timeout 00:09:44) [common]
225 14:46:54.417918 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 14:46:54.418217 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:44) [common]
228 14:46:54.419643 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 14:46:54.420188 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
231 14:46:54.421235 runner path: /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/0/tests/1_kselftest-dt test_uuid 14167041_1.6.2.3.5
232 14:46:54.421350 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 14:46:54.421465 BRANCH='cip'
234 14:46:54.421569 SKIPFILE='/dev/null'
235 14:46:54.421668 SKIP_INSTALL='True'
236 14:46:54.421740 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 14:46:54.421812 TST_CASENAME=''
238 14:46:54.421881 TST_CMDFILES='dt'
239 14:46:54.422042 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 14:46:54.422495 Creating lava-test-runner.conf files
242 14:46:54.422587 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14167041/lava-overlay-8ptofbod/lava-14167041/0 for stage 0
243 14:46:54.422715 - 0_timesync-off
244 14:46:54.422811 - 1_kselftest-dt
245 14:46:54.422947 end: 1.6.2.3 test-definition (duration 00:00:04) [common]
246 14:46:54.423052 start: 1.6.2.4 compress-overlay (timeout 00:09:44) [common]
247 14:47:02.911014 end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
248 14:47:02.911184 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
249 14:47:02.911290 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 14:47:02.911397 end: 1.6.2 lava-overlay (duration 00:00:12) [common]
251 14:47:02.911502 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
252 14:47:03.094138 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 14:47:03.094567 start: 1.6.4 extract-modules (timeout 00:09:35) [common]
254 14:47:03.094697 extracting modules file /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt
255 14:47:03.334171 extracting modules file /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14167041/extract-overlay-ramdisk-n_7h6e51/ramdisk
256 14:47:03.585696 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 14:47:03.585888 start: 1.6.5 apply-overlay-tftp (timeout 00:09:35) [common]
258 14:47:03.585998 [common] Applying overlay to NFS
259 14:47:03.586081 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14167041/compress-overlay-bmfv8sh2/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt
260 14:47:04.603778 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 14:47:04.603967 start: 1.6.6 configure-preseed-file (timeout 00:09:34) [common]
262 14:47:04.604073 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 14:47:04.604175 start: 1.6.7 compress-ramdisk (timeout 00:09:34) [common]
264 14:47:04.604275 Building ramdisk /var/lib/lava/dispatcher/tmp/14167041/extract-overlay-ramdisk-n_7h6e51/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14167041/extract-overlay-ramdisk-n_7h6e51/ramdisk
265 14:47:04.940253 >> 130335 blocks
266 14:47:07.267913 rename /var/lib/lava/dispatcher/tmp/14167041/extract-overlay-ramdisk-n_7h6e51/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/ramdisk/ramdisk.cpio.gz
267 14:47:07.268415 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 14:47:07.268556 start: 1.6.8 prepare-kernel (timeout 00:09:31) [common]
269 14:47:07.268679 start: 1.6.8.1 prepare-fit (timeout 00:09:31) [common]
270 14:47:07.268817 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/kernel/Image']
271 14:47:21.966131 Returned 0 in 14 seconds
272 14:47:22.066977 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/kernel/image.itb
273 14:47:22.470341 output: FIT description: Kernel Image image with one or more FDT blobs
274 14:47:22.470752 output: Created: Tue Jun 4 15:47:22 2024
275 14:47:22.470841 output: Image 0 (kernel-1)
276 14:47:22.470915 output: Description:
277 14:47:22.470992 output: Created: Tue Jun 4 15:47:22 2024
278 14:47:22.471069 output: Type: Kernel Image
279 14:47:22.471137 output: Compression: lzma compressed
280 14:47:22.471203 output: Data Size: 13060619 Bytes = 12754.51 KiB = 12.46 MiB
281 14:47:22.471269 output: Architecture: AArch64
282 14:47:22.471336 output: OS: Linux
283 14:47:22.471400 output: Load Address: 0x00000000
284 14:47:22.471466 output: Entry Point: 0x00000000
285 14:47:22.471528 output: Hash algo: crc32
286 14:47:22.471592 output: Hash value: 88dcd836
287 14:47:22.471655 output: Image 1 (fdt-1)
288 14:47:22.471718 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 14:47:22.471781 output: Created: Tue Jun 4 15:47:22 2024
290 14:47:22.471844 output: Type: Flat Device Tree
291 14:47:22.471907 output: Compression: uncompressed
292 14:47:22.471968 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 14:47:22.472028 output: Architecture: AArch64
294 14:47:22.472088 output: Hash algo: crc32
295 14:47:22.472147 output: Hash value: a9713552
296 14:47:22.472207 output: Image 2 (ramdisk-1)
297 14:47:22.472267 output: Description: unavailable
298 14:47:22.472326 output: Created: Tue Jun 4 15:47:22 2024
299 14:47:22.472387 output: Type: RAMDisk Image
300 14:47:22.472447 output: Compression: Unknown Compression
301 14:47:22.472507 output: Data Size: 18725926 Bytes = 18287.04 KiB = 17.86 MiB
302 14:47:22.472567 output: Architecture: AArch64
303 14:47:22.472626 output: OS: Linux
304 14:47:22.472686 output: Load Address: unavailable
305 14:47:22.472746 output: Entry Point: unavailable
306 14:47:22.472805 output: Hash algo: crc32
307 14:47:22.472864 output: Hash value: ab30ed37
308 14:47:22.472923 output: Default Configuration: 'conf-1'
309 14:47:22.472982 output: Configuration 0 (conf-1)
310 14:47:22.473042 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 14:47:22.473101 output: Kernel: kernel-1
312 14:47:22.473161 output: Init Ramdisk: ramdisk-1
313 14:47:22.473220 output: FDT: fdt-1
314 14:47:22.473280 output: Loadables: kernel-1
315 14:47:22.473339 output:
316 14:47:22.473570 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 14:47:22.473684 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 14:47:22.473808 end: 1.6 prepare-tftp-overlay (duration 00:00:36) [common]
319 14:47:22.473916 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:16) [common]
320 14:47:22.474006 No LXC device requested
321 14:47:22.474095 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 14:47:22.474192 start: 1.8 deploy-device-env (timeout 00:09:16) [common]
323 14:47:22.474299 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 14:47:22.474392 Checking files for TFTP limit of 4294967296 bytes.
325 14:47:22.474966 end: 1 tftp-deploy (duration 00:00:44) [common]
326 14:47:22.475090 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 14:47:22.475196 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 14:47:22.475337 substitutions:
329 14:47:22.475415 - {DTB}: 14167041/tftp-deploy-kb2e5ubw/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 14:47:22.475490 - {INITRD}: 14167041/tftp-deploy-kb2e5ubw/ramdisk/ramdisk.cpio.gz
331 14:47:22.475561 - {KERNEL}: 14167041/tftp-deploy-kb2e5ubw/kernel/Image
332 14:47:22.475627 - {LAVA_MAC}: None
333 14:47:22.475692 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt
334 14:47:22.475757 - {NFS_SERVER_IP}: 192.168.201.1
335 14:47:22.475822 - {PRESEED_CONFIG}: None
336 14:47:22.475888 - {PRESEED_LOCAL}: None
337 14:47:22.475951 - {RAMDISK}: 14167041/tftp-deploy-kb2e5ubw/ramdisk/ramdisk.cpio.gz
338 14:47:22.476014 - {ROOT_PART}: None
339 14:47:22.476076 - {ROOT}: None
340 14:47:22.476138 - {SERVER_IP}: 192.168.201.1
341 14:47:22.476199 - {TEE}: None
342 14:47:22.476261 Parsed boot commands:
343 14:47:22.476321 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 14:47:22.476521 Parsed boot commands: tftpboot 192.168.201.1 14167041/tftp-deploy-kb2e5ubw/kernel/image.itb 14167041/tftp-deploy-kb2e5ubw/kernel/cmdline
345 14:47:22.476625 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 14:47:22.476721 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 14:47:22.476827 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 14:47:22.476922 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 14:47:22.477005 Not connected, no need to disconnect.
350 14:47:22.477088 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 14:47:22.477181 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 14:47:22.477256 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
353 14:47:22.481336 Setting prompt string to ['lava-test: # ']
354 14:47:22.481760 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 14:47:22.481886 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 14:47:22.481997 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 14:47:22.482106 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 14:47:22.482307 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
359 14:47:44.414453 Returned 0 in 21 seconds
360 14:47:44.515506 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
362 14:47:44.516792 end: 2.2.2 reset-device (duration 00:00:22) [common]
363 14:47:44.517235 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
364 14:47:44.517683 Setting prompt string to 'Starting depthcharge on Juniper...'
365 14:47:44.518018 Changing prompt to 'Starting depthcharge on Juniper...'
366 14:47:44.518367 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 14:47:44.520741 [Enter `^Ec?' for help]
368 14:47:44.521416 [DL] 00000000 00000000 010701
369 14:47:44.521923
370 14:47:44.522368
371 14:47:44.522726 F0: 102B 0000
372 14:47:44.523038
373 14:47:44.523328 F3: 1006 0033 [0200]
374 14:47:44.523603
375 14:47:44.523884 F3: 4001 00E0 [0200]
376 14:47:44.524142
377 14:47:44.524394 F3: 0000 0000
378 14:47:44.524647
379 14:47:44.524898 V0: 0000 0000 [0001]
380 14:47:44.525215
381 14:47:44.525497 00: 1027 0002
382 14:47:44.525773
383 14:47:44.526028 01: 0000 0000
384 14:47:44.526286
385 14:47:44.526537 BP: 0C00 0251 [0000]
386 14:47:44.526788
387 14:47:44.527038 G0: 1182 0000
388 14:47:44.527290
389 14:47:44.527539 EC: 0004 0000 [0001]
390 14:47:44.527789
391 14:47:44.528036 S7: 0000 0000 [0000]
392 14:47:44.528324
393 14:47:44.528585 CC: 0000 0000 [0001]
394 14:47:44.528836
395 14:47:44.529099 T0: 0000 00DB [000F]
396 14:47:44.529352
397 14:47:44.529640 Jump to BL
398 14:47:44.529896
399 14:47:44.530180
400 14:47:44.530437
401 14:47:44.530687 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 14:47:44.530953 ARM64: Exception handlers installed.
403 14:47:44.531210 ARM64: Testing exception
404 14:47:44.531497 ARM64: Done test exception
405 14:47:44.531759 WDT: Last reset was cold boot
406 14:47:44.532012 SPI0(PAD0) initialized at 992727 Hz
407 14:47:44.532290 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 14:47:44.532550 Manufacturer: ef
409 14:47:44.532799 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 14:47:44.533052 Probing TPM: . done!
411 14:47:44.533303 TPM ready after 0 ms
412 14:47:44.533671 Connected to device vid:did:rid of 1ae0:0028:00
413 14:47:44.533941 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
414 14:47:44.534231 Initialized TPM device CR50 revision 0
415 14:47:44.534533 tlcl_send_startup: Startup return code is 0
416 14:47:44.534842 TPM: setup succeeded
417 14:47:44.535102 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 14:47:44.535356 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 14:47:44.535607 in-header: 03 19 00 00 08 00 00 00
420 14:47:44.535861 in-data: a2 e0 47 00 13 00 00 00
421 14:47:44.536122 Chrome EC: UHEPI supported
422 14:47:44.536380 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 14:47:44.536634 in-header: 03 a1 00 00 08 00 00 00
424 14:47:44.536883 in-data: 84 60 60 10 00 00 00 00
425 14:47:44.537134 Phase 1
426 14:47:44.537384 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 14:47:44.537682 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 14:47:44.538002 VB2:vb2_check_recovery() Recovery was requested manually
429 14:47:44.538280 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 14:47:44.538538 Recovery requested (1009000e)
431 14:47:44.538788 tlcl_extend: response is 0
432 14:47:44.539053 tlcl_extend: response is 0
433 14:47:44.539305
434 14:47:44.539553
435 14:47:44.539805 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 14:47:44.540059 ARM64: Exception handlers installed.
437 14:47:44.540344 ARM64: Testing exception
438 14:47:44.540601 ARM64: Done test exception
439 14:47:44.540853 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2000
440 14:47:44.541107 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 14:47:44.541417 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 14:47:44.541710 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
443 14:47:44.541967 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
444 14:47:44.542343 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
445 14:47:44.542726 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
446 14:47:44.542992 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
447 14:47:44.543248 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
448 14:47:44.543499 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
449 14:47:44.543752 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
450 14:47:44.544002 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
451 14:47:44.544387 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
452 14:47:44.544732 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
453 14:47:44.545161 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
454 14:47:44.545620 in-header: 03 19 00 00 08 00 00 00
455 14:47:44.546036 in-data: a2 e0 47 00 13 00 00 00
456 14:47:44.546436 Chrome EC: UHEPI supported
457 14:47:44.546883 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
458 14:47:44.547294 in-header: 03 a1 00 00 08 00 00 00
459 14:47:44.547699 in-data: 84 60 60 10 00 00 00 00
460 14:47:44.548015 Skip loading cached calibration data
461 14:47:44.548246 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
462 14:47:44.548436 in-header: 03 a1 00 00 08 00 00 00
463 14:47:44.548622 in-data: 84 60 60 10 00 00 00 00
464 14:47:44.548805 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
465 14:47:44.548988 in-header: 03 a1 00 00 08 00 00 00
466 14:47:44.549168 in-data: 84 60 60 10 00 00 00 00
467 14:47:44.549348 ADC[3]: Raw value=216472 ID=1
468 14:47:44.549559 Manufacturer: ef
469 14:47:44.549742 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
470 14:47:44.549925 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
471 14:47:44.550107 CBFS @ 21000 size 3d4000
472 14:47:44.550283 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
473 14:47:44.550464 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
474 14:47:44.550643 CBFS: Found @ offset 3c700 size 44
475 14:47:44.550857 DRAM-K: Full Calibration
476 14:47:44.551078 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
477 14:47:44.551263 CBFS @ 21000 size 3d4000
478 14:47:44.551443 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
479 14:47:44.551624 CBFS: Locating 'fallback/dram'
480 14:47:44.551803 CBFS: Found @ offset 24b00 size 12268
481 14:47:44.551981 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
482 14:47:44.552159 ddr_geometry: 1, config: 0x0
483 14:47:44.552336 header.status = 0x0
484 14:47:44.552554 header.magic = 0x44524d4b (expected: 0x44524d4b)
485 14:47:44.552749 header.version = 0x5 (expected: 0x5)
486 14:47:44.553209 header.size = 0x8f0 (expected: 0x8f0)
487 14:47:44.553363 header.config = 0x0
488 14:47:44.553540 header.flags = 0x0
489 14:47:44.553683 header.checksum = 0x0
490 14:47:44.553821 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
491 14:47:44.553961 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
492 14:47:44.554099 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
493 14:47:44.554239 ddr_geometry:1
494 14:47:44.554377 [EMI] new MDL number = 1
495 14:47:44.554662 dram_cbt_mode_extern: 0
496 14:47:44.554953 dram_cbt_mode [RK0]: 0, [RK1]: 0
497 14:47:44.555202 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
498 14:47:44.555422
499 14:47:44.555635
500 14:47:44.555850 [Bianco] ETT version 0.0.0.1
501 14:47:44.556066 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
502 14:47:44.556280
503 14:47:44.556496 vSetVcoreByFreq with vcore:762500, freq=1600
504 14:47:44.556719
505 14:47:44.556934 [DramcInit]
506 14:47:44.557148 AutoRefreshCKEOff AutoREF OFF
507 14:47:44.557362 DDRPhyPLLSetting-CKEOFF
508 14:47:44.557582 DDRPhyPLLSetting-CKEON
509 14:47:44.557726
510 14:47:44.557862 Enable WDQS
511 14:47:44.558001 [ModeRegInit_LP4] CH0 RK0
512 14:47:44.558148 Write Rank0 MR13 =0x18
513 14:47:44.558260 Write Rank0 MR12 =0x5d
514 14:47:44.558371 Write Rank0 MR1 =0x56
515 14:47:44.558481 Write Rank0 MR2 =0x1a
516 14:47:44.558592 Write Rank0 MR11 =0x0
517 14:47:44.558702 Write Rank0 MR22 =0x38
518 14:47:44.558828 Write Rank0 MR14 =0x5d
519 14:47:44.558941 Write Rank0 MR3 =0x30
520 14:47:44.559052 Write Rank0 MR13 =0x58
521 14:47:44.559165 Write Rank0 MR12 =0x5d
522 14:47:44.559275 Write Rank0 MR1 =0x56
523 14:47:44.559387 Write Rank0 MR2 =0x2d
524 14:47:44.559497 Write Rank0 MR11 =0x23
525 14:47:44.559610 Write Rank0 MR22 =0x34
526 14:47:44.559721 Write Rank0 MR14 =0x10
527 14:47:44.559832 Write Rank0 MR3 =0x30
528 14:47:44.559943 Write Rank0 MR13 =0xd8
529 14:47:44.560054 [ModeRegInit_LP4] CH0 RK1
530 14:47:44.560164 Write Rank1 MR13 =0x18
531 14:47:44.560275 Write Rank1 MR12 =0x5d
532 14:47:44.560387 Write Rank1 MR1 =0x56
533 14:47:44.560498 Write Rank1 MR2 =0x1a
534 14:47:44.560608 Write Rank1 MR11 =0x0
535 14:47:44.560719 Write Rank1 MR22 =0x38
536 14:47:44.560829 Write Rank1 MR14 =0x5d
537 14:47:44.560939 Write Rank1 MR3 =0x30
538 14:47:44.561068 Write Rank1 MR13 =0x58
539 14:47:44.561183 Write Rank1 MR12 =0x5d
540 14:47:44.561294 Write Rank1 MR1 =0x56
541 14:47:44.561405 Write Rank1 MR2 =0x2d
542 14:47:44.561535 Write Rank1 MR11 =0x23
543 14:47:44.561648 Write Rank1 MR22 =0x34
544 14:47:44.561759 Write Rank1 MR14 =0x10
545 14:47:44.561870 Write Rank1 MR3 =0x30
546 14:47:44.561980 Write Rank1 MR13 =0xd8
547 14:47:44.562091 [ModeRegInit_LP4] CH1 RK0
548 14:47:44.562202 Write Rank0 MR13 =0x18
549 14:47:44.562313 Write Rank0 MR12 =0x5d
550 14:47:44.562423 Write Rank0 MR1 =0x56
551 14:47:44.562532 Write Rank0 MR2 =0x1a
552 14:47:44.562642 Write Rank0 MR11 =0x0
553 14:47:44.562767 Write Rank0 MR22 =0x38
554 14:47:44.562881 Write Rank0 MR14 =0x5d
555 14:47:44.562992 Write Rank0 MR3 =0x30
556 14:47:44.563103 Write Rank0 MR13 =0x58
557 14:47:44.563211 Write Rank0 MR12 =0x5d
558 14:47:44.563304 Write Rank0 MR1 =0x56
559 14:47:44.563397 Write Rank0 MR2 =0x2d
560 14:47:44.563489 Write Rank0 MR11 =0x23
561 14:47:44.563582 Write Rank0 MR22 =0x34
562 14:47:44.563674 Write Rank0 MR14 =0x10
563 14:47:44.563769 Write Rank0 MR3 =0x30
564 14:47:44.563861 Write Rank0 MR13 =0xd8
565 14:47:44.563973 [ModeRegInit_LP4] CH1 RK1
566 14:47:44.564070 Write Rank1 MR13 =0x18
567 14:47:44.564164 Write Rank1 MR12 =0x5d
568 14:47:44.564257 Write Rank1 MR1 =0x56
569 14:47:44.564351 Write Rank1 MR2 =0x1a
570 14:47:44.564443 Write Rank1 MR11 =0x0
571 14:47:44.564536 Write Rank1 MR22 =0x38
572 14:47:44.564630 Write Rank1 MR14 =0x5d
573 14:47:44.564729 Write Rank1 MR3 =0x30
574 14:47:44.564844 Write Rank1 MR13 =0x58
575 14:47:44.565013 Write Rank1 MR12 =0x5d
576 14:47:44.565157 Write Rank1 MR1 =0x56
577 14:47:44.565324 Write Rank1 MR2 =0x2d
578 14:47:44.565493 Write Rank1 MR11 =0x23
579 14:47:44.565621 Write Rank1 MR22 =0x34
580 14:47:44.565784 Write Rank1 MR14 =0x10
581 14:47:44.565934 Write Rank1 MR3 =0x30
582 14:47:44.566080 Write Rank1 MR13 =0xd8
583 14:47:44.566235 match AC timing 3
584 14:47:44.566389 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
585 14:47:44.566540 [MiockJmeterHQA]
586 14:47:44.566689 vSetVcoreByFreq with vcore:762500, freq=1600
587 14:47:44.566836
588 14:47:44.566984 MIOCK jitter meter ch=0
589 14:47:44.567131
590 14:47:44.567278 1T = (102-18) = 84 dly cells
591 14:47:44.567445 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
592 14:47:44.567595 vSetVcoreByFreq with vcore:725000, freq=1200
593 14:47:44.567742
594 14:47:44.567889 MIOCK jitter meter ch=0
595 14:47:44.568035
596 14:47:44.568183 1T = (97-17) = 80 dly cells
597 14:47:44.568315 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
598 14:47:44.568443 vSetVcoreByFreq with vcore:725000, freq=800
599 14:47:44.568569
600 14:47:44.568696 MIOCK jitter meter ch=0
601 14:47:44.568822
602 14:47:44.568949 1T = (97-17) = 80 dly cells
603 14:47:44.569080 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
604 14:47:44.569209 vSetVcoreByFreq with vcore:762500, freq=1600
605 14:47:44.569337 vSetVcoreByFreq with vcore:762500, freq=1600
606 14:47:44.569470
607 14:47:44.569556 K DRVP
608 14:47:44.569638 1. OCD DRVP=0 CALOUT=0
609 14:47:44.569722 1. OCD DRVP=1 CALOUT=0
610 14:47:44.569806 1. OCD DRVP=2 CALOUT=0
611 14:47:44.569889 1. OCD DRVP=3 CALOUT=0
612 14:47:44.569972 1. OCD DRVP=4 CALOUT=0
613 14:47:44.570055 1. OCD DRVP=5 CALOUT=0
614 14:47:44.570138 1. OCD DRVP=6 CALOUT=0
615 14:47:44.570221 1. OCD DRVP=7 CALOUT=0
616 14:47:44.570303 1. OCD DRVP=8 CALOUT=1
617 14:47:44.570386
618 14:47:44.570466 1. OCD DRVP calibration OK! DRVP=8
619 14:47:44.570548
620 14:47:44.570628
621 14:47:44.570709
622 14:47:44.570789 K ODTN
623 14:47:44.570871 3. OCD ODTN=0 ,CALOUT=1
624 14:47:44.570972 3. OCD ODTN=1 ,CALOUT=1
625 14:47:44.571056 3. OCD ODTN=2 ,CALOUT=1
626 14:47:44.571139 3. OCD ODTN=3 ,CALOUT=1
627 14:47:44.571222 3. OCD ODTN=4 ,CALOUT=1
628 14:47:44.571305 3. OCD ODTN=5 ,CALOUT=1
629 14:47:44.571388 3. OCD ODTN=6 ,CALOUT=1
630 14:47:44.571470 3. OCD ODTN=7 ,CALOUT=0
631 14:47:44.571552
632 14:47:44.571632 3. OCD ODTN calibration OK! ODTN=7
633 14:47:44.571715
634 14:47:44.571795 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
635 14:47:44.571876 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
636 14:47:44.571958 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
637 14:47:44.572041
638 14:47:44.572121 K DRVP
639 14:47:44.572201 1. OCD DRVP=0 CALOUT=0
640 14:47:44.572283 1. OCD DRVP=1 CALOUT=0
641 14:47:44.572365 1. OCD DRVP=2 CALOUT=0
642 14:47:44.572448 1. OCD DRVP=3 CALOUT=0
643 14:47:44.572531 1. OCD DRVP=4 CALOUT=0
644 14:47:44.572623 1. OCD DRVP=5 CALOUT=0
645 14:47:44.572718 1. OCD DRVP=6 CALOUT=0
646 14:47:44.572801 1. OCD DRVP=7 CALOUT=0
647 14:47:44.572885 1. OCD DRVP=8 CALOUT=0
648 14:47:44.572967 1. OCD DRVP=9 CALOUT=0
649 14:47:44.573050 1. OCD DRVP=10 CALOUT=1
650 14:47:44.573143
651 14:47:44.573417 1. OCD DRVP calibration OK! DRVP=10
652 14:47:44.573515
653 14:47:44.573589
654 14:47:44.573660
655 14:47:44.573732 K ODTN
656 14:47:44.573803 3. OCD ODTN=0 ,CALOUT=1
657 14:47:44.573877 3. OCD ODTN=1 ,CALOUT=1
658 14:47:44.573950 3. OCD ODTN=2 ,CALOUT=1
659 14:47:44.574028 3. OCD ODTN=3 ,CALOUT=1
660 14:47:44.574110 3. OCD ODTN=4 ,CALOUT=1
661 14:47:44.574184 3. OCD ODTN=5 ,CALOUT=1
662 14:47:44.574256 3. OCD ODTN=6 ,CALOUT=1
663 14:47:44.574329 3. OCD ODTN=7 ,CALOUT=1
664 14:47:44.574402 3. OCD ODTN=8 ,CALOUT=1
665 14:47:44.574475 3. OCD ODTN=9 ,CALOUT=1
666 14:47:44.574547 3. OCD ODTN=10 ,CALOUT=1
667 14:47:44.574635 3. OCD ODTN=11 ,CALOUT=1
668 14:47:44.574711 3. OCD ODTN=12 ,CALOUT=1
669 14:47:44.574785 3. OCD ODTN=13 ,CALOUT=1
670 14:47:44.574857 3. OCD ODTN=14 ,CALOUT=1
671 14:47:44.574931 3. OCD ODTN=15 ,CALOUT=0
672 14:47:44.575003
673 14:47:44.575074 3. OCD ODTN calibration OK! ODTN=15
674 14:47:44.575147
675 14:47:44.575219 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
676 14:47:44.575290 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
677 14:47:44.575362 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
678 14:47:44.575434
679 14:47:44.575506 [DramcInit]
680 14:47:44.575577 AutoRefreshCKEOff AutoREF OFF
681 14:47:44.575648 DDRPhyPLLSetting-CKEOFF
682 14:47:44.575719 DDRPhyPLLSetting-CKEON
683 14:47:44.575790
684 14:47:44.575861 Enable WDQS
685 14:47:44.575932 ==
686 14:47:44.576004 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 14:47:44.576076 fsp= 1, odt_onoff= 1, Byte mode= 0
688 14:47:44.576148 ==
689 14:47:44.576219 [Duty_Offset_Calibration]
690 14:47:44.576290
691 14:47:44.576360 ===========================
692 14:47:44.576432 B0:1 B1:-1 CA:0
693 14:47:44.576503 ==
694 14:47:44.576574 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 14:47:44.576682 fsp= 1, odt_onoff= 1, Byte mode= 0
696 14:47:44.576760 ==
697 14:47:44.576832 [Duty_Offset_Calibration]
698 14:47:44.576904
699 14:47:44.576976 ===========================
700 14:47:44.577047 B0:0 B1:0 CA:0
701 14:47:44.577118 [ModeRegInit_LP4] CH0 RK0
702 14:47:44.577190 Write Rank0 MR13 =0x18
703 14:47:44.577275 Write Rank0 MR12 =0x5d
704 14:47:44.577348 Write Rank0 MR1 =0x56
705 14:47:44.577419 Write Rank0 MR2 =0x1a
706 14:47:44.577502 Write Rank0 MR11 =0x0
707 14:47:44.577575 Write Rank0 MR22 =0x38
708 14:47:44.577646 Write Rank0 MR14 =0x5d
709 14:47:44.577717 Write Rank0 MR3 =0x30
710 14:47:44.577788 Write Rank0 MR13 =0x58
711 14:47:44.577859 Write Rank0 MR12 =0x5d
712 14:47:44.577930 Write Rank0 MR1 =0x56
713 14:47:44.578000 Write Rank0 MR2 =0x2d
714 14:47:44.578072 Write Rank0 MR11 =0x23
715 14:47:44.578149 Write Rank0 MR22 =0x34
716 14:47:44.578212 Write Rank0 MR14 =0x10
717 14:47:44.578276 Write Rank0 MR3 =0x30
718 14:47:44.578339 Write Rank0 MR13 =0xd8
719 14:47:44.578402 [ModeRegInit_LP4] CH0 RK1
720 14:47:44.578465 Write Rank1 MR13 =0x18
721 14:47:44.578528 Write Rank1 MR12 =0x5d
722 14:47:44.578597 Write Rank1 MR1 =0x56
723 14:47:44.578693 Write Rank1 MR2 =0x1a
724 14:47:44.578792 Write Rank1 MR11 =0x0
725 14:47:44.578860 Write Rank1 MR22 =0x38
726 14:47:44.578924 Write Rank1 MR14 =0x5d
727 14:47:44.578988 Write Rank1 MR3 =0x30
728 14:47:44.579052 Write Rank1 MR13 =0x58
729 14:47:44.579115 Write Rank1 MR12 =0x5d
730 14:47:44.579178 Write Rank1 MR1 =0x56
731 14:47:44.579241 Write Rank1 MR2 =0x2d
732 14:47:44.579304 Write Rank1 MR11 =0x23
733 14:47:44.579368 Write Rank1 MR22 =0x34
734 14:47:44.579432 Write Rank1 MR14 =0x10
735 14:47:44.579495 Write Rank1 MR3 =0x30
736 14:47:44.579559 Write Rank1 MR13 =0xd8
737 14:47:44.579622 [ModeRegInit_LP4] CH1 RK0
738 14:47:44.579686 Write Rank0 MR13 =0x18
739 14:47:44.579748 Write Rank0 MR12 =0x5d
740 14:47:44.579811 Write Rank0 MR1 =0x56
741 14:47:44.579875 Write Rank0 MR2 =0x1a
742 14:47:44.579938 Write Rank0 MR11 =0x0
743 14:47:44.580001 Write Rank0 MR22 =0x38
744 14:47:44.580065 Write Rank0 MR14 =0x5d
745 14:47:44.580128 Write Rank0 MR3 =0x30
746 14:47:44.580193 Write Rank0 MR13 =0x58
747 14:47:44.580255 Write Rank0 MR12 =0x5d
748 14:47:44.580319 Write Rank0 MR1 =0x56
749 14:47:44.580382 Write Rank0 MR2 =0x2d
750 14:47:44.580453 Write Rank0 MR11 =0x23
751 14:47:44.580518 Write Rank0 MR22 =0x34
752 14:47:44.580581 Write Rank0 MR14 =0x10
753 14:47:44.580645 Write Rank0 MR3 =0x30
754 14:47:44.580708 Write Rank0 MR13 =0xd8
755 14:47:44.580771 [ModeRegInit_LP4] CH1 RK1
756 14:47:44.580834 Write Rank1 MR13 =0x18
757 14:47:44.580897 Write Rank1 MR12 =0x5d
758 14:47:44.580959 Write Rank1 MR1 =0x56
759 14:47:44.581022 Write Rank1 MR2 =0x1a
760 14:47:44.581086 Write Rank1 MR11 =0x0
761 14:47:44.581149 Write Rank1 MR22 =0x38
762 14:47:44.581212 Write Rank1 MR14 =0x5d
763 14:47:44.581275 Write Rank1 MR3 =0x30
764 14:47:44.581339 Write Rank1 MR13 =0x58
765 14:47:44.581402 Write Rank1 MR12 =0x5d
766 14:47:44.581471 Write Rank1 MR1 =0x56
767 14:47:44.581534 Write Rank1 MR2 =0x2d
768 14:47:44.581597 Write Rank1 MR11 =0x23
769 14:47:44.581661 Write Rank1 MR22 =0x34
770 14:47:44.581724 Write Rank1 MR14 =0x10
771 14:47:44.581786 Write Rank1 MR3 =0x30
772 14:47:44.581849 Write Rank1 MR13 =0xd8
773 14:47:44.581913 match AC timing 3
774 14:47:44.581977 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 14:47:44.582042 DramC Write-DBI off
776 14:47:44.582105 DramC Read-DBI off
777 14:47:44.582168 Write Rank0 MR13 =0x59
778 14:47:44.582231 ==
779 14:47:44.582295 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 14:47:44.582359 fsp= 1, odt_onoff= 1, Byte mode= 0
781 14:47:44.582423 ==
782 14:47:44.582486 === u2Vref_new: 0x56 --> 0x2d
783 14:47:44.582551 === u2Vref_new: 0x58 --> 0x38
784 14:47:44.582614 === u2Vref_new: 0x5a --> 0x39
785 14:47:44.582677 === u2Vref_new: 0x5c --> 0x3c
786 14:47:44.582752 === u2Vref_new: 0x5e --> 0x3d
787 14:47:44.582820 === u2Vref_new: 0x60 --> 0xa0
788 14:47:44.582885 [CA 0] Center 34 (6~63) winsize 58
789 14:47:44.582949 [CA 1] Center 35 (7~63) winsize 57
790 14:47:44.583012 [CA 2] Center 28 (-1~58) winsize 60
791 14:47:44.583076 [CA 3] Center 23 (-4~51) winsize 56
792 14:47:44.583150 [CA 4] Center 24 (-4~52) winsize 57
793 14:47:44.583208 [CA 5] Center 29 (0~58) winsize 59
794 14:47:44.583266
795 14:47:44.583325 [CATrainingPosCal] consider 1 rank data
796 14:47:44.583384 u2DelayCellTimex100 = 744/100 ps
797 14:47:44.583443 CA0 delay=34 (6~63),Diff = 11 PI (14 cell)
798 14:47:44.583502 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
799 14:47:44.583561 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
800 14:47:44.583619 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
801 14:47:44.583679 CA4 delay=24 (-4~52),Diff = 1 PI (1 cell)
802 14:47:44.583737 CA5 delay=29 (0~58),Diff = 6 PI (7 cell)
803 14:47:44.583796
804 14:47:44.583855 CA PerBit enable=1, Macro0, CA PI delay=23
805 14:47:44.583914 === u2Vref_new: 0x5c --> 0x3c
806 14:47:44.583972
807 14:47:44.584038 Vref(ca) range 1: 28
808 14:47:44.584102
809 14:47:44.584165 CS Dly= 7 (38-0-32)
810 14:47:44.584223 Write Rank0 MR13 =0xd8
811 14:47:44.584283 Write Rank0 MR13 =0xd8
812 14:47:44.584341 Write Rank0 MR12 =0x5c
813 14:47:44.584402 Write Rank1 MR13 =0x59
814 14:47:44.584461 ==
815 14:47:44.584737 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
816 14:47:44.584813 fsp= 1, odt_onoff= 1, Byte mode= 0
817 14:47:44.584876 ==
818 14:47:44.584936 === u2Vref_new: 0x56 --> 0x2d
819 14:47:44.584999 === u2Vref_new: 0x58 --> 0x38
820 14:47:44.585060 === u2Vref_new: 0x5a --> 0x39
821 14:47:44.585119 === u2Vref_new: 0x5c --> 0x3c
822 14:47:44.585178 === u2Vref_new: 0x5e --> 0x3d
823 14:47:44.585237 === u2Vref_new: 0x60 --> 0xa0
824 14:47:44.585296 [CA 0] Center 35 (7~63) winsize 57
825 14:47:44.585355 [CA 1] Center 34 (6~63) winsize 58
826 14:47:44.585414 [CA 2] Center 27 (-2~57) winsize 60
827 14:47:44.585483 [CA 3] Center 22 (-6~51) winsize 58
828 14:47:44.585543 [CA 4] Center 23 (-5~51) winsize 57
829 14:47:44.585601 [CA 5] Center 29 (0~58) winsize 59
830 14:47:44.585660
831 14:47:44.585719 [CATrainingPosCal] consider 2 rank data
832 14:47:44.585778 u2DelayCellTimex100 = 744/100 ps
833 14:47:44.585837 CA0 delay=35 (7~63),Diff = 12 PI (15 cell)
834 14:47:44.585896 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
835 14:47:44.585956 CA2 delay=28 (-1~57),Diff = 5 PI (6 cell)
836 14:47:44.586015 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
837 14:47:44.586073 CA4 delay=23 (-4~51),Diff = 0 PI (0 cell)
838 14:47:44.586132 CA5 delay=29 (0~58),Diff = 6 PI (7 cell)
839 14:47:44.586191
840 14:47:44.586250 CA PerBit enable=1, Macro0, CA PI delay=23
841 14:47:44.586309 === u2Vref_new: 0x5e --> 0x3d
842 14:47:44.586368
843 14:47:44.586427 Vref(ca) range 1: 30
844 14:47:44.586485
845 14:47:44.586544 CS Dly= 5 (36-0-32)
846 14:47:44.586603 Write Rank1 MR13 =0xd8
847 14:47:44.586661 Write Rank1 MR13 =0xd8
848 14:47:44.586720 Write Rank1 MR12 =0x5e
849 14:47:44.586779 [RankSwap] Rank num 2, (Multi 1), Rank 0
850 14:47:44.586841 Write Rank0 MR2 =0xad
851 14:47:44.586913 [Write Leveling]
852 14:47:44.586974 delay byte0 byte1 byte2 byte3
853 14:47:44.587033
854 14:47:44.587092 10 0 0
855 14:47:44.587153 11 0 0
856 14:47:44.587212 12 0 0
857 14:47:44.587272 13 0 0
858 14:47:44.587332 14 0 0
859 14:47:44.587391 15 0 0
860 14:47:44.587450 16 0 0
861 14:47:44.587510 17 0 0
862 14:47:44.587570 18 0 0
863 14:47:44.587629 19 0 0
864 14:47:44.587689 20 0 0
865 14:47:44.587748 21 0 0
866 14:47:44.587807 22 0 0
867 14:47:44.587866 23 0 0
868 14:47:44.587925 24 0 0
869 14:47:44.587985 25 0 ff
870 14:47:44.588044 26 0 ff
871 14:47:44.588103 27 0 ff
872 14:47:44.588163 28 0 ff
873 14:47:44.588222 29 0 ff
874 14:47:44.588282 30 ff ff
875 14:47:44.588342 31 ff ff
876 14:47:44.588402 32 ff ff
877 14:47:44.588461 33 ff ff
878 14:47:44.588521 34 ff ff
879 14:47:44.588580 35 ff ff
880 14:47:44.588640 36 ff ff
881 14:47:44.588699 pass bytecount = 0xff (0xff: all bytes pass)
882 14:47:44.588759
883 14:47:44.588818 DQS0 dly: 30
884 14:47:44.588886 DQS1 dly: 25
885 14:47:44.588945 Write Rank0 MR2 =0x2d
886 14:47:44.589004 [RankSwap] Rank num 2, (Multi 1), Rank 0
887 14:47:44.589064 Write Rank0 MR1 =0xd6
888 14:47:44.589122 [Gating]
889 14:47:44.589181 ==
890 14:47:44.589240 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
891 14:47:44.589299 fsp= 1, odt_onoff= 1, Byte mode= 0
892 14:47:44.589357 ==
893 14:47:44.589417 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
894 14:47:44.589482 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
895 14:47:44.589543 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
896 14:47:44.589603 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
897 14:47:44.589664 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
898 14:47:44.589725 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
899 14:47:44.589785 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 14:47:44.589845 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 14:47:44.589905 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 14:47:44.589965 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 14:47:44.590025 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 14:47:44.590085 3 2 12 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
905 14:47:44.590146 3 2 16 |3534 2c2c |(11 11)(11 10) |(0 0)(0 0)| 0
906 14:47:44.590206 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
907 14:47:44.590267 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
908 14:47:44.590327 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
909 14:47:44.590387 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 14:47:44.590454 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 14:47:44.590515 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
912 14:47:44.590579 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
913 14:47:44.590640 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
914 14:47:44.590700 [Byte 0] Lead/lag Transition tap number (1)
915 14:47:44.590760 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
916 14:47:44.590819 [Byte 1] Lead/lag falling Transition (3, 3, 20)
917 14:47:44.590892 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 14:47:44.590955 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 14:47:44.591015 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 14:47:44.591076 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 14:47:44.591136 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
922 14:47:44.591196 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
923 14:47:44.591256 3 4 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
924 14:47:44.591317 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
925 14:47:44.591378 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 14:47:44.591437 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 14:47:44.591497 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 14:47:44.591557 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 14:47:44.591618 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 14:47:44.591677 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 14:47:44.591737 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 14:47:44.591797 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 14:47:44.591857 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 14:47:44.591917 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 14:47:44.591977 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 14:47:44.592037 [Byte 0] Lead/lag falling Transition (3, 6, 0)
937 14:47:44.592293 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
938 14:47:44.592360 [Byte 1] Lead/lag falling Transition (3, 6, 4)
939 14:47:44.592420 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
940 14:47:44.592481 [Byte 0] Lead/lag Transition tap number (3)
941 14:47:44.592541 [Byte 1] Lead/lag Transition tap number (2)
942 14:47:44.592600 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
943 14:47:44.592660 3 6 16 |4646 d0c |(0 0)(11 11) |(0 0)(0 0)| 0
944 14:47:44.592721 [Byte 0]First pass (3, 6, 16)
945 14:47:44.592780 3 6 20 |4646 1a1a |(0 0)(1 1) |(0 0)(0 0)| 0
946 14:47:44.592844 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 14:47:44.592913 [Byte 1]First pass (3, 6, 24)
948 14:47:44.592973 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 14:47:44.593034 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 14:47:44.593094 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 14:47:44.593154 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 14:47:44.593214 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 14:47:44.593274 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 14:47:44.593340 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 14:47:44.593403 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 14:47:44.593473 All bytes gating window > 1UI, Early break!
957 14:47:44.593533
958 14:47:44.593602 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
959 14:47:44.593663
960 14:47:44.593721 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
961 14:47:44.593780
962 14:47:44.593838
963 14:47:44.593897
964 14:47:44.593955 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
965 14:47:44.594014
966 14:47:44.594073 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
967 14:47:44.594131
968 14:47:44.594190
969 14:47:44.594248 Write Rank0 MR1 =0x56
970 14:47:44.594306
971 14:47:44.594365 best RODT dly(2T, 0.5T) = (2, 3)
972 14:47:44.594423
973 14:47:44.594481 best RODT dly(2T, 0.5T) = (2, 3)
974 14:47:44.594540 ==
975 14:47:44.594598 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 14:47:44.594657 fsp= 1, odt_onoff= 1, Byte mode= 0
977 14:47:44.594716 ==
978 14:47:44.594775 Start DQ dly to find pass range UseTestEngine =0
979 14:47:44.594836 x-axis: bit #, y-axis: DQ dly (-127~63)
980 14:47:44.594904 RX Vref Scan = 0
981 14:47:44.594969 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 14:47:44.595034 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 14:47:44.595094 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 14:47:44.595154 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 14:47:44.595214 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 14:47:44.595274 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 14:47:44.595334 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 14:47:44.595394 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 14:47:44.595453 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 14:47:44.595513 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 14:47:44.595573 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 14:47:44.595639 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 14:47:44.595701 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 14:47:44.595761 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 14:47:44.595821 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 14:47:44.595886 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 14:47:44.595947 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 14:47:44.596007 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 14:47:44.596068 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 14:47:44.596128 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 14:47:44.596188 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 14:47:44.596247 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 14:47:44.596307 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 14:47:44.596367 -3, [0] xxxoxxxx oxxxxxxx [MSB]
1005 14:47:44.596432 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1006 14:47:44.596493 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1007 14:47:44.596554 0, [0] xxxoxxxx ooxoooxx [MSB]
1008 14:47:44.596615 1, [0] xxxoxoxx ooxoooxx [MSB]
1009 14:47:44.596681 2, [0] xxxoxoox ooxoooox [MSB]
1010 14:47:44.596741 3, [0] xxxoxoox ooxoooox [MSB]
1011 14:47:44.596805 4, [0] xxxooooo ooxooooo [MSB]
1012 14:47:44.596870 5, [0] xxxooooo ooxooooo [MSB]
1013 14:47:44.596931 6, [0] oooooooo ooxooooo [MSB]
1014 14:47:44.596991 32, [0] oooxoooo oooooooo [MSB]
1015 14:47:44.597051 33, [0] oooxoooo xooooooo [MSB]
1016 14:47:44.597110 34, [0] oooxoooo xooxoooo [MSB]
1017 14:47:44.597175 35, [0] oooxoooo xxoxoooo [MSB]
1018 14:47:44.597235 36, [0] oooxoxoo xxoxxoxo [MSB]
1019 14:47:44.597295 37, [0] oooxoxxx xxoxxxxo [MSB]
1020 14:47:44.597354 38, [0] oooxoxxx xxoxxxxo [MSB]
1021 14:47:44.597421 39, [0] oooxoxxx xxoxxxxx [MSB]
1022 14:47:44.597487 40, [0] ooxxxxxx xxoxxxxx [MSB]
1023 14:47:44.597547 41, [0] xxxxxxxx xxoxxxxx [MSB]
1024 14:47:44.597613 42, [0] xxxxxxxx xxxxxxxx [MSB]
1025 14:47:44.597681 iDelay=42, Bit 0, Center 23 (6 ~ 40) 35
1026 14:47:44.597744 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
1027 14:47:44.597808 iDelay=42, Bit 2, Center 22 (6 ~ 39) 34
1028 14:47:44.597870 iDelay=42, Bit 3, Center 14 (-3 ~ 31) 35
1029 14:47:44.597929 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
1030 14:47:44.597992 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
1031 14:47:44.598052 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
1032 14:47:44.598116 iDelay=42, Bit 7, Center 20 (4 ~ 36) 33
1033 14:47:44.598176 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
1034 14:47:44.598234 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
1035 14:47:44.598293 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
1036 14:47:44.598352 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
1037 14:47:44.598416 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
1038 14:47:44.598475 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1039 14:47:44.598534 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
1040 14:47:44.598593 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
1041 14:47:44.598652 ==
1042 14:47:44.598710 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1043 14:47:44.598769 fsp= 1, odt_onoff= 1, Byte mode= 0
1044 14:47:44.598836 ==
1045 14:47:44.598896 DQS Delay:
1046 14:47:44.598955 DQS0 = 0, DQS1 = 0
1047 14:47:44.599020 DQM Delay:
1048 14:47:44.599080 DQM0 = 20, DQM1 = 18
1049 14:47:44.599139 DQ Delay:
1050 14:47:44.599198 DQ0 =23, DQ1 =23, DQ2 =22, DQ3 =14
1051 14:47:44.599263 DQ4 =21, DQ5 =18, DQ6 =19, DQ7 =20
1052 14:47:44.599322 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
1053 14:47:44.599380 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
1054 14:47:44.599444
1055 14:47:44.599503
1056 14:47:44.599561 DramC Write-DBI off
1057 14:47:44.599619 ==
1058 14:47:44.599678 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1059 14:47:44.599737 fsp= 1, odt_onoff= 1, Byte mode= 0
1060 14:47:44.599795 ==
1061 14:47:44.599854 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1062 14:47:44.599912
1063 14:47:44.599970 Begin, DQ Scan Range 921~1177
1064 14:47:44.600035
1065 14:47:44.600094
1066 14:47:44.600152 TX Vref Scan disable
1067 14:47:44.600409 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1068 14:47:44.600480 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1069 14:47:44.600541 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1070 14:47:44.600601 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1071 14:47:44.600661 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1072 14:47:44.600720 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1073 14:47:44.600779 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1074 14:47:44.600839 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1075 14:47:44.600899 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1076 14:47:44.600958 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1077 14:47:44.601017 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1078 14:47:44.601077 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1079 14:47:44.601136 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1080 14:47:44.601196 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1081 14:47:44.601256 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1082 14:47:44.601315 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1083 14:47:44.601374 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1084 14:47:44.601453 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1085 14:47:44.601517 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1086 14:47:44.601577 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1087 14:47:44.601638 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1088 14:47:44.601698 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1089 14:47:44.601757 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1090 14:47:44.601816 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1091 14:47:44.601876 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1092 14:47:44.601936 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1093 14:47:44.601996 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1094 14:47:44.602055 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1095 14:47:44.602115 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1096 14:47:44.602175 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1097 14:47:44.602234 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1098 14:47:44.602294 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1099 14:47:44.602353 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1100 14:47:44.602412 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1101 14:47:44.602471 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1102 14:47:44.602538 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1103 14:47:44.602599 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1104 14:47:44.602659 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1105 14:47:44.602718 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1106 14:47:44.602777 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1107 14:47:44.602836 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1108 14:47:44.602895 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1109 14:47:44.602954 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1110 14:47:44.603013 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1111 14:47:44.603072 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1112 14:47:44.603131 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1113 14:47:44.603189 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1114 14:47:44.603248 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1115 14:47:44.603308 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1116 14:47:44.603367 970 |3 6 10|[0] xxxxxxxx ooxooxxx [MSB]
1117 14:47:44.603426 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1118 14:47:44.603496 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1119 14:47:44.603557 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1120 14:47:44.603616 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1121 14:47:44.603675 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1122 14:47:44.603734 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1123 14:47:44.603794 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1124 14:47:44.603853 978 |3 6 18|[0] xooooooo oooooooo [MSB]
1125 14:47:44.603913 989 |3 6 29|[0] oooooooo oooxoooo [MSB]
1126 14:47:44.603972 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1127 14:47:44.604032 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1128 14:47:44.604091 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1129 14:47:44.604151 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1130 14:47:44.604210 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1131 14:47:44.604269 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1132 14:47:44.604328 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1133 14:47:44.604387 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1134 14:47:44.604447 Byte0, DQ PI dly=985, DQM PI dly= 985
1135 14:47:44.604505 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1136 14:47:44.604564
1137 14:47:44.604622 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1138 14:47:44.604681
1139 14:47:44.604748 Byte1, DQ PI dly=980, DQM PI dly= 980
1140 14:47:44.604830 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1141 14:47:44.604890
1142 14:47:44.604948 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1143 14:47:44.605006
1144 14:47:44.605064 ==
1145 14:47:44.605123 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1146 14:47:44.605182 fsp= 1, odt_onoff= 1, Byte mode= 0
1147 14:47:44.605240 ==
1148 14:47:44.605298 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1149 14:47:44.605356
1150 14:47:44.605414 Begin, DQ Scan Range 956~1020
1151 14:47:44.605485 Write Rank0 MR14 =0x0
1152 14:47:44.605544
1153 14:47:44.605603 CH=0, VrefRange= 0, VrefLevel = 0
1154 14:47:44.605662 TX Bit0 (981~993) 13 987, Bit8 (970~984) 15 977,
1155 14:47:44.605722 TX Bit1 (979~993) 15 986, Bit9 (972~985) 14 978,
1156 14:47:44.605780 TX Bit2 (980~993) 14 986, Bit10 (977~990) 14 983,
1157 14:47:44.605840 TX Bit3 (976~988) 13 982, Bit11 (971~982) 12 976,
1158 14:47:44.605899 TX Bit4 (979~992) 14 985, Bit12 (974~983) 10 978,
1159 14:47:44.605957 TX Bit5 (977~991) 15 984, Bit13 (974~983) 10 978,
1160 14:47:44.606015 TX Bit6 (978~991) 14 984, Bit14 (975~988) 14 981,
1161 14:47:44.606074 TX Bit7 (979~992) 14 985, Bit15 (976~990) 15 983,
1162 14:47:44.606133
1163 14:47:44.606191 Write Rank0 MR14 =0x2
1164 14:47:44.606249
1165 14:47:44.606307 CH=0, VrefRange= 0, VrefLevel = 2
1166 14:47:44.606365 TX Bit0 (980~993) 14 986, Bit8 (969~984) 16 976,
1167 14:47:44.606424 TX Bit1 (978~993) 16 985, Bit9 (972~986) 15 979,
1168 14:47:44.606483 TX Bit2 (979~994) 16 986, Bit10 (976~991) 16 983,
1169 14:47:44.606542 TX Bit3 (976~990) 15 983, Bit11 (970~982) 13 976,
1170 14:47:44.606610 TX Bit4 (978~992) 15 985, Bit12 (974~984) 11 979,
1171 14:47:44.606671 TX Bit5 (977~991) 15 984, Bit13 (974~984) 11 979,
1172 14:47:44.606931 TX Bit6 (978~991) 14 984, Bit14 (974~989) 16 981,
1173 14:47:44.607004 TX Bit7 (979~992) 14 985, Bit15 (976~990) 15 983,
1174 14:47:44.607066
1175 14:47:44.607126 Write Rank0 MR14 =0x4
1176 14:47:44.607185
1177 14:47:44.607244 CH=0, VrefRange= 0, VrefLevel = 4
1178 14:47:44.607302 TX Bit0 (980~994) 15 987, Bit8 (969~985) 17 977,
1179 14:47:44.607362 TX Bit1 (978~994) 17 986, Bit9 (971~987) 17 979,
1180 14:47:44.607421 TX Bit2 (979~994) 16 986, Bit10 (976~991) 16 983,
1181 14:47:44.607480 TX Bit3 (975~990) 16 982, Bit11 (970~983) 14 976,
1182 14:47:44.607539 TX Bit4 (978~993) 16 985, Bit12 (974~986) 13 980,
1183 14:47:44.607598 TX Bit5 (977~991) 15 984, Bit13 (974~985) 12 979,
1184 14:47:44.607657 TX Bit6 (977~991) 15 984, Bit14 (974~989) 16 981,
1185 14:47:44.607717 TX Bit7 (978~993) 16 985, Bit15 (976~991) 16 983,
1186 14:47:44.607775
1187 14:47:44.607833 Write Rank0 MR14 =0x6
1188 14:47:44.607892
1189 14:47:44.607950 CH=0, VrefRange= 0, VrefLevel = 6
1190 14:47:44.608009 TX Bit0 (980~995) 16 987, Bit8 (969~986) 18 977,
1191 14:47:44.608068 TX Bit1 (978~995) 18 986, Bit9 (971~988) 18 979,
1192 14:47:44.608127 TX Bit2 (979~996) 18 987, Bit10 (975~992) 18 983,
1193 14:47:44.608186 TX Bit3 (975~991) 17 983, Bit11 (969~984) 16 976,
1194 14:47:44.608244 TX Bit4 (978~993) 16 985, Bit12 (973~986) 14 979,
1195 14:47:44.608303 TX Bit5 (976~992) 17 984, Bit13 (973~986) 14 979,
1196 14:47:44.608362 TX Bit6 (977~992) 16 984, Bit14 (973~989) 17 981,
1197 14:47:44.608421 TX Bit7 (978~994) 17 986, Bit15 (975~992) 18 983,
1198 14:47:44.608479
1199 14:47:44.608537 Write Rank0 MR14 =0x8
1200 14:47:44.608595
1201 14:47:44.608653 CH=0, VrefRange= 0, VrefLevel = 8
1202 14:47:44.608711 TX Bit0 (979~996) 18 987, Bit8 (969~987) 19 978,
1203 14:47:44.608769 TX Bit1 (978~995) 18 986, Bit9 (971~988) 18 979,
1204 14:47:44.608828 TX Bit2 (979~996) 18 987, Bit10 (975~993) 19 984,
1205 14:47:44.608887 TX Bit3 (974~991) 18 982, Bit11 (969~985) 17 977,
1206 14:47:44.608946 TX Bit4 (978~994) 17 986, Bit12 (973~987) 15 980,
1207 14:47:44.609004 TX Bit5 (976~992) 17 984, Bit13 (973~987) 15 980,
1208 14:47:44.609063 TX Bit6 (977~993) 17 985, Bit14 (973~990) 18 981,
1209 14:47:44.609123 TX Bit7 (978~995) 18 986, Bit15 (975~992) 18 983,
1210 14:47:44.609181
1211 14:47:44.609238 Write Rank0 MR14 =0xa
1212 14:47:44.609296
1213 14:47:44.609353 CH=0, VrefRange= 0, VrefLevel = 10
1214 14:47:44.609412 TX Bit0 (979~997) 19 988, Bit8 (968~988) 21 978,
1215 14:47:44.609480 TX Bit1 (978~996) 19 987, Bit9 (970~988) 19 979,
1216 14:47:44.609539 TX Bit2 (979~997) 19 988, Bit10 (976~993) 18 984,
1217 14:47:44.609598 TX Bit3 (974~991) 18 982, Bit11 (969~986) 18 977,
1218 14:47:44.609657 TX Bit4 (978~995) 18 986, Bit12 (972~988) 17 980,
1219 14:47:44.609715 TX Bit5 (976~993) 18 984, Bit13 (972~988) 17 980,
1220 14:47:44.609775 TX Bit6 (977~993) 17 985, Bit14 (972~990) 19 981,
1221 14:47:44.609834 TX Bit7 (978~995) 18 986, Bit15 (975~993) 19 984,
1222 14:47:44.609893
1223 14:47:44.609950 Write Rank0 MR14 =0xc
1224 14:47:44.610009
1225 14:47:44.610076 CH=0, VrefRange= 0, VrefLevel = 12
1226 14:47:44.610135 TX Bit0 (979~997) 19 988, Bit8 (968~988) 21 978,
1227 14:47:44.610194 TX Bit1 (978~997) 20 987, Bit9 (969~989) 21 979,
1228 14:47:44.610253 TX Bit2 (979~998) 20 988, Bit10 (975~995) 21 985,
1229 14:47:44.610312 TX Bit3 (973~991) 19 982, Bit11 (969~986) 18 977,
1230 14:47:44.610371 TX Bit4 (978~995) 18 986, Bit12 (972~989) 18 980,
1231 14:47:44.610430 TX Bit5 (976~993) 18 984, Bit13 (972~988) 17 980,
1232 14:47:44.610489 TX Bit6 (977~994) 18 985, Bit14 (972~991) 20 981,
1233 14:47:44.610547 TX Bit7 (978~997) 20 987, Bit15 (975~993) 19 984,
1234 14:47:44.610606
1235 14:47:44.610664 Write Rank0 MR14 =0xe
1236 14:47:44.610721
1237 14:47:44.610779 CH=0, VrefRange= 0, VrefLevel = 14
1238 14:47:44.610838 TX Bit0 (979~998) 20 988, Bit8 (968~989) 22 978,
1239 14:47:44.610897 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
1240 14:47:44.610956 TX Bit2 (978~998) 21 988, Bit10 (975~995) 21 985,
1241 14:47:44.611015 TX Bit3 (973~992) 20 982, Bit11 (968~987) 20 977,
1242 14:47:44.611073 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1243 14:47:44.611131 TX Bit5 (975~994) 20 984, Bit13 (971~989) 19 980,
1244 14:47:44.611190 TX Bit6 (976~995) 20 985, Bit14 (971~991) 21 981,
1245 14:47:44.611248 TX Bit7 (978~997) 20 987, Bit15 (975~994) 20 984,
1246 14:47:44.611307
1247 14:47:44.611365 Write Rank0 MR14 =0x10
1248 14:47:44.611422
1249 14:47:44.611480 CH=0, VrefRange= 0, VrefLevel = 16
1250 14:47:44.611537 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1251 14:47:44.611596 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
1252 14:47:44.611688 TX Bit2 (978~998) 21 988, Bit10 (975~996) 22 985,
1253 14:47:44.611787 TX Bit3 (972~992) 21 982, Bit11 (968~988) 21 978,
1254 14:47:44.611850 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1255 14:47:44.611910 TX Bit5 (975~994) 20 984, Bit13 (971~989) 19 980,
1256 14:47:44.611969 TX Bit6 (976~996) 21 986, Bit14 (972~992) 21 982,
1257 14:47:44.612028 TX Bit7 (977~998) 22 987, Bit15 (974~995) 22 984,
1258 14:47:44.612087
1259 14:47:44.612146 Write Rank0 MR14 =0x12
1260 14:47:44.612204
1261 14:47:44.612262 CH=0, VrefRange= 0, VrefLevel = 18
1262 14:47:44.612320 TX Bit0 (978~999) 22 988, Bit8 (967~989) 23 978,
1263 14:47:44.612379 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1264 14:47:44.612437 TX Bit2 (978~999) 22 988, Bit10 (974~996) 23 985,
1265 14:47:44.612496 TX Bit3 (972~993) 22 982, Bit11 (968~988) 21 978,
1266 14:47:44.612554 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1267 14:47:44.612613 TX Bit5 (974~995) 22 984, Bit13 (970~989) 20 979,
1268 14:47:44.612671 TX Bit6 (975~996) 22 985, Bit14 (971~992) 22 981,
1269 14:47:44.612730 TX Bit7 (977~998) 22 987, Bit15 (974~995) 22 984,
1270 14:47:44.612789
1271 14:47:44.612847 wait MRW command Rank0 MR14 =0x14 fired (1)
1272 14:47:44.612905 Write Rank0 MR14 =0x14
1273 14:47:44.612964
1274 14:47:44.613022 CH=0, VrefRange= 0, VrefLevel = 20
1275 14:47:44.613276 TX Bit0 (978~999) 22 988, Bit8 (967~990) 24 978,
1276 14:47:44.613366 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1277 14:47:44.613472 TX Bit2 (978~999) 22 988, Bit10 (974~996) 23 985,
1278 14:47:44.613537 TX Bit3 (971~993) 23 982, Bit11 (968~989) 22 978,
1279 14:47:44.613596 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1280 14:47:44.613655 TX Bit5 (975~996) 22 985, Bit13 (970~989) 20 979,
1281 14:47:44.613715 TX Bit6 (975~998) 24 986, Bit14 (970~993) 24 981,
1282 14:47:44.613774 TX Bit7 (977~999) 23 988, Bit15 (973~996) 24 984,
1283 14:47:44.613833
1284 14:47:44.613891 Write Rank0 MR14 =0x16
1285 14:47:44.613951
1286 14:47:44.614009 CH=0, VrefRange= 0, VrefLevel = 22
1287 14:47:44.614068 TX Bit0 (978~999) 22 988, Bit8 (967~990) 24 978,
1288 14:47:44.614127 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1289 14:47:44.614186 TX Bit2 (978~999) 22 988, Bit10 (974~997) 24 985,
1290 14:47:44.614245 TX Bit3 (971~993) 23 982, Bit11 (968~989) 22 978,
1291 14:47:44.614304 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1292 14:47:44.614363 TX Bit5 (974~996) 23 985, Bit13 (969~990) 22 979,
1293 14:47:44.614421 TX Bit6 (975~998) 24 986, Bit14 (970~993) 24 981,
1294 14:47:44.614480 TX Bit7 (977~999) 23 988, Bit15 (973~996) 24 984,
1295 14:47:44.614538
1296 14:47:44.614596 Write Rank0 MR14 =0x18
1297 14:47:44.614654
1298 14:47:44.614712 CH=0, VrefRange= 0, VrefLevel = 24
1299 14:47:44.614771 TX Bit0 (978~999) 22 988, Bit8 (967~990) 24 978,
1300 14:47:44.614829 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1301 14:47:44.614888 TX Bit2 (977~1000) 24 988, Bit10 (973~997) 25 985,
1302 14:47:44.614947 TX Bit3 (971~994) 24 982, Bit11 (967~989) 23 978,
1303 14:47:44.615006 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
1304 14:47:44.615064 TX Bit5 (973~997) 25 985, Bit13 (969~990) 22 979,
1305 14:47:44.615123 TX Bit6 (974~998) 25 986, Bit14 (969~994) 26 981,
1306 14:47:44.615181 TX Bit7 (976~999) 24 987, Bit15 (974~997) 24 985,
1307 14:47:44.615240
1308 14:47:44.615297 Write Rank0 MR14 =0x1a
1309 14:47:44.615355
1310 14:47:44.615413 CH=0, VrefRange= 0, VrefLevel = 26
1311 14:47:44.615471 TX Bit0 (978~1000) 23 989, Bit8 (967~989) 23 978,
1312 14:47:44.615530 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1313 14:47:44.615589 TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985,
1314 14:47:44.615648 TX Bit3 (971~994) 24 982, Bit11 (967~990) 24 978,
1315 14:47:44.615706 TX Bit4 (976~999) 24 987, Bit12 (969~991) 23 980,
1316 14:47:44.615765 TX Bit5 (973~997) 25 985, Bit13 (969~991) 23 980,
1317 14:47:44.615823 TX Bit6 (974~998) 25 986, Bit14 (969~994) 26 981,
1318 14:47:44.615882 TX Bit7 (976~1000) 25 988, Bit15 (972~997) 26 984,
1319 14:47:44.615940
1320 14:47:44.615999 Write Rank0 MR14 =0x1c
1321 14:47:44.616057
1322 14:47:44.616126 CH=0, VrefRange= 0, VrefLevel = 28
1323 14:47:44.616187 TX Bit0 (977~1000) 24 988, Bit8 (966~989) 24 977,
1324 14:47:44.616246 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1325 14:47:44.616305 TX Bit2 (977~1000) 24 988, Bit10 (973~997) 25 985,
1326 14:47:44.616364 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1327 14:47:44.616422 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1328 14:47:44.616497 TX Bit5 (972~997) 26 984, Bit13 (969~991) 23 980,
1329 14:47:44.616564 TX Bit6 (974~999) 26 986, Bit14 (969~995) 27 982,
1330 14:47:44.616624 TX Bit7 (976~1000) 25 988, Bit15 (973~997) 25 985,
1331 14:47:44.616683
1332 14:47:44.616741 Write Rank0 MR14 =0x1e
1333 14:47:44.616799
1334 14:47:44.616857 CH=0, VrefRange= 0, VrefLevel = 30
1335 14:47:44.616915 TX Bit0 (977~1001) 25 989, Bit8 (966~989) 24 977,
1336 14:47:44.616975 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1337 14:47:44.617033 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1338 14:47:44.617092 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1339 14:47:44.617152 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1340 14:47:44.617210 TX Bit5 (972~997) 26 984, Bit13 (969~992) 24 980,
1341 14:47:44.617269 TX Bit6 (975~998) 24 986, Bit14 (969~994) 26 981,
1342 14:47:44.617328 TX Bit7 (976~1000) 25 988, Bit15 (972~997) 26 984,
1343 14:47:44.617387
1344 14:47:44.617458 Write Rank0 MR14 =0x20
1345 14:47:44.617520
1346 14:47:44.617578 CH=0, VrefRange= 0, VrefLevel = 32
1347 14:47:44.617637 TX Bit0 (977~1001) 25 989, Bit8 (966~989) 24 977,
1348 14:47:44.617696 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1349 14:47:44.617756 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1350 14:47:44.617815 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1351 14:47:44.617874 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1352 14:47:44.617933 TX Bit5 (972~997) 26 984, Bit13 (969~992) 24 980,
1353 14:47:44.617993 TX Bit6 (975~998) 24 986, Bit14 (969~994) 26 981,
1354 14:47:44.618051 TX Bit7 (976~1000) 25 988, Bit15 (972~997) 26 984,
1355 14:47:44.618110
1356 14:47:44.618168 Write Rank0 MR14 =0x22
1357 14:47:44.618226
1358 14:47:44.618283 CH=0, VrefRange= 0, VrefLevel = 34
1359 14:47:44.618341 TX Bit0 (977~1001) 25 989, Bit8 (966~989) 24 977,
1360 14:47:44.618400 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1361 14:47:44.618459 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1362 14:47:44.618517 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1363 14:47:44.618575 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1364 14:47:44.618634 TX Bit5 (972~997) 26 984, Bit13 (969~992) 24 980,
1365 14:47:44.618693 TX Bit6 (975~998) 24 986, Bit14 (969~994) 26 981,
1366 14:47:44.618751 TX Bit7 (976~1000) 25 988, Bit15 (972~997) 26 984,
1367 14:47:44.618810
1368 14:47:44.618867 Write Rank0 MR14 =0x24
1369 14:47:44.618926
1370 14:47:44.618983 CH=0, VrefRange= 0, VrefLevel = 36
1371 14:47:44.619042 TX Bit0 (977~1001) 25 989, Bit8 (966~989) 24 977,
1372 14:47:44.619100 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1373 14:47:44.619158 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1374 14:47:44.619415 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1375 14:47:44.619483 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1376 14:47:44.619542 TX Bit5 (972~997) 26 984, Bit13 (969~992) 24 980,
1377 14:47:44.619602 TX Bit6 (975~998) 24 986, Bit14 (969~994) 26 981,
1378 14:47:44.619660 TX Bit7 (976~1000) 25 988, Bit15 (972~997) 26 984,
1379 14:47:44.619719
1380 14:47:44.619776
1381 14:47:44.619833 TX Vref found, early break! 373< 376
1382 14:47:44.619892 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1383 14:47:44.619950 u1DelayCellOfst[0]=9 cells (7 PI)
1384 14:47:44.620019 u1DelayCellOfst[1]=7 cells (6 PI)
1385 14:47:44.620078 u1DelayCellOfst[2]=9 cells (7 PI)
1386 14:47:44.620136 u1DelayCellOfst[3]=0 cells (0 PI)
1387 14:47:44.620193 u1DelayCellOfst[4]=6 cells (5 PI)
1388 14:47:44.620251 u1DelayCellOfst[5]=2 cells (2 PI)
1389 14:47:44.620309 u1DelayCellOfst[6]=5 cells (4 PI)
1390 14:47:44.620367 u1DelayCellOfst[7]=7 cells (6 PI)
1391 14:47:44.620425 Byte0, DQ PI dly=982, DQM PI dly= 985
1392 14:47:44.620484 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1393 14:47:44.620542
1394 14:47:44.620600 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1395 14:47:44.620658
1396 14:47:44.620716 u1DelayCellOfst[8]=0 cells (0 PI)
1397 14:47:44.620774 u1DelayCellOfst[9]=2 cells (2 PI)
1398 14:47:44.620834 u1DelayCellOfst[10]=10 cells (8 PI)
1399 14:47:44.620892 u1DelayCellOfst[11]=1 cells (1 PI)
1400 14:47:44.620960 u1DelayCellOfst[12]=2 cells (2 PI)
1401 14:47:44.621019 u1DelayCellOfst[13]=3 cells (3 PI)
1402 14:47:44.621076 u1DelayCellOfst[14]=5 cells (4 PI)
1403 14:47:44.621134 u1DelayCellOfst[15]=9 cells (7 PI)
1404 14:47:44.621192 Byte1, DQ PI dly=977, DQM PI dly= 981
1405 14:47:44.621250 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1406 14:47:44.621309
1407 14:47:44.621366 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1408 14:47:44.621424
1409 14:47:44.621492 Write Rank0 MR14 =0x1e
1410 14:47:44.621550
1411 14:47:44.621607 Final TX Range 0 Vref 30
1412 14:47:44.621665
1413 14:47:44.621723 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1414 14:47:44.621783
1415 14:47:44.621842 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1416 14:47:44.621900 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1417 14:47:44.621960 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1418 14:47:44.622018 Write Rank0 MR3 =0xb0
1419 14:47:44.622076 DramC Write-DBI on
1420 14:47:44.622133 ==
1421 14:47:44.622192 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1422 14:47:44.622250 fsp= 1, odt_onoff= 1, Byte mode= 0
1423 14:47:44.622309 ==
1424 14:47:44.622366 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1425 14:47:44.622424
1426 14:47:44.622482 Begin, DQ Scan Range 701~765
1427 14:47:44.622540
1428 14:47:44.622597
1429 14:47:44.622654 TX Vref Scan disable
1430 14:47:44.622712 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1431 14:47:44.622772 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1432 14:47:44.622832 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1433 14:47:44.622891 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1434 14:47:44.622951 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1435 14:47:44.623020 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1436 14:47:44.623080 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1437 14:47:44.623141 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1438 14:47:44.623200 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1439 14:47:44.623260 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1440 14:47:44.623318 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1441 14:47:44.623377 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1442 14:47:44.623436 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1443 14:47:44.623496 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1444 14:47:44.623555 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1445 14:47:44.623615 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1446 14:47:44.623674 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1447 14:47:44.623732 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1448 14:47:44.623792 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1449 14:47:44.623851 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1450 14:47:44.623910 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1451 14:47:44.623969 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1452 14:47:44.624028 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1453 14:47:44.624087 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1454 14:47:44.624145 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1455 14:47:44.624205 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1456 14:47:44.624263 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1457 14:47:44.624321 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1458 14:47:44.624380 Byte0, DQ PI dly=732, DQM PI dly= 732
1459 14:47:44.624438 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1460 14:47:44.624496
1461 14:47:44.624554 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1462 14:47:44.624612
1463 14:47:44.624669 Byte1, DQ PI dly=724, DQM PI dly= 724
1464 14:47:44.624727 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1465 14:47:44.624785
1466 14:47:44.624842 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1467 14:47:44.624900
1468 14:47:44.624957 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1469 14:47:44.625016 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1470 14:47:44.625074 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1471 14:47:44.625132 Write Rank0 MR3 =0x30
1472 14:47:44.625189 DramC Write-DBI off
1473 14:47:44.625247
1474 14:47:44.625304 [DATLAT]
1475 14:47:44.625362 Freq=1600, CH0 RK0, use_rxtx_scan=0
1476 14:47:44.625420
1477 14:47:44.625486 DATLAT Default: 0xf
1478 14:47:44.625545 7, 0xFFFF, sum=0
1479 14:47:44.625604 8, 0xFFFF, sum=0
1480 14:47:44.625663 9, 0xFFFF, sum=0
1481 14:47:44.625721 10, 0xFFFF, sum=0
1482 14:47:44.625780 11, 0xFFFF, sum=0
1483 14:47:44.625838 12, 0xFFFF, sum=0
1484 14:47:44.625897 13, 0xFFFF, sum=0
1485 14:47:44.625955 14, 0x0, sum=1
1486 14:47:44.626014 15, 0x0, sum=2
1487 14:47:44.626072 16, 0x0, sum=3
1488 14:47:44.626131 17, 0x0, sum=4
1489 14:47:44.626190 pattern=2 first_step=14 total pass=5 best_step=16
1490 14:47:44.626248 ==
1491 14:47:44.626306 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1492 14:47:44.626364 fsp= 1, odt_onoff= 1, Byte mode= 0
1493 14:47:44.626422 ==
1494 14:47:44.626480 Start DQ dly to find pass range UseTestEngine =1
1495 14:47:44.626538 x-axis: bit #, y-axis: DQ dly (-127~63)
1496 14:47:44.626596 RX Vref Scan = 1
1497 14:47:44.626654
1498 14:47:44.626711 RX Vref found, early break!
1499 14:47:44.626769
1500 14:47:44.627031 Final RX Vref 11, apply to both rank0 and 1
1501 14:47:44.627097 ==
1502 14:47:44.627155 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1503 14:47:44.627214 fsp= 1, odt_onoff= 1, Byte mode= 0
1504 14:47:44.627272 ==
1505 14:47:44.627331 DQS Delay:
1506 14:47:44.627388 DQS0 = 0, DQS1 = 0
1507 14:47:44.627445 DQM Delay:
1508 14:47:44.627504 DQM0 = 19, DQM1 = 17
1509 14:47:44.627561 DQ Delay:
1510 14:47:44.627619 DQ0 =21, DQ1 =21, DQ2 =23, DQ3 =14
1511 14:47:44.627676 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1512 14:47:44.627733 DQ8 =14, DQ9 =17, DQ10 =23, DQ11 =15
1513 14:47:44.627791 DQ12 =17, DQ13 =17, DQ14 =18, DQ15 =20
1514 14:47:44.627849
1515 14:47:44.627907
1516 14:47:44.627963
1517 14:47:44.628021 [DramC_TX_OE_Calibration] TA2
1518 14:47:44.628080 Original DQ_B0 (3 6) =30, OEN = 27
1519 14:47:44.628139 Original DQ_B1 (3 6) =30, OEN = 27
1520 14:47:44.628197 23, 0x0, End_B0=23 End_B1=23
1521 14:47:44.628256 24, 0x0, End_B0=24 End_B1=24
1522 14:47:44.628314 25, 0x0, End_B0=25 End_B1=25
1523 14:47:44.628373 26, 0x0, End_B0=26 End_B1=26
1524 14:47:44.628431 27, 0x0, End_B0=27 End_B1=27
1525 14:47:44.628489 28, 0x0, End_B0=28 End_B1=28
1526 14:47:44.628547 29, 0x0, End_B0=29 End_B1=29
1527 14:47:44.628606 30, 0x0, End_B0=30 End_B1=30
1528 14:47:44.628665 31, 0xFFFF, End_B0=30 End_B1=30
1529 14:47:44.628724 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1530 14:47:44.628783 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1531 14:47:44.628840
1532 14:47:44.628898
1533 14:47:44.628954 Write Rank0 MR23 =0x3f
1534 14:47:44.629012 [DQSOSC]
1535 14:47:44.629070 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1536 14:47:44.629129 CH0_RK0: MR19=0x202, MR18=0xC2C2, DQSOSC=446, MR23=63, INC=12, DEC=18
1537 14:47:44.629187 Write Rank0 MR23 =0x3f
1538 14:47:44.629245 [DQSOSC]
1539 14:47:44.629303 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1540 14:47:44.629361 CH0 RK0: MR19=202, MR18=C0C0
1541 14:47:44.629420 [RankSwap] Rank num 2, (Multi 1), Rank 1
1542 14:47:44.629491 Write Rank0 MR2 =0xad
1543 14:47:44.629558 [Write Leveling]
1544 14:47:44.629617 delay byte0 byte1 byte2 byte3
1545 14:47:44.629675
1546 14:47:44.629732 10 0 0
1547 14:47:44.629791 11 0 0
1548 14:47:44.629850 12 0 0
1549 14:47:44.629910 13 0 0
1550 14:47:44.629968 14 0 0
1551 14:47:44.630037 15 0 0
1552 14:47:44.630103 16 0 0
1553 14:47:44.630163 17 0 0
1554 14:47:44.630221 18 0 0
1555 14:47:44.630280 19 0 0
1556 14:47:44.630338 20 0 0
1557 14:47:44.630396 21 0 0
1558 14:47:44.630455 22 0 0
1559 14:47:44.630514 23 0 ff
1560 14:47:44.630573 24 0 ff
1561 14:47:44.630632 25 0 ff
1562 14:47:44.630690 26 ff ff
1563 14:47:44.630749 27 ff ff
1564 14:47:44.630807 28 ff ff
1565 14:47:44.630866 29 ff ff
1566 14:47:44.630925 30 ff ff
1567 14:47:44.630983 31 ff ff
1568 14:47:44.631042 32 ff ff
1569 14:47:44.631100 pass bytecount = 0xff (0xff: all bytes pass)
1570 14:47:44.631158
1571 14:47:44.631216 DQS0 dly: 26
1572 14:47:44.631273 DQS1 dly: 23
1573 14:47:44.631330 Write Rank0 MR2 =0x2d
1574 14:47:44.631387 [RankSwap] Rank num 2, (Multi 1), Rank 0
1575 14:47:44.631445 Write Rank1 MR1 =0xd6
1576 14:47:44.631503 [Gating]
1577 14:47:44.631559 ==
1578 14:47:44.631617 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1579 14:47:44.631675 fsp= 1, odt_onoff= 1, Byte mode= 0
1580 14:47:44.631733 ==
1581 14:47:44.631790 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1582 14:47:44.631850 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1583 14:47:44.631909 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1584 14:47:44.631967 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1585 14:47:44.632026 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1586 14:47:44.632085 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1587 14:47:44.632143 [Byte 0] Lead/lag falling Transition (3, 1, 20)
1588 14:47:44.632201 [Byte 1] Lead/lag falling Transition (3, 1, 20)
1589 14:47:44.632260 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1590 14:47:44.632318 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1591 14:47:44.632378 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1592 14:47:44.632437 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1593 14:47:44.632496 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1594 14:47:44.632555 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1595 14:47:44.632613 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1596 14:47:44.632672 [Byte 0] Lead/lag Transition tap number (8)
1597 14:47:44.632729 3 2 20 |201 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1598 14:47:44.632789 [Byte 1] Lead/lag Transition tap number (9)
1599 14:47:44.632847 3 2 24 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
1600 14:47:44.632906 3 2 28 |3534 504 |(11 11)(11 11) |(0 0)(0 0)| 0
1601 14:47:44.632965 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1602 14:47:44.633023 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1603 14:47:44.633082 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1604 14:47:44.633141 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1605 14:47:44.633200 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1606 14:47:44.633258 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1607 14:47:44.633348 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1608 14:47:44.633449 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1609 14:47:44.633513 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1610 14:47:44.633573 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1611 14:47:44.633632 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1612 14:47:44.633692 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1613 14:47:44.633750 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1614 14:47:44.633809 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1615 14:47:44.633868 3 4 24 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1616 14:47:44.633927 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1617 14:47:44.633986 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1618 14:47:44.634045 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1619 14:47:44.634105 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1620 14:47:44.634163 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1621 14:47:44.634222 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1622 14:47:44.634479 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1623 14:47:44.634547 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1624 14:47:44.634608 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1625 14:47:44.634668 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1626 14:47:44.634727 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1627 14:47:44.634786 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1628 14:47:44.634846 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1629 14:47:44.634905 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1630 14:47:44.634964 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1631 14:47:44.635023 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1632 14:47:44.635083 [Byte 0] Lead/lag Transition tap number (2)
1633 14:47:44.635142 [Byte 1] Lead/lag Transition tap number (2)
1634 14:47:44.635200 3 6 20 |403 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1635 14:47:44.635260 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1636 14:47:44.635319 [Byte 0]First pass (3, 6, 24)
1637 14:47:44.635378 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1638 14:47:44.635437 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1639 14:47:44.635497 [Byte 1]First pass (3, 7, 0)
1640 14:47:44.635555 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1641 14:47:44.635614 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1642 14:47:44.635673 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1643 14:47:44.635732 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1644 14:47:44.635791 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1645 14:47:44.635851 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1646 14:47:44.635909 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1647 14:47:44.635968 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1648 14:47:44.636028 All bytes gating window > 1UI, Early break!
1649 14:47:44.636085
1650 14:47:44.636143 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1651 14:47:44.636201
1652 14:47:44.636258 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
1653 14:47:44.636315
1654 14:47:44.636372
1655 14:47:44.636439
1656 14:47:44.636497 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1657 14:47:44.636556
1658 14:47:44.636613 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1659 14:47:44.636671
1660 14:47:44.636727
1661 14:47:44.636785 Write Rank1 MR1 =0x56
1662 14:47:44.636842
1663 14:47:44.636899 best RODT dly(2T, 0.5T) = (2, 3)
1664 14:47:44.636957
1665 14:47:44.637014 best RODT dly(2T, 0.5T) = (2, 3)
1666 14:47:44.637071 ==
1667 14:47:44.637129 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1668 14:47:44.637187 fsp= 1, odt_onoff= 1, Byte mode= 0
1669 14:47:44.637245 ==
1670 14:47:44.637303 Start DQ dly to find pass range UseTestEngine =0
1671 14:47:44.637361 x-axis: bit #, y-axis: DQ dly (-127~63)
1672 14:47:44.637419 RX Vref Scan = 0
1673 14:47:44.637486 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1674 14:47:44.637546 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1675 14:47:44.637605 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1676 14:47:44.637664 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1677 14:47:44.637723 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1678 14:47:44.637782 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1679 14:47:44.637841 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1680 14:47:44.637899 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1681 14:47:44.637958 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1682 14:47:44.638017 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1683 14:47:44.638075 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1684 14:47:44.638134 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1685 14:47:44.638193 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1686 14:47:44.638252 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1687 14:47:44.638310 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1688 14:47:44.638369 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1689 14:47:44.638428 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1690 14:47:44.638485 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1691 14:47:44.638544 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1692 14:47:44.638603 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1693 14:47:44.638662 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1694 14:47:44.638720 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1695 14:47:44.638778 -4, [0] xxxxxxxx oxxxxxxx [MSB]
1696 14:47:44.638836 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1697 14:47:44.638895 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1698 14:47:44.638953 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1699 14:47:44.639012 0, [0] xxxoxoxx ooxoooxx [MSB]
1700 14:47:44.639071 1, [0] xxxoxoox ooxoooxx [MSB]
1701 14:47:44.639130 2, [0] xxxoxoox ooxoooxx [MSB]
1702 14:47:44.639188 3, [0] xxxooooo ooxoooox [MSB]
1703 14:47:44.639247 4, [0] xoxooooo ooxoooox [MSB]
1704 14:47:44.639305 5, [0] ooxooooo ooxooooo [MSB]
1705 14:47:44.639371 32, [0] oooxoooo oooooooo [MSB]
1706 14:47:44.639431 33, [0] oooxoooo xooooooo [MSB]
1707 14:47:44.639490 34, [0] oooxoooo xooooooo [MSB]
1708 14:47:44.639550 35, [0] oooxoxoo xxoxoooo [MSB]
1709 14:47:44.639608 36, [0] oooxoxxo xxoxxooo [MSB]
1710 14:47:44.639667 37, [0] oooxoxxx xxoxxxxo [MSB]
1711 14:47:44.639726 38, [0] oooxoxxx xxoxxxxo [MSB]
1712 14:47:44.639786 39, [0] ooxxxxxx xxoxxxxx [MSB]
1713 14:47:44.639845 40, [0] xoxxxxxx xxoxxxxx [MSB]
1714 14:47:44.639907 41, [0] xxxxxxxx xxoxxxxx [MSB]
1715 14:47:44.639972 42, [0] xxxxxxxx xxoxxxxx [MSB]
1716 14:47:44.640030 43, [0] xxxxxxxx xxxxxxxx [MSB]
1717 14:47:44.640089 iDelay=43, Bit 0, Center 22 (5 ~ 39) 35
1718 14:47:44.640148 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1719 14:47:44.640206 iDelay=43, Bit 2, Center 22 (6 ~ 38) 33
1720 14:47:44.640263 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
1721 14:47:44.640322 iDelay=43, Bit 4, Center 20 (3 ~ 38) 36
1722 14:47:44.640380 iDelay=43, Bit 5, Center 17 (0 ~ 34) 35
1723 14:47:44.640438 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
1724 14:47:44.640495 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1725 14:47:44.640553 iDelay=43, Bit 8, Center 14 (-4 ~ 32) 37
1726 14:47:44.640610 iDelay=43, Bit 9, Center 17 (0 ~ 34) 35
1727 14:47:44.640668 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1728 14:47:44.640726 iDelay=43, Bit 11, Center 16 (-2 ~ 34) 37
1729 14:47:44.640783 iDelay=43, Bit 12, Center 17 (0 ~ 35) 36
1730 14:47:44.640841 iDelay=43, Bit 13, Center 18 (0 ~ 36) 37
1731 14:47:44.640898 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
1732 14:47:44.640956 iDelay=43, Bit 15, Center 21 (5 ~ 38) 34
1733 14:47:44.641013 ==
1734 14:47:44.641071 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1735 14:47:44.641129 fsp= 1, odt_onoff= 1, Byte mode= 0
1736 14:47:44.641187 ==
1737 14:47:44.641244 DQS Delay:
1738 14:47:44.641302 DQS0 = 0, DQS1 = 0
1739 14:47:44.641359 DQM Delay:
1740 14:47:44.641416 DQM0 = 19, DQM1 = 18
1741 14:47:44.641484 DQ Delay:
1742 14:47:44.641542 DQ0 =22, DQ1 =22, DQ2 =22, DQ3 =14
1743 14:47:44.641600 DQ4 =20, DQ5 =17, DQ6 =18, DQ7 =19
1744 14:47:44.641854 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =16
1745 14:47:44.641922 DQ12 =17, DQ13 =18, DQ14 =19, DQ15 =21
1746 14:47:44.641980
1747 14:47:44.642038
1748 14:47:44.642096 DramC Write-DBI off
1749 14:47:44.642154 ==
1750 14:47:44.642211 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1751 14:47:44.642271 fsp= 1, odt_onoff= 1, Byte mode= 0
1752 14:47:44.642329 ==
1753 14:47:44.642387 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1754 14:47:44.642444
1755 14:47:44.642534 Begin, DQ Scan Range 919~1175
1756 14:47:44.642594
1757 14:47:44.642652
1758 14:47:44.642710 TX Vref Scan disable
1759 14:47:44.642768 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1760 14:47:44.642828 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1761 14:47:44.642887 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1762 14:47:44.642946 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1763 14:47:44.643005 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1764 14:47:44.643064 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1765 14:47:44.643123 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1766 14:47:44.643182 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1767 14:47:44.643241 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1768 14:47:44.643300 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1769 14:47:44.643365 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1770 14:47:44.643425 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1771 14:47:44.643484 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1772 14:47:44.643543 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1773 14:47:44.643601 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1774 14:47:44.643661 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1775 14:47:44.643719 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1776 14:47:44.643778 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1777 14:47:44.643837 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1778 14:47:44.643896 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1779 14:47:44.643955 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1780 14:47:44.644013 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1781 14:47:44.644072 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1782 14:47:44.644131 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1783 14:47:44.644190 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1784 14:47:44.644248 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1785 14:47:44.644307 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1786 14:47:44.644365 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1787 14:47:44.644424 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1788 14:47:44.644491 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1789 14:47:44.644552 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1790 14:47:44.644612 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1791 14:47:44.644671 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1792 14:47:44.644730 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1793 14:47:44.644789 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1794 14:47:44.644847 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1795 14:47:44.644906 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1796 14:47:44.644965 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1797 14:47:44.645023 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1798 14:47:44.645082 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1799 14:47:44.645141 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1800 14:47:44.645199 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1801 14:47:44.645258 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1802 14:47:44.645316 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1803 14:47:44.645374 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1804 14:47:44.645441 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1805 14:47:44.645503 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1806 14:47:44.645562 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1807 14:47:44.645621 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1808 14:47:44.645681 968 |3 6 8|[0] xxxxxxxx oxxxxxxx [MSB]
1809 14:47:44.645740 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1810 14:47:44.645798 970 |3 6 10|[0] xxxxxxxx oxxoxoxx [MSB]
1811 14:47:44.645857 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1812 14:47:44.645915 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1813 14:47:44.645973 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1814 14:47:44.646031 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1815 14:47:44.646090 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1816 14:47:44.646149 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1817 14:47:44.646208 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1818 14:47:44.646278 987 |3 6 27|[0] oooooooo oooxoooo [MSB]
1819 14:47:44.646338 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1820 14:47:44.646397 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1821 14:47:44.646456 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1822 14:47:44.646542 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1823 14:47:44.646605 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1824 14:47:44.646664 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1825 14:47:44.646724 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1826 14:47:44.646784 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1827 14:47:44.646843 996 |3 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
1828 14:47:44.646902 Byte0, DQ PI dly=985, DQM PI dly= 985
1829 14:47:44.646960 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1830 14:47:44.647019
1831 14:47:44.647077 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1832 14:47:44.647135
1833 14:47:44.647192 Byte1, DQ PI dly=979, DQM PI dly= 979
1834 14:47:44.647250 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1835 14:47:44.647308
1836 14:47:44.647365 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1837 14:47:44.647423
1838 14:47:44.647479 ==
1839 14:47:44.647537 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1840 14:47:44.647594 fsp= 1, odt_onoff= 1, Byte mode= 0
1841 14:47:44.647652 ==
1842 14:47:44.647709 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1843 14:47:44.647767
1844 14:47:44.647824 Begin, DQ Scan Range 955~1019
1845 14:47:44.647882 wait MRW command Rank1 MR14 =0x0 fired (1)
1846 14:47:44.647941 Write Rank1 MR14 =0x0
1847 14:47:44.647998
1848 14:47:44.648055 CH=0, VrefRange= 0, VrefLevel = 0
1849 14:47:44.648113 TX Bit0 (980~992) 13 986, Bit8 (972~983) 12 977,
1850 14:47:44.648171 TX Bit1 (978~992) 15 985, Bit9 (974~983) 10 978,
1851 14:47:44.648230 TX Bit2 (980~991) 12 985, Bit10 (976~990) 15 983,
1852 14:47:44.648288 TX Bit3 (974~987) 14 980, Bit11 (973~982) 10 977,
1853 14:47:44.648346 TX Bit4 (978~991) 14 984, Bit12 (975~983) 9 979,
1854 14:47:44.648403 TX Bit5 (977~987) 11 982, Bit13 (974~984) 11 979,
1855 14:47:44.648465 TX Bit6 (977~990) 14 983, Bit14 (974~988) 15 981,
1856 14:47:44.648730 TX Bit7 (979~992) 14 985, Bit15 (977~989) 13 983,
1857 14:47:44.648797
1858 14:47:44.648856 Write Rank1 MR14 =0x2
1859 14:47:44.648914
1860 14:47:44.648972 CH=0, VrefRange= 0, VrefLevel = 2
1861 14:47:44.649030 TX Bit0 (979~992) 14 985, Bit8 (970~983) 14 976,
1862 14:47:44.649089 TX Bit1 (978~993) 16 985, Bit9 (974~983) 10 978,
1863 14:47:44.649147 TX Bit2 (980~991) 12 985, Bit10 (976~990) 15 983,
1864 14:47:44.649206 TX Bit3 (974~988) 15 981, Bit11 (972~982) 11 977,
1865 14:47:44.649265 TX Bit4 (978~992) 15 985, Bit12 (974~983) 10 978,
1866 14:47:44.649323 TX Bit5 (977~988) 12 982, Bit13 (973~984) 12 978,
1867 14:47:44.649382 TX Bit6 (977~991) 15 984, Bit14 (973~989) 17 981,
1868 14:47:44.649451 TX Bit7 (978~992) 15 985, Bit15 (976~990) 15 983,
1869 14:47:44.649511
1870 14:47:44.649578 Write Rank1 MR14 =0x4
1871 14:47:44.649636
1872 14:47:44.649694 CH=0, VrefRange= 0, VrefLevel = 4
1873 14:47:44.649752 TX Bit0 (979~993) 15 986, Bit8 (969~983) 15 976,
1874 14:47:44.649811 TX Bit1 (978~993) 16 985, Bit9 (973~984) 12 978,
1875 14:47:44.649869 TX Bit2 (979~992) 14 985, Bit10 (976~991) 16 983,
1876 14:47:44.649927 TX Bit3 (973~989) 17 981, Bit11 (972~983) 12 977,
1877 14:47:44.649986 TX Bit4 (978~992) 15 985, Bit12 (974~984) 11 979,
1878 14:47:44.650045 TX Bit5 (977~989) 13 983, Bit13 (973~985) 13 979,
1879 14:47:44.650103 TX Bit6 (977~992) 16 984, Bit14 (973~989) 17 981,
1880 14:47:44.650161 TX Bit7 (978~993) 16 985, Bit15 (976~990) 15 983,
1881 14:47:44.650220
1882 14:47:44.650277 Write Rank1 MR14 =0x6
1883 14:47:44.650334
1884 14:47:44.650392 CH=0, VrefRange= 0, VrefLevel = 6
1885 14:47:44.650450 TX Bit0 (978~993) 16 985, Bit8 (969~984) 16 976,
1886 14:47:44.650517 TX Bit1 (978~994) 17 986, Bit9 (973~984) 12 978,
1887 14:47:44.650577 TX Bit2 (979~993) 15 986, Bit10 (976~991) 16 983,
1888 14:47:44.650635 TX Bit3 (973~990) 18 981, Bit11 (972~983) 12 977,
1889 14:47:44.650693 TX Bit4 (978~993) 16 985, Bit12 (974~985) 12 979,
1890 14:47:44.650751 TX Bit5 (976~990) 15 983, Bit13 (973~986) 14 979,
1891 14:47:44.650809 TX Bit6 (976~992) 17 984, Bit14 (973~990) 18 981,
1892 14:47:44.650867 TX Bit7 (978~993) 16 985, Bit15 (976~991) 16 983,
1893 14:47:44.650925
1894 14:47:44.650983 Write Rank1 MR14 =0x8
1895 14:47:44.651041
1896 14:47:44.651098 CH=0, VrefRange= 0, VrefLevel = 8
1897 14:47:44.651156 TX Bit0 (978~994) 17 986, Bit8 (969~984) 16 976,
1898 14:47:44.651214 TX Bit1 (978~994) 17 986, Bit9 (973~985) 13 979,
1899 14:47:44.651273 TX Bit2 (979~993) 15 986, Bit10 (976~992) 17 984,
1900 14:47:44.651331 TX Bit3 (972~990) 19 981, Bit11 (971~984) 14 977,
1901 14:47:44.651390 TX Bit4 (978~993) 16 985, Bit12 (973~985) 13 979,
1902 14:47:44.651448 TX Bit5 (976~991) 16 983, Bit13 (973~987) 15 980,
1903 14:47:44.651505 TX Bit6 (976~992) 17 984, Bit14 (972~990) 19 981,
1904 14:47:44.651563 TX Bit7 (978~994) 17 986, Bit15 (975~991) 17 983,
1905 14:47:44.651621
1906 14:47:44.651678 Write Rank1 MR14 =0xa
1907 14:47:44.651735
1908 14:47:44.651792 CH=0, VrefRange= 0, VrefLevel = 10
1909 14:47:44.651849 TX Bit0 (978~994) 17 986, Bit8 (969~985) 17 977,
1910 14:47:44.651907 TX Bit1 (978~995) 18 986, Bit9 (972~986) 15 979,
1911 14:47:44.651965 TX Bit2 (978~993) 16 985, Bit10 (975~992) 18 983,
1912 14:47:44.652023 TX Bit3 (972~991) 20 981, Bit11 (970~984) 15 977,
1913 14:47:44.652081 TX Bit4 (977~994) 18 985, Bit12 (973~985) 13 979,
1914 14:47:44.652139 TX Bit5 (976~991) 16 983, Bit13 (972~988) 17 980,
1915 14:47:44.652197 TX Bit6 (976~993) 18 984, Bit14 (972~991) 20 981,
1916 14:47:44.652255 TX Bit7 (978~994) 17 986, Bit15 (975~992) 18 983,
1917 14:47:44.652313
1918 14:47:44.652370 Write Rank1 MR14 =0xc
1919 14:47:44.652428
1920 14:47:44.652505 CH=0, VrefRange= 0, VrefLevel = 12
1921 14:47:44.652575 TX Bit0 (978~995) 18 986, Bit8 (969~986) 18 977,
1922 14:47:44.652634 TX Bit1 (977~995) 19 986, Bit9 (972~987) 16 979,
1923 14:47:44.652693 TX Bit2 (978~994) 17 986, Bit10 (975~992) 18 983,
1924 14:47:44.652752 TX Bit3 (972~991) 20 981, Bit11 (970~985) 16 977,
1925 14:47:44.652810 TX Bit4 (978~994) 17 986, Bit12 (972~987) 16 979,
1926 14:47:44.652876 TX Bit5 (975~992) 18 983, Bit13 (972~989) 18 980,
1927 14:47:44.652934 TX Bit6 (976~993) 18 984, Bit14 (972~991) 20 981,
1928 14:47:44.652992 TX Bit7 (978~995) 18 986, Bit15 (975~992) 18 983,
1929 14:47:44.653050
1930 14:47:44.653107 Write Rank1 MR14 =0xe
1931 14:47:44.653165
1932 14:47:44.653222 CH=0, VrefRange= 0, VrefLevel = 14
1933 14:47:44.653280 TX Bit0 (978~996) 19 987, Bit8 (968~987) 20 977,
1934 14:47:44.653338 TX Bit1 (977~996) 20 986, Bit9 (971~987) 17 979,
1935 14:47:44.653396 TX Bit2 (978~995) 18 986, Bit10 (975~993) 19 984,
1936 14:47:44.653465 TX Bit3 (971~991) 21 981, Bit11 (970~985) 16 977,
1937 14:47:44.653524 TX Bit4 (977~995) 19 986, Bit12 (972~987) 16 979,
1938 14:47:44.653583 TX Bit5 (975~992) 18 983, Bit13 (971~989) 19 980,
1939 14:47:44.653641 TX Bit6 (976~994) 19 985, Bit14 (972~991) 20 981,
1940 14:47:44.653699 TX Bit7 (978~995) 18 986, Bit15 (975~993) 19 984,
1941 14:47:44.653757
1942 14:47:44.653815 Write Rank1 MR14 =0x10
1943 14:47:44.653872
1944 14:47:44.653930 CH=0, VrefRange= 0, VrefLevel = 16
1945 14:47:44.653988 TX Bit0 (978~996) 19 987, Bit8 (968~988) 21 978,
1946 14:47:44.654046 TX Bit1 (977~996) 20 986, Bit9 (971~989) 19 980,
1947 14:47:44.654104 TX Bit2 (978~996) 19 987, Bit10 (975~993) 19 984,
1948 14:47:44.654163 TX Bit3 (971~991) 21 981, Bit11 (969~986) 18 977,
1949 14:47:44.654221 TX Bit4 (977~995) 19 986, Bit12 (972~989) 18 980,
1950 14:47:44.654279 TX Bit5 (975~992) 18 983, Bit13 (970~990) 21 980,
1951 14:47:44.654337 TX Bit6 (975~994) 20 984, Bit14 (971~992) 22 981,
1952 14:47:44.654394 TX Bit7 (977~996) 20 986, Bit15 (975~993) 19 984,
1953 14:47:44.654452
1954 14:47:44.654523 Write Rank1 MR14 =0x12
1955 14:47:44.654619
1956 14:47:44.654703 CH=0, VrefRange= 0, VrefLevel = 18
1957 14:47:44.654763 TX Bit0 (978~997) 20 987, Bit8 (968~988) 21 978,
1958 14:47:44.654823 TX Bit1 (977~997) 21 987, Bit9 (970~989) 20 979,
1959 14:47:44.655080 TX Bit2 (978~995) 18 986, Bit10 (975~994) 20 984,
1960 14:47:44.655146 TX Bit3 (970~992) 23 981, Bit11 (969~987) 19 978,
1961 14:47:44.655206 TX Bit4 (977~996) 20 986, Bit12 (971~989) 19 980,
1962 14:47:44.655264 TX Bit5 (975~993) 19 984, Bit13 (970~990) 21 980,
1963 14:47:44.655322 TX Bit6 (975~995) 21 985, Bit14 (970~992) 23 981,
1964 14:47:44.655380 TX Bit7 (977~997) 21 987, Bit15 (975~994) 20 984,
1965 14:47:44.655439
1966 14:47:44.655496 Write Rank1 MR14 =0x14
1967 14:47:44.655554
1968 14:47:44.655611 CH=0, VrefRange= 0, VrefLevel = 20
1969 14:47:44.655669 TX Bit0 (977~998) 22 987, Bit8 (968~989) 22 978,
1970 14:47:44.655728 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
1971 14:47:44.655786 TX Bit2 (978~997) 20 987, Bit10 (974~995) 22 984,
1972 14:47:44.781009 TX Bit3 (970~992) 23 981, Bit11 (968~987) 20 977,
1973 14:47:44.781421 TX Bit4 (977~997) 21 987, Bit12 (970~990) 21 980,
1974 14:47:44.781772 TX Bit5 (974~993) 20 983, Bit13 (970~991) 22 980,
1975 14:47:44.782054 TX Bit6 (975~995) 21 985, Bit14 (970~992) 23 981,
1976 14:47:44.782324 TX Bit7 (977~998) 22 987, Bit15 (974~994) 21 984,
1977 14:47:44.782586
1978 14:47:44.782853 Write Rank1 MR14 =0x16
1979 14:47:44.783127
1980 14:47:44.783377 CH=0, VrefRange= 0, VrefLevel = 22
1981 14:47:44.783630 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
1982 14:47:44.783883 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1983 14:47:44.784132 TX Bit2 (978~998) 21 988, Bit10 (974~995) 22 984,
1984 14:47:44.784418 TX Bit3 (970~993) 24 981, Bit11 (968~989) 22 978,
1985 14:47:44.784673 TX Bit4 (976~998) 23 987, Bit12 (970~990) 21 980,
1986 14:47:44.784963 TX Bit5 (974~994) 21 984, Bit13 (969~991) 23 980,
1987 14:47:44.785226 TX Bit6 (975~995) 21 985, Bit14 (970~993) 24 981,
1988 14:47:44.785494 TX Bit7 (977~998) 22 987, Bit15 (973~995) 23 984,
1989 14:47:44.785745
1990 14:47:44.785990 Write Rank1 MR14 =0x18
1991 14:47:44.786238
1992 14:47:44.786479 CH=0, VrefRange= 0, VrefLevel = 24
1993 14:47:44.786725 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1994 14:47:44.787051 TX Bit1 (976~999) 24 987, Bit9 (969~990) 22 979,
1995 14:47:44.787384 TX Bit2 (977~998) 22 987, Bit10 (974~997) 24 985,
1996 14:47:44.787792 TX Bit3 (970~993) 24 981, Bit11 (968~990) 23 979,
1997 14:47:44.788174 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
1998 14:47:44.788550 TX Bit5 (973~994) 22 983, Bit13 (969~991) 23 980,
1999 14:47:44.788821 TX Bit6 (974~996) 23 985, Bit14 (969~993) 25 981,
2000 14:47:44.789160 TX Bit7 (977~999) 23 988, Bit15 (974~995) 22 984,
2001 14:47:44.789418
2002 14:47:44.789706 Write Rank1 MR14 =0x1a
2003 14:47:44.789956
2004 14:47:44.790199 CH=0, VrefRange= 0, VrefLevel = 26
2005 14:47:44.790445 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
2006 14:47:44.790692 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
2007 14:47:44.790956 TX Bit2 (977~999) 23 988, Bit10 (974~996) 23 985,
2008 14:47:44.791241 TX Bit3 (969~993) 25 981, Bit11 (967~990) 24 978,
2009 14:47:44.791494 TX Bit4 (976~999) 24 987, Bit12 (969~991) 23 980,
2010 14:47:44.791740 TX Bit5 (972~995) 24 983, Bit13 (968~992) 25 980,
2011 14:47:44.791988 TX Bit6 (974~997) 24 985, Bit14 (969~993) 25 981,
2012 14:47:44.792233 TX Bit7 (976~999) 24 987, Bit15 (973~996) 24 984,
2013 14:47:44.792477
2014 14:47:44.792722 Write Rank1 MR14 =0x1c
2015 14:47:44.793094
2016 14:47:44.793549 CH=0, VrefRange= 0, VrefLevel = 28
2017 14:47:44.793817 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
2018 14:47:44.794070 TX Bit1 (976~999) 24 987, Bit9 (969~991) 23 980,
2019 14:47:44.794317 TX Bit2 (977~999) 23 988, Bit10 (974~998) 25 986,
2020 14:47:44.794612 TX Bit3 (970~993) 24 981, Bit11 (967~990) 24 978,
2021 14:47:44.794866 TX Bit4 (976~999) 24 987, Bit12 (969~991) 23 980,
2022 14:47:44.795113 TX Bit5 (973~996) 24 984, Bit13 (969~992) 24 980,
2023 14:47:44.795358 TX Bit6 (974~998) 25 986, Bit14 (969~993) 25 981,
2024 14:47:44.795601 TX Bit7 (976~999) 24 987, Bit15 (974~996) 23 985,
2025 14:47:44.795848
2026 14:47:44.796093 Write Rank1 MR14 =0x1e
2027 14:47:44.796333
2028 14:47:44.796575 CH=0, VrefRange= 0, VrefLevel = 30
2029 14:47:44.796819 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
2030 14:47:44.797062 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
2031 14:47:44.797310 TX Bit2 (977~999) 23 988, Bit10 (973~998) 26 985,
2032 14:47:44.797640 TX Bit3 (969~993) 25 981, Bit11 (967~990) 24 978,
2033 14:47:44.798012 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
2034 14:47:44.798405 TX Bit5 (972~995) 24 983, Bit13 (968~991) 24 979,
2035 14:47:44.798774 TX Bit6 (974~998) 25 986, Bit14 (970~993) 24 981,
2036 14:47:44.799119 TX Bit7 (976~1000) 25 988, Bit15 (972~996) 25 984,
2037 14:47:44.799381
2038 14:47:44.799633 Write Rank1 MR14 =0x20
2039 14:47:44.799881
2040 14:47:44.800126 CH=0, VrefRange= 0, VrefLevel = 32
2041 14:47:44.800373 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
2042 14:47:44.800623 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
2043 14:47:44.800899 TX Bit2 (977~999) 23 988, Bit10 (973~998) 26 985,
2044 14:47:44.801156 TX Bit3 (969~993) 25 981, Bit11 (967~990) 24 978,
2045 14:47:44.801505 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
2046 14:47:44.801775 TX Bit5 (972~995) 24 983, Bit13 (968~991) 24 979,
2047 14:47:44.802023 TX Bit6 (974~998) 25 986, Bit14 (970~993) 24 981,
2048 14:47:44.802269 TX Bit7 (976~1000) 25 988, Bit15 (972~996) 25 984,
2049 14:47:44.802515
2050 14:47:44.802757 Write Rank1 MR14 =0x22
2051 14:47:44.803000
2052 14:47:44.803242 CH=0, VrefRange= 0, VrefLevel = 34
2053 14:47:44.803501 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
2054 14:47:44.803767 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
2055 14:47:44.804015 TX Bit2 (977~999) 23 988, Bit10 (973~998) 26 985,
2056 14:47:44.804301 TX Bit3 (969~993) 25 981, Bit11 (967~990) 24 978,
2057 14:47:44.804547 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
2058 14:47:44.805136 TX Bit5 (972~995) 24 983, Bit13 (968~991) 24 979,
2059 14:47:44.805412 TX Bit6 (974~998) 25 986, Bit14 (970~993) 24 981,
2060 14:47:44.805705 TX Bit7 (976~1000) 25 988, Bit15 (972~996) 25 984,
2061 14:47:44.805959
2062 14:47:44.806203 Write Rank1 MR14 =0x24
2063 14:47:44.806448
2064 14:47:44.806689 CH=0, VrefRange= 0, VrefLevel = 36
2065 14:47:44.806935 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
2066 14:47:44.807184 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
2067 14:47:44.807449 TX Bit2 (977~999) 23 988, Bit10 (973~998) 26 985,
2068 14:47:44.807725 TX Bit3 (969~993) 25 981, Bit11 (967~990) 24 978,
2069 14:47:44.807977 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
2070 14:47:44.808208 TX Bit5 (972~995) 24 983, Bit13 (968~991) 24 979,
2071 14:47:44.808386 TX Bit6 (974~998) 25 986, Bit14 (970~993) 24 981,
2072 14:47:44.808585 TX Bit7 (976~1000) 25 988, Bit15 (972~996) 25 984,
2073 14:47:44.808854
2074 14:47:44.809137
2075 14:47:44.809404 TX Vref found, early break! 368< 370
2076 14:47:44.809686 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2077 14:47:44.809876 u1DelayCellOfst[0]=9 cells (7 PI)
2078 14:47:44.810061 u1DelayCellOfst[1]=9 cells (7 PI)
2079 14:47:44.810243 u1DelayCellOfst[2]=9 cells (7 PI)
2080 14:47:44.810420 u1DelayCellOfst[3]=0 cells (0 PI)
2081 14:47:44.810595 u1DelayCellOfst[4]=7 cells (6 PI)
2082 14:47:44.810770 u1DelayCellOfst[5]=2 cells (2 PI)
2083 14:47:44.810970 u1DelayCellOfst[6]=6 cells (5 PI)
2084 14:47:44.811153 u1DelayCellOfst[7]=9 cells (7 PI)
2085 14:47:44.811383 Byte0, DQ PI dly=981, DQM PI dly= 984
2086 14:47:44.811574 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2087 14:47:44.811755
2088 14:47:44.811933 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2089 14:47:44.812154
2090 14:47:44.812339 u1DelayCellOfst[8]=0 cells (0 PI)
2091 14:47:44.812518 u1DelayCellOfst[9]=1 cells (1 PI)
2092 14:47:44.812696 u1DelayCellOfst[10]=9 cells (7 PI)
2093 14:47:44.812873 u1DelayCellOfst[11]=0 cells (0 PI)
2094 14:47:44.813048 u1DelayCellOfst[12]=2 cells (2 PI)
2095 14:47:44.813212 u1DelayCellOfst[13]=1 cells (1 PI)
2096 14:47:44.813365 u1DelayCellOfst[14]=3 cells (3 PI)
2097 14:47:44.813632 u1DelayCellOfst[15]=7 cells (6 PI)
2098 14:47:44.813849 Byte1, DQ PI dly=978, DQM PI dly= 981
2099 14:47:44.814093 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2100 14:47:44.814305
2101 14:47:44.814518 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2102 14:47:44.814730
2103 14:47:44.814940 Write Rank1 MR14 =0x1e
2104 14:47:44.815149
2105 14:47:44.815379 Final TX Range 0 Vref 30
2106 14:47:44.815591
2107 14:47:44.815804 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2108 14:47:44.816016
2109 14:47:44.816230 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2110 14:47:44.816452 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2111 14:47:44.816669 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2112 14:47:44.816880 Write Rank1 MR3 =0xb0
2113 14:47:44.817115 DramC Write-DBI on
2114 14:47:44.817327 ==
2115 14:47:44.817580 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2116 14:47:44.817796 fsp= 1, odt_onoff= 1, Byte mode= 0
2117 14:47:44.818007 ==
2118 14:47:44.818208 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2119 14:47:44.818381
2120 14:47:44.818552 Begin, DQ Scan Range 701~765
2121 14:47:44.818739
2122 14:47:44.818909
2123 14:47:44.819080 TX Vref Scan disable
2124 14:47:44.819252 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2125 14:47:44.819452 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2126 14:47:44.819632 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2127 14:47:44.819809 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2128 14:47:44.819986 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2129 14:47:44.820162 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2130 14:47:44.820339 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2131 14:47:44.820516 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2132 14:47:44.820707 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2133 14:47:44.820885 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2134 14:47:44.821063 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2135 14:47:44.821240 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2136 14:47:44.821470 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2137 14:47:44.821597 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2138 14:47:44.821713 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2139 14:47:44.821826 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2140 14:47:44.821940 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2141 14:47:44.822054 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2142 14:47:44.822167 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2143 14:47:44.822279 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2144 14:47:44.822391 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2145 14:47:44.822504 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2146 14:47:44.822616 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2147 14:47:44.822728 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2148 14:47:44.822840 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2149 14:47:44.822953 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2150 14:47:44.823066 Byte0, DQ PI dly=731, DQM PI dly= 731
2151 14:47:44.823176 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2152 14:47:44.823270
2153 14:47:44.823362 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2154 14:47:44.823455
2155 14:47:44.823546 Byte1, DQ PI dly=724, DQM PI dly= 724
2156 14:47:44.823639 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2157 14:47:44.823732
2158 14:47:44.823839 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2159 14:47:44.823934
2160 14:47:44.824025 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2161 14:47:44.824120 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2162 14:47:44.824214 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2163 14:47:44.824308 Write Rank1 MR3 =0x30
2164 14:47:44.824400 DramC Write-DBI off
2165 14:47:44.824493
2166 14:47:44.824585 [DATLAT]
2167 14:47:44.824677 Freq=1600, CH0 RK1, use_rxtx_scan=0
2168 14:47:44.824770
2169 14:47:44.824863 DATLAT Default: 0x10
2170 14:47:44.824955 7, 0xFFFF, sum=0
2171 14:47:44.825050 8, 0xFFFF, sum=0
2172 14:47:44.825143 9, 0xFFFF, sum=0
2173 14:47:44.825237 10, 0xFFFF, sum=0
2174 14:47:44.825331 11, 0xFFFF, sum=0
2175 14:47:44.825425 12, 0xFFFF, sum=0
2176 14:47:44.825526 13, 0xFFFF, sum=0
2177 14:47:44.825620 14, 0x0, sum=1
2178 14:47:44.825715 15, 0x0, sum=2
2179 14:47:44.825808 16, 0x0, sum=3
2180 14:47:44.825900 17, 0x0, sum=4
2181 14:47:44.826217 pattern=2 first_step=14 total pass=5 best_step=16
2182 14:47:44.826321 ==
2183 14:47:44.826417 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2184 14:47:44.826512 fsp= 1, odt_onoff= 1, Byte mode= 0
2185 14:47:44.826606 ==
2186 14:47:44.826700 Start DQ dly to find pass range UseTestEngine =1
2187 14:47:44.826793 x-axis: bit #, y-axis: DQ dly (-127~63)
2188 14:47:44.826887 RX Vref Scan = 0
2189 14:47:44.826981 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2190 14:47:44.827091 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2191 14:47:44.827187 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2192 14:47:44.827282 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2193 14:47:44.827377 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2194 14:47:44.827471 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2195 14:47:44.827565 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2196 14:47:44.827659 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2197 14:47:44.827752 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2198 14:47:44.827847 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2199 14:47:44.827942 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2200 14:47:44.828037 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2201 14:47:44.828139 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2202 14:47:44.828231 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2203 14:47:44.828313 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2204 14:47:44.828394 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2205 14:47:44.828476 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2206 14:47:44.828557 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2207 14:47:44.828639 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2208 14:47:44.828721 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2209 14:47:44.828802 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2210 14:47:44.828883 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2211 14:47:44.828965 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2212 14:47:44.829047 -3, [0] xxxoxxxx oxxxxxxx [MSB]
2213 14:47:44.829129 -2, [0] xxxoxxxx oxxoxoxx [MSB]
2214 14:47:44.829210 -1, [0] xxxoxxxx ooxoxoxx [MSB]
2215 14:47:44.829291 0, [0] xxxoxoxx ooxoooxx [MSB]
2216 14:47:44.829373 1, [0] xxxoxoox ooxoooxx [MSB]
2217 14:47:44.829465 2, [0] xxxoxooo ooxoooox [MSB]
2218 14:47:44.829548 3, [0] xxxoxooo ooxoooox [MSB]
2219 14:47:44.829629 4, [0] oxxoxooo ooxooooo [MSB]
2220 14:47:44.829711 5, [0] oooooooo ooxooooo [MSB]
2221 14:47:44.829792 32, [0] oooxoooo oooooooo [MSB]
2222 14:47:44.829874 33, [0] oooxoooo xooxoooo [MSB]
2223 14:47:44.829956 34, [0] oooxoooo xooxoooo [MSB]
2224 14:47:44.830037 35, [0] oooxoxoo xxoxxxoo [MSB]
2225 14:47:44.830119 36, [0] oooxoxxo xxoxxxoo [MSB]
2226 14:47:44.830200 37, [0] oooxoxxo xxoxxxxo [MSB]
2227 14:47:44.830292 38, [0] oooxoxxx xxoxxxxx [MSB]
2228 14:47:44.830376 39, [0] oxoxxxxx xxoxxxxx [MSB]
2229 14:47:44.830457 40, [0] xxoxxxxx xxoxxxxx [MSB]
2230 14:47:44.830538 41, [0] xxxxxxxx xxxxxxxx [MSB]
2231 14:47:44.830647 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2232 14:47:44.830730 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2233 14:47:44.830812 iDelay=41, Bit 2, Center 22 (5 ~ 40) 36
2234 14:47:44.830892 iDelay=41, Bit 3, Center 14 (-3 ~ 31) 35
2235 14:47:44.830972 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
2236 14:47:44.831052 iDelay=41, Bit 5, Center 17 (0 ~ 34) 35
2237 14:47:44.831132 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2238 14:47:44.831212 iDelay=41, Bit 7, Center 19 (2 ~ 37) 36
2239 14:47:44.831291 iDelay=41, Bit 8, Center 14 (-3 ~ 32) 36
2240 14:47:44.831371 iDelay=41, Bit 9, Center 16 (-1 ~ 34) 36
2241 14:47:44.831451 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
2242 14:47:44.831531 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2243 14:47:44.831610 iDelay=41, Bit 12, Center 17 (0 ~ 34) 35
2244 14:47:44.831690 iDelay=41, Bit 13, Center 16 (-2 ~ 34) 37
2245 14:47:44.831769 iDelay=41, Bit 14, Center 19 (2 ~ 36) 35
2246 14:47:44.831849 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
2247 14:47:44.831928 ==
2248 14:47:44.832008 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2249 14:47:44.832089 fsp= 1, odt_onoff= 1, Byte mode= 0
2250 14:47:44.832169 ==
2251 14:47:44.832249 DQS Delay:
2252 14:47:44.832328 DQS0 = 0, DQS1 = 0
2253 14:47:44.832408 DQM Delay:
2254 14:47:44.832487 DQM0 = 19, DQM1 = 17
2255 14:47:44.832567 DQ Delay:
2256 14:47:44.832647 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2257 14:47:44.832726 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
2258 14:47:44.832807 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2259 14:47:44.832886 DQ12 =17, DQ13 =16, DQ14 =19, DQ15 =20
2260 14:47:44.832966
2261 14:47:44.833044
2262 14:47:44.833136
2263 14:47:44.833206 [DramC_TX_OE_Calibration] TA2
2264 14:47:44.833277 Original DQ_B0 (3 6) =30, OEN = 27
2265 14:47:44.833349 Original DQ_B1 (3 6) =30, OEN = 27
2266 14:47:44.833419 23, 0x0, End_B0=23 End_B1=23
2267 14:47:44.833525 24, 0x0, End_B0=24 End_B1=24
2268 14:47:44.833598 25, 0x0, End_B0=25 End_B1=25
2269 14:47:44.833670 26, 0x0, End_B0=26 End_B1=26
2270 14:47:44.833741 27, 0x0, End_B0=27 End_B1=27
2271 14:47:44.833812 28, 0x0, End_B0=28 End_B1=28
2272 14:47:44.833900 29, 0x0, End_B0=29 End_B1=29
2273 14:47:44.833972 30, 0x0, End_B0=30 End_B1=30
2274 14:47:44.834043 31, 0xFFFF, End_B0=30 End_B1=30
2275 14:47:44.834115 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2276 14:47:44.834203 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2277 14:47:44.834278
2278 14:47:44.834352
2279 14:47:44.834423 Write Rank1 MR23 =0x3f
2280 14:47:44.834494 [DQSOSC]
2281 14:47:44.836978 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4a4, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2282 14:47:44.843730 CH0_RK1: MR19=0x202, MR18=0xA4A4, DQSOSC=465, MR23=63, INC=11, DEC=17
2283 14:47:44.846728 Write Rank1 MR23 =0x3f
2284 14:47:44.846857 [DQSOSC]
2285 14:47:44.853456 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6a6, (MSB)MR19= 0x202, tDQSOscB0 = 464 ps tDQSOscB1 = 464 ps
2286 14:47:44.856530 CH0 RK1: MR19=202, MR18=A6A6
2287 14:47:44.860132 [RxdqsGatingPostProcess] freq 1600
2288 14:47:44.866683 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2289 14:47:44.866783 Rank: 0
2290 14:47:44.870053 best DQS0 dly(2T, 0.5T) = (2, 6)
2291 14:47:44.873164 best DQS1 dly(2T, 0.5T) = (2, 6)
2292 14:47:44.876465 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2293 14:47:44.879363 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2294 14:47:44.879491 Rank: 1
2295 14:47:44.883051 best DQS0 dly(2T, 0.5T) = (2, 6)
2296 14:47:44.885973 best DQS1 dly(2T, 0.5T) = (2, 6)
2297 14:47:44.889471 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2298 14:47:44.892696 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2299 14:47:44.896196 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2300 14:47:44.899430 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2301 14:47:44.906040 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2302 14:47:44.906319 Write Rank0 MR13 =0x59
2303 14:47:44.909397 ==
2304 14:47:44.912424 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2305 14:47:44.916171 fsp= 1, odt_onoff= 1, Byte mode= 0
2306 14:47:44.916565 ==
2307 14:47:44.919071 === u2Vref_new: 0x56 --> 0x3a
2308 14:47:44.922386 === u2Vref_new: 0x58 --> 0x58
2309 14:47:44.925586 === u2Vref_new: 0x5a --> 0x5a
2310 14:47:44.928967 === u2Vref_new: 0x5c --> 0x78
2311 14:47:44.932178 === u2Vref_new: 0x5e --> 0x7a
2312 14:47:44.935398 === u2Vref_new: 0x60 --> 0x90
2313 14:47:44.938988 [CA 0] Center 37 (12~63) winsize 52
2314 14:47:44.942048 [CA 1] Center 37 (11~63) winsize 53
2315 14:47:44.945365 [CA 2] Center 35 (7~63) winsize 57
2316 14:47:44.948254 [CA 3] Center 34 (6~63) winsize 58
2317 14:47:44.951755 [CA 4] Center 34 (6~63) winsize 58
2318 14:47:44.954882 [CA 5] Center 29 (0~59) winsize 60
2319 14:47:44.955286
2320 14:47:44.958278 [CATrainingPosCal] consider 1 rank data
2321 14:47:44.961823 u2DelayCellTimex100 = 744/100 ps
2322 14:47:44.964817 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2323 14:47:44.967898 CA1 delay=37 (11~63),Diff = 8 PI (10 cell)
2324 14:47:44.971430 CA2 delay=35 (7~63),Diff = 6 PI (7 cell)
2325 14:47:44.974454 CA3 delay=34 (6~63),Diff = 5 PI (6 cell)
2326 14:47:44.977923 CA4 delay=34 (6~63),Diff = 5 PI (6 cell)
2327 14:47:44.981148 CA5 delay=29 (0~59),Diff = 0 PI (0 cell)
2328 14:47:44.981578
2329 14:47:44.987862 CA PerBit enable=1, Macro0, CA PI delay=29
2330 14:47:44.988252 === u2Vref_new: 0x60 --> 0x90
2331 14:47:44.988565
2332 14:47:44.990862 Vref(ca) range 1: 32
2333 14:47:44.991250
2334 14:47:44.994068 CS Dly= 12 (43-0-32)
2335 14:47:44.994458 Write Rank0 MR13 =0xd8
2336 14:47:44.997388 Write Rank0 MR13 =0xd8
2337 14:47:45.000615 Write Rank0 MR12 =0x60
2338 14:47:45.001005 Write Rank1 MR13 =0x59
2339 14:47:45.001314 ==
2340 14:47:45.007076 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2341 14:47:45.010498 fsp= 1, odt_onoff= 1, Byte mode= 0
2342 14:47:45.010726 ==
2343 14:47:45.013488 === u2Vref_new: 0x56 --> 0x3a
2344 14:47:45.017181 === u2Vref_new: 0x58 --> 0x58
2345 14:47:45.019997 === u2Vref_new: 0x5a --> 0x5a
2346 14:47:45.020307 === u2Vref_new: 0x5c --> 0x78
2347 14:47:45.023836 === u2Vref_new: 0x5e --> 0x7a
2348 14:47:45.027251 === u2Vref_new: 0x60 --> 0x90
2349 14:47:45.030275 [CA 0] Center 37 (11~63) winsize 53
2350 14:47:45.033714 [CA 1] Center 37 (12~63) winsize 52
2351 14:47:45.037150 [CA 2] Center 34 (6~63) winsize 58
2352 14:47:45.040045 [CA 3] Center 35 (7~63) winsize 57
2353 14:47:45.043195 [CA 4] Center 33 (4~63) winsize 60
2354 14:47:45.046663 [CA 5] Center 28 (-1~58) winsize 60
2355 14:47:45.046777
2356 14:47:45.050050 [CATrainingPosCal] consider 2 rank data
2357 14:47:45.052957 u2DelayCellTimex100 = 744/100 ps
2358 14:47:45.056632 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2359 14:47:45.059591 CA1 delay=37 (12~63),Diff = 8 PI (10 cell)
2360 14:47:45.066195 CA2 delay=35 (7~63),Diff = 6 PI (7 cell)
2361 14:47:45.069621 CA3 delay=35 (7~63),Diff = 6 PI (7 cell)
2362 14:47:45.072683 CA4 delay=34 (6~63),Diff = 5 PI (6 cell)
2363 14:47:45.076096 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2364 14:47:45.076183
2365 14:47:45.079420 CA PerBit enable=1, Macro0, CA PI delay=29
2366 14:47:45.082708 === u2Vref_new: 0x5c --> 0x78
2367 14:47:45.082793
2368 14:47:45.085957 Vref(ca) range 1: 28
2369 14:47:45.086050
2370 14:47:45.086124 CS Dly= 10 (41-0-32)
2371 14:47:45.089349 Write Rank1 MR13 =0xd8
2372 14:47:45.089428 Write Rank1 MR13 =0xd8
2373 14:47:45.092496 Write Rank1 MR12 =0x5c
2374 14:47:45.096085 [RankSwap] Rank num 2, (Multi 1), Rank 0
2375 14:47:45.099317 Write Rank0 MR2 =0xad
2376 14:47:45.099416 [Write Leveling]
2377 14:47:45.102210 delay byte0 byte1 byte2 byte3
2378 14:47:45.102309
2379 14:47:45.105386 10 0 0
2380 14:47:45.105507 11 0 0
2381 14:47:45.108896 12 0 0
2382 14:47:45.108989 13 0 0
2383 14:47:45.109062 14 0 0
2384 14:47:45.112027 15 0 0
2385 14:47:45.112120 16 0 0
2386 14:47:45.115079 17 0 0
2387 14:47:45.115172 18 0 0
2388 14:47:45.118741 19 0 0
2389 14:47:45.118833 20 0 0
2390 14:47:45.118907 21 0 0
2391 14:47:45.121678 22 0 0
2392 14:47:45.121771 23 0 0
2393 14:47:45.125242 24 0 0
2394 14:47:45.125335 25 0 ff
2395 14:47:45.128346 26 0 ff
2396 14:47:45.128439 27 0 ff
2397 14:47:45.128513 28 0 ff
2398 14:47:45.131509 29 0 ff
2399 14:47:45.131602 30 0 ff
2400 14:47:45.134908 31 0 ff
2401 14:47:45.135001 32 0 ff
2402 14:47:45.137975 33 ff ff
2403 14:47:45.138068 34 ff ff
2404 14:47:45.141290 35 ff ff
2405 14:47:45.141383 36 ff ff
2406 14:47:45.144618 37 ff ff
2407 14:47:45.144710 38 ff ff
2408 14:47:45.147654 39 ff ff
2409 14:47:45.151135 pass bytecount = 0xff (0xff: all bytes pass)
2410 14:47:45.151226
2411 14:47:45.151299 DQS0 dly: 33
2412 14:47:45.154266 DQS1 dly: 25
2413 14:47:45.154356 Write Rank0 MR2 =0x2d
2414 14:47:45.157789 [RankSwap] Rank num 2, (Multi 1), Rank 0
2415 14:47:45.161138 Write Rank0 MR1 =0xd6
2416 14:47:45.161247 [Gating]
2417 14:47:45.161321 ==
2418 14:47:45.167691 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2419 14:47:45.170733 fsp= 1, odt_onoff= 1, Byte mode= 0
2420 14:47:45.170818 ==
2421 14:47:45.173871 3 1 0 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2422 14:47:45.177363 3 1 4 |2c2b 1313 |(11 11)(11 11) |(1 1)(1 1)| 0
2423 14:47:45.183970 3 1 8 |2c2b 808 |(11 11)(11 11) |(1 1)(1 1)| 0
2424 14:47:45.187051 3 1 12 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 0)| 0
2425 14:47:45.190521 3 1 16 |2c2b 3636 |(11 11)(11 11) |(1 0)(1 1)| 0
2426 14:47:45.196826 3 1 20 |2c2b 1c1c |(11 11)(11 11) |(1 0)(1 1)| 0
2427 14:47:45.200611 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2428 14:47:45.203605 [Byte 1] Lead/lag falling Transition (3, 1, 24)
2429 14:47:45.210248 3 1 28 |2c2b 3131 |(11 11)(11 11) |(1 0)(0 1)| 0
2430 14:47:45.213514 3 2 0 |2c2b 1211 |(11 11)(11 11) |(1 0)(0 1)| 0
2431 14:47:45.216507 3 2 4 |2c2b 3434 |(11 11)(0 0) |(1 0)(1 1)| 0
2432 14:47:45.223290 [Byte 1] Lead/lag falling Transition (3, 2, 4)
2433 14:47:45.226388 3 2 8 |2c2b 1d1d |(11 11)(11 11) |(1 0)(1 0)| 0
2434 14:47:45.229686 3 2 12 |2c2b 504 |(11 11)(11 11) |(1 0)(0 1)| 0
2435 14:47:45.236454 3 2 16 |303 3433 |(11 11)(11 11) |(1 0)(0 1)| 0
2436 14:47:45.239501 3 2 20 |3534 504 |(11 11)(11 11) |(0 0)(0 1)| 0
2437 14:47:45.242653 3 2 24 |3534 505 |(11 11)(11 11) |(0 0)(1 1)| 0
2438 14:47:45.246006 3 2 28 |3534 3b3b |(11 11)(11 11) |(0 0)(1 1)| 0
2439 14:47:45.252593 3 3 0 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
2440 14:47:45.256152 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2441 14:47:45.259094 3 3 8 |3534 1c1b |(11 11)(11 11) |(0 0)(1 1)| 0
2442 14:47:45.265914 3 3 12 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2443 14:47:45.269058 3 3 16 |3534 2e2d |(11 11)(11 11) |(1 1)(1 1)| 0
2444 14:47:45.272433 3 3 20 |3534 2929 |(11 11)(11 11) |(1 1)(1 1)| 0
2445 14:47:45.278792 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2446 14:47:45.282037 3 3 24 |3534 2020 |(11 11)(11 11) |(0 1)(1 1)| 0
2447 14:47:45.285319 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2448 14:47:45.291820 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2449 14:47:45.295295 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2450 14:47:45.298607 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2451 14:47:45.305231 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2452 14:47:45.308735 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2453 14:47:45.311677 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2454 14:47:45.318074 3 4 20 |3636 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2455 14:47:45.321476 3 4 24 |3d3d 706 |(11 11)(11 11) |(1 1)(1 1)| 0
2456 14:47:45.324730 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2457 14:47:45.331185 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2458 14:47:45.334526 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2459 14:47:45.337786 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2460 14:47:45.344318 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2461 14:47:45.347378 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2462 14:47:45.350712 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2463 14:47:45.357497 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2464 14:47:45.360636 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2465 14:47:45.363886 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2466 14:47:45.370547 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2467 14:47:45.373714 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2468 14:47:45.376836 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2469 14:47:45.383315 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2470 14:47:45.386883 [Byte 0] Lead/lag Transition tap number (2)
2471 14:47:45.390240 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2472 14:47:45.393211 3 6 16 |b0a 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2473 14:47:45.396747 [Byte 1] Lead/lag Transition tap number (2)
2474 14:47:45.403266 3 6 20 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
2475 14:47:45.406457 [Byte 0]First pass (3, 6, 20)
2476 14:47:45.409888 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2477 14:47:45.413038 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2478 14:47:45.416459 [Byte 1]First pass (3, 6, 28)
2479 14:47:45.419472 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2480 14:47:45.422860 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2481 14:47:45.429671 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2482 14:47:45.432645 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2483 14:47:45.435895 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2484 14:47:45.439251 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2485 14:47:45.445603 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2486 14:47:45.448989 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2487 14:47:45.452266 All bytes gating window > 1UI, Early break!
2488 14:47:45.452371
2489 14:47:45.455575 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2490 14:47:45.455666
2491 14:47:45.458561 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2492 14:47:45.458657
2493 14:47:45.458752
2494 14:47:45.458842
2495 14:47:45.465212 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2496 14:47:45.465310
2497 14:47:45.468435 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2498 14:47:45.468567
2499 14:47:45.468682
2500 14:47:45.471636 Write Rank0 MR1 =0x56
2501 14:47:45.471733
2502 14:47:45.471829 best RODT dly(2T, 0.5T) = (2, 3)
2503 14:47:45.475249
2504 14:47:45.475344 best RODT dly(2T, 0.5T) = (2, 3)
2505 14:47:45.478478 ==
2506 14:47:45.481775 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2507 14:47:45.484964 fsp= 1, odt_onoff= 1, Byte mode= 0
2508 14:47:45.485051 ==
2509 14:47:45.488123 Start DQ dly to find pass range UseTestEngine =0
2510 14:47:45.491524 x-axis: bit #, y-axis: DQ dly (-127~63)
2511 14:47:45.494750 RX Vref Scan = 0
2512 14:47:45.497785 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2513 14:47:45.501443 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2514 14:47:45.504500 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2515 14:47:45.507731 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2516 14:47:45.507821 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2517 14:47:45.511156 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2518 14:47:45.514304 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2519 14:47:45.517781 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2520 14:47:45.520938 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2521 14:47:45.524330 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2522 14:47:45.527581 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2523 14:47:45.530589 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2524 14:47:45.534126 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2525 14:47:45.534216 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2526 14:47:45.537300 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2527 14:47:45.540766 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2528 14:47:45.543833 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2529 14:47:45.547196 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2530 14:47:45.550509 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2531 14:47:45.553661 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2532 14:47:45.556906 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2533 14:47:45.560260 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2534 14:47:45.560380 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2535 14:47:45.563533 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2536 14:47:45.566678 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2537 14:47:45.570218 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2538 14:47:45.573369 0, [0] xxxoxxxx ooxxxxxo [MSB]
2539 14:47:45.576424 1, [0] xxxoxxxx ooxxxxxo [MSB]
2540 14:47:45.579874 2, [0] xxooxxxo oooxxxxo [MSB]
2541 14:47:45.579994 3, [0] xxooxxxo oooooxoo [MSB]
2542 14:47:45.583358 4, [0] xooooxxo oooooooo [MSB]
2543 14:47:45.586562 5, [0] oooooxxo oooooooo [MSB]
2544 14:47:45.589866 6, [0] oooooxoo oooooooo [MSB]
2545 14:47:45.592939 32, [0] oooooooo ooooooox [MSB]
2546 14:47:45.596249 33, [0] oooooooo ooooooox [MSB]
2547 14:47:45.599431 34, [0] oooooooo ooooooox [MSB]
2548 14:47:45.599525 35, [0] ooxxoooo oxooooox [MSB]
2549 14:47:45.602876 36, [0] ooxxoooo oxooooox [MSB]
2550 14:47:45.605941 37, [0] ooxxoooo xxooooox [MSB]
2551 14:47:45.609248 38, [0] oxxxoooo xxooooox [MSB]
2552 14:47:45.612676 39, [0] oxxxooox xxxxxoox [MSB]
2553 14:47:45.616000 40, [0] oxxxxoox xxxxxoox [MSB]
2554 14:47:45.619239 41, [0] xxxxxoxx xxxxxxxx [MSB]
2555 14:47:45.619332 42, [0] xxxxxxxx xxxxxxxx [MSB]
2556 14:47:45.625779 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
2557 14:47:45.628782 iDelay=42, Bit 1, Center 20 (4 ~ 37) 34
2558 14:47:45.632350 iDelay=42, Bit 2, Center 18 (2 ~ 34) 33
2559 14:47:45.635449 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2560 14:47:45.638945 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2561 14:47:45.641974 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2562 14:47:45.645444 iDelay=42, Bit 6, Center 23 (6 ~ 40) 35
2563 14:47:45.648594 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
2564 14:47:45.651724 iDelay=42, Bit 8, Center 18 (0 ~ 36) 37
2565 14:47:45.655082 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2566 14:47:45.658313 iDelay=42, Bit 10, Center 20 (2 ~ 38) 37
2567 14:47:45.664982 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
2568 14:47:45.668147 iDelay=42, Bit 12, Center 20 (3 ~ 38) 36
2569 14:47:45.671583 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2570 14:47:45.674726 iDelay=42, Bit 14, Center 21 (3 ~ 40) 38
2571 14:47:45.678084 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2572 14:47:45.678180 ==
2573 14:47:45.684596 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2574 14:47:45.688143 fsp= 1, odt_onoff= 1, Byte mode= 0
2575 14:47:45.688240 ==
2576 14:47:45.688335 DQS Delay:
2577 14:47:45.688436 DQS0 = 0, DQS1 = 0
2578 14:47:45.691066 DQM Delay:
2579 14:47:45.691158 DQM0 = 20, DQM1 = 18
2580 14:47:45.694467 DQ Delay:
2581 14:47:45.697909 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =16
2582 14:47:45.701046 DQ4 =21, DQ5 =24, DQ6 =23, DQ7 =20
2583 14:47:45.704189 DQ8 =18, DQ9 =16, DQ10 =20, DQ11 =20
2584 14:47:45.707528 DQ12 =20, DQ13 =22, DQ14 =21, DQ15 =13
2585 14:47:45.707628
2586 14:47:45.707701
2587 14:47:45.707768 DramC Write-DBI off
2588 14:47:45.707833 ==
2589 14:47:45.714316 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2590 14:47:45.717334 fsp= 1, odt_onoff= 1, Byte mode= 0
2591 14:47:45.717461 ==
2592 14:47:45.720637 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2593 14:47:45.720729
2594 14:47:45.723831 Begin, DQ Scan Range 921~1177
2595 14:47:45.723924
2596 14:47:45.723997
2597 14:47:45.727149 TX Vref Scan disable
2598 14:47:45.730591 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2599 14:47:45.733989 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2600 14:47:45.736986 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2601 14:47:45.740369 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2602 14:47:45.743527 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2603 14:47:45.746960 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2604 14:47:45.750193 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2605 14:47:45.753267 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2606 14:47:45.759951 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2607 14:47:45.763143 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2608 14:47:45.766507 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2609 14:47:45.769678 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2610 14:47:45.772865 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2611 14:47:45.776148 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2612 14:47:45.779666 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2613 14:47:45.782875 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2614 14:47:45.785979 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2615 14:47:45.789330 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2616 14:47:45.792391 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2617 14:47:45.795825 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2618 14:47:45.799223 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2619 14:47:45.805620 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2620 14:47:45.809205 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2621 14:47:45.812364 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2622 14:47:45.815716 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2623 14:47:45.818841 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2624 14:47:45.822016 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2625 14:47:45.825440 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2626 14:47:45.828630 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2627 14:47:45.831740 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2628 14:47:45.835137 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2629 14:47:45.838474 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2630 14:47:45.841717 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2631 14:47:45.845035 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2632 14:47:45.851613 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2633 14:47:45.854979 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2634 14:47:45.858148 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2635 14:47:45.861367 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2636 14:47:45.864517 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2637 14:47:45.867938 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2638 14:47:45.870959 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2639 14:47:45.874339 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2640 14:47:45.877460 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2641 14:47:45.880945 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2642 14:47:45.884203 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2643 14:47:45.887727 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2644 14:47:45.890637 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2645 14:47:45.894139 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2646 14:47:45.897280 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2647 14:47:45.903854 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2648 14:47:45.907123 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2649 14:47:45.910501 972 |3 6 12|[0] xxxxxxxx oooxxxxo [MSB]
2650 14:47:45.913754 973 |3 6 13|[0] xxxxxxxx oooxxxxo [MSB]
2651 14:47:45.917089 974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]
2652 14:47:45.920075 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2653 14:47:45.923486 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2654 14:47:45.926686 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2655 14:47:45.930309 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2656 14:47:45.933455 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2657 14:47:45.936747 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2658 14:47:45.940201 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2659 14:47:45.946987 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2660 14:47:45.950231 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2661 14:47:45.953384 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2662 14:47:45.956938 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2663 14:47:45.959930 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2664 14:47:45.963156 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2665 14:47:45.966675 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2666 14:47:45.969888 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2667 14:47:45.973146 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2668 14:47:45.976362 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2669 14:47:45.979862 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2670 14:47:45.982889 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2671 14:47:45.989227 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2672 14:47:45.992438 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2673 14:47:45.996085 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2674 14:47:45.999204 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2675 14:47:46.002443 1002 |3 6 42|[0] ooxxxoxx xxxxxxxx [MSB]
2676 14:47:46.005597 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2677 14:47:46.008853 Byte0, DQ PI dly=990, DQM PI dly= 990
2678 14:47:46.012146 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2679 14:47:46.012371
2680 14:47:46.018698 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2681 14:47:46.018923
2682 14:47:46.021859 Byte1, DQ PI dly=979, DQM PI dly= 979
2683 14:47:46.025110 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2684 14:47:46.025397
2685 14:47:46.031724 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2686 14:47:46.031848
2687 14:47:46.031963 ==
2688 14:47:46.035036 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2689 14:47:46.038335 fsp= 1, odt_onoff= 1, Byte mode= 0
2690 14:47:46.038432 ==
2691 14:47:46.044643 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2692 14:47:46.044739
2693 14:47:46.044834 Begin, DQ Scan Range 955~1019
2694 14:47:46.051331 wait MRW command Rank0 MR14 =0x0 fired (1)
2695 14:47:46.051427 Write Rank0 MR14 =0x0
2696 14:47:46.060487
2697 14:47:46.060583 CH=1, VrefRange= 0, VrefLevel = 0
2698 14:47:46.067044 TX Bit0 (984~998) 15 991, Bit8 (973~986) 14 979,
2699 14:47:46.070466 TX Bit1 (983~998) 16 990, Bit9 (974~984) 11 979,
2700 14:47:46.076876 TX Bit2 (981~996) 16 988, Bit10 (976~989) 14 982,
2701 14:47:46.080256 TX Bit3 (978~993) 16 985, Bit11 (977~988) 12 982,
2702 14:47:46.083344 TX Bit4 (982~997) 16 989, Bit12 (976~988) 13 982,
2703 14:47:46.089925 TX Bit5 (985~998) 14 991, Bit13 (977~990) 14 983,
2704 14:47:46.093139 TX Bit6 (983~997) 15 990, Bit14 (976~988) 13 982,
2705 14:47:46.099828 TX Bit7 (983~997) 15 990, Bit15 (971~980) 10 975,
2706 14:47:46.099925
2707 14:47:46.100020 Write Rank0 MR14 =0x2
2708 14:47:46.109419
2709 14:47:46.112830 CH=1, VrefRange= 0, VrefLevel = 2
2710 14:47:46.115983 TX Bit0 (985~999) 15 992, Bit8 (972~986) 15 979,
2711 14:47:46.119044 TX Bit1 (983~999) 17 991, Bit9 (974~985) 12 979,
2712 14:47:46.125581 TX Bit2 (980~996) 17 988, Bit10 (975~990) 16 982,
2713 14:47:46.129188 TX Bit3 (978~993) 16 985, Bit11 (977~989) 13 983,
2714 14:47:46.132190 TX Bit4 (982~998) 17 990, Bit12 (976~990) 15 983,
2715 14:47:46.138741 TX Bit5 (984~998) 15 991, Bit13 (977~991) 15 984,
2716 14:47:46.141884 TX Bit6 (984~998) 15 991, Bit14 (976~989) 14 982,
2717 14:47:46.148528 TX Bit7 (984~998) 15 991, Bit15 (971~982) 12 976,
2718 14:47:46.148626
2719 14:47:46.148739 Write Rank0 MR14 =0x4
2720 14:47:46.158137
2721 14:47:46.161335 CH=1, VrefRange= 0, VrefLevel = 4
2722 14:47:46.164496 TX Bit0 (984~999) 16 991, Bit8 (972~987) 16 979,
2723 14:47:46.167975 TX Bit1 (983~999) 17 991, Bit9 (972~985) 14 978,
2724 14:47:46.174489 TX Bit2 (980~997) 18 988, Bit10 (975~990) 16 982,
2725 14:47:46.177640 TX Bit3 (977~994) 18 985, Bit11 (976~990) 15 983,
2726 14:47:46.180987 TX Bit4 (982~998) 17 990, Bit12 (976~990) 15 983,
2727 14:47:46.187531 TX Bit5 (984~999) 16 991, Bit13 (976~991) 16 983,
2728 14:47:46.190730 TX Bit6 (983~998) 16 990, Bit14 (976~990) 15 983,
2729 14:47:46.197404 TX Bit7 (983~998) 16 990, Bit15 (970~983) 14 976,
2730 14:47:46.197513
2731 14:47:46.197613 Write Rank0 MR14 =0x6
2732 14:47:46.207282
2733 14:47:46.210342 CH=1, VrefRange= 0, VrefLevel = 6
2734 14:47:46.213709 TX Bit0 (984~1000) 17 992, Bit8 (971~988) 18 979,
2735 14:47:46.216970 TX Bit1 (982~1000) 19 991, Bit9 (972~986) 15 979,
2736 14:47:46.223525 TX Bit2 (979~998) 20 988, Bit10 (974~991) 18 982,
2737 14:47:46.226896 TX Bit3 (977~995) 19 986, Bit11 (976~991) 16 983,
2738 14:47:46.230153 TX Bit4 (981~999) 19 990, Bit12 (976~991) 16 983,
2739 14:47:46.236744 TX Bit5 (984~999) 16 991, Bit13 (976~991) 16 983,
2740 14:47:46.239783 TX Bit6 (982~999) 18 990, Bit14 (976~990) 15 983,
2741 14:47:46.246317 TX Bit7 (983~999) 17 991, Bit15 (970~983) 14 976,
2742 14:47:46.246433
2743 14:47:46.246536 Write Rank0 MR14 =0x8
2744 14:47:46.256299
2745 14:47:46.256392 CH=1, VrefRange= 0, VrefLevel = 8
2746 14:47:46.263116 TX Bit0 (984~1000) 17 992, Bit8 (971~989) 19 980,
2747 14:47:46.266288 TX Bit1 (981~1000) 20 990, Bit9 (971~986) 16 978,
2748 14:47:46.272939 TX Bit2 (979~998) 20 988, Bit10 (974~991) 18 982,
2749 14:47:46.276013 TX Bit3 (977~995) 19 986, Bit11 (976~991) 16 983,
2750 14:47:46.279346 TX Bit4 (981~999) 19 990, Bit12 (975~991) 17 983,
2751 14:47:46.285948 TX Bit5 (984~1000) 17 992, Bit13 (976~991) 16 983,
2752 14:47:46.289050 TX Bit6 (983~999) 17 991, Bit14 (975~991) 17 983,
2753 14:47:46.295906 TX Bit7 (983~999) 17 991, Bit15 (970~984) 15 977,
2754 14:47:46.295998
2755 14:47:46.296071 Write Rank0 MR14 =0xa
2756 14:47:46.306054
2757 14:47:46.309222 CH=1, VrefRange= 0, VrefLevel = 10
2758 14:47:46.312781 TX Bit0 (984~1001) 18 992, Bit8 (971~990) 20 980,
2759 14:47:46.315779 TX Bit1 (981~1000) 20 990, Bit9 (971~986) 16 978,
2760 14:47:46.322131 TX Bit2 (979~998) 20 988, Bit10 (973~991) 19 982,
2761 14:47:46.325583 TX Bit3 (977~996) 20 986, Bit11 (975~991) 17 983,
2762 14:47:46.332276 TX Bit4 (981~1000) 20 990, Bit12 (975~991) 17 983,
2763 14:47:46.335369 TX Bit5 (983~1000) 18 991, Bit13 (976~992) 17 984,
2764 14:47:46.338526 TX Bit6 (982~1000) 19 991, Bit14 (975~991) 17 983,
2765 14:47:46.345198 TX Bit7 (981~999) 19 990, Bit15 (969~984) 16 976,
2766 14:47:46.345320
2767 14:47:46.345425 Write Rank0 MR14 =0xc
2768 14:47:46.356011
2769 14:47:46.359624 CH=1, VrefRange= 0, VrefLevel = 12
2770 14:47:46.362934 TX Bit0 (983~1002) 20 992, Bit8 (970~990) 21 980,
2771 14:47:46.365919 TX Bit1 (981~1001) 21 991, Bit9 (970~987) 18 978,
2772 14:47:46.372784 TX Bit2 (978~999) 22 988, Bit10 (973~992) 20 982,
2773 14:47:46.375810 TX Bit3 (977~997) 21 987, Bit11 (975~992) 18 983,
2774 14:47:46.382032 TX Bit4 (980~1000) 21 990, Bit12 (975~992) 18 983,
2775 14:47:46.385710 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2776 14:47:46.388835 TX Bit6 (981~1000) 20 990, Bit14 (975~992) 18 983,
2777 14:47:46.395509 TX Bit7 (981~1000) 20 990, Bit15 (969~984) 16 976,
2778 14:47:46.395924
2779 14:47:46.396174 Write Rank0 MR14 =0xe
2780 14:47:46.406050
2781 14:47:46.409173 CH=1, VrefRange= 0, VrefLevel = 14
2782 14:47:46.412469 TX Bit0 (983~1002) 20 992, Bit8 (970~991) 22 980,
2783 14:47:46.415653 TX Bit1 (980~1001) 22 990, Bit9 (970~988) 19 979,
2784 14:47:46.422195 TX Bit2 (978~999) 22 988, Bit10 (973~992) 20 982,
2785 14:47:46.425499 TX Bit3 (977~997) 21 987, Bit11 (975~992) 18 983,
2786 14:47:46.432110 TX Bit4 (979~1001) 23 990, Bit12 (974~992) 19 983,
2787 14:47:46.435747 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2788 14:47:46.438914 TX Bit6 (982~1000) 19 991, Bit14 (975~992) 18 983,
2789 14:47:46.445352 TX Bit7 (982~1000) 19 991, Bit15 (969~985) 17 977,
2790 14:47:46.445683
2791 14:47:46.445931 Write Rank0 MR14 =0x10
2792 14:47:46.456012
2793 14:47:46.459453 CH=1, VrefRange= 0, VrefLevel = 16
2794 14:47:46.462443 TX Bit0 (983~1003) 21 993, Bit8 (970~991) 22 980,
2795 14:47:46.466099 TX Bit1 (980~1002) 23 991, Bit9 (970~989) 20 979,
2796 14:47:46.472451 TX Bit2 (978~999) 22 988, Bit10 (972~992) 21 982,
2797 14:47:46.475623 TX Bit3 (977~997) 21 987, Bit11 (975~992) 18 983,
2798 14:47:46.482171 TX Bit4 (979~1001) 23 990, Bit12 (974~993) 20 983,
2799 14:47:46.485368 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2800 14:47:46.488888 TX Bit6 (981~1001) 21 991, Bit14 (974~992) 19 983,
2801 14:47:46.495284 TX Bit7 (980~1001) 22 990, Bit15 (969~985) 17 977,
2802 14:47:46.495409
2803 14:47:46.495510 Write Rank0 MR14 =0x12
2804 14:47:46.506345
2805 14:47:46.509600 CH=1, VrefRange= 0, VrefLevel = 18
2806 14:47:46.512828 TX Bit0 (982~1003) 22 992, Bit8 (970~991) 22 980,
2807 14:47:46.516070 TX Bit1 (980~1002) 23 991, Bit9 (969~989) 21 979,
2808 14:47:46.522417 TX Bit2 (978~1000) 23 989, Bit10 (971~992) 22 981,
2809 14:47:46.525647 TX Bit3 (977~998) 22 987, Bit11 (974~993) 20 983,
2810 14:47:46.532470 TX Bit4 (979~1002) 24 990, Bit12 (974~993) 20 983,
2811 14:47:46.535734 TX Bit5 (982~1002) 21 992, Bit13 (974~993) 20 983,
2812 14:47:46.539249 TX Bit6 (980~1002) 23 991, Bit14 (974~992) 19 983,
2813 14:47:46.545402 TX Bit7 (980~1001) 22 990, Bit15 (968~986) 19 977,
2814 14:47:46.545510
2815 14:47:46.545604 Write Rank0 MR14 =0x14
2816 14:47:46.556625
2817 14:47:46.559994 CH=1, VrefRange= 0, VrefLevel = 20
2818 14:47:46.563075 TX Bit0 (982~1004) 23 993, Bit8 (969~991) 23 980,
2819 14:47:46.566629 TX Bit1 (979~1003) 25 991, Bit9 (969~989) 21 979,
2820 14:47:46.573128 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
2821 14:47:46.576011 TX Bit3 (976~998) 23 987, Bit11 (974~993) 20 983,
2822 14:47:46.583102 TX Bit4 (978~1002) 25 990, Bit12 (974~993) 20 983,
2823 14:47:46.586401 TX Bit5 (982~1003) 22 992, Bit13 (974~993) 20 983,
2824 14:47:46.589679 TX Bit6 (980~1002) 23 991, Bit14 (974~992) 19 983,
2825 14:47:46.595789 TX Bit7 (980~1002) 23 991, Bit15 (968~986) 19 977,
2826 14:47:46.595888
2827 14:47:46.595989 Write Rank0 MR14 =0x16
2828 14:47:46.607074
2829 14:47:46.610169 CH=1, VrefRange= 0, VrefLevel = 22
2830 14:47:46.613652 TX Bit0 (982~1004) 23 993, Bit8 (969~992) 24 980,
2831 14:47:46.616872 TX Bit1 (979~1003) 25 991, Bit9 (969~990) 22 979,
2832 14:47:46.623848 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
2833 14:47:46.627257 TX Bit3 (976~998) 23 987, Bit11 (973~993) 21 983,
2834 14:47:46.633798 TX Bit4 (978~1003) 26 990, Bit12 (973~994) 22 983,
2835 14:47:46.636790 TX Bit5 (982~1004) 23 993, Bit13 (974~994) 21 984,
2836 14:47:46.640034 TX Bit6 (980~1002) 23 991, Bit14 (973~993) 21 983,
2837 14:47:46.647002 TX Bit7 (979~1002) 24 990, Bit15 (967~986) 20 976,
2838 14:47:46.647463
2839 14:47:46.647807 Write Rank0 MR14 =0x18
2840 14:47:46.658102
2841 14:47:46.661266 CH=1, VrefRange= 0, VrefLevel = 24
2842 14:47:46.664682 TX Bit0 (981~1005) 25 993, Bit8 (969~992) 24 980,
2843 14:47:46.667772 TX Bit1 (979~1003) 25 991, Bit9 (969~991) 23 980,
2844 14:47:46.674641 TX Bit2 (977~1001) 25 989, Bit10 (971~994) 24 982,
2845 14:47:46.677660 TX Bit3 (976~999) 24 987, Bit11 (973~994) 22 983,
2846 14:47:46.684069 TX Bit4 (978~1003) 26 990, Bit12 (973~994) 22 983,
2847 14:47:46.687644 TX Bit5 (980~1004) 25 992, Bit13 (974~994) 21 984,
2848 14:47:46.690570 TX Bit6 (979~1003) 25 991, Bit14 (973~993) 21 983,
2849 14:47:46.697578 TX Bit7 (980~1003) 24 991, Bit15 (968~987) 20 977,
2850 14:47:46.698002
2851 14:47:46.698428 Write Rank0 MR14 =0x1a
2852 14:47:46.708429
2853 14:47:46.712040 CH=1, VrefRange= 0, VrefLevel = 26
2854 14:47:46.715035 TX Bit0 (981~1005) 25 993, Bit8 (969~992) 24 980,
2855 14:47:46.718479 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2856 14:47:46.724900 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2857 14:47:46.728095 TX Bit3 (975~999) 25 987, Bit11 (973~995) 23 984,
2858 14:47:46.734797 TX Bit4 (978~1004) 27 991, Bit12 (972~994) 23 983,
2859 14:47:46.738034 TX Bit5 (980~1005) 26 992, Bit13 (973~994) 22 983,
2860 14:47:46.741182 TX Bit6 (979~1004) 26 991, Bit14 (972~993) 22 982,
2861 14:47:46.747770 TX Bit7 (978~1003) 26 990, Bit15 (967~988) 22 977,
2862 14:47:46.748162
2863 14:47:46.748502 Write Rank0 MR14 =0x1c
2864 14:47:46.759332
2865 14:47:46.762725 CH=1, VrefRange= 0, VrefLevel = 28
2866 14:47:46.766031 TX Bit0 (980~1006) 27 993, Bit8 (969~992) 24 980,
2867 14:47:46.769054 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2868 14:47:46.775761 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
2869 14:47:46.779018 TX Bit3 (975~1000) 26 987, Bit11 (972~995) 24 983,
2870 14:47:46.785873 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2871 14:47:46.789024 TX Bit5 (980~1005) 26 992, Bit13 (972~995) 24 983,
2872 14:47:46.792240 TX Bit6 (979~1004) 26 991, Bit14 (972~994) 23 983,
2873 14:47:46.798759 TX Bit7 (978~1004) 27 991, Bit15 (967~990) 24 978,
2874 14:47:46.799152
2875 14:47:46.801944 Write Rank0 MR14 =0x1e
2876 14:47:46.810604
2877 14:47:46.813580 CH=1, VrefRange= 0, VrefLevel = 30
2878 14:47:46.816860 TX Bit0 (981~1006) 26 993, Bit8 (969~992) 24 980,
2879 14:47:46.820275 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2880 14:47:46.826423 TX Bit2 (977~1002) 26 989, Bit10 (971~994) 24 982,
2881 14:47:46.829535 TX Bit3 (975~999) 25 987, Bit11 (972~995) 24 983,
2882 14:47:46.836465 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2883 14:47:46.839517 TX Bit5 (979~1006) 28 992, Bit13 (972~995) 24 983,
2884 14:47:46.843028 TX Bit6 (979~1005) 27 992, Bit14 (972~994) 23 983,
2885 14:47:46.849420 TX Bit7 (978~1004) 27 991, Bit15 (966~990) 25 978,
2886 14:47:46.850048
2887 14:47:46.852317 Write Rank0 MR14 =0x20
2888 14:47:46.861130
2889 14:47:46.863979 CH=1, VrefRange= 0, VrefLevel = 32
2890 14:47:46.867513 TX Bit0 (981~1006) 26 993, Bit8 (969~992) 24 980,
2891 14:47:46.870876 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2892 14:47:46.877229 TX Bit2 (977~1002) 26 989, Bit10 (971~994) 24 982,
2893 14:47:46.880248 TX Bit3 (975~999) 25 987, Bit11 (972~995) 24 983,
2894 14:47:46.886704 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2895 14:47:46.890207 TX Bit5 (979~1006) 28 992, Bit13 (972~995) 24 983,
2896 14:47:46.893450 TX Bit6 (979~1005) 27 992, Bit14 (972~994) 23 983,
2897 14:47:46.899966 TX Bit7 (978~1004) 27 991, Bit15 (966~990) 25 978,
2898 14:47:46.900077
2899 14:47:46.900167 Write Rank0 MR14 =0x22
2900 14:47:46.911404
2901 14:47:46.914700 CH=1, VrefRange= 0, VrefLevel = 34
2902 14:47:46.917702 TX Bit0 (981~1006) 26 993, Bit8 (969~992) 24 980,
2903 14:47:46.921048 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2904 14:47:46.927642 TX Bit2 (977~1002) 26 989, Bit10 (971~994) 24 982,
2905 14:47:46.931067 TX Bit3 (975~999) 25 987, Bit11 (972~995) 24 983,
2906 14:47:46.937259 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2907 14:47:46.940774 TX Bit5 (979~1006) 28 992, Bit13 (972~995) 24 983,
2908 14:47:46.944070 TX Bit6 (979~1005) 27 992, Bit14 (972~994) 23 983,
2909 14:47:46.950619 TX Bit7 (978~1004) 27 991, Bit15 (966~990) 25 978,
2910 14:47:46.950711
2911 14:47:46.953513 Write Rank0 MR14 =0x24
2912 14:47:46.961732
2913 14:47:46.965144 CH=1, VrefRange= 0, VrefLevel = 36
2914 14:47:46.968505 TX Bit0 (981~1006) 26 993, Bit8 (969~992) 24 980,
2915 14:47:46.971649 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2916 14:47:46.978194 TX Bit2 (977~1002) 26 989, Bit10 (971~994) 24 982,
2917 14:47:46.981650 TX Bit3 (975~999) 25 987, Bit11 (972~995) 24 983,
2918 14:47:46.987955 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2919 14:47:46.991219 TX Bit5 (979~1006) 28 992, Bit13 (972~995) 24 983,
2920 14:47:46.994718 TX Bit6 (979~1005) 27 992, Bit14 (972~994) 23 983,
2921 14:47:47.001038 TX Bit7 (978~1004) 27 991, Bit15 (966~990) 25 978,
2922 14:47:47.001134
2923 14:47:47.004190 Write Rank0 MR14 =0x26
2924 14:47:47.012656
2925 14:47:47.015795 CH=1, VrefRange= 0, VrefLevel = 38
2926 14:47:47.019177 TX Bit0 (981~1006) 26 993, Bit8 (969~992) 24 980,
2927 14:47:47.022465 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2928 14:47:47.028868 TX Bit2 (977~1002) 26 989, Bit10 (971~994) 24 982,
2929 14:47:47.032054 TX Bit3 (975~999) 25 987, Bit11 (972~995) 24 983,
2930 14:47:47.038607 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2931 14:47:47.042252 TX Bit5 (979~1006) 28 992, Bit13 (972~995) 24 983,
2932 14:47:47.045638 TX Bit6 (979~1005) 27 992, Bit14 (972~994) 23 983,
2933 14:47:47.052258 TX Bit7 (978~1004) 27 991, Bit15 (966~990) 25 978,
2934 14:47:47.052354
2935 14:47:47.052427
2936 14:47:47.055053 TX Vref found, early break! 376< 384
2937 14:47:47.058596 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2938 14:47:47.062092 u1DelayCellOfst[0]=7 cells (6 PI)
2939 14:47:47.065364 u1DelayCellOfst[1]=5 cells (4 PI)
2940 14:47:47.068473 u1DelayCellOfst[2]=2 cells (2 PI)
2941 14:47:47.072075 u1DelayCellOfst[3]=0 cells (0 PI)
2942 14:47:47.075151 u1DelayCellOfst[4]=5 cells (4 PI)
2943 14:47:47.078591 u1DelayCellOfst[5]=6 cells (5 PI)
2944 14:47:47.081598 u1DelayCellOfst[6]=6 cells (5 PI)
2945 14:47:47.084761 u1DelayCellOfst[7]=5 cells (4 PI)
2946 14:47:47.088269 Byte0, DQ PI dly=987, DQM PI dly= 990
2947 14:47:47.091324 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2948 14:47:47.091724
2949 14:47:47.094816 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2950 14:47:47.097828
2951 14:47:47.098224 u1DelayCellOfst[8]=2 cells (2 PI)
2952 14:47:47.101367 u1DelayCellOfst[9]=2 cells (2 PI)
2953 14:47:47.104429 u1DelayCellOfst[10]=5 cells (4 PI)
2954 14:47:47.107893 u1DelayCellOfst[11]=6 cells (5 PI)
2955 14:47:47.110992 u1DelayCellOfst[12]=5 cells (4 PI)
2956 14:47:47.114449 u1DelayCellOfst[13]=6 cells (5 PI)
2957 14:47:47.117658 u1DelayCellOfst[14]=6 cells (5 PI)
2958 14:47:47.120667 u1DelayCellOfst[15]=0 cells (0 PI)
2959 14:47:47.123980 Byte1, DQ PI dly=978, DQM PI dly= 980
2960 14:47:47.127558 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2961 14:47:47.128021
2962 14:47:47.133710 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2963 14:47:47.134218
2964 14:47:47.134604 Write Rank0 MR14 =0x1e
2965 14:47:47.134968
2966 14:47:47.137036 Final TX Range 0 Vref 30
2967 14:47:47.137585
2968 14:47:47.143654 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2969 14:47:47.144277
2970 14:47:47.150321 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2971 14:47:47.156671 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2972 14:47:47.166497 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2973 14:47:47.166648 Write Rank0 MR3 =0xb0
2974 14:47:47.169448 DramC Write-DBI on
2975 14:47:47.169573 ==
2976 14:47:47.172858 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2977 14:47:47.176308 fsp= 1, odt_onoff= 1, Byte mode= 0
2978 14:47:47.176413 ==
2979 14:47:47.182704 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2980 14:47:47.182820
2981 14:47:47.182930 Begin, DQ Scan Range 700~764
2982 14:47:47.183030
2983 14:47:47.185817
2984 14:47:47.185932 TX Vref Scan disable
2985 14:47:47.189080 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2986 14:47:47.192449 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2987 14:47:47.195938 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2988 14:47:47.198836 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2989 14:47:47.205712 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2990 14:47:47.208796 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2991 14:47:47.212116 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2992 14:47:47.215269 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2993 14:47:47.218726 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2994 14:47:47.222021 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2995 14:47:47.225109 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2996 14:47:47.228373 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2997 14:47:47.231642 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2998 14:47:47.234992 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2999 14:47:47.238199 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3000 14:47:47.241624 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3001 14:47:47.244906 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3002 14:47:47.248129 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3003 14:47:47.251314 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3004 14:47:47.254514 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3005 14:47:47.261290 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3006 14:47:47.264383 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3007 14:47:47.267541 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3008 14:47:47.274172 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3009 14:47:47.277524 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3010 14:47:47.280942 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3011 14:47:47.284088 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3012 14:47:47.287413 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3013 14:47:47.290769 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3014 14:47:47.293989 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3015 14:47:47.296983 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3016 14:47:47.300412 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3017 14:47:47.303556 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3018 14:47:47.306879 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3019 14:47:47.310395 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3020 14:47:47.313343 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3021 14:47:47.320075 Byte0, DQ PI dly=735, DQM PI dly= 735
3022 14:47:47.323802 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3023 14:47:47.323906
3024 14:47:47.326763 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3025 14:47:47.326861
3026 14:47:47.330220 Byte1, DQ PI dly=724, DQM PI dly= 724
3027 14:47:47.336642 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3028 14:47:47.336761
3029 14:47:47.339843 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3030 14:47:47.339972
3031 14:47:47.346363 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3032 14:47:47.352967 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3033 14:47:47.359555 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3034 14:47:47.363191 Write Rank0 MR3 =0x30
3035 14:47:47.363476 DramC Write-DBI off
3036 14:47:47.363763
3037 14:47:47.366105 [DATLAT]
3038 14:47:47.369686 Freq=1600, CH1 RK0, use_rxtx_scan=0
3039 14:47:47.370055
3040 14:47:47.370421 DATLAT Default: 0xf
3041 14:47:47.372949 7, 0xFFFF, sum=0
3042 14:47:47.373360 8, 0xFFFF, sum=0
3043 14:47:47.376409 9, 0xFFFF, sum=0
3044 14:47:47.376942 10, 0xFFFF, sum=0
3045 14:47:47.379533 11, 0xFFFF, sum=0
3046 14:47:47.379935 12, 0xFFFF, sum=0
3047 14:47:47.382786 13, 0xFFFF, sum=0
3048 14:47:47.383188 14, 0x0, sum=1
3049 14:47:47.386018 15, 0x0, sum=2
3050 14:47:47.386445 16, 0x0, sum=3
3051 14:47:47.386854 17, 0x0, sum=4
3052 14:47:47.392482 pattern=2 first_step=14 total pass=5 best_step=16
3053 14:47:47.392878 ==
3054 14:47:47.395838 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3055 14:47:47.399100 fsp= 1, odt_onoff= 1, Byte mode= 0
3056 14:47:47.399498 ==
3057 14:47:47.405396 Start DQ dly to find pass range UseTestEngine =1
3058 14:47:47.408769 x-axis: bit #, y-axis: DQ dly (-127~63)
3059 14:47:47.409288 RX Vref Scan = 1
3060 14:47:47.517182
3061 14:47:47.517871 RX Vref found, early break!
3062 14:47:47.518295
3063 14:47:47.523622 Final RX Vref 11, apply to both rank0 and 1
3064 14:47:47.524210 ==
3065 14:47:47.527108 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3066 14:47:47.530335 fsp= 1, odt_onoff= 1, Byte mode= 0
3067 14:47:47.530775 ==
3068 14:47:47.533422 DQS Delay:
3069 14:47:47.533876 DQS0 = 0, DQS1 = 0
3070 14:47:47.534208 DQM Delay:
3071 14:47:47.536808 DQM0 = 19, DQM1 = 18
3072 14:47:47.537218 DQ Delay:
3073 14:47:47.540138 DQ0 =21, DQ1 =21, DQ2 =17, DQ3 =15
3074 14:47:47.543109 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3075 14:47:47.546871 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
3076 14:47:47.549848 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =13
3077 14:47:47.550259
3078 14:47:47.550589
3079 14:47:47.550930
3080 14:47:47.553211 [DramC_TX_OE_Calibration] TA2
3081 14:47:47.556358 Original DQ_B0 (3 6) =30, OEN = 27
3082 14:47:47.559883 Original DQ_B1 (3 6) =30, OEN = 27
3083 14:47:47.562924 23, 0x0, End_B0=23 End_B1=23
3084 14:47:47.566063 24, 0x0, End_B0=24 End_B1=24
3085 14:47:47.566485 25, 0x0, End_B0=25 End_B1=25
3086 14:47:47.569476 26, 0x0, End_B0=26 End_B1=26
3087 14:47:47.572560 27, 0x0, End_B0=27 End_B1=27
3088 14:47:47.575946 28, 0x0, End_B0=28 End_B1=28
3089 14:47:47.579128 29, 0x0, End_B0=29 End_B1=29
3090 14:47:47.579613 30, 0x0, End_B0=30 End_B1=30
3091 14:47:47.582432 31, 0xFFFF, End_B0=30 End_B1=30
3092 14:47:47.589038 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3093 14:47:47.596269 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3094 14:47:47.596756
3095 14:47:47.597068
3096 14:47:47.597386 Write Rank0 MR23 =0x3f
3097 14:47:47.598871 [DQSOSC]
3098 14:47:47.605687 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3099 14:47:47.612536 CH1_RK0: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3100 14:47:47.615463 Write Rank0 MR23 =0x3f
3101 14:47:47.615881 [DQSOSC]
3102 14:47:47.621897 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3103 14:47:47.625298 CH1 RK0: MR19=202, MR18=B5B5
3104 14:47:47.628388 [RankSwap] Rank num 2, (Multi 1), Rank 1
3105 14:47:47.631412 Write Rank0 MR2 =0xad
3106 14:47:47.631846 [Write Leveling]
3107 14:47:47.634978 delay byte0 byte1 byte2 byte3
3108 14:47:47.635476
3109 14:47:47.638216 10 0 0
3110 14:47:47.638640 11 0 0
3111 14:47:47.641318 12 0 0
3112 14:47:47.641797 13 0 0
3113 14:47:47.642138 14 0 0
3114 14:47:47.644722 15 0 0
3115 14:47:47.645216 16 0 0
3116 14:47:47.648107 17 0 0
3117 14:47:47.648665 18 0 0
3118 14:47:47.649149 19 0 0
3119 14:47:47.651469 20 0 0
3120 14:47:47.651886 21 0 0
3121 14:47:47.654447 22 0 0
3122 14:47:47.654865 23 0 0
3123 14:47:47.657918 24 0 0
3124 14:47:47.658337 25 0 0
3125 14:47:47.658671 26 0 0
3126 14:47:47.661504 27 0 ff
3127 14:47:47.662028 28 0 ff
3128 14:47:47.664490 29 0 0
3129 14:47:47.664908 30 0 ff
3130 14:47:47.668174 31 0 ff
3131 14:47:47.668695 32 0 ff
3132 14:47:47.671384 33 0 ff
3133 14:47:47.671914 34 ff ff
3134 14:47:47.672258 35 ff ff
3135 14:47:47.674532 36 ff ff
3136 14:47:47.674952 37 ff ff
3137 14:47:47.677524 38 ff ff
3138 14:47:47.677949 39 ff ff
3139 14:47:47.681290 40 ff ff
3140 14:47:47.684146 pass bytecount = 0xff (0xff: all bytes pass)
3141 14:47:47.684569
3142 14:47:47.687822 DQS0 dly: 34
3143 14:47:47.688337 DQS1 dly: 30
3144 14:47:47.688673 Write Rank0 MR2 =0x2d
3145 14:47:47.694104 [RankSwap] Rank num 2, (Multi 1), Rank 0
3146 14:47:47.694522 Write Rank1 MR1 =0xd6
3147 14:47:47.694852 [Gating]
3148 14:47:47.697133 ==
3149 14:47:47.700852 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3150 14:47:47.703903 fsp= 1, odt_onoff= 1, Byte mode= 0
3151 14:47:47.704322 ==
3152 14:47:47.706983 3 1 0 |2c2b 3636 |(11 11)(10 10) |(1 1)(0 0)| 0
3153 14:47:47.713701 3 1 4 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3154 14:47:47.717138 3 1 8 |2c2b 3636 |(11 11)(10 10) |(1 1)(1 1)| 0
3155 14:47:47.720064 3 1 12 |2c2b 3636 |(11 11)(11 11) |(0 0)(0 0)| 0
3156 14:47:47.726837 3 1 16 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3157 14:47:47.729951 3 1 20 |2c2b 3332 |(11 11)(11 11) |(1 0)(1 1)| 0
3158 14:47:47.733580 3 1 24 |2c2b 3333 |(11 11)(11 11) |(1 0)(1 0)| 0
3159 14:47:47.739754 3 1 28 |2c2b 1111 |(11 11)(11 11) |(1 0)(1 1)| 0
3160 14:47:47.742945 3 2 0 |2c2b 3131 |(11 11)(11 11) |(1 0)(0 1)| 0
3161 14:47:47.746725 3 2 4 |2c2b 1e1e |(11 11)(11 11) |(1 0)(0 0)| 0
3162 14:47:47.752673 3 2 8 |2c2b 2b2b |(11 11)(11 11) |(1 0)(1 1)| 0
3163 14:47:47.756562 [Byte 1] Lead/lag falling Transition (3, 2, 8)
3164 14:47:47.759839 3 2 12 |2c2b 3231 |(11 11)(11 11) |(1 0)(0 1)| 0
3165 14:47:47.766229 3 2 16 |2c2c 3232 |(11 0)(0 0) |(0 0)(1 1)| 0
3166 14:47:47.769523 [Byte 1] Lead/lag Transition tap number (1)
3167 14:47:47.772387 3 2 20 |201 909 |(11 1)(11 11) |(0 0)(0 0)| 0
3168 14:47:47.776174 3 2 24 |3534 2525 |(11 11)(11 11) |(0 0)(1 1)| 0
3169 14:47:47.782775 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3170 14:47:47.785694 3 3 0 |3534 3e3d |(11 11)(11 11) |(0 0)(1 1)| 0
3171 14:47:47.788962 3 3 4 |3534 3939 |(11 11)(11 11) |(0 0)(0 0)| 0
3172 14:47:47.795446 3 3 8 |3534 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
3173 14:47:47.798452 3 3 12 |3534 1111 |(11 11)(11 11) |(0 0)(0 0)| 0
3174 14:47:47.802080 3 3 16 |3534 3737 |(11 11)(11 11) |(1 1)(0 0)| 0
3175 14:47:47.808185 3 3 20 |3534 707 |(11 11)(11 11) |(1 1)(1 1)| 0
3176 14:47:47.811626 3 3 24 |3534 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
3177 14:47:47.815381 [Byte 0] Lead/lag falling Transition (3, 3, 24)
3178 14:47:47.821898 3 3 28 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
3179 14:47:47.824822 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3180 14:47:47.827999 [Byte 1] Lead/lag Transition tap number (1)
3181 14:47:47.831909 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3182 14:47:47.837805 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3183 14:47:47.841144 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3184 14:47:47.844622 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3185 14:47:47.851248 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3186 14:47:47.854060 3 4 24 |3d3d 504 |(11 11)(11 11) |(1 1)(0 1)| 0
3187 14:47:47.857309 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3188 14:47:47.864123 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3189 14:47:47.867135 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3190 14:47:47.870594 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3191 14:47:47.877089 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3192 14:47:47.880400 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3193 14:47:47.883463 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3194 14:47:47.890007 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3195 14:47:47.893668 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3196 14:47:47.896622 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3197 14:47:47.903113 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3198 14:47:47.906243 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3199 14:47:47.909612 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3200 14:47:47.916162 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3201 14:47:47.919368 [Byte 0] Lead/lag Transition tap number (2)
3202 14:47:47.923009 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3203 14:47:47.925806 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3204 14:47:47.932350 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3205 14:47:47.935768 [Byte 1] Lead/lag Transition tap number (2)
3206 14:47:47.939192 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3207 14:47:47.942153 [Byte 0]First pass (3, 6, 24)
3208 14:47:47.945786 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3209 14:47:47.948948 [Byte 1]First pass (3, 6, 28)
3210 14:47:47.952181 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3211 14:47:47.958527 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3212 14:47:47.961809 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3213 14:47:47.965266 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3214 14:47:47.968680 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3215 14:47:47.971623 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3216 14:47:47.978036 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3217 14:47:47.981601 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3218 14:47:47.984548 All bytes gating window > 1UI, Early break!
3219 14:47:47.984684
3220 14:47:47.988261 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3221 14:47:47.988392
3222 14:47:47.991308 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3223 14:47:47.994480
3224 14:47:47.994610
3225 14:47:47.994742
3226 14:47:47.997551 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3227 14:47:47.997683
3228 14:47:48.001170 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3229 14:47:48.001301
3230 14:47:48.001483
3231 14:47:48.004466 Write Rank1 MR1 =0x56
3232 14:47:48.004597
3233 14:47:48.007612 best RODT dly(2T, 0.5T) = (2, 3)
3234 14:47:48.007743
3235 14:47:48.010767 best RODT dly(2T, 0.5T) = (2, 3)
3236 14:47:48.010898 ==
3237 14:47:48.014341 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3238 14:47:48.017662 fsp= 1, odt_onoff= 1, Byte mode= 0
3239 14:47:48.017794 ==
3240 14:47:48.023895 Start DQ dly to find pass range UseTestEngine =0
3241 14:47:48.027083 x-axis: bit #, y-axis: DQ dly (-127~63)
3242 14:47:48.027214 RX Vref Scan = 0
3243 14:47:48.030394 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3244 14:47:48.033752 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3245 14:47:48.037194 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3246 14:47:48.040263 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3247 14:47:48.043679 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3248 14:47:48.046802 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3249 14:47:48.046935 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3250 14:47:48.050297 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3251 14:47:48.053263 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3252 14:47:48.056670 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3253 14:47:48.059783 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3254 14:47:48.062962 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3255 14:47:48.066380 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3256 14:47:48.069581 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3257 14:47:48.072848 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3258 14:47:48.076032 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3259 14:47:48.076130 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3260 14:47:48.079181 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3261 14:47:48.082807 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3262 14:47:48.086101 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3263 14:47:48.089131 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3264 14:47:48.092326 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3265 14:47:48.095765 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3266 14:47:48.098967 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3267 14:47:48.099064 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3268 14:47:48.102593 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3269 14:47:48.105878 0, [0] xxxoxxxx ooxxxxxo [MSB]
3270 14:47:48.109160 1, [0] xxxoxxxx ooxxxxxo [MSB]
3271 14:47:48.112277 2, [0] xxxoxxxx ooxxoxxo [MSB]
3272 14:47:48.115769 3, [0] xxooxxxo oooxoxxo [MSB]
3273 14:47:48.118930 4, [0] xooooxxo oooooooo [MSB]
3274 14:47:48.119336 5, [0] oooooxoo oooooooo [MSB]
3275 14:47:48.122313 32, [0] oooooooo ooooooox [MSB]
3276 14:47:48.125730 33, [0] oooooooo ooooooox [MSB]
3277 14:47:48.128880 34, [0] oooooooo oxooooox [MSB]
3278 14:47:48.131919 35, [0] ooxxoooo oxooooox [MSB]
3279 14:47:48.135226 36, [0] ooxxoooo xxooooox [MSB]
3280 14:47:48.138759 37, [0] ooxxoooo xxooooox [MSB]
3281 14:47:48.142005 38, [0] ooxxoooo xxooooox [MSB]
3282 14:47:48.142452 39, [0] oxxxooox xxooooox [MSB]
3283 14:47:48.145114 40, [0] oxxxooox xxxxooox [MSB]
3284 14:47:48.148402 41, [0] oxxxxoxx xxxxxoox [MSB]
3285 14:47:48.151840 42, [0] xxxxxoxx xxxxxxxx [MSB]
3286 14:47:48.155166 43, [0] xxxxxxxx xxxxxxxx [MSB]
3287 14:47:48.158467 iDelay=43, Bit 0, Center 23 (5 ~ 41) 37
3288 14:47:48.161397 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
3289 14:47:48.165353 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3290 14:47:48.168388 iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36
3291 14:47:48.171412 iDelay=43, Bit 4, Center 22 (4 ~ 40) 37
3292 14:47:48.175172 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
3293 14:47:48.177865 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3294 14:47:48.184542 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3295 14:47:48.187631 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
3296 14:47:48.190862 iDelay=43, Bit 9, Center 16 (-1 ~ 33) 35
3297 14:47:48.193995 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3298 14:47:48.197055 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3299 14:47:48.200539 iDelay=43, Bit 12, Center 21 (2 ~ 40) 39
3300 14:47:48.203906 iDelay=43, Bit 13, Center 22 (4 ~ 41) 38
3301 14:47:48.207010 iDelay=43, Bit 14, Center 22 (4 ~ 41) 38
3302 14:47:48.209864 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3303 14:47:48.209960 ==
3304 14:47:48.216498 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3305 14:47:48.219942 fsp= 1, odt_onoff= 1, Byte mode= 0
3306 14:47:48.220072 ==
3307 14:47:48.220181 DQS Delay:
3308 14:47:48.223184 DQS0 = 0, DQS1 = 0
3309 14:47:48.223280 DQM Delay:
3310 14:47:48.226559 DQM0 = 20, DQM1 = 19
3311 14:47:48.226657 DQ Delay:
3312 14:47:48.229714 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3313 14:47:48.233208 DQ4 =22, DQ5 =24, DQ6 =22, DQ7 =20
3314 14:47:48.236146 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =21
3315 14:47:48.239638 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
3316 14:47:48.239734
3317 14:47:48.239830
3318 14:47:48.242803 DramC Write-DBI off
3319 14:47:48.242898 ==
3320 14:47:48.246357 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3321 14:47:48.249370 fsp= 1, odt_onoff= 1, Byte mode= 0
3322 14:47:48.249474 ==
3323 14:47:48.255891 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3324 14:47:48.255987
3325 14:47:48.256084 Begin, DQ Scan Range 926~1182
3326 14:47:48.259250
3327 14:47:48.259344
3328 14:47:48.259443 TX Vref Scan disable
3329 14:47:48.262621 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3330 14:47:48.265588 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3331 14:47:48.268926 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3332 14:47:48.275395 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3333 14:47:48.278941 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3334 14:47:48.282243 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3335 14:47:48.285605 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3336 14:47:48.288862 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3337 14:47:48.291945 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3338 14:47:48.295312 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3339 14:47:48.298760 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3340 14:47:48.301828 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3341 14:47:48.305150 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3342 14:47:48.308457 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3343 14:47:48.311577 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3344 14:47:48.314817 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3345 14:47:48.321559 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3346 14:47:48.324580 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3347 14:47:48.327891 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3348 14:47:48.331171 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3349 14:47:48.334460 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3350 14:47:48.337641 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3351 14:47:48.341133 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3352 14:47:48.344254 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3353 14:47:48.347700 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3354 14:47:48.350962 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3355 14:47:48.354077 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3356 14:47:48.357680 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3357 14:47:48.360601 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3358 14:47:48.367451 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3359 14:47:48.370428 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3360 14:47:48.373783 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3361 14:47:48.377215 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3362 14:47:48.380424 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3363 14:47:48.383551 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3364 14:47:48.387155 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3365 14:47:48.390235 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3366 14:47:48.393341 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3367 14:47:48.397199 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3368 14:47:48.400153 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3369 14:47:48.403423 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3370 14:47:48.407136 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3371 14:47:48.409774 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3372 14:47:48.412946 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3373 14:47:48.420114 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3374 14:47:48.423296 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3375 14:47:48.426428 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3376 14:47:48.429757 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3377 14:47:48.433090 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3378 14:47:48.436322 975 |3 6 15|[0] xxxxxxxx xoxxxxxo [MSB]
3379 14:47:48.439734 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3380 14:47:48.442859 977 |3 6 17|[0] xxxxxxxx oooxxxoo [MSB]
3381 14:47:48.446095 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3382 14:47:48.449695 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3383 14:47:48.452920 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3384 14:47:48.456580 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3385 14:47:48.459215 982 |3 6 22|[0] xooooxoo oooooooo [MSB]
3386 14:47:48.467033 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3387 14:47:48.470402 993 |3 6 33|[0] oooooooo ooooooox [MSB]
3388 14:47:48.473808 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3389 14:47:48.476641 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3390 14:47:48.480039 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3391 14:47:48.483516 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3392 14:47:48.486576 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3393 14:47:48.489794 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3394 14:47:48.493142 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3395 14:47:48.497068 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3396 14:47:48.499859 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
3397 14:47:48.506388 1003 |3 6 43|[0] ooxxooox xxxxxxxx [MSB]
3398 14:47:48.509605 1004 |3 6 44|[0] oxxxooox xxxxxxxx [MSB]
3399 14:47:48.513392 1005 |3 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
3400 14:47:48.516619 Byte0, DQ PI dly=991, DQM PI dly= 991
3401 14:47:48.519530 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3402 14:47:48.520051
3403 14:47:48.525937 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3404 14:47:48.526360
3405 14:47:48.529350 Byte1, DQ PI dly=984, DQM PI dly= 984
3406 14:47:48.532856 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3407 14:47:48.533369
3408 14:47:48.535527 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3409 14:47:48.535947
3410 14:47:48.536273 ==
3411 14:47:48.542575 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3412 14:47:48.546150 fsp= 1, odt_onoff= 1, Byte mode= 0
3413 14:47:48.546696 ==
3414 14:47:48.549118 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3415 14:47:48.549682
3416 14:47:48.552017 Begin, DQ Scan Range 960~1024
3417 14:47:48.555378 Write Rank1 MR14 =0x0
3418 14:47:48.562963
3419 14:47:48.563469 CH=1, VrefRange= 0, VrefLevel = 0
3420 14:47:48.569344 TX Bit0 (985~1000) 16 992, Bit8 (979~989) 11 984,
3421 14:47:48.572490 TX Bit1 (984~998) 15 991, Bit9 (977~989) 13 983,
3422 14:47:48.578965 TX Bit2 (982~997) 16 989, Bit10 (978~994) 17 986,
3423 14:47:48.582231 TX Bit3 (980~992) 13 986, Bit11 (980~994) 15 987,
3424 14:47:48.588409 TX Bit4 (984~999) 16 991, Bit12 (982~991) 10 986,
3425 14:47:48.591782 TX Bit5 (985~1000) 16 992, Bit13 (981~993) 13 987,
3426 14:47:48.595233 TX Bit6 (984~998) 15 991, Bit14 (980~992) 13 986,
3427 14:47:48.601703 TX Bit7 (984~997) 14 990, Bit15 (976~986) 11 981,
3428 14:47:48.602119
3429 14:47:48.602441 Write Rank1 MR14 =0x2
3430 14:47:48.611573
3431 14:47:48.612090 CH=1, VrefRange= 0, VrefLevel = 2
3432 14:47:48.618189 TX Bit0 (985~1001) 17 993, Bit8 (978~990) 13 984,
3433 14:47:48.621598 TX Bit1 (984~999) 16 991, Bit9 (977~990) 14 983,
3434 14:47:48.627988 TX Bit2 (982~997) 16 989, Bit10 (978~995) 18 986,
3435 14:47:48.631489 TX Bit3 (979~993) 15 986, Bit11 (979~995) 17 987,
3436 14:47:48.634273 TX Bit4 (983~999) 17 991, Bit12 (982~992) 11 987,
3437 14:47:48.640968 TX Bit5 (985~1001) 17 993, Bit13 (981~995) 15 988,
3438 14:47:48.644209 TX Bit6 (984~999) 16 991, Bit14 (980~992) 13 986,
3439 14:47:48.650600 TX Bit7 (984~998) 15 991, Bit15 (975~987) 13 981,
3440 14:47:48.651016
3441 14:47:48.651336 Write Rank1 MR14 =0x4
3442 14:47:48.660548
3443 14:47:48.661057 CH=1, VrefRange= 0, VrefLevel = 4
3444 14:47:48.666802 TX Bit0 (984~1002) 19 993, Bit8 (978~991) 14 984,
3445 14:47:48.670294 TX Bit1 (984~999) 16 991, Bit9 (977~990) 14 983,
3446 14:47:48.677119 TX Bit2 (981~998) 18 989, Bit10 (978~995) 18 986,
3447 14:47:48.680351 TX Bit3 (979~994) 16 986, Bit11 (979~995) 17 987,
3448 14:47:48.683127 TX Bit4 (983~1000) 18 991, Bit12 (980~992) 13 986,
3449 14:47:48.689528 TX Bit5 (984~1001) 18 992, Bit13 (980~996) 17 988,
3450 14:47:48.692796 TX Bit6 (984~1000) 17 992, Bit14 (979~993) 15 986,
3451 14:47:48.699889 TX Bit7 (984~999) 16 991, Bit15 (975~988) 14 981,
3452 14:47:48.700428
3453 14:47:48.700934 Write Rank1 MR14 =0x6
3454 14:47:48.709247
3455 14:47:48.709871 CH=1, VrefRange= 0, VrefLevel = 6
3456 14:47:48.715859 TX Bit0 (984~1003) 20 993, Bit8 (977~991) 15 984,
3457 14:47:48.719258 TX Bit1 (984~1000) 17 992, Bit9 (976~991) 16 983,
3458 14:47:48.725646 TX Bit2 (982~998) 17 990, Bit10 (978~997) 20 987,
3459 14:47:48.729000 TX Bit3 (979~996) 18 987, Bit11 (979~997) 19 988,
3460 14:47:48.732230 TX Bit4 (983~1001) 19 992, Bit12 (980~993) 14 986,
3461 14:47:48.738354 TX Bit5 (984~1002) 19 993, Bit13 (979~996) 18 987,
3462 14:47:48.741940 TX Bit6 (984~1000) 17 992, Bit14 (979~994) 16 986,
3463 14:47:48.748427 TX Bit7 (984~999) 16 991, Bit15 (974~989) 16 981,
3464 14:47:48.748655
3465 14:47:48.748834 Write Rank1 MR14 =0x8
3466 14:47:48.758489
3467 14:47:48.761839 CH=1, VrefRange= 0, VrefLevel = 8
3468 14:47:48.764807 TX Bit0 (984~1004) 21 994, Bit8 (977~991) 15 984,
3469 14:47:48.767902 TX Bit1 (984~1001) 18 992, Bit9 (976~991) 16 983,
3470 14:47:48.774565 TX Bit2 (981~999) 19 990, Bit10 (978~998) 21 988,
3471 14:47:48.778113 TX Bit3 (978~996) 19 987, Bit11 (978~997) 20 987,
3472 14:47:48.784687 TX Bit4 (983~1001) 19 992, Bit12 (980~994) 15 987,
3473 14:47:48.787765 TX Bit5 (984~1003) 20 993, Bit13 (979~997) 19 988,
3474 14:47:48.791074 TX Bit6 (983~1001) 19 992, Bit14 (978~994) 17 986,
3475 14:47:48.797341 TX Bit7 (984~1000) 17 992, Bit15 (973~989) 17 981,
3476 14:47:48.797591
3477 14:47:48.797769 Write Rank1 MR14 =0xa
3478 14:47:48.807859
3479 14:47:48.811018 CH=1, VrefRange= 0, VrefLevel = 10
3480 14:47:48.814391 TX Bit0 (984~1004) 21 994, Bit8 (977~992) 16 984,
3481 14:47:48.817524 TX Bit1 (983~1002) 20 992, Bit9 (976~991) 16 983,
3482 14:47:48.824115 TX Bit2 (981~999) 19 990, Bit10 (977~998) 22 987,
3483 14:47:48.827139 TX Bit3 (978~997) 20 987, Bit11 (978~998) 21 988,
3484 14:47:48.833952 TX Bit4 (982~1002) 21 992, Bit12 (979~994) 16 986,
3485 14:47:48.837367 TX Bit5 (984~1004) 21 994, Bit13 (979~998) 20 988,
3486 14:47:48.840467 TX Bit6 (983~1002) 20 992, Bit14 (978~995) 18 986,
3487 14:47:48.847217 TX Bit7 (983~1000) 18 991, Bit15 (972~990) 19 981,
3488 14:47:48.847335
3489 14:47:48.847428 Write Rank1 MR14 =0xc
3490 14:47:48.857734
3491 14:47:48.860809 CH=1, VrefRange= 0, VrefLevel = 12
3492 14:47:48.864030 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3493 14:47:48.867344 TX Bit1 (982~1002) 21 992, Bit9 (976~992) 17 984,
3494 14:47:48.874171 TX Bit2 (981~1000) 20 990, Bit10 (977~998) 22 987,
3495 14:47:48.877022 TX Bit3 (978~997) 20 987, Bit11 (978~998) 21 988,
3496 14:47:48.883784 TX Bit4 (982~1003) 22 992, Bit12 (979~996) 18 987,
3497 14:47:48.886918 TX Bit5 (984~1004) 21 994, Bit13 (979~998) 20 988,
3498 14:47:48.890517 TX Bit6 (983~1003) 21 993, Bit14 (978~996) 19 987,
3499 14:47:48.896758 TX Bit7 (983~1001) 19 992, Bit15 (971~990) 20 980,
3500 14:47:48.897153
3501 14:47:48.897601 Write Rank1 MR14 =0xe
3502 14:47:48.907694
3503 14:47:48.910697 CH=1, VrefRange= 0, VrefLevel = 14
3504 14:47:48.913831 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3505 14:47:48.916888 TX Bit1 (982~1003) 22 992, Bit9 (976~992) 17 984,
3506 14:47:48.923584 TX Bit2 (980~1000) 21 990, Bit10 (977~999) 23 988,
3507 14:47:48.926906 TX Bit3 (978~998) 21 988, Bit11 (978~999) 22 988,
3508 14:47:48.933463 TX Bit4 (982~1003) 22 992, Bit12 (978~996) 19 987,
3509 14:47:48.936919 TX Bit5 (983~1005) 23 994, Bit13 (978~999) 22 988,
3510 14:47:48.940225 TX Bit6 (983~1003) 21 993, Bit14 (977~997) 21 987,
3511 14:47:48.946631 TX Bit7 (983~1002) 20 992, Bit15 (972~991) 20 981,
3512 14:47:48.946724
3513 14:47:48.946796 Write Rank1 MR14 =0x10
3514 14:47:48.957281
3515 14:47:48.960585 CH=1, VrefRange= 0, VrefLevel = 16
3516 14:47:48.963874 TX Bit0 (984~1005) 22 994, Bit8 (976~993) 18 984,
3517 14:47:48.967019 TX Bit1 (982~1004) 23 993, Bit9 (975~992) 18 983,
3518 14:47:48.973467 TX Bit2 (979~1001) 23 990, Bit10 (977~999) 23 988,
3519 14:47:48.976668 TX Bit3 (977~998) 22 987, Bit11 (978~999) 22 988,
3520 14:47:48.983522 TX Bit4 (981~1004) 24 992, Bit12 (978~997) 20 987,
3521 14:47:48.986620 TX Bit5 (983~1005) 23 994, Bit13 (978~999) 22 988,
3522 14:47:48.989888 TX Bit6 (982~1004) 23 993, Bit14 (978~998) 21 988,
3523 14:47:48.996204 TX Bit7 (982~1002) 21 992, Bit15 (972~991) 20 981,
3524 14:47:48.996291
3525 14:47:48.996362 Write Rank1 MR14 =0x12
3526 14:47:49.007103
3527 14:47:49.010115 CH=1, VrefRange= 0, VrefLevel = 18
3528 14:47:49.013699 TX Bit0 (983~1005) 23 994, Bit8 (976~993) 18 984,
3529 14:47:49.016736 TX Bit1 (981~1005) 25 993, Bit9 (975~993) 19 984,
3530 14:47:49.023460 TX Bit2 (979~1002) 24 990, Bit10 (977~999) 23 988,
3531 14:47:49.026726 TX Bit3 (977~998) 22 987, Bit11 (977~999) 23 988,
3532 14:47:49.033295 TX Bit4 (981~1004) 24 992, Bit12 (978~997) 20 987,
3533 14:47:49.036652 TX Bit5 (983~1005) 23 994, Bit13 (978~999) 22 988,
3534 14:47:49.039574 TX Bit6 (982~1005) 24 993, Bit14 (977~998) 22 987,
3535 14:47:49.046409 TX Bit7 (982~1003) 22 992, Bit15 (971~991) 21 981,
3536 14:47:49.046535
3537 14:47:49.046644 Write Rank1 MR14 =0x14
3538 14:47:49.057024
3539 14:47:49.060563 CH=1, VrefRange= 0, VrefLevel = 20
3540 14:47:49.063645 TX Bit0 (983~1006) 24 994, Bit8 (975~994) 20 984,
3541 14:47:49.067036 TX Bit1 (981~1005) 25 993, Bit9 (975~993) 19 984,
3542 14:47:49.073616 TX Bit2 (978~1003) 26 990, Bit10 (976~999) 24 987,
3543 14:47:49.076862 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3544 14:47:49.083248 TX Bit4 (981~1005) 25 993, Bit12 (977~998) 22 987,
3545 14:47:49.086660 TX Bit5 (983~1005) 23 994, Bit13 (978~999) 22 988,
3546 14:47:49.089845 TX Bit6 (981~1005) 25 993, Bit14 (977~999) 23 988,
3547 14:47:49.096451 TX Bit7 (982~1004) 23 993, Bit15 (970~992) 23 981,
3548 14:47:49.096543
3549 14:47:49.096641 Write Rank1 MR14 =0x16
3550 14:47:49.107314
3551 14:47:49.110220 CH=1, VrefRange= 0, VrefLevel = 22
3552 14:47:49.113792 TX Bit0 (982~1006) 25 994, Bit8 (975~995) 21 985,
3553 14:47:49.116952 TX Bit1 (981~1005) 25 993, Bit9 (974~994) 21 984,
3554 14:47:49.123417 TX Bit2 (979~1002) 24 990, Bit10 (976~1000) 25 988,
3555 14:47:49.126893 TX Bit3 (977~999) 23 988, Bit11 (977~1000) 24 988,
3556 14:47:49.133171 TX Bit4 (980~1005) 26 992, Bit12 (977~998) 22 987,
3557 14:47:49.136477 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3558 14:47:49.139955 TX Bit6 (981~1005) 25 993, Bit14 (977~999) 23 988,
3559 14:47:49.146349 TX Bit7 (981~1004) 24 992, Bit15 (970~992) 23 981,
3560 14:47:49.146442
3561 14:47:49.149445 Write Rank1 MR14 =0x18
3562 14:47:49.157316
3563 14:47:49.160724 CH=1, VrefRange= 0, VrefLevel = 24
3564 14:47:49.163951 TX Bit0 (982~1006) 25 994, Bit8 (975~996) 22 985,
3565 14:47:49.167242 TX Bit1 (982~1005) 24 993, Bit9 (974~995) 22 984,
3566 14:47:49.173743 TX Bit2 (978~1003) 26 990, Bit10 (976~1000) 25 988,
3567 14:47:49.177162 TX Bit3 (977~1000) 24 988, Bit11 (977~1000) 24 988,
3568 14:47:49.183897 TX Bit4 (980~1005) 26 992, Bit12 (977~999) 23 988,
3569 14:47:49.186713 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3570 14:47:49.193239 TX Bit6 (980~1005) 26 992, Bit14 (977~999) 23 988,
3571 14:47:49.196836 TX Bit7 (981~1005) 25 993, Bit15 (971~993) 23 982,
3572 14:47:49.196960
3573 14:47:49.199947 Write Rank1 MR14 =0x1a
3574 14:47:49.207907
3575 14:47:49.211119 CH=1, VrefRange= 0, VrefLevel = 26
3576 14:47:49.214560 TX Bit0 (982~1006) 25 994, Bit8 (975~997) 23 986,
3577 14:47:49.217831 TX Bit1 (981~1005) 25 993, Bit9 (973~995) 23 984,
3578 14:47:49.224411 TX Bit2 (978~1004) 27 991, Bit10 (976~1000) 25 988,
3579 14:47:49.227522 TX Bit3 (977~1000) 24 988, Bit11 (976~1001) 26 988,
3580 14:47:49.233984 TX Bit4 (979~1006) 28 992, Bit12 (977~999) 23 988,
3581 14:47:49.237122 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3582 14:47:49.240690 TX Bit6 (980~1005) 26 992, Bit14 (976~999) 24 987,
3583 14:47:49.247217 TX Bit7 (980~1005) 26 992, Bit15 (970~993) 24 981,
3584 14:47:49.247353
3585 14:47:49.250437 Write Rank1 MR14 =0x1c
3586 14:47:49.258089
3587 14:47:49.261381 CH=1, VrefRange= 0, VrefLevel = 28
3588 14:47:49.264739 TX Bit0 (982~1006) 25 994, Bit8 (974~997) 24 985,
3589 14:47:49.268192 TX Bit1 (980~1006) 27 993, Bit9 (973~996) 24 984,
3590 14:47:49.274652 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3591 14:47:49.277630 TX Bit3 (976~1000) 25 988, Bit11 (976~1000) 25 988,
3592 14:47:49.284375 TX Bit4 (979~1006) 28 992, Bit12 (977~999) 23 988,
3593 14:47:49.287719 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3594 14:47:49.290910 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3595 14:47:49.297535 TX Bit7 (980~1005) 26 992, Bit15 (970~993) 24 981,
3596 14:47:49.297617
3597 14:47:49.300693 Write Rank1 MR14 =0x1e
3598 14:47:49.308303
3599 14:47:49.311907 CH=1, VrefRange= 0, VrefLevel = 30
3600 14:47:49.315130 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3601 14:47:49.318343 TX Bit1 (980~1006) 27 993, Bit9 (972~997) 26 984,
3602 14:47:49.325050 TX Bit2 (977~1004) 28 990, Bit10 (977~1000) 24 988,
3603 14:47:49.328148 TX Bit3 (976~1001) 26 988, Bit11 (976~1000) 25 988,
3604 14:47:49.334632 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3605 14:47:49.338334 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3606 14:47:49.344623 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3607 14:47:49.347735 TX Bit7 (980~1005) 26 992, Bit15 (969~994) 26 981,
3608 14:47:49.347824
3609 14:47:49.351148 Write Rank1 MR14 =0x20
3610 14:47:49.358908
3611 14:47:49.362448 CH=1, VrefRange= 0, VrefLevel = 32
3612 14:47:49.365460 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3613 14:47:49.368886 TX Bit1 (980~1006) 27 993, Bit9 (972~997) 26 984,
3614 14:47:49.375258 TX Bit2 (977~1004) 28 990, Bit10 (977~1000) 24 988,
3615 14:47:49.378909 TX Bit3 (976~1001) 26 988, Bit11 (976~1000) 25 988,
3616 14:47:49.385214 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3617 14:47:49.388471 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3618 14:47:49.395175 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3619 14:47:49.398208 TX Bit7 (980~1005) 26 992, Bit15 (969~994) 26 981,
3620 14:47:49.398290
3621 14:47:49.401279 Write Rank1 MR14 =0x22
3622 14:47:49.409498
3623 14:47:49.412651 CH=1, VrefRange= 0, VrefLevel = 34
3624 14:47:49.416069 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3625 14:47:49.419340 TX Bit1 (980~1006) 27 993, Bit9 (972~997) 26 984,
3626 14:47:49.425746 TX Bit2 (977~1004) 28 990, Bit10 (977~1000) 24 988,
3627 14:47:49.428855 TX Bit3 (976~1001) 26 988, Bit11 (976~1000) 25 988,
3628 14:47:49.435564 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3629 14:47:49.438956 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3630 14:47:49.445742 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3631 14:47:49.448653 TX Bit7 (980~1005) 26 992, Bit15 (969~994) 26 981,
3632 14:47:49.448745
3633 14:47:49.451792 Write Rank1 MR14 =0x24
3634 14:47:49.459776
3635 14:47:49.463102 CH=1, VrefRange= 0, VrefLevel = 36
3636 14:47:49.466550 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3637 14:47:49.469769 TX Bit1 (980~1006) 27 993, Bit9 (972~997) 26 984,
3638 14:47:49.476230 TX Bit2 (977~1004) 28 990, Bit10 (977~1000) 24 988,
3639 14:47:49.479486 TX Bit3 (976~1001) 26 988, Bit11 (976~1000) 25 988,
3640 14:47:49.485906 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3641 14:47:49.489387 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3642 14:47:49.495968 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3643 14:47:49.499009 TX Bit7 (980~1005) 26 992, Bit15 (969~994) 26 981,
3644 14:47:49.499091
3645 14:47:49.502207 Write Rank1 MR14 =0x26
3646 14:47:49.510531
3647 14:47:49.513672 CH=1, VrefRange= 0, VrefLevel = 38
3648 14:47:49.517005 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3649 14:47:49.520314 TX Bit1 (980~1006) 27 993, Bit9 (972~997) 26 984,
3650 14:47:49.526821 TX Bit2 (977~1004) 28 990, Bit10 (977~1000) 24 988,
3651 14:47:49.529956 TX Bit3 (976~1001) 26 988, Bit11 (976~1000) 25 988,
3652 14:47:49.536708 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3653 14:47:49.539945 TX Bit5 (981~1006) 26 993, Bit13 (977~1000) 24 988,
3654 14:47:49.546389 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3655 14:47:49.549712 TX Bit7 (980~1005) 26 992, Bit15 (969~994) 26 981,
3656 14:47:49.549798
3657 14:47:49.549868
3658 14:47:49.552856 TX Vref found, early break! 377< 390
3659 14:47:49.556230 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3660 14:47:49.559695 u1DelayCellOfst[0]=7 cells (6 PI)
3661 14:47:49.562809 u1DelayCellOfst[1]=6 cells (5 PI)
3662 14:47:49.566216 u1DelayCellOfst[2]=2 cells (2 PI)
3663 14:47:49.569564 u1DelayCellOfst[3]=0 cells (0 PI)
3664 14:47:49.572534 u1DelayCellOfst[4]=6 cells (5 PI)
3665 14:47:49.576120 u1DelayCellOfst[5]=6 cells (5 PI)
3666 14:47:49.579077 u1DelayCellOfst[6]=6 cells (5 PI)
3667 14:47:49.582384 u1DelayCellOfst[7]=5 cells (4 PI)
3668 14:47:49.585710 Byte0, DQ PI dly=988, DQM PI dly= 991
3669 14:47:49.589013 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3670 14:47:49.589129
3671 14:47:49.595433 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3672 14:47:49.595517
3673 14:47:49.598849 u1DelayCellOfst[8]=5 cells (4 PI)
3674 14:47:49.598929 u1DelayCellOfst[9]=3 cells (3 PI)
3675 14:47:49.601963 u1DelayCellOfst[10]=9 cells (7 PI)
3676 14:47:49.605577 u1DelayCellOfst[11]=9 cells (7 PI)
3677 14:47:49.608590 u1DelayCellOfst[12]=9 cells (7 PI)
3678 14:47:49.612077 u1DelayCellOfst[13]=9 cells (7 PI)
3679 14:47:49.615074 u1DelayCellOfst[14]=9 cells (7 PI)
3680 14:47:49.618375 u1DelayCellOfst[15]=0 cells (0 PI)
3681 14:47:49.621776 Byte1, DQ PI dly=981, DQM PI dly= 984
3682 14:47:49.628453 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3683 14:47:49.628544
3684 14:47:49.631402 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3685 14:47:49.631494
3686 14:47:49.634924 Write Rank1 MR14 =0x1e
3687 14:47:49.635015
3688 14:47:49.635087 Final TX Range 0 Vref 30
3689 14:47:49.635155
3690 14:47:49.641455 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3691 14:47:49.641582
3692 14:47:49.648059 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3693 14:47:49.654624 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3694 14:47:49.664367 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3695 14:47:49.664457 Write Rank1 MR3 =0xb0
3696 14:47:49.667474 DramC Write-DBI on
3697 14:47:49.667553 ==
3698 14:47:49.670864 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3699 14:47:49.673940 fsp= 1, odt_onoff= 1, Byte mode= 0
3700 14:47:49.674032 ==
3701 14:47:49.680424 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3702 14:47:49.680515
3703 14:47:49.683976 Begin, DQ Scan Range 704~768
3704 14:47:49.684067
3705 14:47:49.684139
3706 14:47:49.684206 TX Vref Scan disable
3707 14:47:49.687032 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3708 14:47:49.690445 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3709 14:47:49.693819 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3710 14:47:49.696946 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3711 14:47:49.703825 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3712 14:47:49.706739 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3713 14:47:49.709871 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3714 14:47:49.713380 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3715 14:47:49.716780 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3716 14:47:49.719992 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3717 14:47:49.723332 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3718 14:47:49.726373 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3719 14:47:49.729496 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3720 14:47:49.733121 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3721 14:47:49.736359 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3722 14:47:49.739318 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3723 14:47:49.742777 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3724 14:47:49.745904 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3725 14:47:49.752684 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3726 14:47:49.755902 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3727 14:47:49.762553 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3728 14:47:49.766068 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3729 14:47:49.769132 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3730 14:47:49.772621 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3731 14:47:49.775558 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3732 14:47:49.778880 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3733 14:47:49.782061 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3734 14:47:49.785411 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3735 14:47:49.788781 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3736 14:47:49.792046 Byte0, DQ PI dly=737, DQM PI dly= 737
3737 14:47:49.798587 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3738 14:47:49.798679
3739 14:47:49.801728 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3740 14:47:49.801851
3741 14:47:49.805134 Byte1, DQ PI dly=729, DQM PI dly= 729
3742 14:47:49.808182 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3743 14:47:49.808307
3744 14:47:49.814842 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3745 14:47:49.814967
3746 14:47:49.821323 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3747 14:47:49.828103 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3748 14:47:49.834360 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3749 14:47:49.838066 Write Rank1 MR3 =0x30
3750 14:47:49.838157 DramC Write-DBI off
3751 14:47:49.838229
3752 14:47:49.838297 [DATLAT]
3753 14:47:49.841127 Freq=1600, CH1 RK1, use_rxtx_scan=0
3754 14:47:49.841248
3755 14:47:49.844286 DATLAT Default: 0x10
3756 14:47:49.847494 7, 0xFFFF, sum=0
3757 14:47:49.847582 8, 0xFFFF, sum=0
3758 14:47:49.847655 9, 0xFFFF, sum=0
3759 14:47:49.851048 10, 0xFFFF, sum=0
3760 14:47:49.851158 11, 0xFFFF, sum=0
3761 14:47:49.854128 12, 0xFFFF, sum=0
3762 14:47:49.854232 13, 0xFFFF, sum=0
3763 14:47:49.857699 14, 0x0, sum=1
3764 14:47:49.857808 15, 0x0, sum=2
3765 14:47:49.860780 16, 0x0, sum=3
3766 14:47:49.860875 17, 0x0, sum=4
3767 14:47:49.867220 pattern=2 first_step=14 total pass=5 best_step=16
3768 14:47:49.867313 ==
3769 14:47:49.870633 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3770 14:47:49.873854 fsp= 1, odt_onoff= 1, Byte mode= 0
3771 14:47:49.873970 ==
3772 14:47:49.876897 Start DQ dly to find pass range UseTestEngine =1
3773 14:47:49.883459 x-axis: bit #, y-axis: DQ dly (-127~63)
3774 14:47:49.883546 RX Vref Scan = 0
3775 14:47:49.886888 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3776 14:47:49.890073 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3777 14:47:49.893368 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3778 14:47:49.897017 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3779 14:47:49.900142 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3780 14:47:49.900229 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3781 14:47:49.903301 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3782 14:47:49.906496 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3783 14:47:49.909827 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3784 14:47:49.913077 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3785 14:47:49.916514 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3786 14:47:49.919666 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3787 14:47:49.922916 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3788 14:47:49.926312 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3789 14:47:49.926409 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3790 14:47:49.929613 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3791 14:47:49.932899 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3792 14:47:49.936167 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3793 14:47:49.939266 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3794 14:47:49.943296 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3795 14:47:49.945808 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3796 14:47:49.949095 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3797 14:47:49.949183 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3798 14:47:49.952461 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3799 14:47:49.955658 -2, [0] xxxxxxxx xoxxxxxo [MSB]
3800 14:47:49.959201 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3801 14:47:49.962308 0, [0] xxxoxxxx ooxxxxxo [MSB]
3802 14:47:49.965736 1, [0] xxxoxxxx ooxxxxxo [MSB]
3803 14:47:49.968666 2, [0] xxxoxxxx ooxxxxxo [MSB]
3804 14:47:49.968759 3, [0] xxooxxxo oooooxxo [MSB]
3805 14:47:49.972183 4, [0] ooooxxxo oooooooo [MSB]
3806 14:47:49.975398 5, [0] oooooxxo oooooooo [MSB]
3807 14:47:49.979564 32, [0] oooooooo ooooooox [MSB]
3808 14:47:49.982754 33, [0] oooooooo ooooooox [MSB]
3809 14:47:49.986053 34, [0] oooxoooo oxooooox [MSB]
3810 14:47:49.989369 35, [0] ooxxoooo oxooooox [MSB]
3811 14:47:49.992474 36, [0] ooxxoooo xxooooox [MSB]
3812 14:47:49.995723 37, [0] ooxxoooo xxooooox [MSB]
3813 14:47:49.999099 38, [0] ooxxoooo xxooxoox [MSB]
3814 14:47:49.999202 39, [0] oxxxooox xxxxxoox [MSB]
3815 14:47:50.002483 40, [0] oxxxxoox xxxxxxox [MSB]
3816 14:47:50.005720 41, [0] xxxxxxxx xxxxxxxx [MSB]
3817 14:47:50.008825 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3818 14:47:50.012170 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3819 14:47:50.015652 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3820 14:47:50.022049 iDelay=41, Bit 3, Center 16 (-1 ~ 33) 35
3821 14:47:50.025159 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
3822 14:47:50.028670 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3823 14:47:50.031781 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3824 14:47:50.035154 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3825 14:47:50.038478 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3826 14:47:50.041550 iDelay=41, Bit 9, Center 15 (-2 ~ 33) 36
3827 14:47:50.044689 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3828 14:47:50.048362 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3829 14:47:50.051414 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3830 14:47:50.058058 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3831 14:47:50.061150 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3832 14:47:50.064284 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3833 14:47:50.064405 ==
3834 14:47:50.067727 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3835 14:47:50.071204 fsp= 1, odt_onoff= 1, Byte mode= 0
3836 14:47:50.071297 ==
3837 14:47:50.074239 DQS Delay:
3838 14:47:50.074336 DQS0 = 0, DQS1 = 0
3839 14:47:50.077680 DQM Delay:
3840 14:47:50.077799 DQM0 = 20, DQM1 = 18
3841 14:47:50.077903 DQ Delay:
3842 14:47:50.080766 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3843 14:47:50.084293 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3844 14:47:50.087371 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3845 14:47:50.090778 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3846 14:47:50.090869
3847 14:47:50.090941
3848 14:47:50.093827
3849 14:47:50.093918 [DramC_TX_OE_Calibration] TA2
3850 14:47:50.097227 Original DQ_B0 (3 6) =30, OEN = 27
3851 14:47:50.100526 Original DQ_B1 (3 6) =30, OEN = 27
3852 14:47:50.103739 23, 0x0, End_B0=23 End_B1=23
3853 14:47:50.106925 24, 0x0, End_B0=24 End_B1=24
3854 14:47:50.110307 25, 0x0, End_B0=25 End_B1=25
3855 14:47:50.110400 26, 0x0, End_B0=26 End_B1=26
3856 14:47:50.113679 27, 0x0, End_B0=27 End_B1=27
3857 14:47:50.116790 28, 0x0, End_B0=28 End_B1=28
3858 14:47:50.120227 29, 0x0, End_B0=29 End_B1=29
3859 14:47:50.123226 30, 0x0, End_B0=30 End_B1=30
3860 14:47:50.123319 31, 0xFFFF, End_B0=30 End_B1=30
3861 14:47:50.130125 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3862 14:47:50.136560 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3863 14:47:50.136655
3864 14:47:50.136728
3865 14:47:50.139560 Write Rank1 MR23 =0x3f
3866 14:47:50.139651 [DQSOSC]
3867 14:47:50.146578 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3868 14:47:50.152881 CH1_RK1: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3869 14:47:50.156213 Write Rank1 MR23 =0x3f
3870 14:47:50.156298 [DQSOSC]
3871 14:47:50.165989 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3872 14:47:50.166078 CH1 RK1: MR19=202, MR18=B7B7
3873 14:47:50.169310 [RxdqsGatingPostProcess] freq 1600
3874 14:47:50.175701 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3875 14:47:50.175800 Rank: 0
3876 14:47:50.179165 best DQS0 dly(2T, 0.5T) = (2, 6)
3877 14:47:50.182273 best DQS1 dly(2T, 0.5T) = (2, 6)
3878 14:47:50.185390 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3879 14:47:50.188889 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3880 14:47:50.188982 Rank: 1
3881 14:47:50.192078 best DQS0 dly(2T, 0.5T) = (2, 6)
3882 14:47:50.195264 best DQS1 dly(2T, 0.5T) = (2, 6)
3883 14:47:50.198524 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3884 14:47:50.201948 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3885 14:47:50.205005 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3886 14:47:50.208656 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3887 14:47:50.215011 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3888 14:47:50.215118
3889 14:47:50.215212
3890 14:47:50.218350 [Calibration Summary] Freqency 1600
3891 14:47:50.218437 CH 0, Rank 0
3892 14:47:50.221396 All Pass.
3893 14:47:50.221506
3894 14:47:50.221577 CH 0, Rank 1
3895 14:47:50.221642 All Pass.
3896 14:47:50.221705
3897 14:47:50.224994 CH 1, Rank 0
3898 14:47:50.225094 All Pass.
3899 14:47:50.225163
3900 14:47:50.225227 CH 1, Rank 1
3901 14:47:50.227971 All Pass.
3902 14:47:50.228069
3903 14:47:50.234705 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3904 14:47:50.240998 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3905 14:47:50.247923 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3906 14:47:50.251022 Write Rank0 MR3 =0xb0
3907 14:47:50.257804 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3908 14:47:50.264011 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3909 14:47:50.270595 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3910 14:47:50.273977 Write Rank1 MR3 =0xb0
3911 14:47:50.277341 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3912 14:47:50.286825 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3913 14:47:50.293564 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3914 14:47:50.293682 Write Rank0 MR3 =0xb0
3915 14:47:50.299969 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3916 14:47:50.309870 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3917 14:47:50.316502 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3918 14:47:50.316629 Write Rank1 MR3 =0xb0
3919 14:47:50.320003 DramC Write-DBI on
3920 14:47:50.323049 [GetDramInforAfterCalByMRR] Vendor 6.
3921 14:47:50.326396 [GetDramInforAfterCalByMRR] Revision 505.
3922 14:47:50.326503 MR8 1111
3923 14:47:50.333047 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3924 14:47:50.333154 MR8 1111
3925 14:47:50.336363 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3926 14:47:50.339253 MR8 1111
3927 14:47:50.342653 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3928 14:47:50.342741 MR8 1111
3929 14:47:50.349578 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3930 14:47:50.359258 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3931 14:47:50.359351 Write Rank0 MR13 =0xd0
3932 14:47:50.362466 Write Rank1 MR13 =0xd0
3933 14:47:50.365566 Write Rank0 MR13 =0xd0
3934 14:47:50.365648 Write Rank1 MR13 =0xd0
3935 14:47:50.368786 Save calibration result to emmc
3936 14:47:50.368903
3937 14:47:50.368975
3938 14:47:50.372311 [DramcModeReg_Check] Freq_1600, FSP_1
3939 14:47:50.375526 FSP_1, CH_0, RK0
3940 14:47:50.375641 Write Rank0 MR13 =0xd8
3941 14:47:50.378705 MR12 = 0x5c (global = 0x5c) match
3942 14:47:50.381968 MR14 = 0x1e (global = 0x1e) match
3943 14:47:50.385447 FSP_1, CH_0, RK1
3944 14:47:50.385526 Write Rank1 MR13 =0xd8
3945 14:47:50.388551 MR12 = 0x5e (global = 0x5e) match
3946 14:47:50.391789 MR14 = 0x1e (global = 0x1e) match
3947 14:47:50.395300 FSP_1, CH_1, RK0
3948 14:47:50.395392 Write Rank0 MR13 =0xd8
3949 14:47:50.398293 MR12 = 0x60 (global = 0x60) match
3950 14:47:50.401522 MR14 = 0x1e (global = 0x1e) match
3951 14:47:50.404716 FSP_1, CH_1, RK1
3952 14:47:50.404837 Write Rank1 MR13 =0xd8
3953 14:47:50.407986 MR12 = 0x5c (global = 0x5c) match
3954 14:47:50.411499 MR14 = 0x1e (global = 0x1e) match
3955 14:47:50.411591
3956 14:47:50.417771 [MEM_TEST] 02: After DFS, before run time config
3957 14:47:50.427953 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3958 14:47:50.428046
3959 14:47:50.428118 [TA2_TEST]
3960 14:47:50.428186 === TA2 HW
3961 14:47:50.431089 TA2 PAT: XTALK
3962 14:47:50.434501 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3963 14:47:50.440831 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3964 14:47:50.444228 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3965 14:47:50.450757 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3966 14:47:50.450854
3967 14:47:50.450938
3968 14:47:50.451015 Settings after calibration
3969 14:47:50.454112
3970 14:47:50.454209 [DramcRunTimeConfig]
3971 14:47:50.457063 TransferPLLToSPMControl - MODE SW PHYPLL
3972 14:47:50.460843 TX_TRACKING: ON
3973 14:47:50.460956 RX_TRACKING: ON
3974 14:47:50.461061 HW_GATING: ON
3975 14:47:50.463778 HW_GATING DBG: OFF
3976 14:47:50.463869 ddr_geometry:1
3977 14:47:50.466908 ddr_geometry:1
3978 14:47:50.467028 ddr_geometry:1
3979 14:47:50.470501 ddr_geometry:1
3980 14:47:50.470611 ddr_geometry:1
3981 14:47:50.473663 ddr_geometry:1
3982 14:47:50.473754 ddr_geometry:1
3983 14:47:50.473826 ddr_geometry:1
3984 14:47:50.476736 High Freq DUMMY_READ_FOR_TRACKING: ON
3985 14:47:50.480228 ZQCS_ENABLE_LP4: OFF
3986 14:47:50.483623 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3987 14:47:50.486883 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3988 14:47:50.490006 SPM_CONTROL_AFTERK: ON
3989 14:47:50.490098 IMPEDANCE_TRACKING: ON
3990 14:47:50.493308 TEMP_SENSOR: ON
3991 14:47:50.493400 PER_BANK_REFRESH: ON
3992 14:47:50.496606 HW_SAVE_FOR_SR: ON
3993 14:47:50.499967 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3994 14:47:50.503140 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3995 14:47:50.506365 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3996 14:47:50.506456 Read ODT Tracking: ON
3997 14:47:50.509565 =========================
3998 14:47:50.509657
3999 14:47:50.509729 [TA2_TEST]
4000 14:47:50.512853 === TA2 HW
4001 14:47:50.516056 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4002 14:47:50.522682 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4003 14:47:50.525956 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4004 14:47:50.532591 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4005 14:47:50.532712
4006 14:47:50.535618 [MEM_TEST] 03: After run time config
4007 14:47:50.545856 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4008 14:47:50.548925 [complex_mem_test] start addr:0x40024000, len:131072
4009 14:47:50.753284 1st complex R/W mem test pass
4010 14:47:50.759761 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4011 14:47:50.763093 sync preloader write leveling
4012 14:47:50.766255 sync preloader cbt_mr12
4013 14:47:50.769808 sync preloader cbt_clk_dly
4014 14:47:50.769900 sync preloader cbt_cmd_dly
4015 14:47:50.773118 sync preloader cbt_cs
4016 14:47:50.776204 sync preloader cbt_ca_perbit_delay
4017 14:47:50.779476 sync preloader clk_delay
4018 14:47:50.779568 sync preloader dqs_delay
4019 14:47:50.782869 sync preloader u1Gating2T_Save
4020 14:47:50.786010 sync preloader u1Gating05T_Save
4021 14:47:50.789170 sync preloader u1Gatingfine_tune_Save
4022 14:47:50.792643 sync preloader u1Gatingucpass_count_Save
4023 14:47:50.795929 sync preloader u1TxWindowPerbitVref_Save
4024 14:47:50.799043 sync preloader u1TxCenter_min_Save
4025 14:47:50.802634 sync preloader u1TxCenter_max_Save
4026 14:47:50.805448 sync preloader u1Txwin_center_Save
4027 14:47:50.808868 sync preloader u1Txfirst_pass_Save
4028 14:47:50.812273 sync preloader u1Txlast_pass_Save
4029 14:47:50.815555 sync preloader u1RxDatlat_Save
4030 14:47:50.818482 sync preloader u1RxWinPerbitVref_Save
4031 14:47:50.822259 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4032 14:47:50.825312 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4033 14:47:50.828405 sync preloader delay_cell_unit
4034 14:47:50.835031 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4035 14:47:50.838272 sync preloader write leveling
4036 14:47:50.841720 sync preloader cbt_mr12
4037 14:47:50.841801 sync preloader cbt_clk_dly
4038 14:47:50.844788 sync preloader cbt_cmd_dly
4039 14:47:50.848081 sync preloader cbt_cs
4040 14:47:50.851487 sync preloader cbt_ca_perbit_delay
4041 14:47:50.851573 sync preloader clk_delay
4042 14:47:50.854541 sync preloader dqs_delay
4043 14:47:50.858121 sync preloader u1Gating2T_Save
4044 14:47:50.861337 sync preloader u1Gating05T_Save
4045 14:47:50.864614 sync preloader u1Gatingfine_tune_Save
4046 14:47:50.867794 sync preloader u1Gatingucpass_count_Save
4047 14:47:50.871163 sync preloader u1TxWindowPerbitVref_Save
4048 14:47:50.874335 sync preloader u1TxCenter_min_Save
4049 14:47:50.877677 sync preloader u1TxCenter_max_Save
4050 14:47:50.880997 sync preloader u1Txwin_center_Save
4051 14:47:50.884181 sync preloader u1Txfirst_pass_Save
4052 14:47:50.887610 sync preloader u1Txlast_pass_Save
4053 14:47:50.890717 sync preloader u1RxDatlat_Save
4054 14:47:50.894239 sync preloader u1RxWinPerbitVref_Save
4055 14:47:50.897328 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4056 14:47:50.900468 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4057 14:47:50.904038 sync preloader delay_cell_unit
4058 14:47:50.910495 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4059 14:47:50.913665 sync preloader write leveling
4060 14:47:50.917065 sync preloader cbt_mr12
4061 14:47:50.917156 sync preloader cbt_clk_dly
4062 14:47:50.920338 sync preloader cbt_cmd_dly
4063 14:47:50.923630 sync preloader cbt_cs
4064 14:47:50.926660 sync preloader cbt_ca_perbit_delay
4065 14:47:50.926751 sync preloader clk_delay
4066 14:47:50.930194 sync preloader dqs_delay
4067 14:47:50.933204 sync preloader u1Gating2T_Save
4068 14:47:50.936662 sync preloader u1Gating05T_Save
4069 14:47:50.940081 sync preloader u1Gatingfine_tune_Save
4070 14:47:50.943226 sync preloader u1Gatingucpass_count_Save
4071 14:47:50.946329 sync preloader u1TxWindowPerbitVref_Save
4072 14:47:50.949847 sync preloader u1TxCenter_min_Save
4073 14:47:50.953168 sync preloader u1TxCenter_max_Save
4074 14:47:50.956258 sync preloader u1Txwin_center_Save
4075 14:47:50.959393 sync preloader u1Txfirst_pass_Save
4076 14:47:50.962693 sync preloader u1Txlast_pass_Save
4077 14:47:50.962787 sync preloader u1RxDatlat_Save
4078 14:47:50.965942 sync preloader u1RxWinPerbitVref_Save
4079 14:47:50.972518 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4080 14:47:50.975669 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4081 14:47:50.979178 sync preloader delay_cell_unit
4082 14:47:50.982357 just_for_test_dump_coreboot_params dump all params
4083 14:47:50.985591 dump source = 0x0
4084 14:47:50.985682 dump params frequency:1600
4085 14:47:50.988802 dump params rank number:2
4086 14:47:50.988893
4087 14:47:50.992380 dump params write leveling
4088 14:47:50.995344 write leveling[0][0][0] = 0x1e
4089 14:47:50.998653 write leveling[0][0][1] = 0x19
4090 14:47:50.998744 write leveling[0][1][0] = 0x1a
4091 14:47:51.002093 write leveling[0][1][1] = 0x17
4092 14:47:51.005324 write leveling[1][0][0] = 0x21
4093 14:47:51.008513 write leveling[1][0][1] = 0x19
4094 14:47:51.011627 write leveling[1][1][0] = 0x22
4095 14:47:51.015160 write leveling[1][1][1] = 0x1e
4096 14:47:51.015252 dump params cbt_cs
4097 14:47:51.018376 cbt_cs[0][0] = 0x6
4098 14:47:51.018467 cbt_cs[0][1] = 0x6
4099 14:47:51.021644 cbt_cs[1][0] = 0xb
4100 14:47:51.021735 cbt_cs[1][1] = 0xb
4101 14:47:51.025108 dump params cbt_mr12
4102 14:47:51.028408 cbt_mr12[0][0] = 0x1c
4103 14:47:51.028499 cbt_mr12[0][1] = 0x1e
4104 14:47:51.031358 cbt_mr12[1][0] = 0x20
4105 14:47:51.031449 cbt_mr12[1][1] = 0x1c
4106 14:47:51.034736 dump params tx window
4107 14:47:51.038283 tx_center_min[0][0][0] = 982
4108 14:47:51.041294 tx_center_max[0][0][0] = 989
4109 14:47:51.041385 tx_center_min[0][0][1] = 977
4110 14:47:51.044495 tx_center_max[0][0][1] = 985
4111 14:47:51.048003 tx_center_min[0][1][0] = 981
4112 14:47:51.051122 tx_center_max[0][1][0] = 988
4113 14:47:51.054397 tx_center_min[0][1][1] = 978
4114 14:47:51.054489 tx_center_max[0][1][1] = 985
4115 14:47:51.057464 tx_center_min[1][0][0] = 987
4116 14:47:51.060903 tx_center_max[1][0][0] = 993
4117 14:47:51.064140 tx_center_min[1][0][1] = 978
4118 14:47:51.067355 tx_center_max[1][0][1] = 983
4119 14:47:51.067447 tx_center_min[1][1][0] = 988
4120 14:47:51.070901 tx_center_max[1][1][0] = 994
4121 14:47:51.074155 tx_center_min[1][1][1] = 981
4122 14:47:51.077240 tx_center_max[1][1][1] = 988
4123 14:47:51.077332 dump params tx window
4124 14:47:51.080747 tx_win_center[0][0][0] = 989
4125 14:47:51.083983 tx_first_pass[0][0][0] = 977
4126 14:47:51.087055 tx_last_pass[0][0][0] = 1001
4127 14:47:51.090658 tx_win_center[0][0][1] = 988
4128 14:47:51.090749 tx_first_pass[0][0][1] = 976
4129 14:47:51.093613 tx_last_pass[0][0][1] = 1000
4130 14:47:51.096988 tx_win_center[0][0][2] = 989
4131 14:47:51.100306 tx_first_pass[0][0][2] = 977
4132 14:47:51.103529 tx_last_pass[0][0][2] = 1001
4133 14:47:51.103621 tx_win_center[0][0][3] = 982
4134 14:47:51.106734 tx_first_pass[0][0][3] = 970
4135 14:47:51.109874 tx_last_pass[0][0][3] = 994
4136 14:47:51.113291 tx_win_center[0][0][4] = 987
4137 14:47:51.116742 tx_first_pass[0][0][4] = 976
4138 14:47:51.116833 tx_last_pass[0][0][4] = 999
4139 14:47:51.119853 tx_win_center[0][0][5] = 984
4140 14:47:51.123151 tx_first_pass[0][0][5] = 972
4141 14:47:51.126623 tx_last_pass[0][0][5] = 997
4142 14:47:51.126714 tx_win_center[0][0][6] = 986
4143 14:47:51.129532 tx_first_pass[0][0][6] = 975
4144 14:47:51.132764 tx_last_pass[0][0][6] = 998
4145 14:47:51.136197 tx_win_center[0][0][7] = 988
4146 14:47:51.139621 tx_first_pass[0][0][7] = 976
4147 14:47:51.139712 tx_last_pass[0][0][7] = 1000
4148 14:47:51.142628 tx_win_center[0][0][8] = 977
4149 14:47:51.146183 tx_first_pass[0][0][8] = 966
4150 14:47:51.149311 tx_last_pass[0][0][8] = 989
4151 14:47:51.152558 tx_win_center[0][0][9] = 979
4152 14:47:51.152650 tx_first_pass[0][0][9] = 968
4153 14:47:51.156057 tx_last_pass[0][0][9] = 991
4154 14:47:51.159468 tx_win_center[0][0][10] = 985
4155 14:47:51.162374 tx_first_pass[0][0][10] = 973
4156 14:47:51.165885 tx_last_pass[0][0][10] = 997
4157 14:47:51.165976 tx_win_center[0][0][11] = 978
4158 14:47:51.168957 tx_first_pass[0][0][11] = 967
4159 14:47:51.172294 tx_last_pass[0][0][11] = 990
4160 14:47:51.175348 tx_win_center[0][0][12] = 979
4161 14:47:51.179004 tx_first_pass[0][0][12] = 968
4162 14:47:51.182183 tx_last_pass[0][0][12] = 991
4163 14:47:51.182274 tx_win_center[0][0][13] = 980
4164 14:47:51.185603 tx_first_pass[0][0][13] = 969
4165 14:47:51.188774 tx_last_pass[0][0][13] = 992
4166 14:47:51.191727 tx_win_center[0][0][14] = 981
4167 14:47:51.195144 tx_first_pass[0][0][14] = 969
4168 14:47:51.195235 tx_last_pass[0][0][14] = 994
4169 14:47:51.198516 tx_win_center[0][0][15] = 984
4170 14:47:51.201895 tx_first_pass[0][0][15] = 972
4171 14:47:51.204904 tx_last_pass[0][0][15] = 997
4172 14:47:51.208415 tx_win_center[0][1][0] = 988
4173 14:47:51.208506 tx_first_pass[0][1][0] = 977
4174 14:47:51.211649 tx_last_pass[0][1][0] = 1000
4175 14:47:51.214826 tx_win_center[0][1][1] = 988
4176 14:47:51.217950 tx_first_pass[0][1][1] = 977
4177 14:47:51.221494 tx_last_pass[0][1][1] = 999
4178 14:47:51.221586 tx_win_center[0][1][2] = 988
4179 14:47:51.224488 tx_first_pass[0][1][2] = 977
4180 14:47:51.227976 tx_last_pass[0][1][2] = 999
4181 14:47:51.231180 tx_win_center[0][1][3] = 981
4182 14:47:51.234699 tx_first_pass[0][1][3] = 969
4183 14:47:51.234791 tx_last_pass[0][1][3] = 993
4184 14:47:51.237696 tx_win_center[0][1][4] = 987
4185 14:47:51.240762 tx_first_pass[0][1][4] = 976
4186 14:47:51.244012 tx_last_pass[0][1][4] = 999
4187 14:47:51.247360 tx_win_center[0][1][5] = 983
4188 14:47:51.247451 tx_first_pass[0][1][5] = 972
4189 14:47:51.250523 tx_last_pass[0][1][5] = 995
4190 14:47:51.254131 tx_win_center[0][1][6] = 986
4191 14:47:51.257294 tx_first_pass[0][1][6] = 974
4192 14:47:51.257385 tx_last_pass[0][1][6] = 998
4193 14:47:51.260450 tx_win_center[0][1][7] = 988
4194 14:47:51.263752 tx_first_pass[0][1][7] = 976
4195 14:47:51.267335 tx_last_pass[0][1][7] = 1000
4196 14:47:51.270275 tx_win_center[0][1][8] = 978
4197 14:47:51.270395 tx_first_pass[0][1][8] = 966
4198 14:47:51.273626 tx_last_pass[0][1][8] = 990
4199 14:47:51.276909 tx_win_center[0][1][9] = 979
4200 14:47:51.280355 tx_first_pass[0][1][9] = 968
4201 14:47:51.283494 tx_last_pass[0][1][9] = 991
4202 14:47:51.283586 tx_win_center[0][1][10] = 985
4203 14:47:51.286888 tx_first_pass[0][1][10] = 973
4204 14:47:51.289983 tx_last_pass[0][1][10] = 998
4205 14:47:51.293265 tx_win_center[0][1][11] = 978
4206 14:47:51.296506 tx_first_pass[0][1][11] = 967
4207 14:47:51.299819 tx_last_pass[0][1][11] = 990
4208 14:47:51.299932 tx_win_center[0][1][12] = 980
4209 14:47:51.303094 tx_first_pass[0][1][12] = 968
4210 14:47:51.306202 tx_last_pass[0][1][12] = 992
4211 14:47:51.309732 tx_win_center[0][1][13] = 979
4212 14:47:51.312918 tx_first_pass[0][1][13] = 968
4213 14:47:51.313009 tx_last_pass[0][1][13] = 991
4214 14:47:51.316276 tx_win_center[0][1][14] = 981
4215 14:47:51.319678 tx_first_pass[0][1][14] = 970
4216 14:47:51.322804 tx_last_pass[0][1][14] = 993
4217 14:47:51.326168 tx_win_center[0][1][15] = 984
4218 14:47:51.329376 tx_first_pass[0][1][15] = 972
4219 14:47:51.329475 tx_last_pass[0][1][15] = 996
4220 14:47:51.332670 tx_win_center[1][0][0] = 993
4221 14:47:51.335908 tx_first_pass[1][0][0] = 981
4222 14:47:51.339285 tx_last_pass[1][0][0] = 1006
4223 14:47:51.339407 tx_win_center[1][0][1] = 991
4224 14:47:51.342530 tx_first_pass[1][0][1] = 978
4225 14:47:51.345569 tx_last_pass[1][0][1] = 1005
4226 14:47:51.348701 tx_win_center[1][0][2] = 989
4227 14:47:51.352096 tx_first_pass[1][0][2] = 977
4228 14:47:51.352187 tx_last_pass[1][0][2] = 1002
4229 14:47:51.355423 tx_win_center[1][0][3] = 987
4230 14:47:51.358798 tx_first_pass[1][0][3] = 975
4231 14:47:51.362186 tx_last_pass[1][0][3] = 999
4232 14:47:51.365311 tx_win_center[1][0][4] = 991
4233 14:47:51.365441 tx_first_pass[1][0][4] = 978
4234 14:47:51.368703 tx_last_pass[1][0][4] = 1004
4235 14:47:51.371833 tx_win_center[1][0][5] = 992
4236 14:47:51.375134 tx_first_pass[1][0][5] = 979
4237 14:47:51.378386 tx_last_pass[1][0][5] = 1006
4238 14:47:51.378480 tx_win_center[1][0][6] = 992
4239 14:47:51.381653 tx_first_pass[1][0][6] = 979
4240 14:47:51.384943 tx_last_pass[1][0][6] = 1005
4241 14:47:51.388216 tx_win_center[1][0][7] = 991
4242 14:47:51.391523 tx_first_pass[1][0][7] = 978
4243 14:47:51.391614 tx_last_pass[1][0][7] = 1004
4244 14:47:51.394928 tx_win_center[1][0][8] = 980
4245 14:47:51.398200 tx_first_pass[1][0][8] = 969
4246 14:47:51.401524 tx_last_pass[1][0][8] = 992
4247 14:47:51.404700 tx_win_center[1][0][9] = 980
4248 14:47:51.404780 tx_first_pass[1][0][9] = 969
4249 14:47:51.408174 tx_last_pass[1][0][9] = 991
4250 14:47:51.411183 tx_win_center[1][0][10] = 982
4251 14:47:51.414282 tx_first_pass[1][0][10] = 971
4252 14:47:51.417697 tx_last_pass[1][0][10] = 994
4253 14:47:51.417780 tx_win_center[1][0][11] = 983
4254 14:47:51.420910 tx_first_pass[1][0][11] = 972
4255 14:47:51.424515 tx_last_pass[1][0][11] = 995
4256 14:47:51.427402 tx_win_center[1][0][12] = 982
4257 14:47:51.430883 tx_first_pass[1][0][12] = 971
4258 14:47:51.434020 tx_last_pass[1][0][12] = 994
4259 14:47:51.434109 tx_win_center[1][0][13] = 983
4260 14:47:51.437358 tx_first_pass[1][0][13] = 972
4261 14:47:51.440618 tx_last_pass[1][0][13] = 995
4262 14:47:51.443965 tx_win_center[1][0][14] = 983
4263 14:47:51.446942 tx_first_pass[1][0][14] = 972
4264 14:47:51.447064 tx_last_pass[1][0][14] = 994
4265 14:47:51.450532 tx_win_center[1][0][15] = 978
4266 14:47:51.453503 tx_first_pass[1][0][15] = 966
4267 14:47:51.457114 tx_last_pass[1][0][15] = 990
4268 14:47:51.460367 tx_win_center[1][1][0] = 994
4269 14:47:51.460458 tx_first_pass[1][1][0] = 982
4270 14:47:51.463388 tx_last_pass[1][1][0] = 1006
4271 14:47:51.466538 tx_win_center[1][1][1] = 993
4272 14:47:51.469931 tx_first_pass[1][1][1] = 980
4273 14:47:51.473111 tx_last_pass[1][1][1] = 1006
4274 14:47:51.473195 tx_win_center[1][1][2] = 990
4275 14:47:51.476645 tx_first_pass[1][1][2] = 977
4276 14:47:51.479731 tx_last_pass[1][1][2] = 1004
4277 14:47:51.483031 tx_win_center[1][1][3] = 988
4278 14:47:51.486257 tx_first_pass[1][1][3] = 976
4279 14:47:51.486350 tx_last_pass[1][1][3] = 1001
4280 14:47:51.489718 tx_win_center[1][1][4] = 993
4281 14:47:51.492789 tx_first_pass[1][1][4] = 980
4282 14:47:51.496027 tx_last_pass[1][1][4] = 1006
4283 14:47:51.499311 tx_win_center[1][1][5] = 993
4284 14:47:51.499403 tx_first_pass[1][1][5] = 981
4285 14:47:51.502536 tx_last_pass[1][1][5] = 1006
4286 14:47:51.505843 tx_win_center[1][1][6] = 993
4287 14:47:51.509004 tx_first_pass[1][1][6] = 980
4288 14:47:51.512518 tx_last_pass[1][1][6] = 1006
4289 14:47:51.512610 tx_win_center[1][1][7] = 992
4290 14:47:51.515549 tx_first_pass[1][1][7] = 980
4291 14:47:51.519245 tx_last_pass[1][1][7] = 1005
4292 14:47:51.522294 tx_win_center[1][1][8] = 985
4293 14:47:51.525647 tx_first_pass[1][1][8] = 973
4294 14:47:51.525739 tx_last_pass[1][1][8] = 998
4295 14:47:51.528672 tx_win_center[1][1][9] = 984
4296 14:47:51.532089 tx_first_pass[1][1][9] = 972
4297 14:47:51.535202 tx_last_pass[1][1][9] = 997
4298 14:47:51.538717 tx_win_center[1][1][10] = 988
4299 14:47:51.538809 tx_first_pass[1][1][10] = 977
4300 14:47:51.541934 tx_last_pass[1][1][10] = 1000
4301 14:47:51.545263 tx_win_center[1][1][11] = 988
4302 14:47:51.548473 tx_first_pass[1][1][11] = 976
4303 14:47:51.551712 tx_last_pass[1][1][11] = 1000
4304 14:47:51.554869 tx_win_center[1][1][12] = 988
4305 14:47:51.554960 tx_first_pass[1][1][12] = 976
4306 14:47:51.558390 tx_last_pass[1][1][12] = 1000
4307 14:47:51.561377 tx_win_center[1][1][13] = 988
4308 14:47:51.564904 tx_first_pass[1][1][13] = 977
4309 14:47:51.568009 tx_last_pass[1][1][13] = 1000
4310 14:47:51.571536 tx_win_center[1][1][14] = 988
4311 14:47:51.571627 tx_first_pass[1][1][14] = 977
4312 14:47:51.574705 tx_last_pass[1][1][14] = 999
4313 14:47:51.578093 tx_win_center[1][1][15] = 981
4314 14:47:51.581197 tx_first_pass[1][1][15] = 969
4315 14:47:51.584599 tx_last_pass[1][1][15] = 994
4316 14:47:51.584691 dump params rx window
4317 14:47:51.587650 rx_firspass[0][0][0] = 6
4318 14:47:51.591141 rx_lastpass[0][0][0] = 36
4319 14:47:51.591233 rx_firspass[0][0][1] = 7
4320 14:47:51.594161 rx_lastpass[0][0][1] = 36
4321 14:47:51.597526 rx_firspass[0][0][2] = 5
4322 14:47:51.597617 rx_lastpass[0][0][2] = 39
4323 14:47:51.601026 rx_firspass[0][0][3] = -3
4324 14:47:51.604338 rx_lastpass[0][0][3] = 30
4325 14:47:51.607225 rx_firspass[0][0][4] = 6
4326 14:47:51.607317 rx_lastpass[0][0][4] = 36
4327 14:47:51.610949 rx_firspass[0][0][5] = 2
4328 14:47:51.613880 rx_lastpass[0][0][5] = 33
4329 14:47:51.613971 rx_firspass[0][0][6] = 3
4330 14:47:51.617117 rx_lastpass[0][0][6] = 33
4331 14:47:51.620343 rx_firspass[0][0][7] = 4
4332 14:47:51.623828 rx_lastpass[0][0][7] = 36
4333 14:47:51.623919 rx_firspass[0][0][8] = -1
4334 14:47:51.626964 rx_lastpass[0][0][8] = 30
4335 14:47:51.630422 rx_firspass[0][0][9] = 2
4336 14:47:51.630515 rx_lastpass[0][0][9] = 32
4337 14:47:51.633672 rx_firspass[0][0][10] = 9
4338 14:47:51.637230 rx_lastpass[0][0][10] = 37
4339 14:47:51.640176 rx_firspass[0][0][11] = 1
4340 14:47:51.640268 rx_lastpass[0][0][11] = 30
4341 14:47:51.643247 rx_firspass[0][0][12] = 3
4342 14:47:51.646731 rx_lastpass[0][0][12] = 31
4343 14:47:51.650136 rx_firspass[0][0][13] = 1
4344 14:47:51.650232 rx_lastpass[0][0][13] = 31
4345 14:47:51.653235 rx_firspass[0][0][14] = 1
4346 14:47:51.656622 rx_lastpass[0][0][14] = 35
4347 14:47:51.659913 rx_firspass[0][0][15] = 4
4348 14:47:51.660003 rx_lastpass[0][0][15] = 36
4349 14:47:51.663037 rx_firspass[0][1][0] = 4
4350 14:47:51.666409 rx_lastpass[0][1][0] = 39
4351 14:47:51.666499 rx_firspass[0][1][1] = 5
4352 14:47:51.669743 rx_lastpass[0][1][1] = 38
4353 14:47:51.672798 rx_firspass[0][1][2] = 5
4354 14:47:51.676300 rx_lastpass[0][1][2] = 40
4355 14:47:51.676390 rx_firspass[0][1][3] = -3
4356 14:47:51.679268 rx_lastpass[0][1][3] = 31
4357 14:47:51.682773 rx_firspass[0][1][4] = 5
4358 14:47:51.682864 rx_lastpass[0][1][4] = 38
4359 14:47:51.686266 rx_firspass[0][1][5] = 0
4360 14:47:51.689108 rx_lastpass[0][1][5] = 34
4361 14:47:51.692498 rx_firspass[0][1][6] = 1
4362 14:47:51.692588 rx_lastpass[0][1][6] = 35
4363 14:47:51.695604 rx_firspass[0][1][7] = 2
4364 14:47:51.699098 rx_lastpass[0][1][7] = 37
4365 14:47:51.699188 rx_firspass[0][1][8] = -3
4366 14:47:51.702152 rx_lastpass[0][1][8] = 32
4367 14:47:51.705868 rx_firspass[0][1][9] = -1
4368 14:47:51.708987 rx_lastpass[0][1][9] = 34
4369 14:47:51.709077 rx_firspass[0][1][10] = 6
4370 14:47:51.711993 rx_lastpass[0][1][10] = 40
4371 14:47:51.715660 rx_firspass[0][1][11] = -2
4372 14:47:51.718799 rx_lastpass[0][1][11] = 32
4373 14:47:51.718889 rx_firspass[0][1][12] = 0
4374 14:47:51.721856 rx_lastpass[0][1][12] = 34
4375 14:47:51.725303 rx_firspass[0][1][13] = -2
4376 14:47:51.728480 rx_lastpass[0][1][13] = 34
4377 14:47:51.728570 rx_firspass[0][1][14] = 2
4378 14:47:51.731814 rx_lastpass[0][1][14] = 36
4379 14:47:51.735079 rx_firspass[0][1][15] = 4
4380 14:47:51.735174 rx_lastpass[0][1][15] = 37
4381 14:47:51.738411 rx_firspass[1][0][0] = 5
4382 14:47:51.741647 rx_lastpass[1][0][0] = 37
4383 14:47:51.744997 rx_firspass[1][0][1] = 4
4384 14:47:51.745118 rx_lastpass[1][0][1] = 37
4385 14:47:51.748211 rx_firspass[1][0][2] = 1
4386 14:47:51.751287 rx_lastpass[1][0][2] = 35
4387 14:47:51.751379 rx_firspass[1][0][3] = 0
4388 14:47:51.754896 rx_lastpass[1][0][3] = 31
4389 14:47:51.758146 rx_firspass[1][0][4] = 5
4390 14:47:51.761392 rx_lastpass[1][0][4] = 35
4391 14:47:51.761494 rx_firspass[1][0][5] = 9
4392 14:47:51.764530 rx_lastpass[1][0][5] = 38
4393 14:47:51.767808 rx_firspass[1][0][6] = 5
4394 14:47:51.767901 rx_lastpass[1][0][6] = 38
4395 14:47:51.771063 rx_firspass[1][0][7] = 5
4396 14:47:51.774570 rx_lastpass[1][0][7] = 35
4397 14:47:51.777639 rx_firspass[1][0][8] = 1
4398 14:47:51.777739 rx_lastpass[1][0][8] = 33
4399 14:47:51.780826 rx_firspass[1][0][9] = 0
4400 14:47:51.784444 rx_lastpass[1][0][9] = 32
4401 14:47:51.784545 rx_firspass[1][0][10] = 3
4402 14:47:51.787498 rx_lastpass[1][0][10] = 36
4403 14:47:51.790787 rx_firspass[1][0][11] = 4
4404 14:47:51.793853 rx_lastpass[1][0][11] = 36
4405 14:47:51.793986 rx_firspass[1][0][12] = 6
4406 14:47:51.797275 rx_lastpass[1][0][12] = 35
4407 14:47:51.800392 rx_firspass[1][0][13] = 5
4408 14:47:51.803567 rx_lastpass[1][0][13] = 36
4409 14:47:51.803669 rx_firspass[1][0][14] = 5
4410 14:47:51.807014 rx_lastpass[1][0][14] = 37
4411 14:47:51.810553 rx_firspass[1][0][15] = -4
4412 14:47:51.813592 rx_lastpass[1][0][15] = 29
4413 14:47:51.813673 rx_firspass[1][1][0] = 4
4414 14:47:51.817014 rx_lastpass[1][1][0] = 40
4415 14:47:51.820388 rx_firspass[1][1][1] = 4
4416 14:47:51.820469 rx_lastpass[1][1][1] = 38
4417 14:47:51.823614 rx_firspass[1][1][2] = 3
4418 14:47:51.827146 rx_lastpass[1][1][2] = 34
4419 14:47:51.830517 rx_firspass[1][1][3] = -1
4420 14:47:51.831153 rx_lastpass[1][1][3] = 33
4421 14:47:51.833552 rx_firspass[1][1][4] = 5
4422 14:47:51.836814 rx_lastpass[1][1][4] = 39
4423 14:47:51.837365 rx_firspass[1][1][5] = 6
4424 14:47:51.840093 rx_lastpass[1][1][5] = 40
4425 14:47:51.843287 rx_firspass[1][1][6] = 6
4426 14:47:51.846442 rx_lastpass[1][1][6] = 40
4427 14:47:51.846745 rx_firspass[1][1][7] = 3
4428 14:47:51.849843 rx_lastpass[1][1][7] = 38
4429 14:47:51.853162 rx_firspass[1][1][8] = -1
4430 14:47:51.853488 rx_lastpass[1][1][8] = 35
4431 14:47:51.856326 rx_firspass[1][1][9] = -2
4432 14:47:51.859554 rx_lastpass[1][1][9] = 33
4433 14:47:51.862672 rx_firspass[1][1][10] = 3
4434 14:47:51.862897 rx_lastpass[1][1][10] = 38
4435 14:47:51.865978 rx_firspass[1][1][11] = 3
4436 14:47:51.869330 rx_lastpass[1][1][11] = 38
4437 14:47:51.872569 rx_firspass[1][1][12] = 3
4438 14:47:51.872720 rx_lastpass[1][1][12] = 37
4439 14:47:51.875692 rx_firspass[1][1][13] = 4
4440 14:47:51.879145 rx_lastpass[1][1][13] = 39
4441 14:47:51.879275 rx_firspass[1][1][14] = 4
4442 14:47:51.882467 rx_lastpass[1][1][14] = 40
4443 14:47:51.885751 rx_firspass[1][1][15] = -4
4444 14:47:51.888821 rx_lastpass[1][1][15] = 31
4445 14:47:51.888923 dump params clk_delay
4446 14:47:51.892446 clk_delay[0] = 0
4447 14:47:51.892537 clk_delay[1] = 0
4448 14:47:51.895541 dump params dqs_delay
4449 14:47:51.895630 dqs_delay[0][0] = -1
4450 14:47:51.898859 dqs_delay[0][1] = 0
4451 14:47:51.902170 dqs_delay[1][0] = 0
4452 14:47:51.902290 dqs_delay[1][1] = -1
4453 14:47:51.905309 dump params delay_cell_unit = 744
4454 14:47:51.908454 dump source = 0x0
4455 14:47:51.908536 dump params frequency:1200
4456 14:47:51.911719 dump params rank number:2
4457 14:47:51.911820
4458 14:47:51.915056 dump params write leveling
4459 14:47:51.918518 write leveling[0][0][0] = 0x0
4460 14:47:51.918638 write leveling[0][0][1] = 0x0
4461 14:47:51.921634 write leveling[0][1][0] = 0x0
4462 14:47:51.925185 write leveling[0][1][1] = 0x0
4463 14:47:51.928092 write leveling[1][0][0] = 0x0
4464 14:47:51.931722 write leveling[1][0][1] = 0x0
4465 14:47:51.934520 write leveling[1][1][0] = 0x0
4466 14:47:51.934610 write leveling[1][1][1] = 0x0
4467 14:47:51.938038 dump params cbt_cs
4468 14:47:51.938132 cbt_cs[0][0] = 0x0
4469 14:47:51.941359 cbt_cs[0][1] = 0x0
4470 14:47:51.941459 cbt_cs[1][0] = 0x0
4471 14:47:51.944533 cbt_cs[1][1] = 0x0
4472 14:47:51.947959 dump params cbt_mr12
4473 14:47:51.948049 cbt_mr12[0][0] = 0x0
4474 14:47:51.950996 cbt_mr12[0][1] = 0x0
4475 14:47:51.951081 cbt_mr12[1][0] = 0x0
4476 14:47:51.954519 cbt_mr12[1][1] = 0x0
4477 14:47:51.957654 dump params tx window
4478 14:47:51.957745 tx_center_min[0][0][0] = 0
4479 14:47:51.960787 tx_center_max[0][0][0] = 0
4480 14:47:51.964312 tx_center_min[0][0][1] = 0
4481 14:47:51.967574 tx_center_max[0][0][1] = 0
4482 14:47:51.967666 tx_center_min[0][1][0] = 0
4483 14:47:51.970887 tx_center_max[0][1][0] = 0
4484 14:47:51.974128 tx_center_min[0][1][1] = 0
4485 14:47:51.977636 tx_center_max[0][1][1] = 0
4486 14:47:51.977728 tx_center_min[1][0][0] = 0
4487 14:47:51.980649 tx_center_max[1][0][0] = 0
4488 14:47:51.983652 tx_center_min[1][0][1] = 0
4489 14:47:51.987126 tx_center_max[1][0][1] = 0
4490 14:47:51.987219 tx_center_min[1][1][0] = 0
4491 14:47:51.990314 tx_center_max[1][1][0] = 0
4492 14:47:51.993552 tx_center_min[1][1][1] = 0
4493 14:47:51.996918 tx_center_max[1][1][1] = 0
4494 14:47:51.997010 dump params tx window
4495 14:47:52.000239 tx_win_center[0][0][0] = 0
4496 14:47:52.003542 tx_first_pass[0][0][0] = 0
4497 14:47:52.003652 tx_last_pass[0][0][0] = 0
4498 14:47:52.006526 tx_win_center[0][0][1] = 0
4499 14:47:52.009855 tx_first_pass[0][0][1] = 0
4500 14:47:52.013338 tx_last_pass[0][0][1] = 0
4501 14:47:52.013437 tx_win_center[0][0][2] = 0
4502 14:47:52.016692 tx_first_pass[0][0][2] = 0
4503 14:47:52.019646 tx_last_pass[0][0][2] = 0
4504 14:47:52.023107 tx_win_center[0][0][3] = 0
4505 14:47:52.023224 tx_first_pass[0][0][3] = 0
4506 14:47:52.026460 tx_last_pass[0][0][3] = 0
4507 14:47:52.029438 tx_win_center[0][0][4] = 0
4508 14:47:52.029531 tx_first_pass[0][0][4] = 0
4509 14:47:52.032983 tx_last_pass[0][0][4] = 0
4510 14:47:52.036002 tx_win_center[0][0][5] = 0
4511 14:47:52.039535 tx_first_pass[0][0][5] = 0
4512 14:47:52.039667 tx_last_pass[0][0][5] = 0
4513 14:47:52.042662 tx_win_center[0][0][6] = 0
4514 14:47:52.045913 tx_first_pass[0][0][6] = 0
4515 14:47:52.049192 tx_last_pass[0][0][6] = 0
4516 14:47:52.049318 tx_win_center[0][0][7] = 0
4517 14:47:52.052540 tx_first_pass[0][0][7] = 0
4518 14:47:52.055862 tx_last_pass[0][0][7] = 0
4519 14:47:52.059086 tx_win_center[0][0][8] = 0
4520 14:47:52.059199 tx_first_pass[0][0][8] = 0
4521 14:47:52.062217 tx_last_pass[0][0][8] = 0
4522 14:47:52.065735 tx_win_center[0][0][9] = 0
4523 14:47:52.068748 tx_first_pass[0][0][9] = 0
4524 14:47:52.068831 tx_last_pass[0][0][9] = 0
4525 14:47:52.072273 tx_win_center[0][0][10] = 0
4526 14:47:52.075565 tx_first_pass[0][0][10] = 0
4527 14:47:52.078714 tx_last_pass[0][0][10] = 0
4528 14:47:52.078796 tx_win_center[0][0][11] = 0
4529 14:47:52.081894 tx_first_pass[0][0][11] = 0
4530 14:47:52.085137 tx_last_pass[0][0][11] = 0
4531 14:47:52.088470 tx_win_center[0][0][12] = 0
4532 14:47:52.088561 tx_first_pass[0][0][12] = 0
4533 14:47:52.091633 tx_last_pass[0][0][12] = 0
4534 14:47:52.095090 tx_win_center[0][0][13] = 0
4535 14:47:52.098585 tx_first_pass[0][0][13] = 0
4536 14:47:52.098677 tx_last_pass[0][0][13] = 0
4537 14:47:52.101557 tx_win_center[0][0][14] = 0
4538 14:47:52.105132 tx_first_pass[0][0][14] = 0
4539 14:47:52.108062 tx_last_pass[0][0][14] = 0
4540 14:47:52.108183 tx_win_center[0][0][15] = 0
4541 14:47:52.111543 tx_first_pass[0][0][15] = 0
4542 14:47:52.114704 tx_last_pass[0][0][15] = 0
4543 14:47:52.118128 tx_win_center[0][1][0] = 0
4544 14:47:52.118249 tx_first_pass[0][1][0] = 0
4545 14:47:52.121493 tx_last_pass[0][1][0] = 0
4546 14:47:52.124586 tx_win_center[0][1][1] = 0
4547 14:47:52.127640 tx_first_pass[0][1][1] = 0
4548 14:47:52.127735 tx_last_pass[0][1][1] = 0
4549 14:47:52.130959 tx_win_center[0][1][2] = 0
4550 14:47:52.134173 tx_first_pass[0][1][2] = 0
4551 14:47:52.137491 tx_last_pass[0][1][2] = 0
4552 14:47:52.137583 tx_win_center[0][1][3] = 0
4553 14:47:52.140869 tx_first_pass[0][1][3] = 0
4554 14:47:52.144182 tx_last_pass[0][1][3] = 0
4555 14:47:52.147354 tx_win_center[0][1][4] = 0
4556 14:47:52.147447 tx_first_pass[0][1][4] = 0
4557 14:47:52.150566 tx_last_pass[0][1][4] = 0
4558 14:47:52.153874 tx_win_center[0][1][5] = 0
4559 14:47:52.157066 tx_first_pass[0][1][5] = 0
4560 14:47:52.157184 tx_last_pass[0][1][5] = 0
4561 14:47:52.160448 tx_win_center[0][1][6] = 0
4562 14:47:52.163608 tx_first_pass[0][1][6] = 0
4563 14:47:52.163699 tx_last_pass[0][1][6] = 0
4564 14:47:52.167057 tx_win_center[0][1][7] = 0
4565 14:47:52.170195 tx_first_pass[0][1][7] = 0
4566 14:47:52.173699 tx_last_pass[0][1][7] = 0
4567 14:47:52.173790 tx_win_center[0][1][8] = 0
4568 14:47:52.177046 tx_first_pass[0][1][8] = 0
4569 14:47:52.180256 tx_last_pass[0][1][8] = 0
4570 14:47:52.183182 tx_win_center[0][1][9] = 0
4571 14:47:52.183304 tx_first_pass[0][1][9] = 0
4572 14:47:52.186820 tx_last_pass[0][1][9] = 0
4573 14:47:52.190066 tx_win_center[0][1][10] = 0
4574 14:47:52.193260 tx_first_pass[0][1][10] = 0
4575 14:47:52.193352 tx_last_pass[0][1][10] = 0
4576 14:47:52.196452 tx_win_center[0][1][11] = 0
4577 14:47:52.199775 tx_first_pass[0][1][11] = 0
4578 14:47:52.203261 tx_last_pass[0][1][11] = 0
4579 14:47:52.203353 tx_win_center[0][1][12] = 0
4580 14:47:52.206366 tx_first_pass[0][1][12] = 0
4581 14:47:52.209680 tx_last_pass[0][1][12] = 0
4582 14:47:52.212746 tx_win_center[0][1][13] = 0
4583 14:47:52.216201 tx_first_pass[0][1][13] = 0
4584 14:47:52.216293 tx_last_pass[0][1][13] = 0
4585 14:47:52.219322 tx_win_center[0][1][14] = 0
4586 14:47:52.222495 tx_first_pass[0][1][14] = 0
4587 14:47:52.226031 tx_last_pass[0][1][14] = 0
4588 14:47:52.226123 tx_win_center[0][1][15] = 0
4589 14:47:52.229192 tx_first_pass[0][1][15] = 0
4590 14:47:52.232544 tx_last_pass[0][1][15] = 0
4591 14:47:52.235841 tx_win_center[1][0][0] = 0
4592 14:47:52.235948 tx_first_pass[1][0][0] = 0
4593 14:47:52.239238 tx_last_pass[1][0][0] = 0
4594 14:47:52.242289 tx_win_center[1][0][1] = 0
4595 14:47:52.245393 tx_first_pass[1][0][1] = 0
4596 14:47:52.245525 tx_last_pass[1][0][1] = 0
4597 14:47:52.248900 tx_win_center[1][0][2] = 0
4598 14:47:52.252015 tx_first_pass[1][0][2] = 0
4599 14:47:52.252122 tx_last_pass[1][0][2] = 0
4600 14:47:52.255316 tx_win_center[1][0][3] = 0
4601 14:47:52.258513 tx_first_pass[1][0][3] = 0
4602 14:47:52.262011 tx_last_pass[1][0][3] = 0
4603 14:47:52.262154 tx_win_center[1][0][4] = 0
4604 14:47:52.265246 tx_first_pass[1][0][4] = 0
4605 14:47:52.268522 tx_last_pass[1][0][4] = 0
4606 14:47:52.271594 tx_win_center[1][0][5] = 0
4607 14:47:52.271768 tx_first_pass[1][0][5] = 0
4608 14:47:52.275153 tx_last_pass[1][0][5] = 0
4609 14:47:52.278502 tx_win_center[1][0][6] = 0
4610 14:47:52.281516 tx_first_pass[1][0][6] = 0
4611 14:47:52.281680 tx_last_pass[1][0][6] = 0
4612 14:47:52.285104 tx_win_center[1][0][7] = 0
4613 14:47:52.288307 tx_first_pass[1][0][7] = 0
4614 14:47:52.291443 tx_last_pass[1][0][7] = 0
4615 14:47:52.291564 tx_win_center[1][0][8] = 0
4616 14:47:52.294969 tx_first_pass[1][0][8] = 0
4617 14:47:52.298074 tx_last_pass[1][0][8] = 0
4618 14:47:52.298203 tx_win_center[1][0][9] = 0
4619 14:47:52.301355 tx_first_pass[1][0][9] = 0
4620 14:47:52.304628 tx_last_pass[1][0][9] = 0
4621 14:47:52.308091 tx_win_center[1][0][10] = 0
4622 14:47:52.311306 tx_first_pass[1][0][10] = 0
4623 14:47:52.311436 tx_last_pass[1][0][10] = 0
4624 14:47:52.314674 tx_win_center[1][0][11] = 0
4625 14:47:52.317968 tx_first_pass[1][0][11] = 0
4626 14:47:52.321323 tx_last_pass[1][0][11] = 0
4627 14:47:52.321545 tx_win_center[1][0][12] = 0
4628 14:47:52.324747 tx_first_pass[1][0][12] = 0
4629 14:47:52.327960 tx_last_pass[1][0][12] = 0
4630 14:47:52.331167 tx_win_center[1][0][13] = 0
4631 14:47:52.331442 tx_first_pass[1][0][13] = 0
4632 14:47:52.334564 tx_last_pass[1][0][13] = 0
4633 14:47:52.337831 tx_win_center[1][0][14] = 0
4634 14:47:52.340923 tx_first_pass[1][0][14] = 0
4635 14:47:52.341199 tx_last_pass[1][0][14] = 0
4636 14:47:52.344257 tx_win_center[1][0][15] = 0
4637 14:47:52.347414 tx_first_pass[1][0][15] = 0
4638 14:47:52.350973 tx_last_pass[1][0][15] = 0
4639 14:47:52.351447 tx_win_center[1][1][0] = 0
4640 14:47:52.354545 tx_first_pass[1][1][0] = 0
4641 14:47:52.357477 tx_last_pass[1][1][0] = 0
4642 14:47:52.360548 tx_win_center[1][1][1] = 0
4643 14:47:52.360973 tx_first_pass[1][1][1] = 0
4644 14:47:52.363867 tx_last_pass[1][1][1] = 0
4645 14:47:52.366868 tx_win_center[1][1][2] = 0
4646 14:47:52.370242 tx_first_pass[1][1][2] = 0
4647 14:47:52.370717 tx_last_pass[1][1][2] = 0
4648 14:47:52.373753 tx_win_center[1][1][3] = 0
4649 14:47:52.376807 tx_first_pass[1][1][3] = 0
4650 14:47:52.380078 tx_last_pass[1][1][3] = 0
4651 14:47:52.380640 tx_win_center[1][1][4] = 0
4652 14:47:52.383196 tx_first_pass[1][1][4] = 0
4653 14:47:52.386548 tx_last_pass[1][1][4] = 0
4654 14:47:52.389881 tx_win_center[1][1][5] = 0
4655 14:47:52.390344 tx_first_pass[1][1][5] = 0
4656 14:47:52.393297 tx_last_pass[1][1][5] = 0
4657 14:47:52.396250 tx_win_center[1][1][6] = 0
4658 14:47:52.396676 tx_first_pass[1][1][6] = 0
4659 14:47:52.399472 tx_last_pass[1][1][6] = 0
4660 14:47:52.403062 tx_win_center[1][1][7] = 0
4661 14:47:52.406322 tx_first_pass[1][1][7] = 0
4662 14:47:52.406747 tx_last_pass[1][1][7] = 0
4663 14:47:52.409497 tx_win_center[1][1][8] = 0
4664 14:47:52.412739 tx_first_pass[1][1][8] = 0
4665 14:47:52.415921 tx_last_pass[1][1][8] = 0
4666 14:47:52.416228 tx_win_center[1][1][9] = 0
4667 14:47:52.419123 tx_first_pass[1][1][9] = 0
4668 14:47:52.422613 tx_last_pass[1][1][9] = 0
4669 14:47:52.425827 tx_win_center[1][1][10] = 0
4670 14:47:52.426010 tx_first_pass[1][1][10] = 0
4671 14:47:52.428785 tx_last_pass[1][1][10] = 0
4672 14:47:52.432335 tx_win_center[1][1][11] = 0
4673 14:47:52.435390 tx_first_pass[1][1][11] = 0
4674 14:47:52.435482 tx_last_pass[1][1][11] = 0
4675 14:47:52.438541 tx_win_center[1][1][12] = 0
4676 14:47:52.441956 tx_first_pass[1][1][12] = 0
4677 14:47:52.445039 tx_last_pass[1][1][12] = 0
4678 14:47:52.445166 tx_win_center[1][1][13] = 0
4679 14:47:52.448531 tx_first_pass[1][1][13] = 0
4680 14:47:52.451711 tx_last_pass[1][1][13] = 0
4681 14:47:52.455007 tx_win_center[1][1][14] = 0
4682 14:47:52.458373 tx_first_pass[1][1][14] = 0
4683 14:47:52.458466 tx_last_pass[1][1][14] = 0
4684 14:47:52.461699 tx_win_center[1][1][15] = 0
4685 14:47:52.464925 tx_first_pass[1][1][15] = 0
4686 14:47:52.468133 tx_last_pass[1][1][15] = 0
4687 14:47:52.468225 dump params rx window
4688 14:47:52.471259 rx_firspass[0][0][0] = 0
4689 14:47:52.474911 rx_lastpass[0][0][0] = 0
4690 14:47:52.475002 rx_firspass[0][0][1] = 0
4691 14:47:52.477852 rx_lastpass[0][0][1] = 0
4692 14:47:52.481334 rx_firspass[0][0][2] = 0
4693 14:47:52.481425 rx_lastpass[0][0][2] = 0
4694 14:47:52.484280 rx_firspass[0][0][3] = 0
4695 14:47:52.487899 rx_lastpass[0][0][3] = 0
4696 14:47:52.487990 rx_firspass[0][0][4] = 0
4697 14:47:52.490877 rx_lastpass[0][0][4] = 0
4698 14:47:52.494490 rx_firspass[0][0][5] = 0
4699 14:47:52.497510 rx_lastpass[0][0][5] = 0
4700 14:47:52.497601 rx_firspass[0][0][6] = 0
4701 14:47:52.500985 rx_lastpass[0][0][6] = 0
4702 14:47:52.504160 rx_firspass[0][0][7] = 0
4703 14:47:52.504252 rx_lastpass[0][0][7] = 0
4704 14:47:52.507527 rx_firspass[0][0][8] = 0
4705 14:47:52.510484 rx_lastpass[0][0][8] = 0
4706 14:47:52.510575 rx_firspass[0][0][9] = 0
4707 14:47:52.513782 rx_lastpass[0][0][9] = 0
4708 14:47:52.517110 rx_firspass[0][0][10] = 0
4709 14:47:52.520570 rx_lastpass[0][0][10] = 0
4710 14:47:52.520671 rx_firspass[0][0][11] = 0
4711 14:47:52.523927 rx_lastpass[0][0][11] = 0
4712 14:47:52.526882 rx_firspass[0][0][12] = 0
4713 14:47:52.526974 rx_lastpass[0][0][12] = 0
4714 14:47:52.530437 rx_firspass[0][0][13] = 0
4715 14:47:52.533545 rx_lastpass[0][0][13] = 0
4716 14:47:52.537171 rx_firspass[0][0][14] = 0
4717 14:47:52.537288 rx_lastpass[0][0][14] = 0
4718 14:47:52.540113 rx_firspass[0][0][15] = 0
4719 14:47:52.543637 rx_lastpass[0][0][15] = 0
4720 14:47:52.543772 rx_firspass[0][1][0] = 0
4721 14:47:52.546827 rx_lastpass[0][1][0] = 0
4722 14:47:52.549978 rx_firspass[0][1][1] = 0
4723 14:47:52.553294 rx_lastpass[0][1][1] = 0
4724 14:47:52.553482 rx_firspass[0][1][2] = 0
4725 14:47:52.556918 rx_lastpass[0][1][2] = 0
4726 14:47:52.559772 rx_firspass[0][1][3] = 0
4727 14:47:52.559972 rx_lastpass[0][1][3] = 0
4728 14:47:52.563171 rx_firspass[0][1][4] = 0
4729 14:47:52.566608 rx_lastpass[0][1][4] = 0
4730 14:47:52.566802 rx_firspass[0][1][5] = 0
4731 14:47:52.569968 rx_lastpass[0][1][5] = 0
4732 14:47:52.573047 rx_firspass[0][1][6] = 0
4733 14:47:52.576201 rx_lastpass[0][1][6] = 0
4734 14:47:52.576391 rx_firspass[0][1][7] = 0
4735 14:47:52.579440 rx_lastpass[0][1][7] = 0
4736 14:47:52.582860 rx_firspass[0][1][8] = 0
4737 14:47:52.583004 rx_lastpass[0][1][8] = 0
4738 14:47:52.586108 rx_firspass[0][1][9] = 0
4739 14:47:52.589118 rx_lastpass[0][1][9] = 0
4740 14:47:52.589296 rx_firspass[0][1][10] = 0
4741 14:47:52.592503 rx_lastpass[0][1][10] = 0
4742 14:47:52.596056 rx_firspass[0][1][11] = 0
4743 14:47:52.599375 rx_lastpass[0][1][11] = 0
4744 14:47:52.599564 rx_firspass[0][1][12] = 0
4745 14:47:52.602344 rx_lastpass[0][1][12] = 0
4746 14:47:52.605471 rx_firspass[0][1][13] = 0
4747 14:47:52.609040 rx_lastpass[0][1][13] = 0
4748 14:47:52.609213 rx_firspass[0][1][14] = 0
4749 14:47:52.612137 rx_lastpass[0][1][14] = 0
4750 14:47:52.615441 rx_firspass[0][1][15] = 0
4751 14:47:52.615568 rx_lastpass[0][1][15] = 0
4752 14:47:52.618842 rx_firspass[1][0][0] = 0
4753 14:47:52.622184 rx_lastpass[1][0][0] = 0
4754 14:47:52.625263 rx_firspass[1][0][1] = 0
4755 14:47:52.625447 rx_lastpass[1][0][1] = 0
4756 14:47:52.628689 rx_firspass[1][0][2] = 0
4757 14:47:52.631915 rx_lastpass[1][0][2] = 0
4758 14:47:52.632086 rx_firspass[1][0][3] = 0
4759 14:47:52.635165 rx_lastpass[1][0][3] = 0
4760 14:47:52.638651 rx_firspass[1][0][4] = 0
4761 14:47:52.638867 rx_lastpass[1][0][4] = 0
4762 14:47:52.641672 rx_firspass[1][0][5] = 0
4763 14:47:52.644901 rx_lastpass[1][0][5] = 0
4764 14:47:52.645094 rx_firspass[1][0][6] = 0
4765 14:47:52.648294 rx_lastpass[1][0][6] = 0
4766 14:47:52.651417 rx_firspass[1][0][7] = 0
4767 14:47:52.654694 rx_lastpass[1][0][7] = 0
4768 14:47:52.654838 rx_firspass[1][0][8] = 0
4769 14:47:52.658201 rx_lastpass[1][0][8] = 0
4770 14:47:52.661271 rx_firspass[1][0][9] = 0
4771 14:47:52.661469 rx_lastpass[1][0][9] = 0
4772 14:47:52.664779 rx_firspass[1][0][10] = 0
4773 14:47:52.667736 rx_lastpass[1][0][10] = 0
4774 14:47:52.671140 rx_firspass[1][0][11] = 0
4775 14:47:52.671220 rx_lastpass[1][0][11] = 0
4776 14:47:52.674438 rx_firspass[1][0][12] = 0
4777 14:47:52.677934 rx_lastpass[1][0][12] = 0
4778 14:47:52.678012 rx_firspass[1][0][13] = 0
4779 14:47:52.680910 rx_lastpass[1][0][13] = 0
4780 14:47:52.683993 rx_firspass[1][0][14] = 0
4781 14:47:52.687721 rx_lastpass[1][0][14] = 0
4782 14:47:52.687811 rx_firspass[1][0][15] = 0
4783 14:47:52.690818 rx_lastpass[1][0][15] = 0
4784 14:47:52.694094 rx_firspass[1][1][0] = 0
4785 14:47:52.694192 rx_lastpass[1][1][0] = 0
4786 14:47:52.697048 rx_firspass[1][1][1] = 0
4787 14:47:52.700403 rx_lastpass[1][1][1] = 0
4788 14:47:52.703811 rx_firspass[1][1][2] = 0
4789 14:47:52.703923 rx_lastpass[1][1][2] = 0
4790 14:47:52.707212 rx_firspass[1][1][3] = 0
4791 14:47:52.710549 rx_lastpass[1][1][3] = 0
4792 14:47:52.710696 rx_firspass[1][1][4] = 0
4793 14:47:52.713601 rx_lastpass[1][1][4] = 0
4794 14:47:52.716726 rx_firspass[1][1][5] = 0
4795 14:47:52.716939 rx_lastpass[1][1][5] = 0
4796 14:47:52.720211 rx_firspass[1][1][6] = 0
4797 14:47:52.723762 rx_lastpass[1][1][6] = 0
4798 14:47:52.726930 rx_firspass[1][1][7] = 0
4799 14:47:52.727157 rx_lastpass[1][1][7] = 0
4800 14:47:52.730126 rx_firspass[1][1][8] = 0
4801 14:47:52.733791 rx_lastpass[1][1][8] = 0
4802 14:47:52.734204 rx_firspass[1][1][9] = 0
4803 14:47:52.736894 rx_lastpass[1][1][9] = 0
4804 14:47:52.740247 rx_firspass[1][1][10] = 0
4805 14:47:52.740700 rx_lastpass[1][1][10] = 0
4806 14:47:52.743931 rx_firspass[1][1][11] = 0
4807 14:47:52.746672 rx_lastpass[1][1][11] = 0
4808 14:47:52.750048 rx_firspass[1][1][12] = 0
4809 14:47:52.750773 rx_lastpass[1][1][12] = 0
4810 14:47:52.753607 rx_firspass[1][1][13] = 0
4811 14:47:52.756809 rx_lastpass[1][1][13] = 0
4812 14:47:52.759937 rx_firspass[1][1][14] = 0
4813 14:47:52.760353 rx_lastpass[1][1][14] = 0
4814 14:47:52.763067 rx_firspass[1][1][15] = 0
4815 14:47:52.766142 rx_lastpass[1][1][15] = 0
4816 14:47:52.766729 dump params clk_delay
4817 14:47:52.769538 clk_delay[0] = 0
4818 14:47:52.770114 clk_delay[1] = 0
4819 14:47:52.772637 dump params dqs_delay
4820 14:47:52.773155 dqs_delay[0][0] = 0
4821 14:47:52.776063 dqs_delay[0][1] = 0
4822 14:47:52.779250 dqs_delay[1][0] = 0
4823 14:47:52.779829 dqs_delay[1][1] = 0
4824 14:47:52.782686 dump params delay_cell_unit = 744
4825 14:47:52.786280 dump source = 0x0
4826 14:47:52.786764 dump params frequency:800
4827 14:47:52.789261 dump params rank number:2
4828 14:47:52.789766
4829 14:47:52.792463 dump params write leveling
4830 14:47:52.796034 write leveling[0][0][0] = 0x0
4831 14:47:52.796584 write leveling[0][0][1] = 0x0
4832 14:47:52.798957 write leveling[0][1][0] = 0x0
4833 14:47:52.802366 write leveling[0][1][1] = 0x0
4834 14:47:52.805753 write leveling[1][0][0] = 0x0
4835 14:47:52.809013 write leveling[1][0][1] = 0x0
4836 14:47:52.809505 write leveling[1][1][0] = 0x0
4837 14:47:52.812494 write leveling[1][1][1] = 0x0
4838 14:47:52.815415 dump params cbt_cs
4839 14:47:52.815893 cbt_cs[0][0] = 0x0
4840 14:47:52.818435 cbt_cs[0][1] = 0x0
4841 14:47:52.818892 cbt_cs[1][0] = 0x0
4842 14:47:52.821944 cbt_cs[1][1] = 0x0
4843 14:47:52.824941 dump params cbt_mr12
4844 14:47:52.825527 cbt_mr12[0][0] = 0x0
4845 14:47:52.828552 cbt_mr12[0][1] = 0x0
4846 14:47:52.829127 cbt_mr12[1][0] = 0x0
4847 14:47:52.831558 cbt_mr12[1][1] = 0x0
4848 14:47:52.832172 dump params tx window
4849 14:47:52.835057 tx_center_min[0][0][0] = 0
4850 14:47:52.838342 tx_center_max[0][0][0] = 0
4851 14:47:52.841236 tx_center_min[0][0][1] = 0
4852 14:47:52.841772 tx_center_max[0][0][1] = 0
4853 14:47:52.844997 tx_center_min[0][1][0] = 0
4854 14:47:52.848010 tx_center_max[0][1][0] = 0
4855 14:47:52.851293 tx_center_min[0][1][1] = 0
4856 14:47:52.851697 tx_center_max[0][1][1] = 0
4857 14:47:52.854478 tx_center_min[1][0][0] = 0
4858 14:47:52.858040 tx_center_max[1][0][0] = 0
4859 14:47:52.861191 tx_center_min[1][0][1] = 0
4860 14:47:52.861645 tx_center_max[1][0][1] = 0
4861 14:47:52.864387 tx_center_min[1][1][0] = 0
4862 14:47:52.867874 tx_center_max[1][1][0] = 0
4863 14:47:52.870847 tx_center_min[1][1][1] = 0
4864 14:47:52.871141 tx_center_max[1][1][1] = 0
4865 14:47:52.874059 dump params tx window
4866 14:47:52.877585 tx_win_center[0][0][0] = 0
4867 14:47:52.880711 tx_first_pass[0][0][0] = 0
4868 14:47:52.881013 tx_last_pass[0][0][0] = 0
4869 14:47:52.883827 tx_win_center[0][0][1] = 0
4870 14:47:52.887268 tx_first_pass[0][0][1] = 0
4871 14:47:52.887567 tx_last_pass[0][0][1] = 0
4872 14:47:52.891001 tx_win_center[0][0][2] = 0
4873 14:47:52.894217 tx_first_pass[0][0][2] = 0
4874 14:47:52.897382 tx_last_pass[0][0][2] = 0
4875 14:47:52.897833 tx_win_center[0][0][3] = 0
4876 14:47:52.900475 tx_first_pass[0][0][3] = 0
4877 14:47:52.903966 tx_last_pass[0][0][3] = 0
4878 14:47:52.907287 tx_win_center[0][0][4] = 0
4879 14:47:52.907811 tx_first_pass[0][0][4] = 0
4880 14:47:52.910366 tx_last_pass[0][0][4] = 0
4881 14:47:52.913690 tx_win_center[0][0][5] = 0
4882 14:47:52.917392 tx_first_pass[0][0][5] = 0
4883 14:47:52.918022 tx_last_pass[0][0][5] = 0
4884 14:47:52.920672 tx_win_center[0][0][6] = 0
4885 14:47:52.923841 tx_first_pass[0][0][6] = 0
4886 14:47:52.926703 tx_last_pass[0][0][6] = 0
4887 14:47:52.927168 tx_win_center[0][0][7] = 0
4888 14:47:52.930420 tx_first_pass[0][0][7] = 0
4889 14:47:52.933643 tx_last_pass[0][0][7] = 0
4890 14:47:52.934156 tx_win_center[0][0][8] = 0
4891 14:47:52.937082 tx_first_pass[0][0][8] = 0
4892 14:47:52.940126 tx_last_pass[0][0][8] = 0
4893 14:47:52.943234 tx_win_center[0][0][9] = 0
4894 14:47:52.943653 tx_first_pass[0][0][9] = 0
4895 14:47:52.946227 tx_last_pass[0][0][9] = 0
4896 14:47:52.949863 tx_win_center[0][0][10] = 0
4897 14:47:52.952843 tx_first_pass[0][0][10] = 0
4898 14:47:52.953261 tx_last_pass[0][0][10] = 0
4899 14:47:52.956579 tx_win_center[0][0][11] = 0
4900 14:47:52.959727 tx_first_pass[0][0][11] = 0
4901 14:47:52.963181 tx_last_pass[0][0][11] = 0
4902 14:47:52.963699 tx_win_center[0][0][12] = 0
4903 14:47:52.966446 tx_first_pass[0][0][12] = 0
4904 14:47:52.969809 tx_last_pass[0][0][12] = 0
4905 14:47:52.972854 tx_win_center[0][0][13] = 0
4906 14:47:52.976393 tx_first_pass[0][0][13] = 0
4907 14:47:52.976934 tx_last_pass[0][0][13] = 0
4908 14:47:52.979126 tx_win_center[0][0][14] = 0
4909 14:47:52.982980 tx_first_pass[0][0][14] = 0
4910 14:47:52.986079 tx_last_pass[0][0][14] = 0
4911 14:47:52.986598 tx_win_center[0][0][15] = 0
4912 14:47:52.989197 tx_first_pass[0][0][15] = 0
4913 14:47:52.992614 tx_last_pass[0][0][15] = 0
4914 14:47:52.995774 tx_win_center[0][1][0] = 0
4915 14:47:52.996315 tx_first_pass[0][1][0] = 0
4916 14:47:52.998635 tx_last_pass[0][1][0] = 0
4917 14:47:53.002206 tx_win_center[0][1][1] = 0
4918 14:47:53.005514 tx_first_pass[0][1][1] = 0
4919 14:47:53.006090 tx_last_pass[0][1][1] = 0
4920 14:47:53.008434 tx_win_center[0][1][2] = 0
4921 14:47:53.012108 tx_first_pass[0][1][2] = 0
4922 14:47:53.015055 tx_last_pass[0][1][2] = 0
4923 14:47:53.015470 tx_win_center[0][1][3] = 0
4924 14:47:53.018288 tx_first_pass[0][1][3] = 0
4925 14:47:53.021791 tx_last_pass[0][1][3] = 0
4926 14:47:53.022323 tx_win_center[0][1][4] = 0
4927 14:47:53.024926 tx_first_pass[0][1][4] = 0
4928 14:47:53.028093 tx_last_pass[0][1][4] = 0
4929 14:47:53.031104 tx_win_center[0][1][5] = 0
4930 14:47:53.031632 tx_first_pass[0][1][5] = 0
4931 14:47:53.034892 tx_last_pass[0][1][5] = 0
4932 14:47:53.037868 tx_win_center[0][1][6] = 0
4933 14:47:53.041406 tx_first_pass[0][1][6] = 0
4934 14:47:53.041871 tx_last_pass[0][1][6] = 0
4935 14:47:53.044367 tx_win_center[0][1][7] = 0
4936 14:47:53.047899 tx_first_pass[0][1][7] = 0
4937 14:47:53.051260 tx_last_pass[0][1][7] = 0
4938 14:47:53.051674 tx_win_center[0][1][8] = 0
4939 14:47:53.054298 tx_first_pass[0][1][8] = 0
4940 14:47:53.057929 tx_last_pass[0][1][8] = 0
4941 14:47:53.061159 tx_win_center[0][1][9] = 0
4942 14:47:53.061776 tx_first_pass[0][1][9] = 0
4943 14:47:53.064444 tx_last_pass[0][1][9] = 0
4944 14:47:53.067581 tx_win_center[0][1][10] = 0
4945 14:47:53.071081 tx_first_pass[0][1][10] = 0
4946 14:47:53.071602 tx_last_pass[0][1][10] = 0
4947 14:47:53.073709 tx_win_center[0][1][11] = 0
4948 14:47:53.077470 tx_first_pass[0][1][11] = 0
4949 14:47:53.080473 tx_last_pass[0][1][11] = 0
4950 14:47:53.080891 tx_win_center[0][1][12] = 0
4951 14:47:53.084315 tx_first_pass[0][1][12] = 0
4952 14:47:53.087020 tx_last_pass[0][1][12] = 0
4953 14:47:53.090816 tx_win_center[0][1][13] = 0
4954 14:47:53.091334 tx_first_pass[0][1][13] = 0
4955 14:47:53.093611 tx_last_pass[0][1][13] = 0
4956 14:47:53.097556 tx_win_center[0][1][14] = 0
4957 14:47:53.100465 tx_first_pass[0][1][14] = 0
4958 14:47:53.100983 tx_last_pass[0][1][14] = 0
4959 14:47:53.103658 tx_win_center[0][1][15] = 0
4960 14:47:53.106665 tx_first_pass[0][1][15] = 0
4961 14:47:53.110129 tx_last_pass[0][1][15] = 0
4962 14:47:53.113656 tx_win_center[1][0][0] = 0
4963 14:47:53.114172 tx_first_pass[1][0][0] = 0
4964 14:47:53.116731 tx_last_pass[1][0][0] = 0
4965 14:47:53.119648 tx_win_center[1][0][1] = 0
4966 14:47:53.120067 tx_first_pass[1][0][1] = 0
4967 14:47:53.122893 tx_last_pass[1][0][1] = 0
4968 14:47:53.126332 tx_win_center[1][0][2] = 0
4969 14:47:53.130024 tx_first_pass[1][0][2] = 0
4970 14:47:53.130540 tx_last_pass[1][0][2] = 0
4971 14:47:53.133064 tx_win_center[1][0][3] = 0
4972 14:47:53.136242 tx_first_pass[1][0][3] = 0
4973 14:47:53.139252 tx_last_pass[1][0][3] = 0
4974 14:47:53.139708 tx_win_center[1][0][4] = 0
4975 14:47:53.142726 tx_first_pass[1][0][4] = 0
4976 14:47:53.146002 tx_last_pass[1][0][4] = 0
4977 14:47:53.149185 tx_win_center[1][0][5] = 0
4978 14:47:53.149646 tx_first_pass[1][0][5] = 0
4979 14:47:53.152571 tx_last_pass[1][0][5] = 0
4980 14:47:53.155956 tx_win_center[1][0][6] = 0
4981 14:47:53.159117 tx_first_pass[1][0][6] = 0
4982 14:47:53.159641 tx_last_pass[1][0][6] = 0
4983 14:47:53.162101 tx_win_center[1][0][7] = 0
4984 14:47:53.165738 tx_first_pass[1][0][7] = 0
4985 14:47:53.166177 tx_last_pass[1][0][7] = 0
4986 14:47:53.169131 tx_win_center[1][0][8] = 0
4987 14:47:53.172094 tx_first_pass[1][0][8] = 0
4988 14:47:53.175755 tx_last_pass[1][0][8] = 0
4989 14:47:53.176293 tx_win_center[1][0][9] = 0
4990 14:47:53.178658 tx_first_pass[1][0][9] = 0
4991 14:47:53.182201 tx_last_pass[1][0][9] = 0
4992 14:47:53.185667 tx_win_center[1][0][10] = 0
4993 14:47:53.186218 tx_first_pass[1][0][10] = 0
4994 14:47:53.188687 tx_last_pass[1][0][10] = 0
4995 14:47:53.191911 tx_win_center[1][0][11] = 0
4996 14:47:53.195071 tx_first_pass[1][0][11] = 0
4997 14:47:53.195513 tx_last_pass[1][0][11] = 0
4998 14:47:53.198173 tx_win_center[1][0][12] = 0
4999 14:47:53.202045 tx_first_pass[1][0][12] = 0
5000 14:47:53.205164 tx_last_pass[1][0][12] = 0
5001 14:47:53.208845 tx_win_center[1][0][13] = 0
5002 14:47:53.209385 tx_first_pass[1][0][13] = 0
5003 14:47:53.211698 tx_last_pass[1][0][13] = 0
5004 14:47:53.215025 tx_win_center[1][0][14] = 0
5005 14:47:53.218347 tx_first_pass[1][0][14] = 0
5006 14:47:53.218899 tx_last_pass[1][0][14] = 0
5007 14:47:53.221370 tx_win_center[1][0][15] = 0
5008 14:47:53.224953 tx_first_pass[1][0][15] = 0
5009 14:47:53.227631 tx_last_pass[1][0][15] = 0
5010 14:47:53.228069 tx_win_center[1][1][0] = 0
5011 14:47:53.231347 tx_first_pass[1][1][0] = 0
5012 14:47:53.234594 tx_last_pass[1][1][0] = 0
5013 14:47:53.237942 tx_win_center[1][1][1] = 0
5014 14:47:53.238379 tx_first_pass[1][1][1] = 0
5015 14:47:53.240751 tx_last_pass[1][1][1] = 0
5016 14:47:53.243977 tx_win_center[1][1][2] = 0
5017 14:47:53.247972 tx_first_pass[1][1][2] = 0
5018 14:47:53.248510 tx_last_pass[1][1][2] = 0
5019 14:47:53.250634 tx_win_center[1][1][3] = 0
5020 14:47:53.253869 tx_first_pass[1][1][3] = 0
5021 14:47:53.254306 tx_last_pass[1][1][3] = 0
5022 14:47:53.257192 tx_win_center[1][1][4] = 0
5023 14:47:53.260712 tx_first_pass[1][1][4] = 0
5024 14:47:53.264142 tx_last_pass[1][1][4] = 0
5025 14:47:53.264687 tx_win_center[1][1][5] = 0
5026 14:47:53.267073 tx_first_pass[1][1][5] = 0
5027 14:47:53.270611 tx_last_pass[1][1][5] = 0
5028 14:47:53.273685 tx_win_center[1][1][6] = 0
5029 14:47:53.274120 tx_first_pass[1][1][6] = 0
5030 14:47:53.276994 tx_last_pass[1][1][6] = 0
5031 14:47:53.280229 tx_win_center[1][1][7] = 0
5032 14:47:53.283539 tx_first_pass[1][1][7] = 0
5033 14:47:53.284080 tx_last_pass[1][1][7] = 0
5034 14:47:53.286728 tx_win_center[1][1][8] = 0
5035 14:47:53.289901 tx_first_pass[1][1][8] = 0
5036 14:47:53.293188 tx_last_pass[1][1][8] = 0
5037 14:47:53.293774 tx_win_center[1][1][9] = 0
5038 14:47:53.296785 tx_first_pass[1][1][9] = 0
5039 14:47:53.299694 tx_last_pass[1][1][9] = 0
5040 14:47:53.300126 tx_win_center[1][1][10] = 0
5041 14:47:53.303458 tx_first_pass[1][1][10] = 0
5042 14:47:53.306414 tx_last_pass[1][1][10] = 0
5043 14:47:53.310113 tx_win_center[1][1][11] = 0
5044 14:47:53.313140 tx_first_pass[1][1][11] = 0
5045 14:47:53.313726 tx_last_pass[1][1][11] = 0
5046 14:47:53.316564 tx_win_center[1][1][12] = 0
5047 14:47:53.319562 tx_first_pass[1][1][12] = 0
5048 14:47:53.322920 tx_last_pass[1][1][12] = 0
5049 14:47:53.323471 tx_win_center[1][1][13] = 0
5050 14:47:53.325987 tx_first_pass[1][1][13] = 0
5051 14:47:53.329725 tx_last_pass[1][1][13] = 0
5052 14:47:53.332742 tx_win_center[1][1][14] = 0
5053 14:47:53.333284 tx_first_pass[1][1][14] = 0
5054 14:47:53.335983 tx_last_pass[1][1][14] = 0
5055 14:47:53.339256 tx_win_center[1][1][15] = 0
5056 14:47:53.342243 tx_first_pass[1][1][15] = 0
5057 14:47:53.342736 tx_last_pass[1][1][15] = 0
5058 14:47:53.345537 dump params rx window
5059 14:47:53.348914 rx_firspass[0][0][0] = 0
5060 14:47:53.349584 rx_lastpass[0][0][0] = 0
5061 14:47:53.351972 rx_firspass[0][0][1] = 0
5062 14:47:53.355285 rx_lastpass[0][0][1] = 0
5063 14:47:53.358652 rx_firspass[0][0][2] = 0
5064 14:47:53.359087 rx_lastpass[0][0][2] = 0
5065 14:47:53.361964 rx_firspass[0][0][3] = 0
5066 14:47:53.365005 rx_lastpass[0][0][3] = 0
5067 14:47:53.365473 rx_firspass[0][0][4] = 0
5068 14:47:53.368577 rx_lastpass[0][0][4] = 0
5069 14:47:53.371578 rx_firspass[0][0][5] = 0
5070 14:47:53.372012 rx_lastpass[0][0][5] = 0
5071 14:47:53.375191 rx_firspass[0][0][6] = 0
5072 14:47:53.378428 rx_lastpass[0][0][6] = 0
5073 14:47:53.381548 rx_firspass[0][0][7] = 0
5074 14:47:53.381990 rx_lastpass[0][0][7] = 0
5075 14:47:53.384682 rx_firspass[0][0][8] = 0
5076 14:47:53.388209 rx_lastpass[0][0][8] = 0
5077 14:47:53.388638 rx_firspass[0][0][9] = 0
5078 14:47:53.391533 rx_lastpass[0][0][9] = 0
5079 14:47:53.394726 rx_firspass[0][0][10] = 0
5080 14:47:53.395161 rx_lastpass[0][0][10] = 0
5081 14:47:53.398109 rx_firspass[0][0][11] = 0
5082 14:47:53.401570 rx_lastpass[0][0][11] = 0
5083 14:47:53.404882 rx_firspass[0][0][12] = 0
5084 14:47:53.405423 rx_lastpass[0][0][12] = 0
5085 14:47:53.408088 rx_firspass[0][0][13] = 0
5086 14:47:53.411026 rx_lastpass[0][0][13] = 0
5087 14:47:53.414504 rx_firspass[0][0][14] = 0
5088 14:47:53.415038 rx_lastpass[0][0][14] = 0
5089 14:47:53.417565 rx_firspass[0][0][15] = 0
5090 14:47:53.421246 rx_lastpass[0][0][15] = 0
5091 14:47:53.421829 rx_firspass[0][1][0] = 0
5092 14:47:53.424278 rx_lastpass[0][1][0] = 0
5093 14:47:53.427439 rx_firspass[0][1][1] = 0
5094 14:47:53.431114 rx_lastpass[0][1][1] = 0
5095 14:47:53.431650 rx_firspass[0][1][2] = 0
5096 14:47:53.433976 rx_lastpass[0][1][2] = 0
5097 14:47:53.437528 rx_firspass[0][1][3] = 0
5098 14:47:53.438058 rx_lastpass[0][1][3] = 0
5099 14:47:53.440517 rx_firspass[0][1][4] = 0
5100 14:47:53.443783 rx_lastpass[0][1][4] = 0
5101 14:47:53.444218 rx_firspass[0][1][5] = 0
5102 14:47:53.446892 rx_lastpass[0][1][5] = 0
5103 14:47:53.450212 rx_firspass[0][1][6] = 0
5104 14:47:53.450646 rx_lastpass[0][1][6] = 0
5105 14:47:53.453657 rx_firspass[0][1][7] = 0
5106 14:47:53.456950 rx_lastpass[0][1][7] = 0
5107 14:47:53.460600 rx_firspass[0][1][8] = 0
5108 14:47:53.461136 rx_lastpass[0][1][8] = 0
5109 14:47:53.463681 rx_firspass[0][1][9] = 0
5110 14:47:53.466885 rx_lastpass[0][1][9] = 0
5111 14:47:53.467324 rx_firspass[0][1][10] = 0
5112 14:47:53.470093 rx_lastpass[0][1][10] = 0
5113 14:47:53.473601 rx_firspass[0][1][11] = 0
5114 14:47:53.476391 rx_lastpass[0][1][11] = 0
5115 14:47:53.476826 rx_firspass[0][1][12] = 0
5116 14:47:53.480001 rx_lastpass[0][1][12] = 0
5117 14:47:53.483228 rx_firspass[0][1][13] = 0
5118 14:47:53.483766 rx_lastpass[0][1][13] = 0
5119 14:47:53.486369 rx_firspass[0][1][14] = 0
5120 14:47:53.489824 rx_lastpass[0][1][14] = 0
5121 14:47:53.493146 rx_firspass[0][1][15] = 0
5122 14:47:53.493741 rx_lastpass[0][1][15] = 0
5123 14:47:53.496128 rx_firspass[1][0][0] = 0
5124 14:47:53.499762 rx_lastpass[1][0][0] = 0
5125 14:47:53.500179 rx_firspass[1][0][1] = 0
5126 14:47:53.502899 rx_lastpass[1][0][1] = 0
5127 14:47:53.505952 rx_firspass[1][0][2] = 0
5128 14:47:53.509401 rx_lastpass[1][0][2] = 0
5129 14:47:53.509858 rx_firspass[1][0][3] = 0
5130 14:47:53.512714 rx_lastpass[1][0][3] = 0
5131 14:47:53.515699 rx_firspass[1][0][4] = 0
5132 14:47:53.516114 rx_lastpass[1][0][4] = 0
5133 14:47:53.519041 rx_firspass[1][0][5] = 0
5134 14:47:53.522566 rx_lastpass[1][0][5] = 0
5135 14:47:53.523075 rx_firspass[1][0][6] = 0
5136 14:47:53.525595 rx_lastpass[1][0][6] = 0
5137 14:47:53.529025 rx_firspass[1][0][7] = 0
5138 14:47:53.532443 rx_lastpass[1][0][7] = 0
5139 14:47:53.532971 rx_firspass[1][0][8] = 0
5140 14:47:53.535584 rx_lastpass[1][0][8] = 0
5141 14:47:53.538798 rx_firspass[1][0][9] = 0
5142 14:47:53.539315 rx_lastpass[1][0][9] = 0
5143 14:47:53.541998 rx_firspass[1][0][10] = 0
5144 14:47:53.545128 rx_lastpass[1][0][10] = 0
5145 14:47:53.545609 rx_firspass[1][0][11] = 0
5146 14:47:53.548442 rx_lastpass[1][0][11] = 0
5147 14:47:53.551875 rx_firspass[1][0][12] = 0
5148 14:47:53.554927 rx_lastpass[1][0][12] = 0
5149 14:47:53.555356 rx_firspass[1][0][13] = 0
5150 14:47:53.558381 rx_lastpass[1][0][13] = 0
5151 14:47:53.561654 rx_firspass[1][0][14] = 0
5152 14:47:53.564970 rx_lastpass[1][0][14] = 0
5153 14:47:53.565384 rx_firspass[1][0][15] = 0
5154 14:47:53.568054 rx_lastpass[1][0][15] = 0
5155 14:47:53.571586 rx_firspass[1][1][0] = 0
5156 14:47:53.571999 rx_lastpass[1][1][0] = 0
5157 14:47:53.574539 rx_firspass[1][1][1] = 0
5158 14:47:53.578038 rx_lastpass[1][1][1] = 0
5159 14:47:53.578452 rx_firspass[1][1][2] = 0
5160 14:47:53.581287 rx_lastpass[1][1][2] = 0
5161 14:47:53.584590 rx_firspass[1][1][3] = 0
5162 14:47:53.587575 rx_lastpass[1][1][3] = 0
5163 14:47:53.587961 rx_firspass[1][1][4] = 0
5164 14:47:53.591078 rx_lastpass[1][1][4] = 0
5165 14:47:53.594442 rx_firspass[1][1][5] = 0
5166 14:47:53.594823 rx_lastpass[1][1][5] = 0
5167 14:47:53.597481 rx_firspass[1][1][6] = 0
5168 14:47:53.600902 rx_lastpass[1][1][6] = 0
5169 14:47:53.601382 rx_firspass[1][1][7] = 0
5170 14:47:53.604067 rx_lastpass[1][1][7] = 0
5171 14:47:53.607448 rx_firspass[1][1][8] = 0
5172 14:47:53.610828 rx_lastpass[1][1][8] = 0
5173 14:47:53.611254 rx_firspass[1][1][9] = 0
5174 14:47:53.613911 rx_lastpass[1][1][9] = 0
5175 14:47:53.617664 rx_firspass[1][1][10] = 0
5176 14:47:53.618174 rx_lastpass[1][1][10] = 0
5177 14:47:53.620785 rx_firspass[1][1][11] = 0
5178 14:47:53.624039 rx_lastpass[1][1][11] = 0
5179 14:47:53.627443 rx_firspass[1][1][12] = 0
5180 14:47:53.627975 rx_lastpass[1][1][12] = 0
5181 14:47:53.630235 rx_firspass[1][1][13] = 0
5182 14:47:53.633687 rx_lastpass[1][1][13] = 0
5183 14:47:53.634125 rx_firspass[1][1][14] = 0
5184 14:47:53.636761 rx_lastpass[1][1][14] = 0
5185 14:47:53.640130 rx_firspass[1][1][15] = 0
5186 14:47:53.643334 rx_lastpass[1][1][15] = 0
5187 14:47:53.643768 dump params clk_delay
5188 14:47:53.646541 clk_delay[0] = 0
5189 14:47:53.646973 clk_delay[1] = 0
5190 14:47:53.650080 dump params dqs_delay
5191 14:47:53.650517 dqs_delay[0][0] = 0
5192 14:47:53.652920 dqs_delay[0][1] = 0
5193 14:47:53.653370 dqs_delay[1][0] = 0
5194 14:47:53.656851 dqs_delay[1][1] = 0
5195 14:47:53.660349 dump params delay_cell_unit = 744
5196 14:47:53.663102 mt_set_emi_preloader end
5197 14:47:53.666119 [mt_mem_init] dram size: 0x100000000, rank number: 2
5198 14:47:53.669515 [complex_mem_test] start addr:0x40000000, len:20480
5199 14:47:53.707945 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5200 14:47:53.714063 [complex_mem_test] start addr:0x80000000, len:20480
5201 14:47:53.749813 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5202 14:47:53.756583 [complex_mem_test] start addr:0xc0000000, len:20480
5203 14:47:53.792339 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5204 14:47:53.798925 [complex_mem_test] start addr:0x56000000, len:8192
5205 14:47:53.816098 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5206 14:47:53.818788 ddr_geometry:1
5207 14:47:53.822233 [complex_mem_test] start addr:0x80000000, len:8192
5208 14:47:53.839519 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5209 14:47:53.843053 dram_init: dram init end (result: 0)
5210 14:47:53.849489 Successfully loaded DRAM blobs and ran DRAM calibration
5211 14:47:53.859252 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5212 14:47:53.859788 CBMEM:
5213 14:47:53.862293 IMD: root @ 00000000fffff000 254 entries.
5214 14:47:53.865487 IMD: root @ 00000000ffffec00 62 entries.
5215 14:47:53.872550 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5216 14:47:53.878508 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5217 14:47:53.881744 in-header: 03 a1 00 00 08 00 00 00
5218 14:47:53.885550 in-data: 84 60 60 10 00 00 00 00
5219 14:47:53.888750 Chrome EC: clear events_b mask to 0x0000000020004000
5220 14:47:53.898511 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5221 14:47:53.901908 in-header: 03 fd 00 00 00 00 00 00
5222 14:47:53.902725 in-data:
5223 14:47:53.904990 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5224 14:47:53.908437 CBFS @ 21000 size 3d4000
5225 14:47:53.911453 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5226 14:47:53.915091 CBFS: Locating 'fallback/ramstage'
5227 14:47:53.917998 CBFS: Found @ offset 10d40 size d563
5228 14:47:53.941187 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5229 14:47:53.953021 Accumulated console time in romstage 13577 ms
5230 14:47:53.953480
5231 14:47:53.953840
5232 14:47:53.962968 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5233 14:47:53.966371 ARM64: Exception handlers installed.
5234 14:47:53.966759 ARM64: Testing exception
5235 14:47:53.969568 ARM64: Done test exception
5236 14:47:53.972750 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5237 14:47:53.976219 Manufacturer: ef
5238 14:47:53.982789 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5239 14:47:53.985985 WARNING: RO_VPD is uninitialized or empty.
5240 14:47:53.989184 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5241 14:47:53.992595 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5242 14:47:54.003240 read SPI 0x550600 0x3a00: 4531 us, 3276 KB/s, 26.208 Mbps
5243 14:47:54.006072 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5244 14:47:54.013077 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5245 14:47:54.013545 Enumerating buses...
5246 14:47:54.019372 Show all devs... Before device enumeration.
5247 14:47:54.019889 Root Device: enabled 1
5248 14:47:54.022686 CPU_CLUSTER: 0: enabled 1
5249 14:47:54.026068 CPU: 00: enabled 1
5250 14:47:54.026488 Compare with tree...
5251 14:47:54.029218 Root Device: enabled 1
5252 14:47:54.029685 CPU_CLUSTER: 0: enabled 1
5253 14:47:54.032783 CPU: 00: enabled 1
5254 14:47:54.035661 Root Device scanning...
5255 14:47:54.039452 root_dev_scan_bus for Root Device
5256 14:47:54.039964 CPU_CLUSTER: 0 enabled
5257 14:47:54.042421 root_dev_scan_bus for Root Device done
5258 14:47:54.048690 scan_bus: scanning of bus Root Device took 10689 usecs
5259 14:47:54.049127 done
5260 14:47:54.052124 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5261 14:47:54.055390 Allocating resources...
5262 14:47:54.058641 Reading resources...
5263 14:47:54.061764 Root Device read_resources bus 0 link: 0
5264 14:47:54.064929 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5265 14:47:54.068839 CPU: 00 missing read_resources
5266 14:47:54.071655 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5267 14:47:54.074982 Root Device read_resources bus 0 link: 0 done
5268 14:47:54.078050 Done reading resources.
5269 14:47:54.084719 Show resources in subtree (Root Device)...After reading.
5270 14:47:54.088082 Root Device child on link 0 CPU_CLUSTER: 0
5271 14:47:54.091081 CPU_CLUSTER: 0 child on link 0 CPU: 00
5272 14:47:54.097937 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5273 14:47:54.100914 CPU: 00
5274 14:47:54.101303 Setting resources...
5275 14:47:54.107663 Root Device assign_resources, bus 0 link: 0
5276 14:47:54.111433 CPU_CLUSTER: 0 missing set_resources
5277 14:47:54.114166 Root Device assign_resources, bus 0 link: 0
5278 14:47:54.114558 Done setting resources.
5279 14:47:54.121135 Show resources in subtree (Root Device)...After assigning values.
5280 14:47:54.123892 Root Device child on link 0 CPU_CLUSTER: 0
5281 14:47:54.127377 CPU_CLUSTER: 0 child on link 0 CPU: 00
5282 14:47:54.137180 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5283 14:47:54.137628 CPU: 00
5284 14:47:54.140340 Done allocating resources.
5285 14:47:54.147123 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5286 14:47:54.147647 Enabling resources...
5287 14:47:54.148062 done.
5288 14:47:54.153298 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5289 14:47:54.153794 Initializing devices...
5290 14:47:54.156651 Root Device init ...
5291 14:47:54.159903 mainboard_init: Starting display init.
5292 14:47:54.163213 ADC[4]: Raw value=76192 ID=0
5293 14:47:54.185858 anx7625_power_on_init: Init interface.
5294 14:47:54.188642 anx7625_disable_pd_protocol: Disabled PD feature.
5295 14:47:54.195167 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5296 14:47:54.252629 anx7625_start_dp_work: Secure OCM version=00
5297 14:47:54.255980 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5298 14:47:54.272916 sp_tx_get_edid_block: EDID Block = 1
5299 14:47:54.390578 Extracted contents:
5300 14:47:54.394025 header: 00 ff ff ff ff ff ff 00
5301 14:47:54.396927 serial number: 06 af 5c 14 00 00 00 00 00 1a
5302 14:47:54.400740 version: 01 04
5303 14:47:54.403823 basic params: 95 1a 0e 78 02
5304 14:47:54.407315 chroma info: 99 85 95 55 56 92 28 22 50 54
5305 14:47:54.410139 established: 00 00 00
5306 14:47:54.416413 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5307 14:47:54.423374 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5308 14:47:54.426765 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5309 14:47:54.433294 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5310 14:47:54.439701 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5311 14:47:54.442844 extensions: 00
5312 14:47:54.443259 checksum: ae
5313 14:47:54.443587
5314 14:47:54.449542 Manufacturer: AUO Model 145c Serial Number 0
5315 14:47:54.450072 Made week 0 of 2016
5316 14:47:54.452402 EDID version: 1.4
5317 14:47:54.452820 Digital display
5318 14:47:54.455570 6 bits per primary color channel
5319 14:47:54.458839 DisplayPort interface
5320 14:47:54.462128 Maximum image size: 26 cm x 14 cm
5321 14:47:54.462553 Gamma: 220%
5322 14:47:54.462888 Check DPMS levels
5323 14:47:54.465802 Supported color formats: RGB 4:4:4
5324 14:47:54.472339 First detailed timing is preferred timing
5325 14:47:54.472869 Established timings supported:
5326 14:47:54.475746 Standard timings supported:
5327 14:47:54.478753 Detailed timings
5328 14:47:54.481829 Hex of detail: ce1d56ea50001a3030204600009010000018
5329 14:47:54.488753 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5330 14:47:54.492110 0556 0586 05a6 0640 hborder 0
5331 14:47:54.494786 0300 0304 030a 031a vborder 0
5332 14:47:54.498404 -hsync -vsync
5333 14:47:54.498933 Did detailed timing
5334 14:47:54.504810 Hex of detail: 0000000f0000000000000000000000000020
5335 14:47:54.508592 Manufacturer-specified data, tag 15
5336 14:47:54.511690 Hex of detail: 000000fe0041554f0a202020202020202020
5337 14:47:54.514934 ASCII string: AUO
5338 14:47:54.518286 Hex of detail: 000000fe004231313658414230312e34200a
5339 14:47:54.521515 ASCII string: B116XAB01.4
5340 14:47:54.522051 Checksum
5341 14:47:54.524319 Checksum: 0xae (valid)
5342 14:47:54.528089 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5343 14:47:54.530752 DSI data_rate: 457800000 bps
5344 14:47:54.537369 anx7625_parse_edid: set default k value to 0x3d for panel
5345 14:47:54.540548 anx7625_parse_edid: pixelclock(76300).
5346 14:47:54.544014 hactive(1366), hsync(32), hfp(48), hbp(154)
5347 14:47:54.546921 vactive(768), vsync(6), vfp(4), vbp(16)
5348 14:47:54.550166 anx7625_dsi_config: config dsi.
5349 14:47:54.558689 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5350 14:47:54.579311 anx7625_dsi_config: success to config DSI
5351 14:47:54.582701 anx7625_dp_start: MIPI phy setup OK.
5352 14:47:54.585873 [SSUSB] Setting up USB HOST controller...
5353 14:47:54.589289 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5354 14:47:54.592677 [SSUSB] phy power-on done.
5355 14:47:54.596498 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5356 14:47:54.599466 in-header: 03 fc 01 00 00 00 00 00
5357 14:47:54.599848 in-data:
5358 14:47:54.606050 handle_proto3_response: EC response with error code: 1
5359 14:47:54.606523 SPM: pcm index = 1
5360 14:47:54.612592 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5361 14:47:54.613008 CBFS @ 21000 size 3d4000
5362 14:47:54.619108 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5363 14:47:54.622308 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5364 14:47:54.625791 CBFS: Found @ offset 1e7c0 size 1026
5365 14:47:54.632822 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5366 14:47:54.635621 SPM: binary array size = 2988
5367 14:47:54.639199 SPM: version = pcm_allinone_v1.17.2_20180829
5368 14:47:54.641906 SPM binary loaded in 32 msecs
5369 14:47:54.650492 spm_kick_im_to_fetch: ptr = 000000004021eec2
5370 14:47:54.653978 spm_kick_im_to_fetch: len = 2988
5371 14:47:54.654529 SPM: spm_kick_pcm_to_run
5372 14:47:54.657266 SPM: spm_kick_pcm_to_run done
5373 14:47:54.660436 SPM: spm_init done in 52 msecs
5374 14:47:54.663589 Root Device init finished in 505259 usecs
5375 14:47:54.667079 CPU_CLUSTER: 0 init ...
5376 14:47:54.676911 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5377 14:47:54.679801 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5378 14:47:54.683383 CBFS @ 21000 size 3d4000
5379 14:47:54.686669 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5380 14:47:54.689783 CBFS: Locating 'sspm.bin'
5381 14:47:54.693175 CBFS: Found @ offset 208c0 size 41cb
5382 14:47:54.703744 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5383 14:47:54.711817 CPU_CLUSTER: 0 init finished in 42800 usecs
5384 14:47:54.712199 Devices initialized
5385 14:47:54.715138 Show all devs... After init.
5386 14:47:54.718211 Root Device: enabled 1
5387 14:47:54.718591 CPU_CLUSTER: 0: enabled 1
5388 14:47:54.721567 CPU: 00: enabled 1
5389 14:47:54.724740 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5390 14:47:54.731191 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5391 14:47:54.734422 ELOG: NV offset 0x558000 size 0x1000
5392 14:47:54.737802 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5393 14:47:54.744133 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5394 14:47:54.750817 ELOG: Event(17) added with size 13 at 2024-06-04 14:47:54 UTC
5395 14:47:54.753888 out: cmd=0x121: 03 db 21 01 00 00 00 00
5396 14:47:54.757211 in-header: 03 f8 00 00 2c 00 00 00
5397 14:47:54.770450 in-data: 29 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 50 aa 03 00 06 80 00 00 e3 d9 07 00 06 80 00 00 16 b6 01 00 06 80 00 00 c3 e9 02 00
5398 14:47:54.773509 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5399 14:47:54.776685 in-header: 03 19 00 00 08 00 00 00
5400 14:47:54.779836 in-data: a2 e0 47 00 13 00 00 00
5401 14:47:54.783274 Chrome EC: UHEPI supported
5402 14:47:54.789872 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5403 14:47:54.793063 in-header: 03 e1 00 00 08 00 00 00
5404 14:47:54.796175 in-data: 84 20 60 10 00 00 00 00
5405 14:47:54.799478 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5406 14:47:54.806017 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5407 14:47:54.809468 in-header: 03 e1 00 00 08 00 00 00
5408 14:47:54.812577 in-data: 84 20 60 10 00 00 00 00
5409 14:47:54.819191 ELOG: Event(A1) added with size 10 at 2024-06-04 14:47:54 UTC
5410 14:47:54.825700 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5411 14:47:54.829318 ELOG: Event(A0) added with size 9 at 2024-06-04 14:47:54 UTC
5412 14:47:54.835757 elog_add_boot_reason: Logged dev mode boot
5413 14:47:54.835936 Finalize devices...
5414 14:47:54.839071 Devices finalized
5415 14:47:54.842491 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5416 14:47:54.845415 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5417 14:47:54.852097 ELOG: Event(91) added with size 10 at 2024-06-04 14:47:54 UTC
5418 14:47:54.855297 Writing coreboot table at 0xffeda000
5419 14:47:54.858819 0. 0000000000114000-000000000011efff: RAMSTAGE
5420 14:47:54.865323 1. 0000000040000000-000000004023cfff: RAMSTAGE
5421 14:47:54.869032 2. 000000004023d000-00000000545fffff: RAM
5422 14:47:54.872142 3. 0000000054600000-000000005465ffff: BL31
5423 14:47:54.874967 4. 0000000054660000-00000000ffed9fff: RAM
5424 14:47:54.881533 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5425 14:47:54.884994 6. 0000000100000000-000000013fffffff: RAM
5426 14:47:54.888133 Passing 5 GPIOs to payload:
5427 14:47:54.891628 NAME | PORT | POLARITY | VALUE
5428 14:47:54.897955 write protect | 0x00000096 | low | high
5429 14:47:54.901517 EC in RW | 0x000000b1 | high | undefined
5430 14:47:54.904449 EC interrupt | 0x00000097 | low | undefined
5431 14:47:54.911137 TPM interrupt | 0x00000099 | high | undefined
5432 14:47:54.914447 speaker enable | 0x000000af | high | undefined
5433 14:47:54.917772 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5434 14:47:54.920815 in-header: 03 f7 00 00 02 00 00 00
5435 14:47:54.924088 in-data: 04 00
5436 14:47:54.924567 Board ID: 4
5437 14:47:54.927490 ADC[3]: Raw value=215404 ID=1
5438 14:47:54.928004 RAM code: 1
5439 14:47:54.930620 SKU ID: 16
5440 14:47:54.934093 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5441 14:47:54.937149 CBFS @ 21000 size 3d4000
5442 14:47:54.940251 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5443 14:47:54.946995 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 593d
5444 14:47:54.950142 coreboot table: 940 bytes.
5445 14:47:54.953328 IMD ROOT 0. 00000000fffff000 00001000
5446 14:47:54.956676 IMD SMALL 1. 00000000ffffe000 00001000
5447 14:47:54.959851 CONSOLE 2. 00000000fffde000 00020000
5448 14:47:54.963417 FMAP 3. 00000000fffdd000 0000047c
5449 14:47:54.966322 TIME STAMP 4. 00000000fffdc000 00000910
5450 14:47:54.973193 RAMOOPS 5. 00000000ffedc000 00100000
5451 14:47:54.976279 COREBOOT 6. 00000000ffeda000 00002000
5452 14:47:54.976399 IMD small region:
5453 14:47:54.979532 IMD ROOT 0. 00000000ffffec00 00000400
5454 14:47:54.982972 VBOOT WORK 1. 00000000ffffeb00 00000100
5455 14:47:54.989378 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5456 14:47:54.992929 VPD 3. 00000000ffffea60 0000006c
5457 14:47:54.996191 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5458 14:47:55.002468 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5459 14:47:55.005811 in-header: 03 e1 00 00 08 00 00 00
5460 14:47:55.009663 in-data: 84 20 60 10 00 00 00 00
5461 14:47:55.015595 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5462 14:47:55.015940 CBFS @ 21000 size 3d4000
5463 14:47:55.022239 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5464 14:47:55.025403 CBFS: Locating 'fallback/payload'
5465 14:47:55.033054 CBFS: Found @ offset dc040 size 439a0
5466 14:47:55.121889 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5467 14:47:55.124579 Checking segment from ROM address 0x0000000040003a00
5468 14:47:55.131173 Checking segment from ROM address 0x0000000040003a1c
5469 14:47:55.134485 Loading segment from ROM address 0x0000000040003a00
5470 14:47:55.138352 code (compression=0)
5471 14:47:55.147720 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5472 14:47:55.153883 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5473 14:47:55.157119 it's not compressed!
5474 14:47:55.160680 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5475 14:47:55.166828 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5476 14:47:55.175747 Loading segment from ROM address 0x0000000040003a1c
5477 14:47:55.179166 Entry Point 0x0000000080000000
5478 14:47:55.179687 Loaded segments
5479 14:47:55.185595 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5480 14:47:55.189183 Jumping to boot code at 0000000080000000(00000000ffeda000)
5481 14:47:55.198579 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5482 14:47:55.205535 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5483 14:47:55.206056 CBFS @ 21000 size 3d4000
5484 14:47:55.212178 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5485 14:47:55.214948 CBFS: Locating 'fallback/bl31'
5486 14:47:55.218361 CBFS: Found @ offset 36dc0 size 5820
5487 14:47:55.229790 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5488 14:47:55.232957 Checking segment from ROM address 0x0000000040003a00
5489 14:47:55.239166 Checking segment from ROM address 0x0000000040003a1c
5490 14:47:55.242810 Loading segment from ROM address 0x0000000040003a00
5491 14:47:55.245946 code (compression=1)
5492 14:47:55.255870 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5493 14:47:55.262445 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5494 14:47:55.262968 using LZMA
5495 14:47:55.271819 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5496 14:47:55.278153 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5497 14:47:55.281351 Loading segment from ROM address 0x0000000040003a1c
5498 14:47:55.284394 Entry Point 0x0000000054601000
5499 14:47:55.284913 Loaded segments
5500 14:47:55.287947 NOTICE: MT8183 bl31_setup
5501 14:47:55.295426 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5502 14:47:55.298919 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5503 14:47:55.301669 INFO: [DEVAPC] dump DEVAPC registers:
5504 14:47:55.311454 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5505 14:47:55.318454 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5506 14:47:55.328024 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5507 14:47:55.334394 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5508 14:47:55.344102 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5509 14:47:55.350456 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5510 14:47:55.360335 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5511 14:47:55.367102 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5512 14:47:55.376374 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5513 14:47:55.383073 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5514 14:47:55.393121 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5515 14:47:55.402627 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5516 14:47:55.409290 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5517 14:47:55.415811 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5518 14:47:55.422489 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5519 14:47:55.432478 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5520 14:47:55.439026 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5521 14:47:55.445226 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5522 14:47:55.451887 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5523 14:47:55.461666 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5524 14:47:55.468188 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5525 14:47:55.474852 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5526 14:47:55.478011 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5527 14:47:55.481097 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5528 14:47:55.484648 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5529 14:47:55.488253 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5530 14:47:55.491007 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5531 14:47:55.497566 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5532 14:47:55.504151 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5533 14:47:55.504538 WARNING: region 0:
5534 14:47:55.507729 WARNING: apc:0x168, sa:0x0, ea:0xfff
5535 14:47:55.511073 WARNING: region 1:
5536 14:47:55.514147 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5537 14:47:55.514535 WARNING: region 2:
5538 14:47:55.517144 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5539 14:47:55.520606 WARNING: region 3:
5540 14:47:55.523808 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5541 14:47:55.526857 WARNING: region 4:
5542 14:47:55.530185 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5543 14:47:55.530705 WARNING: region 5:
5544 14:47:55.533650 WARNING: apc:0x0, sa:0x0, ea:0x0
5545 14:47:55.536966 WARNING: region 6:
5546 14:47:55.539950 WARNING: apc:0x0, sa:0x0, ea:0x0
5547 14:47:55.540347 WARNING: region 7:
5548 14:47:55.543573 WARNING: apc:0x0, sa:0x0, ea:0x0
5549 14:47:55.549750 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5550 14:47:55.552993 INFO: SPM: enable SPMC mode
5551 14:47:55.556410 NOTICE: spm_boot_init() start
5552 14:47:55.559896 NOTICE: spm_boot_init() end
5553 14:47:55.563002 INFO: BL31: Initializing runtime services
5554 14:47:55.569684 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5555 14:47:55.572907 INFO: BL31: Preparing for EL3 exit to normal world
5556 14:47:55.576130 INFO: Entry point address = 0x80000000
5557 14:47:55.579436 INFO: SPSR = 0x8
5558 14:47:55.601357
5559 14:47:55.601465
5560 14:47:55.601544
5561 14:47:55.604347 Starting depthcharge on Juniper...
5562 14:47:55.604445
5563 14:47:55.604963 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5564 14:47:55.605072 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5565 14:47:55.605165 Setting prompt string to ['jacuzzi:']
5566 14:47:55.605258 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5567 14:47:55.607704 vboot_handoff: creating legacy vboot_handoff structure
5568 14:47:55.607797
5569 14:47:55.610909 ec_init(0): CrosEC protocol v3 supported (544, 544)
5570 14:47:55.614242
5571 14:47:55.614335 Wipe memory regions:
5572 14:47:55.614429
5573 14:47:55.617741 [0x00000040000000, 0x00000054600000)
5574 14:47:55.660620
5575 14:47:55.660723 [0x00000054660000, 0x00000080000000)
5576 14:47:55.752276
5577 14:47:55.752767 [0x000000811994a0, 0x000000ffeda000)
5578 14:47:56.012458
5579 14:47:56.012893 [0x00000100000000, 0x00000140000000)
5580 14:47:56.144444
5581 14:47:56.147904 Initializing XHCI USB controller at 0x11200000.
5582 14:47:56.170715
5583 14:47:56.174205 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5584 14:47:56.174574
5585 14:47:56.174943
5586 14:47:56.175696 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5588 14:47:56.276794 jacuzzi: tftpboot 192.168.201.1 14167041/tftp-deploy-kb2e5ubw/kernel/image.itb 14167041/tftp-deploy-kb2e5ubw/kernel/cmdline
5589 14:47:56.277308 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5590 14:47:56.277780 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5591 14:47:56.282250 tftpboot 192.168.201.1 14167041/tftp-deploy-kb2e5ubw/kernel/image.itp-deploy-kb2e5ubw/kernel/cmdline
5592 14:47:56.282690
5593 14:47:56.283084 Waiting for link
5594 14:47:56.685017
5595 14:47:56.685496 R8152: Initializing
5596 14:47:56.685899
5597 14:47:56.688103 Version 9 (ocp_data = 6010)
5598 14:47:56.688498
5599 14:47:56.691234 R8152: Done initializing
5600 14:47:56.691627
5601 14:47:56.692019 Adding net device
5602 14:47:57.076876
5603 14:47:57.077478 done.
5604 14:47:57.077958
5605 14:47:57.078423 MAC: 00:e0:4c:78:85:cb
5606 14:47:57.078816
5607 14:47:57.080277 Sending DHCP discover... done.
5608 14:47:57.080781
5609 14:47:57.083433 Waiting for reply... done.
5610 14:47:57.083898
5611 14:47:57.086400 Sending DHCP request... done.
5612 14:47:57.086918
5613 14:47:57.092223 Waiting for reply... done.
5614 14:47:57.092682
5615 14:47:57.093011 My ip is 192.168.201.22
5616 14:47:57.093473
5617 14:47:57.095760 The DHCP server ip is 192.168.201.1
5618 14:47:57.096150
5619 14:47:57.102510 TFTP server IP predefined by user: 192.168.201.1
5620 14:47:57.102909
5621 14:47:57.109040 Bootfile predefined by user: 14167041/tftp-deploy-kb2e5ubw/kernel/image.itb
5622 14:47:57.109426
5623 14:47:57.112214 Sending tftp read request... done.
5624 14:47:57.112502
5625 14:47:57.117336 Waiting for the transfer...
5626 14:47:57.117643
5627 14:47:57.385192 00000000 ################################################################
5628 14:47:57.385341
5629 14:47:57.639186 00080000 ################################################################
5630 14:47:57.639340
5631 14:47:57.894622 00100000 ################################################################
5632 14:47:57.894770
5633 14:47:58.151133 00180000 ################################################################
5634 14:47:58.151292
5635 14:47:58.408444 00200000 ################################################################
5636 14:47:58.408616
5637 14:47:58.665241 00280000 ################################################################
5638 14:47:58.665420
5639 14:47:58.923362 00300000 ################################################################
5640 14:47:58.923554
5641 14:47:59.266536 00380000 ################################################################
5642 14:47:59.266727
5643 14:47:59.604428 00400000 ################################################################
5644 14:47:59.604592
5645 14:47:59.939057 00480000 ################################################################
5646 14:47:59.939217
5647 14:48:00.267204 00500000 ################################################################
5648 14:48:00.267392
5649 14:48:00.527377 00580000 ################################################################
5650 14:48:00.527556
5651 14:48:00.791499 00600000 ################################################################
5652 14:48:00.791674
5653 14:48:01.056956 00680000 ################################################################
5654 14:48:01.057108
5655 14:48:01.322944 00700000 ################################################################
5656 14:48:01.323090
5657 14:48:01.577660 00780000 ################################################################
5658 14:48:01.577852
5659 14:48:01.851682 00800000 ################################################################
5660 14:48:01.851833
5661 14:48:02.121304 00880000 ################################################################
5662 14:48:02.121489
5663 14:48:02.387860 00900000 ################################################################
5664 14:48:02.388012
5665 14:48:02.644965 00980000 ################################################################
5666 14:48:02.645109
5667 14:48:02.898351 00a00000 ################################################################
5668 14:48:02.898512
5669 14:48:03.156188 00a80000 ################################################################
5670 14:48:03.156334
5671 14:48:03.417097 00b00000 ################################################################
5672 14:48:03.417243
5673 14:48:03.677326 00b80000 ################################################################
5674 14:48:03.677491
5675 14:48:03.930428 00c00000 ################################################################
5676 14:48:03.930573
5677 14:48:04.181760 00c80000 ################################################################
5678 14:48:04.181910
5679 14:48:04.438364 00d00000 ################################################################
5680 14:48:04.438541
5681 14:48:04.698220 00d80000 ################################################################
5682 14:48:04.698359
5683 14:48:04.957868 00e00000 ################################################################
5684 14:48:04.958017
5685 14:48:05.218037 00e80000 ################################################################
5686 14:48:05.218185
5687 14:48:05.476567 00f00000 ################################################################
5688 14:48:05.476716
5689 14:48:05.767998 00f80000 ################################################################
5690 14:48:05.768149
5691 14:48:06.038627 01000000 ################################################################
5692 14:48:06.038781
5693 14:48:06.296853 01080000 ################################################################
5694 14:48:06.296999
5695 14:48:06.577192 01100000 ################################################################
5696 14:48:06.577355
5697 14:48:06.859327 01180000 ################################################################
5698 14:48:06.859477
5699 14:48:07.129354 01200000 ################################################################
5700 14:48:07.129532
5701 14:48:07.400081 01280000 ################################################################
5702 14:48:07.400231
5703 14:48:07.660563 01300000 ################################################################
5704 14:48:07.660716
5705 14:48:07.916552 01380000 ################################################################
5706 14:48:07.916701
5707 14:48:08.173935 01400000 ################################################################
5708 14:48:08.174086
5709 14:48:08.432355 01480000 ################################################################
5710 14:48:08.432502
5711 14:48:08.689097 01500000 ################################################################
5712 14:48:08.689280
5713 14:48:08.945532 01580000 ################################################################
5714 14:48:08.945676
5715 14:48:09.203152 01600000 ################################################################
5716 14:48:09.203301
5717 14:48:09.462077 01680000 ################################################################
5718 14:48:09.462227
5719 14:48:09.720511 01700000 ################################################################
5720 14:48:09.720657
5721 14:48:09.979244 01780000 ################################################################
5722 14:48:09.979412
5723 14:48:10.237185 01800000 ################################################################
5724 14:48:10.237341
5725 14:48:10.505821 01880000 ################################################################
5726 14:48:10.505965
5727 14:48:10.773468 01900000 ################################################################
5728 14:48:10.773606
5729 14:48:11.030075 01980000 ################################################################
5730 14:48:11.030225
5731 14:48:11.286240 01a00000 ################################################################
5732 14:48:11.286398
5733 14:48:11.540537 01a80000 ################################################################
5734 14:48:11.540699
5735 14:48:11.794870 01b00000 ################################################################
5736 14:48:11.795022
5737 14:48:12.049382 01b80000 ################################################################
5738 14:48:12.049545
5739 14:48:12.304301 01c00000 ################################################################
5740 14:48:12.304457
5741 14:48:12.560695 01c80000 ################################################################
5742 14:48:12.560866
5743 14:48:12.815483 01d00000 ################################################################
5744 14:48:12.815641
5745 14:48:13.071275 01d80000 ################################################################
5746 14:48:13.071440
5747 14:48:13.256741 01e00000 ################################################ done.
5748 14:48:13.256906
5749 14:48:13.260093 The bootfile was 31846290 bytes long.
5750 14:48:13.260182
5751 14:48:13.263201 Sending tftp read request... done.
5752 14:48:13.263298
5753 14:48:13.266536 Waiting for the transfer...
5754 14:48:13.266635
5755 14:48:13.266727 00000000 # done.
5756 14:48:13.266827
5757 14:48:13.276209 Command line loaded dynamically from TFTP file: 14167041/tftp-deploy-kb2e5ubw/kernel/cmdline
5758 14:48:13.276300
5759 14:48:13.302551 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5760 14:48:13.302669
5761 14:48:13.302766 Loading FIT.
5762 14:48:13.302863
5763 14:48:13.305658 Image ramdisk-1 has 18725926 bytes.
5764 14:48:13.305752
5765 14:48:13.309092 Image fdt-1 has 57695 bytes.
5766 14:48:13.309186
5767 14:48:13.312084 Image kernel-1 has 13060619 bytes.
5768 14:48:13.312170
5769 14:48:13.322088 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5770 14:48:13.322178
5771 14:48:13.332020 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5772 14:48:13.332120
5773 14:48:13.338370 Choosing best match conf-1 for compat google,juniper-sku16.
5774 14:48:13.342083
5775 14:48:13.345995 Connected to device vid:did:rid of 1ae0:0028:00
5776 14:48:13.353315
5777 14:48:13.356571 tpm_get_response: command 0x17b, return code 0x0
5778 14:48:13.356666
5779 14:48:13.359954 tpm_cleanup: add release locality here.
5780 14:48:13.360055
5781 14:48:13.363441 Shutting down all USB controllers.
5782 14:48:13.363564
5783 14:48:13.366431 Removing current net device
5784 14:48:13.366540
5785 14:48:13.369824 Exiting depthcharge with code 4 at timestamp: 34971348
5786 14:48:13.369946
5787 14:48:13.376481 LZMA decompressing kernel-1 to 0x80193568
5788 14:48:13.376614
5789 14:48:13.379761 LZMA decompressing kernel-1 to 0x40000000
5790 14:48:15.237879
5791 14:48:15.238034 jumping to kernel
5792 14:48:15.238774 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5793 14:48:15.238933 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5794 14:48:15.239060 Setting prompt string to ['Linux version [0-9]']
5795 14:48:15.239202 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5796 14:48:15.239339 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5797 14:48:15.313219
5798 14:48:15.316654 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5799 14:48:15.320001 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5800 14:48:15.320117 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5801 14:48:15.320210 Setting prompt string to []
5802 14:48:15.320318 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5803 14:48:15.320427 Using line separator: #'\n'#
5804 14:48:15.320509 No login prompt set.
5805 14:48:15.320602 Parsing kernel messages
5806 14:48:15.320681 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5807 14:48:15.320886 [login-action] Waiting for messages, (timeout 00:04:07)
5808 14:48:15.321004 Waiting using forced prompt support (timeout 00:02:04)
5809 14:48:15.339432 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j216541-arm64-gcc-10-defconfig-arm64-chromebook-f7c97) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024
5810 14:48:15.342685 [ 0.000000] random: crng init done
5811 14:48:15.349241 [ 0.000000] Machine model: Google juniper sku16 board
5812 14:48:15.352613 [ 0.000000] efi: UEFI not found.
5813 14:48:15.359035 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5814 14:48:15.368923 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5815 14:48:15.375270 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5816 14:48:15.378475 [ 0.000000] printk: bootconsole [mtk8250] enabled
5817 14:48:15.387997 [ 0.000000] NUMA: No NUMA configuration found
5818 14:48:15.394697 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5819 14:48:15.400958 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5820 14:48:15.401051 [ 0.000000] Zone ranges:
5821 14:48:15.407631 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5822 14:48:15.410811 [ 0.000000] DMA32 empty
5823 14:48:15.417554 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5824 14:48:15.420976 [ 0.000000] Movable zone start for each node
5825 14:48:15.424413 [ 0.000000] Early memory node ranges
5826 14:48:15.430823 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5827 14:48:15.437257 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5828 14:48:15.443691 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5829 14:48:15.450320 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5830 14:48:15.456570 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5831 14:48:15.463587 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5832 14:48:15.480481 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5833 14:48:15.487067 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5834 14:48:15.493789 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5835 14:48:15.497196 [ 0.000000] psci: probing for conduit method from DT.
5836 14:48:15.503749 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5837 14:48:15.507000 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5838 14:48:15.513656 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5839 14:48:15.517115 [ 0.000000] psci: SMC Calling Convention v1.1
5840 14:48:15.523064 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5841 14:48:15.526685 [ 0.000000] Detected VIPT I-cache on CPU0
5842 14:48:15.532843 [ 0.000000] CPU features: detected: GIC system register CPU interface
5843 14:48:15.539585 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5844 14:48:15.546052 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5845 14:48:15.552733 [ 0.000000] CPU features: detected: ARM erratum 845719
5846 14:48:15.555859 [ 0.000000] alternatives: applying boot alternatives
5847 14:48:15.562568 [ 0.000000] Fallback order for Node 0: 0
5848 14:48:15.569132 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5849 14:48:15.572262 [ 0.000000] Policy zone: Normal
5850 14:48:15.598546 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5851 14:48:15.611776 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5852 14:48:15.618163 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5853 14:48:15.628057 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5854 14:48:15.634765 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5855 14:48:15.637803 <6>[ 0.000000] software IO TLB: area num 8.
5856 14:48:15.663886 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5857 14:48:15.721700 <6>[ 0.000000] Memory: 3896912K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 261552K reserved, 32768K cma-reserved)
5858 14:48:15.728162 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5859 14:48:15.734907 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5860 14:48:15.738041 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5861 14:48:15.744420 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5862 14:48:15.751070 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5863 14:48:15.757567 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5864 14:48:15.764180 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5865 14:48:15.770966 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5866 14:48:15.777292 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5867 14:48:15.787060 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5868 14:48:15.793562 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5869 14:48:15.797045 <6>[ 0.000000] GICv3: 640 SPIs implemented
5870 14:48:15.800408 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5871 14:48:15.806853 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5872 14:48:15.810149 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5873 14:48:15.816783 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5874 14:48:15.829530 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5875 14:48:15.839463 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5876 14:48:15.849260 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5877 14:48:15.858936 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5878 14:48:15.871978 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5879 14:48:15.878349 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5880 14:48:15.885454 <6>[ 0.009468] Console: colour dummy device 80x25
5881 14:48:15.888907 <6>[ 0.014527] printk: console [tty1] enabled
5882 14:48:15.901922 <6>[ 0.018914] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5883 14:48:15.905243 <6>[ 0.029378] pid_max: default: 32768 minimum: 301
5884 14:48:15.911651 <6>[ 0.034260] LSM: Security Framework initializing
5885 14:48:15.918110 <6>[ 0.039174] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5886 14:48:15.924640 <6>[ 0.046797] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5887 14:48:15.931552 <4>[ 0.055670] cacheinfo: Unable to detect cache hierarchy for CPU 0
5888 14:48:15.941689 <6>[ 0.062295] cblist_init_generic: Setting adjustable number of callback queues.
5889 14:48:15.948094 <6>[ 0.069741] cblist_init_generic: Setting shift to 3 and lim to 1.
5890 14:48:15.955014 <6>[ 0.076093] cblist_init_generic: Setting adjustable number of callback queues.
5891 14:48:15.961438 <6>[ 0.083537] cblist_init_generic: Setting shift to 3 and lim to 1.
5892 14:48:15.964575 <6>[ 0.089935] rcu: Hierarchical SRCU implementation.
5893 14:48:15.971082 <6>[ 0.094961] rcu: Max phase no-delay instances is 1000.
5894 14:48:15.978796 <6>[ 0.102885] EFI services will not be available.
5895 14:48:15.982307 <6>[ 0.107835] smp: Bringing up secondary CPUs ...
5896 14:48:15.992926 <6>[ 0.113059] Detected VIPT I-cache on CPU1
5897 14:48:15.999184 <4>[ 0.113105] cacheinfo: Unable to detect cache hierarchy for CPU 1
5898 14:48:16.005840 <6>[ 0.113115] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5899 14:48:16.012335 <6>[ 0.113147] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5900 14:48:16.015443 <6>[ 0.113627] Detected VIPT I-cache on CPU2
5901 14:48:16.022084 <4>[ 0.113659] cacheinfo: Unable to detect cache hierarchy for CPU 2
5902 14:48:16.028878 <6>[ 0.113663] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5903 14:48:16.035252 <6>[ 0.113676] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5904 14:48:16.041813 <6>[ 0.114122] Detected VIPT I-cache on CPU3
5905 14:48:16.048187 <4>[ 0.114153] cacheinfo: Unable to detect cache hierarchy for CPU 3
5906 14:48:16.054891 <6>[ 0.114157] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5907 14:48:16.061227 <6>[ 0.114168] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5908 14:48:16.064680 <6>[ 0.114743] CPU features: detected: Spectre-v2
5909 14:48:16.071034 <6>[ 0.114753] CPU features: detected: Spectre-BHB
5910 14:48:16.074302 <6>[ 0.114757] CPU features: detected: ARM erratum 858921
5911 14:48:16.080934 <6>[ 0.114762] Detected VIPT I-cache on CPU4
5912 14:48:16.087642 <4>[ 0.114810] cacheinfo: Unable to detect cache hierarchy for CPU 4
5913 14:48:16.094053 <6>[ 0.114818] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5914 14:48:16.100453 <6>[ 0.114826] arch_timer: Enabling local workaround for ARM erratum 858921
5915 14:48:16.107040 <6>[ 0.114837] arch_timer: CPU4: Trapping CNTVCT access
5916 14:48:16.113375 <6>[ 0.114844] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5917 14:48:16.116902 <6>[ 0.115330] Detected VIPT I-cache on CPU5
5918 14:48:16.123804 <4>[ 0.115372] cacheinfo: Unable to detect cache hierarchy for CPU 5
5919 14:48:16.129964 <6>[ 0.115377] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5920 14:48:16.136634 <6>[ 0.115384] arch_timer: Enabling local workaround for ARM erratum 858921
5921 14:48:16.143469 <6>[ 0.115390] arch_timer: CPU5: Trapping CNTVCT access
5922 14:48:16.149491 <6>[ 0.115395] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5923 14:48:16.152539 <6>[ 0.115930] Detected VIPT I-cache on CPU6
5924 14:48:16.159277 <4>[ 0.115977] cacheinfo: Unable to detect cache hierarchy for CPU 6
5925 14:48:16.165826 <6>[ 0.115983] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5926 14:48:16.172551 <6>[ 0.115990] arch_timer: Enabling local workaround for ARM erratum 858921
5927 14:48:16.179111 <6>[ 0.115997] arch_timer: CPU6: Trapping CNTVCT access
5928 14:48:16.185435 <6>[ 0.116002] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5929 14:48:16.188815 <6>[ 0.116530] Detected VIPT I-cache on CPU7
5930 14:48:16.195369 <4>[ 0.116573] cacheinfo: Unable to detect cache hierarchy for CPU 7
5931 14:48:16.201995 <6>[ 0.116579] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5932 14:48:16.211773 <6>[ 0.116586] arch_timer: Enabling local workaround for ARM erratum 858921
5933 14:48:16.214998 <6>[ 0.116592] arch_timer: CPU7: Trapping CNTVCT access
5934 14:48:16.221348 <6>[ 0.116598] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5935 14:48:16.227853 <6>[ 0.116658] smp: Brought up 1 node, 8 CPUs
5936 14:48:16.231377 <6>[ 0.355534] SMP: Total of 8 processors activated.
5937 14:48:16.237711 <6>[ 0.360471] CPU features: detected: 32-bit EL0 Support
5938 14:48:16.241181 <6>[ 0.365842] CPU features: detected: 32-bit EL1 Support
5939 14:48:16.247463 <6>[ 0.371208] CPU features: detected: CRC32 instructions
5940 14:48:16.251083 <6>[ 0.376635] CPU: All CPU(s) started at EL2
5941 14:48:16.257175 <6>[ 0.380973] alternatives: applying system-wide alternatives
5942 14:48:16.264912 <6>[ 0.389004] devtmpfs: initialized
5943 14:48:16.280715 <6>[ 0.397978] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5944 14:48:16.287151 <6>[ 0.407928] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5945 14:48:16.293594 <6>[ 0.415654] pinctrl core: initialized pinctrl subsystem
5946 14:48:16.296654 <6>[ 0.422751] DMI not present or invalid.
5947 14:48:16.303404 <6>[ 0.427121] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5948 14:48:16.313803 <6>[ 0.434024] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5949 14:48:16.320351 <6>[ 0.441551] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5950 14:48:16.329928 <6>[ 0.449800] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5951 14:48:16.336417 <6>[ 0.457978] audit: initializing netlink subsys (disabled)
5952 14:48:16.343052 <5>[ 0.463683] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5953 14:48:16.349555 <6>[ 0.464646] thermal_sys: Registered thermal governor 'step_wise'
5954 14:48:16.355850 <6>[ 0.471648] thermal_sys: Registered thermal governor 'power_allocator'
5955 14:48:16.359344 <6>[ 0.477947] cpuidle: using governor menu
5956 14:48:16.366029 <6>[ 0.488908] NET: Registered PF_QIPCRTR protocol family
5957 14:48:16.372423 <6>[ 0.494403] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5958 14:48:16.378932 <6>[ 0.501500] ASID allocator initialised with 32768 entries
5959 14:48:16.385334 <6>[ 0.508266] Serial: AMBA PL011 UART driver
5960 14:48:16.395042 <4>[ 0.518665] Trying to register duplicate clock ID: 113
5961 14:48:16.454569 <6>[ 0.575097] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5962 14:48:16.468492 <6>[ 0.589427] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5963 14:48:16.471686 <6>[ 0.599169] KASLR enabled
5964 14:48:16.486545 <6>[ 0.607190] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5965 14:48:16.492755 <6>[ 0.614192] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5966 14:48:16.499339 <6>[ 0.620669] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5967 14:48:16.506236 <6>[ 0.627659] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5968 14:48:16.512616 <6>[ 0.634133] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5969 14:48:16.519460 <6>[ 0.641123] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5970 14:48:16.525598 <6>[ 0.647596] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5971 14:48:16.532325 <6>[ 0.654586] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5972 14:48:16.538845 <6>[ 0.662150] ACPI: Interpreter disabled.
5973 14:48:16.546322 <6>[ 0.670114] iommu: Default domain type: Translated
5974 14:48:16.552843 <6>[ 0.675220] iommu: DMA domain TLB invalidation policy: strict mode
5975 14:48:16.555987 <5>[ 0.681851] SCSI subsystem initialized
5976 14:48:16.562404 <6>[ 0.686263] usbcore: registered new interface driver usbfs
5977 14:48:16.568924 <6>[ 0.691990] usbcore: registered new interface driver hub
5978 14:48:16.572515 <6>[ 0.697532] usbcore: registered new device driver usb
5979 14:48:16.580032 <6>[ 0.703827] pps_core: LinuxPPS API ver. 1 registered
5980 14:48:16.589843 <6>[ 0.709012] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5981 14:48:16.593037 <6>[ 0.718337] PTP clock support registered
5982 14:48:16.596045 <6>[ 0.722589] EDAC MC: Ver: 3.0.0
5983 14:48:16.604126 <6>[ 0.728218] FPGA manager framework
5984 14:48:16.610622 <6>[ 0.731905] Advanced Linux Sound Architecture Driver Initialized.
5985 14:48:16.613831 <6>[ 0.738651] vgaarb: loaded
5986 14:48:16.620311 <6>[ 0.741779] clocksource: Switched to clocksource arch_sys_counter
5987 14:48:16.623593 <5>[ 0.748210] VFS: Disk quotas dquot_6.6.0
5988 14:48:16.629853 <6>[ 0.752384] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5989 14:48:16.633316 <6>[ 0.759558] pnp: PnP ACPI: disabled
5990 14:48:16.642539 <6>[ 0.766396] NET: Registered PF_INET protocol family
5991 14:48:16.648732 <6>[ 0.771627] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5992 14:48:16.660796 <6>[ 0.781537] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5993 14:48:16.670580 <6>[ 0.790291] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5994 14:48:16.677107 <6>[ 0.798241] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5995 14:48:16.683596 <6>[ 0.806475] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5996 14:48:16.693901 <6>[ 0.814569] TCP: Hash tables configured (established 32768 bind 32768)
5997 14:48:16.700248 <6>[ 0.821395] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5998 14:48:16.706798 <6>[ 0.828368] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5999 14:48:16.713617 <6>[ 0.835851] NET: Registered PF_UNIX/PF_LOCAL protocol family
6000 14:48:16.720054 <6>[ 0.841944] RPC: Registered named UNIX socket transport module.
6001 14:48:16.723298 <6>[ 0.848088] RPC: Registered udp transport module.
6002 14:48:16.730014 <6>[ 0.853012] RPC: Registered tcp transport module.
6003 14:48:16.736459 <6>[ 0.857935] RPC: Registered tcp NFSv4.1 backchannel transport module.
6004 14:48:16.739783 <6>[ 0.864588] PCI: CLS 0 bytes, default 64
6005 14:48:16.742742 <6>[ 0.868841] Unpacking initramfs...
6006 14:48:16.752525 <6>[ 0.872891] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6007 14:48:16.762545 <6>[ 0.881591] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6008 14:48:16.765877 <6>[ 0.890489] kvm [1]: IPA Size Limit: 40 bits
6009 14:48:16.772875 <6>[ 0.896812] kvm [1]: vgic-v2@c420000
6010 14:48:16.779240 <6>[ 0.900635] kvm [1]: GIC system register CPU interface enabled
6011 14:48:16.782804 <6>[ 0.906812] kvm [1]: vgic interrupt IRQ18
6012 14:48:16.789264 <6>[ 0.911179] kvm [1]: Hyp mode initialized successfully
6013 14:48:16.792182 <5>[ 0.917465] Initialise system trusted keyrings
6014 14:48:16.798948 <6>[ 0.922234] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6015 14:48:16.808200 <6>[ 0.932197] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6016 14:48:16.814555 <5>[ 0.938612] NFS: Registering the id_resolver key type
6017 14:48:16.818110 <5>[ 0.943916] Key type id_resolver registered
6018 14:48:16.824508 <5>[ 0.948327] Key type id_legacy registered
6019 14:48:16.831364 <6>[ 0.952622] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6020 14:48:16.837607 <6>[ 0.959535] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6021 14:48:16.844184 <6>[ 0.967262] 9p: Installing v9fs 9p2000 file system support
6022 14:48:16.871937 <5>[ 0.996121] Key type asymmetric registered
6023 14:48:16.875479 <5>[ 1.000456] Asymmetric key parser 'x509' registered
6024 14:48:16.885277 <6>[ 1.005603] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6025 14:48:16.888372 <6>[ 1.013209] io scheduler mq-deadline registered
6026 14:48:16.891586 <6>[ 1.017964] io scheduler kyber registered
6027 14:48:16.914741 <6>[ 1.038635] EINJ: ACPI disabled.
6028 14:48:16.921124 <4>[ 1.042392] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6029 14:48:16.958985 <6>[ 1.082842] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6030 14:48:16.967438 <6>[ 1.091320] printk: console [ttyS0] disabled
6031 14:48:16.995251 <6>[ 1.115963] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6032 14:48:17.001710 <6>[ 1.125431] printk: console [ttyS0] enabled
6033 14:48:17.005105 <6>[ 1.125431] printk: console [ttyS0] enabled
6034 14:48:17.011625 <6>[ 1.134356] printk: bootconsole [mtk8250] disabled
6035 14:48:17.014653 <6>[ 1.134356] printk: bootconsole [mtk8250] disabled
6036 14:48:17.024423 <3>[ 1.144885] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6037 14:48:17.030865 <3>[ 1.153261] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6038 14:48:17.061103 <6>[ 1.181647] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6039 14:48:17.067225 <6>[ 1.191294] serial serial0: tty port ttyS1 registered
6040 14:48:17.073972 <6>[ 1.197872] SuperH (H)SCI(F) driver initialized
6041 14:48:17.077190 <6>[ 1.203362] msm_serial: driver initialized
6042 14:48:17.092856 <6>[ 1.213654] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6043 14:48:17.102455 <6>[ 1.222250] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6044 14:48:17.109242 <6>[ 1.230826] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6045 14:48:17.118853 <6>[ 1.239393] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6046 14:48:17.128804 <6>[ 1.248049] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6047 14:48:17.135429 <6>[ 1.256713] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6048 14:48:17.145091 <6>[ 1.265453] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6049 14:48:17.155035 <6>[ 1.274191] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6050 14:48:17.161289 <6>[ 1.282756] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6051 14:48:17.171019 <6>[ 1.291554] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6052 14:48:17.180042 <4>[ 1.303928] cacheinfo: Unable to detect cache hierarchy for CPU 0
6053 14:48:17.188826 <6>[ 1.313202] loop: module loaded
6054 14:48:17.200752 <6>[ 1.325088] vsim1: Bringing 1800000uV into 2700000-2700000uV
6055 14:48:17.218954 <6>[ 1.343032] megasas: 07.719.03.00-rc1
6056 14:48:17.227734 <6>[ 1.351696] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6057 14:48:17.240423 <6>[ 1.361157] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6058 14:48:17.253616 <6>[ 1.377752] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6059 14:48:17.313776 <6>[ 1.431162] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6060 14:48:17.370190 <6>[ 1.494145] Freeing initrd memory: 18284K
6061 14:48:17.385328 <4>[ 1.505942] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6062 14:48:17.391896 <4>[ 1.515170] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
6063 14:48:17.398331 <4>[ 1.521869] Hardware name: Google juniper sku16 board (DT)
6064 14:48:17.401570 <4>[ 1.527608] Call trace:
6065 14:48:17.404803 <4>[ 1.530308] dump_backtrace.part.0+0xe0/0xf0
6066 14:48:17.408239 <4>[ 1.534844] show_stack+0x18/0x30
6067 14:48:17.415123 <4>[ 1.538416] dump_stack_lvl+0x68/0x84
6068 14:48:17.418550 <4>[ 1.542337] dump_stack+0x18/0x34
6069 14:48:17.421725 <4>[ 1.545907] sysfs_warn_dup+0x64/0x80
6070 14:48:17.425191 <4>[ 1.549829] sysfs_do_create_link_sd+0xf0/0x100
6071 14:48:17.431715 <4>[ 1.554616] sysfs_create_link+0x20/0x40
6072 14:48:17.434737 <4>[ 1.558796] bus_add_device+0x68/0x10c
6073 14:48:17.437959 <4>[ 1.562802] device_add+0x340/0x7ac
6074 14:48:17.441422 <4>[ 1.566545] of_device_add+0x44/0x60
6075 14:48:17.447783 <4>[ 1.570379] of_platform_device_create_pdata+0x90/0x120
6076 14:48:17.451301 <4>[ 1.575861] of_platform_bus_create+0x170/0x370
6077 14:48:17.457981 <4>[ 1.580647] of_platform_populate+0x50/0xfc
6078 14:48:17.461392 <4>[ 1.585087] parse_mtd_partitions+0x1dc/0x510
6079 14:48:17.467758 <4>[ 1.589700] mtd_device_parse_register+0xf8/0x2e0
6080 14:48:17.470798 <4>[ 1.594658] spi_nor_probe+0x21c/0x2f0
6081 14:48:17.474084 <4>[ 1.598665] spi_mem_probe+0x6c/0xb0
6082 14:48:17.477462 <4>[ 1.602498] spi_probe+0x84/0xe4
6083 14:48:17.480870 <4>[ 1.605980] really_probe+0xbc/0x2e0
6084 14:48:17.487826 <4>[ 1.609810] __driver_probe_device+0x78/0x11c
6085 14:48:17.490633 <4>[ 1.614422] driver_probe_device+0xd8/0x160
6086 14:48:17.494017 <4>[ 1.618859] __device_attach_driver+0xb8/0x134
6087 14:48:17.500493 <4>[ 1.623558] bus_for_each_drv+0x78/0xd0
6088 14:48:17.503742 <4>[ 1.627648] __device_attach+0xa8/0x1c0
6089 14:48:17.506837 <4>[ 1.631738] device_initial_probe+0x14/0x20
6090 14:48:17.510015 <4>[ 1.636177] bus_probe_device+0x9c/0xa4
6091 14:48:17.516760 <4>[ 1.640267] device_add+0x3ac/0x7ac
6092 14:48:17.520022 <4>[ 1.644009] __spi_add_device+0x78/0x120
6093 14:48:17.523212 <4>[ 1.648187] spi_add_device+0x40/0x7c
6094 14:48:17.530054 <4>[ 1.652104] spi_register_controller+0x610/0xad0
6095 14:48:17.533114 <4>[ 1.656977] devm_spi_register_controller+0x4c/0xa4
6096 14:48:17.536482 <4>[ 1.662110] mtk_spi_probe+0x3f8/0x650
6097 14:48:17.543312 <4>[ 1.666114] platform_probe+0x68/0xe0
6098 14:48:17.546319 <4>[ 1.670033] really_probe+0xbc/0x2e0
6099 14:48:17.549725 <4>[ 1.673863] __driver_probe_device+0x78/0x11c
6100 14:48:17.552952 <4>[ 1.678475] driver_probe_device+0xd8/0x160
6101 14:48:17.559424 <4>[ 1.682912] __driver_attach+0x94/0x19c
6102 14:48:17.562767 <4>[ 1.687003] bus_for_each_dev+0x70/0xd0
6103 14:48:17.566009 <4>[ 1.691092] driver_attach+0x24/0x30
6104 14:48:17.569174 <4>[ 1.694922] bus_add_driver+0x154/0x20c
6105 14:48:17.575733 <4>[ 1.699012] driver_register+0x78/0x130
6106 14:48:17.579096 <4>[ 1.703103] __platform_driver_register+0x28/0x34
6107 14:48:17.582155 <4>[ 1.708062] mtk_spi_driver_init+0x1c/0x28
6108 14:48:17.588865 <4>[ 1.712416] do_one_initcall+0x50/0x1d0
6109 14:48:17.592279 <4>[ 1.716506] kernel_init_freeable+0x21c/0x288
6110 14:48:17.595391 <4>[ 1.721119] kernel_init+0x24/0x12c
6111 14:48:17.598755 <4>[ 1.724864] ret_from_fork+0x10/0x20
6112 14:48:17.610353 <6>[ 1.733786] tun: Universal TUN/TAP device driver, 1.6
6113 14:48:17.613354 <6>[ 1.740067] thunder_xcv, ver 1.0
6114 14:48:17.619987 <6>[ 1.743586] thunder_bgx, ver 1.0
6115 14:48:17.620412 <6>[ 1.747090] nicpf, ver 1.0
6116 14:48:17.631309 <6>[ 1.751445] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6117 14:48:17.634290 <6>[ 1.758930] hns3: Copyright (c) 2017 Huawei Corporation.
6118 14:48:17.640982 <6>[ 1.764527] hclge is initializing
6119 14:48:17.644251 <6>[ 1.768112] e1000: Intel(R) PRO/1000 Network Driver
6120 14:48:17.650687 <6>[ 1.773246] e1000: Copyright (c) 1999-2006 Intel Corporation.
6121 14:48:17.657562 <6>[ 1.779269] e1000e: Intel(R) PRO/1000 Network Driver
6122 14:48:17.660518 <6>[ 1.784490] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6123 14:48:17.667181 <6>[ 1.790683] igb: Intel(R) Gigabit Ethernet Network Driver
6124 14:48:17.673919 <6>[ 1.796338] igb: Copyright (c) 2007-2014 Intel Corporation.
6125 14:48:17.680389 <6>[ 1.802181] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6126 14:48:17.687081 <6>[ 1.808704] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6127 14:48:17.689955 <6>[ 1.815256] sky2: driver version 1.30
6128 14:48:17.696853 <6>[ 1.820493] usbcore: registered new device driver r8152-cfgselector
6129 14:48:17.703381 <6>[ 1.827035] usbcore: registered new interface driver r8152
6130 14:48:17.709895 <6>[ 1.832860] VFIO - User Level meta-driver version: 0.3
6131 14:48:17.717187 <6>[ 1.840616] mtu3 11201000.usb: uwk - reg:0x420, version:101
6132 14:48:17.723581 <4>[ 1.846489] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6133 14:48:17.730039 <6>[ 1.853780] mtu3 11201000.usb: dr_mode: 1, drd: auto
6134 14:48:17.736758 <6>[ 1.859007] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6135 14:48:17.740152 <6>[ 1.865196] mtu3 11201000.usb: usb3-drd: 0
6136 14:48:17.750517 <6>[ 1.870741] mtu3 11201000.usb: xHCI platform device register success...
6137 14:48:17.756909 <4>[ 1.879343] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6138 14:48:17.763772 <6>[ 1.887284] xhci-mtk 11200000.usb: xHCI Host Controller
6139 14:48:17.773513 <6>[ 1.892797] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6140 14:48:17.776906 <6>[ 1.900540] xhci-mtk 11200000.usb: USB3 root hub has no ports
6141 14:48:17.786555 <6>[ 1.906550] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6142 14:48:17.793071 <6>[ 1.915975] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6143 14:48:17.799626 <6>[ 1.922047] xhci-mtk 11200000.usb: xHCI Host Controller
6144 14:48:17.806416 <6>[ 1.927536] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6145 14:48:17.812583 <6>[ 1.935193] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6146 14:48:17.816126 <6>[ 1.942018] hub 1-0:1.0: USB hub found
6147 14:48:17.822579 <6>[ 1.946046] hub 1-0:1.0: 1 port detected
6148 14:48:17.832241 <6>[ 1.951383] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6149 14:48:17.835638 <6>[ 1.959999] hub 2-0:1.0: USB hub found
6150 14:48:17.842231 <3>[ 1.964026] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6151 14:48:17.848764 <6>[ 1.971902] usbcore: registered new interface driver usb-storage
6152 14:48:17.855454 <6>[ 1.978511] usbcore: registered new device driver onboard-usb-hub
6153 14:48:17.873368 <4>[ 1.993894] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6154 14:48:17.882851 <6>[ 2.006154] mt6397-rtc mt6358-rtc: registered as rtc0
6155 14:48:17.892394 <6>[ 2.011636] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-04T14:48:17 UTC (1717512497)
6156 14:48:17.899142 <6>[ 2.021511] i2c_dev: i2c /dev entries driver
6157 14:48:17.908842 <6>[ 2.027960] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6158 14:48:17.915477 <6>[ 2.036298] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6159 14:48:17.922055 <6>[ 2.045202] i2c 4-0058: Fixed dependency cycle(s) with /panel
6160 14:48:17.928419 <6>[ 2.051235] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6161 14:48:17.938306 <3>[ 2.058697] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6162 14:48:17.955299 <6>[ 2.075715] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6163 14:48:17.963831 <6>[ 2.087186] cpu cpu0: EM: created perf domain
6164 14:48:17.977015 <6>[ 2.092672] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6165 14:48:17.979836 <6>[ 2.103960] cpu cpu4: EM: created perf domain
6166 14:48:17.987247 <6>[ 2.110647] sdhci: Secure Digital Host Controller Interface driver
6167 14:48:17.993728 <6>[ 2.117103] sdhci: Copyright(c) Pierre Ossman
6168 14:48:18.000189 <6>[ 2.122508] Synopsys Designware Multimedia Card Interface Driver
6169 14:48:18.006875 <6>[ 2.123053] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6170 14:48:18.013370 <6>[ 2.129567] sdhci-pltfm: SDHCI platform and OF driver helper
6171 14:48:18.019878 <6>[ 2.142999] ledtrig-cpu: registered to indicate activity on CPUs
6172 14:48:18.027420 <6>[ 2.150739] usbcore: registered new interface driver usbhid
6173 14:48:18.033586 <6>[ 2.156579] usbhid: USB HID core driver
6174 14:48:18.040926 <6>[ 2.160846] spi_master spi2: will run message pump with realtime priority
6175 14:48:18.047985 <4>[ 2.160849] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6176 14:48:18.054424 <4>[ 2.175106] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6177 14:48:18.067578 <6>[ 2.180091] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6178 14:48:18.084072 <6>[ 2.197552] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6179 14:48:18.090550 <4>[ 2.208904] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6180 14:48:18.093945 <6>[ 2.212354] cros-ec-spi spi2.0: Chrome EC device registered
6181 14:48:18.107976 <4>[ 2.228429] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6182 14:48:18.120084 <4>[ 2.240483] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6183 14:48:18.126886 <6>[ 2.244737] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6184 14:48:18.133259 <4>[ 2.249591] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6185 14:48:18.136471 <6>[ 2.256120] mmc0: new HS400 MMC card at address 0001
6186 14:48:18.143190 <6>[ 2.266631] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6187 14:48:18.149575 <6>[ 2.268822] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6188 14:48:18.159720 <6>[ 2.283430] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6189 14:48:18.169851 <6>[ 2.286883] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6190 14:48:18.176221 <6>[ 2.292760] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6191 14:48:18.185964 <6>[ 2.301765] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6192 14:48:18.189578 <6>[ 2.304566] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6193 14:48:18.196180 <6>[ 2.315278] NET: Registered PF_PACKET protocol family
6194 14:48:18.202487 <6>[ 2.320392] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6195 14:48:18.206057 <6>[ 2.324706] 9pnet: Installing 9P2000 support
6196 14:48:18.219031 <6>[ 2.329934] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6197 14:48:18.228751 <6>[ 2.330060] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6198 14:48:18.232112 <5>[ 2.357731] Key type dns_resolver registered
6199 14:48:18.239024 <6>[ 2.362679] registered taskstats version 1
6200 14:48:18.242165 <5>[ 2.367049] Loading compiled-in X.509 certificates
6201 14:48:18.257488 <6>[ 2.377791] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6202 14:48:18.284515 <3>[ 2.404969] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6203 14:48:18.316348 <4>[ 2.433603] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6204 14:48:18.326016 <6>[ 2.444212] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6205 14:48:18.340123 <6>[ 2.456978] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6206 14:48:18.352560 <3>[ 2.468193] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6207 14:48:18.366540 <3>[ 2.483787] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6208 14:48:18.372969 <3>[ 2.496210] debugfs: File 'Playback' in directory 'dapm' already present!
6209 14:48:18.382671 <3>[ 2.503261] debugfs: File 'Capture' in directory 'dapm' already present!
6210 14:48:18.396393 <6>[ 2.513149] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6211 14:48:18.405937 <6>[ 2.526428] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6212 14:48:18.409326 <6>[ 2.532217] hub 1-1:1.0: USB hub found
6213 14:48:18.419246 <6>[ 2.534961] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6214 14:48:18.422575 <6>[ 2.539335] hub 1-1:1.0: 3 ports detected
6215 14:48:18.432103 <6>[ 2.547467] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6216 14:48:18.438735 <6>[ 2.560260] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6217 14:48:18.448358 <6>[ 2.568780] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6218 14:48:18.458215 <6>[ 2.577299] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6219 14:48:18.464674 <6>[ 2.585820] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6220 14:48:18.471568 <6>[ 2.594980] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6221 14:48:18.478756 <6>[ 2.602451] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6222 14:48:18.486229 <6>[ 2.609746] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6223 14:48:18.496687 <6>[ 2.617000] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6224 14:48:18.503388 <6>[ 2.624411] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6225 14:48:18.509611 <6>[ 2.632681] panfrost 13040000.gpu: clock rate = 511999970
6226 14:48:18.519736 <6>[ 2.638384] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6227 14:48:18.529225 <6>[ 2.648628] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6228 14:48:18.535926 <6>[ 2.656639] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6229 14:48:18.548627 <6>[ 2.665071] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6230 14:48:18.555459 <6>[ 2.677149] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6231 14:48:18.568074 <6>[ 2.688490] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6232 14:48:18.577773 <6>[ 2.697262] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6233 14:48:18.587607 <6>[ 2.706412] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6234 14:48:18.597340 <6>[ 2.715544] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6235 14:48:18.604337 <6>[ 2.724671] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6236 14:48:18.613821 <6>[ 2.733971] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6237 14:48:18.623652 <6>[ 2.743272] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6238 14:48:18.633783 <6>[ 2.752748] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6239 14:48:18.643530 <6>[ 2.762221] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6240 14:48:18.653004 <6>[ 2.771348] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6241 14:48:18.725206 <6>[ 2.845419] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6242 14:48:18.735237 <6>[ 2.854369] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6243 14:48:18.745418 <6>[ 2.865874] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6244 14:48:18.761607 <6>[ 2.881806] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6245 14:48:19.454494 <6>[ 3.070100] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6246 14:48:19.464353 <4>[ 3.173549] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6247 14:48:19.470699 <4>[ 3.173568] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6248 14:48:19.477346 <6>[ 3.211169] r8152 1-1.2:1.0 eth0: v1.12.13
6249 14:48:19.483959 <6>[ 3.289811] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6250 14:48:19.490155 <6>[ 3.558214] Console: switching to colour frame buffer device 170x48
6251 14:48:19.500734 <6>[ 3.618864] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6252 14:48:19.514907 <6>[ 3.634919] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6253 14:48:19.521137 <6>[ 3.643198] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6254 14:48:20.911090 <6>[ 5.034714] r8152 1-1.2:1.0 eth0: carrier on
6255 14:48:23.454869 <5>[ 5.057816] Sending DHCP requests .., OK
6256 14:48:23.461377 <6>[ 7.582263] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6257 14:48:23.464550 <6>[ 7.590703] IP-Config: Complete:
6258 14:48:23.477380 <6>[ 7.594271] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6259 14:48:23.487218 <6>[ 7.605170] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6260 14:48:23.493658 <6>[ 7.614653] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6261 14:48:23.496994 <6>[ 7.614663] nameserver0=192.168.201.1
6262 14:48:23.503845 <6>[ 7.626989] clk: Disabling unused clocks
6263 14:48:23.506802 <6>[ 7.632080] ALSA device list:
6264 14:48:23.515279 <6>[ 7.638685] #0: mt8183_mt6358_ts3a227_max98357
6265 14:48:23.527120 <6>[ 7.650201] Freeing unused kernel memory: 8512K
6266 14:48:23.534378 <6>[ 7.657798] Run /init as init process
6267 14:48:23.547212 Loading, please wait...
6268 14:48:23.578055 Starting systemd-udevd version 252.22-1~deb12u1
6269 14:48:23.908147 <3>[ 8.030944] thermal_sys: Failed to find 'trips' node
6270 14:48:23.917603 <3>[ 8.037221] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6271 14:48:23.927446 <3>[ 8.045030] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6272 14:48:23.937065 <3>[ 8.045559] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6273 14:48:23.943402 <3>[ 8.055489] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6274 14:48:23.950039 <4>[ 8.064055] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6275 14:48:23.959615 <3>[ 8.070590] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6276 14:48:23.969488 <5>[ 8.082615] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6277 14:48:23.976307 <3>[ 8.089086] elan_i2c 2-0015: Error applying setting, reverse things back
6278 14:48:23.979922 <3>[ 8.090586] thermal_sys: Failed to find 'trips' node
6279 14:48:23.986108 <6>[ 8.097741] mc: Linux media interface: v0.10
6280 14:48:23.993018 <4>[ 8.102659] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6281 14:48:24.002453 <3>[ 8.103015] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6282 14:48:24.012514 <3>[ 8.103033] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6283 14:48:24.018809 <3>[ 8.103041] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6284 14:48:24.025480 <4>[ 8.104065] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6285 14:48:24.035430 <3>[ 8.104131] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6286 14:48:24.041912 <3>[ 8.104140] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6287 14:48:24.048225 <4>[ 8.104145] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6288 14:48:24.058818 <5>[ 8.108614] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6289 14:48:24.065423 <3>[ 8.115622] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6290 14:48:24.075320 <5>[ 8.122527] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6291 14:48:24.085276 <3>[ 8.130650] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6292 14:48:24.095434 <4>[ 8.139169] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6293 14:48:24.101655 <6>[ 8.144044] videodev: Linux video capture interface: v2.00
6294 14:48:24.111400 <3>[ 8.147635] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6295 14:48:24.118122 <6>[ 8.148188] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6296 14:48:24.124798 <6>[ 8.154952] cfg80211: failed to load regulatory.db
6297 14:48:24.131009 <6>[ 8.159907] cs_system_cfg: CoreSight Configuration manager initialised
6298 14:48:24.141233 <3>[ 8.162290] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6299 14:48:24.150530 <3>[ 8.162301] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6300 14:48:24.160732 <3>[ 8.162344] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6301 14:48:24.169944 <6>[ 8.239152] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6302 14:48:24.192807 <6>[ 8.312898] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6303 14:48:24.207163 <6>[ 8.327174] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6304 14:48:24.218245 <6>[ 8.338188] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6305 14:48:24.226503 <6>[ 8.350029] Bluetooth: Core ver 2.22
6306 14:48:24.233224 <6>[ 8.350072] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6307 14:48:24.239679 <6>[ 8.353956] NET: Registered PF_BLUETOOTH protocol family
6308 14:48:24.256304 <6>[ 8.376192] Bluetooth: HCI device and connection manager initialized
6309 14:48:24.265942 <6>[ 8.383954] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6310 14:48:24.269335 <6>[ 8.385181] Bluetooth: HCI socket layer initialized
6311 14:48:24.276461 <3>[ 8.385714] mtk-scp 10500000.scp: invalid resource
6312 14:48:24.283400 <6>[ 8.385814] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6313 14:48:24.289930 <6>[ 8.386755] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6314 14:48:24.299329 <6>[ 8.387234] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6315 14:48:24.306115 <6>[ 8.388008] remoteproc remoteproc0: scp is available
6316 14:48:24.312585 <4>[ 8.388126] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6317 14:48:24.319805 <6>[ 8.388138] remoteproc remoteproc0: powering up scp
6318 14:48:24.329132 <4>[ 8.388169] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6319 14:48:24.335179 <3>[ 8.388176] remoteproc remoteproc0: request_firmware failed: -2
6320 14:48:24.341964 <6>[ 8.390782] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6321 14:48:24.348466 <6>[ 8.399558] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6322 14:48:24.354890 <6>[ 8.399971] Bluetooth: L2CAP socket layer initialized
6323 14:48:24.361465 <6>[ 8.403362] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6324 14:48:24.368116 <6>[ 8.404414] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6325 14:48:24.378236 <6>[ 8.405522] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6326 14:48:24.381354 <6>[ 8.412647] Bluetooth: SCO socket layer initialized
6327 14:48:24.394969 <6>[ 8.415794] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6328 14:48:24.402192 <6>[ 8.416363] usbcore: registered new interface driver uvcvideo
6329 14:48:24.408827 <6>[ 8.418863] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6330 14:48:24.418900 <6>[ 8.454658] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6331 14:48:24.425589 <6>[ 8.457445] Bluetooth: HCI UART driver ver 2.3
6332 14:48:24.431946 <6>[ 8.463543] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6333 14:48:24.438838 <6>[ 8.469715] Bluetooth: HCI UART protocol H4 registered
6334 14:48:24.445189 <6>[ 8.469766] Bluetooth: HCI UART protocol LL registered
6335 14:48:24.455068 <6>[ 8.478104] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6336 14:48:24.461451 <6>[ 8.482966] Bluetooth: HCI UART protocol Three-wire (H5) registered
6337 14:48:24.471639 <4>[ 8.524086] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6338 14:48:24.478320 <4>[ 8.524086] Fallback method does not support PEC.
6339 14:48:24.484879 <6>[ 8.524447] Bluetooth: HCI UART protocol Broadcom registered
6340 14:48:24.491169 <3>[ 8.532536] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6341 14:48:24.498044 <6>[ 8.538044] Bluetooth: HCI UART protocol QCA registered
6342 14:48:24.504588 <6>[ 8.539154] Bluetooth: hci0: setting up ROME/QCA6390
6343 14:48:24.514638 <3>[ 8.553894] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6344 14:48:24.517608 <6>[ 8.561740] Bluetooth: HCI UART protocol Marvell registered
6345 14:48:24.524017 Begin: Loading essential drivers ... done.
6346 14:48:24.530878 Begi<6>[ 8.638127] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6347 14:48:24.533860 n: Running /scripts/init-premount ... done.
6348 14:48:24.540717 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6349 14:48:24.550505 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6350 14:48:24.554013 Device /sys/class/net/eth0 found
6351 14:48:24.554172 done.
6352 14:48:24.563230 Begin: Waiting up to 180 secs for any network device to become available ... done.
6353 14:48:24.614415 IP-Config: eth0 hardware address 00:e0:4c:78:85:cb mtu 1500 DHCP
6354 14:48:24.622352 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6355 14:48:24.628798 address: 192.168.201.22 broadcast: 192.168.201.255 netmask: 255.255.255.0
6356 14:48:24.641903 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0 <3>[ 8.762666] Bluetooth: hci0: Frame reassembly failed (-84)
6357 14:48:24.642096
6358 14:48:24.648512 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-2
6359 14:48:24.654920 domain : lava-rack
6360 14:48:24.657950 rootserver: 192.168.201.1 rootpath:
6361 14:48:24.658191 filename :
6362 14:48:24.790439 done.
6363 14:48:24.797379 Begin: Running /scripts/nfs-bottom ... done.
6364 14:48:24.816293 Begin: Running /scripts/init-bottom ... done.
6365 14:48:24.907675 <6>[ 9.030968] Bluetooth: hci0: QCA Product ID :0x00000008
6366 14:48:24.915408 <6>[ 9.038943] Bluetooth: hci0: QCA SOC Version :0x00000044
6367 14:48:24.923145 <6>[ 9.046650] Bluetooth: hci0: QCA ROM Version :0x00000302
6368 14:48:24.930545 <6>[ 9.054134] Bluetooth: hci0: QCA Patch Version:0x00000111
6369 14:48:24.939251 <6>[ 9.062847] Bluetooth: hci0: QCA controller version 0x00440302
6370 14:48:24.951529 <6>[ 9.071681] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6371 14:48:24.957722 <4>[ 9.072484] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6372 14:48:24.969842 <6>[ 9.072700] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6373 14:48:24.984060 <3>[ 9.104494] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6374 14:48:24.991127 <3>[ 9.114788] Bluetooth: hci0: QCA Failed to download patch (-2)
6375 14:48:25.020619 <4>[ 9.140979] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6376 14:48:25.039395 <4>[ 9.159676] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6377 14:48:25.053887 <4>[ 9.174140] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6378 14:48:25.064045 <4>[ 9.187355] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6379 14:48:26.216510 <6>[ 10.340109] NET: Registered PF_INET6 protocol family
6380 14:48:26.228528 <6>[ 10.352170] Segment Routing with IPv6
6381 14:48:26.236994 <6>[ 10.360417] In-situ OAM (IOAM) with IPv6
6382 14:48:26.425246 <30>[ 10.519406] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6383 14:48:26.442720 <30>[ 10.566326] systemd[1]: Detected architecture arm64.
6384 14:48:26.454644
6385 14:48:26.458136 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6386 14:48:26.458671
6387 14:48:26.483851 <30>[ 10.607403] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6388 14:48:27.582982 <30>[ 11.703123] systemd[1]: Queued start job for default target graphical.target.
6389 14:48:27.619464 <30>[ 11.739190] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6390 14:48:27.632051 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6391 14:48:27.651720 <30>[ 11.771936] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6392 14:48:27.664962 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6393 14:48:27.684225 <30>[ 11.804236] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6394 14:48:27.698158 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6395 14:48:27.715101 <30>[ 11.835384] systemd[1]: Created slice user.slice - User and Session Slice.
6396 14:48:27.727339 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6397 14:48:27.749352 <30>[ 11.866361] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6398 14:48:27.762571 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6399 14:48:27.781378 <30>[ 11.898236] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6400 14:48:27.793601 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6401 14:48:27.823329 <30>[ 11.930151] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6402 14:48:27.839020 <30>[ 11.959166] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6403 14:48:27.846870 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6404 14:48:27.866177 <30>[ 11.986129] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6405 14:48:27.879295 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6406 14:48:27.898009 <30>[ 12.018060] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6407 14:48:27.912181 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6408 14:48:27.927035 <30>[ 12.050060] systemd[1]: Reached target paths.target - Path Units.
6409 14:48:27.940828 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6410 14:48:27.958432 <30>[ 12.077990] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6411 14:48:27.970153 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6412 14:48:27.985608 <30>[ 12.105948] systemd[1]: Reached target slices.target - Slice Units.
6413 14:48:27.996938 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6414 14:48:28.010737 <30>[ 12.134010] systemd[1]: Reached target swap.target - Swaps.
6415 14:48:28.021346 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6416 14:48:28.041826 <30>[ 12.162016] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6417 14:48:28.055179 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6418 14:48:28.074393 <30>[ 12.194404] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6419 14:48:28.088015 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6420 14:48:28.109259 <30>[ 12.229231] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6421 14:48:28.122705 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6422 14:48:28.143574 <30>[ 12.263771] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6423 14:48:28.157476 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6424 14:48:28.174654 <30>[ 12.294703] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6425 14:48:28.186851 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6426 14:48:28.208049 <30>[ 12.327831] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6427 14:48:28.221504 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6428 14:48:28.240882 <30>[ 12.361169] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6429 14:48:28.254049 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6430 14:48:28.270290 <30>[ 12.390591] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6431 14:48:28.283121 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6432 14:48:28.326217 <30>[ 12.446372] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6433 14:48:28.336911 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6434 14:48:28.358151 <30>[ 12.478579] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6435 14:48:28.370854 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6436 14:48:28.394759 <30>[ 12.515298] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6437 14:48:28.407116 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6438 14:48:28.432548 <30>[ 12.546518] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6439 14:48:28.490432 <30>[ 12.611059] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6440 14:48:28.503630 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6441 14:48:28.527878 <30>[ 12.648591] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6442 14:48:28.539083 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6443 14:48:28.561124 <30>[ 12.681590] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6444 14:48:28.572026 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6445 14:48:28.597740 <30>[ 12.718190] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6446 14:48:28.612115 Startin<6>[ 12.729803] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6447 14:48:28.614904 g [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6448 14:48:28.667040 <30>[ 12.787001] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6449 14:48:28.681200 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6450 14:48:28.707793 <30>[ 12.828048] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6451 14:48:28.721200 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6452 14:48:28.741850 <30>[ 12.862341] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6453 14:48:28.753902 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6454 14:48:28.757155 <6>[ 12.882359] fuse: init (API version 7.37)
6455 14:48:28.799052 <30>[ 12.919313] systemd[1]: Starting systemd-journald.service - Journal Service...
6456 14:48:28.808970 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6457 14:48:28.834188 <30>[ 12.954437] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6458 14:48:28.843762 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6459 14:48:28.868500 <30>[ 12.985822] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6460 14:48:28.880145 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6461 14:48:28.902054 <30>[ 13.022458] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6462 14:48:28.914602 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6463 14:48:28.937169 <30>[ 13.057526] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6464 14:48:28.948488 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6465 14:48:28.976033 <30>[ 13.096625] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6466 14:48:28.982843 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6467 14:48:29.002675 <30>[ 13.123562] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6468 14:48:29.016756 [[0;32m OK [0m] Mounted [0;<3>[ 13.135456] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6469 14:48:29.023473 1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6470 14:48:29.033186 <3>[ 13.152429] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6471 14:48:29.042862 <30>[ 13.161427] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6472 14:48:29.056607 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m<3>[ 13.178070] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6473 14:48:29.059607 - Kernel Debug File System.
6474 14:48:29.074997 <3>[ 13.195014] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6475 14:48:29.085645 <30>[ 13.204584] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6476 14:48:29.095417 <3>[ 13.211582] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6477 14:48:29.106106 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6478 14:48:29.112315 <3>[ 13.233083] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 14:48:29.124010 <30>[ 13.243727] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6480 14:48:29.130462 <3>[ 13.250047] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6481 14:48:29.138400 <30>[ 13.251778] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6482 14:48:29.148248 <3>[ 13.264965] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6483 14:48:29.161141 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6484 14:48:29.178374 <30>[ 13.298701] systemd[1]: Started systemd-journald.service - Journal Service.
6485 14:48:29.189965 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6486 14:48:29.211084 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6487 14:48:29.232616 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6488 14:48:29.252715 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6489 14:48:29.276711 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6490 14:48:29.300512 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6491 14:48:29.319589 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6492 14:48:29.339362 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6493 14:48:29.359168 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6494 14:48:29.380773 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6495 14:48:29.426549 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6496 14:48:29.433947 <4>[ 13.556888] power_supply_show_property: 2 callbacks suppressed
6497 14:48:29.444284 <3>[ 13.556902] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6498 14:48:29.450714 <3>[ 13.569929] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6499 14:48:29.467438 <4>[ 13.572010] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6500 14:48:29.477598 <3>[ 13.586181] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6501 14:48:29.488927 <3>[ 13.596569] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6502 14:48:29.522525 Mounting [0;1;39msys-kernel-config…ernel Configuration File System..<3>[ 13.642723] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6503 14:48:29.522969 .
6504 14:48:29.540465 <3>[ 13.660282] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6505 14:48:29.558356 <3>[ 13.678218] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6506 14:48:29.580419 <3>[ 13.700467] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6507 14:48:29.598777 Starting [0;1;39msystemd-journal-f…h Journal to Pers<3>[ 13.719324] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6508 14:48:29.601978 istent Storage...
6509 14:48:29.618872 <3>[ 13.739460] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6510 14:48:29.636724 Starting [0;1;39msystemd-random-se…i<3>[ 13.757132] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6511 14:48:29.640044 ce[0m - Load/Save Random Seed...
6512 14:48:29.670158 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Ke<46>[ 13.789186] systemd-journald[323]: Received client request to flush runtime journal.
6513 14:48:29.670288 rnel Variables...
6514 14:48:29.684786 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6515 14:48:29.716562 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6516 14:48:29.735088 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6517 14:48:29.754555 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6518 14:48:29.776228 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6519 14:48:30.450527 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6520 14:48:30.782084 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6521 14:48:30.818482 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6522 14:48:31.130443 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6523 14:48:31.225275 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6524 14:48:31.242636 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6525 14:48:31.262028 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6526 14:48:31.306861 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6527 14:48:31.331989 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6528 14:48:31.594476 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6529 14:48:31.650010 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6530 14:48:31.714578 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6531 14:48:31.813807 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6532 14:48:31.952084 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6533 14:48:31.969991 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6534 14:48:32.018310 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6535 14:48:32.067236 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6536 14:48:32.090594 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6537 14:48:32.148785 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6538 14:48:32.194237 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6539 14:48:32.265620 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6540 14:48:32.284501 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6541 14:48:32.369915 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6542 14:48:32.389729 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6543 14:48:32.416386 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6544 14:48:32.442809 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6545 14:48:32.464603 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6546 14:48:32.490207 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6547 14:48:32.513734 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6548 14:48:32.533990 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6549 14:48:32.551093 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6550 14:48:32.572929 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6551 14:48:32.590429 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6552 14:48:32.606658 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6553 14:48:32.630997 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6554 14:48:32.652498 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6555 14:48:32.670585 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6556 14:48:32.697497 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6557 14:48:32.739422 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6558 14:48:32.758348 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6559 14:48:32.779339 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6560 14:48:32.801781 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6561 14:48:32.818501 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6562 14:48:32.838848 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6563 14:48:32.887692 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6564 14:48:32.912575 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6565 14:48:32.939099 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6566 14:48:32.982174 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6567 14:48:33.002876 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6568 14:48:33.024130 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6569 14:48:33.042389 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6570 14:48:33.242057 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6571 14:48:33.287031 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6572 14:48:33.337168 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6573 14:48:33.354416 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6574 14:48:33.375322 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6575 14:48:33.409455 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6576 14:48:33.435077 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6577 14:48:33.455828 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6578 14:48:33.477041 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6579 14:48:33.520242 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6580 14:48:33.574027 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6581 14:48:33.664664
6582 14:48:33.668147 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6583 14:48:33.668281
6584 14:48:33.671269 debian-bookworm-arm64 login: root (automatic login)
6585 14:48:33.674253
6586 14:48:33.942741 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024 aarch64
6587 14:48:33.942926
6588 14:48:33.949301 The programs included with the Debian GNU/Linux system are free software;
6589 14:48:33.955789 the exact distribution terms for each program are described in the
6590 14:48:33.959121 individual files in /usr/share/doc/*/copyright.
6591 14:48:33.959217
6592 14:48:33.965822 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6593 14:48:33.968826 permitted by applicable law.
6594 14:48:35.043090 Matched prompt #10: / #
6596 14:48:35.043520 Setting prompt string to ['/ #']
6597 14:48:35.043662 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6599 14:48:35.044014 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6600 14:48:35.044144 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6601 14:48:35.044253 Setting prompt string to ['/ #']
6602 14:48:35.044351 Forcing a shell prompt, looking for ['/ #']
6604 14:48:35.094683 / #
6605 14:48:35.095186 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6606 14:48:35.095713 Waiting using forced prompt support (timeout 00:02:30)
6607 14:48:35.100327
6608 14:48:35.101157 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6609 14:48:35.101744 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6611 14:48:35.203083 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt'
6612 14:48:35.208538 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14167041/extract-nfsrootfs-4f_k0_bt'
6614 14:48:35.310107 / # export NFS_SERVER_IP='192.168.201.1'
6615 14:48:35.315978 export NFS_SERVER_IP='192.168.201.1'
6616 14:48:35.316812 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6617 14:48:35.317248 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6618 14:48:35.317681 end: 2 depthcharge-action (duration 00:01:13) [common]
6619 14:48:35.318090 start: 3 lava-test-retry (timeout 00:08:03) [common]
6620 14:48:35.318502 start: 3.1 lava-test-shell (timeout 00:08:03) [common]
6621 14:48:35.318860 Using namespace: common
6623 14:48:35.419849 / # #
6624 14:48:35.420404 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6625 14:48:35.425707 #
6626 14:48:35.426369 Using /lava-14167041
6628 14:48:35.527333 / # export SHELL=/bin/bash
6629 14:48:35.532990 export SHELL=/bin/bash
6631 14:48:35.634339 / # . /lava-14167041/environment
6632 14:48:35.640314 . /lava-14167041/environment
6634 14:48:35.746810 / # /lava-14167041/bin/lava-test-runner /lava-14167041/0
6635 14:48:35.747436 Test shell timeout: 10s (minimum of the action and connection timeout)
6636 14:48:35.753043 /lava-14167041/bin/lava-test-runner /lava-14167041/0
6637 14:48:35.991827 + export TESTRUN_ID=0_timesync-off
6638 14:48:35.994615 + TESTRUN_ID=0_timesync-off
6639 14:48:35.997714 + cd /lava-14167041/0/tests/0_timesync-off
6640 14:48:36.001284 ++ cat uuid
6641 14:48:36.004342 + UUID=14167041_1.6.2.3.1
6642 14:48:36.004456 + set +x
6643 14:48:36.010771 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14167041_1.6.2.3.1>
6644 14:48:36.011070 Received signal: <STARTRUN> 0_timesync-off 14167041_1.6.2.3.1
6645 14:48:36.011155 Starting test lava.0_timesync-off (14167041_1.6.2.3.1)
6646 14:48:36.011253 Skipping test definition patterns.
6647 14:48:36.014130 + systemctl stop systemd-timesyncd
6648 14:48:36.084591 + set +x
6649 14:48:36.088099 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14167041_1.6.2.3.1>
6650 14:48:36.088361 Received signal: <ENDRUN> 0_timesync-off 14167041_1.6.2.3.1
6651 14:48:36.088455 Ending use of test pattern.
6652 14:48:36.088524 Ending test lava.0_timesync-off (14167041_1.6.2.3.1), duration 0.08
6654 14:48:36.153127 + export TESTRUN_ID=1_kselftest-dt
6655 14:48:36.156198 + TESTRUN_ID=1_kselftest-dt
6656 14:48:36.159226 + cd /lava-14167041/0/tests/1_kselftest-dt
6657 14:48:36.162812 ++ cat uuid
6658 14:48:36.162907 + UUID=14167041_1.6.2.3.5
6659 14:48:36.165849 + set +x
6660 14:48:36.169034 <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 14167041_1.6.2.3.5>
6661 14:48:36.169304 Received signal: <STARTRUN> 1_kselftest-dt 14167041_1.6.2.3.5
6662 14:48:36.169382 Starting test lava.1_kselftest-dt (14167041_1.6.2.3.5)
6663 14:48:36.169480 Skipping test definition patterns.
6664 14:48:36.172459 + cd ./automated/linux/kselftest/
6665 14:48:36.202110 + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6666 14:48:36.241943 INFO: install_deps skipped
6667 14:48:36.739704 --2024-06-04 14:48:36-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6668 14:48:36.753204 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6669 14:48:36.882052 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6670 14:48:37.011269 HTTP request sent, awaiting response... 200 OK
6671 14:48:37.014026 Length: 1647736 (1.6M) [application/octet-stream]
6672 14:48:37.017517 Saving to: 'kselftest_armhf.tar.gz'
6673 14:48:37.017608
6674 14:48:37.017680
6675 14:48:37.398085 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6676 14:48:37.654911 kselftest_armhf.tar 2%[ ] 40.74K 102KB/s
6677 14:48:37.913714 kselftest_armhf.tar 8%[> ] 139.72K 211KB/s
6678 14:48:38.172353 kselftest_armhf.tar 13%[=> ] 220.32K 237KB/s
6679 14:48:38.429954 kselftest_armhf.tar 19%[==> ] 306.58K 257KB/s
6680 14:48:38.686752 kselftest_armhf.tar 24%[===> ] 397.08K 272KB/s
6681 14:48:38.945206 kselftest_armhf.tar 29%[====> ] 481.92K 280KB/s
6682 14:48:39.172450 kselftest_armhf.tar 34%[=====> ] 552.63K 278KB/s
6683 14:48:39.431336 kselftest_armhf.tar 38%[======> ] 624.75K 282KB/s
6684 14:48:39.689469 kselftest_armhf.tar 43%[=======> ] 703.93K 284KB/s
6685 14:48:39.948365 kselftest_armhf.tar 48%[========> ] 783.12K 285KB/s
6686 14:48:40.215457 kselftest_armhf.tar 53%[=========> ] 865.14K 287KB/s eta 3s
6687 14:48:40.476536 kselftest_armhf.tar 58%[==========> ] 945.74K 288KB/s eta 3s
6688 14:48:40.678071 kselftest_armhf.tar 64%[===========> ] 1.01M 291KB/s eta 3s
6689 14:48:40.884322 kselftest_armhf.tar 69%[============> ] 1.09M 297KB/s eta 3s
6690 14:48:41.122508 kselftest_armhf.tar 72%[=============> ] 1.14M 294KB/s eta 3s
6691 14:48:41.362857 kselftest_armhf.tar 78%[==============> ] 1.23M 299KB/s eta 1s
6692 14:48:41.580800 kselftest_armhf.tar 83%[===============> ] 1.32M 303KB/s eta 1s
6693 14:48:41.786571 kselftest_armhf.tar 89%[================> ] 1.41M 328KB/s eta 1s
6694 14:48:42.009976 kselftest_armhf.tar 93%[=================> ] 1.47M 324KB/s eta 1s
6695 14:48:42.045192 kselftest_armhf.tar 99%[==================> ] 1.56M 329KB/s eta 1s
6696 14:48:42.051332 kselftest_armhf.tar 100%[===================>] 1.57M 330KB/s in 5.1s
6697 14:48:42.051765
6698 14:48:42.196417 2024-06-04 14:48:41 (313 KB/s) - 'kselftest_armhf.tar.gz' saved [1647736/1647736]
6699 14:48:42.196553
6700 14:48:46.339905 skiplist:
6701 14:48:46.343055 ========================================
6702 14:48:46.346321 ========================================
6703 14:48:46.411296 ============== Tests to run ===============
6704 14:48:46.414756 ===========End Tests to run ===============
6705 14:48:46.418546 shardfile-dt fail
6706 14:48:46.442582 ./kselftest.sh: 131: cannot open /lava-14167041/0/tests/1_kselftest-dt/automated/linux/kselftest/output/kselftest.txt: No such file
6707 14:48:46.445747 + ../../utils/send-to-lava.sh ./output/result.txt
6708 14:48:46.503698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=fail>
6709 14:48:46.503805 + set +x
6710 14:48:46.504059 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=fail
6712 14:48:46.510320 <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 14167041_1.6.2.3.5>
6713 14:48:46.510593 Received signal: <ENDRUN> 1_kselftest-dt 14167041_1.6.2.3.5
6714 14:48:46.510678 Ending use of test pattern.
6715 14:48:46.510746 Ending test lava.1_kselftest-dt (14167041_1.6.2.3.5), duration 10.34
6717 14:48:46.513451 <LAVA_TEST_RUNNER EXIT>
6718 14:48:46.513711 ok: lava_test_shell seems to have completed
6719 14:48:46.513817 shardfile-dt: fail
6720 14:48:46.513912 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6721 14:48:46.514002 end: 3 lava-test-retry (duration 00:00:11) [common]
6722 14:48:46.514097 start: 4 finalize (timeout 00:07:52) [common]
6723 14:48:46.514201 start: 4.1 power-off (timeout 00:00:30) [common]
6724 14:48:46.514374 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6725 14:48:48.073073 >> Command sent successfully.
6726 14:48:48.078993 Returned 0 in 1 seconds
6727 14:48:48.179720 end: 4.1 power-off (duration 00:00:02) [common]
6729 14:48:48.181037 start: 4.2 read-feedback (timeout 00:07:50) [common]
6730 14:48:48.182197 Listened to connection for namespace 'common' for up to 1s
6731 14:48:49.182930 Finalising connection for namespace 'common'
6732 14:48:49.183536 Disconnecting from shell: Finalise
6733 14:48:49.183925 / #
6734 14:48:49.284767 end: 4.2 read-feedback (duration 00:00:01) [common]
6735 14:48:49.285354 end: 4 finalize (duration 00:00:03) [common]
6736 14:48:49.285937 Cleaning after the job
6737 14:48:49.286404 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/ramdisk
6738 14:48:49.291185 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/kernel
6739 14:48:49.302683 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/dtb
6740 14:48:49.302873 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/nfsrootfs
6741 14:48:49.371807 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14167041/tftp-deploy-kb2e5ubw/modules
6742 14:48:49.377813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14167041
6743 14:48:49.990776 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14167041
6744 14:48:49.990965 Job finished correctly