Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 50
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 89
1 14:42:36.974609 lava-dispatcher, installed at version: 2024.03
2 14:42:36.974846 start: 0 validate
3 14:42:36.974996 Start time: 2024-06-04 14:42:36.974987+00:00 (UTC)
4 14:42:36.975140 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:42:36.975281 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:42:37.240169 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:42:37.240362 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 14:42:37.500073 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:42:37.500795 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 14:43:07.453203 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:43:07.453373 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:43:07.965641 Using caching service: 'http://localhost/cache/?uri=%s'
13 14:43:07.965885 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21-33-g2e011af54960c%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 14:43:08.233720 validate duration: 31.26
16 14:43:08.234919 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:43:08.235433 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:43:08.235878 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:43:08.236448 Not decompressing ramdisk as can be used compressed.
20 14:43:08.236878 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 14:43:08.237204 saving as /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/ramdisk/initrd.cpio.gz
22 14:43:08.237719 total size: 5628169 (5 MB)
23 14:43:10.905813 progress 0 % (0 MB)
24 14:43:10.914789 progress 5 % (0 MB)
25 14:43:10.922831 progress 10 % (0 MB)
26 14:43:10.929856 progress 15 % (0 MB)
27 14:43:10.936326 progress 20 % (1 MB)
28 14:43:10.940642 progress 25 % (1 MB)
29 14:43:10.944474 progress 30 % (1 MB)
30 14:43:10.947846 progress 35 % (1 MB)
31 14:43:10.950349 progress 40 % (2 MB)
32 14:43:10.953140 progress 45 % (2 MB)
33 14:43:10.955297 progress 50 % (2 MB)
34 14:43:10.957714 progress 55 % (2 MB)
35 14:43:10.959848 progress 60 % (3 MB)
36 14:43:10.961750 progress 65 % (3 MB)
37 14:43:10.963835 progress 70 % (3 MB)
38 14:43:10.965533 progress 75 % (4 MB)
39 14:43:10.967416 progress 80 % (4 MB)
40 14:43:10.968984 progress 85 % (4 MB)
41 14:43:10.970713 progress 90 % (4 MB)
42 14:43:10.972411 progress 95 % (5 MB)
43 14:43:10.973956 progress 100 % (5 MB)
44 14:43:10.974184 5 MB downloaded in 2.74 s (1.96 MB/s)
45 14:43:10.974351 end: 1.1.1 http-download (duration 00:00:03) [common]
47 14:43:10.974618 end: 1.1 download-retry (duration 00:00:03) [common]
48 14:43:10.974715 start: 1.2 download-retry (timeout 00:09:57) [common]
49 14:43:10.974809 start: 1.2.1 http-download (timeout 00:09:57) [common]
50 14:43:10.974977 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 14:43:10.975093 saving as /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/kernel/Image
52 14:43:10.975167 total size: 54682112 (52 MB)
53 14:43:10.975239 No compression specified
54 14:43:10.976454 progress 0 % (0 MB)
55 14:43:10.991938 progress 5 % (2 MB)
56 14:43:11.007590 progress 10 % (5 MB)
57 14:43:11.023625 progress 15 % (7 MB)
58 14:43:11.038896 progress 20 % (10 MB)
59 14:43:11.054370 progress 25 % (13 MB)
60 14:43:11.069804 progress 30 % (15 MB)
61 14:43:11.086598 progress 35 % (18 MB)
62 14:43:11.104387 progress 40 % (20 MB)
63 14:43:11.119771 progress 45 % (23 MB)
64 14:43:11.135351 progress 50 % (26 MB)
65 14:43:11.150660 progress 55 % (28 MB)
66 14:43:11.166171 progress 60 % (31 MB)
67 14:43:11.181548 progress 65 % (33 MB)
68 14:43:11.197036 progress 70 % (36 MB)
69 14:43:11.212292 progress 75 % (39 MB)
70 14:43:11.227841 progress 80 % (41 MB)
71 14:43:11.243210 progress 85 % (44 MB)
72 14:43:11.258520 progress 90 % (46 MB)
73 14:43:11.273913 progress 95 % (49 MB)
74 14:43:11.288974 progress 100 % (52 MB)
75 14:43:11.289266 52 MB downloaded in 0.31 s (166.03 MB/s)
76 14:43:11.289461 end: 1.2.1 http-download (duration 00:00:00) [common]
78 14:43:11.289753 end: 1.2 download-retry (duration 00:00:00) [common]
79 14:43:11.289852 start: 1.3 download-retry (timeout 00:09:57) [common]
80 14:43:11.289948 start: 1.3.1 http-download (timeout 00:09:57) [common]
81 14:43:11.290100 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 14:43:11.290182 saving as /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 14:43:11.290251 total size: 57695 (0 MB)
84 14:43:11.290320 No compression specified
85 14:43:11.291570 progress 56 % (0 MB)
86 14:43:11.291888 progress 100 % (0 MB)
87 14:43:11.292114 0 MB downloaded in 0.00 s (29.58 MB/s)
88 14:43:11.292255 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:43:11.292519 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:43:11.292616 start: 1.4 download-retry (timeout 00:09:57) [common]
92 14:43:11.292710 start: 1.4.1 http-download (timeout 00:09:57) [common]
93 14:43:11.292840 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 14:43:11.292917 saving as /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/nfsrootfs/full.rootfs.tar
95 14:43:11.292986 total size: 120894716 (115 MB)
96 14:43:11.293055 Using unxz to decompress xz
97 14:43:11.297509 progress 0 % (0 MB)
98 14:43:11.680149 progress 5 % (5 MB)
99 14:43:12.076484 progress 10 % (11 MB)
100 14:43:12.467741 progress 15 % (17 MB)
101 14:43:12.836361 progress 20 % (23 MB)
102 14:43:13.163729 progress 25 % (28 MB)
103 14:43:13.571317 progress 30 % (34 MB)
104 14:43:13.949001 progress 35 % (40 MB)
105 14:43:14.139110 progress 40 % (46 MB)
106 14:43:14.342738 progress 45 % (51 MB)
107 14:43:14.711731 progress 50 % (57 MB)
108 14:43:15.139850 progress 55 % (63 MB)
109 14:43:15.525290 progress 60 % (69 MB)
110 14:43:15.908176 progress 65 % (74 MB)
111 14:43:16.292027 progress 70 % (80 MB)
112 14:43:16.709715 progress 75 % (86 MB)
113 14:43:17.105459 progress 80 % (92 MB)
114 14:43:17.507580 progress 85 % (98 MB)
115 14:43:17.922133 progress 90 % (103 MB)
116 14:43:18.353634 progress 95 % (109 MB)
117 14:43:18.778479 progress 100 % (115 MB)
118 14:43:18.784399 115 MB downloaded in 7.49 s (15.39 MB/s)
119 14:43:18.784691 end: 1.4.1 http-download (duration 00:00:07) [common]
121 14:43:18.784989 end: 1.4 download-retry (duration 00:00:07) [common]
122 14:43:18.785093 start: 1.5 download-retry (timeout 00:09:49) [common]
123 14:43:18.785190 start: 1.5.1 http-download (timeout 00:09:49) [common]
124 14:43:18.785361 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 14:43:18.785449 saving as /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/modules/modules.tar
126 14:43:18.785518 total size: 8608920 (8 MB)
127 14:43:18.785590 Using unxz to decompress xz
128 14:43:18.790239 progress 0 % (0 MB)
129 14:43:18.811358 progress 5 % (0 MB)
130 14:43:18.841992 progress 10 % (0 MB)
131 14:43:18.875376 progress 15 % (1 MB)
132 14:43:18.902054 progress 20 % (1 MB)
133 14:43:18.928452 progress 25 % (2 MB)
134 14:43:18.954853 progress 30 % (2 MB)
135 14:43:18.982026 progress 35 % (2 MB)
136 14:43:19.011794 progress 40 % (3 MB)
137 14:43:19.037056 progress 45 % (3 MB)
138 14:43:19.063836 progress 50 % (4 MB)
139 14:43:19.092098 progress 55 % (4 MB)
140 14:43:19.119390 progress 60 % (4 MB)
141 14:43:19.146465 progress 65 % (5 MB)
142 14:43:19.174231 progress 70 % (5 MB)
143 14:43:19.202982 progress 75 % (6 MB)
144 14:43:19.231821 progress 80 % (6 MB)
145 14:43:19.258965 progress 85 % (7 MB)
146 14:43:19.287698 progress 90 % (7 MB)
147 14:43:19.316519 progress 95 % (7 MB)
148 14:43:19.344418 progress 100 % (8 MB)
149 14:43:19.350604 8 MB downloaded in 0.57 s (14.53 MB/s)
150 14:43:19.350898 end: 1.5.1 http-download (duration 00:00:01) [common]
152 14:43:19.351194 end: 1.5 download-retry (duration 00:00:01) [common]
153 14:43:19.351301 start: 1.6 prepare-tftp-overlay (timeout 00:09:49) [common]
154 14:43:19.351423 start: 1.6.1 extract-nfsrootfs (timeout 00:09:49) [common]
155 14:43:23.322434 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7
156 14:43:23.322668 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 14:43:23.322785 start: 1.6.2 lava-overlay (timeout 00:09:45) [common]
158 14:43:23.322987 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3
159 14:43:23.323139 makedir: /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin
160 14:43:23.323257 makedir: /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/tests
161 14:43:23.323370 makedir: /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/results
162 14:43:23.323483 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-add-keys
163 14:43:23.323641 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-add-sources
164 14:43:23.323788 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-background-process-start
165 14:43:23.323932 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-background-process-stop
166 14:43:23.324075 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-common-functions
167 14:43:23.324217 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-echo-ipv4
168 14:43:23.324358 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-install-packages
169 14:43:23.324498 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-installed-packages
170 14:43:23.324638 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-os-build
171 14:43:23.324779 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-probe-channel
172 14:43:23.324923 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-probe-ip
173 14:43:23.325064 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-target-ip
174 14:43:23.325206 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-target-mac
175 14:43:23.325346 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-target-storage
176 14:43:23.325501 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-case
177 14:43:23.325645 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-event
178 14:43:23.325787 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-feedback
179 14:43:23.325929 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-raise
180 14:43:23.326071 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-reference
181 14:43:23.326213 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-runner
182 14:43:23.326360 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-set
183 14:43:23.326505 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-test-shell
184 14:43:23.326653 Updating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-add-keys (debian)
185 14:43:23.326831 Updating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-add-sources (debian)
186 14:43:23.327003 Updating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-install-packages (debian)
187 14:43:23.327169 Updating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-installed-packages (debian)
188 14:43:23.327333 Updating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/bin/lava-os-build (debian)
189 14:43:23.327472 Creating /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/environment
190 14:43:23.327588 LAVA metadata
191 14:43:23.327664 - LAVA_JOB_ID=14166984
192 14:43:23.327733 - LAVA_DISPATCHER_IP=192.168.201.1
193 14:43:23.327854 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:45) [common]
194 14:43:23.327932 skipped lava-vland-overlay
195 14:43:23.328016 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 14:43:23.328109 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
197 14:43:23.328178 skipped lava-multinode-overlay
198 14:43:23.328258 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 14:43:23.328345 start: 1.6.2.3 test-definition (timeout 00:09:45) [common]
200 14:43:23.328431 Loading test definitions
201 14:43:23.328531 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:45) [common]
202 14:43:23.328612 Using /lava-14166984 at stage 0
203 14:43:23.328935 uuid=14166984_1.6.2.3.1 testdef=None
204 14:43:23.329034 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 14:43:23.329128 start: 1.6.2.3.2 test-overlay (timeout 00:09:45) [common]
206 14:43:23.329814 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 14:43:23.330065 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:45) [common]
209 14:43:23.330697 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 14:43:23.330959 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
212 14:43:23.331562 runner path: /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/0/tests/0_timesync-off test_uuid 14166984_1.6.2.3.1
213 14:43:23.331742 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 14:43:23.331996 start: 1.6.2.3.5 git-repo-action (timeout 00:09:45) [common]
216 14:43:23.332078 Using /lava-14166984 at stage 0
217 14:43:23.332188 Fetching tests from https://github.com/kernelci/test-definitions.git
218 14:43:23.332285 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/0/tests/1_kselftest-rtc'
219 14:43:27.624167 Running '/usr/bin/git checkout kernelci.org
220 14:43:27.793366 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
221 14:43:27.794536 uuid=14166984_1.6.2.3.5 testdef=None
222 14:43:27.794774 end: 1.6.2.3.5 git-repo-action (duration 00:00:04) [common]
224 14:43:27.795188 start: 1.6.2.3.6 test-overlay (timeout 00:09:40) [common]
225 14:43:27.796480 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 14:43:27.796876 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:40) [common]
228 14:43:27.798588 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 14:43:27.798999 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
231 14:43:27.800626 runner path: /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/0/tests/1_kselftest-rtc test_uuid 14166984_1.6.2.3.5
232 14:43:27.800770 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 14:43:27.800877 BRANCH='cip'
234 14:43:27.800979 SKIPFILE='/dev/null'
235 14:43:27.801082 SKIP_INSTALL='True'
236 14:43:27.801182 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 14:43:27.801285 TST_CASENAME=''
238 14:43:27.801386 TST_CMDFILES='rtc'
239 14:43:27.801626 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 14:43:27.801997 Creating lava-test-runner.conf files
242 14:43:27.802107 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14166984/lava-overlay-h_2ho_x3/lava-14166984/0 for stage 0
243 14:43:27.802262 - 0_timesync-off
244 14:43:27.802383 - 1_kselftest-rtc
245 14:43:27.802541 end: 1.6.2.3 test-definition (duration 00:00:04) [common]
246 14:43:27.802689 start: 1.6.2.4 compress-overlay (timeout 00:09:40) [common]
247 14:43:36.339612 end: 1.6.2.4 compress-overlay (duration 00:00:09) [common]
248 14:43:36.339823 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:32) [common]
249 14:43:36.339963 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 14:43:36.340116 end: 1.6.2 lava-overlay (duration 00:00:13) [common]
251 14:43:36.340254 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
252 14:43:36.531525 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 14:43:36.531989 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
254 14:43:36.532157 extracting modules file /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7
255 14:43:36.831874 extracting modules file /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14166984/extract-overlay-ramdisk-ezhnkeil/ramdisk
256 14:43:37.144377 end: 1.6.4 extract-modules (duration 00:00:01) [common]
257 14:43:37.144595 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
258 14:43:37.144703 [common] Applying overlay to NFS
259 14:43:37.144792 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14166984/compress-overlay-y1qy_jjn/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7
260 14:43:38.181706 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 14:43:38.181901 start: 1.6.6 configure-preseed-file (timeout 00:09:30) [common]
262 14:43:38.182008 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 14:43:38.182106 start: 1.6.7 compress-ramdisk (timeout 00:09:30) [common]
264 14:43:38.182199 Building ramdisk /var/lib/lava/dispatcher/tmp/14166984/extract-overlay-ramdisk-ezhnkeil/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14166984/extract-overlay-ramdisk-ezhnkeil/ramdisk
265 14:43:38.559151 >> 130335 blocks
266 14:43:40.837905 rename /var/lib/lava/dispatcher/tmp/14166984/extract-overlay-ramdisk-ezhnkeil/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/ramdisk/ramdisk.cpio.gz
267 14:43:40.838379 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 14:43:40.838522 start: 1.6.8 prepare-kernel (timeout 00:09:27) [common]
269 14:43:40.838635 start: 1.6.8.1 prepare-fit (timeout 00:09:27) [common]
270 14:43:40.838756 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/kernel/Image']
271 14:43:55.782069 Returned 0 in 14 seconds
272 14:43:55.882770 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/kernel/image.itb
273 14:43:56.289897 output: FIT description: Kernel Image image with one or more FDT blobs
274 14:43:56.290305 output: Created: Tue Jun 4 15:43:56 2024
275 14:43:56.290388 output: Image 0 (kernel-1)
276 14:43:56.290461 output: Description:
277 14:43:56.290531 output: Created: Tue Jun 4 15:43:56 2024
278 14:43:56.290604 output: Type: Kernel Image
279 14:43:56.290675 output: Compression: lzma compressed
280 14:43:56.290743 output: Data Size: 13060619 Bytes = 12754.51 KiB = 12.46 MiB
281 14:43:56.290814 output: Architecture: AArch64
282 14:43:56.290880 output: OS: Linux
283 14:43:56.290946 output: Load Address: 0x00000000
284 14:43:56.291012 output: Entry Point: 0x00000000
285 14:43:56.291077 output: Hash algo: crc32
286 14:43:56.291139 output: Hash value: 88dcd836
287 14:43:56.291204 output: Image 1 (fdt-1)
288 14:43:56.291268 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 14:43:56.291331 output: Created: Tue Jun 4 15:43:56 2024
290 14:43:56.291392 output: Type: Flat Device Tree
291 14:43:56.291465 output: Compression: uncompressed
292 14:43:56.291529 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 14:43:56.291590 output: Architecture: AArch64
294 14:43:56.291650 output: Hash algo: crc32
295 14:43:56.291710 output: Hash value: a9713552
296 14:43:56.291770 output: Image 2 (ramdisk-1)
297 14:43:56.291830 output: Description: unavailable
298 14:43:56.291917 output: Created: Tue Jun 4 15:43:56 2024
299 14:43:56.292011 output: Type: RAMDisk Image
300 14:43:56.292109 output: Compression: Unknown Compression
301 14:43:56.292176 output: Data Size: 18726219 Bytes = 18287.32 KiB = 17.86 MiB
302 14:43:56.292239 output: Architecture: AArch64
303 14:43:56.292300 output: OS: Linux
304 14:43:56.292360 output: Load Address: unavailable
305 14:43:56.292420 output: Entry Point: unavailable
306 14:43:56.292480 output: Hash algo: crc32
307 14:43:56.292540 output: Hash value: d4132a02
308 14:43:56.292600 output: Default Configuration: 'conf-1'
309 14:43:56.292660 output: Configuration 0 (conf-1)
310 14:43:56.292720 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 14:43:56.292780 output: Kernel: kernel-1
312 14:43:56.292841 output: Init Ramdisk: ramdisk-1
313 14:43:56.292901 output: FDT: fdt-1
314 14:43:56.292960 output: Loadables: kernel-1
315 14:43:56.293021 output:
316 14:43:56.293254 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 14:43:56.293369 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 14:43:56.293503 end: 1.6 prepare-tftp-overlay (duration 00:00:37) [common]
319 14:43:56.293611 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:12) [common]
320 14:43:56.293700 No LXC device requested
321 14:43:56.293790 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 14:43:56.293892 start: 1.8 deploy-device-env (timeout 00:09:12) [common]
323 14:43:56.293982 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 14:43:56.294059 Checking files for TFTP limit of 4294967296 bytes.
325 14:43:56.294619 end: 1 tftp-deploy (duration 00:00:48) [common]
326 14:43:56.294738 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 14:43:56.294842 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 14:43:56.294983 substitutions:
329 14:43:56.295060 - {DTB}: 14166984/tftp-deploy-su0wm_kf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 14:43:56.295134 - {INITRD}: 14166984/tftp-deploy-su0wm_kf/ramdisk/ramdisk.cpio.gz
331 14:43:56.295202 - {KERNEL}: 14166984/tftp-deploy-su0wm_kf/kernel/Image
332 14:43:56.295267 - {LAVA_MAC}: None
333 14:43:56.295331 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7
334 14:43:56.295394 - {NFS_SERVER_IP}: 192.168.201.1
335 14:43:56.295456 - {PRESEED_CONFIG}: None
336 14:43:56.295558 - {PRESEED_LOCAL}: None
337 14:43:56.295652 - {RAMDISK}: 14166984/tftp-deploy-su0wm_kf/ramdisk/ramdisk.cpio.gz
338 14:43:56.295717 - {ROOT_PART}: None
339 14:43:56.295779 - {ROOT}: None
340 14:43:56.295841 - {SERVER_IP}: 192.168.201.1
341 14:43:56.295926 - {TEE}: None
342 14:43:56.296023 Parsed boot commands:
343 14:43:56.296122 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 14:43:56.296341 Parsed boot commands: tftpboot 192.168.201.1 14166984/tftp-deploy-su0wm_kf/kernel/image.itb 14166984/tftp-deploy-su0wm_kf/kernel/cmdline
345 14:43:56.296449 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 14:43:56.296547 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 14:43:56.296654 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 14:43:56.296752 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 14:43:56.296840 Not connected, no need to disconnect.
350 14:43:56.296925 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 14:43:56.297019 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 14:43:56.297094 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
353 14:43:56.301365 Setting prompt string to ['lava-test: # ']
354 14:43:56.301828 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 14:43:56.301961 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 14:43:56.302076 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 14:43:56.302186 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 14:43:56.302397 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
359 14:44:19.820233 Returned 0 in 23 seconds
360 14:44:19.921367 end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
362 14:44:19.922831 end: 2.2.2 reset-device (duration 00:00:24) [common]
363 14:44:19.923337 start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
364 14:44:19.923769 Setting prompt string to 'Starting depthcharge on Juniper...'
365 14:44:19.924125 Changing prompt to 'Starting depthcharge on Juniper...'
366 14:44:19.924478 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 14:44:19.926430 [Enter `^Ec?' for help]
368 14:44:19.927076 [DL] 00000000 00000000 010701
369 14:44:19.927726
370 14:44:19.928347
371 14:44:19.928836 F0: 102B 0000
372 14:44:19.929308
373 14:44:19.929886 F3: 1006 0033 [0200]
374 14:44:19.930423
375 14:44:19.930912 F3: 4001 00E0 [0200]
376 14:44:19.931372
377 14:44:19.931816 F3: 0000 0000
378 14:44:19.932181
379 14:44:19.932479 V0: 0000 0000 [0001]
380 14:44:19.932786
381 14:44:19.933077 00: 1027 0002
382 14:44:19.933420
383 14:44:19.933787 01: 0000 0000
384 14:44:19.934088
385 14:44:19.934375 BP: 0C00 0251 [0000]
386 14:44:19.934657
387 14:44:19.934939 G0: 1182 0000
388 14:44:19.935259
389 14:44:19.935546 EC: 0004 0000 [0001]
390 14:44:19.935829
391 14:44:19.936114 S7: 0000 0000 [0000]
392 14:44:19.936397
393 14:44:19.936681 CC: 0000 0000 [0001]
394 14:44:19.936963
395 14:44:19.937246 T0: 0000 00DB [000F]
396 14:44:19.937569
397 14:44:19.937859 Jump to BL
398 14:44:19.938170
399 14:44:19.938456
400 14:44:19.938737
401 14:44:19.939020 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 14:44:19.939327 ARM64: Exception handlers installed.
403 14:44:19.939617 ARM64: Testing exception
404 14:44:19.939949 ARM64: Done test exception
405 14:44:19.940235 WDT: Last reset was cold boot
406 14:44:19.940516 SPI0(PAD0) initialized at 992727 Hz
407 14:44:19.940799 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 14:44:19.941085 Manufacturer: ef
409 14:44:19.941367 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 14:44:19.941733 Probing TPM: . done!
411 14:44:19.942091 TPM ready after 0 ms
412 14:44:19.942381 Connected to device vid:did:rid of 1ae0:0028:00
413 14:44:19.942673 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
414 14:44:19.942964 Initialized TPM device CR50 revision 0
415 14:44:19.943253 tlcl_send_startup: Startup return code is 0
416 14:44:19.943540 TPM: setup succeeded
417 14:44:19.943825 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 14:44:19.944313 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 14:44:19.944629 in-header: 03 19 00 00 08 00 00 00
420 14:44:19.944951 in-data: a2 e0 47 00 13 00 00 00
421 14:44:19.945242 Chrome EC: UHEPI supported
422 14:44:19.945561 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 14:44:19.945858 in-header: 03 a1 00 00 08 00 00 00
424 14:44:19.946141 in-data: 84 60 60 10 00 00 00 00
425 14:44:19.946427 Phase 1
426 14:44:19.946710 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 14:44:19.946998 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 14:44:19.947285 VB2:vb2_check_recovery() Recovery was requested manually
429 14:44:19.947570 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 14:44:19.947854 Recovery requested (1009000e)
431 14:44:19.948136 tlcl_extend: response is 0
432 14:44:19.948455 tlcl_extend: response is 0
433 14:44:19.948742
434 14:44:19.949026
435 14:44:19.949307 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 14:44:19.949641 ARM64: Exception handlers installed.
437 14:44:19.949941 ARM64: Testing exception
438 14:44:19.950228 ARM64: Done test exception
439 14:44:19.950510 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2027
440 14:44:19.950797 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 14:44:19.951027 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 14:44:19.951246 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
443 14:44:19.951455 [RTC]rtc_get_frequency_meter,134: input=0x7, output=734
444 14:44:19.951659 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
445 14:44:19.951862 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
446 14:44:19.952063 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
447 14:44:19.952312 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
448 14:44:19.952518 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
449 14:44:19.952722 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
450 14:44:19.952941 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
451 14:44:19.953267 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
452 14:44:19.953578 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
453 14:44:19.953804 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
454 14:44:19.954015 in-header: 03 19 00 00 08 00 00 00
455 14:44:19.954264 in-data: a2 e0 47 00 13 00 00 00
456 14:44:19.954474 Chrome EC: UHEPI supported
457 14:44:19.954703 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
458 14:44:19.954913 in-header: 03 a1 00 00 08 00 00 00
459 14:44:19.955118 in-data: 84 60 60 10 00 00 00 00
460 14:44:19.955322 Skip loading cached calibration data
461 14:44:19.955524 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
462 14:44:19.955728 in-header: 03 a1 00 00 08 00 00 00
463 14:44:19.955917 in-data: 84 60 60 10 00 00 00 00
464 14:44:19.956069 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
465 14:44:19.956222 in-header: 03 a1 00 00 08 00 00 00
466 14:44:19.956372 in-data: 84 60 60 10 00 00 00 00
467 14:44:19.956523 ADC[3]: Raw value=215404 ID=1
468 14:44:19.956673 Manufacturer: ef
469 14:44:19.956825 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
470 14:44:19.956980 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
471 14:44:19.957136 CBFS @ 21000 size 3d4000
472 14:44:19.957286 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
473 14:44:19.957449 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
474 14:44:19.957605 CBFS: Found @ offset 3c700 size 44
475 14:44:19.957759 DRAM-K: Full Calibration
476 14:44:19.957924 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
477 14:44:19.958083 CBFS @ 21000 size 3d4000
478 14:44:19.958234 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
479 14:44:19.958387 CBFS: Locating 'fallback/dram'
480 14:44:19.958538 CBFS: Found @ offset 24b00 size 12268
481 14:44:19.958691 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
482 14:44:19.958844 ddr_geometry: 1, config: 0x0
483 14:44:19.958998 header.status = 0x0
484 14:44:19.959148 header.magic = 0x44524d4b (expected: 0x44524d4b)
485 14:44:19.959300 header.version = 0x5 (expected: 0x5)
486 14:44:19.959735 header.size = 0x8f0 (expected: 0x8f0)
487 14:44:19.960055 header.config = 0x0
488 14:44:19.960386 header.flags = 0x0
489 14:44:19.960716 header.checksum = 0x0
490 14:44:19.960998 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
491 14:44:19.961203 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
492 14:44:19.961396 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
493 14:44:19.961556 ddr_geometry:1
494 14:44:19.961685 [EMI] new MDL number = 1
495 14:44:19.961811 dram_cbt_mode_extern: 0
496 14:44:19.961935 dram_cbt_mode [RK0]: 0, [RK1]: 0
497 14:44:19.962058 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
498 14:44:19.962182
499 14:44:19.962303
500 14:44:19.962426 [Bianco] ETT version 0.0.0.1
501 14:44:19.962550 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
502 14:44:19.962674
503 14:44:19.962797 vSetVcoreByFreq with vcore:762500, freq=1600
504 14:44:19.962926
505 14:44:19.963047 [DramcInit]
506 14:44:19.963168 AutoRefreshCKEOff AutoREF OFF
507 14:44:19.963289 DDRPhyPLLSetting-CKEOFF
508 14:44:19.963411 DDRPhyPLLSetting-CKEON
509 14:44:19.963532
510 14:44:19.963654 Enable WDQS
511 14:44:19.963774 [ModeRegInit_LP4] CH0 RK0
512 14:44:19.963896 Write Rank0 MR13 =0x18
513 14:44:19.964018 Write Rank0 MR12 =0x5d
514 14:44:19.964140 Write Rank0 MR1 =0x56
515 14:44:19.964278 Write Rank0 MR2 =0x1a
516 14:44:19.964404 Write Rank0 MR11 =0x0
517 14:44:19.964533 Write Rank0 MR22 =0x38
518 14:44:19.964656 Write Rank0 MR14 =0x5d
519 14:44:19.964777 Write Rank0 MR3 =0x30
520 14:44:19.964899 Write Rank0 MR13 =0x58
521 14:44:19.965020 Write Rank0 MR12 =0x5d
522 14:44:19.965141 Write Rank0 MR1 =0x56
523 14:44:19.965261 Write Rank0 MR2 =0x2d
524 14:44:19.965381 Write Rank0 MR11 =0x23
525 14:44:19.965522 Write Rank0 MR22 =0x34
526 14:44:19.965645 Write Rank0 MR14 =0x10
527 14:44:19.965765 Write Rank0 MR3 =0x30
528 14:44:19.965884 Write Rank0 MR13 =0xd8
529 14:44:19.965985 [ModeRegInit_LP4] CH0 RK1
530 14:44:19.966086 Write Rank1 MR13 =0x18
531 14:44:19.966186 Write Rank1 MR12 =0x5d
532 14:44:19.966287 Write Rank1 MR1 =0x56
533 14:44:19.966388 Write Rank1 MR2 =0x1a
534 14:44:19.966489 Write Rank1 MR11 =0x0
535 14:44:19.966590 Write Rank1 MR22 =0x38
536 14:44:19.966691 Write Rank1 MR14 =0x5d
537 14:44:19.966790 Write Rank1 MR3 =0x30
538 14:44:19.966891 Write Rank1 MR13 =0x58
539 14:44:19.966991 Write Rank1 MR12 =0x5d
540 14:44:19.967092 Write Rank1 MR1 =0x56
541 14:44:19.967193 Write Rank1 MR2 =0x2d
542 14:44:19.967295 Write Rank1 MR11 =0x23
543 14:44:19.967395 Write Rank1 MR22 =0x34
544 14:44:19.967495 Write Rank1 MR14 =0x10
545 14:44:19.967595 Write Rank1 MR3 =0x30
546 14:44:19.967703 Write Rank1 MR13 =0xd8
547 14:44:19.967805 [ModeRegInit_LP4] CH1 RK0
548 14:44:19.967906 Write Rank0 MR13 =0x18
549 14:44:19.968006 Write Rank0 MR12 =0x5d
550 14:44:19.968108 Write Rank0 MR1 =0x56
551 14:44:19.968209 Write Rank0 MR2 =0x1a
552 14:44:19.968310 Write Rank0 MR11 =0x0
553 14:44:19.968411 Write Rank0 MR22 =0x38
554 14:44:19.968511 Write Rank0 MR14 =0x5d
555 14:44:19.968611 Write Rank0 MR3 =0x30
556 14:44:19.968712 Write Rank0 MR13 =0x58
557 14:44:19.968812 Write Rank0 MR12 =0x5d
558 14:44:19.968913 Write Rank0 MR1 =0x56
559 14:44:19.969013 Write Rank0 MR2 =0x2d
560 14:44:19.969114 Write Rank0 MR11 =0x23
561 14:44:19.969215 Write Rank0 MR22 =0x34
562 14:44:19.969315 Write Rank0 MR14 =0x10
563 14:44:19.969415 Write Rank0 MR3 =0x30
564 14:44:19.969580 Write Rank0 MR13 =0xd8
565 14:44:19.969734 [ModeRegInit_LP4] CH1 RK1
566 14:44:19.969841 Write Rank1 MR13 =0x18
567 14:44:19.969944 Write Rank1 MR12 =0x5d
568 14:44:19.970045 Write Rank1 MR1 =0x56
569 14:44:19.970146 Write Rank1 MR2 =0x1a
570 14:44:19.970246 Write Rank1 MR11 =0x0
571 14:44:19.970347 Write Rank1 MR22 =0x38
572 14:44:19.970448 Write Rank1 MR14 =0x5d
573 14:44:19.970549 Write Rank1 MR3 =0x30
574 14:44:19.970649 Write Rank1 MR13 =0x58
575 14:44:19.970750 Write Rank1 MR12 =0x5d
576 14:44:19.970864 Write Rank1 MR1 =0x56
577 14:44:19.970958 Write Rank1 MR2 =0x2d
578 14:44:19.971047 Write Rank1 MR11 =0x23
579 14:44:19.971134 Write Rank1 MR22 =0x34
580 14:44:19.971221 Write Rank1 MR14 =0x10
581 14:44:19.971309 Write Rank1 MR3 =0x30
582 14:44:19.971396 Write Rank1 MR13 =0xd8
583 14:44:19.971482 match AC timing 3
584 14:44:19.971570 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
585 14:44:19.971659 [MiockJmeterHQA]
586 14:44:19.971746 vSetVcoreByFreq with vcore:762500, freq=1600
587 14:44:19.971834
588 14:44:19.971922 MIOCK jitter meter ch=0
589 14:44:19.972010
590 14:44:19.972096 1T = (102-18) = 84 dly cells
591 14:44:19.972187 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
592 14:44:19.972275 vSetVcoreByFreq with vcore:725000, freq=1200
593 14:44:19.972363
594 14:44:19.972449 MIOCK jitter meter ch=0
595 14:44:19.972536
596 14:44:19.972622 1T = (97-17) = 80 dly cells
597 14:44:19.972711 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
598 14:44:19.972799 vSetVcoreByFreq with vcore:725000, freq=800
599 14:44:19.972887
600 14:44:19.972974 MIOCK jitter meter ch=0
601 14:44:19.973061
602 14:44:19.973146 1T = (97-17) = 80 dly cells
603 14:44:19.973236 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
604 14:44:19.973324 vSetVcoreByFreq with vcore:762500, freq=1600
605 14:44:19.973411 vSetVcoreByFreq with vcore:762500, freq=1600
606 14:44:19.973512
607 14:44:19.973601 K DRVP
608 14:44:19.973687 1. OCD DRVP=0 CALOUT=0
609 14:44:19.973777 1. OCD DRVP=1 CALOUT=0
610 14:44:19.973867 1. OCD DRVP=2 CALOUT=0
611 14:44:19.973956 1. OCD DRVP=3 CALOUT=0
612 14:44:19.974053 1. OCD DRVP=4 CALOUT=0
613 14:44:19.974143 1. OCD DRVP=5 CALOUT=0
614 14:44:19.974232 1. OCD DRVP=6 CALOUT=0
615 14:44:19.974321 1. OCD DRVP=7 CALOUT=0
616 14:44:19.974410 1. OCD DRVP=8 CALOUT=1
617 14:44:19.974499
618 14:44:19.974586 1. OCD DRVP calibration OK! DRVP=8
619 14:44:19.974675
620 14:44:19.974762
621 14:44:19.974849
622 14:44:19.974935 K ODTN
623 14:44:19.975022 3. OCD ODTN=0 ,CALOUT=1
624 14:44:19.975115 3. OCD ODTN=1 ,CALOUT=1
625 14:44:19.975204 3. OCD ODTN=2 ,CALOUT=1
626 14:44:19.975293 3. OCD ODTN=3 ,CALOUT=1
627 14:44:19.975382 3. OCD ODTN=4 ,CALOUT=1
628 14:44:19.975471 3. OCD ODTN=5 ,CALOUT=1
629 14:44:19.975560 3. OCD ODTN=6 ,CALOUT=1
630 14:44:19.975650 3. OCD ODTN=7 ,CALOUT=0
631 14:44:19.975737
632 14:44:19.975835 3. OCD ODTN calibration OK! ODTN=7
633 14:44:19.975913
634 14:44:19.975988 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
635 14:44:19.976065 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
636 14:44:19.976142 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
637 14:44:19.976219
638 14:44:19.976295 K DRVP
639 14:44:19.976370 1. OCD DRVP=0 CALOUT=0
640 14:44:19.976449 1. OCD DRVP=1 CALOUT=0
641 14:44:19.976527 1. OCD DRVP=2 CALOUT=0
642 14:44:19.976605 1. OCD DRVP=3 CALOUT=0
643 14:44:19.976683 1. OCD DRVP=4 CALOUT=0
644 14:44:19.976761 1. OCD DRVP=5 CALOUT=0
645 14:44:19.976838 1. OCD DRVP=6 CALOUT=0
646 14:44:19.976915 1. OCD DRVP=7 CALOUT=0
647 14:44:19.976993 1. OCD DRVP=8 CALOUT=0
648 14:44:19.977070 1. OCD DRVP=9 CALOUT=0
649 14:44:19.977147 1. OCD DRVP=10 CALOUT=1
650 14:44:19.977224
651 14:44:19.977490 1. OCD DRVP calibration OK! DRVP=10
652 14:44:19.977655
653 14:44:19.977808
654 14:44:19.977959
655 14:44:19.978103 K ODTN
656 14:44:19.978233 3. OCD ODTN=0 ,CALOUT=1
657 14:44:19.978357 3. OCD ODTN=1 ,CALOUT=1
658 14:44:19.978479 3. OCD ODTN=2 ,CALOUT=1
659 14:44:19.978600 3. OCD ODTN=3 ,CALOUT=1
660 14:44:19.978721 3. OCD ODTN=4 ,CALOUT=1
661 14:44:19.978841 3. OCD ODTN=5 ,CALOUT=1
662 14:44:19.978962 3. OCD ODTN=6 ,CALOUT=1
663 14:44:19.979082 3. OCD ODTN=7 ,CALOUT=1
664 14:44:19.979202 3. OCD ODTN=8 ,CALOUT=1
665 14:44:19.979323 3. OCD ODTN=9 ,CALOUT=1
666 14:44:19.979443 3. OCD ODTN=10 ,CALOUT=1
667 14:44:19.979563 3. OCD ODTN=11 ,CALOUT=1
668 14:44:19.979683 3. OCD ODTN=12 ,CALOUT=1
669 14:44:19.979802 3. OCD ODTN=13 ,CALOUT=1
670 14:44:19.979923 3. OCD ODTN=14 ,CALOUT=1
671 14:44:19.980043 3. OCD ODTN=15 ,CALOUT=0
672 14:44:19.980162
673 14:44:19.980279 3. OCD ODTN calibration OK! ODTN=15
674 14:44:19.980399
675 14:44:19.980517 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
676 14:44:19.980635 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
677 14:44:19.980751 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
678 14:44:19.980833
679 14:44:19.980915 [DramcInit]
680 14:44:19.980983 AutoRefreshCKEOff AutoREF OFF
681 14:44:19.981051 DDRPhyPLLSetting-CKEOFF
682 14:44:19.981119 DDRPhyPLLSetting-CKEON
683 14:44:19.981187
684 14:44:19.981255 Enable WDQS
685 14:44:19.981323 ==
686 14:44:19.981391 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 14:44:19.981473 fsp= 1, odt_onoff= 1, Byte mode= 0
688 14:44:19.981542 ==
689 14:44:19.981611 [Duty_Offset_Calibration]
690 14:44:19.981679
691 14:44:19.981747 ===========================
692 14:44:19.981816 B0:1 B1:-1 CA:0
693 14:44:19.981883 ==
694 14:44:19.981951 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 14:44:19.982020 fsp= 1, odt_onoff= 1, Byte mode= 0
696 14:44:19.982088 ==
697 14:44:19.982156 [Duty_Offset_Calibration]
698 14:44:19.982223
699 14:44:19.982291 ===========================
700 14:44:19.982360 B0:1 B1:0 CA:0
701 14:44:19.982427 [ModeRegInit_LP4] CH0 RK0
702 14:44:19.982494 Write Rank0 MR13 =0x18
703 14:44:19.982562 Write Rank0 MR12 =0x5d
704 14:44:19.982630 Write Rank0 MR1 =0x56
705 14:44:19.982698 Write Rank0 MR2 =0x1a
706 14:44:19.982765 Write Rank0 MR11 =0x0
707 14:44:19.982833 Write Rank0 MR22 =0x38
708 14:44:19.982900 Write Rank0 MR14 =0x5d
709 14:44:19.982968 Write Rank0 MR3 =0x30
710 14:44:19.983035 Write Rank0 MR13 =0x58
711 14:44:19.983102 Write Rank0 MR12 =0x5d
712 14:44:19.983169 Write Rank0 MR1 =0x56
713 14:44:19.983236 Write Rank0 MR2 =0x2d
714 14:44:19.983303 Write Rank0 MR11 =0x23
715 14:44:19.983371 Write Rank0 MR22 =0x34
716 14:44:19.983438 Write Rank0 MR14 =0x10
717 14:44:19.983506 Write Rank0 MR3 =0x30
718 14:44:19.983573 Write Rank0 MR13 =0xd8
719 14:44:19.983641 [ModeRegInit_LP4] CH0 RK1
720 14:44:19.983708 Write Rank1 MR13 =0x18
721 14:44:19.983775 Write Rank1 MR12 =0x5d
722 14:44:19.983842 Write Rank1 MR1 =0x56
723 14:44:19.983910 Write Rank1 MR2 =0x1a
724 14:44:19.983977 Write Rank1 MR11 =0x0
725 14:44:19.984045 Write Rank1 MR22 =0x38
726 14:44:19.984112 Write Rank1 MR14 =0x5d
727 14:44:19.984180 Write Rank1 MR3 =0x30
728 14:44:19.984247 Write Rank1 MR13 =0x58
729 14:44:19.984321 Write Rank1 MR12 =0x5d
730 14:44:19.984389 Write Rank1 MR1 =0x56
731 14:44:19.984457 Write Rank1 MR2 =0x2d
732 14:44:19.984525 Write Rank1 MR11 =0x23
733 14:44:19.984592 Write Rank1 MR22 =0x34
734 14:44:19.984659 Write Rank1 MR14 =0x10
735 14:44:19.984727 Write Rank1 MR3 =0x30
736 14:44:19.984793 Write Rank1 MR13 =0xd8
737 14:44:19.984861 [ModeRegInit_LP4] CH1 RK0
738 14:44:19.984929 Write Rank0 MR13 =0x18
739 14:44:19.984997 Write Rank0 MR12 =0x5d
740 14:44:19.985064 Write Rank0 MR1 =0x56
741 14:44:19.985132 Write Rank0 MR2 =0x1a
742 14:44:19.985199 Write Rank0 MR11 =0x0
743 14:44:19.985266 Write Rank0 MR22 =0x38
744 14:44:19.985334 Write Rank0 MR14 =0x5d
745 14:44:19.985401 Write Rank0 MR3 =0x30
746 14:44:19.985480 Write Rank0 MR13 =0x58
747 14:44:19.985548 Write Rank0 MR12 =0x5d
748 14:44:19.985616 Write Rank0 MR1 =0x56
749 14:44:19.985683 Write Rank0 MR2 =0x2d
750 14:44:19.985750 Write Rank0 MR11 =0x23
751 14:44:19.985831 Write Rank0 MR22 =0x34
752 14:44:19.985891 Write Rank0 MR14 =0x10
753 14:44:19.985951 Write Rank0 MR3 =0x30
754 14:44:19.986012 Write Rank0 MR13 =0xd8
755 14:44:19.986073 [ModeRegInit_LP4] CH1 RK1
756 14:44:19.986133 Write Rank1 MR13 =0x18
757 14:44:19.986194 Write Rank1 MR12 =0x5d
758 14:44:19.986253 Write Rank1 MR1 =0x56
759 14:44:19.986314 Write Rank1 MR2 =0x1a
760 14:44:19.986375 Write Rank1 MR11 =0x0
761 14:44:19.986436 Write Rank1 MR22 =0x38
762 14:44:19.986497 Write Rank1 MR14 =0x5d
763 14:44:19.986557 Write Rank1 MR3 =0x30
764 14:44:19.986618 Write Rank1 MR13 =0x58
765 14:44:19.986678 Write Rank1 MR12 =0x5d
766 14:44:19.986744 Write Rank1 MR1 =0x56
767 14:44:19.986817 Write Rank1 MR2 =0x2d
768 14:44:19.986878 Write Rank1 MR11 =0x23
769 14:44:19.986938 Write Rank1 MR22 =0x34
770 14:44:19.986999 Write Rank1 MR14 =0x10
771 14:44:19.987060 Write Rank1 MR3 =0x30
772 14:44:19.987142 Write Rank1 MR13 =0xd8
773 14:44:19.987206 match AC timing 3
774 14:44:19.987268 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 14:44:19.987333 DramC Write-DBI off
776 14:44:19.987394 DramC Read-DBI off
777 14:44:19.987455 Write Rank0 MR13 =0x59
778 14:44:19.987515 ==
779 14:44:19.987576 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 14:44:19.987638 fsp= 1, odt_onoff= 1, Byte mode= 0
781 14:44:19.987699 ==
782 14:44:19.987760 === u2Vref_new: 0x56 --> 0x2d
783 14:44:19.987822 === u2Vref_new: 0x58 --> 0x38
784 14:44:19.987884 === u2Vref_new: 0x5a --> 0x39
785 14:44:19.987945 === u2Vref_new: 0x5c --> 0x3c
786 14:44:19.988006 === u2Vref_new: 0x5e --> 0x3d
787 14:44:19.988068 === u2Vref_new: 0x60 --> 0xa0
788 14:44:19.988128 [CA 0] Center 34 (6~63) winsize 58
789 14:44:19.988189 [CA 1] Center 35 (8~63) winsize 56
790 14:44:19.988250 [CA 2] Center 28 (-1~58) winsize 60
791 14:44:19.988312 [CA 3] Center 24 (-4~52) winsize 57
792 14:44:19.988373 [CA 4] Center 24 (-4~52) winsize 57
793 14:44:19.988433 [CA 5] Center 29 (1~58) winsize 58
794 14:44:19.988494
795 14:44:19.988555 [CATrainingPosCal] consider 1 rank data
796 14:44:19.988616 u2DelayCellTimex100 = 744/100 ps
797 14:44:19.988677 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
798 14:44:19.988738 CA1 delay=35 (8~63),Diff = 11 PI (14 cell)
799 14:44:19.988799 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
800 14:44:19.988860 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
801 14:44:19.988920 CA4 delay=24 (-4~52),Diff = 0 PI (0 cell)
802 14:44:19.988981 CA5 delay=29 (1~58),Diff = 5 PI (6 cell)
803 14:44:19.989042
804 14:44:19.989104 CA PerBit enable=1, Macro0, CA PI delay=24
805 14:44:19.989213 === u2Vref_new: 0x5a --> 0x39
806 14:44:19.989282
807 14:44:19.989344 Vref(ca) range 1: 26
808 14:44:19.989406
809 14:44:19.989474 CS Dly= 7 (38-0-32)
810 14:44:19.989535 Write Rank0 MR13 =0xd8
811 14:44:19.989597 Write Rank0 MR13 =0xd8
812 14:44:19.989657 Write Rank0 MR12 =0x5a
813 14:44:19.989718 Write Rank1 MR13 =0x59
814 14:44:19.989779 ==
815 14:44:19.990063 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
816 14:44:19.990175 fsp= 1, odt_onoff= 1, Byte mode= 0
817 14:44:19.990300 ==
818 14:44:19.990422 === u2Vref_new: 0x56 --> 0x2d
819 14:44:19.990544 === u2Vref_new: 0x58 --> 0x38
820 14:44:19.990651 === u2Vref_new: 0x5a --> 0x39
821 14:44:19.990748 === u2Vref_new: 0x5c --> 0x3c
822 14:44:19.990843 === u2Vref_new: 0x5e --> 0x3d
823 14:44:19.990939 === u2Vref_new: 0x60 --> 0xa0
824 14:44:19.991034 [CA 0] Center 35 (8~63) winsize 56
825 14:44:19.991128 [CA 1] Center 35 (7~63) winsize 57
826 14:44:19.991223 [CA 2] Center 28 (-1~58) winsize 60
827 14:44:19.991317 [CA 3] Center 23 (-5~51) winsize 57
828 14:44:19.991411 [CA 4] Center 23 (-5~51) winsize 57
829 14:44:19.991505 [CA 5] Center 29 (0~59) winsize 60
830 14:44:19.991599
831 14:44:19.991693 [CATrainingPosCal] consider 2 rank data
832 14:44:19.991788 u2DelayCellTimex100 = 744/100 ps
833 14:44:19.991882 CA0 delay=35 (8~63),Diff = 12 PI (15 cell)
834 14:44:19.991977 CA1 delay=35 (8~63),Diff = 12 PI (15 cell)
835 14:44:19.992072 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
836 14:44:19.992166 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
837 14:44:19.992260 CA4 delay=23 (-4~51),Diff = 0 PI (0 cell)
838 14:44:19.992354 CA5 delay=29 (1~58),Diff = 6 PI (7 cell)
839 14:44:19.992448
840 14:44:19.992542 CA PerBit enable=1, Macro0, CA PI delay=23
841 14:44:19.992636 === u2Vref_new: 0x5e --> 0x3d
842 14:44:19.992730
843 14:44:19.992823 Vref(ca) range 1: 30
844 14:44:19.992916
845 14:44:19.993009 CS Dly= 5 (36-0-32)
846 14:44:19.993104 Write Rank1 MR13 =0xd8
847 14:44:19.993197 Write Rank1 MR13 =0xd8
848 14:44:19.993291 Write Rank1 MR12 =0x5e
849 14:44:19.993385 [RankSwap] Rank num 2, (Multi 1), Rank 0
850 14:44:19.993475 Write Rank0 MR2 =0xad
851 14:44:19.993539 [Write Leveling]
852 14:44:19.993600 delay byte0 byte1 byte2 byte3
853 14:44:19.993669
854 14:44:19.993731 10 0 0
855 14:44:19.993795 11 0 0
856 14:44:19.993857 12 0 0
857 14:44:19.993920 13 0 0
858 14:44:19.993983 14 0 0
859 14:44:19.994046 15 0 0
860 14:44:19.994108 16 0 0
861 14:44:19.994170 17 0 0
862 14:44:19.994233 18 0 0
863 14:44:19.994295 19 0 0
864 14:44:19.994357 20 0 0
865 14:44:19.994430 21 0 0
866 14:44:19.994500 22 0 0
867 14:44:19.994570 23 0 0
868 14:44:19.994637 24 0 0
869 14:44:19.994710 25 0 0
870 14:44:19.994774 26 0 ff
871 14:44:19.994847 27 0 ff
872 14:44:19.994950 28 0 ff
873 14:44:19.995051 29 0 ff
874 14:44:19.995149 30 0 ff
875 14:44:19.995220 31 0 ff
876 14:44:19.995288 32 ff ff
877 14:44:19.995393 33 ff ff
878 14:44:19.995495 34 ff ff
879 14:44:19.995599 35 ff ff
880 14:44:19.995704 36 ff ff
881 14:44:19.995804 37 ff ff
882 14:44:19.995910 38 ff ff
883 14:44:19.996011 pass bytecount = 0xff (0xff: all bytes pass)
884 14:44:19.996113
885 14:44:19.996210 DQS0 dly: 32
886 14:44:19.996307 DQS1 dly: 26
887 14:44:19.996384 Write Rank0 MR2 =0x2d
888 14:44:19.996450 [RankSwap] Rank num 2, (Multi 1), Rank 0
889 14:44:19.996514 Write Rank0 MR1 =0xd6
890 14:44:19.996599 [Gating]
891 14:44:19.996698 ==
892 14:44:19.996796 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
893 14:44:19.996891 fsp= 1, odt_onoff= 1, Byte mode= 0
894 14:44:19.996988 ==
895 14:44:19.997086 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
896 14:44:19.997189 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
897 14:44:19.997290 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
898 14:44:19.997398 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
899 14:44:19.997490 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
900 14:44:19.997556 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
901 14:44:19.997625 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 14:44:19.997690 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 14:44:19.997758 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 14:44:19.997822 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
905 14:44:19.997893 3 2 8 |2c2c 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
906 14:44:19.997960 3 2 12 |201 2c2c |(11 11)(11 1) |(0 0)(0 0)| 0
907 14:44:19.998024 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
908 14:44:19.998092 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
909 14:44:19.998156 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 14:44:19.998258 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 14:44:19.998357 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 14:44:19.998461 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
913 14:44:19.998559 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
914 14:44:19.998656 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
915 14:44:19.998754 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 14:44:19.998850 [Byte 0] Lead/lag Transition tap number (1)
917 14:44:19.998945 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
918 14:44:19.999042 [Byte 1] Lead/lag falling Transition (3, 3, 20)
919 14:44:19.999137 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 14:44:19.999233 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 14:44:19.999330 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
922 14:44:19.999426 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
923 14:44:19.999523 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
924 14:44:19.999619 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
925 14:44:19.999716 3 4 16 |1e1d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
926 14:44:19.999813 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
927 14:44:19.999910 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 14:44:20.000006 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 14:44:20.000103 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 14:44:20.000199 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 14:44:20.000296 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 14:44:20.000396 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 14:44:20.000493 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 14:44:20.000593 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 14:44:20.000701 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 14:44:20.000798 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 14:44:20.000896 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
938 14:44:20.001198 [Byte 0] Lead/lag falling Transition (3, 6, 0)
939 14:44:20.001298 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
940 14:44:20.001396 [Byte 1] Lead/lag falling Transition (3, 6, 4)
941 14:44:20.001484 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
942 14:44:20.001549 [Byte 0] Lead/lag Transition tap number (3)
943 14:44:20.001612 3 6 12 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
944 14:44:20.001676 [Byte 1] Lead/lag Transition tap number (3)
945 14:44:20.001737 3 6 16 |3c3c 202 |(11 11)(11 11) |(0 0)(0 0)| 0
946 14:44:20.001800 3 6 20 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
947 14:44:20.001863 [Byte 0]First pass (3, 6, 20)
948 14:44:20.001923 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 14:44:20.001986 [Byte 1]First pass (3, 6, 24)
950 14:44:20.002048 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 14:44:20.002110 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 14:44:20.002173 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 14:44:20.002262 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 14:44:20.002365 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 14:44:20.002432 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 14:44:20.002495 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
957 14:44:20.002559 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
958 14:44:20.002622 All bytes gating window > 1UI, Early break!
959 14:44:20.002683
960 14:44:20.002745 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
961 14:44:20.002807
962 14:44:20.002869 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
963 14:44:20.002930
964 14:44:20.002991
965 14:44:20.003051
966 14:44:20.003112 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
967 14:44:20.003173
968 14:44:20.003234 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
969 14:44:20.003296
970 14:44:20.003356
971 14:44:20.003417 Write Rank0 MR1 =0x56
972 14:44:20.003478
973 14:44:20.003538 best RODT dly(2T, 0.5T) = (2, 3)
974 14:44:20.003599
975 14:44:20.003660 best RODT dly(2T, 0.5T) = (2, 3)
976 14:44:20.003720 ==
977 14:44:20.003781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 14:44:20.003848 fsp= 1, odt_onoff= 1, Byte mode= 0
979 14:44:20.003911 ==
980 14:44:20.003972 Start DQ dly to find pass range UseTestEngine =0
981 14:44:20.004033 x-axis: bit #, y-axis: DQ dly (-127~63)
982 14:44:20.004094 RX Vref Scan = 0
983 14:44:20.004154 -26, [0] xxxxxxxx xxxxxxxx [MSB]
984 14:44:20.004220 -25, [0] xxxxxxxx xxxxxxxx [MSB]
985 14:44:20.004283 -24, [0] xxxxxxxx xxxxxxxx [MSB]
986 14:44:20.004345 -23, [0] xxxxxxxx xxxxxxxx [MSB]
987 14:44:20.004408 -22, [0] xxxxxxxx xxxxxxxx [MSB]
988 14:44:20.004470 -21, [0] xxxxxxxx xxxxxxxx [MSB]
989 14:44:20.004532 -20, [0] xxxxxxxx xxxxxxxx [MSB]
990 14:44:20.004595 -19, [0] xxxxxxxx xxxxxxxx [MSB]
991 14:44:20.004657 -18, [0] xxxxxxxx xxxxxxxx [MSB]
992 14:44:20.004719 -17, [0] xxxxxxxx xxxxxxxx [MSB]
993 14:44:20.004780 -16, [0] xxxxxxxx xxxxxxxx [MSB]
994 14:44:20.004843 -15, [0] xxxxxxxx xxxxxxxx [MSB]
995 14:44:20.004905 -14, [0] xxxxxxxx xxxxxxxx [MSB]
996 14:44:20.004967 -13, [0] xxxxxxxx xxxxxxxx [MSB]
997 14:44:20.005030 -12, [0] xxxxxxxx xxxxxxxx [MSB]
998 14:44:20.005092 -11, [0] xxxxxxxx xxxxxxxx [MSB]
999 14:44:20.005155 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1000 14:44:20.005217 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1001 14:44:20.005279 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1002 14:44:20.005342 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1003 14:44:20.005404 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1004 14:44:20.005480 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1005 14:44:20.005543 -4, [0] xxxxxxxx oxxxxxxx [MSB]
1006 14:44:20.005605 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1007 14:44:20.005668 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1008 14:44:20.005730 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1009 14:44:20.005792 0, [0] xxxoxxxx ooxoxoxx [MSB]
1010 14:44:20.005855 1, [0] xxxoxoxx ooxoooox [MSB]
1011 14:44:20.005918 2, [0] xxxoxoox ooxoooox [MSB]
1012 14:44:20.005982 3, [0] xxxoxoox ooxoooox [MSB]
1013 14:44:20.006045 4, [0] xxxoxoox ooxooooo [MSB]
1014 14:44:20.006106 5, [0] xxxooooo ooxooooo [MSB]
1015 14:44:20.006168 6, [0] xxxooooo ooxooooo [MSB]
1016 14:44:20.006230 32, [0] oooxoooo oooooooo [MSB]
1017 14:44:20.006293 33, [0] oooxoooo xooooooo [MSB]
1018 14:44:20.006355 34, [0] oooxoooo xooxoooo [MSB]
1019 14:44:20.006418 35, [0] oooxoooo xxoxoooo [MSB]
1020 14:44:20.006480 36, [0] oooxoxoo xxoxxoxo [MSB]
1021 14:44:20.006542 37, [0] oooxoxxx xxoxxxxo [MSB]
1022 14:44:20.006604 38, [0] oooxoxxx xxoxxxxo [MSB]
1023 14:44:20.006666 39, [0] oooxoxxx xxoxxxxx [MSB]
1024 14:44:20.006729 40, [0] ooxxxxxx xxoxxxxx [MSB]
1025 14:44:20.006798 41, [0] xxxxxxxx xxoxxxxx [MSB]
1026 14:44:20.006863 42, [0] xxxxxxxx xxxxxxxx [MSB]
1027 14:44:20.006930 iDelay=42, Bit 0, Center 23 (7 ~ 40) 34
1028 14:44:20.006992 iDelay=42, Bit 1, Center 23 (7 ~ 40) 34
1029 14:44:20.007053 iDelay=42, Bit 2, Center 23 (7 ~ 39) 33
1030 14:44:20.007114 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
1031 14:44:20.007175 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
1032 14:44:20.007235 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
1033 14:44:20.007295 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
1034 14:44:20.007355 iDelay=42, Bit 7, Center 20 (5 ~ 36) 32
1035 14:44:20.007415 iDelay=42, Bit 8, Center 14 (-4 ~ 32) 37
1036 14:44:20.007475 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
1037 14:44:20.007534 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
1038 14:44:20.007595 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
1039 14:44:20.007654 iDelay=42, Bit 12, Center 18 (1 ~ 35) 35
1040 14:44:20.007715 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1041 14:44:20.007774 iDelay=42, Bit 14, Center 18 (1 ~ 35) 35
1042 14:44:20.007834 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
1043 14:44:20.007894 ==
1044 14:44:20.007954 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1045 14:44:20.008015 fsp= 1, odt_onoff= 1, Byte mode= 0
1046 14:44:20.008075 ==
1047 14:44:20.008136 DQS Delay:
1048 14:44:20.008196 DQS0 = 0, DQS1 = 0
1049 14:44:20.008258 DQM Delay:
1050 14:44:20.008318 DQM0 = 20, DQM1 = 18
1051 14:44:20.008379 DQ Delay:
1052 14:44:20.008438 DQ0 =23, DQ1 =23, DQ2 =23, DQ3 =14
1053 14:44:20.008498 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
1054 14:44:20.008557 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
1055 14:44:20.008617 DQ12 =18, DQ13 =18, DQ14 =18, DQ15 =21
1056 14:44:20.008678
1057 14:44:20.008738
1058 14:44:20.008797 DramC Write-DBI off
1059 14:44:20.008857 ==
1060 14:44:20.008917 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1061 14:44:20.008977 fsp= 1, odt_onoff= 1, Byte mode= 0
1062 14:44:20.009037 ==
1063 14:44:20.009097 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1064 14:44:20.009158
1065 14:44:20.009217 Begin, DQ Scan Range 922~1178
1066 14:44:20.009277
1067 14:44:20.009337
1068 14:44:20.009600 TX Vref Scan disable
1069 14:44:20.009702 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1070 14:44:20.009826 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1071 14:44:20.009948 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1072 14:44:20.010071 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1073 14:44:20.010194 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1074 14:44:20.010316 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1075 14:44:20.010440 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1076 14:44:20.010562 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1077 14:44:20.010669 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1078 14:44:20.010769 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1079 14:44:20.010865 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1080 14:44:20.010961 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1081 14:44:20.011057 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1082 14:44:20.011152 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1083 14:44:20.011248 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1084 14:44:20.011344 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1085 14:44:20.011439 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1086 14:44:20.011535 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1087 14:44:20.011630 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1088 14:44:20.011725 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1089 14:44:20.011820 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1090 14:44:20.011916 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1091 14:44:20.012011 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1092 14:44:20.012106 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1093 14:44:20.012201 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1094 14:44:20.012297 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1095 14:44:20.012392 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1096 14:44:20.012488 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1097 14:44:20.012583 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1098 14:44:20.012678 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1099 14:44:20.012773 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1100 14:44:20.012869 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1101 14:44:20.012965 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1102 14:44:20.013060 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1103 14:44:20.013155 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1104 14:44:20.013250 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1105 14:44:20.013345 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1106 14:44:20.013447 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1107 14:44:20.013513 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1108 14:44:20.013574 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1109 14:44:20.013636 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1110 14:44:20.013706 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1111 14:44:20.013768 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1112 14:44:20.013829 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1113 14:44:20.013891 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1114 14:44:20.013953 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1115 14:44:20.014014 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1116 14:44:20.014075 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1117 14:44:20.014136 970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]
1118 14:44:20.014198 971 |3 6 11|[0] xxxxxxxx ooxoxxxx [MSB]
1119 14:44:20.014259 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1120 14:44:20.014321 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1121 14:44:20.014383 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1122 14:44:20.014444 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1123 14:44:20.014505 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1124 14:44:20.014566 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1125 14:44:20.014627 978 |3 6 18|[0] xxxoooox oooooooo [MSB]
1126 14:44:20.014688 979 |3 6 19|[0] xooooooo oooooooo [MSB]
1127 14:44:20.014749 980 |3 6 20|[0] xooooooo oooooooo [MSB]
1128 14:44:20.014811 989 |3 6 29|[0] oooooooo oooxoooo [MSB]
1129 14:44:20.014872 990 |3 6 30|[0] oooooooo xooxoxoo [MSB]
1130 14:44:20.014934 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1131 14:44:20.014995 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1132 14:44:20.015057 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1133 14:44:20.015118 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1134 14:44:20.015179 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1135 14:44:20.015241 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1136 14:44:20.015302 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1137 14:44:20.015364 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1138 14:44:20.015425 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1139 14:44:20.015486 Byte0, DQ PI dly=987, DQM PI dly= 987
1140 14:44:20.015546 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1141 14:44:20.015607
1142 14:44:20.015667 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1143 14:44:20.015728
1144 14:44:20.015788 Byte1, DQ PI dly=980, DQM PI dly= 980
1145 14:44:20.015848 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1146 14:44:20.015908
1147 14:44:20.015968 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1148 14:44:20.016028
1149 14:44:20.016088 ==
1150 14:44:20.016148 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1151 14:44:20.016209 fsp= 1, odt_onoff= 1, Byte mode= 0
1152 14:44:20.016269 ==
1153 14:44:20.016329 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1154 14:44:20.016389
1155 14:44:20.016448 Begin, DQ Scan Range 956~1020
1156 14:44:20.016508 Write Rank0 MR14 =0x0
1157 14:44:20.016568
1158 14:44:20.016628 CH=0, VrefRange= 0, VrefLevel = 0
1159 14:44:20.016688 TX Bit0 (984~993) 10 988, Bit8 (970~985) 16 977,
1160 14:44:20.016749 TX Bit1 (982~994) 13 988, Bit9 (973~986) 14 979,
1161 14:44:20.016815 TX Bit2 (983~995) 13 989, Bit10 (977~991) 15 984,
1162 14:44:20.016877 TX Bit3 (977~990) 14 983, Bit11 (972~982) 11 977,
1163 14:44:20.016938 TX Bit4 (982~993) 12 987, Bit12 (975~984) 10 979,
1164 14:44:20.016999 TX Bit5 (978~992) 15 985, Bit13 (975~984) 10 979,
1165 14:44:20.017059 TX Bit6 (979~992) 14 985, Bit14 (975~988) 14 981,
1166 14:44:20.017120 TX Bit7 (982~994) 13 988, Bit15 (977~990) 14 983,
1167 14:44:20.017180
1168 14:44:20.017240 Write Rank0 MR14 =0x2
1169 14:44:20.017299
1170 14:44:20.017358 CH=0, VrefRange= 0, VrefLevel = 2
1171 14:44:20.017419 TX Bit0 (983~995) 13 989, Bit8 (970~985) 16 977,
1172 14:44:20.017490 TX Bit1 (981~995) 15 988, Bit9 (973~987) 15 980,
1173 14:44:20.017551 TX Bit2 (984~995) 12 989, Bit10 (977~991) 15 984,
1174 14:44:20.017812 TX Bit3 (977~991) 15 984, Bit11 (972~983) 12 977,
1175 14:44:20.017919 TX Bit4 (982~993) 12 987, Bit12 (974~985) 12 979,
1176 14:44:20.018039 TX Bit5 (978~992) 15 985, Bit13 (975~985) 11 980,
1177 14:44:20.018159 TX Bit6 (979~992) 14 985, Bit14 (975~989) 15 982,
1178 14:44:20.018280 TX Bit7 (982~994) 13 988, Bit15 (976~991) 16 983,
1179 14:44:20.018384
1180 14:44:20.018482 Write Rank0 MR14 =0x4
1181 14:44:20.018573
1182 14:44:20.018666 CH=0, VrefRange= 0, VrefLevel = 4
1183 14:44:20.018760 TX Bit0 (983~995) 13 989, Bit8 (969~986) 18 977,
1184 14:44:20.018853 TX Bit1 (981~995) 15 988, Bit9 (973~987) 15 980,
1185 14:44:20.018947 TX Bit2 (983~996) 14 989, Bit10 (977~992) 16 984,
1186 14:44:20.019041 TX Bit3 (977~992) 16 984, Bit11 (971~984) 14 977,
1187 14:44:20.019134 TX Bit4 (981~994) 14 987, Bit12 (974~987) 14 980,
1188 14:44:20.019228 TX Bit5 (978~993) 16 985, Bit13 (974~986) 13 980,
1189 14:44:20.019321 TX Bit6 (978~993) 16 985, Bit14 (974~989) 16 981,
1190 14:44:20.019415 TX Bit7 (980~995) 16 987, Bit15 (976~992) 17 984,
1191 14:44:20.019507
1192 14:44:20.019599 Write Rank0 MR14 =0x6
1193 14:44:20.019690
1194 14:44:20.019783 CH=0, VrefRange= 0, VrefLevel = 6
1195 14:44:20.019876 TX Bit0 (983~996) 14 989, Bit8 (969~987) 19 978,
1196 14:44:20.019969 TX Bit1 (980~996) 17 988, Bit9 (972~988) 17 980,
1197 14:44:20.020063 TX Bit2 (982~997) 16 989, Bit10 (976~993) 18 984,
1198 14:44:20.020156 TX Bit3 (976~992) 17 984, Bit11 (970~985) 16 977,
1199 14:44:20.020234 TX Bit4 (980~994) 15 987, Bit12 (974~987) 14 980,
1200 14:44:20.020296 TX Bit5 (978~993) 16 985, Bit13 (974~987) 14 980,
1201 14:44:20.020357 TX Bit6 (979~994) 16 986, Bit14 (974~990) 17 982,
1202 14:44:20.020418 TX Bit7 (979~996) 18 987, Bit15 (976~992) 17 984,
1203 14:44:20.020478
1204 14:44:20.020537 Write Rank0 MR14 =0x8
1205 14:44:20.020597
1206 14:44:20.020656 CH=0, VrefRange= 0, VrefLevel = 8
1207 14:44:20.020716 TX Bit0 (983~998) 16 990, Bit8 (969~988) 20 978,
1208 14:44:20.020777 TX Bit1 (980~997) 18 988, Bit9 (972~988) 17 980,
1209 14:44:20.020837 TX Bit2 (982~998) 17 990, Bit10 (976~994) 19 985,
1210 14:44:20.020898 TX Bit3 (976~992) 17 984, Bit11 (970~986) 17 978,
1211 14:44:20.020959 TX Bit4 (979~995) 17 987, Bit12 (974~988) 15 981,
1212 14:44:20.021020 TX Bit5 (977~993) 17 985, Bit13 (974~988) 15 981,
1213 14:44:20.021080 TX Bit6 (978~994) 17 986, Bit14 (974~990) 17 982,
1214 14:44:20.021141 TX Bit7 (980~997) 18 988, Bit15 (976~993) 18 984,
1215 14:44:20.021200
1216 14:44:20.021260 Write Rank0 MR14 =0xa
1217 14:44:20.021320
1218 14:44:20.021380 CH=0, VrefRange= 0, VrefLevel = 10
1219 14:44:20.021453 TX Bit0 (982~998) 17 990, Bit8 (969~988) 20 978,
1220 14:44:20.021516 TX Bit1 (980~998) 19 989, Bit9 (970~989) 20 979,
1221 14:44:20.021577 TX Bit2 (981~998) 18 989, Bit10 (976~995) 20 985,
1222 14:44:20.021637 TX Bit3 (976~993) 18 984, Bit11 (970~986) 17 978,
1223 14:44:20.021697 TX Bit4 (979~996) 18 987, Bit12 (973~988) 16 980,
1224 14:44:20.021757 TX Bit5 (977~994) 18 985, Bit13 (973~988) 16 980,
1225 14:44:20.021818 TX Bit6 (978~995) 18 986, Bit14 (974~991) 18 982,
1226 14:44:20.021878 TX Bit7 (979~998) 20 988, Bit15 (976~994) 19 985,
1227 14:44:20.021938
1228 14:44:20.021997 Write Rank0 MR14 =0xc
1229 14:44:20.022057
1230 14:44:20.022117 CH=0, VrefRange= 0, VrefLevel = 12
1231 14:44:20.022176 TX Bit0 (982~999) 18 990, Bit8 (969~989) 21 979,
1232 14:44:20.022237 TX Bit1 (979~998) 20 988, Bit9 (971~989) 19 980,
1233 14:44:20.022297 TX Bit2 (981~999) 19 990, Bit10 (976~995) 20 985,
1234 14:44:20.022358 TX Bit3 (976~993) 18 984, Bit11 (969~987) 19 978,
1235 14:44:20.022419 TX Bit4 (979~997) 19 988, Bit12 (973~989) 17 981,
1236 14:44:20.022479 TX Bit5 (977~994) 18 985, Bit13 (973~989) 17 981,
1237 14:44:20.022539 TX Bit6 (977~996) 20 986, Bit14 (973~991) 19 982,
1238 14:44:20.022599 TX Bit7 (979~999) 21 989, Bit15 (975~994) 20 984,
1239 14:44:20.022660
1240 14:44:20.022719 Write Rank0 MR14 =0xe
1241 14:44:20.022779
1242 14:44:20.022838 CH=0, VrefRange= 0, VrefLevel = 14
1243 14:44:20.022898 TX Bit0 (982~999) 18 990, Bit8 (969~989) 21 979,
1244 14:44:20.022958 TX Bit1 (979~999) 21 989, Bit9 (970~989) 20 979,
1245 14:44:20.023018 TX Bit2 (980~999) 20 989, Bit10 (976~996) 21 986,
1246 14:44:20.023079 TX Bit3 (975~993) 19 984, Bit11 (969~988) 20 978,
1247 14:44:20.023140 TX Bit4 (978~998) 21 988, Bit12 (972~989) 18 980,
1248 14:44:20.023199 TX Bit5 (977~995) 19 986, Bit13 (972~989) 18 980,
1249 14:44:20.023259 TX Bit6 (977~997) 21 987, Bit14 (973~992) 20 982,
1250 14:44:20.023327 TX Bit7 (980~999) 20 989, Bit15 (975~995) 21 985,
1251 14:44:20.023389
1252 14:44:20.023449 Write Rank0 MR14 =0x10
1253 14:44:20.023509
1254 14:44:20.023568 CH=0, VrefRange= 0, VrefLevel = 16
1255 14:44:20.023628 TX Bit0 (981~999) 19 990, Bit8 (968~989) 22 978,
1256 14:44:20.023689 TX Bit1 (979~999) 21 989, Bit9 (970~990) 21 980,
1257 14:44:20.023750 TX Bit2 (979~999) 21 989, Bit10 (975~996) 22 985,
1258 14:44:20.023810 TX Bit3 (975~994) 20 984, Bit11 (969~988) 20 978,
1259 14:44:20.023870 TX Bit4 (978~998) 21 988, Bit12 (972~989) 18 980,
1260 14:44:20.023930 TX Bit5 (977~995) 19 986, Bit13 (972~989) 18 980,
1261 14:44:20.023990 TX Bit6 (977~998) 22 987, Bit14 (972~993) 22 982,
1262 14:44:20.024051 TX Bit7 (979~999) 21 989, Bit15 (975~995) 21 985,
1263 14:44:20.024111
1264 14:44:20.024171 Write Rank0 MR14 =0x12
1265 14:44:20.024231
1266 14:44:20.024291 CH=0, VrefRange= 0, VrefLevel = 18
1267 14:44:20.024351 TX Bit0 (980~1000) 21 990, Bit8 (968~990) 23 979,
1268 14:44:20.024411 TX Bit1 (979~1000) 22 989, Bit9 (969~990) 22 979,
1269 14:44:20.024472 TX Bit2 (980~1000) 21 990, Bit10 (975~997) 23 986,
1270 14:44:20.024532 TX Bit3 (975~994) 20 984, Bit11 (968~988) 21 978,
1271 14:44:20.024593 TX Bit4 (978~999) 22 988, Bit12 (971~990) 20 980,
1272 14:44:20.024653 TX Bit5 (977~997) 21 987, Bit13 (971~989) 19 980,
1273 14:44:20.024714 TX Bit6 (977~999) 23 988, Bit14 (972~993) 22 982,
1274 14:44:20.024974 TX Bit7 (978~1000) 23 989, Bit15 (975~996) 22 985,
1275 14:44:20.025075
1276 14:44:20.025193 Write Rank0 MR14 =0x14
1277 14:44:20.025310
1278 14:44:20.025451 CH=0, VrefRange= 0, VrefLevel = 20
1279 14:44:20.025574 TX Bit0 (980~1000) 21 990, Bit8 (968~990) 23 979,
1280 14:44:20.025680 TX Bit1 (978~1000) 23 989, Bit9 (969~991) 23 980,
1281 14:44:20.025776 TX Bit2 (979~1000) 22 989, Bit10 (975~997) 23 986,
1282 14:44:20.025871 TX Bit3 (975~994) 20 984, Bit11 (969~989) 21 979,
1283 14:44:20.025966 TX Bit4 (978~999) 22 988, Bit12 (971~991) 21 981,
1284 14:44:20.026060 TX Bit5 (976~997) 22 986, Bit13 (971~990) 20 980,
1285 14:44:20.026154 TX Bit6 (976~999) 24 987, Bit14 (971~994) 24 982,
1286 14:44:20.026248 TX Bit7 (979~1000) 22 989, Bit15 (974~996) 23 985,
1287 14:44:20.026340
1288 14:44:20.026417 Write Rank0 MR14 =0x16
1289 14:44:20.026480
1290 14:44:20.026541 CH=0, VrefRange= 0, VrefLevel = 22
1291 14:44:20.026603 TX Bit0 (980~1000) 21 990, Bit8 (968~990) 23 979,
1292 14:44:20.026664 TX Bit1 (978~1000) 23 989, Bit9 (969~991) 23 980,
1293 14:44:20.026725 TX Bit2 (979~1000) 22 989, Bit10 (974~997) 24 985,
1294 14:44:20.026786 TX Bit3 (974~995) 22 984, Bit11 (968~989) 22 978,
1295 14:44:20.026847 TX Bit4 (977~999) 23 988, Bit12 (970~991) 22 980,
1296 14:44:20.026907 TX Bit5 (976~998) 23 987, Bit13 (970~990) 21 980,
1297 14:44:20.026967 TX Bit6 (977~999) 23 988, Bit14 (971~995) 25 983,
1298 14:44:20.027028 TX Bit7 (978~1000) 23 989, Bit15 (974~996) 23 985,
1299 14:44:20.027089
1300 14:44:20.027148 Write Rank0 MR14 =0x18
1301 14:44:20.027209
1302 14:44:20.027268 CH=0, VrefRange= 0, VrefLevel = 24
1303 14:44:20.027329 TX Bit0 (979~1001) 23 990, Bit8 (967~990) 24 978,
1304 14:44:20.027389 TX Bit1 (978~1000) 23 989, Bit9 (969~991) 23 980,
1305 14:44:20.027450 TX Bit2 (979~1001) 23 990, Bit10 (974~997) 24 985,
1306 14:44:20.027511 TX Bit3 (974~995) 22 984, Bit11 (968~990) 23 979,
1307 14:44:20.027580 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1308 14:44:20.027670 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
1309 14:44:20.027758 TX Bit6 (977~1000) 24 988, Bit14 (970~995) 26 982,
1310 14:44:20.027846 TX Bit7 (978~1001) 24 989, Bit15 (974~997) 24 985,
1311 14:44:20.027952
1312 14:44:20.028049 Write Rank0 MR14 =0x1a
1313 14:44:20.028141
1314 14:44:20.028230 CH=0, VrefRange= 0, VrefLevel = 26
1315 14:44:20.028321 TX Bit0 (979~1001) 23 990, Bit8 (968~990) 23 979,
1316 14:44:20.028414 TX Bit1 (978~1000) 23 989, Bit9 (968~992) 25 980,
1317 14:44:20.028507 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1318 14:44:20.028599 TX Bit3 (974~996) 23 985, Bit11 (968~990) 23 979,
1319 14:44:20.028696 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1320 14:44:20.028791 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
1321 14:44:20.028859 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1322 14:44:20.028931 TX Bit7 (978~1001) 24 989, Bit15 (973~997) 25 985,
1323 14:44:20.028996
1324 14:44:20.029086 Write Rank0 MR14 =0x1c
1325 14:44:20.029155
1326 14:44:20.029217 CH=0, VrefRange= 0, VrefLevel = 28
1327 14:44:20.029287 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1328 14:44:20.029350 TX Bit1 (978~1001) 24 989, Bit9 (969~992) 24 980,
1329 14:44:20.029413 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
1330 14:44:20.029487 TX Bit3 (974~996) 23 985, Bit11 (968~991) 24 979,
1331 14:44:20.029550 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1332 14:44:20.029611 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1333 14:44:20.029673 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1334 14:44:20.029734 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1335 14:44:20.029795
1336 14:44:20.029855 Write Rank0 MR14 =0x1e
1337 14:44:20.029916
1338 14:44:20.029976 CH=0, VrefRange= 0, VrefLevel = 30
1339 14:44:20.030076 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1340 14:44:20.030176 TX Bit1 (978~1001) 24 989, Bit9 (969~992) 24 980,
1341 14:44:20.030280 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
1342 14:44:20.030347 TX Bit3 (974~996) 23 985, Bit11 (968~991) 24 979,
1343 14:44:20.030416 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1344 14:44:20.030480 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1345 14:44:20.030541 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1346 14:44:20.030603 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1347 14:44:20.030663
1348 14:44:20.030724 Write Rank0 MR14 =0x20
1349 14:44:20.030784
1350 14:44:20.030845 CH=0, VrefRange= 0, VrefLevel = 32
1351 14:44:20.030906 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1352 14:44:20.030967 TX Bit1 (978~1001) 24 989, Bit9 (969~992) 24 980,
1353 14:44:20.031027 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
1354 14:44:20.031089 TX Bit3 (974~996) 23 985, Bit11 (968~991) 24 979,
1355 14:44:20.031150 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1356 14:44:20.031211 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1357 14:44:20.031271 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1358 14:44:20.031332 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1359 14:44:20.031392
1360 14:44:20.031452 Write Rank0 MR14 =0x22
1361 14:44:20.031511
1362 14:44:20.031569 CH=0, VrefRange= 0, VrefLevel = 34
1363 14:44:20.031629 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1364 14:44:20.031689 TX Bit1 (978~1001) 24 989, Bit9 (969~992) 24 980,
1365 14:44:20.031749 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
1366 14:44:20.031809 TX Bit3 (974~996) 23 985, Bit11 (968~991) 24 979,
1367 14:44:20.031868 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1368 14:44:20.031928 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1369 14:44:20.031988 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1370 14:44:20.032048 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1371 14:44:20.032108
1372 14:44:20.032167 Write Rank0 MR14 =0x24
1373 14:44:20.032227
1374 14:44:20.032286 CH=0, VrefRange= 0, VrefLevel = 36
1375 14:44:20.032346 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1376 14:44:20.032622 TX Bit1 (978~1001) 24 989, Bit9 (969~992) 24 980,
1377 14:44:20.032727 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
1378 14:44:20.032848 TX Bit3 (974~996) 23 985, Bit11 (968~991) 24 979,
1379 14:44:20.032969 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1380 14:44:20.033089 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1381 14:44:20.033203 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1382 14:44:20.033301 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1383 14:44:20.033394
1384 14:44:20.033498 Write Rank0 MR14 =0x26
1385 14:44:20.033594
1386 14:44:20.033671 CH=0, VrefRange= 0, VrefLevel = 38
1387 14:44:20.033733 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1388 14:44:20.033795 TX Bit1 (978~1001) 24 989, Bit9 (969~992) 24 980,
1389 14:44:20.033855 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
1390 14:44:20.033917 TX Bit3 (974~996) 23 985, Bit11 (968~991) 24 979,
1391 14:44:20.033978 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1392 14:44:20.034038 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1393 14:44:20.034098 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1394 14:44:20.034158 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1395 14:44:20.034218
1396 14:44:20.034277
1397 14:44:20.034336 TX Vref found, early break! 356< 368
1398 14:44:20.034398 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1399 14:44:20.034458 u1DelayCellOfst[0]=6 cells (5 PI)
1400 14:44:20.034519 u1DelayCellOfst[1]=5 cells (4 PI)
1401 14:44:20.034578 u1DelayCellOfst[2]=6 cells (5 PI)
1402 14:44:20.034637 u1DelayCellOfst[3]=0 cells (0 PI)
1403 14:44:20.034697 u1DelayCellOfst[4]=3 cells (3 PI)
1404 14:44:20.034756 u1DelayCellOfst[5]=2 cells (2 PI)
1405 14:44:20.034816 u1DelayCellOfst[6]=3 cells (3 PI)
1406 14:44:20.034875 u1DelayCellOfst[7]=5 cells (4 PI)
1407 14:44:20.034935 Byte0, DQ PI dly=985, DQM PI dly= 987
1408 14:44:20.034994 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1409 14:44:20.035055
1410 14:44:20.035114 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1411 14:44:20.035174
1412 14:44:20.035234 u1DelayCellOfst[8]=0 cells (0 PI)
1413 14:44:20.035293 u1DelayCellOfst[9]=2 cells (2 PI)
1414 14:44:20.035353 u1DelayCellOfst[10]=9 cells (7 PI)
1415 14:44:20.035412 u1DelayCellOfst[11]=1 cells (1 PI)
1416 14:44:20.035472 u1DelayCellOfst[12]=2 cells (2 PI)
1417 14:44:20.035531 u1DelayCellOfst[13]=2 cells (2 PI)
1418 14:44:20.035591 u1DelayCellOfst[14]=6 cells (5 PI)
1419 14:44:20.035650 u1DelayCellOfst[15]=9 cells (7 PI)
1420 14:44:20.035710 Byte1, DQ PI dly=978, DQM PI dly= 981
1421 14:44:20.035770 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1422 14:44:20.035831
1423 14:44:20.035890 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1424 14:44:20.035950
1425 14:44:20.036008 Write Rank0 MR14 =0x1c
1426 14:44:20.036068
1427 14:44:20.036127 Final TX Range 0 Vref 28
1428 14:44:20.036186
1429 14:44:20.036246 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1430 14:44:20.036309
1431 14:44:20.036369 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1432 14:44:20.036429 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1433 14:44:20.036490 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1434 14:44:20.036550 Write Rank0 MR3 =0xb0
1435 14:44:20.036609 DramC Write-DBI on
1436 14:44:20.036668 ==
1437 14:44:20.036741 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1438 14:44:20.036802 fsp= 1, odt_onoff= 1, Byte mode= 0
1439 14:44:20.036863 ==
1440 14:44:20.036923 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1441 14:44:20.036982
1442 14:44:20.037042 Begin, DQ Scan Range 701~765
1443 14:44:20.037101
1444 14:44:20.037159
1445 14:44:20.037219 TX Vref Scan disable
1446 14:44:20.037279 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1447 14:44:20.037341 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1448 14:44:20.037402 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1449 14:44:20.037477 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1450 14:44:20.037540 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1451 14:44:20.037601 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1452 14:44:20.037661 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1453 14:44:20.037722 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1454 14:44:20.037782 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1455 14:44:20.037843 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1456 14:44:20.037903 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1457 14:44:20.037964 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1458 14:44:20.038025 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1459 14:44:20.038086 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1460 14:44:20.038147 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1461 14:44:20.038208 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1462 14:44:20.038269 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1463 14:44:20.038331 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1464 14:44:20.038392 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1465 14:44:20.038454 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1466 14:44:20.038514 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1467 14:44:20.038575 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1468 14:44:20.038635 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1469 14:44:20.038696 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1470 14:44:20.038757 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1471 14:44:20.038819 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1472 14:44:20.038879 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1473 14:44:20.038940 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1474 14:44:20.039001 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1475 14:44:20.039062 Byte0, DQ PI dly=733, DQM PI dly= 733
1476 14:44:20.039122 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
1477 14:44:20.039182
1478 14:44:20.039242 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
1479 14:44:20.039302
1480 14:44:20.039362 Byte1, DQ PI dly=725, DQM PI dly= 725
1481 14:44:20.039420 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1482 14:44:20.039479
1483 14:44:20.039538 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1484 14:44:20.039598
1485 14:44:20.039656 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1486 14:44:20.039717 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1487 14:44:20.039988 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1488 14:44:20.040083 Write Rank0 MR3 =0x30
1489 14:44:20.040203 DramC Write-DBI off
1490 14:44:20.040321
1491 14:44:20.040439 [DATLAT]
1492 14:44:20.040547 Freq=1600, CH0 RK0, use_rxtx_scan=0
1493 14:44:20.040646
1494 14:44:20.040738 DATLAT Default: 0xf
1495 14:44:20.040830 7, 0xFFFF, sum=0
1496 14:44:20.040924 8, 0xFFFF, sum=0
1497 14:44:20.041017 9, 0xFFFF, sum=0
1498 14:44:20.041111 10, 0xFFFF, sum=0
1499 14:44:20.041205 11, 0xFFFF, sum=0
1500 14:44:20.041299 12, 0xFFFF, sum=0
1501 14:44:20.041393 13, 0xFFFF, sum=0
1502 14:44:20.041497 14, 0x0, sum=1
1503 14:44:20.041592 15, 0x0, sum=2
1504 14:44:20.041686 16, 0x0, sum=3
1505 14:44:20.041780 17, 0x0, sum=4
1506 14:44:20.041874 pattern=2 first_step=14 total pass=5 best_step=16
1507 14:44:20.041966 ==
1508 14:44:20.042059 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1509 14:44:20.042151 fsp= 1, odt_onoff= 1, Byte mode= 0
1510 14:44:20.042243 ==
1511 14:44:20.042335 Start DQ dly to find pass range UseTestEngine =1
1512 14:44:20.042428 x-axis: bit #, y-axis: DQ dly (-127~63)
1513 14:44:20.042519 RX Vref Scan = 1
1514 14:44:20.042610
1515 14:44:20.042701 RX Vref found, early break!
1516 14:44:20.042793
1517 14:44:20.042885 Final RX Vref 11, apply to both rank0 and 1
1518 14:44:20.042977 ==
1519 14:44:20.043070 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1520 14:44:20.043162 fsp= 1, odt_onoff= 1, Byte mode= 0
1521 14:44:20.043254 ==
1522 14:44:20.043345 DQS Delay:
1523 14:44:20.043413 DQS0 = 0, DQS1 = 0
1524 14:44:20.043473 DQM Delay:
1525 14:44:20.043533 DQM0 = 19, DQM1 = 17
1526 14:44:20.043593 DQ Delay:
1527 14:44:20.043652 DQ0 =21, DQ1 =22, DQ2 =23, DQ3 =14
1528 14:44:20.043712 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1529 14:44:20.043771 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1530 14:44:20.043830 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1531 14:44:20.043890
1532 14:44:20.043948
1533 14:44:20.044007
1534 14:44:20.044066 [DramC_TX_OE_Calibration] TA2
1535 14:44:20.044125 Original DQ_B0 (3 6) =30, OEN = 27
1536 14:44:20.044185 Original DQ_B1 (3 6) =30, OEN = 27
1537 14:44:20.044276 23, 0x0, End_B0=23 End_B1=23
1538 14:44:20.044371 24, 0x0, End_B0=24 End_B1=24
1539 14:44:20.044466 25, 0x0, End_B0=25 End_B1=25
1540 14:44:20.044560 26, 0x0, End_B0=26 End_B1=26
1541 14:44:20.044654 27, 0x0, End_B0=27 End_B1=27
1542 14:44:20.044749 28, 0x0, End_B0=28 End_B1=28
1543 14:44:20.044843 29, 0x0, End_B0=29 End_B1=29
1544 14:44:20.044937 30, 0x0, End_B0=30 End_B1=30
1545 14:44:20.045031 31, 0xFFFF, End_B0=30 End_B1=30
1546 14:44:20.045126 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1547 14:44:20.045219 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1548 14:44:20.045311
1549 14:44:20.045401
1550 14:44:20.045482 Write Rank0 MR23 =0x3f
1551 14:44:20.045544 [DQSOSC]
1552 14:44:20.045604 [DQSOSCAuto] RK0, (LSB)MR18= 0xbfbf, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
1553 14:44:20.045666 CH0_RK0: MR19=0x202, MR18=0xBFBF, DQSOSC=448, MR23=63, INC=12, DEC=18
1554 14:44:20.045727 Write Rank0 MR23 =0x3f
1555 14:44:20.045786 [DQSOSC]
1556 14:44:20.045846 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1557 14:44:20.045907 CH0 RK0: MR19=202, MR18=C1C1
1558 14:44:20.045968 [RankSwap] Rank num 2, (Multi 1), Rank 1
1559 14:44:20.046028 Write Rank0 MR2 =0xad
1560 14:44:20.046087 [Write Leveling]
1561 14:44:20.046146 delay byte0 byte1 byte2 byte3
1562 14:44:20.046206
1563 14:44:20.046287 10 0 0
1564 14:44:20.046350 11 0 0
1565 14:44:20.046412 12 0 0
1566 14:44:20.046472 13 0 0
1567 14:44:20.046533 14 0 0
1568 14:44:20.046593 15 0 0
1569 14:44:20.046654 16 0 0
1570 14:44:20.046715 17 0 0
1571 14:44:20.046775 18 0 0
1572 14:44:20.046836 19 0 0
1573 14:44:20.046896 20 0 0
1574 14:44:20.046956 21 0 0
1575 14:44:20.047016 22 0 0
1576 14:44:20.047076 23 0 0
1577 14:44:20.047135 24 0 0
1578 14:44:20.047195 25 0 ff
1579 14:44:20.047255 26 0 ff
1580 14:44:20.047316 27 0 ff
1581 14:44:20.047376 28 0 ff
1582 14:44:20.047436 29 0 ff
1583 14:44:20.047496 30 ff ff
1584 14:44:20.047557 31 ff ff
1585 14:44:20.047618 32 ff ff
1586 14:44:20.047678 33 ff ff
1587 14:44:20.047739 34 ff ff
1588 14:44:20.047799 35 ff ff
1589 14:44:20.047859 36 ff ff
1590 14:44:20.047919 pass bytecount = 0xff (0xff: all bytes pass)
1591 14:44:20.047979
1592 14:44:20.048037 DQS0 dly: 30
1593 14:44:20.048096 DQS1 dly: 25
1594 14:44:20.048155 Write Rank0 MR2 =0x2d
1595 14:44:20.048214 [RankSwap] Rank num 2, (Multi 1), Rank 0
1596 14:44:20.048308 Write Rank1 MR1 =0xd6
1597 14:44:20.048403 [Gating]
1598 14:44:20.048498 ==
1599 14:44:20.048591 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1600 14:44:20.048684 fsp= 1, odt_onoff= 1, Byte mode= 0
1601 14:44:20.048778 ==
1602 14:44:20.048871 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1603 14:44:20.048966 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1604 14:44:20.049062 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1605 14:44:20.049157 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1606 14:44:20.049252 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1607 14:44:20.049347 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1608 14:44:20.049446 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1609 14:44:20.049512 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1610 14:44:20.049574 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1611 14:44:20.049636 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1612 14:44:20.049697 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1613 14:44:20.049758 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1614 14:44:20.049819 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1615 14:44:20.049880 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1616 14:44:20.049940 [Byte 0] Lead/lag Transition tap number (7)
1617 14:44:20.050000 3 2 20 |201 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1618 14:44:20.050061 3 2 24 |3534 e0e |(11 11)(11 11) |(0 0)(0 0)| 0
1619 14:44:20.050122 3 2 28 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1620 14:44:20.050183 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1621 14:44:20.050244 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1622 14:44:20.050305 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1623 14:44:20.050365 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1624 14:44:20.050427 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1625 14:44:20.050487 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1626 14:44:20.050548 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1627 14:44:20.050608 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1628 14:44:20.050669 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1629 14:44:20.050928 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1630 14:44:20.050997 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1631 14:44:20.051060 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1632 14:44:20.051121 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1633 14:44:20.051183 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1634 14:44:20.051244 3 4 20 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1635 14:44:20.051306 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1636 14:44:20.051367 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1637 14:44:20.051427 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1638 14:44:20.051488 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1639 14:44:20.051548 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1640 14:44:20.051609 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1641 14:44:20.051670 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1642 14:44:20.051731 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1643 14:44:20.051792 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1644 14:44:20.051853 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1645 14:44:20.051913 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1646 14:44:20.051974 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1647 14:44:20.052035 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1648 14:44:20.052095 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1649 14:44:20.052156 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1650 14:44:20.052216 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1651 14:44:20.052286 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1652 14:44:20.052350 [Byte 0] Lead/lag Transition tap number (2)
1653 14:44:20.052410 3 6 20 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1654 14:44:20.052471 [Byte 1] Lead/lag Transition tap number (3)
1655 14:44:20.052531 3 6 24 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1656 14:44:20.052591 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1657 14:44:20.052652 [Byte 0]First pass (3, 6, 28)
1658 14:44:20.052711 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1659 14:44:20.052772 [Byte 1]First pass (3, 7, 0)
1660 14:44:20.052832 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1661 14:44:20.052893 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1662 14:44:20.052954 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1663 14:44:20.053014 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1664 14:44:20.053075 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1665 14:44:20.053135 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1666 14:44:20.053196 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1667 14:44:20.053257 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1668 14:44:20.053318 All bytes gating window > 1UI, Early break!
1669 14:44:20.053378
1670 14:44:20.053451 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1671 14:44:20.053513
1672 14:44:20.053573 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1673 14:44:20.053632
1674 14:44:20.053691
1675 14:44:20.053750
1676 14:44:20.053809 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1677 14:44:20.053868
1678 14:44:20.053927 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1679 14:44:20.053987
1680 14:44:20.054046
1681 14:44:20.054105 Write Rank1 MR1 =0x56
1682 14:44:20.054164
1683 14:44:20.054223 best RODT dly(2T, 0.5T) = (2, 3)
1684 14:44:20.054282
1685 14:44:20.054344 best RODT dly(2T, 0.5T) = (2, 3)
1686 14:44:20.054404 ==
1687 14:44:20.054463 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1688 14:44:20.054523 fsp= 1, odt_onoff= 1, Byte mode= 0
1689 14:44:20.054583 ==
1690 14:44:20.054643 Start DQ dly to find pass range UseTestEngine =0
1691 14:44:20.054702 x-axis: bit #, y-axis: DQ dly (-127~63)
1692 14:44:20.054762 RX Vref Scan = 0
1693 14:44:20.054821 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1694 14:44:20.054883 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1695 14:44:20.054943 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1696 14:44:20.055004 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1697 14:44:20.055064 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1698 14:44:20.055125 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1699 14:44:20.055185 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1700 14:44:20.055246 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1701 14:44:20.055306 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1702 14:44:20.055366 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1703 14:44:20.055426 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1704 14:44:20.055487 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1705 14:44:20.055548 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1706 14:44:20.055608 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1707 14:44:20.055668 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1708 14:44:20.055729 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1709 14:44:20.055789 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1710 14:44:20.055849 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1711 14:44:20.055910 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1712 14:44:20.055986 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1713 14:44:20.056050 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1714 14:44:20.056111 -5, [0] xxxxxxxx oxxxxxxx [MSB]
1715 14:44:20.056172 -4, [0] xxxoxxxx oxxxxxxx [MSB]
1716 14:44:20.056232 -3, [0] xxxoxxxx oxxoxxxx [MSB]
1717 14:44:20.056293 -2, [0] xxxoxxxx ooxoooxx [MSB]
1718 14:44:20.056353 -1, [0] xxxoxoxx ooxoooxx [MSB]
1719 14:44:20.056413 0, [0] xxxoxoox ooxoooxx [MSB]
1720 14:44:20.056475 1, [0] xxxoxoox ooxoooox [MSB]
1721 14:44:20.056536 2, [0] xxxoxoox ooxoooox [MSB]
1722 14:44:20.056596 3, [0] xxxooooo ooxooooo [MSB]
1723 14:44:20.056657 4, [0] ooxooooo ooxooooo [MSB]
1724 14:44:20.056717 32, [0] oooxoooo oooooooo [MSB]
1725 14:44:20.056778 33, [0] oooxoooo xooooooo [MSB]
1726 14:44:20.056839 34, [0] oooxoooo xooooooo [MSB]
1727 14:44:20.056899 35, [0] oooxoooo xxoxoooo [MSB]
1728 14:44:20.056960 36, [0] oooxoxxo xxoxxxxo [MSB]
1729 14:44:20.057021 37, [0] oooxoxxx xxoxxxxo [MSB]
1730 14:44:20.057081 38, [0] oooxoxxx xxoxxxxo [MSB]
1731 14:44:20.057142 39, [0] ooxxxxxx xxoxxxxx [MSB]
1732 14:44:20.057202 40, [0] xoxxxxxx xxoxxxxx [MSB]
1733 14:44:20.057262 41, [0] xxxxxxxx xxoxxxxx [MSB]
1734 14:44:20.057323 42, [0] xxxxxxxx xxoxxxxx [MSB]
1735 14:44:20.057383 43, [0] xxxxxxxx xxxxxxxx [MSB]
1736 14:44:20.057457 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1737 14:44:20.057519 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1738 14:44:20.057578 iDelay=43, Bit 2, Center 21 (5 ~ 38) 34
1739 14:44:20.057637 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1740 14:44:20.057697 iDelay=43, Bit 4, Center 20 (3 ~ 38) 36
1741 14:44:20.057955 iDelay=43, Bit 5, Center 17 (-1 ~ 35) 37
1742 14:44:20.058022 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1743 14:44:20.058082 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1744 14:44:20.058142 iDelay=43, Bit 8, Center 13 (-5 ~ 32) 38
1745 14:44:20.058202 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
1746 14:44:20.058261 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1747 14:44:20.058320 iDelay=43, Bit 11, Center 15 (-3 ~ 34) 38
1748 14:44:20.058380 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1749 14:44:20.058440 iDelay=43, Bit 13, Center 16 (-2 ~ 35) 38
1750 14:44:20.058500 iDelay=43, Bit 14, Center 18 (1 ~ 35) 35
1751 14:44:20.058559 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1752 14:44:20.058618 ==
1753 14:44:20.058677 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1754 14:44:20.058737 fsp= 1, odt_onoff= 1, Byte mode= 0
1755 14:44:20.058797 ==
1756 14:44:20.058857 DQS Delay:
1757 14:44:20.058916 DQS0 = 0, DQS1 = 0
1758 14:44:20.058976 DQM Delay:
1759 14:44:20.059034 DQM0 = 18, DQM1 = 17
1760 14:44:20.059094 DQ Delay:
1761 14:44:20.059153 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =13
1762 14:44:20.059212 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =19
1763 14:44:20.059272 DQ8 =13, DQ9 =16, DQ10 =23, DQ11 =15
1764 14:44:20.059331 DQ12 =16, DQ13 =16, DQ14 =18, DQ15 =20
1765 14:44:20.059390
1766 14:44:20.059448
1767 14:44:20.059507 DramC Write-DBI off
1768 14:44:20.059566 ==
1769 14:44:20.059625 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1770 14:44:20.059685 fsp= 1, odt_onoff= 1, Byte mode= 0
1771 14:44:20.059744 ==
1772 14:44:20.059803 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1773 14:44:20.059862
1774 14:44:20.059921 Begin, DQ Scan Range 921~1177
1775 14:44:20.059980
1776 14:44:20.060039
1777 14:44:20.060097 TX Vref Scan disable
1778 14:44:20.060156 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1779 14:44:20.060217 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1780 14:44:20.060278 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1781 14:44:20.060347 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1782 14:44:20.060410 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1783 14:44:20.060471 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1784 14:44:20.060531 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1785 14:44:20.060592 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1786 14:44:20.060657 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1787 14:44:20.060717 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1788 14:44:20.060778 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1789 14:44:20.060838 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1790 14:44:20.060901 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1791 14:44:20.060961 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1792 14:44:20.061022 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1793 14:44:20.061082 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1794 14:44:20.061144 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1795 14:44:20.061204 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1796 14:44:20.061265 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1797 14:44:20.061327 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1798 14:44:20.061387 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1799 14:44:20.061457 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1800 14:44:20.061520 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1801 14:44:20.061581 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1802 14:44:20.061642 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1803 14:44:20.061703 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1804 14:44:20.061764 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1805 14:44:20.061825 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1806 14:44:20.061885 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1807 14:44:20.061946 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1808 14:44:20.062006 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1809 14:44:20.062067 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1810 14:44:20.062127 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1811 14:44:20.062188 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1812 14:44:20.062248 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1813 14:44:20.062309 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1814 14:44:20.062370 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1815 14:44:20.062431 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1816 14:44:20.062491 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1817 14:44:20.062551 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1818 14:44:20.062611 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1819 14:44:20.062672 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1820 14:44:20.062733 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1821 14:44:20.062794 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1822 14:44:20.062854 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1823 14:44:20.062914 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1824 14:44:20.062974 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1825 14:44:20.063034 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1826 14:44:20.063096 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1827 14:44:20.063157 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1828 14:44:20.063218 971 |3 6 11|[0] xxxxxxxx oxxxxxxx [MSB]
1829 14:44:20.063279 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1830 14:44:20.063340 973 |3 6 13|[0] xxxxxxxx ooxoxoox [MSB]
1831 14:44:20.063400 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1832 14:44:20.063461 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1833 14:44:20.063521 976 |3 6 16|[0] xxxxxxxx ooxooooo [MSB]
1834 14:44:20.063582 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1835 14:44:20.063642 978 |3 6 18|[0] xxxooooo oooooooo [MSB]
1836 14:44:20.063703 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1837 14:44:20.063763 991 |3 6 31|[0] oooooooo xxoxxooo [MSB]
1838 14:44:20.063824 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1839 14:44:20.063885 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1840 14:44:20.063945 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1841 14:44:20.064006 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1842 14:44:20.064067 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1843 14:44:20.064127 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1844 14:44:20.064188 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1845 14:44:20.064248 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1846 14:44:20.064309 Byte0, DQ PI dly=986, DQM PI dly= 986
1847 14:44:20.064369 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1848 14:44:20.064428
1849 14:44:20.064487 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1850 14:44:20.064547
1851 14:44:20.064606 Byte1, DQ PI dly=982, DQM PI dly= 982
1852 14:44:20.064665 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1853 14:44:20.064725
1854 14:44:20.064784 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1855 14:44:20.064844
1856 14:44:20.064903 ==
1857 14:44:20.065162 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1858 14:44:20.065233 fsp= 1, odt_onoff= 1, Byte mode= 0
1859 14:44:20.065294 ==
1860 14:44:20.065354 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1861 14:44:20.065414
1862 14:44:20.065484 Begin, DQ Scan Range 958~1022
1863 14:44:20.065544 Write Rank1 MR14 =0x0
1864 14:44:20.065604
1865 14:44:20.065663 CH=0, VrefRange= 0, VrefLevel = 0
1866 14:44:20.065723 TX Bit0 (983~993) 11 988, Bit8 (973~985) 13 979,
1867 14:44:20.065784 TX Bit1 (981~994) 14 987, Bit9 (975~986) 12 980,
1868 14:44:20.065844 TX Bit2 (983~992) 10 987, Bit10 (979~991) 13 985,
1869 14:44:20.065904 TX Bit3 (977~990) 14 983, Bit11 (975~983) 9 979,
1870 14:44:20.065964 TX Bit4 (981~993) 13 987, Bit12 (976~985) 10 980,
1871 14:44:20.066024 TX Bit5 (978~990) 13 984, Bit13 (975~988) 14 981,
1872 14:44:20.066084 TX Bit6 (979~992) 14 985, Bit14 (975~990) 16 982,
1873 14:44:20.066143 TX Bit7 (980~993) 14 986, Bit15 (978~992) 15 985,
1874 14:44:20.066203
1875 14:44:20.066262 Write Rank1 MR14 =0x2
1876 14:44:20.066321
1877 14:44:20.066379 CH=0, VrefRange= 0, VrefLevel = 2
1878 14:44:20.066438 TX Bit0 (982~994) 13 988, Bit8 (973~986) 14 979,
1879 14:44:20.066498 TX Bit1 (980~995) 16 987, Bit9 (975~987) 13 981,
1880 14:44:20.066557 TX Bit2 (983~993) 11 988, Bit10 (978~992) 15 985,
1881 14:44:20.066617 TX Bit3 (976~990) 15 983, Bit11 (974~984) 11 979,
1882 14:44:20.066677 TX Bit4 (980~993) 14 986, Bit12 (976~986) 11 981,
1883 14:44:20.066737 TX Bit5 (978~991) 14 984, Bit13 (975~988) 14 981,
1884 14:44:20.066796 TX Bit6 (979~992) 14 985, Bit14 (976~991) 16 983,
1885 14:44:20.066855 TX Bit7 (980~994) 15 987, Bit15 (978~993) 16 985,
1886 14:44:20.066915
1887 14:44:20.066973 Write Rank1 MR14 =0x4
1888 14:44:20.067032
1889 14:44:20.067090 CH=0, VrefRange= 0, VrefLevel = 4
1890 14:44:20.067150 TX Bit0 (982~994) 13 988, Bit8 (973~987) 15 980,
1891 14:44:20.067209 TX Bit1 (980~995) 16 987, Bit9 (975~988) 14 981,
1892 14:44:20.067268 TX Bit2 (981~994) 14 987, Bit10 (978~993) 16 985,
1893 14:44:20.067327 TX Bit3 (976~991) 16 983, Bit11 (974~985) 12 979,
1894 14:44:20.067386 TX Bit4 (980~994) 15 987, Bit12 (976~988) 13 982,
1895 14:44:20.067445 TX Bit5 (978~991) 14 984, Bit13 (975~989) 15 982,
1896 14:44:20.067505 TX Bit6 (978~993) 16 985, Bit14 (975~991) 17 983,
1897 14:44:20.067565 TX Bit7 (980~995) 16 987, Bit15 (977~993) 17 985,
1898 14:44:20.067624
1899 14:44:20.067683 Write Rank1 MR14 =0x6
1900 14:44:20.067742
1901 14:44:20.067801 CH=0, VrefRange= 0, VrefLevel = 6
1902 14:44:20.067861 TX Bit0 (982~996) 15 989, Bit8 (972~988) 17 980,
1903 14:44:20.067921 TX Bit1 (979~996) 18 987, Bit9 (975~988) 14 981,
1904 14:44:20.067981 TX Bit2 (981~994) 14 987, Bit10 (978~994) 17 986,
1905 14:44:20.068040 TX Bit3 (976~991) 16 983, Bit11 (974~986) 13 980,
1906 14:44:20.068101 TX Bit4 (980~995) 16 987, Bit12 (975~988) 14 981,
1907 14:44:20.068160 TX Bit5 (978~992) 15 985, Bit13 (975~989) 15 982,
1908 14:44:20.068220 TX Bit6 (978~993) 16 985, Bit14 (975~992) 18 983,
1909 14:44:20.068279 TX Bit7 (980~996) 17 988, Bit15 (977~995) 19 986,
1910 14:44:20.068339
1911 14:44:20.068397 Write Rank1 MR14 =0x8
1912 14:44:20.068456
1913 14:44:20.068515 CH=0, VrefRange= 0, VrefLevel = 8
1914 14:44:20.068575 TX Bit0 (981~997) 17 989, Bit8 (971~988) 18 979,
1915 14:44:20.068635 TX Bit1 (979~997) 19 988, Bit9 (974~989) 16 981,
1916 14:44:20.068694 TX Bit2 (981~996) 16 988, Bit10 (977~995) 19 986,
1917 14:44:20.068754 TX Bit3 (975~991) 17 983, Bit11 (973~987) 15 980,
1918 14:44:20.068813 TX Bit4 (979~996) 18 987, Bit12 (975~989) 15 982,
1919 14:44:20.068873 TX Bit5 (977~992) 16 984, Bit13 (974~990) 17 982,
1920 14:44:20.068933 TX Bit6 (978~994) 17 986, Bit14 (975~992) 18 983,
1921 14:44:20.068992 TX Bit7 (979~996) 18 987, Bit15 (977~995) 19 986,
1922 14:44:20.069052
1923 14:44:20.069110 Write Rank1 MR14 =0xa
1924 14:44:20.069169
1925 14:44:20.069228 CH=0, VrefRange= 0, VrefLevel = 10
1926 14:44:20.069288 TX Bit0 (981~998) 18 989, Bit8 (971~989) 19 980,
1927 14:44:20.069348 TX Bit1 (979~998) 20 988, Bit9 (974~989) 16 981,
1928 14:44:20.069407 TX Bit2 (980~997) 18 988, Bit10 (977~996) 20 986,
1929 14:44:20.069480 TX Bit3 (975~992) 18 983, Bit11 (973~988) 16 980,
1930 14:44:20.069541 TX Bit4 (979~997) 19 988, Bit12 (975~989) 15 982,
1931 14:44:20.069601 TX Bit5 (977~993) 17 985, Bit13 (974~990) 17 982,
1932 14:44:20.069661 TX Bit6 (978~995) 18 986, Bit14 (974~993) 20 983,
1933 14:44:20.069721 TX Bit7 (979~998) 20 988, Bit15 (977~996) 20 986,
1934 14:44:20.069784
1935 14:44:20.069852 Write Rank1 MR14 =0xc
1936 14:44:20.069911
1937 14:44:20.069970 CH=0, VrefRange= 0, VrefLevel = 12
1938 14:44:20.070030 TX Bit0 (979~998) 20 988, Bit8 (970~989) 20 979,
1939 14:44:20.070097 TX Bit1 (979~998) 20 988, Bit9 (973~990) 18 981,
1940 14:44:20.070157 TX Bit2 (980~998) 19 989, Bit10 (977~996) 20 986,
1941 14:44:20.070217 TX Bit3 (974~992) 19 983, Bit11 (973~988) 16 980,
1942 14:44:20.070277 TX Bit4 (979~998) 20 988, Bit12 (974~990) 17 982,
1943 14:44:20.070336 TX Bit5 (977~993) 17 985, Bit13 (974~990) 17 982,
1944 14:44:20.070396 TX Bit6 (978~996) 19 987, Bit14 (974~994) 21 984,
1945 14:44:20.070456 TX Bit7 (979~998) 20 988, Bit15 (977~996) 20 986,
1946 14:44:20.070515
1947 14:44:20.070574 Write Rank1 MR14 =0xe
1948 14:44:20.070633
1949 14:44:20.070691 CH=0, VrefRange= 0, VrefLevel = 14
1950 14:44:20.070751 TX Bit0 (979~999) 21 989, Bit8 (970~989) 20 979,
1951 14:44:20.070811 TX Bit1 (978~999) 22 988, Bit9 (974~990) 17 982,
1952 14:44:20.070870 TX Bit2 (980~998) 19 989, Bit10 (976~996) 21 986,
1953 14:44:20.070929 TX Bit3 (974~993) 20 983, Bit11 (972~989) 18 980,
1954 14:44:20.070989 TX Bit4 (978~998) 21 988, Bit12 (974~990) 17 982,
1955 14:44:20.071048 TX Bit5 (977~994) 18 985, Bit13 (973~991) 19 982,
1956 14:44:20.071108 TX Bit6 (977~997) 21 987, Bit14 (974~995) 22 984,
1957 14:44:20.071167 TX Bit7 (978~999) 22 988, Bit15 (976~997) 22 986,
1958 14:44:20.071226
1959 14:44:20.071285 Write Rank1 MR14 =0x10
1960 14:44:20.071344
1961 14:44:20.071403 CH=0, VrefRange= 0, VrefLevel = 16
1962 14:44:20.071659 TX Bit0 (979~999) 21 989, Bit8 (970~990) 21 980,
1963 14:44:20.071726 TX Bit1 (978~999) 22 988, Bit9 (973~991) 19 982,
1964 14:44:20.071788 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1965 14:44:20.071848 TX Bit3 (974~993) 20 983, Bit11 (972~989) 18 980,
1966 14:44:20.071908 TX Bit4 (978~999) 22 988, Bit12 (973~990) 18 981,
1967 14:44:20.071968 TX Bit5 (977~994) 18 985, Bit13 (973~992) 20 982,
1968 14:44:20.072028 TX Bit6 (977~997) 21 987, Bit14 (973~995) 23 984,
1969 14:44:20.072089 TX Bit7 (978~999) 22 988, Bit15 (976~997) 22 986,
1970 14:44:20.072149
1971 14:44:20.072207 Write Rank1 MR14 =0x12
1972 14:44:20.072267
1973 14:44:20.072325 CH=0, VrefRange= 0, VrefLevel = 18
1974 14:44:20.072384 TX Bit0 (979~1000) 22 989, Bit8 (969~990) 22 979,
1975 14:44:20.192244 TX Bit1 (978~1000) 23 989, Bit9 (973~991) 19 982,
1976 14:44:20.192385 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1977 14:44:20.192459 TX Bit3 (973~993) 21 983, Bit11 (972~990) 19 981,
1978 14:44:20.192526 TX Bit4 (978~999) 22 988, Bit12 (973~991) 19 982,
1979 14:44:20.192592 TX Bit5 (977~995) 19 986, Bit13 (973~992) 20 982,
1980 14:44:20.192657 TX Bit6 (977~998) 22 987, Bit14 (973~995) 23 984,
1981 14:44:20.192721 TX Bit7 (978~999) 22 988, Bit15 (976~997) 22 986,
1982 14:44:20.192782
1983 14:44:20.192844 Write Rank1 MR14 =0x14
1984 14:44:20.192906
1985 14:44:20.192967 CH=0, VrefRange= 0, VrefLevel = 20
1986 14:44:20.193027 TX Bit0 (979~1000) 22 989, Bit8 (969~991) 23 980,
1987 14:44:20.193087 TX Bit1 (978~1000) 23 989, Bit9 (972~991) 20 981,
1988 14:44:20.193147 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1989 14:44:20.193207 TX Bit3 (973~993) 21 983, Bit11 (971~990) 20 980,
1990 14:44:20.193268 TX Bit4 (978~999) 22 988, Bit12 (973~992) 20 982,
1991 14:44:20.193328 TX Bit5 (977~996) 20 986, Bit13 (973~993) 21 983,
1992 14:44:20.193420 TX Bit6 (977~998) 22 987, Bit14 (973~996) 24 984,
1993 14:44:20.193519 TX Bit7 (978~1000) 23 989, Bit15 (976~998) 23 987,
1994 14:44:20.193583
1995 14:44:20.193644 Write Rank1 MR14 =0x16
1996 14:44:20.193705
1997 14:44:20.193764 CH=0, VrefRange= 0, VrefLevel = 22
1998 14:44:20.193824 TX Bit0 (979~1000) 22 989, Bit8 (969~991) 23 980,
1999 14:44:20.193884 TX Bit1 (978~1000) 23 989, Bit9 (972~992) 21 982,
2000 14:44:20.193945 TX Bit2 (979~1000) 22 989, Bit10 (976~997) 22 986,
2001 14:44:20.194006 TX Bit3 (973~994) 22 983, Bit11 (970~990) 21 980,
2002 14:44:20.194067 TX Bit4 (978~1000) 23 989, Bit12 (972~992) 21 982,
2003 14:44:20.194128 TX Bit5 (976~996) 21 986, Bit13 (973~994) 22 983,
2004 14:44:20.194188 TX Bit6 (977~999) 23 988, Bit14 (973~997) 25 985,
2005 14:44:20.194248 TX Bit7 (978~1000) 23 989, Bit15 (976~997) 22 986,
2006 14:44:20.194308
2007 14:44:20.194368 Write Rank1 MR14 =0x18
2008 14:44:20.194427
2009 14:44:20.194487 CH=0, VrefRange= 0, VrefLevel = 24
2010 14:44:20.194547 TX Bit0 (979~1001) 23 990, Bit8 (969~992) 24 980,
2011 14:44:20.194607 TX Bit1 (978~1001) 24 989, Bit9 (972~993) 22 982,
2012 14:44:20.194667 TX Bit2 (979~1000) 22 989, Bit10 (976~998) 23 987,
2013 14:44:20.194727 TX Bit3 (973~995) 23 984, Bit11 (970~991) 22 980,
2014 14:44:20.194787 TX Bit4 (977~1000) 24 988, Bit12 (972~993) 22 982,
2015 14:44:20.194847 TX Bit5 (976~997) 22 986, Bit13 (972~994) 23 983,
2016 14:44:20.194907 TX Bit6 (977~999) 23 988, Bit14 (972~997) 26 984,
2017 14:44:20.194967 TX Bit7 (978~1000) 23 989, Bit15 (975~998) 24 986,
2018 14:44:20.195027
2019 14:44:20.195087 Write Rank1 MR14 =0x1a
2020 14:44:20.195147
2021 14:44:20.195206 CH=0, VrefRange= 0, VrefLevel = 26
2022 14:44:20.195266 TX Bit0 (979~1002) 24 990, Bit8 (968~992) 25 980,
2023 14:44:20.195327 TX Bit1 (977~1001) 25 989, Bit9 (971~994) 24 982,
2024 14:44:20.195387 TX Bit2 (978~1001) 24 989, Bit10 (976~999) 24 987,
2025 14:44:20.195447 TX Bit3 (972~996) 25 984, Bit11 (969~992) 24 980,
2026 14:44:20.195507 TX Bit4 (977~1001) 25 989, Bit12 (972~994) 23 983,
2027 14:44:20.195566 TX Bit5 (975~998) 24 986, Bit13 (971~995) 25 983,
2028 14:44:20.195626 TX Bit6 (976~1000) 25 988, Bit14 (972~997) 26 984,
2029 14:44:20.195686 TX Bit7 (978~1001) 24 989, Bit15 (975~998) 24 986,
2030 14:44:20.195746
2031 14:44:20.195805 Write Rank1 MR14 =0x1c
2032 14:44:20.195863
2033 14:44:20.195922 CH=0, VrefRange= 0, VrefLevel = 28
2034 14:44:20.195982 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
2035 14:44:20.196042 TX Bit1 (977~1001) 25 989, Bit9 (971~994) 24 982,
2036 14:44:20.196102 TX Bit2 (979~1001) 23 990, Bit10 (975~999) 25 987,
2037 14:44:20.196162 TX Bit3 (972~997) 26 984, Bit11 (969~992) 24 980,
2038 14:44:20.196222 TX Bit4 (977~1001) 25 989, Bit12 (971~995) 25 983,
2039 14:44:20.196283 TX Bit5 (975~998) 24 986, Bit13 (971~995) 25 983,
2040 14:44:20.196343 TX Bit6 (976~1000) 25 988, Bit14 (971~997) 27 984,
2041 14:44:20.196402 TX Bit7 (977~1001) 25 989, Bit15 (975~998) 24 986,
2042 14:44:20.196462
2043 14:44:20.196521 Write Rank1 MR14 =0x1e
2044 14:44:20.196580
2045 14:44:20.196639 CH=0, VrefRange= 0, VrefLevel = 30
2046 14:44:20.196699 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
2047 14:44:20.196759 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
2048 14:44:20.196819 TX Bit2 (978~1002) 25 990, Bit10 (975~999) 25 987,
2049 14:44:20.196879 TX Bit3 (971~997) 27 984, Bit11 (969~992) 24 980,
2050 14:44:20.196940 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
2051 14:44:20.197000 TX Bit5 (975~999) 25 987, Bit13 (970~994) 25 982,
2052 14:44:20.197059 TX Bit6 (976~999) 24 987, Bit14 (972~997) 26 984,
2053 14:44:20.197119 TX Bit7 (977~1002) 26 989, Bit15 (974~998) 25 986,
2054 14:44:20.197179
2055 14:44:20.197238 wait MRW command Rank1 MR14 =0x20 fired (1)
2056 14:44:20.197298 Write Rank1 MR14 =0x20
2057 14:44:20.197357
2058 14:44:20.197417 CH=0, VrefRange= 0, VrefLevel = 32
2059 14:44:20.197515 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
2060 14:44:20.197615 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
2061 14:44:20.197890 TX Bit2 (978~1002) 25 990, Bit10 (975~999) 25 987,
2062 14:44:20.197958 TX Bit3 (971~997) 27 984, Bit11 (969~992) 24 980,
2063 14:44:20.198020 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
2064 14:44:20.198082 TX Bit5 (975~999) 25 987, Bit13 (970~994) 25 982,
2065 14:44:20.198142 TX Bit6 (976~999) 24 987, Bit14 (972~997) 26 984,
2066 14:44:20.198202 TX Bit7 (977~1002) 26 989, Bit15 (974~998) 25 986,
2067 14:44:20.198262
2068 14:44:20.198322 Write Rank1 MR14 =0x22
2069 14:44:20.198382
2070 14:44:20.198442 CH=0, VrefRange= 0, VrefLevel = 34
2071 14:44:20.198502 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
2072 14:44:20.198561 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
2073 14:44:20.198622 TX Bit2 (978~1002) 25 990, Bit10 (975~999) 25 987,
2074 14:44:20.198682 TX Bit3 (971~997) 27 984, Bit11 (969~992) 24 980,
2075 14:44:20.198742 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
2076 14:44:20.198802 TX Bit5 (975~999) 25 987, Bit13 (970~994) 25 982,
2077 14:44:20.198862 TX Bit6 (976~999) 24 987, Bit14 (972~997) 26 984,
2078 14:44:20.198922 TX Bit7 (977~1002) 26 989, Bit15 (974~998) 25 986,
2079 14:44:20.198982
2080 14:44:20.199042 Write Rank1 MR14 =0x24
2081 14:44:20.199101
2082 14:44:20.199160 CH=0, VrefRange= 0, VrefLevel = 36
2083 14:44:20.199219 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
2084 14:44:20.199279 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
2085 14:44:20.199339 TX Bit2 (978~1002) 25 990, Bit10 (975~999) 25 987,
2086 14:44:20.199400 TX Bit3 (971~997) 27 984, Bit11 (969~992) 24 980,
2087 14:44:20.199459 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
2088 14:44:20.199519 TX Bit5 (975~999) 25 987, Bit13 (970~994) 25 982,
2089 14:44:20.199579 TX Bit6 (976~999) 24 987, Bit14 (972~997) 26 984,
2090 14:44:20.199639 TX Bit7 (977~1002) 26 989, Bit15 (974~998) 25 986,
2091 14:44:20.199699
2092 14:44:20.199758
2093 14:44:20.199817 TX Vref found, early break! 374< 380
2094 14:44:20.199877 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2095 14:44:20.199937 u1DelayCellOfst[0]=9 cells (7 PI)
2096 14:44:20.199997 u1DelayCellOfst[1]=7 cells (6 PI)
2097 14:44:20.200056 u1DelayCellOfst[2]=7 cells (6 PI)
2098 14:44:20.200115 u1DelayCellOfst[3]=0 cells (0 PI)
2099 14:44:20.200174 u1DelayCellOfst[4]=6 cells (5 PI)
2100 14:44:20.200233 u1DelayCellOfst[5]=3 cells (3 PI)
2101 14:44:20.200292 u1DelayCellOfst[6]=3 cells (3 PI)
2102 14:44:20.200351 u1DelayCellOfst[7]=6 cells (5 PI)
2103 14:44:20.200411 Byte0, DQ PI dly=984, DQM PI dly= 987
2104 14:44:20.200472 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2105 14:44:20.200532
2106 14:44:20.200591 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2107 14:44:20.200655
2108 14:44:20.200715 u1DelayCellOfst[8]=0 cells (0 PI)
2109 14:44:20.200775 u1DelayCellOfst[9]=3 cells (3 PI)
2110 14:44:20.200835 u1DelayCellOfst[10]=10 cells (8 PI)
2111 14:44:20.200894 u1DelayCellOfst[11]=1 cells (1 PI)
2112 14:44:20.200954 u1DelayCellOfst[12]=3 cells (3 PI)
2113 14:44:20.201014 u1DelayCellOfst[13]=3 cells (3 PI)
2114 14:44:20.201073 u1DelayCellOfst[14]=6 cells (5 PI)
2115 14:44:20.201133 u1DelayCellOfst[15]=9 cells (7 PI)
2116 14:44:20.201193 Byte1, DQ PI dly=979, DQM PI dly= 983
2117 14:44:20.201253 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2118 14:44:20.201313
2119 14:44:20.201372 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2120 14:44:20.201441
2121 14:44:20.201504 Write Rank1 MR14 =0x1e
2122 14:44:20.201564
2123 14:44:20.201623 Final TX Range 0 Vref 30
2124 14:44:20.201684
2125 14:44:20.201744 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2126 14:44:20.201805
2127 14:44:20.201865 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2128 14:44:20.201926 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2129 14:44:20.201987 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2130 14:44:20.202048 Write Rank1 MR3 =0xb0
2131 14:44:20.202108 DramC Write-DBI on
2132 14:44:20.202168 ==
2133 14:44:20.202228 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2134 14:44:20.202289 fsp= 1, odt_onoff= 1, Byte mode= 0
2135 14:44:20.202350 ==
2136 14:44:20.202409 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2137 14:44:20.202469
2138 14:44:20.202529 Begin, DQ Scan Range 703~767
2139 14:44:20.202608
2140 14:44:20.202714
2141 14:44:20.202779 TX Vref Scan disable
2142 14:44:20.202841 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2143 14:44:20.202904 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2144 14:44:20.202967 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2145 14:44:20.203029 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2146 14:44:20.203091 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2147 14:44:20.203152 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2148 14:44:20.203214 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2149 14:44:20.203276 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2150 14:44:20.203337 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2151 14:44:20.203399 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2152 14:44:20.203461 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2153 14:44:20.203522 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2154 14:44:20.203585 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2155 14:44:20.203646 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2156 14:44:20.203708 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2157 14:44:20.203769 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2158 14:44:20.203831 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2159 14:44:20.203892 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2160 14:44:20.203954 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2161 14:44:20.204016 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2162 14:44:20.204077 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2163 14:44:20.204139 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2164 14:44:20.204200 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2165 14:44:20.204262 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2166 14:44:20.204323 Byte0, DQ PI dly=733, DQM PI dly= 733
2167 14:44:20.204383 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2168 14:44:20.204444
2169 14:44:20.204503 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2170 14:44:20.204564
2171 14:44:20.204623 Byte1, DQ PI dly=726, DQM PI dly= 726
2172 14:44:20.204683 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2173 14:44:20.204744
2174 14:44:20.205004 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2175 14:44:20.205072
2176 14:44:20.205134 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2177 14:44:20.205196 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2178 14:44:20.205257 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2179 14:44:20.205318 wait MRW command Rank1 MR3 =0x30 fired (1)
2180 14:44:20.205379 Write Rank1 MR3 =0x30
2181 14:44:20.205449 DramC Write-DBI off
2182 14:44:20.205511
2183 14:44:20.205571 [DATLAT]
2184 14:44:20.205631 Freq=1600, CH0 RK1, use_rxtx_scan=0
2185 14:44:20.205691
2186 14:44:20.205750 DATLAT Default: 0x10
2187 14:44:20.205810 7, 0xFFFF, sum=0
2188 14:44:20.205871 8, 0xFFFF, sum=0
2189 14:44:20.205933 9, 0xFFFF, sum=0
2190 14:44:20.205994 10, 0xFFFF, sum=0
2191 14:44:20.206055 11, 0xFFFF, sum=0
2192 14:44:20.206116 12, 0xFFFF, sum=0
2193 14:44:20.206176 13, 0xFFFF, sum=0
2194 14:44:20.206237 14, 0x0, sum=1
2195 14:44:20.206298 15, 0x0, sum=2
2196 14:44:20.206359 16, 0x0, sum=3
2197 14:44:20.206420 17, 0x0, sum=4
2198 14:44:20.206482 pattern=2 first_step=14 total pass=5 best_step=16
2199 14:44:20.206542 ==
2200 14:44:20.206603 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2201 14:44:20.206663 fsp= 1, odt_onoff= 1, Byte mode= 0
2202 14:44:20.206724 ==
2203 14:44:20.206784 Start DQ dly to find pass range UseTestEngine =1
2204 14:44:20.206844 x-axis: bit #, y-axis: DQ dly (-127~63)
2205 14:44:20.206905 RX Vref Scan = 0
2206 14:44:20.206965 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2207 14:44:20.207026 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2208 14:44:20.207088 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2209 14:44:20.207149 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2210 14:44:20.207210 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2211 14:44:20.207271 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2212 14:44:20.207332 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2213 14:44:20.207392 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2214 14:44:20.207454 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2215 14:44:20.207515 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2216 14:44:20.207576 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2217 14:44:20.207637 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2218 14:44:20.207698 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2219 14:44:20.207759 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2220 14:44:20.207821 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2221 14:44:20.207883 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2222 14:44:20.207944 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2223 14:44:20.208004 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2224 14:44:20.208066 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2225 14:44:20.208127 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2226 14:44:20.208187 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2227 14:44:20.208249 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2228 14:44:20.208309 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2229 14:44:20.208370 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2230 14:44:20.208431 -2, [0] xxxoxxxx ooxoxoxx [MSB]
2231 14:44:20.208493 -1, [0] xxxoxoxx ooxoooxx [MSB]
2232 14:44:20.208554 0, [0] xxxoxoxx ooxoooxx [MSB]
2233 14:44:20.208616 1, [0] xxxoxoox ooxoooxx [MSB]
2234 14:44:20.208677 2, [0] xxxoxoox ooxoooox [MSB]
2235 14:44:20.208738 3, [0] xxxooooo ooxoooox [MSB]
2236 14:44:20.208800 4, [0] ooxooooo ooxooooo [MSB]
2237 14:44:20.208860 5, [0] oooooooo ooxooooo [MSB]
2238 14:44:20.208921 6, [0] oooooooo ooxooooo [MSB]
2239 14:44:20.208982 32, [0] oooxoooo oooooooo [MSB]
2240 14:44:20.209044 33, [0] oooxoooo xooxoooo [MSB]
2241 14:44:20.209104 34, [0] oooxoooo xooxoxoo [MSB]
2242 14:44:20.209166 35, [0] oooxoxoo xxoxxxoo [MSB]
2243 14:44:20.209227 36, [0] oooxoxxo xxoxxxxo [MSB]
2244 14:44:20.209288 37, [0] oooxoxxo xxoxxxxo [MSB]
2245 14:44:20.209349 38, [0] oooxoxxx xxoxxxxx [MSB]
2246 14:44:20.209411 39, [0] oxoxxxxx xxoxxxxx [MSB]
2247 14:44:20.209483 40, [0] xxoxxxxx xxoxxxxx [MSB]
2248 14:44:20.209545 41, [0] xxxxxxxx xxxxxxxx [MSB]
2249 14:44:20.209606 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2250 14:44:20.209667 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2251 14:44:20.209727 iDelay=41, Bit 2, Center 22 (5 ~ 40) 36
2252 14:44:20.209787 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2253 14:44:20.209846 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
2254 14:44:20.209906 iDelay=41, Bit 5, Center 16 (-1 ~ 34) 36
2255 14:44:20.209966 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2256 14:44:20.210025 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
2257 14:44:20.210084 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2258 14:44:20.210145 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2259 14:44:20.210205 iDelay=41, Bit 10, Center 23 (7 ~ 40) 34
2260 14:44:20.210279 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2261 14:44:20.210537 iDelay=41, Bit 12, Center 16 (-1 ~ 34) 36
2262 14:44:20.216699 iDelay=41, Bit 13, Center 15 (-2 ~ 33) 36
2263 14:44:20.220094 iDelay=41, Bit 14, Center 18 (2 ~ 35) 34
2264 14:44:20.223442 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
2265 14:44:20.223534 ==
2266 14:44:20.226691 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2267 14:44:20.230117 fsp= 1, odt_onoff= 1, Byte mode= 0
2268 14:44:20.230210 ==
2269 14:44:20.233209 DQS Delay:
2270 14:44:20.233301 DQS0 = 0, DQS1 = 0
2271 14:44:20.236799 DQM Delay:
2272 14:44:20.236891 DQM0 = 19, DQM1 = 17
2273 14:44:20.236965 DQ Delay:
2274 14:44:20.239643 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2275 14:44:20.243165 DQ4 =20, DQ5 =16, DQ6 =18, DQ7 =20
2276 14:44:20.246459 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2277 14:44:20.249726 DQ12 =16, DQ13 =15, DQ14 =18, DQ15 =20
2278 14:44:20.249815
2279 14:44:20.253069
2280 14:44:20.253152
2281 14:44:20.253223 [DramC_TX_OE_Calibration] TA2
2282 14:44:20.256248 Original DQ_B0 (3 6) =30, OEN = 27
2283 14:44:20.259755 Original DQ_B1 (3 6) =30, OEN = 27
2284 14:44:20.262822 23, 0x0, End_B0=23 End_B1=23
2285 14:44:20.266232 24, 0x0, End_B0=24 End_B1=24
2286 14:44:20.269333 25, 0x0, End_B0=25 End_B1=25
2287 14:44:20.269427 26, 0x0, End_B0=26 End_B1=26
2288 14:44:20.272383 27, 0x0, End_B0=27 End_B1=27
2289 14:44:20.276083 28, 0x0, End_B0=28 End_B1=28
2290 14:44:20.279027 29, 0x0, End_B0=29 End_B1=29
2291 14:44:20.282392 30, 0x0, End_B0=30 End_B1=30
2292 14:44:20.282486 31, 0xFFFF, End_B0=30 End_B1=30
2293 14:44:20.288850 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2294 14:44:20.295459 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2295 14:44:20.295599
2296 14:44:20.295682
2297 14:44:20.298878 Write Rank1 MR23 =0x3f
2298 14:44:20.298970 [DQSOSC]
2299 14:44:20.305105 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4a4, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2300 14:44:20.311722 CH0_RK1: MR19=0x202, MR18=0xA4A4, DQSOSC=465, MR23=63, INC=11, DEC=17
2301 14:44:20.315179 Write Rank1 MR23 =0x3f
2302 14:44:20.315274 [DQSOSC]
2303 14:44:20.325083 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5a5, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2304 14:44:20.325179 CH0 RK1: MR19=202, MR18=A5A5
2305 14:44:20.328272 [RxdqsGatingPostProcess] freq 1600
2306 14:44:20.334751 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2307 14:44:20.334844 Rank: 0
2308 14:44:20.338021 best DQS0 dly(2T, 0.5T) = (2, 6)
2309 14:44:20.341455 best DQS1 dly(2T, 0.5T) = (2, 6)
2310 14:44:20.344824 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2311 14:44:20.347775 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2312 14:44:20.347869 Rank: 1
2313 14:44:20.351204 best DQS0 dly(2T, 0.5T) = (2, 6)
2314 14:44:20.354257 best DQS1 dly(2T, 0.5T) = (2, 6)
2315 14:44:20.357733 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2316 14:44:20.360766 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2317 14:44:20.364021 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2318 14:44:20.367447 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2319 14:44:20.373945 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2320 14:44:20.377333 Write Rank0 MR13 =0x59
2321 14:44:20.377426 ==
2322 14:44:20.380441 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2323 14:44:20.383928 fsp= 1, odt_onoff= 1, Byte mode= 0
2324 14:44:20.384021 ==
2325 14:44:20.387256 === u2Vref_new: 0x56 --> 0x3a
2326 14:44:20.390648 === u2Vref_new: 0x58 --> 0x58
2327 14:44:20.393886 === u2Vref_new: 0x5a --> 0x5a
2328 14:44:20.397069 === u2Vref_new: 0x5c --> 0x78
2329 14:44:20.400146 === u2Vref_new: 0x5e --> 0x7a
2330 14:44:20.403459 === u2Vref_new: 0x60 --> 0x90
2331 14:44:20.406564 [CA 0] Center 37 (12~63) winsize 52
2332 14:44:20.409984 [CA 1] Center 37 (12~63) winsize 52
2333 14:44:20.413109 [CA 2] Center 34 (6~63) winsize 58
2334 14:44:20.416685 [CA 3] Center 35 (7~63) winsize 57
2335 14:44:20.419868 [CA 4] Center 34 (5~63) winsize 59
2336 14:44:20.422929 [CA 5] Center 28 (-1~58) winsize 60
2337 14:44:20.423014
2338 14:44:20.426465 [CATrainingPosCal] consider 1 rank data
2339 14:44:20.429661 u2DelayCellTimex100 = 744/100 ps
2340 14:44:20.432817 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2341 14:44:20.436412 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2342 14:44:20.439319 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2343 14:44:20.442675 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2344 14:44:20.446049 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2345 14:44:20.449235 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2346 14:44:20.449334
2347 14:44:20.455940 CA PerBit enable=1, Macro0, CA PI delay=28
2348 14:44:20.456035 === u2Vref_new: 0x5a --> 0x5a
2349 14:44:20.456110
2350 14:44:20.459378 Vref(ca) range 1: 26
2351 14:44:20.459470
2352 14:44:20.462238 CS Dly= 11 (42-0-32)
2353 14:44:20.462330 Write Rank0 MR13 =0xd8
2354 14:44:20.465992 Write Rank0 MR13 =0xd8
2355 14:44:20.468939 Write Rank0 MR12 =0x5a
2356 14:44:20.469032 Write Rank1 MR13 =0x59
2357 14:44:20.469104 ==
2358 14:44:20.475390 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2359 14:44:20.478757 fsp= 1, odt_onoff= 1, Byte mode= 0
2360 14:44:20.478850 ==
2361 14:44:20.482000 === u2Vref_new: 0x56 --> 0x3a
2362 14:44:20.485408 === u2Vref_new: 0x58 --> 0x58
2363 14:44:20.488665 === u2Vref_new: 0x5a --> 0x5a
2364 14:44:20.491674 === u2Vref_new: 0x5c --> 0x78
2365 14:44:20.491768 === u2Vref_new: 0x5e --> 0x7a
2366 14:44:20.495518 === u2Vref_new: 0x60 --> 0x90
2367 14:44:20.498949 [CA 0] Center 37 (12~63) winsize 52
2368 14:44:20.502124 [CA 1] Center 37 (12~63) winsize 52
2369 14:44:20.505300 [CA 2] Center 34 (5~63) winsize 59
2370 14:44:20.508594 [CA 3] Center 35 (8~63) winsize 56
2371 14:44:20.511961 [CA 4] Center 33 (4~63) winsize 60
2372 14:44:20.515266 [CA 5] Center 29 (-1~59) winsize 61
2373 14:44:20.515390
2374 14:44:20.518369 [CATrainingPosCal] consider 2 rank data
2375 14:44:20.521959 u2DelayCellTimex100 = 744/100 ps
2376 14:44:20.524960 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2377 14:44:20.531574 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2378 14:44:20.534701 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2379 14:44:20.538317 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2380 14:44:20.541229 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2381 14:44:20.544820 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2382 14:44:20.544945
2383 14:44:20.547927 CA PerBit enable=1, Macro0, CA PI delay=28
2384 14:44:20.551187 === u2Vref_new: 0x5c --> 0x78
2385 14:44:20.551280
2386 14:44:20.554414 Vref(ca) range 1: 28
2387 14:44:20.554541
2388 14:44:20.554650 CS Dly= 11 (42-0-32)
2389 14:44:20.557831 Write Rank1 MR13 =0xd8
2390 14:44:20.560905 Write Rank1 MR13 =0xd8
2391 14:44:20.561027 Write Rank1 MR12 =0x5c
2392 14:44:20.564239 [RankSwap] Rank num 2, (Multi 1), Rank 0
2393 14:44:20.567719 Write Rank0 MR2 =0xad
2394 14:44:20.567869 [Write Leveling]
2395 14:44:20.570866 delay byte0 byte1 byte2 byte3
2396 14:44:20.570995
2397 14:44:20.574673 10 0 0
2398 14:44:20.574868 11 0 0
2399 14:44:20.577401 12 0 0
2400 14:44:20.577518 13 0 0
2401 14:44:20.577595 14 0 0
2402 14:44:20.580933 15 0 0
2403 14:44:20.581058 16 0 0
2404 14:44:20.584163 17 0 0
2405 14:44:20.584260 18 0 0
2406 14:44:20.587185 19 0 0
2407 14:44:20.587278 20 0 0
2408 14:44:20.587386 21 0 0
2409 14:44:20.590693 22 0 0
2410 14:44:20.590786 23 0 0
2411 14:44:20.593579 24 0 0
2412 14:44:20.593672 25 0 0
2413 14:44:20.596978 26 0 0
2414 14:44:20.597071 27 0 0
2415 14:44:20.597146 28 0 ff
2416 14:44:20.600209 29 0 0
2417 14:44:20.600302 30 0 ff
2418 14:44:20.603478 31 0 ff
2419 14:44:20.603571 32 0 ff
2420 14:44:20.606847 33 0 ff
2421 14:44:20.606940 34 0 ff
2422 14:44:20.607014 35 0 ff
2423 14:44:20.610206 36 ff ff
2424 14:44:20.610299 37 ff ff
2425 14:44:20.613347 38 ff ff
2426 14:44:20.613450 39 ff ff
2427 14:44:20.616808 40 ff ff
2428 14:44:20.616901 41 ff ff
2429 14:44:20.620066 42 ff ff
2430 14:44:20.623206 pass bytecount = 0xff (0xff: all bytes pass)
2431 14:44:20.623340
2432 14:44:20.623448 DQS0 dly: 36
2433 14:44:20.626259 DQS1 dly: 30
2434 14:44:20.626361 Write Rank0 MR2 =0x2d
2435 14:44:20.632991 [RankSwap] Rank num 2, (Multi 1), Rank 0
2436 14:44:20.633080 Write Rank0 MR1 =0xd6
2437 14:44:20.633160 [Gating]
2438 14:44:20.636460 ==
2439 14:44:20.639495 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2440 14:44:20.643033 fsp= 1, odt_onoff= 1, Byte mode= 0
2441 14:44:20.643118 ==
2442 14:44:20.646220 3 1 0 |2c2b 2727 |(11 11)(11 11) |(1 1)(0 0)| 0
2443 14:44:20.652728 3 1 4 |2c2b 3636 |(11 11)(11 11) |(1 1)(0 0)| 0
2444 14:44:20.656140 3 1 8 |2c2b 201f |(11 11)(11 11) |(1 1)(1 1)| 0
2445 14:44:20.659393 3 1 12 |2c2b 3635 |(11 11)(11 11) |(0 0)(0 0)| 0
2446 14:44:20.665899 3 1 16 |2c2b 3736 |(11 11)(11 11) |(1 0)(0 0)| 0
2447 14:44:20.669190 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2448 14:44:20.672295 3 1 24 |2c2b b0a |(11 11)(11 11) |(1 0)(1 1)| 0
2449 14:44:20.678911 3 1 28 |2c2b 2929 |(11 11)(11 11) |(1 0)(0 0)| 0
2450 14:44:20.682027 3 2 0 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 1)| 0
2451 14:44:20.685566 3 2 4 |2c2b 2020 |(11 11)(1 1) |(1 0)(0 1)| 0
2452 14:44:20.691867 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2453 14:44:20.695403 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 0)| 0
2454 14:44:20.698388 3 2 16 |404 504 |(11 11)(11 11) |(1 0)(1 0)| 0
2455 14:44:20.705296 3 2 20 |3534 3434 |(11 11)(10 11) |(0 0)(0 0)| 0
2456 14:44:20.708283 3 2 24 |3534 f0e |(11 11)(11 11) |(0 0)(1 1)| 0
2457 14:44:20.711752 3 2 28 |3534 3838 |(11 11)(11 11) |(0 0)(1 1)| 0
2458 14:44:20.718289 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2459 14:44:20.721577 3 3 4 |3534 3b3a |(11 11)(11 11) |(0 0)(1 1)| 0
2460 14:44:20.725052 3 3 8 |3534 3b3a |(11 11)(11 11) |(1 1)(1 1)| 0
2461 14:44:20.731079 3 3 12 |3534 2f2f |(11 11)(11 11) |(0 0)(1 1)| 0
2462 14:44:20.734813 3 3 16 |3534 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
2463 14:44:20.737848 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2464 14:44:20.744522 3 3 24 |3534 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2465 14:44:20.747831 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2466 14:44:20.751076 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2467 14:44:20.754077 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2468 14:44:20.760654 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2469 14:44:20.764069 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2470 14:44:20.767466 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2471 14:44:20.773803 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2472 14:44:20.777137 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2473 14:44:20.780253 3 4 20 |505 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2474 14:44:20.786691 3 4 24 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2475 14:44:20.790225 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2476 14:44:20.793098 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2477 14:44:20.800103 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2478 14:44:20.803114 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2479 14:44:20.806299 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2480 14:44:20.813005 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2481 14:44:20.816080 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2482 14:44:20.819374 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2483 14:44:20.826042 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2484 14:44:20.829324 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2485 14:44:20.832566 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2486 14:44:20.839101 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2487 14:44:20.842514 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2488 14:44:20.845381 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2489 14:44:20.852052 [Byte 0] Lead/lag Transition tap number (3)
2490 14:44:20.855376 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2491 14:44:20.858770 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2492 14:44:20.862091 [Byte 1] Lead/lag Transition tap number (2)
2493 14:44:20.868326 3 6 20 |4646 3d3d |(10 10)(11 11) |(0 0)(0 0)| 0
2494 14:44:20.872011 3 6 24 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
2495 14:44:20.874861 [Byte 0]First pass (3, 6, 24)
2496 14:44:20.878328 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2497 14:44:20.881351 [Byte 1]First pass (3, 6, 28)
2498 14:44:20.884823 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2499 14:44:20.888193 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2500 14:44:20.891255 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2501 14:44:20.897729 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2502 14:44:20.901279 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2503 14:44:20.904707 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2504 14:44:20.907812 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2505 14:44:20.914246 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2506 14:44:20.917652 All bytes gating window > 1UI, Early break!
2507 14:44:20.917744
2508 14:44:20.920907 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2509 14:44:20.921002
2510 14:44:20.924033 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2511 14:44:20.924125
2512 14:44:20.924198
2513 14:44:20.924266
2514 14:44:20.927434 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2515 14:44:20.927527
2516 14:44:20.934057 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2517 14:44:20.934149
2518 14:44:20.934222
2519 14:44:20.934289 Write Rank0 MR1 =0x56
2520 14:44:20.934356
2521 14:44:20.937086 best RODT dly(2T, 0.5T) = (2, 3)
2522 14:44:20.937177
2523 14:44:20.940604 best RODT dly(2T, 0.5T) = (2, 3)
2524 14:44:20.940696 ==
2525 14:44:20.947101 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2526 14:44:20.950193 fsp= 1, odt_onoff= 1, Byte mode= 0
2527 14:44:20.950286 ==
2528 14:44:20.953521 Start DQ dly to find pass range UseTestEngine =0
2529 14:44:20.956785 x-axis: bit #, y-axis: DQ dly (-127~63)
2530 14:44:20.960044 RX Vref Scan = 0
2531 14:44:20.963134 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2532 14:44:20.966428 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2533 14:44:20.969795 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2534 14:44:20.969887 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2535 14:44:20.973248 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2536 14:44:20.976260 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2537 14:44:20.979802 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2538 14:44:20.983061 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2539 14:44:20.986139 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2540 14:44:20.989561 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2541 14:44:20.992641 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2542 14:44:20.996135 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2543 14:44:20.996228 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2544 14:44:20.999242 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2545 14:44:21.002630 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2546 14:44:21.006029 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2547 14:44:21.009417 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2548 14:44:21.012579 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2549 14:44:21.015821 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2550 14:44:21.018831 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2551 14:44:21.022204 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2552 14:44:21.022328 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2553 14:44:21.025653 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2554 14:44:21.028771 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2555 14:44:21.032163 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2556 14:44:21.035384 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2557 14:44:21.038794 0, [0] xxxoxxxx ooxxxxxo [MSB]
2558 14:44:21.041776 1, [0] xxooxxxo oooxxxxo [MSB]
2559 14:44:21.041876 2, [0] xxooxxxo ooooxxxo [MSB]
2560 14:44:21.045121 3, [0] xxooxxxo oooooxoo [MSB]
2561 14:44:21.048262 4, [0] oooooxxo oooooooo [MSB]
2562 14:44:21.051827 5, [0] oooooxoo oooooooo [MSB]
2563 14:44:21.054884 6, [0] oooooxoo oooooooo [MSB]
2564 14:44:21.058190 32, [0] oooooooo ooooooox [MSB]
2565 14:44:21.061350 33, [0] oooooooo ooooooox [MSB]
2566 14:44:21.061453 34, [0] oooooooo ooooooox [MSB]
2567 14:44:21.065051 35, [0] ooxooooo oxooooox [MSB]
2568 14:44:21.067930 36, [0] ooxxoooo xxooooox [MSB]
2569 14:44:21.071231 37, [0] ooxxoooo xxooooox [MSB]
2570 14:44:21.074785 38, [0] oxxxoooo xxooooox [MSB]
2571 14:44:21.077643 39, [0] oxxxooox xxxxooox [MSB]
2572 14:44:21.081043 40, [0] oxxxxoox xxxxxoox [MSB]
2573 14:44:21.084551 41, [0] xxxxxoxx xxxxxxxx [MSB]
2574 14:44:21.084640 42, [0] xxxxxxxx xxxxxxxx [MSB]
2575 14:44:21.087564 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
2576 14:44:21.093962 iDelay=42, Bit 1, Center 20 (4 ~ 37) 34
2577 14:44:21.097575 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
2578 14:44:21.101003 iDelay=42, Bit 3, Center 17 (-1 ~ 35) 37
2579 14:44:21.104118 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2580 14:44:21.107249 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2581 14:44:21.110479 iDelay=42, Bit 6, Center 22 (5 ~ 40) 36
2582 14:44:21.113985 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
2583 14:44:21.117352 iDelay=42, Bit 8, Center 17 (-1 ~ 35) 37
2584 14:44:21.120324 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2585 14:44:21.123781 iDelay=42, Bit 10, Center 19 (1 ~ 38) 38
2586 14:44:21.126909 iDelay=42, Bit 11, Center 20 (2 ~ 38) 37
2587 14:44:21.133503 iDelay=42, Bit 12, Center 21 (3 ~ 39) 37
2588 14:44:21.136652 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2589 14:44:21.140240 iDelay=42, Bit 14, Center 21 (3 ~ 40) 38
2590 14:44:21.143212 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2591 14:44:21.143309 ==
2592 14:44:21.150009 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2593 14:44:21.150100 fsp= 1, odt_onoff= 1, Byte mode= 0
2594 14:44:21.153038 ==
2595 14:44:21.153128 DQS Delay:
2596 14:44:21.153199 DQS0 = 0, DQS1 = 0
2597 14:44:21.156468 DQM Delay:
2598 14:44:21.156558 DQM0 = 20, DQM1 = 18
2599 14:44:21.159483 DQ Delay:
2600 14:44:21.162870 DQ0 =22, DQ1 =20, DQ2 =17, DQ3 =17
2601 14:44:21.162960 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =19
2602 14:44:21.166081 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
2603 14:44:21.172728 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =13
2604 14:44:21.172819
2605 14:44:21.172890
2606 14:44:21.172956 DramC Write-DBI off
2607 14:44:21.173019 ==
2608 14:44:21.179447 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2609 14:44:21.182562 fsp= 1, odt_onoff= 1, Byte mode= 0
2610 14:44:21.182653 ==
2611 14:44:21.185943 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2612 14:44:21.186043
2613 14:44:21.189275 Begin, DQ Scan Range 926~1182
2614 14:44:21.189364
2615 14:44:21.189488
2616 14:44:21.192114 TX Vref Scan disable
2617 14:44:21.195893 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2618 14:44:21.198847 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2619 14:44:21.202304 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2620 14:44:21.205657 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2621 14:44:21.208755 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2622 14:44:21.211944 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2623 14:44:21.215259 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2624 14:44:21.218479 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2625 14:44:21.222030 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2626 14:44:21.228255 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2627 14:44:21.231820 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2628 14:44:21.234815 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2629 14:44:21.238301 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2630 14:44:21.241616 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2631 14:44:21.244551 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2632 14:44:21.248111 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2633 14:44:21.251328 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2634 14:44:21.254296 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2635 14:44:21.257681 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2636 14:44:21.261040 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2637 14:44:21.264397 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2638 14:44:21.267366 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2639 14:44:21.273975 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2640 14:44:21.277522 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2641 14:44:21.280885 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2642 14:44:21.283833 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2643 14:44:21.287385 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2644 14:44:21.290496 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2645 14:44:21.293874 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2646 14:44:21.297091 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2647 14:44:21.300314 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2648 14:44:21.303674 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2649 14:44:21.306872 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2650 14:44:21.310465 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2651 14:44:21.313603 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2652 14:44:21.320106 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2653 14:44:21.323569 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2654 14:44:21.326707 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2655 14:44:21.329871 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2656 14:44:21.333141 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2657 14:44:21.336606 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2658 14:44:21.339879 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2659 14:44:21.342792 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2660 14:44:21.346465 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2661 14:44:21.349394 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2662 14:44:21.352862 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2663 14:44:21.356007 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2664 14:44:21.359421 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2665 14:44:21.362631 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2666 14:44:21.365943 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
2667 14:44:21.369048 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
2668 14:44:21.375609 977 |3 6 17|[0] xxxxxxxx oooxxxoo [MSB]
2669 14:44:21.379040 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2670 14:44:21.382123 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2671 14:44:21.385574 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2672 14:44:21.388895 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2673 14:44:21.391912 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2674 14:44:21.395310 983 |3 6 23|[0] xooooxxo oooooooo [MSB]
2675 14:44:21.401940 992 |3 6 32|[0] oooooooo ooooooox [MSB]
2676 14:44:21.405108 993 |3 6 33|[0] oooooooo oxooooox [MSB]
2677 14:44:21.408345 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2678 14:44:21.411671 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2679 14:44:21.414924 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2680 14:44:21.418192 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2681 14:44:21.421822 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2682 14:44:21.424624 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2683 14:44:21.428235 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2684 14:44:21.431302 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2685 14:44:21.434604 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2686 14:44:21.438052 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
2687 14:44:21.444386 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2688 14:44:21.447856 1005 |3 6 45|[0] ooxxxoxx xxxxxxxx [MSB]
2689 14:44:21.451184 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2690 14:44:21.454426 Byte0, DQ PI dly=992, DQM PI dly= 992
2691 14:44:21.457519 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2692 14:44:21.457606
2693 14:44:21.463938 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2694 14:44:21.464023
2695 14:44:21.467401 Byte1, DQ PI dly=984, DQM PI dly= 984
2696 14:44:21.470907 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2697 14:44:21.470985
2698 14:44:21.473968 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2699 14:44:21.474054
2700 14:44:21.474128 ==
2701 14:44:21.480662 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2702 14:44:21.483580 fsp= 1, odt_onoff= 1, Byte mode= 0
2703 14:44:21.483660 ==
2704 14:44:21.487030 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2705 14:44:21.487117
2706 14:44:21.490494 Begin, DQ Scan Range 960~1024
2707 14:44:21.493393 Write Rank0 MR14 =0x0
2708 14:44:21.500730
2709 14:44:21.500856 CH=1, VrefRange= 0, VrefLevel = 0
2710 14:44:21.507288 TX Bit0 (986~1000) 15 993, Bit8 (977~991) 15 984,
2711 14:44:21.510591 TX Bit1 (984~1000) 17 992, Bit9 (977~989) 13 983,
2712 14:44:21.517252 TX Bit2 (984~997) 14 990, Bit10 (979~992) 14 985,
2713 14:44:21.520392 TX Bit3 (981~995) 15 988, Bit11 (982~992) 11 987,
2714 14:44:21.523896 TX Bit4 (984~999) 16 991, Bit12 (981~992) 12 986,
2715 14:44:21.530220 TX Bit5 (986~1000) 15 993, Bit13 (982~993) 12 987,
2716 14:44:21.533747 TX Bit6 (985~999) 15 992, Bit14 (980~992) 13 986,
2717 14:44:21.539971 TX Bit7 (985~999) 15 992, Bit15 (976~984) 9 980,
2718 14:44:21.540062
2719 14:44:21.540138 Write Rank0 MR14 =0x2
2720 14:44:21.549452
2721 14:44:21.549545 CH=1, VrefRange= 0, VrefLevel = 2
2722 14:44:21.555896 TX Bit0 (986~1001) 16 993, Bit8 (977~991) 15 984,
2723 14:44:21.559180 TX Bit1 (984~1000) 17 992, Bit9 (977~990) 14 983,
2724 14:44:21.565931 TX Bit2 (983~998) 16 990, Bit10 (979~993) 15 986,
2725 14:44:21.569008 TX Bit3 (980~996) 17 988, Bit11 (981~992) 12 986,
2726 14:44:21.572528 TX Bit4 (984~999) 16 991, Bit12 (980~993) 14 986,
2727 14:44:21.578980 TX Bit5 (986~1001) 16 993, Bit13 (981~994) 14 987,
2728 14:44:21.582318 TX Bit6 (985~1000) 16 992, Bit14 (979~992) 14 985,
2729 14:44:21.588441 TX Bit7 (985~999) 15 992, Bit15 (975~985) 11 980,
2730 14:44:21.588537
2731 14:44:21.588609 Write Rank0 MR14 =0x4
2732 14:44:21.598248
2733 14:44:21.598342 CH=1, VrefRange= 0, VrefLevel = 4
2734 14:44:21.605143 TX Bit0 (985~1002) 18 993, Bit8 (976~991) 16 983,
2735 14:44:21.608220 TX Bit1 (984~1001) 18 992, Bit9 (976~990) 15 983,
2736 14:44:21.614857 TX Bit2 (983~999) 17 991, Bit10 (978~994) 17 986,
2737 14:44:21.618163 TX Bit3 (980~997) 18 988, Bit11 (981~993) 13 987,
2738 14:44:21.621345 TX Bit4 (984~1000) 17 992, Bit12 (979~993) 15 986,
2739 14:44:21.627877 TX Bit5 (985~1001) 17 993, Bit13 (981~995) 15 988,
2740 14:44:21.631087 TX Bit6 (985~1000) 16 992, Bit14 (979~993) 15 986,
2741 14:44:21.637402 TX Bit7 (984~1000) 17 992, Bit15 (976~986) 11 981,
2742 14:44:21.637510
2743 14:44:21.637613 Write Rank0 MR14 =0x6
2744 14:44:21.647440
2745 14:44:21.647533 CH=1, VrefRange= 0, VrefLevel = 6
2746 14:44:21.654261 TX Bit0 (985~1003) 19 994, Bit8 (976~992) 17 984,
2747 14:44:21.657401 TX Bit1 (984~1002) 19 993, Bit9 (976~991) 16 983,
2748 14:44:21.663917 TX Bit2 (982~999) 18 990, Bit10 (978~994) 17 986,
2749 14:44:21.667231 TX Bit3 (979~997) 19 988, Bit11 (980~994) 15 987,
2750 14:44:21.670490 TX Bit4 (984~1000) 17 992, Bit12 (979~994) 16 986,
2751 14:44:21.677062 TX Bit5 (985~1002) 18 993, Bit13 (981~996) 16 988,
2752 14:44:21.680574 TX Bit6 (984~1000) 17 992, Bit14 (979~993) 15 986,
2753 14:44:21.687023 TX Bit7 (984~1000) 17 992, Bit15 (975~987) 13 981,
2754 14:44:21.687109
2755 14:44:21.687181 Write Rank0 MR14 =0x8
2756 14:44:21.696968
2757 14:44:21.697058 CH=1, VrefRange= 0, VrefLevel = 8
2758 14:44:21.703539 TX Bit0 (985~1004) 20 994, Bit8 (976~992) 17 984,
2759 14:44:21.706797 TX Bit1 (984~1002) 19 993, Bit9 (976~991) 16 983,
2760 14:44:21.713330 TX Bit2 (982~1000) 19 991, Bit10 (977~995) 19 986,
2761 14:44:21.716740 TX Bit3 (979~998) 20 988, Bit11 (980~995) 16 987,
2762 14:44:21.723212 TX Bit4 (983~1001) 19 992, Bit12 (978~995) 18 986,
2763 14:44:21.726769 TX Bit5 (985~1003) 19 994, Bit13 (980~997) 18 988,
2764 14:44:21.729936 TX Bit6 (984~1001) 18 992, Bit14 (978~994) 17 986,
2765 14:44:21.736264 TX Bit7 (984~1001) 18 992, Bit15 (975~989) 15 982,
2766 14:44:21.736356
2767 14:44:21.736429 Write Rank0 MR14 =0xa
2768 14:44:21.746514
2769 14:44:21.749866 CH=1, VrefRange= 0, VrefLevel = 10
2770 14:44:21.752913 TX Bit0 (985~1004) 20 994, Bit8 (976~993) 18 984,
2771 14:44:21.756435 TX Bit1 (984~1003) 20 993, Bit9 (975~991) 17 983,
2772 14:44:21.763058 TX Bit2 (982~1000) 19 991, Bit10 (977~996) 20 986,
2773 14:44:21.765974 TX Bit3 (978~998) 21 988, Bit11 (979~995) 17 987,
2774 14:44:21.772751 TX Bit4 (983~1002) 20 992, Bit12 (978~996) 19 987,
2775 14:44:21.776463 TX Bit5 (985~1004) 20 994, Bit13 (980~997) 18 988,
2776 14:44:21.779203 TX Bit6 (984~1002) 19 993, Bit14 (978~995) 18 986,
2777 14:44:21.785714 TX Bit7 (984~1002) 19 993, Bit15 (974~990) 17 982,
2778 14:44:21.785806
2779 14:44:21.785878 Write Rank0 MR14 =0xc
2780 14:44:21.796068
2781 14:44:21.799520 CH=1, VrefRange= 0, VrefLevel = 12
2782 14:44:21.802931 TX Bit0 (985~1005) 21 995, Bit8 (976~994) 19 985,
2783 14:44:21.806032 TX Bit1 (984~1004) 21 994, Bit9 (975~991) 17 983,
2784 14:44:21.812425 TX Bit2 (982~1000) 19 991, Bit10 (977~997) 21 987,
2785 14:44:21.815952 TX Bit3 (978~998) 21 988, Bit11 (978~997) 20 987,
2786 14:44:21.822393 TX Bit4 (983~1002) 20 992, Bit12 (978~997) 20 987,
2787 14:44:21.825611 TX Bit5 (985~1005) 21 995, Bit13 (979~998) 20 988,
2788 14:44:21.829099 TX Bit6 (984~1003) 20 993, Bit14 (977~996) 20 986,
2789 14:44:21.835370 TX Bit7 (984~1002) 19 993, Bit15 (974~990) 17 982,
2790 14:44:21.835552
2791 14:44:21.835673 Write Rank0 MR14 =0xe
2792 14:44:21.845727
2793 14:44:21.848937 CH=1, VrefRange= 0, VrefLevel = 14
2794 14:44:21.852706 TX Bit0 (984~1005) 22 994, Bit8 (976~994) 19 985,
2795 14:44:21.855775 TX Bit1 (983~1004) 22 993, Bit9 (975~992) 18 983,
2796 14:44:21.862415 TX Bit2 (982~1001) 20 991, Bit10 (977~997) 21 987,
2797 14:44:21.865634 TX Bit3 (978~999) 22 988, Bit11 (978~997) 20 987,
2798 14:44:21.872017 TX Bit4 (983~1004) 22 993, Bit12 (978~998) 21 988,
2799 14:44:21.875202 TX Bit5 (985~1005) 21 995, Bit13 (979~998) 20 988,
2800 14:44:21.878368 TX Bit6 (984~1004) 21 994, Bit14 (977~997) 21 987,
2801 14:44:21.884977 TX Bit7 (984~1003) 20 993, Bit15 (974~990) 17 982,
2802 14:44:21.885137
2803 14:44:21.888129 Write Rank0 MR14 =0x10
2804 14:44:21.895687
2805 14:44:21.899251 CH=1, VrefRange= 0, VrefLevel = 16
2806 14:44:21.902445 TX Bit0 (984~1005) 22 994, Bit8 (975~995) 21 985,
2807 14:44:21.905759 TX Bit1 (982~1005) 24 993, Bit9 (975~992) 18 983,
2808 14:44:21.912206 TX Bit2 (980~1001) 22 990, Bit10 (977~998) 22 987,
2809 14:44:21.915304 TX Bit3 (978~999) 22 988, Bit11 (978~998) 21 988,
2810 14:44:21.921992 TX Bit4 (982~1004) 23 993, Bit12 (977~998) 22 987,
2811 14:44:21.925483 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
2812 14:44:21.928655 TX Bit6 (984~1004) 21 994, Bit14 (977~997) 21 987,
2813 14:44:21.935060 TX Bit7 (983~1004) 22 993, Bit15 (973~991) 19 982,
2814 14:44:21.935451
2815 14:44:21.935782 Write Rank0 MR14 =0x12
2816 14:44:21.946283
2817 14:44:21.949358 CH=1, VrefRange= 0, VrefLevel = 18
2818 14:44:21.952502 TX Bit0 (984~1006) 23 995, Bit8 (975~995) 21 985,
2819 14:44:21.955929 TX Bit1 (983~1005) 23 994, Bit9 (975~993) 19 984,
2820 14:44:21.962419 TX Bit2 (980~1002) 23 991, Bit10 (976~998) 23 987,
2821 14:44:21.965485 TX Bit3 (978~999) 22 988, Bit11 (978~998) 21 988,
2822 14:44:21.972111 TX Bit4 (982~1005) 24 993, Bit12 (977~998) 22 987,
2823 14:44:21.975397 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
2824 14:44:21.978717 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
2825 14:44:21.985527 TX Bit7 (983~1004) 22 993, Bit15 (972~991) 20 981,
2826 14:44:21.985910
2827 14:44:21.986209 Write Rank0 MR14 =0x14
2828 14:44:21.995951
2829 14:44:21.999410 CH=1, VrefRange= 0, VrefLevel = 20
2830 14:44:22.002449 TX Bit0 (984~1006) 23 995, Bit8 (975~996) 22 985,
2831 14:44:22.005688 TX Bit1 (982~1005) 24 993, Bit9 (975~993) 19 984,
2832 14:44:22.012308 TX Bit2 (980~1003) 24 991, Bit10 (976~998) 23 987,
2833 14:44:22.015698 TX Bit3 (977~1000) 24 988, Bit11 (978~999) 22 988,
2834 14:44:22.022225 TX Bit4 (982~1005) 24 993, Bit12 (977~999) 23 988,
2835 14:44:22.025367 TX Bit5 (984~1006) 23 995, Bit13 (978~999) 22 988,
2836 14:44:22.028710 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
2837 14:44:22.035422 TX Bit7 (983~1005) 23 994, Bit15 (971~991) 21 981,
2838 14:44:22.036006
2839 14:44:22.038385 Write Rank0 MR14 =0x16
2840 14:44:22.046357
2841 14:44:22.049148 CH=1, VrefRange= 0, VrefLevel = 22
2842 14:44:22.052657 TX Bit0 (984~1006) 23 995, Bit8 (975~997) 23 986,
2843 14:44:22.055795 TX Bit1 (982~1005) 24 993, Bit9 (974~993) 20 983,
2844 14:44:22.062725 TX Bit2 (979~1004) 26 991, Bit10 (976~999) 24 987,
2845 14:44:22.065864 TX Bit3 (977~1000) 24 988, Bit11 (978~999) 22 988,
2846 14:44:22.072415 TX Bit4 (981~1005) 25 993, Bit12 (977~999) 23 988,
2847 14:44:22.075402 TX Bit5 (984~1006) 23 995, Bit13 (977~999) 23 988,
2848 14:44:22.078807 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
2849 14:44:22.085319 TX Bit7 (982~1005) 24 993, Bit15 (971~991) 21 981,
2850 14:44:22.085796
2851 14:44:22.088546 Write Rank0 MR14 =0x18
2852 14:44:22.095831
2853 14:44:22.099330 CH=1, VrefRange= 0, VrefLevel = 24
2854 14:44:22.102706 TX Bit0 (983~1006) 24 994, Bit8 (974~998) 25 986,
2855 14:44:22.105904 TX Bit1 (982~1006) 25 994, Bit9 (974~994) 21 984,
2856 14:44:22.112465 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
2857 14:44:22.115703 TX Bit3 (977~1001) 25 989, Bit11 (977~999) 23 988,
2858 14:44:22.122148 TX Bit4 (981~1005) 25 993, Bit12 (977~999) 23 988,
2859 14:44:22.125531 TX Bit5 (984~1006) 23 995, Bit13 (977~999) 23 988,
2860 14:44:22.129047 TX Bit6 (982~1005) 24 993, Bit14 (976~999) 24 987,
2861 14:44:22.135490 TX Bit7 (982~1005) 24 993, Bit15 (971~992) 22 981,
2862 14:44:22.136033
2863 14:44:22.138542 Write Rank0 MR14 =0x1a
2864 14:44:22.146061
2865 14:44:22.149623 CH=1, VrefRange= 0, VrefLevel = 26
2866 14:44:22.152620 TX Bit0 (984~1006) 23 995, Bit8 (974~998) 25 986,
2867 14:44:22.156140 TX Bit1 (981~1006) 26 993, Bit9 (974~995) 22 984,
2868 14:44:22.162789 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
2869 14:44:22.165713 TX Bit3 (977~1001) 25 989, Bit11 (977~999) 23 988,
2870 14:44:22.172326 TX Bit4 (980~1005) 26 992, Bit12 (976~999) 24 987,
2871 14:44:22.175738 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
2872 14:44:22.178868 TX Bit6 (982~1005) 24 993, Bit14 (976~999) 24 987,
2873 14:44:22.185520 TX Bit7 (982~1005) 24 993, Bit15 (971~992) 22 981,
2874 14:44:22.185957
2875 14:44:22.188419 Write Rank0 MR14 =0x1c
2876 14:44:22.196371
2877 14:44:22.199738 CH=1, VrefRange= 0, VrefLevel = 28
2878 14:44:22.203357 TX Bit0 (983~1007) 25 995, Bit8 (973~997) 25 985,
2879 14:44:22.206264 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
2880 14:44:22.212863 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2881 14:44:22.216063 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
2882 14:44:22.222572 TX Bit4 (981~1006) 26 993, Bit12 (976~1000) 25 988,
2883 14:44:22.225974 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
2884 14:44:22.229399 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
2885 14:44:22.235859 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
2886 14:44:22.236398
2887 14:44:22.238987 Write Rank0 MR14 =0x1e
2888 14:44:22.247047
2889 14:44:22.250126 CH=1, VrefRange= 0, VrefLevel = 30
2890 14:44:22.253414 TX Bit0 (983~1007) 25 995, Bit8 (973~998) 26 985,
2891 14:44:22.256769 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
2892 14:44:22.263319 TX Bit2 (978~1005) 28 991, Bit10 (975~999) 25 987,
2893 14:44:22.266851 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
2894 14:44:22.273010 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
2895 14:44:22.276200 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
2896 14:44:22.282863 TX Bit6 (982~1006) 25 994, Bit14 (976~1000) 25 988,
2897 14:44:22.286381 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
2898 14:44:22.286872
2899 14:44:22.289133 Write Rank0 MR14 =0x20
2900 14:44:22.297219
2901 14:44:22.300709 CH=1, VrefRange= 0, VrefLevel = 32
2902 14:44:22.303815 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
2903 14:44:22.307524 TX Bit1 (981~1006) 26 993, Bit9 (972~996) 25 984,
2904 14:44:22.313741 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2905 14:44:22.316782 TX Bit3 (978~1001) 24 989, Bit11 (976~1000) 25 988,
2906 14:44:22.323733 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2907 14:44:22.326950 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
2908 14:44:22.330077 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
2909 14:44:22.336768 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
2910 14:44:22.337303
2911 14:44:22.339737 wait MRW command Rank0 MR14 =0x22 fired (1)
2912 14:44:22.342955 Write Rank0 MR14 =0x22
2913 14:44:22.351738
2914 14:44:22.354817 CH=1, VrefRange= 0, VrefLevel = 34
2915 14:44:22.358197 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
2916 14:44:22.361379 TX Bit1 (981~1006) 26 993, Bit9 (972~996) 25 984,
2917 14:44:22.368014 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2918 14:44:22.371311 TX Bit3 (978~1001) 24 989, Bit11 (976~1000) 25 988,
2919 14:44:22.377911 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2920 14:44:22.381176 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
2921 14:44:22.384444 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
2922 14:44:22.390934 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
2923 14:44:22.391355
2924 14:44:22.394268 Write Rank0 MR14 =0x24
2925 14:44:22.402306
2926 14:44:22.405290 CH=1, VrefRange= 0, VrefLevel = 36
2927 14:44:22.408683 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
2928 14:44:22.412652 TX Bit1 (981~1006) 26 993, Bit9 (972~996) 25 984,
2929 14:44:22.418524 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2930 14:44:22.421454 TX Bit3 (978~1001) 24 989, Bit11 (976~1000) 25 988,
2931 14:44:22.428001 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2932 14:44:22.431481 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
2933 14:44:22.434360 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
2934 14:44:22.441009 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
2935 14:44:22.441100
2936 14:44:22.444108 Write Rank0 MR14 =0x26
2937 14:44:22.451743
2938 14:44:22.455286 CH=1, VrefRange= 0, VrefLevel = 38
2939 14:44:22.458323 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
2940 14:44:22.461901 TX Bit1 (981~1006) 26 993, Bit9 (972~996) 25 984,
2941 14:44:22.468146 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2942 14:44:22.471489 TX Bit3 (978~1001) 24 989, Bit11 (976~1000) 25 988,
2943 14:44:22.478081 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2944 14:44:22.481442 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
2945 14:44:22.484658 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
2946 14:44:22.491030 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
2947 14:44:22.491121
2948 14:44:22.491192
2949 14:44:22.494726 TX Vref found, early break! 378< 380
2950 14:44:22.497748 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2951 14:44:22.501105 u1DelayCellOfst[0]=7 cells (6 PI)
2952 14:44:22.504144 u1DelayCellOfst[1]=5 cells (4 PI)
2953 14:44:22.507565 u1DelayCellOfst[2]=3 cells (3 PI)
2954 14:44:22.511101 u1DelayCellOfst[3]=0 cells (0 PI)
2955 14:44:22.514103 u1DelayCellOfst[4]=6 cells (5 PI)
2956 14:44:22.517392 u1DelayCellOfst[5]=6 cells (5 PI)
2957 14:44:22.520688 u1DelayCellOfst[6]=5 cells (4 PI)
2958 14:44:22.523960 u1DelayCellOfst[7]=5 cells (4 PI)
2959 14:44:22.527332 Byte0, DQ PI dly=989, DQM PI dly= 992
2960 14:44:22.530326 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2961 14:44:22.530417
2962 14:44:22.536978 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2963 14:44:22.537068
2964 14:44:22.540282 u1DelayCellOfst[8]=5 cells (4 PI)
2965 14:44:22.540373 u1DelayCellOfst[9]=3 cells (3 PI)
2966 14:44:22.543714 u1DelayCellOfst[10]=7 cells (6 PI)
2967 14:44:22.547009 u1DelayCellOfst[11]=9 cells (7 PI)
2968 14:44:22.550102 u1DelayCellOfst[12]=7 cells (6 PI)
2969 14:44:22.553385 u1DelayCellOfst[13]=9 cells (7 PI)
2970 14:44:22.556814 u1DelayCellOfst[14]=7 cells (6 PI)
2971 14:44:22.559978 u1DelayCellOfst[15]=0 cells (0 PI)
2972 14:44:22.563439 Byte1, DQ PI dly=981, DQM PI dly= 984
2973 14:44:22.566611 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2974 14:44:22.569576
2975 14:44:22.573177 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2976 14:44:22.573267
2977 14:44:22.576366 Write Rank0 MR14 =0x20
2978 14:44:22.576456
2979 14:44:22.576528 Final TX Range 0 Vref 32
2980 14:44:22.576596
2981 14:44:22.583052 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2982 14:44:22.583143
2983 14:44:22.589720 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2984 14:44:22.596167 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2985 14:44:22.605818 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2986 14:44:22.605909 Write Rank0 MR3 =0xb0
2987 14:44:22.608867 DramC Write-DBI on
2988 14:44:22.608956 ==
2989 14:44:22.612252 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2990 14:44:22.615588 fsp= 1, odt_onoff= 1, Byte mode= 0
2991 14:44:22.615679 ==
2992 14:44:22.622266 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2993 14:44:22.622357
2994 14:44:22.625663 Begin, DQ Scan Range 704~768
2995 14:44:22.625754
2996 14:44:22.625826
2997 14:44:22.625892 TX Vref Scan disable
2998 14:44:22.628489 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2999 14:44:22.631974 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3000 14:44:22.635288 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3001 14:44:22.638423 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3002 14:44:22.641794 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3003 14:44:22.648409 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3004 14:44:22.651755 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3005 14:44:22.654864 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3006 14:44:22.658123 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3007 14:44:22.661571 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3008 14:44:22.664726 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3009 14:44:22.667937 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3010 14:44:22.671394 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3011 14:44:22.674452 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3012 14:44:22.677927 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3013 14:44:22.681254 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3014 14:44:22.684347 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3015 14:44:22.687617 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3016 14:44:22.690877 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3017 14:44:22.697379 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3018 14:44:22.704003 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3019 14:44:22.707210 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3020 14:44:22.710716 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3021 14:44:22.713711 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3022 14:44:22.716830 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3023 14:44:22.720159 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3024 14:44:22.723633 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3025 14:44:22.726839 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3026 14:44:22.729962 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3027 14:44:22.733484 Byte0, DQ PI dly=737, DQM PI dly= 737
3028 14:44:22.739782 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3029 14:44:22.739901
3030 14:44:22.743155 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3031 14:44:22.743270
3032 14:44:22.746438 Byte1, DQ PI dly=729, DQM PI dly= 729
3033 14:44:22.749786 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3034 14:44:22.749901
3035 14:44:22.756270 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3036 14:44:22.756387
3037 14:44:22.762835 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3038 14:44:22.769413 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3039 14:44:22.775745 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3040 14:44:22.779355 Write Rank0 MR3 =0x30
3041 14:44:22.779442 DramC Write-DBI off
3042 14:44:22.779522
3043 14:44:22.779596 [DATLAT]
3044 14:44:22.782354 Freq=1600, CH1 RK0, use_rxtx_scan=0
3045 14:44:22.782471
3046 14:44:22.785697 DATLAT Default: 0xf
3047 14:44:22.789201 7, 0xFFFF, sum=0
3048 14:44:22.789316 8, 0xFFFF, sum=0
3049 14:44:22.789422 9, 0xFFFF, sum=0
3050 14:44:22.792302 10, 0xFFFF, sum=0
3051 14:44:22.792418 11, 0xFFFF, sum=0
3052 14:44:22.795368 12, 0xFFFF, sum=0
3053 14:44:22.795481 13, 0xFFFF, sum=0
3054 14:44:22.798880 14, 0x0, sum=1
3055 14:44:22.798992 15, 0x0, sum=2
3056 14:44:22.802125 16, 0x0, sum=3
3057 14:44:22.802240 17, 0x0, sum=4
3058 14:44:22.805602 pattern=2 first_step=14 total pass=5 best_step=16
3059 14:44:22.808452 ==
3060 14:44:22.811946 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3061 14:44:22.815087 fsp= 1, odt_onoff= 1, Byte mode= 0
3062 14:44:22.815199 ==
3063 14:44:22.818580 Start DQ dly to find pass range UseTestEngine =1
3064 14:44:22.825052 x-axis: bit #, y-axis: DQ dly (-127~63)
3065 14:44:22.825167 RX Vref Scan = 1
3066 14:44:22.932592
3067 14:44:22.932737 RX Vref found, early break!
3068 14:44:22.932846
3069 14:44:22.938955 Final RX Vref 11, apply to both rank0 and 1
3070 14:44:22.939074 ==
3071 14:44:22.942129 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3072 14:44:22.945515 fsp= 1, odt_onoff= 1, Byte mode= 0
3073 14:44:22.945605 ==
3074 14:44:22.948635 DQS Delay:
3075 14:44:22.948748 DQS0 = 0, DQS1 = 0
3076 14:44:22.948854 DQM Delay:
3077 14:44:22.952083 DQM0 = 19, DQM1 = 18
3078 14:44:22.952194 DQ Delay:
3079 14:44:22.955114 DQ0 =21, DQ1 =21, DQ2 =17, DQ3 =15
3080 14:44:22.958407 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3081 14:44:22.961594 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
3082 14:44:22.965015 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =13
3083 14:44:22.965106
3084 14:44:22.965177
3085 14:44:22.965244
3086 14:44:22.968381 [DramC_TX_OE_Calibration] TA2
3087 14:44:22.971703 Original DQ_B0 (3 6) =30, OEN = 27
3088 14:44:22.974753 Original DQ_B1 (3 6) =30, OEN = 27
3089 14:44:22.978133 23, 0x0, End_B0=23 End_B1=23
3090 14:44:22.981315 24, 0x0, End_B0=24 End_B1=24
3091 14:44:22.981443 25, 0x0, End_B0=25 End_B1=25
3092 14:44:22.984663 26, 0x0, End_B0=26 End_B1=26
3093 14:44:22.988001 27, 0x0, End_B0=27 End_B1=27
3094 14:44:22.991270 28, 0x0, End_B0=28 End_B1=28
3095 14:44:22.994524 29, 0x0, End_B0=29 End_B1=29
3096 14:44:22.994615 30, 0x0, End_B0=30 End_B1=30
3097 14:44:22.997826 31, 0xFFFF, End_B0=30 End_B1=30
3098 14:44:23.004266 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3099 14:44:23.010860 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3100 14:44:23.010961
3101 14:44:23.011056
3102 14:44:23.011126 Write Rank0 MR23 =0x3f
3103 14:44:23.014337 [DQSOSC]
3104 14:44:23.020588 [DQSOSCAuto] RK0, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3105 14:44:23.027089 CH1_RK0: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3106 14:44:23.030254 Write Rank0 MR23 =0x3f
3107 14:44:23.030345 [DQSOSC]
3108 14:44:23.036874 [DQSOSCAuto] RK0, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3109 14:44:23.040076 CH1 RK0: MR19=202, MR18=B4B4
3110 14:44:23.043521 [RankSwap] Rank num 2, (Multi 1), Rank 1
3111 14:44:23.046768 Write Rank0 MR2 =0xad
3112 14:44:23.046857 [Write Leveling]
3113 14:44:23.050087 delay byte0 byte1 byte2 byte3
3114 14:44:23.050177
3115 14:44:23.053341 10 0 0
3116 14:44:23.053441 11 0 0
3117 14:44:23.056505 12 0 0
3118 14:44:23.056597 13 0 0
3119 14:44:23.056670 14 0 0
3120 14:44:23.059973 15 0 0
3121 14:44:23.060071 16 0 0
3122 14:44:23.063138 17 0 0
3123 14:44:23.063228 18 0 0
3124 14:44:23.066360 19 0 0
3125 14:44:23.066451 20 0 0
3126 14:44:23.066524 21 0 0
3127 14:44:23.069613 22 0 0
3128 14:44:23.069704 23 0 0
3129 14:44:23.073110 24 0 0
3130 14:44:23.073202 25 0 0
3131 14:44:23.076172 26 0 0
3132 14:44:23.076263 27 0 ff
3133 14:44:23.076336 28 0 0
3134 14:44:23.079337 29 0 ff
3135 14:44:23.079429 30 0 ff
3136 14:44:23.082532 31 0 ff
3137 14:44:23.082623 32 0 ff
3138 14:44:23.086000 33 0 ff
3139 14:44:23.086092 34 0 ff
3140 14:44:23.089363 35 ff ff
3141 14:44:23.089463 36 ff ff
3142 14:44:23.089538 37 ff ff
3143 14:44:23.092423 38 ff ff
3144 14:44:23.092515 39 ff ff
3145 14:44:23.095960 40 ff ff
3146 14:44:23.096052 41 ff ff
3147 14:44:23.102228 pass bytecount = 0xff (0xff: all bytes pass)
3148 14:44:23.102319
3149 14:44:23.102391 DQS0 dly: 35
3150 14:44:23.102458 DQS1 dly: 29
3151 14:44:23.105754 Write Rank0 MR2 =0x2d
3152 14:44:23.108796 [RankSwap] Rank num 2, (Multi 1), Rank 0
3153 14:44:23.112070 Write Rank1 MR1 =0xd6
3154 14:44:23.112160 [Gating]
3155 14:44:23.112231 ==
3156 14:44:23.118919 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3157 14:44:23.122161 fsp= 1, odt_onoff= 1, Byte mode= 0
3158 14:44:23.122251 ==
3159 14:44:23.125364 3 1 0 |2c2b 3838 |(11 11)(0 0) |(1 1)(1 1)| 0
3160 14:44:23.128663 3 1 4 |2c2b 3636 |(11 11)(11 11) |(1 1)(0 0)| 0
3161 14:44:23.135100 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3162 14:44:23.138315 3 1 12 |2c2b 3636 |(11 11)(11 11) |(0 0)(0 0)| 0
3163 14:44:23.141647 3 1 16 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3164 14:44:23.145103 3 1 20 |2c2b 3636 |(11 11)(0 0) |(1 0)(1 0)| 0
3165 14:44:23.151693 3 1 24 |2c2b 3232 |(11 11)(11 11) |(1 0)(1 1)| 0
3166 14:44:23.154662 3 1 28 |2c2b d0c |(11 11)(11 11) |(1 0)(1 1)| 0
3167 14:44:23.158127 3 2 0 |2c2b 2f2f |(11 11)(11 11) |(1 0)(0 1)| 0
3168 14:44:23.164568 3 2 4 |2c2b 2a2a |(11 11)(11 11) |(1 0)(1 1)| 0
3169 14:44:23.167921 3 2 8 |2c2b 3333 |(11 11)(11 11) |(1 0)(1 0)| 0
3170 14:44:23.171276 3 2 12 |2c2b 3332 |(11 11)(11 11) |(1 0)(0 1)| 0
3171 14:44:23.177752 3 2 16 |2c2b 3333 |(11 11)(0 0) |(0 0)(0 1)| 0
3172 14:44:23.180946 3 2 20 |201 3434 |(11 1)(0 0) |(0 0)(0 1)| 0
3173 14:44:23.183983 3 2 24 |3534 1d1c |(11 11)(11 11) |(0 0)(1 1)| 0
3174 14:44:23.190751 3 2 28 |3534 706 |(11 11)(11 11) |(0 0)(1 1)| 0
3175 14:44:23.194029 3 3 0 |3534 3a3a |(11 11)(0 0) |(0 0)(1 1)| 0
3176 14:44:23.197569 3 3 4 |3534 2b2b |(11 11)(11 11) |(0 0)(1 1)| 0
3177 14:44:23.200426 [Byte 1] Lead/lag Transition tap number (1)
3178 14:44:23.207270 3 3 8 |3534 3b3b |(11 11)(10 10) |(0 0)(0 0)| 0
3179 14:44:23.210377 3 3 12 |3534 3c3b |(11 11)(11 11) |(0 0)(0 0)| 0
3180 14:44:23.213463 3 3 16 |3534 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
3181 14:44:23.220132 3 3 20 |3534 3b3b |(11 11)(0 0) |(1 1)(1 1)| 0
3182 14:44:23.223352 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3183 14:44:23.226924 3 3 24 |3534 3a39 |(11 11)(11 11) |(0 1)(1 1)| 0
3184 14:44:23.233240 3 3 28 |3534 100f |(11 11)(11 11) |(0 1)(1 1)| 0
3185 14:44:23.236459 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3186 14:44:23.239797 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3187 14:44:23.246340 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3188 14:44:23.249618 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3189 14:44:23.253086 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3190 14:44:23.259601 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3191 14:44:23.262973 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3192 14:44:23.266079 3 4 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3193 14:44:23.272605 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3194 14:44:23.275763 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3195 14:44:23.279393 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3196 14:44:23.285636 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3197 14:44:23.288933 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3198 14:44:23.292428 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3199 14:44:23.298805 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3200 14:44:23.301995 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3201 14:44:23.305158 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3202 14:44:23.311749 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3203 14:44:23.315170 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3204 14:44:23.318675 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3205 14:44:23.321648 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3206 14:44:23.328353 [Byte 0] Lead/lag Transition tap number (2)
3207 14:44:23.331680 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3208 14:44:23.334839 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3209 14:44:23.341390 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3210 14:44:23.344665 [Byte 1] Lead/lag Transition tap number (2)
3211 14:44:23.347942 3 6 24 |4646 3e3d |(10 10)(11 11) |(0 0)(0 0)| 0
3212 14:44:23.350982 3 6 28 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
3213 14:44:23.354297 [Byte 0]First pass (3, 6, 28)
3214 14:44:23.357907 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3215 14:44:23.360957 [Byte 1]First pass (3, 7, 0)
3216 14:44:23.364395 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3217 14:44:23.370778 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3218 14:44:23.373986 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3219 14:44:23.377164 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3220 14:44:23.380526 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3221 14:44:23.387178 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3222 14:44:23.390394 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3223 14:44:23.393714 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3224 14:44:23.396940 All bytes gating window > 1UI, Early break!
3225 14:44:23.397031
3226 14:44:23.400343 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3227 14:44:23.400464
3228 14:44:23.403577 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3229 14:44:23.406651
3230 14:44:23.406853
3231 14:44:23.406979
3232 14:44:23.410422 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3233 14:44:23.410542
3234 14:44:23.413344 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3235 14:44:23.413467
3236 14:44:23.413569
3237 14:44:23.416504 wait MRW command Rank1 MR1 =0x56 fired (1)
3238 14:44:23.419924 Write Rank1 MR1 =0x56
3239 14:44:23.420033
3240 14:44:23.423030 best RODT dly(2T, 0.5T) = (2, 3)
3241 14:44:23.423143
3242 14:44:23.426365 best RODT dly(2T, 0.5T) = (2, 3)
3243 14:44:23.426476 ==
3244 14:44:23.429997 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3245 14:44:23.433045 fsp= 1, odt_onoff= 1, Byte mode= 0
3246 14:44:23.433158 ==
3247 14:44:23.439620 Start DQ dly to find pass range UseTestEngine =0
3248 14:44:23.442893 x-axis: bit #, y-axis: DQ dly (-127~63)
3249 14:44:23.443007 RX Vref Scan = 0
3250 14:44:23.446181 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3251 14:44:23.449324 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3252 14:44:23.452818 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3253 14:44:23.455704 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3254 14:44:23.459290 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3255 14:44:23.462381 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3256 14:44:23.465776 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3257 14:44:23.469004 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3258 14:44:23.469096 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3259 14:44:23.472314 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3260 14:44:23.475461 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3261 14:44:23.478956 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3262 14:44:23.482123 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3263 14:44:23.485392 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3264 14:44:23.488633 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3265 14:44:23.492002 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3266 14:44:23.495069 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3267 14:44:23.495188 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3268 14:44:23.498402 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3269 14:44:23.501520 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3270 14:44:23.505163 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3271 14:44:23.508137 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3272 14:44:23.511553 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3273 14:44:23.515027 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3274 14:44:23.518075 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3275 14:44:23.518168 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3276 14:44:23.521692 0, [0] xxxoxxxx ooxxxxxo [MSB]
3277 14:44:23.524575 1, [0] xxxoxxxx ooxxxxxo [MSB]
3278 14:44:23.527924 2, [0] xxxoxxxx ooxxoxxo [MSB]
3279 14:44:23.531074 3, [0] xxooxxxo oooxoxxo [MSB]
3280 14:44:23.534398 4, [0] xxooxxxo oooxooxo [MSB]
3281 14:44:23.534490 5, [0] oooooxoo oooooooo [MSB]
3282 14:44:23.537789 32, [0] oooooooo ooooooox [MSB]
3283 14:44:23.541224 33, [0] oooooooo ooooooox [MSB]
3284 14:44:23.544311 34, [0] oooooooo oxooooox [MSB]
3285 14:44:23.547481 35, [0] ooxxoooo oxooooox [MSB]
3286 14:44:23.551113 36, [0] ooxxoooo xxooooox [MSB]
3287 14:44:23.554189 37, [0] ooxxoooo xxooooox [MSB]
3288 14:44:23.557450 38, [0] ooxxoooo xxooooox [MSB]
3289 14:44:23.557544 39, [0] oxxxooox xxooooox [MSB]
3290 14:44:23.560777 40, [0] oxxxooox xxxxooox [MSB]
3291 14:44:23.564017 41, [0] xxxxxoxx xxxxxoox [MSB]
3292 14:44:23.567119 42, [0] xxxxxoxx xxxxxoxx [MSB]
3293 14:44:23.570772 43, [0] xxxxxxxx xxxxxxxx [MSB]
3294 14:44:23.573799 iDelay=43, Bit 0, Center 22 (5 ~ 40) 36
3295 14:44:23.577053 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
3296 14:44:23.580337 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3297 14:44:23.583505 iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36
3298 14:44:23.587113 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
3299 14:44:23.590151 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
3300 14:44:23.593217 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3301 14:44:23.599896 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3302 14:44:23.603398 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
3303 14:44:23.606485 iDelay=43, Bit 9, Center 16 (-1 ~ 33) 35
3304 14:44:23.609887 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3305 14:44:23.613072 iDelay=43, Bit 11, Center 22 (5 ~ 39) 35
3306 14:44:23.616567 iDelay=43, Bit 12, Center 21 (2 ~ 40) 39
3307 14:44:23.619455 iDelay=43, Bit 13, Center 23 (4 ~ 42) 39
3308 14:44:23.622861 iDelay=43, Bit 14, Center 23 (5 ~ 41) 37
3309 14:44:23.626061 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3310 14:44:23.629568 ==
3311 14:44:23.632655 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3312 14:44:23.636178 fsp= 1, odt_onoff= 1, Byte mode= 0
3313 14:44:23.636270 ==
3314 14:44:23.636343 DQS Delay:
3315 14:44:23.639207 DQS0 = 0, DQS1 = 0
3316 14:44:23.639315 DQM Delay:
3317 14:44:23.642625 DQM0 = 20, DQM1 = 19
3318 14:44:23.642716 DQ Delay:
3319 14:44:23.646041 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3320 14:44:23.649117 DQ4 =22, DQ5 =24, DQ6 =22, DQ7 =20
3321 14:44:23.652205 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3322 14:44:23.655426 DQ12 =21, DQ13 =23, DQ14 =23, DQ15 =13
3323 14:44:23.655548
3324 14:44:23.655653
3325 14:44:23.659042 DramC Write-DBI off
3326 14:44:23.659153 ==
3327 14:44:23.662289 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3328 14:44:23.665591 fsp= 1, odt_onoff= 1, Byte mode= 0
3329 14:44:23.665672 ==
3330 14:44:23.671948 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3331 14:44:23.672058
3332 14:44:23.675454 Begin, DQ Scan Range 925~1181
3333 14:44:23.675565
3334 14:44:23.675668
3335 14:44:23.675766 TX Vref Scan disable
3336 14:44:23.678479 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3337 14:44:23.681984 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3338 14:44:23.684983 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3339 14:44:23.691669 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3340 14:44:23.695032 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3341 14:44:23.698198 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3342 14:44:23.701567 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3343 14:44:23.704513 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3344 14:44:23.707972 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3345 14:44:23.711511 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3346 14:44:23.714363 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3347 14:44:23.717987 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3348 14:44:23.721171 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3349 14:44:23.724434 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3350 14:44:23.727492 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3351 14:44:23.730958 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3352 14:44:23.737512 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3353 14:44:23.740696 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3354 14:44:23.743998 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3355 14:44:23.747215 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3356 14:44:23.750629 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3357 14:44:23.753614 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3358 14:44:23.757202 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3359 14:44:23.760168 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3360 14:44:23.763760 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3361 14:44:23.766712 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3362 14:44:23.770191 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3363 14:44:23.773393 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3364 14:44:23.780250 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3365 14:44:23.783183 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3366 14:44:23.786757 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3367 14:44:23.789728 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3368 14:44:23.793118 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3369 14:44:23.796547 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3370 14:44:23.799944 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3371 14:44:23.802820 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3372 14:44:23.806212 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3373 14:44:23.809320 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3374 14:44:23.812740 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3375 14:44:23.815792 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3376 14:44:23.819161 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3377 14:44:23.822556 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3378 14:44:23.825857 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3379 14:44:23.828956 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3380 14:44:23.835447 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3381 14:44:23.838979 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3382 14:44:23.842088 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3383 14:44:23.845665 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3384 14:44:23.848896 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3385 14:44:23.852270 974 |3 6 14|[0] xxxxxxxx xxxxxxxo [MSB]
3386 14:44:23.855322 975 |3 6 15|[0] xxxxxxxx xoxxxxxo [MSB]
3387 14:44:23.858352 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
3388 14:44:23.861763 977 |3 6 17|[0] xxxxxxxx oooooxoo [MSB]
3389 14:44:23.865072 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3390 14:44:23.868506 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3391 14:44:23.871680 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3392 14:44:23.874964 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3393 14:44:23.881425 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3394 14:44:23.884817 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
3395 14:44:23.888228 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3396 14:44:23.891314 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3397 14:44:23.894592 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3398 14:44:23.897969 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3399 14:44:23.900958 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3400 14:44:23.904478 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3401 14:44:23.910881 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3402 14:44:23.914225 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3403 14:44:23.917758 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3404 14:44:23.920957 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3405 14:44:23.924139 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3406 14:44:23.927324 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3407 14:44:23.930926 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3408 14:44:23.933943 1005 |3 6 45|[0] ooxxooox xxxxxxxx [MSB]
3409 14:44:23.937092 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3410 14:44:23.940670 Byte0, DQ PI dly=992, DQM PI dly= 992
3411 14:44:23.947100 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3412 14:44:23.947215
3413 14:44:23.950393 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3414 14:44:23.950503
3415 14:44:23.953633 Byte1, DQ PI dly=984, DQM PI dly= 984
3416 14:44:23.960379 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3417 14:44:23.960493
3418 14:44:23.963412 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3419 14:44:23.963525
3420 14:44:23.963628 ==
3421 14:44:23.969849 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3422 14:44:23.969939 fsp= 1, odt_onoff= 1, Byte mode= 0
3423 14:44:23.973159 ==
3424 14:44:23.976283 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3425 14:44:23.976395
3426 14:44:23.979494 Begin, DQ Scan Range 960~1024
3427 14:44:23.979606 Write Rank1 MR14 =0x0
3428 14:44:23.989384
3429 14:44:23.992379 CH=1, VrefRange= 0, VrefLevel = 0
3430 14:44:23.995863 TX Bit0 (985~1002) 18 993, Bit8 (978~990) 13 984,
3431 14:44:23.998879 TX Bit1 (984~999) 16 991, Bit9 (977~988) 12 982,
3432 14:44:24.005810 TX Bit2 (983~998) 16 990, Bit10 (978~992) 15 985,
3433 14:44:24.008830 TX Bit3 (981~993) 13 987, Bit11 (980~992) 13 986,
3434 14:44:24.012259 TX Bit4 (984~999) 16 991, Bit12 (980~991) 12 985,
3435 14:44:24.018819 TX Bit5 (985~1001) 17 993, Bit13 (980~993) 14 986,
3436 14:44:24.022138 TX Bit6 (985~999) 15 992, Bit14 (979~991) 13 985,
3437 14:44:24.028695 TX Bit7 (986~998) 13 992, Bit15 (975~984) 10 979,
3438 14:44:24.028815
3439 14:44:24.028919 Write Rank1 MR14 =0x2
3440 14:44:24.038062
3441 14:44:24.038173 CH=1, VrefRange= 0, VrefLevel = 2
3442 14:44:24.044713 TX Bit0 (985~1002) 18 993, Bit8 (978~990) 13 984,
3443 14:44:24.047946 TX Bit1 (985~1000) 16 992, Bit9 (977~989) 13 983,
3444 14:44:24.054322 TX Bit2 (983~998) 16 990, Bit10 (978~993) 16 985,
3445 14:44:24.057950 TX Bit3 (980~994) 15 987, Bit11 (979~993) 15 986,
3446 14:44:24.061105 TX Bit4 (984~1000) 17 992, Bit12 (980~992) 13 986,
3447 14:44:24.067617 TX Bit5 (985~1002) 18 993, Bit13 (980~994) 15 987,
3448 14:44:24.070974 TX Bit6 (985~1000) 16 992, Bit14 (979~992) 14 985,
3449 14:44:24.077345 TX Bit7 (985~998) 14 991, Bit15 (975~985) 11 980,
3450 14:44:24.077485
3451 14:44:24.077589 Write Rank1 MR14 =0x4
3452 14:44:24.087696
3453 14:44:24.087814 CH=1, VrefRange= 0, VrefLevel = 4
3454 14:44:24.094092 TX Bit0 (985~1004) 20 994, Bit8 (978~990) 13 984,
3455 14:44:24.097400 TX Bit1 (984~1000) 17 992, Bit9 (976~990) 15 983,
3456 14:44:24.103739 TX Bit2 (982~998) 17 990, Bit10 (977~994) 18 985,
3457 14:44:24.107122 TX Bit3 (980~995) 16 987, Bit11 (979~994) 16 986,
3458 14:44:24.110507 TX Bit4 (984~1001) 18 992, Bit12 (980~992) 13 986,
3459 14:44:24.116783 TX Bit5 (985~1002) 18 993, Bit13 (979~996) 18 987,
3460 14:44:24.120276 TX Bit6 (985~1001) 17 993, Bit14 (978~992) 15 985,
3461 14:44:24.126736 TX Bit7 (985~999) 15 992, Bit15 (974~986) 13 980,
3462 14:44:24.126855
3463 14:44:24.126961 Write Rank1 MR14 =0x6
3464 14:44:24.136904
3465 14:44:24.137018 CH=1, VrefRange= 0, VrefLevel = 6
3466 14:44:24.143484 TX Bit0 (985~1004) 20 994, Bit8 (977~991) 15 984,
3467 14:44:24.146919 TX Bit1 (984~1001) 18 992, Bit9 (976~990) 15 983,
3468 14:44:24.153192 TX Bit2 (982~999) 18 990, Bit10 (977~994) 18 985,
3469 14:44:24.156526 TX Bit3 (979~996) 18 987, Bit11 (978~994) 17 986,
3470 14:44:24.159801 TX Bit4 (983~1002) 20 992, Bit12 (979~992) 14 985,
3471 14:44:24.166169 TX Bit5 (985~1003) 19 994, Bit13 (979~996) 18 987,
3472 14:44:24.169740 TX Bit6 (984~1001) 18 992, Bit14 (978~993) 16 985,
3473 14:44:24.175950 TX Bit7 (984~1000) 17 992, Bit15 (974~988) 15 981,
3474 14:44:24.176043
3475 14:44:24.176146 Write Rank1 MR14 =0x8
3476 14:44:24.186351
3477 14:44:24.186436 CH=1, VrefRange= 0, VrefLevel = 8
3478 14:44:24.193019 TX Bit0 (985~1004) 20 994, Bit8 (977~991) 15 984,
3479 14:44:24.196037 TX Bit1 (984~1002) 19 993, Bit9 (976~990) 15 983,
3480 14:44:24.202681 TX Bit2 (982~1000) 19 991, Bit10 (977~995) 19 986,
3481 14:44:24.206171 TX Bit3 (979~997) 19 988, Bit11 (978~996) 19 987,
3482 14:44:24.212506 TX Bit4 (983~1002) 20 992, Bit12 (979~994) 16 986,
3483 14:44:24.215991 TX Bit5 (985~1004) 20 994, Bit13 (979~997) 19 988,
3484 14:44:24.218975 TX Bit6 (984~1002) 19 993, Bit14 (977~994) 18 985,
3485 14:44:24.225395 TX Bit7 (984~1000) 17 992, Bit15 (973~989) 17 981,
3486 14:44:24.225521
3487 14:44:24.225629 Write Rank1 MR14 =0xa
3488 14:44:24.236085
3489 14:44:24.239372 CH=1, VrefRange= 0, VrefLevel = 10
3490 14:44:24.242733 TX Bit0 (984~1005) 22 994, Bit8 (977~991) 15 984,
3491 14:44:24.246112 TX Bit1 (984~1002) 19 993, Bit9 (976~991) 16 983,
3492 14:44:24.252583 TX Bit2 (982~1000) 19 991, Bit10 (977~996) 20 986,
3493 14:44:24.255716 TX Bit3 (979~998) 20 988, Bit11 (978~997) 20 987,
3494 14:44:24.262283 TX Bit4 (983~1003) 21 993, Bit12 (978~994) 17 986,
3495 14:44:24.265598 TX Bit5 (984~1004) 21 994, Bit13 (978~998) 21 988,
3496 14:44:24.268814 TX Bit6 (984~1002) 19 993, Bit14 (977~995) 19 986,
3497 14:44:24.275253 TX Bit7 (984~1001) 18 992, Bit15 (973~990) 18 981,
3498 14:44:24.275369
3499 14:44:24.275471 Write Rank1 MR14 =0xc
3500 14:44:24.285788
3501 14:44:24.289269 CH=1, VrefRange= 0, VrefLevel = 12
3502 14:44:24.292360 TX Bit0 (984~1005) 22 994, Bit8 (976~992) 17 984,
3503 14:44:24.295610 TX Bit1 (983~1004) 22 993, Bit9 (976~991) 16 983,
3504 14:44:24.302365 TX Bit2 (982~1001) 20 991, Bit10 (977~997) 21 987,
3505 14:44:24.305684 TX Bit3 (978~998) 21 988, Bit11 (978~997) 20 987,
3506 14:44:24.312248 TX Bit4 (983~1004) 22 993, Bit12 (979~995) 17 987,
3507 14:44:24.315366 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
3508 14:44:24.318818 TX Bit6 (984~1004) 21 994, Bit14 (977~995) 19 986,
3509 14:44:24.325318 TX Bit7 (984~1002) 19 993, Bit15 (972~990) 19 981,
3510 14:44:24.325408
3511 14:44:24.325493 Write Rank1 MR14 =0xe
3512 14:44:24.335741
3513 14:44:24.339120 CH=1, VrefRange= 0, VrefLevel = 14
3514 14:44:24.342457 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3515 14:44:24.345476 TX Bit1 (983~1004) 22 993, Bit9 (975~991) 17 983,
3516 14:44:24.351970 TX Bit2 (981~1001) 21 991, Bit10 (976~998) 23 987,
3517 14:44:24.355672 TX Bit3 (978~998) 21 988, Bit11 (977~998) 22 987,
3518 14:44:24.362387 TX Bit4 (983~1004) 22 993, Bit12 (978~996) 19 987,
3519 14:44:24.365346 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
3520 14:44:24.368533 TX Bit6 (983~1004) 22 993, Bit14 (977~996) 20 986,
3521 14:44:24.375111 TX Bit7 (984~1003) 20 993, Bit15 (972~990) 19 981,
3522 14:44:24.375203
3523 14:44:24.375275 Write Rank1 MR14 =0x10
3524 14:44:24.385843
3525 14:44:24.389219 CH=1, VrefRange= 0, VrefLevel = 16
3526 14:44:24.392284 TX Bit0 (984~1006) 23 995, Bit8 (976~993) 18 984,
3527 14:44:24.395595 TX Bit1 (983~1005) 23 994, Bit9 (975~992) 18 983,
3528 14:44:24.402036 TX Bit2 (981~1002) 22 991, Bit10 (976~998) 23 987,
3529 14:44:24.405449 TX Bit3 (978~999) 22 988, Bit11 (977~998) 22 987,
3530 14:44:24.411946 TX Bit4 (982~1005) 24 993, Bit12 (977~997) 21 987,
3531 14:44:24.415306 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
3532 14:44:24.418441 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
3533 14:44:24.424990 TX Bit7 (983~1004) 22 993, Bit15 (971~991) 21 981,
3534 14:44:24.425083
3535 14:44:24.428143 Write Rank1 MR14 =0x12
3536 14:44:24.436003
3537 14:44:24.439016 CH=1, VrefRange= 0, VrefLevel = 18
3538 14:44:24.442485 TX Bit0 (984~1006) 23 995, Bit8 (976~993) 18 984,
3539 14:44:24.445626 TX Bit1 (983~1005) 23 994, Bit9 (975~992) 18 983,
3540 14:44:24.452310 TX Bit2 (980~1003) 24 991, Bit10 (976~998) 23 987,
3541 14:44:24.455550 TX Bit3 (978~999) 22 988, Bit11 (977~998) 22 987,
3542 14:44:24.462225 TX Bit4 (982~1005) 24 993, Bit12 (977~997) 21 987,
3543 14:44:24.465302 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3544 14:44:24.468594 TX Bit6 (983~1005) 23 994, Bit14 (976~998) 23 987,
3545 14:44:24.475140 TX Bit7 (983~1004) 22 993, Bit15 (970~991) 22 980,
3546 14:44:24.475232
3547 14:44:24.475304 Write Rank1 MR14 =0x14
3548 14:44:24.485788
3549 14:44:24.489057 CH=1, VrefRange= 0, VrefLevel = 20
3550 14:44:24.492270 TX Bit0 (984~1006) 23 995, Bit8 (975~994) 20 984,
3551 14:44:24.495864 TX Bit1 (982~1005) 24 993, Bit9 (974~993) 20 983,
3552 14:44:24.502209 TX Bit2 (981~1004) 24 992, Bit10 (976~998) 23 987,
3553 14:44:24.505473 TX Bit3 (978~999) 22 988, Bit11 (977~999) 23 988,
3554 14:44:24.511965 TX Bit4 (982~1005) 24 993, Bit12 (977~998) 22 987,
3555 14:44:24.515372 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3556 14:44:24.518872 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
3557 14:44:24.525294 TX Bit7 (983~1005) 23 994, Bit15 (971~992) 22 981,
3558 14:44:24.525414
3559 14:44:24.525502 Write Rank1 MR14 =0x16
3560 14:44:24.536035
3561 14:44:24.539299 CH=1, VrefRange= 0, VrefLevel = 22
3562 14:44:24.542560 TX Bit0 (984~1006) 23 995, Bit8 (975~994) 20 984,
3563 14:44:24.545882 TX Bit1 (982~1005) 24 993, Bit9 (974~993) 20 983,
3564 14:44:24.552398 TX Bit2 (981~1004) 24 992, Bit10 (976~998) 23 987,
3565 14:44:24.555517 TX Bit3 (978~999) 22 988, Bit11 (977~999) 23 988,
3566 14:44:24.562174 TX Bit4 (982~1005) 24 993, Bit12 (977~998) 22 987,
3567 14:44:24.565356 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3568 14:44:24.568900 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
3569 14:44:24.575150 TX Bit7 (983~1005) 23 994, Bit15 (971~992) 22 981,
3570 14:44:24.575242
3571 14:44:24.575313 Write Rank1 MR14 =0x18
3572 14:44:24.586133
3573 14:44:24.589233 CH=1, VrefRange= 0, VrefLevel = 24
3574 14:44:24.592568 TX Bit0 (983~1006) 24 994, Bit8 (975~996) 22 985,
3575 14:44:24.595861 TX Bit1 (982~1006) 25 994, Bit9 (973~994) 22 983,
3576 14:44:24.602284 TX Bit2 (980~1005) 26 992, Bit10 (976~999) 24 987,
3577 14:44:24.605610 TX Bit3 (977~1000) 24 988, Bit11 (976~999) 24 987,
3578 14:44:24.612269 TX Bit4 (981~1006) 26 993, Bit12 (977~999) 23 988,
3579 14:44:24.615365 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3580 14:44:24.618521 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
3581 14:44:24.625312 TX Bit7 (982~1005) 24 993, Bit15 (970~992) 23 981,
3582 14:44:24.625404
3583 14:44:24.628418 Write Rank1 MR14 =0x1a
3584 14:44:24.636308
3585 14:44:24.639448 CH=1, VrefRange= 0, VrefLevel = 26
3586 14:44:24.642822 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
3587 14:44:24.646117 TX Bit1 (982~1006) 25 994, Bit9 (973~995) 23 984,
3588 14:44:24.652610 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3589 14:44:24.655874 TX Bit3 (977~1001) 25 989, Bit11 (976~999) 24 987,
3590 14:44:24.662329 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3591 14:44:24.665681 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3592 14:44:24.669126 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3593 14:44:24.675675 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3594 14:44:24.675767
3595 14:44:24.678579 Write Rank1 MR14 =0x1c
3596 14:44:24.686742
3597 14:44:24.689999 CH=1, VrefRange= 0, VrefLevel = 28
3598 14:44:24.693340 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
3599 14:44:24.696555 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
3600 14:44:24.703439 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
3601 14:44:24.706392 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3602 14:44:24.713174 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3603 14:44:24.716193 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3604 14:44:24.719471 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3605 14:44:24.726290 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3606 14:44:24.726381
3607 14:44:24.729306 wait MRW command Rank1 MR14 =0x1e fired (1)
3608 14:44:24.732420 Write Rank1 MR14 =0x1e
3609 14:44:24.741155
3610 14:44:24.744328 CH=1, VrefRange= 0, VrefLevel = 30
3611 14:44:24.747533 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
3612 14:44:24.750930 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
3613 14:44:24.757354 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3614 14:44:24.760589 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3615 14:44:24.767461 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3616 14:44:24.770402 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3617 14:44:24.773941 TX Bit6 (980~1006) 27 993, Bit14 (976~999) 24 987,
3618 14:44:24.780581 TX Bit7 (980~1006) 27 993, Bit15 (969~993) 25 981,
3619 14:44:24.780672
3620 14:44:24.783533 Write Rank1 MR14 =0x20
3621 14:44:24.791474
3622 14:44:24.794533 CH=1, VrefRange= 0, VrefLevel = 32
3623 14:44:24.797938 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
3624 14:44:24.800998 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
3625 14:44:24.807537 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3626 14:44:24.810865 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3627 14:44:24.817415 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3628 14:44:24.820712 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3629 14:44:24.824032 TX Bit6 (980~1006) 27 993, Bit14 (976~999) 24 987,
3630 14:44:24.830866 TX Bit7 (980~1006) 27 993, Bit15 (969~993) 25 981,
3631 14:44:24.830957
3632 14:44:24.833539 Write Rank1 MR14 =0x22
3633 14:44:24.841678
3634 14:44:24.845173 CH=1, VrefRange= 0, VrefLevel = 34
3635 14:44:24.848391 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
3636 14:44:24.851782 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
3637 14:44:24.858018 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3638 14:44:24.861536 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3639 14:44:24.868028 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3640 14:44:24.871204 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3641 14:44:24.874642 TX Bit6 (980~1006) 27 993, Bit14 (976~999) 24 987,
3642 14:44:24.881162 TX Bit7 (980~1006) 27 993, Bit15 (969~993) 25 981,
3643 14:44:24.881253
3644 14:44:24.884180 Write Rank1 MR14 =0x24
3645 14:44:24.892270
3646 14:44:24.895525 CH=1, VrefRange= 0, VrefLevel = 36
3647 14:44:24.898780 TX Bit0 (983~1007) 25 995, Bit8 (974~997) 24 985,
3648 14:44:24.901988 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
3649 14:44:24.908416 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3650 14:44:24.911790 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3651 14:44:24.918621 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3652 14:44:24.921659 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3653 14:44:24.924978 TX Bit6 (980~1006) 27 993, Bit14 (976~999) 24 987,
3654 14:44:24.931355 TX Bit7 (980~1006) 27 993, Bit15 (969~993) 25 981,
3655 14:44:24.931446
3656 14:44:24.931516
3657 14:44:24.934824 TX Vref found, early break! 377< 382
3658 14:44:24.938184 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3659 14:44:24.941184 u1DelayCellOfst[0]=7 cells (6 PI)
3660 14:44:24.944637 u1DelayCellOfst[1]=5 cells (4 PI)
3661 14:44:24.947811 u1DelayCellOfst[2]=2 cells (2 PI)
3662 14:44:24.951151 u1DelayCellOfst[3]=0 cells (0 PI)
3663 14:44:24.954336 u1DelayCellOfst[4]=5 cells (4 PI)
3664 14:44:24.957728 u1DelayCellOfst[5]=6 cells (5 PI)
3665 14:44:24.960913 u1DelayCellOfst[6]=5 cells (4 PI)
3666 14:44:24.964283 u1DelayCellOfst[7]=5 cells (4 PI)
3667 14:44:24.967444 Byte0, DQ PI dly=989, DQM PI dly= 992
3668 14:44:24.970556 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3669 14:44:24.970647
3670 14:44:24.974157 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3671 14:44:24.977231
3672 14:44:24.977321 u1DelayCellOfst[8]=5 cells (4 PI)
3673 14:44:24.980712 u1DelayCellOfst[9]=2 cells (2 PI)
3674 14:44:24.984088 u1DelayCellOfst[10]=7 cells (6 PI)
3675 14:44:24.986993 u1DelayCellOfst[11]=7 cells (6 PI)
3676 14:44:24.990518 u1DelayCellOfst[12]=7 cells (6 PI)
3677 14:44:24.993567 u1DelayCellOfst[13]=9 cells (7 PI)
3678 14:44:24.997167 u1DelayCellOfst[14]=7 cells (6 PI)
3679 14:44:24.999997 u1DelayCellOfst[15]=0 cells (0 PI)
3680 14:44:25.003557 Byte1, DQ PI dly=981, DQM PI dly= 984
3681 14:44:25.006845 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3682 14:44:25.006936
3683 14:44:25.013098 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3684 14:44:25.013190
3685 14:44:25.013260 Write Rank1 MR14 =0x1e
3686 14:44:25.016551
3687 14:44:25.016640 Final TX Range 0 Vref 30
3688 14:44:25.016712
3689 14:44:25.023176 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3690 14:44:25.023267
3691 14:44:25.029630 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3692 14:44:25.036278 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3693 14:44:25.046085 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3694 14:44:25.046178 Write Rank1 MR3 =0xb0
3695 14:44:25.049348 DramC Write-DBI on
3696 14:44:25.049444 ==
3697 14:44:25.052683 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3698 14:44:25.056076 fsp= 1, odt_onoff= 1, Byte mode= 0
3699 14:44:25.056167 ==
3700 14:44:25.062662 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3701 14:44:25.062753
3702 14:44:25.062824 Begin, DQ Scan Range 704~768
3703 14:44:25.065619
3704 14:44:25.065707
3705 14:44:25.065778 TX Vref Scan disable
3706 14:44:25.069142 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3707 14:44:25.072239 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3708 14:44:25.075577 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3709 14:44:25.078842 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3710 14:44:25.082142 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3711 14:44:25.085220 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3712 14:44:25.091933 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3713 14:44:25.095095 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3714 14:44:25.098553 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3715 14:44:25.101591 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3716 14:44:25.105204 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3717 14:44:25.108396 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3718 14:44:25.111560 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3719 14:44:25.114759 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3720 14:44:25.118155 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3721 14:44:25.121112 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3722 14:44:25.124857 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3723 14:44:25.127985 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3724 14:44:25.130981 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3725 14:44:25.134318 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3726 14:44:25.140837 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3727 14:44:25.147382 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3728 14:44:25.150748 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3729 14:44:25.154071 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3730 14:44:25.157327 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3731 14:44:25.160552 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3732 14:44:25.163713 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3733 14:44:25.167267 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3734 14:44:25.170280 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3735 14:44:25.173750 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3736 14:44:25.176766 Byte0, DQ PI dly=737, DQM PI dly= 737
3737 14:44:25.183422 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3738 14:44:25.183514
3739 14:44:25.186824 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3740 14:44:25.186915
3741 14:44:25.189897 Byte1, DQ PI dly=728, DQM PI dly= 728
3742 14:44:25.193426 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3743 14:44:25.193526
3744 14:44:25.199755 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3745 14:44:25.199846
3746 14:44:25.206503 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3747 14:44:25.212834 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3748 14:44:25.219548 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3749 14:44:25.222659 Write Rank1 MR3 =0x30
3750 14:44:25.222749 DramC Write-DBI off
3751 14:44:25.222820
3752 14:44:25.222886 [DATLAT]
3753 14:44:25.225907 Freq=1600, CH1 RK1, use_rxtx_scan=0
3754 14:44:25.225997
3755 14:44:25.229405 DATLAT Default: 0x10
3756 14:44:25.232489 7, 0xFFFF, sum=0
3757 14:44:25.232581 8, 0xFFFF, sum=0
3758 14:44:25.232655 9, 0xFFFF, sum=0
3759 14:44:25.235996 10, 0xFFFF, sum=0
3760 14:44:25.236114 11, 0xFFFF, sum=0
3761 14:44:25.239304 12, 0xFFFF, sum=0
3762 14:44:25.239397 13, 0xFFFF, sum=0
3763 14:44:25.242457 14, 0x0, sum=1
3764 14:44:25.242550 15, 0x0, sum=2
3765 14:44:25.245823 16, 0x0, sum=3
3766 14:44:25.245915 17, 0x0, sum=4
3767 14:44:25.248749 pattern=2 first_step=14 total pass=5 best_step=16
3768 14:44:25.252109 ==
3769 14:44:25.255469 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3770 14:44:25.258568 fsp= 1, odt_onoff= 1, Byte mode= 0
3771 14:44:25.258654 ==
3772 14:44:25.262116 Start DQ dly to find pass range UseTestEngine =1
3773 14:44:25.268567 x-axis: bit #, y-axis: DQ dly (-127~63)
3774 14:44:25.268665 RX Vref Scan = 0
3775 14:44:25.271904 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3776 14:44:25.275292 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3777 14:44:25.278429 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3778 14:44:25.281801 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3779 14:44:25.281894 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3780 14:44:25.285195 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3781 14:44:25.288206 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3782 14:44:25.291598 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3783 14:44:25.294693 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3784 14:44:25.298151 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3785 14:44:25.301362 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3786 14:44:25.304659 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3787 14:44:25.308050 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3788 14:44:25.311127 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3789 14:44:25.311220 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3790 14:44:25.314695 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3791 14:44:25.317960 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3792 14:44:25.320911 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3793 14:44:25.324320 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3794 14:44:25.327758 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3795 14:44:25.330706 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3796 14:44:25.334011 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3797 14:44:25.334104 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3798 14:44:25.337383 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3799 14:44:25.340455 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3800 14:44:25.343803 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3801 14:44:25.347230 0, [0] xxxoxxxx ooxxxxxo [MSB]
3802 14:44:25.350320 1, [0] xxxoxxxx ooxxxxxo [MSB]
3803 14:44:25.353686 2, [0] xxxoxxxx ooxxxxxo [MSB]
3804 14:44:25.353780 3, [0] xxooxxxo ooooxxxo [MSB]
3805 14:44:25.356857 4, [0] ooooxxxo oooooooo [MSB]
3806 14:44:25.360226 5, [0] oooooxxo oooooooo [MSB]
3807 14:44:25.364433 32, [0] oooooooo ooooooox [MSB]
3808 14:44:25.367498 33, [0] oooooooo ooooooox [MSB]
3809 14:44:25.370867 34, [0] oooxoooo oxooooox [MSB]
3810 14:44:25.374181 35, [0] ooxxoooo oxooooox [MSB]
3811 14:44:25.377331 36, [0] ooxxoooo xxooooox [MSB]
3812 14:44:25.380773 37, [0] ooxxoooo xxooooox [MSB]
3813 14:44:25.384187 38, [0] ooxxoooo xxooxoox [MSB]
3814 14:44:25.384280 39, [0] oxxxooox xxxxxoox [MSB]
3815 14:44:25.387555 40, [0] oxxxxoox xxxxxxox [MSB]
3816 14:44:25.390551 41, [0] xxxxxxxx xxxxxxxx [MSB]
3817 14:44:25.393884 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3818 14:44:25.397086 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3819 14:44:25.400680 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3820 14:44:25.407074 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3821 14:44:25.411529 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
3822 14:44:25.413568 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3823 14:44:25.416603 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3824 14:44:25.420031 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3825 14:44:25.423161 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3826 14:44:25.426636 iDelay=41, Bit 9, Center 15 (-2 ~ 33) 36
3827 14:44:25.429861 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3828 14:44:25.433005 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3829 14:44:25.436313 iDelay=41, Bit 12, Center 20 (4 ~ 37) 34
3830 14:44:25.442932 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3831 14:44:25.446181 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3832 14:44:25.449188 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3833 14:44:25.449279 ==
3834 14:44:25.452621 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3835 14:44:25.455776 fsp= 1, odt_onoff= 1, Byte mode= 0
3836 14:44:25.455868 ==
3837 14:44:25.459130 DQS Delay:
3838 14:44:25.459221 DQS0 = 0, DQS1 = 0
3839 14:44:25.462669 DQM Delay:
3840 14:44:25.462759 DQM0 = 20, DQM1 = 18
3841 14:44:25.462831 DQ Delay:
3842 14:44:25.465706 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3843 14:44:25.469265 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3844 14:44:25.472283 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3845 14:44:25.475673 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3846 14:44:25.475763
3847 14:44:25.475835
3848 14:44:25.478997
3849 14:44:25.479088 [DramC_TX_OE_Calibration] TA2
3850 14:44:25.482248 Original DQ_B0 (3 6) =30, OEN = 27
3851 14:44:25.485334 Original DQ_B1 (3 6) =30, OEN = 27
3852 14:44:25.488571 23, 0x0, End_B0=23 End_B1=23
3853 14:44:25.491875 24, 0x0, End_B0=24 End_B1=24
3854 14:44:25.495178 25, 0x0, End_B0=25 End_B1=25
3855 14:44:25.495270 26, 0x0, End_B0=26 End_B1=26
3856 14:44:25.498258 27, 0x0, End_B0=27 End_B1=27
3857 14:44:25.501575 28, 0x0, End_B0=28 End_B1=28
3858 14:44:25.504916 29, 0x0, End_B0=29 End_B1=29
3859 14:44:25.508363 30, 0x0, End_B0=30 End_B1=30
3860 14:44:25.508456 31, 0xFFFF, End_B0=30 End_B1=30
3861 14:44:25.514865 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3862 14:44:25.521394 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3863 14:44:25.521493
3864 14:44:25.521565
3865 14:44:25.524705 Write Rank1 MR23 =0x3f
3866 14:44:25.524795 [DQSOSC]
3867 14:44:25.531139 [DQSOSCAuto] RK1, (LSB)MR18= 0xbaba, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3868 14:44:25.537685 CH1_RK1: MR19=0x202, MR18=0xBABA, DQSOSC=451, MR23=63, INC=12, DEC=18
3869 14:44:25.540909 Write Rank1 MR23 =0x3f
3870 14:44:25.541000 [DQSOSC]
3871 14:44:25.551155 [DQSOSCAuto] RK1, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3872 14:44:25.551247 CH1 RK1: MR19=202, MR18=B6B6
3873 14:44:25.554205 [RxdqsGatingPostProcess] freq 1600
3874 14:44:25.560658 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3875 14:44:25.560750 Rank: 0
3876 14:44:25.563825 best DQS0 dly(2T, 0.5T) = (2, 6)
3877 14:44:25.567228 best DQS1 dly(2T, 0.5T) = (2, 6)
3878 14:44:25.570323 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3879 14:44:25.573794 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3880 14:44:25.573886 Rank: 1
3881 14:44:25.577189 best DQS0 dly(2T, 0.5T) = (2, 6)
3882 14:44:25.580351 best DQS1 dly(2T, 0.5T) = (2, 6)
3883 14:44:25.583551 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3884 14:44:25.587060 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3885 14:44:25.590095 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3886 14:44:25.593558 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3887 14:44:25.600104 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3888 14:44:25.600196
3889 14:44:25.600268
3890 14:44:25.603072 [Calibration Summary] Freqency 1600
3891 14:44:25.603194 CH 0, Rank 0
3892 14:44:25.606340 All Pass.
3893 14:44:25.606435
3894 14:44:25.606512 CH 0, Rank 1
3895 14:44:25.606580 All Pass.
3896 14:44:25.606646
3897 14:44:25.609631 CH 1, Rank 0
3898 14:44:25.609719 All Pass.
3899 14:44:25.609791
3900 14:44:25.609859 CH 1, Rank 1
3901 14:44:25.613036 All Pass.
3902 14:44:25.613123
3903 14:44:25.619375 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3904 14:44:25.626267 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3905 14:44:25.632567 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3906 14:44:25.635972 Write Rank0 MR3 =0xb0
3907 14:44:25.642514 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3908 14:44:25.648952 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3909 14:44:25.655581 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3910 14:44:25.658966 Write Rank1 MR3 =0xb0
3911 14:44:25.662157 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3912 14:44:25.671910 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3913 14:44:25.678390 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3914 14:44:25.678483 Write Rank0 MR3 =0xb0
3915 14:44:25.684976 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3916 14:44:25.691567 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3917 14:44:25.701355 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3918 14:44:25.701459 Write Rank1 MR3 =0xb0
3919 14:44:25.704866 DramC Write-DBI on
3920 14:44:25.707800 [GetDramInforAfterCalByMRR] Vendor 6.
3921 14:44:25.711333 [GetDramInforAfterCalByMRR] Revision 505.
3922 14:44:25.711426 MR8 1111
3923 14:44:25.717833 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3924 14:44:25.717929 MR8 1111
3925 14:44:25.721148 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3926 14:44:25.724298 MR8 1111
3927 14:44:25.727679 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3928 14:44:25.727772 MR8 1111
3929 14:44:25.734105 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3930 14:44:25.744015 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3931 14:44:25.744109 Write Rank0 MR13 =0xd0
3932 14:44:25.747441 Write Rank1 MR13 =0xd0
3933 14:44:25.750586 Write Rank0 MR13 =0xd0
3934 14:44:25.750678 Write Rank1 MR13 =0xd0
3935 14:44:25.753977 Save calibration result to emmc
3936 14:44:25.754072
3937 14:44:25.754144
3938 14:44:25.757144 [DramcModeReg_Check] Freq_1600, FSP_1
3939 14:44:25.760256 FSP_1, CH_0, RK0
3940 14:44:25.760349 Write Rank0 MR13 =0xd8
3941 14:44:25.763725 MR12 = 0x5a (global = 0x5a) match
3942 14:44:25.766772 MR14 = 0x1c (global = 0x1c) match
3943 14:44:25.770103 FSP_1, CH_0, RK1
3944 14:44:25.770194 Write Rank1 MR13 =0xd8
3945 14:44:25.773367 MR12 = 0x5e (global = 0x5e) match
3946 14:44:25.776853 MR14 = 0x1e (global = 0x1e) match
3947 14:44:25.780045 FSP_1, CH_1, RK0
3948 14:44:25.780136 Write Rank0 MR13 =0xd8
3949 14:44:25.783390 MR12 = 0x5a (global = 0x5a) match
3950 14:44:25.786628 MR14 = 0x20 (global = 0x20) match
3951 14:44:25.790111 FSP_1, CH_1, RK1
3952 14:44:25.790202 Write Rank1 MR13 =0xd8
3953 14:44:25.792934 MR12 = 0x5c (global = 0x5c) match
3954 14:44:25.796537 MR14 = 0x1e (global = 0x1e) match
3955 14:44:25.796629
3956 14:44:25.802765 [MEM_TEST] 02: After DFS, before run time config
3957 14:44:25.812794 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3958 14:44:25.812886
3959 14:44:25.812959 [TA2_TEST]
3960 14:44:25.813032 === TA2 HW
3961 14:44:25.816169 TA2 PAT: XTALK
3962 14:44:25.819160 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3963 14:44:25.825832 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3964 14:44:25.829179 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3965 14:44:25.835683 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3966 14:44:25.835773
3967 14:44:25.835843
3968 14:44:25.835908 Settings after calibration
3969 14:44:25.839076
3970 14:44:25.839165 [DramcRunTimeConfig]
3971 14:44:25.842021 TransferPLLToSPMControl - MODE SW PHYPLL
3972 14:44:25.845334 TX_TRACKING: ON
3973 14:44:25.845424 RX_TRACKING: ON
3974 14:44:25.845506 HW_GATING: ON
3975 14:44:25.848793 HW_GATING DBG: OFF
3976 14:44:25.848882 ddr_geometry:1
3977 14:44:25.851903 ddr_geometry:1
3978 14:44:25.851992 ddr_geometry:1
3979 14:44:25.855369 ddr_geometry:1
3980 14:44:25.855458 ddr_geometry:1
3981 14:44:25.858382 ddr_geometry:1
3982 14:44:25.858471 ddr_geometry:1
3983 14:44:25.858542 ddr_geometry:1
3984 14:44:25.862025 High Freq DUMMY_READ_FOR_TRACKING: ON
3985 14:44:25.864864 ZQCS_ENABLE_LP4: OFF
3986 14:44:25.868246 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3987 14:44:25.871627 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3988 14:44:25.874970 SPM_CONTROL_AFTERK: ON
3989 14:44:25.875059 IMPEDANCE_TRACKING: ON
3990 14:44:25.878182 TEMP_SENSOR: ON
3991 14:44:25.878272 PER_BANK_REFRESH: ON
3992 14:44:25.881370 HW_SAVE_FOR_SR: ON
3993 14:44:25.884623 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3994 14:44:25.888150 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3995 14:44:25.891159 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3996 14:44:25.891249 Read ODT Tracking: ON
3997 14:44:25.894648 =========================
3998 14:44:25.894773
3999 14:44:25.894880 [TA2_TEST]
4000 14:44:25.897915 === TA2 HW
4001 14:44:25.901094 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4002 14:44:25.907626 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4003 14:44:25.911156 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4004 14:44:25.917453 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4005 14:44:25.917544
4006 14:44:25.920642 [MEM_TEST] 03: After run time config
4007 14:44:25.930624 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4008 14:44:25.933786 [complex_mem_test] start addr:0x40024000, len:131072
4009 14:44:26.138084 1st complex R/W mem test pass
4010 14:44:26.144674 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4011 14:44:26.148147 sync preloader write leveling
4012 14:44:26.151452 sync preloader cbt_mr12
4013 14:44:26.154598 sync preloader cbt_clk_dly
4014 14:44:26.154688 sync preloader cbt_cmd_dly
4015 14:44:26.157779 sync preloader cbt_cs
4016 14:44:26.160883 sync preloader cbt_ca_perbit_delay
4017 14:44:26.164391 sync preloader clk_delay
4018 14:44:26.164480 sync preloader dqs_delay
4019 14:44:26.167787 sync preloader u1Gating2T_Save
4020 14:44:26.171004 sync preloader u1Gating05T_Save
4021 14:44:26.174194 sync preloader u1Gatingfine_tune_Save
4022 14:44:26.177301 sync preloader u1Gatingucpass_count_Save
4023 14:44:26.180660 sync preloader u1TxWindowPerbitVref_Save
4024 14:44:26.183789 sync preloader u1TxCenter_min_Save
4025 14:44:26.187302 sync preloader u1TxCenter_max_Save
4026 14:44:26.190773 sync preloader u1Txwin_center_Save
4027 14:44:26.194038 sync preloader u1Txfirst_pass_Save
4028 14:44:26.197203 sync preloader u1Txlast_pass_Save
4029 14:44:26.200291 sync preloader u1RxDatlat_Save
4030 14:44:26.203564 sync preloader u1RxWinPerbitVref_Save
4031 14:44:26.207173 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4032 14:44:26.210106 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4033 14:44:26.213531 sync preloader delay_cell_unit
4034 14:44:26.220286 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4035 14:44:26.223461 sync preloader write leveling
4036 14:44:26.226582 sync preloader cbt_mr12
4037 14:44:26.226672 sync preloader cbt_clk_dly
4038 14:44:26.229718 sync preloader cbt_cmd_dly
4039 14:44:26.233078 sync preloader cbt_cs
4040 14:44:26.236348 sync preloader cbt_ca_perbit_delay
4041 14:44:26.236438 sync preloader clk_delay
4042 14:44:26.240169 sync preloader dqs_delay
4043 14:44:26.243185 sync preloader u1Gating2T_Save
4044 14:44:26.246173 sync preloader u1Gating05T_Save
4045 14:44:26.249417 sync preloader u1Gatingfine_tune_Save
4046 14:44:26.252684 sync preloader u1Gatingucpass_count_Save
4047 14:44:26.256225 sync preloader u1TxWindowPerbitVref_Save
4048 14:44:26.259176 sync preloader u1TxCenter_min_Save
4049 14:44:26.262587 sync preloader u1TxCenter_max_Save
4050 14:44:26.265926 sync preloader u1Txwin_center_Save
4051 14:44:26.269340 sync preloader u1Txfirst_pass_Save
4052 14:44:26.272205 sync preloader u1Txlast_pass_Save
4053 14:44:26.275767 sync preloader u1RxDatlat_Save
4054 14:44:26.278937 sync preloader u1RxWinPerbitVref_Save
4055 14:44:26.282086 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4056 14:44:26.285399 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4057 14:44:26.289040 sync preloader delay_cell_unit
4058 14:44:26.295474 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4059 14:44:26.298552 sync preloader write leveling
4060 14:44:26.301891 sync preloader cbt_mr12
4061 14:44:26.301980 sync preloader cbt_clk_dly
4062 14:44:26.305168 sync preloader cbt_cmd_dly
4063 14:44:26.308212 sync preloader cbt_cs
4064 14:44:26.311816 sync preloader cbt_ca_perbit_delay
4065 14:44:26.311914 sync preloader clk_delay
4066 14:44:26.314764 sync preloader dqs_delay
4067 14:44:26.318145 sync preloader u1Gating2T_Save
4068 14:44:26.321626 sync preloader u1Gating05T_Save
4069 14:44:26.324722 sync preloader u1Gatingfine_tune_Save
4070 14:44:26.327938 sync preloader u1Gatingucpass_count_Save
4071 14:44:26.331626 sync preloader u1TxWindowPerbitVref_Save
4072 14:44:26.334719 sync preloader u1TxCenter_min_Save
4073 14:44:26.338185 sync preloader u1TxCenter_max_Save
4074 14:44:26.341258 sync preloader u1Txwin_center_Save
4075 14:44:26.344529 sync preloader u1Txfirst_pass_Save
4076 14:44:26.347892 sync preloader u1Txlast_pass_Save
4077 14:44:26.347982 sync preloader u1RxDatlat_Save
4078 14:44:26.350894 sync preloader u1RxWinPerbitVref_Save
4079 14:44:26.357605 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4080 14:44:26.360742 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4081 14:44:26.364047 sync preloader delay_cell_unit
4082 14:44:26.367523 just_for_test_dump_coreboot_params dump all params
4083 14:44:26.370813 dump source = 0x0
4084 14:44:26.370902 dump params frequency:1600
4085 14:44:26.374168 dump params rank number:2
4086 14:44:26.374258
4087 14:44:26.377007 dump params write leveling
4088 14:44:26.380414 write leveling[0][0][0] = 0x20
4089 14:44:26.383951 write leveling[0][0][1] = 0x1a
4090 14:44:26.384069 write leveling[0][1][0] = 0x1e
4091 14:44:26.387042 write leveling[0][1][1] = 0x19
4092 14:44:26.390104 write leveling[1][0][0] = 0x24
4093 14:44:26.393580 write leveling[1][0][1] = 0x1e
4094 14:44:26.396763 write leveling[1][1][0] = 0x23
4095 14:44:26.400009 write leveling[1][1][1] = 0x1d
4096 14:44:26.400139 dump params cbt_cs
4097 14:44:26.403565 cbt_cs[0][0] = 0x6
4098 14:44:26.403655 cbt_cs[0][1] = 0x6
4099 14:44:26.406595 cbt_cs[1][0] = 0xb
4100 14:44:26.406685 cbt_cs[1][1] = 0xb
4101 14:44:26.409911 dump params cbt_mr12
4102 14:44:26.410004 cbt_mr12[0][0] = 0x1a
4103 14:44:26.413250 cbt_mr12[0][1] = 0x1e
4104 14:44:26.416481 cbt_mr12[1][0] = 0x1a
4105 14:44:26.416571 cbt_mr12[1][1] = 0x1c
4106 14:44:26.419508 dump params tx window
4107 14:44:26.422925 tx_center_min[0][0][0] = 985
4108 14:44:26.426288 tx_center_max[0][0][0] = 990
4109 14:44:26.426378 tx_center_min[0][0][1] = 978
4110 14:44:26.429596 tx_center_max[0][0][1] = 985
4111 14:44:26.433001 tx_center_min[0][1][0] = 984
4112 14:44:26.436020 tx_center_max[0][1][0] = 991
4113 14:44:26.439280 tx_center_min[0][1][1] = 979
4114 14:44:26.439370 tx_center_max[0][1][1] = 987
4115 14:44:26.442632 tx_center_min[1][0][0] = 989
4116 14:44:26.445838 tx_center_max[1][0][0] = 995
4117 14:44:26.448993 tx_center_min[1][0][1] = 981
4118 14:44:26.452255 tx_center_max[1][0][1] = 988
4119 14:44:26.452345 tx_center_min[1][1][0] = 989
4120 14:44:26.455839 tx_center_max[1][1][0] = 995
4121 14:44:26.458836 tx_center_min[1][1][1] = 981
4122 14:44:26.462171 tx_center_max[1][1][1] = 988
4123 14:44:26.462261 dump params tx window
4124 14:44:26.465648 tx_win_center[0][0][0] = 990
4125 14:44:26.468854 tx_first_pass[0][0][0] = 979
4126 14:44:26.472158 tx_last_pass[0][0][0] = 1001
4127 14:44:26.475639 tx_win_center[0][0][1] = 989
4128 14:44:26.475730 tx_first_pass[0][0][1] = 978
4129 14:44:26.478432 tx_last_pass[0][0][1] = 1001
4130 14:44:26.481754 tx_win_center[0][0][2] = 990
4131 14:44:26.485280 tx_first_pass[0][0][2] = 978
4132 14:44:26.488630 tx_last_pass[0][0][2] = 1002
4133 14:44:26.488721 tx_win_center[0][0][3] = 985
4134 14:44:26.491827 tx_first_pass[0][0][3] = 974
4135 14:44:26.495059 tx_last_pass[0][0][3] = 996
4136 14:44:26.498401 tx_win_center[0][0][4] = 988
4137 14:44:26.501537 tx_first_pass[0][0][4] = 977
4138 14:44:26.501626 tx_last_pass[0][0][4] = 1000
4139 14:44:26.505054 tx_win_center[0][0][5] = 987
4140 14:44:26.507915 tx_first_pass[0][0][5] = 976
4141 14:44:26.511434 tx_last_pass[0][0][5] = 999
4142 14:44:26.511525 tx_win_center[0][0][6] = 988
4143 14:44:26.514626 tx_first_pass[0][0][6] = 976
4144 14:44:26.517880 tx_last_pass[0][0][6] = 1000
4145 14:44:26.521005 tx_win_center[0][0][7] = 989
4146 14:44:26.524368 tx_first_pass[0][0][7] = 977
4147 14:44:26.524458 tx_last_pass[0][0][7] = 1001
4148 14:44:26.527697 tx_win_center[0][0][8] = 978
4149 14:44:26.531068 tx_first_pass[0][0][8] = 967
4150 14:44:26.534153 tx_last_pass[0][0][8] = 989
4151 14:44:26.537463 tx_win_center[0][0][9] = 980
4152 14:44:26.537553 tx_first_pass[0][0][9] = 969
4153 14:44:26.540627 tx_last_pass[0][0][9] = 992
4154 14:44:26.544229 tx_win_center[0][0][10] = 985
4155 14:44:26.547461 tx_first_pass[0][0][10] = 974
4156 14:44:26.550394 tx_last_pass[0][0][10] = 997
4157 14:44:26.550486 tx_win_center[0][0][11] = 979
4158 14:44:26.553898 tx_first_pass[0][0][11] = 968
4159 14:44:26.557067 tx_last_pass[0][0][11] = 991
4160 14:44:26.560483 tx_win_center[0][0][12] = 980
4161 14:44:26.563899 tx_first_pass[0][0][12] = 969
4162 14:44:26.567066 tx_last_pass[0][0][12] = 992
4163 14:44:26.567157 tx_win_center[0][0][13] = 980
4164 14:44:26.570432 tx_first_pass[0][0][13] = 969
4165 14:44:26.573565 tx_last_pass[0][0][13] = 992
4166 14:44:26.576843 tx_win_center[0][0][14] = 983
4167 14:44:26.580192 tx_first_pass[0][0][14] = 970
4168 14:44:26.580283 tx_last_pass[0][0][14] = 996
4169 14:44:26.583226 tx_win_center[0][0][15] = 985
4170 14:44:26.586613 tx_first_pass[0][0][15] = 973
4171 14:44:26.589732 tx_last_pass[0][0][15] = 997
4172 14:44:26.593217 tx_win_center[0][1][0] = 991
4173 14:44:26.596407 tx_first_pass[0][1][0] = 979
4174 14:44:26.596498 tx_last_pass[0][1][0] = 1003
4175 14:44:26.599598 tx_win_center[0][1][1] = 990
4176 14:44:26.602883 tx_first_pass[0][1][1] = 978
4177 14:44:26.606169 tx_last_pass[0][1][1] = 1002
4178 14:44:26.606260 tx_win_center[0][1][2] = 990
4179 14:44:26.609634 tx_first_pass[0][1][2] = 978
4180 14:44:26.612841 tx_last_pass[0][1][2] = 1002
4181 14:44:26.615927 tx_win_center[0][1][3] = 984
4182 14:44:26.619278 tx_first_pass[0][1][3] = 971
4183 14:44:26.619368 tx_last_pass[0][1][3] = 997
4184 14:44:26.622687 tx_win_center[0][1][4] = 989
4185 14:44:26.625864 tx_first_pass[0][1][4] = 977
4186 14:44:26.629252 tx_last_pass[0][1][4] = 1001
4187 14:44:26.632308 tx_win_center[0][1][5] = 987
4188 14:44:26.632404 tx_first_pass[0][1][5] = 975
4189 14:44:26.635662 tx_last_pass[0][1][5] = 999
4190 14:44:26.639113 tx_win_center[0][1][6] = 987
4191 14:44:26.642413 tx_first_pass[0][1][6] = 976
4192 14:44:26.645538 tx_last_pass[0][1][6] = 999
4193 14:44:26.645629 tx_win_center[0][1][7] = 989
4194 14:44:26.648926 tx_first_pass[0][1][7] = 977
4195 14:44:26.651954 tx_last_pass[0][1][7] = 1002
4196 14:44:26.655317 tx_win_center[0][1][8] = 979
4197 14:44:26.658522 tx_first_pass[0][1][8] = 968
4198 14:44:26.658612 tx_last_pass[0][1][8] = 991
4199 14:44:26.661846 tx_win_center[0][1][9] = 982
4200 14:44:26.665277 tx_first_pass[0][1][9] = 970
4201 14:44:26.668548 tx_last_pass[0][1][9] = 994
4202 14:44:26.671574 tx_win_center[0][1][10] = 987
4203 14:44:26.671654 tx_first_pass[0][1][10] = 975
4204 14:44:26.675039 tx_last_pass[0][1][10] = 999
4205 14:44:26.678620 tx_win_center[0][1][11] = 980
4206 14:44:26.681449 tx_first_pass[0][1][11] = 969
4207 14:44:26.684977 tx_last_pass[0][1][11] = 992
4208 14:44:26.685068 tx_win_center[0][1][12] = 982
4209 14:44:26.687934 tx_first_pass[0][1][12] = 971
4210 14:44:26.691234 tx_last_pass[0][1][12] = 994
4211 14:44:26.694825 tx_win_center[0][1][13] = 982
4212 14:44:26.697911 tx_first_pass[0][1][13] = 970
4213 14:44:26.701261 tx_last_pass[0][1][13] = 994
4214 14:44:26.701351 tx_win_center[0][1][14] = 984
4215 14:44:26.704437 tx_first_pass[0][1][14] = 972
4216 14:44:26.707746 tx_last_pass[0][1][14] = 997
4217 14:44:26.711030 tx_win_center[0][1][15] = 986
4218 14:44:26.714440 tx_first_pass[0][1][15] = 974
4219 14:44:26.714531 tx_last_pass[0][1][15] = 998
4220 14:44:26.717560 tx_win_center[1][0][0] = 995
4221 14:44:26.720673 tx_first_pass[1][0][0] = 983
4222 14:44:26.724028 tx_last_pass[1][0][0] = 1007
4223 14:44:26.727512 tx_win_center[1][0][1] = 993
4224 14:44:26.727602 tx_first_pass[1][0][1] = 981
4225 14:44:26.730564 tx_last_pass[1][0][1] = 1006
4226 14:44:26.734018 tx_win_center[1][0][2] = 992
4227 14:44:26.737028 tx_first_pass[1][0][2] = 979
4228 14:44:26.740457 tx_last_pass[1][0][2] = 1005
4229 14:44:26.740547 tx_win_center[1][0][3] = 989
4230 14:44:26.743681 tx_first_pass[1][0][3] = 978
4231 14:44:26.747000 tx_last_pass[1][0][3] = 1001
4232 14:44:26.750161 tx_win_center[1][0][4] = 994
4233 14:44:26.753644 tx_first_pass[1][0][4] = 982
4234 14:44:26.753734 tx_last_pass[1][0][4] = 1006
4235 14:44:26.757048 tx_win_center[1][0][5] = 994
4236 14:44:26.760055 tx_first_pass[1][0][5] = 982
4237 14:44:26.763545 tx_last_pass[1][0][5] = 1007
4238 14:44:26.766725 tx_win_center[1][0][6] = 993
4239 14:44:26.766815 tx_first_pass[1][0][6] = 981
4240 14:44:26.770026 tx_last_pass[1][0][6] = 1006
4241 14:44:26.773062 tx_win_center[1][0][7] = 993
4242 14:44:26.776563 tx_first_pass[1][0][7] = 981
4243 14:44:26.779568 tx_last_pass[1][0][7] = 1006
4244 14:44:26.779652 tx_win_center[1][0][8] = 985
4245 14:44:26.783126 tx_first_pass[1][0][8] = 974
4246 14:44:26.786125 tx_last_pass[1][0][8] = 997
4247 14:44:26.789712 tx_win_center[1][0][9] = 984
4248 14:44:26.792910 tx_first_pass[1][0][9] = 972
4249 14:44:26.793001 tx_last_pass[1][0][9] = 996
4250 14:44:26.795948 tx_win_center[1][0][10] = 987
4251 14:44:26.799384 tx_first_pass[1][0][10] = 975
4252 14:44:26.802740 tx_last_pass[1][0][10] = 999
4253 14:44:26.806020 tx_win_center[1][0][11] = 988
4254 14:44:26.806111 tx_first_pass[1][0][11] = 976
4255 14:44:26.809037 tx_last_pass[1][0][11] = 1000
4256 14:44:26.812493 tx_win_center[1][0][12] = 987
4257 14:44:26.815827 tx_first_pass[1][0][12] = 976
4258 14:44:26.819296 tx_last_pass[1][0][12] = 999
4259 14:44:26.819386 tx_win_center[1][0][13] = 988
4260 14:44:26.822317 tx_first_pass[1][0][13] = 977
4261 14:44:26.825882 tx_last_pass[1][0][13] = 1000
4262 14:44:26.828767 tx_win_center[1][0][14] = 987
4263 14:44:26.832354 tx_first_pass[1][0][14] = 976
4264 14:44:26.835333 tx_last_pass[1][0][14] = 999
4265 14:44:26.835423 tx_win_center[1][0][15] = 981
4266 14:44:26.838635 tx_first_pass[1][0][15] = 970
4267 14:44:26.841701 tx_last_pass[1][0][15] = 993
4268 14:44:26.845151 tx_win_center[1][1][0] = 995
4269 14:44:26.848701 tx_first_pass[1][1][0] = 983
4270 14:44:26.848791 tx_last_pass[1][1][0] = 1007
4271 14:44:26.851660 tx_win_center[1][1][1] = 993
4272 14:44:26.855149 tx_first_pass[1][1][1] = 981
4273 14:44:26.858397 tx_last_pass[1][1][1] = 1006
4274 14:44:26.861573 tx_win_center[1][1][2] = 991
4275 14:44:26.861664 tx_first_pass[1][1][2] = 978
4276 14:44:26.864999 tx_last_pass[1][1][2] = 1005
4277 14:44:26.868003 tx_win_center[1][1][3] = 989
4278 14:44:26.871519 tx_first_pass[1][1][3] = 977
4279 14:44:26.874521 tx_last_pass[1][1][3] = 1002
4280 14:44:26.874613 tx_win_center[1][1][4] = 993
4281 14:44:26.878090 tx_first_pass[1][1][4] = 981
4282 14:44:26.881405 tx_last_pass[1][1][4] = 1006
4283 14:44:26.884463 tx_win_center[1][1][5] = 994
4284 14:44:26.887913 tx_first_pass[1][1][5] = 982
4285 14:44:26.888004 tx_last_pass[1][1][5] = 1006
4286 14:44:26.891015 tx_win_center[1][1][6] = 993
4287 14:44:26.894249 tx_first_pass[1][1][6] = 980
4288 14:44:26.897906 tx_last_pass[1][1][6] = 1006
4289 14:44:26.900782 tx_win_center[1][1][7] = 993
4290 14:44:26.900873 tx_first_pass[1][1][7] = 980
4291 14:44:26.904260 tx_last_pass[1][1][7] = 1006
4292 14:44:26.907477 tx_win_center[1][1][8] = 985
4293 14:44:26.910588 tx_first_pass[1][1][8] = 974
4294 14:44:26.913870 tx_last_pass[1][1][8] = 997
4295 14:44:26.913960 tx_win_center[1][1][9] = 983
4296 14:44:26.917320 tx_first_pass[1][1][9] = 972
4297 14:44:26.920409 tx_last_pass[1][1][9] = 995
4298 14:44:26.923919 tx_win_center[1][1][10] = 987
4299 14:44:26.927139 tx_first_pass[1][1][10] = 976
4300 14:44:26.927229 tx_last_pass[1][1][10] = 999
4301 14:44:26.930391 tx_win_center[1][1][11] = 987
4302 14:44:26.933640 tx_first_pass[1][1][11] = 976
4303 14:44:26.936839 tx_last_pass[1][1][11] = 999
4304 14:44:26.940097 tx_win_center[1][1][12] = 987
4305 14:44:26.940188 tx_first_pass[1][1][12] = 976
4306 14:44:26.943389 tx_last_pass[1][1][12] = 999
4307 14:44:26.946413 tx_win_center[1][1][13] = 988
4308 14:44:26.949872 tx_first_pass[1][1][13] = 977
4309 14:44:26.953096 tx_last_pass[1][1][13] = 1000
4310 14:44:26.956132 tx_win_center[1][1][14] = 987
4311 14:44:26.956223 tx_first_pass[1][1][14] = 976
4312 14:44:26.959423 tx_last_pass[1][1][14] = 999
4313 14:44:26.962936 tx_win_center[1][1][15] = 981
4314 14:44:26.966261 tx_first_pass[1][1][15] = 969
4315 14:44:26.969454 tx_last_pass[1][1][15] = 993
4316 14:44:26.969545 dump params rx window
4317 14:44:26.972505 rx_firspass[0][0][0] = 7
4318 14:44:26.975924 rx_lastpass[0][0][0] = 36
4319 14:44:26.976013 rx_firspass[0][0][1] = 8
4320 14:44:26.979300 rx_lastpass[0][0][1] = 36
4321 14:44:26.982348 rx_firspass[0][0][2] = 6
4322 14:44:26.985828 rx_lastpass[0][0][2] = 39
4323 14:44:26.985917 rx_firspass[0][0][3] = -3
4324 14:44:26.988954 rx_lastpass[0][0][3] = 30
4325 14:44:26.992430 rx_firspass[0][0][4] = 6
4326 14:44:26.992526 rx_lastpass[0][0][4] = 36
4327 14:44:26.995484 rx_firspass[0][0][5] = 3
4328 14:44:26.998840 rx_lastpass[0][0][5] = 33
4329 14:44:27.002290 rx_firspass[0][0][6] = 3
4330 14:44:27.002379 rx_lastpass[0][0][6] = 33
4331 14:44:27.005562 rx_firspass[0][0][7] = 4
4332 14:44:27.008760 rx_lastpass[0][0][7] = 36
4333 14:44:27.008849 rx_firspass[0][0][8] = -2
4334 14:44:27.011855 rx_lastpass[0][0][8] = 30
4335 14:44:27.015261 rx_firspass[0][0][9] = 1
4336 14:44:27.018419 rx_lastpass[0][0][9] = 32
4337 14:44:27.018545 rx_firspass[0][0][10] = 9
4338 14:44:27.021775 rx_lastpass[0][0][10] = 37
4339 14:44:27.025114 rx_firspass[0][0][11] = 0
4340 14:44:27.028576 rx_lastpass[0][0][11] = 30
4341 14:44:27.028665 rx_firspass[0][0][12] = 3
4342 14:44:27.031496 rx_lastpass[0][0][12] = 31
4343 14:44:27.034843 rx_firspass[0][0][13] = 1
4344 14:44:27.034934 rx_lastpass[0][0][13] = 31
4345 14:44:27.037985 rx_firspass[0][0][14] = 1
4346 14:44:27.041325 rx_lastpass[0][0][14] = 35
4347 14:44:27.044756 rx_firspass[0][0][15] = 3
4348 14:44:27.044878 rx_lastpass[0][0][15] = 36
4349 14:44:27.047767 rx_firspass[0][1][0] = 4
4350 14:44:27.051347 rx_lastpass[0][1][0] = 39
4351 14:44:27.054801 rx_firspass[0][1][1] = 4
4352 14:44:27.054892 rx_lastpass[0][1][1] = 38
4353 14:44:27.057863 rx_firspass[0][1][2] = 5
4354 14:44:27.061074 rx_lastpass[0][1][2] = 40
4355 14:44:27.061163 rx_firspass[0][1][3] = -2
4356 14:44:27.064443 rx_lastpass[0][1][3] = 31
4357 14:44:27.067928 rx_firspass[0][1][4] = 3
4358 14:44:27.070820 rx_lastpass[0][1][4] = 38
4359 14:44:27.070910 rx_firspass[0][1][5] = -1
4360 14:44:27.074096 rx_lastpass[0][1][5] = 34
4361 14:44:27.077683 rx_firspass[0][1][6] = 1
4362 14:44:27.077773 rx_lastpass[0][1][6] = 35
4363 14:44:27.080776 rx_firspass[0][1][7] = 3
4364 14:44:27.084050 rx_lastpass[0][1][7] = 37
4365 14:44:27.087288 rx_firspass[0][1][8] = -4
4366 14:44:27.087377 rx_lastpass[0][1][8] = 32
4367 14:44:27.090671 rx_firspass[0][1][9] = -2
4368 14:44:27.093792 rx_lastpass[0][1][9] = 34
4369 14:44:27.093881 rx_firspass[0][1][10] = 7
4370 14:44:27.097189 rx_lastpass[0][1][10] = 40
4371 14:44:27.100420 rx_firspass[0][1][11] = -2
4372 14:44:27.103838 rx_lastpass[0][1][11] = 32
4373 14:44:27.103926 rx_firspass[0][1][12] = -1
4374 14:44:27.106767 rx_lastpass[0][1][12] = 34
4375 14:44:27.110355 rx_firspass[0][1][13] = -2
4376 14:44:27.113508 rx_lastpass[0][1][13] = 33
4377 14:44:27.113614 rx_firspass[0][1][14] = 2
4378 14:44:27.116638 rx_lastpass[0][1][14] = 35
4379 14:44:27.120156 rx_firspass[0][1][15] = 4
4380 14:44:27.123277 rx_lastpass[0][1][15] = 37
4381 14:44:27.123367 rx_firspass[1][0][0] = 5
4382 14:44:27.126568 rx_lastpass[1][0][0] = 37
4383 14:44:27.129754 rx_firspass[1][0][1] = 3
4384 14:44:27.129843 rx_lastpass[1][0][1] = 37
4385 14:44:27.133305 rx_firspass[1][0][2] = 0
4386 14:44:27.136586 rx_lastpass[1][0][2] = 35
4387 14:44:27.139634 rx_firspass[1][0][3] = 0
4388 14:44:27.139724 rx_lastpass[1][0][3] = 31
4389 14:44:27.143104 rx_firspass[1][0][4] = 5
4390 14:44:27.146356 rx_lastpass[1][0][4] = 35
4391 14:44:27.146445 rx_firspass[1][0][5] = 9
4392 14:44:27.149384 rx_lastpass[1][0][5] = 38
4393 14:44:27.152801 rx_firspass[1][0][6] = 5
4394 14:44:27.156023 rx_lastpass[1][0][6] = 38
4395 14:44:27.156112 rx_firspass[1][0][7] = 5
4396 14:44:27.159195 rx_lastpass[1][0][7] = 35
4397 14:44:27.162868 rx_firspass[1][0][8] = 1
4398 14:44:27.162957 rx_lastpass[1][0][8] = 33
4399 14:44:27.165751 rx_firspass[1][0][9] = 0
4400 14:44:27.169066 rx_lastpass[1][0][9] = 32
4401 14:44:27.172460 rx_firspass[1][0][10] = 3
4402 14:44:27.172549 rx_lastpass[1][0][10] = 36
4403 14:44:27.175710 rx_firspass[1][0][11] = 4
4404 14:44:27.178874 rx_lastpass[1][0][11] = 36
4405 14:44:27.182293 rx_firspass[1][0][12] = 6
4406 14:44:27.182383 rx_lastpass[1][0][12] = 35
4407 14:44:27.185652 rx_firspass[1][0][13] = 5
4408 14:44:27.188835 rx_lastpass[1][0][13] = 36
4409 14:44:27.188926 rx_firspass[1][0][14] = 5
4410 14:44:27.192129 rx_lastpass[1][0][14] = 37
4411 14:44:27.195325 rx_firspass[1][0][15] = -4
4412 14:44:27.198688 rx_lastpass[1][0][15] = 29
4413 14:44:27.198778 rx_firspass[1][1][0] = 4
4414 14:44:27.201728 rx_lastpass[1][1][0] = 40
4415 14:44:27.204991 rx_firspass[1][1][1] = 4
4416 14:44:27.208324 rx_lastpass[1][1][1] = 38
4417 14:44:27.208414 rx_firspass[1][1][2] = 3
4418 14:44:27.211721 rx_lastpass[1][1][2] = 34
4419 14:44:27.215044 rx_firspass[1][1][3] = -2
4420 14:44:27.215181 rx_lastpass[1][1][3] = 33
4421 14:44:27.218305 rx_firspass[1][1][4] = 5
4422 14:44:27.221725 rx_lastpass[1][1][4] = 39
4423 14:44:27.224891 rx_firspass[1][1][5] = 6
4424 14:44:27.224980 rx_lastpass[1][1][5] = 40
4425 14:44:27.228380 rx_firspass[1][1][6] = 6
4426 14:44:27.231367 rx_lastpass[1][1][6] = 40
4427 14:44:27.231458 rx_firspass[1][1][7] = 3
4428 14:44:27.234593 rx_lastpass[1][1][7] = 38
4429 14:44:27.237983 rx_firspass[1][1][8] = -1
4430 14:44:27.240951 rx_lastpass[1][1][8] = 35
4431 14:44:27.241040 rx_firspass[1][1][9] = -2
4432 14:44:27.244492 rx_lastpass[1][1][9] = 33
4433 14:44:27.247540 rx_firspass[1][1][10] = 3
4434 14:44:27.247629 rx_lastpass[1][1][10] = 38
4435 14:44:27.250952 rx_firspass[1][1][11] = 3
4436 14:44:27.254198 rx_lastpass[1][1][11] = 38
4437 14:44:27.257577 rx_firspass[1][1][12] = 4
4438 14:44:27.257666 rx_lastpass[1][1][12] = 37
4439 14:44:27.260701 rx_firspass[1][1][13] = 4
4440 14:44:27.264128 rx_lastpass[1][1][13] = 39
4441 14:44:27.267318 rx_firspass[1][1][14] = 4
4442 14:44:27.267408 rx_lastpass[1][1][14] = 40
4443 14:44:27.270603 rx_firspass[1][1][15] = -4
4444 14:44:27.273955 rx_lastpass[1][1][15] = 31
4445 14:44:27.277159 dump params clk_delay
4446 14:44:27.277247 clk_delay[0] = -1
4447 14:44:27.277353 clk_delay[1] = 0
4448 14:44:27.280358 dump params dqs_delay
4449 14:44:27.283496 dqs_delay[0][0] = 0
4450 14:44:27.283584 dqs_delay[0][1] = 0
4451 14:44:27.287004 dqs_delay[1][0] = 0
4452 14:44:27.287101 dqs_delay[1][1] = -1
4453 14:44:27.290452 dump params delay_cell_unit = 744
4454 14:44:27.293361 dump source = 0x0
4455 14:44:27.293458 dump params frequency:1200
4456 14:44:27.296810 dump params rank number:2
4457 14:44:27.296924
4458 14:44:27.299842 dump params write leveling
4459 14:44:27.303390 write leveling[0][0][0] = 0x0
4460 14:44:27.306405 write leveling[0][0][1] = 0x0
4461 14:44:27.306494 write leveling[0][1][0] = 0x0
4462 14:44:27.309816 write leveling[0][1][1] = 0x0
4463 14:44:27.313163 write leveling[1][0][0] = 0x0
4464 14:44:27.316456 write leveling[1][0][1] = 0x0
4465 14:44:27.319780 write leveling[1][1][0] = 0x0
4466 14:44:27.322887 write leveling[1][1][1] = 0x0
4467 14:44:27.322976 dump params cbt_cs
4468 14:44:27.326328 cbt_cs[0][0] = 0x0
4469 14:44:27.326417 cbt_cs[0][1] = 0x0
4470 14:44:27.329371 cbt_cs[1][0] = 0x0
4471 14:44:27.329487 cbt_cs[1][1] = 0x0
4472 14:44:27.332757 dump params cbt_mr12
4473 14:44:27.332846 cbt_mr12[0][0] = 0x0
4474 14:44:27.335877 cbt_mr12[0][1] = 0x0
4475 14:44:27.335966 cbt_mr12[1][0] = 0x0
4476 14:44:27.339137 cbt_mr12[1][1] = 0x0
4477 14:44:27.342418 dump params tx window
4478 14:44:27.342508 tx_center_min[0][0][0] = 0
4479 14:44:27.345973 tx_center_max[0][0][0] = 0
4480 14:44:27.349005 tx_center_min[0][0][1] = 0
4481 14:44:27.352404 tx_center_max[0][0][1] = 0
4482 14:44:27.352495 tx_center_min[0][1][0] = 0
4483 14:44:27.355755 tx_center_max[0][1][0] = 0
4484 14:44:27.359186 tx_center_min[0][1][1] = 0
4485 14:44:27.362374 tx_center_max[0][1][1] = 0
4486 14:44:27.362464 tx_center_min[1][0][0] = 0
4487 14:44:27.365351 tx_center_max[1][0][0] = 0
4488 14:44:27.368903 tx_center_min[1][0][1] = 0
4489 14:44:27.372215 tx_center_max[1][0][1] = 0
4490 14:44:27.372305 tx_center_min[1][1][0] = 0
4491 14:44:27.375383 tx_center_max[1][1][0] = 0
4492 14:44:27.378695 tx_center_min[1][1][1] = 0
4493 14:44:27.381998 tx_center_max[1][1][1] = 0
4494 14:44:27.382088 dump params tx window
4495 14:44:27.385130 tx_win_center[0][0][0] = 0
4496 14:44:27.388547 tx_first_pass[0][0][0] = 0
4497 14:44:27.388638 tx_last_pass[0][0][0] = 0
4498 14:44:27.391524 tx_win_center[0][0][1] = 0
4499 14:44:27.395054 tx_first_pass[0][0][1] = 0
4500 14:44:27.398108 tx_last_pass[0][0][1] = 0
4501 14:44:27.398198 tx_win_center[0][0][2] = 0
4502 14:44:27.401379 tx_first_pass[0][0][2] = 0
4503 14:44:27.404671 tx_last_pass[0][0][2] = 0
4504 14:44:27.408091 tx_win_center[0][0][3] = 0
4505 14:44:27.408189 tx_first_pass[0][0][3] = 0
4506 14:44:27.411337 tx_last_pass[0][0][3] = 0
4507 14:44:27.414448 tx_win_center[0][0][4] = 0
4508 14:44:27.417987 tx_first_pass[0][0][4] = 0
4509 14:44:27.418078 tx_last_pass[0][0][4] = 0
4510 14:44:27.421180 tx_win_center[0][0][5] = 0
4511 14:44:27.424559 tx_first_pass[0][0][5] = 0
4512 14:44:27.427608 tx_last_pass[0][0][5] = 0
4513 14:44:27.427699 tx_win_center[0][0][6] = 0
4514 14:44:27.431034 tx_first_pass[0][0][6] = 0
4515 14:44:27.434422 tx_last_pass[0][0][6] = 0
4516 14:44:27.434512 tx_win_center[0][0][7] = 0
4517 14:44:27.437801 tx_first_pass[0][0][7] = 0
4518 14:44:27.440763 tx_last_pass[0][0][7] = 0
4519 14:44:27.443960 tx_win_center[0][0][8] = 0
4520 14:44:27.444050 tx_first_pass[0][0][8] = 0
4521 14:44:27.447449 tx_last_pass[0][0][8] = 0
4522 14:44:27.450911 tx_win_center[0][0][9] = 0
4523 14:44:27.453871 tx_first_pass[0][0][9] = 0
4524 14:44:27.453961 tx_last_pass[0][0][9] = 0
4525 14:44:27.457381 tx_win_center[0][0][10] = 0
4526 14:44:27.460264 tx_first_pass[0][0][10] = 0
4527 14:44:27.463672 tx_last_pass[0][0][10] = 0
4528 14:44:27.463767 tx_win_center[0][0][11] = 0
4529 14:44:27.467022 tx_first_pass[0][0][11] = 0
4530 14:44:27.469990 tx_last_pass[0][0][11] = 0
4531 14:44:27.473462 tx_win_center[0][0][12] = 0
4532 14:44:27.476645 tx_first_pass[0][0][12] = 0
4533 14:44:27.476736 tx_last_pass[0][0][12] = 0
4534 14:44:27.480044 tx_win_center[0][0][13] = 0
4535 14:44:27.483085 tx_first_pass[0][0][13] = 0
4536 14:44:27.486561 tx_last_pass[0][0][13] = 0
4537 14:44:27.486651 tx_win_center[0][0][14] = 0
4538 14:44:27.489594 tx_first_pass[0][0][14] = 0
4539 14:44:27.492866 tx_last_pass[0][0][14] = 0
4540 14:44:27.496344 tx_win_center[0][0][15] = 0
4541 14:44:27.496435 tx_first_pass[0][0][15] = 0
4542 14:44:27.499918 tx_last_pass[0][0][15] = 0
4543 14:44:27.502853 tx_win_center[0][1][0] = 0
4544 14:44:27.506128 tx_first_pass[0][1][0] = 0
4545 14:44:27.506218 tx_last_pass[0][1][0] = 0
4546 14:44:27.509650 tx_win_center[0][1][1] = 0
4547 14:44:27.512665 tx_first_pass[0][1][1] = 0
4548 14:44:27.516226 tx_last_pass[0][1][1] = 0
4549 14:44:27.516317 tx_win_center[0][1][2] = 0
4550 14:44:27.519036 tx_first_pass[0][1][2] = 0
4551 14:44:27.522895 tx_last_pass[0][1][2] = 0
4552 14:44:27.526027 tx_win_center[0][1][3] = 0
4553 14:44:27.526117 tx_first_pass[0][1][3] = 0
4554 14:44:27.529177 tx_last_pass[0][1][3] = 0
4555 14:44:27.532360 tx_win_center[0][1][4] = 0
4556 14:44:27.532450 tx_first_pass[0][1][4] = 0
4557 14:44:27.535667 tx_last_pass[0][1][4] = 0
4558 14:44:27.538777 tx_win_center[0][1][5] = 0
4559 14:44:27.542430 tx_first_pass[0][1][5] = 0
4560 14:44:27.542520 tx_last_pass[0][1][5] = 0
4561 14:44:27.545360 tx_win_center[0][1][6] = 0
4562 14:44:27.548822 tx_first_pass[0][1][6] = 0
4563 14:44:27.551994 tx_last_pass[0][1][6] = 0
4564 14:44:27.552084 tx_win_center[0][1][7] = 0
4565 14:44:27.555334 tx_first_pass[0][1][7] = 0
4566 14:44:27.558386 tx_last_pass[0][1][7] = 0
4567 14:44:27.561457 tx_win_center[0][1][8] = 0
4568 14:44:27.561546 tx_first_pass[0][1][8] = 0
4569 14:44:27.565023 tx_last_pass[0][1][8] = 0
4570 14:44:27.568054 tx_win_center[0][1][9] = 0
4571 14:44:27.571392 tx_first_pass[0][1][9] = 0
4572 14:44:27.571482 tx_last_pass[0][1][9] = 0
4573 14:44:27.574859 tx_win_center[0][1][10] = 0
4574 14:44:27.577894 tx_first_pass[0][1][10] = 0
4575 14:44:27.581411 tx_last_pass[0][1][10] = 0
4576 14:44:27.581511 tx_win_center[0][1][11] = 0
4577 14:44:27.584404 tx_first_pass[0][1][11] = 0
4578 14:44:27.587874 tx_last_pass[0][1][11] = 0
4579 14:44:27.591307 tx_win_center[0][1][12] = 0
4580 14:44:27.591396 tx_first_pass[0][1][12] = 0
4581 14:44:27.594429 tx_last_pass[0][1][12] = 0
4582 14:44:27.597413 tx_win_center[0][1][13] = 0
4583 14:44:27.601087 tx_first_pass[0][1][13] = 0
4584 14:44:27.601177 tx_last_pass[0][1][13] = 0
4585 14:44:27.603995 tx_win_center[0][1][14] = 0
4586 14:44:27.607477 tx_first_pass[0][1][14] = 0
4587 14:44:27.610575 tx_last_pass[0][1][14] = 0
4588 14:44:27.614116 tx_win_center[0][1][15] = 0
4589 14:44:27.614205 tx_first_pass[0][1][15] = 0
4590 14:44:27.617284 tx_last_pass[0][1][15] = 0
4591 14:44:27.620409 tx_win_center[1][0][0] = 0
4592 14:44:27.623546 tx_first_pass[1][0][0] = 0
4593 14:44:27.623636 tx_last_pass[1][0][0] = 0
4594 14:44:27.626819 tx_win_center[1][0][1] = 0
4595 14:44:27.630320 tx_first_pass[1][0][1] = 0
4596 14:44:27.633333 tx_last_pass[1][0][1] = 0
4597 14:44:27.633423 tx_win_center[1][0][2] = 0
4598 14:44:27.636803 tx_first_pass[1][0][2] = 0
4599 14:44:27.639891 tx_last_pass[1][0][2] = 0
4600 14:44:27.639981 tx_win_center[1][0][3] = 0
4601 14:44:27.643304 tx_first_pass[1][0][3] = 0
4602 14:44:27.646774 tx_last_pass[1][0][3] = 0
4603 14:44:27.649894 tx_win_center[1][0][4] = 0
4604 14:44:27.649983 tx_first_pass[1][0][4] = 0
4605 14:44:27.653034 tx_last_pass[1][0][4] = 0
4606 14:44:27.656591 tx_win_center[1][0][5] = 0
4607 14:44:27.659678 tx_first_pass[1][0][5] = 0
4608 14:44:27.659767 tx_last_pass[1][0][5] = 0
4609 14:44:27.663065 tx_win_center[1][0][6] = 0
4610 14:44:27.666342 tx_first_pass[1][0][6] = 0
4611 14:44:27.669494 tx_last_pass[1][0][6] = 0
4612 14:44:27.669586 tx_win_center[1][0][7] = 0
4613 14:44:27.672774 tx_first_pass[1][0][7] = 0
4614 14:44:27.675864 tx_last_pass[1][0][7] = 0
4615 14:44:27.679166 tx_win_center[1][0][8] = 0
4616 14:44:27.679256 tx_first_pass[1][0][8] = 0
4617 14:44:27.682572 tx_last_pass[1][0][8] = 0
4618 14:44:27.686023 tx_win_center[1][0][9] = 0
4619 14:44:27.689248 tx_first_pass[1][0][9] = 0
4620 14:44:27.689380 tx_last_pass[1][0][9] = 0
4621 14:44:27.692192 tx_win_center[1][0][10] = 0
4622 14:44:27.695782 tx_first_pass[1][0][10] = 0
4623 14:44:27.698857 tx_last_pass[1][0][10] = 0
4624 14:44:27.698947 tx_win_center[1][0][11] = 0
4625 14:44:27.702293 tx_first_pass[1][0][11] = 0
4626 14:44:27.705506 tx_last_pass[1][0][11] = 0
4627 14:44:27.708878 tx_win_center[1][0][12] = 0
4628 14:44:27.708997 tx_first_pass[1][0][12] = 0
4629 14:44:27.711936 tx_last_pass[1][0][12] = 0
4630 14:44:27.715267 tx_win_center[1][0][13] = 0
4631 14:44:27.718365 tx_first_pass[1][0][13] = 0
4632 14:44:27.718455 tx_last_pass[1][0][13] = 0
4633 14:44:27.721594 tx_win_center[1][0][14] = 0
4634 14:44:27.724848 tx_first_pass[1][0][14] = 0
4635 14:44:27.728125 tx_last_pass[1][0][14] = 0
4636 14:44:27.728284 tx_win_center[1][0][15] = 0
4637 14:44:27.731628 tx_first_pass[1][0][15] = 0
4638 14:44:27.734766 tx_last_pass[1][0][15] = 0
4639 14:44:27.738073 tx_win_center[1][1][0] = 0
4640 14:44:27.738196 tx_first_pass[1][1][0] = 0
4641 14:44:27.741638 tx_last_pass[1][1][0] = 0
4642 14:44:27.744886 tx_win_center[1][1][1] = 0
4643 14:44:27.748292 tx_first_pass[1][1][1] = 0
4644 14:44:27.748383 tx_last_pass[1][1][1] = 0
4645 14:44:27.751227 tx_win_center[1][1][2] = 0
4646 14:44:27.754756 tx_first_pass[1][1][2] = 0
4647 14:44:27.757852 tx_last_pass[1][1][2] = 0
4648 14:44:27.757943 tx_win_center[1][1][3] = 0
4649 14:44:27.761170 tx_first_pass[1][1][3] = 0
4650 14:44:27.764338 tx_last_pass[1][1][3] = 0
4651 14:44:27.767835 tx_win_center[1][1][4] = 0
4652 14:44:27.767926 tx_first_pass[1][1][4] = 0
4653 14:44:27.770781 tx_last_pass[1][1][4] = 0
4654 14:44:27.774321 tx_win_center[1][1][5] = 0
4655 14:44:27.774412 tx_first_pass[1][1][5] = 0
4656 14:44:27.777734 tx_last_pass[1][1][5] = 0
4657 14:44:27.780790 tx_win_center[1][1][6] = 0
4658 14:44:27.784384 tx_first_pass[1][1][6] = 0
4659 14:44:27.784474 tx_last_pass[1][1][6] = 0
4660 14:44:27.787324 tx_win_center[1][1][7] = 0
4661 14:44:27.790653 tx_first_pass[1][1][7] = 0
4662 14:44:27.793966 tx_last_pass[1][1][7] = 0
4663 14:44:27.794056 tx_win_center[1][1][8] = 0
4664 14:44:27.797057 tx_first_pass[1][1][8] = 0
4665 14:44:27.800171 tx_last_pass[1][1][8] = 0
4666 14:44:27.803832 tx_win_center[1][1][9] = 0
4667 14:44:27.803922 tx_first_pass[1][1][9] = 0
4668 14:44:27.807061 tx_last_pass[1][1][9] = 0
4669 14:44:27.809950 tx_win_center[1][1][10] = 0
4670 14:44:27.813521 tx_first_pass[1][1][10] = 0
4671 14:44:27.813611 tx_last_pass[1][1][10] = 0
4672 14:44:27.816553 tx_win_center[1][1][11] = 0
4673 14:44:27.819948 tx_first_pass[1][1][11] = 0
4674 14:44:27.823320 tx_last_pass[1][1][11] = 0
4675 14:44:27.823411 tx_win_center[1][1][12] = 0
4676 14:44:27.826593 tx_first_pass[1][1][12] = 0
4677 14:44:27.829849 tx_last_pass[1][1][12] = 0
4678 14:44:27.832984 tx_win_center[1][1][13] = 0
4679 14:44:27.833076 tx_first_pass[1][1][13] = 0
4680 14:44:27.836380 tx_last_pass[1][1][13] = 0
4681 14:44:27.839827 tx_win_center[1][1][14] = 0
4682 14:44:27.842964 tx_first_pass[1][1][14] = 0
4683 14:44:27.846088 tx_last_pass[1][1][14] = 0
4684 14:44:27.846179 tx_win_center[1][1][15] = 0
4685 14:44:27.849418 tx_first_pass[1][1][15] = 0
4686 14:44:27.852580 tx_last_pass[1][1][15] = 0
4687 14:44:27.852669 dump params rx window
4688 14:44:27.856052 rx_firspass[0][0][0] = 0
4689 14:44:27.859461 rx_lastpass[0][0][0] = 0
4690 14:44:27.859550 rx_firspass[0][0][1] = 0
4691 14:44:27.862561 rx_lastpass[0][0][1] = 0
4692 14:44:27.866083 rx_firspass[0][0][2] = 0
4693 14:44:27.869001 rx_lastpass[0][0][2] = 0
4694 14:44:27.869091 rx_firspass[0][0][3] = 0
4695 14:44:27.872144 rx_lastpass[0][0][3] = 0
4696 14:44:27.875656 rx_firspass[0][0][4] = 0
4697 14:44:27.875746 rx_lastpass[0][0][4] = 0
4698 14:44:27.878821 rx_firspass[0][0][5] = 0
4699 14:44:27.882016 rx_lastpass[0][0][5] = 0
4700 14:44:27.882106 rx_firspass[0][0][6] = 0
4701 14:44:27.885454 rx_lastpass[0][0][6] = 0
4702 14:44:27.888725 rx_firspass[0][0][7] = 0
4703 14:44:27.892103 rx_lastpass[0][0][7] = 0
4704 14:44:27.892192 rx_firspass[0][0][8] = 0
4705 14:44:27.895218 rx_lastpass[0][0][8] = 0
4706 14:44:27.898476 rx_firspass[0][0][9] = 0
4707 14:44:27.898566 rx_lastpass[0][0][9] = 0
4708 14:44:27.901850 rx_firspass[0][0][10] = 0
4709 14:44:27.905138 rx_lastpass[0][0][10] = 0
4710 14:44:27.908300 rx_firspass[0][0][11] = 0
4711 14:44:27.908389 rx_lastpass[0][0][11] = 0
4712 14:44:27.911655 rx_firspass[0][0][12] = 0
4713 14:44:27.914876 rx_lastpass[0][0][12] = 0
4714 14:44:27.914966 rx_firspass[0][0][13] = 0
4715 14:44:27.918125 rx_lastpass[0][0][13] = 0
4716 14:44:27.921405 rx_firspass[0][0][14] = 0
4717 14:44:27.924647 rx_lastpass[0][0][14] = 0
4718 14:44:27.924736 rx_firspass[0][0][15] = 0
4719 14:44:27.928074 rx_lastpass[0][0][15] = 0
4720 14:44:27.931300 rx_firspass[0][1][0] = 0
4721 14:44:27.931390 rx_lastpass[0][1][0] = 0
4722 14:44:27.934325 rx_firspass[0][1][1] = 0
4723 14:44:27.937701 rx_lastpass[0][1][1] = 0
4724 14:44:27.940943 rx_firspass[0][1][2] = 0
4725 14:44:27.941033 rx_lastpass[0][1][2] = 0
4726 14:44:27.944338 rx_firspass[0][1][3] = 0
4727 14:44:27.947691 rx_lastpass[0][1][3] = 0
4728 14:44:27.947781 rx_firspass[0][1][4] = 0
4729 14:44:27.950908 rx_lastpass[0][1][4] = 0
4730 14:44:27.953985 rx_firspass[0][1][5] = 0
4731 14:44:27.954075 rx_lastpass[0][1][5] = 0
4732 14:44:27.957440 rx_firspass[0][1][6] = 0
4733 14:44:27.960730 rx_lastpass[0][1][6] = 0
4734 14:44:27.964206 rx_firspass[0][1][7] = 0
4735 14:44:27.964296 rx_lastpass[0][1][7] = 0
4736 14:44:27.967209 rx_firspass[0][1][8] = 0
4737 14:44:27.970492 rx_lastpass[0][1][8] = 0
4738 14:44:27.970582 rx_firspass[0][1][9] = 0
4739 14:44:27.973953 rx_lastpass[0][1][9] = 0
4740 14:44:27.977126 rx_firspass[0][1][10] = 0
4741 14:44:27.977245 rx_lastpass[0][1][10] = 0
4742 14:44:27.980134 rx_firspass[0][1][11] = 0
4743 14:44:27.983647 rx_lastpass[0][1][11] = 0
4744 14:44:27.987154 rx_firspass[0][1][12] = 0
4745 14:44:27.987244 rx_lastpass[0][1][12] = 0
4746 14:44:27.990024 rx_firspass[0][1][13] = 0
4747 14:44:27.993449 rx_lastpass[0][1][13] = 0
4748 14:44:27.996939 rx_firspass[0][1][14] = 0
4749 14:44:27.997029 rx_lastpass[0][1][14] = 0
4750 14:44:27.999912 rx_firspass[0][1][15] = 0
4751 14:44:28.003127 rx_lastpass[0][1][15] = 0
4752 14:44:28.003216 rx_firspass[1][0][0] = 0
4753 14:44:28.006362 rx_lastpass[1][0][0] = 0
4754 14:44:28.009924 rx_firspass[1][0][1] = 0
4755 14:44:28.010014 rx_lastpass[1][0][1] = 0
4756 14:44:28.013231 rx_firspass[1][0][2] = 0
4757 14:44:28.016309 rx_lastpass[1][0][2] = 0
4758 14:44:28.019434 rx_firspass[1][0][3] = 0
4759 14:44:28.019524 rx_lastpass[1][0][3] = 0
4760 14:44:28.022814 rx_firspass[1][0][4] = 0
4761 14:44:28.026271 rx_lastpass[1][0][4] = 0
4762 14:44:28.026367 rx_firspass[1][0][5] = 0
4763 14:44:28.029373 rx_lastpass[1][0][5] = 0
4764 14:44:28.032808 rx_firspass[1][0][6] = 0
4765 14:44:28.032903 rx_lastpass[1][0][6] = 0
4766 14:44:28.036072 rx_firspass[1][0][7] = 0
4767 14:44:28.039323 rx_lastpass[1][0][7] = 0
4768 14:44:28.042515 rx_firspass[1][0][8] = 0
4769 14:44:28.042611 rx_lastpass[1][0][8] = 0
4770 14:44:28.046069 rx_firspass[1][0][9] = 0
4771 14:44:28.049338 rx_lastpass[1][0][9] = 0
4772 14:44:28.049438 rx_firspass[1][0][10] = 0
4773 14:44:28.052139 rx_lastpass[1][0][10] = 0
4774 14:44:28.055734 rx_firspass[1][0][11] = 0
4775 14:44:28.058886 rx_lastpass[1][0][11] = 0
4776 14:44:28.058980 rx_firspass[1][0][12] = 0
4777 14:44:28.062282 rx_lastpass[1][0][12] = 0
4778 14:44:28.065301 rx_firspass[1][0][13] = 0
4779 14:44:28.065423 rx_lastpass[1][0][13] = 0
4780 14:44:28.068726 rx_firspass[1][0][14] = 0
4781 14:44:28.072219 rx_lastpass[1][0][14] = 0
4782 14:44:28.075244 rx_firspass[1][0][15] = 0
4783 14:44:28.075340 rx_lastpass[1][0][15] = 0
4784 14:44:28.078815 rx_firspass[1][1][0] = 0
4785 14:44:28.081979 rx_lastpass[1][1][0] = 0
4786 14:44:28.082074 rx_firspass[1][1][1] = 0
4787 14:44:28.085276 rx_lastpass[1][1][1] = 0
4788 14:44:28.088221 rx_firspass[1][1][2] = 0
4789 14:44:28.091822 rx_lastpass[1][1][2] = 0
4790 14:44:28.091917 rx_firspass[1][1][3] = 0
4791 14:44:28.094840 rx_lastpass[1][1][3] = 0
4792 14:44:28.098267 rx_firspass[1][1][4] = 0
4793 14:44:28.098362 rx_lastpass[1][1][4] = 0
4794 14:44:28.101443 rx_firspass[1][1][5] = 0
4795 14:44:28.104976 rx_lastpass[1][1][5] = 0
4796 14:44:28.105072 rx_firspass[1][1][6] = 0
4797 14:44:28.107973 rx_lastpass[1][1][6] = 0
4798 14:44:28.111486 rx_firspass[1][1][7] = 0
4799 14:44:28.111581 rx_lastpass[1][1][7] = 0
4800 14:44:28.114670 rx_firspass[1][1][8] = 0
4801 14:44:28.117813 rx_lastpass[1][1][8] = 0
4802 14:44:28.121136 rx_firspass[1][1][9] = 0
4803 14:44:28.121231 rx_lastpass[1][1][9] = 0
4804 14:44:28.124605 rx_firspass[1][1][10] = 0
4805 14:44:28.127601 rx_lastpass[1][1][10] = 0
4806 14:44:28.127696 rx_firspass[1][1][11] = 0
4807 14:44:28.131122 rx_lastpass[1][1][11] = 0
4808 14:44:28.134107 rx_firspass[1][1][12] = 0
4809 14:44:28.137464 rx_lastpass[1][1][12] = 0
4810 14:44:28.137559 rx_firspass[1][1][13] = 0
4811 14:44:28.140571 rx_lastpass[1][1][13] = 0
4812 14:44:28.144292 rx_firspass[1][1][14] = 0
4813 14:44:28.147178 rx_lastpass[1][1][14] = 0
4814 14:44:28.147272 rx_firspass[1][1][15] = 0
4815 14:44:28.150801 rx_lastpass[1][1][15] = 0
4816 14:44:28.154066 dump params clk_delay
4817 14:44:28.154161 clk_delay[0] = 0
4818 14:44:28.157171 clk_delay[1] = 0
4819 14:44:28.157266 dump params dqs_delay
4820 14:44:28.160340 dqs_delay[0][0] = 0
4821 14:44:28.160435 dqs_delay[0][1] = 0
4822 14:44:28.163794 dqs_delay[1][0] = 0
4823 14:44:28.163890 dqs_delay[1][1] = 0
4824 14:44:28.166977 dump params delay_cell_unit = 744
4825 14:44:28.170173 dump source = 0x0
4826 14:44:28.170268 dump params frequency:800
4827 14:44:28.173653 dump params rank number:2
4828 14:44:28.173748
4829 14:44:28.176947 dump params write leveling
4830 14:44:28.179986 write leveling[0][0][0] = 0x0
4831 14:44:28.183442 write leveling[0][0][1] = 0x0
4832 14:44:28.183537 write leveling[0][1][0] = 0x0
4833 14:44:28.186555 write leveling[0][1][1] = 0x0
4834 14:44:28.189738 write leveling[1][0][0] = 0x0
4835 14:44:28.193035 write leveling[1][0][1] = 0x0
4836 14:44:28.196462 write leveling[1][1][0] = 0x0
4837 14:44:28.199637 write leveling[1][1][1] = 0x0
4838 14:44:28.199727 dump params cbt_cs
4839 14:44:28.203121 cbt_cs[0][0] = 0x0
4840 14:44:28.203210 cbt_cs[0][1] = 0x0
4841 14:44:28.206088 cbt_cs[1][0] = 0x0
4842 14:44:28.206178 cbt_cs[1][1] = 0x0
4843 14:44:28.209494 dump params cbt_mr12
4844 14:44:28.209589 cbt_mr12[0][0] = 0x0
4845 14:44:28.212549 cbt_mr12[0][1] = 0x0
4846 14:44:28.212639 cbt_mr12[1][0] = 0x0
4847 14:44:28.216116 cbt_mr12[1][1] = 0x0
4848 14:44:28.219333 dump params tx window
4849 14:44:28.219429 tx_center_min[0][0][0] = 0
4850 14:44:28.222511 tx_center_max[0][0][0] = 0
4851 14:44:28.225955 tx_center_min[0][0][1] = 0
4852 14:44:28.229157 tx_center_max[0][0][1] = 0
4853 14:44:28.229253 tx_center_min[0][1][0] = 0
4854 14:44:28.232602 tx_center_max[0][1][0] = 0
4855 14:44:28.235578 tx_center_min[0][1][1] = 0
4856 14:44:28.238996 tx_center_max[0][1][1] = 0
4857 14:44:28.239086 tx_center_min[1][0][0] = 0
4858 14:44:28.242235 tx_center_max[1][0][0] = 0
4859 14:44:28.245357 tx_center_min[1][0][1] = 0
4860 14:44:28.248661 tx_center_max[1][0][1] = 0
4861 14:44:28.248751 tx_center_min[1][1][0] = 0
4862 14:44:28.251745 tx_center_max[1][1][0] = 0
4863 14:44:28.255585 tx_center_min[1][1][1] = 0
4864 14:44:28.258385 tx_center_max[1][1][1] = 0
4865 14:44:28.258476 dump params tx window
4866 14:44:28.261817 tx_win_center[0][0][0] = 0
4867 14:44:28.265140 tx_first_pass[0][0][0] = 0
4868 14:44:28.265231 tx_last_pass[0][0][0] = 0
4869 14:44:28.268270 tx_win_center[0][0][1] = 0
4870 14:44:28.271577 tx_first_pass[0][0][1] = 0
4871 14:44:28.274644 tx_last_pass[0][0][1] = 0
4872 14:44:28.274735 tx_win_center[0][0][2] = 0
4873 14:44:28.278125 tx_first_pass[0][0][2] = 0
4874 14:44:28.281454 tx_last_pass[0][0][2] = 0
4875 14:44:28.284772 tx_win_center[0][0][3] = 0
4876 14:44:28.284862 tx_first_pass[0][0][3] = 0
4877 14:44:28.287808 tx_last_pass[0][0][3] = 0
4878 14:44:28.291322 tx_win_center[0][0][4] = 0
4879 14:44:28.294516 tx_first_pass[0][0][4] = 0
4880 14:44:28.294606 tx_last_pass[0][0][4] = 0
4881 14:44:28.297705 tx_win_center[0][0][5] = 0
4882 14:44:28.301252 tx_first_pass[0][0][5] = 0
4883 14:44:28.304478 tx_last_pass[0][0][5] = 0
4884 14:44:28.304567 tx_win_center[0][0][6] = 0
4885 14:44:28.307560 tx_first_pass[0][0][6] = 0
4886 14:44:28.311049 tx_last_pass[0][0][6] = 0
4887 14:44:28.314057 tx_win_center[0][0][7] = 0
4888 14:44:28.314146 tx_first_pass[0][0][7] = 0
4889 14:44:28.317403 tx_last_pass[0][0][7] = 0
4890 14:44:28.320622 tx_win_center[0][0][8] = 0
4891 14:44:28.320742 tx_first_pass[0][0][8] = 0
4892 14:44:28.323791 tx_last_pass[0][0][8] = 0
4893 14:44:28.327089 tx_win_center[0][0][9] = 0
4894 14:44:28.330476 tx_first_pass[0][0][9] = 0
4895 14:44:28.330565 tx_last_pass[0][0][9] = 0
4896 14:44:28.333689 tx_win_center[0][0][10] = 0
4897 14:44:28.337229 tx_first_pass[0][0][10] = 0
4898 14:44:28.340292 tx_last_pass[0][0][10] = 0
4899 14:44:28.340382 tx_win_center[0][0][11] = 0
4900 14:44:28.343389 tx_first_pass[0][0][11] = 0
4901 14:44:28.347082 tx_last_pass[0][0][11] = 0
4902 14:44:28.350130 tx_win_center[0][0][12] = 0
4903 14:44:28.353460 tx_first_pass[0][0][12] = 0
4904 14:44:28.353550 tx_last_pass[0][0][12] = 0
4905 14:44:28.356826 tx_win_center[0][0][13] = 0
4906 14:44:28.360032 tx_first_pass[0][0][13] = 0
4907 14:44:28.363280 tx_last_pass[0][0][13] = 0
4908 14:44:28.363372 tx_win_center[0][0][14] = 0
4909 14:44:28.366438 tx_first_pass[0][0][14] = 0
4910 14:44:28.370004 tx_last_pass[0][0][14] = 0
4911 14:44:28.372996 tx_win_center[0][0][15] = 0
4912 14:44:28.373086 tx_first_pass[0][0][15] = 0
4913 14:44:28.376010 tx_last_pass[0][0][15] = 0
4914 14:44:28.379614 tx_win_center[0][1][0] = 0
4915 14:44:28.382675 tx_first_pass[0][1][0] = 0
4916 14:44:28.382771 tx_last_pass[0][1][0] = 0
4917 14:44:28.386218 tx_win_center[0][1][1] = 0
4918 14:44:28.389419 tx_first_pass[0][1][1] = 0
4919 14:44:28.392752 tx_last_pass[0][1][1] = 0
4920 14:44:28.392847 tx_win_center[0][1][2] = 0
4921 14:44:28.395852 tx_first_pass[0][1][2] = 0
4922 14:44:28.399270 tx_last_pass[0][1][2] = 0
4923 14:44:28.402305 tx_win_center[0][1][3] = 0
4924 14:44:28.402434 tx_first_pass[0][1][3] = 0
4925 14:44:28.405824 tx_last_pass[0][1][3] = 0
4926 14:44:28.409153 tx_win_center[0][1][4] = 0
4927 14:44:28.412250 tx_first_pass[0][1][4] = 0
4928 14:44:28.412345 tx_last_pass[0][1][4] = 0
4929 14:44:28.415616 tx_win_center[0][1][5] = 0
4930 14:44:28.418695 tx_first_pass[0][1][5] = 0
4931 14:44:28.418790 tx_last_pass[0][1][5] = 0
4932 14:44:28.422036 tx_win_center[0][1][6] = 0
4933 14:44:28.425169 tx_first_pass[0][1][6] = 0
4934 14:44:28.428450 tx_last_pass[0][1][6] = 0
4935 14:44:28.428546 tx_win_center[0][1][7] = 0
4936 14:44:28.431689 tx_first_pass[0][1][7] = 0
4937 14:44:28.435122 tx_last_pass[0][1][7] = 0
4938 14:44:28.438160 tx_win_center[0][1][8] = 0
4939 14:44:28.438255 tx_first_pass[0][1][8] = 0
4940 14:44:28.441476 tx_last_pass[0][1][8] = 0
4941 14:44:28.445048 tx_win_center[0][1][9] = 0
4942 14:44:28.448360 tx_first_pass[0][1][9] = 0
4943 14:44:28.448455 tx_last_pass[0][1][9] = 0
4944 14:44:28.451265 tx_win_center[0][1][10] = 0
4945 14:44:28.454810 tx_first_pass[0][1][10] = 0
4946 14:44:28.457844 tx_last_pass[0][1][10] = 0
4947 14:44:28.457939 tx_win_center[0][1][11] = 0
4948 14:44:28.461168 tx_first_pass[0][1][11] = 0
4949 14:44:28.464721 tx_last_pass[0][1][11] = 0
4950 14:44:28.467697 tx_win_center[0][1][12] = 0
4951 14:44:28.467792 tx_first_pass[0][1][12] = 0
4952 14:44:28.471073 tx_last_pass[0][1][12] = 0
4953 14:44:28.474222 tx_win_center[0][1][13] = 0
4954 14:44:28.477614 tx_first_pass[0][1][13] = 0
4955 14:44:28.477709 tx_last_pass[0][1][13] = 0
4956 14:44:28.480818 tx_win_center[0][1][14] = 0
4957 14:44:28.484239 tx_first_pass[0][1][14] = 0
4958 14:44:28.487294 tx_last_pass[0][1][14] = 0
4959 14:44:28.490670 tx_win_center[0][1][15] = 0
4960 14:44:28.490764 tx_first_pass[0][1][15] = 0
4961 14:44:28.493982 tx_last_pass[0][1][15] = 0
4962 14:44:28.497113 tx_win_center[1][0][0] = 0
4963 14:44:28.500409 tx_first_pass[1][0][0] = 0
4964 14:44:28.500501 tx_last_pass[1][0][0] = 0
4965 14:44:28.503750 tx_win_center[1][0][1] = 0
4966 14:44:28.507002 tx_first_pass[1][0][1] = 0
4967 14:44:28.507092 tx_last_pass[1][0][1] = 0
4968 14:44:28.510550 tx_win_center[1][0][2] = 0
4969 14:44:28.513356 tx_first_pass[1][0][2] = 0
4970 14:44:28.516820 tx_last_pass[1][0][2] = 0
4971 14:44:28.516911 tx_win_center[1][0][3] = 0
4972 14:44:28.519959 tx_first_pass[1][0][3] = 0
4973 14:44:28.523323 tx_last_pass[1][0][3] = 0
4974 14:44:28.526728 tx_win_center[1][0][4] = 0
4975 14:44:28.526818 tx_first_pass[1][0][4] = 0
4976 14:44:28.529868 tx_last_pass[1][0][4] = 0
4977 14:44:28.533304 tx_win_center[1][0][5] = 0
4978 14:44:28.536636 tx_first_pass[1][0][5] = 0
4979 14:44:28.536727 tx_last_pass[1][0][5] = 0
4980 14:44:28.540063 tx_win_center[1][0][6] = 0
4981 14:44:28.543081 tx_first_pass[1][0][6] = 0
4982 14:44:28.546277 tx_last_pass[1][0][6] = 0
4983 14:44:28.546367 tx_win_center[1][0][7] = 0
4984 14:44:28.549554 tx_first_pass[1][0][7] = 0
4985 14:44:28.552814 tx_last_pass[1][0][7] = 0
4986 14:44:28.552904 tx_win_center[1][0][8] = 0
4987 14:44:28.556216 tx_first_pass[1][0][8] = 0
4988 14:44:28.559225 tx_last_pass[1][0][8] = 0
4989 14:44:28.562681 tx_win_center[1][0][9] = 0
4990 14:44:28.562771 tx_first_pass[1][0][9] = 0
4991 14:44:28.566015 tx_last_pass[1][0][9] = 0
4992 14:44:28.569316 tx_win_center[1][0][10] = 0
4993 14:44:28.572712 tx_first_pass[1][0][10] = 0
4994 14:44:28.572802 tx_last_pass[1][0][10] = 0
4995 14:44:28.575734 tx_win_center[1][0][11] = 0
4996 14:44:28.579153 tx_first_pass[1][0][11] = 0
4997 14:44:28.582292 tx_last_pass[1][0][11] = 0
4998 14:44:28.585813 tx_win_center[1][0][12] = 0
4999 14:44:28.585903 tx_first_pass[1][0][12] = 0
5000 14:44:28.588766 tx_last_pass[1][0][12] = 0
5001 14:44:28.591987 tx_win_center[1][0][13] = 0
5002 14:44:28.595321 tx_first_pass[1][0][13] = 0
5003 14:44:28.595410 tx_last_pass[1][0][13] = 0
5004 14:44:28.598881 tx_win_center[1][0][14] = 0
5005 14:44:28.602155 tx_first_pass[1][0][14] = 0
5006 14:44:28.605125 tx_last_pass[1][0][14] = 0
5007 14:44:28.605214 tx_win_center[1][0][15] = 0
5008 14:44:28.608572 tx_first_pass[1][0][15] = 0
5009 14:44:28.611937 tx_last_pass[1][0][15] = 0
5010 14:44:28.615296 tx_win_center[1][1][0] = 0
5011 14:44:28.615385 tx_first_pass[1][1][0] = 0
5012 14:44:28.618361 tx_last_pass[1][1][0] = 0
5013 14:44:28.621776 tx_win_center[1][1][1] = 0
5014 14:44:28.624961 tx_first_pass[1][1][1] = 0
5015 14:44:28.625052 tx_last_pass[1][1][1] = 0
5016 14:44:28.628085 tx_win_center[1][1][2] = 0
5017 14:44:28.631596 tx_first_pass[1][1][2] = 0
5018 14:44:28.634586 tx_last_pass[1][1][2] = 0
5019 14:44:28.634676 tx_win_center[1][1][3] = 0
5020 14:44:28.638103 tx_first_pass[1][1][3] = 0
5021 14:44:28.641096 tx_last_pass[1][1][3] = 0
5022 14:44:28.641186 tx_win_center[1][1][4] = 0
5023 14:44:28.644386 tx_first_pass[1][1][4] = 0
5024 14:44:28.647778 tx_last_pass[1][1][4] = 0
5025 14:44:28.651219 tx_win_center[1][1][5] = 0
5026 14:44:28.651308 tx_first_pass[1][1][5] = 0
5027 14:44:28.654226 tx_last_pass[1][1][5] = 0
5028 14:44:28.657575 tx_win_center[1][1][6] = 0
5029 14:44:28.660894 tx_first_pass[1][1][6] = 0
5030 14:44:28.660984 tx_last_pass[1][1][6] = 0
5031 14:44:28.664416 tx_win_center[1][1][7] = 0
5032 14:44:28.667492 tx_first_pass[1][1][7] = 0
5033 14:44:28.670964 tx_last_pass[1][1][7] = 0
5034 14:44:28.671059 tx_win_center[1][1][8] = 0
5035 14:44:28.674069 tx_first_pass[1][1][8] = 0
5036 14:44:28.677202 tx_last_pass[1][1][8] = 0
5037 14:44:28.680455 tx_win_center[1][1][9] = 0
5038 14:44:28.680545 tx_first_pass[1][1][9] = 0
5039 14:44:28.684110 tx_last_pass[1][1][9] = 0
5040 14:44:28.687072 tx_win_center[1][1][10] = 0
5041 14:44:28.690358 tx_first_pass[1][1][10] = 0
5042 14:44:28.690487 tx_last_pass[1][1][10] = 0
5043 14:44:28.693409 tx_win_center[1][1][11] = 0
5044 14:44:28.696916 tx_first_pass[1][1][11] = 0
5045 14:44:28.700134 tx_last_pass[1][1][11] = 0
5046 14:44:28.700224 tx_win_center[1][1][12] = 0
5047 14:44:28.703448 tx_first_pass[1][1][12] = 0
5048 14:44:28.706906 tx_last_pass[1][1][12] = 0
5049 14:44:28.710090 tx_win_center[1][1][13] = 0
5050 14:44:28.710180 tx_first_pass[1][1][13] = 0
5051 14:44:28.713139 tx_last_pass[1][1][13] = 0
5052 14:44:28.716655 tx_win_center[1][1][14] = 0
5053 14:44:28.719739 tx_first_pass[1][1][14] = 0
5054 14:44:28.719828 tx_last_pass[1][1][14] = 0
5055 14:44:28.723156 tx_win_center[1][1][15] = 0
5056 14:44:28.726264 tx_first_pass[1][1][15] = 0
5057 14:44:28.729423 tx_last_pass[1][1][15] = 0
5058 14:44:28.729524 dump params rx window
5059 14:44:28.732943 rx_firspass[0][0][0] = 0
5060 14:44:28.736198 rx_lastpass[0][0][0] = 0
5061 14:44:28.736288 rx_firspass[0][0][1] = 0
5062 14:44:28.739618 rx_lastpass[0][0][1] = 0
5063 14:44:28.742745 rx_firspass[0][0][2] = 0
5064 14:44:28.746042 rx_lastpass[0][0][2] = 0
5065 14:44:28.746132 rx_firspass[0][0][3] = 0
5066 14:44:28.749318 rx_lastpass[0][0][3] = 0
5067 14:44:28.752605 rx_firspass[0][0][4] = 0
5068 14:44:28.752695 rx_lastpass[0][0][4] = 0
5069 14:44:28.755956 rx_firspass[0][0][5] = 0
5070 14:44:28.758938 rx_lastpass[0][0][5] = 0
5071 14:44:28.759027 rx_firspass[0][0][6] = 0
5072 14:44:28.762206 rx_lastpass[0][0][6] = 0
5073 14:44:28.765684 rx_firspass[0][0][7] = 0
5074 14:44:28.768919 rx_lastpass[0][0][7] = 0
5075 14:44:28.769014 rx_firspass[0][0][8] = 0
5076 14:44:28.772054 rx_lastpass[0][0][8] = 0
5077 14:44:28.775488 rx_firspass[0][0][9] = 0
5078 14:44:28.775577 rx_lastpass[0][0][9] = 0
5079 14:44:28.778776 rx_firspass[0][0][10] = 0
5080 14:44:28.781962 rx_lastpass[0][0][10] = 0
5081 14:44:28.782051 rx_firspass[0][0][11] = 0
5082 14:44:28.785323 rx_lastpass[0][0][11] = 0
5083 14:44:28.788431 rx_firspass[0][0][12] = 0
5084 14:44:28.791847 rx_lastpass[0][0][12] = 0
5085 14:44:28.791937 rx_firspass[0][0][13] = 0
5086 14:44:28.795360 rx_lastpass[0][0][13] = 0
5087 14:44:28.798327 rx_firspass[0][0][14] = 0
5088 14:44:28.801643 rx_lastpass[0][0][14] = 0
5089 14:44:28.801733 rx_firspass[0][0][15] = 0
5090 14:44:28.805052 rx_lastpass[0][0][15] = 0
5091 14:44:28.808085 rx_firspass[0][1][0] = 0
5092 14:44:28.808176 rx_lastpass[0][1][0] = 0
5093 14:44:28.811579 rx_firspass[0][1][1] = 0
5094 14:44:28.814771 rx_lastpass[0][1][1] = 0
5095 14:44:28.814861 rx_firspass[0][1][2] = 0
5096 14:44:28.818293 rx_lastpass[0][1][2] = 0
5097 14:44:28.821132 rx_firspass[0][1][3] = 0
5098 14:44:28.824614 rx_lastpass[0][1][3] = 0
5099 14:44:28.824705 rx_firspass[0][1][4] = 0
5100 14:44:28.828079 rx_lastpass[0][1][4] = 0
5101 14:44:28.831009 rx_firspass[0][1][5] = 0
5102 14:44:28.831099 rx_lastpass[0][1][5] = 0
5103 14:44:28.834425 rx_firspass[0][1][6] = 0
5104 14:44:28.837662 rx_lastpass[0][1][6] = 0
5105 14:44:28.837752 rx_firspass[0][1][7] = 0
5106 14:44:28.840875 rx_lastpass[0][1][7] = 0
5107 14:44:28.844331 rx_firspass[0][1][8] = 0
5108 14:44:28.847424 rx_lastpass[0][1][8] = 0
5109 14:44:28.847514 rx_firspass[0][1][9] = 0
5110 14:44:28.850927 rx_lastpass[0][1][9] = 0
5111 14:44:28.854214 rx_firspass[0][1][10] = 0
5112 14:44:28.854304 rx_lastpass[0][1][10] = 0
5113 14:44:28.857334 rx_firspass[0][1][11] = 0
5114 14:44:28.860850 rx_lastpass[0][1][11] = 0
5115 14:44:28.863977 rx_firspass[0][1][12] = 0
5116 14:44:28.864066 rx_lastpass[0][1][12] = 0
5117 14:44:28.867072 rx_firspass[0][1][13] = 0
5118 14:44:28.870483 rx_lastpass[0][1][13] = 0
5119 14:44:28.870573 rx_firspass[0][1][14] = 0
5120 14:44:28.873903 rx_lastpass[0][1][14] = 0
5121 14:44:28.876958 rx_firspass[0][1][15] = 0
5122 14:44:28.880108 rx_lastpass[0][1][15] = 0
5123 14:44:28.880197 rx_firspass[1][0][0] = 0
5124 14:44:28.883478 rx_lastpass[1][0][0] = 0
5125 14:44:28.886553 rx_firspass[1][0][1] = 0
5126 14:44:28.886643 rx_lastpass[1][0][1] = 0
5127 14:44:28.889797 rx_firspass[1][0][2] = 0
5128 14:44:28.893382 rx_lastpass[1][0][2] = 0
5129 14:44:28.896710 rx_firspass[1][0][3] = 0
5130 14:44:28.896800 rx_lastpass[1][0][3] = 0
5131 14:44:28.899772 rx_firspass[1][0][4] = 0
5132 14:44:28.902953 rx_lastpass[1][0][4] = 0
5133 14:44:28.903043 rx_firspass[1][0][5] = 0
5134 14:44:28.906490 rx_lastpass[1][0][5] = 0
5135 14:44:28.909796 rx_firspass[1][0][6] = 0
5136 14:44:28.909886 rx_lastpass[1][0][6] = 0
5137 14:44:28.912961 rx_firspass[1][0][7] = 0
5138 14:44:28.916124 rx_lastpass[1][0][7] = 0
5139 14:44:28.916214 rx_firspass[1][0][8] = 0
5140 14:44:28.919425 rx_lastpass[1][0][8] = 0
5141 14:44:28.922610 rx_firspass[1][0][9] = 0
5142 14:44:28.925906 rx_lastpass[1][0][9] = 0
5143 14:44:28.925996 rx_firspass[1][0][10] = 0
5144 14:44:28.929313 rx_lastpass[1][0][10] = 0
5145 14:44:28.932495 rx_firspass[1][0][11] = 0
5146 14:44:28.935823 rx_lastpass[1][0][11] = 0
5147 14:44:28.935913 rx_firspass[1][0][12] = 0
5148 14:44:28.938842 rx_lastpass[1][0][12] = 0
5149 14:44:28.942307 rx_firspass[1][0][13] = 0
5150 14:44:28.942398 rx_lastpass[1][0][13] = 0
5151 14:44:28.945567 rx_firspass[1][0][14] = 0
5152 14:44:28.948943 rx_lastpass[1][0][14] = 0
5153 14:44:28.952130 rx_firspass[1][0][15] = 0
5154 14:44:28.952225 rx_lastpass[1][0][15] = 0
5155 14:44:28.955584 rx_firspass[1][1][0] = 0
5156 14:44:28.958752 rx_lastpass[1][1][0] = 0
5157 14:44:28.958847 rx_firspass[1][1][1] = 0
5158 14:44:28.962154 rx_lastpass[1][1][1] = 0
5159 14:44:28.965345 rx_firspass[1][1][2] = 0
5160 14:44:28.965446 rx_lastpass[1][1][2] = 0
5161 14:44:28.968342 rx_firspass[1][1][3] = 0
5162 14:44:28.971713 rx_lastpass[1][1][3] = 0
5163 14:44:28.975111 rx_firspass[1][1][4] = 0
5164 14:44:28.975206 rx_lastpass[1][1][4] = 0
5165 14:44:28.978519 rx_firspass[1][1][5] = 0
5166 14:44:28.981714 rx_lastpass[1][1][5] = 0
5167 14:44:28.981809 rx_firspass[1][1][6] = 0
5168 14:44:28.984863 rx_lastpass[1][1][6] = 0
5169 14:44:28.988059 rx_firspass[1][1][7] = 0
5170 14:44:28.988153 rx_lastpass[1][1][7] = 0
5171 14:44:28.991329 rx_firspass[1][1][8] = 0
5172 14:44:28.994833 rx_lastpass[1][1][8] = 0
5173 14:44:28.997909 rx_firspass[1][1][9] = 0
5174 14:44:28.998003 rx_lastpass[1][1][9] = 0
5175 14:44:29.001336 rx_firspass[1][1][10] = 0
5176 14:44:29.004552 rx_lastpass[1][1][10] = 0
5177 14:44:29.004647 rx_firspass[1][1][11] = 0
5178 14:44:29.007879 rx_lastpass[1][1][11] = 0
5179 14:44:29.011033 rx_firspass[1][1][12] = 0
5180 14:44:29.014417 rx_lastpass[1][1][12] = 0
5181 14:44:29.014512 rx_firspass[1][1][13] = 0
5182 14:44:29.017472 rx_lastpass[1][1][13] = 0
5183 14:44:29.021124 rx_firspass[1][1][14] = 0
5184 14:44:29.021223 rx_lastpass[1][1][14] = 0
5185 14:44:29.023884 rx_firspass[1][1][15] = 0
5186 14:44:29.027314 rx_lastpass[1][1][15] = 0
5187 14:44:29.030681 dump params clk_delay
5188 14:44:29.030780 clk_delay[0] = 0
5189 14:44:29.030876 clk_delay[1] = 0
5190 14:44:29.034125 dump params dqs_delay
5191 14:44:29.037152 dqs_delay[0][0] = 0
5192 14:44:29.037247 dqs_delay[0][1] = 0
5193 14:44:29.040484 dqs_delay[1][0] = 0
5194 14:44:29.040578 dqs_delay[1][1] = 0
5195 14:44:29.043661 dump params delay_cell_unit = 744
5196 14:44:29.047149 mt_set_emi_preloader end
5197 14:44:29.050529 [mt_mem_init] dram size: 0x100000000, rank number: 2
5198 14:44:29.056727 [complex_mem_test] start addr:0x40000000, len:20480
5199 14:44:29.092751 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5200 14:44:29.099073 [complex_mem_test] start addr:0x80000000, len:20480
5201 14:44:29.135171 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5202 14:44:29.141450 [complex_mem_test] start addr:0xc0000000, len:20480
5203 14:44:29.177222 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5204 14:44:29.183590 [complex_mem_test] start addr:0x56000000, len:8192
5205 14:44:29.200446 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5206 14:44:29.203934 ddr_geometry:1
5207 14:44:29.207145 [complex_mem_test] start addr:0x80000000, len:8192
5208 14:44:29.224405 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5209 14:44:29.227489 dram_init: dram init end (result: 0)
5210 14:44:29.234211 Successfully loaded DRAM blobs and ran DRAM calibration
5211 14:44:29.243747 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5212 14:44:29.243839 CBMEM:
5213 14:44:29.247260 IMD: root @ 00000000fffff000 254 entries.
5214 14:44:29.250331 IMD: root @ 00000000ffffec00 62 entries.
5215 14:44:29.257203 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5216 14:44:29.263636 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5217 14:44:29.266695 in-header: 03 a1 00 00 08 00 00 00
5218 14:44:29.270244 in-data: 84 60 60 10 00 00 00 00
5219 14:44:29.273416 Chrome EC: clear events_b mask to 0x0000000020004000
5220 14:44:29.279942 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5221 14:44:29.283468 in-header: 03 fd 00 00 00 00 00 00
5222 14:44:29.287001 in-data:
5223 14:44:29.290197 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5224 14:44:29.293418 CBFS @ 21000 size 3d4000
5225 14:44:29.296617 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5226 14:44:29.299960 CBFS: Locating 'fallback/ramstage'
5227 14:44:29.303255 CBFS: Found @ offset 10d40 size d563
5228 14:44:29.325906 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5229 14:44:29.338330 Accumulated console time in romstage 13566 ms
5230 14:44:29.338427
5231 14:44:29.338500
5232 14:44:29.348204 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5233 14:44:29.351350 ARM64: Exception handlers installed.
5234 14:44:29.351444 ARM64: Testing exception
5235 14:44:29.354833 ARM64: Done test exception
5236 14:44:29.358007 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5237 14:44:29.360982 Manufacturer: ef
5238 14:44:29.367808 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5239 14:44:29.371032 WARNING: RO_VPD is uninitialized or empty.
5240 14:44:29.374453 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5241 14:44:29.377511 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5242 14:44:29.388029 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5243 14:44:29.391063 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5244 14:44:29.397707 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5245 14:44:29.397804 Enumerating buses...
5246 14:44:29.404362 Show all devs... Before device enumeration.
5247 14:44:29.404458 Root Device: enabled 1
5248 14:44:29.407411 CPU_CLUSTER: 0: enabled 1
5249 14:44:29.410739 CPU: 00: enabled 1
5250 14:44:29.410834 Compare with tree...
5251 14:44:29.414091 Root Device: enabled 1
5252 14:44:29.414187 CPU_CLUSTER: 0: enabled 1
5253 14:44:29.417270 CPU: 00: enabled 1
5254 14:44:29.420515 Root Device scanning...
5255 14:44:29.423948 root_dev_scan_bus for Root Device
5256 14:44:29.424043 CPU_CLUSTER: 0 enabled
5257 14:44:29.426974 root_dev_scan_bus for Root Device done
5258 14:44:29.433581 scan_bus: scanning of bus Root Device took 10689 usecs
5259 14:44:29.433676 done
5260 14:44:29.437127 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5261 14:44:29.440232 Allocating resources...
5262 14:44:29.443573 Reading resources...
5263 14:44:29.446615 Root Device read_resources bus 0 link: 0
5264 14:44:29.449987 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5265 14:44:29.453467 CPU: 00 missing read_resources
5266 14:44:29.456735 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5267 14:44:29.460005 Root Device read_resources bus 0 link: 0 done
5268 14:44:29.463071 Done reading resources.
5269 14:44:29.469564 Show resources in subtree (Root Device)...After reading.
5270 14:44:29.472941 Root Device child on link 0 CPU_CLUSTER: 0
5271 14:44:29.476157 CPU_CLUSTER: 0 child on link 0 CPU: 00
5272 14:44:29.483124 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5273 14:44:29.485944 CPU: 00
5274 14:44:29.486039 Setting resources...
5275 14:44:29.492779 Root Device assign_resources, bus 0 link: 0
5276 14:44:29.495933 CPU_CLUSTER: 0 missing set_resources
5277 14:44:29.499191 Root Device assign_resources, bus 0 link: 0
5278 14:44:29.499286 Done setting resources.
5279 14:44:29.505481 Show resources in subtree (Root Device)...After assigning values.
5280 14:44:29.508788 Root Device child on link 0 CPU_CLUSTER: 0
5281 14:44:29.512512 CPU_CLUSTER: 0 child on link 0 CPU: 00
5282 14:44:29.522146 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5283 14:44:29.522243 CPU: 00
5284 14:44:29.525257 Done allocating resources.
5285 14:44:29.531679 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5286 14:44:29.531775 Enabling resources...
5287 14:44:29.531872 done.
5288 14:44:29.538442 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5289 14:44:29.538539 Initializing devices...
5290 14:44:29.541735 Root Device init ...
5291 14:44:29.545104 mainboard_init: Starting display init.
5292 14:44:29.547995 ADC[4]: Raw value=76192 ID=0
5293 14:44:29.570459 anx7625_power_on_init: Init interface.
5294 14:44:29.574011 anx7625_disable_pd_protocol: Disabled PD feature.
5295 14:44:29.580166 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5296 14:44:29.637542 anx7625_start_dp_work: Secure OCM version=00
5297 14:44:29.640669 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5298 14:44:29.658267 sp_tx_get_edid_block: EDID Block = 1
5299 14:44:29.775345 Extracted contents:
5300 14:44:29.778851 header: 00 ff ff ff ff ff ff 00
5301 14:44:29.781689 serial number: 06 af 5c 14 00 00 00 00 00 1a
5302 14:44:29.785219 version: 01 04
5303 14:44:29.788680 basic params: 95 1a 0e 78 02
5304 14:44:29.791605 chroma info: 99 85 95 55 56 92 28 22 50 54
5305 14:44:29.795081 established: 00 00 00
5306 14:44:29.801414 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5307 14:44:29.807964 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5308 14:44:29.814610 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5309 14:44:29.817908 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5310 14:44:29.824206 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5311 14:44:29.827774 extensions: 00
5312 14:44:29.827870 checksum: ae
5313 14:44:29.827966
5314 14:44:29.834206 Manufacturer: AUO Model 145c Serial Number 0
5315 14:44:29.834302 Made week 0 of 2016
5316 14:44:29.837599 EDID version: 1.4
5317 14:44:29.837694 Digital display
5318 14:44:29.840983 6 bits per primary color channel
5319 14:44:29.844070 DisplayPort interface
5320 14:44:29.847136 Maximum image size: 26 cm x 14 cm
5321 14:44:29.847232 Gamma: 220%
5322 14:44:29.847328 Check DPMS levels
5323 14:44:29.850577 Supported color formats: RGB 4:4:4
5324 14:44:29.857276 First detailed timing is preferred timing
5325 14:44:29.857373 Established timings supported:
5326 14:44:29.860213 Standard timings supported:
5327 14:44:29.863563 Detailed timings
5328 14:44:29.866968 Hex of detail: ce1d56ea50001a3030204600009010000018
5329 14:44:29.870324 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5330 14:44:29.876590 0556 0586 05a6 0640 hborder 0
5331 14:44:29.880206 0300 0304 030a 031a vborder 0
5332 14:44:29.883484 -hsync -vsync
5333 14:44:29.883578 Did detailed timing
5334 14:44:29.889984 Hex of detail: 0000000f0000000000000000000000000020
5335 14:44:29.893119 Manufacturer-specified data, tag 15
5336 14:44:29.896609 Hex of detail: 000000fe0041554f0a202020202020202020
5337 14:44:29.899784 ASCII string: AUO
5338 14:44:29.902821 Hex of detail: 000000fe004231313658414230312e34200a
5339 14:44:29.906326 ASCII string: B116XAB01.4
5340 14:44:29.906422 Checksum
5341 14:44:29.909577 Checksum: 0xae (valid)
5342 14:44:29.912783 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5343 14:44:29.916157 DSI data_rate: 457800000 bps
5344 14:44:29.922718 anx7625_parse_edid: set default k value to 0x3d for panel
5345 14:44:29.926118 anx7625_parse_edid: pixelclock(76300).
5346 14:44:29.929034 hactive(1366), hsync(32), hfp(48), hbp(154)
5347 14:44:29.932424 vactive(768), vsync(6), vfp(4), vbp(16)
5348 14:44:29.935610 anx7625_dsi_config: config dsi.
5349 14:44:29.943853 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5350 14:44:29.964390 anx7625_dsi_config: success to config DSI
5351 14:44:29.967784 anx7625_dp_start: MIPI phy setup OK.
5352 14:44:29.971062 [SSUSB] Setting up USB HOST controller...
5353 14:44:29.974169 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5354 14:44:29.977684 [SSUSB] phy power-on done.
5355 14:44:29.981054 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5356 14:44:29.984246 in-header: 03 fc 01 00 00 00 00 00
5357 14:44:29.984333 in-data:
5358 14:44:29.990920 handle_proto3_response: EC response with error code: 1
5359 14:44:29.991005 SPM: pcm index = 1
5360 14:44:29.997545 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5361 14:44:29.997632 CBFS @ 21000 size 3d4000
5362 14:44:30.004152 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5363 14:44:30.007416 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5364 14:44:30.010681 CBFS: Found @ offset 1e7c0 size 1026
5365 14:44:30.017399 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5366 14:44:30.020485 SPM: binary array size = 2988
5367 14:44:30.023722 SPM: version = pcm_allinone_v1.17.2_20180829
5368 14:44:30.027034 SPM binary loaded in 32 msecs
5369 14:44:30.035570 spm_kick_im_to_fetch: ptr = 000000004021eec2
5370 14:44:30.039104 spm_kick_im_to_fetch: len = 2988
5371 14:44:30.039187 SPM: spm_kick_pcm_to_run
5372 14:44:30.042062 SPM: spm_kick_pcm_to_run done
5373 14:44:30.045593 SPM: spm_init done in 52 msecs
5374 14:44:30.048765 Root Device init finished in 505266 usecs
5375 14:44:30.052209 CPU_CLUSTER: 0 init ...
5376 14:44:30.061978 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5377 14:44:30.064969 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5378 14:44:30.068325 CBFS @ 21000 size 3d4000
5379 14:44:30.071695 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5380 14:44:30.075140 CBFS: Locating 'sspm.bin'
5381 14:44:30.078049 CBFS: Found @ offset 208c0 size 41cb
5382 14:44:30.088818 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5383 14:44:30.096938 CPU_CLUSTER: 0 init finished in 42801 usecs
5384 14:44:30.097022 Devices initialized
5385 14:44:30.100250 Show all devs... After init.
5386 14:44:30.103483 Root Device: enabled 1
5387 14:44:30.103594 CPU_CLUSTER: 0: enabled 1
5388 14:44:30.106556 CPU: 00: enabled 1
5389 14:44:30.109963 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5390 14:44:30.116485 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5391 14:44:30.119593 ELOG: NV offset 0x558000 size 0x1000
5392 14:44:30.123079 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5393 14:44:30.129409 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5394 14:44:30.136051 ELOG: Event(17) added with size 13 at 2024-06-04 14:44:29 UTC
5395 14:44:30.139273 out: cmd=0x121: 03 db 21 01 00 00 00 00
5396 14:44:30.142702 in-header: 03 aa 00 00 2c 00 00 00
5397 14:44:30.155637 in-data: 19 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 eb e0 07 00 06 80 00 00 13 ec 08 00 06 80 00 00 50 aa 03 00 06 80 00 00 e3 d9 07 00
5398 14:44:30.159082 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5399 14:44:30.162099 in-header: 03 19 00 00 08 00 00 00
5400 14:44:30.165584 in-data: a2 e0 47 00 13 00 00 00
5401 14:44:30.168604 Chrome EC: UHEPI supported
5402 14:44:30.175299 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5403 14:44:30.178583 in-header: 03 e1 00 00 08 00 00 00
5404 14:44:30.181580 in-data: 84 20 60 10 00 00 00 00
5405 14:44:30.185161 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5406 14:44:30.191443 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5407 14:44:30.194651 in-header: 03 e1 00 00 08 00 00 00
5408 14:44:30.198147 in-data: 84 20 60 10 00 00 00 00
5409 14:44:30.204646 ELOG: Event(A1) added with size 10 at 2024-06-04 14:44:30 UTC
5410 14:44:30.211085 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5411 14:44:30.214466 ELOG: Event(A0) added with size 9 at 2024-06-04 14:44:30 UTC
5412 14:44:30.220885 elog_add_boot_reason: Logged dev mode boot
5413 14:44:30.220981 Finalize devices...
5414 14:44:30.224162 Devices finalized
5415 14:44:30.227301 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5416 14:44:30.233647 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5417 14:44:30.237079 ELOG: Event(91) added with size 10 at 2024-06-04 14:44:30 UTC
5418 14:44:30.240540 Writing coreboot table at 0xffeda000
5419 14:44:30.247232 0. 0000000000114000-000000000011efff: RAMSTAGE
5420 14:44:30.250336 1. 0000000040000000-000000004023cfff: RAMSTAGE
5421 14:44:30.253355 2. 000000004023d000-00000000545fffff: RAM
5422 14:44:30.257089 3. 0000000054600000-000000005465ffff: BL31
5423 14:44:30.260012 4. 0000000054660000-00000000ffed9fff: RAM
5424 14:44:30.266466 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5425 14:44:30.269848 6. 0000000100000000-000000013fffffff: RAM
5426 14:44:30.273102 Passing 5 GPIOs to payload:
5427 14:44:30.276226 NAME | PORT | POLARITY | VALUE
5428 14:44:30.282836 write protect | 0x00000096 | low | high
5429 14:44:30.286109 EC in RW | 0x000000b1 | high | undefined
5430 14:44:30.292964 EC interrupt | 0x00000097 | low | undefined
5431 14:44:30.295984 TPM interrupt | 0x00000099 | high | undefined
5432 14:44:30.299539 speaker enable | 0x000000af | high | undefined
5433 14:44:30.302616 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5434 14:44:30.305994 in-header: 03 f7 00 00 02 00 00 00
5435 14:44:30.309260 in-data: 04 00
5436 14:44:30.309351 Board ID: 4
5437 14:44:30.312660 ADC[3]: Raw value=215404 ID=1
5438 14:44:30.312752 RAM code: 1
5439 14:44:30.315986 SKU ID: 16
5440 14:44:30.318866 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5441 14:44:30.322357 CBFS @ 21000 size 3d4000
5442 14:44:30.325373 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5443 14:44:30.331972 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 593d
5444 14:44:30.335543 coreboot table: 940 bytes.
5445 14:44:30.338660 IMD ROOT 0. 00000000fffff000 00001000
5446 14:44:30.342014 IMD SMALL 1. 00000000ffffe000 00001000
5447 14:44:30.345232 CONSOLE 2. 00000000fffde000 00020000
5448 14:44:30.348456 FMAP 3. 00000000fffdd000 0000047c
5449 14:44:30.351960 TIME STAMP 4. 00000000fffdc000 00000910
5450 14:44:30.358433 RAMOOPS 5. 00000000ffedc000 00100000
5451 14:44:30.361873 COREBOOT 6. 00000000ffeda000 00002000
5452 14:44:30.361965 IMD small region:
5453 14:44:30.364945 IMD ROOT 0. 00000000ffffec00 00000400
5454 14:44:30.371273 VBOOT WORK 1. 00000000ffffeb00 00000100
5455 14:44:30.374746 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5456 14:44:30.378138 VPD 3. 00000000ffffea60 0000006c
5457 14:44:30.381484 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5458 14:44:30.387850 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5459 14:44:30.391200 in-header: 03 e1 00 00 08 00 00 00
5460 14:44:30.394356 in-data: 84 20 60 10 00 00 00 00
5461 14:44:30.400963 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5462 14:44:30.401082 CBFS @ 21000 size 3d4000
5463 14:44:30.407472 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5464 14:44:30.410897 CBFS: Locating 'fallback/payload'
5465 14:44:30.418167 CBFS: Found @ offset dc040 size 439a0
5466 14:44:30.506425 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5467 14:44:30.509474 Checking segment from ROM address 0x0000000040003a00
5468 14:44:30.516182 Checking segment from ROM address 0x0000000040003a1c
5469 14:44:30.519684 Loading segment from ROM address 0x0000000040003a00
5470 14:44:30.522983 code (compression=0)
5471 14:44:30.532350 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5472 14:44:30.539231 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5473 14:44:30.542195 it's not compressed!
5474 14:44:30.545583 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5475 14:44:30.552220 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5476 14:44:30.560591 Loading segment from ROM address 0x0000000040003a1c
5477 14:44:30.564061 Entry Point 0x0000000080000000
5478 14:44:30.564160 Loaded segments
5479 14:44:30.570443 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5480 14:44:30.573853 Jumping to boot code at 0000000080000000(00000000ffeda000)
5481 14:44:30.583541 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5482 14:44:30.590216 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5483 14:44:30.590314 CBFS @ 21000 size 3d4000
5484 14:44:30.596677 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5485 14:44:30.600068 CBFS: Locating 'fallback/bl31'
5486 14:44:30.602969 CBFS: Found @ offset 36dc0 size 5820
5487 14:44:30.614725 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5488 14:44:30.617571 Checking segment from ROM address 0x0000000040003a00
5489 14:44:30.624548 Checking segment from ROM address 0x0000000040003a1c
5490 14:44:30.627871 Loading segment from ROM address 0x0000000040003a00
5491 14:44:30.630685 code (compression=1)
5492 14:44:30.640637 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5493 14:44:30.647223 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5494 14:44:30.647320 using LZMA
5495 14:44:30.656249 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5496 14:44:30.663004 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5497 14:44:30.666252 Loading segment from ROM address 0x0000000040003a1c
5498 14:44:30.669450 Entry Point 0x0000000054601000
5499 14:44:30.669547 Loaded segments
5500 14:44:30.672773 NOTICE: MT8183 bl31_setup
5501 14:44:30.679963 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5502 14:44:30.683439 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5503 14:44:30.686507 INFO: [DEVAPC] dump DEVAPC registers:
5504 14:44:30.696561 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5505 14:44:30.703027 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5506 14:44:30.712732 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5507 14:44:30.719428 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5508 14:44:30.729297 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5509 14:44:30.735795 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5510 14:44:30.745367 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5511 14:44:30.752200 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5512 14:44:30.761996 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5513 14:44:30.768478 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5514 14:44:30.778308 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5515 14:44:30.785115 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5516 14:44:30.794796 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5517 14:44:30.801333 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5518 14:44:30.807797 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5519 14:44:30.817807 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5520 14:44:30.824373 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5521 14:44:30.830779 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5522 14:44:30.837207 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5523 14:44:30.846862 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5524 14:44:30.853409 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5525 14:44:30.859997 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5526 14:44:30.863530 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5527 14:44:30.866640 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5528 14:44:30.869960 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5529 14:44:30.873309 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5530 14:44:30.876516 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5531 14:44:30.883164 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5532 14:44:30.886345 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5533 14:44:30.889529 WARNING: region 0:
5534 14:44:30.893132 WARNING: apc:0x168, sa:0x0, ea:0xfff
5535 14:44:30.896077 WARNING: region 1:
5536 14:44:30.899474 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5537 14:44:30.899583 WARNING: region 2:
5538 14:44:30.902698 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5539 14:44:30.906059 WARNING: region 3:
5540 14:44:30.909356 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5541 14:44:30.912612 WARNING: region 4:
5542 14:44:30.915893 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5543 14:44:30.916013 WARNING: region 5:
5544 14:44:30.919524 WARNING: apc:0x0, sa:0x0, ea:0x0
5545 14:44:30.922395 WARNING: region 6:
5546 14:44:30.925866 WARNING: apc:0x0, sa:0x0, ea:0x0
5547 14:44:30.925984 WARNING: region 7:
5548 14:44:30.929043 WARNING: apc:0x0, sa:0x0, ea:0x0
5549 14:44:30.935608 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5550 14:44:30.938964 INFO: SPM: enable SPMC mode
5551 14:44:30.942096 NOTICE: spm_boot_init() start
5552 14:44:30.945278 NOTICE: spm_boot_init() end
5553 14:44:30.948787 INFO: BL31: Initializing runtime services
5554 14:44:30.955203 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5555 14:44:30.958677 INFO: BL31: Preparing for EL3 exit to normal world
5556 14:44:30.961626 INFO: Entry point address = 0x80000000
5557 14:44:30.964845 INFO: SPSR = 0x8
5558 14:44:30.986666
5559 14:44:30.986781
5560 14:44:30.986890
5561 14:44:30.987488 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5562 14:44:30.987636 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5563 14:44:30.987760 Setting prompt string to ['jacuzzi:']
5564 14:44:30.987894 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5565 14:44:30.989792 Starting depthcharge on Juniper...
5566 14:44:30.989884
5567 14:44:30.993308 vboot_handoff: creating legacy vboot_handoff structure
5568 14:44:30.993415
5569 14:44:30.996348 ec_init(0): CrosEC protocol v3 supported (544, 544)
5570 14:44:30.999869
5571 14:44:30.999975 Wipe memory regions:
5572 14:44:31.000076
5573 14:44:31.003018 [0x00000040000000, 0x00000054600000)
5574 14:44:31.046072
5575 14:44:31.046184 [0x00000054660000, 0x00000080000000)
5576 14:44:31.137610
5577 14:44:31.137730 [0x000000811994a0, 0x000000ffeda000)
5578 14:44:31.396713
5579 14:44:31.396852 [0x00000100000000, 0x00000140000000)
5580 14:44:31.529558
5581 14:44:31.532694 Initializing XHCI USB controller at 0x11200000.
5582 14:44:31.555779
5583 14:44:31.559117 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5584 14:44:31.559233
5585 14:44:31.559333
5586 14:44:31.559678 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5588 14:44:31.660085 jacuzzi: tftpboot 192.168.201.1 14166984/tftp-deploy-su0wm_kf/kernel/image.itb 14166984/tftp-deploy-su0wm_kf/kernel/cmdline
5589 14:44:31.660262 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5590 14:44:31.660393 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5591 14:44:31.664571 tftpboot 192.168.201.1 14166984/tftp-deploy-su0wm_kf/kernel/image.itp-deploy-su0wm_kf/kernel/cmdline
5592 14:44:31.664699
5593 14:44:31.664802 Waiting for link
5594 14:44:32.069795
5595 14:44:32.069944 R8152: Initializing
5596 14:44:32.070018
5597 14:44:32.072968 Version 9 (ocp_data = 6010)
5598 14:44:32.073059
5599 14:44:32.076187 R8152: Done initializing
5600 14:44:32.076279
5601 14:44:32.076352 Adding net device
5602 14:44:32.462120
5603 14:44:32.462266 done.
5604 14:44:32.462340
5605 14:44:32.462409 MAC: 00:e0:4c:78:85:cb
5606 14:44:32.462475
5607 14:44:32.465391 Sending DHCP discover... done.
5608 14:44:32.465503
5609 14:44:32.468317 Waiting for reply... done.
5610 14:44:32.468409
5611 14:44:32.471997 Sending DHCP request... done.
5612 14:44:32.472094
5613 14:44:32.476959 Waiting for reply... done.
5614 14:44:32.477054
5615 14:44:32.477150 My ip is 192.168.201.22
5616 14:44:32.477240
5617 14:44:32.480075 The DHCP server ip is 192.168.201.1
5618 14:44:32.480171
5619 14:44:32.486578 TFTP server IP predefined by user: 192.168.201.1
5620 14:44:32.486674
5621 14:44:32.493384 Bootfile predefined by user: 14166984/tftp-deploy-su0wm_kf/kernel/image.itb
5622 14:44:32.493500
5623 14:44:32.496394 Sending tftp read request... done.
5624 14:44:32.496491
5625 14:44:32.500008 Waiting for the transfer...
5626 14:44:32.500103
5627 14:44:32.763644 00000000 ################################################################
5628 14:44:32.763799
5629 14:44:33.024328 00080000 ################################################################
5630 14:44:33.024494
5631 14:44:33.278179 00100000 ################################################################
5632 14:44:33.278327
5633 14:44:33.529342 00180000 ################################################################
5634 14:44:33.529517
5635 14:44:33.785338 00200000 ################################################################
5636 14:44:33.785523
5637 14:44:34.036211 00280000 ################################################################
5638 14:44:34.036366
5639 14:44:34.285327 00300000 ################################################################
5640 14:44:34.285518
5641 14:44:34.537199 00380000 ################################################################
5642 14:44:34.537357
5643 14:44:34.793893 00400000 ################################################################
5644 14:44:34.794056
5645 14:44:35.054134 00480000 ################################################################
5646 14:44:35.054298
5647 14:44:35.319772 00500000 ################################################################
5648 14:44:35.319930
5649 14:44:35.593794 00580000 ################################################################
5650 14:44:35.593944
5651 14:44:35.860937 00600000 ################################################################
5652 14:44:35.861084
5653 14:44:36.124005 00680000 ################################################################
5654 14:44:36.124152
5655 14:44:36.385350 00700000 ################################################################
5656 14:44:36.385508
5657 14:44:36.644575 00780000 ################################################################
5658 14:44:36.644724
5659 14:44:36.913016 00800000 ################################################################
5660 14:44:36.913162
5661 14:44:37.169469 00880000 ################################################################
5662 14:44:37.169632
5663 14:44:37.453626 00900000 ################################################################
5664 14:44:37.453775
5665 14:44:37.713294 00980000 ################################################################
5666 14:44:37.713476
5667 14:44:38.010496 00a00000 ################################################################
5668 14:44:38.010640
5669 14:44:38.303257 00a80000 ################################################################
5670 14:44:38.303433
5671 14:44:38.561101 00b00000 ################################################################
5672 14:44:38.561239
5673 14:44:38.823377 00b80000 ################################################################
5674 14:44:38.823522
5675 14:44:39.079112 00c00000 ################################################################
5676 14:44:39.079269
5677 14:44:39.333563 00c80000 ################################################################
5678 14:44:39.333703
5679 14:44:39.657151 00d00000 ################################################################
5680 14:44:39.657302
5681 14:44:40.025791 00d80000 ################################################################
5682 14:44:40.025971
5683 14:44:40.381187 00e00000 ################################################################
5684 14:44:40.381371
5685 14:44:40.718633 00e80000 ################################################################
5686 14:44:40.718778
5687 14:44:41.011515 00f00000 ################################################################
5688 14:44:41.011663
5689 14:44:41.278985 00f80000 ################################################################
5690 14:44:41.279143
5691 14:44:41.555045 01000000 ################################################################
5692 14:44:41.555188
5693 14:44:41.827512 01080000 ################################################################
5694 14:44:41.827661
5695 14:44:42.097326 01100000 ################################################################
5696 14:44:42.097480
5697 14:44:42.393682 01180000 ################################################################
5698 14:44:42.393824
5699 14:44:42.753585 01200000 ################################################################
5700 14:44:42.753739
5701 14:44:43.109056 01280000 ################################################################
5702 14:44:43.109241
5703 14:44:43.469135 01300000 ################################################################
5704 14:44:43.469325
5705 14:44:43.797878 01380000 ################################################################
5706 14:44:43.798061
5707 14:44:44.074045 01400000 ################################################################
5708 14:44:44.074224
5709 14:44:44.347963 01480000 ################################################################
5710 14:44:44.348102
5711 14:44:44.629092 01500000 ################################################################
5712 14:44:44.629267
5713 14:44:44.912342 01580000 ################################################################
5714 14:44:44.912496
5715 14:44:45.177366 01600000 ################################################################
5716 14:44:45.177539
5717 14:44:45.438428 01680000 ################################################################
5718 14:44:45.438572
5719 14:44:45.694635 01700000 ################################################################
5720 14:44:45.694776
5721 14:44:45.954653 01780000 ################################################################
5722 14:44:45.954809
5723 14:44:46.212284 01800000 ################################################################
5724 14:44:46.212429
5725 14:44:46.467527 01880000 ################################################################
5726 14:44:46.467677
5727 14:44:46.723203 01900000 ################################################################
5728 14:44:46.723345
5729 14:44:46.978838 01980000 ################################################################
5730 14:44:46.979001
5731 14:44:47.234090 01a00000 ################################################################
5732 14:44:47.234230
5733 14:44:47.487787 01a80000 ################################################################
5734 14:44:47.487936
5735 14:44:47.747155 01b00000 ################################################################
5736 14:44:47.747301
5737 14:44:48.001754 01b80000 ################################################################
5738 14:44:48.001904
5739 14:44:48.272753 01c00000 ################################################################
5740 14:44:48.272909
5741 14:44:48.534907 01c80000 ################################################################
5742 14:44:48.535064
5743 14:44:48.793972 01d00000 ################################################################
5744 14:44:48.794128
5745 14:44:49.055153 01d80000 ################################################################
5746 14:44:49.055316
5747 14:44:49.241991 01e00000 ################################################ done.
5748 14:44:49.242137
5749 14:44:49.245595 The bootfile was 31846582 bytes long.
5750 14:44:49.245705
5751 14:44:49.248906 Sending tftp read request... done.
5752 14:44:49.249005
5753 14:44:49.251970 Waiting for the transfer...
5754 14:44:49.252076
5755 14:44:49.255395 00000000 # done.
5756 14:44:49.255504
5757 14:44:49.261830 Command line loaded dynamically from TFTP file: 14166984/tftp-deploy-su0wm_kf/kernel/cmdline
5758 14:44:49.262040
5759 14:44:49.288642 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5760 14:44:49.289015
5761 14:44:49.289256 Loading FIT.
5762 14:44:49.289504
5763 14:44:49.291613 Image ramdisk-1 has 18726219 bytes.
5764 14:44:49.292074
5765 14:44:49.295190 Image fdt-1 has 57695 bytes.
5766 14:44:49.295804
5767 14:44:49.298044 Image kernel-1 has 13060619 bytes.
5768 14:44:49.298749
5769 14:44:49.307943 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5770 14:44:49.308362
5771 14:44:49.317894 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5772 14:44:49.318420
5773 14:44:49.324549 Choosing best match conf-1 for compat google,juniper-sku16.
5774 14:44:49.328420
5775 14:44:49.332777 Connected to device vid:did:rid of 1ae0:0028:00
5776 14:44:49.340053
5777 14:44:49.342795 tpm_get_response: command 0x17b, return code 0x0
5778 14:44:49.343214
5779 14:44:49.346265 tpm_cleanup: add release locality here.
5780 14:44:49.346681
5781 14:44:49.349319 Shutting down all USB controllers.
5782 14:44:49.349764
5783 14:44:49.352917 Removing current net device
5784 14:44:49.353496
5785 14:44:49.355976 Exiting depthcharge with code 4 at timestamp: 35556578
5786 14:44:49.359782
5787 14:44:49.362590 LZMA decompressing kernel-1 to 0x80193568
5788 14:44:49.363007
5789 14:44:49.365836 LZMA decompressing kernel-1 to 0x40000000
5790 14:44:51.224452
5791 14:44:51.224959 jumping to kernel
5792 14:44:51.226651 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5793 14:44:51.227132 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5794 14:44:51.227497 Setting prompt string to ['Linux version [0-9]']
5795 14:44:51.227839 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5796 14:44:51.228178 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5797 14:44:51.299468
5798 14:44:51.303297 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5799 14:44:51.306842 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5800 14:44:51.307412 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5801 14:44:51.307782 Setting prompt string to []
5802 14:44:51.308156 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5803 14:44:51.308537 Using line separator: #'\n'#
5804 14:44:51.308883 No login prompt set.
5805 14:44:51.309336 Parsing kernel messages
5806 14:44:51.309863 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5807 14:44:51.310460 [login-action] Waiting for messages, (timeout 00:04:05)
5808 14:44:51.310833 Waiting using forced prompt support (timeout 00:02:02)
5809 14:44:51.325849 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j216541-arm64-gcc-10-defconfig-arm64-chromebook-f7c97) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024
5810 14:44:51.329055 [ 0.000000] random: crng init done
5811 14:44:51.335774 [ 0.000000] Machine model: Google juniper sku16 board
5812 14:44:51.338822 [ 0.000000] efi: UEFI not found.
5813 14:44:51.345491 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5814 14:44:51.355140 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5815 14:44:51.361960 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5816 14:44:51.365224 [ 0.000000] printk: bootconsole [mtk8250] enabled
5817 14:44:51.374657 [ 0.000000] NUMA: No NUMA configuration found
5818 14:44:51.381374 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5819 14:44:51.387627 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5820 14:44:51.388141 [ 0.000000] Zone ranges:
5821 14:44:51.394392 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5822 14:44:51.397896 [ 0.000000] DMA32 empty
5823 14:44:51.404338 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5824 14:44:51.407691 [ 0.000000] Movable zone start for each node
5825 14:44:51.410291 [ 0.000000] Early memory node ranges
5826 14:44:51.417270 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5827 14:44:51.423612 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5828 14:44:51.429953 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5829 14:44:51.436933 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5830 14:44:51.442990 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5831 14:44:51.450030 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5832 14:44:51.467076 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5833 14:44:51.473258 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5834 14:44:51.479585 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5835 14:44:51.483099 [ 0.000000] psci: probing for conduit method from DT.
5836 14:44:51.489769 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5837 14:44:51.492989 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5838 14:44:51.499062 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5839 14:44:51.502336 [ 0.000000] psci: SMC Calling Convention v1.1
5840 14:44:51.508988 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5841 14:44:51.512588 [ 0.000000] Detected VIPT I-cache on CPU0
5842 14:44:51.519212 [ 0.000000] CPU features: detected: GIC system register CPU interface
5843 14:44:51.525548 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5844 14:44:51.532643 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5845 14:44:51.538945 [ 0.000000] CPU features: detected: ARM erratum 845719
5846 14:44:51.542118 [ 0.000000] alternatives: applying boot alternatives
5847 14:44:51.548800 [ 0.000000] Fallback order for Node 0: 0
5848 14:44:51.555311 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5849 14:44:51.558199 [ 0.000000] Policy zone: Normal
5850 14:44:51.584615 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5851 14:44:51.597636 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5852 14:44:51.604470 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5853 14:44:51.614395 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5854 14:44:51.620811 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5855 14:44:51.623790 <6>[ 0.000000] software IO TLB: area num 8.
5856 14:44:51.650062 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5857 14:44:51.708224 <6>[ 0.000000] Memory: 3896912K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 261552K reserved, 32768K cma-reserved)
5858 14:44:51.714373 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5859 14:44:51.721361 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5860 14:44:51.724538 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5861 14:44:51.731196 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5862 14:44:51.737667 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5863 14:44:51.744325 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5864 14:44:51.750565 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5865 14:44:51.757022 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5866 14:44:51.763580 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5867 14:44:51.773496 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5868 14:44:51.780604 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5869 14:44:51.783321 <6>[ 0.000000] GICv3: 640 SPIs implemented
5870 14:44:51.786572 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5871 14:44:51.793402 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5872 14:44:51.796437 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5873 14:44:51.803273 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5874 14:44:51.816400 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5875 14:44:51.826092 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5876 14:44:51.835726 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5877 14:44:51.844985 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5878 14:44:51.858213 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5879 14:44:51.864724 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5880 14:44:51.871647 <6>[ 0.009469] Console: colour dummy device 80x25
5881 14:44:51.875214 <6>[ 0.014533] printk: console [tty1] enabled
5882 14:44:51.888387 <6>[ 0.018920] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5883 14:44:51.891357 <6>[ 0.029385] pid_max: default: 32768 minimum: 301
5884 14:44:51.898221 <6>[ 0.034266] LSM: Security Framework initializing
5885 14:44:51.904325 <6>[ 0.039181] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5886 14:44:51.911285 <6>[ 0.046805] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5887 14:44:51.918397 <4>[ 0.055675] cacheinfo: Unable to detect cache hierarchy for CPU 0
5888 14:44:51.928194 <6>[ 0.062301] cblist_init_generic: Setting adjustable number of callback queues.
5889 14:44:51.934296 <6>[ 0.069746] cblist_init_generic: Setting shift to 3 and lim to 1.
5890 14:44:51.941051 <6>[ 0.076098] cblist_init_generic: Setting adjustable number of callback queues.
5891 14:44:51.947664 <6>[ 0.083542] cblist_init_generic: Setting shift to 3 and lim to 1.
5892 14:44:51.950824 <6>[ 0.089939] rcu: Hierarchical SRCU implementation.
5893 14:44:51.957386 <6>[ 0.094965] rcu: Max phase no-delay instances is 1000.
5894 14:44:51.965755 <6>[ 0.102898] EFI services will not be available.
5895 14:44:51.968474 <6>[ 0.107845] smp: Bringing up secondary CPUs ...
5896 14:44:51.978965 <6>[ 0.113163] Detected VIPT I-cache on CPU1
5897 14:44:51.985585 <4>[ 0.113209] cacheinfo: Unable to detect cache hierarchy for CPU 1
5898 14:44:51.992648 <6>[ 0.113218] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5899 14:44:51.998521 <6>[ 0.113250] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5900 14:44:52.001887 <6>[ 0.113732] Detected VIPT I-cache on CPU2
5901 14:44:52.008687 <4>[ 0.113765] cacheinfo: Unable to detect cache hierarchy for CPU 2
5902 14:44:52.015105 <6>[ 0.113770] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5903 14:44:52.021915 <6>[ 0.113782] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5904 14:44:52.028253 <6>[ 0.114226] Detected VIPT I-cache on CPU3
5905 14:44:52.035377 <4>[ 0.114257] cacheinfo: Unable to detect cache hierarchy for CPU 3
5906 14:44:52.041326 <6>[ 0.114262] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5907 14:44:52.047958 <6>[ 0.114273] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5908 14:44:52.051119 <6>[ 0.114848] CPU features: detected: Spectre-v2
5909 14:44:52.057822 <6>[ 0.114858] CPU features: detected: Spectre-BHB
5910 14:44:52.061333 <6>[ 0.114862] CPU features: detected: ARM erratum 858921
5911 14:44:52.067552 <6>[ 0.114867] Detected VIPT I-cache on CPU4
5912 14:44:52.073862 <4>[ 0.114914] cacheinfo: Unable to detect cache hierarchy for CPU 4
5913 14:44:52.080584 <6>[ 0.114922] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5914 14:44:52.087060 <6>[ 0.114930] arch_timer: Enabling local workaround for ARM erratum 858921
5915 14:44:52.090324 <6>[ 0.114941] arch_timer: CPU4: Trapping CNTVCT access
5916 14:44:52.100205 <6>[ 0.114948] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5917 14:44:52.103481 <6>[ 0.115435] Detected VIPT I-cache on CPU5
5918 14:44:52.109813 <4>[ 0.115477] cacheinfo: Unable to detect cache hierarchy for CPU 5
5919 14:44:52.116243 <6>[ 0.115482] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5920 14:44:52.123076 <6>[ 0.115489] arch_timer: Enabling local workaround for ARM erratum 858921
5921 14:44:52.129579 <6>[ 0.115495] arch_timer: CPU5: Trapping CNTVCT access
5922 14:44:52.135997 <6>[ 0.115500] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5923 14:44:52.139468 <6>[ 0.115935] Detected VIPT I-cache on CPU6
5924 14:44:52.145533 <4>[ 0.115981] cacheinfo: Unable to detect cache hierarchy for CPU 6
5925 14:44:52.152206 <6>[ 0.115987] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5926 14:44:52.158893 <6>[ 0.115995] arch_timer: Enabling local workaround for ARM erratum 858921
5927 14:44:52.165132 <6>[ 0.116001] arch_timer: CPU6: Trapping CNTVCT access
5928 14:44:52.172132 <6>[ 0.116006] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5929 14:44:52.175706 <6>[ 0.116535] Detected VIPT I-cache on CPU7
5930 14:44:52.181588 <4>[ 0.116578] cacheinfo: Unable to detect cache hierarchy for CPU 7
5931 14:44:52.188506 <6>[ 0.116584] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5932 14:44:52.194992 <6>[ 0.116591] arch_timer: Enabling local workaround for ARM erratum 858921
5933 14:44:52.201472 <6>[ 0.116598] arch_timer: CPU7: Trapping CNTVCT access
5934 14:44:52.207755 <6>[ 0.116603] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5935 14:44:52.211157 <6>[ 0.116671] smp: Brought up 1 node, 8 CPUs
5936 14:44:52.217818 <6>[ 0.355549] SMP: Total of 8 processors activated.
5937 14:44:52.224140 <6>[ 0.360486] CPU features: detected: 32-bit EL0 Support
5938 14:44:52.227556 <6>[ 0.365857] CPU features: detected: 32-bit EL1 Support
5939 14:44:52.233877 <6>[ 0.371223] CPU features: detected: CRC32 instructions
5940 14:44:52.237236 <6>[ 0.376656] CPU: All CPU(s) started at EL2
5941 14:44:52.243468 <6>[ 0.380993] alternatives: applying system-wide alternatives
5942 14:44:52.251122 <6>[ 0.388975] devtmpfs: initialized
5943 14:44:52.266507 <6>[ 0.397929] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5944 14:44:52.273240 <6>[ 0.407879] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5945 14:44:52.279654 <6>[ 0.415607] pinctrl core: initialized pinctrl subsystem
5946 14:44:52.283148 <6>[ 0.422697] DMI not present or invalid.
5947 14:44:52.289176 <6>[ 0.427068] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5948 14:44:52.299226 <6>[ 0.433973] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5949 14:44:52.305816 <6>[ 0.441501] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5950 14:44:52.315884 <6>[ 0.449751] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5951 14:44:52.322316 <6>[ 0.457929] audit: initializing netlink subsys (disabled)
5952 14:44:52.328812 <5>[ 0.463635] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5953 14:44:52.335239 <6>[ 0.464600] thermal_sys: Registered thermal governor 'step_wise'
5954 14:44:52.341747 <6>[ 0.471600] thermal_sys: Registered thermal governor 'power_allocator'
5955 14:44:52.344850 <6>[ 0.477899] cpuidle: using governor menu
5956 14:44:52.351574 <6>[ 0.488860] NET: Registered PF_QIPCRTR protocol family
5957 14:44:52.358204 <6>[ 0.494355] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5958 14:44:52.364978 <6>[ 0.501452] ASID allocator initialised with 32768 entries
5959 14:44:52.371037 <6>[ 0.508213] Serial: AMBA PL011 UART driver
5960 14:44:52.380678 <4>[ 0.518612] Trying to register duplicate clock ID: 113
5961 14:44:52.440726 <6>[ 0.575135] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5962 14:44:52.455138 <6>[ 0.589485] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5963 14:44:52.458362 <6>[ 0.599230] KASLR enabled
5964 14:44:52.472938 <6>[ 0.607246] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5965 14:44:52.479509 <6>[ 0.614249] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5966 14:44:52.486173 <6>[ 0.620726] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5967 14:44:52.492941 <6>[ 0.627717] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5968 14:44:52.499635 <6>[ 0.634191] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5969 14:44:52.505865 <6>[ 0.641182] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5970 14:44:52.512749 <6>[ 0.647656] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5971 14:44:52.518816 <6>[ 0.654645] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5972 14:44:52.525399 <6>[ 0.662215] ACPI: Interpreter disabled.
5973 14:44:52.532809 <6>[ 0.670174] iommu: Default domain type: Translated
5974 14:44:52.539145 <6>[ 0.675281] iommu: DMA domain TLB invalidation policy: strict mode
5975 14:44:52.542393 <5>[ 0.681911] SCSI subsystem initialized
5976 14:44:52.548883 <6>[ 0.686323] usbcore: registered new interface driver usbfs
5977 14:44:52.555255 <6>[ 0.692050] usbcore: registered new interface driver hub
5978 14:44:52.561659 <6>[ 0.697592] usbcore: registered new device driver usb
5979 14:44:52.564825 <6>[ 0.703886] pps_core: LinuxPPS API ver. 1 registered
5980 14:44:52.575134 <6>[ 0.709070] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5981 14:44:52.581229 <6>[ 0.718394] PTP clock support registered
5982 14:44:52.584310 <6>[ 0.722646] EDAC MC: Ver: 3.0.0
5983 14:44:52.590873 <6>[ 0.728278] FPGA manager framework
5984 14:44:52.594250 <6>[ 0.731966] Advanced Linux Sound Architecture Driver Initialized.
5985 14:44:52.597713 <6>[ 0.738713] vgaarb: loaded
5986 14:44:52.604391 <6>[ 0.741840] clocksource: Switched to clocksource arch_sys_counter
5987 14:44:52.611023 <5>[ 0.748271] VFS: Disk quotas dquot_6.6.0
5988 14:44:52.617577 <6>[ 0.752446] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5989 14:44:52.620723 <6>[ 0.759618] pnp: PnP ACPI: disabled
5990 14:44:52.628769 <6>[ 0.766453] NET: Registered PF_INET protocol family
5991 14:44:52.635154 <6>[ 0.771682] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5992 14:44:52.647180 <6>[ 0.781597] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5993 14:44:52.657337 <6>[ 0.790350] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5994 14:44:52.663388 <6>[ 0.798301] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5995 14:44:52.669925 <6>[ 0.806533] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5996 14:44:52.680304 <6>[ 0.814626] TCP: Hash tables configured (established 32768 bind 32768)
5997 14:44:52.686723 <6>[ 0.821452] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5998 14:44:52.693508 <6>[ 0.828423] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5999 14:44:52.699947 <6>[ 0.835904] NET: Registered PF_UNIX/PF_LOCAL protocol family
6000 14:44:52.706189 <6>[ 0.842000] RPC: Registered named UNIX socket transport module.
6001 14:44:52.709698 <6>[ 0.848142] RPC: Registered udp transport module.
6002 14:44:52.716052 <6>[ 0.853067] RPC: Registered tcp transport module.
6003 14:44:52.722396 <6>[ 0.857990] RPC: Registered tcp NFSv4.1 backchannel transport module.
6004 14:44:52.725836 <6>[ 0.864642] PCI: CLS 0 bytes, default 64
6005 14:44:52.729156 <6>[ 0.868933] Unpacking initramfs...
6006 14:44:52.743951 <6>[ 0.878418] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6007 14:44:52.753834 <6>[ 0.887041] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6008 14:44:52.756886 <6>[ 0.895889] kvm [1]: IPA Size Limit: 40 bits
6009 14:44:52.764452 <6>[ 0.902206] kvm [1]: vgic-v2@c420000
6010 14:44:52.771132 <6>[ 0.906023] kvm [1]: GIC system register CPU interface enabled
6011 14:44:52.774295 <6>[ 0.912196] kvm [1]: vgic interrupt IRQ18
6012 14:44:52.780586 <6>[ 0.916566] kvm [1]: Hyp mode initialized successfully
6013 14:44:52.783875 <5>[ 0.922860] Initialise system trusted keyrings
6014 14:44:52.790473 <6>[ 0.927686] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6015 14:44:52.799689 <6>[ 0.937545] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6016 14:44:52.806690 <5>[ 0.944004] NFS: Registering the id_resolver key type
6017 14:44:52.809541 <5>[ 0.949311] Key type id_resolver registered
6018 14:44:52.816488 <5>[ 0.953724] Key type id_legacy registered
6019 14:44:52.823028 <6>[ 0.958031] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6020 14:44:52.829500 <6>[ 0.964951] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6021 14:44:52.835803 <6>[ 0.972710] 9p: Installing v9fs 9p2000 file system support
6022 14:44:52.864538 <5>[ 1.001798] Key type asymmetric registered
6023 14:44:52.867391 <5>[ 1.006143] Asymmetric key parser 'x509' registered
6024 14:44:52.877146 <6>[ 1.011296] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6025 14:44:52.880451 <6>[ 1.018911] io scheduler mq-deadline registered
6026 14:44:52.883836 <6>[ 1.023671] io scheduler kyber registered
6027 14:44:52.906759 <6>[ 1.044354] EINJ: ACPI disabled.
6028 14:44:52.913381 <4>[ 1.048115] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6029 14:44:52.951029 <6>[ 1.088675] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6030 14:44:52.959525 <6>[ 1.097125] printk: console [ttyS0] disabled
6031 14:44:52.987618 <6>[ 1.121778] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6032 14:44:52.993758 <6>[ 1.131251] printk: console [ttyS0] enabled
6033 14:44:52.996893 <6>[ 1.131251] printk: console [ttyS0] enabled
6034 14:44:53.003680 <6>[ 1.140170] printk: bootconsole [mtk8250] disabled
6035 14:44:53.006755 <6>[ 1.140170] printk: bootconsole [mtk8250] disabled
6036 14:44:53.016446 <3>[ 1.150705] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6037 14:44:53.022992 <3>[ 1.159085] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6038 14:44:53.053278 <6>[ 1.187495] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6039 14:44:53.059600 <6>[ 1.197147] serial serial0: tty port ttyS1 registered
6040 14:44:53.066103 <6>[ 1.203699] SuperH (H)SCI(F) driver initialized
6041 14:44:53.069325 <6>[ 1.209196] msm_serial: driver initialized
6042 14:44:53.085231 <6>[ 1.219494] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6043 14:44:53.095231 <6>[ 1.228095] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6044 14:44:53.101379 <6>[ 1.236673] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6045 14:44:53.111264 <6>[ 1.245243] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6046 14:44:53.121232 <6>[ 1.253900] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6047 14:44:53.127513 <6>[ 1.262564] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6048 14:44:53.137679 <6>[ 1.271302] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6049 14:44:53.147140 <6>[ 1.280043] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6050 14:44:53.153846 <6>[ 1.288626] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6051 14:44:53.163710 <6>[ 1.297434] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6052 14:44:53.172123 <4>[ 1.309813] cacheinfo: Unable to detect cache hierarchy for CPU 0
6053 14:44:53.181333 <6>[ 1.319166] loop: module loaded
6054 14:44:53.193347 <6>[ 1.331054] vsim1: Bringing 1800000uV into 2700000-2700000uV
6055 14:44:53.211085 <6>[ 1.349024] megasas: 07.719.03.00-rc1
6056 14:44:53.220182 <6>[ 1.357743] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6057 14:44:53.227798 <6>[ 1.365229] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6058 14:44:53.244220 <6>[ 1.381745] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6059 14:44:53.304183 <6>[ 1.435214] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6060 14:44:53.341824 <6>[ 1.479610] Freeing initrd memory: 18284K
6061 14:44:53.357099 <4>[ 1.491394] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6062 14:44:53.363904 <4>[ 1.500624] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
6063 14:44:53.370303 <4>[ 1.507322] Hardware name: Google juniper sku16 board (DT)
6064 14:44:53.373219 <4>[ 1.513061] Call trace:
6065 14:44:53.376644 <4>[ 1.515761] dump_backtrace.part.0+0xe0/0xf0
6066 14:44:53.380035 <4>[ 1.520298] show_stack+0x18/0x30
6067 14:44:53.386288 <4>[ 1.523870] dump_stack_lvl+0x68/0x84
6068 14:44:53.389839 <4>[ 1.527791] dump_stack+0x18/0x34
6069 14:44:53.393101 <4>[ 1.531361] sysfs_warn_dup+0x64/0x80
6070 14:44:53.396135 <4>[ 1.535283] sysfs_do_create_link_sd+0xf0/0x100
6071 14:44:53.402617 <4>[ 1.540070] sysfs_create_link+0x20/0x40
6072 14:44:53.406056 <4>[ 1.544249] bus_add_device+0x68/0x10c
6073 14:44:53.409482 <4>[ 1.548256] device_add+0x340/0x7ac
6074 14:44:53.412447 <4>[ 1.551999] of_device_add+0x44/0x60
6075 14:44:53.419353 <4>[ 1.555832] of_platform_device_create_pdata+0x90/0x120
6076 14:44:53.422727 <4>[ 1.561314] of_platform_bus_create+0x170/0x370
6077 14:44:53.429187 <4>[ 1.566100] of_platform_populate+0x50/0xfc
6078 14:44:53.432350 <4>[ 1.570539] parse_mtd_partitions+0x1dc/0x510
6079 14:44:53.438877 <4>[ 1.575152] mtd_device_parse_register+0xf8/0x2e0
6080 14:44:53.442198 <4>[ 1.580111] spi_nor_probe+0x21c/0x2f0
6081 14:44:53.445185 <4>[ 1.584117] spi_mem_probe+0x6c/0xb0
6082 14:44:53.448721 <4>[ 1.587949] spi_probe+0x84/0xe4
6083 14:44:53.452075 <4>[ 1.591431] really_probe+0xbc/0x2e0
6084 14:44:53.458736 <4>[ 1.595261] __driver_probe_device+0x78/0x11c
6085 14:44:53.461842 <4>[ 1.599872] driver_probe_device+0xd8/0x160
6086 14:44:53.465129 <4>[ 1.604310] __device_attach_driver+0xb8/0x134
6087 14:44:53.471600 <4>[ 1.609009] bus_for_each_drv+0x78/0xd0
6088 14:44:53.474857 <4>[ 1.613099] __device_attach+0xa8/0x1c0
6089 14:44:53.478233 <4>[ 1.617189] device_initial_probe+0x14/0x20
6090 14:44:53.481499 <4>[ 1.621628] bus_probe_device+0x9c/0xa4
6091 14:44:53.488080 <4>[ 1.625718] device_add+0x3ac/0x7ac
6092 14:44:53.491334 <4>[ 1.629460] __spi_add_device+0x78/0x120
6093 14:44:53.494687 <4>[ 1.633638] spi_add_device+0x40/0x7c
6094 14:44:53.501185 <4>[ 1.637556] spi_register_controller+0x610/0xad0
6095 14:44:53.504510 <4>[ 1.642428] devm_spi_register_controller+0x4c/0xa4
6096 14:44:53.507629 <4>[ 1.647561] mtk_spi_probe+0x3f8/0x650
6097 14:44:53.514293 <4>[ 1.651565] platform_probe+0x68/0xe0
6098 14:44:53.517609 <4>[ 1.655483] really_probe+0xbc/0x2e0
6099 14:44:53.520914 <4>[ 1.659313] __driver_probe_device+0x78/0x11c
6100 14:44:53.527552 <4>[ 1.663924] driver_probe_device+0xd8/0x160
6101 14:44:53.531054 <4>[ 1.668362] __driver_attach+0x94/0x19c
6102 14:44:53.533856 <4>[ 1.672452] bus_for_each_dev+0x70/0xd0
6103 14:44:53.537553 <4>[ 1.676542] driver_attach+0x24/0x30
6104 14:44:53.540531 <4>[ 1.680372] bus_add_driver+0x154/0x20c
6105 14:44:53.546916 <4>[ 1.684462] driver_register+0x78/0x130
6106 14:44:53.550238 <4>[ 1.688553] __platform_driver_register+0x28/0x34
6107 14:44:53.556814 <4>[ 1.693512] mtk_spi_driver_init+0x1c/0x28
6108 14:44:53.559829 <4>[ 1.697866] do_one_initcall+0x50/0x1d0
6109 14:44:53.563288 <4>[ 1.701956] kernel_init_freeable+0x21c/0x288
6110 14:44:53.566618 <4>[ 1.706569] kernel_init+0x24/0x12c
6111 14:44:53.569982 <4>[ 1.710314] ret_from_fork+0x10/0x20
6112 14:44:53.581401 <6>[ 1.719187] tun: Universal TUN/TAP device driver, 1.6
6113 14:44:53.584509 <6>[ 1.725469] thunder_xcv, ver 1.0
6114 14:44:53.591239 <6>[ 1.728982] thunder_bgx, ver 1.0
6115 14:44:53.591778 <6>[ 1.732487] nicpf, ver 1.0
6116 14:44:53.602479 <6>[ 1.736844] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6117 14:44:53.605813 <6>[ 1.744332] hns3: Copyright (c) 2017 Huawei Corporation.
6118 14:44:53.612335 <6>[ 1.749941] hclge is initializing
6119 14:44:53.615516 <6>[ 1.753526] e1000: Intel(R) PRO/1000 Network Driver
6120 14:44:53.622139 <6>[ 1.758665] e1000: Copyright (c) 1999-2006 Intel Corporation.
6121 14:44:53.628748 <6>[ 1.764687] e1000e: Intel(R) PRO/1000 Network Driver
6122 14:44:53.631926 <6>[ 1.769909] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6123 14:44:53.638489 <6>[ 1.776106] igb: Intel(R) Gigabit Ethernet Network Driver
6124 14:44:53.645119 <6>[ 1.781762] igb: Copyright (c) 2007-2014 Intel Corporation.
6125 14:44:53.651536 <6>[ 1.787605] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6126 14:44:53.658290 <6>[ 1.794129] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6127 14:44:53.661517 <6>[ 1.800680] sky2: driver version 1.30
6128 14:44:53.668194 <6>[ 1.805931] usbcore: registered new device driver r8152-cfgselector
6129 14:44:53.674760 <6>[ 1.812474] usbcore: registered new interface driver r8152
6130 14:44:53.681277 <6>[ 1.818303] VFIO - User Level meta-driver version: 0.3
6131 14:44:53.688577 <6>[ 1.826103] mtu3 11201000.usb: uwk - reg:0x420, version:101
6132 14:44:53.695148 <4>[ 1.831976] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6133 14:44:53.701735 <6>[ 1.839246] mtu3 11201000.usb: dr_mode: 1, drd: auto
6134 14:44:53.708339 <6>[ 1.844471] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6135 14:44:53.711525 <6>[ 1.850654] mtu3 11201000.usb: usb3-drd: 0
6136 14:44:53.722019 <6>[ 1.856223] mtu3 11201000.usb: xHCI platform device register success...
6137 14:44:53.728148 <4>[ 1.864847] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6138 14:44:53.735456 <6>[ 1.872794] xhci-mtk 11200000.usb: xHCI Host Controller
6139 14:44:53.745186 <6>[ 1.878304] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6140 14:44:53.748205 <6>[ 1.886026] xhci-mtk 11200000.usb: USB3 root hub has no ports
6141 14:44:53.758207 <6>[ 1.892034] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6142 14:44:53.764877 <6>[ 1.901462] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6143 14:44:53.771276 <6>[ 1.907545] xhci-mtk 11200000.usb: xHCI Host Controller
6144 14:44:53.777917 <6>[ 1.913034] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6145 14:44:53.784562 <6>[ 1.920691] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6146 14:44:53.787806 <6>[ 1.927538] hub 1-0:1.0: USB hub found
6147 14:44:53.794580 <6>[ 1.931567] hub 1-0:1.0: 1 port detected
6148 14:44:53.804250 <6>[ 1.936917] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6149 14:44:53.807292 <6>[ 1.945536] hub 2-0:1.0: USB hub found
6150 14:44:53.813838 <3>[ 1.949564] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6151 14:44:53.820578 <6>[ 1.957456] usbcore: registered new interface driver usb-storage
6152 14:44:53.827197 <6>[ 1.964066] usbcore: registered new device driver onboard-usb-hub
6153 14:44:53.843661 <4>[ 1.977953] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6154 14:44:53.852633 <6>[ 1.990209] mt6397-rtc mt6358-rtc: registered as rtc0
6155 14:44:53.862383 <6>[ 1.995690] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-04T14:44:53 UTC (1717512293)
6156 14:44:53.868879 <6>[ 2.005571] i2c_dev: i2c /dev entries driver
6157 14:44:53.878909 <6>[ 2.011999] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6158 14:44:53.885494 <6>[ 2.020342] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6159 14:44:53.891845 <6>[ 2.029246] i2c 4-0058: Fixed dependency cycle(s) with /panel
6160 14:44:53.898499 <6>[ 2.035280] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6161 14:44:53.908583 <3>[ 2.042752] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6162 14:44:53.925466 <6>[ 2.059805] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6163 14:44:53.933626 <6>[ 2.071259] cpu cpu0: EM: created perf domain
6164 14:44:53.946819 <6>[ 2.076747] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6165 14:44:53.949830 <6>[ 2.088028] cpu cpu4: EM: created perf domain
6166 14:44:53.957098 <6>[ 2.094698] sdhci: Secure Digital Host Controller Interface driver
6167 14:44:53.963604 <6>[ 2.101157] sdhci: Copyright(c) Pierre Ossman
6168 14:44:53.970171 <6>[ 2.106574] Synopsys Designware Multimedia Card Interface Driver
6169 14:44:53.976789 <6>[ 2.107109] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6170 14:44:53.983048 <6>[ 2.113630] sdhci-pltfm: SDHCI platform and OF driver helper
6171 14:44:53.989636 <6>[ 2.126956] ledtrig-cpu: registered to indicate activity on CPUs
6172 14:44:53.997181 <6>[ 2.134705] usbcore: registered new interface driver usbhid
6173 14:44:54.003627 <6>[ 2.140545] usbhid: USB HID core driver
6174 14:44:54.010895 <6>[ 2.144810] spi_master spi2: will run message pump with realtime priority
6175 14:44:54.017213 <4>[ 2.144813] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6176 14:44:54.023921 <4>[ 2.159097] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6177 14:44:54.036927 <6>[ 2.165078] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6178 14:44:54.053952 <6>[ 2.181551] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6179 14:44:54.060122 <4>[ 2.189361] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6180 14:44:54.066932 <6>[ 2.202549] cros-ec-spi spi2.0: Chrome EC device registered
6181 14:44:54.073377 <4>[ 2.210318] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6182 14:44:54.087208 <4>[ 2.221577] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6183 14:44:54.093776 <4>[ 2.230342] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6184 14:44:54.106260 <6>[ 2.240684] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6185 14:44:54.132262 <6>[ 2.269738] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6186 14:44:54.140200 <6>[ 2.277335] mmc0: new HS400 MMC card at address 0001
6187 14:44:54.146212 <6>[ 2.283464] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6188 14:44:54.156315 <6>[ 2.293659] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6189 14:44:54.166130 <6>[ 2.295890] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6190 14:44:54.172540 <6>[ 2.302170] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6191 14:44:54.182263 <6>[ 2.312704] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6192 14:44:54.195807 <6>[ 2.312962] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6193 14:44:54.205042 <6>[ 2.336766] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6194 14:44:54.208371 <6>[ 2.337336] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6195 14:44:54.215238 <6>[ 2.338343] NET: Registered PF_PACKET protocol family
6196 14:44:54.217906 <6>[ 2.338461] 9pnet: Installing 9P2000 support
6197 14:44:54.224544 <5>[ 2.338518] Key type dns_resolver registered
6198 14:44:54.227853 <6>[ 2.338907] registered taskstats version 1
6199 14:44:54.234322 <5>[ 2.338925] Loading compiled-in X.509 certificates
6200 14:44:54.240835 <6>[ 2.361930] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6201 14:44:54.247444 <6>[ 2.367744] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6202 14:44:54.253862 <3>[ 2.382153] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6203 14:44:54.286124 <4>[ 2.417427] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6204 14:44:54.295970 <6>[ 2.428039] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6205 14:44:54.309176 <6>[ 2.439896] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6206 14:44:54.322602 <3>[ 2.451135] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6207 14:44:54.335458 <3>[ 2.466607] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6208 14:44:54.341918 <3>[ 2.479099] debugfs: File 'Playback' in directory 'dapm' already present!
6209 14:44:54.351837 <3>[ 2.486149] debugfs: File 'Capture' in directory 'dapm' already present!
6210 14:44:54.364821 <6>[ 2.495742] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6211 14:44:54.375260 <6>[ 2.509434] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6212 14:44:54.384852 <6>[ 2.518024] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6213 14:44:54.391784 <6>[ 2.526554] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6214 14:44:54.397848 <6>[ 2.531347] hub 1-1:1.0: USB hub found
6215 14:44:54.404535 <6>[ 2.535070] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6216 14:44:54.407841 <6>[ 2.539597] hub 1-1:1.0: 3 ports detected
6217 14:44:54.417478 <6>[ 2.547578] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6218 14:44:54.427266 <6>[ 2.560370] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6219 14:44:54.433845 <6>[ 2.568893] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6220 14:44:54.440640 <6>[ 2.578129] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6221 14:44:54.447912 <6>[ 2.585633] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6222 14:44:54.455472 <6>[ 2.592931] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6223 14:44:54.465891 <6>[ 2.600213] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6224 14:44:54.472509 <6>[ 2.607669] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6225 14:44:54.478823 <6>[ 2.615928] panfrost 13040000.gpu: clock rate = 511999970
6226 14:44:54.488679 <6>[ 2.621631] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6227 14:44:54.498681 <6>[ 2.631886] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6228 14:44:54.504911 <6>[ 2.639894] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6229 14:44:54.518018 <6>[ 2.648327] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6230 14:44:54.524704 <6>[ 2.660404] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6231 14:44:54.535836 <6>[ 2.670310] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6232 14:44:54.545906 <6>[ 2.679378] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6233 14:44:54.555928 <6>[ 2.688527] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6234 14:44:54.564968 <6>[ 2.697660] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6235 14:44:54.575100 <6>[ 2.706788] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6236 14:44:54.581223 <6>[ 2.716089] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6237 14:44:54.591554 <6>[ 2.725390] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6238 14:44:54.600896 <6>[ 2.734862] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6239 14:44:54.611334 <6>[ 2.744336] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6240 14:44:54.620905 <6>[ 2.753466] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6241 14:44:54.691256 <6>[ 2.825499] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6242 14:44:54.700995 <6>[ 2.834381] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6243 14:44:54.711868 <6>[ 2.846057] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6244 14:44:54.731617 <6>[ 2.865863] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6245 14:44:55.410553 <6>[ 3.058516] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6246 14:44:55.420149 <4>[ 3.175059] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6247 14:44:55.426577 <4>[ 3.175078] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6248 14:44:55.433105 <6>[ 3.228040] r8152 1-1.2:1.0 eth0: v1.12.13
6249 14:44:55.440014 <6>[ 3.309867] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6250 14:44:55.446320 <6>[ 3.528039] Console: switching to colour frame buffer device 170x48
6251 14:44:55.455900 <6>[ 3.588716] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6252 14:44:55.473719 <6>[ 3.607853] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6253 14:44:55.480165 <6>[ 3.616168] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6254 14:44:56.692348 <6>[ 4.829580] r8152 1-1.2:1.0 eth0: carrier on
6255 14:44:59.392304 <5>[ 4.849860] Sending DHCP requests .., OK
6256 14:44:59.398898 <6>[ 7.534184] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6257 14:44:59.402386 <6>[ 7.542638] IP-Config: Complete:
6258 14:44:59.415434 <6>[ 7.546203] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6259 14:44:59.425048 <6>[ 7.557101] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6260 14:44:59.431654 <6>[ 7.566584] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6261 14:44:59.434831 <6>[ 7.566594] nameserver0=192.168.201.1
6262 14:44:59.441503 <6>[ 7.578936] clk: Disabling unused clocks
6263 14:44:59.444403 <6>[ 7.584058] ALSA device list:
6264 14:44:59.452840 <6>[ 7.590674] #0: mt8183_mt6358_ts3a227_max98357
6265 14:44:59.464357 <6>[ 7.602276] Freeing unused kernel memory: 8512K
6266 14:44:59.471901 <6>[ 7.609884] Run /init as init process
6267 14:44:59.484082 Loading, please wait...
6268 14:44:59.517798 Starting systemd-udevd version 252.22-1~deb12u1
6269 14:44:59.862839 <3>[ 8.000228] thermal_sys: Failed to find 'trips' node
6270 14:44:59.869479 <3>[ 8.000412] mtk-scp 10500000.scp: invalid resource
6271 14:44:59.875699 <3>[ 8.005487] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6272 14:44:59.882409 <3>[ 8.005499] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6273 14:44:59.892264 <4>[ 8.005504] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6274 14:44:59.895430 <3>[ 8.007406] thermal_sys: Failed to find 'trips' node
6275 14:44:59.905334 <4>[ 8.008290] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6276 14:44:59.911723 <4>[ 8.008416] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6277 14:44:59.918651 <6>[ 8.010656] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6278 14:44:59.924927 <3>[ 8.017877] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6279 14:44:59.934525 <3>[ 8.017891] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6280 14:44:59.941470 <4>[ 8.017896] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6281 14:44:59.951360 <3>[ 8.023040] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6282 14:44:59.960837 <3>[ 8.023051] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6283 14:44:59.970467 <3>[ 8.023054] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6284 14:44:59.976912 <3>[ 8.023057] elan_i2c 2-0015: Error applying setting, reverse things back
6285 14:44:59.980191 <6>[ 8.027057] Bluetooth: Core ver 2.22
6286 14:44:59.987317 <6>[ 8.027357] remoteproc remoteproc0: scp is available
6287 14:44:59.996935 <4>[ 8.027457] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6288 14:45:00.003610 <6>[ 8.027466] remoteproc remoteproc0: powering up scp
6289 14:45:00.010137 <4>[ 8.027495] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6290 14:45:00.017003 <3>[ 8.027501] remoteproc remoteproc0: request_firmware failed: -2
6291 14:45:00.027327 <3>[ 8.034484] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6292 14:45:00.030596 <6>[ 8.034516] mc: Linux media interface: v0.10
6293 14:45:00.040876 <6>[ 8.035601] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6294 14:45:00.047454 <6>[ 8.039284] NET: Registered PF_BLUETOOTH protocol family
6295 14:45:00.057390 <3>[ 8.046537] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6296 14:45:00.064024 <6>[ 8.055447] Bluetooth: HCI device and connection manager initialized
6297 14:45:00.073497 <3>[ 8.061437] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6298 14:45:00.076722 <6>[ 8.068885] Bluetooth: HCI socket layer initialized
6299 14:45:00.087057 <3>[ 8.077290] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6300 14:45:00.093672 <6>[ 8.077732] videodev: Linux video capture interface: v2.00
6301 14:45:00.103577 <5>[ 8.080408] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6302 14:45:00.110221 <6>[ 8.083618] cs_system_cfg: CoreSight Configuration manager initialised
6303 14:45:00.116558 <6>[ 8.084952] Bluetooth: L2CAP socket layer initialized
6304 14:45:00.126556 <3>[ 8.094835] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6305 14:45:00.133040 <3>[ 8.094852] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6306 14:45:00.143483 <3>[ 8.094860] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6307 14:45:00.153233 <3>[ 8.094865] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6308 14:45:00.162824 <3>[ 8.094911] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6309 14:45:00.169329 <5>[ 8.095884] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6310 14:45:00.179203 <5>[ 8.096372] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6311 14:45:00.188958 <4>[ 8.096462] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6312 14:45:00.192062 <6>[ 8.096473] cfg80211: failed to load regulatory.db
6313 14:45:00.198507 <6>[ 8.101693] Bluetooth: SCO socket layer initialized
6314 14:45:00.208565 <6>[ 8.163114] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6315 14:45:00.230705 <6>[ 8.364945] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6316 14:45:00.240494 <6>[ 8.373774] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6317 14:45:00.247085 <6>[ 8.382869] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6318 14:45:00.257531 <6>[ 8.391967] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6319 14:45:00.264210 <6>[ 8.400239] Bluetooth: HCI UART driver ver 2.3
6320 14:45:00.270719 <6>[ 8.400794] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6321 14:45:00.277486 <6>[ 8.401057] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6322 14:45:00.284113 <6>[ 8.402223] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6323 14:45:00.293730 <6>[ 8.402973] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6324 14:45:00.300264 <6>[ 8.403660] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6325 14:45:00.306740 <6>[ 8.404855] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6326 14:45:00.313217 <6>[ 8.405308] Bluetooth: HCI UART protocol H4 registered
6327 14:45:00.320050 <6>[ 8.419999] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6328 14:45:00.326576 <6>[ 8.420659] Bluetooth: HCI UART protocol LL registered
6329 14:45:00.339476 <6>[ 8.425575] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6330 14:45:00.342885 <6>[ 8.425868] usbcore: registered new interface driver uvcvideo
6331 14:45:00.352571 <6>[ 8.426942] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6332 14:45:00.359057 <6>[ 8.435498] Bluetooth: HCI UART protocol Three-wire (H5) registered
6333 14:45:00.365721 <6>[ 8.443155] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6334 14:45:00.375499 Begin: Loading essential drivers<6>[ 8.449747] Bluetooth: HCI UART protocol Broadcom registered
6335 14:45:00.375924 ... done.
6336 14:45:00.388839 Begin: Running /scri<6>[ 8.468050] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6337 14:45:00.392177 pts/init-premount ... done.
6338 14:45:00.395512 Beg<6>[ 8.468847] Bluetooth: HCI UART protocol QCA registered
6339 14:45:00.405539 in: Mounting root file system ..<6>[ 8.469582] Bluetooth: hci0: setting up ROME/QCA6390
6340 14:45:00.415019 . Begin: Running /scripts/nfs-to<6>[ 8.480736] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6341 14:45:00.418531 p ... done.
6342 14:45:00.425067 Begin: Running /scr<6>[ 8.486633] Bluetooth: HCI UART protocol Marvell registered
6343 14:45:00.438098 ipts/nfs-premount ... Waiting up<6>[ 8.494903] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6344 14:45:00.444631 to 60 secs for any ethernet to become available
6345 14:45:00.445053 Device /sys/class/net/eth0 found
6346 14:45:00.447834 done.
6347 14:45:00.454530 Begin: Waiting up to 180 secs for any network device to become available ... done.
6348 14:45:00.472208 <4>[ 8.606290] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6349 14:45:00.478723 <4>[ 8.606290] Fallback method does not support PEC.
6350 14:45:00.496276 <3>[ 8.630235] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6351 14:45:00.515093 <3>[ 8.649174] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6352 14:45:00.529243 IP-Config: eth0 hardware address 00:e0:4c:78:85:cb mtu 1500 DHCP
6353 14:45:00.538311 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6354 14:45:00.548275 address: 192.168.201.22 broadcast: 192.168.201.255 netm<3>[ 8.684837] Bluetooth: hci0: Frame reassembly failed (-84)
6355 14:45:00.555083 ask: 255.255.255.0
6356 14:45:00.561520 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6357 14:45:00.568371 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-2
6358 14:45:00.574859 domain : lava-rack
6359 14:45:00.578083 rootserver: 192.168.201.1 rootpath:
6360 14:45:00.578497 filename :
6361 14:45:00.629318 <6>[ 8.763729] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6362 14:45:00.739726 done.
6363 14:45:00.747345 Begin: Running /scripts/nfs-bottom ... done.
6364 14:45:00.762815 Begin: Running /scripts/init-bottom ... done.
6365 14:45:00.829031 <6>[ 8.966418] Bluetooth: hci0: QCA Product ID :0x00000008
6366 14:45:00.837143 <6>[ 8.974539] Bluetooth: hci0: QCA SOC Version :0x00000044
6367 14:45:00.844793 <6>[ 8.982350] Bluetooth: hci0: QCA ROM Version :0x00000302
6368 14:45:00.851981 <6>[ 8.989938] Bluetooth: hci0: QCA Patch Version:0x00000111
6369 14:45:00.859593 <6>[ 8.997423] Bluetooth: hci0: QCA controller version 0x00440302
6370 14:45:00.870839 <6>[ 9.005258] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6371 14:45:00.880463 <4>[ 9.014543] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6372 14:45:00.891422 <3>[ 9.026035] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6373 14:45:00.898519 <3>[ 9.036422] Bluetooth: hci0: QCA Failed to download patch (-2)
6374 14:45:01.076738 <6>[ 9.211022] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6375 14:45:01.159342 <4>[ 9.293854] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6376 14:45:01.181698 <4>[ 9.315879] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6377 14:45:01.197309 <4>[ 9.331811] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6378 14:45:01.210361 <4>[ 9.348007] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6379 14:45:02.132710 <6>[ 10.270367] NET: Registered PF_INET6 protocol family
6380 14:45:02.145072 <6>[ 10.282892] Segment Routing with IPv6
6381 14:45:02.153426 <6>[ 10.291198] In-situ OAM (IOAM) with IPv6
6382 14:45:02.336339 <30>[ 10.444121] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6383 14:45:02.354162 <30>[ 10.491296] systemd[1]: Detected architecture arm64.
6384 14:45:02.366540
6385 14:45:02.369968 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6386 14:45:02.370493
6387 14:45:02.394250 <30>[ 10.531883] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6388 14:45:03.547209 <30>[ 11.681367] systemd[1]: Queued start job for default target graphical.target.
6389 14:45:03.589238 <30>[ 11.723467] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6390 14:45:03.602613 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6391 14:45:03.621965 <30>[ 11.756220] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6392 14:45:03.635724 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6393 14:45:03.654452 <30>[ 11.788389] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6394 14:45:03.668355 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6395 14:45:03.685478 <30>[ 11.819513] systemd[1]: Created slice user.slice - User and Session Slice.
6396 14:45:03.697146 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6397 14:45:03.719789 <30>[ 11.850437] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6398 14:45:03.732840 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6399 14:45:03.755315 <30>[ 11.886283] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6400 14:45:03.767529 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6401 14:45:03.794005 <30>[ 11.918244] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6402 14:45:03.813162 <30>[ 11.947416] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6403 14:45:03.821023 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6404 14:45:03.840005 <30>[ 11.974050] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6405 14:45:03.852714 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6406 14:45:03.871824 <30>[ 12.006089] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6407 14:45:03.885862 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6408 14:45:03.900844 <30>[ 12.038112] systemd[1]: Reached target paths.target - Path Units.
6409 14:45:03.915201 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6410 14:45:03.931951 <30>[ 12.066037] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6411 14:45:03.944705 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6412 14:45:03.959937 <30>[ 12.094002] systemd[1]: Reached target slices.target - Slice Units.
6413 14:45:03.971097 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6414 14:45:03.984777 <30>[ 12.122075] systemd[1]: Reached target swap.target - Swaps.
6415 14:45:03.995349 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6416 14:45:04.015834 <30>[ 12.150098] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6417 14:45:04.029489 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6418 14:45:04.048472 <30>[ 12.182502] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6419 14:45:04.061998 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6420 14:45:04.083338 <30>[ 12.217324] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6421 14:45:04.096927 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6422 14:45:04.117825 <30>[ 12.251830] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6423 14:45:04.131590 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6424 14:45:04.148347 <30>[ 12.282756] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6425 14:45:04.160622 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6426 14:45:04.181903 <30>[ 12.315960] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6427 14:45:04.195616 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6428 14:45:04.215194 <30>[ 12.349477] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6429 14:45:04.228414 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6430 14:45:04.248428 <30>[ 12.382647] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6431 14:45:04.261839 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6432 14:45:04.300453 <30>[ 12.434629] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6433 14:45:04.311264 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6434 14:45:04.332586 <30>[ 12.466907] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6435 14:45:04.345365 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6436 14:45:04.369164 <30>[ 12.503359] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6437 14:45:04.381976 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6438 14:45:04.407154 <30>[ 12.534749] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6439 14:45:04.448609 <30>[ 12.582798] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6440 14:45:04.461280 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6441 14:45:04.486514 <30>[ 12.620618] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6442 14:45:04.497814 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6443 14:45:04.522391 <30>[ 12.656441] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6444 14:45:04.533098 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6445 14:45:04.556310 <30>[ 12.690663] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6446 14:45:04.571003 Starting [0;1;39mmodprobe@drm.service<6>[ 12.705671] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6447 14:45:04.574587 [0m - Load Kernel Module drm...
6448 14:45:04.596111 <30>[ 12.730306] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6449 14:45:04.609721 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6450 14:45:04.633379 <30>[ 12.767599] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6451 14:45:04.646892 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6452 14:45:04.668699 <30>[ 12.802936] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6453 14:45:04.680907 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6454 14:45:04.697571 <6>[ 12.834932] fuse: init (API version 7.37)
6455 14:45:04.724846 <30>[ 12.858996] systemd[1]: Starting systemd-journald.service - Journal Service...
6456 14:45:04.734840 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6457 14:45:04.764307 <30>[ 12.898524] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6458 14:45:04.775216 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6459 14:45:04.798075 <30>[ 12.929067] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6460 14:45:04.808307 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6461 14:45:04.827462 <30>[ 12.961606] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6462 14:45:04.839563 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6463 14:45:04.861850 <30>[ 12.995963] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6464 14:45:04.874011 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6465 14:45:04.891804 <3>[ 13.025619] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6466 14:45:04.904831 <30>[ 13.038515] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6467 14:45:04.911494 <3>[ 13.043918] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6468 14:45:04.924688 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6469 14:45:04.936315 <3>[ 13.070359] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6470 14:45:04.946981 <30>[ 13.080041] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6471 14:45:04.964737 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSI<3>[ 13.097282] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6472 14:45:04.965176 X Message Queue File System.
6473 14:45:04.984715 <3>[ 13.118516] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6474 14:45:04.991565 <30>[ 13.118822] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6475 14:45:05.001368 <3>[ 13.133465] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6476 14:45:05.025145 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 13.157956] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6477 14:45:05.025623 File System.
6478 14:45:05.042792 <3>[ 13.176673] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 14:45:05.054185 <30>[ 13.186948] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6480 14:45:05.066757 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6481 14:45:05.088594 <30>[ 13.222910] systemd[1]: Started systemd-journald.service - Journal Service.
6482 14:45:05.098413 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6483 14:45:05.119812 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6484 14:45:05.143134 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6485 14:45:05.161325 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6486 14:45:05.187160 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6487 14:45:05.206185 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6488 14:45:05.230495 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6489 14:45:05.254112 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6490 14:45:05.273674 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6491 14:45:05.293671 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6492 14:45:05.314804 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6493 14:45:05.356613 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6494 14:45:05.394734 Mounting [0;1;39msys-kernel-config…ernel Configuration File System..<4>[ 13.520862] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6495 14:45:05.397622 .
6496 14:45:05.404263 <3>[ 13.539665] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6497 14:45:05.421271 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6498 14:45:05.446647 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6499 14:45:05.485411 <46>[ 13.619649] systemd-journald[315]: Received client request to flush runtime journal.
6500 14:45:05.517251 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6501 14:45:05.545251 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6502 14:45:05.814180 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6503 14:45:05.834515 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6504 14:45:05.853245 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6505 14:45:05.876565 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6506 14:45:06.615516 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6507 14:45:06.964485 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6508 14:45:06.986435 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6509 14:45:07.040990 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6510 14:45:07.186699 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6511 14:45:07.205287 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6512 14:45:07.224386 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6513 14:45:07.280948 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6514 14:45:07.308492 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6515 14:45:07.546583 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6516 14:45:07.611963 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6517 14:45:07.661947 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6518 14:45:07.774633 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6519 14:45:07.905112 <4>[ 16.042611] power_supply_show_property: 4 callbacks suppressed
6520 14:45:07.914878 <3>[ 16.042621] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6521 14:45:07.925087 <3>[ 16.043250] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6522 14:45:07.942427 <3>[ 16.076279] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6523 14:45:07.957950 [[0;32m OK [<3>[ 16.093057] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6524 14:45:07.967948 0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6525 14:45:07.983481 <3>[ 16.117390] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6526 14:45:07.994601 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6527 14:45:08.000812 <3>[ 16.135463] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6528 14:45:08.016874 <3>[ 16.150981] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6529 14:45:08.031727 <3>[ 16.165829] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6530 14:45:08.046514 <3>[ 16.180788] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6531 14:45:08.056911 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6532 14:45:08.063419 <3>[ 16.198009] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6533 14:45:08.152993 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6534 14:45:08.176355 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6535 14:45:08.257703 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6536 14:45:08.363834 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6537 14:45:08.396165 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6538 14:45:08.413625 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6539 14:45:08.461284 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6540 14:45:08.486031 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6541 14:45:08.510348 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6542 14:45:08.549063 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6543 14:45:08.583375 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6544 14:45:08.605764 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6545 14:45:08.630240 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6546 14:45:08.655978 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6547 14:45:08.704229 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6548 14:45:08.726388 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6549 14:45:08.750849 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6550 14:45:08.779189 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6551 14:45:08.798774 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6552 14:45:08.817389 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6553 14:45:08.839170 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6554 14:45:08.860137 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6555 14:45:08.876289 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6556 14:45:08.892231 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6557 14:45:08.911427 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6558 14:45:08.928453 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6559 14:45:08.944347 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6560 14:45:08.988404 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6561 14:45:09.012886 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6562 14:45:09.046257 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6563 14:45:09.143209 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6564 14:45:09.170338 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6565 14:45:09.195872 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6566 14:45:09.216026 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6567 14:45:09.233382 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6568 14:45:09.372256 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6569 14:45:09.428907 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6570 14:45:09.458643 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6571 14:45:09.472597 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6572 14:45:09.488342 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6573 14:45:09.522720 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6574 14:45:09.547042 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6575 14:45:09.567937 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6576 14:45:09.588608 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6577 14:45:09.630809 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6578 14:45:09.690112 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6579 14:45:09.766682
6580 14:45:09.770063 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6581 14:45:09.770157
6582 14:45:09.773090 debian-bookworm-arm64 login: root (automatic login)
6583 14:45:09.773181
6584 14:45:10.036238 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue Jun 4 14:26:14 UTC 2024 aarch64
6585 14:45:10.036397
6586 14:45:10.043093 The programs included with the Debian GNU/Linux system are free software;
6587 14:45:10.049241 the exact distribution terms for each program are described in the
6588 14:45:10.052640 individual files in /usr/share/doc/*/copyright.
6589 14:45:10.052745
6590 14:45:10.059294 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6591 14:45:10.062610 permitted by applicable law.
6592 14:45:11.266314 Matched prompt #10: / #
6594 14:45:11.266626 Setting prompt string to ['/ #']
6595 14:45:11.266729 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6597 14:45:11.266944 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6598 14:45:11.267041 start: 2.2.6 expect-shell-connection (timeout 00:03:45) [common]
6599 14:45:11.267119 Setting prompt string to ['/ #']
6600 14:45:11.267186 Forcing a shell prompt, looking for ['/ #']
6602 14:45:11.317482 / #
6603 14:45:11.317891 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6604 14:45:11.318230 Waiting using forced prompt support (timeout 00:02:30)
6605 14:45:11.323586
6606 14:45:11.324328 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6607 14:45:11.324995 start: 2.2.7 export-device-env (timeout 00:03:45) [common]
6609 14:45:11.426608 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7'
6610 14:45:11.432568 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14166984/extract-nfsrootfs-88jf0dr7'
6612 14:45:11.534152 / # export NFS_SERVER_IP='192.168.201.1'
6613 14:45:11.540050 export NFS_SERVER_IP='192.168.201.1'
6614 14:45:11.540816 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6615 14:45:11.541293 end: 2.2 depthcharge-retry (duration 00:01:15) [common]
6616 14:45:11.541785 end: 2 depthcharge-action (duration 00:01:15) [common]
6617 14:45:11.542248 start: 3 lava-test-retry (timeout 00:07:57) [common]
6618 14:45:11.542698 start: 3.1 lava-test-shell (timeout 00:07:57) [common]
6619 14:45:11.543088 Using namespace: common
6621 14:45:11.644092 / # #
6622 14:45:11.644626 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6623 14:45:11.649894 #
6624 14:45:11.650712 Using /lava-14166984
6626 14:45:11.751958 / # export SHELL=/bin/bash
6627 14:45:11.757518 export SHELL=/bin/bash
6629 14:45:11.859015 / # . /lava-14166984/environment
6630 14:45:11.865331 . /lava-14166984/environment
6632 14:45:11.972573 / # /lava-14166984/bin/lava-test-runner /lava-14166984/0
6633 14:45:11.973092 Test shell timeout: 10s (minimum of the action and connection timeout)
6634 14:45:11.978471 /lava-14166984/bin/lava-test-runner /lava-14166984/0
6635 14:45:12.235537 + export TESTRUN_ID=0_timesync-off
6636 14:45:12.238954 + TESTRUN_ID=0_timesync-off
6637 14:45:12.242348 + cd /lava-14166984/0/tests/0_timesync-off
6638 14:45:12.245400 ++ cat uuid
6639 14:45:12.245498 + UUID=14166984_1.6.2.3.1
6640 14:45:12.248991 + set +x
6641 14:45:12.252088 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14166984_1.6.2.3.1>
6642 14:45:12.252359 Received signal: <STARTRUN> 0_timesync-off 14166984_1.6.2.3.1
6643 14:45:12.252442 Starting test lava.0_timesync-off (14166984_1.6.2.3.1)
6644 14:45:12.252536 Skipping test definition patterns.
6645 14:45:12.255046 + systemctl stop systemd-timesyncd
6646 14:45:12.311894 + set +x
6647 14:45:12.315493 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14166984_1.6.2.3.1>
6648 14:45:12.315794 Received signal: <ENDRUN> 0_timesync-off 14166984_1.6.2.3.1
6649 14:45:12.315916 Ending use of test pattern.
6650 14:45:12.316025 Ending test lava.0_timesync-off (14166984_1.6.2.3.1), duration 0.06
6652 14:45:12.387166 + export TESTRUN_ID=1_kselftest-rtc
6653 14:45:12.390546 + TESTRUN_ID=1_kselftest-rtc
6654 14:45:12.393847 + cd /lava-14166984/0/tests/1_kselftest-rtc
6655 14:45:12.396987 ++ cat uuid
6656 14:45:12.400087 + UUID=14166984_1.6.2.3.5
6657 14:45:12.400206 + set +x
6658 14:45:12.403617 <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14166984_1.6.2.3.5>
6659 14:45:12.403907 Received signal: <STARTRUN> 1_kselftest-rtc 14166984_1.6.2.3.5
6660 14:45:12.404025 Starting test lava.1_kselftest-rtc (14166984_1.6.2.3.5)
6661 14:45:12.404150 Skipping test definition patterns.
6662 14:45:12.406898 + cd ./automated/linux/kselftest/
6663 14:45:12.436064 + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6664 14:45:12.465686 INFO: install_deps skipped
6665 14:45:12.959690 --2024-06-04 14:45:12-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21-33-g2e011af54960c/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6666 14:45:12.967083 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6667 14:45:13.096793 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6668 14:45:13.230203 HTTP request sent, awaiting response... 200 OK
6669 14:45:13.233125 Length: 1647736 (1.6M) [application/octet-stream]
6670 14:45:13.236708 Saving to: 'kselftest_armhf.tar.gz'
6671 14:45:13.237129
6672 14:45:13.237498
6673 14:45:13.488284 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6674 14:45:13.748491 kselftest_armhf.tar 2%[ ] 43.57K 165KB/s
6675 14:45:14.136750 kselftest_armhf.tar 13%[=> ] 213.25K 401KB/s
6676 14:45:14.395940 kselftest_armhf.tar 52%[=========> ] 846.75K 911KB/s
6677 14:45:14.402406 kselftest_armhf.tar 92%[=================> ] 1.46M 1.22MB/s
6678 14:45:14.408936 kselftest_armhf.tar 100%[===================>] 1.57M 1.31MB/s in 1.2s
6679 14:45:14.409606
6680 14:45:14.550380 2024-06-04 14:45:14 (1.31 MB/s) - 'kselftest_armhf.tar.gz' saved [1647736/1647736]
6681 14:45:14.550529
6682 14:45:18.881169 skiplist:
6683 14:45:18.884174 ========================================
6684 14:45:18.887551 ========================================
6685 14:45:18.938176 rtc:rtctest
6686 14:45:18.960810 ============== Tests to run ===============
6687 14:45:18.961245 rtc:rtctest
6688 14:45:18.963665 ===========End Tests to run ===============
6689 14:45:18.968540 shardfile-rtc pass
6690 14:45:19.082533 <12>[ 27.219484] kselftest: Running tests in rtc
6691 14:45:19.092489 TAP version 13
6692 14:45:19.109980 1..1
6693 14:45:19.149233 # selftests: rtc: rtctest
6694 14:45:19.638252 # TAP version 13
6695 14:45:19.638894 # 1..8
6696 14:45:19.641512 # # Starting 8 tests from 2 test cases.
6697 14:45:19.644825 # # RUN rtc.date_read ...
6698 14:45:19.651344 # # rtctest.c:49:date_read:Current RTC date/time is 04/06/2024 14:45:18.
6699 14:45:19.654655 # # OK rtc.date_read
6700 14:45:19.658074 # ok 1 rtc.date_read
6701 14:45:19.660953 # # RUN rtc.date_read_loop ...
6702 14:45:19.671127 # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).
6703 14:45:29.528450 <6>[ 37.668662] vaux18: disabling
6704 14:45:29.532063 <6>[ 37.672270] vio28: disabling
6705 14:45:49.327895 # # rtctest.c:115:date_read_loop:Performed 2639 RTC time reads.
6706 14:45:49.331216 # # OK rtc.date_read_loop
6707 14:45:49.334142 # ok 2 rtc.date_read_loop
6708 14:45:49.337326 # # RUN rtc.uie_read ...
6709 14:45:52.311929 # # OK rtc.uie_read
6710 14:45:52.314901 # ok 3 rtc.uie_read
6711 14:45:52.318432 # # RUN rtc.uie_select ...
6712 14:45:55.312066 # # OK rtc.uie_select
6713 14:45:55.315433 # ok 4 rtc.uie_select
6714 14:45:55.318586 # # RUN rtc.alarm_alm_set ...
6715 14:45:55.325181 # # rtctest.c:202:alarm_alm_set:Alarm time now set to 14:45:58.
6716 14:45:55.331562 # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)
6717 14:45:55.335101 # # alarm_alm_set: Test terminated by assertion
6718 14:45:55.338351 # # FAIL rtc.alarm_alm_set
6719 14:45:55.341766 # not ok 5 rtc.alarm_alm_set
6720 14:45:55.344777 # # RUN rtc.alarm_wkalm_set ...
6721 14:45:55.351038 # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 04/06/2024 14:45:58.
6722 14:45:58.314405 # # OK rtc.alarm_wkalm_set
6723 14:45:58.314565 # ok 6 rtc.alarm_wkalm_set
6724 14:45:58.321048 # # RUN rtc.alarm_alm_set_minute ...
6725 14:45:58.327606 # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 14:46:00.
6726 14:45:58.330383 # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)
6727 14:45:58.337201 # # alarm_alm_set_minute: Test terminated by assertion
6728 14:45:58.340747 # # FAIL rtc.alarm_alm_set_minute
6729 14:45:58.343740 # not ok 7 rtc.alarm_alm_set_minute
6730 14:45:58.347016 # # RUN rtc.alarm_wkalm_set_minute ...
6731 14:45:58.356506 # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 04/06/2024 14:46:00.
6732 14:46:00.315940 # # OK rtc.alarm_wkalm_set_minute
6733 14:46:00.319378 # ok 8 rtc.alarm_wkalm_set_minute
6734 14:46:00.322618 # # FAILED: 6 / 8 tests passed.
6735 14:46:00.325834 # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0
6736 14:46:00.329069 not ok 1 selftests: rtc: rtctest # exit=1
6737 14:46:01.918334 rtc_rtctest_rtc_date_read pass
6738 14:46:01.921316 rtc_rtctest_rtc_date_read_loop pass
6739 14:46:01.924474 rtc_rtctest_rtc_uie_read pass
6740 14:46:01.927963 rtc_rtctest_rtc_uie_select pass
6741 14:46:01.930973 rtc_rtctest_rtc_alarm_alm_set fail
6742 14:46:01.934054 rtc_rtctest_rtc_alarm_wkalm_set pass
6743 14:46:01.937547 rtc_rtctest_rtc_alarm_alm_set_minute fail
6744 14:46:01.941011 rtc_rtctest_rtc_alarm_wkalm_set_minute pass
6745 14:46:01.944284 rtc_rtctest fail
6746 14:46:02.015902 + ../../utils/send-to-lava.sh ./output/result.txt
6747 14:46:02.096998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>
6748 14:46:02.097794 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
6750 14:46:02.149596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>
6751 14:46:02.150279 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
6753 14:46:02.212019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>
6754 14:46:02.212815 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
6756 14:46:02.265452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>
6757 14:46:02.266061 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
6759 14:46:02.325278 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
6761 14:46:02.328332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>
6762 14:46:02.389914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>
6763 14:46:02.390688 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
6765 14:46:02.451646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>
6766 14:46:02.452393 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
6768 14:46:02.507673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>
6769 14:46:02.508626 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
6771 14:46:02.567478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>
6772 14:46:02.568162 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
6774 14:46:02.617253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>
6775 14:46:02.617779 + set +x
6776 14:46:02.618488 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
6778 14:46:02.623811 <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14166984_1.6.2.3.5>
6779 14:46:02.624442 Received signal: <ENDRUN> 1_kselftest-rtc 14166984_1.6.2.3.5
6780 14:46:02.624778 Ending use of test pattern.
6781 14:46:02.625068 Ending test lava.1_kselftest-rtc (14166984_1.6.2.3.5), duration 50.22
6783 14:46:02.626225 ok: lava_test_shell seems to have completed
6784 14:46:02.626829 rtc_rtctest: fail
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
shardfile-rtc: pass
6785 14:46:02.627219 end: 3.1 lava-test-shell (duration 00:00:51) [common]
6786 14:46:02.627607 end: 3 lava-test-retry (duration 00:00:51) [common]
6787 14:46:02.627997 start: 4 finalize (timeout 00:07:06) [common]
6788 14:46:02.628406 start: 4.1 power-off (timeout 00:00:30) [common]
6789 14:46:02.629105 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6790 14:46:03.909321 >> Command sent successfully.
6791 14:46:03.913916 Returned 0 in 1 seconds
6792 14:46:04.014554 end: 4.1 power-off (duration 00:00:01) [common]
6794 14:46:04.014957 start: 4.2 read-feedback (timeout 00:07:04) [common]
6796 14:46:04.015589 Listened to connection for namespace 'common' for up to 1s
6797 14:46:05.016371 Finalising connection for namespace 'common'
6798 14:46:05.016956 Disconnecting from shell: Finalise
6799 14:46:05.017294 / #
6800 14:46:05.118243 end: 4.2 read-feedback (duration 00:00:01) [common]
6801 14:46:05.118897 end: 4 finalize (duration 00:00:02) [common]
6802 14:46:05.119485 Cleaning after the job
6803 14:46:05.120138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/ramdisk
6804 14:46:05.129397 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/kernel
6805 14:46:05.162638 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/dtb
6806 14:46:05.163016 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/nfsrootfs
6807 14:46:05.237565 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14166984/tftp-deploy-su0wm_kf/modules
6808 14:46:05.243778 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14166984
6809 14:46:05.863905 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14166984
6810 14:46:05.864117 Job finished correctly