Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:32:52.174242 lava-dispatcher, installed at version: 2024.01
2 22:32:52.175058 start: 0 validate
3 22:32:52.175537 Start time: 2024-11-07 22:32:52.175507+00:00 (UTC)
4 22:32:52.176109 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:32:52.176655 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:32:52.217138 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:32:52.217692 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:32:52.245401 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:32:52.246037 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:32:52.279673 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:32:52.280270 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:32:52.312417 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:32:52.313297 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:32:52.349113 validate duration: 0.17
16 22:32:52.349954 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:32:52.350278 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:32:52.350590 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:32:52.351161 Not decompressing ramdisk as can be used compressed.
20 22:32:52.351604 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 22:32:52.351884 saving as /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/ramdisk/initrd.cpio.gz
22 22:32:52.352232 total size: 5628182 (5 MB)
23 22:32:52.388962 progress 0 % (0 MB)
24 22:32:52.393343 progress 5 % (0 MB)
25 22:32:52.397682 progress 10 % (0 MB)
26 22:32:52.401391 progress 15 % (0 MB)
27 22:32:52.405528 progress 20 % (1 MB)
28 22:32:52.409364 progress 25 % (1 MB)
29 22:32:52.413453 progress 30 % (1 MB)
30 22:32:52.417702 progress 35 % (1 MB)
31 22:32:52.421492 progress 40 % (2 MB)
32 22:32:52.425665 progress 45 % (2 MB)
33 22:32:52.429292 progress 50 % (2 MB)
34 22:32:52.433525 progress 55 % (2 MB)
35 22:32:52.437589 progress 60 % (3 MB)
36 22:32:52.441317 progress 65 % (3 MB)
37 22:32:52.445447 progress 70 % (3 MB)
38 22:32:52.449216 progress 75 % (4 MB)
39 22:32:52.453347 progress 80 % (4 MB)
40 22:32:52.457053 progress 85 % (4 MB)
41 22:32:52.461156 progress 90 % (4 MB)
42 22:32:52.465147 progress 95 % (5 MB)
43 22:32:52.468482 progress 100 % (5 MB)
44 22:32:52.469142 5 MB downloaded in 0.12 s (45.92 MB/s)
45 22:32:52.469711 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:32:52.470595 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:32:52.470884 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:32:52.471153 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:32:52.471632 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kernel/Image
51 22:32:52.471884 saving as /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/kernel/Image
52 22:32:52.472132 total size: 45775360 (43 MB)
53 22:32:52.472350 No compression specified
54 22:32:52.505566 progress 0 % (0 MB)
55 22:32:52.535048 progress 5 % (2 MB)
56 22:32:52.563667 progress 10 % (4 MB)
57 22:32:52.592251 progress 15 % (6 MB)
58 22:32:52.620488 progress 20 % (8 MB)
59 22:32:52.648633 progress 25 % (10 MB)
60 22:32:52.676735 progress 30 % (13 MB)
61 22:32:52.704559 progress 35 % (15 MB)
62 22:32:52.733182 progress 40 % (17 MB)
63 22:32:52.761585 progress 45 % (19 MB)
64 22:32:52.789787 progress 50 % (21 MB)
65 22:32:52.818280 progress 55 % (24 MB)
66 22:32:52.846411 progress 60 % (26 MB)
67 22:32:52.874615 progress 65 % (28 MB)
68 22:32:52.903650 progress 70 % (30 MB)
69 22:32:52.931947 progress 75 % (32 MB)
70 22:32:52.959810 progress 80 % (34 MB)
71 22:32:52.988536 progress 85 % (37 MB)
72 22:32:53.016926 progress 90 % (39 MB)
73 22:32:53.045392 progress 95 % (41 MB)
74 22:32:53.072634 progress 100 % (43 MB)
75 22:32:53.073407 43 MB downloaded in 0.60 s (72.61 MB/s)
76 22:32:53.073892 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:32:53.074712 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:32:53.074990 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:32:53.075259 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:32:53.075718 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:32:53.076006 saving as /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:32:53.076223 total size: 54703 (0 MB)
84 22:32:53.076433 No compression specified
85 22:32:53.116273 progress 59 % (0 MB)
86 22:32:53.117207 progress 100 % (0 MB)
87 22:32:53.117783 0 MB downloaded in 0.04 s (1.26 MB/s)
88 22:32:53.118316 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:32:53.119170 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:32:53.119473 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:32:53.119744 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:32:53.120233 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 22:32:53.120484 saving as /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/nfsrootfs/full.rootfs.tar
95 22:32:53.120690 total size: 107552908 (102 MB)
96 22:32:53.120900 Using unxz to decompress xz
97 22:32:53.156331 progress 0 % (0 MB)
98 22:32:53.870411 progress 5 % (5 MB)
99 22:32:54.624682 progress 10 % (10 MB)
100 22:32:55.354559 progress 15 % (15 MB)
101 22:32:56.137224 progress 20 % (20 MB)
102 22:32:56.786394 progress 25 % (25 MB)
103 22:32:57.407456 progress 30 % (30 MB)
104 22:32:58.149666 progress 35 % (35 MB)
105 22:32:58.509386 progress 40 % (41 MB)
106 22:32:59.019614 progress 45 % (46 MB)
107 22:32:59.874647 progress 50 % (51 MB)
108 22:33:00.703190 progress 55 % (56 MB)
109 22:33:01.515007 progress 60 % (61 MB)
110 22:33:02.277112 progress 65 % (66 MB)
111 22:33:03.016445 progress 70 % (71 MB)
112 22:33:03.789498 progress 75 % (76 MB)
113 22:33:04.472387 progress 80 % (82 MB)
114 22:33:05.179576 progress 85 % (87 MB)
115 22:33:05.914749 progress 90 % (92 MB)
116 22:33:06.624945 progress 95 % (97 MB)
117 22:33:07.362148 progress 100 % (102 MB)
118 22:33:07.375045 102 MB downloaded in 14.25 s (7.20 MB/s)
119 22:33:07.376109 end: 1.4.1 http-download (duration 00:00:14) [common]
121 22:33:07.377888 end: 1.4 download-retry (duration 00:00:14) [common]
122 22:33:07.378467 start: 1.5 download-retry (timeout 00:09:45) [common]
123 22:33:07.379031 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 22:33:07.380128 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/modules.tar.xz
125 22:33:07.380678 saving as /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/modules/modules.tar
126 22:33:07.381089 total size: 11605964 (11 MB)
127 22:33:07.381567 Using unxz to decompress xz
128 22:33:07.428806 progress 0 % (0 MB)
129 22:33:07.497804 progress 5 % (0 MB)
130 22:33:07.579085 progress 10 % (1 MB)
131 22:33:07.680715 progress 15 % (1 MB)
132 22:33:07.786109 progress 20 % (2 MB)
133 22:33:07.887307 progress 25 % (2 MB)
134 22:33:07.968861 progress 30 % (3 MB)
135 22:33:08.048864 progress 35 % (3 MB)
136 22:33:08.130450 progress 40 % (4 MB)
137 22:33:08.211560 progress 45 % (5 MB)
138 22:33:08.301485 progress 50 % (5 MB)
139 22:33:08.384282 progress 55 % (6 MB)
140 22:33:08.475529 progress 60 % (6 MB)
141 22:33:08.564585 progress 65 % (7 MB)
142 22:33:08.646402 progress 70 % (7 MB)
143 22:33:08.733105 progress 75 % (8 MB)
144 22:33:08.822096 progress 80 % (8 MB)
145 22:33:08.907516 progress 85 % (9 MB)
146 22:33:08.991879 progress 90 % (9 MB)
147 22:33:09.075031 progress 95 % (10 MB)
148 22:33:09.158316 progress 100 % (11 MB)
149 22:33:09.171304 11 MB downloaded in 1.79 s (6.18 MB/s)
150 22:33:09.172371 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:33:09.174002 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:33:09.174522 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 22:33:09.175048 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 22:33:18.823745 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956186/extract-nfsrootfs-89r2xpft
156 22:33:18.824379 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 22:33:18.824672 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 22:33:18.825370 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt
159 22:33:18.825837 makedir: /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin
160 22:33:18.826181 makedir: /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/tests
161 22:33:18.826495 makedir: /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/results
162 22:33:18.826832 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-add-keys
163 22:33:18.827384 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-add-sources
164 22:33:18.827917 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-background-process-start
165 22:33:18.828463 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-background-process-stop
166 22:33:18.829018 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-common-functions
167 22:33:18.829545 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-echo-ipv4
168 22:33:18.830070 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-install-packages
169 22:33:18.830590 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-installed-packages
170 22:33:18.831076 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-os-build
171 22:33:18.831550 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-probe-channel
172 22:33:18.832067 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-probe-ip
173 22:33:18.832600 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-target-ip
174 22:33:18.833114 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-target-mac
175 22:33:18.833633 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-target-storage
176 22:33:18.834170 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-case
177 22:33:18.834710 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-event
178 22:33:18.835220 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-feedback
179 22:33:18.835721 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-raise
180 22:33:18.836321 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-reference
181 22:33:18.836893 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-runner
182 22:33:18.837441 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-set
183 22:33:18.837950 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-test-shell
184 22:33:18.838473 Updating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-install-packages (oe)
185 22:33:18.839031 Updating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/bin/lava-installed-packages (oe)
186 22:33:18.839496 Creating /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/environment
187 22:33:18.839885 LAVA metadata
188 22:33:18.840187 - LAVA_JOB_ID=956186
189 22:33:18.840421 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:33:18.840811 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 22:33:18.841873 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:33:18.842198 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 22:33:18.842408 skipped lava-vland-overlay
194 22:33:18.842651 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:33:18.842919 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 22:33:18.843145 skipped lava-multinode-overlay
197 22:33:18.843394 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:33:18.843652 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 22:33:18.843907 Loading test definitions
200 22:33:18.844217 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 22:33:18.844455 Using /lava-956186 at stage 0
202 22:33:18.845654 uuid=956186_1.6.2.4.1 testdef=None
203 22:33:18.845960 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:33:18.846227 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 22:33:18.848037 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:33:18.848848 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 22:33:18.851146 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:33:18.852014 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 22:33:18.854208 runner path: /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/0/tests/0_dmesg test_uuid 956186_1.6.2.4.1
212 22:33:18.854768 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:33:18.855532 Creating lava-test-runner.conf files
215 22:33:18.855740 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956186/lava-overlay-u2d7fhqt/lava-956186/0 for stage 0
216 22:33:18.856133 - 0_dmesg
217 22:33:18.856497 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:33:18.856784 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 22:33:18.878725 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:33:18.879111 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 22:33:18.879379 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:33:18.879655 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:33:18.879924 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 22:33:19.497142 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:33:19.497599 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 22:33:19.497847 extracting modules file /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956186/extract-nfsrootfs-89r2xpft
227 22:33:21.031960 extracting modules file /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956186/extract-overlay-ramdisk-5gc8tkos/ramdisk
228 22:33:22.650864 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:33:22.651367 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 22:33:22.651650 [common] Applying overlay to NFS
231 22:33:22.651908 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956186/compress-overlay-0n9y3d6c/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956186/extract-nfsrootfs-89r2xpft
232 22:33:22.689118 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:33:22.689542 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 22:33:22.689859 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 22:33:22.690098 Converting downloaded kernel to a uImage
236 22:33:22.690399 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/kernel/Image /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/kernel/uImage
237 22:33:23.143973 output: Image Name:
238 22:33:23.144423 output: Created: Thu Nov 7 22:33:22 2024
239 22:33:23.144629 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:33:23.144834 output: Data Size: 45775360 Bytes = 44702.50 KiB = 43.65 MiB
241 22:33:23.145038 output: Load Address: 01080000
242 22:33:23.145239 output: Entry Point: 01080000
243 22:33:23.145440 output:
244 22:33:23.145775 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:33:23.146043 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:33:23.146309 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 22:33:23.146565 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:33:23.146822 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 22:33:23.147075 Building ramdisk /var/lib/lava/dispatcher/tmp/956186/extract-overlay-ramdisk-5gc8tkos/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956186/extract-overlay-ramdisk-5gc8tkos/ramdisk
250 22:33:25.500560 >> 166791 blocks
251 22:33:33.249318 Adding RAMdisk u-boot header.
252 22:33:33.250026 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956186/extract-overlay-ramdisk-5gc8tkos/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956186/extract-overlay-ramdisk-5gc8tkos/ramdisk.cpio.gz.uboot
253 22:33:33.498892 output: Image Name:
254 22:33:33.499565 output: Created: Thu Nov 7 22:33:33 2024
255 22:33:33.500084 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:33:33.500552 output: Data Size: 23433197 Bytes = 22883.98 KiB = 22.35 MiB
257 22:33:33.500999 output: Load Address: 00000000
258 22:33:33.501436 output: Entry Point: 00000000
259 22:33:33.501872 output:
260 22:33:33.502976 rename /var/lib/lava/dispatcher/tmp/956186/extract-overlay-ramdisk-5gc8tkos/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot
261 22:33:33.503761 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:33:33.504416 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 22:33:33.505013 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 22:33:33.505530 No LXC device requested
265 22:33:33.506091 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:33:33.506657 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 22:33:33.507207 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:33:33.507664 Checking files for TFTP limit of 4294967296 bytes.
269 22:33:33.510625 end: 1 tftp-deploy (duration 00:00:41) [common]
270 22:33:33.511264 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:33:33.511841 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:33:33.512492 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:33:33.513052 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:33:33.513634 Using kernel file from prepare-kernel: 956186/tftp-deploy-649qlazs/kernel/uImage
275 22:33:33.514335 substitutions:
276 22:33:33.514789 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:33:33.515238 - {DTB_ADDR}: 0x01070000
278 22:33:33.515682 - {DTB}: 956186/tftp-deploy-649qlazs/dtb/meson-g12b-a311d-libretech-cc.dtb
279 22:33:33.516153 - {INITRD}: 956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot
280 22:33:33.516597 - {KERNEL_ADDR}: 0x01080000
281 22:33:33.517031 - {KERNEL}: 956186/tftp-deploy-649qlazs/kernel/uImage
282 22:33:33.517469 - {LAVA_MAC}: None
283 22:33:33.517945 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956186/extract-nfsrootfs-89r2xpft
284 22:33:33.518387 - {NFS_SERVER_IP}: 192.168.6.2
285 22:33:33.518819 - {PRESEED_CONFIG}: None
286 22:33:33.519252 - {PRESEED_LOCAL}: None
287 22:33:33.519679 - {RAMDISK_ADDR}: 0x08000000
288 22:33:33.520133 - {RAMDISK}: 956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot
289 22:33:33.520566 - {ROOT_PART}: None
290 22:33:33.520996 - {ROOT}: None
291 22:33:33.521426 - {SERVER_IP}: 192.168.6.2
292 22:33:33.521852 - {TEE_ADDR}: 0x83000000
293 22:33:33.522278 - {TEE}: None
294 22:33:33.522706 Parsed boot commands:
295 22:33:33.523121 - setenv autoload no
296 22:33:33.523546 - setenv initrd_high 0xffffffff
297 22:33:33.523973 - setenv fdt_high 0xffffffff
298 22:33:33.524463 - dhcp
299 22:33:33.524896 - setenv serverip 192.168.6.2
300 22:33:33.525323 - tftpboot 0x01080000 956186/tftp-deploy-649qlazs/kernel/uImage
301 22:33:33.525749 - tftpboot 0x08000000 956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot
302 22:33:33.526174 - tftpboot 0x01070000 956186/tftp-deploy-649qlazs/dtb/meson-g12b-a311d-libretech-cc.dtb
303 22:33:33.526602 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956186/extract-nfsrootfs-89r2xpft,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:33:33.527041 - bootm 0x01080000 0x08000000 0x01070000
305 22:33:33.527598 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:33:33.529271 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:33:33.529738 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 22:33:33.547129 Setting prompt string to ['lava-test: # ']
310 22:33:33.548814 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:33:33.549536 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:33:33.550252 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:33:33.550945 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:33:33.552247 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 22:33:33.592319 >> OK - accepted request
316 22:33:33.594366 Returned 0 in 0 seconds
317 22:33:33.695241 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:33:33.697065 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:33:33.697676 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:33:33.698246 Setting prompt string to ['Hit any key to stop autoboot']
322 22:33:33.698759 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:33:33.700464 Trying 192.168.56.21...
324 22:33:33.701001 Connected to conserv1.
325 22:33:33.701473 Escape character is '^]'.
326 22:33:33.701941
327 22:33:33.702408 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 22:33:33.702880
329 22:33:45.171626 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
330 22:33:45.172386 bl2_stage_init 0x81
331 22:33:45.177143 hw id: 0x0000 - pwm id 0x01
332 22:33:45.177637 bl2_stage_init 0xc1
333 22:33:45.178078 bl2_stage_init 0x02
334 22:33:45.178512
335 22:33:45.182728 L0:00000000
336 22:33:45.183195 L1:20000703
337 22:33:45.183631 L2:00008067
338 22:33:45.184096 L3:14000000
339 22:33:45.184545 B2:00402000
340 22:33:45.188258 B1:e0f83180
341 22:33:45.188719
342 22:33:45.189153 TE: 58150
343 22:33:45.189587
344 22:33:45.193998 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
345 22:33:45.194461
346 22:33:45.194892 Board ID = 1
347 22:33:45.199520 Set A53 clk to 24M
348 22:33:45.199975 Set A73 clk to 24M
349 22:33:45.200450 Set clk81 to 24M
350 22:33:45.205194 A53 clk: 1200 MHz
351 22:33:45.205650 A73 clk: 1200 MHz
352 22:33:45.206080 CLK81: 166.6M
353 22:33:45.206504 smccc: 00012aac
354 22:33:45.210671 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
355 22:33:45.216336 board id: 1
356 22:33:45.221956 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
357 22:33:45.232629 fw parse done
358 22:33:45.238571 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
359 22:33:45.281237 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
360 22:33:45.292161 PIEI prepare done
361 22:33:45.292624 fastboot data load
362 22:33:45.293057 fastboot data verify
363 22:33:45.297813 verify result: 266
364 22:33:45.303494 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
365 22:33:45.303973 LPDDR4 probe
366 22:33:45.304456 ddr clk to 1584MHz
367 22:33:45.311382 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
368 22:33:45.348642
369 22:33:45.349134 dmc_version 0001
370 22:33:45.355371 Check phy result
371 22:33:45.361237 INFO : End of CA training
372 22:33:45.361714 INFO : End of initialization
373 22:33:45.366759 INFO : Training has run successfully!
374 22:33:45.367223 Check phy result
375 22:33:45.372444 INFO : End of initialization
376 22:33:45.372906 INFO : End of read enable training
377 22:33:45.378000 INFO : End of fine write leveling
378 22:33:45.383635 INFO : End of Write leveling coarse delay
379 22:33:45.384130 INFO : Training has run successfully!
380 22:33:45.384574 Check phy result
381 22:33:45.389198 INFO : End of initialization
382 22:33:45.389656 INFO : End of read dq deskew training
383 22:33:45.394791 INFO : End of MPR read delay center optimization
384 22:33:45.400430 INFO : End of write delay center optimization
385 22:33:45.405999 INFO : End of read delay center optimization
386 22:33:45.406479 INFO : End of max read latency training
387 22:33:45.411619 INFO : Training has run successfully!
388 22:33:45.412124 1D training succeed
389 22:33:45.420879 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:33:45.468422 Check phy result
391 22:33:45.468988 INFO : End of initialization
392 22:33:45.490096 INFO : End of 2D read delay Voltage center optimization
393 22:33:45.509302 INFO : End of 2D read delay Voltage center optimization
394 22:33:45.561350 INFO : End of 2D write delay Voltage center optimization
395 22:33:45.610514 INFO : End of 2D write delay Voltage center optimization
396 22:33:45.616242 INFO : Training has run successfully!
397 22:33:45.616980
398 22:33:45.617535 channel==0
399 22:33:45.621582 RxClkDly_Margin_A0==88 ps 9
400 22:33:45.622202 TxDqDly_Margin_A0==98 ps 10
401 22:33:45.627275 RxClkDly_Margin_A1==88 ps 9
402 22:33:45.627897 TxDqDly_Margin_A1==98 ps 10
403 22:33:45.628529 TrainedVREFDQ_A0==74
404 22:33:45.632842 TrainedVREFDQ_A1==74
405 22:33:45.633470 VrefDac_Margin_A0==25
406 22:33:45.634022 DeviceVref_Margin_A0==40
407 22:33:45.638448 VrefDac_Margin_A1==25
408 22:33:45.639047 DeviceVref_Margin_A1==40
409 22:33:45.639589
410 22:33:45.640161
411 22:33:45.644246 channel==1
412 22:33:45.644971 RxClkDly_Margin_A0==88 ps 9
413 22:33:45.645572 TxDqDly_Margin_A0==98 ps 10
414 22:33:45.649747 RxClkDly_Margin_A1==88 ps 9
415 22:33:45.650430 TxDqDly_Margin_A1==88 ps 9
416 22:33:45.655248 TrainedVREFDQ_A0==77
417 22:33:45.655899 TrainedVREFDQ_A1==77
418 22:33:45.656527 VrefDac_Margin_A0==23
419 22:33:45.660831 DeviceVref_Margin_A0==37
420 22:33:45.661432 VrefDac_Margin_A1==24
421 22:33:45.666354 DeviceVref_Margin_A1==37
422 22:33:45.666941
423 22:33:45.667456 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
424 22:33:45.667962
425 22:33:45.699976 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
426 22:33:45.700723 2D training succeed
427 22:33:45.705587 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
428 22:33:45.711148 auto size-- 65535DDR cs0 size: 2048MB
429 22:33:45.711746 DDR cs1 size: 2048MB
430 22:33:45.716754 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
431 22:33:45.717344 cs0 DataBus test pass
432 22:33:45.722341 cs1 DataBus test pass
433 22:33:45.722944 cs0 AddrBus test pass
434 22:33:45.723470 cs1 AddrBus test pass
435 22:33:45.724031
436 22:33:45.728036 100bdlr_step_size ps== 420
437 22:33:45.728667 result report
438 22:33:45.733555 boot times 0Enable ddr reg access
439 22:33:45.738807 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
440 22:33:45.752267 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
441 22:33:46.324539 0.0;M3 CHK:0;cm4_sp_mode 0
442 22:33:46.325315 MVN_1=0x00000000
443 22:33:46.329796 MVN_2=0x00000000
444 22:33:46.335620 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
445 22:33:46.336282 OPS=0x10
446 22:33:46.336827 ring efuse init
447 22:33:46.337369 chipver efuse init
448 22:33:46.341288 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
449 22:33:46.346946 [0.018960 Inits done]
450 22:33:46.347608 secure task start!
451 22:33:46.348186 high task start!
452 22:33:46.351464 low task start!
453 22:33:46.352092 run into bl31
454 22:33:46.358158 NOTICE: BL31: v1.3(release):4fc40b1
455 22:33:46.365926 NOTICE: BL31: Built : 15:58:17, May 22 2019
456 22:33:46.366544 NOTICE: BL31: G12A normal boot!
457 22:33:46.391290 NOTICE: BL31: BL33 decompress pass
458 22:33:46.396987 ERROR: Error initializing runtime service opteed_fast
459 22:33:47.629978
460 22:33:47.630794
461 22:33:47.638327 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
462 22:33:47.638973
463 22:33:47.639513 Model: Libre Computer AML-A311D-CC Alta
464 22:33:47.846823 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
465 22:33:47.870071 DRAM: 2 GiB (effective 3.8 GiB)
466 22:33:48.013036 Core: 408 devices, 31 uclasses, devicetree: separate
467 22:33:48.018905 WDT: Not starting watchdog@f0d0
468 22:33:48.051095 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
469 22:33:48.063489 Loading Environment from FAT... Card did not respond to voltage select! : -110
470 22:33:48.068497 ** Bad device specification mmc 0 **
471 22:33:48.078829 Card did not respond to voltage select! : -110
472 22:33:48.086411 ** Bad device specification mmc 0 **
473 22:33:48.086998 Couldn't find partition mmc 0
474 22:33:48.094803 Card did not respond to voltage select! : -110
475 22:33:48.100331 ** Bad device specification mmc 0 **
476 22:33:48.100911 Couldn't find partition mmc 0
477 22:33:48.105415 Error: could not access storage.
478 22:33:49.371850 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
479 22:33:49.372674 bl2_stage_init 0x01
480 22:33:49.373216 bl2_stage_init 0x81
481 22:33:49.377365 hw id: 0x0000 - pwm id 0x01
482 22:33:49.377960 bl2_stage_init 0xc1
483 22:33:49.378492 bl2_stage_init 0x02
484 22:33:49.379007
485 22:33:49.383137 L0:00000000
486 22:33:49.383726 L1:20000703
487 22:33:49.384309 L2:00008067
488 22:33:49.384825 L3:14000000
489 22:33:49.385958 B2:00402000
490 22:33:49.386520 B1:e0f83180
491 22:33:49.387047
492 22:33:49.387556 TE: 58159
493 22:33:49.388110
494 22:33:49.396936 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 22:33:49.397536
496 22:33:49.398079 Board ID = 1
497 22:33:49.398595 Set A53 clk to 24M
498 22:33:49.399109 Set A73 clk to 24M
499 22:33:49.402530 Set clk81 to 24M
500 22:33:49.403103 A53 clk: 1200 MHz
501 22:33:49.403653 A73 clk: 1200 MHz
502 22:33:49.406077 CLK81: 166.6M
503 22:33:49.406642 smccc: 00012ab5
504 22:33:49.411600 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 22:33:49.417163 board id: 1
506 22:33:49.421527 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 22:33:49.433047 fw parse done
508 22:33:49.438705 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 22:33:49.480711 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 22:33:49.492654 PIEI prepare done
511 22:33:49.493293 fastboot data load
512 22:33:49.493827 fastboot data verify
513 22:33:49.498209 verify result: 266
514 22:33:49.503811 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 22:33:49.504476 LPDDR4 probe
516 22:33:49.505001 ddr clk to 1584MHz
517 22:33:49.510817 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 22:33:49.548303
519 22:33:49.549016 dmc_version 0001
520 22:33:49.555406 Check phy result
521 22:33:49.561550 INFO : End of CA training
522 22:33:49.562200 INFO : End of initialization
523 22:33:49.567211 INFO : Training has run successfully!
524 22:33:49.567814 Check phy result
525 22:33:49.572859 INFO : End of initialization
526 22:33:49.573444 INFO : End of read enable training
527 22:33:49.578384 INFO : End of fine write leveling
528 22:33:49.583939 INFO : End of Write leveling coarse delay
529 22:33:49.584537 INFO : Training has run successfully!
530 22:33:49.585052 Check phy result
531 22:33:49.589576 INFO : End of initialization
532 22:33:49.590135 INFO : End of read dq deskew training
533 22:33:49.595137 INFO : End of MPR read delay center optimization
534 22:33:49.600883 INFO : End of write delay center optimization
535 22:33:49.606374 INFO : End of read delay center optimization
536 22:33:49.607020 INFO : End of max read latency training
537 22:33:49.611950 INFO : Training has run successfully!
538 22:33:49.612574 1D training succeed
539 22:33:49.620655 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:33:49.667869 Check phy result
541 22:33:49.668589 INFO : End of initialization
542 22:33:49.689734 INFO : End of 2D read delay Voltage center optimization
543 22:33:49.710216 INFO : End of 2D read delay Voltage center optimization
544 22:33:49.762148 INFO : End of 2D write delay Voltage center optimization
545 22:33:49.812264 INFO : End of 2D write delay Voltage center optimization
546 22:33:49.817770 INFO : Training has run successfully!
547 22:33:49.818114
548 22:33:49.818362 channel==0
549 22:33:49.823410 RxClkDly_Margin_A0==88 ps 9
550 22:33:49.823828 TxDqDly_Margin_A0==98 ps 10
551 22:33:49.826773 RxClkDly_Margin_A1==88 ps 9
552 22:33:49.827149 TxDqDly_Margin_A1==98 ps 10
553 22:33:49.832398 TrainedVREFDQ_A0==74
554 22:33:49.832785 TrainedVREFDQ_A1==75
555 22:33:49.837855 VrefDac_Margin_A0==25
556 22:33:49.838284 DeviceVref_Margin_A0==40
557 22:33:49.838664 VrefDac_Margin_A1==25
558 22:33:49.843569 DeviceVref_Margin_A1==39
559 22:33:49.843869
560 22:33:49.844286
561 22:33:49.844548 channel==1
562 22:33:49.844776 RxClkDly_Margin_A0==98 ps 10
563 22:33:49.849099 TxDqDly_Margin_A0==98 ps 10
564 22:33:49.849392 RxClkDly_Margin_A1==98 ps 10
565 22:33:49.854633 TxDqDly_Margin_A1==98 ps 10
566 22:33:49.854965 TrainedVREFDQ_A0==77
567 22:33:49.855210 TrainedVREFDQ_A1==77
568 22:33:49.860187 VrefDac_Margin_A0==22
569 22:33:49.860481 DeviceVref_Margin_A0==37
570 22:33:49.865815 VrefDac_Margin_A1==24
571 22:33:49.866150 DeviceVref_Margin_A1==37
572 22:33:49.866407
573 22:33:49.871305 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 22:33:49.871635
575 22:33:49.899320 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
576 22:33:49.905093 2D training succeed
577 22:33:49.910610 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 22:33:49.910905 auto size-- 65535DDR cs0 size: 2048MB
579 22:33:49.916064 DDR cs1 size: 2048MB
580 22:33:49.916360 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 22:33:49.921688 cs0 DataBus test pass
582 22:33:49.922118 cs1 DataBus test pass
583 22:33:49.922472 cs0 AddrBus test pass
584 22:33:49.927338 cs1 AddrBus test pass
585 22:33:49.927732
586 22:33:49.928111 100bdlr_step_size ps== 420
587 22:33:49.928492 result report
588 22:33:49.932922 boot times 0Enable ddr reg access
589 22:33:49.940835 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 22:33:49.953633 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 22:33:50.528075 0.0;M3 CHK:0;cm4_sp_mode 0
592 22:33:50.528852 MVN_1=0x00000000
593 22:33:50.533734 MVN_2=0x00000000
594 22:33:50.539359 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 22:33:50.539961 OPS=0x10
596 22:33:50.540493 ring efuse init
597 22:33:50.540954 chipver efuse init
598 22:33:50.544866 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 22:33:50.550411 [0.018960 Inits done]
600 22:33:50.550929 secure task start!
601 22:33:50.551327 high task start!
602 22:33:50.554797 low task start!
603 22:33:50.555266 run into bl31
604 22:33:50.561666 NOTICE: BL31: v1.3(release):4fc40b1
605 22:33:50.568609 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 22:33:50.569134 NOTICE: BL31: G12A normal boot!
607 22:33:50.594792 NOTICE: BL31: BL33 decompress pass
608 22:33:50.600093 ERROR: Error initializing runtime service opteed_fast
609 22:33:51.833387
610 22:33:51.834003
611 22:33:51.841661 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 22:33:51.842143
613 22:33:51.842553 Model: Libre Computer AML-A311D-CC Alta
614 22:33:52.050140 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 22:33:52.073560 DRAM: 2 GiB (effective 3.8 GiB)
616 22:33:52.216627 Core: 408 devices, 31 uclasses, devicetree: separate
617 22:33:52.222175 WDT: Not starting watchdog@f0d0
618 22:33:52.254772 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 22:33:52.267190 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 22:33:52.271617 ** Bad device specification mmc 0 **
621 22:33:52.282591 Card did not respond to voltage select! : -110
622 22:33:52.289704 ** Bad device specification mmc 0 **
623 22:33:52.290204 Couldn't find partition mmc 0
624 22:33:52.298517 Card did not respond to voltage select! : -110
625 22:33:52.304018 ** Bad device specification mmc 0 **
626 22:33:52.304599 Couldn't find partition mmc 0
627 22:33:52.308774 Error: could not access storage.
628 22:33:52.651099 Net: eth0: ethernet@ff3f0000
629 22:33:52.651715 starting USB...
630 22:33:52.903342 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 22:33:52.903916 Starting the controller
632 22:33:52.909863 USB XHCI 1.10
633 22:33:54.621836 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 22:33:54.622437 bl2_stage_init 0x01
635 22:33:54.622867 bl2_stage_init 0x81
636 22:33:54.627413 hw id: 0x0000 - pwm id 0x01
637 22:33:54.627865 bl2_stage_init 0xc1
638 22:33:54.628378 bl2_stage_init 0x02
639 22:33:54.628814
640 22:33:54.633100 L0:00000000
641 22:33:54.633547 L1:20000703
642 22:33:54.633955 L2:00008067
643 22:33:54.634356 L3:14000000
644 22:33:54.638635 B2:00402000
645 22:33:54.639082 B1:e0f83180
646 22:33:54.639491
647 22:33:54.639893 TE: 58167
648 22:33:54.640331
649 22:33:54.644252 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 22:33:54.644695
651 22:33:54.645100 Board ID = 1
652 22:33:54.649809 Set A53 clk to 24M
653 22:33:54.650261 Set A73 clk to 24M
654 22:33:54.650668 Set clk81 to 24M
655 22:33:54.655415 A53 clk: 1200 MHz
656 22:33:54.655854 A73 clk: 1200 MHz
657 22:33:54.656289 CLK81: 166.6M
658 22:33:54.656690 smccc: 00012abe
659 22:33:54.661106 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 22:33:54.666575 board id: 1
661 22:33:54.671946 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 22:33:54.683143 fw parse done
663 22:33:54.688727 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 22:33:54.730979 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 22:33:54.742739 PIEI prepare done
666 22:33:54.743241 fastboot data load
667 22:33:54.743669 fastboot data verify
668 22:33:54.748292 verify result: 266
669 22:33:54.753848 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 22:33:54.754299 LPDDR4 probe
671 22:33:54.754732 ddr clk to 1584MHz
672 22:33:54.761156 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 22:33:54.798456
674 22:33:54.798953 dmc_version 0001
675 22:33:54.804862 Check phy result
676 22:33:54.811655 INFO : End of CA training
677 22:33:54.812131 INFO : End of initialization
678 22:33:54.817271 INFO : Training has run successfully!
679 22:33:54.817721 Check phy result
680 22:33:54.822881 INFO : End of initialization
681 22:33:54.823330 INFO : End of read enable training
682 22:33:54.826189 INFO : End of fine write leveling
683 22:33:54.831708 INFO : End of Write leveling coarse delay
684 22:33:54.837356 INFO : Training has run successfully!
685 22:33:54.837854 Check phy result
686 22:33:54.838273 INFO : End of initialization
687 22:33:54.842930 INFO : End of read dq deskew training
688 22:33:54.848476 INFO : End of MPR read delay center optimization
689 22:33:54.848934 INFO : End of write delay center optimization
690 22:33:54.854151 INFO : End of read delay center optimization
691 22:33:54.859733 INFO : End of max read latency training
692 22:33:54.860219 INFO : Training has run successfully!
693 22:33:54.865303 1D training succeed
694 22:33:54.871159 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:33:54.918069 Check phy result
696 22:33:54.918527 INFO : End of initialization
697 22:33:54.941289 INFO : End of 2D read delay Voltage center optimization
698 22:33:54.961065 INFO : End of 2D read delay Voltage center optimization
699 22:33:55.013397 INFO : End of 2D write delay Voltage center optimization
700 22:33:55.063255 INFO : End of 2D write delay Voltage center optimization
701 22:33:55.068763 INFO : Training has run successfully!
702 22:33:55.069221
703 22:33:55.069634 channel==0
704 22:33:55.074401 RxClkDly_Margin_A0==88 ps 9
705 22:33:55.074841 TxDqDly_Margin_A0==98 ps 10
706 22:33:55.079888 RxClkDly_Margin_A1==88 ps 9
707 22:33:55.080367 TxDqDly_Margin_A1==98 ps 10
708 22:33:55.080778 TrainedVREFDQ_A0==74
709 22:33:55.085508 TrainedVREFDQ_A1==74
710 22:33:55.085941 VrefDac_Margin_A0==24
711 22:33:55.086342 DeviceVref_Margin_A0==40
712 22:33:55.091081 VrefDac_Margin_A1==24
713 22:33:55.091519 DeviceVref_Margin_A1==40
714 22:33:55.091920
715 22:33:55.092361
716 22:33:55.096716 channel==1
717 22:33:55.097150 RxClkDly_Margin_A0==98 ps 10
718 22:33:55.097554 TxDqDly_Margin_A0==88 ps 9
719 22:33:55.102335 RxClkDly_Margin_A1==98 ps 10
720 22:33:55.102764 TxDqDly_Margin_A1==88 ps 9
721 22:33:55.107922 TrainedVREFDQ_A0==76
722 22:33:55.108385 TrainedVREFDQ_A1==77
723 22:33:55.108793 VrefDac_Margin_A0==22
724 22:33:55.113494 DeviceVref_Margin_A0==38
725 22:33:55.113930 VrefDac_Margin_A1==23
726 22:33:55.119063 DeviceVref_Margin_A1==37
727 22:33:55.119495
728 22:33:55.119906 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 22:33:55.120348
730 22:33:55.152658 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000017 00000018 00000015 00000017 00000018 00000017 00000018 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 0000001a 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
731 22:33:55.153140 2D training succeed
732 22:33:55.158246 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 22:33:55.163846 auto size-- 65535DDR cs0 size: 2048MB
734 22:33:55.164323 DDR cs1 size: 2048MB
735 22:33:55.169457 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 22:33:55.169908 cs0 DataBus test pass
737 22:33:55.175021 cs1 DataBus test pass
738 22:33:55.175452 cs0 AddrBus test pass
739 22:33:55.175855 cs1 AddrBus test pass
740 22:33:55.176291
741 22:33:55.180721 100bdlr_step_size ps== 420
742 22:33:55.181161 result report
743 22:33:55.186247 boot times 0Enable ddr reg access
744 22:33:55.190704 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 22:33:55.204252 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 22:33:55.778134 0.0;M3 CHK:0;cm4_sp_mode 0
747 22:33:55.778547 MVN_1=0x00000000
748 22:33:55.783566 MVN_2=0x00000000
749 22:33:55.789306 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 22:33:55.789583 OPS=0x10
751 22:33:55.789802 ring efuse init
752 22:33:55.790015 chipver efuse init
753 22:33:55.794858 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 22:33:55.800537 [0.018961 Inits done]
755 22:33:55.800797 secure task start!
756 22:33:55.801002 high task start!
757 22:33:55.804115 low task start!
758 22:33:55.804386 run into bl31
759 22:33:55.811734 NOTICE: BL31: v1.3(release):4fc40b1
760 22:33:55.819476 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 22:33:55.819745 NOTICE: BL31: G12A normal boot!
762 22:33:55.844913 NOTICE: BL31: BL33 decompress pass
763 22:33:55.850046 ERROR: Error initializing runtime service opteed_fast
764 22:33:57.083597
765 22:33:57.084086
766 22:33:57.091901 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 22:33:57.092234
768 22:33:57.092477 Model: Libre Computer AML-A311D-CC Alta
769 22:33:57.300339 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 22:33:57.323868 DRAM: 2 GiB (effective 3.8 GiB)
771 22:33:57.466848 Core: 408 devices, 31 uclasses, devicetree: separate
772 22:33:57.472663 WDT: Not starting watchdog@f0d0
773 22:33:57.504951 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 22:33:57.517357 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 22:33:57.522532 ** Bad device specification mmc 0 **
776 22:33:57.532736 Card did not respond to voltage select! : -110
777 22:33:57.540402 ** Bad device specification mmc 0 **
778 22:33:57.540956 Couldn't find partition mmc 0
779 22:33:57.548723 Card did not respond to voltage select! : -110
780 22:33:57.554247 ** Bad device specification mmc 0 **
781 22:33:57.554770 Couldn't find partition mmc 0
782 22:33:57.559291 Error: could not access storage.
783 22:33:57.901817 Net: eth0: ethernet@ff3f0000
784 22:33:57.902437 starting USB...
785 22:33:58.153510 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 22:33:58.154127 Starting the controller
787 22:33:58.160525 USB XHCI 1.10
788 22:34:00.323733 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 22:34:00.324402 bl2_stage_init 0x01
790 22:34:00.324832 bl2_stage_init 0x81
791 22:34:00.329166 hw id: 0x0000 - pwm id 0x01
792 22:34:00.329642 bl2_stage_init 0xc1
793 22:34:00.330059 bl2_stage_init 0x02
794 22:34:00.330463
795 22:34:00.334754 L0:00000000
796 22:34:00.335233 L1:20000703
797 22:34:00.335644 L2:00008067
798 22:34:00.336083 L3:14000000
799 22:34:00.337775 B2:00402000
800 22:34:00.338240 B1:e0f83180
801 22:34:00.338647
802 22:34:00.339051 TE: 58159
803 22:34:00.339460
804 22:34:00.348838 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 22:34:00.349323
806 22:34:00.349732 Board ID = 1
807 22:34:00.350130 Set A53 clk to 24M
808 22:34:00.350527 Set A73 clk to 24M
809 22:34:00.354782 Set clk81 to 24M
810 22:34:00.355243 A53 clk: 1200 MHz
811 22:34:00.355646 A73 clk: 1200 MHz
812 22:34:00.358020 CLK81: 166.6M
813 22:34:00.358480 smccc: 00012ab5
814 22:34:00.363523 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 22:34:00.369153 board id: 1
816 22:34:00.373288 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 22:34:00.384892 fw parse done
818 22:34:00.389960 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 22:34:00.432530 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 22:34:00.444417 PIEI prepare done
821 22:34:00.444908 fastboot data load
822 22:34:00.445325 fastboot data verify
823 22:34:00.450100 verify result: 266
824 22:34:00.455689 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 22:34:00.456216 LPDDR4 probe
826 22:34:00.456634 ddr clk to 1584MHz
827 22:34:00.462667 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 22:34:00.499868
829 22:34:00.500418 dmc_version 0001
830 22:34:00.506589 Check phy result
831 22:34:00.513348 INFO : End of CA training
832 22:34:00.513830 INFO : End of initialization
833 22:34:00.518983 INFO : Training has run successfully!
834 22:34:00.519458 Check phy result
835 22:34:00.524669 INFO : End of initialization
836 22:34:00.525181 INFO : End of read enable training
837 22:34:00.530156 INFO : End of fine write leveling
838 22:34:00.535745 INFO : End of Write leveling coarse delay
839 22:34:00.536255 INFO : Training has run successfully!
840 22:34:00.536675 Check phy result
841 22:34:00.541350 INFO : End of initialization
842 22:34:00.541828 INFO : End of read dq deskew training
843 22:34:00.547048 INFO : End of MPR read delay center optimization
844 22:34:00.552664 INFO : End of write delay center optimization
845 22:34:00.558151 INFO : End of read delay center optimization
846 22:34:00.558624 INFO : End of max read latency training
847 22:34:00.563670 INFO : Training has run successfully!
848 22:34:00.564186 1D training succeed
849 22:34:00.571940 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:34:00.619511 Check phy result
851 22:34:00.620053 INFO : End of initialization
852 22:34:00.641733 INFO : End of 2D read delay Voltage center optimization
853 22:34:00.661312 INFO : End of 2D read delay Voltage center optimization
854 22:34:00.714243 INFO : End of 2D write delay Voltage center optimization
855 22:34:00.763456 INFO : End of 2D write delay Voltage center optimization
856 22:34:00.769050 INFO : Training has run successfully!
857 22:34:00.769522
858 22:34:00.769932 channel==0
859 22:34:00.774643 RxClkDly_Margin_A0==88 ps 9
860 22:34:00.775131 TxDqDly_Margin_A0==98 ps 10
861 22:34:00.780271 RxClkDly_Margin_A1==88 ps 9
862 22:34:00.780776 TxDqDly_Margin_A1==98 ps 10
863 22:34:00.781213 TrainedVREFDQ_A0==74
864 22:34:00.785786 TrainedVREFDQ_A1==74
865 22:34:00.786300 VrefDac_Margin_A0==25
866 22:34:00.786721 DeviceVref_Margin_A0==40
867 22:34:00.791325 VrefDac_Margin_A1==25
868 22:34:00.791805 DeviceVref_Margin_A1==40
869 22:34:00.792242
870 22:34:00.792636
871 22:34:00.796992 channel==1
872 22:34:00.797449 RxClkDly_Margin_A0==98 ps 10
873 22:34:00.797840 TxDqDly_Margin_A0==98 ps 10
874 22:34:00.802739 RxClkDly_Margin_A1==98 ps 10
875 22:34:00.803200 TxDqDly_Margin_A1==88 ps 9
876 22:34:00.808224 TrainedVREFDQ_A0==77
877 22:34:00.808696 TrainedVREFDQ_A1==77
878 22:34:00.809093 VrefDac_Margin_A0==22
879 22:34:00.813736 DeviceVref_Margin_A0==37
880 22:34:00.814184 VrefDac_Margin_A1==24
881 22:34:00.819321 DeviceVref_Margin_A1==37
882 22:34:00.819774
883 22:34:00.820211 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 22:34:00.824962
885 22:34:00.852911 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
886 22:34:00.853439 2D training succeed
887 22:34:00.858529 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 22:34:00.864154 auto size-- 65535DDR cs0 size: 2048MB
889 22:34:00.864615 DDR cs1 size: 2048MB
890 22:34:00.869736 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 22:34:00.870202 cs0 DataBus test pass
892 22:34:00.875308 cs1 DataBus test pass
893 22:34:00.875761 cs0 AddrBus test pass
894 22:34:00.876206 cs1 AddrBus test pass
895 22:34:00.876593
896 22:34:00.880934 100bdlr_step_size ps== 420
897 22:34:00.881400 result report
898 22:34:00.886487 boot times 0Enable ddr reg access
899 22:34:00.891928 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 22:34:00.905375 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 22:34:01.477459 0.0;M3 CHK:0;cm4_sp_mode 0
902 22:34:01.478096 MVN_1=0x00000000
903 22:34:01.482923 MVN_2=0x00000000
904 22:34:01.488691 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 22:34:01.489170 OPS=0x10
906 22:34:01.489586 ring efuse init
907 22:34:01.489988 chipver efuse init
908 22:34:01.494255 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 22:34:01.499840 [0.018961 Inits done]
910 22:34:01.500378 secure task start!
911 22:34:01.500796 high task start!
912 22:34:01.504445 low task start!
913 22:34:01.504935 run into bl31
914 22:34:01.511112 NOTICE: BL31: v1.3(release):4fc40b1
915 22:34:01.518922 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 22:34:01.519430 NOTICE: BL31: G12A normal boot!
917 22:34:01.544432 NOTICE: BL31: BL33 decompress pass
918 22:34:01.550054 ERROR: Error initializing runtime service opteed_fast
919 22:34:02.782987
920 22:34:02.783620
921 22:34:02.791409 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 22:34:02.791892
923 22:34:02.792351 Model: Libre Computer AML-A311D-CC Alta
924 22:34:02.999672 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 22:34:03.023125 DRAM: 2 GiB (effective 3.8 GiB)
926 22:34:03.166050 Core: 408 devices, 31 uclasses, devicetree: separate
927 22:34:03.171948 WDT: Not starting watchdog@f0d0
928 22:34:03.204184 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 22:34:03.216669 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 22:34:03.221635 ** Bad device specification mmc 0 **
931 22:34:03.231958 Card did not respond to voltage select! : -110
932 22:34:03.239617 ** Bad device specification mmc 0 **
933 22:34:03.240116 Couldn't find partition mmc 0
934 22:34:03.247936 Card did not respond to voltage select! : -110
935 22:34:03.253432 ** Bad device specification mmc 0 **
936 22:34:03.253892 Couldn't find partition mmc 0
937 22:34:03.258527 Error: could not access storage.
938 22:34:03.601010 Net: eth0: ethernet@ff3f0000
939 22:34:03.601615 starting USB...
940 22:34:03.852869 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 22:34:03.853484 Starting the controller
942 22:34:03.859771 USB XHCI 1.10
943 22:34:05.414037 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 22:34:05.422487 scanning usb for storage devices... 0 Storage Device(s) found
946 22:34:05.474100 Hit any key to stop autoboot: 1
947 22:34:05.475147 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 22:34:05.475777 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 22:34:05.476323 Setting prompt string to ['=>']
950 22:34:05.476814 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 22:34:05.489963 0
952 22:34:05.490860 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 22:34:05.491368 Sending with 10 millisecond of delay
955 22:34:06.626431 => setenv autoload no
956 22:34:06.637373 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 22:34:06.642368 setenv autoload no
958 22:34:06.643116 Sending with 10 millisecond of delay
960 22:34:08.441489 => setenv initrd_high 0xffffffff
961 22:34:08.452512 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 22:34:08.610868 setenv initrd_high 0xffffffff
963 22:34:08.612009 Sending with 10 millisecond of delay
965 22:34:10.230603 => setenv fdt_high 0xffffffff
966 22:34:10.241630 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 22:34:10.242696 setenv fdt_high 0xffffffff
968 22:34:10.243568 Sending with 10 millisecond of delay
970 22:34:10.536101 => dhcp
971 22:34:10.547147 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 22:34:10.548366 dhcp
973 22:34:10.548995 Speed: 1000, full duplex
974 22:34:10.549550 BOOTP broadcast 1
975 22:34:10.567822 DHCP client bound to address 192.168.6.27 (21 ms)
976 22:34:10.568874 Sending with 10 millisecond of delay
978 22:34:12.247325 => setenv serverip 192.168.6.2
979 22:34:12.258369 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 22:34:12.259313 setenv serverip 192.168.6.2
981 22:34:12.260136 Sending with 10 millisecond of delay
983 22:34:15.989082 => tftpboot 0x01080000 956186/tftp-deploy-649qlazs/kernel/uImage
984 22:34:15.999911 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 22:34:16.000880 tftpboot 0x01080000 956186/tftp-deploy-649qlazs/kernel/uImage
986 22:34:16.001349 Speed: 1000, full duplex
987 22:34:16.001781 Using ethernet@ff3f0000 device
988 22:34:16.002635 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 22:34:16.008103 Filename '956186/tftp-deploy-649qlazs/kernel/uImage'.
990 22:34:16.011921 Load address: 0x1080000
991 22:34:19.093049 Loading: *################################################## 43.7 MiB
992 22:34:19.093497 14.2 MiB/s
993 22:34:19.093750 done
994 22:34:19.097243 Bytes transferred = 45775424 (2ba7a40 hex)
995 22:34:19.097795 Sending with 10 millisecond of delay
997 22:34:23.786246 => tftpboot 0x08000000 956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot
998 22:34:23.796793 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 22:34:23.797353 tftpboot 0x08000000 956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot
1000 22:34:23.797609 Speed: 1000, full duplex
1001 22:34:23.797821 Using ethernet@ff3f0000 device
1002 22:34:23.799337 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 22:34:23.811176 Filename '956186/tftp-deploy-649qlazs/ramdisk/ramdisk.cpio.gz.uboot'.
1004 22:34:23.811667 Load address: 0x8000000
1005 22:34:27.676266 Loading: *################# UDP wrong checksum 000000ff 00001b16
1006 22:34:27.684758 UDP wrong checksum 000000ff 0000a808
1007 22:34:30.858092 T ################################ UDP wrong checksum 00000005 0000589d
1008 22:34:35.860122 T UDP wrong checksum 00000005 0000589d
1009 22:34:45.862118 T T UDP wrong checksum 00000005 0000589d
1010 22:35:05.865132 T T T UDP wrong checksum 00000005 0000589d
1011 22:35:20.871175 T T T
1012 22:35:20.871590 Retry count exceeded; starting again
1014 22:35:20.873899 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1017 22:35:20.875879 end: 2.4 uboot-commands (duration 00:01:47) [common]
1019 22:35:20.877473 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1021 22:35:20.878643 end: 2 uboot-action (duration 00:01:47) [common]
1023 22:35:20.880339 Cleaning after the job
1024 22:35:20.880979 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/ramdisk
1025 22:35:20.882566 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/kernel
1026 22:35:20.912142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/dtb
1027 22:35:20.913582 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/nfsrootfs
1028 22:35:20.941519 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956186/tftp-deploy-649qlazs/modules
1029 22:35:20.948054 start: 4.1 power-off (timeout 00:00:30) [common]
1030 22:35:20.948684 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1031 22:35:20.982998 >> OK - accepted request
1032 22:35:20.984973 Returned 0 in 0 seconds
1033 22:35:21.085725 end: 4.1 power-off (duration 00:00:00) [common]
1035 22:35:21.086729 start: 4.2 read-feedback (timeout 00:10:00) [common]
1036 22:35:21.087394 Listened to connection for namespace 'common' for up to 1s
1037 22:35:22.088292 Finalising connection for namespace 'common'
1038 22:35:22.089093 Disconnecting from shell: Finalise
1039 22:35:22.089660 =>
1040 22:35:22.190807 end: 4.2 read-feedback (duration 00:00:01) [common]
1041 22:35:22.191564 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956186
1042 22:35:23.854835 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956186
1043 22:35:23.855439 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.