Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:32:32.329403 lava-dispatcher, installed at version: 2024.01
2 22:32:32.330202 start: 0 validate
3 22:32:32.330659 Start time: 2024-11-07 22:32:32.330628+00:00 (UTC)
4 22:32:32.331211 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:32:32.331735 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:32:32.368739 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:32:32.369305 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:32:32.406835 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:32:32.407477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:32:32.442124 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:32:32.442585 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:32:32.479411 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:32:32.479919 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:32:32.530729 validate duration: 0.20
16 22:32:32.532265 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:32:32.532907 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:32:32.533485 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:32:32.534494 Not decompressing ramdisk as can be used compressed.
20 22:32:32.535324 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 22:32:32.535842 saving as /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/ramdisk/initrd.cpio.gz
22 22:32:32.536415 total size: 5628182 (5 MB)
23 22:32:32.573013 progress 0 % (0 MB)
24 22:32:32.581659 progress 5 % (0 MB)
25 22:32:32.590856 progress 10 % (0 MB)
26 22:32:32.599004 progress 15 % (0 MB)
27 22:32:32.605848 progress 20 % (1 MB)
28 22:32:32.609853 progress 25 % (1 MB)
29 22:32:32.614459 progress 30 % (1 MB)
30 22:32:32.619027 progress 35 % (1 MB)
31 22:32:32.623140 progress 40 % (2 MB)
32 22:32:32.627641 progress 45 % (2 MB)
33 22:32:32.631756 progress 50 % (2 MB)
34 22:32:32.636337 progress 55 % (2 MB)
35 22:32:32.640834 progress 60 % (3 MB)
36 22:32:32.645214 progress 65 % (3 MB)
37 22:32:32.649774 progress 70 % (3 MB)
38 22:32:32.653972 progress 75 % (4 MB)
39 22:32:32.658599 progress 80 % (4 MB)
40 22:32:32.662708 progress 85 % (4 MB)
41 22:32:32.666887 progress 90 % (4 MB)
42 22:32:32.671055 progress 95 % (5 MB)
43 22:32:32.674755 progress 100 % (5 MB)
44 22:32:32.675425 5 MB downloaded in 0.14 s (38.61 MB/s)
45 22:32:32.676002 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:32:32.676913 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:32:32.677208 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:32:32.677490 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:32:32.678017 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kernel/Image
51 22:32:32.678276 saving as /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/kernel/Image
52 22:32:32.678515 total size: 45775360 (43 MB)
53 22:32:32.678735 No compression specified
54 22:32:32.720894 progress 0 % (0 MB)
55 22:32:32.749178 progress 5 % (2 MB)
56 22:32:32.777688 progress 10 % (4 MB)
57 22:32:32.806092 progress 15 % (6 MB)
58 22:32:32.834483 progress 20 % (8 MB)
59 22:32:32.863029 progress 25 % (10 MB)
60 22:32:32.891618 progress 30 % (13 MB)
61 22:32:32.919536 progress 35 % (15 MB)
62 22:32:32.947915 progress 40 % (17 MB)
63 22:32:32.976278 progress 45 % (19 MB)
64 22:32:33.004794 progress 50 % (21 MB)
65 22:32:33.033184 progress 55 % (24 MB)
66 22:32:33.061486 progress 60 % (26 MB)
67 22:32:33.089717 progress 65 % (28 MB)
68 22:32:33.118812 progress 70 % (30 MB)
69 22:32:33.148364 progress 75 % (32 MB)
70 22:32:33.176306 progress 80 % (34 MB)
71 22:32:33.204378 progress 85 % (37 MB)
72 22:32:33.234125 progress 90 % (39 MB)
73 22:32:33.262037 progress 95 % (41 MB)
74 22:32:33.289181 progress 100 % (43 MB)
75 22:32:33.289983 43 MB downloaded in 0.61 s (71.39 MB/s)
76 22:32:33.290455 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:32:33.291275 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:32:33.291548 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:32:33.291813 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:32:33.292314 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 22:32:33.292599 saving as /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 22:32:33.292809 total size: 53209 (0 MB)
84 22:32:33.293018 No compression specified
85 22:32:33.332355 progress 61 % (0 MB)
86 22:32:33.333277 progress 100 % (0 MB)
87 22:32:33.333835 0 MB downloaded in 0.04 s (1.24 MB/s)
88 22:32:33.334303 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:32:33.335111 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:32:33.335372 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:32:33.335636 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:32:33.336150 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 22:32:33.336428 saving as /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/nfsrootfs/full.rootfs.tar
95 22:32:33.336647 total size: 107552908 (102 MB)
96 22:32:33.336888 Using unxz to decompress xz
97 22:32:33.373066 progress 0 % (0 MB)
98 22:32:34.037425 progress 5 % (5 MB)
99 22:32:34.764735 progress 10 % (10 MB)
100 22:32:35.495300 progress 15 % (15 MB)
101 22:32:36.255402 progress 20 % (20 MB)
102 22:32:36.828296 progress 25 % (25 MB)
103 22:32:37.448705 progress 30 % (30 MB)
104 22:32:38.194390 progress 35 % (35 MB)
105 22:32:38.539433 progress 40 % (41 MB)
106 22:32:38.993701 progress 45 % (46 MB)
107 22:32:39.727713 progress 50 % (51 MB)
108 22:32:40.416237 progress 55 % (56 MB)
109 22:32:41.169614 progress 60 % (61 MB)
110 22:32:41.923123 progress 65 % (66 MB)
111 22:32:42.654920 progress 70 % (71 MB)
112 22:32:43.449793 progress 75 % (76 MB)
113 22:32:44.153267 progress 80 % (82 MB)
114 22:32:44.870652 progress 85 % (87 MB)
115 22:32:45.609457 progress 90 % (92 MB)
116 22:32:46.329089 progress 95 % (97 MB)
117 22:32:47.078047 progress 100 % (102 MB)
118 22:32:47.091342 102 MB downloaded in 13.75 s (7.46 MB/s)
119 22:32:47.092430 end: 1.4.1 http-download (duration 00:00:14) [common]
121 22:32:47.094321 end: 1.4 download-retry (duration 00:00:14) [common]
122 22:32:47.094959 start: 1.5 download-retry (timeout 00:09:45) [common]
123 22:32:47.095550 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 22:32:47.096471 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/modules.tar.xz
125 22:32:47.097009 saving as /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/modules/modules.tar
126 22:32:47.097489 total size: 11605964 (11 MB)
127 22:32:47.097978 Using unxz to decompress xz
128 22:32:47.151904 progress 0 % (0 MB)
129 22:32:47.222501 progress 5 % (0 MB)
130 22:32:47.303397 progress 10 % (1 MB)
131 22:32:47.410455 progress 15 % (1 MB)
132 22:32:47.510289 progress 20 % (2 MB)
133 22:32:47.593673 progress 25 % (2 MB)
134 22:32:47.674017 progress 30 % (3 MB)
135 22:32:47.753728 progress 35 % (3 MB)
136 22:32:47.838397 progress 40 % (4 MB)
137 22:32:47.928333 progress 45 % (5 MB)
138 22:32:48.017712 progress 50 % (5 MB)
139 22:32:48.110132 progress 55 % (6 MB)
140 22:32:48.211750 progress 60 % (6 MB)
141 22:32:48.296887 progress 65 % (7 MB)
142 22:32:48.376937 progress 70 % (7 MB)
143 22:32:48.462588 progress 75 % (8 MB)
144 22:32:48.550098 progress 80 % (8 MB)
145 22:32:48.633674 progress 85 % (9 MB)
146 22:32:48.717143 progress 90 % (9 MB)
147 22:32:48.798510 progress 95 % (10 MB)
148 22:32:48.879371 progress 100 % (11 MB)
149 22:32:48.891678 11 MB downloaded in 1.79 s (6.17 MB/s)
150 22:32:48.892678 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:32:48.894446 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:32:48.895017 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 22:32:48.895582 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 22:32:59.057681 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956223/extract-nfsrootfs-o6dllpuy
156 22:32:59.058290 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 22:32:59.058620 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 22:32:59.059294 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho
159 22:32:59.059798 makedir: /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin
160 22:32:59.060238 makedir: /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/tests
161 22:32:59.060623 makedir: /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/results
162 22:32:59.060991 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-add-keys
163 22:32:59.061575 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-add-sources
164 22:32:59.062158 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-background-process-start
165 22:32:59.062762 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-background-process-stop
166 22:32:59.063319 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-common-functions
167 22:32:59.063824 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-echo-ipv4
168 22:32:59.064363 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-install-packages
169 22:32:59.064865 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-installed-packages
170 22:32:59.065352 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-os-build
171 22:32:59.065835 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-probe-channel
172 22:32:59.066313 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-probe-ip
173 22:32:59.066814 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-target-ip
174 22:32:59.067307 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-target-mac
175 22:32:59.067794 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-target-storage
176 22:32:59.068333 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-case
177 22:32:59.068823 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-event
178 22:32:59.069306 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-feedback
179 22:32:59.069784 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-raise
180 22:32:59.070279 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-reference
181 22:32:59.070777 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-runner
182 22:32:59.071262 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-set
183 22:32:59.071744 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-test-shell
184 22:32:59.079237 Updating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-install-packages (oe)
185 22:32:59.079902 Updating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/bin/lava-installed-packages (oe)
186 22:32:59.080424 Creating /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/environment
187 22:32:59.080839 LAVA metadata
188 22:32:59.081110 - LAVA_JOB_ID=956223
189 22:32:59.081329 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:32:59.084041 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 22:32:59.085158 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:32:59.085508 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 22:32:59.085719 skipped lava-vland-overlay
194 22:32:59.085965 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:32:59.086220 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 22:32:59.086443 skipped lava-multinode-overlay
197 22:32:59.086690 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:32:59.086948 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 22:32:59.087205 Loading test definitions
200 22:32:59.087492 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 22:32:59.087719 Using /lava-956223 at stage 0
202 22:32:59.089069 uuid=956223_1.6.2.4.1 testdef=None
203 22:32:59.089423 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:32:59.089698 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 22:32:59.091616 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:32:59.092495 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 22:32:59.095225 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:32:59.096219 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 22:32:59.098718 runner path: /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/0/tests/0_dmesg test_uuid 956223_1.6.2.4.1
212 22:32:59.099484 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:32:59.100473 Creating lava-test-runner.conf files
215 22:32:59.100741 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956223/lava-overlay-634029ho/lava-956223/0 for stage 0
216 22:32:59.101180 - 0_dmesg
217 22:32:59.101593 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:32:59.101890 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 22:32:59.127067 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:32:59.127538 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 22:32:59.127808 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:32:59.128121 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:32:59.128417 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 22:32:59.755533 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:32:59.756046 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 22:32:59.756332 extracting modules file /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956223/extract-nfsrootfs-o6dllpuy
227 22:33:01.141581 extracting modules file /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956223/extract-overlay-ramdisk-3dm_bd3u/ramdisk
228 22:33:02.560170 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:33:02.560654 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 22:33:02.560932 [common] Applying overlay to NFS
231 22:33:02.561145 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956223/compress-overlay-k2qjod7g/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956223/extract-nfsrootfs-o6dllpuy
232 22:33:02.590686 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:33:02.591127 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 22:33:02.591400 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 22:33:02.591631 Converting downloaded kernel to a uImage
236 22:33:02.591956 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/kernel/Image /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/kernel/uImage
237 22:33:03.049342 output: Image Name:
238 22:33:03.049766 output: Created: Thu Nov 7 22:33:02 2024
239 22:33:03.049976 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:33:03.050180 output: Data Size: 45775360 Bytes = 44702.50 KiB = 43.65 MiB
241 22:33:03.050383 output: Load Address: 01080000
242 22:33:03.050582 output: Entry Point: 01080000
243 22:33:03.050780 output:
244 22:33:03.051120 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:33:03.051386 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:33:03.051654 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 22:33:03.051908 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:33:03.052218 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 22:33:03.052480 Building ramdisk /var/lib/lava/dispatcher/tmp/956223/extract-overlay-ramdisk-3dm_bd3u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956223/extract-overlay-ramdisk-3dm_bd3u/ramdisk
250 22:33:05.303438 >> 166791 blocks
251 22:33:13.011549 Adding RAMdisk u-boot header.
252 22:33:13.011972 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956223/extract-overlay-ramdisk-3dm_bd3u/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956223/extract-overlay-ramdisk-3dm_bd3u/ramdisk.cpio.gz.uboot
253 22:33:13.258609 output: Image Name:
254 22:33:13.259124 output: Created: Thu Nov 7 22:33:13 2024
255 22:33:13.259349 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:33:13.259558 output: Data Size: 23430701 Bytes = 22881.54 KiB = 22.35 MiB
257 22:33:13.259800 output: Load Address: 00000000
258 22:33:13.260117 output: Entry Point: 00000000
259 22:33:13.260712 output:
260 22:33:13.261774 rename /var/lib/lava/dispatcher/tmp/956223/extract-overlay-ramdisk-3dm_bd3u/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot
261 22:33:13.262532 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:33:13.263222 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 22:33:13.263968 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 22:33:13.264658 No LXC device requested
265 22:33:13.265299 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:33:13.265953 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 22:33:13.266628 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:33:13.267155 Checking files for TFTP limit of 4294967296 bytes.
269 22:33:13.270690 end: 1 tftp-deploy (duration 00:00:41) [common]
270 22:33:13.271433 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:33:13.272055 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:33:13.272693 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:33:13.273468 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:33:13.274142 Using kernel file from prepare-kernel: 956223/tftp-deploy-6h7vzsi0/kernel/uImage
275 22:33:13.274906 substitutions:
276 22:33:13.275368 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:33:13.275814 - {DTB_ADDR}: 0x01070000
278 22:33:13.276300 - {DTB}: 956223/tftp-deploy-6h7vzsi0/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 22:33:13.276743 - {INITRD}: 956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot
280 22:33:13.277184 - {KERNEL_ADDR}: 0x01080000
281 22:33:13.277652 - {KERNEL}: 956223/tftp-deploy-6h7vzsi0/kernel/uImage
282 22:33:13.278095 - {LAVA_MAC}: None
283 22:33:13.278579 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956223/extract-nfsrootfs-o6dllpuy
284 22:33:13.279021 - {NFS_SERVER_IP}: 192.168.6.2
285 22:33:13.279453 - {PRESEED_CONFIG}: None
286 22:33:13.280016 - {PRESEED_LOCAL}: None
287 22:33:13.280536 - {RAMDISK_ADDR}: 0x08000000
288 22:33:13.280980 - {RAMDISK}: 956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot
289 22:33:13.281415 - {ROOT_PART}: None
290 22:33:13.281964 - {ROOT}: None
291 22:33:13.282465 - {SERVER_IP}: 192.168.6.2
292 22:33:13.282989 - {TEE_ADDR}: 0x83000000
293 22:33:13.283429 - {TEE}: None
294 22:33:13.283862 Parsed boot commands:
295 22:33:13.284324 - setenv autoload no
296 22:33:13.284862 - setenv initrd_high 0xffffffff
297 22:33:13.285317 - setenv fdt_high 0xffffffff
298 22:33:13.285878 - dhcp
299 22:33:13.286412 - setenv serverip 192.168.6.2
300 22:33:13.286947 - tftpboot 0x01080000 956223/tftp-deploy-6h7vzsi0/kernel/uImage
301 22:33:13.287482 - tftpboot 0x08000000 956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot
302 22:33:13.287976 - tftpboot 0x01070000 956223/tftp-deploy-6h7vzsi0/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 22:33:13.288512 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956223/extract-nfsrootfs-o6dllpuy,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:33:13.289081 - bootm 0x01080000 0x08000000 0x01070000
305 22:33:13.289714 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:33:13.291493 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:33:13.291959 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 22:33:13.308294 Setting prompt string to ['lava-test: # ']
310 22:33:13.310065 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:33:13.310749 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:33:13.311352 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:33:13.312104 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:33:13.313513 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 22:33:13.353473 >> OK - accepted request
316 22:33:13.355799 Returned 0 in 0 seconds
317 22:33:13.457193 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:33:13.459476 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:33:13.460332 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:33:13.461052 Setting prompt string to ['Hit any key to stop autoboot']
322 22:33:13.461643 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:33:13.463612 Trying 192.168.56.21...
324 22:33:13.464300 Connected to conserv1.
325 22:33:13.465032 Escape character is '^]'.
326 22:33:13.465628
327 22:33:13.466167 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 22:33:13.466703
329 22:33:21.007682 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 22:33:21.008385 bl2_stage_init 0x01
331 22:33:21.008851 bl2_stage_init 0x81
332 22:33:21.013143 hw id: 0x0000 - pwm id 0x01
333 22:33:21.013654 bl2_stage_init 0xc1
334 22:33:21.018815 bl2_stage_init 0x02
335 22:33:21.019327
336 22:33:21.019777 L0:00000000
337 22:33:21.020262 L1:00000703
338 22:33:21.020701 L2:00008067
339 22:33:21.021151 L3:15000000
340 22:33:21.024374 S1:00000000
341 22:33:21.024883 B2:20282000
342 22:33:21.025322 B1:a0f83180
343 22:33:21.025769
344 22:33:21.026203 TE: 70070
345 22:33:21.026636
346 22:33:21.029920 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 22:33:21.030455
348 22:33:21.035603 Board ID = 1
349 22:33:21.036172 Set cpu clk to 24M
350 22:33:21.036617 Set clk81 to 24M
351 22:33:21.041137 Use GP1_pll as DSU clk.
352 22:33:21.041766 DSU clk: 1200 Mhz
353 22:33:21.042224 CPU clk: 1200 MHz
354 22:33:21.046803 Set clk81 to 166.6M
355 22:33:21.052412 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 22:33:21.052943 board id: 1
357 22:33:21.059598 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:33:21.070158 fw parse done
359 22:33:21.076235 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:33:21.118806 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:33:21.129814 PIEI prepare done
362 22:33:21.130343 fastboot data load
363 22:33:21.130755 fastboot data verify
364 22:33:21.135289 verify result: 266
365 22:33:21.140906 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 22:33:21.141413 LPDDR4 probe
367 22:33:21.141813 ddr clk to 1584MHz
368 22:33:21.148891 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:33:21.186148
370 22:33:21.187239 dmc_version 0001
371 22:33:21.192808 Check phy result
372 22:33:21.198637 INFO : End of CA training
373 22:33:21.199090 INFO : End of initialization
374 22:33:21.204275 INFO : Training has run successfully!
375 22:33:21.204789 Check phy result
376 22:33:21.209820 INFO : End of initialization
377 22:33:21.210274 INFO : End of read enable training
378 22:33:21.215475 INFO : End of fine write leveling
379 22:33:21.221123 INFO : End of Write leveling coarse delay
380 22:33:21.221603 INFO : Training has run successfully!
381 22:33:21.222009 Check phy result
382 22:33:21.226673 INFO : End of initialization
383 22:33:21.227118 INFO : End of read dq deskew training
384 22:33:21.232298 INFO : End of MPR read delay center optimization
385 22:33:21.237891 INFO : End of write delay center optimization
386 22:33:21.243464 INFO : End of read delay center optimization
387 22:33:21.243922 INFO : End of max read latency training
388 22:33:21.249091 INFO : Training has run successfully!
389 22:33:21.249547 1D training succeed
390 22:33:21.258320 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:33:21.305907 Check phy result
392 22:33:21.306436 INFO : End of initialization
393 22:33:21.328242 INFO : End of 2D read delay Voltage center optimization
394 22:33:21.347468 INFO : End of 2D read delay Voltage center optimization
395 22:33:21.399390 INFO : End of 2D write delay Voltage center optimization
396 22:33:21.448631 INFO : End of 2D write delay Voltage center optimization
397 22:33:21.454022 INFO : Training has run successfully!
398 22:33:21.454468
399 22:33:21.454871 channel==0
400 22:33:21.459693 RxClkDly_Margin_A0==78 ps 8
401 22:33:21.460160 TxDqDly_Margin_A0==98 ps 10
402 22:33:21.463024 RxClkDly_Margin_A1==78 ps 8
403 22:33:21.463464 TxDqDly_Margin_A1==98 ps 10
404 22:33:21.468577 TrainedVREFDQ_A0==74
405 22:33:21.469028 TrainedVREFDQ_A1==75
406 22:33:21.469427 VrefDac_Margin_A0==23
407 22:33:21.474235 DeviceVref_Margin_A0==40
408 22:33:21.474678 VrefDac_Margin_A1==23
409 22:33:21.479771 DeviceVref_Margin_A1==39
410 22:33:21.480242
411 22:33:21.480641
412 22:33:21.481034 channel==1
413 22:33:21.481419 RxClkDly_Margin_A0==88 ps 9
414 22:33:21.485380 TxDqDly_Margin_A0==98 ps 10
415 22:33:21.485811 RxClkDly_Margin_A1==88 ps 9
416 22:33:21.491074 TxDqDly_Margin_A1==88 ps 9
417 22:33:21.491520 TrainedVREFDQ_A0==78
418 22:33:21.491913 TrainedVREFDQ_A1==76
419 22:33:21.496558 VrefDac_Margin_A0==22
420 22:33:21.497002 DeviceVref_Margin_A0==36
421 22:33:21.502142 VrefDac_Margin_A1==22
422 22:33:21.502575 DeviceVref_Margin_A1==38
423 22:33:21.502964
424 22:33:21.507811 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:33:21.508268
426 22:33:21.535702 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 22:33:21.541259 2D training succeed
428 22:33:21.546848 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:33:21.547291 auto size-- 65535DDR cs0 size: 2048MB
430 22:33:21.552485 DDR cs1 size: 2048MB
431 22:33:21.552949 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:33:21.558060 cs0 DataBus test pass
433 22:33:21.558504 cs1 DataBus test pass
434 22:33:21.558897 cs0 AddrBus test pass
435 22:33:21.563665 cs1 AddrBus test pass
436 22:33:21.564139
437 22:33:21.564542 100bdlr_step_size ps== 478
438 22:33:21.564942 result report
439 22:33:21.569304 boot times 0Enable ddr reg access
440 22:33:21.576812 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:33:21.590643 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 22:33:22.245897 bl2z: ptr: 05129330, size: 00001e40
443 22:33:22.253173 0.0;M3 CHK:0;cm4_sp_mode 0
444 22:33:22.253641 MVN_1=0x00000000
445 22:33:22.254040 MVN_2=0x00000000
446 22:33:22.264640 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 22:33:22.265104 OPS=0x04
448 22:33:22.265506 ring efuse init
449 22:33:22.270312 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 22:33:22.270859 [0.017319 Inits done]
451 22:33:22.271259 secure task start!
452 22:33:22.277858 high task start!
453 22:33:22.278398 low task start!
454 22:33:22.278804 run into bl31
455 22:33:22.286484 NOTICE: BL31: v1.3(release):4fc40b1
456 22:33:22.294182 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 22:33:22.294632 NOTICE: BL31: G12A normal boot!
458 22:33:22.309673 NOTICE: BL31: BL33 decompress pass
459 22:33:22.315390 ERROR: Error initializing runtime service opteed_fast
460 22:33:23.556726 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 22:33:23.557376 bl2_stage_init 0x01
462 22:33:23.557827 bl2_stage_init 0x81
463 22:33:23.562242 hw id: 0x0000 - pwm id 0x01
464 22:33:23.562761 bl2_stage_init 0xc1
465 22:33:23.567831 bl2_stage_init 0x02
466 22:33:23.568407
467 22:33:23.568855 L0:00000000
468 22:33:23.569289 L1:00000703
469 22:33:23.569722 L2:00008067
470 22:33:23.570148 L3:15000000
471 22:33:23.573483 S1:00000000
472 22:33:23.574016 B2:20282000
473 22:33:23.574444 B1:a0f83180
474 22:33:23.574871
475 22:33:23.575298 TE: 68843
476 22:33:23.575727
477 22:33:23.579020 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 22:33:23.579551
479 22:33:23.584619 Board ID = 1
480 22:33:23.585134 Set cpu clk to 24M
481 22:33:23.585568 Set clk81 to 24M
482 22:33:23.590225 Use GP1_pll as DSU clk.
483 22:33:23.590722 DSU clk: 1200 Mhz
484 22:33:23.591157 CPU clk: 1200 MHz
485 22:33:23.595840 Set clk81 to 166.6M
486 22:33:23.601463 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 22:33:23.601983 board id: 1
488 22:33:23.608612 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 22:33:23.619259 fw parse done
490 22:33:23.625197 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 22:33:23.667910 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 22:33:23.678905 PIEI prepare done
493 22:33:23.679501 fastboot data load
494 22:33:23.679947 fastboot data verify
495 22:33:23.684408 verify result: 266
496 22:33:23.690003 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 22:33:23.690515 LPDDR4 probe
498 22:33:23.690948 ddr clk to 1584MHz
499 22:33:25.057755 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 22:33:25.058435 bl2_stage_init 0x01
501 22:33:25.058891 bl2_stage_init 0x81
502 22:33:25.063261 hw id: 0x0000 - pwm id 0x01
503 22:33:25.063781 bl2_stage_init 0xc1
504 22:33:25.068842 bl2_stage_init 0x02
505 22:33:25.069356
506 22:33:25.069801 L0:00000000
507 22:33:25.070239 L1:00000703
508 22:33:25.070670 L2:00008067
509 22:33:25.071106 L3:15000000
510 22:33:25.074445 S1:00000000
511 22:33:25.074959 B2:20282000
512 22:33:25.075399 B1:a0f83180
513 22:33:25.075830
514 22:33:25.076301 TE: 68942
515 22:33:25.076736
516 22:33:25.080107 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 22:33:25.080624
518 22:33:25.085652 Board ID = 1
519 22:33:25.086166 Set cpu clk to 24M
520 22:33:25.086602 Set clk81 to 24M
521 22:33:25.091247 Use GP1_pll as DSU clk.
522 22:33:25.091754 DSU clk: 1200 Mhz
523 22:33:25.092234 CPU clk: 1200 MHz
524 22:33:25.096834 Set clk81 to 166.6M
525 22:33:25.102478 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 22:33:25.103026 board id: 1
527 22:33:25.109652 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 22:33:25.120347 fw parse done
529 22:33:25.126291 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 22:33:25.168836 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 22:33:25.179860 PIEI prepare done
532 22:33:25.180455 fastboot data load
533 22:33:25.180902 fastboot data verify
534 22:33:25.185461 verify result: 266
535 22:33:25.191078 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 22:33:25.191585 LPDDR4 probe
537 22:33:25.192060 ddr clk to 1584MHz
538 22:33:25.199160 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 22:33:25.236284
540 22:33:25.236833 dmc_version 0001
541 22:33:25.242978 Check phy result
542 22:33:25.248850 INFO : End of CA training
543 22:33:25.249373 INFO : End of initialization
544 22:33:25.254480 INFO : Training has run successfully!
545 22:33:25.254989 Check phy result
546 22:33:25.260093 INFO : End of initialization
547 22:33:25.260607 INFO : End of read enable training
548 22:33:25.265717 INFO : End of fine write leveling
549 22:33:25.271252 INFO : End of Write leveling coarse delay
550 22:33:25.271752 INFO : Training has run successfully!
551 22:33:25.272239 Check phy result
552 22:33:25.276843 INFO : End of initialization
553 22:33:25.277363 INFO : End of read dq deskew training
554 22:33:25.282444 INFO : End of MPR read delay center optimization
555 22:33:25.288090 INFO : End of write delay center optimization
556 22:33:25.293705 INFO : End of read delay center optimization
557 22:33:25.294237 INFO : End of max read latency training
558 22:33:25.299270 INFO : Training has run successfully!
559 22:33:25.299771 1D training succeed
560 22:33:25.308424 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 22:33:25.356103 Check phy result
562 22:33:25.356664 INFO : End of initialization
563 22:33:25.378417 INFO : End of 2D read delay Voltage center optimization
564 22:33:25.397541 INFO : End of 2D read delay Voltage center optimization
565 22:33:25.449540 INFO : End of 2D write delay Voltage center optimization
566 22:33:25.498842 INFO : End of 2D write delay Voltage center optimization
567 22:33:25.504319 INFO : Training has run successfully!
568 22:33:25.504968
569 22:33:25.505397 channel==0
570 22:33:25.509907 RxClkDly_Margin_A0==78 ps 8
571 22:33:25.510507 TxDqDly_Margin_A0==98 ps 10
572 22:33:25.513201 RxClkDly_Margin_A1==88 ps 9
573 22:33:25.513742 TxDqDly_Margin_A1==98 ps 10
574 22:33:25.518800 TrainedVREFDQ_A0==74
575 22:33:25.519349 TrainedVREFDQ_A1==75
576 22:33:25.519791 VrefDac_Margin_A0==24
577 22:33:25.524354 DeviceVref_Margin_A0==40
578 22:33:25.524655 VrefDac_Margin_A1==23
579 22:33:25.529765 DeviceVref_Margin_A1==39
580 22:33:25.530044
581 22:33:25.530255
582 22:33:25.530462 channel==1
583 22:33:25.530677 RxClkDly_Margin_A0==78 ps 8
584 22:33:25.535514 TxDqDly_Margin_A0==98 ps 10
585 22:33:25.535811 RxClkDly_Margin_A1==88 ps 9
586 22:33:25.541241 TxDqDly_Margin_A1==88 ps 9
587 22:33:25.541592 TrainedVREFDQ_A0==78
588 22:33:25.541802 TrainedVREFDQ_A1==75
589 22:33:25.546743 VrefDac_Margin_A0==23
590 22:33:25.547068 DeviceVref_Margin_A0==36
591 22:33:25.552525 VrefDac_Margin_A1==22
592 22:33:25.553089 DeviceVref_Margin_A1==39
593 22:33:25.553510
594 22:33:25.557953 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 22:33:25.558473
596 22:33:25.585909 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
597 22:33:25.591542 2D training succeed
598 22:33:25.597121 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 22:33:25.597648 auto size-- 65535DDR cs0 size: 2048MB
600 22:33:25.602734 DDR cs1 size: 2048MB
601 22:33:25.603258 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 22:33:25.608286 cs0 DataBus test pass
603 22:33:25.608809 cs1 DataBus test pass
604 22:33:25.609262 cs0 AddrBus test pass
605 22:33:25.613903 cs1 AddrBus test pass
606 22:33:25.614434
607 22:33:25.614894 100bdlr_step_size ps== 464
608 22:33:25.615350 result report
609 22:33:25.619553 boot times 0Enable ddr reg access
610 22:33:25.627084 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 22:33:25.640866 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 22:33:26.295884 bl2z: ptr: 05129330, size: 00001e40
613 22:33:26.302298 0.0;M3 CHK:0;cm4_sp_mode 0
614 22:33:26.302871 MVN_1=0x00000000
615 22:33:26.303325 MVN_2=0x00000000
616 22:33:26.313630 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 22:33:26.314170 OPS=0x04
618 22:33:26.314581 ring efuse init
619 22:33:26.319328 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 22:33:26.319917 [0.017319 Inits done]
621 22:33:26.320431 secure task start!
622 22:33:26.327144 high task start!
623 22:33:26.327908 low task start!
624 22:33:26.328447 run into bl31
625 22:33:26.335737 NOTICE: BL31: v1.3(release):4fc40b1
626 22:33:26.343549 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 22:33:26.344127 NOTICE: BL31: G12A normal boot!
628 22:33:26.358971 NOTICE: BL31: BL33 decompress pass
629 22:33:26.364611 ERROR: Error initializing runtime service opteed_fast
630 22:33:27.609049 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 22:33:27.609460 bl2_stage_init 0x01
632 22:33:27.609893 bl2_stage_init 0x81
633 22:33:27.614583 hw id: 0x0000 - pwm id 0x01
634 22:33:27.615053 bl2_stage_init 0xc1
635 22:33:27.615474 bl2_stage_init 0x02
636 22:33:27.615888
637 22:33:27.620416 L0:00000000
638 22:33:27.620879 L1:00000703
639 22:33:27.621292 L2:00008067
640 22:33:27.621698 L3:15000000
641 22:33:27.622100 S1:00000000
642 22:33:27.625863 B2:20282000
643 22:33:27.626314 B1:a0f83180
644 22:33:27.626721
645 22:33:27.627120 TE: 69599
646 22:33:27.627521
647 22:33:27.631393 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 22:33:27.631831
649 22:33:27.637043 Board ID = 1
650 22:33:27.637491 Set cpu clk to 24M
651 22:33:27.637898 Set clk81 to 24M
652 22:33:27.642633 Use GP1_pll as DSU clk.
653 22:33:27.643076 DSU clk: 1200 Mhz
654 22:33:27.643480 CPU clk: 1200 MHz
655 22:33:27.643876 Set clk81 to 166.6M
656 22:33:27.653818 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 22:33:27.654282 board id: 1
658 22:33:27.660334 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 22:33:27.670918 fw parse done
660 22:33:27.676883 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 22:33:27.719436 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 22:33:27.730396 PIEI prepare done
663 22:33:27.730860 fastboot data load
664 22:33:27.731280 fastboot data verify
665 22:33:27.735962 verify result: 266
666 22:33:27.741543 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 22:33:27.741988 LPDDR4 probe
668 22:33:27.742394 ddr clk to 1584MHz
669 22:33:27.749606 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 22:33:27.786833
671 22:33:27.787326 dmc_version 0001
672 22:33:27.793479 Check phy result
673 22:33:27.799369 INFO : End of CA training
674 22:33:27.799818 INFO : End of initialization
675 22:33:27.805106 INFO : Training has run successfully!
676 22:33:27.805556 Check phy result
677 22:33:27.810641 INFO : End of initialization
678 22:33:27.811089 INFO : End of read enable training
679 22:33:27.813874 INFO : End of fine write leveling
680 22:33:27.819463 INFO : End of Write leveling coarse delay
681 22:33:27.825032 INFO : Training has run successfully!
682 22:33:27.825479 Check phy result
683 22:33:27.825887 INFO : End of initialization
684 22:33:27.830686 INFO : End of read dq deskew training
685 22:33:27.834106 INFO : End of MPR read delay center optimization
686 22:33:27.839606 INFO : End of write delay center optimization
687 22:33:27.845220 INFO : End of read delay center optimization
688 22:33:27.845681 INFO : End of max read latency training
689 22:33:27.850829 INFO : Training has run successfully!
690 22:33:27.851287 1D training succeed
691 22:33:27.859138 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 22:33:27.906681 Check phy result
693 22:33:27.907205 INFO : End of initialization
694 22:33:27.929007 INFO : End of 2D read delay Voltage center optimization
695 22:33:27.948145 INFO : End of 2D read delay Voltage center optimization
696 22:33:28.000078 INFO : End of 2D write delay Voltage center optimization
697 22:33:28.049462 INFO : End of 2D write delay Voltage center optimization
698 22:33:28.054885 INFO : Training has run successfully!
699 22:33:28.055234
700 22:33:28.055500 channel==0
701 22:33:28.060579 RxClkDly_Margin_A0==78 ps 8
702 22:33:28.060890 TxDqDly_Margin_A0==98 ps 10
703 22:33:28.066096 RxClkDly_Margin_A1==88 ps 9
704 22:33:28.066548 TxDqDly_Margin_A1==98 ps 10
705 22:33:28.066952 TrainedVREFDQ_A0==74
706 22:33:28.071619 TrainedVREFDQ_A1==75
707 22:33:28.072083 VrefDac_Margin_A0==23
708 22:33:28.072498 DeviceVref_Margin_A0==40
709 22:33:28.077212 VrefDac_Margin_A1==23
710 22:33:28.077646 DeviceVref_Margin_A1==39
711 22:33:28.078041
712 22:33:28.078431
713 22:33:28.082820 channel==1
714 22:33:28.083272 RxClkDly_Margin_A0==78 ps 8
715 22:33:28.083677 TxDqDly_Margin_A0==98 ps 10
716 22:33:28.088572 RxClkDly_Margin_A1==88 ps 9
717 22:33:28.089042 TxDqDly_Margin_A1==88 ps 9
718 22:33:28.093959 TrainedVREFDQ_A0==78
719 22:33:28.094406 TrainedVREFDQ_A1==75
720 22:33:28.094805 VrefDac_Margin_A0==22
721 22:33:28.099718 DeviceVref_Margin_A0==36
722 22:33:28.100194 VrefDac_Margin_A1==23
723 22:33:28.105290 DeviceVref_Margin_A1==39
724 22:33:28.105724
725 22:33:28.106120 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 22:33:28.106509
727 22:33:28.138707 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000016 00000017 00000018 0000001a 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 22:33:28.139197 2D training succeed
729 22:33:28.144375 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 22:33:28.150699 auto size-- 65535DDR cs0 size: 2048MB
731 22:33:28.151165 DDR cs1 size: 2048MB
732 22:33:28.155588 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 22:33:28.156048 cs0 DataBus test pass
734 22:33:28.161114 cs1 DataBus test pass
735 22:33:28.161536 cs0 AddrBus test pass
736 22:33:28.161923 cs1 AddrBus test pass
737 22:33:28.162306
738 22:33:28.166755 100bdlr_step_size ps== 478
739 22:33:28.167203 result report
740 22:33:28.172403 boot times 0Enable ddr reg access
741 22:33:28.176585 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 22:33:28.191459 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 22:33:28.847395 bl2z: ptr: 05129330, size: 00001e40
744 22:33:28.854508 0.0;M3 CHK:0;cm4_sp_mode 0
745 22:33:28.854970 MVN_1=0x00000000
746 22:33:28.855370 MVN_2=0x00000000
747 22:33:28.866106 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 22:33:28.866600 OPS=0x04
749 22:33:28.866998 ring efuse init
750 22:33:28.871631 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 22:33:28.872123 [0.017310 Inits done]
752 22:33:28.872522 secure task start!
753 22:33:28.879530 high task start!
754 22:33:28.879962 low task start!
755 22:33:28.880385 run into bl31
756 22:33:28.888236 NOTICE: BL31: v1.3(release):4fc40b1
757 22:33:28.896044 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 22:33:28.896588 NOTICE: BL31: G12A normal boot!
759 22:33:28.911526 NOTICE: BL31: BL33 decompress pass
760 22:33:28.917180 ERROR: Error initializing runtime service opteed_fast
761 22:33:29.712782
762 22:33:29.713412
763 22:33:29.718057 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 22:33:29.718507
765 22:33:29.721599 Model: Libre Computer AML-S905D3-CC Solitude
766 22:33:29.868723 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 22:33:29.883967 DRAM: 2 GiB (effective 3.8 GiB)
768 22:33:29.984932 Core: 406 devices, 33 uclasses, devicetree: separate
769 22:33:29.990770 WDT: Not starting watchdog@f0d0
770 22:33:30.015946 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 22:33:30.028214 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 22:33:30.033060 ** Bad device specification mmc 0 **
773 22:33:30.043163 Card did not respond to voltage select! : -110
774 22:33:30.050811 ** Bad device specification mmc 0 **
775 22:33:30.051257 Couldn't find partition mmc 0
776 22:33:30.059099 Card did not respond to voltage select! : -110
777 22:33:30.064647 ** Bad device specification mmc 0 **
778 22:33:30.065095 Couldn't find partition mmc 0
779 22:33:30.069673 Error: could not access storage.
780 22:33:30.367194 Net: eth0: ethernet@ff3f0000
781 22:33:30.367781 starting USB...
782 22:33:30.612012 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 22:33:30.612601 Starting the controller
784 22:33:30.618772 USB XHCI 1.10
785 22:33:32.175241 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 22:33:32.183413 scanning usb for storage devices... 0 Storage Device(s) found
788 22:33:32.234949 Hit any key to stop autoboot: 1
789 22:33:32.235827 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 22:33:32.236468 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 22:33:32.236948 Setting prompt string to ['=>']
792 22:33:32.237464 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 22:33:32.249483 0
794 22:33:32.250406 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 22:33:32.351709 => setenv autoload no
797 22:33:32.352502 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 22:33:32.357266 setenv autoload no
800 22:33:32.458823 => setenv initrd_high 0xffffffff
801 22:33:32.459606 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 22:33:32.463608 setenv initrd_high 0xffffffff
804 22:33:32.565138 => setenv fdt_high 0xffffffff
805 22:33:32.565892 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 22:33:32.570049 setenv fdt_high 0xffffffff
808 22:33:32.671211 => dhcp
809 22:33:32.671964 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 22:33:32.676103 dhcp
811 22:33:33.582003 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 22:33:33.582432 Speed: 1000, full duplex
813 22:33:33.582658 BOOTP broadcast 1
814 22:33:33.599454 DHCP client bound to address 192.168.6.21 (17 ms)
816 22:33:33.700469 => setenv serverip 192.168.6.2
817 22:33:33.701099 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
818 22:33:33.704673 setenv serverip 192.168.6.2
820 22:33:33.806051 => tftpboot 0x01080000 956223/tftp-deploy-6h7vzsi0/kernel/uImage
821 22:33:33.806726 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
822 22:33:33.813456 tftpboot 0x01080000 956223/tftp-deploy-6h7vzsi0/kernel/uImage
823 22:33:33.813904 Speed: 1000, full duplex
824 22:33:33.814313 Using ethernet@ff3f0000 device
825 22:33:33.818890 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
826 22:33:33.824426 Filename '956223/tftp-deploy-6h7vzsi0/kernel/uImage'.
827 22:33:33.828343 Load address: 0x1080000
828 22:33:36.598999 Loading: *################################################## 43.7 MiB
829 22:33:36.599670 15.7 MiB/s
830 22:33:36.600192 done
831 22:33:36.603186 Bytes transferred = 45775424 (2ba7a40 hex)
833 22:33:36.704822 => tftpboot 0x08000000 956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot
834 22:33:36.705554 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
835 22:33:36.712411 tftpboot 0x08000000 956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot
836 22:33:36.712923 Speed: 1000, full duplex
837 22:33:36.713361 Using ethernet@ff3f0000 device
838 22:33:36.717921 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
839 22:33:36.729855 Filename '956223/tftp-deploy-6h7vzsi0/ramdisk/ramdisk.cpio.gz.uboot'.
840 22:33:36.730367 Load address: 0x8000000
841 22:33:38.148400 Loading: *################################################# UDP wrong checksum 00000005 000023ca
842 22:33:43.149376 T UDP wrong checksum 00000005 000023ca
843 22:33:53.151490 T T UDP wrong checksum 00000005 000023ca
844 22:34:13.154811 T T T T UDP wrong checksum 00000005 000023ca
845 22:34:21.138735 T UDP wrong checksum 000000ff 00007e68
846 22:34:21.186902 UDP wrong checksum 000000ff 0000185b
847 22:34:27.678768 T UDP wrong checksum 000000ff 00001b16
848 22:34:27.686115 UDP wrong checksum 000000ff 0000a808
849 22:34:33.160769 T
850 22:34:33.161445 Retry count exceeded; starting again
852 22:34:33.162944 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
855 22:34:33.165039 end: 2.4 uboot-commands (duration 00:01:20) [common]
857 22:34:33.166548 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
859 22:34:33.167714 end: 2 uboot-action (duration 00:01:20) [common]
861 22:34:33.169494 Cleaning after the job
862 22:34:33.170105 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/ramdisk
863 22:34:33.171550 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/kernel
864 22:34:33.197639 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/dtb
865 22:34:33.199060 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/nfsrootfs
866 22:34:33.253072 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956223/tftp-deploy-6h7vzsi0/modules
867 22:34:33.260534 start: 4.1 power-off (timeout 00:00:30) [common]
868 22:34:33.261161 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
869 22:34:33.300473 >> OK - accepted request
870 22:34:33.301851 Returned 0 in 0 seconds
871 22:34:33.402643 end: 4.1 power-off (duration 00:00:00) [common]
873 22:34:33.403683 start: 4.2 read-feedback (timeout 00:10:00) [common]
874 22:34:33.404402 Listened to connection for namespace 'common' for up to 1s
875 22:34:34.405172 Finalising connection for namespace 'common'
876 22:34:34.405910 Disconnecting from shell: Finalise
877 22:34:34.406427 =>
878 22:34:34.507494 end: 4.2 read-feedback (duration 00:00:01) [common]
879 22:34:34.508315 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956223
880 22:34:36.269848 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956223
881 22:34:36.270462 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.