Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:12:58.240119 lava-dispatcher, installed at version: 2024.01
2 01:12:58.240884 start: 0 validate
3 01:12:58.241348 Start time: 2024-11-08 01:12:58.241318+00:00 (UTC)
4 01:12:58.241877 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:12:58.242406 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:12:58.284661 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:12:58.285206 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:12:58.314402 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:12:58.315021 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:12:58.344230 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:12:58.344747 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:12:58.374201 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:12:58.374711 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:12:58.415221 validate duration: 0.17
16 01:12:58.416134 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:12:58.416479 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:12:58.416801 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:12:58.417391 Not decompressing ramdisk as can be used compressed.
20 01:12:58.417849 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:12:58.418136 saving as /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/ramdisk/initrd.cpio.gz
22 01:12:58.418407 total size: 5628169 (5 MB)
23 01:12:58.453340 progress 0 % (0 MB)
24 01:12:58.457565 progress 5 % (0 MB)
25 01:12:58.461742 progress 10 % (0 MB)
26 01:12:58.465398 progress 15 % (0 MB)
27 01:12:58.469434 progress 20 % (1 MB)
28 01:12:58.473204 progress 25 % (1 MB)
29 01:12:58.477209 progress 30 % (1 MB)
30 01:12:58.481199 progress 35 % (1 MB)
31 01:12:58.484902 progress 40 % (2 MB)
32 01:12:58.488944 progress 45 % (2 MB)
33 01:12:58.492513 progress 50 % (2 MB)
34 01:12:58.496509 progress 55 % (2 MB)
35 01:12:58.500521 progress 60 % (3 MB)
36 01:12:58.504142 progress 65 % (3 MB)
37 01:12:58.508136 progress 70 % (3 MB)
38 01:12:58.511680 progress 75 % (4 MB)
39 01:12:58.515773 progress 80 % (4 MB)
40 01:12:58.519351 progress 85 % (4 MB)
41 01:12:58.523310 progress 90 % (4 MB)
42 01:12:58.527184 progress 95 % (5 MB)
43 01:12:58.530506 progress 100 % (5 MB)
44 01:12:58.531187 5 MB downloaded in 0.11 s (47.60 MB/s)
45 01:12:58.531728 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:12:58.532658 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:12:58.532950 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:12:58.533222 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:12:58.533704 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kernel/Image
51 01:12:58.533952 saving as /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/kernel/Image
52 01:12:58.534163 total size: 45775360 (43 MB)
53 01:12:58.534375 No compression specified
54 01:12:58.574373 progress 0 % (0 MB)
55 01:12:58.603795 progress 5 % (2 MB)
56 01:12:58.633416 progress 10 % (4 MB)
57 01:12:58.662356 progress 15 % (6 MB)
58 01:12:58.691148 progress 20 % (8 MB)
59 01:12:58.720547 progress 25 % (10 MB)
60 01:12:58.748883 progress 30 % (13 MB)
61 01:12:58.777444 progress 35 % (15 MB)
62 01:12:58.806044 progress 40 % (17 MB)
63 01:12:58.835066 progress 45 % (19 MB)
64 01:12:58.863852 progress 50 % (21 MB)
65 01:12:58.892136 progress 55 % (24 MB)
66 01:12:58.921017 progress 60 % (26 MB)
67 01:12:58.949901 progress 65 % (28 MB)
68 01:12:58.978270 progress 70 % (30 MB)
69 01:12:59.007148 progress 75 % (32 MB)
70 01:12:59.036203 progress 80 % (34 MB)
71 01:12:59.065521 progress 85 % (37 MB)
72 01:12:59.094239 progress 90 % (39 MB)
73 01:12:59.123195 progress 95 % (41 MB)
74 01:12:59.152209 progress 100 % (43 MB)
75 01:12:59.153045 43 MB downloaded in 0.62 s (70.54 MB/s)
76 01:12:59.153528 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:12:59.154350 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:12:59.154628 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:12:59.154893 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:12:59.155390 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:12:59.155669 saving as /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:12:59.155878 total size: 54703 (0 MB)
84 01:12:59.156117 No compression specified
85 01:12:59.208275 progress 59 % (0 MB)
86 01:12:59.209169 progress 100 % (0 MB)
87 01:12:59.209732 0 MB downloaded in 0.05 s (0.97 MB/s)
88 01:12:59.210205 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:12:59.211030 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:12:59.211298 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:12:59.211563 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:12:59.212063 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:12:59.212328 saving as /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/nfsrootfs/full.rootfs.tar
95 01:12:59.212536 total size: 120894716 (115 MB)
96 01:12:59.212748 Using unxz to decompress xz
97 01:12:59.253316 progress 0 % (0 MB)
98 01:13:00.048244 progress 5 % (5 MB)
99 01:13:00.897141 progress 10 % (11 MB)
100 01:13:01.691242 progress 15 % (17 MB)
101 01:13:02.429298 progress 20 % (23 MB)
102 01:13:03.021461 progress 25 % (28 MB)
103 01:13:03.853706 progress 30 % (34 MB)
104 01:13:04.653234 progress 35 % (40 MB)
105 01:13:05.022148 progress 40 % (46 MB)
106 01:13:05.406628 progress 45 % (51 MB)
107 01:13:06.141538 progress 50 % (57 MB)
108 01:13:07.034737 progress 55 % (63 MB)
109 01:13:07.829480 progress 60 % (69 MB)
110 01:13:08.591799 progress 65 % (74 MB)
111 01:13:09.371859 progress 70 % (80 MB)
112 01:13:10.197073 progress 75 % (86 MB)
113 01:13:10.983576 progress 80 % (92 MB)
114 01:13:11.751187 progress 85 % (98 MB)
115 01:13:12.614558 progress 90 % (103 MB)
116 01:13:13.394277 progress 95 % (109 MB)
117 01:13:14.227472 progress 100 % (115 MB)
118 01:13:14.240066 115 MB downloaded in 15.03 s (7.67 MB/s)
119 01:13:14.241179 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:13:14.243235 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:13:14.243898 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:13:14.244592 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:13:14.245849 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/modules.tar.xz
125 01:13:14.246454 saving as /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/modules/modules.tar
126 01:13:14.246980 total size: 11605964 (11 MB)
127 01:13:14.247506 Using unxz to decompress xz
128 01:13:14.289273 progress 0 % (0 MB)
129 01:13:14.356362 progress 5 % (0 MB)
130 01:13:14.432298 progress 10 % (1 MB)
131 01:13:14.528869 progress 15 % (1 MB)
132 01:13:14.621870 progress 20 % (2 MB)
133 01:13:14.700895 progress 25 % (2 MB)
134 01:13:14.776797 progress 30 % (3 MB)
135 01:13:14.851745 progress 35 % (3 MB)
136 01:13:14.929847 progress 40 % (4 MB)
137 01:13:15.006207 progress 45 % (5 MB)
138 01:13:15.090466 progress 50 % (5 MB)
139 01:13:15.167112 progress 55 % (6 MB)
140 01:13:15.251534 progress 60 % (6 MB)
141 01:13:15.331909 progress 65 % (7 MB)
142 01:13:15.408535 progress 70 % (7 MB)
143 01:13:15.491503 progress 75 % (8 MB)
144 01:13:15.590793 progress 80 % (8 MB)
145 01:13:15.672188 progress 85 % (9 MB)
146 01:13:15.750317 progress 90 % (9 MB)
147 01:13:15.826669 progress 95 % (10 MB)
148 01:13:15.902423 progress 100 % (11 MB)
149 01:13:15.913111 11 MB downloaded in 1.67 s (6.64 MB/s)
150 01:13:15.913683 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:13:15.914568 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:13:15.914861 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 01:13:15.915145 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 01:13:32.615360 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956189/extract-nfsrootfs-ec9iftkv
156 01:13:32.615974 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 01:13:32.616334 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 01:13:32.617218 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4
159 01:13:32.617738 makedir: /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin
160 01:13:32.618161 makedir: /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/tests
161 01:13:32.618586 makedir: /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/results
162 01:13:32.618978 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-add-keys
163 01:13:32.619614 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-add-sources
164 01:13:32.620245 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-background-process-start
165 01:13:32.620786 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-background-process-stop
166 01:13:32.621327 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-common-functions
167 01:13:32.621842 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-echo-ipv4
168 01:13:32.622453 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-install-packages
169 01:13:32.623359 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-installed-packages
170 01:13:32.624038 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-os-build
171 01:13:32.624580 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-probe-channel
172 01:13:32.625075 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-probe-ip
173 01:13:32.625601 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-target-ip
174 01:13:32.626962 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-target-mac
175 01:13:32.627513 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-target-storage
176 01:13:32.628049 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-case
177 01:13:32.628595 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-event
178 01:13:32.629096 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-feedback
179 01:13:32.629580 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-raise
180 01:13:32.630170 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-reference
181 01:13:32.630738 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-runner
182 01:13:32.631259 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-set
183 01:13:32.631751 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-test-shell
184 01:13:32.632312 Updating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-add-keys (debian)
185 01:13:32.633583 Updating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-add-sources (debian)
186 01:13:32.634179 Updating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-install-packages (debian)
187 01:13:32.634745 Updating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-installed-packages (debian)
188 01:13:32.635263 Updating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/bin/lava-os-build (debian)
189 01:13:32.635725 Creating /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/environment
190 01:13:32.636156 LAVA metadata
191 01:13:32.636439 - LAVA_JOB_ID=956189
192 01:13:32.636658 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:13:32.637039 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 01:13:32.638176 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:13:32.638512 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 01:13:32.638722 skipped lava-vland-overlay
197 01:13:32.638964 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:13:32.639219 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 01:13:32.639436 skipped lava-multinode-overlay
200 01:13:32.639681 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:13:32.639931 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 01:13:32.640212 Loading test definitions
203 01:13:32.640498 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 01:13:32.640719 Using /lava-956189 at stage 0
205 01:13:32.641935 uuid=956189_1.6.2.4.1 testdef=None
206 01:13:32.642257 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:13:32.642522 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 01:13:32.644265 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:13:32.645062 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 01:13:32.647250 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:13:32.648114 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 01:13:32.650033 runner path: /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/0/tests/0_timesync-off test_uuid 956189_1.6.2.4.1
215 01:13:32.650599 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:13:32.651406 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 01:13:32.651629 Using /lava-956189 at stage 0
219 01:13:32.652008 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:13:32.652317 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/0/tests/1_kselftest-dt'
221 01:13:36.052014 Running '/usr/bin/git checkout kernelci.org
222 01:13:36.119216 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 01:13:36.120709 uuid=956189_1.6.2.4.5 testdef=None
224 01:13:36.121074 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 01:13:36.121848 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 01:13:36.124737 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:13:36.125576 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 01:13:36.129326 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:13:36.130201 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 01:13:36.133828 runner path: /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/0/tests/1_kselftest-dt test_uuid 956189_1.6.2.4.5
234 01:13:36.134120 BOARD='meson-g12b-a311d-libretech-cc'
235 01:13:36.134337 BRANCH='clk'
236 01:13:36.134543 SKIPFILE='/dev/null'
237 01:13:36.134748 SKIP_INSTALL='True'
238 01:13:36.134948 TESTPROG_URL='http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 01:13:36.135152 TST_CASENAME=''
240 01:13:36.135353 TST_CMDFILES='dt'
241 01:13:36.135922 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:13:36.136753 Creating lava-test-runner.conf files
244 01:13:36.136971 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956189/lava-overlay-ny37pbv4/lava-956189/0 for stage 0
245 01:13:36.137364 - 0_timesync-off
246 01:13:36.137620 - 1_kselftest-dt
247 01:13:36.137977 end: 1.6.2.4 test-definition (duration 00:00:03) [common]
248 01:13:36.138275 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 01:13:59.448295 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 01:13:59.448758 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 01:13:59.449051 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:13:59.449358 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:13:59.449650 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 01:14:00.058911 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:14:00.059405 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 01:14:00.059673 extracting modules file /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956189/extract-nfsrootfs-ec9iftkv
257 01:14:01.405160 extracting modules file /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956189/extract-overlay-ramdisk-c2bpqgx9/ramdisk
258 01:14:02.784098 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:14:02.784590 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 01:14:02.784884 [common] Applying overlay to NFS
261 01:14:02.785114 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956189/compress-overlay-1suphk_n/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956189/extract-nfsrootfs-ec9iftkv
262 01:14:05.494885 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:14:05.495358 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 01:14:05.495659 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 01:14:05.495919 Converting downloaded kernel to a uImage
266 01:14:05.496288 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/kernel/Image /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/kernel/uImage
267 01:14:05.981913 output: Image Name:
268 01:14:05.982345 output: Created: Fri Nov 8 01:14:05 2024
269 01:14:05.982573 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:14:05.982788 output: Data Size: 45775360 Bytes = 44702.50 KiB = 43.65 MiB
271 01:14:05.982997 output: Load Address: 01080000
272 01:14:05.983202 output: Entry Point: 01080000
273 01:14:05.983401 output:
274 01:14:05.983744 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 01:14:05.984056 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 01:14:05.984349 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 01:14:05.984616 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:14:05.984883 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 01:14:05.985146 Building ramdisk /var/lib/lava/dispatcher/tmp/956189/extract-overlay-ramdisk-c2bpqgx9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956189/extract-overlay-ramdisk-c2bpqgx9/ramdisk
280 01:14:08.177152 >> 166791 blocks
281 01:14:15.870853 Adding RAMdisk u-boot header.
282 01:14:15.871305 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956189/extract-overlay-ramdisk-c2bpqgx9/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956189/extract-overlay-ramdisk-c2bpqgx9/ramdisk.cpio.gz.uboot
283 01:14:16.128628 output: Image Name:
284 01:14:16.129054 output: Created: Fri Nov 8 01:14:15 2024
285 01:14:16.129587 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:14:16.130050 output: Data Size: 23432649 Bytes = 22883.45 KiB = 22.35 MiB
287 01:14:16.130521 output: Load Address: 00000000
288 01:14:16.130966 output: Entry Point: 00000000
289 01:14:16.131411 output:
290 01:14:16.132772 rename /var/lib/lava/dispatcher/tmp/956189/extract-overlay-ramdisk-c2bpqgx9/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot
291 01:14:16.133573 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 01:14:16.134180 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 01:14:16.134772 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 01:14:16.135282 No LXC device requested
295 01:14:16.135848 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:14:16.136469 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 01:14:16.137031 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:14:16.137487 Checking files for TFTP limit of 4294967296 bytes.
299 01:14:16.140454 end: 1 tftp-deploy (duration 00:01:18) [common]
300 01:14:16.141087 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:14:16.141677 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:14:16.142236 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:14:16.142802 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:14:16.143392 Using kernel file from prepare-kernel: 956189/tftp-deploy-a2cjcmfh/kernel/uImage
305 01:14:16.144121 substitutions:
306 01:14:16.144587 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:14:16.145038 - {DTB_ADDR}: 0x01070000
308 01:14:16.145484 - {DTB}: 956189/tftp-deploy-a2cjcmfh/dtb/meson-g12b-a311d-libretech-cc.dtb
309 01:14:16.145932 - {INITRD}: 956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot
310 01:14:16.146377 - {KERNEL_ADDR}: 0x01080000
311 01:14:16.146820 - {KERNEL}: 956189/tftp-deploy-a2cjcmfh/kernel/uImage
312 01:14:16.147260 - {LAVA_MAC}: None
313 01:14:16.147743 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956189/extract-nfsrootfs-ec9iftkv
314 01:14:16.148228 - {NFS_SERVER_IP}: 192.168.6.2
315 01:14:16.148674 - {PRESEED_CONFIG}: None
316 01:14:16.149112 - {PRESEED_LOCAL}: None
317 01:14:16.149546 - {RAMDISK_ADDR}: 0x08000000
318 01:14:16.149975 - {RAMDISK}: 956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot
319 01:14:16.150406 - {ROOT_PART}: None
320 01:14:16.150837 - {ROOT}: None
321 01:14:16.151267 - {SERVER_IP}: 192.168.6.2
322 01:14:16.151697 - {TEE_ADDR}: 0x83000000
323 01:14:16.152156 - {TEE}: None
324 01:14:16.152592 Parsed boot commands:
325 01:14:16.153014 - setenv autoload no
326 01:14:16.153444 - setenv initrd_high 0xffffffff
327 01:14:16.153875 - setenv fdt_high 0xffffffff
328 01:14:16.154304 - dhcp
329 01:14:16.154732 - setenv serverip 192.168.6.2
330 01:14:16.155164 - tftpboot 0x01080000 956189/tftp-deploy-a2cjcmfh/kernel/uImage
331 01:14:16.155598 - tftpboot 0x08000000 956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot
332 01:14:16.156053 - tftpboot 0x01070000 956189/tftp-deploy-a2cjcmfh/dtb/meson-g12b-a311d-libretech-cc.dtb
333 01:14:16.156489 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956189/extract-nfsrootfs-ec9iftkv,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:14:16.156935 - bootm 0x01080000 0x08000000 0x01070000
335 01:14:16.157488 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:14:16.159131 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:14:16.159594 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 01:14:16.175641 Setting prompt string to ['lava-test: # ']
340 01:14:16.177307 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:14:16.178006 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:14:16.178654 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:14:16.179262 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:14:16.180591 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 01:14:16.218252 >> OK - accepted request
346 01:14:16.220395 Returned 0 in 0 seconds
347 01:14:16.321562 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:14:16.323298 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:14:16.323926 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:14:16.324563 Setting prompt string to ['Hit any key to stop autoboot']
352 01:14:16.325076 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:14:16.326771 Trying 192.168.56.21...
354 01:14:16.327297 Connected to conserv1.
355 01:14:16.327757 Escape character is '^]'.
356 01:14:16.328295
357 01:14:16.328799 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 01:14:16.329289
359 01:14:27.720564 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 01:14:27.721237 bl2_stage_init 0x01
361 01:14:27.721738 bl2_stage_init 0x81
362 01:14:27.726046 hw id: 0x0000 - pwm id 0x01
363 01:14:27.726612 bl2_stage_init 0xc1
364 01:14:27.727078 bl2_stage_init 0x02
365 01:14:27.727509
366 01:14:27.731680 L0:00000000
367 01:14:27.732247 L1:20000703
368 01:14:27.732711 L2:00008067
369 01:14:27.733159 L3:14000000
370 01:14:27.734492 B2:00402000
371 01:14:27.734960 B1:e0f83180
372 01:14:27.735405
373 01:14:27.735838 TE: 58124
374 01:14:27.736307
375 01:14:27.745645 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 01:14:27.746116
377 01:14:27.746552 Board ID = 1
378 01:14:27.746977 Set A53 clk to 24M
379 01:14:27.747399 Set A73 clk to 24M
380 01:14:27.751338 Set clk81 to 24M
381 01:14:27.751791 A53 clk: 1200 MHz
382 01:14:27.752261 A73 clk: 1200 MHz
383 01:14:27.754806 CLK81: 166.6M
384 01:14:27.755250 smccc: 00012a92
385 01:14:27.760371 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 01:14:27.765890 board id: 1
387 01:14:27.771112 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:14:27.781811 fw parse done
389 01:14:27.787792 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:14:27.830193 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:14:27.841192 PIEI prepare done
392 01:14:27.841651 fastboot data load
393 01:14:27.842086 fastboot data verify
394 01:14:27.846763 verify result: 266
395 01:14:27.852479 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 01:14:27.852949 LPDDR4 probe
397 01:14:27.853385 ddr clk to 1584MHz
398 01:14:27.860354 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:14:27.897606
400 01:14:27.898077 dmc_version 0001
401 01:14:27.904320 Check phy result
402 01:14:27.910138 INFO : End of CA training
403 01:14:27.910613 INFO : End of initialization
404 01:14:27.915703 INFO : Training has run successfully!
405 01:14:27.916200 Check phy result
406 01:14:27.921400 INFO : End of initialization
407 01:14:27.921861 INFO : End of read enable training
408 01:14:27.927004 INFO : End of fine write leveling
409 01:14:27.932689 INFO : End of Write leveling coarse delay
410 01:14:27.933150 INFO : Training has run successfully!
411 01:14:27.933588 Check phy result
412 01:14:27.938188 INFO : End of initialization
413 01:14:27.938643 INFO : End of read dq deskew training
414 01:14:27.943751 INFO : End of MPR read delay center optimization
415 01:14:27.949404 INFO : End of write delay center optimization
416 01:14:27.954950 INFO : End of read delay center optimization
417 01:14:27.955413 INFO : End of max read latency training
418 01:14:27.960709 INFO : Training has run successfully!
419 01:14:27.961174 1D training succeed
420 01:14:27.969750 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:14:28.017420 Check phy result
422 01:14:28.017978 INFO : End of initialization
423 01:14:28.039017 INFO : End of 2D read delay Voltage center optimization
424 01:14:28.059097 INFO : End of 2D read delay Voltage center optimization
425 01:14:28.110976 INFO : End of 2D write delay Voltage center optimization
426 01:14:28.160251 INFO : End of 2D write delay Voltage center optimization
427 01:14:28.165791 INFO : Training has run successfully!
428 01:14:28.166268
429 01:14:28.166716 channel==0
430 01:14:28.171378 RxClkDly_Margin_A0==88 ps 9
431 01:14:28.171843 TxDqDly_Margin_A0==98 ps 10
432 01:14:28.174847 RxClkDly_Margin_A1==88 ps 9
433 01:14:28.175311 TxDqDly_Margin_A1==98 ps 10
434 01:14:28.180514 TrainedVREFDQ_A0==74
435 01:14:28.180980 TrainedVREFDQ_A1==74
436 01:14:28.181420 VrefDac_Margin_A0==25
437 01:14:28.185929 DeviceVref_Margin_A0==40
438 01:14:28.186391 VrefDac_Margin_A1==25
439 01:14:28.191508 DeviceVref_Margin_A1==40
440 01:14:28.191967
441 01:14:28.192438
442 01:14:28.192874 channel==1
443 01:14:28.193303 RxClkDly_Margin_A0==88 ps 9
444 01:14:28.195028 TxDqDly_Margin_A0==98 ps 10
445 01:14:28.200760 RxClkDly_Margin_A1==98 ps 10
446 01:14:28.201225 TxDqDly_Margin_A1==88 ps 9
447 01:14:28.201663 TrainedVREFDQ_A0==77
448 01:14:28.206215 TrainedVREFDQ_A1==77
449 01:14:28.206679 VrefDac_Margin_A0==22
450 01:14:28.211884 DeviceVref_Margin_A0==37
451 01:14:28.212395 VrefDac_Margin_A1==24
452 01:14:28.212829 DeviceVref_Margin_A1==37
453 01:14:28.213258
454 01:14:28.220740 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:14:28.221208
456 01:14:28.248892 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 01:14:28.249448 2D training succeed
458 01:14:28.254447 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:14:28.259889 auto size-- 65535DDR cs0 size: 2048MB
460 01:14:28.260382 DDR cs1 size: 2048MB
461 01:14:28.265466 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:14:28.265924 cs0 DataBus test pass
463 01:14:28.271063 cs1 DataBus test pass
464 01:14:28.271523 cs0 AddrBus test pass
465 01:14:28.276695 cs1 AddrBus test pass
466 01:14:28.277155
467 01:14:28.277587 100bdlr_step_size ps== 420
468 01:14:28.278025 result report
469 01:14:28.282296 boot times 0Enable ddr reg access
470 01:14:28.288750 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:14:28.302071 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 01:14:28.874150 0.0;M3 CHK:0;cm4_sp_mode 0
473 01:14:28.874778 MVN_1=0x00000000
474 01:14:28.879559 MVN_2=0x00000000
475 01:14:28.885311 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 01:14:28.885783 OPS=0x10
477 01:14:28.886222 ring efuse init
478 01:14:28.886657 chipver efuse init
479 01:14:28.890877 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 01:14:28.896493 [0.018961 Inits done]
481 01:14:28.896950 secure task start!
482 01:14:28.897388 high task start!
483 01:14:28.901058 low task start!
484 01:14:28.901519 run into bl31
485 01:14:28.907668 NOTICE: BL31: v1.3(release):4fc40b1
486 01:14:28.915484 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 01:14:28.915957 NOTICE: BL31: G12A normal boot!
488 01:14:28.940795 NOTICE: BL31: BL33 decompress pass
489 01:14:28.946501 ERROR: Error initializing runtime service opteed_fast
490 01:14:30.179420
491 01:14:30.179863
492 01:14:30.187754 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 01:14:30.188069
494 01:14:30.188311 Model: Libre Computer AML-A311D-CC Alta
495 01:14:30.396211 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 01:14:30.419631 DRAM: 2 GiB (effective 3.8 GiB)
497 01:14:30.562602 Core: 408 devices, 31 uclasses, devicetree: separate
498 01:14:30.568501 WDT: Not starting watchdog@f0d0
499 01:14:30.600732 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 01:14:30.613128 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 01:14:30.618419 ** Bad device specification mmc 0 **
502 01:14:30.628461 Card did not respond to voltage select! : -110
503 01:14:30.636133 ** Bad device specification mmc 0 **
504 01:14:30.636597 Couldn't find partition mmc 0
505 01:14:30.644455 Card did not respond to voltage select! : -110
506 01:14:30.650009 ** Bad device specification mmc 0 **
507 01:14:30.650490 Couldn't find partition mmc 0
508 01:14:30.655039 Error: could not access storage.
509 01:14:31.920774 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 01:14:31.921384 bl2_stage_init 0x01
511 01:14:31.921819 bl2_stage_init 0x81
512 01:14:31.926408 hw id: 0x0000 - pwm id 0x01
513 01:14:31.926872 bl2_stage_init 0xc1
514 01:14:31.927293 bl2_stage_init 0x02
515 01:14:31.927701
516 01:14:31.931962 L0:00000000
517 01:14:31.932441 L1:20000703
518 01:14:31.932853 L2:00008067
519 01:14:31.933254 L3:14000000
520 01:14:31.934921 B2:00402000
521 01:14:31.935377 B1:e0f83180
522 01:14:31.935787
523 01:14:31.936230 TE: 58159
524 01:14:31.936641
525 01:14:31.946110 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 01:14:31.946572
527 01:14:31.946985 Board ID = 1
528 01:14:31.947384 Set A53 clk to 24M
529 01:14:31.947783 Set A73 clk to 24M
530 01:14:31.951659 Set clk81 to 24M
531 01:14:31.952140 A53 clk: 1200 MHz
532 01:14:31.952554 A73 clk: 1200 MHz
533 01:14:31.954993 CLK81: 166.6M
534 01:14:31.955447 smccc: 00012ab5
535 01:14:31.960573 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 01:14:31.966191 board id: 1
537 01:14:31.971449 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 01:14:31.982168 fw parse done
539 01:14:31.988071 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 01:14:32.030690 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 01:14:32.041735 PIEI prepare done
542 01:14:32.042191 fastboot data load
543 01:14:32.042609 fastboot data verify
544 01:14:32.047276 verify result: 266
545 01:14:32.052855 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 01:14:32.053310 LPDDR4 probe
547 01:14:32.053721 ddr clk to 1584MHz
548 01:14:32.060830 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 01:14:32.098103
550 01:14:32.098551 dmc_version 0001
551 01:14:32.104758 Check phy result
552 01:14:32.110629 INFO : End of CA training
553 01:14:32.111073 INFO : End of initialization
554 01:14:32.116267 INFO : Training has run successfully!
555 01:14:32.116709 Check phy result
556 01:14:32.121854 INFO : End of initialization
557 01:14:32.122303 INFO : End of read enable training
558 01:14:32.127426 INFO : End of fine write leveling
559 01:14:32.133011 INFO : End of Write leveling coarse delay
560 01:14:32.133454 INFO : Training has run successfully!
561 01:14:32.133859 Check phy result
562 01:14:32.138606 INFO : End of initialization
563 01:14:32.139052 INFO : End of read dq deskew training
564 01:14:32.144242 INFO : End of MPR read delay center optimization
565 01:14:32.149845 INFO : End of write delay center optimization
566 01:14:32.155435 INFO : End of read delay center optimization
567 01:14:32.155877 INFO : End of max read latency training
568 01:14:32.161034 INFO : Training has run successfully!
569 01:14:32.161482 1D training succeed
570 01:14:32.170273 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 01:14:32.217806 Check phy result
572 01:14:32.218254 INFO : End of initialization
573 01:14:32.239583 INFO : End of 2D read delay Voltage center optimization
574 01:14:32.259838 INFO : End of 2D read delay Voltage center optimization
575 01:14:32.311824 INFO : End of 2D write delay Voltage center optimization
576 01:14:32.361295 INFO : End of 2D write delay Voltage center optimization
577 01:14:32.366801 INFO : Training has run successfully!
578 01:14:32.367267
579 01:14:32.367684 channel==0
580 01:14:32.372422 RxClkDly_Margin_A0==88 ps 9
581 01:14:32.372876 TxDqDly_Margin_A0==98 ps 10
582 01:14:32.378023 RxClkDly_Margin_A1==88 ps 9
583 01:14:32.378485 TxDqDly_Margin_A1==98 ps 10
584 01:14:32.378899 TrainedVREFDQ_A0==74
585 01:14:32.383615 TrainedVREFDQ_A1==74
586 01:14:32.384108 VrefDac_Margin_A0==25
587 01:14:32.384522 DeviceVref_Margin_A0==40
588 01:14:32.389262 VrefDac_Margin_A1==26
589 01:14:32.389710 DeviceVref_Margin_A1==40
590 01:14:32.390118
591 01:14:32.390519
592 01:14:32.394851 channel==1
593 01:14:32.395297 RxClkDly_Margin_A0==88 ps 9
594 01:14:32.395708 TxDqDly_Margin_A0==98 ps 10
595 01:14:32.400412 RxClkDly_Margin_A1==88 ps 9
596 01:14:32.400870 TxDqDly_Margin_A1==88 ps 9
597 01:14:32.406005 TrainedVREFDQ_A0==77
598 01:14:32.406457 TrainedVREFDQ_A1==77
599 01:14:32.406869 VrefDac_Margin_A0==22
600 01:14:32.411789 DeviceVref_Margin_A0==37
601 01:14:32.412371 VrefDac_Margin_A1==24
602 01:14:32.417460 DeviceVref_Margin_A1==37
603 01:14:32.418008
604 01:14:32.418430 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 01:14:32.418837
606 01:14:32.450823 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 01:14:32.451337 2D training succeed
608 01:14:32.456472 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 01:14:32.462083 auto size-- 65535DDR cs0 size: 2048MB
610 01:14:32.462557 DDR cs1 size: 2048MB
611 01:14:32.467663 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 01:14:32.468164 cs0 DataBus test pass
613 01:14:32.473349 cs1 DataBus test pass
614 01:14:32.473831 cs0 AddrBus test pass
615 01:14:32.474241 cs1 AddrBus test pass
616 01:14:32.474641
617 01:14:32.478896 100bdlr_step_size ps== 420
618 01:14:32.479377 result report
619 01:14:32.484490 boot times 0Enable ddr reg access
620 01:14:32.489748 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 01:14:32.503164 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 01:14:33.076775 0.0;M3 CHK:0;cm4_sp_mode 0
623 01:14:33.077334 MVN_1=0x00000000
624 01:14:33.082397 MVN_2=0x00000000
625 01:14:33.088223 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 01:14:33.088720 OPS=0x10
627 01:14:33.089173 ring efuse init
628 01:14:33.089570 chipver efuse init
629 01:14:33.093634 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 01:14:33.099310 [0.018961 Inits done]
631 01:14:33.099762 secure task start!
632 01:14:33.100203 high task start!
633 01:14:33.103766 low task start!
634 01:14:33.104243 run into bl31
635 01:14:33.110444 NOTICE: BL31: v1.3(release):4fc40b1
636 01:14:33.118396 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 01:14:33.118851 NOTICE: BL31: G12A normal boot!
638 01:14:33.143582 NOTICE: BL31: BL33 decompress pass
639 01:14:33.149397 ERROR: Error initializing runtime service opteed_fast
640 01:14:34.382377
641 01:14:34.383011
642 01:14:34.390926 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 01:14:34.391403
644 01:14:34.391818 Model: Libre Computer AML-A311D-CC Alta
645 01:14:34.599335 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 01:14:34.622642 DRAM: 2 GiB (effective 3.8 GiB)
647 01:14:34.765511 Core: 408 devices, 31 uclasses, devicetree: separate
648 01:14:34.771463 WDT: Not starting watchdog@f0d0
649 01:14:34.803751 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 01:14:34.816499 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 01:14:34.821243 ** Bad device specification mmc 0 **
652 01:14:34.831638 Card did not respond to voltage select! : -110
653 01:14:34.839595 ** Bad device specification mmc 0 **
654 01:14:34.840246 Couldn't find partition mmc 0
655 01:14:34.847522 Card did not respond to voltage select! : -110
656 01:14:34.852882 ** Bad device specification mmc 0 **
657 01:14:34.853297 Couldn't find partition mmc 0
658 01:14:34.858003 Error: could not access storage.
659 01:14:35.203855 Net: eth0: ethernet@ff3f0000
660 01:14:35.204307 starting USB...
661 01:14:35.452546 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 01:14:35.453164 Starting the controller
663 01:14:35.459359 USB XHCI 1.10
664 01:14:37.171074 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 01:14:37.171700 bl2_stage_init 0x01
666 01:14:37.172189 bl2_stage_init 0x81
667 01:14:37.176801 hw id: 0x0000 - pwm id 0x01
668 01:14:37.177251 bl2_stage_init 0xc1
669 01:14:37.177662 bl2_stage_init 0x02
670 01:14:37.178069
671 01:14:37.182329 L0:00000000
672 01:14:37.182762 L1:20000703
673 01:14:37.183172 L2:00008067
674 01:14:37.183568 L3:14000000
675 01:14:37.188098 B2:00402000
676 01:14:37.188540 B1:e0f83180
677 01:14:37.188950
678 01:14:37.189355 TE: 58167
679 01:14:37.189758
680 01:14:37.193522 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 01:14:37.193964
682 01:14:37.194370 Board ID = 1
683 01:14:37.199098 Set A53 clk to 24M
684 01:14:37.199530 Set A73 clk to 24M
685 01:14:37.199936 Set clk81 to 24M
686 01:14:37.204846 A53 clk: 1200 MHz
687 01:14:37.205275 A73 clk: 1200 MHz
688 01:14:37.205680 CLK81: 166.6M
689 01:14:37.206080 smccc: 00012abd
690 01:14:37.210436 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 01:14:37.215912 board id: 1
692 01:14:37.221692 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 01:14:37.232304 fw parse done
694 01:14:37.238305 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 01:14:37.281024 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 01:14:37.291962 PIEI prepare done
697 01:14:37.292445 fastboot data load
698 01:14:37.292863 fastboot data verify
699 01:14:37.297461 verify result: 266
700 01:14:37.303037 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 01:14:37.303476 LPDDR4 probe
702 01:14:37.303880 ddr clk to 1584MHz
703 01:14:37.311086 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 01:14:37.348310
705 01:14:37.348766 dmc_version 0001
706 01:14:37.355067 Check phy result
707 01:14:37.360860 INFO : End of CA training
708 01:14:37.361298 INFO : End of initialization
709 01:14:37.366453 INFO : Training has run successfully!
710 01:14:37.366890 Check phy result
711 01:14:37.372069 INFO : End of initialization
712 01:14:37.372503 INFO : End of read enable training
713 01:14:37.375334 INFO : End of fine write leveling
714 01:14:37.380966 INFO : End of Write leveling coarse delay
715 01:14:37.386514 INFO : Training has run successfully!
716 01:14:37.386956 Check phy result
717 01:14:37.387368 INFO : End of initialization
718 01:14:37.392079 INFO : End of read dq deskew training
719 01:14:37.397698 INFO : End of MPR read delay center optimization
720 01:14:37.398130 INFO : End of write delay center optimization
721 01:14:37.403294 INFO : End of read delay center optimization
722 01:14:37.409117 INFO : End of max read latency training
723 01:14:37.409550 INFO : Training has run successfully!
724 01:14:37.414657 1D training succeed
725 01:14:37.420523 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 01:14:37.468095 Check phy result
727 01:14:37.468568 INFO : End of initialization
728 01:14:37.493752 INFO : End of 2D read delay Voltage center optimization
729 01:14:37.510128 INFO : End of 2D read delay Voltage center optimization
730 01:14:37.562242 INFO : End of 2D write delay Voltage center optimization
731 01:14:37.611466 INFO : End of 2D write delay Voltage center optimization
732 01:14:37.617030 INFO : Training has run successfully!
733 01:14:37.617489
734 01:14:37.617904 channel==0
735 01:14:37.622540 RxClkDly_Margin_A0==88 ps 9
736 01:14:37.622974 TxDqDly_Margin_A0==98 ps 10
737 01:14:37.628135 RxClkDly_Margin_A1==88 ps 9
738 01:14:37.628562 TxDqDly_Margin_A1==98 ps 10
739 01:14:37.628970 TrainedVREFDQ_A0==74
740 01:14:37.633762 TrainedVREFDQ_A1==74
741 01:14:37.634194 VrefDac_Margin_A0==25
742 01:14:37.634597 DeviceVref_Margin_A0==40
743 01:14:37.639301 VrefDac_Margin_A1==25
744 01:14:37.639723 DeviceVref_Margin_A1==40
745 01:14:37.640178
746 01:14:37.640585
747 01:14:37.645034 channel==1
748 01:14:37.645464 RxClkDly_Margin_A0==98 ps 10
749 01:14:37.645866 TxDqDly_Margin_A0==88 ps 9
750 01:14:37.650579 RxClkDly_Margin_A1==98 ps 10
751 01:14:37.651005 TxDqDly_Margin_A1==88 ps 9
752 01:14:37.656231 TrainedVREFDQ_A0==76
753 01:14:37.656662 TrainedVREFDQ_A1==77
754 01:14:37.657067 VrefDac_Margin_A0==22
755 01:14:37.661790 DeviceVref_Margin_A0==38
756 01:14:37.662218 VrefDac_Margin_A1==22
757 01:14:37.667373 DeviceVref_Margin_A1==37
758 01:14:37.667804
759 01:14:37.668250 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 01:14:37.668651
761 01:14:37.701035 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 01:14:37.701499 2D training succeed
763 01:14:37.706602 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 01:14:37.712240 auto size-- 65535DDR cs0 size: 2048MB
765 01:14:37.712672 DDR cs1 size: 2048MB
766 01:14:37.717800 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 01:14:37.718231 cs0 DataBus test pass
768 01:14:37.723330 cs1 DataBus test pass
769 01:14:37.723770 cs0 AddrBus test pass
770 01:14:37.724205 cs1 AddrBus test pass
771 01:14:37.724602
772 01:14:37.728945 100bdlr_step_size ps== 432
773 01:14:37.729386 result report
774 01:14:37.734492 boot times 0Enable ddr reg access
775 01:14:37.739853 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 01:14:37.753332 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 01:14:38.326444 0.0;M3 CHK:0;cm4_sp_mode 0
778 01:14:38.327080 MVN_1=0x00000000
779 01:14:38.332028 MVN_2=0x00000000
780 01:14:38.337779 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 01:14:38.338280 OPS=0x10
782 01:14:38.338698 ring efuse init
783 01:14:38.339091 chipver efuse init
784 01:14:38.343249 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 01:14:38.348986 [0.018961 Inits done]
786 01:14:38.349411 secure task start!
787 01:14:38.349803 high task start!
788 01:14:38.353436 low task start!
789 01:14:38.353854 run into bl31
790 01:14:38.360107 NOTICE: BL31: v1.3(release):4fc40b1
791 01:14:38.367905 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 01:14:38.368365 NOTICE: BL31: G12A normal boot!
793 01:14:38.393259 NOTICE: BL31: BL33 decompress pass
794 01:14:38.399047 ERROR: Error initializing runtime service opteed_fast
795 01:14:39.631938
796 01:14:39.632602
797 01:14:39.640269 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 01:14:39.640715
799 01:14:39.641125 Model: Libre Computer AML-A311D-CC Alta
800 01:14:39.848588 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 01:14:39.872045 DRAM: 2 GiB (effective 3.8 GiB)
802 01:14:40.014981 Core: 408 devices, 31 uclasses, devicetree: separate
803 01:14:40.020880 WDT: Not starting watchdog@f0d0
804 01:14:40.053229 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 01:14:40.065602 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 01:14:40.070589 ** Bad device specification mmc 0 **
807 01:14:40.080975 Card did not respond to voltage select! : -110
808 01:14:40.088562 ** Bad device specification mmc 0 **
809 01:14:40.088995 Couldn't find partition mmc 0
810 01:14:40.096960 Card did not respond to voltage select! : -110
811 01:14:40.102435 ** Bad device specification mmc 0 **
812 01:14:40.102865 Couldn't find partition mmc 0
813 01:14:40.107469 Error: could not access storage.
814 01:14:40.451144 Net: eth0: ethernet@ff3f0000
815 01:14:40.451735 starting USB...
816 01:14:40.702857 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 01:14:40.703471 Starting the controller
818 01:14:40.709781 USB XHCI 1.10
819 01:14:42.871145 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 01:14:42.871749 bl2_stage_init 0x01
821 01:14:42.872222 bl2_stage_init 0x81
822 01:14:42.876598 hw id: 0x0000 - pwm id 0x01
823 01:14:42.877037 bl2_stage_init 0xc1
824 01:14:42.877447 bl2_stage_init 0x02
825 01:14:42.877849
826 01:14:42.882192 L0:00000000
827 01:14:42.882623 L1:20000703
828 01:14:42.883023 L2:00008067
829 01:14:42.883422 L3:14000000
830 01:14:42.885144 B2:00402000
831 01:14:42.885575 B1:e0f83180
832 01:14:42.885980
833 01:14:42.886386 TE: 58124
834 01:14:42.886795
835 01:14:42.896314 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 01:14:42.896753
837 01:14:42.897164 Board ID = 1
838 01:14:42.897564 Set A53 clk to 24M
839 01:14:42.897960 Set A73 clk to 24M
840 01:14:42.901884 Set clk81 to 24M
841 01:14:42.902312 A53 clk: 1200 MHz
842 01:14:42.902712 A73 clk: 1200 MHz
843 01:14:42.905370 CLK81: 166.6M
844 01:14:42.905793 smccc: 00012a92
845 01:14:42.910905 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 01:14:42.916523 board id: 1
847 01:14:42.921660 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 01:14:42.932259 fw parse done
849 01:14:42.938396 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 01:14:42.980870 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 01:14:42.991804 PIEI prepare done
852 01:14:42.992279 fastboot data load
853 01:14:42.992692 fastboot data verify
854 01:14:42.997369 verify result: 266
855 01:14:43.002968 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 01:14:43.003397 LPDDR4 probe
857 01:14:43.003805 ddr clk to 1584MHz
858 01:14:43.010966 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 01:14:43.048225
860 01:14:43.048678 dmc_version 0001
861 01:14:43.054907 Check phy result
862 01:14:43.060776 INFO : End of CA training
863 01:14:43.061211 INFO : End of initialization
864 01:14:43.066368 INFO : Training has run successfully!
865 01:14:43.066799 Check phy result
866 01:14:43.071963 INFO : End of initialization
867 01:14:43.072425 INFO : End of read enable training
868 01:14:43.075276 INFO : End of fine write leveling
869 01:14:43.080829 INFO : End of Write leveling coarse delay
870 01:14:43.086461 INFO : Training has run successfully!
871 01:14:43.086891 Check phy result
872 01:14:43.087298 INFO : End of initialization
873 01:14:43.092047 INFO : End of read dq deskew training
874 01:14:43.097751 INFO : End of MPR read delay center optimization
875 01:14:43.098177 INFO : End of write delay center optimization
876 01:14:43.103206 INFO : End of read delay center optimization
877 01:14:43.108834 INFO : End of max read latency training
878 01:14:43.109256 INFO : Training has run successfully!
879 01:14:43.114477 1D training succeed
880 01:14:43.120389 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 01:14:43.167958 Check phy result
882 01:14:43.168404 INFO : End of initialization
883 01:14:43.189625 INFO : End of 2D read delay Voltage center optimization
884 01:14:43.209729 INFO : End of 2D read delay Voltage center optimization
885 01:14:43.261665 INFO : End of 2D write delay Voltage center optimization
886 01:14:43.310927 INFO : End of 2D write delay Voltage center optimization
887 01:14:43.316524 INFO : Training has run successfully!
888 01:14:43.316972
889 01:14:43.317382 channel==0
890 01:14:43.322022 RxClkDly_Margin_A0==88 ps 9
891 01:14:43.322464 TxDqDly_Margin_A0==98 ps 10
892 01:14:43.327628 RxClkDly_Margin_A1==88 ps 9
893 01:14:43.328118 TxDqDly_Margin_A1==98 ps 10
894 01:14:43.328552 TrainedVREFDQ_A0==74
895 01:14:43.333248 TrainedVREFDQ_A1==74
896 01:14:43.333734 VrefDac_Margin_A0==25
897 01:14:43.334146 DeviceVref_Margin_A0==40
898 01:14:43.338863 VrefDac_Margin_A1==25
899 01:14:43.339335 DeviceVref_Margin_A1==40
900 01:14:43.339725
901 01:14:43.340151
902 01:14:43.344532 channel==1
903 01:14:43.344958 RxClkDly_Margin_A0==98 ps 10
904 01:14:43.345346 TxDqDly_Margin_A0==88 ps 9
905 01:14:43.350092 RxClkDly_Margin_A1==98 ps 10
906 01:14:43.350509 TxDqDly_Margin_A1==88 ps 9
907 01:14:43.355599 TrainedVREFDQ_A0==77
908 01:14:43.356054 TrainedVREFDQ_A1==77
909 01:14:43.356451 VrefDac_Margin_A0==22
910 01:14:43.361291 DeviceVref_Margin_A0==37
911 01:14:43.361756 VrefDac_Margin_A1==22
912 01:14:43.366853 DeviceVref_Margin_A1==37
913 01:14:43.367300
914 01:14:43.367693 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 01:14:43.368119
916 01:14:43.400391 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
917 01:14:43.400868 2D training succeed
918 01:14:43.406084 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 01:14:43.411703 auto size-- 65535DDR cs0 size: 2048MB
920 01:14:43.412168 DDR cs1 size: 2048MB
921 01:14:43.417317 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 01:14:43.417803 cs0 DataBus test pass
923 01:14:43.422813 cs1 DataBus test pass
924 01:14:43.423242 cs0 AddrBus test pass
925 01:14:43.423634 cs1 AddrBus test pass
926 01:14:43.424051
927 01:14:43.428384 100bdlr_step_size ps== 420
928 01:14:43.428831 result report
929 01:14:43.433930 boot times 0Enable ddr reg access
930 01:14:43.439291 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 01:14:43.452851 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 01:14:44.025010 0.0;M3 CHK:0;cm4_sp_mode 0
933 01:14:44.025630 MVN_1=0x00000000
934 01:14:44.030236 MVN_2=0x00000000
935 01:14:44.036042 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 01:14:44.036505 OPS=0x10
937 01:14:44.036916 ring efuse init
938 01:14:44.037315 chipver efuse init
939 01:14:44.044379 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 01:14:44.044824 [0.018961 Inits done]
941 01:14:44.045232 secure task start!
942 01:14:44.051833 high task start!
943 01:14:44.052289 low task start!
944 01:14:44.052692 run into bl31
945 01:14:44.058549 NOTICE: BL31: v1.3(release):4fc40b1
946 01:14:44.066252 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 01:14:44.066690 NOTICE: BL31: G12A normal boot!
948 01:14:44.091571 NOTICE: BL31: BL33 decompress pass
949 01:14:44.097255 ERROR: Error initializing runtime service opteed_fast
950 01:14:45.330269
951 01:14:45.330888
952 01:14:45.338534 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 01:14:45.338979
954 01:14:45.339389 Model: Libre Computer AML-A311D-CC Alta
955 01:14:45.547123 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 01:14:45.570390 DRAM: 2 GiB (effective 3.8 GiB)
957 01:14:45.713358 Core: 408 devices, 31 uclasses, devicetree: separate
958 01:14:45.719203 WDT: Not starting watchdog@f0d0
959 01:14:45.751441 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 01:14:45.763923 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 01:14:45.768942 ** Bad device specification mmc 0 **
962 01:14:45.779234 Card did not respond to voltage select! : -110
963 01:14:45.786953 ** Bad device specification mmc 0 **
964 01:14:45.787400 Couldn't find partition mmc 0
965 01:14:45.795209 Card did not respond to voltage select! : -110
966 01:14:45.800730 ** Bad device specification mmc 0 **
967 01:14:45.801176 Couldn't find partition mmc 0
968 01:14:45.805827 Error: could not access storage.
969 01:14:46.148303 Net: eth0: ethernet@ff3f0000
970 01:14:46.148916 starting USB...
971 01:14:46.400128 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 01:14:46.400715 Starting the controller
973 01:14:46.407058 USB XHCI 1.10
974 01:14:47.961418 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 01:14:47.969558 scanning usb for storage devices... 0 Storage Device(s) found
977 01:14:48.021009 Hit any key to stop autoboot: 1
978 01:14:48.021829 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 01:14:48.022446 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 01:14:48.022930 Setting prompt string to ['=>']
981 01:14:48.023428 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 01:14:48.037018 0
983 01:14:48.037880 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 01:14:48.038368 Sending with 10 millisecond of delay
986 01:14:49.172949 => setenv autoload no
987 01:14:49.183749 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 01:14:49.188682 setenv autoload no
989 01:14:49.189391 Sending with 10 millisecond of delay
991 01:14:50.987033 => setenv initrd_high 0xffffffff
992 01:14:50.997821 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 01:14:50.998634 setenv initrd_high 0xffffffff
994 01:14:50.999341 Sending with 10 millisecond of delay
996 01:14:52.615752 => setenv fdt_high 0xffffffff
997 01:14:52.626808 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 01:14:52.627871 setenv fdt_high 0xffffffff
999 01:14:52.628789 Sending with 10 millisecond of delay
1001 01:14:52.920866 => dhcp
1002 01:14:52.931719 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 01:14:52.932767 dhcp
1004 01:14:52.933328 Speed: 1000, full duplex
1005 01:14:52.933866 BOOTP broadcast 1
1006 01:14:52.943505 DHCP client bound to address 192.168.6.27 (12 ms)
1007 01:14:52.944368 Sending with 10 millisecond of delay
1009 01:14:54.621147 => setenv serverip 192.168.6.2
1010 01:14:54.632154 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1011 01:14:54.633281 setenv serverip 192.168.6.2
1012 01:14:54.634125 Sending with 10 millisecond of delay
1014 01:14:58.359337 => tftpboot 0x01080000 956189/tftp-deploy-a2cjcmfh/kernel/uImage
1015 01:14:58.370334 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 01:14:58.371438 tftpboot 0x01080000 956189/tftp-deploy-a2cjcmfh/kernel/uImage
1017 01:14:58.372068 Speed: 1000, full duplex
1018 01:14:58.372628 Using ethernet@ff3f0000 device
1019 01:14:58.373273 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 01:14:58.378381 Filename '956189/tftp-deploy-a2cjcmfh/kernel/uImage'.
1021 01:14:58.382351 Load address: 0x1080000
1022 01:15:01.219724 Loading: *################################################## 43.7 MiB
1023 01:15:01.220388 15.4 MiB/s
1024 01:15:01.220820 done
1025 01:15:01.223053 Bytes transferred = 45775424 (2ba7a40 hex)
1026 01:15:01.223809 Sending with 10 millisecond of delay
1028 01:15:05.910580 => tftpboot 0x08000000 956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot
1029 01:15:05.921390 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 01:15:05.922185 tftpboot 0x08000000 956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot
1031 01:15:05.922625 Speed: 1000, full duplex
1032 01:15:05.923039 Using ethernet@ff3f0000 device
1033 01:15:05.924228 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 01:15:05.936123 Filename '956189/tftp-deploy-a2cjcmfh/ramdisk/ramdisk.cpio.gz.uboot'.
1035 01:15:05.936579 Load address: 0x8000000
1036 01:15:12.526664 Loading: *####################T ############################# UDP wrong checksum 00000005 0000322b
1037 01:15:17.527328 T UDP wrong checksum 00000005 0000322b
1038 01:15:27.530262 T T UDP wrong checksum 00000005 0000322b
1039 01:15:47.534413 T T T T UDP wrong checksum 00000005 0000322b
1040 01:16:02.538476 T T
1041 01:16:02.538923 Retry count exceeded; starting again
1043 01:16:02.540620 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1046 01:16:02.541672 end: 2.4 uboot-commands (duration 00:01:46) [common]
1048 01:16:02.542476 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1050 01:16:02.543114 end: 2 uboot-action (duration 00:01:46) [common]
1052 01:16:02.544055 Cleaning after the job
1053 01:16:02.544433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/ramdisk
1054 01:16:02.545300 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/kernel
1055 01:16:02.571003 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/dtb
1056 01:16:02.572045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/nfsrootfs
1057 01:16:02.730177 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956189/tftp-deploy-a2cjcmfh/modules
1058 01:16:02.749579 start: 4.1 power-off (timeout 00:00:30) [common]
1059 01:16:02.750254 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1060 01:16:02.783068 >> OK - accepted request
1061 01:16:02.784908 Returned 0 in 0 seconds
1062 01:16:02.885639 end: 4.1 power-off (duration 00:00:00) [common]
1064 01:16:02.886603 start: 4.2 read-feedback (timeout 00:10:00) [common]
1065 01:16:02.887269 Listened to connection for namespace 'common' for up to 1s
1066 01:16:03.887181 Finalising connection for namespace 'common'
1067 01:16:03.887643 Disconnecting from shell: Finalise
1068 01:16:03.887933 =>
1069 01:16:03.988783 end: 4.2 read-feedback (duration 00:00:01) [common]
1070 01:16:03.989465 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956189
1071 01:16:07.017066 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956189
1072 01:16:07.017683 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.