Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:25:00.958431 lava-dispatcher, installed at version: 2024.01
2 02:25:00.959197 start: 0 validate
3 02:25:00.959667 Start time: 2024-11-08 02:25:00.959637+00:00 (UTC)
4 02:25:00.960229 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:25:00.960751 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:25:01.002768 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:25:01.003334 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:25:01.036100 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:25:01.036738 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:25:01.069830 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:25:01.070516 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:25:01.103235 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:25:01.103694 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:25:01.147763 validate duration: 0.19
16 02:25:01.149224 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:25:01.149845 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:25:01.150415 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:25:01.151382 Not decompressing ramdisk as can be used compressed.
20 02:25:01.152195 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:25:01.152706 saving as /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/ramdisk/initrd.cpio.gz
22 02:25:01.153229 total size: 5628169 (5 MB)
23 02:25:01.196694 progress 0 % (0 MB)
24 02:25:01.204082 progress 5 % (0 MB)
25 02:25:01.211727 progress 10 % (0 MB)
26 02:25:01.218572 progress 15 % (0 MB)
27 02:25:01.226200 progress 20 % (1 MB)
28 02:25:01.232546 progress 25 % (1 MB)
29 02:25:01.236474 progress 30 % (1 MB)
30 02:25:01.240467 progress 35 % (1 MB)
31 02:25:01.244075 progress 40 % (2 MB)
32 02:25:01.247972 progress 45 % (2 MB)
33 02:25:01.251486 progress 50 % (2 MB)
34 02:25:01.255485 progress 55 % (2 MB)
35 02:25:01.259364 progress 60 % (3 MB)
36 02:25:01.262869 progress 65 % (3 MB)
37 02:25:01.266778 progress 70 % (3 MB)
38 02:25:01.270376 progress 75 % (4 MB)
39 02:25:01.274267 progress 80 % (4 MB)
40 02:25:01.277779 progress 85 % (4 MB)
41 02:25:01.281670 progress 90 % (4 MB)
42 02:25:01.285458 progress 95 % (5 MB)
43 02:25:01.288696 progress 100 % (5 MB)
44 02:25:01.289336 5 MB downloaded in 0.14 s (39.44 MB/s)
45 02:25:01.289850 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:25:01.290724 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:25:01.291012 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:25:01.291281 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:25:01.291738 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kernel/Image
51 02:25:01.291976 saving as /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/kernel/Image
52 02:25:01.292213 total size: 45775360 (43 MB)
53 02:25:01.292421 No compression specified
54 02:25:01.329628 progress 0 % (0 MB)
55 02:25:01.358023 progress 5 % (2 MB)
56 02:25:01.386208 progress 10 % (4 MB)
57 02:25:01.414719 progress 15 % (6 MB)
58 02:25:01.442949 progress 20 % (8 MB)
59 02:25:01.471028 progress 25 % (10 MB)
60 02:25:01.499409 progress 30 % (13 MB)
61 02:25:01.526935 progress 35 % (15 MB)
62 02:25:01.555158 progress 40 % (17 MB)
63 02:25:01.583268 progress 45 % (19 MB)
64 02:25:01.611599 progress 50 % (21 MB)
65 02:25:01.639665 progress 55 % (24 MB)
66 02:25:01.667711 progress 60 % (26 MB)
67 02:25:01.696152 progress 65 % (28 MB)
68 02:25:01.723562 progress 70 % (30 MB)
69 02:25:01.751342 progress 75 % (32 MB)
70 02:25:01.779223 progress 80 % (34 MB)
71 02:25:01.807232 progress 85 % (37 MB)
72 02:25:01.835530 progress 90 % (39 MB)
73 02:25:01.863387 progress 95 % (41 MB)
74 02:25:01.890903 progress 100 % (43 MB)
75 02:25:01.891645 43 MB downloaded in 0.60 s (72.83 MB/s)
76 02:25:01.892137 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:25:01.892955 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:25:01.893228 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:25:01.893491 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:25:01.893936 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:25:01.894197 saving as /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:25:01.894405 total size: 53209 (0 MB)
84 02:25:01.894612 No compression specified
85 02:25:01.932609 progress 61 % (0 MB)
86 02:25:01.933453 progress 100 % (0 MB)
87 02:25:01.933985 0 MB downloaded in 0.04 s (1.28 MB/s)
88 02:25:01.934434 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:25:01.935231 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:25:01.935491 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:25:01.935750 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:25:01.936216 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:25:01.936457 saving as /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/nfsrootfs/full.rootfs.tar
95 02:25:01.936661 total size: 120894716 (115 MB)
96 02:25:01.936871 Using unxz to decompress xz
97 02:25:01.974963 progress 0 % (0 MB)
98 02:25:02.761393 progress 5 % (5 MB)
99 02:25:03.594421 progress 10 % (11 MB)
100 02:25:04.394213 progress 15 % (17 MB)
101 02:25:05.127076 progress 20 % (23 MB)
102 02:25:05.723643 progress 25 % (28 MB)
103 02:25:06.559865 progress 30 % (34 MB)
104 02:25:07.445918 progress 35 % (40 MB)
105 02:25:07.799478 progress 40 % (46 MB)
106 02:25:08.169949 progress 45 % (51 MB)
107 02:25:08.885405 progress 50 % (57 MB)
108 02:25:09.767843 progress 55 % (63 MB)
109 02:25:10.547446 progress 60 % (69 MB)
110 02:25:11.304650 progress 65 % (74 MB)
111 02:25:12.085996 progress 70 % (80 MB)
112 02:25:12.910944 progress 75 % (86 MB)
113 02:25:13.707795 progress 80 % (92 MB)
114 02:25:14.471776 progress 85 % (98 MB)
115 02:25:15.330323 progress 90 % (103 MB)
116 02:25:16.201684 progress 95 % (109 MB)
117 02:25:17.188423 progress 100 % (115 MB)
118 02:25:17.203247 115 MB downloaded in 15.27 s (7.55 MB/s)
119 02:25:17.204311 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:25:17.206049 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:25:17.206606 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:25:17.207160 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:25:17.208114 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/modules.tar.xz
125 02:25:17.208629 saving as /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/modules/modules.tar
126 02:25:17.209073 total size: 11605964 (11 MB)
127 02:25:17.209522 Using unxz to decompress xz
128 02:25:17.258293 progress 0 % (0 MB)
129 02:25:17.327950 progress 5 % (0 MB)
130 02:25:17.405477 progress 10 % (1 MB)
131 02:25:17.505390 progress 15 % (1 MB)
132 02:25:17.601327 progress 20 % (2 MB)
133 02:25:17.683068 progress 25 % (2 MB)
134 02:25:17.761328 progress 30 % (3 MB)
135 02:25:17.837782 progress 35 % (3 MB)
136 02:25:17.916938 progress 40 % (4 MB)
137 02:25:17.995543 progress 45 % (5 MB)
138 02:25:18.087826 progress 50 % (5 MB)
139 02:25:18.174603 progress 55 % (6 MB)
140 02:25:18.269274 progress 60 % (6 MB)
141 02:25:18.356644 progress 65 % (7 MB)
142 02:25:18.440755 progress 70 % (7 MB)
143 02:25:18.522070 progress 75 % (8 MB)
144 02:25:18.608811 progress 80 % (8 MB)
145 02:25:18.689292 progress 85 % (9 MB)
146 02:25:18.774510 progress 90 % (9 MB)
147 02:25:18.851562 progress 95 % (10 MB)
148 02:25:18.927513 progress 100 % (11 MB)
149 02:25:18.938290 11 MB downloaded in 1.73 s (6.40 MB/s)
150 02:25:18.939324 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:25:18.941305 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:25:18.941901 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 02:25:18.942484 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 02:25:36.147791 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956169/extract-nfsrootfs-v0aq41pz
156 02:25:36.148598 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 02:25:36.148950 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 02:25:36.149662 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn
159 02:25:36.150190 makedir: /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin
160 02:25:36.150592 makedir: /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/tests
161 02:25:36.150971 makedir: /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/results
162 02:25:36.151364 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-add-keys
163 02:25:36.152025 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-add-sources
164 02:25:36.152676 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-background-process-start
165 02:25:36.153299 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-background-process-stop
166 02:25:36.153935 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-common-functions
167 02:25:36.154529 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-echo-ipv4
168 02:25:36.155116 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-install-packages
169 02:25:36.155694 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-installed-packages
170 02:25:36.156303 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-os-build
171 02:25:36.156896 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-probe-channel
172 02:25:36.157518 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-probe-ip
173 02:25:36.158228 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-target-ip
174 02:25:36.158824 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-target-mac
175 02:25:36.159409 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-target-storage
176 02:25:36.160036 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-case
177 02:25:36.160663 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-event
178 02:25:36.161244 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-feedback
179 02:25:36.161821 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-raise
180 02:25:36.162410 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-reference
181 02:25:36.163046 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-runner
182 02:25:36.163642 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-set
183 02:25:36.164255 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-test-shell
184 02:25:36.164848 Updating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-add-keys (debian)
185 02:25:36.165481 Updating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-add-sources (debian)
186 02:25:36.166111 Updating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-install-packages (debian)
187 02:25:36.166729 Updating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-installed-packages (debian)
188 02:25:36.167337 Updating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/bin/lava-os-build (debian)
189 02:25:36.167855 Creating /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/environment
190 02:25:36.168344 LAVA metadata
191 02:25:36.168654 - LAVA_JOB_ID=956169
192 02:25:36.168920 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:25:36.169357 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 02:25:36.170536 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:25:36.170921 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 02:25:36.171163 skipped lava-vland-overlay
197 02:25:36.171453 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:25:36.171761 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 02:25:36.172059 skipped lava-multinode-overlay
200 02:25:36.172360 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:25:36.172674 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 02:25:36.172974 Loading test definitions
203 02:25:36.173307 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 02:25:36.173568 Using /lava-956169 at stage 0
205 02:25:36.174891 uuid=956169_1.6.2.4.1 testdef=None
206 02:25:36.175259 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:25:36.175573 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 02:25:36.177520 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:25:36.178473 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 02:25:36.180812 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:25:36.181807 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 02:25:36.184093 runner path: /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/0/tests/0_timesync-off test_uuid 956169_1.6.2.4.1
215 02:25:36.184835 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:25:36.185816 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 02:25:36.186110 Using /lava-956169 at stage 0
219 02:25:36.186549 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:25:36.186898 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/0/tests/1_kselftest-dt'
221 02:25:39.611909 Running '/usr/bin/git checkout kernelci.org
222 02:25:40.114656 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 02:25:40.116114 uuid=956169_1.6.2.4.5 testdef=None
224 02:25:40.116462 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:25:40.117206 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 02:25:40.120034 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:25:40.120862 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 02:25:40.124595 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:25:40.125458 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 02:25:40.129077 runner path: /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/0/tests/1_kselftest-dt test_uuid 956169_1.6.2.4.5
234 02:25:40.129367 BOARD='meson-sm1-s905d3-libretech-cc'
235 02:25:40.129570 BRANCH='clk'
236 02:25:40.129767 SKIPFILE='/dev/null'
237 02:25:40.129966 SKIP_INSTALL='True'
238 02:25:40.130162 TESTPROG_URL='http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:25:40.130360 TST_CASENAME=''
240 02:25:40.130556 TST_CMDFILES='dt'
241 02:25:40.131102 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:25:40.131891 Creating lava-test-runner.conf files
244 02:25:40.132116 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956169/lava-overlay-g2kv9obn/lava-956169/0 for stage 0
245 02:25:40.132518 - 0_timesync-off
246 02:25:40.132772 - 1_kselftest-dt
247 02:25:40.133109 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:25:40.133387 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 02:26:03.553952 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 02:26:03.554371 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 02:26:03.554634 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:26:03.554902 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 02:26:03.555165 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 02:26:04.169298 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:26:04.169775 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 02:26:04.170028 extracting modules file /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956169/extract-nfsrootfs-v0aq41pz
257 02:26:05.523795 extracting modules file /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956169/extract-overlay-ramdisk-5u24r0o6/ramdisk
258 02:26:06.922737 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:26:06.923223 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 02:26:06.923506 [common] Applying overlay to NFS
261 02:26:06.923722 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956169/compress-overlay-xo30eyai/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956169/extract-nfsrootfs-v0aq41pz
262 02:26:09.681951 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:26:09.682433 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 02:26:09.682707 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 02:26:09.682938 Converting downloaded kernel to a uImage
266 02:26:09.683252 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/kernel/Image /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/kernel/uImage
267 02:26:10.182668 output: Image Name:
268 02:26:10.183092 output: Created: Fri Nov 8 02:26:09 2024
269 02:26:10.183302 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:26:10.183507 output: Data Size: 45775360 Bytes = 44702.50 KiB = 43.65 MiB
271 02:26:10.183709 output: Load Address: 01080000
272 02:26:10.183910 output: Entry Point: 01080000
273 02:26:10.184149 output:
274 02:26:10.184486 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 02:26:10.184756 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 02:26:10.185028 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 02:26:10.185282 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:26:10.185539 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 02:26:10.185794 Building ramdisk /var/lib/lava/dispatcher/tmp/956169/extract-overlay-ramdisk-5u24r0o6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956169/extract-overlay-ramdisk-5u24r0o6/ramdisk
280 02:26:12.303195 >> 166791 blocks
281 02:26:20.001386 Adding RAMdisk u-boot header.
282 02:26:20.002104 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956169/extract-overlay-ramdisk-5u24r0o6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956169/extract-overlay-ramdisk-5u24r0o6/ramdisk.cpio.gz.uboot
283 02:26:20.259897 output: Image Name:
284 02:26:20.260625 output: Created: Fri Nov 8 02:26:20 2024
285 02:26:20.261104 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:26:20.261570 output: Data Size: 23433979 Bytes = 22884.75 KiB = 22.35 MiB
287 02:26:20.262025 output: Load Address: 00000000
288 02:26:20.262475 output: Entry Point: 00000000
289 02:26:20.262925 output:
290 02:26:20.264153 rename /var/lib/lava/dispatcher/tmp/956169/extract-overlay-ramdisk-5u24r0o6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot
291 02:26:20.264951 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:26:20.265557 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 02:26:20.266157 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 02:26:20.266669 No LXC device requested
295 02:26:20.267236 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:26:20.267816 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 02:26:20.268418 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:26:20.268886 Checking files for TFTP limit of 4294967296 bytes.
299 02:26:20.271813 end: 1 tftp-deploy (duration 00:01:19) [common]
300 02:26:20.272501 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:26:20.273098 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:26:20.273662 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:26:20.274232 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:26:20.274823 Using kernel file from prepare-kernel: 956169/tftp-deploy-9vwnpda2/kernel/uImage
305 02:26:20.275527 substitutions:
306 02:26:20.276016 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:26:20.276476 - {DTB_ADDR}: 0x01070000
308 02:26:20.276928 - {DTB}: 956169/tftp-deploy-9vwnpda2/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 02:26:20.277381 - {INITRD}: 956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot
310 02:26:20.277829 - {KERNEL_ADDR}: 0x01080000
311 02:26:20.278271 - {KERNEL}: 956169/tftp-deploy-9vwnpda2/kernel/uImage
312 02:26:20.278712 - {LAVA_MAC}: None
313 02:26:20.279200 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956169/extract-nfsrootfs-v0aq41pz
314 02:26:20.279649 - {NFS_SERVER_IP}: 192.168.6.2
315 02:26:20.280153 - {PRESEED_CONFIG}: None
316 02:26:20.280610 - {PRESEED_LOCAL}: None
317 02:26:20.281055 - {RAMDISK_ADDR}: 0x08000000
318 02:26:20.281489 - {RAMDISK}: 956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot
319 02:26:20.281930 - {ROOT_PART}: None
320 02:26:20.282365 - {ROOT}: None
321 02:26:20.282798 - {SERVER_IP}: 192.168.6.2
322 02:26:20.283233 - {TEE_ADDR}: 0x83000000
323 02:26:20.283665 - {TEE}: None
324 02:26:20.284132 Parsed boot commands:
325 02:26:20.284565 - setenv autoload no
326 02:26:20.285004 - setenv initrd_high 0xffffffff
327 02:26:20.285440 - setenv fdt_high 0xffffffff
328 02:26:20.285870 - dhcp
329 02:26:20.286300 - setenv serverip 192.168.6.2
330 02:26:20.286735 - tftpboot 0x01080000 956169/tftp-deploy-9vwnpda2/kernel/uImage
331 02:26:20.287172 - tftpboot 0x08000000 956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot
332 02:26:20.287608 - tftpboot 0x01070000 956169/tftp-deploy-9vwnpda2/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 02:26:20.288073 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956169/extract-nfsrootfs-v0aq41pz,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:26:20.288532 - bootm 0x01080000 0x08000000 0x01070000
335 02:26:20.289121 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:26:20.290785 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:26:20.291262 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 02:26:20.307038 Setting prompt string to ['lava-test: # ']
340 02:26:20.308746 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:26:20.309475 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:26:20.310109 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:26:20.310732 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:26:20.312066 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 02:26:20.351865 >> OK - accepted request
346 02:26:20.354111 Returned 0 in 0 seconds
347 02:26:20.455179 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:26:20.456306 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:26:20.456655 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:26:20.456970 Setting prompt string to ['Hit any key to stop autoboot']
352 02:26:20.457236 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:26:20.458179 Trying 192.168.56.21...
354 02:26:20.458452 Connected to conserv1.
355 02:26:20.458687 Escape character is '^]'.
356 02:26:20.458913
357 02:26:20.459144 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 02:26:20.459377
359 02:26:28.256797 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 02:26:28.257222 bl2_stage_init 0x01
361 02:26:28.257461 bl2_stage_init 0x81
362 02:26:28.262195 hw id: 0x0000 - pwm id 0x01
363 02:26:28.262473 bl2_stage_init 0xc1
364 02:26:28.267866 bl2_stage_init 0x02
365 02:26:28.268179
366 02:26:28.268410 L0:00000000
367 02:26:28.268641 L1:00000703
368 02:26:28.268872 L2:00008067
369 02:26:28.269087 L3:15000000
370 02:26:28.273489 S1:00000000
371 02:26:28.273779 B2:20282000
372 02:26:28.274020 B1:a0f83180
373 02:26:28.274232
374 02:26:28.274448 TE: 73904
375 02:26:28.274665
376 02:26:28.279048 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 02:26:28.279318
378 02:26:28.284630 Board ID = 1
379 02:26:28.284896 Set cpu clk to 24M
380 02:26:28.285107 Set clk81 to 24M
381 02:26:28.290177 Use GP1_pll as DSU clk.
382 02:26:28.290455 DSU clk: 1200 Mhz
383 02:26:28.290667 CPU clk: 1200 MHz
384 02:26:28.295785 Set clk81 to 166.6M
385 02:26:28.301327 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 02:26:28.301601 board id: 1
387 02:26:28.308559 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 02:26:28.319451 fw parse done
389 02:26:28.325406 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:26:28.368560 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 02:26:28.379702 PIEI prepare done
392 02:26:28.380031 fastboot data load
393 02:26:28.380253 fastboot data verify
394 02:26:28.385224 verify result: 266
395 02:26:28.390822 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 02:26:28.391115 LPDDR4 probe
397 02:26:28.391330 ddr clk to 1584MHz
398 02:26:28.398830 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 02:26:28.436597
400 02:26:28.436975 dmc_version 0001
401 02:26:28.443588 Check phy result
402 02:26:28.449572 INFO : End of CA training
403 02:26:28.449834 INFO : End of initialization
404 02:26:28.455136 INFO : Training has run successfully!
405 02:26:28.455395 Check phy result
406 02:26:28.460758 INFO : End of initialization
407 02:26:28.461015 INFO : End of read enable training
408 02:26:28.464054 INFO : End of fine write leveling
409 02:26:28.469719 INFO : End of Write leveling coarse delay
410 02:26:28.475183 INFO : Training has run successfully!
411 02:26:28.475445 Check phy result
412 02:26:28.475656 INFO : End of initialization
413 02:26:28.480775 INFO : End of read dq deskew training
414 02:26:28.486356 INFO : End of MPR read delay center optimization
415 02:26:28.486621 INFO : End of write delay center optimization
416 02:26:28.492010 INFO : End of read delay center optimization
417 02:26:28.497582 INFO : End of max read latency training
418 02:26:28.497869 INFO : Training has run successfully!
419 02:26:28.503200 1D training succeed
420 02:26:28.509174 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 02:26:28.557464 Check phy result
422 02:26:28.557848 INFO : End of initialization
423 02:26:28.584848 INFO : End of 2D read delay Voltage center optimization
424 02:26:28.609015 INFO : End of 2D read delay Voltage center optimization
425 02:26:28.665631 INFO : End of 2D write delay Voltage center optimization
426 02:26:28.719501 INFO : End of 2D write delay Voltage center optimization
427 02:26:28.725049 INFO : Training has run successfully!
428 02:26:28.725328
429 02:26:28.725546 channel==0
430 02:26:28.730826 RxClkDly_Margin_A0==78 ps 8
431 02:26:28.731084 TxDqDly_Margin_A0==98 ps 10
432 02:26:28.734094 RxClkDly_Margin_A1==69 ps 7
433 02:26:28.734342 TxDqDly_Margin_A1==98 ps 10
434 02:26:28.740272 TrainedVREFDQ_A0==74
435 02:26:28.740572 TrainedVREFDQ_A1==75
436 02:26:28.740788 VrefDac_Margin_A0==24
437 02:26:28.745857 DeviceVref_Margin_A0==40
438 02:26:28.746119 VrefDac_Margin_A1==23
439 02:26:28.751448 DeviceVref_Margin_A1==39
440 02:26:28.751710
441 02:26:28.751925
442 02:26:28.752178 channel==1
443 02:26:28.752391 RxClkDly_Margin_A0==88 ps 9
444 02:26:28.757015 TxDqDly_Margin_A0==88 ps 9
445 02:26:28.757276 RxClkDly_Margin_A1==78 ps 8
446 02:26:28.758918 TxDqDly_Margin_A1==88 ps 9
447 02:26:28.764455 TrainedVREFDQ_A0==75
448 02:26:28.764721 TrainedVREFDQ_A1==77
449 02:26:28.764937 VrefDac_Margin_A0==22
450 02:26:28.770007 DeviceVref_Margin_A0==39
451 02:26:28.770268 VrefDac_Margin_A1==22
452 02:26:28.770480 DeviceVref_Margin_A1==37
453 02:26:28.775601
454 02:26:28.775864 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 02:26:28.776109
456 02:26:28.809212 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 02:26:28.809596 2D training succeed
458 02:26:28.814865 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 02:26:28.820281 auto size-- 65535DDR cs0 size: 2048MB
460 02:26:28.820548 DDR cs1 size: 2048MB
461 02:26:28.825867 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 02:26:28.826132 cs0 DataBus test pass
463 02:26:28.831472 cs1 DataBus test pass
464 02:26:28.831723 cs0 AddrBus test pass
465 02:26:28.831936 cs1 AddrBus test pass
466 02:26:28.832171
467 02:26:28.837074 100bdlr_step_size ps== 471
468 02:26:28.837345 result report
469 02:26:28.842731 boot times 0Enable ddr reg access
470 02:26:28.847776 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 02:26:28.861628 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 02:26:29.520366 bl2z: ptr: 05129330, size: 00001e40
473 02:26:29.528474 0.0;M3 CHK:0;cm4_sp_mode 0
474 02:26:29.528817 MVN_1=0x00000000
475 02:26:29.529050 MVN_2=0x00000000
476 02:26:29.539967 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 02:26:29.540352 OPS=0x04
478 02:26:29.540586 ring efuse init
479 02:26:29.542862 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 02:26:29.549306 [0.017354 Inits done]
481 02:26:29.549642 secure task start!
482 02:26:29.549871 high task start!
483 02:26:29.550094 low task start!
484 02:26:29.553582 run into bl31
485 02:26:29.562189 NOTICE: BL31: v1.3(release):4fc40b1
486 02:26:29.570021 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 02:26:29.570359 NOTICE: BL31: G12A normal boot!
488 02:26:29.585624 NOTICE: BL31: BL33 decompress pass
489 02:26:29.591465 ERROR: Error initializing runtime service opteed_fast
490 02:26:30.803420 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 02:26:30.803806 bl2_stage_init 0x01
492 02:26:30.804073 bl2_stage_init 0x81
493 02:26:30.809096 hw id: 0x0000 - pwm id 0x01
494 02:26:30.809392 bl2_stage_init 0xc1
495 02:26:30.814663 bl2_stage_init 0x02
496 02:26:30.814969
497 02:26:30.815187 L0:00000000
498 02:26:30.815396 L1:00000703
499 02:26:30.815600 L2:00008067
500 02:26:30.815802 L3:15000000
501 02:26:30.820213 S1:00000000
502 02:26:30.820492 B2:20282000
503 02:26:30.820704 B1:a0f83180
504 02:26:30.820908
505 02:26:30.821112 TE: 70618
506 02:26:30.821320
507 02:26:30.825894 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 02:26:30.826165
509 02:26:30.831392 Board ID = 1
510 02:26:30.831641 Set cpu clk to 24M
511 02:26:30.831852 Set clk81 to 24M
512 02:26:30.837001 Use GP1_pll as DSU clk.
513 02:26:30.837243 DSU clk: 1200 Mhz
514 02:26:30.837450 CPU clk: 1200 MHz
515 02:26:30.842600 Set clk81 to 166.6M
516 02:26:30.848302 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 02:26:30.848870 board id: 1
518 02:26:30.855540 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 02:26:30.866444 fw parse done
520 02:26:30.872386 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 02:26:30.915471 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 02:26:30.926715 PIEI prepare done
523 02:26:30.927258 fastboot data load
524 02:26:30.927702 fastboot data verify
525 02:26:30.932317 verify result: 266
526 02:26:30.937903 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 02:26:30.938437 LPDDR4 probe
528 02:26:30.938874 ddr clk to 1584MHz
529 02:26:32.304884 Load ddrfw from SPI, src: 0x00018000, SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 02:26:32.305296 bl2_stage_init 0x01
531 02:26:32.305515 bl2_stage_init 0x81
532 02:26:32.310434 hw id: 0x0000 - pwm id 0x01
533 02:26:32.310749 bl2_stage_init 0xc1
534 02:26:32.314981 bl2_stage_init 0x02
535 02:26:32.315405
536 02:26:32.315736 L0:00000000
537 02:26:32.316098 L1:00000703
538 02:26:32.316345 L2:00008067
539 02:26:32.320571 L3:15000000
540 02:26:32.320896 S1:00000000
541 02:26:32.321110 B2:20282000
542 02:26:32.321315 B1:a0f83180
543 02:26:32.321534
544 02:26:32.321738 TE: 70921
545 02:26:32.321944
546 02:26:32.331725 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 02:26:32.332077
548 02:26:32.332303 Board ID = 1
549 02:26:32.332507 Set cpu clk to 24M
550 02:26:32.332708 Set clk81 to 24M
551 02:26:32.335071 Use GP1_pll as DSU clk.
552 02:26:32.340601 DSU clk: 1200 Mhz
553 02:26:32.340913 CPU clk: 1200 MHz
554 02:26:32.341126 Set clk81 to 166.6M
555 02:26:32.346242 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 02:26:32.351826 board id: 1
557 02:26:32.355816 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 02:26:32.367502 fw parse done
559 02:26:32.373447 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 02:26:32.416222 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 02:26:32.427004 PIEI prepare done
562 02:26:32.427333 fastboot data load
563 02:26:32.427549 fastboot data verify
564 02:26:32.432646 verify result: 266
565 02:26:32.438266 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 02:26:32.438822 LPDDR4 probe
567 02:26:32.439280 ddr clk to 1584MHz
568 02:26:32.446230 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 02:26:32.483470
570 02:26:32.484126 dmc_version 0001
571 02:26:32.490092 Check phy result
572 02:26:32.496031 INFO : End of CA training
573 02:26:32.496603 INFO : End of initialization
574 02:26:32.501618 INFO : Training has run successfully!
575 02:26:32.502232 Check phy result
576 02:26:32.507216 INFO : End of initialization
577 02:26:32.507594 INFO : End of read enable training
578 02:26:32.512834 INFO : End of fine write leveling
579 02:26:32.518430 INFO : End of Write leveling coarse delay
580 02:26:32.518797 INFO : Training has run successfully!
581 02:26:32.519021 Check phy result
582 02:26:32.524038 INFO : End of initialization
583 02:26:32.524538 INFO : End of read dq deskew training
584 02:26:32.529642 INFO : End of MPR read delay center optimization
585 02:26:32.535305 INFO : End of write delay center optimization
586 02:26:32.540859 INFO : End of read delay center optimization
587 02:26:32.541237 INFO : End of max read latency training
588 02:26:32.546433 INFO : Training has run successfully!
589 02:26:32.546800 1D training succeed
590 02:26:32.555609 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 02:26:32.603276 Check phy result
592 02:26:32.603694 INFO : End of initialization
593 02:26:32.625559 INFO : End of 2D read delay Voltage center optimization
594 02:26:32.644703 INFO : End of 2D read delay Voltage center optimization
595 02:26:32.696563 INFO : End of 2D write delay Voltage center optimization
596 02:26:32.745766 INFO : End of 2D write delay Voltage center optimization
597 02:26:32.751351 INFO : Training has run successfully!
598 02:26:32.751693
599 02:26:32.751928 channel==0
600 02:26:32.756896 RxClkDly_Margin_A0==69 ps 7
601 02:26:32.757242 TxDqDly_Margin_A0==98 ps 10
602 02:26:32.760288 RxClkDly_Margin_A1==88 ps 9
603 02:26:32.760625 TxDqDly_Margin_A1==88 ps 9
604 02:26:32.765808 TrainedVREFDQ_A0==74
605 02:26:32.766157 TrainedVREFDQ_A1==74
606 02:26:32.766370 VrefDac_Margin_A0==24
607 02:26:32.771397 DeviceVref_Margin_A0==40
608 02:26:32.771748 VrefDac_Margin_A1==22
609 02:26:32.777030 DeviceVref_Margin_A1==40
610 02:26:32.777378
611 02:26:32.777603
612 02:26:32.777813 channel==1
613 02:26:32.778020 RxClkDly_Margin_A0==78 ps 8
614 02:26:32.782681 TxDqDly_Margin_A0==98 ps 10
615 02:26:32.783252 RxClkDly_Margin_A1==78 ps 8
616 02:26:32.788277 TxDqDly_Margin_A1==88 ps 9
617 02:26:32.788802 TrainedVREFDQ_A0==78
618 02:26:32.789234 TrainedVREFDQ_A1==78
619 02:26:32.793791 VrefDac_Margin_A0==22
620 02:26:32.794321 DeviceVref_Margin_A0==36
621 02:26:32.799397 VrefDac_Margin_A1==22
622 02:26:32.799936 DeviceVref_Margin_A1==36
623 02:26:32.800405
624 02:26:32.804992 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 02:26:32.805526
626 02:26:32.833054 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
627 02:26:32.838642 2D training succeed
628 02:26:32.844314 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 02:26:32.844890 auto size-- 65535DDR cs0 size: 2048MB
630 02:26:32.849839 DDR cs1 size: 2048MB
631 02:26:32.850387 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 02:26:32.855438 cs0 DataBus test pass
633 02:26:32.856064 cs1 DataBus test pass
634 02:26:32.856529 cs0 AddrBus test pass
635 02:26:32.861033 cs1 AddrBus test pass
636 02:26:32.861589
637 02:26:32.862034 100bdlr_step_size ps== 464
638 02:26:32.862464 result report
639 02:26:32.866645 boot times 0Enable ddr reg access
640 02:26:32.874107 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 02:26:32.887929 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 02:26:33.542953 bl2z: ptr: 05129330, size: 00001e40
643 02:26:33.550511 0.0;M3 CHK:0;cm4_sp_mode 0
644 02:26:33.551067 MVN_1=0x00000000
645 02:26:33.551485 MVN_2=0x00000000
646 02:26:33.562008 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 02:26:33.562602 OPS=0x04
648 02:26:33.563050 ring efuse init
649 02:26:33.567522 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 02:26:33.568029 [0.017310 Inits done]
651 02:26:33.568450 secure task start!
652 02:26:33.575031 high task start!
653 02:26:33.575506 low task start!
654 02:26:33.575919 run into bl31
655 02:26:33.583684 NOTICE: BL31: v1.3(release):4fc40b1
656 02:26:33.591468 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 02:26:33.591933 NOTICE: BL31: G12A normal boot!
658 02:26:33.606928 NOTICE: BL31: BL33 decompress pass
659 02:26:33.612655 ERROR: Error initializing runtime service opteed_fast
660 02:26:35.005316 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 02:26:35.005743 bl2_stage_init 0x01
662 02:26:35.005961 bl2_stage_init 0x81
663 02:26:35.010912 hw id: 0x0000 - pwm id 0x01
664 02:26:35.011380 bl2_stage_init 0xc1
665 02:26:35.011698 bl2_stage_init 0x02
666 02:26:35.012046
667 02:26:35.016517 L0:00000000
668 02:26:35.016895 L1:00000703
669 02:26:35.017143 L2:00008067
670 02:26:35.017369 L3:15000000
671 02:26:35.017586 S1:00000000
672 02:26:35.022211 B2:20282000
673 02:26:35.022589 B1:a0f83180
674 02:26:35.022818
675 02:26:35.023037 TE: 71508
676 02:26:35.023255
677 02:26:35.027716 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 02:26:35.028109
679 02:26:35.033286 Board ID = 1
680 02:26:35.033651 Set cpu clk to 24M
681 02:26:35.033862 Set clk81 to 24M
682 02:26:35.038871 Use GP1_pll as DSU clk.
683 02:26:35.039217 DSU clk: 1200 Mhz
684 02:26:35.039439 CPU clk: 1200 MHz
685 02:26:35.039650 Set clk81 to 166.6M
686 02:26:35.050117 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 02:26:35.050526 board id: 1
688 02:26:35.056490 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 02:26:35.067337 fw parse done
690 02:26:35.073226 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 02:26:35.116629 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 02:26:35.127616 PIEI prepare done
693 02:26:35.128075 fastboot data load
694 02:26:35.128308 fastboot data verify
695 02:26:35.133180 verify result: 266
696 02:26:35.138752 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 02:26:35.139155 LPDDR4 probe
698 02:26:35.139380 ddr clk to 1584MHz
699 02:26:35.146812 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 02:26:35.184514
701 02:26:35.185096 dmc_version 0001
702 02:26:35.191514 Check phy result
703 02:26:35.197462 INFO : End of CA training
704 02:26:35.197796 INFO : End of initialization
705 02:26:35.203050 INFO : Training has run successfully!
706 02:26:35.203504 Check phy result
707 02:26:35.208686 INFO : End of initialization
708 02:26:35.209164 INFO : End of read enable training
709 02:26:35.211930 INFO : End of fine write leveling
710 02:26:35.217545 INFO : End of Write leveling coarse delay
711 02:26:35.223092 INFO : Training has run successfully!
712 02:26:35.223427 Check phy result
713 02:26:35.223647 INFO : End of initialization
714 02:26:35.228671 INFO : End of read dq deskew training
715 02:26:35.234284 INFO : End of MPR read delay center optimization
716 02:26:35.234741 INFO : End of write delay center optimization
717 02:26:35.239936 INFO : End of read delay center optimization
718 02:26:35.245513 INFO : End of max read latency training
719 02:26:35.245855 INFO : Training has run successfully!
720 02:26:35.251074 1D training succeed
721 02:26:35.257051 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 02:26:35.305333 Check phy result
723 02:26:35.305748 INFO : End of initialization
724 02:26:35.332790 INFO : End of 2D read delay Voltage center optimization
725 02:26:35.356873 INFO : End of 2D read delay Voltage center optimization
726 02:26:35.413570 INFO : End of 2D write delay Voltage center optimization
727 02:26:35.467629 INFO : End of 2D write delay Voltage center optimization
728 02:26:35.473096 INFO : Training has run successfully!
729 02:26:35.473562
730 02:26:35.473822 channel==0
731 02:26:35.478701 RxClkDly_Margin_A0==78 ps 8
732 02:26:35.479031 TxDqDly_Margin_A0==98 ps 10
733 02:26:35.484322 RxClkDly_Margin_A1==78 ps 8
734 02:26:35.484831 TxDqDly_Margin_A1==88 ps 9
735 02:26:35.485192 TrainedVREFDQ_A0==74
736 02:26:35.489944 TrainedVREFDQ_A1==74
737 02:26:35.490329 VrefDac_Margin_A0==23
738 02:26:35.490553 DeviceVref_Margin_A0==40
739 02:26:35.495587 VrefDac_Margin_A1==23
740 02:26:35.495958 DeviceVref_Margin_A1==40
741 02:26:35.496219
742 02:26:35.496452
743 02:26:35.496665 channel==1
744 02:26:35.501128 RxClkDly_Margin_A0==78 ps 8
745 02:26:35.502199 TxDqDly_Margin_A0==88 ps 9
746 02:26:35.506768 RxClkDly_Margin_A1==78 ps 8
747 02:26:35.507141 TxDqDly_Margin_A1==78 ps 8
748 02:26:35.512367 TrainedVREFDQ_A0==75
749 02:26:35.512724 TrainedVREFDQ_A1==75
750 02:26:35.512950 VrefDac_Margin_A0==22
751 02:26:35.517884 DeviceVref_Margin_A0==39
752 02:26:35.518376 VrefDac_Margin_A1==22
753 02:26:35.518735 DeviceVref_Margin_A1==39
754 02:26:35.523511
755 02:26:35.524141 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 02:26:35.524744
757 02:26:35.557091 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000017 00000018 00000017 00000017 00000018 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 02:26:35.557680 2D training succeed
759 02:26:35.562718 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 02:26:35.568308 auto size-- 65535DDR cs0 size: 2048MB
761 02:26:35.568846 DDR cs1 size: 2048MB
762 02:26:35.573999 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 02:26:35.574520 cs0 DataBus test pass
764 02:26:35.579529 cs1 DataBus test pass
765 02:26:35.580085 cs0 AddrBus test pass
766 02:26:35.580563 cs1 AddrBus test pass
767 02:26:35.581020
768 02:26:35.585231 100bdlr_step_size ps== 478
769 02:26:35.585756 result report
770 02:26:35.590761 boot times 0Enable ddr reg access
771 02:26:35.595796 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 02:26:35.609841 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 02:26:36.269724 bl2z: ptr: 05129330, size: 00001e40
774 02:26:36.278609 0.0;M3 CHK:0;cm4_sp_mode 0
775 02:26:36.279124 MVN_1=0x00000000
776 02:26:36.279379 MVN_2=0x00000000
777 02:26:36.290037 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 02:26:36.290544 OPS=0x04
779 02:26:36.290806 ring efuse init
780 02:26:36.292848 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 02:26:36.298887 [0.017354 Inits done]
782 02:26:36.299324 secure task start!
783 02:26:36.299575 high task start!
784 02:26:36.299819 low task start!
785 02:26:36.303171 run into bl31
786 02:26:36.311892 NOTICE: BL31: v1.3(release):4fc40b1
787 02:26:36.319679 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 02:26:36.320419 NOTICE: BL31: G12A normal boot!
789 02:26:36.335191 NOTICE: BL31: BL33 decompress pass
790 02:26:36.340834 ERROR: Error initializing runtime service opteed_fast
791 02:26:37.136350
792 02:26:37.137122
793 02:26:37.141628 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 02:26:37.142186
795 02:26:37.145139 Model: Libre Computer AML-S905D3-CC Solitude
796 02:26:37.292180 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 02:26:37.307546 DRAM: 2 GiB (effective 3.8 GiB)
798 02:26:37.408717 Core: 406 devices, 33 uclasses, devicetree: separate
799 02:26:37.414376 WDT: Not starting watchdog@f0d0
800 02:26:37.439518 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 02:26:37.451791 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 02:26:37.456626 ** Bad device specification mmc 0 **
803 02:26:37.466748 Card did not respond to voltage select! : -110
804 02:26:37.474405 ** Bad device specification mmc 0 **
805 02:26:37.474885 Couldn't find partition mmc 0
806 02:26:37.482801 Card did not respond to voltage select! : -110
807 02:26:37.488263 ** Bad device specification mmc 0 **
808 02:26:37.488730 Couldn't find partition mmc 0
809 02:26:37.493311 Error: could not access storage.
810 02:26:37.789841 Net: eth0: ethernet@ff3f0000
811 02:26:37.790362 starting USB...
812 02:26:38.034580 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 02:26:38.035216 Starting the controller
814 02:26:38.041460 USB XHCI 1.10
815 02:26:39.595473 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 02:26:39.603734 scanning usb for storage devices... 0 Storage Device(s) found
818 02:26:39.654766 Hit any key to stop autoboot: 1
819 02:26:39.655656 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 02:26:39.656280 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 02:26:39.656762 Setting prompt string to ['=>']
822 02:26:39.657247 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 02:26:39.669811 0
824 02:26:39.670692 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 02:26:39.771910 => setenv autoload no
827 02:26:39.772698 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
828 02:26:39.777412 setenv autoload no
830 02:26:39.878869 => setenv initrd_high 0xffffffff
831 02:26:39.879595 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
832 02:26:39.884067 setenv initrd_high 0xffffffff
834 02:26:39.985467 => setenv fdt_high 0xffffffff
835 02:26:39.986181 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
836 02:26:39.990540 setenv fdt_high 0xffffffff
838 02:26:40.092225 => dhcp
839 02:26:40.093063 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 02:26:40.097256 dhcp
841 02:26:40.652830 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 02:26:40.653484 Speed: 1000, full duplex
843 02:26:40.653936 BOOTP broadcast 1
844 02:26:40.901221 BOOTP broadcast 2
845 02:26:40.912247 DHCP client bound to address 192.168.6.21 (259 ms)
847 02:26:41.013797 => setenv serverip 192.168.6.2
848 02:26:41.014570 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
849 02:26:41.019173 setenv serverip 192.168.6.2
851 02:26:41.120768 => tftpboot 0x01080000 956169/tftp-deploy-9vwnpda2/kernel/uImage
852 02:26:41.121497 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 02:26:41.128146 tftpboot 0x01080000 956169/tftp-deploy-9vwnpda2/kernel/uImage
854 02:26:41.128644 Speed: 1000, full duplex
855 02:26:41.129088 Using ethernet@ff3f0000 device
856 02:26:41.133687 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 02:26:41.139218 Filename '956169/tftp-deploy-9vwnpda2/kernel/uImage'.
858 02:26:41.143060 Load address: 0x1080000
859 02:26:44.055014 Loading: *################################################## 43.7 MiB
860 02:26:44.055430 15 MiB/s
861 02:26:44.055663 done
862 02:26:44.059123 Bytes transferred = 45775424 (2ba7a40 hex)
864 02:26:44.160231 => tftpboot 0x08000000 956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot
865 02:26:44.160904 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
866 02:26:44.167455 tftpboot 0x08000000 956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot
867 02:26:44.167760 Speed: 1000, full duplex
868 02:26:44.168015 Using ethernet@ff3f0000 device
869 02:26:44.173221 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 02:26:44.182851 Filename '956169/tftp-deploy-9vwnpda2/ramdisk/ramdisk.cpio.gz.uboot'.
871 02:26:44.183175 Load address: 0x8000000
872 02:26:45.617901 Loading: *################################################# UDP wrong checksum 00000005 00004ca0
873 02:26:50.619115 T UDP wrong checksum 00000005 00004ca0
874 02:27:00.621082 T T UDP wrong checksum 00000005 00004ca0
875 02:27:20.624521 T T T UDP wrong checksum 00000005 00004ca0
876 02:27:40.630034 T T T T
877 02:27:40.630673 Retry count exceeded; starting again
879 02:27:40.632146 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
882 02:27:40.634032 end: 2.4 uboot-commands (duration 00:01:20) [common]
884 02:27:40.635568 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
886 02:27:40.636632 end: 2 uboot-action (duration 00:01:20) [common]
888 02:27:40.638137 Cleaning after the job
889 02:27:40.638665 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/ramdisk
890 02:27:40.639936 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/kernel
891 02:27:40.685870 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/dtb
892 02:27:40.686669 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/nfsrootfs
893 02:27:40.887624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956169/tftp-deploy-9vwnpda2/modules
894 02:27:40.913501 start: 4.1 power-off (timeout 00:00:30) [common]
895 02:27:40.914358 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
896 02:27:40.948905 >> OK - accepted request
897 02:27:40.951339 Returned 0 in 0 seconds
898 02:27:41.052187 end: 4.1 power-off (duration 00:00:00) [common]
900 02:27:41.053227 start: 4.2 read-feedback (timeout 00:10:00) [common]
901 02:27:41.053873 Listened to connection for namespace 'common' for up to 1s
902 02:27:42.054595 Finalising connection for namespace 'common'
903 02:27:42.055093 Disconnecting from shell: Finalise
904 02:27:42.055370 =>
905 02:27:42.156166 end: 4.2 read-feedback (duration 00:00:01) [common]
906 02:27:42.156813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956169
907 02:27:45.138960 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956169
908 02:27:45.139586 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.