Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:34:59.111136 lava-dispatcher, installed at version: 2024.01
2 01:34:59.112088 start: 0 validate
3 01:34:59.112695 Start time: 2024-11-08 01:34:59.112662+00:00 (UTC)
4 01:34:59.113311 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:34:59.113846 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:34:59.155394 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:34:59.155927 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:34:59.247110 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:34:59.247936 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:34:59.325992 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:34:59.326686 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:34:59.356922 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:34:59.357464 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:34:59.396148 validate duration: 0.28
16 01:34:59.397122 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:34:59.397484 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:34:59.397825 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:34:59.398729 Not decompressing ramdisk as can be used compressed.
20 01:34:59.399265 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:34:59.399573 saving as /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/ramdisk/initrd.cpio.gz
22 01:34:59.399905 total size: 5628169 (5 MB)
23 01:34:59.444586 progress 0 % (0 MB)
24 01:34:59.453318 progress 5 % (0 MB)
25 01:34:59.461963 progress 10 % (0 MB)
26 01:34:59.469354 progress 15 % (0 MB)
27 01:34:59.474952 progress 20 % (1 MB)
28 01:34:59.478981 progress 25 % (1 MB)
29 01:34:59.483321 progress 30 % (1 MB)
30 01:34:59.487518 progress 35 % (1 MB)
31 01:34:59.492460 progress 40 % (2 MB)
32 01:34:59.496782 progress 45 % (2 MB)
33 01:34:59.500754 progress 50 % (2 MB)
34 01:34:59.505079 progress 55 % (2 MB)
35 01:34:59.509252 progress 60 % (3 MB)
36 01:34:59.513156 progress 65 % (3 MB)
37 01:34:59.517536 progress 70 % (3 MB)
38 01:34:59.521371 progress 75 % (4 MB)
39 01:34:59.525540 progress 80 % (4 MB)
40 01:34:59.529327 progress 85 % (4 MB)
41 01:34:59.533237 progress 90 % (4 MB)
42 01:34:59.536963 progress 95 % (5 MB)
43 01:34:59.540448 progress 100 % (5 MB)
44 01:34:59.541206 5 MB downloaded in 0.14 s (37.99 MB/s)
45 01:34:59.541769 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:34:59.542721 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:34:59.543122 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:34:59.543484 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:34:59.544069 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kernel/Image
51 01:34:59.544379 saving as /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/kernel/Image
52 01:34:59.544650 total size: 45775360 (43 MB)
53 01:34:59.544910 No compression specified
54 01:34:59.581589 progress 0 % (0 MB)
55 01:34:59.611421 progress 5 % (2 MB)
56 01:34:59.641566 progress 10 % (4 MB)
57 01:34:59.670407 progress 15 % (6 MB)
58 01:34:59.699016 progress 20 % (8 MB)
59 01:34:59.727689 progress 25 % (10 MB)
60 01:34:59.756379 progress 30 % (13 MB)
61 01:34:59.784866 progress 35 % (15 MB)
62 01:34:59.815487 progress 40 % (17 MB)
63 01:34:59.846407 progress 45 % (19 MB)
64 01:34:59.877474 progress 50 % (21 MB)
65 01:34:59.908174 progress 55 % (24 MB)
66 01:34:59.938980 progress 60 % (26 MB)
67 01:34:59.970311 progress 65 % (28 MB)
68 01:35:00.000567 progress 70 % (30 MB)
69 01:35:00.031758 progress 75 % (32 MB)
70 01:35:00.062236 progress 80 % (34 MB)
71 01:35:00.093163 progress 85 % (37 MB)
72 01:35:00.123779 progress 90 % (39 MB)
73 01:35:00.154291 progress 95 % (41 MB)
74 01:35:00.183242 progress 100 % (43 MB)
75 01:35:00.184104 43 MB downloaded in 0.64 s (68.27 MB/s)
76 01:35:00.184650 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:35:00.185589 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:35:00.185928 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:35:00.186255 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:35:00.186774 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:35:00.187084 saving as /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:35:00.187334 total size: 54703 (0 MB)
84 01:35:00.187592 No compression specified
85 01:35:00.234148 progress 59 % (0 MB)
86 01:35:00.235041 progress 100 % (0 MB)
87 01:35:00.235684 0 MB downloaded in 0.05 s (1.08 MB/s)
88 01:35:00.236285 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:35:00.237255 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:35:00.237577 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:35:00.237923 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:35:00.238433 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:35:00.238713 saving as /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/nfsrootfs/full.rootfs.tar
95 01:35:00.238959 total size: 120894716 (115 MB)
96 01:35:00.239212 Using unxz to decompress xz
97 01:35:00.281530 progress 0 % (0 MB)
98 01:35:01.166532 progress 5 % (5 MB)
99 01:35:02.123269 progress 10 % (11 MB)
100 01:35:02.957532 progress 15 % (17 MB)
101 01:35:03.697922 progress 20 % (23 MB)
102 01:35:04.297084 progress 25 % (28 MB)
103 01:35:05.126066 progress 30 % (34 MB)
104 01:35:05.930475 progress 35 % (40 MB)
105 01:35:06.297467 progress 40 % (46 MB)
106 01:35:06.692883 progress 45 % (51 MB)
107 01:35:07.467702 progress 50 % (57 MB)
108 01:35:08.356850 progress 55 % (63 MB)
109 01:35:09.146479 progress 60 % (69 MB)
110 01:35:09.909385 progress 65 % (74 MB)
111 01:35:10.693863 progress 70 % (80 MB)
112 01:35:11.528957 progress 75 % (86 MB)
113 01:35:12.324801 progress 80 % (92 MB)
114 01:35:13.095909 progress 85 % (98 MB)
115 01:35:13.962449 progress 90 % (103 MB)
116 01:35:14.759186 progress 95 % (109 MB)
117 01:35:15.601739 progress 100 % (115 MB)
118 01:35:15.615067 115 MB downloaded in 15.38 s (7.50 MB/s)
119 01:35:15.615658 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:35:15.617055 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:35:15.617578 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:35:15.618087 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:35:15.619036 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/modules.tar.xz
125 01:35:15.619514 saving as /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/modules/modules.tar
126 01:35:15.619916 total size: 11605964 (11 MB)
127 01:35:15.620365 Using unxz to decompress xz
128 01:35:15.667199 progress 0 % (0 MB)
129 01:35:15.738131 progress 5 % (0 MB)
130 01:35:15.815347 progress 10 % (1 MB)
131 01:35:15.915129 progress 15 % (1 MB)
132 01:35:16.008611 progress 20 % (2 MB)
133 01:35:16.088331 progress 25 % (2 MB)
134 01:35:16.165064 progress 30 % (3 MB)
135 01:35:16.239835 progress 35 % (3 MB)
136 01:35:16.319159 progress 40 % (4 MB)
137 01:35:16.399958 progress 45 % (5 MB)
138 01:35:16.485967 progress 50 % (5 MB)
139 01:35:16.565154 progress 55 % (6 MB)
140 01:35:16.651157 progress 60 % (6 MB)
141 01:35:16.732314 progress 65 % (7 MB)
142 01:35:16.809947 progress 70 % (7 MB)
143 01:35:16.893494 progress 75 % (8 MB)
144 01:35:16.978048 progress 80 % (8 MB)
145 01:35:17.059258 progress 85 % (9 MB)
146 01:35:17.138867 progress 90 % (9 MB)
147 01:35:17.218120 progress 95 % (10 MB)
148 01:35:17.296388 progress 100 % (11 MB)
149 01:35:17.308326 11 MB downloaded in 1.69 s (6.56 MB/s)
150 01:35:17.308921 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:35:17.309754 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:35:17.310024 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 01:35:17.310291 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 01:35:35.457821 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956229/extract-nfsrootfs-gtcxwfw9
156 01:35:35.458405 end: 1.6.1 extract-nfsrootfs (duration 00:00:18) [common]
157 01:35:35.458693 start: 1.6.2 lava-overlay (timeout 00:09:24) [common]
158 01:35:35.459414 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja
159 01:35:35.459880 makedir: /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin
160 01:35:35.460253 makedir: /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/tests
161 01:35:35.460568 makedir: /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/results
162 01:35:35.460898 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-add-keys
163 01:35:35.461423 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-add-sources
164 01:35:35.461920 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-background-process-start
165 01:35:35.462408 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-background-process-stop
166 01:35:35.462933 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-common-functions
167 01:35:35.463580 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-echo-ipv4
168 01:35:35.464201 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-install-packages
169 01:35:35.464696 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-installed-packages
170 01:35:35.465164 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-os-build
171 01:35:35.465660 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-probe-channel
172 01:35:35.466132 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-probe-ip
173 01:35:35.466598 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-target-ip
174 01:35:35.467064 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-target-mac
175 01:35:35.467551 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-target-storage
176 01:35:35.468082 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-case
177 01:35:35.468569 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-event
178 01:35:35.469034 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-feedback
179 01:35:35.469499 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-raise
180 01:35:35.469957 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-reference
181 01:35:35.470429 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-runner
182 01:35:35.470901 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-set
183 01:35:35.471389 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-test-shell
184 01:35:35.471891 Updating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-add-keys (debian)
185 01:35:35.472447 Updating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-add-sources (debian)
186 01:35:35.472944 Updating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-install-packages (debian)
187 01:35:35.473430 Updating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-installed-packages (debian)
188 01:35:35.473907 Updating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/bin/lava-os-build (debian)
189 01:35:35.474328 Creating /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/environment
190 01:35:35.474685 LAVA metadata
191 01:35:35.474941 - LAVA_JOB_ID=956229
192 01:35:35.475154 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:35:35.475502 start: 1.6.2.1 ssh-authorize (timeout 00:09:24) [common]
194 01:35:35.476454 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:35:35.476763 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:24) [common]
196 01:35:35.476969 skipped lava-vland-overlay
197 01:35:35.477207 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:35:35.477460 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:24) [common]
199 01:35:35.477676 skipped lava-multinode-overlay
200 01:35:35.477916 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:35:35.478165 start: 1.6.2.4 test-definition (timeout 00:09:24) [common]
202 01:35:35.478407 Loading test definitions
203 01:35:35.478677 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:24) [common]
204 01:35:35.478894 Using /lava-956229 at stage 0
205 01:35:35.480072 uuid=956229_1.6.2.4.1 testdef=None
206 01:35:35.480387 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:35:35.480656 start: 1.6.2.4.2 test-overlay (timeout 00:09:24) [common]
208 01:35:35.482227 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:35:35.483006 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:24) [common]
211 01:35:35.484903 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:35:35.485716 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:24) [common]
214 01:35:35.487494 runner path: /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/0/tests/0_timesync-off test_uuid 956229_1.6.2.4.1
215 01:35:35.488036 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:35:35.488854 start: 1.6.2.4.5 git-repo-action (timeout 00:09:24) [common]
218 01:35:35.489074 Using /lava-956229 at stage 0
219 01:35:35.489422 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:35:35.489707 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/0/tests/1_kselftest-rtc'
221 01:35:38.888901 Running '/usr/bin/git checkout kernelci.org
222 01:35:39.335510 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 01:35:39.336952 uuid=956229_1.6.2.4.5 testdef=None
224 01:35:39.337310 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 01:35:39.338081 start: 1.6.2.4.6 test-overlay (timeout 00:09:20) [common]
227 01:35:39.340983 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:35:39.341828 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:20) [common]
230 01:35:39.345729 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:35:39.346681 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:20) [common]
233 01:35:39.350361 runner path: /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/0/tests/1_kselftest-rtc test_uuid 956229_1.6.2.4.5
234 01:35:39.350661 BOARD='meson-g12b-a311d-libretech-cc'
235 01:35:39.350880 BRANCH='clk'
236 01:35:39.351087 SKIPFILE='/dev/null'
237 01:35:39.351291 SKIP_INSTALL='True'
238 01:35:39.351494 TESTPROG_URL='http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 01:35:39.351699 TST_CASENAME=''
240 01:35:39.351901 TST_CMDFILES='rtc'
241 01:35:39.352532 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:35:39.353352 Creating lava-test-runner.conf files
244 01:35:39.353569 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956229/lava-overlay-_xfucoja/lava-956229/0 for stage 0
245 01:35:39.353951 - 0_timesync-off
246 01:35:39.354207 - 1_kselftest-rtc
247 01:35:39.354561 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 01:35:39.354858 start: 1.6.2.5 compress-overlay (timeout 00:09:20) [common]
249 01:36:02.779266 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 01:36:02.779739 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 01:36:02.780068 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:36:02.780398 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:36:02.780701 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 01:36:03.483147 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:36:03.483635 start: 1.6.4 extract-modules (timeout 00:08:56) [common]
256 01:36:03.483909 extracting modules file /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956229/extract-nfsrootfs-gtcxwfw9
257 01:36:04.868907 extracting modules file /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956229/extract-overlay-ramdisk-lo4zs7k6/ramdisk
258 01:36:06.287651 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:36:06.288157 start: 1.6.5 apply-overlay-tftp (timeout 00:08:53) [common]
260 01:36:06.288457 [common] Applying overlay to NFS
261 01:36:06.288685 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956229/compress-overlay-ojwvsu7m/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956229/extract-nfsrootfs-gtcxwfw9
262 01:36:09.031877 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:36:09.032411 start: 1.6.6 prepare-kernel (timeout 00:08:50) [common]
264 01:36:09.032727 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:50) [common]
265 01:36:09.032999 Converting downloaded kernel to a uImage
266 01:36:09.033342 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/kernel/Image /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/kernel/uImage
267 01:36:09.546906 output: Image Name:
268 01:36:09.547326 output: Created: Fri Nov 8 01:36:09 2024
269 01:36:09.547564 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:36:09.547785 output: Data Size: 45775360 Bytes = 44702.50 KiB = 43.65 MiB
271 01:36:09.548038 output: Load Address: 01080000
272 01:36:09.548261 output: Entry Point: 01080000
273 01:36:09.548472 output:
274 01:36:09.548815 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 01:36:09.549105 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 01:36:09.549390 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 01:36:09.549658 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:36:09.549938 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 01:36:09.550215 Building ramdisk /var/lib/lava/dispatcher/tmp/956229/extract-overlay-ramdisk-lo4zs7k6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956229/extract-overlay-ramdisk-lo4zs7k6/ramdisk
280 01:36:11.748239 >> 166791 blocks
281 01:36:19.685109 Adding RAMdisk u-boot header.
282 01:36:19.685766 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956229/extract-overlay-ramdisk-lo4zs7k6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956229/extract-overlay-ramdisk-lo4zs7k6/ramdisk.cpio.gz.uboot
283 01:36:19.924438 output: Image Name:
284 01:36:19.924867 output: Created: Fri Nov 8 01:36:19 2024
285 01:36:19.925080 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:36:19.925287 output: Data Size: 23431707 Bytes = 22882.53 KiB = 22.35 MiB
287 01:36:19.925490 output: Load Address: 00000000
288 01:36:19.925692 output: Entry Point: 00000000
289 01:36:19.925894 output:
290 01:36:19.926532 rename /var/lib/lava/dispatcher/tmp/956229/extract-overlay-ramdisk-lo4zs7k6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot
291 01:36:19.926954 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 01:36:19.927239 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 01:36:19.927515 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:39) [common]
294 01:36:19.927771 No LXC device requested
295 01:36:19.928166 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:36:19.928705 start: 1.8 deploy-device-env (timeout 00:08:39) [common]
297 01:36:19.929221 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:36:19.929631 Checking files for TFTP limit of 4294967296 bytes.
299 01:36:19.932309 end: 1 tftp-deploy (duration 00:01:21) [common]
300 01:36:19.932882 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:36:19.933400 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:36:19.933891 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:36:19.934393 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:36:19.934922 Using kernel file from prepare-kernel: 956229/tftp-deploy-pkm_2bn1/kernel/uImage
305 01:36:19.935549 substitutions:
306 01:36:19.935957 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:36:19.936390 - {DTB_ADDR}: 0x01070000
308 01:36:19.936793 - {DTB}: 956229/tftp-deploy-pkm_2bn1/dtb/meson-g12b-a311d-libretech-cc.dtb
309 01:36:19.937199 - {INITRD}: 956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot
310 01:36:19.937598 - {KERNEL_ADDR}: 0x01080000
311 01:36:19.937994 - {KERNEL}: 956229/tftp-deploy-pkm_2bn1/kernel/uImage
312 01:36:19.938388 - {LAVA_MAC}: None
313 01:36:19.938818 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956229/extract-nfsrootfs-gtcxwfw9
314 01:36:19.939216 - {NFS_SERVER_IP}: 192.168.6.2
315 01:36:19.939613 - {PRESEED_CONFIG}: None
316 01:36:19.940040 - {PRESEED_LOCAL}: None
317 01:36:19.940443 - {RAMDISK_ADDR}: 0x08000000
318 01:36:19.940832 - {RAMDISK}: 956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot
319 01:36:19.941223 - {ROOT_PART}: None
320 01:36:19.941610 - {ROOT}: None
321 01:36:19.941996 - {SERVER_IP}: 192.168.6.2
322 01:36:19.942381 - {TEE_ADDR}: 0x83000000
323 01:36:19.942766 - {TEE}: None
324 01:36:19.943153 Parsed boot commands:
325 01:36:19.943531 - setenv autoload no
326 01:36:19.943922 - setenv initrd_high 0xffffffff
327 01:36:19.944336 - setenv fdt_high 0xffffffff
328 01:36:19.944723 - dhcp
329 01:36:19.945106 - setenv serverip 192.168.6.2
330 01:36:19.945493 - tftpboot 0x01080000 956229/tftp-deploy-pkm_2bn1/kernel/uImage
331 01:36:19.945888 - tftpboot 0x08000000 956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot
332 01:36:19.946281 - tftpboot 0x01070000 956229/tftp-deploy-pkm_2bn1/dtb/meson-g12b-a311d-libretech-cc.dtb
333 01:36:19.946673 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956229/extract-nfsrootfs-gtcxwfw9,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:36:19.947074 - bootm 0x01080000 0x08000000 0x01070000
335 01:36:19.947580 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:36:19.949107 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:36:19.949533 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 01:36:19.964450 Setting prompt string to ['lava-test: # ']
340 01:36:19.966000 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:36:19.966599 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:36:19.967165 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:36:19.967691 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:36:19.968825 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 01:36:20.006511 >> OK - accepted request
346 01:36:20.008505 Returned 0 in 0 seconds
347 01:36:20.109527 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:36:20.110533 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:36:20.110866 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:36:20.111183 Setting prompt string to ['Hit any key to stop autoboot']
352 01:36:20.111452 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:36:20.112470 Trying 192.168.56.21...
354 01:36:20.112771 Connected to conserv1.
355 01:36:20.113017 Escape character is '^]'.
356 01:36:20.113248
357 01:36:20.113482 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 01:36:20.113716
359 01:36:31.709983 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 01:36:31.710653 bl2_stage_init 0x01
361 01:36:31.711111 bl2_stage_init 0x81
362 01:36:31.715428 hw id: 0x0000 - pwm id 0x01
363 01:36:31.716114 bl2_stage_init 0xc1
364 01:36:31.716566 bl2_stage_init 0x02
365 01:36:31.716992
366 01:36:31.720909 L0:00000000
367 01:36:31.721461 L1:20000703
368 01:36:31.721879 L2:00008067
369 01:36:31.722288 L3:14000000
370 01:36:31.726470 B2:00402000
371 01:36:31.726997 B1:e0f83180
372 01:36:31.727408
373 01:36:31.727803 TE: 58124
374 01:36:31.728247
375 01:36:31.732161 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 01:36:31.732687
377 01:36:31.733097 Board ID = 1
378 01:36:31.737786 Set A53 clk to 24M
379 01:36:31.738285 Set A73 clk to 24M
380 01:36:31.738682 Set clk81 to 24M
381 01:36:31.743305 A53 clk: 1200 MHz
382 01:36:31.743809 A73 clk: 1200 MHz
383 01:36:31.744242 CLK81: 166.6M
384 01:36:31.744631 smccc: 00012a91
385 01:36:31.748888 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 01:36:31.754371 board id: 1
387 01:36:31.760419 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:36:31.771027 fw parse done
389 01:36:31.776986 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:36:31.819572 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:36:31.830432 PIEI prepare done
392 01:36:31.830948 fastboot data load
393 01:36:31.831352 fastboot data verify
394 01:36:31.836113 verify result: 266
395 01:36:31.841769 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 01:36:31.842328 LPDDR4 probe
397 01:36:31.842723 ddr clk to 1584MHz
398 01:36:31.849685 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:36:31.886884
400 01:36:31.887327 dmc_version 0001
401 01:36:31.893564 Check phy result
402 01:36:31.899422 INFO : End of CA training
403 01:36:31.900034 INFO : End of initialization
404 01:36:31.905005 INFO : Training has run successfully!
405 01:36:31.905427 Check phy result
406 01:36:31.910587 INFO : End of initialization
407 01:36:31.911137 INFO : End of read enable training
408 01:36:31.916267 INFO : End of fine write leveling
409 01:36:31.921804 INFO : End of Write leveling coarse delay
410 01:36:31.922253 INFO : Training has run successfully!
411 01:36:31.922497 Check phy result
412 01:36:31.927394 INFO : End of initialization
413 01:36:31.927951 INFO : End of read dq deskew training
414 01:36:31.933109 INFO : End of MPR read delay center optimization
415 01:36:31.938610 INFO : End of write delay center optimization
416 01:36:31.944291 INFO : End of read delay center optimization
417 01:36:31.944846 INFO : End of max read latency training
418 01:36:31.949881 INFO : Training has run successfully!
419 01:36:31.950424 1D training succeed
420 01:36:31.958944 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:36:32.006626 Check phy result
422 01:36:32.007166 INFO : End of initialization
423 01:36:32.029260 INFO : End of 2D read delay Voltage center optimization
424 01:36:32.049543 INFO : End of 2D read delay Voltage center optimization
425 01:36:32.101551 INFO : End of 2D write delay Voltage center optimization
426 01:36:32.150991 INFO : End of 2D write delay Voltage center optimization
427 01:36:32.156536 INFO : Training has run successfully!
428 01:36:32.157019
429 01:36:32.157438 channel==0
430 01:36:32.162270 RxClkDly_Margin_A0==88 ps 9
431 01:36:32.162763 TxDqDly_Margin_A0==98 ps 10
432 01:36:32.165486 RxClkDly_Margin_A1==88 ps 9
433 01:36:32.165941 TxDqDly_Margin_A1==98 ps 10
434 01:36:32.170976 TrainedVREFDQ_A0==74
435 01:36:32.171443 TrainedVREFDQ_A1==74
436 01:36:32.171851 VrefDac_Margin_A0==24
437 01:36:32.176665 DeviceVref_Margin_A0==40
438 01:36:32.177158 VrefDac_Margin_A1==24
439 01:36:32.182361 DeviceVref_Margin_A1==40
440 01:36:32.182840
441 01:36:32.183254
442 01:36:32.183655 channel==1
443 01:36:32.184089 RxClkDly_Margin_A0==98 ps 10
444 01:36:32.185797 TxDqDly_Margin_A0==88 ps 9
445 01:36:32.191243 RxClkDly_Margin_A1==98 ps 10
446 01:36:32.191715 TxDqDly_Margin_A1==88 ps 9
447 01:36:32.192162 TrainedVREFDQ_A0==76
448 01:36:32.196946 TrainedVREFDQ_A1==77
449 01:36:32.197414 VrefDac_Margin_A0==22
450 01:36:32.202559 DeviceVref_Margin_A0==38
451 01:36:32.203023 VrefDac_Margin_A1==24
452 01:36:32.203432 DeviceVref_Margin_A1==37
453 01:36:32.203831
454 01:36:32.211561 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:36:32.212093
456 01:36:32.237330 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 01:36:32.242949 2D training succeed
458 01:36:32.248478 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:36:32.248799 auto size-- 65535DDR cs0 size: 2048MB
460 01:36:32.254024 DDR cs1 size: 2048MB
461 01:36:32.254452 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:36:32.259669 cs0 DataBus test pass
463 01:36:32.260136 cs1 DataBus test pass
464 01:36:32.265215 cs0 AddrBus test pass
465 01:36:32.265540 cs1 AddrBus test pass
466 01:36:32.265772
467 01:36:32.266001 100bdlr_step_size ps== 420
468 01:36:32.270815 result report
469 01:36:32.271123 boot times 0Enable ddr reg access
470 01:36:32.279233 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:36:32.292703 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 01:36:32.865937 0.0;M3 CHK:0;cm4_sp_mode 0
473 01:36:32.866605 MVN_1=0x00000000
474 01:36:32.871382 MVN_2=0x00000000
475 01:36:32.877117 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 01:36:32.877673 OPS=0x10
477 01:36:32.878111 ring efuse init
478 01:36:32.878527 chipver efuse init
479 01:36:32.882786 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 01:36:32.888331 [0.018961 Inits done]
481 01:36:32.888861 secure task start!
482 01:36:32.889277 high task start!
483 01:36:32.892914 low task start!
484 01:36:32.893465 run into bl31
485 01:36:32.899611 NOTICE: BL31: v1.3(release):4fc40b1
486 01:36:32.907380 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 01:36:32.907936 NOTICE: BL31: G12A normal boot!
488 01:36:32.932810 NOTICE: BL31: BL33 decompress pass
489 01:36:32.938384 ERROR: Error initializing runtime service opteed_fast
490 01:36:34.171219
491 01:36:34.171821
492 01:36:34.179590 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 01:36:34.180121
494 01:36:34.180552 Model: Libre Computer AML-A311D-CC Alta
495 01:36:34.388201 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 01:36:34.411602 DRAM: 2 GiB (effective 3.8 GiB)
497 01:36:34.554526 Core: 408 devices, 31 uclasses, devicetree: separate
498 01:36:34.560352 WDT: Not starting watchdog@f0d0
499 01:36:34.592603 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 01:36:34.605049 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 01:36:34.610087 ** Bad device specification mmc 0 **
502 01:36:34.620369 Card did not respond to voltage select! : -110
503 01:36:34.628106 ** Bad device specification mmc 0 **
504 01:36:34.628587 Couldn't find partition mmc 0
505 01:36:34.636368 Card did not respond to voltage select! : -110
506 01:36:34.641899 ** Bad device specification mmc 0 **
507 01:36:34.642394 Couldn't find partition mmc 0
508 01:36:34.647039 Error: could not access storage.
509 01:36:35.910244 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 01:36:35.910845 bl2_stage_init 0x01
511 01:36:35.911275 bl2_stage_init 0x81
512 01:36:35.915784 hw id: 0x0000 - pwm id 0x01
513 01:36:35.916313 bl2_stage_init 0xc1
514 01:36:35.916735 bl2_stage_init 0x02
515 01:36:35.917143
516 01:36:35.921380 L0:00000000
517 01:36:35.921843 L1:20000703
518 01:36:35.922255 L2:00008067
519 01:36:35.922659 L3:14000000
520 01:36:35.924268 B2:00402000
521 01:36:35.924732 B1:e0f83180
522 01:36:35.925140
523 01:36:35.925542 TE: 58124
524 01:36:35.925945
525 01:36:35.935320 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 01:36:35.935804
527 01:36:35.936255 Board ID = 1
528 01:36:35.936659 Set A53 clk to 24M
529 01:36:35.937058 Set A73 clk to 24M
530 01:36:35.940999 Set clk81 to 24M
531 01:36:35.941460 A53 clk: 1200 MHz
532 01:36:35.941868 A73 clk: 1200 MHz
533 01:36:35.946575 CLK81: 166.6M
534 01:36:35.947038 smccc: 00012a92
535 01:36:35.952260 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 01:36:35.952729 board id: 1
537 01:36:35.957783 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 01:36:35.971509 fw parse done
539 01:36:35.977467 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 01:36:36.020075 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 01:36:36.031061 PIEI prepare done
542 01:36:36.031579 fastboot data load
543 01:36:36.032023 fastboot data verify
544 01:36:36.036660 verify result: 266
545 01:36:36.042286 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 01:36:36.042750 LPDDR4 probe
547 01:36:36.043158 ddr clk to 1584MHz
548 01:36:36.050223 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 01:36:36.087441
550 01:36:36.087929 dmc_version 0001
551 01:36:36.094112 Check phy result
552 01:36:36.100011 INFO : End of CA training
553 01:36:36.100475 INFO : End of initialization
554 01:36:36.105604 INFO : Training has run successfully!
555 01:36:36.106065 Check phy result
556 01:36:36.111294 INFO : End of initialization
557 01:36:36.111757 INFO : End of read enable training
558 01:36:36.116806 INFO : End of fine write leveling
559 01:36:36.122393 INFO : End of Write leveling coarse delay
560 01:36:36.122853 INFO : Training has run successfully!
561 01:36:36.123264 Check phy result
562 01:36:36.128023 INFO : End of initialization
563 01:36:36.128487 INFO : End of read dq deskew training
564 01:36:36.133586 INFO : End of MPR read delay center optimization
565 01:36:36.139273 INFO : End of write delay center optimization
566 01:36:36.144777 INFO : End of read delay center optimization
567 01:36:36.145247 INFO : End of max read latency training
568 01:36:36.150386 INFO : Training has run successfully!
569 01:36:36.150848 1D training succeed
570 01:36:36.159546 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 01:36:36.207202 Check phy result
572 01:36:36.207747 INFO : End of initialization
573 01:36:36.229020 INFO : End of 2D read delay Voltage center optimization
574 01:36:36.249284 INFO : End of 2D read delay Voltage center optimization
575 01:36:36.301287 INFO : End of 2D write delay Voltage center optimization
576 01:36:36.350705 INFO : End of 2D write delay Voltage center optimization
577 01:36:36.356226 INFO : Training has run successfully!
578 01:36:36.356820
579 01:36:36.357368 channel==0
580 01:36:36.361705 RxClkDly_Margin_A0==88 ps 9
581 01:36:36.362261 TxDqDly_Margin_A0==98 ps 10
582 01:36:36.367295 RxClkDly_Margin_A1==88 ps 9
583 01:36:36.367849 TxDqDly_Margin_A1==98 ps 10
584 01:36:36.368412 TrainedVREFDQ_A0==74
585 01:36:36.372891 TrainedVREFDQ_A1==74
586 01:36:36.373474 VrefDac_Margin_A0==25
587 01:36:36.374009 DeviceVref_Margin_A0==40
588 01:36:36.378499 VrefDac_Margin_A1==24
589 01:36:36.379079 DeviceVref_Margin_A1==40
590 01:36:36.379619
591 01:36:36.380187
592 01:36:36.384103 channel==1
593 01:36:36.384673 RxClkDly_Margin_A0==88 ps 9
594 01:36:36.385212 TxDqDly_Margin_A0==88 ps 9
595 01:36:36.389690 RxClkDly_Margin_A1==98 ps 10
596 01:36:36.390266 TxDqDly_Margin_A1==88 ps 9
597 01:36:36.395306 TrainedVREFDQ_A0==75
598 01:36:36.395873 TrainedVREFDQ_A1==77
599 01:36:36.396458 VrefDac_Margin_A0==22
600 01:36:36.400888 DeviceVref_Margin_A0==38
601 01:36:36.401460 VrefDac_Margin_A1==22
602 01:36:36.406495 DeviceVref_Margin_A1==37
603 01:36:36.407128
604 01:36:36.407676 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 01:36:36.408436
606 01:36:36.440129 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 01:36:36.440715 2D training succeed
608 01:36:36.445704 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 01:36:36.451303 auto size-- 65535DDR cs0 size: 2048MB
610 01:36:36.451817 DDR cs1 size: 2048MB
611 01:36:36.456897 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 01:36:36.457405 cs0 DataBus test pass
613 01:36:36.462503 cs1 DataBus test pass
614 01:36:36.463012 cs0 AddrBus test pass
615 01:36:36.463475 cs1 AddrBus test pass
616 01:36:36.463931
617 01:36:36.468111 100bdlr_step_size ps== 420
618 01:36:36.468628 result report
619 01:36:36.473683 boot times 0Enable ddr reg access
620 01:36:36.478940 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 01:36:36.492514 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 01:36:37.066195 0.0;M3 CHK:0;cm4_sp_mode 0
623 01:36:37.066884 MVN_1=0x00000000
624 01:36:37.071573 MVN_2=0x00000000
625 01:36:37.077333 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 01:36:37.077898 OPS=0x10
627 01:36:37.078375 ring efuse init
628 01:36:37.078852 chipver efuse init
629 01:36:37.082933 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 01:36:37.088511 [0.018961 Inits done]
631 01:36:37.089000 secure task start!
632 01:36:37.089439 high task start!
633 01:36:37.093088 low task start!
634 01:36:37.093568 run into bl31
635 01:36:37.099746 NOTICE: BL31: v1.3(release):4fc40b1
636 01:36:37.107548 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 01:36:37.108065 NOTICE: BL31: G12A normal boot!
638 01:36:37.132929 NOTICE: BL31: BL33 decompress pass
639 01:36:37.138583 ERROR: Error initializing runtime service opteed_fast
640 01:36:38.371856
641 01:36:38.372607
642 01:36:38.380079 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 01:36:38.380606
644 01:36:38.381077 Model: Libre Computer AML-A311D-CC Alta
645 01:36:38.588468 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 01:36:38.611853 DRAM: 2 GiB (effective 3.8 GiB)
647 01:36:38.754803 Core: 408 devices, 31 uclasses, devicetree: separate
648 01:36:38.760725 WDT: Not starting watchdog@f0d0
649 01:36:38.792933 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 01:36:38.805371 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 01:36:38.810398 ** Bad device specification mmc 0 **
652 01:36:38.820615 Card did not respond to voltage select! : -110
653 01:36:38.828362 ** Bad device specification mmc 0 **
654 01:36:38.828850 Couldn't find partition mmc 0
655 01:36:38.836599 Card did not respond to voltage select! : -110
656 01:36:38.842148 ** Bad device specification mmc 0 **
657 01:36:38.842629 Couldn't find partition mmc 0
658 01:36:38.847258 Error: could not access storage.
659 01:36:39.189938 Net: eth0: ethernet@ff3f0000
660 01:36:39.190494 starting USB...
661 01:36:39.441752 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 01:36:39.442359 Starting the controller
663 01:36:39.448664 USB XHCI 1.10
664 01:36:41.158908 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 01:36:41.159574 bl2_stage_init 0x01
666 01:36:41.160116 bl2_stage_init 0x81
667 01:36:41.164430 hw id: 0x0000 - pwm id 0x01
668 01:36:41.164929 bl2_stage_init 0xc1
669 01:36:41.165388 bl2_stage_init 0x02
670 01:36:41.165841
671 01:36:41.170059 L0:00000000
672 01:36:41.170546 L1:20000703
673 01:36:41.171001 L2:00008067
674 01:36:41.171448 L3:14000000
675 01:36:41.172998 B2:00402000
676 01:36:41.173488 B1:e0f83180
677 01:36:41.173939
678 01:36:41.174385 TE: 58124
679 01:36:41.174828
680 01:36:41.184054 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 01:36:41.184559
682 01:36:41.185021 Board ID = 1
683 01:36:41.185467 Set A53 clk to 24M
684 01:36:41.185909 Set A73 clk to 24M
685 01:36:41.189633 Set clk81 to 24M
686 01:36:41.190119 A53 clk: 1200 MHz
687 01:36:41.190569 A73 clk: 1200 MHz
688 01:36:41.195208 CLK81: 166.6M
689 01:36:41.195696 smccc: 00012a92
690 01:36:41.200772 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 01:36:41.201271 board id: 1
692 01:36:41.206416 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 01:36:41.220090 fw parse done
694 01:36:41.225995 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 01:36:41.268613 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 01:36:41.279487 PIEI prepare done
697 01:36:41.280007 fastboot data load
698 01:36:41.280485 fastboot data verify
699 01:36:41.285077 verify result: 266
700 01:36:41.290687 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 01:36:41.291169 LPDDR4 probe
702 01:36:41.291616 ddr clk to 1584MHz
703 01:36:41.298657 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 01:36:41.335918
705 01:36:41.336451 dmc_version 0001
706 01:36:41.342595 Check phy result
707 01:36:41.348471 INFO : End of CA training
708 01:36:41.348957 INFO : End of initialization
709 01:36:41.354065 INFO : Training has run successfully!
710 01:36:41.354547 Check phy result
711 01:36:41.359696 INFO : End of initialization
712 01:36:41.360209 INFO : End of read enable training
713 01:36:41.365265 INFO : End of fine write leveling
714 01:36:41.370872 INFO : End of Write leveling coarse delay
715 01:36:41.371351 INFO : Training has run successfully!
716 01:36:41.371795 Check phy result
717 01:36:41.376475 INFO : End of initialization
718 01:36:41.376965 INFO : End of read dq deskew training
719 01:36:41.382079 INFO : End of MPR read delay center optimization
720 01:36:41.387702 INFO : End of write delay center optimization
721 01:36:41.393263 INFO : End of read delay center optimization
722 01:36:41.393747 INFO : End of max read latency training
723 01:36:41.398871 INFO : Training has run successfully!
724 01:36:41.399344 1D training succeed
725 01:36:41.408068 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 01:36:41.455653 Check phy result
727 01:36:41.456199 INFO : End of initialization
728 01:36:41.477416 INFO : End of 2D read delay Voltage center optimization
729 01:36:41.497722 INFO : End of 2D read delay Voltage center optimization
730 01:36:41.549722 INFO : End of 2D write delay Voltage center optimization
731 01:36:41.599062 INFO : End of 2D write delay Voltage center optimization
732 01:36:41.604644 INFO : Training has run successfully!
733 01:36:41.605127
734 01:36:41.605587 channel==0
735 01:36:41.610194 RxClkDly_Margin_A0==88 ps 9
736 01:36:41.610672 TxDqDly_Margin_A0==98 ps 10
737 01:36:41.615882 RxClkDly_Margin_A1==88 ps 9
738 01:36:41.616407 TxDqDly_Margin_A1==98 ps 10
739 01:36:41.616861 TrainedVREFDQ_A0==74
740 01:36:41.621414 TrainedVREFDQ_A1==74
741 01:36:41.621894 VrefDac_Margin_A0==25
742 01:36:41.622342 DeviceVref_Margin_A0==40
743 01:36:41.627006 VrefDac_Margin_A1==25
744 01:36:41.627476 DeviceVref_Margin_A1==40
745 01:36:41.627923
746 01:36:41.628410
747 01:36:41.632620 channel==1
748 01:36:41.633119 RxClkDly_Margin_A0==98 ps 10
749 01:36:41.633570 TxDqDly_Margin_A0==98 ps 10
750 01:36:41.638205 RxClkDly_Margin_A1==98 ps 10
751 01:36:41.638679 TxDqDly_Margin_A1==88 ps 9
752 01:36:41.643858 TrainedVREFDQ_A0==77
753 01:36:41.644364 TrainedVREFDQ_A1==77
754 01:36:41.644816 VrefDac_Margin_A0==22
755 01:36:41.649420 DeviceVref_Margin_A0==37
756 01:36:41.649897 VrefDac_Margin_A1==22
757 01:36:41.655010 DeviceVref_Margin_A1==37
758 01:36:41.655485
759 01:36:41.655939 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 01:36:41.660616
761 01:36:41.688588 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 01:36:41.689076 2D training succeed
763 01:36:41.694187 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 01:36:41.699862 auto size-- 65535DDR cs0 size: 2048MB
765 01:36:41.700331 DDR cs1 size: 2048MB
766 01:36:41.705381 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 01:36:41.705820 cs0 DataBus test pass
768 01:36:41.710988 cs1 DataBus test pass
769 01:36:41.711433 cs0 AddrBus test pass
770 01:36:41.711847 cs1 AddrBus test pass
771 01:36:41.712305
772 01:36:41.716607 100bdlr_step_size ps== 420
773 01:36:41.717062 result report
774 01:36:41.722191 boot times 0Enable ddr reg access
775 01:36:41.727630 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 01:36:41.741122 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 01:36:42.314954 0.0;M3 CHK:0;cm4_sp_mode 0
778 01:36:42.315578 MVN_1=0x00000000
779 01:36:42.320395 MVN_2=0x00000000
780 01:36:42.326151 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 01:36:42.326700 OPS=0x10
782 01:36:42.327109 ring efuse init
783 01:36:42.327510 chipver efuse init
784 01:36:42.331708 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 01:36:42.337309 [0.018961 Inits done]
786 01:36:42.337754 secure task start!
787 01:36:42.338151 high task start!
788 01:36:42.341894 low task start!
789 01:36:42.342334 run into bl31
790 01:36:42.348558 NOTICE: BL31: v1.3(release):4fc40b1
791 01:36:42.356337 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 01:36:42.356792 NOTICE: BL31: G12A normal boot!
793 01:36:42.381703 NOTICE: BL31: BL33 decompress pass
794 01:36:42.387402 ERROR: Error initializing runtime service opteed_fast
795 01:36:43.620408
796 01:36:43.621037
797 01:36:43.628627 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 01:36:43.629110
799 01:36:43.629533 Model: Libre Computer AML-A311D-CC Alta
800 01:36:43.837087 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 01:36:43.860439 DRAM: 2 GiB (effective 3.8 GiB)
802 01:36:44.003503 Core: 408 devices, 31 uclasses, devicetree: separate
803 01:36:44.009334 WDT: Not starting watchdog@f0d0
804 01:36:44.041618 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 01:36:44.054238 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 01:36:44.059121 ** Bad device specification mmc 0 **
807 01:36:44.069443 Card did not respond to voltage select! : -110
808 01:36:44.077074 ** Bad device specification mmc 0 **
809 01:36:44.077467 Couldn't find partition mmc 0
810 01:36:44.085443 Card did not respond to voltage select! : -110
811 01:36:44.090946 ** Bad device specification mmc 0 **
812 01:36:44.091494 Couldn't find partition mmc 0
813 01:36:44.095968 Error: could not access storage.
814 01:36:44.438427 Net: eth0: ethernet@ff3f0000
815 01:36:44.438862 starting USB...
816 01:36:44.690242 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 01:36:44.690820 Starting the controller
818 01:36:44.697181 USB XHCI 1.10
819 01:36:46.859272 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
820 01:36:46.859732 bl2_stage_init 0x81
821 01:36:46.864812 hw id: 0x0000 - pwm id 0x01
822 01:36:46.865118 bl2_stage_init 0xc1
823 01:36:46.865365 bl2_stage_init 0x02
824 01:36:46.865616
825 01:36:46.870287 L0:00000000
826 01:36:46.870709 L1:20000703
827 01:36:46.871088 L2:00008067
828 01:36:46.871458 L3:14000000
829 01:36:46.871730 B2:00402000
830 01:36:46.873129 B1:e0f83180
831 01:36:46.873532
832 01:36:46.873915 TE: 58150
833 01:36:46.874186
834 01:36:46.884234 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 01:36:46.884544
836 01:36:46.884794 Board ID = 1
837 01:36:46.885025 Set A53 clk to 24M
838 01:36:46.885257 Set A73 clk to 24M
839 01:36:46.889835 Set clk81 to 24M
840 01:36:46.890245 A53 clk: 1200 MHz
841 01:36:46.890718 A73 clk: 1200 MHz
842 01:36:46.893336 CLK81: 166.6M
843 01:36:46.893753 smccc: 00012aab
844 01:36:46.898945 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 01:36:46.904568 board id: 1
846 01:36:46.909679 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 01:36:46.920280 fw parse done
848 01:36:46.926278 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 01:36:46.968924 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 01:36:46.979733 PIEI prepare done
851 01:36:46.980072 fastboot data load
852 01:36:46.980325 fastboot data verify
853 01:36:46.985334 verify result: 266
854 01:36:46.991001 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 01:36:46.991443 LPDDR4 probe
856 01:36:46.991840 ddr clk to 1584MHz
857 01:36:46.998941 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 01:36:47.036247
859 01:36:47.036635 dmc_version 0001
860 01:36:47.042874 Check phy result
861 01:36:47.048747 INFO : End of CA training
862 01:36:47.049188 INFO : End of initialization
863 01:36:47.054314 INFO : Training has run successfully!
864 01:36:47.054616 Check phy result
865 01:36:47.059921 INFO : End of initialization
866 01:36:47.060396 INFO : End of read enable training
867 01:36:47.065579 INFO : End of fine write leveling
868 01:36:47.071106 INFO : End of Write leveling coarse delay
869 01:36:47.071400 INFO : Training has run successfully!
870 01:36:47.071645 Check phy result
871 01:36:47.076711 INFO : End of initialization
872 01:36:47.077140 INFO : End of read dq deskew training
873 01:36:47.082320 INFO : End of MPR read delay center optimization
874 01:36:47.087916 INFO : End of write delay center optimization
875 01:36:47.093586 INFO : End of read delay center optimization
876 01:36:47.093888 INFO : End of max read latency training
877 01:36:47.099215 INFO : Training has run successfully!
878 01:36:47.099659 1D training succeed
879 01:36:47.108361 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 01:36:47.156002 Check phy result
881 01:36:47.156531 INFO : End of initialization
882 01:36:47.177743 INFO : End of 2D read delay Voltage center optimization
883 01:36:47.197874 INFO : End of 2D read delay Voltage center optimization
884 01:36:47.250038 INFO : End of 2D write delay Voltage center optimization
885 01:36:47.299394 INFO : End of 2D write delay Voltage center optimization
886 01:36:47.304971 INFO : Training has run successfully!
887 01:36:47.305501
888 01:36:47.305939 channel==0
889 01:36:47.310547 RxClkDly_Margin_A0==88 ps 9
890 01:36:47.311015 TxDqDly_Margin_A0==98 ps 10
891 01:36:47.313897 RxClkDly_Margin_A1==88 ps 9
892 01:36:47.314357 TxDqDly_Margin_A1==98 ps 10
893 01:36:47.319432 TrainedVREFDQ_A0==74
894 01:36:47.319890 TrainedVREFDQ_A1==74
895 01:36:47.320427 VrefDac_Margin_A0==25
896 01:36:47.325001 DeviceVref_Margin_A0==40
897 01:36:47.325530 VrefDac_Margin_A1==25
898 01:36:47.330653 DeviceVref_Margin_A1==40
899 01:36:47.331169
900 01:36:47.331568
901 01:36:47.331958 channel==1
902 01:36:47.332394 RxClkDly_Margin_A0==98 ps 10
903 01:36:47.334136 TxDqDly_Margin_A0==88 ps 9
904 01:36:47.339850 RxClkDly_Margin_A1==88 ps 9
905 01:36:47.340325 TxDqDly_Margin_A1==88 ps 9
906 01:36:47.340722 TrainedVREFDQ_A0==77
907 01:36:47.345347 TrainedVREFDQ_A1==77
908 01:36:47.345790 VrefDac_Margin_A0==22
909 01:36:47.351018 DeviceVref_Margin_A0==37
910 01:36:47.351494 VrefDac_Margin_A1==24
911 01:36:47.351884 DeviceVref_Margin_A1==37
912 01:36:47.352302
913 01:36:47.356472 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 01:36:47.356926
915 01:36:47.390259 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
916 01:36:47.390849 2D training succeed
917 01:36:47.395718 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 01:36:47.401213 auto size-- 65535DDR cs0 size: 2048MB
919 01:36:47.401669 DDR cs1 size: 2048MB
920 01:36:47.406841 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 01:36:47.407367 cs0 DataBus test pass
922 01:36:47.407769 cs1 DataBus test pass
923 01:36:47.412417 cs0 AddrBus test pass
924 01:36:47.412875 cs1 AddrBus test pass
925 01:36:47.413271
926 01:36:47.418008 100bdlr_step_size ps== 420
927 01:36:47.418467 result report
928 01:36:47.418862 boot times 0Enable ddr reg access
929 01:36:47.427640 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 01:36:47.441147 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 01:36:48.015027 0.0;M3 CHK:0;cm4_sp_mode 0
932 01:36:48.015482 MVN_1=0x00000000
933 01:36:48.020369 MVN_2=0x00000000
934 01:36:48.026118 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 01:36:48.026492 OPS=0x10
936 01:36:48.026779 ring efuse init
937 01:36:48.027061 chipver efuse init
938 01:36:48.031807 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 01:36:48.037303 [0.018961 Inits done]
940 01:36:48.037808 secure task start!
941 01:36:48.038134 high task start!
942 01:36:48.041924 low task start!
943 01:36:48.042420 run into bl31
944 01:36:48.048562 NOTICE: BL31: v1.3(release):4fc40b1
945 01:36:48.056458 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 01:36:48.056858 NOTICE: BL31: G12A normal boot!
947 01:36:48.081829 NOTICE: BL31: BL33 decompress pass
948 01:36:48.087396 ERROR: Error initializing runtime service opteed_fast
949 01:36:49.320403
950 01:36:49.320852
951 01:36:49.328689 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 01:36:49.329174
953 01:36:49.329617 Model: Libre Computer AML-A311D-CC Alta
954 01:36:49.537353 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 01:36:49.560690 DRAM: 2 GiB (effective 3.8 GiB)
956 01:36:49.703669 Core: 408 devices, 31 uclasses, devicetree: separate
957 01:36:49.709469 WDT: Not starting watchdog@f0d0
958 01:36:49.741721 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 01:36:49.754150 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 01:36:49.759222 ** Bad device specification mmc 0 **
961 01:36:49.769502 Card did not respond to voltage select! : -110
962 01:36:49.777235 ** Bad device specification mmc 0 **
963 01:36:49.777753 Couldn't find partition mmc 0
964 01:36:49.785496 Card did not respond to voltage select! : -110
965 01:36:49.791011 ** Bad device specification mmc 0 **
966 01:36:49.791502 Couldn't find partition mmc 0
967 01:36:49.796105 Error: could not access storage.
968 01:36:50.138491 Net: eth0: ethernet@ff3f0000
969 01:36:50.139106 starting USB...
970 01:36:50.390372 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 01:36:50.390960 Starting the controller
972 01:36:50.397311 USB XHCI 1.10
973 01:36:51.951213 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 01:36:51.959536 scanning usb for storage devices... 0 Storage Device(s) found
976 01:36:52.010980 Hit any key to stop autoboot: 1
977 01:36:52.012134 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 01:36:52.012558 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 01:36:52.012854 Setting prompt string to ['=>']
980 01:36:52.013145 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 01:36:52.027049 0
982 01:36:52.027839 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 01:36:52.028213 Sending with 10 millisecond of delay
985 01:36:53.162584 => setenv autoload no
986 01:36:53.173407 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 01:36:53.178382 setenv autoload no
988 01:36:53.179106 Sending with 10 millisecond of delay
990 01:36:54.976834 => setenv initrd_high 0xffffffff
991 01:36:54.987654 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 01:36:54.988608 setenv initrd_high 0xffffffff
993 01:36:54.989352 Sending with 10 millisecond of delay
995 01:36:56.606151 => setenv fdt_high 0xffffffff
996 01:36:56.616980 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
997 01:36:56.617829 setenv fdt_high 0xffffffff
998 01:36:56.618555 Sending with 10 millisecond of delay
1000 01:36:56.910501 => dhcp
1001 01:36:56.921308 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 01:36:56.922126 dhcp
1003 01:36:56.922563 Speed: 1000, full duplex
1004 01:36:56.922975 BOOTP broadcast 1
1005 01:36:56.929532 DHCP client bound to address 192.168.6.27 (8 ms)
1006 01:36:56.930487 Sending with 10 millisecond of delay
1008 01:36:58.607236 => setenv serverip 192.168.6.2
1009 01:36:58.618048 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1010 01:36:58.618980 setenv serverip 192.168.6.2
1011 01:36:58.619671 Sending with 10 millisecond of delay
1013 01:37:02.344587 => tftpboot 0x01080000 956229/tftp-deploy-pkm_2bn1/kernel/uImage
1014 01:37:02.355453 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 01:37:02.356438 tftpboot 0x01080000 956229/tftp-deploy-pkm_2bn1/kernel/uImage
1016 01:37:02.356926 Speed: 1000, full duplex
1017 01:37:02.357375 Using ethernet@ff3f0000 device
1018 01:37:02.358275 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 01:37:02.363937 Filename '956229/tftp-deploy-pkm_2bn1/kernel/uImage'.
1020 01:37:02.367778 Load address: 0x1080000
1021 01:37:05.455860 Loading: *################################################## 43.7 MiB
1022 01:37:05.456582 14.1 MiB/s
1023 01:37:05.457069 done
1024 01:37:05.460201 Bytes transferred = 45775424 (2ba7a40 hex)
1025 01:37:05.461061 Sending with 10 millisecond of delay
1027 01:37:10.152349 => tftpboot 0x08000000 956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot
1028 01:37:10.163249 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1029 01:37:10.163802 tftpboot 0x08000000 956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot
1030 01:37:10.164086 Speed: 1000, full duplex
1031 01:37:10.164300 Using ethernet@ff3f0000 device
1032 01:37:10.165798 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 01:37:10.177623 Filename '956229/tftp-deploy-pkm_2bn1/ramdisk/ramdisk.cpio.gz.uboot'.
1034 01:37:10.177956 Load address: 0x8000000
1035 01:37:16.812326 Loading: *############T ##################################### UDP wrong checksum 00000005 0000c4a8
1036 01:37:21.813162 T UDP wrong checksum 00000005 0000c4a8
1037 01:37:28.716842 T UDP wrong checksum 000000ff 0000cad9
1038 01:37:28.773188 UDP wrong checksum 000000ff 00005acc
1039 01:37:31.072224 UDP wrong checksum 000000ff 00007981
1040 01:37:31.112134 UDP wrong checksum 000000ff 00001574
1041 01:37:31.816311 T UDP wrong checksum 00000005 0000c4a8
1042 01:37:41.829507 T T UDP wrong checksum 000000ff 00001483
1043 01:37:41.843166 UDP wrong checksum 000000ff 00009d75
1044 01:37:51.820849 T T UDP wrong checksum 00000005 0000c4a8
1045 01:37:58.343034 T UDP wrong checksum 000000ff 0000580b
1046 01:37:58.413263 UDP wrong checksum 000000ff 0000e3fd
1047 01:38:06.824564 T
1048 01:38:06.825189 Retry count exceeded; starting again
1050 01:38:06.826599 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1053 01:38:06.828482 end: 2.4 uboot-commands (duration 00:01:47) [common]
1055 01:38:06.829853 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1057 01:38:06.830892 end: 2 uboot-action (duration 00:01:47) [common]
1059 01:38:06.832498 Cleaning after the job
1060 01:38:06.833064 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/ramdisk
1061 01:38:06.836108 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/kernel
1062 01:38:06.885704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/dtb
1063 01:38:06.896349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/nfsrootfs
1064 01:38:07.076251 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956229/tftp-deploy-pkm_2bn1/modules
1065 01:38:07.102366 start: 4.1 power-off (timeout 00:00:30) [common]
1066 01:38:07.103054 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1067 01:38:07.136654 >> OK - accepted request
1068 01:38:07.138711 Returned 0 in 0 seconds
1069 01:38:07.239419 end: 4.1 power-off (duration 00:00:00) [common]
1071 01:38:07.240330 start: 4.2 read-feedback (timeout 00:10:00) [common]
1072 01:38:07.240972 Listened to connection for namespace 'common' for up to 1s
1073 01:38:08.241891 Finalising connection for namespace 'common'
1074 01:38:08.242342 Disconnecting from shell: Finalise
1075 01:38:08.242608 =>
1076 01:38:08.343223 end: 4.2 read-feedback (duration 00:00:01) [common]
1077 01:38:08.343569 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956229
1078 01:38:11.432935 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956229
1079 01:38:11.433570 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.