Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:28:21.114355 lava-dispatcher, installed at version: 2024.01
2 02:28:21.115195 start: 0 validate
3 02:28:21.115678 Start time: 2024-11-08 02:28:21.115648+00:00 (UTC)
4 02:28:21.116287 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:28:21.116820 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:28:21.158309 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:28:21.158898 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:28:21.189066 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:28:21.189861 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:28:21.218297 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:28:21.218894 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:28:21.250547 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:28:21.251115 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-144-g118f0dcf6420%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:28:21.286165 validate duration: 0.17
16 02:28:21.287009 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:28:21.287352 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:28:21.287657 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:28:21.288509 Not decompressing ramdisk as can be used compressed.
20 02:28:21.289348 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:28:21.289892 saving as /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/ramdisk/initrd.cpio.gz
22 02:28:21.290421 total size: 5628140 (5 MB)
23 02:28:21.325392 progress 0 % (0 MB)
24 02:28:21.329442 progress 5 % (0 MB)
25 02:28:21.333519 progress 10 % (0 MB)
26 02:28:21.337193 progress 15 % (0 MB)
27 02:28:21.341187 progress 20 % (1 MB)
28 02:28:21.344812 progress 25 % (1 MB)
29 02:28:21.348856 progress 30 % (1 MB)
30 02:28:21.352817 progress 35 % (1 MB)
31 02:28:21.356316 progress 40 % (2 MB)
32 02:28:21.360290 progress 45 % (2 MB)
33 02:28:21.363777 progress 50 % (2 MB)
34 02:28:21.367717 progress 55 % (2 MB)
35 02:28:21.371674 progress 60 % (3 MB)
36 02:28:21.375189 progress 65 % (3 MB)
37 02:28:21.379195 progress 70 % (3 MB)
38 02:28:21.382722 progress 75 % (4 MB)
39 02:28:21.386658 progress 80 % (4 MB)
40 02:28:21.390189 progress 85 % (4 MB)
41 02:28:21.394048 progress 90 % (4 MB)
42 02:28:21.397626 progress 95 % (5 MB)
43 02:28:21.400839 progress 100 % (5 MB)
44 02:28:21.401476 5 MB downloaded in 0.11 s (48.33 MB/s)
45 02:28:21.402022 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:28:21.402901 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:28:21.403191 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:28:21.403461 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:28:21.404073 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/kernel/Image
51 02:28:21.404352 saving as /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/kernel/Image
52 02:28:21.404571 total size: 45775360 (43 MB)
53 02:28:21.404790 No compression specified
54 02:28:21.446561 progress 0 % (0 MB)
55 02:28:21.480113 progress 5 % (2 MB)
56 02:28:21.513758 progress 10 % (4 MB)
57 02:28:21.547465 progress 15 % (6 MB)
58 02:28:21.581402 progress 20 % (8 MB)
59 02:28:21.614901 progress 25 % (10 MB)
60 02:28:21.648390 progress 30 % (13 MB)
61 02:28:21.681300 progress 35 % (15 MB)
62 02:28:21.715271 progress 40 % (17 MB)
63 02:28:21.749058 progress 45 % (19 MB)
64 02:28:21.782639 progress 50 % (21 MB)
65 02:28:21.816428 progress 55 % (24 MB)
66 02:28:21.850110 progress 60 % (26 MB)
67 02:28:21.883865 progress 65 % (28 MB)
68 02:28:21.917050 progress 70 % (30 MB)
69 02:28:21.951138 progress 75 % (32 MB)
70 02:28:21.984998 progress 80 % (34 MB)
71 02:28:22.018590 progress 85 % (37 MB)
72 02:28:22.052214 progress 90 % (39 MB)
73 02:28:22.085715 progress 95 % (41 MB)
74 02:28:22.117727 progress 100 % (43 MB)
75 02:28:22.118636 43 MB downloaded in 0.71 s (61.14 MB/s)
76 02:28:22.119211 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:28:22.120251 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:28:22.120588 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:28:22.120916 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:28:22.121632 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:28:22.121981 saving as /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:28:22.122236 total size: 53209 (0 MB)
84 02:28:22.122488 No compression specified
85 02:28:22.160608 progress 61 % (0 MB)
86 02:28:22.161611 progress 100 % (0 MB)
87 02:28:22.162235 0 MB downloaded in 0.04 s (1.27 MB/s)
88 02:28:22.162775 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:28:22.163760 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:28:22.164107 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:28:22.164442 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:28:22.164982 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:28:22.165269 saving as /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/nfsrootfs/full.rootfs.tar
95 02:28:22.165518 total size: 474398908 (452 MB)
96 02:28:22.165773 Using unxz to decompress xz
97 02:28:22.202714 progress 0 % (0 MB)
98 02:28:23.329023 progress 5 % (22 MB)
99 02:28:24.779102 progress 10 % (45 MB)
100 02:28:25.273612 progress 15 % (67 MB)
101 02:28:26.040806 progress 20 % (90 MB)
102 02:28:26.595114 progress 25 % (113 MB)
103 02:28:26.989319 progress 30 % (135 MB)
104 02:28:27.607511 progress 35 % (158 MB)
105 02:28:28.453536 progress 40 % (181 MB)
106 02:28:29.194817 progress 45 % (203 MB)
107 02:28:29.774248 progress 50 % (226 MB)
108 02:28:30.412661 progress 55 % (248 MB)
109 02:28:31.617377 progress 60 % (271 MB)
110 02:28:33.025690 progress 65 % (294 MB)
111 02:28:34.613476 progress 70 % (316 MB)
112 02:28:37.768782 progress 75 % (339 MB)
113 02:28:40.197980 progress 80 % (361 MB)
114 02:28:43.107916 progress 85 % (384 MB)
115 02:28:46.254556 progress 90 % (407 MB)
116 02:28:49.450550 progress 95 % (429 MB)
117 02:28:52.656252 progress 100 % (452 MB)
118 02:28:52.670253 452 MB downloaded in 30.50 s (14.83 MB/s)
119 02:28:52.670988 end: 1.4.1 http-download (duration 00:00:31) [common]
121 02:28:52.672709 end: 1.4 download-retry (duration 00:00:31) [common]
122 02:28:52.673251 start: 1.5 download-retry (timeout 00:09:29) [common]
123 02:28:52.673776 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 02:28:52.674597 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-144-g118f0dcf6420/arm64/defconfig/gcc-12/modules.tar.xz
125 02:28:52.675067 saving as /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/modules/modules.tar
126 02:28:52.675480 total size: 11605964 (11 MB)
127 02:28:52.675903 Using unxz to decompress xz
128 02:28:52.718078 progress 0 % (0 MB)
129 02:28:52.784232 progress 5 % (0 MB)
130 02:28:52.857247 progress 10 % (1 MB)
131 02:28:52.952134 progress 15 % (1 MB)
132 02:28:53.044194 progress 20 % (2 MB)
133 02:28:53.123037 progress 25 % (2 MB)
134 02:28:53.198664 progress 30 % (3 MB)
135 02:28:53.272051 progress 35 % (3 MB)
136 02:28:53.347849 progress 40 % (4 MB)
137 02:28:53.423159 progress 45 % (5 MB)
138 02:28:53.506280 progress 50 % (5 MB)
139 02:28:53.582946 progress 55 % (6 MB)
140 02:28:53.666908 progress 60 % (6 MB)
141 02:28:53.746228 progress 65 % (7 MB)
142 02:28:53.821671 progress 70 % (7 MB)
143 02:28:53.902543 progress 75 % (8 MB)
144 02:28:53.985256 progress 80 % (8 MB)
145 02:28:54.064828 progress 85 % (9 MB)
146 02:28:54.142699 progress 90 % (9 MB)
147 02:28:54.219583 progress 95 % (10 MB)
148 02:28:54.295927 progress 100 % (11 MB)
149 02:28:54.306676 11 MB downloaded in 1.63 s (6.79 MB/s)
150 02:28:54.307416 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:28:54.309168 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:28:54.309709 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 02:28:54.310242 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 02:29:09.609886 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956175/extract-nfsrootfs-qezvaw9e
156 02:29:09.610497 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 02:29:09.610788 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 02:29:09.611494 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3
159 02:29:09.611949 makedir: /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin
160 02:29:09.612323 makedir: /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/tests
161 02:29:09.612648 makedir: /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/results
162 02:29:09.612982 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-add-keys
163 02:29:09.613514 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-add-sources
164 02:29:09.614023 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-background-process-start
165 02:29:09.614516 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-background-process-stop
166 02:29:09.615047 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-common-functions
167 02:29:09.615540 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-echo-ipv4
168 02:29:09.616046 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-install-packages
169 02:29:09.616550 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-installed-packages
170 02:29:09.617029 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-os-build
171 02:29:09.617500 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-probe-channel
172 02:29:09.618003 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-probe-ip
173 02:29:09.618510 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-target-ip
174 02:29:09.618988 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-target-mac
175 02:29:09.619458 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-target-storage
176 02:29:09.619941 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-case
177 02:29:09.620449 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-event
178 02:29:09.620920 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-feedback
179 02:29:09.621394 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-raise
180 02:29:09.621878 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-reference
181 02:29:09.622377 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-runner
182 02:29:09.622932 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-set
183 02:29:09.623417 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-test-shell
184 02:29:09.623896 Updating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-install-packages (oe)
185 02:29:09.624454 Updating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/bin/lava-installed-packages (oe)
186 02:29:09.624898 Creating /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/environment
187 02:29:09.625268 LAVA metadata
188 02:29:09.625524 - LAVA_JOB_ID=956175
189 02:29:09.625739 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:29:09.626092 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 02:29:09.627050 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:29:09.627361 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 02:29:09.627569 skipped lava-vland-overlay
194 02:29:09.627808 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:29:09.628087 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 02:29:09.628307 skipped lava-multinode-overlay
197 02:29:09.628549 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:29:09.628799 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 02:29:09.629047 Loading test definitions
200 02:29:09.629316 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 02:29:09.629537 Using /lava-956175 at stage 0
202 02:29:09.630683 uuid=956175_1.6.2.4.1 testdef=None
203 02:29:09.630992 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:29:09.631256 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 02:29:09.632996 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:29:09.633791 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 02:29:09.635919 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:29:09.636777 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 02:29:09.638824 runner path: /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 956175_1.6.2.4.1
212 02:29:09.639382 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:29:09.640165 Creating lava-test-runner.conf files
215 02:29:09.640368 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956175/lava-overlay-f190lmt3/lava-956175/0 for stage 0
216 02:29:09.640697 - 0_v4l2-decoder-conformance-h265
217 02:29:09.641032 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:29:09.641301 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 02:29:09.662711 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:29:09.663058 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 02:29:09.663315 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:29:09.663578 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:29:09.663841 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 02:29:10.273226 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:29:10.273698 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 02:29:10.273946 extracting modules file /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956175/extract-nfsrootfs-qezvaw9e
227 02:29:11.649152 extracting modules file /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956175/extract-overlay-ramdisk-0fyfk2qd/ramdisk
228 02:29:13.044138 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:29:13.044621 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 02:29:13.044893 [common] Applying overlay to NFS
231 02:29:13.045106 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956175/compress-overlay-g8f68gy2/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956175/extract-nfsrootfs-qezvaw9e
232 02:29:13.074891 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:29:13.075262 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 02:29:13.075553 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 02:29:13.075784 Converting downloaded kernel to a uImage
236 02:29:13.076105 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/kernel/Image /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/kernel/uImage
237 02:29:13.570055 output: Image Name:
238 02:29:13.570553 output: Created: Fri Nov 8 02:29:13 2024
239 02:29:13.570820 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:29:13.571070 output: Data Size: 45775360 Bytes = 44702.50 KiB = 43.65 MiB
241 02:29:13.571316 output: Load Address: 01080000
242 02:29:13.571551 output: Entry Point: 01080000
243 02:29:13.571792 output:
244 02:29:13.572243 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:29:13.572578 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:29:13.572910 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 02:29:13.573220 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:29:13.573539 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 02:29:13.573845 Building ramdisk /var/lib/lava/dispatcher/tmp/956175/extract-overlay-ramdisk-0fyfk2qd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956175/extract-overlay-ramdisk-0fyfk2qd/ramdisk
250 02:29:15.677885 >> 166791 blocks
251 02:29:23.670088 Adding RAMdisk u-boot header.
252 02:29:23.670528 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956175/extract-overlay-ramdisk-0fyfk2qd/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956175/extract-overlay-ramdisk-0fyfk2qd/ramdisk.cpio.gz.uboot
253 02:29:23.910984 output: Image Name:
254 02:29:23.911391 output: Created: Fri Nov 8 02:29:23 2024
255 02:29:23.911638 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:29:23.911884 output: Data Size: 23432383 Bytes = 22883.19 KiB = 22.35 MiB
257 02:29:23.912338 output: Load Address: 00000000
258 02:29:23.912791 output: Entry Point: 00000000
259 02:29:23.913253 output:
260 02:29:23.914531 rename /var/lib/lava/dispatcher/tmp/956175/extract-overlay-ramdisk-0fyfk2qd/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot
261 02:29:23.915318 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:29:23.915916 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 02:29:23.916541 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 02:29:23.917060 No LXC device requested
265 02:29:23.917620 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:29:23.918183 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 02:29:23.918728 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:29:23.919185 Checking files for TFTP limit of 4294967296 bytes.
269 02:29:23.922139 end: 1 tftp-deploy (duration 00:01:03) [common]
270 02:29:23.922773 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:29:23.923349 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:29:23.923893 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:29:23.924773 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:29:23.925400 Using kernel file from prepare-kernel: 956175/tftp-deploy-1k9j1ecs/kernel/uImage
275 02:29:23.926102 substitutions:
276 02:29:23.926558 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:29:23.927006 - {DTB_ADDR}: 0x01070000
278 02:29:23.927444 - {DTB}: 956175/tftp-deploy-1k9j1ecs/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 02:29:23.927883 - {INITRD}: 956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot
280 02:29:23.928368 - {KERNEL_ADDR}: 0x01080000
281 02:29:23.928805 - {KERNEL}: 956175/tftp-deploy-1k9j1ecs/kernel/uImage
282 02:29:23.929241 - {LAVA_MAC}: None
283 02:29:23.929722 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956175/extract-nfsrootfs-qezvaw9e
284 02:29:23.930167 - {NFS_SERVER_IP}: 192.168.6.2
285 02:29:23.930602 - {PRESEED_CONFIG}: None
286 02:29:23.931034 - {PRESEED_LOCAL}: None
287 02:29:23.931466 - {RAMDISK_ADDR}: 0x08000000
288 02:29:23.931894 - {RAMDISK}: 956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot
289 02:29:23.932359 - {ROOT_PART}: None
290 02:29:23.932880 - {ROOT}: None
291 02:29:23.933370 - {SERVER_IP}: 192.168.6.2
292 02:29:23.933807 - {TEE_ADDR}: 0x83000000
293 02:29:23.934239 - {TEE}: None
294 02:29:23.934673 Parsed boot commands:
295 02:29:23.935097 - setenv autoload no
296 02:29:23.935531 - setenv initrd_high 0xffffffff
297 02:29:23.935959 - setenv fdt_high 0xffffffff
298 02:29:23.936619 - dhcp
299 02:29:23.937137 - setenv serverip 192.168.6.2
300 02:29:23.937596 - tftpboot 0x01080000 956175/tftp-deploy-1k9j1ecs/kernel/uImage
301 02:29:23.938040 - tftpboot 0x08000000 956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot
302 02:29:23.938479 - tftpboot 0x01070000 956175/tftp-deploy-1k9j1ecs/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 02:29:23.938912 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956175/extract-nfsrootfs-qezvaw9e,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:29:23.939361 - bootm 0x01080000 0x08000000 0x01070000
305 02:29:23.939933 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:29:23.941641 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:29:23.942113 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 02:29:23.959247 Setting prompt string to ['lava-test: # ']
310 02:29:23.961106 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:29:23.961759 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:29:23.962484 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:29:23.963264 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:29:23.964552 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 02:29:23.999213 >> OK - accepted request
316 02:29:24.001305 Returned 0 in 0 seconds
317 02:29:24.102273 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:29:24.104139 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:29:24.104769 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:29:24.105337 Setting prompt string to ['Hit any key to stop autoboot']
322 02:29:24.105841 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:29:24.107536 Trying 192.168.56.21...
324 02:29:24.108106 Connected to conserv1.
325 02:29:24.108572 Escape character is '^]'.
326 02:29:24.109025
327 02:29:24.109481 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 02:29:24.109940
329 02:29:31.114504 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 02:29:31.115313 bl2_stage_init 0x01
331 02:29:31.115879 bl2_stage_init 0x81
332 02:29:31.120076 hw id: 0x0000 - pwm id 0x01
333 02:29:31.120671 bl2_stage_init 0xc1
334 02:29:31.124492 bl2_stage_init 0x02
335 02:29:31.125094
336 02:29:31.125641 L0:00000000
337 02:29:31.126186 L1:00000703
338 02:29:31.126702 L2:00008067
339 02:29:31.130029 L3:15000000
340 02:29:31.130608 S1:00000000
341 02:29:31.131155 B2:20282000
342 02:29:31.131687 B1:a0f83180
343 02:29:31.132247
344 02:29:31.132780 TE: 70425
345 02:29:31.133296
346 02:29:31.141185 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 02:29:31.141810
348 02:29:31.142405 Board ID = 1
349 02:29:31.142959 Set cpu clk to 24M
350 02:29:31.143493 Set clk81 to 24M
351 02:29:31.146752 Use GP1_pll as DSU clk.
352 02:29:31.147318 DSU clk: 1200 Mhz
353 02:29:31.147848 CPU clk: 1200 MHz
354 02:29:31.152289 Set clk81 to 166.6M
355 02:29:31.158014 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 02:29:31.158595 board id: 1
357 02:29:31.166254 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:29:31.177293 fw parse done
359 02:29:31.183005 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:29:31.226089 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:29:31.237304 PIEI prepare done
362 02:29:31.237845 fastboot data load
363 02:29:31.238339 fastboot data verify
364 02:29:31.242900 verify result: 266
365 02:29:31.248501 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 02:29:31.248992 LPDDR4 probe
367 02:29:31.249452 ddr clk to 1584MHz
368 02:29:31.256494 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:29:31.294172
370 02:29:31.294686 dmc_version 0001
371 02:29:31.301316 Check phy result
372 02:29:31.307248 INFO : End of CA training
373 02:29:31.307750 INFO : End of initialization
374 02:29:31.312901 INFO : Training has run successfully!
375 02:29:31.313402 Check phy result
376 02:29:31.318457 INFO : End of initialization
377 02:29:31.318964 INFO : End of read enable training
378 02:29:31.324088 INFO : End of fine write leveling
379 02:29:31.329643 INFO : End of Write leveling coarse delay
380 02:29:31.330156 INFO : Training has run successfully!
381 02:29:31.330621 Check phy result
382 02:29:31.335232 INFO : End of initialization
383 02:29:31.335739 INFO : End of read dq deskew training
384 02:29:31.340892 INFO : End of MPR read delay center optimization
385 02:29:31.346375 INFO : End of write delay center optimization
386 02:29:31.351961 INFO : End of read delay center optimization
387 02:29:31.352535 INFO : End of max read latency training
388 02:29:31.357617 INFO : Training has run successfully!
389 02:29:31.358141 1D training succeed
390 02:29:31.366856 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:29:31.415283 Check phy result
392 02:29:31.416039 INFO : End of initialization
393 02:29:31.442560 INFO : End of 2D read delay Voltage center optimization
394 02:29:31.465700 INFO : End of 2D read delay Voltage center optimization
395 02:29:31.522503 INFO : End of 2D write delay Voltage center optimization
396 02:29:31.577337 INFO : End of 2D write delay Voltage center optimization
397 02:29:31.582922 INFO : Training has run successfully!
398 02:29:31.583402
399 02:29:31.583860 channel==0
400 02:29:31.588428 RxClkDly_Margin_A0==78 ps 8
401 02:29:31.588908 TxDqDly_Margin_A0==88 ps 9
402 02:29:31.594024 RxClkDly_Margin_A1==88 ps 9
403 02:29:31.594510 TxDqDly_Margin_A1==98 ps 10
404 02:29:31.594951 TrainedVREFDQ_A0==74
405 02:29:31.599695 TrainedVREFDQ_A1==75
406 02:29:31.600374 VrefDac_Margin_A0==23
407 02:29:31.600852 DeviceVref_Margin_A0==40
408 02:29:31.605317 VrefDac_Margin_A1==23
409 02:29:31.605803 DeviceVref_Margin_A1==39
410 02:29:31.606236
411 02:29:31.606669
412 02:29:31.607100 channel==1
413 02:29:31.610979 RxClkDly_Margin_A0==78 ps 8
414 02:29:31.611450 TxDqDly_Margin_A0==98 ps 10
415 02:29:31.616403 RxClkDly_Margin_A1==78 ps 8
416 02:29:31.616868 TxDqDly_Margin_A1==88 ps 9
417 02:29:31.622108 TrainedVREFDQ_A0==78
418 02:29:31.622577 TrainedVREFDQ_A1==75
419 02:29:31.623011 VrefDac_Margin_A0==22
420 02:29:31.627651 DeviceVref_Margin_A0==36
421 02:29:31.628146 VrefDac_Margin_A1==22
422 02:29:31.633317 DeviceVref_Margin_A1==39
423 02:29:31.633891
424 02:29:31.634367 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:29:31.634806
426 02:29:31.666875 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 02:29:31.667569 2D training succeed
428 02:29:31.672418 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:29:31.677992 auto size-- 65535DDR cs0 size: 2048MB
430 02:29:31.678531 DDR cs1 size: 2048MB
431 02:29:31.683616 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:29:31.684154 cs0 DataBus test pass
433 02:29:31.689276 cs1 DataBus test pass
434 02:29:31.689832 cs0 AddrBus test pass
435 02:29:31.690322 cs1 AddrBus test pass
436 02:29:31.690771
437 02:29:31.694932 100bdlr_step_size ps== 471
438 02:29:31.695506 result report
439 02:29:31.700438 boot times 0Enable ddr reg access
440 02:29:31.705635 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:29:31.719521 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 02:29:32.378901 bl2z: ptr: 05129330, size: 00001e40
443 02:29:32.387821 0.0;M3 CHK:0;cm4_sp_mode 0
444 02:29:32.388419 MVN_1=0x00000000
445 02:29:32.388873 MVN_2=0x00000000
446 02:29:32.399289 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 02:29:32.399804 OPS=0x04
448 02:29:32.400288 ring efuse init
449 02:29:32.402298 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 02:29:32.407870 [0.017354 Inits done]
451 02:29:32.408420 secure task start!
452 02:29:32.408903 high task start!
453 02:29:32.409362 low task start!
454 02:29:32.412191 run into bl31
455 02:29:32.420713 NOTICE: BL31: v1.3(release):4fc40b1
456 02:29:32.428518 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 02:29:32.428902 NOTICE: BL31: G12A normal boot!
458 02:29:32.444085 NOTICE: BL31: BL33 decompress pass
459 02:29:32.449775 ERROR: Error initializing runtime service opteed_fast
460 02:29:33.665698 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 02:29:33.666132 bl2_stage_init 0x01
462 02:29:33.666362 bl2_stage_init 0x81
463 02:29:33.671300 hw id: 0x0000 - pwm id 0x01
464 02:29:33.671768 bl2_stage_init 0xc1
465 02:29:33.676889 bl2_stage_init 0x02
466 02:29:33.677326
467 02:29:33.677584 L0:00000000
468 02:29:33.677796 L1:00000703
469 02:29:33.678004 L2:00008067
470 02:29:33.678204 L3:15000000
471 02:29:33.682417 S1:00000000
472 02:29:33.682821 B2:20282000
473 02:29:33.683165 B1:a0f83180
474 02:29:33.683540
475 02:29:33.683867 TE: 70555
476 02:29:33.684217
477 02:29:33.688180 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 02:29:33.688610
479 02:29:33.693682 Board ID = 1
480 02:29:33.694105 Set cpu clk to 24M
481 02:29:33.694354 Set clk81 to 24M
482 02:29:33.699293 Use GP1_pll as DSU clk.
483 02:29:33.699641 DSU clk: 1200 Mhz
484 02:29:33.699893 CPU clk: 1200 MHz
485 02:29:33.704882 Set clk81 to 166.6M
486 02:29:33.710427 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 02:29:33.710763 board id: 1
488 02:29:33.717669 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 02:29:33.728603 fw parse done
490 02:29:33.734549 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 02:29:33.777649 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 02:29:33.788676 PIEI prepare done
493 02:29:33.788992 fastboot data load
494 02:29:33.789208 fastboot data verify
495 02:29:33.794345 verify result: 266
496 02:29:33.802840 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 02:29:33.803186 LPDDR4 probe
498 02:29:33.803426 ddr clk to 1584MHz
499 02:29:35.164230 Load ddrfw from SPI, sr SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 02:29:35.164867 bl2_stage_init 0x01
501 02:29:35.165297 bl2_stage_init 0x81
502 02:29:35.169774 hw id: 0x0000 - pwm id 0x01
503 02:29:35.170263 bl2_stage_init 0xc1
504 02:29:35.175478 bl2_stage_init 0x02
505 02:29:35.176037
506 02:29:35.176457 L0:00000000
507 02:29:35.176845 L1:00000703
508 02:29:35.177233 L2:00008067
509 02:29:35.177653 L3:15000000
510 02:29:35.181003 S1:00000000
511 02:29:35.181438 B2:20282000
512 02:29:35.181851 B1:a0f83180
513 02:29:35.182267
514 02:29:35.182658 TE: 70768
515 02:29:35.183044
516 02:29:35.186583 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 02:29:35.187030
518 02:29:35.192231 Board ID = 1
519 02:29:35.192663 Set cpu clk to 24M
520 02:29:35.193052 Set clk81 to 24M
521 02:29:35.197802 Use GP1_pll as DSU clk.
522 02:29:35.198243 DSU clk: 1200 Mhz
523 02:29:35.198629 CPU clk: 1200 MHz
524 02:29:35.203848 Set clk81 to 166.6M
525 02:29:35.208983 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 02:29:35.209417 board id: 1
527 02:29:35.217110 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 02:29:35.227605 fw parse done
529 02:29:35.232760 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 02:29:35.275477 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 02:29:35.287443 PIEI prepare done
532 02:29:35.287925 fastboot data load
533 02:29:35.288373 fastboot data verify
534 02:29:35.291939 verify result: 266
535 02:29:35.297563 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 02:29:35.298004 LPDDR4 probe
537 02:29:35.298389 ddr clk to 1584MHz
538 02:29:35.305515 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 02:29:35.342873
540 02:29:35.343354 dmc_version 0001
541 02:29:35.349865 Check phy result
542 02:29:35.355542 INFO : End of CA training
543 02:29:35.355970 INFO : End of initialization
544 02:29:35.361134 INFO : Training has run successfully!
545 02:29:35.361640 Check phy result
546 02:29:35.366618 INFO : End of initialization
547 02:29:35.367080 INFO : End of read enable training
548 02:29:35.372239 INFO : End of fine write leveling
549 02:29:35.377850 INFO : End of Write leveling coarse delay
550 02:29:35.378301 INFO : Training has run successfully!
551 02:29:35.378712 Check phy result
552 02:29:35.383445 INFO : End of initialization
553 02:29:35.383895 INFO : End of read dq deskew training
554 02:29:35.389061 INFO : End of MPR read delay center optimization
555 02:29:35.394613 INFO : End of write delay center optimization
556 02:29:35.400264 INFO : End of read delay center optimization
557 02:29:35.400734 INFO : End of max read latency training
558 02:29:35.405933 INFO : Training has run successfully!
559 02:29:35.406388 1D training succeed
560 02:29:35.415004 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 02:29:35.462673 Check phy result
562 02:29:35.463181 INFO : End of initialization
563 02:29:35.485013 INFO : End of 2D read delay Voltage center optimization
564 02:29:35.504167 INFO : End of 2D read delay Voltage center optimization
565 02:29:35.556130 INFO : End of 2D write delay Voltage center optimization
566 02:29:35.605207 INFO : End of 2D write delay Voltage center optimization
567 02:29:35.610689 INFO : Training has run successfully!
568 02:29:35.611144
569 02:29:35.611559 channel==0
570 02:29:35.616303 RxClkDly_Margin_A0==78 ps 8
571 02:29:35.616761 TxDqDly_Margin_A0==98 ps 10
572 02:29:35.622538 RxClkDly_Margin_A1==88 ps 9
573 02:29:35.623001 TxDqDly_Margin_A1==88 ps 9
574 02:29:35.623421 TrainedVREFDQ_A0==74
575 02:29:35.627646 TrainedVREFDQ_A1==74
576 02:29:35.628247 VrefDac_Margin_A0==23
577 02:29:35.628664 DeviceVref_Margin_A0==40
578 02:29:35.633178 VrefDac_Margin_A1==23
579 02:29:35.633743 DeviceVref_Margin_A1==40
580 02:29:35.634157
581 02:29:35.634564
582 02:29:35.634967 channel==1
583 02:29:35.638758 RxClkDly_Margin_A0==78 ps 8
584 02:29:35.639276 TxDqDly_Margin_A0==98 ps 10
585 02:29:35.644404 RxClkDly_Margin_A1==78 ps 8
586 02:29:35.645249 TxDqDly_Margin_A1==88 ps 9
587 02:29:35.649944 TrainedVREFDQ_A0==78
588 02:29:35.650828 TrainedVREFDQ_A1==75
589 02:29:35.651555 VrefDac_Margin_A0==22
590 02:29:35.655520 DeviceVref_Margin_A0==36
591 02:29:35.655936 VrefDac_Margin_A1==22
592 02:29:35.661283 DeviceVref_Margin_A1==39
593 02:29:35.661900
594 02:29:35.662280 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 02:29:35.662637
596 02:29:35.694809 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
597 02:29:35.695255 2D training succeed
598 02:29:35.700365 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 02:29:35.706329 auto size-- 65535DDR cs0 size: 2048MB
600 02:29:35.706734 DDR cs1 size: 2048MB
601 02:29:35.711601 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 02:29:35.711976 cs0 DataBus test pass
603 02:29:35.717259 cs1 DataBus test pass
604 02:29:35.717672 cs0 AddrBus test pass
605 02:29:35.717902 cs1 AddrBus test pass
606 02:29:35.718116
607 02:29:35.722859 100bdlr_step_size ps== 478
608 02:29:35.723269 result report
609 02:29:35.728438 boot times 0Enable ddr reg access
610 02:29:35.733684 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 02:29:35.747395 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 02:29:36.402959 bl2z: ptr: 05129330, size: 00001e40
613 02:29:36.411473 0.0;M3 CHK:0;cm4_sp_mode 0
614 02:29:36.412004 MVN_1=0x00000000
615 02:29:36.412267 MVN_2=0x00000000
616 02:29:36.423086 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 02:29:36.423753 OPS=0x04
618 02:29:36.424330 ring efuse init
619 02:29:36.426060 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 02:29:36.432399 [0.017310 Inits done]
621 02:29:36.432980 secure task start!
622 02:29:36.433453 high task start!
623 02:29:36.433910 low task start!
624 02:29:36.436581 run into bl31
625 02:29:36.445280 NOTICE: BL31: v1.3(release):4fc40b1
626 02:29:36.453061 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 02:29:36.453632 NOTICE: BL31: G12A normal boot!
628 02:29:36.468540 NOTICE: BL31: BL33 decompress pass
629 02:29:36.474146 ERROR: Error initializing runtime service opteed_fast
630 02:29:37.713028 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 02:29:37.713462 bl2_stage_init 0x01
632 02:29:37.713683 bl2_stage_init 0x81
633 02:29:37.720023 hw id: 0x0000 - pwm id 0x01
634 02:29:37.720463 bl2_stage_init 0xc1
635 02:29:37.725427 bl2_stage_init 0x02
636 02:29:37.725852
637 02:29:37.726186 L0:00000000
638 02:29:37.726431 L1:00000703
639 02:29:37.726640 L2:00008067
640 02:29:37.726843 L3:15000000
641 02:29:37.731350 S1:00000000
642 02:29:37.731649 B2:20282000
643 02:29:37.731861 B1:a0f83180
644 02:29:37.732093
645 02:29:37.732301 TE: 68914
646 02:29:37.732502
647 02:29:37.737588 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 02:29:37.737889
649 02:29:37.742781 Board ID = 1
650 02:29:37.743094 Set cpu clk to 24M
651 02:29:37.743305 Set clk81 to 24M
652 02:29:37.747693 Use GP1_pll as DSU clk.
653 02:29:37.748021 DSU clk: 1200 Mhz
654 02:29:37.748229 CPU clk: 1200 MHz
655 02:29:37.752968 Set clk81 to 166.6M
656 02:29:37.758105 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 02:29:37.758399 board id: 1
658 02:29:37.764997 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 02:29:37.775671 fw parse done
660 02:29:37.782886 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 02:29:37.824133 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 02:29:37.835147 PIEI prepare done
663 02:29:37.835479 fastboot data load
664 02:29:37.835690 fastboot data verify
665 02:29:37.840634 verify result: 266
666 02:29:37.846249 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 02:29:37.846539 LPDDR4 probe
668 02:29:37.846743 ddr clk to 1584MHz
669 02:29:37.854259 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 02:29:37.891572
671 02:29:37.891964 dmc_version 0001
672 02:29:37.898135 Check phy result
673 02:29:37.904090 INFO : End of CA training
674 02:29:37.904393 INFO : End of initialization
675 02:29:37.909599 INFO : Training has run successfully!
676 02:29:37.909851 Check phy result
677 02:29:37.915284 INFO : End of initialization
678 02:29:37.915533 INFO : End of read enable training
679 02:29:37.920863 INFO : End of fine write leveling
680 02:29:37.926445 INFO : End of Write leveling coarse delay
681 02:29:37.926707 INFO : Training has run successfully!
682 02:29:37.926912 Check phy result
683 02:29:37.932034 INFO : End of initialization
684 02:29:37.932278 INFO : End of read dq deskew training
685 02:29:37.937684 INFO : End of MPR read delay center optimization
686 02:29:37.943204 INFO : End of write delay center optimization
687 02:29:37.948836 INFO : End of read delay center optimization
688 02:29:37.949086 INFO : End of max read latency training
689 02:29:37.954423 INFO : Training has run successfully!
690 02:29:37.954675 1D training succeed
691 02:29:37.963619 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 02:29:38.011514 Check phy result
693 02:29:38.011863 INFO : End of initialization
694 02:29:38.033625 INFO : End of 2D read delay Voltage center optimization
695 02:29:38.052730 INFO : End of 2D read delay Voltage center optimization
696 02:29:38.104634 INFO : End of 2D write delay Voltage center optimization
697 02:29:38.153998 INFO : End of 2D write delay Voltage center optimization
698 02:29:38.159345 INFO : Training has run successfully!
699 02:29:38.159595
700 02:29:38.159800 channel==0
701 02:29:38.164891 RxClkDly_Margin_A0==88 ps 9
702 02:29:38.165169 TxDqDly_Margin_A0==98 ps 10
703 02:29:38.170558 RxClkDly_Margin_A1==88 ps 9
704 02:29:38.170813 TxDqDly_Margin_A1==98 ps 10
705 02:29:38.171017 TrainedVREFDQ_A0==74
706 02:29:38.176174 TrainedVREFDQ_A1==74
707 02:29:38.176421 VrefDac_Margin_A0==24
708 02:29:38.176622 DeviceVref_Margin_A0==40
709 02:29:38.181881 VrefDac_Margin_A1==23
710 02:29:38.182160 DeviceVref_Margin_A1==40
711 02:29:38.182363
712 02:29:38.182564
713 02:29:38.187341 channel==1
714 02:29:38.187587 RxClkDly_Margin_A0==78 ps 8
715 02:29:38.187791 TxDqDly_Margin_A0==98 ps 10
716 02:29:38.194559 RxClkDly_Margin_A1==78 ps 8
717 02:29:38.194852 TxDqDly_Margin_A1==88 ps 9
718 02:29:38.199974 TrainedVREFDQ_A0==78
719 02:29:38.200280 TrainedVREFDQ_A1==75
720 02:29:38.200486 VrefDac_Margin_A0==22
721 02:29:38.206103 DeviceVref_Margin_A0==36
722 02:29:38.206392 VrefDac_Margin_A1==22
723 02:29:38.211648 DeviceVref_Margin_A1==39
724 02:29:38.211972
725 02:29:38.212211 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 02:29:38.212415
727 02:29:38.243862 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 02:29:38.244278 2D training succeed
729 02:29:38.249030 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 02:29:38.254708 auto size-- 65535DDR cs0 size: 2048MB
731 02:29:38.255033 DDR cs1 size: 2048MB
732 02:29:38.260541 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 02:29:38.260848 cs0 DataBus test pass
734 02:29:38.265977 cs1 DataBus test pass
735 02:29:38.266283 cs0 AddrBus test pass
736 02:29:38.266494 cs1 AddrBus test pass
737 02:29:38.266697
738 02:29:38.272460 100bdlr_step_size ps== 464
739 02:29:38.272778 result report
740 02:29:38.278026 boot times 0Enable ddr reg access
741 02:29:38.282275 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 02:29:38.296238 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 02:29:38.953783 bl2z: ptr: 05129330, size: 00001e40
744 02:29:38.959255 0.0;M3 CHK:0;cm4_sp_mode 0
745 02:29:38.959598 MVN_1=0x00000000
746 02:29:38.959811 MVN_2=0x00000000
747 02:29:38.970633 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 02:29:38.970997 OPS=0x04
749 02:29:38.971208 ring efuse init
750 02:29:38.976311 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 02:29:38.976676 [0.017319 Inits done]
752 02:29:38.976887 secure task start!
753 02:29:38.984199 high task start!
754 02:29:38.984499 low task start!
755 02:29:38.984702 run into bl31
756 02:29:38.992825 NOTICE: BL31: v1.3(release):4fc40b1
757 02:29:39.000556 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 02:29:39.000872 NOTICE: BL31: G12A normal boot!
759 02:29:39.016197 NOTICE: BL31: BL33 decompress pass
760 02:29:39.021977 ERROR: Error initializing runtime service opteed_fast
761 02:29:39.817340
762 02:29:39.817763
763 02:29:39.822712 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 02:29:39.823003
765 02:29:39.826133 Model: Libre Computer AML-S905D3-CC Solitude
766 02:29:39.973229 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 02:29:39.988551 DRAM: 2 GiB (effective 3.8 GiB)
768 02:29:40.089595 Core: 406 devices, 33 uclasses, devicetree: separate
769 02:29:40.095386 WDT: Not starting watchdog@f0d0
770 02:29:40.120553 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 02:29:40.132706 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 02:29:40.137671 ** Bad device specification mmc 0 **
773 02:29:40.147745 Card did not respond to voltage select! : -110
774 02:29:40.155417 ** Bad device specification mmc 0 **
775 02:29:40.155701 Couldn't find partition mmc 0
776 02:29:40.163743 Card did not respond to voltage select! : -110
777 02:29:40.169233 ** Bad device specification mmc 0 **
778 02:29:40.169510 Couldn't find partition mmc 0
779 02:29:40.174316 Error: could not access storage.
780 02:29:40.470715 Net: eth0: ethernet@ff3f0000
781 02:29:40.471117 starting USB...
782 02:29:40.715430 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 02:29:40.715818 Starting the controller
784 02:29:40.722308 USB XHCI 1.10
785 02:29:42.276649 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 02:29:42.284876 scanning usb for storage devices... 0 Storage Device(s) found
788 02:29:42.336163 Hit any key to stop autoboot: 1
789 02:29:42.336994 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 02:29:42.337395 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 02:29:42.337665 Setting prompt string to ['=>']
792 02:29:42.337936 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 02:29:42.350955 0
794 02:29:42.351702 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 02:29:42.452739 => setenv autoload no
797 02:29:42.453513 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 02:29:42.457618 setenv autoload no
800 02:29:42.558754 => setenv initrd_high 0xffffffff
801 02:29:42.559474 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 02:29:42.563525 setenv initrd_high 0xffffffff
804 02:29:42.664508 => setenv fdt_high 0xffffffff
805 02:29:42.664996 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 02:29:42.669260 setenv fdt_high 0xffffffff
808 02:29:42.770278 => dhcp
809 02:29:42.770793 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 02:29:42.774748 dhcp
811 02:29:43.280318 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 02:29:43.280699 Speed: 1000, full duplex
813 02:29:43.280910 BOOTP broadcast 1
814 02:29:43.527924 BOOTP broadcast 2
815 02:29:43.539193 DHCP client bound to address 192.168.6.21 (259 ms)
817 02:29:43.640275 => setenv serverip 192.168.6.2
818 02:29:43.640778 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
819 02:29:43.645110 setenv serverip 192.168.6.2
821 02:29:43.746064 => tftpboot 0x01080000 956175/tftp-deploy-1k9j1ecs/kernel/uImage
822 02:29:43.746541 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
823 02:29:43.753181 tftpboot 0x01080000 956175/tftp-deploy-1k9j1ecs/kernel/uImage
824 02:29:43.753453 Speed: 1000, full duplex
825 02:29:43.753667 Using ethernet@ff3f0000 device
826 02:29:43.758765 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 02:29:43.764247 Filename '956175/tftp-deploy-1k9j1ecs/kernel/uImage'.
828 02:29:43.768061 Load address: 0x1080000
829 02:29:46.586435 Loading: *################################################## 43.7 MiB
830 02:29:46.587058 15.5 MiB/s
831 02:29:46.587465 done
832 02:29:46.590451 Bytes transferred = 45775424 (2ba7a40 hex)
834 02:29:46.691869 => tftpboot 0x08000000 956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot
835 02:29:46.692582 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
836 02:29:46.699429 tftpboot 0x08000000 956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot
837 02:29:46.699890 Speed: 1000, full duplex
838 02:29:46.700322 Using ethernet@ff3f0000 device
839 02:29:46.704868 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 02:29:46.714620 Filename '956175/tftp-deploy-1k9j1ecs/ramdisk/ramdisk.cpio.gz.uboot'.
841 02:29:46.715181 Load address: 0x8000000
842 02:29:48.293287 Loading: *################################################# UDP wrong checksum 00000005 0000ae47
843 02:29:53.294361 T UDP wrong checksum 00000005 0000ae47
844 02:30:03.296029 T T UDP wrong checksum 00000005 0000ae47
845 02:30:13.816317 T T UDP wrong checksum 000000ff 0000b2ad
846 02:30:13.856456 UDP wrong checksum 000000ff 00003ca0
847 02:30:23.297727 T UDP wrong checksum 00000005 0000ae47
848 02:30:43.305336 T T T T
849 02:30:43.306013 Retry count exceeded; starting again
851 02:30:43.307565 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
854 02:30:43.309735 end: 2.4 uboot-commands (duration 00:01:19) [common]
856 02:30:43.311241 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
858 02:30:43.312485 end: 2 uboot-action (duration 00:01:19) [common]
860 02:30:43.314156 Cleaning after the job
861 02:30:43.314744 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/ramdisk
862 02:30:43.316229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/kernel
863 02:30:43.365974 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/dtb
864 02:30:43.366796 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/nfsrootfs
865 02:30:43.683876 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956175/tftp-deploy-1k9j1ecs/modules
866 02:30:43.706862 start: 4.1 power-off (timeout 00:00:30) [common]
867 02:30:43.707555 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
868 02:30:43.741204 >> OK - accepted request
869 02:30:43.743382 Returned 0 in 0 seconds
870 02:30:43.844171 end: 4.1 power-off (duration 00:00:00) [common]
872 02:30:43.845195 start: 4.2 read-feedback (timeout 00:10:00) [common]
873 02:30:43.845841 Listened to connection for namespace 'common' for up to 1s
874 02:30:44.846814 Finalising connection for namespace 'common'
875 02:30:44.847312 Disconnecting from shell: Finalise
876 02:30:44.847611 =>
877 02:30:44.948413 end: 4.2 read-feedback (duration 00:00:01) [common]
878 02:30:44.949110 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956175
879 02:30:47.605374 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956175
880 02:30:47.606004 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.