Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:38:59.122984 lava-dispatcher, installed at version: 2024.01
2 02:38:59.123753 start: 0 validate
3 02:38:59.124251 Start time: 2024-11-06 02:38:59.124223+00:00 (UTC)
4 02:38:59.124776 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:38:59.125305 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:38:59.165441 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:38:59.166016 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:38:59.193411 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:38:59.194164 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:38:59.226231 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:38:59.226819 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:38:59.256721 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:38:59.257219 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:38:59.293644 validate duration: 0.17
16 02:38:59.294514 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:38:59.294860 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:38:59.295192 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:38:59.295785 Not decompressing ramdisk as can be used compressed.
20 02:38:59.296280 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:38:59.296581 saving as /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/ramdisk/initrd.cpio.gz
22 02:38:59.296863 total size: 5628169 (5 MB)
23 02:38:59.330254 progress 0 % (0 MB)
24 02:38:59.334426 progress 5 % (0 MB)
25 02:38:59.338854 progress 10 % (0 MB)
26 02:38:59.342580 progress 15 % (0 MB)
27 02:38:59.346930 progress 20 % (1 MB)
28 02:38:59.350637 progress 25 % (1 MB)
29 02:38:59.354790 progress 30 % (1 MB)
30 02:38:59.358909 progress 35 % (1 MB)
31 02:38:59.362741 progress 40 % (2 MB)
32 02:38:59.366726 progress 45 % (2 MB)
33 02:38:59.370498 progress 50 % (2 MB)
34 02:38:59.374497 progress 55 % (2 MB)
35 02:38:59.378456 progress 60 % (3 MB)
36 02:38:59.382174 progress 65 % (3 MB)
37 02:38:59.386246 progress 70 % (3 MB)
38 02:38:59.390236 progress 75 % (4 MB)
39 02:38:59.394501 progress 80 % (4 MB)
40 02:38:59.398251 progress 85 % (4 MB)
41 02:38:59.402573 progress 90 % (4 MB)
42 02:38:59.406360 progress 95 % (5 MB)
43 02:38:59.409738 progress 100 % (5 MB)
44 02:38:59.410422 5 MB downloaded in 0.11 s (47.27 MB/s)
45 02:38:59.410987 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:38:59.411943 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:38:59.412308 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:38:59.412608 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:38:59.413098 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/kernel/Image
51 02:38:59.413371 saving as /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/kernel/Image
52 02:38:59.413596 total size: 45779456 (43 MB)
53 02:38:59.413821 No compression specified
54 02:38:59.450999 progress 0 % (0 MB)
55 02:38:59.479450 progress 5 % (2 MB)
56 02:38:59.508234 progress 10 % (4 MB)
57 02:38:59.536612 progress 15 % (6 MB)
58 02:38:59.565210 progress 20 % (8 MB)
59 02:38:59.594417 progress 25 % (10 MB)
60 02:38:59.623079 progress 30 % (13 MB)
61 02:38:59.651278 progress 35 % (15 MB)
62 02:38:59.680296 progress 40 % (17 MB)
63 02:38:59.708605 progress 45 % (19 MB)
64 02:38:59.738136 progress 50 % (21 MB)
65 02:38:59.767202 progress 55 % (24 MB)
66 02:38:59.795913 progress 60 % (26 MB)
67 02:38:59.824661 progress 65 % (28 MB)
68 02:38:59.852982 progress 70 % (30 MB)
69 02:38:59.881406 progress 75 % (32 MB)
70 02:38:59.910464 progress 80 % (34 MB)
71 02:38:59.939728 progress 85 % (37 MB)
72 02:38:59.968384 progress 90 % (39 MB)
73 02:38:59.996897 progress 95 % (41 MB)
74 02:39:00.025019 progress 100 % (43 MB)
75 02:39:00.025549 43 MB downloaded in 0.61 s (71.34 MB/s)
76 02:39:00.026040 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:39:00.026873 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:39:00.027152 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:39:00.027419 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:39:00.027891 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:39:00.028202 saving as /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:39:00.028418 total size: 54703 (0 MB)
84 02:39:00.028629 No compression specified
85 02:39:00.064055 progress 59 % (0 MB)
86 02:39:00.064894 progress 100 % (0 MB)
87 02:39:00.065452 0 MB downloaded in 0.04 s (1.41 MB/s)
88 02:39:00.065923 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:39:00.066747 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:39:00.067014 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:39:00.067280 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:39:00.067733 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:39:00.068003 saving as /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/nfsrootfs/full.rootfs.tar
95 02:39:00.068216 total size: 120894716 (115 MB)
96 02:39:00.068428 Using unxz to decompress xz
97 02:39:00.103626 progress 0 % (0 MB)
98 02:39:00.894771 progress 5 % (5 MB)
99 02:39:01.723792 progress 10 % (11 MB)
100 02:39:02.516790 progress 15 % (17 MB)
101 02:39:03.283328 progress 20 % (23 MB)
102 02:39:03.875640 progress 25 % (28 MB)
103 02:39:04.695389 progress 30 % (34 MB)
104 02:39:05.480448 progress 35 % (40 MB)
105 02:39:05.823368 progress 40 % (46 MB)
106 02:39:06.193182 progress 45 % (51 MB)
107 02:39:06.905914 progress 50 % (57 MB)
108 02:39:07.789571 progress 55 % (63 MB)
109 02:39:08.572416 progress 60 % (69 MB)
110 02:39:09.330192 progress 65 % (74 MB)
111 02:39:10.109956 progress 70 % (80 MB)
112 02:39:10.930481 progress 75 % (86 MB)
113 02:39:11.725018 progress 80 % (92 MB)
114 02:39:12.485059 progress 85 % (98 MB)
115 02:39:13.341304 progress 90 % (103 MB)
116 02:39:14.119686 progress 95 % (109 MB)
117 02:39:14.947336 progress 100 % (115 MB)
118 02:39:14.960264 115 MB downloaded in 14.89 s (7.74 MB/s)
119 02:39:14.961014 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:39:14.962813 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:39:14.963398 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:39:14.963974 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:39:14.965036 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/modules.tar.xz
125 02:39:14.965530 saving as /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/modules/modules.tar
126 02:39:14.965956 total size: 11613264 (11 MB)
127 02:39:14.966385 Using unxz to decompress xz
128 02:39:15.007745 progress 0 % (0 MB)
129 02:39:15.073603 progress 5 % (0 MB)
130 02:39:15.147002 progress 10 % (1 MB)
131 02:39:15.242011 progress 15 % (1 MB)
132 02:39:15.333111 progress 20 % (2 MB)
133 02:39:15.411976 progress 25 % (2 MB)
134 02:39:15.486857 progress 30 % (3 MB)
135 02:39:15.564884 progress 35 % (3 MB)
136 02:39:15.637644 progress 40 % (4 MB)
137 02:39:15.713638 progress 45 % (5 MB)
138 02:39:15.797107 progress 50 % (5 MB)
139 02:39:15.873666 progress 55 % (6 MB)
140 02:39:15.958097 progress 60 % (6 MB)
141 02:39:16.037892 progress 65 % (7 MB)
142 02:39:16.117397 progress 70 % (7 MB)
143 02:39:16.195345 progress 75 % (8 MB)
144 02:39:16.278004 progress 80 % (8 MB)
145 02:39:16.357192 progress 85 % (9 MB)
146 02:39:16.435042 progress 90 % (9 MB)
147 02:39:16.511909 progress 95 % (10 MB)
148 02:39:16.588339 progress 100 % (11 MB)
149 02:39:16.600159 11 MB downloaded in 1.63 s (6.78 MB/s)
150 02:39:16.601121 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:39:16.602723 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:39:16.603247 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 02:39:16.603764 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 02:39:33.241947 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/943510/extract-nfsrootfs-lvk7f_df
156 02:39:33.242670 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 02:39:33.243027 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 02:39:33.243820 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0
159 02:39:33.244390 makedir: /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin
160 02:39:33.244798 makedir: /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/tests
161 02:39:33.245204 makedir: /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/results
162 02:39:33.245597 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-add-keys
163 02:39:33.246204 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-add-sources
164 02:39:33.246721 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-background-process-start
165 02:39:33.247219 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-background-process-stop
166 02:39:33.247741 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-common-functions
167 02:39:33.248374 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-echo-ipv4
168 02:39:33.248890 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-install-packages
169 02:39:33.249369 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-installed-packages
170 02:39:33.249875 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-os-build
171 02:39:33.250356 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-probe-channel
172 02:39:33.250833 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-probe-ip
173 02:39:33.251306 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-target-ip
174 02:39:33.251779 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-target-mac
175 02:39:33.252305 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-target-storage
176 02:39:33.252809 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-case
177 02:39:33.253354 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-event
178 02:39:33.253969 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-feedback
179 02:39:33.254466 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-raise
180 02:39:33.254946 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-reference
181 02:39:33.255421 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-runner
182 02:39:33.255898 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-set
183 02:39:33.256408 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-test-shell
184 02:39:33.256900 Updating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-add-keys (debian)
185 02:39:33.257438 Updating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-add-sources (debian)
186 02:39:33.257962 Updating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-install-packages (debian)
187 02:39:33.258465 Updating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-installed-packages (debian)
188 02:39:33.258960 Updating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/bin/lava-os-build (debian)
189 02:39:33.259522 Creating /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/environment
190 02:39:33.259904 LAVA metadata
191 02:39:33.260193 - LAVA_JOB_ID=943510
192 02:39:33.260410 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:39:33.260775 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 02:39:33.261732 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:39:33.262040 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 02:39:33.262247 skipped lava-vland-overlay
197 02:39:33.262490 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:39:33.262742 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 02:39:33.262957 skipped lava-multinode-overlay
200 02:39:33.263200 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:39:33.263449 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 02:39:33.263691 Loading test definitions
203 02:39:33.263965 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 02:39:33.264221 Using /lava-943510 at stage 0
205 02:39:33.265468 uuid=943510_1.6.2.4.1 testdef=None
206 02:39:33.265781 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:39:33.266045 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 02:39:33.267590 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:39:33.268437 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 02:39:33.270445 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:39:33.271274 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 02:39:33.273132 runner path: /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/0/tests/0_timesync-off test_uuid 943510_1.6.2.4.1
215 02:39:33.273671 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:39:33.274483 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 02:39:33.274724 Using /lava-943510 at stage 0
219 02:39:33.275078 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:39:33.275364 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/0/tests/1_kselftest-dt'
221 02:39:36.575215 Running '/usr/bin/git checkout kernelci.org
222 02:39:37.018443 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 02:39:37.019824 uuid=943510_1.6.2.4.5 testdef=None
224 02:39:37.020189 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:39:37.020935 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 02:39:37.023684 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:39:37.024522 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 02:39:37.028214 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:39:37.029067 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 02:39:37.032627 runner path: /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/0/tests/1_kselftest-dt test_uuid 943510_1.6.2.4.5
234 02:39:37.032916 BOARD='meson-g12b-a311d-libretech-cc'
235 02:39:37.033124 BRANCH='clk'
236 02:39:37.033322 SKIPFILE='/dev/null'
237 02:39:37.033520 SKIP_INSTALL='True'
238 02:39:37.033716 TESTPROG_URL='http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:39:37.033915 TST_CASENAME=''
240 02:39:37.034111 TST_CMDFILES='dt'
241 02:39:37.034637 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:39:37.035422 Creating lava-test-runner.conf files
244 02:39:37.035626 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/943510/lava-overlay-e_hvg7w0/lava-943510/0 for stage 0
245 02:39:37.035970 - 0_timesync-off
246 02:39:37.036230 - 1_kselftest-dt
247 02:39:37.036561 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:39:37.036843 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 02:40:00.085591 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 02:40:00.086119 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 02:40:00.086505 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:40:00.086866 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 02:40:00.087258 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 02:40:00.722454 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:40:00.722938 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 02:40:00.723210 extracting modules file /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943510/extract-nfsrootfs-lvk7f_df
257 02:40:02.091899 extracting modules file /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943510/extract-overlay-ramdisk-4bs3m2cb/ramdisk
258 02:40:03.646843 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:40:03.647334 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 02:40:03.647631 [common] Applying overlay to NFS
261 02:40:03.647859 [common] Applying overlay /var/lib/lava/dispatcher/tmp/943510/compress-overlay-1hh7sh77/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/943510/extract-nfsrootfs-lvk7f_df
262 02:40:06.362211 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:40:06.362724 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 02:40:06.363042 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 02:40:06.363321 Converting downloaded kernel to a uImage
266 02:40:06.363675 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/kernel/Image /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/kernel/uImage
267 02:40:06.864733 output: Image Name:
268 02:40:06.865176 output: Created: Wed Nov 6 02:40:06 2024
269 02:40:06.865408 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:40:06.865628 output: Data Size: 45779456 Bytes = 44706.50 KiB = 43.66 MiB
271 02:40:06.865839 output: Load Address: 01080000
272 02:40:06.866052 output: Entry Point: 01080000
273 02:40:06.866261 output:
274 02:40:06.866614 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 02:40:06.866907 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 02:40:06.867195 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 02:40:06.867465 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:40:06.867744 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 02:40:06.868054 Building ramdisk /var/lib/lava/dispatcher/tmp/943510/extract-overlay-ramdisk-4bs3m2cb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/943510/extract-overlay-ramdisk-4bs3m2cb/ramdisk
280 02:40:09.030494 >> 166772 blocks
281 02:40:16.723228 Adding RAMdisk u-boot header.
282 02:40:16.723941 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/943510/extract-overlay-ramdisk-4bs3m2cb/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/943510/extract-overlay-ramdisk-4bs3m2cb/ramdisk.cpio.gz.uboot
283 02:40:17.019790 output: Image Name:
284 02:40:17.020374 output: Created: Wed Nov 6 02:40:16 2024
285 02:40:17.020798 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:40:17.021207 output: Data Size: 23427265 Bytes = 22878.19 KiB = 22.34 MiB
287 02:40:17.021610 output: Load Address: 00000000
288 02:40:17.022009 output: Entry Point: 00000000
289 02:40:17.022407 output:
290 02:40:17.023389 rename /var/lib/lava/dispatcher/tmp/943510/extract-overlay-ramdisk-4bs3m2cb/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot
291 02:40:17.024126 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:40:17.024682 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 02:40:17.025213 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 02:40:17.025670 No LXC device requested
295 02:40:17.026169 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:40:17.026679 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 02:40:17.027173 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:40:17.027588 Checking files for TFTP limit of 4294967296 bytes.
299 02:40:17.030260 end: 1 tftp-deploy (duration 00:01:18) [common]
300 02:40:17.030830 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:40:17.031351 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:40:17.031847 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:40:17.032384 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:40:17.032909 Using kernel file from prepare-kernel: 943510/tftp-deploy-y3cp0lvz/kernel/uImage
305 02:40:17.033529 substitutions:
306 02:40:17.033934 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:40:17.034335 - {DTB_ADDR}: 0x01070000
308 02:40:17.034734 - {DTB}: 943510/tftp-deploy-y3cp0lvz/dtb/meson-g12b-a311d-libretech-cc.dtb
309 02:40:17.035131 - {INITRD}: 943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot
310 02:40:17.035527 - {KERNEL_ADDR}: 0x01080000
311 02:40:17.035917 - {KERNEL}: 943510/tftp-deploy-y3cp0lvz/kernel/uImage
312 02:40:17.036344 - {LAVA_MAC}: None
313 02:40:17.036772 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/943510/extract-nfsrootfs-lvk7f_df
314 02:40:17.037168 - {NFS_SERVER_IP}: 192.168.6.2
315 02:40:17.037556 - {PRESEED_CONFIG}: None
316 02:40:17.037949 - {PRESEED_LOCAL}: None
317 02:40:17.038338 - {RAMDISK_ADDR}: 0x08000000
318 02:40:17.038725 - {RAMDISK}: 943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot
319 02:40:17.039120 - {ROOT_PART}: None
320 02:40:17.039508 - {ROOT}: None
321 02:40:17.039895 - {SERVER_IP}: 192.168.6.2
322 02:40:17.040349 - {TEE_ADDR}: 0x83000000
323 02:40:17.040744 - {TEE}: None
324 02:40:17.041134 Parsed boot commands:
325 02:40:17.041511 - setenv autoload no
326 02:40:17.041894 - setenv initrd_high 0xffffffff
327 02:40:17.042276 - setenv fdt_high 0xffffffff
328 02:40:17.042659 - dhcp
329 02:40:17.043041 - setenv serverip 192.168.6.2
330 02:40:17.043429 - tftpboot 0x01080000 943510/tftp-deploy-y3cp0lvz/kernel/uImage
331 02:40:17.043817 - tftpboot 0x08000000 943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot
332 02:40:17.044240 - tftpboot 0x01070000 943510/tftp-deploy-y3cp0lvz/dtb/meson-g12b-a311d-libretech-cc.dtb
333 02:40:17.044633 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/943510/extract-nfsrootfs-lvk7f_df,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:40:17.045033 - bootm 0x01080000 0x08000000 0x01070000
335 02:40:17.045527 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:40:17.047003 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:40:17.047421 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 02:40:17.062370 Setting prompt string to ['lava-test: # ']
340 02:40:17.063855 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:40:17.064506 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:40:17.065068 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:40:17.065598 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:40:17.066736 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 02:40:17.105679 >> OK - accepted request
346 02:40:17.107963 Returned 0 in 0 seconds
347 02:40:17.209125 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:40:17.210670 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:40:17.211213 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:40:17.211713 Setting prompt string to ['Hit any key to stop autoboot']
352 02:40:17.212214 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:40:17.213766 Trying 192.168.56.21...
354 02:40:17.214233 Connected to conserv1.
355 02:40:17.214633 Escape character is '^]'.
356 02:40:17.215031
357 02:40:17.215442 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 02:40:17.215862
359 02:40:29.045620 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 02:40:29.046213 bl2_stage_init 0x01
361 02:40:29.046631 bl2_stage_init 0x81
362 02:40:29.051044 hw id: 0x0000 - pwm id 0x01
363 02:40:29.051487 bl2_stage_init 0xc1
364 02:40:29.051896 bl2_stage_init 0x02
365 02:40:29.052342
366 02:40:29.056802 L0:00000000
367 02:40:29.057242 L1:20000703
368 02:40:29.057643 L2:00008067
369 02:40:29.058036 L3:14000000
370 02:40:29.062281 B2:00402000
371 02:40:29.062726 B1:e0f83180
372 02:40:29.063133
373 02:40:29.063531 TE: 58159
374 02:40:29.063917
375 02:40:29.067861 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 02:40:29.068315
377 02:40:29.068706 Board ID = 1
378 02:40:29.073509 Set A53 clk to 24M
379 02:40:29.073926 Set A73 clk to 24M
380 02:40:29.074314 Set clk81 to 24M
381 02:40:29.079096 A53 clk: 1200 MHz
382 02:40:29.079512 A73 clk: 1200 MHz
383 02:40:29.079893 CLK81: 166.6M
384 02:40:29.080310 smccc: 00012ab5
385 02:40:29.084793 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 02:40:29.090170 board id: 1
387 02:40:29.096064 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 02:40:29.106705 fw parse done
389 02:40:29.112731 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:40:29.155346 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 02:40:29.166247 PIEI prepare done
392 02:40:29.166713 fastboot data load
393 02:40:29.167106 fastboot data verify
394 02:40:29.171908 verify result: 266
395 02:40:29.177484 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 02:40:29.177929 LPDDR4 probe
397 02:40:29.178322 ddr clk to 1584MHz
398 02:40:29.185482 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 02:40:29.222857
400 02:40:29.223325 dmc_version 0001
401 02:40:29.229415 Check phy result
402 02:40:29.235329 INFO : End of CA training
403 02:40:29.235761 INFO : End of initialization
404 02:40:29.240935 INFO : Training has run successfully!
405 02:40:29.241358 Check phy result
406 02:40:29.246487 INFO : End of initialization
407 02:40:29.246903 INFO : End of read enable training
408 02:40:29.249784 INFO : End of fine write leveling
409 02:40:29.255343 INFO : End of Write leveling coarse delay
410 02:40:29.260932 INFO : Training has run successfully!
411 02:40:29.261358 Check phy result
412 02:40:29.261752 INFO : End of initialization
413 02:40:29.266559 INFO : End of read dq deskew training
414 02:40:29.272175 INFO : End of MPR read delay center optimization
415 02:40:29.272607 INFO : End of write delay center optimization
416 02:40:29.277766 INFO : End of read delay center optimization
417 02:40:29.283321 INFO : End of max read latency training
418 02:40:29.283755 INFO : Training has run successfully!
419 02:40:29.288898 1D training succeed
420 02:40:29.294883 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 02:40:29.342445 Check phy result
422 02:40:29.342886 INFO : End of initialization
423 02:40:29.364221 INFO : End of 2D read delay Voltage center optimization
424 02:40:29.384453 INFO : End of 2D read delay Voltage center optimization
425 02:40:29.436567 INFO : End of 2D write delay Voltage center optimization
426 02:40:29.485842 INFO : End of 2D write delay Voltage center optimization
427 02:40:29.491522 INFO : Training has run successfully!
428 02:40:29.491970
429 02:40:29.492432 channel==0
430 02:40:29.497086 RxClkDly_Margin_A0==88 ps 9
431 02:40:29.497517 TxDqDly_Margin_A0==98 ps 10
432 02:40:29.502693 RxClkDly_Margin_A1==88 ps 9
433 02:40:29.503110 TxDqDly_Margin_A1==98 ps 10
434 02:40:29.503504 TrainedVREFDQ_A0==74
435 02:40:29.508298 TrainedVREFDQ_A1==74
436 02:40:29.508722 VrefDac_Margin_A0==25
437 02:40:29.509116 DeviceVref_Margin_A0==40
438 02:40:29.513903 VrefDac_Margin_A1==25
439 02:40:29.514324 DeviceVref_Margin_A1==40
440 02:40:29.514715
441 02:40:29.515103
442 02:40:29.519507 channel==1
443 02:40:29.519923 RxClkDly_Margin_A0==98 ps 10
444 02:40:29.520348 TxDqDly_Margin_A0==88 ps 9
445 02:40:29.525060 RxClkDly_Margin_A1==98 ps 10
446 02:40:29.525480 TxDqDly_Margin_A1==88 ps 9
447 02:40:29.530781 TrainedVREFDQ_A0==76
448 02:40:29.531201 TrainedVREFDQ_A1==77
449 02:40:29.531593 VrefDac_Margin_A0==22
450 02:40:29.536265 DeviceVref_Margin_A0==38
451 02:40:29.536689 VrefDac_Margin_A1==22
452 02:40:29.541815 DeviceVref_Margin_A1==37
453 02:40:29.542238
454 02:40:29.542633 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 02:40:29.543023
456 02:40:29.575398 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 02:40:29.575907 2D training succeed
458 02:40:29.581001 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 02:40:29.586626 auto size-- 65535DDR cs0 size: 2048MB
460 02:40:29.587054 DDR cs1 size: 2048MB
461 02:40:29.592214 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 02:40:29.592637 cs0 DataBus test pass
463 02:40:29.597796 cs1 DataBus test pass
464 02:40:29.598211 cs0 AddrBus test pass
465 02:40:29.598603 cs1 AddrBus test pass
466 02:40:29.598993
467 02:40:29.603400 100bdlr_step_size ps== 420
468 02:40:29.603830 result report
469 02:40:29.609030 boot times 0Enable ddr reg access
470 02:40:29.614357 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 02:40:29.627928 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 02:40:30.201616 0.0;M3 CHK:0;cm4_sp_mode 0
473 02:40:30.202181 MVN_1=0x00000000
474 02:40:30.206912 MVN_2=0x00000000
475 02:40:30.212871 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 02:40:30.213309 OPS=0x10
477 02:40:30.213703 ring efuse init
478 02:40:30.214089 chipver efuse init
479 02:40:30.221053 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 02:40:30.221485 [0.018961 Inits done]
481 02:40:30.221878 secure task start!
482 02:40:30.228594 high task start!
483 02:40:30.229015 low task start!
484 02:40:30.229406 run into bl31
485 02:40:30.235218 NOTICE: BL31: v1.3(release):4fc40b1
486 02:40:30.243005 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 02:40:30.243424 NOTICE: BL31: G12A normal boot!
488 02:40:30.268282 NOTICE: BL31: BL33 decompress pass
489 02:40:30.274035 ERROR: Error initializing runtime service opteed_fast
490 02:40:31.506926
491 02:40:31.507473
492 02:40:31.515381 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 02:40:31.515828
494 02:40:31.516312 Model: Libre Computer AML-A311D-CC Alta
495 02:40:31.723757 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 02:40:31.747120 DRAM: 2 GiB (effective 3.8 GiB)
497 02:40:31.890256 Core: 408 devices, 31 uclasses, devicetree: separate
498 02:40:31.896052 WDT: Not starting watchdog@f0d0
499 02:40:31.928188 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 02:40:31.940697 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 02:40:31.945649 ** Bad device specification mmc 0 **
502 02:40:31.956050 Card did not respond to voltage select! : -110
503 02:40:31.963621 ** Bad device specification mmc 0 **
504 02:40:31.964076 Couldn't find partition mmc 0
505 02:40:31.972022 Card did not respond to voltage select! : -110
506 02:40:31.977473 ** Bad device specification mmc 0 **
507 02:40:31.977903 Couldn't find partition mmc 0
508 02:40:31.982583 Error: could not access storage.
509 02:40:33.245957 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 02:40:33.246485 bl2_stage_init 0x01
511 02:40:33.246908 bl2_stage_init 0x81
512 02:40:33.251593 hw id: 0x0000 - pwm id 0x01
513 02:40:33.252058 bl2_stage_init 0xc1
514 02:40:33.252472 bl2_stage_init 0x02
515 02:40:33.252871
516 02:40:33.257229 L0:00000000
517 02:40:33.257653 L1:20000703
518 02:40:33.258054 L2:00008067
519 02:40:33.258450 L3:14000000
520 02:40:33.262693 B2:00402000
521 02:40:33.263124 B1:e0f83180
522 02:40:33.263528
523 02:40:33.263929 TE: 58124
524 02:40:33.264369
525 02:40:33.268290 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 02:40:33.268723
527 02:40:33.269127 Board ID = 1
528 02:40:33.273951 Set A53 clk to 24M
529 02:40:33.274378 Set A73 clk to 24M
530 02:40:33.274778 Set clk81 to 24M
531 02:40:33.279575 A53 clk: 1200 MHz
532 02:40:33.280022 A73 clk: 1200 MHz
533 02:40:33.280427 CLK81: 166.6M
534 02:40:33.280818 smccc: 00012a92
535 02:40:33.285101 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 02:40:33.290746 board id: 1
537 02:40:33.296689 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 02:40:33.307293 fw parse done
539 02:40:33.313343 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 02:40:33.355739 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 02:40:33.366622 PIEI prepare done
542 02:40:33.367050 fastboot data load
543 02:40:33.367458 fastboot data verify
544 02:40:33.372308 verify result: 266
545 02:40:33.377897 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 02:40:33.378323 LPDDR4 probe
547 02:40:33.378723 ddr clk to 1584MHz
548 02:40:33.385863 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 02:40:33.423112
550 02:40:33.423551 dmc_version 0001
551 02:40:33.429799 Check phy result
552 02:40:33.435680 INFO : End of CA training
553 02:40:33.436129 INFO : End of initialization
554 02:40:33.441295 INFO : Training has run successfully!
555 02:40:33.441721 Check phy result
556 02:40:33.446885 INFO : End of initialization
557 02:40:33.447308 INFO : End of read enable training
558 02:40:33.452486 INFO : End of fine write leveling
559 02:40:33.458122 INFO : End of Write leveling coarse delay
560 02:40:33.458544 INFO : Training has run successfully!
561 02:40:33.458943 Check phy result
562 02:40:33.463651 INFO : End of initialization
563 02:40:33.464117 INFO : End of read dq deskew training
564 02:40:33.469305 INFO : End of MPR read delay center optimization
565 02:40:33.474879 INFO : End of write delay center optimization
566 02:40:33.480482 INFO : End of read delay center optimization
567 02:40:33.480906 INFO : End of max read latency training
568 02:40:33.486132 INFO : Training has run successfully!
569 02:40:33.486553 1D training succeed
570 02:40:33.495344 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 02:40:33.542837 Check phy result
572 02:40:33.543272 INFO : End of initialization
573 02:40:33.564607 INFO : End of 2D read delay Voltage center optimization
574 02:40:33.584839 INFO : End of 2D read delay Voltage center optimization
575 02:40:33.636897 INFO : End of 2D write delay Voltage center optimization
576 02:40:33.686323 INFO : End of 2D write delay Voltage center optimization
577 02:40:33.691824 INFO : Training has run successfully!
578 02:40:33.692294
579 02:40:33.692702 channel==0
580 02:40:33.697428 RxClkDly_Margin_A0==88 ps 9
581 02:40:33.697853 TxDqDly_Margin_A0==98 ps 10
582 02:40:33.703039 RxClkDly_Margin_A1==88 ps 9
583 02:40:33.703463 TxDqDly_Margin_A1==88 ps 9
584 02:40:33.703864 TrainedVREFDQ_A0==74
585 02:40:33.708620 TrainedVREFDQ_A1==74
586 02:40:33.709053 VrefDac_Margin_A0==25
587 02:40:33.709452 DeviceVref_Margin_A0==40
588 02:40:33.714318 VrefDac_Margin_A1==24
589 02:40:33.714738 DeviceVref_Margin_A1==40
590 02:40:33.715136
591 02:40:33.715534
592 02:40:33.715931 channel==1
593 02:40:33.719822 RxClkDly_Margin_A0==98 ps 10
594 02:40:33.720282 TxDqDly_Margin_A0==98 ps 10
595 02:40:33.725427 RxClkDly_Margin_A1==98 ps 10
596 02:40:33.725858 TxDqDly_Margin_A1==88 ps 9
597 02:40:33.731032 TrainedVREFDQ_A0==77
598 02:40:33.731459 TrainedVREFDQ_A1==77
599 02:40:33.731858 VrefDac_Margin_A0==22
600 02:40:33.736617 DeviceVref_Margin_A0==37
601 02:40:33.737040 VrefDac_Margin_A1==24
602 02:40:33.742302 DeviceVref_Margin_A1==37
603 02:40:33.742727
604 02:40:33.743127 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 02:40:33.743524
606 02:40:33.775806 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 02:40:33.776295 2D training succeed
608 02:40:33.781404 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 02:40:33.787024 auto size-- 65535DDR cs0 size: 2048MB
610 02:40:33.787455 DDR cs1 size: 2048MB
611 02:40:33.792620 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 02:40:33.793049 cs0 DataBus test pass
613 02:40:33.798304 cs1 DataBus test pass
614 02:40:33.798732 cs0 AddrBus test pass
615 02:40:33.799133 cs1 AddrBus test pass
616 02:40:33.799526
617 02:40:33.803813 100bdlr_step_size ps== 420
618 02:40:33.804291 result report
619 02:40:33.809432 boot times 0Enable ddr reg access
620 02:40:33.814772 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 02:40:33.828373 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 02:40:34.401894 0.0;M3 CHK:0;cm4_sp_mode 0
623 02:40:34.402423 MVN_1=0x00000000
624 02:40:34.407406 MVN_2=0x00000000
625 02:40:34.413204 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 02:40:34.413665 OPS=0x10
627 02:40:34.414080 ring efuse init
628 02:40:34.414481 chipver efuse init
629 02:40:34.418806 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 02:40:34.424367 [0.018961 Inits done]
631 02:40:34.424789 secure task start!
632 02:40:34.425174 high task start!
633 02:40:34.428950 low task start!
634 02:40:34.429371 run into bl31
635 02:40:34.435603 NOTICE: BL31: v1.3(release):4fc40b1
636 02:40:34.443431 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 02:40:34.443863 NOTICE: BL31: G12A normal boot!
638 02:40:34.469323 NOTICE: BL31: BL33 decompress pass
639 02:40:34.474952 ERROR: Error initializing runtime service opteed_fast
640 02:40:35.707927
641 02:40:35.708562
642 02:40:35.716244 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 02:40:35.716693
644 02:40:35.717115 Model: Libre Computer AML-A311D-CC Alta
645 02:40:35.924650 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 02:40:35.947174 DRAM: 2 GiB (effective 3.8 GiB)
647 02:40:36.091103 Core: 408 devices, 31 uclasses, devicetree: separate
648 02:40:36.096071 WDT: Not starting watchdog@f0d0
649 02:40:36.129256 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 02:40:36.141819 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 02:40:36.145841 ** Bad device specification mmc 0 **
652 02:40:36.157039 Card did not respond to voltage select! : -110
653 02:40:36.163774 ** Bad device specification mmc 0 **
654 02:40:36.164247 Couldn't find partition mmc 0
655 02:40:36.173099 Card did not respond to voltage select! : -110
656 02:40:36.178627 ** Bad device specification mmc 0 **
657 02:40:36.179211 Couldn't find partition mmc 0
658 02:40:36.182754 Error: could not access storage.
659 02:40:36.526188 Net: eth0: ethernet@ff3f0000
660 02:40:36.526786 starting USB...
661 02:40:36.778908 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 02:40:36.779512 Starting the controller
663 02:40:36.785847 USB XHCI 1.10
664 02:40:38.496177 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 02:40:38.496951 bl2_stage_init 0x01
666 02:40:38.497519 bl2_stage_init 0x81
667 02:40:38.501668 hw id: 0x0000 - pwm id 0x01
668 02:40:38.502260 bl2_stage_init 0xc1
669 02:40:38.502803 bl2_stage_init 0x02
670 02:40:38.503326
671 02:40:38.507319 L0:00000000
672 02:40:38.507884 L1:20000703
673 02:40:38.508478 L2:00008067
674 02:40:38.509002 L3:14000000
675 02:40:38.510125 B2:00402000
676 02:40:38.510673 B1:e0f83180
677 02:40:38.511193
678 02:40:38.511710 TE: 58167
679 02:40:38.512284
680 02:40:38.521426 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 02:40:38.522090
682 02:40:38.522643 Board ID = 1
683 02:40:38.523175 Set A53 clk to 24M
684 02:40:38.523693 Set A73 clk to 24M
685 02:40:38.526990 Set clk81 to 24M
686 02:40:38.527560 A53 clk: 1200 MHz
687 02:40:38.528123 A73 clk: 1200 MHz
688 02:40:38.530319 CLK81: 166.6M
689 02:40:38.530877 smccc: 00012abe
690 02:40:38.536025 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 02:40:38.541566 board id: 1
692 02:40:38.545969 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 02:40:38.557343 fw parse done
694 02:40:38.563371 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 02:40:38.605976 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 02:40:38.617073 PIEI prepare done
697 02:40:38.617663 fastboot data load
698 02:40:38.618204 fastboot data verify
699 02:40:38.622511 verify result: 266
700 02:40:38.628100 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 02:40:38.628689 LPDDR4 probe
702 02:40:38.629222 ddr clk to 1584MHz
703 02:40:38.636251 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 02:40:38.672513
705 02:40:38.673121 dmc_version 0001
706 02:40:38.679150 Check phy result
707 02:40:38.685976 INFO : End of CA training
708 02:40:38.686536 INFO : End of initialization
709 02:40:38.691466 INFO : Training has run successfully!
710 02:40:38.692056 Check phy result
711 02:40:38.697071 INFO : End of initialization
712 02:40:38.697637 INFO : End of read enable training
713 02:40:38.702771 INFO : End of fine write leveling
714 02:40:38.708276 INFO : End of Write leveling coarse delay
715 02:40:38.708846 INFO : Training has run successfully!
716 02:40:38.709378 Check phy result
717 02:40:38.714003 INFO : End of initialization
718 02:40:38.714567 INFO : End of read dq deskew training
719 02:40:38.719484 INFO : End of MPR read delay center optimization
720 02:40:38.725047 INFO : End of write delay center optimization
721 02:40:38.730644 INFO : End of read delay center optimization
722 02:40:38.731216 INFO : End of max read latency training
723 02:40:38.736271 INFO : Training has run successfully!
724 02:40:38.736841 1D training succeed
725 02:40:38.744535 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 02:40:38.793242 Check phy result
727 02:40:38.793892 INFO : End of initialization
728 02:40:38.814782 INFO : End of 2D read delay Voltage center optimization
729 02:40:38.836044 INFO : End of 2D read delay Voltage center optimization
730 02:40:38.888056 INFO : End of 2D write delay Voltage center optimization
731 02:40:38.937437 INFO : End of 2D write delay Voltage center optimization
732 02:40:38.942971 INFO : Training has run successfully!
733 02:40:38.943536
734 02:40:38.944112 channel==0
735 02:40:38.948486 RxClkDly_Margin_A0==88 ps 9
736 02:40:38.949045 TxDqDly_Margin_A0==98 ps 10
737 02:40:38.954062 RxClkDly_Margin_A1==88 ps 9
738 02:40:38.954612 TxDqDly_Margin_A1==98 ps 10
739 02:40:38.955147 TrainedVREFDQ_A0==74
740 02:40:38.959659 TrainedVREFDQ_A1==74
741 02:40:38.960253 VrefDac_Margin_A0==24
742 02:40:38.960783 DeviceVref_Margin_A0==40
743 02:40:38.965340 VrefDac_Margin_A1==25
744 02:40:38.965899 DeviceVref_Margin_A1==40
745 02:40:38.966431
746 02:40:38.966943
747 02:40:38.970987 channel==1
748 02:40:38.971539 RxClkDly_Margin_A0==98 ps 10
749 02:40:38.972103 TxDqDly_Margin_A0==88 ps 9
750 02:40:38.976481 RxClkDly_Margin_A1==88 ps 9
751 02:40:38.977035 TxDqDly_Margin_A1==88 ps 9
752 02:40:38.982175 TrainedVREFDQ_A0==76
753 02:40:38.982736 TrainedVREFDQ_A1==77
754 02:40:38.983270 VrefDac_Margin_A0==22
755 02:40:38.987761 DeviceVref_Margin_A0==38
756 02:40:38.988344 VrefDac_Margin_A1==24
757 02:40:38.993280 DeviceVref_Margin_A1==37
758 02:40:38.993833
759 02:40:38.994372 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 02:40:38.994890
761 02:40:39.026913 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 02:40:39.027548 2D training succeed
763 02:40:39.032494 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 02:40:39.038108 auto size-- 65535DDR cs0 size: 2048MB
765 02:40:39.038660 DDR cs1 size: 2048MB
766 02:40:39.043730 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 02:40:39.044369 cs0 DataBus test pass
768 02:40:39.049260 cs1 DataBus test pass
769 02:40:39.049815 cs0 AddrBus test pass
770 02:40:39.050342 cs1 AddrBus test pass
771 02:40:39.050855
772 02:40:39.055028 100bdlr_step_size ps== 420
773 02:40:39.055594 result report
774 02:40:39.060606 boot times 0Enable ddr reg access
775 02:40:39.065365 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 02:40:39.078319 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 02:40:39.652937 0.0;M3 CHK:0;cm4_sp_mode 0
778 02:40:39.653757 MVN_1=0x00000000
779 02:40:39.658336 MVN_2=0x00000000
780 02:40:39.664233 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 02:40:39.664877 OPS=0x10
782 02:40:39.665407 ring efuse init
783 02:40:39.665916 chipver efuse init
784 02:40:39.672370 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 02:40:39.672944 [0.018961 Inits done]
786 02:40:39.673460 secure task start!
787 02:40:39.679829 high task start!
788 02:40:39.680427 low task start!
789 02:40:39.680951 run into bl31
790 02:40:39.686515 NOTICE: BL31: v1.3(release):4fc40b1
791 02:40:39.694317 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 02:40:39.694877 NOTICE: BL31: G12A normal boot!
793 02:40:39.719692 NOTICE: BL31: BL33 decompress pass
794 02:40:39.725341 ERROR: Error initializing runtime service opteed_fast
795 02:40:40.958425
796 02:40:40.959246
797 02:40:40.966663 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 02:40:40.967341
799 02:40:40.967896 Model: Libre Computer AML-A311D-CC Alta
800 02:40:41.175233 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 02:40:41.198470 DRAM: 2 GiB (effective 3.8 GiB)
802 02:40:41.341537 Core: 408 devices, 31 uclasses, devicetree: separate
803 02:40:41.347282 WDT: Not starting watchdog@f0d0
804 02:40:41.379544 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 02:40:41.392052 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 02:40:41.396970 ** Bad device specification mmc 0 **
807 02:40:41.407320 Card did not respond to voltage select! : -110
808 02:40:41.414972 ** Bad device specification mmc 0 **
809 02:40:41.415616 Couldn't find partition mmc 0
810 02:40:41.423303 Card did not respond to voltage select! : -110
811 02:40:41.428821 ** Bad device specification mmc 0 **
812 02:40:41.429451 Couldn't find partition mmc 0
813 02:40:41.433874 Error: could not access storage.
814 02:40:41.776465 Net: eth0: ethernet@ff3f0000
815 02:40:41.777202 starting USB...
816 02:40:42.028230 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 02:40:42.028957 Starting the controller
818 02:40:42.035113 USB XHCI 1.10
819 02:40:44.196257 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 02:40:44.197033 bl2_stage_init 0x01
821 02:40:44.197593 bl2_stage_init 0x81
822 02:40:44.201849 hw id: 0x0000 - pwm id 0x01
823 02:40:44.202433 bl2_stage_init 0xc1
824 02:40:44.202976 bl2_stage_init 0x02
825 02:40:44.203499
826 02:40:44.207413 L0:00000000
827 02:40:44.207971 L1:20000703
828 02:40:44.208551 L2:00008067
829 02:40:44.209070 L3:14000000
830 02:40:44.212939 B2:00402000
831 02:40:44.213517 B1:e0f83180
832 02:40:44.214053
833 02:40:44.214571 TE: 58167
834 02:40:44.215103
835 02:40:44.218611 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 02:40:44.219182
837 02:40:44.219718 Board ID = 1
838 02:40:44.224225 Set A53 clk to 24M
839 02:40:44.224810 Set A73 clk to 24M
840 02:40:44.225336 Set clk81 to 24M
841 02:40:44.229790 A53 clk: 1200 MHz
842 02:40:44.230349 A73 clk: 1200 MHz
843 02:40:44.230887 CLK81: 166.6M
844 02:40:44.231403 smccc: 00012abe
845 02:40:44.235308 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 02:40:44.240919 board id: 1
847 02:40:44.246923 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 02:40:44.257529 fw parse done
849 02:40:44.263536 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 02:40:44.306079 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 02:40:44.316976 PIEI prepare done
852 02:40:44.317606 fastboot data load
853 02:40:44.318153 fastboot data verify
854 02:40:44.322705 verify result: 266
855 02:40:44.328231 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 02:40:44.328810 LPDDR4 probe
857 02:40:44.329348 ddr clk to 1584MHz
858 02:40:44.336222 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 02:40:44.373469
860 02:40:44.374065 dmc_version 0001
861 02:40:44.380162 Check phy result
862 02:40:44.385987 INFO : End of CA training
863 02:40:44.386545 INFO : End of initialization
864 02:40:44.391580 INFO : Training has run successfully!
865 02:40:44.392183 Check phy result
866 02:40:44.397192 INFO : End of initialization
867 02:40:44.397745 INFO : End of read enable training
868 02:40:44.402840 INFO : End of fine write leveling
869 02:40:44.408409 INFO : End of Write leveling coarse delay
870 02:40:44.408986 INFO : Training has run successfully!
871 02:40:44.409529 Check phy result
872 02:40:44.414008 INFO : End of initialization
873 02:40:44.414575 INFO : End of read dq deskew training
874 02:40:44.419613 INFO : End of MPR read delay center optimization
875 02:40:44.425262 INFO : End of write delay center optimization
876 02:40:44.430826 INFO : End of read delay center optimization
877 02:40:44.431385 INFO : End of max read latency training
878 02:40:44.436394 INFO : Training has run successfully!
879 02:40:44.436953 1D training succeed
880 02:40:44.445616 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 02:40:44.493230 Check phy result
882 02:40:44.493864 INFO : End of initialization
883 02:40:44.514959 INFO : End of 2D read delay Voltage center optimization
884 02:40:44.535193 INFO : End of 2D read delay Voltage center optimization
885 02:40:44.587225 INFO : End of 2D write delay Voltage center optimization
886 02:40:44.636651 INFO : End of 2D write delay Voltage center optimization
887 02:40:44.642257 INFO : Training has run successfully!
888 02:40:44.642818
889 02:40:44.643354 channel==0
890 02:40:44.647781 RxClkDly_Margin_A0==88 ps 9
891 02:40:44.648379 TxDqDly_Margin_A0==98 ps 10
892 02:40:44.651083 RxClkDly_Margin_A1==88 ps 9
893 02:40:44.651635 TxDqDly_Margin_A1==98 ps 10
894 02:40:44.656750 TrainedVREFDQ_A0==74
895 02:40:44.657315 TrainedVREFDQ_A1==75
896 02:40:44.657870 VrefDac_Margin_A0==25
897 02:40:44.662301 DeviceVref_Margin_A0==40
898 02:40:44.662916 VrefDac_Margin_A1==23
899 02:40:44.667957 DeviceVref_Margin_A1==39
900 02:40:44.668582
901 02:40:44.669088
902 02:40:44.669589 channel==1
903 02:40:44.670084 RxClkDly_Margin_A0==88 ps 9
904 02:40:44.671293 TxDqDly_Margin_A0==98 ps 10
905 02:40:44.676798 RxClkDly_Margin_A1==88 ps 9
906 02:40:44.677352 TxDqDly_Margin_A1==88 ps 9
907 02:40:44.677857 TrainedVREFDQ_A0==77
908 02:40:44.682443 TrainedVREFDQ_A1==77
909 02:40:44.682972 VrefDac_Margin_A0==22
910 02:40:44.688071 DeviceVref_Margin_A0==37
911 02:40:44.688635 VrefDac_Margin_A1==24
912 02:40:44.689125 DeviceVref_Margin_A1==37
913 02:40:44.689622
914 02:40:44.697075 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 02:40:44.697624
916 02:40:44.724957 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 02:40:44.725629 2D training succeed
918 02:40:44.736155 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 02:40:44.736733 auto size-- 65535DDR cs0 size: 2048MB
920 02:40:44.737241 DDR cs1 size: 2048MB
921 02:40:44.741742 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 02:40:44.742275 cs0 DataBus test pass
923 02:40:44.747324 cs1 DataBus test pass
924 02:40:44.747867 cs0 AddrBus test pass
925 02:40:44.752937 cs1 AddrBus test pass
926 02:40:44.753482
927 02:40:44.753998 100bdlr_step_size ps== 420
928 02:40:44.754519 result report
929 02:40:44.758544 boot times 0Enable ddr reg access
930 02:40:44.764967 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 02:40:44.778426 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 02:40:45.352252 0.0;M3 CHK:0;cm4_sp_mode 0
933 02:40:45.353081 MVN_1=0x00000000
934 02:40:45.357603 MVN_2=0x00000000
935 02:40:45.363367 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 02:40:45.363954 OPS=0x10
937 02:40:45.364693 ring efuse init
938 02:40:45.365180 chipver efuse init
939 02:40:45.368935 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 02:40:45.374539 [0.018961 Inits done]
941 02:40:45.375029 secure task start!
942 02:40:45.375489 high task start!
943 02:40:45.379120 low task start!
944 02:40:45.379617 run into bl31
945 02:40:45.385769 NOTICE: BL31: v1.3(release):4fc40b1
946 02:40:45.393580 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 02:40:45.394088 NOTICE: BL31: G12A normal boot!
948 02:40:45.418939 NOTICE: BL31: BL33 decompress pass
949 02:40:45.424628 ERROR: Error initializing runtime service opteed_fast
950 02:40:46.657612
951 02:40:46.658289
952 02:40:46.665877 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 02:40:46.666398
954 02:40:46.666868 Model: Libre Computer AML-A311D-CC Alta
955 02:40:46.874491 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 02:40:46.897737 DRAM: 2 GiB (effective 3.8 GiB)
957 02:40:47.040739 Core: 408 devices, 31 uclasses, devicetree: separate
958 02:40:47.046576 WDT: Not starting watchdog@f0d0
959 02:40:47.078863 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 02:40:47.091349 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 02:40:47.096280 ** Bad device specification mmc 0 **
962 02:40:47.106624 Card did not respond to voltage select! : -110
963 02:40:47.114275 ** Bad device specification mmc 0 **
964 02:40:47.114793 Couldn't find partition mmc 0
965 02:40:47.122603 Card did not respond to voltage select! : -110
966 02:40:47.128112 ** Bad device specification mmc 0 **
967 02:40:47.128603 Couldn't find partition mmc 0
968 02:40:47.133184 Error: could not access storage.
969 02:40:47.475655 Net: eth0: ethernet@ff3f0000
970 02:40:47.476346 starting USB...
971 02:40:47.727561 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 02:40:47.728176 Starting the controller
973 02:40:47.734467 USB XHCI 1.10
974 02:40:49.288573 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 02:40:49.296719 scanning usb for storage devices... 0 Storage Device(s) found
977 02:40:49.348346 Hit any key to stop autoboot: 1
978 02:40:49.349213 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 02:40:49.349864 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 02:40:49.350397 Setting prompt string to ['=>']
981 02:40:49.350934 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 02:40:49.364186 0
983 02:40:49.365117 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 02:40:49.365674 Sending with 10 millisecond of delay
986 02:40:50.500511 => setenv autoload no
987 02:40:50.511395 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 02:40:50.516878 setenv autoload no
989 02:40:50.517667 Sending with 10 millisecond of delay
991 02:40:52.314590 => setenv initrd_high 0xffffffff
992 02:40:52.325427 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 02:40:52.326328 setenv initrd_high 0xffffffff
994 02:40:52.327093 Sending with 10 millisecond of delay
996 02:40:53.944121 => setenv fdt_high 0xffffffff
997 02:40:53.954974 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 02:40:53.955874 setenv fdt_high 0xffffffff
999 02:40:53.956709 Sending with 10 millisecond of delay
1001 02:40:54.248597 => dhcp
1002 02:40:54.259313 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 02:40:54.260239 dhcp
1004 02:40:54.260733 Speed: 1000, full duplex
1005 02:40:54.261192 BOOTP broadcast 1
1006 02:40:54.483074 DHCP client bound to address 192.168.6.27 (223 ms)
1007 02:40:54.483921 Sending with 10 millisecond of delay
1009 02:40:56.160585 => setenv serverip 192.168.6.2
1010 02:40:56.174196 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 02:40:56.175121 setenv serverip 192.168.6.2
1012 02:40:56.175817 Sending with 10 millisecond of delay
1014 02:40:59.898541 => tftpboot 0x01080000 943510/tftp-deploy-y3cp0lvz/kernel/uImage
1015 02:40:59.909273 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 02:40:59.909799 tftpboot 0x01080000 943510/tftp-deploy-y3cp0lvz/kernel/uImage
1017 02:40:59.910061 Speed: 1000, full duplex
1018 02:40:59.910284 Using ethernet@ff3f0000 device
1019 02:40:59.911772 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 02:40:59.917272 Filename '943510/tftp-deploy-y3cp0lvz/kernel/uImage'.
1021 02:40:59.921169 Load address: 0x1080000
1022 02:41:02.770883 Loading: *################################################## 43.7 MiB
1023 02:41:02.772230 15.3 MiB/s
1024 02:41:02.772539 done
1025 02:41:02.775589 Bytes transferred = 45779520 (2ba8a40 hex)
1026 02:41:02.776133 Sending with 10 millisecond of delay
1028 02:41:07.460629 => tftpboot 0x08000000 943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot
1029 02:41:07.471198 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 02:41:07.471739 tftpboot 0x08000000 943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot
1031 02:41:07.472057 Speed: 1000, full duplex
1032 02:41:07.472317 Using ethernet@ff3f0000 device
1033 02:41:07.474034 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 02:41:07.482548 Filename '943510/tftp-deploy-y3cp0lvz/ramdisk/ramdisk.cpio.gz.uboot'.
1035 02:41:07.482878 Load address: 0x8000000
1036 02:41:14.110281 Loading: *################################################# UDP wrong checksum 00000005 000031b1
1037 02:41:19.111557 T UDP wrong checksum 00000005 000031b1
1038 02:41:29.114610 T T UDP wrong checksum 00000005 000031b1
1039 02:41:49.118615 T T T T UDP wrong checksum 00000005 000031b1
1040 02:42:09.123516 T T T
1041 02:42:09.124160 Retry count exceeded; starting again
1043 02:42:09.125600 end: 2.4.3 bootloader-commands (duration 00:01:20) [common]
1046 02:42:09.127472 end: 2.4 uboot-commands (duration 00:01:52) [common]
1048 02:42:09.128994 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1050 02:42:09.130133 end: 2 uboot-action (duration 00:01:52) [common]
1052 02:42:09.131635 Cleaning after the job
1053 02:42:09.132206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/ramdisk
1054 02:42:09.133547 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/kernel
1055 02:42:09.180719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/dtb
1056 02:42:09.181504 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/nfsrootfs
1057 02:42:09.373082 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943510/tftp-deploy-y3cp0lvz/modules
1058 02:42:09.395941 start: 4.1 power-off (timeout 00:00:30) [common]
1059 02:42:09.396688 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1060 02:42:09.428342 >> OK - accepted request
1061 02:42:09.430104 Returned 0 in 0 seconds
1062 02:42:09.530851 end: 4.1 power-off (duration 00:00:00) [common]
1064 02:42:09.531831 start: 4.2 read-feedback (timeout 00:10:00) [common]
1065 02:42:09.532530 Listened to connection for namespace 'common' for up to 1s
1066 02:42:10.532522 Finalising connection for namespace 'common'
1067 02:42:10.533236 Disconnecting from shell: Finalise
1068 02:42:10.533753 =>
1069 02:42:10.634627 end: 4.2 read-feedback (duration 00:00:01) [common]
1070 02:42:10.635084 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/943510
1071 02:42:13.522652 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/943510
1072 02:42:13.523242 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.