Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:40:39.139319 lava-dispatcher, installed at version: 2024.01
2 02:40:39.140113 start: 0 validate
3 02:40:39.140581 Start time: 2024-11-06 02:40:39.140551+00:00 (UTC)
4 02:40:39.141124 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:40:39.141651 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:40:39.186464 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:40:39.186989 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:40:39.219407 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:40:39.220051 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:40:39.252734 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:40:39.253177 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:40:39.287762 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:40:39.288289 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:40:39.335657 validate duration: 0.20
16 02:40:39.337197 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:40:39.337829 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:40:39.338409 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:40:39.339399 Not decompressing ramdisk as can be used compressed.
20 02:40:39.340276 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:40:39.340813 saving as /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/ramdisk/initrd.cpio.gz
22 02:40:39.341360 total size: 5628169 (5 MB)
23 02:40:39.384158 progress 0 % (0 MB)
24 02:40:39.392013 progress 5 % (0 MB)
25 02:40:39.400006 progress 10 % (0 MB)
26 02:40:39.406873 progress 15 % (0 MB)
27 02:40:39.414680 progress 20 % (1 MB)
28 02:40:39.418861 progress 25 % (1 MB)
29 02:40:39.422947 progress 30 % (1 MB)
30 02:40:39.426939 progress 35 % (1 MB)
31 02:40:39.430598 progress 40 % (2 MB)
32 02:40:39.434779 progress 45 % (2 MB)
33 02:40:39.438442 progress 50 % (2 MB)
34 02:40:39.442530 progress 55 % (2 MB)
35 02:40:39.446571 progress 60 % (3 MB)
36 02:40:39.450286 progress 65 % (3 MB)
37 02:40:39.454376 progress 70 % (3 MB)
38 02:40:39.458081 progress 75 % (4 MB)
39 02:40:39.462111 progress 80 % (4 MB)
40 02:40:39.465802 progress 85 % (4 MB)
41 02:40:39.469850 progress 90 % (4 MB)
42 02:40:39.473694 progress 95 % (5 MB)
43 02:40:39.477100 progress 100 % (5 MB)
44 02:40:39.477745 5 MB downloaded in 0.14 s (39.36 MB/s)
45 02:40:39.478272 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:40:39.479165 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:40:39.479458 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:40:39.479730 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:40:39.480220 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/kernel/Image
51 02:40:39.480478 saving as /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/kernel/Image
52 02:40:39.480691 total size: 45779456 (43 MB)
53 02:40:39.480902 No compression specified
54 02:40:39.519391 progress 0 % (0 MB)
55 02:40:39.548094 progress 5 % (2 MB)
56 02:40:39.576509 progress 10 % (4 MB)
57 02:40:39.605887 progress 15 % (6 MB)
58 02:40:39.634368 progress 20 % (8 MB)
59 02:40:39.663318 progress 25 % (10 MB)
60 02:40:39.692143 progress 30 % (13 MB)
61 02:40:39.720484 progress 35 % (15 MB)
62 02:40:39.750293 progress 40 % (17 MB)
63 02:40:39.779028 progress 45 % (19 MB)
64 02:40:39.808356 progress 50 % (21 MB)
65 02:40:39.837074 progress 55 % (24 MB)
66 02:40:39.866799 progress 60 % (26 MB)
67 02:40:39.904961 progress 65 % (28 MB)
68 02:40:39.933946 progress 70 % (30 MB)
69 02:40:39.963532 progress 75 % (32 MB)
70 02:40:39.993064 progress 80 % (34 MB)
71 02:40:40.022919 progress 85 % (37 MB)
72 02:40:40.052643 progress 90 % (39 MB)
73 02:40:40.081349 progress 95 % (41 MB)
74 02:40:40.109877 progress 100 % (43 MB)
75 02:40:40.110420 43 MB downloaded in 0.63 s (69.33 MB/s)
76 02:40:40.110899 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:40:40.111721 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:40:40.112022 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:40:40.112299 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:40:40.112920 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:40:40.113264 saving as /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:40:40.113490 total size: 53209 (0 MB)
84 02:40:40.113714 No compression specified
85 02:40:40.152501 progress 61 % (0 MB)
86 02:40:40.153372 progress 100 % (0 MB)
87 02:40:40.153940 0 MB downloaded in 0.04 s (1.25 MB/s)
88 02:40:40.154424 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:40:40.155264 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:40:40.155541 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:40:40.155818 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:40:40.156308 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:40:40.156565 saving as /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/nfsrootfs/full.rootfs.tar
95 02:40:40.156782 total size: 120894716 (115 MB)
96 02:40:40.157001 Using unxz to decompress xz
97 02:40:40.197894 progress 0 % (0 MB)
98 02:40:40.987384 progress 5 % (5 MB)
99 02:40:41.840967 progress 10 % (11 MB)
100 02:40:42.641203 progress 15 % (17 MB)
101 02:40:43.376622 progress 20 % (23 MB)
102 02:40:43.970376 progress 25 % (28 MB)
103 02:40:44.791652 progress 30 % (34 MB)
104 02:40:45.575761 progress 35 % (40 MB)
105 02:40:45.939935 progress 40 % (46 MB)
106 02:40:46.311384 progress 45 % (51 MB)
107 02:40:47.037775 progress 50 % (57 MB)
108 02:40:47.929962 progress 55 % (63 MB)
109 02:40:48.713641 progress 60 % (69 MB)
110 02:40:49.471595 progress 65 % (74 MB)
111 02:40:50.255114 progress 70 % (80 MB)
112 02:40:51.082553 progress 75 % (86 MB)
113 02:40:51.865317 progress 80 % (92 MB)
114 02:40:52.629168 progress 85 % (98 MB)
115 02:40:53.469088 progress 90 % (103 MB)
116 02:40:54.229300 progress 95 % (109 MB)
117 02:40:55.047038 progress 100 % (115 MB)
118 02:40:55.059337 115 MB downloaded in 14.90 s (7.74 MB/s)
119 02:40:55.060303 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:40:55.062054 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:40:55.062618 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:40:55.063176 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:40:55.064335 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/modules.tar.xz
125 02:40:55.064859 saving as /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/modules/modules.tar
126 02:40:55.065308 total size: 11613264 (11 MB)
127 02:40:55.065766 Using unxz to decompress xz
128 02:40:55.113335 progress 0 % (0 MB)
129 02:40:55.179330 progress 5 % (0 MB)
130 02:40:55.252550 progress 10 % (1 MB)
131 02:40:55.349751 progress 15 % (1 MB)
132 02:40:55.442753 progress 20 % (2 MB)
133 02:40:55.521746 progress 25 % (2 MB)
134 02:40:55.598087 progress 30 % (3 MB)
135 02:40:55.676087 progress 35 % (3 MB)
136 02:40:55.748884 progress 40 % (4 MB)
137 02:40:55.824447 progress 45 % (5 MB)
138 02:40:55.908404 progress 50 % (5 MB)
139 02:40:55.985415 progress 55 % (6 MB)
140 02:40:56.069828 progress 60 % (6 MB)
141 02:40:56.150195 progress 65 % (7 MB)
142 02:40:56.232554 progress 70 % (7 MB)
143 02:40:56.312230 progress 75 % (8 MB)
144 02:40:56.397083 progress 80 % (8 MB)
145 02:40:56.478659 progress 85 % (9 MB)
146 02:40:56.557251 progress 90 % (9 MB)
147 02:40:56.634916 progress 95 % (10 MB)
148 02:40:56.710763 progress 100 % (11 MB)
149 02:40:56.722426 11 MB downloaded in 1.66 s (6.68 MB/s)
150 02:40:56.723029 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:40:56.723870 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:40:56.724356 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 02:40:56.724884 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 02:41:13.019728 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/943581/extract-nfsrootfs-kgvzra2m
156 02:41:13.020359 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 02:41:13.020651 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 02:41:13.021354 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx
159 02:41:13.021857 makedir: /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin
160 02:41:13.022222 makedir: /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/tests
161 02:41:13.022554 makedir: /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/results
162 02:41:13.022889 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-add-keys
163 02:41:13.023417 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-add-sources
164 02:41:13.023936 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-background-process-start
165 02:41:13.024535 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-background-process-stop
166 02:41:13.025113 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-common-functions
167 02:41:13.025632 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-echo-ipv4
168 02:41:13.026165 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-install-packages
169 02:41:13.026683 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-installed-packages
170 02:41:13.027174 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-os-build
171 02:41:13.027656 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-probe-channel
172 02:41:13.028173 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-probe-ip
173 02:41:13.028674 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-target-ip
174 02:41:13.029160 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-target-mac
175 02:41:13.029641 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-target-storage
176 02:41:13.030129 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-case
177 02:41:13.030614 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-event
178 02:41:13.031090 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-feedback
179 02:41:13.031565 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-raise
180 02:41:13.032099 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-reference
181 02:41:13.032603 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-runner
182 02:41:13.033126 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-set
183 02:41:13.033617 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-test-shell
184 02:41:13.034110 Updating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-add-keys (debian)
185 02:41:13.034648 Updating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-add-sources (debian)
186 02:41:13.035174 Updating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-install-packages (debian)
187 02:41:13.035725 Updating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-installed-packages (debian)
188 02:41:13.036264 Updating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/bin/lava-os-build (debian)
189 02:41:13.036721 Creating /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/environment
190 02:41:13.037100 LAVA metadata
191 02:41:13.037367 - LAVA_JOB_ID=943581
192 02:41:13.037586 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:41:13.037947 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 02:41:13.038965 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:41:13.039290 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 02:41:13.039497 skipped lava-vland-overlay
197 02:41:13.039739 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:41:13.040031 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 02:41:13.040268 skipped lava-multinode-overlay
200 02:41:13.040513 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:41:13.040764 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 02:41:13.041013 Loading test definitions
203 02:41:13.041287 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 02:41:13.041505 Using /lava-943581 at stage 0
205 02:41:13.042622 uuid=943581_1.6.2.4.1 testdef=None
206 02:41:13.042935 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:41:13.043196 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 02:41:13.044828 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:41:13.045622 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 02:41:13.047590 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:41:13.048458 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 02:41:13.050375 runner path: /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/0/tests/0_timesync-off test_uuid 943581_1.6.2.4.1
215 02:41:13.050939 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:41:13.051751 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 02:41:13.051973 Using /lava-943581 at stage 0
219 02:41:13.052367 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:41:13.052659 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/0/tests/1_kselftest-kvm'
221 02:41:16.432879 Running '/usr/bin/git checkout kernelci.org
222 02:41:16.782148 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 02:41:16.783636 uuid=943581_1.6.2.4.5 testdef=None
224 02:41:16.784080 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:41:16.785755 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 02:41:16.791869 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:41:16.793717 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 02:41:16.802029 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:41:16.803933 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 02:41:16.811872 runner path: /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/0/tests/1_kselftest-kvm test_uuid 943581_1.6.2.4.5
234 02:41:16.812555 BOARD='meson-sm1-s905d3-libretech-cc'
235 02:41:16.813008 BRANCH='clk'
236 02:41:16.813442 SKIPFILE='/dev/null'
237 02:41:16.813876 SKIP_INSTALL='True'
238 02:41:16.814305 TESTPROG_URL='http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:41:16.814749 TST_CASENAME=''
240 02:41:16.815183 TST_CMDFILES='kvm'
241 02:41:16.816390 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:41:16.818134 Creating lava-test-runner.conf files
244 02:41:16.818580 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/943581/lava-overlay-wi9cfptx/lava-943581/0 for stage 0
245 02:41:16.819321 - 0_timesync-off
246 02:41:16.819839 - 1_kselftest-kvm
247 02:41:16.820595 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:41:16.821200 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 02:41:40.369608 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 02:41:40.370059 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 02:41:40.370326 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:41:40.370599 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 02:41:40.370867 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 02:41:40.977996 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:41:40.978476 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 02:41:40.978749 extracting modules file /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943581/extract-nfsrootfs-kgvzra2m
257 02:41:42.322476 extracting modules file /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943581/extract-overlay-ramdisk-xvtrj2e4/ramdisk
258 02:41:43.701816 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:41:43.702298 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 02:41:43.702587 [common] Applying overlay to NFS
261 02:41:43.702804 [common] Applying overlay /var/lib/lava/dispatcher/tmp/943581/compress-overlay-rf3rwwf1/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/943581/extract-nfsrootfs-kgvzra2m
262 02:41:46.426488 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:41:46.426969 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 02:41:46.427250 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 02:41:46.427483 Converting downloaded kernel to a uImage
266 02:41:46.427793 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/kernel/Image /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/kernel/uImage
267 02:41:46.951891 output: Image Name:
268 02:41:46.952345 output: Created: Wed Nov 6 02:41:46 2024
269 02:41:46.952560 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:41:46.952766 output: Data Size: 45779456 Bytes = 44706.50 KiB = 43.66 MiB
271 02:41:46.952970 output: Load Address: 01080000
272 02:41:46.953170 output: Entry Point: 01080000
273 02:41:46.953370 output:
274 02:41:46.953703 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 02:41:46.953977 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 02:41:46.954251 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 02:41:46.954510 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:41:46.954770 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 02:41:46.955027 Building ramdisk /var/lib/lava/dispatcher/tmp/943581/extract-overlay-ramdisk-xvtrj2e4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/943581/extract-overlay-ramdisk-xvtrj2e4/ramdisk
280 02:41:49.063363 >> 166772 blocks
281 02:41:56.788709 Adding RAMdisk u-boot header.
282 02:41:56.789385 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/943581/extract-overlay-ramdisk-xvtrj2e4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/943581/extract-overlay-ramdisk-xvtrj2e4/ramdisk.cpio.gz.uboot
283 02:41:57.062382 output: Image Name:
284 02:41:57.062815 output: Created: Wed Nov 6 02:41:56 2024
285 02:41:57.063029 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:41:57.063238 output: Data Size: 23427683 Bytes = 22878.60 KiB = 22.34 MiB
287 02:41:57.063445 output: Load Address: 00000000
288 02:41:57.063648 output: Entry Point: 00000000
289 02:41:57.063850 output:
290 02:41:57.064780 rename /var/lib/lava/dispatcher/tmp/943581/extract-overlay-ramdisk-xvtrj2e4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot
291 02:41:57.065548 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:41:57.066102 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 02:41:57.066631 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 02:41:57.067095 No LXC device requested
295 02:41:57.067600 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:41:57.068151 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 02:41:57.068666 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:41:57.069084 Checking files for TFTP limit of 4294967296 bytes.
299 02:41:57.071790 end: 1 tftp-deploy (duration 00:01:18) [common]
300 02:41:57.072454 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:41:57.072985 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:41:57.073486 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:41:57.073990 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:41:57.074525 Using kernel file from prepare-kernel: 943581/tftp-deploy-yuhb37gy/kernel/uImage
305 02:41:57.075156 substitutions:
306 02:41:57.075567 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:41:57.075968 - {DTB_ADDR}: 0x01070000
308 02:41:57.076403 - {DTB}: 943581/tftp-deploy-yuhb37gy/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 02:41:57.076806 - {INITRD}: 943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot
310 02:41:57.077203 - {KERNEL_ADDR}: 0x01080000
311 02:41:57.077594 - {KERNEL}: 943581/tftp-deploy-yuhb37gy/kernel/uImage
312 02:41:57.077985 - {LAVA_MAC}: None
313 02:41:57.078415 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/943581/extract-nfsrootfs-kgvzra2m
314 02:41:57.078816 - {NFS_SERVER_IP}: 192.168.6.2
315 02:41:57.079202 - {PRESEED_CONFIG}: None
316 02:41:57.079592 - {PRESEED_LOCAL}: None
317 02:41:57.079999 - {RAMDISK_ADDR}: 0x08000000
318 02:41:57.080410 - {RAMDISK}: 943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot
319 02:41:57.080800 - {ROOT_PART}: None
320 02:41:57.081185 - {ROOT}: None
321 02:41:57.081571 - {SERVER_IP}: 192.168.6.2
322 02:41:57.081953 - {TEE_ADDR}: 0x83000000
323 02:41:57.082338 - {TEE}: None
324 02:41:57.082722 Parsed boot commands:
325 02:41:57.083095 - setenv autoload no
326 02:41:57.083479 - setenv initrd_high 0xffffffff
327 02:41:57.083861 - setenv fdt_high 0xffffffff
328 02:41:57.084275 - dhcp
329 02:41:57.084659 - setenv serverip 192.168.6.2
330 02:41:57.085044 - tftpboot 0x01080000 943581/tftp-deploy-yuhb37gy/kernel/uImage
331 02:41:57.085435 - tftpboot 0x08000000 943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot
332 02:41:57.085822 - tftpboot 0x01070000 943581/tftp-deploy-yuhb37gy/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 02:41:57.086207 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/943581/extract-nfsrootfs-kgvzra2m,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:41:57.086604 - bootm 0x01080000 0x08000000 0x01070000
335 02:41:57.087109 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:41:57.088646 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:41:57.089075 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 02:41:57.104773 Setting prompt string to ['lava-test: # ']
340 02:41:57.106342 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:41:57.106954 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:41:57.107529 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:41:57.108097 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:41:57.109263 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 02:41:57.160595 >> OK - accepted request
346 02:41:57.162875 Returned 0 in 0 seconds
347 02:41:57.263938 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:41:57.265605 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:41:57.266152 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:41:57.266646 Setting prompt string to ['Hit any key to stop autoboot']
352 02:41:57.267095 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:41:57.268678 Trying 192.168.56.21...
354 02:41:57.269169 Connected to conserv1.
355 02:41:57.269580 Escape character is '^]'.
356 02:41:57.269993
357 02:41:57.270414 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 02:41:57.270835
359 02:42:04.622970 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 02:42:04.623600 bl2_stage_init 0x01
361 02:42:04.624069 bl2_stage_init 0x81
362 02:42:04.628592 hw id: 0x0000 - pwm id 0x01
363 02:42:04.629046 bl2_stage_init 0xc1
364 02:42:04.632153 bl2_stage_init 0x02
365 02:42:04.632593
366 02:42:04.633032 L0:00000000
367 02:42:04.633454 L1:00000703
368 02:42:04.637689 L2:00008067
369 02:42:04.638134 L3:15000000
370 02:42:04.638555 S1:00000000
371 02:42:04.638960 B2:20282000
372 02:42:04.639366 B1:a0f83180
373 02:42:04.639758
374 02:42:04.643245 TE: 71106
375 02:42:04.643671
376 02:42:04.648900 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 02:42:04.649328
378 02:42:04.649727 Board ID = 1
379 02:42:04.650117 Set cpu clk to 24M
380 02:42:04.652304 Set clk81 to 24M
381 02:42:04.652728 Use GP1_pll as DSU clk.
382 02:42:04.657863 DSU clk: 1200 Mhz
383 02:42:04.658283 CPU clk: 1200 MHz
384 02:42:04.658674 Set clk81 to 166.6M
385 02:42:04.663477 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 02:42:04.669176 board id: 1
387 02:42:04.672992 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 02:42:04.685934 fw parse done
389 02:42:04.691902 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:42:04.735054 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 02:42:04.746073 PIEI prepare done
392 02:42:04.746493 fastboot data load
393 02:42:04.746891 fastboot data verify
394 02:42:04.751607 verify result: 266
395 02:42:04.757221 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 02:42:04.757646 LPDDR4 probe
397 02:42:04.758043 ddr clk to 1584MHz
398 02:42:04.765200 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 02:42:04.803052
400 02:42:04.803576 dmc_version 0001
401 02:42:04.809985 Check phy result
402 02:42:04.816039 INFO : End of CA training
403 02:42:04.816468 INFO : End of initialization
404 02:42:04.821551 INFO : Training has run successfully!
405 02:42:04.821972 Check phy result
406 02:42:04.827142 INFO : End of initialization
407 02:42:04.827557 INFO : End of read enable training
408 02:42:04.832787 INFO : End of fine write leveling
409 02:42:04.838410 INFO : End of Write leveling coarse delay
410 02:42:04.838829 INFO : Training has run successfully!
411 02:42:04.839225 Check phy result
412 02:42:04.844030 INFO : End of initialization
413 02:42:04.844467 INFO : End of read dq deskew training
414 02:42:04.849623 INFO : End of MPR read delay center optimization
415 02:42:04.855168 INFO : End of write delay center optimization
416 02:42:04.860800 INFO : End of read delay center optimization
417 02:42:04.861248 INFO : End of max read latency training
418 02:42:04.866318 INFO : Training has run successfully!
419 02:42:04.866747 1D training succeed
420 02:42:04.875527 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 02:42:04.923912 Check phy result
422 02:42:04.924411 INFO : End of initialization
423 02:42:04.951223 INFO : End of 2D read delay Voltage center optimization
424 02:42:04.975394 INFO : End of 2D read delay Voltage center optimization
425 02:42:05.032114 INFO : End of 2D write delay Voltage center optimization
426 02:42:05.086168 INFO : End of 2D write delay Voltage center optimization
427 02:42:05.091719 INFO : Training has run successfully!
428 02:42:05.092190
429 02:42:05.092595 channel==0
430 02:42:05.097303 RxClkDly_Margin_A0==78 ps 8
431 02:42:05.097723 TxDqDly_Margin_A0==88 ps 9
432 02:42:05.102884 RxClkDly_Margin_A1==88 ps 9
433 02:42:05.103300 TxDqDly_Margin_A1==88 ps 9
434 02:42:05.103697 TrainedVREFDQ_A0==74
435 02:42:05.108466 TrainedVREFDQ_A1==74
436 02:42:05.108887 VrefDac_Margin_A0==23
437 02:42:05.109284 DeviceVref_Margin_A0==40
438 02:42:05.114019 VrefDac_Margin_A1==22
439 02:42:05.114436 DeviceVref_Margin_A1==40
440 02:42:05.114827
441 02:42:05.115218
442 02:42:05.115609 channel==1
443 02:42:05.119698 RxClkDly_Margin_A0==88 ps 9
444 02:42:05.120167 TxDqDly_Margin_A0==98 ps 10
445 02:42:05.125211 RxClkDly_Margin_A1==88 ps 9
446 02:42:05.125635 TxDqDly_Margin_A1==98 ps 10
447 02:42:05.130984 TrainedVREFDQ_A0==78
448 02:42:05.131403 TrainedVREFDQ_A1==78
449 02:42:05.131797 VrefDac_Margin_A0==23
450 02:42:05.136455 DeviceVref_Margin_A0==36
451 02:42:05.136873 VrefDac_Margin_A1==22
452 02:42:05.142016 DeviceVref_Margin_A1==36
453 02:42:05.142431
454 02:42:05.142824 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 02:42:05.143213
456 02:42:05.173704 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 02:42:05.174212 2D training succeed
458 02:42:05.184914 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 02:42:05.185356 auto size-- 65535DDR cs0 size: 2048MB
460 02:42:05.190431 DDR cs1 size: 2048MB
461 02:42:05.190855 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 02:42:05.196076 cs0 DataBus test pass
463 02:42:05.196499 cs1 DataBus test pass
464 02:42:05.196891 cs0 AddrBus test pass
465 02:42:05.201626 cs1 AddrBus test pass
466 02:42:05.202063
467 02:42:05.202458 100bdlr_step_size ps== 478
468 02:42:05.202860 result report
469 02:42:05.207228 boot times 0Enable ddr reg access
470 02:42:05.214319 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 02:42:05.228224 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 02:42:05.887374 bl2z: ptr: 05129330, size: 00001e40
473 02:42:05.896994 0.0;M3 CHK:0;cm4_sp_mode 0
474 02:42:05.897598 MVN_1=0x00000000
475 02:42:05.898077 MVN_2=0x00000000
476 02:42:05.908440 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 02:42:05.908969 OPS=0x04
478 02:42:05.909442 ring efuse init
479 02:42:05.911374 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 02:42:05.917106 [0.017354 Inits done]
481 02:42:05.917611 secure task start!
482 02:42:05.918072 high task start!
483 02:42:05.918532 low task start!
484 02:42:05.921409 run into bl31
485 02:42:05.930026 NOTICE: BL31: v1.3(release):4fc40b1
486 02:42:05.937822 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 02:42:05.938329 NOTICE: BL31: G12A normal boot!
488 02:42:05.953498 NOTICE: BL31: BL33 decompress pass
489 02:42:05.959186 ERROR: Error initializing runtime service opteed_fast
490 02:42:07.179207 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 02:42:07.179869 bl2_stage_init 0x01
492 02:42:07.180596 bl2_stage_init 0x81
493 02:42:07.184778 hw id: 0x0000 - pwm id 0x01
494 02:42:07.185332 bl2_stage_init 0xc1
495 02:42:07.190336 bl2_stage_init 0x02
496 02:42:07.190876
497 02:42:07.191352 L0:00000000
498 02:42:07.191824 L1:00000703
499 02:42:07.192376 L2:00008067
500 02:42:07.192840 L3:15000000
501 02:42:07.195932 S1:00000000
502 02:42:07.196498 B2:20282000
503 02:42:07.196971 B1:a0f83180
504 02:42:07.197425
505 02:42:07.197883 TE: 67191
506 02:42:07.198338
507 02:42:07.201542 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 02:42:07.202090
509 02:42:07.207159 Board ID = 1
510 02:42:07.207711 Set cpu clk to 24M
511 02:42:07.208230 Set clk81 to 24M
512 02:42:07.212712 Use GP1_pll as DSU clk.
513 02:42:07.213249 DSU clk: 1200 Mhz
514 02:42:07.213720 CPU clk: 1200 MHz
515 02:42:07.218311 Set clk81 to 166.6M
516 02:42:07.223910 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 02:42:07.224474 board id: 1
518 02:42:07.231086 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 02:42:07.242037 fw parse done
520 02:42:07.248025 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 02:42:07.291188 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 02:42:07.302369 PIEI prepare done
523 02:42:07.302992 fastboot data load
524 02:42:07.303451 fastboot data verify
525 02:42:07.307922 verify result: 266
526 02:42:07.313546 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 02:42:07.314100 LPDDR4 probe
528 02:42:07.314545 ddr clk to 1584MHz
529 02:42:08.683308 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 02:42:08.684053 bl2_stage_init 0x01
531 02:42:08.684554 bl2_stage_init 0x81
532 02:42:08.688908 hw id: 0x0000 - pwm id 0x01
533 02:42:08.689458 bl2_stage_init 0xc1
534 02:42:08.692659 bl2_stage_init 0x02
535 02:42:08.693208
536 02:42:08.693684 L0:00000000
537 02:42:08.694144 L1:00000703
538 02:42:08.698259 L2:00008067
539 02:42:08.698810 L3:15000000
540 02:42:08.699278 S1:00000000
541 02:42:08.699736 B2:20282000
542 02:42:08.700229 B1:a0f83180
543 02:42:08.700684
544 02:42:08.703841 TE: 70173
545 02:42:08.704423
546 02:42:08.709481 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 02:42:08.710027
548 02:42:08.710491 Board ID = 1
549 02:42:08.710946 Set cpu clk to 24M
550 02:42:08.715054 Set clk81 to 24M
551 02:42:08.715615 Use GP1_pll as DSU clk.
552 02:42:08.716112 DSU clk: 1200 Mhz
553 02:42:08.720646 CPU clk: 1200 MHz
554 02:42:08.721190 Set clk81 to 166.6M
555 02:42:08.726218 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 02:42:08.726768 board id: 1
557 02:42:08.735218 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 02:42:08.746179 fw parse done
559 02:42:08.752141 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 02:42:08.795246 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 02:42:08.806395 PIEI prepare done
562 02:42:08.806948 fastboot data load
563 02:42:08.807424 fastboot data verify
564 02:42:08.811976 verify result: 266
565 02:42:08.817588 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 02:42:08.818137 LPDDR4 probe
567 02:42:08.818608 ddr clk to 1584MHz
568 02:42:08.825596 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 02:42:08.863300
570 02:42:08.863871 dmc_version 0001
571 02:42:08.870372 Check phy result
572 02:42:08.876299 INFO : End of CA training
573 02:42:08.876843 INFO : End of initialization
574 02:42:08.881916 INFO : Training has run successfully!
575 02:42:08.882459 Check phy result
576 02:42:08.887510 INFO : End of initialization
577 02:42:08.888085 INFO : End of read enable training
578 02:42:08.893082 INFO : End of fine write leveling
579 02:42:08.898678 INFO : End of Write leveling coarse delay
580 02:42:08.899222 INFO : Training has run successfully!
581 02:42:08.899690 Check phy result
582 02:42:08.904409 INFO : End of initialization
583 02:42:08.904959 INFO : End of read dq deskew training
584 02:42:08.909930 INFO : End of MPR read delay center optimization
585 02:42:08.915519 INFO : End of write delay center optimization
586 02:42:08.921102 INFO : End of read delay center optimization
587 02:42:08.921661 INFO : End of max read latency training
588 02:42:08.926736 INFO : Training has run successfully!
589 02:42:08.927285 1D training succeed
590 02:42:08.935817 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 02:42:08.984202 Check phy result
592 02:42:08.984771 INFO : End of initialization
593 02:42:09.011634 INFO : End of 2D read delay Voltage center optimization
594 02:42:09.035781 INFO : End of 2D read delay Voltage center optimization
595 02:42:09.092415 INFO : End of 2D write delay Voltage center optimization
596 02:42:09.146423 INFO : End of 2D write delay Voltage center optimization
597 02:42:09.152078 INFO : Training has run successfully!
598 02:42:09.152645
599 02:42:09.153114 channel==0
600 02:42:09.157621 RxClkDly_Margin_A0==78 ps 8
601 02:42:09.158180 TxDqDly_Margin_A0==98 ps 10
602 02:42:09.163191 RxClkDly_Margin_A1==88 ps 9
603 02:42:09.163746 TxDqDly_Margin_A1==98 ps 10
604 02:42:09.164248 TrainedVREFDQ_A0==75
605 02:42:09.168807 TrainedVREFDQ_A1==74
606 02:42:09.169362 VrefDac_Margin_A0==23
607 02:42:09.169822 DeviceVref_Margin_A0==39
608 02:42:09.174429 VrefDac_Margin_A1==23
609 02:42:09.174981 DeviceVref_Margin_A1==40
610 02:42:09.175440
611 02:42:09.175890
612 02:42:09.180584 channel==1
613 02:42:09.181137 RxClkDly_Margin_A0==78 ps 8
614 02:42:09.181601 TxDqDly_Margin_A0==98 ps 10
615 02:42:09.185614 RxClkDly_Margin_A1==78 ps 8
616 02:42:09.186165 TxDqDly_Margin_A1==88 ps 9
617 02:42:09.191201 TrainedVREFDQ_A0==78
618 02:42:09.191759 TrainedVREFDQ_A1==75
619 02:42:09.192267 VrefDac_Margin_A0==22
620 02:42:09.196837 DeviceVref_Margin_A0==36
621 02:42:09.197407 VrefDac_Margin_A1==22
622 02:42:09.202439 DeviceVref_Margin_A1==39
623 02:42:09.203001
624 02:42:09.203465 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 02:42:09.203923
626 02:42:09.236016 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 02:42:09.236666 2D training succeed
628 02:42:09.241676 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 02:42:09.247197 auto size-- 65535DDR cs0 size: 2048MB
630 02:42:09.247757 DDR cs1 size: 2048MB
631 02:42:09.252816 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 02:42:09.253394 cs0 DataBus test pass
633 02:42:09.258474 cs1 DataBus test pass
634 02:42:09.259039 cs0 AddrBus test pass
635 02:42:09.259501 cs1 AddrBus test pass
636 02:42:09.259950
637 02:42:09.264072 100bdlr_step_size ps== 471
638 02:42:09.264655 result report
639 02:42:09.269682 boot times 0Enable ddr reg access
640 02:42:09.274860 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 02:42:09.288703 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 02:42:09.949966 bl2z: ptr: 05129330, size: 00001e40
643 02:42:09.959541 0.0;M3 CHK:0;cm4_sp_mode 0
644 02:42:09.960163 MVN_1=0x00000000
645 02:42:09.960637 MVN_2=0x00000000
646 02:42:09.970962 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 02:42:09.971518 OPS=0x04
648 02:42:09.972016 ring efuse init
649 02:42:09.976652 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 02:42:09.977199 [0.017354 Inits done]
651 02:42:09.977662 secure task start!
652 02:42:09.984355 high task start!
653 02:42:09.984889 low task start!
654 02:42:09.985355 run into bl31
655 02:42:09.992978 NOTICE: BL31: v1.3(release):4fc40b1
656 02:42:10.000774 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 02:42:10.001321 NOTICE: BL31: G12A normal boot!
658 02:42:10.016300 NOTICE: BL31: BL33 decompress pass
659 02:42:10.022002 ERROR: Error initializing runtime service opteed_fast
660 02:42:11.387292 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 02:42:11.387931 bl2_stage_init 0x01
662 02:42:11.388452 bl2_stage_init 0x81
663 02:42:11.392998 hw id: 0x0000 - pwm id 0x01
664 02:42:11.393536 bl2_stage_init 0xc1
665 02:42:11.397417 bl2_stage_init 0x02
666 02:42:11.397954
667 02:42:11.398422 L0:00000000
668 02:42:11.398873 L1:00000703
669 02:42:11.399318 L2:00008067
670 02:42:11.402961 L3:15000000
671 02:42:11.403503 S1:00000000
672 02:42:11.403963 B2:20282000
673 02:42:11.404455 B1:a0f83180
674 02:42:11.404901
675 02:42:11.405347 TE: 74960
676 02:42:11.405795
677 02:42:11.414022 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 02:42:11.414574
679 02:42:11.415037 Board ID = 1
680 02:42:11.415486 Set cpu clk to 24M
681 02:42:11.415930 Set clk81 to 24M
682 02:42:11.417799 Use GP1_pll as DSU clk.
683 02:42:11.423244 DSU clk: 1200 Mhz
684 02:42:11.423773 CPU clk: 1200 MHz
685 02:42:11.424275 Set clk81 to 166.6M
686 02:42:11.429011 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 02:42:11.429545 board id: 1
688 02:42:11.439006 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 02:42:11.449982 fw parse done
690 02:42:11.455922 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 02:42:11.499062 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 02:42:11.510162 PIEI prepare done
693 02:42:11.510710 fastboot data load
694 02:42:11.511180 fastboot data verify
695 02:42:11.515818 verify result: 266
696 02:42:11.521387 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 02:42:11.521929 LPDDR4 probe
698 02:42:11.522395 ddr clk to 1584MHz
699 02:42:11.529373 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 02:42:11.567123
701 02:42:11.567703 dmc_version 0001
702 02:42:11.574158 Check phy result
703 02:42:11.580141 INFO : End of CA training
704 02:42:11.580687 INFO : End of initialization
705 02:42:11.585808 INFO : Training has run successfully!
706 02:42:11.586343 Check phy result
707 02:42:11.591338 INFO : End of initialization
708 02:42:11.591873 INFO : End of read enable training
709 02:42:11.596921 INFO : End of fine write leveling
710 02:42:11.602524 INFO : End of Write leveling coarse delay
711 02:42:11.603058 INFO : Training has run successfully!
712 02:42:11.603530 Check phy result
713 02:42:11.608137 INFO : End of initialization
714 02:42:11.608670 INFO : End of read dq deskew training
715 02:42:11.613809 INFO : End of MPR read delay center optimization
716 02:42:11.619307 INFO : End of write delay center optimization
717 02:42:11.624937 INFO : End of read delay center optimization
718 02:42:11.625483 INFO : End of max read latency training
719 02:42:11.630541 INFO : Training has run successfully!
720 02:42:11.631071 1D training succeed
721 02:42:11.639658 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 02:42:11.688040 Check phy result
723 02:42:11.688617 INFO : End of initialization
724 02:42:11.715401 INFO : End of 2D read delay Voltage center optimization
725 02:42:11.739554 INFO : End of 2D read delay Voltage center optimization
726 02:42:11.796304 INFO : End of 2D write delay Voltage center optimization
727 02:42:11.850248 INFO : End of 2D write delay Voltage center optimization
728 02:42:11.855814 INFO : Training has run successfully!
729 02:42:11.856393
730 02:42:11.856859 channel==0
731 02:42:11.861392 RxClkDly_Margin_A0==78 ps 8
732 02:42:11.861918 TxDqDly_Margin_A0==98 ps 10
733 02:42:11.866983 RxClkDly_Margin_A1==78 ps 8
734 02:42:11.867508 TxDqDly_Margin_A1==88 ps 9
735 02:42:11.867975 TrainedVREFDQ_A0==74
736 02:42:11.872463 TrainedVREFDQ_A1==74
737 02:42:11.872940 VrefDac_Margin_A0==24
738 02:42:11.873187 DeviceVref_Margin_A0==40
739 02:42:11.878054 VrefDac_Margin_A1==22
740 02:42:11.878381 DeviceVref_Margin_A1==40
741 02:42:11.878626
742 02:42:11.878865
743 02:42:11.879099 channel==1
744 02:42:11.883702 RxClkDly_Margin_A0==78 ps 8
745 02:42:11.884213 TxDqDly_Margin_A0==98 ps 10
746 02:42:11.889260 RxClkDly_Margin_A1==78 ps 8
747 02:42:11.889718 TxDqDly_Margin_A1==88 ps 9
748 02:42:11.894845 TrainedVREFDQ_A0==78
749 02:42:11.895187 TrainedVREFDQ_A1==77
750 02:42:11.895425 VrefDac_Margin_A0==22
751 02:42:11.900447 DeviceVref_Margin_A0==36
752 02:42:11.900773 VrefDac_Margin_A1==22
753 02:42:11.906055 DeviceVref_Margin_A1==37
754 02:42:11.906503
755 02:42:11.906868 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 02:42:11.907227
757 02:42:11.939677 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 02:42:11.940109 2D training succeed
759 02:42:11.945257 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 02:42:11.950839 auto size-- 65535DDR cs0 size: 2048MB
761 02:42:11.951303 DDR cs1 size: 2048MB
762 02:42:11.956450 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 02:42:11.956772 cs0 DataBus test pass
764 02:42:11.962053 cs1 DataBus test pass
765 02:42:11.962505 cs0 AddrBus test pass
766 02:42:11.962892 cs1 AddrBus test pass
767 02:42:11.963157
768 02:42:11.967709 100bdlr_step_size ps== 478
769 02:42:11.968065 result report
770 02:42:11.973240 boot times 0Enable ddr reg access
771 02:42:11.978413 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 02:42:11.992280 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 02:42:12.651742 bl2z: ptr: 05129330, size: 00001e40
774 02:42:12.660893 0.0;M3 CHK:0;cm4_sp_mode 0
775 02:42:12.661492 MVN_1=0x00000000
776 02:42:12.661957 MVN_2=0x00000000
777 02:42:12.672222 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 02:42:12.672584 OPS=0x04
779 02:42:12.672808 ring efuse init
780 02:42:12.677764 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 02:42:12.678060 [0.017354 Inits done]
782 02:42:12.678277 secure task start!
783 02:42:12.685938 high task start!
784 02:42:12.686260 low task start!
785 02:42:12.686478 run into bl31
786 02:42:12.694484 NOTICE: BL31: v1.3(release):4fc40b1
787 02:42:12.702289 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 02:42:12.702630 NOTICE: BL31: G12A normal boot!
789 02:42:12.717928 NOTICE: BL31: BL33 decompress pass
790 02:42:12.723613 ERROR: Error initializing runtime service opteed_fast
791 02:42:13.519196
792 02:42:13.519828
793 02:42:13.524434 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 02:42:13.524950
795 02:42:13.527894 Model: Libre Computer AML-S905D3-CC Solitude
796 02:42:13.675482 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 02:42:13.691002 DRAM: 2 GiB (effective 3.8 GiB)
798 02:42:13.791483 Core: 406 devices, 33 uclasses, devicetree: separate
799 02:42:13.797298 WDT: Not starting watchdog@f0d0
800 02:42:13.822326 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 02:42:13.834507 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 02:42:13.839466 ** Bad device specification mmc 0 **
803 02:42:13.849514 Card did not respond to voltage select! : -110
804 02:42:13.857149 ** Bad device specification mmc 0 **
805 02:42:13.857603 Couldn't find partition mmc 0
806 02:42:13.865485 Card did not respond to voltage select! : -110
807 02:42:13.871006 ** Bad device specification mmc 0 **
808 02:42:13.871458 Couldn't find partition mmc 0
809 02:42:13.876108 Error: could not access storage.
810 02:42:14.173522 Net: eth0: ethernet@ff3f0000
811 02:42:14.174121 starting USB...
812 02:42:14.418293 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 02:42:14.418910 Starting the controller
814 02:42:14.425121 USB XHCI 1.10
815 02:42:15.979149 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 02:42:15.987390 scanning usb for storage devices... 0 Storage Device(s) found
818 02:42:16.038894 Hit any key to stop autoboot: 1
819 02:42:16.039773 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 02:42:16.040399 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 02:42:16.040884 Setting prompt string to ['=>']
822 02:42:16.041376 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 02:42:16.053399 0
824 02:42:16.054266 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 02:42:16.155451 => setenv autoload no
827 02:42:16.156171 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 02:42:16.160967 setenv autoload no
830 02:42:16.262396 => setenv initrd_high 0xffffffff
831 02:42:16.263032 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 02:42:16.267364 setenv initrd_high 0xffffffff
834 02:42:16.368781 => setenv fdt_high 0xffffffff
835 02:42:16.369440 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 02:42:16.373755 setenv fdt_high 0xffffffff
838 02:42:16.475244 => dhcp
839 02:42:16.476169 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 02:42:16.480378 dhcp
841 02:42:17.035656 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 02:42:17.036297 Speed: 1000, full duplex
843 02:42:17.036761 BOOTP broadcast 1
844 02:42:17.283668 BOOTP broadcast 2
845 02:42:17.297724 DHCP client bound to address 192.168.6.21 (262 ms)
847 02:42:17.399242 => setenv serverip 192.168.6.2
848 02:42:17.399893 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
849 02:42:17.404366 setenv serverip 192.168.6.2
851 02:42:17.505873 => tftpboot 0x01080000 943581/tftp-deploy-yuhb37gy/kernel/uImage
852 02:42:17.506538 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
853 02:42:17.513209 tftpboot 0x01080000 943581/tftp-deploy-yuhb37gy/kernel/uImage
854 02:42:17.513715 Speed: 1000, full duplex
855 02:42:17.514164 Using ethernet@ff3f0000 device
856 02:42:17.518724 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 02:42:17.524274 Filename '943581/tftp-deploy-yuhb37gy/kernel/uImage'.
858 02:42:17.528076 Load address: 0x1080000
859 02:42:20.500895 Loading: *################################################## 43.7 MiB
860 02:42:20.501557 14.7 MiB/s
861 02:42:20.502016 done
862 02:42:20.505275 Bytes transferred = 45779520 (2ba8a40 hex)
864 02:42:20.606852 => tftpboot 0x08000000 943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot
865 02:42:20.607618 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
866 02:42:20.614383 tftpboot 0x08000000 943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot
867 02:42:20.614886 Speed: 1000, full duplex
868 02:42:20.615333 Using ethernet@ff3f0000 device
869 02:42:20.619888 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 02:42:20.629633 Filename '943581/tftp-deploy-yuhb37gy/ramdisk/ramdisk.cpio.gz.uboot'.
871 02:42:20.630124 Load address: 0x8000000
872 02:42:22.177287 Loading: *################################################# UDP wrong checksum 00000005 000050a7
873 02:42:27.176951 T UDP wrong checksum 00000005 000050a7
874 02:42:37.179790 T T UDP wrong checksum 00000005 000050a7
875 02:42:57.183867 T T T T UDP wrong checksum 00000005 000050a7
876 02:43:17.188284 T T T
877 02:43:17.188708 Retry count exceeded; starting again
879 02:43:17.191573 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
882 02:43:17.192651 end: 2.4 uboot-commands (duration 00:01:20) [common]
884 02:43:17.193389 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
886 02:43:17.193949 end: 2 uboot-action (duration 00:01:20) [common]
888 02:43:17.194784 Cleaning after the job
889 02:43:17.195085 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/ramdisk
890 02:43:17.195864 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/kernel
891 02:43:17.223730 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/dtb
892 02:43:17.224588 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/nfsrootfs
893 02:43:17.418134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943581/tftp-deploy-yuhb37gy/modules
894 02:43:17.440084 start: 4.1 power-off (timeout 00:00:30) [common]
895 02:43:17.440776 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
896 02:43:17.476742 >> OK - accepted request
897 02:43:17.478760 Returned 0 in 0 seconds
898 02:43:17.579549 end: 4.1 power-off (duration 00:00:00) [common]
900 02:43:17.580609 start: 4.2 read-feedback (timeout 00:10:00) [common]
901 02:43:17.581265 Listened to connection for namespace 'common' for up to 1s
902 02:43:18.582237 Finalising connection for namespace 'common'
903 02:43:18.582733 Disconnecting from shell: Finalise
904 02:43:18.583040 =>
905 02:43:18.683712 end: 4.2 read-feedback (duration 00:00:01) [common]
906 02:43:18.684152 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/943581
907 02:43:22.055816 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/943581
908 02:43:22.056446 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.