Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:33:18.854940 lava-dispatcher, installed at version: 2024.01
2 02:33:18.855712 start: 0 validate
3 02:33:18.856205 Start time: 2024-11-06 02:33:18.856175+00:00 (UTC)
4 02:33:18.856738 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:33:18.857299 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:33:18.899612 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:33:18.900199 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:33:18.929508 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:33:18.930104 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:33:18.959865 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:33:18.960343 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:33:18.990088 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:33:18.990547 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:33:19.027873 validate duration: 0.17
16 02:33:19.028798 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:33:19.029164 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:33:19.029500 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:33:19.030139 Not decompressing ramdisk as can be used compressed.
20 02:33:19.030653 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:33:19.030962 saving as /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/ramdisk/initrd.cpio.gz
22 02:33:19.031294 total size: 5628140 (5 MB)
23 02:33:19.069692 progress 0 % (0 MB)
24 02:33:19.075913 progress 5 % (0 MB)
25 02:33:19.082238 progress 10 % (0 MB)
26 02:33:19.086244 progress 15 % (0 MB)
27 02:33:19.090681 progress 20 % (1 MB)
28 02:33:19.094652 progress 25 % (1 MB)
29 02:33:19.099079 progress 30 % (1 MB)
30 02:33:19.103496 progress 35 % (1 MB)
31 02:33:19.107452 progress 40 % (2 MB)
32 02:33:19.111861 progress 45 % (2 MB)
33 02:33:19.115862 progress 50 % (2 MB)
34 02:33:19.120303 progress 55 % (2 MB)
35 02:33:19.124634 progress 60 % (3 MB)
36 02:33:19.128620 progress 65 % (3 MB)
37 02:33:19.133011 progress 70 % (3 MB)
38 02:33:19.136990 progress 75 % (4 MB)
39 02:33:19.141334 progress 80 % (4 MB)
40 02:33:19.145407 progress 85 % (4 MB)
41 02:33:19.149854 progress 90 % (4 MB)
42 02:33:19.154231 progress 95 % (5 MB)
43 02:33:19.157651 progress 100 % (5 MB)
44 02:33:19.158352 5 MB downloaded in 0.13 s (42.25 MB/s)
45 02:33:19.158927 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:33:19.159821 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:33:19.160161 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:33:19.160437 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:33:19.161793 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/kernel/Image
51 02:33:19.162124 saving as /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/kernel/Image
52 02:33:19.162383 total size: 45779456 (43 MB)
53 02:33:19.162636 No compression specified
54 02:33:19.198550 progress 0 % (0 MB)
55 02:33:19.227527 progress 5 % (2 MB)
56 02:33:19.256698 progress 10 % (4 MB)
57 02:33:19.286035 progress 15 % (6 MB)
58 02:33:19.315589 progress 20 % (8 MB)
59 02:33:19.345604 progress 25 % (10 MB)
60 02:33:19.374650 progress 30 % (13 MB)
61 02:33:19.403468 progress 35 % (15 MB)
62 02:33:19.432976 progress 40 % (17 MB)
63 02:33:19.462287 progress 45 % (19 MB)
64 02:33:19.493734 progress 50 % (21 MB)
65 02:33:19.524646 progress 55 % (24 MB)
66 02:33:19.553957 progress 60 % (26 MB)
67 02:33:19.583489 progress 65 % (28 MB)
68 02:33:19.611847 progress 70 % (30 MB)
69 02:33:19.641266 progress 75 % (32 MB)
70 02:33:19.670236 progress 80 % (34 MB)
71 02:33:19.699224 progress 85 % (37 MB)
72 02:33:19.728253 progress 90 % (39 MB)
73 02:33:19.757193 progress 95 % (41 MB)
74 02:33:19.785790 progress 100 % (43 MB)
75 02:33:19.786325 43 MB downloaded in 0.62 s (69.97 MB/s)
76 02:33:19.786806 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:33:19.787631 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:33:19.787909 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:33:19.788209 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:33:19.788686 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:33:19.788960 saving as /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:33:19.789169 total size: 53209 (0 MB)
84 02:33:19.789380 No compression specified
85 02:33:19.829710 progress 61 % (0 MB)
86 02:33:19.830562 progress 100 % (0 MB)
87 02:33:19.831096 0 MB downloaded in 0.04 s (1.21 MB/s)
88 02:33:19.831553 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:33:19.832418 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:33:19.832683 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:33:19.832946 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:33:19.833411 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:33:19.833652 saving as /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/nfsrootfs/full.rootfs.tar
95 02:33:19.833858 total size: 474398908 (452 MB)
96 02:33:19.834069 Using unxz to decompress xz
97 02:33:19.868596 progress 0 % (0 MB)
98 02:33:20.962013 progress 5 % (22 MB)
99 02:33:22.406875 progress 10 % (45 MB)
100 02:33:22.839998 progress 15 % (67 MB)
101 02:33:23.643469 progress 20 % (90 MB)
102 02:33:24.174291 progress 25 % (113 MB)
103 02:33:24.526494 progress 30 % (135 MB)
104 02:33:25.131233 progress 35 % (158 MB)
105 02:33:26.042561 progress 40 % (181 MB)
106 02:33:26.883297 progress 45 % (203 MB)
107 02:33:27.563265 progress 50 % (226 MB)
108 02:33:28.222354 progress 55 % (248 MB)
109 02:33:29.426824 progress 60 % (271 MB)
110 02:33:30.846801 progress 65 % (294 MB)
111 02:33:32.413646 progress 70 % (316 MB)
112 02:33:35.519335 progress 75 % (339 MB)
113 02:33:37.956847 progress 80 % (361 MB)
114 02:33:40.847094 progress 85 % (384 MB)
115 02:33:44.061260 progress 90 % (407 MB)
116 02:33:47.310776 progress 95 % (429 MB)
117 02:33:50.465705 progress 100 % (452 MB)
118 02:33:50.479239 452 MB downloaded in 30.65 s (14.76 MB/s)
119 02:33:50.480146 end: 1.4.1 http-download (duration 00:00:31) [common]
121 02:33:50.481780 end: 1.4 download-retry (duration 00:00:31) [common]
122 02:33:50.482304 start: 1.5 download-retry (timeout 00:09:29) [common]
123 02:33:50.482821 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 02:33:50.483742 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/modules.tar.xz
125 02:33:50.484256 saving as /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/modules/modules.tar
126 02:33:50.484674 total size: 11613264 (11 MB)
127 02:33:50.485096 Using unxz to decompress xz
128 02:33:50.523571 progress 0 % (0 MB)
129 02:33:50.589456 progress 5 % (0 MB)
130 02:33:50.662611 progress 10 % (1 MB)
131 02:33:50.757183 progress 15 % (1 MB)
132 02:33:50.852162 progress 20 % (2 MB)
133 02:33:50.933726 progress 25 % (2 MB)
134 02:33:51.011321 progress 30 % (3 MB)
135 02:33:51.091372 progress 35 % (3 MB)
136 02:33:51.165385 progress 40 % (4 MB)
137 02:33:51.242456 progress 45 % (5 MB)
138 02:33:51.328322 progress 50 % (5 MB)
139 02:33:51.406763 progress 55 % (6 MB)
140 02:33:51.493193 progress 60 % (6 MB)
141 02:33:51.574174 progress 65 % (7 MB)
142 02:33:51.653577 progress 70 % (7 MB)
143 02:33:51.731300 progress 75 % (8 MB)
144 02:33:51.813478 progress 80 % (8 MB)
145 02:33:51.892141 progress 85 % (9 MB)
146 02:33:51.969262 progress 90 % (9 MB)
147 02:33:52.045687 progress 95 % (10 MB)
148 02:33:52.121290 progress 100 % (11 MB)
149 02:33:52.132913 11 MB downloaded in 1.65 s (6.72 MB/s)
150 02:33:52.134002 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:33:52.136124 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:33:52.136799 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 02:33:52.137471 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 02:34:08.353884 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/943558/extract-nfsrootfs-10ua2xhi
156 02:34:08.354531 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 02:34:08.354824 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 02:34:08.355533 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss
159 02:34:08.356035 makedir: /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin
160 02:34:08.356426 makedir: /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/tests
161 02:34:08.356753 makedir: /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/results
162 02:34:08.357103 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-add-keys
163 02:34:08.357659 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-add-sources
164 02:34:08.358206 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-background-process-start
165 02:34:08.358736 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-background-process-stop
166 02:34:08.359284 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-common-functions
167 02:34:08.359819 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-echo-ipv4
168 02:34:08.360420 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-install-packages
169 02:34:08.361031 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-installed-packages
170 02:34:08.361559 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-os-build
171 02:34:08.362136 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-probe-channel
172 02:34:08.362661 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-probe-ip
173 02:34:08.363205 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-target-ip
174 02:34:08.363705 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-target-mac
175 02:34:08.364243 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-target-storage
176 02:34:08.364801 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-case
177 02:34:08.365367 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-event
178 02:34:08.365875 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-feedback
179 02:34:08.366369 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-raise
180 02:34:08.366872 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-reference
181 02:34:08.367380 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-runner
182 02:34:08.367876 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-set
183 02:34:08.368445 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-test-shell
184 02:34:08.368994 Updating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-install-packages (oe)
185 02:34:08.369631 Updating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/bin/lava-installed-packages (oe)
186 02:34:08.370101 Creating /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/environment
187 02:34:08.370504 LAVA metadata
188 02:34:08.370783 - LAVA_JOB_ID=943558
189 02:34:08.371000 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:34:08.371397 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 02:34:08.372489 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:34:08.372852 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 02:34:08.373067 skipped lava-vland-overlay
194 02:34:08.373311 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:34:08.373570 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 02:34:08.373797 skipped lava-multinode-overlay
197 02:34:08.374044 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:34:08.374304 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 02:34:08.374568 Loading test definitions
200 02:34:08.374861 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 02:34:08.375088 Using /lava-943558 at stage 0
202 02:34:08.376358 uuid=943558_1.6.2.4.1 testdef=None
203 02:34:08.376708 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:34:08.376986 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 02:34:08.378916 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:34:08.379751 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 02:34:08.382149 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:34:08.383032 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 02:34:08.385311 runner path: /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 943558_1.6.2.4.1
212 02:34:08.386003 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:34:08.386790 Creating lava-test-runner.conf files
215 02:34:08.386995 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/943558/lava-overlay-btix8jss/lava-943558/0 for stage 0
216 02:34:08.387355 - 0_v4l2-decoder-conformance-h264
217 02:34:08.387738 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:34:08.388050 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 02:34:08.410728 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:34:08.411187 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 02:34:08.411450 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:34:08.411725 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:34:08.412019 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 02:34:09.069203 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:34:09.069695 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 02:34:09.069952 extracting modules file /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943558/extract-nfsrootfs-10ua2xhi
227 02:34:10.564793 extracting modules file /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943558/extract-overlay-ramdisk-skr62m86/ramdisk
228 02:34:12.271464 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:34:12.272091 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 02:34:12.272446 [common] Applying overlay to NFS
231 02:34:12.272716 [common] Applying overlay /var/lib/lava/dispatcher/tmp/943558/compress-overlay-vclemghb/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/943558/extract-nfsrootfs-10ua2xhi
232 02:34:12.308267 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:34:12.308722 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 02:34:12.309057 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 02:34:12.309338 Converting downloaded kernel to a uImage
236 02:34:12.309711 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/kernel/Image /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/kernel/uImage
237 02:34:12.769802 output: Image Name:
238 02:34:12.770229 output: Created: Wed Nov 6 02:34:12 2024
239 02:34:12.770445 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:34:12.770652 output: Data Size: 45779456 Bytes = 44706.50 KiB = 43.66 MiB
241 02:34:12.770856 output: Load Address: 01080000
242 02:34:12.771055 output: Entry Point: 01080000
243 02:34:12.771253 output:
244 02:34:12.771591 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:34:12.771864 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:34:12.772188 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 02:34:12.772449 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:34:12.772712 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 02:34:12.772972 Building ramdisk /var/lib/lava/dispatcher/tmp/943558/extract-overlay-ramdisk-skr62m86/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/943558/extract-overlay-ramdisk-skr62m86/ramdisk
250 02:34:14.911192 >> 166772 blocks
251 02:34:22.616525 Adding RAMdisk u-boot header.
252 02:34:22.616993 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/943558/extract-overlay-ramdisk-skr62m86/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/943558/extract-overlay-ramdisk-skr62m86/ramdisk.cpio.gz.uboot
253 02:34:22.870009 output: Image Name:
254 02:34:22.870476 output: Created: Wed Nov 6 02:34:22 2024
255 02:34:22.870977 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:34:22.871441 output: Data Size: 23426097 Bytes = 22877.05 KiB = 22.34 MiB
257 02:34:22.871915 output: Load Address: 00000000
258 02:34:22.872414 output: Entry Point: 00000000
259 02:34:22.872863 output:
260 02:34:22.874078 rename /var/lib/lava/dispatcher/tmp/943558/extract-overlay-ramdisk-skr62m86/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot
261 02:34:22.874864 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:34:22.875482 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 02:34:22.876115 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 02:34:22.876637 No LXC device requested
265 02:34:22.877209 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:34:22.877783 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 02:34:22.878341 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:34:22.878809 Checking files for TFTP limit of 4294967296 bytes.
269 02:34:22.881790 end: 1 tftp-deploy (duration 00:01:04) [common]
270 02:34:22.882433 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:34:22.883025 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:34:22.883585 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:34:22.884200 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:34:22.884798 Using kernel file from prepare-kernel: 943558/tftp-deploy-uzghnw0c/kernel/uImage
275 02:34:22.885501 substitutions:
276 02:34:22.885960 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:34:22.886408 - {DTB_ADDR}: 0x01070000
278 02:34:22.886852 - {DTB}: 943558/tftp-deploy-uzghnw0c/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 02:34:22.887294 - {INITRD}: 943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot
280 02:34:22.887741 - {KERNEL_ADDR}: 0x01080000
281 02:34:22.888224 - {KERNEL}: 943558/tftp-deploy-uzghnw0c/kernel/uImage
282 02:34:22.888669 - {LAVA_MAC}: None
283 02:34:22.889149 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/943558/extract-nfsrootfs-10ua2xhi
284 02:34:22.889595 - {NFS_SERVER_IP}: 192.168.6.2
285 02:34:22.890033 - {PRESEED_CONFIG}: None
286 02:34:22.890467 - {PRESEED_LOCAL}: None
287 02:34:22.890899 - {RAMDISK_ADDR}: 0x08000000
288 02:34:22.891330 - {RAMDISK}: 943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot
289 02:34:22.891760 - {ROOT_PART}: None
290 02:34:22.892237 - {ROOT}: None
291 02:34:22.892677 - {SERVER_IP}: 192.168.6.2
292 02:34:22.893112 - {TEE_ADDR}: 0x83000000
293 02:34:22.893544 - {TEE}: None
294 02:34:22.893977 Parsed boot commands:
295 02:34:22.894396 - setenv autoload no
296 02:34:22.894825 - setenv initrd_high 0xffffffff
297 02:34:22.895250 - setenv fdt_high 0xffffffff
298 02:34:22.895679 - dhcp
299 02:34:22.896139 - setenv serverip 192.168.6.2
300 02:34:22.896572 - tftpboot 0x01080000 943558/tftp-deploy-uzghnw0c/kernel/uImage
301 02:34:22.897005 - tftpboot 0x08000000 943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot
302 02:34:22.897435 - tftpboot 0x01070000 943558/tftp-deploy-uzghnw0c/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 02:34:22.897865 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/943558/extract-nfsrootfs-10ua2xhi,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:34:22.898309 - bootm 0x01080000 0x08000000 0x01070000
305 02:34:22.898860 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:34:22.900538 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:34:22.901013 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 02:34:22.916605 Setting prompt string to ['lava-test: # ']
310 02:34:22.918213 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:34:22.918888 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:34:22.919506 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:34:22.920148 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:34:22.921416 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 02:34:22.963775 >> OK - accepted request
316 02:34:22.965857 Returned 0 in 0 seconds
317 02:34:23.067055 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:34:23.068901 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:34:23.069570 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:34:23.070155 Setting prompt string to ['Hit any key to stop autoboot']
322 02:34:23.070677 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:34:23.072441 Trying 192.168.56.21...
324 02:34:23.072972 Connected to conserv1.
325 02:34:23.073455 Escape character is '^]'.
326 02:34:23.073927
327 02:34:23.074400 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 02:34:23.074872
329 02:34:30.453177 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 02:34:30.453831 bl2_stage_init 0x01
331 02:34:30.454318 bl2_stage_init 0x81
332 02:34:30.458555 hw id: 0x0000 - pwm id 0x01
333 02:34:30.459042 bl2_stage_init 0xc1
334 02:34:30.459498 bl2_stage_init 0x02
335 02:34:30.459942
336 02:34:30.464259 L0:00000000
337 02:34:30.464755 L1:00000703
338 02:34:30.465204 L2:00008067
339 02:34:30.465642 L3:15000000
340 02:34:30.466079 S1:00000000
341 02:34:30.469850 B2:20282000
342 02:34:30.470344 B1:a0f83180
343 02:34:30.470793
344 02:34:30.471236 TE: 72923
345 02:34:30.471677
346 02:34:30.475635 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 02:34:30.476144
348 02:34:30.481014 Board ID = 1
349 02:34:30.481485 Set cpu clk to 24M
350 02:34:30.481930 Set clk81 to 24M
351 02:34:30.486534 Use GP1_pll as DSU clk.
352 02:34:30.487007 DSU clk: 1200 Mhz
353 02:34:30.487449 CPU clk: 1200 MHz
354 02:34:30.487883 Set clk81 to 166.6M
355 02:34:30.497822 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 02:34:30.498305 board id: 1
357 02:34:30.504171 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:34:30.514814 fw parse done
359 02:34:30.520755 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:34:30.563674 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:34:30.574363 PIEI prepare done
362 02:34:30.574837 fastboot data load
363 02:34:30.575288 fastboot data verify
364 02:34:30.579944 verify result: 266
365 02:34:30.585528 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 02:34:30.586000 LPDDR4 probe
367 02:34:30.586441 ddr clk to 1584MHz
368 02:34:30.593621 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:34:30.630775
370 02:34:30.631260 dmc_version 0001
371 02:34:30.637540 Check phy result
372 02:34:30.643421 INFO : End of CA training
373 02:34:30.643887 INFO : End of initialization
374 02:34:30.649048 INFO : Training has run successfully!
375 02:34:30.649517 Check phy result
376 02:34:30.654585 INFO : End of initialization
377 02:34:30.655053 INFO : End of read enable training
378 02:34:30.657906 INFO : End of fine write leveling
379 02:34:30.663565 INFO : End of Write leveling coarse delay
380 02:34:30.669032 INFO : Training has run successfully!
381 02:34:30.669501 Check phy result
382 02:34:30.669941 INFO : End of initialization
383 02:34:30.674658 INFO : End of read dq deskew training
384 02:34:30.680304 INFO : End of MPR read delay center optimization
385 02:34:30.680778 INFO : End of write delay center optimization
386 02:34:30.685849 INFO : End of read delay center optimization
387 02:34:30.691532 INFO : End of max read latency training
388 02:34:30.692027 INFO : Training has run successfully!
389 02:34:30.697040 1D training succeed
390 02:34:30.703066 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:34:30.750673 Check phy result
392 02:34:30.751147 INFO : End of initialization
393 02:34:30.772909 INFO : End of 2D read delay Voltage center optimization
394 02:34:30.792084 INFO : End of 2D read delay Voltage center optimization
395 02:34:30.843968 INFO : End of 2D write delay Voltage center optimization
396 02:34:30.893095 INFO : End of 2D write delay Voltage center optimization
397 02:34:30.898703 INFO : Training has run successfully!
398 02:34:30.899177
399 02:34:30.899643 channel==0
400 02:34:30.904347 RxClkDly_Margin_A0==78 ps 8
401 02:34:30.904817 TxDqDly_Margin_A0==98 ps 10
402 02:34:30.909831 RxClkDly_Margin_A1==78 ps 8
403 02:34:30.910295 TxDqDly_Margin_A1==88 ps 9
404 02:34:30.910744 TrainedVREFDQ_A0==74
405 02:34:30.915605 TrainedVREFDQ_A1==74
406 02:34:30.916103 VrefDac_Margin_A0==23
407 02:34:30.916553 DeviceVref_Margin_A0==40
408 02:34:30.921121 VrefDac_Margin_A1==22
409 02:34:30.921582 DeviceVref_Margin_A1==40
410 02:34:30.922024
411 02:34:30.922462
412 02:34:30.922901 channel==1
413 02:34:30.926713 RxClkDly_Margin_A0==78 ps 8
414 02:34:30.927184 TxDqDly_Margin_A0==98 ps 10
415 02:34:30.932285 RxClkDly_Margin_A1==78 ps 8
416 02:34:30.932795 TxDqDly_Margin_A1==88 ps 9
417 02:34:30.937908 TrainedVREFDQ_A0==78
418 02:34:30.938391 TrainedVREFDQ_A1==75
419 02:34:30.938846 VrefDac_Margin_A0==22
420 02:34:30.943606 DeviceVref_Margin_A0==36
421 02:34:30.944111 VrefDac_Margin_A1==20
422 02:34:30.949044 DeviceVref_Margin_A1==38
423 02:34:30.949513
424 02:34:30.949968 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:34:30.950413
426 02:34:30.982638 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
427 02:34:30.983204 2D training succeed
428 02:34:30.988213 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:34:30.993800 auto size-- 65535DDR cs0 size: 2048MB
430 02:34:30.994276 DDR cs1 size: 2048MB
431 02:34:30.999570 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:34:31.000079 cs0 DataBus test pass
433 02:34:31.005032 cs1 DataBus test pass
434 02:34:31.005504 cs0 AddrBus test pass
435 02:34:31.005956 cs1 AddrBus test pass
436 02:34:31.006398
437 02:34:31.010629 100bdlr_step_size ps== 478
438 02:34:31.011115 result report
439 02:34:31.016229 boot times 0Enable ddr reg access
440 02:34:31.021450 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:34:31.035266 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 02:34:31.690992 bl2z: ptr: 05129330, size: 00001e40
443 02:34:31.697494 0.0;M3 CHK:0;cm4_sp_mode 0
444 02:34:31.697992 MVN_1=0x00000000
445 02:34:31.698446 MVN_2=0x00000000
446 02:34:31.709014 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 02:34:31.709491 OPS=0x04
448 02:34:31.709943 ring efuse init
449 02:34:31.711967 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 02:34:31.718146 [0.017319 Inits done]
451 02:34:31.718616 secure task start!
452 02:34:31.719061 high task start!
453 02:34:31.719501 low task start!
454 02:34:31.722515 run into bl31
455 02:34:31.731081 NOTICE: BL31: v1.3(release):4fc40b1
456 02:34:31.738890 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 02:34:31.739369 NOTICE: BL31: G12A normal boot!
458 02:34:31.754396 NOTICE: BL31: BL33 decompress pass
459 02:34:31.760200 ERROR: Error initializing runtime service opteed_fast
460 02:34:34.499690 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 02:34:34.500163 bl2_stage_init 0x01
462 02:34:34.500398 bl2_stage_init 0x81
463 02:34:34.505207 hw id: 0x0000 - pwm id 0x01
464 02:34:34.505588 bl2_stage_init 0xc1
465 02:34:34.510842 bl2_stage_init 0x02
466 02:34:34.511291
467 02:34:34.511697 L0:00000000
468 02:34:34.512137 L1:00000703
469 02:34:34.512578 L2:00008067
470 02:34:34.513005 L3:15000000
471 02:34:34.516411 S1:00000000
472 02:34:34.516877 B2:20282000
473 02:34:34.517312 B1:a0f83180
474 02:34:34.517739
475 02:34:34.518171 TE: 70371
476 02:34:34.518600
477 02:34:34.522072 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 02:34:34.522539
479 02:34:34.527622 Board ID = 1
480 02:34:34.528117 Set cpu clk to 24M
481 02:34:34.528553 Set clk81 to 24M
482 02:34:34.533197 Use GP1_pll as DSU clk.
483 02:34:34.533656 DSU clk: 1200 Mhz
484 02:34:34.534089 CPU clk: 1200 MHz
485 02:34:34.538779 Set clk81 to 166.6M
486 02:34:34.544497 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 02:34:34.544959 board id: 1
488 02:34:34.551510 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 02:34:34.562177 fw parse done
490 02:34:34.568172 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 02:34:34.610829 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 02:34:34.621648 PIEI prepare done
493 02:34:34.622102 fastboot data load
494 02:34:34.622533 fastboot data verify
495 02:34:34.627344 verify result: 266
496 02:34:34.632914 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 02:34:34.633382 LPDDR4 probe
498 02:34:34.633811 ddr clk to 1584MHz
499 02:34:34.640948 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 02:34:34.678236
501 02:34:34.678703 dmc_version 0001
502 02:34:34.685019 Check phy result
503 02:34:34.690930 INFO : End of CA training
504 02:34:34.691400 INFO : End of initialization
505 02:34:34.696433 INFO : Training has run successfully!
506 02:34:34.696923 Check phy result
507 02:34:34.702125 INFO : End of initialization
508 02:34:34.702596 INFO : End of read enable training
509 02:34:34.705300 INFO : End of fine write leveling
510 02:34:34.710845 INFO : End of Write leveling coarse delay
511 02:34:34.716469 INFO : Training has run successfully!
512 02:34:34.716938 Check phy result
513 02:34:34.717384 INFO : End of initialization
514 02:34:34.722156 INFO : End of read dq deskew training
515 02:34:34.725515 INFO : End of MPR read delay center optimization
516 02:34:34.731108 INFO : End of write delay center optimization
517 02:34:34.736648 INFO : End of read delay center optimization
518 02:34:34.737120 INFO : End of max read latency training
519 02:34:34.742253 INFO : Training has run successfully!
520 02:34:34.742747 1D training succeed
521 02:34:34.750406 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 02:34:34.797913 Check phy result
523 02:34:34.798396 INFO : End of initialization
524 02:34:34.820249 INFO : End of 2D read delay Voltage center optimization
525 02:34:34.839407 INFO : End of 2D read delay Voltage center optimization
526 02:34:34.891285 INFO : End of 2D write delay Voltage center optimization
527 02:34:34.940488 INFO : End of 2D write delay Voltage center optimization
528 02:34:34.946084 INFO : Training has run successfully!
529 02:34:34.946565
530 02:34:34.947019 channel==0
531 02:34:34.951642 RxClkDly_Margin_A0==78 ps 8
532 02:34:34.952160 TxDqDly_Margin_A0==98 ps 10
533 02:34:34.957243 RxClkDly_Margin_A1==88 ps 9
534 02:34:34.957714 TxDqDly_Margin_A1==88 ps 9
535 02:34:34.958164 TrainedVREFDQ_A0==74
536 02:34:34.962862 TrainedVREFDQ_A1==74
537 02:34:34.963362 VrefDac_Margin_A0==23
538 02:34:34.963816 DeviceVref_Margin_A0==40
539 02:34:34.968451 VrefDac_Margin_A1==22
540 02:34:34.968931 DeviceVref_Margin_A1==40
541 02:34:34.969380
542 02:34:34.969823
543 02:34:34.970265 channel==1
544 02:34:34.974069 RxClkDly_Margin_A0==78 ps 8
545 02:34:34.974544 TxDqDly_Margin_A0==88 ps 9
546 02:34:34.979625 RxClkDly_Margin_A1==78 ps 8
547 02:34:34.980126 TxDqDly_Margin_A1==88 ps 9
548 02:34:34.985247 TrainedVREFDQ_A0==75
549 02:34:34.985722 TrainedVREFDQ_A1==77
550 02:34:34.986169 VrefDac_Margin_A0==22
551 02:34:34.990871 DeviceVref_Margin_A0==39
552 02:34:34.991363 VrefDac_Margin_A1==22
553 02:34:34.991819 DeviceVref_Margin_A1==37
554 02:34:34.996444
555 02:34:34.996925 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 02:34:34.997374
557 02:34:35.030109 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
558 02:34:35.030681 2D training succeed
559 02:34:35.035613 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 02:34:35.041237 auto size-- 65535DDR cs0 size: 2048MB
561 02:34:35.041728 DDR cs1 size: 2048MB
562 02:34:35.046808 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 02:34:35.047282 cs0 DataBus test pass
564 02:34:35.052472 cs1 DataBus test pass
565 02:34:35.052942 cs0 AddrBus test pass
566 02:34:35.053384 cs1 AddrBus test pass
567 02:34:35.053825
568 02:34:35.058080 100bdlr_step_size ps== 478
569 02:34:35.058561 result report
570 02:34:35.063643 boot times 0Enable ddr reg access
571 02:34:35.068732 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 02:34:35.082575 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 02:34:35.738580 bl2z: ptr: 05129330, size: 00001e40
574 02:34:35.744968 0.0;M3 CHK:0;cm4_sp_mode 0
575 02:34:35.745473 MVN_1=0x00000000
576 02:34:35.745923 MVN_2=0x00000000
577 02:34:35.756428 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 02:34:35.756909 OPS=0x04
579 02:34:35.757359 ring efuse init
580 02:34:35.762100 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 02:34:35.762585 [0.017319 Inits done]
582 02:34:35.763032 secure task start!
583 02:34:35.769679 high task start!
584 02:34:35.770162 low task start!
585 02:34:35.770609 run into bl31
586 02:34:35.778292 NOTICE: BL31: v1.3(release):4fc40b1
587 02:34:35.786238 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 02:34:35.786727 NOTICE: BL31: G12A normal boot!
589 02:34:35.801691 NOTICE: BL31: BL33 decompress pass
590 02:34:35.807380 ERROR: Error initializing runtime service opteed_fast
591 02:34:37.200006 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 02:34:37.200641 bl2_stage_init 0x01
593 02:34:37.201100 bl2_stage_init 0x81
594 02:34:37.205562 hw id: 0x0000 - pwm id 0x01
595 02:34:37.206045 bl2_stage_init 0xc1
596 02:34:37.210341 bl2_stage_init 0x02
597 02:34:37.210813
598 02:34:37.211260 L0:00000000
599 02:34:37.211699 L1:00000703
600 02:34:37.212171 L2:00008067
601 02:34:37.215880 L3:15000000
602 02:34:37.216384 S1:00000000
603 02:34:37.216830 B2:20282000
604 02:34:37.217270 B1:a0f83180
605 02:34:37.217705
606 02:34:37.218143 TE: 69222
607 02:34:37.218578
608 02:34:37.227086 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 02:34:37.227576
610 02:34:37.228054 Board ID = 1
611 02:34:37.228515 Set cpu clk to 24M
612 02:34:37.228958 Set clk81 to 24M
613 02:34:37.230396 Use GP1_pll as DSU clk.
614 02:34:37.236082 DSU clk: 1200 Mhz
615 02:34:37.236562 CPU clk: 1200 MHz
616 02:34:37.237014 Set clk81 to 166.6M
617 02:34:37.241598 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 02:34:37.242081 board id: 1
619 02:34:37.250933 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 02:34:37.262623 fw parse done
621 02:34:37.268562 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 02:34:37.311366 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 02:34:37.322202 PIEI prepare done
624 02:34:37.322686 fastboot data load
625 02:34:37.323138 fastboot data verify
626 02:34:37.327781 verify result: 266
627 02:34:37.333405 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 02:34:37.333880 LPDDR4 probe
629 02:34:37.334326 ddr clk to 1584MHz
630 02:34:37.341489 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 02:34:37.378625
632 02:34:37.379140 dmc_version 0001
633 02:34:37.385683 Check phy result
634 02:34:37.391168 INFO : End of CA training
635 02:34:37.391648 INFO : End of initialization
636 02:34:37.396792 INFO : Training has run successfully!
637 02:34:37.397275 Check phy result
638 02:34:37.402372 INFO : End of initialization
639 02:34:37.402846 INFO : End of read enable training
640 02:34:37.407946 INFO : End of fine write leveling
641 02:34:37.413571 INFO : End of Write leveling coarse delay
642 02:34:37.414044 INFO : Training has run successfully!
643 02:34:37.414490 Check phy result
644 02:34:37.419163 INFO : End of initialization
645 02:34:37.419634 INFO : End of read dq deskew training
646 02:34:37.424758 INFO : End of MPR read delay center optimization
647 02:34:37.430453 INFO : End of write delay center optimization
648 02:34:37.435970 INFO : End of read delay center optimization
649 02:34:37.436481 INFO : End of max read latency training
650 02:34:37.441577 INFO : Training has run successfully!
651 02:34:37.442049 1D training succeed
652 02:34:37.450753 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 02:34:37.498445 Check phy result
654 02:34:37.498939 INFO : End of initialization
655 02:34:37.520697 INFO : End of 2D read delay Voltage center optimization
656 02:34:37.539825 INFO : End of 2D read delay Voltage center optimization
657 02:34:37.591745 INFO : End of 2D write delay Voltage center optimization
658 02:34:37.640866 INFO : End of 2D write delay Voltage center optimization
659 02:34:37.646464 INFO : Training has run successfully!
660 02:34:37.646936
661 02:34:37.647383 channel==0
662 02:34:37.652071 RxClkDly_Margin_A0==78 ps 8
663 02:34:37.652551 TxDqDly_Margin_A0==98 ps 10
664 02:34:37.655444 RxClkDly_Margin_A1==69 ps 7
665 02:34:37.655920 TxDqDly_Margin_A1==88 ps 9
666 02:34:37.660962 TrainedVREFDQ_A0==74
667 02:34:37.661438 TrainedVREFDQ_A1==74
668 02:34:37.661887 VrefDac_Margin_A0==24
669 02:34:37.666573 DeviceVref_Margin_A0==40
670 02:34:37.667040 VrefDac_Margin_A1==23
671 02:34:37.672168 DeviceVref_Margin_A1==40
672 02:34:37.672648
673 02:34:37.673100
674 02:34:37.673542 channel==1
675 02:34:37.673977 RxClkDly_Margin_A0==78 ps 8
676 02:34:37.677756 TxDqDly_Margin_A0==98 ps 10
677 02:34:37.678236 RxClkDly_Margin_A1==78 ps 8
678 02:34:37.683413 TxDqDly_Margin_A1==88 ps 9
679 02:34:37.683891 TrainedVREFDQ_A0==78
680 02:34:37.684373 TrainedVREFDQ_A1==78
681 02:34:37.689036 VrefDac_Margin_A0==22
682 02:34:37.689509 DeviceVref_Margin_A0==36
683 02:34:37.694568 VrefDac_Margin_A1==20
684 02:34:37.695037 DeviceVref_Margin_A1==36
685 02:34:37.695484
686 02:34:37.700194 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 02:34:37.700668
688 02:34:37.728197 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 02:34:37.733763 2D training succeed
690 02:34:37.739422 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 02:34:37.739903 auto size-- 65535DDR cs0 size: 2048MB
692 02:34:37.744957 DDR cs1 size: 2048MB
693 02:34:37.745440 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 02:34:37.750564 cs0 DataBus test pass
695 02:34:37.751052 cs1 DataBus test pass
696 02:34:37.751500 cs0 AddrBus test pass
697 02:34:37.756198 cs1 AddrBus test pass
698 02:34:37.756667
699 02:34:37.757119 100bdlr_step_size ps== 478
700 02:34:37.757572 result report
701 02:34:37.761772 boot times 0Enable ddr reg access
702 02:34:37.769249 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 02:34:37.783049 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 02:34:38.437810 bl2z: ptr: 05129330, size: 00001e40
705 02:34:38.443208 0.0;M3 CHK:0;cm4_sp_mode 0
706 02:34:38.443704 MVN_1=0x00000000
707 02:34:38.444216 MVN_2=0x00000000
708 02:34:38.454696 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 02:34:38.455184 OPS=0x04
710 02:34:38.455638 ring efuse init
711 02:34:38.460305 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 02:34:38.460793 [0.017319 Inits done]
713 02:34:38.461239 secure task start!
714 02:34:38.467884 high task start!
715 02:34:38.468390 low task start!
716 02:34:38.468840 run into bl31
717 02:34:38.476533 NOTICE: BL31: v1.3(release):4fc40b1
718 02:34:38.484356 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 02:34:38.484841 NOTICE: BL31: G12A normal boot!
720 02:34:38.499792 NOTICE: BL31: BL33 decompress pass
721 02:34:38.505429 ERROR: Error initializing runtime service opteed_fast
722 02:34:39.300895
723 02:34:39.301569
724 02:34:39.306329 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 02:34:39.306943
726 02:34:39.309749 Model: Libre Computer AML-S905D3-CC Solitude
727 02:34:39.456992 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 02:34:39.472258 DRAM: 2 GiB (effective 3.8 GiB)
729 02:34:39.573293 Core: 406 devices, 33 uclasses, devicetree: separate
730 02:34:39.579221 WDT: Not starting watchdog@f0d0
731 02:34:39.604091 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 02:34:39.616465 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 02:34:39.621242 ** Bad device specification mmc 0 **
734 02:34:39.631323 Card did not respond to voltage select! : -110
735 02:34:39.638949 ** Bad device specification mmc 0 **
736 02:34:39.639622 Couldn't find partition mmc 0
737 02:34:39.647224 Card did not respond to voltage select! : -110
738 02:34:39.652672 ** Bad device specification mmc 0 **
739 02:34:39.653011 Couldn't find partition mmc 0
740 02:34:39.657724 Error: could not access storage.
741 02:34:39.954394 Net: eth0: ethernet@ff3f0000
742 02:34:39.955090 starting USB...
743 02:34:40.199209 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 02:34:40.199880 Starting the controller
745 02:34:40.206064 USB XHCI 1.10
746 02:34:41.762710 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 02:34:41.771064 scanning usb for storage devices... 0 Storage Device(s) found
749 02:34:41.822711 Hit any key to stop autoboot: 1
750 02:34:41.823585 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 02:34:41.824264 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 02:34:41.824794 Setting prompt string to ['=>']
753 02:34:41.825327 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 02:34:41.837020 0
755 02:34:41.837981 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 02:34:41.939298 => setenv autoload no
758 02:34:41.940059 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 02:34:41.945285 setenv autoload no
761 02:34:42.046824 => setenv initrd_high 0xffffffff
762 02:34:42.047489 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 02:34:42.052056 setenv initrd_high 0xffffffff
765 02:34:42.153588 => setenv fdt_high 0xffffffff
766 02:34:42.154560 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 02:34:42.159113 setenv fdt_high 0xffffffff
769 02:34:42.260730 => dhcp
770 02:34:42.261655 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 02:34:42.264811 dhcp
772 02:34:42.821287 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 02:34:42.821889 Speed: 1000, full duplex
774 02:34:42.822358 BOOTP broadcast 1
775 02:34:43.070021 BOOTP broadcast 2
776 02:34:43.083639 DHCP client bound to address 192.168.6.21 (262 ms)
778 02:34:43.185306 => setenv serverip 192.168.6.2
779 02:34:43.186288 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
780 02:34:43.190657 setenv serverip 192.168.6.2
782 02:34:43.292171 => tftpboot 0x01080000 943558/tftp-deploy-uzghnw0c/kernel/uImage
783 02:34:43.293081 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
784 02:34:43.299609 tftpboot 0x01080000 943558/tftp-deploy-uzghnw0c/kernel/uImage
785 02:34:43.300199 Speed: 1000, full duplex
786 02:34:43.300664 Using ethernet@ff3f0000 device
787 02:34:43.305048 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 02:34:43.310646 Filename '943558/tftp-deploy-uzghnw0c/kernel/uImage'.
789 02:34:43.314548 Load address: 0x1080000
790 02:34:46.207054 Loading: *################################################## 43.7 MiB
791 02:34:46.207732 15.1 MiB/s
792 02:34:46.208262 done
793 02:34:46.211452 Bytes transferred = 45779520 (2ba8a40 hex)
795 02:34:46.313012 => tftpboot 0x08000000 943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot
796 02:34:46.313721 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
797 02:34:46.320526 tftpboot 0x08000000 943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot
798 02:34:46.321036 Speed: 1000, full duplex
799 02:34:46.321474 Using ethernet@ff3f0000 device
800 02:34:46.325998 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 02:34:46.334705 Filename '943558/tftp-deploy-uzghnw0c/ramdisk/ramdisk.cpio.gz.uboot'.
802 02:34:46.335183 Load address: 0x8000000
803 02:34:47.739652 Loading: *################################################# UDP wrong checksum 00000005 0000ca0b
804 02:34:52.741197 T UDP wrong checksum 00000005 0000ca0b
805 02:35:02.743210 T T UDP wrong checksum 00000005 0000ca0b
806 02:35:22.747208 T T T T UDP wrong checksum 00000005 0000ca0b
807 02:35:42.751893 T T T
808 02:35:42.752613 Retry count exceeded; starting again
810 02:35:42.754114 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
813 02:35:42.756198 end: 2.4 uboot-commands (duration 00:01:20) [common]
815 02:35:42.757747 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
817 02:35:42.758862 end: 2 uboot-action (duration 00:01:20) [common]
819 02:35:42.760550 Cleaning after the job
820 02:35:42.761138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/ramdisk
821 02:35:42.762650 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/kernel
822 02:35:42.811003 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/dtb
823 02:35:42.811831 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/nfsrootfs
824 02:35:43.128575 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943558/tftp-deploy-uzghnw0c/modules
825 02:35:43.152038 start: 4.1 power-off (timeout 00:00:30) [common]
826 02:35:43.152705 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
827 02:35:43.187673 >> OK - accepted request
828 02:35:43.189953 Returned 0 in 0 seconds
829 02:35:43.290840 end: 4.1 power-off (duration 00:00:00) [common]
831 02:35:43.291887 start: 4.2 read-feedback (timeout 00:10:00) [common]
832 02:35:43.292794 Listened to connection for namespace 'common' for up to 1s
833 02:35:44.293567 Finalising connection for namespace 'common'
834 02:35:44.294067 Disconnecting from shell: Finalise
835 02:35:44.294358 =>
836 02:35:44.395055 end: 4.2 read-feedback (duration 00:00:01) [common]
837 02:35:44.395545 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/943558
838 02:35:47.016761 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/943558
839 02:35:47.017411 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.