Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:01:40.169587 lava-dispatcher, installed at version: 2024.01
2 03:01:40.170376 start: 0 validate
3 03:01:40.170856 Start time: 2024-11-06 03:01:40.170823+00:00 (UTC)
4 03:01:40.171408 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:01:40.171951 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:01:40.208645 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:01:40.209190 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:01:40.242498 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:01:40.243104 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:01:40.272635 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:01:40.273134 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:01:40.305236 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:01:40.305757 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fclk%2Fclk-next%2Fclk-fixes-for-linus-88-g768e1bffbc355%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:01:40.340389 validate duration: 0.17
16 03:01:40.341279 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:01:40.341619 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:01:40.341944 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:01:40.342544 Not decompressing ramdisk as can be used compressed.
20 03:01:40.343007 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 03:01:40.343294 saving as /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/ramdisk/initrd.cpio.gz
22 03:01:40.343576 total size: 5628140 (5 MB)
23 03:01:40.377250 progress 0 % (0 MB)
24 03:01:40.381582 progress 5 % (0 MB)
25 03:01:40.386149 progress 10 % (0 MB)
26 03:01:40.390084 progress 15 % (0 MB)
27 03:01:40.394692 progress 20 % (1 MB)
28 03:01:40.398575 progress 25 % (1 MB)
29 03:01:40.403027 progress 30 % (1 MB)
30 03:01:40.407486 progress 35 % (1 MB)
31 03:01:40.411625 progress 40 % (2 MB)
32 03:01:40.416119 progress 45 % (2 MB)
33 03:01:40.420141 progress 50 % (2 MB)
34 03:01:40.424540 progress 55 % (2 MB)
35 03:01:40.428957 progress 60 % (3 MB)
36 03:01:40.432959 progress 65 % (3 MB)
37 03:01:40.437451 progress 70 % (3 MB)
38 03:01:40.441587 progress 75 % (4 MB)
39 03:01:40.445772 progress 80 % (4 MB)
40 03:01:40.449539 progress 85 % (4 MB)
41 03:01:40.453725 progress 90 % (4 MB)
42 03:01:40.457758 progress 95 % (5 MB)
43 03:01:40.461136 progress 100 % (5 MB)
44 03:01:40.461826 5 MB downloaded in 0.12 s (45.40 MB/s)
45 03:01:40.462424 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:01:40.463362 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:01:40.463684 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:01:40.463994 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:01:40.464517 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/kernel/Image
51 03:01:40.464792 saving as /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/kernel/Image
52 03:01:40.465019 total size: 45779456 (43 MB)
53 03:01:40.465245 No compression specified
54 03:01:40.506471 progress 0 % (0 MB)
55 03:01:40.534705 progress 5 % (2 MB)
56 03:01:40.563344 progress 10 % (4 MB)
57 03:01:40.591300 progress 15 % (6 MB)
58 03:01:40.619317 progress 20 % (8 MB)
59 03:01:40.647516 progress 25 % (10 MB)
60 03:01:40.675763 progress 30 % (13 MB)
61 03:01:40.703475 progress 35 % (15 MB)
62 03:01:40.731447 progress 40 % (17 MB)
63 03:01:40.759489 progress 45 % (19 MB)
64 03:01:40.787999 progress 50 % (21 MB)
65 03:01:40.815716 progress 55 % (24 MB)
66 03:01:40.843877 progress 60 % (26 MB)
67 03:01:40.872287 progress 65 % (28 MB)
68 03:01:40.900122 progress 70 % (30 MB)
69 03:01:40.928327 progress 75 % (32 MB)
70 03:01:40.956405 progress 80 % (34 MB)
71 03:01:40.985106 progress 85 % (37 MB)
72 03:01:41.013248 progress 90 % (39 MB)
73 03:01:41.041369 progress 95 % (41 MB)
74 03:01:41.070202 progress 100 % (43 MB)
75 03:01:41.070787 43 MB downloaded in 0.61 s (72.07 MB/s)
76 03:01:41.071276 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:01:41.072144 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:01:41.072433 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:01:41.072704 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:01:41.073189 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:01:41.073474 saving as /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:01:41.073682 total size: 54703 (0 MB)
84 03:01:41.073893 No compression specified
85 03:01:41.109092 progress 59 % (0 MB)
86 03:01:41.109974 progress 100 % (0 MB)
87 03:01:41.110524 0 MB downloaded in 0.04 s (1.42 MB/s)
88 03:01:41.110998 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:01:41.111819 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:01:41.112124 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:01:41.112398 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:01:41.112867 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 03:01:41.113114 saving as /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/nfsrootfs/full.rootfs.tar
95 03:01:41.113319 total size: 474398908 (452 MB)
96 03:01:41.113530 Using unxz to decompress xz
97 03:01:41.158956 progress 0 % (0 MB)
98 03:01:42.258950 progress 5 % (22 MB)
99 03:01:43.727372 progress 10 % (45 MB)
100 03:01:44.183707 progress 15 % (67 MB)
101 03:01:44.991835 progress 20 % (90 MB)
102 03:01:45.539723 progress 25 % (113 MB)
103 03:01:45.904544 progress 30 % (135 MB)
104 03:01:46.516214 progress 35 % (158 MB)
105 03:01:47.384975 progress 40 % (181 MB)
106 03:01:48.145376 progress 45 % (203 MB)
107 03:01:48.750105 progress 50 % (226 MB)
108 03:01:49.439928 progress 55 % (248 MB)
109 03:01:50.654904 progress 60 % (271 MB)
110 03:01:52.132701 progress 65 % (294 MB)
111 03:01:53.780150 progress 70 % (316 MB)
112 03:01:56.887643 progress 75 % (339 MB)
113 03:01:59.321108 progress 80 % (361 MB)
114 03:02:02.251460 progress 85 % (384 MB)
115 03:02:05.752103 progress 90 % (407 MB)
116 03:02:08.966161 progress 95 % (429 MB)
117 03:02:12.667487 progress 100 % (452 MB)
118 03:02:12.680511 452 MB downloaded in 31.57 s (14.33 MB/s)
119 03:02:12.681133 end: 1.4.1 http-download (duration 00:00:32) [common]
121 03:02:12.681958 end: 1.4 download-retry (duration 00:00:32) [common]
122 03:02:12.682227 start: 1.5 download-retry (timeout 00:09:28) [common]
123 03:02:12.682492 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 03:02:12.683022 downloading http://storage.kernelci.org/clk/clk-next/clk-fixes-for-linus-88-g768e1bffbc355/arm64/defconfig/gcc-12/modules.tar.xz
125 03:02:12.683283 saving as /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/modules/modules.tar
126 03:02:12.683489 total size: 11613264 (11 MB)
127 03:02:12.683702 Using unxz to decompress xz
128 03:02:12.721027 progress 0 % (0 MB)
129 03:02:12.786889 progress 5 % (0 MB)
130 03:02:12.862047 progress 10 % (1 MB)
131 03:02:12.958529 progress 15 % (1 MB)
132 03:02:13.051210 progress 20 % (2 MB)
133 03:02:13.131348 progress 25 % (2 MB)
134 03:02:13.207761 progress 30 % (3 MB)
135 03:02:13.286952 progress 35 % (3 MB)
136 03:02:13.361247 progress 40 % (4 MB)
137 03:02:13.437993 progress 45 % (5 MB)
138 03:02:13.523314 progress 50 % (5 MB)
139 03:02:13.601797 progress 55 % (6 MB)
140 03:02:13.688402 progress 60 % (6 MB)
141 03:02:13.771137 progress 65 % (7 MB)
142 03:02:13.852914 progress 70 % (7 MB)
143 03:02:13.932699 progress 75 % (8 MB)
144 03:02:14.019844 progress 80 % (8 MB)
145 03:02:14.101399 progress 85 % (9 MB)
146 03:02:14.180879 progress 90 % (9 MB)
147 03:02:14.259827 progress 95 % (10 MB)
148 03:02:14.336991 progress 100 % (11 MB)
149 03:02:14.348849 11 MB downloaded in 1.67 s (6.65 MB/s)
150 03:02:14.349566 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:02:14.351199 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:02:14.351732 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 03:02:14.352328 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 03:02:30.951302 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/943585/extract-nfsrootfs-_fa9u11_
156 03:02:30.951901 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:02:30.952221 start: 1.6.2 lava-overlay (timeout 00:09:09) [common]
158 03:02:30.952912 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki
159 03:02:30.953357 makedir: /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin
160 03:02:30.953683 makedir: /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/tests
161 03:02:30.954011 makedir: /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/results
162 03:02:30.954344 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-add-keys
163 03:02:30.954857 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-add-sources
164 03:02:30.955353 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-background-process-start
165 03:02:30.955849 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-background-process-stop
166 03:02:30.956465 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-common-functions
167 03:02:30.957030 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-echo-ipv4
168 03:02:30.957571 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-install-packages
169 03:02:30.958068 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-installed-packages
170 03:02:30.958540 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-os-build
171 03:02:30.959050 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-probe-channel
172 03:02:30.959644 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-probe-ip
173 03:02:30.960210 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-target-ip
174 03:02:30.960700 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-target-mac
175 03:02:30.961175 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-target-storage
176 03:02:30.961656 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-case
177 03:02:30.962131 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-event
178 03:02:30.962601 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-feedback
179 03:02:30.963070 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-raise
180 03:02:30.963563 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-reference
181 03:02:30.964066 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-runner
182 03:02:30.964557 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-set
183 03:02:30.965030 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-test-shell
184 03:02:30.965511 Updating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-install-packages (oe)
185 03:02:30.966039 Updating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/bin/lava-installed-packages (oe)
186 03:02:30.966474 Creating /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/environment
187 03:02:30.966841 LAVA metadata
188 03:02:30.967098 - LAVA_JOB_ID=943585
189 03:02:30.967314 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:02:30.967677 start: 1.6.2.1 ssh-authorize (timeout 00:09:09) [common]
191 03:02:30.968659 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:02:30.968982 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:09) [common]
193 03:02:30.969191 skipped lava-vland-overlay
194 03:02:30.969433 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:02:30.969690 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:09) [common]
196 03:02:30.969909 skipped lava-multinode-overlay
197 03:02:30.970151 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:02:30.970403 start: 1.6.2.4 test-definition (timeout 00:09:09) [common]
199 03:02:30.970651 Loading test definitions
200 03:02:30.970928 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:09) [common]
201 03:02:30.971147 Using /lava-943585 at stage 0
202 03:02:30.972360 uuid=943585_1.6.2.4.1 testdef=None
203 03:02:30.972691 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:02:30.972957 start: 1.6.2.4.2 test-overlay (timeout 00:09:09) [common]
205 03:02:30.974777 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:02:30.975577 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:09) [common]
208 03:02:30.977754 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:02:30.978584 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:09) [common]
211 03:02:30.980665 runner path: /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 943585_1.6.2.4.1
212 03:02:30.981254 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:02:30.982005 Creating lava-test-runner.conf files
215 03:02:30.982216 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/943585/lava-overlay-phr59kki/lava-943585/0 for stage 0
216 03:02:30.982573 - 0_v4l2-decoder-conformance-vp9
217 03:02:30.982937 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:02:30.983222 start: 1.6.2.5 compress-overlay (timeout 00:09:09) [common]
219 03:02:31.005169 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:02:31.005551 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:09) [common]
221 03:02:31.005812 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:02:31.006083 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:02:31.006345 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:09) [common]
224 03:02:31.714167 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:02:31.714751 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 03:02:31.715098 extracting modules file /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943585/extract-nfsrootfs-_fa9u11_
227 03:02:33.069300 extracting modules file /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943585/extract-overlay-ramdisk-u5592eob/ramdisk
228 03:02:34.516983 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:02:34.517499 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 03:02:34.517789 [common] Applying overlay to NFS
231 03:02:34.518011 [common] Applying overlay /var/lib/lava/dispatcher/tmp/943585/compress-overlay-glk8odbs/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/943585/extract-nfsrootfs-_fa9u11_
232 03:02:34.548112 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:02:34.548592 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 03:02:34.548877 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 03:02:34.549132 Converting downloaded kernel to a uImage
236 03:02:34.549480 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/kernel/Image /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/kernel/uImage
237 03:02:35.108310 output: Image Name:
238 03:02:35.108800 output: Created: Wed Nov 6 03:02:34 2024
239 03:02:35.109058 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:02:35.109308 output: Data Size: 45779456 Bytes = 44706.50 KiB = 43.66 MiB
241 03:02:35.109554 output: Load Address: 01080000
242 03:02:35.109796 output: Entry Point: 01080000
243 03:02:35.110035 output:
244 03:02:35.110428 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 03:02:35.110757 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 03:02:35.111088 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 03:02:35.111397 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:02:35.111716 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 03:02:35.112056 Building ramdisk /var/lib/lava/dispatcher/tmp/943585/extract-overlay-ramdisk-u5592eob/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/943585/extract-overlay-ramdisk-u5592eob/ramdisk
250 03:02:37.397480 >> 166772 blocks
251 03:02:45.158217 Adding RAMdisk u-boot header.
252 03:02:45.158876 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/943585/extract-overlay-ramdisk-u5592eob/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/943585/extract-overlay-ramdisk-u5592eob/ramdisk.cpio.gz.uboot
253 03:02:45.417045 output: Image Name:
254 03:02:45.417467 output: Created: Wed Nov 6 03:02:45 2024
255 03:02:45.417685 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:02:45.417895 output: Data Size: 23427773 Bytes = 22878.68 KiB = 22.34 MiB
257 03:02:45.418096 output: Load Address: 00000000
258 03:02:45.418294 output: Entry Point: 00000000
259 03:02:45.418493 output:
260 03:02:45.419122 rename /var/lib/lava/dispatcher/tmp/943585/extract-overlay-ramdisk-u5592eob/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot
261 03:02:45.419548 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 03:02:45.419838 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 03:02:45.420349 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 03:02:45.420859 No LXC device requested
265 03:02:45.421436 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:02:45.422002 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 03:02:45.422554 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:02:45.423009 Checking files for TFTP limit of 4294967296 bytes.
269 03:02:45.425951 end: 1 tftp-deploy (duration 00:01:05) [common]
270 03:02:45.426587 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:02:45.427167 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:02:45.427716 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:02:45.428435 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:02:45.429029 Using kernel file from prepare-kernel: 943585/tftp-deploy-pv1a10db/kernel/uImage
275 03:02:45.429721 substitutions:
276 03:02:45.430169 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:02:45.430609 - {DTB_ADDR}: 0x01070000
278 03:02:45.431048 - {DTB}: 943585/tftp-deploy-pv1a10db/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:02:45.431483 - {INITRD}: 943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot
280 03:02:45.431915 - {KERNEL_ADDR}: 0x01080000
281 03:02:45.432381 - {KERNEL}: 943585/tftp-deploy-pv1a10db/kernel/uImage
282 03:02:45.432814 - {LAVA_MAC}: None
283 03:02:45.433284 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/943585/extract-nfsrootfs-_fa9u11_
284 03:02:45.433721 - {NFS_SERVER_IP}: 192.168.6.2
285 03:02:45.434147 - {PRESEED_CONFIG}: None
286 03:02:45.434574 - {PRESEED_LOCAL}: None
287 03:02:45.435001 - {RAMDISK_ADDR}: 0x08000000
288 03:02:45.435424 - {RAMDISK}: 943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot
289 03:02:45.435848 - {ROOT_PART}: None
290 03:02:45.436330 - {ROOT}: None
291 03:02:45.436760 - {SERVER_IP}: 192.168.6.2
292 03:02:45.437184 - {TEE_ADDR}: 0x83000000
293 03:02:45.437608 - {TEE}: None
294 03:02:45.438034 Parsed boot commands:
295 03:02:45.438447 - setenv autoload no
296 03:02:45.438867 - setenv initrd_high 0xffffffff
297 03:02:45.439287 - setenv fdt_high 0xffffffff
298 03:02:45.439708 - dhcp
299 03:02:45.440161 - setenv serverip 192.168.6.2
300 03:02:45.440588 - tftpboot 0x01080000 943585/tftp-deploy-pv1a10db/kernel/uImage
301 03:02:45.441014 - tftpboot 0x08000000 943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot
302 03:02:45.441437 - tftpboot 0x01070000 943585/tftp-deploy-pv1a10db/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:02:45.441861 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/943585/extract-nfsrootfs-_fa9u11_,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:02:45.442299 - bootm 0x01080000 0x08000000 0x01070000
305 03:02:45.442844 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:02:45.444505 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:02:45.444973 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:02:45.459929 Setting prompt string to ['lava-test: # ']
310 03:02:45.461574 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:02:45.462228 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:02:45.462822 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:02:45.463397 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:02:45.464661 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:02:45.505902 >> OK - accepted request
316 03:02:45.508083 Returned 0 in 0 seconds
317 03:02:45.609262 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:02:45.611012 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:02:45.611633 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:02:45.612244 Setting prompt string to ['Hit any key to stop autoboot']
322 03:02:45.612755 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:02:45.614456 Trying 192.168.56.21...
324 03:02:45.614981 Connected to conserv1.
325 03:02:45.615442 Escape character is '^]'.
326 03:02:45.615902
327 03:02:45.616397 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 03:02:45.616860
329 03:02:56.983778 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 03:02:56.984492 bl2_stage_init 0x01
331 03:02:56.984954 bl2_stage_init 0x81
332 03:02:56.989454 hw id: 0x0000 - pwm id 0x01
333 03:02:56.989932 bl2_stage_init 0xc1
334 03:02:56.990381 bl2_stage_init 0x02
335 03:02:56.990810
336 03:02:56.994951 L0:00000000
337 03:02:56.995414 L1:20000703
338 03:02:56.995842 L2:00008067
339 03:02:56.996301 L3:14000000
340 03:02:56.997862 B2:00402000
341 03:02:56.998331 B1:e0f83180
342 03:02:56.998769
343 03:02:56.999197 TE: 58159
344 03:02:56.999630
345 03:02:57.009144 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 03:02:57.009616
347 03:02:57.010048 Board ID = 1
348 03:02:57.010466 Set A53 clk to 24M
349 03:02:57.010889 Set A73 clk to 24M
350 03:02:57.014554 Set clk81 to 24M
351 03:02:57.015011 A53 clk: 1200 MHz
352 03:02:57.015436 A73 clk: 1200 MHz
353 03:02:57.020208 CLK81: 166.6M
354 03:02:57.020659 smccc: 00012ab5
355 03:02:57.025905 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 03:02:57.026362 board id: 1
357 03:02:57.034617 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:02:57.044954 fw parse done
359 03:02:57.050933 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:02:57.093533 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:02:57.104425 PIEI prepare done
362 03:02:57.104871 fastboot data load
363 03:02:57.105299 fastboot data verify
364 03:02:57.110184 verify result: 266
365 03:02:57.115691 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 03:02:57.116185 LPDDR4 probe
367 03:02:57.116612 ddr clk to 1584MHz
368 03:02:57.123649 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:02:57.160962
370 03:02:57.161427 dmc_version 0001
371 03:02:57.167598 Check phy result
372 03:02:57.173456 INFO : End of CA training
373 03:02:57.173911 INFO : End of initialization
374 03:02:57.179145 INFO : Training has run successfully!
375 03:02:57.179599 Check phy result
376 03:02:57.184659 INFO : End of initialization
377 03:02:57.185126 INFO : End of read enable training
378 03:02:57.190270 INFO : End of fine write leveling
379 03:02:57.195836 INFO : End of Write leveling coarse delay
380 03:02:57.196319 INFO : Training has run successfully!
381 03:02:57.196749 Check phy result
382 03:02:57.201443 INFO : End of initialization
383 03:02:57.201904 INFO : End of read dq deskew training
384 03:02:57.207142 INFO : End of MPR read delay center optimization
385 03:02:57.212733 INFO : End of write delay center optimization
386 03:02:57.218309 INFO : End of read delay center optimization
387 03:02:57.218819 INFO : End of max read latency training
388 03:02:57.223936 INFO : Training has run successfully!
389 03:02:57.224470 1D training succeed
390 03:02:57.233107 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:02:57.280894 Check phy result
392 03:02:57.281523 INFO : End of initialization
393 03:02:57.302492 INFO : End of 2D read delay Voltage center optimization
394 03:02:57.322774 INFO : End of 2D read delay Voltage center optimization
395 03:02:57.374824 INFO : End of 2D write delay Voltage center optimization
396 03:02:57.424207 INFO : End of 2D write delay Voltage center optimization
397 03:02:57.429666 INFO : Training has run successfully!
398 03:02:57.430178
399 03:02:57.430608 channel==0
400 03:02:57.435280 RxClkDly_Margin_A0==88 ps 9
401 03:02:57.435782 TxDqDly_Margin_A0==98 ps 10
402 03:02:57.442192 RxClkDly_Margin_A1==88 ps 9
403 03:02:57.442753 TxDqDly_Margin_A1==88 ps 9
404 03:02:57.443224 TrainedVREFDQ_A0==74
405 03:02:57.446504 TrainedVREFDQ_A1==74
406 03:02:57.446991 VrefDac_Margin_A0==25
407 03:02:57.447393 DeviceVref_Margin_A0==40
408 03:02:57.452111 VrefDac_Margin_A1==25
409 03:02:57.452623 DeviceVref_Margin_A1==40
410 03:02:57.453021
411 03:02:57.453410
412 03:02:57.453800 channel==1
413 03:02:57.457631 RxClkDly_Margin_A0==98 ps 10
414 03:02:57.458137 TxDqDly_Margin_A0==98 ps 10
415 03:02:57.463302 RxClkDly_Margin_A1==88 ps 9
416 03:02:57.463769 TxDqDly_Margin_A1==88 ps 9
417 03:02:57.468861 TrainedVREFDQ_A0==77
418 03:02:57.469337 TrainedVREFDQ_A1==77
419 03:02:57.469738 VrefDac_Margin_A0==22
420 03:02:57.474502 DeviceVref_Margin_A0==37
421 03:02:57.475019 VrefDac_Margin_A1==24
422 03:02:57.480159 DeviceVref_Margin_A1==37
423 03:02:57.480677
424 03:02:57.481081 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:02:57.481473
426 03:02:57.513693 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 03:02:57.514486 2D training succeed
428 03:02:57.519308 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:02:57.524882 auto size-- 65535DDR cs0 size: 2048MB
430 03:02:57.525452 DDR cs1 size: 2048MB
431 03:02:57.530504 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:02:57.531050 cs0 DataBus test pass
433 03:02:57.536202 cs1 DataBus test pass
434 03:02:57.536746 cs0 AddrBus test pass
435 03:02:57.537181 cs1 AddrBus test pass
436 03:02:57.537617
437 03:02:57.541686 100bdlr_step_size ps== 420
438 03:02:57.542231 result report
439 03:02:57.547290 boot times 0Enable ddr reg access
440 03:02:57.552526 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:02:57.565994 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 03:02:58.139889 0.0;M3 CHK:0;cm4_sp_mode 0
443 03:02:58.141234 MVN_1=0x00000000
444 03:02:58.145363 MVN_2=0x00000000
445 03:02:58.151051 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 03:02:58.151838 OPS=0x10
447 03:02:58.152496 ring efuse init
448 03:02:58.152928 chipver efuse init
449 03:02:58.157729 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 03:02:58.162226 [0.018960 Inits done]
451 03:02:58.162748 secure task start!
452 03:02:58.163229 high task start!
453 03:02:58.166678 low task start!
454 03:02:58.167137 run into bl31
455 03:02:58.173585 NOTICE: BL31: v1.3(release):4fc40b1
456 03:02:58.181105 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 03:02:58.181702 NOTICE: BL31: G12A normal boot!
458 03:02:58.206573 NOTICE: BL31: BL33 decompress pass
459 03:02:58.212233 ERROR: Error initializing runtime service opteed_fast
460 03:02:59.445110
461 03:02:59.445715
462 03:02:59.453536 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 03:02:59.454019
464 03:02:59.454436 Model: Libre Computer AML-A311D-CC Alta
465 03:02:59.661948 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 03:02:59.685302 DRAM: 2 GiB (effective 3.8 GiB)
467 03:02:59.828347 Core: 408 devices, 31 uclasses, devicetree: separate
468 03:02:59.834127 WDT: Not starting watchdog@f0d0
469 03:02:59.866419 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 03:02:59.878903 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 03:02:59.883831 ** Bad device specification mmc 0 **
472 03:02:59.894192 Card did not respond to voltage select! : -110
473 03:02:59.901822 ** Bad device specification mmc 0 **
474 03:02:59.902286 Couldn't find partition mmc 0
475 03:02:59.910141 Card did not respond to voltage select! : -110
476 03:02:59.915667 ** Bad device specification mmc 0 **
477 03:02:59.916134 Couldn't find partition mmc 0
478 03:02:59.920728 Error: could not access storage.
479 03:03:01.184388 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 03:03:01.185043 bl2_stage_init 0x01
481 03:03:01.185501 bl2_stage_init 0x81
482 03:03:01.189850 hw id: 0x0000 - pwm id 0x01
483 03:03:01.190351 bl2_stage_init 0xc1
484 03:03:01.190801 bl2_stage_init 0x02
485 03:03:01.191262
486 03:03:01.195493 L0:00000000
487 03:03:01.196079 L1:20000703
488 03:03:01.196530 L2:00008067
489 03:03:01.196965 L3:14000000
490 03:03:01.201100 B2:00402000
491 03:03:01.201649 B1:e0f83180
492 03:03:01.202081
493 03:03:01.202511 TE: 58159
494 03:03:01.202940
495 03:03:01.206681 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 03:03:01.207196
497 03:03:01.207634 Board ID = 1
498 03:03:01.212246 Set A53 clk to 24M
499 03:03:01.212734 Set A73 clk to 24M
500 03:03:01.213169 Set clk81 to 24M
501 03:03:01.218042 A53 clk: 1200 MHz
502 03:03:01.218714 A73 clk: 1200 MHz
503 03:03:01.219198 CLK81: 166.6M
504 03:03:01.219635 smccc: 00012ab5
505 03:03:01.223502 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 03:03:01.229137 board id: 1
507 03:03:01.235084 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 03:03:01.245837 fw parse done
509 03:03:01.251555 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 03:03:01.294236 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 03:03:01.305390 PIEI prepare done
512 03:03:01.306005 fastboot data load
513 03:03:01.306482 fastboot data verify
514 03:03:01.310938 verify result: 266
515 03:03:01.316479 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 03:03:01.317121 LPDDR4 probe
517 03:03:01.317597 ddr clk to 1584MHz
518 03:03:01.324357 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 03:03:01.361716
520 03:03:01.362329 dmc_version 0001
521 03:03:01.368354 Check phy result
522 03:03:01.374207 INFO : End of CA training
523 03:03:01.374776 INFO : End of initialization
524 03:03:01.379818 INFO : Training has run successfully!
525 03:03:01.380395 Check phy result
526 03:03:01.385364 INFO : End of initialization
527 03:03:01.385870 INFO : End of read enable training
528 03:03:01.388707 INFO : End of fine write leveling
529 03:03:01.394305 INFO : End of Write leveling coarse delay
530 03:03:01.399951 INFO : Training has run successfully!
531 03:03:01.400574 Check phy result
532 03:03:01.401046 INFO : End of initialization
533 03:03:01.405539 INFO : End of read dq deskew training
534 03:03:01.411095 INFO : End of MPR read delay center optimization
535 03:03:01.411646 INFO : End of write delay center optimization
536 03:03:01.416742 INFO : End of read delay center optimization
537 03:03:01.422561 INFO : End of max read latency training
538 03:03:01.423125 INFO : Training has run successfully!
539 03:03:01.428131 1D training succeed
540 03:03:01.433895 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 03:03:01.481507 Check phy result
542 03:03:01.482144 INFO : End of initialization
543 03:03:01.503143 INFO : End of 2D read delay Voltage center optimization
544 03:03:01.523442 INFO : End of 2D read delay Voltage center optimization
545 03:03:01.575499 INFO : End of 2D write delay Voltage center optimization
546 03:03:01.624812 INFO : End of 2D write delay Voltage center optimization
547 03:03:01.630297 INFO : Training has run successfully!
548 03:03:01.630843
549 03:03:01.631343 channel==0
550 03:03:01.636521 RxClkDly_Margin_A0==88 ps 9
551 03:03:01.636875 TxDqDly_Margin_A0==98 ps 10
552 03:03:01.641929 RxClkDly_Margin_A1==88 ps 9
553 03:03:01.642418 TxDqDly_Margin_A1==98 ps 10
554 03:03:01.642633 TrainedVREFDQ_A0==74
555 03:03:01.647097 TrainedVREFDQ_A1==74
556 03:03:01.647679 VrefDac_Margin_A0==25
557 03:03:01.648312 DeviceVref_Margin_A0==40
558 03:03:01.652797 VrefDac_Margin_A1==25
559 03:03:01.653383 DeviceVref_Margin_A1==40
560 03:03:01.653866
561 03:03:01.654311
562 03:03:01.658376 channel==1
563 03:03:01.658963 RxClkDly_Margin_A0==98 ps 10
564 03:03:01.659452 TxDqDly_Margin_A0==98 ps 10
565 03:03:01.664081 RxClkDly_Margin_A1==88 ps 9
566 03:03:01.664655 TxDqDly_Margin_A1==98 ps 10
567 03:03:01.669607 TrainedVREFDQ_A0==77
568 03:03:01.670186 TrainedVREFDQ_A1==78
569 03:03:01.670634 VrefDac_Margin_A0==22
570 03:03:01.675141 DeviceVref_Margin_A0==37
571 03:03:01.675650 VrefDac_Margin_A1==24
572 03:03:01.680712 DeviceVref_Margin_A1==36
573 03:03:01.681245
574 03:03:01.681687 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 03:03:01.686330
576 03:03:01.714335 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
577 03:03:01.714930 2D training succeed
578 03:03:01.719942 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 03:03:01.725514 auto size-- 65535DDR cs0 size: 2048MB
580 03:03:01.726010 DDR cs1 size: 2048MB
581 03:03:01.731109 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 03:03:01.731608 cs0 DataBus test pass
583 03:03:01.736728 cs1 DataBus test pass
584 03:03:01.737228 cs0 AddrBus test pass
585 03:03:01.737660 cs1 AddrBus test pass
586 03:03:01.738092
587 03:03:01.742348 100bdlr_step_size ps== 420
588 03:03:01.742871 result report
589 03:03:01.747924 boot times 0Enable ddr reg access
590 03:03:01.753359 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 03:03:01.766895 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 03:03:02.340705 0.0;M3 CHK:0;cm4_sp_mode 0
593 03:03:02.341377 MVN_1=0x00000000
594 03:03:02.346460 MVN_2=0x00000000
595 03:03:02.352049 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 03:03:02.352604 OPS=0x10
597 03:03:02.353092 ring efuse init
598 03:03:02.353567 chipver efuse init
599 03:03:02.357414 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 03:03:02.363073 [0.018960 Inits done]
601 03:03:02.363585 secure task start!
602 03:03:02.364065 high task start!
603 03:03:02.367603 low task start!
604 03:03:02.368113 run into bl31
605 03:03:02.374246 NOTICE: BL31: v1.3(release):4fc40b1
606 03:03:02.382134 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 03:03:02.382629 NOTICE: BL31: G12A normal boot!
608 03:03:02.407555 NOTICE: BL31: BL33 decompress pass
609 03:03:02.413214 ERROR: Error initializing runtime service opteed_fast
610 03:03:03.646919
611 03:03:03.647604
612 03:03:03.654455 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 03:03:03.655007
614 03:03:03.655474 Model: Libre Computer AML-A311D-CC Alta
615 03:03:03.869458 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 03:03:03.886421 DRAM: 2 GiB (effective 3.8 GiB)
617 03:03:04.029599 Core: 408 devices, 31 uclasses, devicetree: separate
618 03:03:04.035172 WDT: Not starting watchdog@f0d0
619 03:03:04.067353 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 03:03:04.079800 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 03:03:04.084806 ** Bad device specification mmc 0 **
622 03:03:04.095212 Card did not respond to voltage select! : -110
623 03:03:04.102732 ** Bad device specification mmc 0 **
624 03:03:04.103276 Couldn't find partition mmc 0
625 03:03:04.111182 Card did not respond to voltage select! : -110
626 03:03:04.116613 ** Bad device specification mmc 0 **
627 03:03:04.117152 Couldn't find partition mmc 0
628 03:03:04.121754 Error: could not access storage.
629 03:03:04.464248 Net: eth0: ethernet@ff3f0000
630 03:03:04.464879 starting USB...
631 03:03:04.716153 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 03:03:04.716806 Starting the controller
633 03:03:04.722929 USB XHCI 1.10
634 03:03:06.436194 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 03:03:06.436590 bl2_stage_init 0x01
636 03:03:06.436812 bl2_stage_init 0x81
637 03:03:06.441802 hw id: 0x0000 - pwm id 0x01
638 03:03:06.442240 bl2_stage_init 0xc1
639 03:03:06.442570 bl2_stage_init 0x02
640 03:03:06.442892
641 03:03:06.447314 L0:00000000
642 03:03:06.447747 L1:20000703
643 03:03:06.448023 L2:00008067
644 03:03:06.448244 L3:14000000
645 03:03:06.452994 B2:00402000
646 03:03:06.453426 B1:e0f83180
647 03:03:06.453766
648 03:03:06.454092 TE: 58159
649 03:03:06.454408
650 03:03:06.458658 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 03:03:06.458976
652 03:03:06.459193 Board ID = 1
653 03:03:06.464006 Set A53 clk to 24M
654 03:03:06.464329 Set A73 clk to 24M
655 03:03:06.464548 Set clk81 to 24M
656 03:03:06.469590 A53 clk: 1200 MHz
657 03:03:06.470035 A73 clk: 1200 MHz
658 03:03:06.470375 CLK81: 166.6M
659 03:03:06.470707 smccc: 00012ab4
660 03:03:06.475168 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 03:03:06.481253 board id: 1
662 03:03:06.486692 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 03:03:06.497344 fw parse done
664 03:03:06.503265 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 03:03:06.545946 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 03:03:06.556817 PIEI prepare done
667 03:03:06.557317 fastboot data load
668 03:03:06.557574 fastboot data verify
669 03:03:06.562517 verify result: 266
670 03:03:06.568024 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 03:03:06.568346 LPDDR4 probe
672 03:03:06.568565 ddr clk to 1584MHz
673 03:03:06.576070 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 03:03:06.613376
675 03:03:06.613942 dmc_version 0001
676 03:03:06.620023 Check phy result
677 03:03:06.625823 INFO : End of CA training
678 03:03:06.626140 INFO : End of initialization
679 03:03:06.631540 INFO : Training has run successfully!
680 03:03:06.631855 Check phy result
681 03:03:06.637027 INFO : End of initialization
682 03:03:06.637340 INFO : End of read enable training
683 03:03:06.642594 INFO : End of fine write leveling
684 03:03:06.648206 INFO : End of Write leveling coarse delay
685 03:03:06.648655 INFO : Training has run successfully!
686 03:03:06.648907 Check phy result
687 03:03:06.653832 INFO : End of initialization
688 03:03:06.654292 INFO : End of read dq deskew training
689 03:03:06.659511 INFO : End of MPR read delay center optimization
690 03:03:06.664996 INFO : End of write delay center optimization
691 03:03:06.670562 INFO : End of read delay center optimization
692 03:03:06.670887 INFO : End of max read latency training
693 03:03:06.676242 INFO : Training has run successfully!
694 03:03:06.676689 1D training succeed
695 03:03:06.685519 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 03:03:06.733002 Check phy result
697 03:03:06.733418 INFO : End of initialization
698 03:03:06.754629 INFO : End of 2D read delay Voltage center optimization
699 03:03:06.774772 INFO : End of 2D read delay Voltage center optimization
700 03:03:06.826765 INFO : End of 2D write delay Voltage center optimization
701 03:03:06.875928 INFO : End of 2D write delay Voltage center optimization
702 03:03:06.881529 INFO : Training has run successfully!
703 03:03:06.881829
704 03:03:06.882052 channel==0
705 03:03:06.887036 RxClkDly_Margin_A0==88 ps 9
706 03:03:06.887467 TxDqDly_Margin_A0==98 ps 10
707 03:03:06.892682 RxClkDly_Margin_A1==88 ps 9
708 03:03:06.893115 TxDqDly_Margin_A1==98 ps 10
709 03:03:06.893464 TrainedVREFDQ_A0==74
710 03:03:06.898201 TrainedVREFDQ_A1==74
711 03:03:06.898496 VrefDac_Margin_A0==25
712 03:03:06.898708 DeviceVref_Margin_A0==40
713 03:03:06.903907 VrefDac_Margin_A1==25
714 03:03:06.904223 DeviceVref_Margin_A1==40
715 03:03:06.904436
716 03:03:06.904642
717 03:03:06.909585 channel==1
718 03:03:06.910017 RxClkDly_Margin_A0==98 ps 10
719 03:03:06.910362 TxDqDly_Margin_A0==88 ps 9
720 03:03:06.915033 RxClkDly_Margin_A1==88 ps 9
721 03:03:06.915462 TxDqDly_Margin_A1==88 ps 9
722 03:03:06.920725 TrainedVREFDQ_A0==76
723 03:03:06.921262 TrainedVREFDQ_A1==77
724 03:03:06.921723 VrefDac_Margin_A0==22
725 03:03:06.926285 DeviceVref_Margin_A0==38
726 03:03:06.926806 VrefDac_Margin_A1==24
727 03:03:06.931878 DeviceVref_Margin_A1==37
728 03:03:06.932426
729 03:03:06.932884 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 03:03:06.933327
731 03:03:06.965565 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 03:03:06.966173 2D training succeed
733 03:03:06.971074 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 03:03:06.976546 auto size-- 65535DDR cs0 size: 2048MB
735 03:03:06.977078 DDR cs1 size: 2048MB
736 03:03:06.982132 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 03:03:06.982653 cs0 DataBus test pass
738 03:03:06.987796 cs1 DataBus test pass
739 03:03:06.988363 cs0 AddrBus test pass
740 03:03:06.988817 cs1 AddrBus test pass
741 03:03:06.989259
742 03:03:06.993383 100bdlr_step_size ps== 420
743 03:03:06.993919 result report
744 03:03:06.998922 boot times 0Enable ddr reg access
745 03:03:07.004201 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 03:03:07.017633 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 03:03:07.589835 0.0;M3 CHK:0;cm4_sp_mode 0
748 03:03:07.590498 MVN_1=0x00000000
749 03:03:07.595204 MVN_2=0x00000000
750 03:03:07.601001 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 03:03:07.601558 OPS=0x10
752 03:03:07.601997 ring efuse init
753 03:03:07.602417 chipver efuse init
754 03:03:07.606596 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 03:03:07.612149 [0.018961 Inits done]
756 03:03:07.612637 secure task start!
757 03:03:07.613068 high task start!
758 03:03:07.616732 low task start!
759 03:03:07.617195 run into bl31
760 03:03:07.623487 NOTICE: BL31: v1.3(release):4fc40b1
761 03:03:07.631228 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 03:03:07.631712 NOTICE: BL31: G12A normal boot!
763 03:03:07.656727 NOTICE: BL31: BL33 decompress pass
764 03:03:07.662349 ERROR: Error initializing runtime service opteed_fast
765 03:03:08.895390
766 03:03:08.896103
767 03:03:08.903644 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 03:03:08.904160
769 03:03:08.904640 Model: Libre Computer AML-A311D-CC Alta
770 03:03:09.112148 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 03:03:09.135438 DRAM: 2 GiB (effective 3.8 GiB)
772 03:03:09.278533 Core: 408 devices, 31 uclasses, devicetree: separate
773 03:03:09.284318 WDT: Not starting watchdog@f0d0
774 03:03:09.316592 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 03:03:09.329040 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 03:03:09.334033 ** Bad device specification mmc 0 **
777 03:03:09.344341 Card did not respond to voltage select! : -110
778 03:03:09.352047 ** Bad device specification mmc 0 **
779 03:03:09.352552 Couldn't find partition mmc 0
780 03:03:09.360350 Card did not respond to voltage select! : -110
781 03:03:09.365893 ** Bad device specification mmc 0 **
782 03:03:09.366383 Couldn't find partition mmc 0
783 03:03:09.370913 Error: could not access storage.
784 03:03:09.714542 Net: eth0: ethernet@ff3f0000
785 03:03:09.715177 starting USB...
786 03:03:09.966387 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 03:03:09.967020 Starting the controller
788 03:03:09.973247 USB XHCI 1.10
789 03:03:12.174713 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 03:03:12.175335 bl2_stage_init 0x01
791 03:03:12.175805 bl2_stage_init 0x81
792 03:03:12.180410 hw id: 0x0000 - pwm id 0x01
793 03:03:12.180900 bl2_stage_init 0xc1
794 03:03:12.181355 bl2_stage_init 0x02
795 03:03:12.181803
796 03:03:12.185737 L0:00000000
797 03:03:12.186216 L1:20000703
798 03:03:12.186664 L2:00008067
799 03:03:12.187106 L3:14000000
800 03:03:12.188724 B2:00402000
801 03:03:12.189196 B1:e0f83180
802 03:03:12.189639
803 03:03:12.190084 TE: 58167
804 03:03:12.190528
805 03:03:12.199842 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 03:03:12.200372
807 03:03:12.200826 Board ID = 1
808 03:03:12.201273 Set A53 clk to 24M
809 03:03:12.201711 Set A73 clk to 24M
810 03:03:12.205429 Set clk81 to 24M
811 03:03:12.205906 A53 clk: 1200 MHz
812 03:03:12.206358 A73 clk: 1200 MHz
813 03:03:12.209001 CLK81: 166.6M
814 03:03:12.209476 smccc: 00012abd
815 03:03:12.214554 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 03:03:12.220048 board id: 1
817 03:03:12.225408 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 03:03:12.235760 fw parse done
819 03:03:12.241741 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 03:03:12.284356 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 03:03:12.295315 PIEI prepare done
822 03:03:12.295800 fastboot data load
823 03:03:12.296296 fastboot data verify
824 03:03:12.300874 verify result: 266
825 03:03:12.306499 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 03:03:12.306980 LPDDR4 probe
827 03:03:12.307428 ddr clk to 1584MHz
828 03:03:12.314551 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 03:03:12.351754
830 03:03:12.352294 dmc_version 0001
831 03:03:12.358401 Check phy result
832 03:03:12.364345 INFO : End of CA training
833 03:03:12.364870 INFO : End of initialization
834 03:03:12.369885 INFO : Training has run successfully!
835 03:03:12.370373 Check phy result
836 03:03:12.375504 INFO : End of initialization
837 03:03:12.376004 INFO : End of read enable training
838 03:03:12.381168 INFO : End of fine write leveling
839 03:03:12.386664 INFO : End of Write leveling coarse delay
840 03:03:12.387141 INFO : Training has run successfully!
841 03:03:12.387590 Check phy result
842 03:03:12.392286 INFO : End of initialization
843 03:03:12.392757 INFO : End of read dq deskew training
844 03:03:12.397878 INFO : End of MPR read delay center optimization
845 03:03:12.403449 INFO : End of write delay center optimization
846 03:03:12.409201 INFO : End of read delay center optimization
847 03:03:12.409685 INFO : End of max read latency training
848 03:03:12.414687 INFO : Training has run successfully!
849 03:03:12.415160 1D training succeed
850 03:03:12.423864 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 03:03:12.471423 Check phy result
852 03:03:12.471934 INFO : End of initialization
853 03:03:12.493230 INFO : End of 2D read delay Voltage center optimization
854 03:03:12.513674 INFO : End of 2D read delay Voltage center optimization
855 03:03:12.564724 INFO : End of 2D write delay Voltage center optimization
856 03:03:12.614968 INFO : End of 2D write delay Voltage center optimization
857 03:03:12.620467 INFO : Training has run successfully!
858 03:03:12.621008
859 03:03:12.621484 channel==0
860 03:03:12.626070 RxClkDly_Margin_A0==88 ps 9
861 03:03:12.626580 TxDqDly_Margin_A0==98 ps 10
862 03:03:12.631672 RxClkDly_Margin_A1==88 ps 9
863 03:03:12.632236 TxDqDly_Margin_A1==98 ps 10
864 03:03:12.632676 TrainedVREFDQ_A0==74
865 03:03:12.637299 TrainedVREFDQ_A1==74
866 03:03:12.637766 VrefDac_Margin_A0==25
867 03:03:12.638195 DeviceVref_Margin_A0==40
868 03:03:12.642832 VrefDac_Margin_A1==25
869 03:03:12.643293 DeviceVref_Margin_A1==40
870 03:03:12.643720
871 03:03:12.644178
872 03:03:12.648406 channel==1
873 03:03:12.648857 RxClkDly_Margin_A0==98 ps 10
874 03:03:12.649287 TxDqDly_Margin_A0==88 ps 9
875 03:03:12.654049 RxClkDly_Margin_A1==98 ps 10
876 03:03:12.654504 TxDqDly_Margin_A1==88 ps 9
877 03:03:12.659630 TrainedVREFDQ_A0==77
878 03:03:12.660118 TrainedVREFDQ_A1==77
879 03:03:12.660551 VrefDac_Margin_A0==22
880 03:03:12.665301 DeviceVref_Margin_A0==37
881 03:03:12.665773 VrefDac_Margin_A1==22
882 03:03:12.670833 DeviceVref_Margin_A1==37
883 03:03:12.671293
884 03:03:12.671723 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 03:03:12.672184
886 03:03:12.704405 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
887 03:03:12.704907 2D training succeed
888 03:03:12.710081 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 03:03:12.715646 auto size-- 65535DDR cs0 size: 2048MB
890 03:03:12.716146 DDR cs1 size: 2048MB
891 03:03:12.721306 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 03:03:12.721765 cs0 DataBus test pass
893 03:03:12.726834 cs1 DataBus test pass
894 03:03:12.727295 cs0 AddrBus test pass
895 03:03:12.727723 cs1 AddrBus test pass
896 03:03:12.728186
897 03:03:12.732450 100bdlr_step_size ps== 420
898 03:03:12.732917 result report
899 03:03:12.738032 boot times 0Enable ddr reg access
900 03:03:12.743392 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 03:03:12.756903 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 03:03:13.330653 0.0;M3 CHK:0;cm4_sp_mode 0
903 03:03:13.331314 MVN_1=0x00000000
904 03:03:13.336120 MVN_2=0x00000000
905 03:03:13.341846 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 03:03:13.342340 OPS=0x10
907 03:03:13.342797 ring efuse init
908 03:03:13.343242 chipver efuse init
909 03:03:13.347440 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 03:03:13.353029 [0.018961 Inits done]
911 03:03:13.353519 secure task start!
912 03:03:13.353963 high task start!
913 03:03:13.357601 low task start!
914 03:03:13.358077 run into bl31
915 03:03:13.364239 NOTICE: BL31: v1.3(release):4fc40b1
916 03:03:13.372029 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 03:03:13.372530 NOTICE: BL31: G12A normal boot!
918 03:03:13.397490 NOTICE: BL31: BL33 decompress pass
919 03:03:13.403062 ERROR: Error initializing runtime service opteed_fast
920 03:03:14.636141
921 03:03:14.636805
922 03:03:14.644457 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 03:03:14.644954
924 03:03:14.645419 Model: Libre Computer AML-A311D-CC Alta
925 03:03:14.852937 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 03:03:14.876235 DRAM: 2 GiB (effective 3.8 GiB)
927 03:03:15.019230 Core: 408 devices, 31 uclasses, devicetree: separate
928 03:03:15.025412 WDT: Not starting watchdog@f0d0
929 03:03:15.057345 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 03:03:15.069807 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 03:03:15.074747 ** Bad device specification mmc 0 **
932 03:03:15.085086 Card did not respond to voltage select! : -110
933 03:03:15.092731 ** Bad device specification mmc 0 **
934 03:03:15.093213 Couldn't find partition mmc 0
935 03:03:15.101072 Card did not respond to voltage select! : -110
936 03:03:15.106615 ** Bad device specification mmc 0 **
937 03:03:15.107098 Couldn't find partition mmc 0
938 03:03:15.111688 Error: could not access storage.
939 03:03:15.454159 Net: eth0: ethernet@ff3f0000
940 03:03:15.454763 starting USB...
941 03:03:15.706095 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 03:03:15.706740 Starting the controller
943 03:03:15.712932 USB XHCI 1.10
944 03:03:17.267276 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 03:03:17.275387 scanning usb for storage devices... 0 Storage Device(s) found
947 03:03:17.326974 Hit any key to stop autoboot: 1
948 03:03:17.327798 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 03:03:17.328493 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 03:03:17.329013 Setting prompt string to ['=>']
951 03:03:17.329546 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 03:03:17.342798 0
953 03:03:17.343726 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 03:03:17.344289 Sending with 10 millisecond of delay
956 03:03:18.478984 => setenv autoload no
957 03:03:18.489743 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 03:03:18.495127 setenv autoload no
959 03:03:18.495894 Sending with 10 millisecond of delay
961 03:03:20.293068 => setenv initrd_high 0xffffffff
962 03:03:20.304226 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 03:03:20.305145 setenv initrd_high 0xffffffff
964 03:03:20.305861 Sending with 10 millisecond of delay
966 03:03:21.922364 => setenv fdt_high 0xffffffff
967 03:03:21.933143 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 03:03:21.933962 setenv fdt_high 0xffffffff
969 03:03:21.934792 Sending with 10 millisecond of delay
971 03:03:22.226758 => dhcp
972 03:03:22.237522 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 03:03:22.238329 dhcp
974 03:03:22.238765 Speed: 1000, full duplex
975 03:03:22.239177 BOOTP broadcast 1
976 03:03:22.246295 DHCP client bound to address 192.168.6.27 (8 ms)
977 03:03:22.246996 Sending with 10 millisecond of delay
979 03:03:23.924932 => setenv serverip 192.168.6.2
980 03:03:23.936048 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 03:03:23.936638 setenv serverip 192.168.6.2
982 03:03:23.937092 Sending with 10 millisecond of delay
984 03:03:27.662548 => tftpboot 0x01080000 943585/tftp-deploy-pv1a10db/kernel/uImage
985 03:03:27.673109 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 03:03:27.673636 tftpboot 0x01080000 943585/tftp-deploy-pv1a10db/kernel/uImage
987 03:03:27.673879 Speed: 1000, full duplex
988 03:03:27.674095 Using ethernet@ff3f0000 device
989 03:03:27.675692 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 03:03:27.681294 Filename '943585/tftp-deploy-pv1a10db/kernel/uImage'.
991 03:03:27.685108 Load address: 0x1080000
992 03:03:30.742153 Loading: *################################################## 43.7 MiB
993 03:03:30.742607 14.3 MiB/s
994 03:03:30.742836 done
995 03:03:30.747263 Bytes transferred = 45779520 (2ba8a40 hex)
996 03:03:30.748366 Sending with 10 millisecond of delay
998 03:03:35.440721 => tftpboot 0x08000000 943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot
999 03:03:35.451492 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 03:03:35.452313 tftpboot 0x08000000 943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot
1001 03:03:35.452760 Speed: 1000, full duplex
1002 03:03:35.453175 Using ethernet@ff3f0000 device
1003 03:03:35.454188 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 03:03:35.465892 Filename '943585/tftp-deploy-pv1a10db/ramdisk/ramdisk.cpio.gz.uboot'.
1005 03:03:35.466349 Load address: 0x8000000
1006 03:03:42.041322 Loading: *#############T #################################### UDP wrong checksum 00000005 000066da
1007 03:03:47.041886 T UDP wrong checksum 00000005 000066da
1008 03:03:57.044943 T T UDP wrong checksum 00000005 000066da
1009 03:04:17.049114 T T T T UDP wrong checksum 00000005 000066da
1010 03:04:18.865787 UDP wrong checksum 000000ff 00009f5c
1011 03:04:18.913674 UDP wrong checksum 000000ff 00003b4f
1012 03:04:31.589957 T T UDP wrong checksum 000000ff 0000d49a
1013 03:04:31.612433 UDP wrong checksum 000000ff 00006b8d
1014 03:04:32.053033
1015 03:04:32.053645 Retry count exceeded; starting again
1017 03:04:32.055031 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 03:04:32.056925 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 03:04:32.058298 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 03:04:32.059320 end: 2 uboot-action (duration 00:01:47) [common]
1026 03:04:32.060895 Cleaning after the job
1027 03:04:32.061459 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/ramdisk
1028 03:04:32.062779 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/kernel
1029 03:04:32.090603 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/dtb
1030 03:04:32.091945 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/nfsrootfs
1031 03:04:32.197811 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943585/tftp-deploy-pv1a10db/modules
1032 03:04:32.217109 start: 4.1 power-off (timeout 00:00:30) [common]
1033 03:04:32.217748 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 03:04:32.254937 >> OK - accepted request
1035 03:04:32.257117 Returned 0 in 0 seconds
1036 03:04:32.358088 end: 4.1 power-off (duration 00:00:00) [common]
1038 03:04:32.359064 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 03:04:32.359719 Listened to connection for namespace 'common' for up to 1s
1040 03:04:33.360692 Finalising connection for namespace 'common'
1041 03:04:33.361170 Disconnecting from shell: Finalise
1042 03:04:33.361451 =>
1043 03:04:33.462172 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 03:04:33.462805 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/943585
1045 03:04:36.090943 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/943585
1046 03:04:36.091543 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.