Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:45:48.081218 lava-dispatcher, installed at version: 2024.01
2 08:45:48.082035 start: 0 validate
3 08:45:48.082513 Start time: 2024-10-16 08:45:48.082482+00:00 (UTC)
4 08:45:48.083065 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:45:48.083602 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 08:45:48.125048 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:45:48.125623 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fib-mfd-gpio-i2c-watchdog-v6.13-27-gf4b00ab2c299%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:45:48.158648 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:45:48.159322 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fib-mfd-gpio-i2c-watchdog-v6.13-27-gf4b00ab2c299%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:45:48.192771 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:45:48.193286 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fib-mfd-gpio-i2c-watchdog-v6.13-27-gf4b00ab2c299%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 08:45:48.231676 validate duration: 0.15
14 08:45:48.232577 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:45:48.232941 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:45:48.233251 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:45:48.234099 Not decompressing ramdisk as can be used compressed.
18 08:45:48.234567 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 08:45:48.234841 saving as /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/ramdisk/rootfs.cpio.gz
20 08:45:48.235115 total size: 47897469 (45 MB)
21 08:45:48.271112 progress 0 % (0 MB)
22 08:45:48.303768 progress 5 % (2 MB)
23 08:45:48.336351 progress 10 % (4 MB)
24 08:45:48.368506 progress 15 % (6 MB)
25 08:45:48.400604 progress 20 % (9 MB)
26 08:45:48.432414 progress 25 % (11 MB)
27 08:45:48.465076 progress 30 % (13 MB)
28 08:45:48.497642 progress 35 % (16 MB)
29 08:45:48.529216 progress 40 % (18 MB)
30 08:45:48.561119 progress 45 % (20 MB)
31 08:45:48.593306 progress 50 % (22 MB)
32 08:45:48.625337 progress 55 % (25 MB)
33 08:45:48.657534 progress 60 % (27 MB)
34 08:45:48.689503 progress 65 % (29 MB)
35 08:45:48.721371 progress 70 % (32 MB)
36 08:45:48.753501 progress 75 % (34 MB)
37 08:45:48.785720 progress 80 % (36 MB)
38 08:45:48.817463 progress 85 % (38 MB)
39 08:45:48.849233 progress 90 % (41 MB)
40 08:45:48.880919 progress 95 % (43 MB)
41 08:45:48.912231 progress 100 % (45 MB)
42 08:45:48.912958 45 MB downloaded in 0.68 s (67.39 MB/s)
43 08:45:48.913513 end: 1.1.1 http-download (duration 00:00:01) [common]
45 08:45:48.914381 end: 1.1 download-retry (duration 00:00:01) [common]
46 08:45:48.914666 start: 1.2 download-retry (timeout 00:09:59) [common]
47 08:45:48.914933 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 08:45:48.915397 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-27-gf4b00ab2c299/arm64/defconfig/gcc-12/kernel/Image
49 08:45:48.915656 saving as /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/kernel/Image
50 08:45:48.915864 total size: 45713920 (43 MB)
51 08:45:48.916143 No compression specified
52 08:45:48.954981 progress 0 % (0 MB)
53 08:45:48.985502 progress 5 % (2 MB)
54 08:45:49.015635 progress 10 % (4 MB)
55 08:45:49.045857 progress 15 % (6 MB)
56 08:45:49.076318 progress 20 % (8 MB)
57 08:45:49.106493 progress 25 % (10 MB)
58 08:45:49.136855 progress 30 % (13 MB)
59 08:45:49.167174 progress 35 % (15 MB)
60 08:45:49.197951 progress 40 % (17 MB)
61 08:45:49.227875 progress 45 % (19 MB)
62 08:45:49.258240 progress 50 % (21 MB)
63 08:45:49.288463 progress 55 % (24 MB)
64 08:45:49.319145 progress 60 % (26 MB)
65 08:45:49.349189 progress 65 % (28 MB)
66 08:45:49.379444 progress 70 % (30 MB)
67 08:45:49.410204 progress 75 % (32 MB)
68 08:45:49.440625 progress 80 % (34 MB)
69 08:45:49.470586 progress 85 % (37 MB)
70 08:45:49.500736 progress 90 % (39 MB)
71 08:45:49.531013 progress 95 % (41 MB)
72 08:45:49.560477 progress 100 % (43 MB)
73 08:45:49.560994 43 MB downloaded in 0.65 s (67.58 MB/s)
74 08:45:49.561469 end: 1.2.1 http-download (duration 00:00:01) [common]
76 08:45:49.562268 end: 1.2 download-retry (duration 00:00:01) [common]
77 08:45:49.562541 start: 1.3 download-retry (timeout 00:09:59) [common]
78 08:45:49.562801 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 08:45:49.563263 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-27-gf4b00ab2c299/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 08:45:49.563503 saving as /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 08:45:49.563707 total size: 53209 (0 MB)
82 08:45:49.563915 No compression specified
83 08:45:49.604467 progress 61 % (0 MB)
84 08:45:49.605306 progress 100 % (0 MB)
85 08:45:49.605834 0 MB downloaded in 0.04 s (1.20 MB/s)
86 08:45:49.606289 end: 1.3.1 http-download (duration 00:00:00) [common]
88 08:45:49.607088 end: 1.3 download-retry (duration 00:00:00) [common]
89 08:45:49.607347 start: 1.4 download-retry (timeout 00:09:59) [common]
90 08:45:49.607607 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 08:45:49.608089 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-27-gf4b00ab2c299/arm64/defconfig/gcc-12/modules.tar.xz
92 08:45:49.608333 saving as /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/modules/modules.tar
93 08:45:49.608536 total size: 11591656 (11 MB)
94 08:45:49.608747 Using unxz to decompress xz
95 08:45:49.643685 progress 0 % (0 MB)
96 08:45:49.711603 progress 5 % (0 MB)
97 08:45:49.788124 progress 10 % (1 MB)
98 08:45:49.871509 progress 15 % (1 MB)
99 08:45:49.947953 progress 20 % (2 MB)
100 08:45:50.024294 progress 25 % (2 MB)
101 08:45:50.103958 progress 30 % (3 MB)
102 08:45:50.176628 progress 35 % (3 MB)
103 08:45:50.256366 progress 40 % (4 MB)
104 08:45:50.341615 progress 45 % (5 MB)
105 08:45:50.418321 progress 50 % (5 MB)
106 08:45:50.501630 progress 55 % (6 MB)
107 08:45:50.582775 progress 60 % (6 MB)
108 08:45:50.662787 progress 65 % (7 MB)
109 08:45:50.743282 progress 70 % (7 MB)
110 08:45:50.825381 progress 75 % (8 MB)
111 08:45:50.903781 progress 80 % (8 MB)
112 08:45:50.983662 progress 85 % (9 MB)
113 08:45:51.056351 progress 90 % (9 MB)
114 08:45:51.156409 progress 95 % (10 MB)
115 08:45:51.248754 progress 100 % (11 MB)
116 08:45:51.263113 11 MB downloaded in 1.65 s (6.68 MB/s)
117 08:45:51.263690 end: 1.4.1 http-download (duration 00:00:02) [common]
119 08:45:51.265115 end: 1.4 download-retry (duration 00:00:02) [common]
120 08:45:51.265641 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 08:45:51.266157 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 08:45:51.266642 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 08:45:51.267137 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 08:45:51.268171 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys
125 08:45:51.269113 makedir: /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin
126 08:45:51.269766 makedir: /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/tests
127 08:45:51.270374 makedir: /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/results
128 08:45:51.270986 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-add-keys
129 08:45:51.271922 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-add-sources
130 08:45:51.272888 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-background-process-start
131 08:45:51.273865 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-background-process-stop
132 08:45:51.274881 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-common-functions
133 08:45:51.275790 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-echo-ipv4
134 08:45:51.276732 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-install-packages
135 08:45:51.277616 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-installed-packages
136 08:45:51.278499 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-os-build
137 08:45:51.279373 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-probe-channel
138 08:45:51.280280 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-probe-ip
139 08:45:51.281172 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-target-ip
140 08:45:51.282047 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-target-mac
141 08:45:51.282912 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-target-storage
142 08:45:51.283820 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-case
143 08:45:51.284826 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-event
144 08:45:51.285708 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-feedback
145 08:45:51.286578 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-raise
146 08:45:51.287445 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-reference
147 08:45:51.288354 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-runner
148 08:45:51.289239 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-set
149 08:45:51.290147 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-test-shell
150 08:45:51.291082 Updating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-install-packages (oe)
151 08:45:51.292101 Updating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/bin/lava-installed-packages (oe)
152 08:45:51.292933 Creating /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/environment
153 08:45:51.293635 LAVA metadata
154 08:45:51.294112 - LAVA_JOB_ID=848595
155 08:45:51.294537 - LAVA_DISPATCHER_IP=192.168.6.2
156 08:45:51.295178 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 08:45:51.296985 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 08:45:51.297565 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 08:45:51.297973 skipped lava-vland-overlay
160 08:45:51.298453 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 08:45:51.298953 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 08:45:51.299372 skipped lava-multinode-overlay
163 08:45:51.299901 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 08:45:51.300450 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 08:45:51.300930 Loading test definitions
166 08:45:51.301465 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 08:45:51.301897 Using /lava-848595 at stage 0
168 08:45:51.304047 uuid=848595_1.5.2.4.1 testdef=None
169 08:45:51.304369 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 08:45:51.304641 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 08:45:51.306460 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 08:45:51.307259 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 08:45:51.309415 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 08:45:51.310271 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 08:45:51.312361 runner path: /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/0/tests/0_igt-gpu-panfrost test_uuid 848595_1.5.2.4.1
178 08:45:51.312926 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 08:45:51.313728 Creating lava-test-runner.conf files
181 08:45:51.313934 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/848595/lava-overlay-1rsp1xys/lava-848595/0 for stage 0
182 08:45:51.314286 - 0_igt-gpu-panfrost
183 08:45:51.314659 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 08:45:51.314941 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 08:45:51.338246 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 08:45:51.338629 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 08:45:51.338892 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 08:45:51.339155 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 08:45:51.339417 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 08:45:58.471373 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 08:45:58.471939 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 08:45:58.472486 extracting modules file /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk
193 08:46:00.208933 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 08:46:00.210291 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 08:46:00.211208 [common] Applying overlay /var/lib/lava/dispatcher/tmp/848595/compress-overlay-1gzjh34k/overlay-1.5.2.5.tar.gz to ramdisk
196 08:46:00.211459 [common] Applying overlay /var/lib/lava/dispatcher/tmp/848595/compress-overlay-1gzjh34k/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk
197 08:46:00.263042 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 08:46:00.263538 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 08:46:00.264305 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 08:46:00.264568 Converting downloaded kernel to a uImage
201 08:46:00.265387 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/kernel/Image /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/kernel/uImage
202 08:46:00.856617 output: Image Name:
203 08:46:00.857123 output: Created: Wed Oct 16 08:46:00 2024
204 08:46:00.857380 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 08:46:00.857629 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 08:46:00.857875 output: Load Address: 01080000
207 08:46:00.858123 output: Entry Point: 01080000
208 08:46:00.858367 output:
209 08:46:00.858773 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
210 08:46:00.859102 end: 1.5.6 prepare-kernel (duration 00:00:01) [common]
211 08:46:00.859424 start: 1.5.7 configure-preseed-file (timeout 00:09:47) [common]
212 08:46:00.859742 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 08:46:00.860114 start: 1.5.8 compress-ramdisk (timeout 00:09:47) [common]
214 08:46:00.860443 Building ramdisk /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk
215 08:46:07.522296 >> 502360 blocks
216 08:46:29.831899 Adding RAMdisk u-boot header.
217 08:46:29.832597 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk.cpio.gz.uboot
218 08:46:30.505576 output: Image Name:
219 08:46:30.505978 output: Created: Wed Oct 16 08:46:29 2024
220 08:46:30.506185 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 08:46:30.506386 output: Data Size: 65712466 Bytes = 64172.33 KiB = 62.67 MiB
222 08:46:30.506585 output: Load Address: 00000000
223 08:46:30.506783 output: Entry Point: 00000000
224 08:46:30.506976 output:
225 08:46:30.507593 rename /var/lib/lava/dispatcher/tmp/848595/extract-overlay-ramdisk-mmhxio5k/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/ramdisk/ramdisk.cpio.gz.uboot
226 08:46:30.508063 end: 1.5.8 compress-ramdisk (duration 00:00:30) [common]
227 08:46:30.508611 end: 1.5 prepare-tftp-overlay (duration 00:00:39) [common]
228 08:46:30.509129 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:18) [common]
229 08:46:30.509578 No LXC device requested
230 08:46:30.510069 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 08:46:30.510566 start: 1.7 deploy-device-env (timeout 00:09:18) [common]
232 08:46:30.511051 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 08:46:30.511452 Checking files for TFTP limit of 4294967296 bytes.
234 08:46:30.514114 end: 1 tftp-deploy (duration 00:00:42) [common]
235 08:46:30.514684 start: 2 uboot-action (timeout 00:05:00) [common]
236 08:46:30.515196 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 08:46:30.515685 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 08:46:30.516211 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 08:46:30.516730 Using kernel file from prepare-kernel: 848595/tftp-deploy-81ka02gt/kernel/uImage
240 08:46:30.517345 substitutions:
241 08:46:30.517745 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 08:46:30.518142 - {DTB_ADDR}: 0x01070000
243 08:46:30.518529 - {DTB}: 848595/tftp-deploy-81ka02gt/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 08:46:30.518922 - {INITRD}: 848595/tftp-deploy-81ka02gt/ramdisk/ramdisk.cpio.gz.uboot
245 08:46:30.519311 - {KERNEL_ADDR}: 0x01080000
246 08:46:30.519697 - {KERNEL}: 848595/tftp-deploy-81ka02gt/kernel/uImage
247 08:46:30.520109 - {LAVA_MAC}: None
248 08:46:30.520537 - {PRESEED_CONFIG}: None
249 08:46:30.520930 - {PRESEED_LOCAL}: None
250 08:46:30.521314 - {RAMDISK_ADDR}: 0x08000000
251 08:46:30.521695 - {RAMDISK}: 848595/tftp-deploy-81ka02gt/ramdisk/ramdisk.cpio.gz.uboot
252 08:46:30.522082 - {ROOT_PART}: None
253 08:46:30.522464 - {ROOT}: None
254 08:46:30.522846 - {SERVER_IP}: 192.168.6.2
255 08:46:30.523232 - {TEE_ADDR}: 0x83000000
256 08:46:30.523616 - {TEE}: None
257 08:46:30.524018 Parsed boot commands:
258 08:46:30.524396 - setenv autoload no
259 08:46:30.524779 - setenv initrd_high 0xffffffff
260 08:46:30.525158 - setenv fdt_high 0xffffffff
261 08:46:30.525534 - dhcp
262 08:46:30.525915 - setenv serverip 192.168.6.2
263 08:46:30.526294 - tftpboot 0x01080000 848595/tftp-deploy-81ka02gt/kernel/uImage
264 08:46:30.526675 - tftpboot 0x08000000 848595/tftp-deploy-81ka02gt/ramdisk/ramdisk.cpio.gz.uboot
265 08:46:30.527058 - tftpboot 0x01070000 848595/tftp-deploy-81ka02gt/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 08:46:30.527443 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 08:46:30.527827 - bootm 0x01080000 0x08000000 0x01070000
268 08:46:30.528347 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 08:46:30.529799 start: 2.3 connect-device (timeout 00:05:00) [common]
271 08:46:30.530231 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 08:46:30.544970 Setting prompt string to ['lava-test: # ']
273 08:46:30.546418 end: 2.3 connect-device (duration 00:00:00) [common]
274 08:46:30.546996 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 08:46:30.547514 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 08:46:30.548085 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 08:46:30.549235 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 08:46:30.602836 >> OK - accepted request
279 08:46:30.605986 Returned 0 in 0 seconds
280 08:46:30.707078 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 08:46:30.708710 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 08:46:30.709272 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 08:46:30.709766 Setting prompt string to ['Hit any key to stop autoboot']
285 08:46:30.710200 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 08:46:30.711762 Trying 192.168.56.21...
287 08:46:30.712280 Connected to conserv1.
288 08:46:30.712697 Escape character is '^]'.
289 08:46:30.713115
290 08:46:30.713542 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 08:46:30.713970
292 08:46:37.894854 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 08:46:37.895290 bl2_stage_init 0x01
294 08:46:37.895527 bl2_stage_init 0x81
295 08:46:37.906610 hw id: 0x0000 - pwm id 0x01
296 08:46:37.906920 bl2_stage_init 0xc1
297 08:46:37.907138 bl2_stage_init 0x02
298 08:46:37.907349
299 08:46:37.907557 L0:00000000
300 08:46:37.907758 L1:00000703
301 08:46:37.907957 L2:00008067
302 08:46:37.908191 L3:15000000
303 08:46:37.911527 S1:00000000
304 08:46:37.911785 B2:20282000
305 08:46:37.912008 B1:a0f83180
306 08:46:37.912218
307 08:46:37.912422 TE: 71003
308 08:46:37.912624
309 08:46:37.916932 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 08:46:37.917188
311 08:46:37.922631 Board ID = 1
312 08:46:37.922879 Set cpu clk to 24M
313 08:46:37.923084 Set clk81 to 24M
314 08:46:37.928136 Use GP1_pll as DSU clk.
315 08:46:37.928406 DSU clk: 1200 Mhz
316 08:46:37.928615 CPU clk: 1200 MHz
317 08:46:37.933697 Set clk81 to 166.6M
318 08:46:37.939256 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 08:46:37.939512 board id: 1
320 08:46:37.946397 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 08:46:37.957027 fw parse done
322 08:46:37.963015 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 08:46:38.005919 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 08:46:38.016614 PIEI prepare done
325 08:46:38.016901 fastboot data load
326 08:46:38.017110 fastboot data verify
327 08:46:38.022197 verify result: 266
328 08:46:38.027815 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 08:46:38.028099 LPDDR4 probe
330 08:46:38.028314 ddr clk to 1584MHz
331 08:46:38.035771 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 08:46:38.073186
333 08:46:38.073510 dmc_version 0001
334 08:46:38.079827 Check phy result
335 08:46:38.085766 INFO : End of CA training
336 08:46:38.086054 INFO : End of initialization
337 08:46:38.091283 INFO : Training has run successfully!
338 08:46:38.091536 Check phy result
339 08:46:38.096858 INFO : End of initialization
340 08:46:38.097107 INFO : End of read enable training
341 08:46:38.100193 INFO : End of fine write leveling
342 08:46:38.105732 INFO : End of Write leveling coarse delay
343 08:46:38.111320 INFO : Training has run successfully!
344 08:46:38.111570 Check phy result
345 08:46:38.111780 INFO : End of initialization
346 08:46:38.116825 INFO : End of read dq deskew training
347 08:46:38.122480 INFO : End of MPR read delay center optimization
348 08:46:38.122737 INFO : End of write delay center optimization
349 08:46:38.128149 INFO : End of read delay center optimization
350 08:46:38.133713 INFO : End of max read latency training
351 08:46:38.133971 INFO : Training has run successfully!
352 08:46:38.139349 1D training succeed
353 08:46:38.145275 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 08:46:38.192931 Check phy result
355 08:46:38.193276 INFO : End of initialization
356 08:46:38.215152 INFO : End of 2D read delay Voltage center optimization
357 08:46:38.234368 INFO : End of 2D read delay Voltage center optimization
358 08:46:38.286316 INFO : End of 2D write delay Voltage center optimization
359 08:46:38.335452 INFO : End of 2D write delay Voltage center optimization
360 08:46:38.340899 INFO : Training has run successfully!
361 08:46:38.341160
362 08:46:38.341374 channel==0
363 08:46:38.346484 RxClkDly_Margin_A0==88 ps 9
364 08:46:38.346739 TxDqDly_Margin_A0==98 ps 10
365 08:46:38.349957 RxClkDly_Margin_A1==88 ps 9
366 08:46:38.350234 TxDqDly_Margin_A1==98 ps 10
367 08:46:38.355507 TrainedVREFDQ_A0==74
368 08:46:38.355764 TrainedVREFDQ_A1==75
369 08:46:38.355975 VrefDac_Margin_A0==23
370 08:46:38.361095 DeviceVref_Margin_A0==40
371 08:46:38.361341 VrefDac_Margin_A1==23
372 08:46:38.366688 DeviceVref_Margin_A1==39
373 08:46:38.366934
374 08:46:38.367145
375 08:46:38.367350 channel==1
376 08:46:38.367551 RxClkDly_Margin_A0==78 ps 8
377 08:46:38.372336 TxDqDly_Margin_A0==98 ps 10
378 08:46:38.372587 RxClkDly_Margin_A1==78 ps 8
379 08:46:38.377910 TxDqDly_Margin_A1==88 ps 9
380 08:46:38.378154 TrainedVREFDQ_A0==78
381 08:46:38.378365 TrainedVREFDQ_A1==77
382 08:46:38.383476 VrefDac_Margin_A0==22
383 08:46:38.383718 DeviceVref_Margin_A0==36
384 08:46:38.389016 VrefDac_Margin_A1==22
385 08:46:38.389284 DeviceVref_Margin_A1==37
386 08:46:38.389494
387 08:46:38.394610 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 08:46:38.394857
389 08:46:38.422739 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 08:46:38.428379 2D training succeed
391 08:46:38.434021 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 08:46:38.434630 auto size-- 65535DDR cs0 size: 2048MB
393 08:46:38.439594 DDR cs1 size: 2048MB
394 08:46:38.440249 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 08:46:38.445177 cs0 DataBus test pass
396 08:46:38.445779 cs1 DataBus test pass
397 08:46:38.446303 cs0 AddrBus test pass
398 08:46:38.450774 cs1 AddrBus test pass
399 08:46:38.451368
400 08:46:38.451884 100bdlr_step_size ps== 478
401 08:46:38.452443 result report
402 08:46:38.456361 boot times 0Enable ddr reg access
403 08:46:38.463954 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 08:46:38.477688 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 08:46:39.132108 bl2z: ptr: 05129330, size: 00001e40
406 08:46:39.138325 0.0;M3 CHK:0;cm4_sp_mode 0
407 08:46:39.138951 MVN_1=0x00000000
408 08:46:39.139480 MVN_2=0x00000000
409 08:46:39.149688 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 08:46:39.150303 OPS=0x04
411 08:46:39.150823 ring efuse init
412 08:46:39.152703 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 08:46:39.158652 [0.017319 Inits done]
414 08:46:39.159261 secure task start!
415 08:46:39.159776 high task start!
416 08:46:39.160344 low task start!
417 08:46:39.162886 run into bl31
418 08:46:39.171469 NOTICE: BL31: v1.3(release):4fc40b1
419 08:46:39.179403 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 08:46:39.180050 NOTICE: BL31: G12A normal boot!
421 08:46:39.195077 NOTICE: BL31: BL33 decompress pass
422 08:46:39.200686 ERROR: Error initializing runtime service opteed_fast
423 08:46:41.941952 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 08:46:41.942619 bl2_stage_init 0x01
425 08:46:41.943032 bl2_stage_init 0x81
426 08:46:41.947500 hw id: 0x0000 - pwm id 0x01
427 08:46:41.948215 bl2_stage_init 0xc1
428 08:46:41.953183 bl2_stage_init 0x02
429 08:46:41.953964
430 08:46:41.954494 L0:00000000
431 08:46:41.955021 L1:00000703
432 08:46:41.955532 L2:00008067
433 08:46:41.956080 L3:15000000
434 08:46:41.958732 S1:00000000
435 08:46:41.959363 B2:20282000
436 08:46:41.959890 B1:a0f83180
437 08:46:41.960453
438 08:46:41.960966 TE: 69788
439 08:46:41.961478
440 08:46:41.964276 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 08:46:41.964864
442 08:46:41.969900 Board ID = 1
443 08:46:41.970460 Set cpu clk to 24M
444 08:46:41.970969 Set clk81 to 24M
445 08:46:41.975742 Use GP1_pll as DSU clk.
446 08:46:41.976343 DSU clk: 1200 Mhz
447 08:46:41.976850 CPU clk: 1200 MHz
448 08:46:41.981167 Set clk81 to 166.6M
449 08:46:41.986957 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 08:46:41.987551 board id: 1
451 08:46:41.994063 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 08:46:42.004769 fw parse done
453 08:46:42.010657 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 08:46:42.053714 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 08:46:42.064959 PIEI prepare done
456 08:46:42.065719 fastboot data load
457 08:46:42.066240 fastboot data verify
458 08:46:42.070444 verify result: 266
459 08:46:42.076153 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 08:46:42.076880 LPDDR4 probe
461 08:46:42.077429 ddr clk to 1584MHz
462 08:46:42.084137 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 08:46:42.121875
464 08:46:42.122491 dmc_version 0001
465 08:46:42.128792 Check phy result
466 08:46:42.134774 INFO : End of CA training
467 08:46:42.135214 INFO : End of initialization
468 08:46:42.140410 INFO : Training has run successfully!
469 08:46:42.140851 Check phy result
470 08:46:42.145963 INFO : End of initialization
471 08:46:42.146400 INFO : End of read enable training
472 08:46:42.151579 INFO : End of fine write leveling
473 08:46:42.157235 INFO : End of Write leveling coarse delay
474 08:46:42.157713 INFO : Training has run successfully!
475 08:46:42.158116 Check phy result
476 08:46:42.162789 INFO : End of initialization
477 08:46:42.163218 INFO : End of read dq deskew training
478 08:46:42.168428 INFO : End of MPR read delay center optimization
479 08:46:42.173968 INFO : End of write delay center optimization
480 08:46:42.179556 INFO : End of read delay center optimization
481 08:46:42.180013 INFO : End of max read latency training
482 08:46:42.185185 INFO : Training has run successfully!
483 08:46:42.185615 1D training succeed
484 08:46:42.194403 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 08:46:42.242678 Check phy result
486 08:46:42.243136 INFO : End of initialization
487 08:46:42.270042 INFO : End of 2D read delay Voltage center optimization
488 08:46:42.294214 INFO : End of 2D read delay Voltage center optimization
489 08:46:42.350872 INFO : End of 2D write delay Voltage center optimization
490 08:46:42.404942 INFO : End of 2D write delay Voltage center optimization
491 08:46:42.410618 INFO : Training has run successfully!
492 08:46:42.411045
493 08:46:42.411442 channel==0
494 08:46:42.416054 RxClkDly_Margin_A0==78 ps 8
495 08:46:42.416482 TxDqDly_Margin_A0==98 ps 10
496 08:46:42.421733 RxClkDly_Margin_A1==88 ps 9
497 08:46:42.422151 TxDqDly_Margin_A1==98 ps 10
498 08:46:42.422548 TrainedVREFDQ_A0==74
499 08:46:42.427320 TrainedVREFDQ_A1==75
500 08:46:42.427744 VrefDac_Margin_A0==23
501 08:46:42.428176 DeviceVref_Margin_A0==40
502 08:46:42.432878 VrefDac_Margin_A1==23
503 08:46:42.433322 DeviceVref_Margin_A1==39
504 08:46:42.433717
505 08:46:42.434108
506 08:46:42.438615 channel==1
507 08:46:42.439033 RxClkDly_Margin_A0==78 ps 8
508 08:46:42.439429 TxDqDly_Margin_A0==98 ps 10
509 08:46:42.444057 RxClkDly_Margin_A1==88 ps 9
510 08:46:42.444484 TxDqDly_Margin_A1==88 ps 9
511 08:46:42.449703 TrainedVREFDQ_A0==78
512 08:46:42.450125 TrainedVREFDQ_A1==75
513 08:46:42.450517 VrefDac_Margin_A0==22
514 08:46:42.455330 DeviceVref_Margin_A0==36
515 08:46:42.455746 VrefDac_Margin_A1==22
516 08:46:42.460895 DeviceVref_Margin_A1==39
517 08:46:42.461314
518 08:46:42.461710 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 08:46:42.462102
520 08:46:42.494446 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 08:46:42.495141 2D training succeed
522 08:46:42.500017 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 08:46:42.505573 auto size-- 65535DDR cs0 size: 2048MB
524 08:46:42.506173 DDR cs1 size: 2048MB
525 08:46:42.511183 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 08:46:42.511770 cs0 DataBus test pass
527 08:46:42.516788 cs1 DataBus test pass
528 08:46:42.517365 cs0 AddrBus test pass
529 08:46:42.517873 cs1 AddrBus test pass
530 08:46:42.518379
531 08:46:42.522435 100bdlr_step_size ps== 471
532 08:46:42.523035 result report
533 08:46:42.527975 boot times 0Enable ddr reg access
534 08:46:42.533266 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 08:46:42.547105 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 08:46:43.206456 bl2z: ptr: 05129330, size: 00001e40
537 08:46:43.219197 0.0;M3 CHK:0;cm4_sp_mode 0
538 08:46:43.219789 MVN_1=0x00000000
539 08:46:43.220356 MVN_2=0x00000000
540 08:46:43.221441 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 08:46:43.221995 OPS=0x04
542 08:46:43.222524 ring efuse init
543 08:46:43.226955 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 08:46:43.232568 [0.017354 Inits done]
545 08:46:43.233114 secure task start!
546 08:46:43.233626 high task start!
547 08:46:43.237656 low task start!
548 08:46:43.238209 run into bl31
549 08:46:43.246320 NOTICE: BL31: v1.3(release):4fc40b1
550 08:46:43.254046 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 08:46:43.254597 NOTICE: BL31: G12A normal boot!
552 08:46:43.269705 NOTICE: BL31: BL33 decompress pass
553 08:46:43.275411 ERROR: Error initializing runtime service opteed_fast
554 08:46:44.640533 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 08:46:44.641287 bl2_stage_init 0x01
556 08:46:44.641846 bl2_stage_init 0x81
557 08:46:44.646092 hw id: 0x0000 - pwm id 0x01
558 08:46:44.646685 bl2_stage_init 0xc1
559 08:46:44.651659 bl2_stage_init 0x02
560 08:46:44.652262
561 08:46:44.652793 L0:00000000
562 08:46:44.653322 L1:00000703
563 08:46:44.653838 L2:00008067
564 08:46:44.654350 L3:15000000
565 08:46:44.657253 S1:00000000
566 08:46:44.657812 B2:20282000
567 08:46:44.658328 B1:a0f83180
568 08:46:44.658842
569 08:46:44.659364 TE: 68309
570 08:46:44.659876
571 08:46:44.662819 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 08:46:44.663373
573 08:46:44.668446 Board ID = 1
574 08:46:44.668998 Set cpu clk to 24M
575 08:46:44.669517 Set clk81 to 24M
576 08:46:44.674037 Use GP1_pll as DSU clk.
577 08:46:44.674586 DSU clk: 1200 Mhz
578 08:46:44.675100 CPU clk: 1200 MHz
579 08:46:44.679651 Set clk81 to 166.6M
580 08:46:44.685220 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 08:46:44.685772 board id: 1
582 08:46:44.692453 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 08:46:44.703379 fw parse done
584 08:46:44.709291 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 08:46:44.763766 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 08:46:44.764502 PIEI prepare done
587 08:46:44.765047 fastboot data load
588 08:46:44.765583 fastboot data verify
589 08:46:44.769226 verify result: 266
590 08:46:44.774806 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 08:46:44.775401 LPDDR4 probe
592 08:46:44.775934 ddr clk to 1584MHz
593 08:46:44.782833 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 08:46:44.820604
595 08:46:44.821284 dmc_version 0001
596 08:46:44.827527 Check phy result
597 08:46:44.833524 INFO : End of CA training
598 08:46:44.834165 INFO : End of initialization
599 08:46:44.839085 INFO : Training has run successfully!
600 08:46:44.839579 Check phy result
601 08:46:44.844711 INFO : End of initialization
602 08:46:44.845191 INFO : End of read enable training
603 08:46:44.850303 INFO : End of fine write leveling
604 08:46:44.855952 INFO : End of Write leveling coarse delay
605 08:46:44.856459 INFO : Training has run successfully!
606 08:46:44.856878 Check phy result
607 08:46:44.861504 INFO : End of initialization
608 08:46:44.861942 INFO : End of read dq deskew training
609 08:46:44.867111 INFO : End of MPR read delay center optimization
610 08:46:44.872769 INFO : End of write delay center optimization
611 08:46:44.878403 INFO : End of read delay center optimization
612 08:46:44.879130 INFO : End of max read latency training
613 08:46:44.883932 INFO : Training has run successfully!
614 08:46:44.884668 1D training succeed
615 08:46:44.893111 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 08:46:44.941524 Check phy result
617 08:46:44.942184 INFO : End of initialization
618 08:46:44.968873 INFO : End of 2D read delay Voltage center optimization
619 08:46:44.993041 INFO : End of 2D read delay Voltage center optimization
620 08:46:45.049854 INFO : End of 2D write delay Voltage center optimization
621 08:46:45.103810 INFO : End of 2D write delay Voltage center optimization
622 08:46:45.115016 INFO : Training has run successfully!
623 08:46:45.115696
624 08:46:45.116329 channel==0
625 08:46:45.116890 RxClkDly_Margin_A0==78 ps 8
626 08:46:45.117461 TxDqDly_Margin_A0==98 ps 10
627 08:46:45.120469 RxClkDly_Margin_A1==88 ps 9
628 08:46:45.121052 TxDqDly_Margin_A1==98 ps 10
629 08:46:45.121594 TrainedVREFDQ_A0==75
630 08:46:45.126051 TrainedVREFDQ_A1==75
631 08:46:45.126622 VrefDac_Margin_A0==24
632 08:46:45.127160 DeviceVref_Margin_A0==39
633 08:46:45.131649 VrefDac_Margin_A1==23
634 08:46:45.132232 DeviceVref_Margin_A1==39
635 08:46:45.132752
636 08:46:45.133290
637 08:46:45.137255 channel==1
638 08:46:45.137816 RxClkDly_Margin_A0==88 ps 9
639 08:46:45.138343 TxDqDly_Margin_A0==98 ps 10
640 08:46:45.142851 RxClkDly_Margin_A1==78 ps 8
641 08:46:45.143413 TxDqDly_Margin_A1==98 ps 10
642 08:46:45.148443 TrainedVREFDQ_A0==78
643 08:46:45.149018 TrainedVREFDQ_A1==78
644 08:46:45.149550 VrefDac_Margin_A0==23
645 08:46:45.154035 DeviceVref_Margin_A0==36
646 08:46:45.154596 VrefDac_Margin_A1==22
647 08:46:45.159675 DeviceVref_Margin_A1==36
648 08:46:45.160302
649 08:46:45.160851 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 08:46:45.161373
651 08:46:45.193270 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 08:46:45.193940 2D training succeed
653 08:46:45.204621 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 08:46:45.205273 auto size-- 65535DDR cs0 size: 2048MB
655 08:46:45.205812 DDR cs1 size: 2048MB
656 08:46:45.210079 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 08:46:45.210604 cs0 DataBus test pass
658 08:46:45.215771 cs1 DataBus test pass
659 08:46:45.216296 cs0 AddrBus test pass
660 08:46:45.216718 cs1 AddrBus test pass
661 08:46:45.217125
662 08:46:45.221330 100bdlr_step_size ps== 471
663 08:46:45.221825 result report
664 08:46:45.226942 boot times 0Enable ddr reg access
665 08:46:45.232294 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 08:46:45.246121 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 08:46:45.906600 bl2z: ptr: 05129330, size: 00001e40
668 08:46:45.916443 0.0;M3 CHK:0;cm4_sp_mode 0
669 08:46:45.916979 MVN_1=0x00000000
670 08:46:45.917409 MVN_2=0x00000000
671 08:46:45.927906 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 08:46:45.928468 OPS=0x04
673 08:46:45.928903 ring efuse init
674 08:46:45.933546 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 08:46:45.934053 [0.017355 Inits done]
676 08:46:45.934474 secure task start!
677 08:46:45.940770 high task start!
678 08:46:45.941289 low task start!
679 08:46:45.941709 run into bl31
680 08:46:45.949337 NOTICE: BL31: v1.3(release):4fc40b1
681 08:46:45.957143 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 08:46:45.957655 NOTICE: BL31: G12A normal boot!
683 08:46:45.972704 NOTICE: BL31: BL33 decompress pass
684 08:46:45.978411 ERROR: Error initializing runtime service opteed_fast
685 08:46:46.773842
686 08:46:46.774426
687 08:46:46.779238 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 08:46:46.779735
689 08:46:46.782732 Model: Libre Computer AML-S905D3-CC Solitude
690 08:46:46.929724 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 08:46:46.945128 DRAM: 2 GiB (effective 3.8 GiB)
692 08:46:47.046102 Core: 406 devices, 33 uclasses, devicetree: separate
693 08:46:47.052033 WDT: Not starting watchdog@f0d0
694 08:46:47.077069 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 08:46:47.089260 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 08:46:47.094302 ** Bad device specification mmc 0 **
697 08:46:47.104332 Card did not respond to voltage select! : -110
698 08:46:47.112088 ** Bad device specification mmc 0 **
699 08:46:47.112592 Couldn't find partition mmc 0
700 08:46:47.120324 Card did not respond to voltage select! : -110
701 08:46:47.125836 ** Bad device specification mmc 0 **
702 08:46:47.126321 Couldn't find partition mmc 0
703 08:46:47.130897 Error: could not access storage.
704 08:46:47.427395 Net: eth0: ethernet@ff3f0000
705 08:46:47.428036 starting USB...
706 08:46:47.679448 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 08:46:47.680089 Starting the controller
708 08:46:47.680529 USB XHCI 1.10
709 08:46:49.233238 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 08:46:49.241591 scanning usb for storage devices... 0 Storage Device(s) found
712 08:46:49.293074 Hit any key to stop autoboot: 1
713 08:46:49.293913 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 08:46:49.294576 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 08:46:49.295071 Setting prompt string to ['=>']
716 08:46:49.295555 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 08:46:49.307557 0
718 08:46:49.308542 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 08:46:49.409805 => setenv autoload no
721 08:46:49.410600 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 08:46:49.622318 setenv autoload no
724 08:46:49.724031 => setenv initrd_high 0xffffffff
725 08:46:49.724798 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 08:46:49.729460 setenv initrd_high 0xffffffff
728 08:46:49.830905 => setenv fdt_high 0xffffffff
729 08:46:49.831562 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 08:46:49.836198 setenv fdt_high 0xffffffff
732 08:46:49.937707 => dhcp
733 08:46:49.938446 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 08:46:49.941787 dhcp
735 08:46:50.348112 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 08:46:50.348686 Speed: 1000, full duplex
737 08:46:50.349112 BOOTP broadcast 1
738 08:46:50.596669 BOOTP broadcast 2
739 08:46:50.642526 DHCP client bound to address 192.168.6.19 (294 ms)
741 08:46:50.744198 => setenv serverip 192.168.6.2
742 08:46:50.745195 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
743 08:46:50.749618 setenv serverip 192.168.6.2
745 08:46:50.851125 => tftpboot 0x01080000 848595/tftp-deploy-81ka02gt/kernel/uImage
746 08:46:50.852066 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
747 08:46:50.858726 tftpboot 0x01080000 848595/tftp-deploy-81ka02gt/kernel/uImage
748 08:46:50.859205 Speed: 1000, full duplex
749 08:46:50.859609 Using ethernet@ff3f0000 device
750 08:46:50.864180 TFTP from server 192.168.6.2; our IP address is 192.168.6.19
751 08:46:50.869728 Filename '848595/tftp-deploy-81ka02gt/kernel/uImage'.
752 08:46:50.873826 Load address: 0x1080000
753 08:47:12.186022 Loading: *T T T T UDP wrong checksum 000000ff 00007864
754 08:47:12.215867 UDP wrong checksum 000000ff 00008d56
755 08:47:45.942101 T T T T T T
756 08:47:45.942517 Retry count exceeded; starting again
758 08:47:45.944227 end: 2.4.3 bootloader-commands (duration 00:00:57) [common]
761 08:47:45.946187 end: 2.4 uboot-commands (duration 00:01:15) [common]
763 08:47:45.947632 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
765 08:47:45.948744 end: 2 uboot-action (duration 00:01:15) [common]
767 08:47:45.950383 Cleaning after the job
768 08:47:45.950983 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/ramdisk
769 08:47:45.989896 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/kernel
770 08:47:46.006796 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/dtb
771 08:47:46.007667 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848595/tftp-deploy-81ka02gt/modules
772 08:47:46.027193 start: 4.1 power-off (timeout 00:00:30) [common]
773 08:47:46.027856 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
774 08:47:46.061101 >> OK - accepted request
775 08:47:46.063160 Returned 0 in 0 seconds
776 08:47:46.163916 end: 4.1 power-off (duration 00:00:00) [common]
778 08:47:46.164893 start: 4.2 read-feedback (timeout 00:10:00) [common]
779 08:47:46.165567 Listened to connection for namespace 'common' for up to 1s
780 08:47:47.166531 Finalising connection for namespace 'common'
781 08:47:47.167256 Disconnecting from shell: Finalise
782 08:47:47.167783 =>
783 08:47:47.268823 end: 4.2 read-feedback (duration 00:00:01) [common]
784 08:47:47.269512 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/848595
785 08:47:47.949123 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/848595
786 08:47:47.949735 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.