Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 06:57:15.218260 lava-dispatcher, installed at version: 2024.01
2 06:57:15.219116 start: 0 validate
3 06:57:15.219596 Start time: 2024-10-17 06:57:15.219565+00:00 (UTC)
4 06:57:15.220157 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 06:57:15.220706 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 06:57:15.263402 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 06:57:15.263942 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 06:57:15.294645 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 06:57:15.295240 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 06:57:15.328808 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 06:57:15.329287 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 06:57:15.362685 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 06:57:15.363159 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 06:57:15.406352 validate duration: 0.19
16 06:57:15.407791 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 06:57:15.408413 start: 1.1 download-retry (timeout 00:10:00) [common]
18 06:57:15.408987 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 06:57:15.409904 Not decompressing ramdisk as can be used compressed.
20 06:57:15.410636 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 06:57:15.411127 saving as /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/ramdisk/initrd.cpio.gz
22 06:57:15.411608 total size: 5628169 (5 MB)
23 06:57:15.452709 progress 0 % (0 MB)
24 06:57:15.460663 progress 5 % (0 MB)
25 06:57:15.468563 progress 10 % (0 MB)
26 06:57:15.475563 progress 15 % (0 MB)
27 06:57:15.483270 progress 20 % (1 MB)
28 06:57:15.487226 progress 25 % (1 MB)
29 06:57:15.491238 progress 30 % (1 MB)
30 06:57:15.495246 progress 35 % (1 MB)
31 06:57:15.498821 progress 40 % (2 MB)
32 06:57:15.502825 progress 45 % (2 MB)
33 06:57:15.506541 progress 50 % (2 MB)
34 06:57:15.510636 progress 55 % (2 MB)
35 06:57:15.514625 progress 60 % (3 MB)
36 06:57:15.518238 progress 65 % (3 MB)
37 06:57:15.522312 progress 70 % (3 MB)
38 06:57:15.525931 progress 75 % (4 MB)
39 06:57:15.529906 progress 80 % (4 MB)
40 06:57:15.533703 progress 85 % (4 MB)
41 06:57:15.537629 progress 90 % (4 MB)
42 06:57:15.541303 progress 95 % (5 MB)
43 06:57:15.544593 progress 100 % (5 MB)
44 06:57:15.545247 5 MB downloaded in 0.13 s (40.17 MB/s)
45 06:57:15.545789 end: 1.1.1 http-download (duration 00:00:00) [common]
47 06:57:15.546683 end: 1.1 download-retry (duration 00:00:00) [common]
48 06:57:15.546976 start: 1.2 download-retry (timeout 00:10:00) [common]
49 06:57:15.547251 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 06:57:15.547722 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422/arm64/defconfig/gcc-12/kernel/Image
51 06:57:15.548017 saving as /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/kernel/Image
52 06:57:15.548235 total size: 45713920 (43 MB)
53 06:57:15.548444 No compression specified
54 06:57:15.588187 progress 0 % (0 MB)
55 06:57:15.616102 progress 5 % (2 MB)
56 06:57:15.644088 progress 10 % (4 MB)
57 06:57:15.671971 progress 15 % (6 MB)
58 06:57:15.700173 progress 20 % (8 MB)
59 06:57:15.727562 progress 25 % (10 MB)
60 06:57:15.755366 progress 30 % (13 MB)
61 06:57:15.783307 progress 35 % (15 MB)
62 06:57:15.811410 progress 40 % (17 MB)
63 06:57:15.838663 progress 45 % (19 MB)
64 06:57:15.866328 progress 50 % (21 MB)
65 06:57:15.894413 progress 55 % (24 MB)
66 06:57:15.921984 progress 60 % (26 MB)
67 06:57:15.949198 progress 65 % (28 MB)
68 06:57:15.976879 progress 70 % (30 MB)
69 06:57:16.004814 progress 75 % (32 MB)
70 06:57:16.032301 progress 80 % (34 MB)
71 06:57:16.059475 progress 85 % (37 MB)
72 06:57:16.086949 progress 90 % (39 MB)
73 06:57:16.114541 progress 95 % (41 MB)
74 06:57:16.141188 progress 100 % (43 MB)
75 06:57:16.141693 43 MB downloaded in 0.59 s (73.46 MB/s)
76 06:57:16.142176 end: 1.2.1 http-download (duration 00:00:01) [common]
78 06:57:16.143001 end: 1.2 download-retry (duration 00:00:01) [common]
79 06:57:16.143278 start: 1.3 download-retry (timeout 00:09:59) [common]
80 06:57:16.143545 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 06:57:16.144029 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 06:57:16.144323 saving as /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/dtb/meson-g12b-a311d-libretech-cc.dtb
83 06:57:16.144535 total size: 54703 (0 MB)
84 06:57:16.144744 No compression specified
85 06:57:16.186815 progress 59 % (0 MB)
86 06:57:16.187691 progress 100 % (0 MB)
87 06:57:16.188300 0 MB downloaded in 0.04 s (1.19 MB/s)
88 06:57:16.188771 end: 1.3.1 http-download (duration 00:00:00) [common]
90 06:57:16.189588 end: 1.3 download-retry (duration 00:00:00) [common]
91 06:57:16.189851 start: 1.4 download-retry (timeout 00:09:59) [common]
92 06:57:16.190117 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 06:57:16.190563 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 06:57:16.190811 saving as /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/nfsrootfs/full.rootfs.tar
95 06:57:16.191016 total size: 120894716 (115 MB)
96 06:57:16.191227 Using unxz to decompress xz
97 06:57:16.230593 progress 0 % (0 MB)
98 06:57:17.013630 progress 5 % (5 MB)
99 06:57:17.839967 progress 10 % (11 MB)
100 06:57:18.626021 progress 15 % (17 MB)
101 06:57:19.353151 progress 20 % (23 MB)
102 06:57:19.941242 progress 25 % (28 MB)
103 06:57:20.793323 progress 30 % (34 MB)
104 06:57:21.571537 progress 35 % (40 MB)
105 06:57:21.935790 progress 40 % (46 MB)
106 06:57:22.317293 progress 45 % (51 MB)
107 06:57:23.023703 progress 50 % (57 MB)
108 06:57:23.911927 progress 55 % (63 MB)
109 06:57:24.692569 progress 60 % (69 MB)
110 06:57:25.446295 progress 65 % (74 MB)
111 06:57:26.223709 progress 70 % (80 MB)
112 06:57:27.051880 progress 75 % (86 MB)
113 06:57:27.835015 progress 80 % (92 MB)
114 06:57:28.586762 progress 85 % (98 MB)
115 06:57:29.430552 progress 90 % (103 MB)
116 06:57:30.196172 progress 95 % (109 MB)
117 06:57:31.025878 progress 100 % (115 MB)
118 06:57:31.040613 115 MB downloaded in 14.85 s (7.76 MB/s)
119 06:57:31.041506 end: 1.4.1 http-download (duration 00:00:15) [common]
121 06:57:31.043130 end: 1.4 download-retry (duration 00:00:15) [common]
122 06:57:31.043665 start: 1.5 download-retry (timeout 00:09:44) [common]
123 06:57:31.044251 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 06:57:31.045417 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422/arm64/defconfig/gcc-12/modules.tar.xz
125 06:57:31.045918 saving as /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/modules/modules.tar
126 06:57:31.046339 total size: 11619040 (11 MB)
127 06:57:31.046766 Using unxz to decompress xz
128 06:57:31.091723 progress 0 % (0 MB)
129 06:57:31.153179 progress 5 % (0 MB)
130 06:57:31.230503 progress 10 % (1 MB)
131 06:57:31.315844 progress 15 % (1 MB)
132 06:57:31.405998 progress 20 % (2 MB)
133 06:57:31.487602 progress 25 % (2 MB)
134 06:57:31.564199 progress 30 % (3 MB)
135 06:57:31.647808 progress 35 % (3 MB)
136 06:57:31.724486 progress 40 % (4 MB)
137 06:57:31.800727 progress 45 % (5 MB)
138 06:57:31.881581 progress 50 % (5 MB)
139 06:57:31.964705 progress 55 % (6 MB)
140 06:57:32.042721 progress 60 % (6 MB)
141 06:57:32.117987 progress 65 % (7 MB)
142 06:57:32.196659 progress 70 % (7 MB)
143 06:57:32.268912 progress 75 % (8 MB)
144 06:57:32.344487 progress 80 % (8 MB)
145 06:57:32.427128 progress 85 % (9 MB)
146 06:57:32.511632 progress 90 % (10 MB)
147 06:57:32.587305 progress 95 % (10 MB)
148 06:57:32.665559 progress 100 % (11 MB)
149 06:57:32.678302 11 MB downloaded in 1.63 s (6.79 MB/s)
150 06:57:32.678907 end: 1.5.1 http-download (duration 00:00:02) [common]
152 06:57:32.679746 end: 1.5 download-retry (duration 00:00:02) [common]
153 06:57:32.680069 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 06:57:32.680618 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 06:57:48.908716 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/851289/extract-nfsrootfs-bdzytrr0
156 06:57:48.909326 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 06:57:48.909617 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 06:57:48.910252 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr
159 06:57:48.910695 makedir: /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin
160 06:57:48.911027 makedir: /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/tests
161 06:57:48.911339 makedir: /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/results
162 06:57:48.911669 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-add-keys
163 06:57:48.912261 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-add-sources
164 06:57:48.912853 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-background-process-start
165 06:57:48.913371 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-background-process-stop
166 06:57:48.913947 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-common-functions
167 06:57:48.914672 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-echo-ipv4
168 06:57:48.915232 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-install-packages
169 06:57:48.915714 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-installed-packages
170 06:57:48.916294 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-os-build
171 06:57:48.916820 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-probe-channel
172 06:57:48.917349 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-probe-ip
173 06:57:48.917828 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-target-ip
174 06:57:48.918303 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-target-mac
175 06:57:48.918774 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-target-storage
176 06:57:48.919258 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-case
177 06:57:48.919736 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-event
178 06:57:48.920241 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-feedback
179 06:57:48.920748 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-raise
180 06:57:48.921272 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-reference
181 06:57:48.921755 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-runner
182 06:57:48.922232 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-set
183 06:57:48.922706 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-test-shell
184 06:57:48.923210 Updating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-add-keys (debian)
185 06:57:48.923739 Updating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-add-sources (debian)
186 06:57:48.924282 Updating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-install-packages (debian)
187 06:57:48.924790 Updating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-installed-packages (debian)
188 06:57:48.925276 Updating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/bin/lava-os-build (debian)
189 06:57:48.925706 Creating /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/environment
190 06:57:48.926070 LAVA metadata
191 06:57:48.926329 - LAVA_JOB_ID=851289
192 06:57:48.926542 - LAVA_DISPATCHER_IP=192.168.6.2
193 06:57:48.926896 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 06:57:48.927835 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 06:57:48.928175 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 06:57:48.928382 skipped lava-vland-overlay
197 06:57:48.928621 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 06:57:48.928872 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 06:57:48.929087 skipped lava-multinode-overlay
200 06:57:48.929326 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 06:57:48.929572 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 06:57:48.929820 Loading test definitions
203 06:57:48.930091 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 06:57:48.930309 Using /lava-851289 at stage 0
205 06:57:48.931387 uuid=851289_1.6.2.4.1 testdef=None
206 06:57:48.931692 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 06:57:48.931953 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 06:57:48.933536 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 06:57:48.934318 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 06:57:48.936240 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 06:57:48.937055 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 06:57:48.938860 runner path: /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/0/tests/0_timesync-off test_uuid 851289_1.6.2.4.1
215 06:57:48.939397 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 06:57:48.940229 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 06:57:48.940455 Using /lava-851289 at stage 0
219 06:57:48.940804 Fetching tests from https://github.com/kernelci/test-definitions.git
220 06:57:48.941095 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/0/tests/1_kselftest-rtc'
221 06:57:52.409392 Running '/usr/bin/git checkout kernelci.org
222 06:57:52.742507 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 06:57:52.743972 uuid=851289_1.6.2.4.5 testdef=None
224 06:57:52.744359 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 06:57:52.745108 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 06:57:52.748008 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 06:57:52.748850 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 06:57:52.752627 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 06:57:52.753497 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 06:57:52.757124 runner path: /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/0/tests/1_kselftest-rtc test_uuid 851289_1.6.2.4.5
234 06:57:52.757431 BOARD='meson-g12b-a311d-libretech-cc'
235 06:57:52.757639 BRANCH='lee-mfd'
236 06:57:52.757837 SKIPFILE='/dev/null'
237 06:57:52.758034 SKIP_INSTALL='True'
238 06:57:52.758229 TESTPROG_URL='http://storage.kernelci.org/lee-mfd/for-mfd-next/ib-mfd-gpio-i2c-watchdog-v6.13-29-g38d09a34b422/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 06:57:52.758427 TST_CASENAME=''
240 06:57:52.758625 TST_CMDFILES='rtc'
241 06:57:52.759202 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 06:57:52.760024 Creating lava-test-runner.conf files
244 06:57:52.760237 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/851289/lava-overlay-u1qxm_pr/lava-851289/0 for stage 0
245 06:57:52.760670 - 0_timesync-off
246 06:57:52.760932 - 1_kselftest-rtc
247 06:57:52.761273 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 06:57:52.761562 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 06:58:15.931220 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 06:58:15.931669 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 06:58:15.931935 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 06:58:15.932237 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 06:58:15.932506 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 06:58:16.542079 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 06:58:16.542559 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 06:58:16.542812 extracting modules file /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/modules/modules.tar to /var/lib/lava/dispatcher/tmp/851289/extract-nfsrootfs-bdzytrr0
257 06:58:17.889715 extracting modules file /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/modules/modules.tar to /var/lib/lava/dispatcher/tmp/851289/extract-overlay-ramdisk-idxy100m/ramdisk
258 06:58:19.285024 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 06:58:19.285509 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 06:58:19.285791 [common] Applying overlay to NFS
261 06:58:19.286009 [common] Applying overlay /var/lib/lava/dispatcher/tmp/851289/compress-overlay-m13mfcgh/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/851289/extract-nfsrootfs-bdzytrr0
262 06:58:22.004633 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 06:58:22.005110 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 06:58:22.005383 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 06:58:22.005615 Converting downloaded kernel to a uImage
266 06:58:22.005925 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/kernel/Image /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/kernel/uImage
267 06:58:22.480987 output: Image Name:
268 06:58:22.481408 output: Created: Thu Oct 17 06:58:22 2024
269 06:58:22.481617 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 06:58:22.481823 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 06:58:22.482025 output: Load Address: 01080000
272 06:58:22.482226 output: Entry Point: 01080000
273 06:58:22.482423 output:
274 06:58:22.482758 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 06:58:22.483030 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 06:58:22.483299 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 06:58:22.483553 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 06:58:22.483809 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 06:58:22.484101 Building ramdisk /var/lib/lava/dispatcher/tmp/851289/extract-overlay-ramdisk-idxy100m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/851289/extract-overlay-ramdisk-idxy100m/ramdisk
280 06:58:24.636374 >> 166772 blocks
281 06:58:32.306933 Adding RAMdisk u-boot header.
282 06:58:32.307659 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/851289/extract-overlay-ramdisk-idxy100m/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/851289/extract-overlay-ramdisk-idxy100m/ramdisk.cpio.gz.uboot
283 06:58:32.557780 output: Image Name:
284 06:58:32.558206 output: Created: Thu Oct 17 06:58:32 2024
285 06:58:32.558679 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 06:58:32.559152 output: Data Size: 23424968 Bytes = 22875.95 KiB = 22.34 MiB
287 06:58:32.559609 output: Load Address: 00000000
288 06:58:32.560106 output: Entry Point: 00000000
289 06:58:32.560564 output:
290 06:58:32.561789 rename /var/lib/lava/dispatcher/tmp/851289/extract-overlay-ramdisk-idxy100m/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/ramdisk/ramdisk.cpio.gz.uboot
291 06:58:32.562594 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 06:58:32.563216 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 06:58:32.563813 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:43) [common]
294 06:58:32.564374 No LXC device requested
295 06:58:32.564955 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 06:58:32.565538 start: 1.8 deploy-device-env (timeout 00:08:43) [common]
297 06:58:32.566100 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 06:58:32.566565 Checking files for TFTP limit of 4294967296 bytes.
299 06:58:32.569535 end: 1 tftp-deploy (duration 00:01:17) [common]
300 06:58:32.570181 start: 2 uboot-action (timeout 00:05:00) [common]
301 06:58:32.570780 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 06:58:32.571339 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 06:58:32.571905 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 06:58:32.572536 Using kernel file from prepare-kernel: 851289/tftp-deploy-2t86ht24/kernel/uImage
305 06:58:32.573242 substitutions:
306 06:58:32.573707 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 06:58:32.574159 - {DTB_ADDR}: 0x01070000
308 06:58:32.574605 - {DTB}: 851289/tftp-deploy-2t86ht24/dtb/meson-g12b-a311d-libretech-cc.dtb
309 06:58:32.575056 - {INITRD}: 851289/tftp-deploy-2t86ht24/ramdisk/ramdisk.cpio.gz.uboot
310 06:58:32.575499 - {KERNEL_ADDR}: 0x01080000
311 06:58:32.575936 - {KERNEL}: 851289/tftp-deploy-2t86ht24/kernel/uImage
312 06:58:32.576414 - {LAVA_MAC}: None
313 06:58:32.576900 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/851289/extract-nfsrootfs-bdzytrr0
314 06:58:32.577347 - {NFS_SERVER_IP}: 192.168.6.2
315 06:58:32.577781 - {PRESEED_CONFIG}: None
316 06:58:32.578215 - {PRESEED_LOCAL}: None
317 06:58:32.578648 - {RAMDISK_ADDR}: 0x08000000
318 06:58:32.579076 - {RAMDISK}: 851289/tftp-deploy-2t86ht24/ramdisk/ramdisk.cpio.gz.uboot
319 06:58:32.579509 - {ROOT_PART}: None
320 06:58:32.579940 - {ROOT}: None
321 06:58:32.580275 - {SERVER_IP}: 192.168.6.2
322 06:58:32.580480 - {TEE_ADDR}: 0x83000000
323 06:58:32.580677 - {TEE}: None
324 06:58:32.580873 Parsed boot commands:
325 06:58:32.581065 - setenv autoload no
326 06:58:32.581262 - setenv initrd_high 0xffffffff
327 06:58:32.581458 - setenv fdt_high 0xffffffff
328 06:58:32.581652 - dhcp
329 06:58:32.582077 - setenv serverip 192.168.6.2
330 06:58:32.582510 - tftpboot 0x01080000 851289/tftp-deploy-2t86ht24/kernel/uImage
331 06:58:32.582946 - tftpboot 0x08000000 851289/tftp-deploy-2t86ht24/ramdisk/ramdisk.cpio.gz.uboot
332 06:58:32.583379 - tftpboot 0x01070000 851289/tftp-deploy-2t86ht24/dtb/meson-g12b-a311d-libretech-cc.dtb
333 06:58:32.583809 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/851289/extract-nfsrootfs-bdzytrr0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 06:58:32.584289 - bootm 0x01080000 0x08000000 0x01070000
335 06:58:32.584847 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 06:58:32.586514 start: 2.3 connect-device (timeout 00:05:00) [common]
338 06:58:32.586983 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 06:58:32.602396 Setting prompt string to ['lava-test: # ']
340 06:58:32.604065 end: 2.3 connect-device (duration 00:00:00) [common]
341 06:58:32.604776 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 06:58:32.605436 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 06:58:32.606054 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 06:58:32.607302 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 06:58:32.649772 >> OK - accepted request
346 06:58:32.651871 Returned 0 in 0 seconds
347 06:58:32.753125 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 06:58:32.754898 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 06:58:32.755516 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 06:58:32.756130 Setting prompt string to ['Hit any key to stop autoboot']
352 06:58:32.756651 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 06:58:32.758369 Trying 192.168.56.21...
354 06:58:32.758898 Connected to conserv1.
355 06:58:32.759374 Escape character is '^]'.
356 06:58:32.759844
357 06:58:32.760352 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 06:58:32.760829
359 06:58:44.229836 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 06:58:44.230521 bl2_stage_init 0x01
361 06:58:44.230988 bl2_stage_init 0x81
362 06:58:44.241197 hw id: 0x0000 - pwm id 0x01
363 06:58:44.241704 bl2_stage_init 0xc1
364 06:58:44.242155 bl2_stage_init 0x02
365 06:58:44.242606
366 06:58:44.243058 L0:00000000
367 06:58:44.243508 L1:20000703
368 06:58:44.243953 L2:00008067
369 06:58:44.244456 L3:14000000
370 06:58:44.246455 B2:00402000
371 06:58:44.246936 B1:e0f83180
372 06:58:44.247382
373 06:58:44.247813 TE: 58124
374 06:58:44.248289
375 06:58:44.252171 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 06:58:44.252643
377 06:58:44.253079 Board ID = 1
378 06:58:44.257772 Set A53 clk to 24M
379 06:58:44.258235 Set A73 clk to 24M
380 06:58:44.258666 Set clk81 to 24M
381 06:58:44.263338 A53 clk: 1200 MHz
382 06:58:44.263798 A73 clk: 1200 MHz
383 06:58:44.264265 CLK81: 166.6M
384 06:58:44.264694 smccc: 00012a92
385 06:58:44.274744 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 06:58:44.275207 board id: 1
387 06:58:44.280415 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 06:58:44.291270 fw parse done
389 06:58:44.297113 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 06:58:44.339551 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 06:58:44.350435 PIEI prepare done
392 06:58:44.350894 fastboot data load
393 06:58:44.351325 fastboot data verify
394 06:58:44.356200 verify result: 266
395 06:58:44.361782 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 06:58:44.362251 LPDDR4 probe
397 06:58:44.362685 ddr clk to 1584MHz
398 06:58:44.369676 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 06:58:44.406928
400 06:58:44.407402 dmc_version 0001
401 06:58:44.413600 Check phy result
402 06:58:44.419495 INFO : End of CA training
403 06:58:44.419952 INFO : End of initialization
404 06:58:44.425124 INFO : Training has run successfully!
405 06:58:44.425586 Check phy result
406 06:58:44.430693 INFO : End of initialization
407 06:58:44.431149 INFO : End of read enable training
408 06:58:44.436284 INFO : End of fine write leveling
409 06:58:44.441891 INFO : End of Write leveling coarse delay
410 06:58:44.442353 INFO : Training has run successfully!
411 06:58:44.442792 Check phy result
412 06:58:44.447474 INFO : End of initialization
413 06:58:44.447929 INFO : End of read dq deskew training
414 06:58:44.453136 INFO : End of MPR read delay center optimization
415 06:58:44.458672 INFO : End of write delay center optimization
416 06:58:44.464280 INFO : End of read delay center optimization
417 06:58:44.464754 INFO : End of max read latency training
418 06:58:44.469899 INFO : Training has run successfully!
419 06:58:44.470366 1D training succeed
420 06:58:44.479205 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 06:58:44.526648 Check phy result
422 06:58:44.527108 INFO : End of initialization
423 06:58:44.549231 INFO : End of 2D read delay Voltage center optimization
424 06:58:44.569473 INFO : End of 2D read delay Voltage center optimization
425 06:58:44.621487 INFO : End of 2D write delay Voltage center optimization
426 06:58:44.676558 INFO : End of 2D write delay Voltage center optimization
427 06:58:44.677026 INFO : Training has run successfully!
428 06:58:44.677466
429 06:58:44.677903 channel==0
430 06:58:44.682168 RxClkDly_Margin_A0==88 ps 9
431 06:58:44.682631 TxDqDly_Margin_A0==98 ps 10
432 06:58:44.687679 RxClkDly_Margin_A1==78 ps 8
433 06:58:44.688191 TxDqDly_Margin_A1==88 ps 9
434 06:58:44.688630 TrainedVREFDQ_A0==74
435 06:58:44.693240 TrainedVREFDQ_A1==74
436 06:58:44.693706 VrefDac_Margin_A0==24
437 06:58:44.694142 DeviceVref_Margin_A0==40
438 06:58:44.698863 VrefDac_Margin_A1==26
439 06:58:44.699321 DeviceVref_Margin_A1==40
440 06:58:44.699753
441 06:58:44.700223
442 06:58:44.700661 channel==1
443 06:58:44.704440 RxClkDly_Margin_A0==98 ps 10
444 06:58:44.704902 TxDqDly_Margin_A0==88 ps 9
445 06:58:44.710168 RxClkDly_Margin_A1==88 ps 9
446 06:58:44.710629 TxDqDly_Margin_A1==88 ps 9
447 06:58:44.715650 TrainedVREFDQ_A0==77
448 06:58:44.716138 TrainedVREFDQ_A1==77
449 06:58:44.716578 VrefDac_Margin_A0==22
450 06:58:44.721241 DeviceVref_Margin_A0==37
451 06:58:44.721703 VrefDac_Margin_A1==24
452 06:58:44.726846 DeviceVref_Margin_A1==37
453 06:58:44.727307
454 06:58:44.727744 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 06:58:44.728217
456 06:58:44.760514 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 06:58:44.761053 2D training succeed
458 06:58:44.766054 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 06:58:44.771660 auto size-- 65535DDR cs0 size: 2048MB
460 06:58:44.772149 DDR cs1 size: 2048MB
461 06:58:44.777267 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 06:58:44.777732 cs0 DataBus test pass
463 06:58:44.782837 cs1 DataBus test pass
464 06:58:44.783298 cs0 AddrBus test pass
465 06:58:44.783737 cs1 AddrBus test pass
466 06:58:44.784204
467 06:58:44.788462 100bdlr_step_size ps== 420
468 06:58:44.788934 result report
469 06:58:44.794039 boot times 0Enable ddr reg access
470 06:58:44.799275 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 06:58:44.812706 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 06:58:45.386370 0.0;M3 CHK:0;cm4_sp_mode 0
473 06:58:45.386946 MVN_1=0x00000000
474 06:58:45.391882 MVN_2=0x00000000
475 06:58:45.397655 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 06:58:45.398140 OPS=0x10
477 06:58:45.398597 ring efuse init
478 06:58:45.399043 chipver efuse init
479 06:58:45.403239 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 06:58:45.408835 [0.018961 Inits done]
481 06:58:45.409311 secure task start!
482 06:58:45.409762 high task start!
483 06:58:45.413430 low task start!
484 06:58:45.413905 run into bl31
485 06:58:45.420181 NOTICE: BL31: v1.3(release):4fc40b1
486 06:58:45.427877 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 06:58:45.428394 NOTICE: BL31: G12A normal boot!
488 06:58:45.453241 NOTICE: BL31: BL33 decompress pass
489 06:58:45.458935 ERROR: Error initializing runtime service opteed_fast
490 06:58:46.691817
491 06:58:46.692483
492 06:58:46.699271 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 06:58:46.699773
494 06:58:46.700270 Model: Libre Computer AML-A311D-CC Alta
495 06:58:46.908626 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 06:58:46.931657 DRAM: 2 GiB (effective 3.8 GiB)
497 06:58:47.074940 Core: 408 devices, 31 uclasses, devicetree: separate
498 06:58:47.080659 WDT: Not starting watchdog@f0d0
499 06:58:47.113115 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 06:58:47.125581 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 06:58:47.129733 ** Bad device specification mmc 0 **
502 06:58:47.140937 Card did not respond to voltage select! : -110
503 06:58:47.148472 ** Bad device specification mmc 0 **
504 06:58:47.148984 Couldn't find partition mmc 0
505 06:58:47.156892 Card did not respond to voltage select! : -110
506 06:58:47.162429 ** Bad device specification mmc 0 **
507 06:58:47.162905 Couldn't find partition mmc 0
508 06:58:47.166933 Error: could not access storage.
509 06:58:48.430112 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 06:58:48.430640 bl2_stage_init 0x01
511 06:58:48.431111 bl2_stage_init 0x81
512 06:58:48.435689 hw id: 0x0000 - pwm id 0x01
513 06:58:48.436235 bl2_stage_init 0xc1
514 06:58:48.436697 bl2_stage_init 0x02
515 06:58:48.437144
516 06:58:48.441288 L0:00000000
517 06:58:48.441770 L1:20000703
518 06:58:48.442214 L2:00008067
519 06:58:48.442655 L3:14000000
520 06:58:48.446898 B2:00402000
521 06:58:48.447370 B1:e0f83180
522 06:58:48.447818
523 06:58:48.448299 TE: 58167
524 06:58:48.448751
525 06:58:48.452614 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 06:58:48.453097
527 06:58:48.453548 Board ID = 1
528 06:58:48.458096 Set A53 clk to 24M
529 06:58:48.458571 Set A73 clk to 24M
530 06:58:48.459021 Set clk81 to 24M
531 06:58:48.463669 A53 clk: 1200 MHz
532 06:58:48.464170 A73 clk: 1200 MHz
533 06:58:48.464620 CLK81: 166.6M
534 06:58:48.465060 smccc: 00012abe
535 06:58:48.469257 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 06:58:48.474883 board id: 1
537 06:58:48.479940 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 06:58:48.491513 fw parse done
539 06:58:48.497310 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 06:58:48.539238 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 06:58:48.550907 PIEI prepare done
542 06:58:48.551381 fastboot data load
543 06:58:48.551830 fastboot data verify
544 06:58:48.556749 verify result: 266
545 06:58:48.562189 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 06:58:48.562665 LPDDR4 probe
547 06:58:48.563115 ddr clk to 1584MHz
548 06:58:48.569641 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 06:58:48.606762
550 06:58:48.607252 dmc_version 0001
551 06:58:48.613216 Check phy result
552 06:58:48.625668 INFO : End of CA training
553 06:58:48.626137 INFO : End of initialization
554 06:58:48.626584 INFO : Training has run successfully!
555 06:58:48.627028 Check phy result
556 06:58:48.631166 INFO : End of initialization
557 06:58:48.631635 INFO : End of read enable training
558 06:58:48.636767 INFO : End of fine write leveling
559 06:58:48.642386 INFO : End of Write leveling coarse delay
560 06:58:48.642859 INFO : Training has run successfully!
561 06:58:48.643304 Check phy result
562 06:58:48.648002 INFO : End of initialization
563 06:58:48.648479 INFO : End of read dq deskew training
564 06:58:48.653569 INFO : End of MPR read delay center optimization
565 06:58:48.659194 INFO : End of write delay center optimization
566 06:58:48.664764 INFO : End of read delay center optimization
567 06:58:48.665231 INFO : End of max read latency training
568 06:58:48.670369 INFO : Training has run successfully!
569 06:58:48.670837 1D training succeed
570 06:58:48.679507 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 06:58:48.726433 Check phy result
572 06:58:48.726903 INFO : End of initialization
573 06:58:48.748243 INFO : End of 2D read delay Voltage center optimization
574 06:58:48.768762 INFO : End of 2D read delay Voltage center optimization
575 06:58:48.820831 INFO : End of 2D write delay Voltage center optimization
576 06:58:48.870512 INFO : End of 2D write delay Voltage center optimization
577 06:58:48.876115 INFO : Training has run successfully!
578 06:58:48.876579
579 06:58:48.877026 channel==0
580 06:58:48.881731 RxClkDly_Margin_A0==88 ps 9
581 06:58:48.882195 TxDqDly_Margin_A0==98 ps 10
582 06:58:48.887306 RxClkDly_Margin_A1==88 ps 9
583 06:58:48.887777 TxDqDly_Margin_A1==88 ps 9
584 06:58:48.888279 TrainedVREFDQ_A0==74
585 06:58:48.892899 TrainedVREFDQ_A1==74
586 06:58:48.893376 VrefDac_Margin_A0==25
587 06:58:48.893816 DeviceVref_Margin_A0==40
588 06:58:48.898501 VrefDac_Margin_A1==26
589 06:58:48.898973 DeviceVref_Margin_A1==40
590 06:58:48.899419
591 06:58:48.899865
592 06:58:48.900350 channel==1
593 06:58:48.904112 RxClkDly_Margin_A0==98 ps 10
594 06:58:48.904583 TxDqDly_Margin_A0==98 ps 10
595 06:58:49.562385 RxClkDly_Margin_A1==98 ps 10
596 06:58:49.563085 TxDqDly_Margin_A1==88 ps 9
597 06:58:49.563572 TrainedVREFDQ_A0==77
598 06:58:49.564107 TrainedVREFDQ_A1==77
599 06:58:49.564593 VrefDac_Margin_A0==22
600 06:58:49.565472 DeviceVref_Margin_A0==37
601 06:58:49.565948 VrefDac_Margin_A1==23
602 06:58:49.566381 DeviceVref_Margin_A1==37
603 06:58:49.566811
604 06:58:49.567244 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 06:58:49.567677
606 06:58:49.568151 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 06:58:49.568610 2D training succeed
608 06:58:49.569052 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 06:58:49.569484 auto size-- 65535DDR cs0 size: 2048MB
610 06:58:49.569914 DDR cs1 size: 2048MB
611 06:58:49.570339 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 06:58:49.570766 cs0 DataBus test pass
613 06:58:49.571195 cs1 DataBus test pass
614 06:58:49.571628 cs0 AddrBus test pass
615 06:58:49.572093 cs1 AddrBus test pass
616 06:58:49.572554
617 06:58:49.573007 100bdlr_step_size ps== 420
618 06:58:49.573467 result report
619 06:58:49.573932 boot times 0Enable ddr reg access
620 06:58:49.574409 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 06:58:49.574901 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 06:58:49.586779 0.0;M3 CHK:0;cm4_sp_mode 0
623 06:58:49.587333 MVN_1=0x00000000
624 06:58:49.593066 MVN_2=0x00000000
625 06:58:49.597715 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 06:58:49.598279 OPS=0x10
627 06:58:49.598725 ring efuse init
628 06:58:49.599157 chipver efuse init
629 06:58:49.603588 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 06:58:49.608831 [0.018961 Inits done]
631 06:58:49.609381 secure task start!
632 06:58:49.609831 high task start!
633 06:58:49.612625 low task start!
634 06:58:49.613116 run into bl31
635 06:58:49.620372 NOTICE: BL31: v1.3(release):4fc40b1
636 06:58:49.628142 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 06:58:49.628780 NOTICE: BL31: G12A normal boot!
638 06:58:49.653163 NOTICE: BL31: BL33 decompress pass
639 06:58:49.658908 ERROR: Error initializing runtime service opteed_fast
640 06:58:50.891825
641 06:58:50.892457
642 06:58:50.899554 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 06:58:50.900124
644 06:58:50.900608 Model: Libre Computer AML-A311D-CC Alta
645 06:58:51.108661 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 06:58:51.132100 DRAM: 2 GiB (effective 3.8 GiB)
647 06:58:51.275028 Core: 408 devices, 31 uclasses, devicetree: separate
648 06:58:51.280232 WDT: Not starting watchdog@f0d0
649 06:58:51.313092 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 06:58:51.325496 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 06:58:51.330654 ** Bad device specification mmc 0 **
652 06:58:51.340865 Card did not respond to voltage select! : -110
653 06:58:51.348662 ** Bad device specification mmc 0 **
654 06:58:51.349188 Couldn't find partition mmc 0
655 06:58:51.356978 Card did not respond to voltage select! : -110
656 06:58:51.362454 ** Bad device specification mmc 0 **
657 06:58:51.362975 Couldn't find partition mmc 0
658 06:58:51.367579 Error: could not access storage.
659 06:58:51.709911 Net: eth0: ethernet@ff3f0000
660 06:58:51.710447 starting USB...
661 06:58:51.961681 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 06:58:51.962216 Starting the controller
663 06:58:51.968804 USB XHCI 1.10
664 06:58:53.682246 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 06:58:53.682877 bl2_stage_init 0x01
666 06:58:53.683357 bl2_stage_init 0x81
667 06:58:53.687775 hw id: 0x0000 - pwm id 0x01
668 06:58:53.688333 bl2_stage_init 0xc1
669 06:58:53.688798 bl2_stage_init 0x02
670 06:58:53.689252
671 06:58:53.693381 L0:00000000
672 06:58:53.693902 L1:20000703
673 06:58:53.694359 L2:00008067
674 06:58:53.694804 L3:14000000
675 06:58:53.698961 B2:00402000
676 06:58:53.699483 B1:e0f83180
677 06:58:53.699939
678 06:58:53.700429 TE: 58159
679 06:58:53.700879
680 06:58:53.704581 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 06:58:53.705107
682 06:58:53.705583 Board ID = 1
683 06:58:53.710132 Set A53 clk to 24M
684 06:58:53.710652 Set A73 clk to 24M
685 06:58:53.711110 Set clk81 to 24M
686 06:58:53.715755 A53 clk: 1200 MHz
687 06:58:53.716310 A73 clk: 1200 MHz
688 06:58:53.716773 CLK81: 166.6M
689 06:58:53.717222 smccc: 00012ab5
690 06:58:53.721348 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 06:58:53.726978 board id: 1
692 06:58:53.732600 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 06:58:53.743566 fw parse done
694 06:58:53.749411 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 06:58:53.791955 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 06:58:53.802875 PIEI prepare done
697 06:58:53.803398 fastboot data load
698 06:58:53.803868 fastboot data verify
699 06:58:53.808524 verify result: 266
700 06:58:53.814108 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 06:58:53.814629 LPDDR4 probe
702 06:58:53.815088 ddr clk to 1584MHz
703 06:58:53.821583 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 06:58:53.858877
705 06:58:53.859401 dmc_version 0001
706 06:58:53.865668 Check phy result
707 06:58:53.871893 INFO : End of CA training
708 06:58:53.872444 INFO : End of initialization
709 06:58:53.883226 INFO : Training has run successfully!
710 06:58:53.883746 Check phy result
711 06:58:53.884248 INFO : End of initialization
712 06:58:53.884703 INFO : End of read enable training
713 06:58:53.886385 INFO : End of fine write leveling
714 06:58:53.891905 INFO : End of Write leveling coarse delay
715 06:58:53.897502 INFO : Training has run successfully!
716 06:58:53.898022 Check phy result
717 06:58:53.898481 INFO : End of initialization
718 06:58:53.903110 INFO : End of read dq deskew training
719 06:58:53.906530 INFO : End of MPR read delay center optimization
720 06:58:53.912043 INFO : End of write delay center optimization
721 06:58:53.923402 INFO : End of read delay center optimization
722 06:58:53.923922 INFO : End of max read latency training
723 06:58:53.924419 INFO : Training has run successfully!
724 06:58:53.924873 1D training succeed
725 06:58:53.930875 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 06:58:53.978911 Check phy result
727 06:58:53.979427 INFO : End of initialization
728 06:58:54.000017 INFO : End of 2D read delay Voltage center optimization
729 06:58:54.021034 INFO : End of 2D read delay Voltage center optimization
730 06:58:54.072287 INFO : End of 2D write delay Voltage center optimization
731 06:58:54.122480 INFO : End of 2D write delay Voltage center optimization
732 06:58:54.128057 INFO : Training has run successfully!
733 06:58:54.128588
734 06:58:54.129051 channel==0
735 06:58:54.133604 RxClkDly_Margin_A0==88 ps 9
736 06:58:54.134132 TxDqDly_Margin_A0==98 ps 10
737 06:58:54.139195 RxClkDly_Margin_A1==88 ps 9
738 06:58:54.139725 TxDqDly_Margin_A1==98 ps 10
739 06:58:54.140230 TrainedVREFDQ_A0==74
740 06:58:54.144807 TrainedVREFDQ_A1==74
741 06:58:54.145347 VrefDac_Margin_A0==25
742 06:58:54.145797 DeviceVref_Margin_A0==40
743 06:58:54.150444 VrefDac_Margin_A1==25
744 06:58:54.150979 DeviceVref_Margin_A1==40
745 06:58:54.151435
746 06:58:54.151890
747 06:58:54.156033 channel==1
748 06:58:54.156563 RxClkDly_Margin_A0==98 ps 10
749 06:58:54.157018 TxDqDly_Margin_A0==88 ps 9
750 06:58:54.161617 RxClkDly_Margin_A1==88 ps 9
751 06:58:54.162138 TxDqDly_Margin_A1==88 ps 9
752 06:58:54.167200 TrainedVREFDQ_A0==74
753 06:58:54.167721 TrainedVREFDQ_A1==77
754 06:58:54.168227 VrefDac_Margin_A0==23
755 06:58:54.172804 DeviceVref_Margin_A0==40
756 06:58:54.173320 VrefDac_Margin_A1==24
757 06:58:54.178435 DeviceVref_Margin_A1==37
758 06:58:54.178952
759 06:58:54.179410 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 06:58:54.179860
761 06:58:54.211963 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
762 06:58:54.212546 2D training succeed
763 06:58:54.217670 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 06:58:54.223217 auto size-- 65535DDR cs0 size: 2048MB
765 06:58:54.223739 DDR cs1 size: 2048MB
766 06:58:54.228814 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 06:58:54.229334 cs0 DataBus test pass
768 06:58:54.234446 cs1 DataBus test pass
769 06:58:54.234958 cs0 AddrBus test pass
770 06:58:54.235407 cs1 AddrBus test pass
771 06:58:54.235850
772 06:58:54.240019 100bdlr_step_size ps== 420
773 06:58:54.240553 result report
774 06:58:54.245615 boot times 0Enable ddr reg access
775 06:58:54.259951 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 06:58:54.264272 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 06:58:54.838137 0.0;M3 CHK:0;cm4_sp_mode 0
778 06:58:54.838802 MVN_1=0x00000000
779 06:58:54.843793 MVN_2=0x00000000
780 06:58:54.849390 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 06:58:54.850121 OPS=0x10
782 06:58:54.850635 ring efuse init
783 06:58:54.851073 chipver efuse init
784 06:58:54.855041 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 06:58:54.860691 [0.018961 Inits done]
786 06:58:54.861250 secure task start!
787 06:58:54.861687 high task start!
788 06:58:54.864549 low task start!
789 06:58:54.865091 run into bl31
790 06:58:54.871783 NOTICE: BL31: v1.3(release):4fc40b1
791 06:58:54.879648 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 06:58:54.880246 NOTICE: BL31: G12A normal boot!
793 06:58:54.904970 NOTICE: BL31: BL33 decompress pass
794 06:58:54.910834 ERROR: Error initializing runtime service opteed_fast
795 06:58:56.143400
796 06:58:56.144053
797 06:58:56.358307 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 06:58:56.358839
799 06:58:56.359308 Model: Libre Computer AML-A311D-CC Alta
800 06:58:56.360544 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 06:58:56.383286 DRAM: 2 GiB (effective 3.8 GiB)
802 06:58:56.526548 Core: 408 devices, 31 uclasses, devicetree: separate
803 06:58:56.532058 WDT: Not starting watchdog@f0d0
804 06:58:56.564772 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 06:58:56.577130 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 06:58:56.582051 ** Bad device specification mmc 0 **
807 06:58:56.592469 Card did not respond to voltage select! : -110
808 06:58:56.599373 ** Bad device specification mmc 0 **
809 06:58:56.599881 Couldn't find partition mmc 0
810 06:58:56.608479 Card did not respond to voltage select! : -110
811 06:58:56.613990 ** Bad device specification mmc 0 **
812 06:58:56.614494 Couldn't find partition mmc 0
813 06:58:56.618233 Error: could not access storage.
814 06:58:56.960745 Net: eth0: ethernet@ff3f0000
815 06:58:56.961273 starting USB...
816 06:58:57.213237 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 06:58:57.213754 Starting the controller
818 06:58:57.426196 USB XHCI 1.10
819 06:58:59.380614 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 06:58:59.381160 bl2_stage_init 0x01
821 06:58:59.381622 bl2_stage_init 0x81
822 06:58:59.386339 hw id: 0x0000 - pwm id 0x01
823 06:58:59.386846 bl2_stage_init 0xc1
824 06:58:59.387303 bl2_stage_init 0x02
825 06:58:59.387747
826 06:58:59.392082 L0:00000000
827 06:58:59.392589 L1:20000703
828 06:58:59.393044 L2:00008067
829 06:58:59.393485 L3:14000000
830 06:58:59.394741 B2:00402000
831 06:58:59.395246 B1:e0f83180
832 06:58:59.395696
833 06:58:59.396182 TE: 58124
834 06:58:59.396634
835 06:58:59.405777 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 06:58:59.406290
837 06:58:59.406752 Board ID = 1
838 06:58:59.407201 Set A53 clk to 24M
839 06:58:59.407636 Set A73 clk to 24M
840 06:58:59.411448 Set clk81 to 24M
841 06:58:59.411951 A53 clk: 1200 MHz
842 06:58:59.412436 A73 clk: 1200 MHz
843 06:58:59.417017 CLK81: 166.6M
844 06:58:59.417517 smccc: 00012a91
845 06:58:59.422619 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 06:58:59.423129 board id: 1
847 06:58:59.431331 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 06:58:59.441837 fw parse done
849 06:58:59.447466 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 06:58:59.489645 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 06:58:59.501490 PIEI prepare done
852 06:58:59.501993 fastboot data load
853 06:58:59.502446 fastboot data verify
854 06:58:59.507024 verify result: 266
855 06:58:59.512686 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 06:58:59.513185 LPDDR4 probe
857 06:58:59.513636 ddr clk to 1584MHz
858 06:58:59.519698 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 06:58:59.557845
860 06:58:59.558346 dmc_version 0001
861 06:58:59.564534 Check phy result
862 06:58:59.570407 INFO : End of CA training
863 06:58:59.570899 INFO : End of initialization
864 06:58:59.581739 INFO : Training has run successfully!
865 06:58:59.582246 Check phy result
866 06:58:59.582704 INFO : End of initialization
867 06:58:59.583150 INFO : End of read enable training
868 06:58:59.587297 INFO : End of fine write leveling
869 06:58:59.598548 INFO : End of Write leveling coarse delay
870 06:58:59.599055 INFO : Training has run successfully!
871 06:58:59.599514 Check phy result
872 06:58:59.599958 INFO : End of initialization
873 06:58:59.600449 INFO : End of read dq deskew training
874 06:58:59.603932 INFO : End of MPR read delay center optimization
875 06:58:59.609527 INFO : End of write delay center optimization
876 06:58:59.615125 INFO : End of read delay center optimization
877 06:58:59.615622 INFO : End of max read latency training
878 06:58:59.620714 INFO : Training has run successfully!
879 06:58:59.621215 1D training succeed
880 06:58:59.629865 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 06:58:59.677338 Check phy result
882 06:58:59.677841 INFO : End of initialization
883 06:58:59.719521 INFO : End of 2D read delay Voltage center optimization
884 06:58:59.720067 INFO : End of 2D read delay Voltage center optimization
885 06:58:59.771464 INFO : End of 2D write delay Voltage center optimization
886 06:58:59.820854 INFO : End of 2D write delay Voltage center optimization
887 06:58:59.826451 INFO : Training has run successfully!
888 06:58:59.826947
889 06:58:59.827403 channel==0
890 06:58:59.832032 RxClkDly_Margin_A0==88 ps 9
891 06:58:59.832536 TxDqDly_Margin_A0==98 ps 10
892 06:58:59.837609 RxClkDly_Margin_A1==88 ps 9
893 06:58:59.838106 TxDqDly_Margin_A1==98 ps 10
894 06:58:59.838565 TrainedVREFDQ_A0==74
895 06:58:59.843356 TrainedVREFDQ_A1==75
896 06:58:59.843882 VrefDac_Margin_A0==25
897 06:58:59.844364 DeviceVref_Margin_A0==40
898 06:58:59.848828 VrefDac_Margin_A1==25
899 06:58:59.849352 DeviceVref_Margin_A1==39
900 06:58:59.849785
901 06:58:59.850214
902 06:58:59.854405 channel==1
903 06:58:59.854891 RxClkDly_Margin_A0==88 ps 9
904 06:58:59.855321 TxDqDly_Margin_A0==98 ps 10
905 06:58:59.865676 RxClkDly_Margin_A1==88 ps 9
906 06:58:59.866183 TxDqDly_Margin_A1==88 ps 9
907 06:58:59.866619 TrainedVREFDQ_A0==77
908 06:58:59.867047 TrainedVREFDQ_A1==77
909 06:58:59.867472 VrefDac_Margin_A0==22
910 06:58:59.871253 DeviceVref_Margin_A0==37
911 06:58:59.871734 VrefDac_Margin_A1==24
912 06:58:59.876783 DeviceVref_Margin_A1==37
913 06:58:59.877264
914 06:58:59.877697 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 06:58:59.878126
916 06:58:59.910493 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
917 06:58:59.911015 2D training succeed
918 06:58:59.916001 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 06:58:59.921587 auto size-- 65535DDR cs0 size: 2048MB
920 06:58:59.922074 DDR cs1 size: 2048MB
921 06:58:59.927268 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 06:58:59.927749 cs0 DataBus test pass
923 06:58:59.932792 cs1 DataBus test pass
924 06:58:59.933272 cs0 AddrBus test pass
925 06:58:59.933704 cs1 AddrBus test pass
926 06:58:59.934127
927 06:58:59.938375 100bdlr_step_size ps== 420
928 06:58:59.938867 result report
929 06:58:59.949020 boot times 0Enable ddr reg access
930 06:58:59.949513 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 06:58:59.961860 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 06:59:00.536400 0.0;M3 CHK:0;cm4_sp_mode 0
933 06:59:00.536958 MVN_1=0x00000000
934 06:59:00.541934 MVN_2=0x00000000
935 06:59:00.547700 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 06:59:00.548258 OPS=0x10
937 06:59:00.548718 ring efuse init
938 06:59:00.549160 chipver efuse init
939 06:59:00.553308 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 06:59:00.558905 [0.018960 Inits done]
941 06:59:00.559411 secure task start!
942 06:59:00.559861 high task start!
943 06:59:00.563452 low task start!
944 06:59:00.563954 run into bl31
945 06:59:00.570178 NOTICE: BL31: v1.3(release):4fc40b1
946 06:59:00.576980 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 06:59:00.577490 NOTICE: BL31: G12A normal boot!
948 06:59:00.603351 NOTICE: BL31: BL33 decompress pass
949 06:59:00.608962 ERROR: Error initializing runtime service opteed_fast
950 06:59:01.841762
951 06:59:01.842283
952 06:59:01.849468 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 06:59:01.849979
954 06:59:01.850434 Model: Libre Computer AML-A311D-CC Alta
955 06:59:02.057728 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 06:59:02.082050 DRAM: 2 GiB (effective 3.8 GiB)
957 06:59:02.230153 Core: 408 devices, 31 uclasses, devicetree: separate
958 06:59:02.230666 WDT: Not starting watchdog@f0d0
959 06:59:02.263281 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 06:59:02.275651 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 06:59:02.280667 ** Bad device specification mmc 0 **
962 06:59:02.290985 Card did not respond to voltage select! : -110
963 06:59:02.298634 ** Bad device specification mmc 0 **
964 06:59:02.299139 Couldn't find partition mmc 0
965 06:59:02.306976 Card did not respond to voltage select! : -110
966 06:59:02.312562 ** Bad device specification mmc 0 **
967 06:59:02.313066 Couldn't find partition mmc 0
968 06:59:02.317641 Error: could not access storage.
969 06:59:02.659977 Net: eth0: ethernet@ff3f0000
970 06:59:02.660536 starting USB...
971 06:59:02.911767 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 06:59:02.912325 Starting the controller
973 06:59:02.918790 USB XHCI 1.10
974 06:59:04.472672 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 06:59:04.481080 scanning usb for storage devices... 0 Storage Device(s) found
977 06:59:04.532654 Hit any key to stop autoboot: 1
978 06:59:04.533492 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 06:59:04.534265 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 06:59:04.534796 Setting prompt string to ['=>']
981 06:59:04.535327 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 06:59:04.548513 0
983 06:59:04.549464 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 06:59:04.550017 Sending with 10 millisecond of delay
986 06:59:05.684753 => setenv autoload no
987 06:59:05.695507 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 06:59:05.700891 setenv autoload no
989 06:59:05.701665 Sending with 10 millisecond of delay
991 06:59:07.498446 => setenv initrd_high 0xffffffff
992 06:59:07.509237 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 06:59:07.510127 setenv initrd_high 0xffffffff
994 06:59:07.510881 Sending with 10 millisecond of delay
996 06:59:09.127052 => setenv fdt_high 0xffffffff
997 06:59:09.137759 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 06:59:09.138604 setenv fdt_high 0xffffffff
999 06:59:09.139358 Sending with 10 millisecond of delay
1001 06:59:09.431297 => dhcp
1002 06:59:09.442026 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 06:59:09.442899 dhcp
1004 06:59:09.443383 Speed: 1000, full duplex
1005 06:59:09.443838 BOOTP broadcast 1
1006 06:59:09.485815 DHCP client bound to address 192.168.6.244 (44 ms)
1007 06:59:09.486597 Sending with 10 millisecond of delay
1009 06:59:11.162940 => setenv serverip 192.168.6.2
1010 06:59:11.173678 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 06:59:11.174596 setenv serverip 192.168.6.2
1012 06:59:11.175329 Sending with 10 millisecond of delay
1014 06:59:14.898458 => tftpboot 0x01080000 851289/tftp-deploy-2t86ht24/kernel/uImage
1015 06:59:14.909211 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 06:59:14.910079 tftpboot 0x01080000 851289/tftp-deploy-2t86ht24/kernel/uImage
1017 06:59:14.910567 Speed: 1000, full duplex
1018 06:59:14.911022 Using ethernet@ff3f0000 device
1019 06:59:14.911922 TFTP from server 192.168.6.2; our IP address is 192.168.6.244
1020 06:59:14.917495 Filename '851289/tftp-deploy-2t86ht24/kernel/uImage'.
1021 06:59:14.921487 Load address: 0x1080000
1022 07:00:09.994617 Loading: *T T T T T T T T T T
1023 07:00:09.995290 Retry count exceeded; starting again
1025 07:00:09.996894 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
1028 07:00:09.998985 end: 2.4 uboot-commands (duration 00:01:37) [common]
1030 07:00:10.000587 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1032 07:00:10.001691 end: 2 uboot-action (duration 00:01:37) [common]
1034 07:00:10.003337 Cleaning after the job
1035 07:00:10.003922 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/ramdisk
1036 07:00:10.018716 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/kernel
1037 07:00:10.045300 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/dtb
1038 07:00:10.046449 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/nfsrootfs
1039 07:00:10.205887 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851289/tftp-deploy-2t86ht24/modules
1040 07:00:10.225761 start: 4.1 power-off (timeout 00:00:30) [common]
1041 07:00:10.226396 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1042 07:00:10.258575 >> OK - accepted request
1043 07:00:10.260692 Returned 0 in 0 seconds
1044 07:00:10.361411 end: 4.1 power-off (duration 00:00:00) [common]
1046 07:00:10.362292 start: 4.2 read-feedback (timeout 00:10:00) [common]
1047 07:00:10.362919 Listened to connection for namespace 'common' for up to 1s
1048 07:00:11.362862 Finalising connection for namespace 'common'
1049 07:00:11.363528 Disconnecting from shell: Finalise
1050 07:00:11.364115 =>
1051 07:00:11.465093 end: 4.2 read-feedback (duration 00:00:01) [common]
1052 07:00:11.465710 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/851289
1053 07:00:14.284961 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/851289
1054 07:00:14.285581 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.