Trying 192.168.56.21... Connected to conserv1. Escape character is '^]'. ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux) SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:00000703 L2:00008067 L3:15000000 S1:00000000 B2:20282000 B1:a0f83180 TE: 74287 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==74 VrefDac_Margin_A0==24 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==23 DeviceVref_Margin_A1==40 channel==1 RxClkDly_Margin_A0==78 ps 8 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==78 ps 8 TrainedVREFDQ_A0==78 TrainedVREFDQ_A1==75 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==36 VrefDac_Margin_A1==22 DeviceVref_Margin_A1==38 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 471 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz] OPS=0x04 ring efuse init 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 [0.017355 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:00000703 L2:00008067 L3:15000000 S1:00000000 B2:20282000 B1:a0f83180 TE: 70153 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==75 VrefDac_Margin_A0==24 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==23 DeviceVref_Margin_A1==39 channel==1 RxClkDly_Margin_A0==78 ps 8 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==78 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==36 VrefDac_Margin_A1==22 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 478 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz] OPS=0x04 ring efuse init 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 [0.017319 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:00000703 L2:00008067 L3:15000000 S1:00000000 B2:20282000 B1:a0f83180 TE: 70064 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==78 ps 8 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==74 VrefDac_Margin_A0==24 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==23 DeviceVref_Margin_A1==40 channel==1 RxClkDly_Margin_A0==78 ps 8 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==78 ps 8 TrainedVREFDQ_A0==78 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==36 VrefDac_Margin_A1==22 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 478 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz] OPS=0x04 ring efuse init 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 [0.017319 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC Model: Libre Computer AML-S905D3-CC Solitude SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2) DRAM: 2 GiB (effective 3.8 GiB) Core: 406 devices, 33 uclasses, devicetree: separate WDT: Not starting watchdog@f0d0 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0 Loading Environment from FAT... Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Error: could not access storage. Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 1  0 => setenv autoload no setenv autoload no => setenv initrd_high 0xffffffff setenv initrd_high 0xffffffff => setenv fdt_high 0xffffffff setenv fdt_high 0xffffffff => dhcp dhcp ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done Speed: 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 DHCP client bound to address 192.168.6.21 (269 ms) => setenv serverip 192.168.6.2 setenv serverip 192.168.6.2 => tftpboot 0x01080000 941265/tftp-deploy-z4v1ivy0/kernel/uImage tftpboot 0x01080000 941265/tftp-deploy-z4v1ivy0/kernel/uImage Speed: 1000, full duplex Using ethernet@ff3f0000 device TFTP from server 192.168.6.2; our IP address is 192.168.6.21 Filename '941265/tftp-deploy-z4v1ivy0/kernel/uImage'. Load address: 0x1080000 Loading: *################################################## 43.6 MiB 15.7 MiB/s done Bytes transferred = 45713984 (2b98a40 hex) => tftpboot 0x08000000 941265/tftp-deploy-z4v1ivy0/ramdisk/ramdisk.cpio.gz.uboot tftpboot 0x08000000 941265/tftp-deploy-z4v1ivy0/ramdisk/ramdisk.cpio.gz.uboot Speed: 1000, full duplex Using ethernet@ff3f0000 device TFTP from server 192.168.6.2; our IP address is 192.168.6.21 Filename '941265/tftp-deploy-z4v1ivy0/ramdisk/ramdisk.cpio.gz.uboot'. Load address: 0x8000000 Loading: *################################################## 24.8 MiB 12.9 MiB/s done Bytes transferred = 26056800 (18d9860 hex) => tftpboot 0x01070000 941265/tftp-deploy-z4v1ivy0/dtb/meson-sm1-s905d3-libretech-cc.dtb tftpboot 0x01070000 941265/tftp-deploy-z4v1ivy0/dtb/meson-sm1-s905d3-libretech-cc.dtb Speed: 1000, full duplex Using ethernet@ff3f0000 device TFTP from server 192.168.6.2; our IP address is 192.168.6.21 Filename '941265/tftp-deploy-z4v1ivy0/dtb/meson-sm1-s905d3-libretech-cc.dtb'. Load address: 0x1070000 Loading: *################################################## 52 KiB 4.2 MiB/s done Bytes transferred = 53209 (cfd9 hex) => setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp' setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp' => bootm 0x01080000 0x08000000 0x01070000 bootm 0x01080000 0x08000000 0x01070000 ## Booting kernel from Legacy Image at 01080000 ... Image Name: Image Type: AArch64 Linux Kernel Image (uncompressed) Data Size: 45713920 Bytes = 43.6 MiB Load Address: 01080000 Entry Point: 01080000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 08000000 ... Image Name: Image Type: AArch64 Linux RAMDisk Image (uncompressed) Data Size: 26056736 Bytes = 24.8 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 01070000 Booting using the fdt blob at 0x1070000 Working FDT set to 1070000 Loading Kernel Image Loading Ramdisk to 7e726000, end 7ffff820 ... OK Loading Device Tree to 000000007e716000, end 000000007e725fd8 ... OK Working FDT set to 7e716000 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd050] [ 0.000000] Linux version 6.12.0-rc1 (KernelCI@build-j363578-arm64-gcc-12-defconfig-lbfhq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Tue Nov 5 17:11:02 UTC 2024 [ 0.000000] KASLR disabled due to lack of seed [ 0.000000] Machine model: Libre Computer AML-S905D3-CC Solitude [ 0.000000] efi: UEFI not found. [ 0.000000] [Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader! [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000e4c00000, size 256 MiB [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000e4c00000..0x00000000f4bfffff (262144 KiB) map reusable linux,cma [ 0.000000] OF: reserved mem: 0x0000000005000000..0x00000000052fffff (3072 KiB) nomap non-reusable secmon@5000000 [ 0.000000] OF: reserved mem: 0x0000000005300000..0x00000000072fffff (32768 KiB) nomap non-reusable secmon@5300000 [ 0.000000] earlycon: meson0 at MMIO 0x00000000ff803000 (options '115200n8') [ 0.000000] printk: legacy bootconsole [meson0] enabled [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x00000000f4e5afff] [ 0.000000] NODE_DATA(0) allocated [mem 0xe466a0c0-0xe466c6ff] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000000000000-0x00000000f4e5afff] [ 0.000000] DMA32 empty [ 0.000000] Normal empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000004ffffff] [ 0.000000] node 0: [mem 0x0000000005000000-0x00000000072fffff] [ 0.000000] node 0: [mem 0x0000000007300000-0x00000000f4e5afff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000f4e5afff] [ 0.000000] On node 0, zone DMA: 12709 pages in unavailable ranges [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.1 [ 0.000000] percpu: Embedded 25 pages/cpu s61656 r8192 d32552 u102400 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: Virtualization Host Extensions [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Kernel command line: console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) <6>[ 0.000000] Fallback order for Node 0: 0 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1003099 <6>[ 0.000000] Policy zone: DMA <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off <6>[ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 3MB <6>[ 0.000000] software IO TLB: area num 4. <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000dfc00000-0x00000000e0000000] (4MB) <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation. <6>[ 0.000000] rcu: RCU event tracing is enabled. <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=4. <6>[ 0.000000] Trampoline variant of Tasks RCU enabled. <6>[ 0.000000] Tracing variant of Tasks RCU enabled. <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 <6>[ 0.000000] RCU Tasks: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4. <6>[ 0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4. <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 <6>[ 0.000000] Root IRQ handler: gic_handle_irq <6>[ 0.000000] GIC: Using split EOI/Deactivate mode <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. <6>[ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns <6>[ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns <6>[ 0.008615] Console: colour dummy device 80x25 <6>[ 0.012935] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) <6>[ 0.023296] pid_max: default: 32768 minimum: 301 <6>[ 0.028188] LSM: initializing lsm=capability <6>[ 0.032724] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) <6>[ 0.040209] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) <6>[ 0.068337] rcu: Hierarchical SRCU implementation. <6>[ 0.068375] rcu: Max phase no-delay instances is 1000. <6>[ 0.073428] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level <6>[ 0.085078] EFI services will not be available. <6>[ 0.090283] smp: Bringing up secondary CPUs ... <6>[ 0.091783] Detected VIPT I-cache on CPU1 <6>[ 0.091889] CPU1: Booted secondary processor 0x0000000100 [0x411fd050] <6>[ 0.098693] Detected VIPT I-cache on CPU2 <6>[ 0.098774] CPU2: Booted secondary processor 0x0000000200 [0x411fd050] <6>[ 0.106715] Detected VIPT I-cache on CPU3 <6>[ 0.106794] CPU3: Booted secondary processor 0x0000000300 [0x411fd050] <6>[ 0.106921] smp: Brought up 1 node, 4 CPUs <6>[ 0.138525] SMP: Total of 4 processors activated. <6>[ 0.143434] CPU: All CPU(s) started at EL2 <6>[ 0.147763] CPU features: detected: 32-bit EL0 Support <6>[ 0.153094] CPU features: detected: 32-bit EL1 Support <6>[ 0.158441] CPU features: detected: Data cache clean to the PoU not required for I/D coherence <6>[ 0.167236] CPU features: detected: Common not Private translations <6>[ 0.173704] CPU features: detected: CRC32 instructions <6>[ 0.179056] CPU features: detected: RCpc load-acquire (LDAPR) <6>[ 0.185003] CPU features: detected: LSE atomic instructions <6>[ 0.190781] CPU features: detected: Privileged Access Never <6>[ 0.196560] CPU features: detected: RAS Extension Support <6>[ 0.202207] alternatives: applying system-wide alternatives <6>[ 0.211361] Memory: 3555668K/4012396K available (17280K kernel code, 4898K rwdata, 11880K rodata, 10432K init, 742K bss, 190140K reserved, 262144K cma-reserved) <6>[ 0.223740] devtmpfs: initialized <6>[ 0.236795] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns <6>[ 0.241171] futex hash table entries: 1024 (order: 4, 65536 bytes, linear) <6>[ 0.253106] 21392 pages in range for non-PLT usage <6>[ 0.253126] 512912 pages in range for PLT usage <6>[ 0.253442] pinctrl core: initialized pinctrl subsystem <6>[ 0.266164] DMI not present or invalid. <6>[ 0.269795] NET: Registered PF_NETLINK/PF_ROUTE protocol family <6>[ 0.274719] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations <6>[ 0.281393] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations <6>[ 0.289562] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations <6>[ 0.297201] audit: initializing netlink subsys (disabled) <5>[ 0.302717] audit: type=2000 audit(0.212:1): state=initialized audit_enabled=0 res=1 <6>[ 0.304540] thermal_sys: Registered thermal governor 'step_wise' <6>[ 0.310414] thermal_sys: Registered thermal governor 'power_allocator' <6>[ 0.316692] cpuidle: using governor menu <6>[ 0.327738] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. <6>[ 0.334574] ASID allocator initialised with 65536 entries <6>[ 0.342775] Serial: AMBA PL011 UART driver <6>[ 0.355325] platform ff600000.hdmi-tx: Fixed dependency cycle(s) with /soc/vpu@ff900000 <6>[ 0.375591] platform ff600000.hdmi-tx: Fixed dependency cycle(s) with /soc/vpu@ff900000 <6>[ 0.378310] platform ff900000.vpu: Fixed dependency cycle(s) with /soc/bus@ff600000/hdmi-tx@0 <6>[ 0.393031] platform ff900000.vpu: Fixed dependency cycle(s) with /cvbs-connector <6>[ 0.395221] platform cvbs-connector: Fixed dependency cycle(s) with /soc/vpu@ff900000 <6>[ 0.403753] platform ff600000.hdmi-tx: Fixed dependency cycle(s) with /hdmi-connector <6>[ 0.411249] platform hdmi-connector: Fixed dependency cycle(s) with /soc/bus@ff600000/hdmi-tx@0 <6>[ 0.426077] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages <6>[ 0.427488] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page <6>[ 0.433979] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages <6>[ 0.440950] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page <6>[ 0.447420] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages <6>[ 0.454404] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page <6>[ 0.460875] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages <6>[ 0.467859] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page <6>[ 0.476578] ACPI: Interpreter disabled. <6>[ 0.482546] iommu: Default domain type: Translated <6>[ 0.483378] iommu: DMA domain TLB invalidation policy: strict mode <5>[ 0.490132] SCSI subsystem initialized <6>[ 0.494079] usbcore: registered new interface driver usbfs <6>[ 0.499475] usbcore: registered new interface driver hub <6>[ 0.504980] usbcore: registered new device driver usb <6>[ 0.511774] pps_core: LinuxPPS API ver. 1 registered <6>[ 0.515388] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <6>[ 0.524711] PTP clock support registered <6>[ 0.528993] EDAC MC: Ver: 3.0.0 <6>[ 0.532786] scmi_core: SCMI protocol bus registered <6>[ 0.538567] FPGA manager framework <6>[ 0.540996] Advanced Linux Sound Architecture Driver Initialized. <6>[ 0.548237] vgaarb: loaded <6>[ 0.550654] clocksource: Switched to clocksource arch_sys_counter <5>[ 0.556697] VFS: Disk quotas dquot_6.6.0 <6>[ 0.560604] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) <6>[ 0.567890] pnp: PnP ACPI: disabled <6>[ 0.579442] NET: Registered PF_INET protocol family <6>[ 0.579683] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear) <6>[ 0.589217] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear) <6>[ 0.595334] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) <6>[ 0.603213] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear) <6>[ 0.611488] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear) <6>[ 0.619570] TCP: Hash tables configured (established 32768 bind 32768) <6>[ 0.625718] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear) <6>[ 0.632579] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear) <6>[ 0.640011] NET: Registered PF_UNIX/PF_LOCAL protocol family <6>[ 0.646128] RPC: Registered named UNIX socket transport module. <6>[ 0.651852] RPC: Registered udp transport module. <6>[ 0.656760] RPC: Registered tcp transport module. <6>[ 0.661673] RPC: Registered tcp-with-tls transport module. <6>[ 0.667367] RPC: Registered tcp NFSv4.1 backchannel transport module. <6>[ 0.674017] PCI: CLS 0 bytes, default 64 <6>[ 0.678332] Unpacking initramfs... <6>[ 0.684996] kvm [1]: nv: 554 coarse grained trap handlers <6>[ 0.687801] kvm [1]: IPA Size Limit: 40 bits <6>[ 0.691942] kvm [1]: vgic interrupt IRQ9 <6>[ 0.696060] kvm [1]: VHE mode initialized successfully <5>[ 0.703101] Initialise system trusted keyrings <6>[ 0.706267] workingset: timestamp_bits=42 max_order=20 bucket_order=0 <6>[ 0.713038] squashfs: version 4.0 (2009/01/31) Phillip Lougher <5>[ 0.719082] NFS: Registering the id_resolver key type <5>[ 0.724013] Key type id_resolver registered <5>[ 0.728355] Key type id_legacy registered <6>[ 0.732629] nfs4filelayout_init: NFSv4 File Layout Driver Registering... <6>[ 0.739495] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... <6>[ 0.747318] 9p: Installing v9fs 9p2000 file system support <5>[ 0.803234] Key type asymmetric registered <5>[ 0.803286] Asymmetric key parser 'x509' registered <6>[ 0.807172] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) <6>[ 0.814680] io scheduler mq-deadline registered <6>[ 0.819414] io scheduler kyber registered <6>[ 0.823694] io scheduler bfq registered <6>[ 0.830455] irq_meson_gpio: 100 to 8 gpio interrupt mux initialized <6>[ 0.856277] ledtrig-cpu: registered to indicate activity on CPUs <6>[ 0.896960] soc soc0: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2) Detected <6>[ 0.914889] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled <6>[ 0.922087] ff803000.serial: ttyAML0 at MMIO 0xff803000 (irq = 14, base_baud = 1500000) is a meson_uart <6>[ 0.931743] printk: legacy console [ttyAML0] enabled <6>[ 0.931743] printk: legacy console [ttyAML0] enabled <6>[ 0.936566] printk: legacy bootconsole [meson0] disabled <6>[ 0.936566] printk: legacy bootconsole [meson0] disabled <6>[ 0.951792] msm_serial: driver initialized <6>[ 0.952635] SuperH (H)SCI(F) driver initialized <6>[ 0.957252] STM32 USART driver initialized <5>[ 0.964306] random: crng init done <6>[ 0.971589] loop: module loaded <6>[ 0.973449] megasas: 07.727.03.00-rc1 <6>[ 0.983350] tun: Universal TUN/TAP device driver, 1.6 <6>[ 0.985028] thunder_xcv, ver 1.0 <6>[ 0.986553] thunder_bgx, ver 1.0 <6>[ 0.990060] nicpf, ver 1.0 <6>[ 0.995434] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version <6>[ 1.000394] hns3: Copyright (c) 2017 Huawei Corporation. <6>[ 1.006046] hclge is initializing <6>[ 1.009534] e1000: Intel(R) PRO/1000 Network Driver <6>[ 1.014604] e1000: Copyright (c) 1999-2006 Intel Corporation. <6>[ 1.020652] e1000e: Intel(R) PRO/1000 Network Driver <6>[ 1.025782] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. <6>[ 1.032007] igb: Intel(R) Gigabit Ethernet Network Driver <6>[ 1.037569] igb: Copyright (c) 2007-2014 Intel Corporation. <6>[ 1.043422] igbvf: Intel(R) Gigabit Virtual Function Network Driver <6>[ 1.049874] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. <6>[ 1.056917] sky2: driver version 1.30 <6>[ 1.062425] VFIO - User Level meta-driver version: 0.3 <6>[ 1.070915] usbcore: registered new interface driver usb-storage <6>[ 1.077766] i2c_dev: i2c /dev entries driver <6>[ 1.093573] sdhci: Secure Digital Host Controller Interface driver <6>[ 1.094376] sdhci: Copyright(c) Pierre Ossman <6>[ 1.100871] Synopsys Designware Multimedia Card Interface Driver <6>[ 1.107820] sdhci-pltfm: SDHCI platform and OF driver helper <6>[ 1.115959] meson-sm: secure-monitor enabled <6>[ 1.117817] usbcore: registered new interface driver usbhid <6>[ 1.121458] usbhid: USB HID core driver <6>[ 1.141479] NET: Registered PF_PACKET protocol family <6>[ 1.141589] 9pnet: Installing 9P2000 support <5>[ 1.145785] Key type dns_resolver registered <6>[ 1.160397] registered taskstats version 1 <5>[ 1.160561] Loading compiled-in X.509 certificates <6>[ 1.171582] Demotion targets for Node 0: null <6>[ 1.207652] dwc3-meson-g12a ffe09000.usb: USB2 ports: 2 <6>[ 1.207694] dwc3-meson-g12a ffe09000.usb: USB3 ports: 1 <4>[ 1.217573] dwc2 ff400000.usb: supply vusb_d not found, using dummy regulator <4>[ 1.220531] dwc2 ff400000.usb: supply vusb_a not found, using dummy regulator <6>[ 1.228085] dwc2 ff400000.usb: EPs: 7, dedicated fifos, 712 entries in SPRAM <6>[ 1.238282] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller <6>[ 1.240779] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1 <6>[ 1.248765] xhci-hcd xhci-hcd.0.auto: hcc params 0x0228fe6c hci version 0x110 quirks 0x0000808000000010 <6>[ 1.258288] xhci-hcd xhci-hcd.0.auto: irq 16, io mem 0xff500000 <6>[ 1.264532] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller <6>[ 1.270123] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2 <6>[ 1.278012] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed <6>[ 1.285469] hub 1-0:1.0: USB hub found <6>[ 1.288817] hub 1-0:1.0: 2 ports detected <6>[ 1.295703] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. <6>[ 1.301968] hub 2-0:1.0: USB hub found <6>[ 1.305364] hub 2-0:1.0: 1 port detected <6>[ 1.316568] meson-gx-mmc ffe05000.mmc: Got CD GPIO <6>[ 1.333643] meson-gx-mmc ffe07000.mmc: allocated mmc-pwrseq <6>[ 1.542725] usb 1-1: new high-speed USB device number 2 using xhci-hcd <6>[ 1.733157] hub 1-1:1.0: USB hub found <6>[ 1.733460] hub 1-1:1.0: 4 ports detected <6>[ 1.741347] Freeing initrd memory: 25444K <6>[ 1.802818] usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd <6>[ 1.845841] hub 2-1:1.0: USB hub found <6>[ 1.846701] hub 2-1:1.0: 4 ports detected <6>[ 13.642743] clk: Disabling unused clocks <6>[ 13.642949] PM: genpd: Disabling unused power domains <6>[ 13.646625] ALSA device list: <6>[ 13.649825] No soundcards found. <6>[ 13.662326] Freeing unused kernel memory: 10432K <6>[ 13.662450] Run /init as init process Starting syslogd: OK Starting klogd: OK Running sysctl: OK Populating /dev using udev: <30>[ 13.733786] udevd[107]: starting version 3.2.9 <27>[ 13.739133] udevd[107]: specified user 'tss' unknown <27>[ 13.739248] udevd[107]: specified group 'tss' unknown <30>[ 13.745644] udevd[108]: starting eudev-3.2.9 <6>[ 14.118747] mc: Linux media interface: v0.10 <6>[ 14.138001] videodev: Linux video capture interface: v2.00 <6>[ 14.148813] meson-drm ff900000.vpu: Queued 2 outputs on vpu <6>[ 14.151931] meson8b-dwmac ff3f0000.ethernet: IRQ eth_wake_irq not found <6>[ 14.155976] meson8b-dwmac ff3f0000.ethernet: IRQ eth_lpi not found <6>[ 14.162596] meson8b-dwmac ff3f0000.ethernet: IRQ sfty not found <6>[ 14.177638] meson8b-dwmac ff3f0000.ethernet: PTP uses main clock <6>[ 14.179521] meson8b-dwmac ff3f0000.ethernet: User ID: 0x11, Synopsys ID: 0x37 <6>[ 14.179690] panfrost ffe40000.gpu: clock rate = 24000000 <6>[ 14.185705] meson8b-dwmac ff3f0000.ethernet: DWMAC1000 <3>[ 14.191302] panfrost ffe40000.gpu: error -ENODEV: _opp_set_regulators: no regulator (mali) found <6>[ 14.196694] meson8b-dwmac ff3f0000.ethernet: DMA HW capability register supported <6>[ 14.196705] meson8b-dwmac ff3f0000.ethernet: RX Checksum Offload Engine supported <6>[ 14.213402] panfrost ffe40000.gpu: mali-g31 id 0x7093 major 0x0 minor 0x0 status 0x0 <6>[ 14.213419] panfrost ffe40000.gpu: features: 00000000,000027f7, issues: 00000000,00000400 <6>[ 14.221151] meson8b-dwmac ff3f0000.ethernet: COE Type 2 <6>[ 14.243342] meson8b-dwmac ff3f0000.ethernet: TX Checksum insertion supported <3>[ 14.246783] debugfs: Directory 'ff800280.cec' with parent 'regmap' already present! <6>[ 14.250269] meson8b-dwmac ff3f0000.ethernet: Wake-Up On Lan supported <4>[ 14.263880] meson_vdec: module is from the staging directory, the quality is unknown, you have been warned. <6>[ 14.264995] panfrost ffe40000.gpu: Features: L2:0x07100206 Shader:0x00000000 Tiler:0x00000209 Mem:0x1 MMU:0x00002821 AS:0xff JS:0x7 <6>[ 14.274871] meson8b-dwmac ff3f0000.ethernet: Normal descriptors <6>[ 14.292988] meson8b-dwmac ff3f0000.ethernet: Ring mode enabled <6>[ 14.298832] panfrost ffe40000.gpu: shader_present=0x1 l2_present=0x1 <6>[ 14.299045] meson8b-dwmac ff3f0000.ethernet: Enable RX Mitigation via HW Watchdog Timer <6>[ 14.301002] meson-vrtc ff8000a8.rtc: registered as rtc0 <6>[ 14.301036] meson-vrtc ff8000a8.rtc: setting system clock to 1970-01-01T00:00:14 UTC (14) <6>[ 14.313939] meson-dw-hdmi ff600000.hdmi-tx: Detected HDMI TX controller v2.01a with HDCP (meson_dw_hdmi_phy) <4>[ 14.343025] meson-pwm ff802000.pwm: using obsolete compatible, please consider updating dt <6>[ 14.347258] [drm] Initialized panfrost 1.2.0 for ffe40000.gpu on minor 0 <6>[ 14.391518] meson-dw-hdmi ff600000.hdmi-tx: registered DesignWare HDMI I2C bus driver <6>[ 14.400458] meson-drm ff900000.vpu: bound ff600000.hdmi-tx (ops meson_dw_hdmi_ops [meson_dw_hdmi]) <3>[ 14.407155] meson-drm ff900000.vpu: DSI transceiver device is disabled <6>[ 14.419535] [drm] Initialized meson 1.0.0 for ff900000.vpu on minor 1 <6>[ 14.423488] Registered IR keymap rc-empty <6>[ 14.426914] rc rc0: meson-ir as /devices/platform/soc/ff800000.bus/ff808000.ir/rc/rc0 <6>[ 14.439530] usbcore: registered new device driver onboard-usb-dev <6>[ 14.441448] input: meson-ir as /devices/platform/soc/ff800000.bus/ff808000.ir/rc/rc0/input0 <6>[ 14.442968] rc rc0: sw decoder init <6>[ 14.443027] meson-ir ff808000.ir: receiver initialized <6>[ 14.595514] Console: switching to colour frame buffer device 128x48 <6>[ 14.641616] meson-drm ff900000.vpu: [drm] fb0: mesondrmfb frame buffer device <6>[ 14.885189] hub 1-1:1.0: USB hub found <6>[ 14.885518] hub 1-1:1.0: 4 ports detected <4>[ 15.026674] xhci-hcd xhci-hcd.0.auto: USB core suspending port 1-1 not in U0/U1/U2 <3>[ 15.029059] onboard-usb-dev 1-1: Failed to suspend device, error -32 <3>[ 15.035490] onboard-usb-dev 1-1: can't set config #1, error -71 <4>[ 15.054770] xhci-hcd xhci-hcd.0.auto: USB core suspending port 1-1 not in U0/U1/U2 <6>[ 15.057133] onboard-usb-dev 1-1: USB disconnect, device number 2 <3>[ 15.057183] onboard-usb-dev 1-1: Failed to suspend device, error -32 done Saving random seed: OK Starting network: OK Starting dropbear sshd: <6>[ 15.172878] NET: Registered PF_INET6 protocol family <6>[ 15.173938] Segment Routing with IPv6 <6>[ 15.176429] In-situ OAM (IOAM) with IPv6 OK <6>[ 15.189059] usb 2-1: reset SuperSpeed USB device number 2 using xhci-hcd /bin/sh: can't access tty; job control turned off / # / # # #<6>[ 15.330697] usb 1-1: new high-speed USB device number 3 using xhci-hcd / # export SHELL=/bin/sh export SHELL=/bin/sh / # . /lava-941265/environment <6>[ 15.525196] hub 1-1:1.0: USB hub found <6>[ 15.525540] hub 1-1:1.0: 4 ports detected . /lava-941265/environment / # /lava-941265/bin/lava-test-runner /lava-941265/0 /lava-941265/bin/lava-test-runner /lava-941265/0 + export 'TESTRUN_ID=0_dmesg' + cd /lava-941265/0/tests/0_dmesg + cat uuid + UUID=941265_1.5.<8>[ 15.729232] 2.4.1 + set +x + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh <8>[ 15.750996] <8>[ 15.769596] <8>[ 15.793203] + set +x <8>[ 15.797244] / #