Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:01:00.703579 lava-dispatcher, installed at version: 2024.01
2 22:01:00.704363 start: 0 validate
3 22:01:00.704825 Start time: 2024-10-08 22:01:00.704794+00:00 (UTC)
4 22:01:00.705382 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:01:00.705897 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 22:01:00.749659 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:01:00.750412 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-5-gf7efea4fcf4b9%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:01:00.780584 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:01:00.781225 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-5-gf7efea4fcf4b9%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:01:00.810965 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:01:00.811444 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-5-gf7efea4fcf4b9%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 22:01:00.848148 validate duration: 0.14
14 22:01:00.849026 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 22:01:00.849367 start: 1.1 download-retry (timeout 00:10:00) [common]
16 22:01:00.849693 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 22:01:00.850359 Not decompressing ramdisk as can be used compressed.
18 22:01:00.850818 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 22:01:00.851109 saving as /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/ramdisk/rootfs.cpio.gz
20 22:01:00.851390 total size: 47897469 (45 MB)
21 22:01:00.883132 progress 0 % (0 MB)
22 22:01:00.915166 progress 5 % (2 MB)
23 22:01:00.946203 progress 10 % (4 MB)
24 22:01:00.977085 progress 15 % (6 MB)
25 22:01:01.007929 progress 20 % (9 MB)
26 22:01:01.039497 progress 25 % (11 MB)
27 22:01:01.068881 progress 30 % (13 MB)
28 22:01:01.098310 progress 35 % (16 MB)
29 22:01:01.127512 progress 40 % (18 MB)
30 22:01:01.156992 progress 45 % (20 MB)
31 22:01:01.186353 progress 50 % (22 MB)
32 22:01:01.215560 progress 55 % (25 MB)
33 22:01:01.245297 progress 60 % (27 MB)
34 22:01:01.274631 progress 65 % (29 MB)
35 22:01:01.303702 progress 70 % (32 MB)
36 22:01:01.333129 progress 75 % (34 MB)
37 22:01:01.362570 progress 80 % (36 MB)
38 22:01:01.391710 progress 85 % (38 MB)
39 22:01:01.421009 progress 90 % (41 MB)
40 22:01:01.450636 progress 95 % (43 MB)
41 22:01:01.479663 progress 100 % (45 MB)
42 22:01:01.480422 45 MB downloaded in 0.63 s (72.62 MB/s)
43 22:01:01.480984 end: 1.1.1 http-download (duration 00:00:01) [common]
45 22:01:01.481872 end: 1.1 download-retry (duration 00:00:01) [common]
46 22:01:01.482163 start: 1.2 download-retry (timeout 00:09:59) [common]
47 22:01:01.482432 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 22:01:01.482891 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/kernel/Image
49 22:01:01.483137 saving as /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/kernel/Image
50 22:01:01.483346 total size: 45713920 (43 MB)
51 22:01:01.483558 No compression specified
52 22:01:01.525724 progress 0 % (0 MB)
53 22:01:01.553753 progress 5 % (2 MB)
54 22:01:01.581974 progress 10 % (4 MB)
55 22:01:01.610175 progress 15 % (6 MB)
56 22:01:01.638537 progress 20 % (8 MB)
57 22:01:01.665995 progress 25 % (10 MB)
58 22:01:01.694191 progress 30 % (13 MB)
59 22:01:01.722448 progress 35 % (15 MB)
60 22:01:01.750932 progress 40 % (17 MB)
61 22:01:01.778724 progress 45 % (19 MB)
62 22:01:01.806732 progress 50 % (21 MB)
63 22:01:01.835120 progress 55 % (24 MB)
64 22:01:01.863173 progress 60 % (26 MB)
65 22:01:01.891014 progress 65 % (28 MB)
66 22:01:01.918956 progress 70 % (30 MB)
67 22:01:01.947223 progress 75 % (32 MB)
68 22:01:01.975151 progress 80 % (34 MB)
69 22:01:02.002858 progress 85 % (37 MB)
70 22:01:02.031064 progress 90 % (39 MB)
71 22:01:02.059333 progress 95 % (41 MB)
72 22:01:02.086911 progress 100 % (43 MB)
73 22:01:02.087456 43 MB downloaded in 0.60 s (72.17 MB/s)
74 22:01:02.087938 end: 1.2.1 http-download (duration 00:00:01) [common]
76 22:01:02.088784 end: 1.2 download-retry (duration 00:00:01) [common]
77 22:01:02.089060 start: 1.3 download-retry (timeout 00:09:59) [common]
78 22:01:02.089325 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 22:01:02.089781 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 22:01:02.090056 saving as /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 22:01:02.090267 total size: 53209 (0 MB)
82 22:01:02.090475 No compression specified
83 22:01:02.129088 progress 61 % (0 MB)
84 22:01:02.129958 progress 100 % (0 MB)
85 22:01:02.130495 0 MB downloaded in 0.04 s (1.26 MB/s)
86 22:01:02.130985 end: 1.3.1 http-download (duration 00:00:00) [common]
88 22:01:02.131799 end: 1.3 download-retry (duration 00:00:00) [common]
89 22:01:02.132135 start: 1.4 download-retry (timeout 00:09:59) [common]
90 22:01:02.132410 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 22:01:02.132878 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/modules.tar.xz
92 22:01:02.133126 saving as /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/modules/modules.tar
93 22:01:02.133332 total size: 11593096 (11 MB)
94 22:01:02.133543 Using unxz to decompress xz
95 22:01:02.171127 progress 0 % (0 MB)
96 22:01:02.240861 progress 5 % (0 MB)
97 22:01:02.317488 progress 10 % (1 MB)
98 22:01:02.401365 progress 15 % (1 MB)
99 22:01:02.478225 progress 20 % (2 MB)
100 22:01:02.555565 progress 25 % (2 MB)
101 22:01:02.635839 progress 30 % (3 MB)
102 22:01:02.708700 progress 35 % (3 MB)
103 22:01:02.789534 progress 40 % (4 MB)
104 22:01:02.877168 progress 45 % (5 MB)
105 22:01:02.956025 progress 50 % (5 MB)
106 22:01:03.039347 progress 55 % (6 MB)
107 22:01:03.120925 progress 60 % (6 MB)
108 22:01:03.200947 progress 65 % (7 MB)
109 22:01:03.282162 progress 70 % (7 MB)
110 22:01:03.363668 progress 75 % (8 MB)
111 22:01:03.446620 progress 80 % (8 MB)
112 22:01:03.522650 progress 85 % (9 MB)
113 22:01:03.597596 progress 90 % (9 MB)
114 22:01:03.696681 progress 95 % (10 MB)
115 22:01:03.789554 progress 100 % (11 MB)
116 22:01:03.804485 11 MB downloaded in 1.67 s (6.62 MB/s)
117 22:01:03.805068 end: 1.4.1 http-download (duration 00:00:02) [common]
119 22:01:03.805897 end: 1.4 download-retry (duration 00:00:02) [common]
120 22:01:03.806168 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 22:01:03.806436 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 22:01:03.806684 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 22:01:03.806939 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 22:01:03.807535 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44
125 22:01:03.808014 makedir: /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin
126 22:01:03.808735 makedir: /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/tests
127 22:01:03.809421 makedir: /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/results
128 22:01:03.810079 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-add-keys
129 22:01:03.811083 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-add-sources
130 22:01:03.812103 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-background-process-start
131 22:01:03.813146 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-background-process-stop
132 22:01:03.814233 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-common-functions
133 22:01:03.815223 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-echo-ipv4
134 22:01:03.816230 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-install-packages
135 22:01:03.817205 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-installed-packages
136 22:01:03.818162 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-os-build
137 22:01:03.819123 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-probe-channel
138 22:01:03.820122 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-probe-ip
139 22:01:03.821104 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-target-ip
140 22:01:03.822066 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-target-mac
141 22:01:03.823162 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-target-storage
142 22:01:03.824192 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-case
143 22:01:03.825190 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-event
144 22:01:03.826156 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-feedback
145 22:01:03.827125 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-raise
146 22:01:03.828112 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-reference
147 22:01:03.829092 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-runner
148 22:01:03.830091 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-set
149 22:01:03.831069 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-test-shell
150 22:01:03.832068 Updating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-install-packages (oe)
151 22:01:03.833136 Updating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/bin/lava-installed-packages (oe)
152 22:01:03.834031 Creating /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/environment
153 22:01:03.834784 LAVA metadata
154 22:01:03.835312 - LAVA_JOB_ID=823105
155 22:01:03.835778 - LAVA_DISPATCHER_IP=192.168.6.2
156 22:01:03.836526 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 22:01:03.838459 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 22:01:03.839099 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 22:01:03.839554 skipped lava-vland-overlay
160 22:01:03.840125 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 22:01:03.840642 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 22:01:03.841067 skipped lava-multinode-overlay
163 22:01:03.841547 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 22:01:03.842042 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 22:01:03.842518 Loading test definitions
166 22:01:03.843057 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 22:01:03.843491 Using /lava-823105 at stage 0
168 22:01:03.845635 uuid=823105_1.5.2.4.1 testdef=None
169 22:01:03.846203 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 22:01:03.846719 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 22:01:03.849061 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 22:01:03.849901 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 22:01:03.852066 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 22:01:03.852904 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 22:01:03.854976 runner path: /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/0/tests/0_igt-gpu-panfrost test_uuid 823105_1.5.2.4.1
178 22:01:03.855561 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 22:01:03.856397 Creating lava-test-runner.conf files
181 22:01:03.856607 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/823105/lava-overlay-gig2xt44/lava-823105/0 for stage 0
182 22:01:03.856949 - 0_igt-gpu-panfrost
183 22:01:03.857294 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 22:01:03.857579 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 22:01:03.880826 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 22:01:03.881209 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 22:01:03.881471 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 22:01:03.881733 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 22:01:03.881992 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 22:01:10.726433 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 22:01:10.726961 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 22:01:10.727450 extracting modules file /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk
193 22:01:12.160530 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 22:01:12.161015 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 22:01:12.161308 [common] Applying overlay /var/lib/lava/dispatcher/tmp/823105/compress-overlay-5kbn6oh7/overlay-1.5.2.5.tar.gz to ramdisk
196 22:01:12.161533 [common] Applying overlay /var/lib/lava/dispatcher/tmp/823105/compress-overlay-5kbn6oh7/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk
197 22:01:12.192015 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 22:01:12.192455 start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
199 22:01:12.192751 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
200 22:01:12.192990 Converting downloaded kernel to a uImage
201 22:01:12.193304 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/kernel/Image /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/kernel/uImage
202 22:01:12.653153 output: Image Name:
203 22:01:12.653574 output: Created: Tue Oct 8 22:01:12 2024
204 22:01:12.653782 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 22:01:12.653985 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 22:01:12.654187 output: Load Address: 01080000
207 22:01:12.654384 output: Entry Point: 01080000
208 22:01:12.654582 output:
209 22:01:12.654914 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 22:01:12.655178 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 22:01:12.655445 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 22:01:12.655695 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 22:01:12.655950 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 22:01:12.656246 Building ramdisk /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk
215 22:01:19.505302 >> 502360 blocks
216 22:01:40.241586 Adding RAMdisk u-boot header.
217 22:01:40.242030 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk.cpio.gz.uboot
218 22:01:40.923961 output: Image Name:
219 22:01:40.924623 output: Created: Tue Oct 8 22:01:40 2024
220 22:01:40.925052 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 22:01:40.925464 output: Data Size: 65712553 Bytes = 64172.42 KiB = 62.67 MiB
222 22:01:40.925890 output: Load Address: 00000000
223 22:01:40.926307 output: Entry Point: 00000000
224 22:01:40.926708 output:
225 22:01:40.927711 rename /var/lib/lava/dispatcher/tmp/823105/extract-overlay-ramdisk-vsnm_jh5/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot
226 22:01:40.928460 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 22:01:40.929078 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 22:01:40.929655 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 22:01:40.930153 No LXC device requested
230 22:01:40.930702 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 22:01:40.931232 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 22:01:40.931784 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 22:01:40.932257 Checking files for TFTP limit of 4294967296 bytes.
234 22:01:40.935010 end: 1 tftp-deploy (duration 00:00:40) [common]
235 22:01:40.935816 start: 2 uboot-action (timeout 00:05:00) [common]
236 22:01:40.936419 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 22:01:40.936953 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 22:01:40.937477 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 22:01:40.938017 Using kernel file from prepare-kernel: 823105/tftp-deploy-w706l41p/kernel/uImage
240 22:01:40.938628 substitutions:
241 22:01:40.939041 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 22:01:40.939443 - {DTB_ADDR}: 0x01070000
243 22:01:40.940031 - {DTB}: 823105/tftp-deploy-w706l41p/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 22:01:40.940497 - {INITRD}: 823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot
245 22:01:40.940906 - {KERNEL_ADDR}: 0x01080000
246 22:01:40.941308 - {KERNEL}: 823105/tftp-deploy-w706l41p/kernel/uImage
247 22:01:40.941707 - {LAVA_MAC}: None
248 22:01:40.942145 - {PRESEED_CONFIG}: None
249 22:01:40.942548 - {PRESEED_LOCAL}: None
250 22:01:40.942943 - {RAMDISK_ADDR}: 0x08000000
251 22:01:40.943334 - {RAMDISK}: 823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot
252 22:01:40.943731 - {ROOT_PART}: None
253 22:01:40.944151 - {ROOT}: None
254 22:01:40.944551 - {SERVER_IP}: 192.168.6.2
255 22:01:40.944947 - {TEE_ADDR}: 0x83000000
256 22:01:40.945338 - {TEE}: None
257 22:01:40.945730 Parsed boot commands:
258 22:01:40.946110 - setenv autoload no
259 22:01:40.946500 - setenv initrd_high 0xffffffff
260 22:01:40.946888 - setenv fdt_high 0xffffffff
261 22:01:40.947274 - dhcp
262 22:01:40.947664 - setenv serverip 192.168.6.2
263 22:01:40.948078 - tftpboot 0x01080000 823105/tftp-deploy-w706l41p/kernel/uImage
264 22:01:40.948476 - tftpboot 0x08000000 823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot
265 22:01:40.948867 - tftpboot 0x01070000 823105/tftp-deploy-w706l41p/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 22:01:40.949258 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 22:01:40.949651 - bootm 0x01080000 0x08000000 0x01070000
268 22:01:40.950171 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 22:01:40.951673 start: 2.3 connect-device (timeout 00:05:00) [common]
271 22:01:40.952271 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 22:01:40.966048 Setting prompt string to ['lava-test: # ']
273 22:01:40.967586 end: 2.3 connect-device (duration 00:00:00) [common]
274 22:01:40.968253 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 22:01:40.969090 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 22:01:40.969720 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 22:01:40.970928 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 22:01:41.008074 >> OK - accepted request
279 22:01:41.010251 Returned 0 in 0 seconds
280 22:01:41.111403 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 22:01:41.113197 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 22:01:41.113894 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 22:01:41.114445 Setting prompt string to ['Hit any key to stop autoboot']
285 22:01:41.114971 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 22:01:41.116589 Trying 192.168.56.21...
287 22:01:41.117087 Connected to conserv1.
288 22:01:41.117505 Escape character is '^]'.
289 22:01:41.117922
290 22:01:41.118349 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 22:01:41.118779
292 22:01:48.891690 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 22:01:48.892160 bl2_stage_init 0x01
294 22:01:48.892385 bl2_stage_init 0x81
295 22:01:48.897233 hw id: 0x0000 - pwm id 0x01
296 22:01:48.897755 bl2_stage_init 0xc1
297 22:01:48.902835 bl2_stage_init 0x02
298 22:01:48.903384
299 22:01:48.903866 L0:00000000
300 22:01:48.904382 L1:00000703
301 22:01:48.904838 L2:00008067
302 22:01:48.905282 L3:15000000
303 22:01:48.908365 S1:00000000
304 22:01:48.908859 B2:20282000
305 22:01:48.909311 B1:a0f83180
306 22:01:48.909757
307 22:01:48.910203 TE: 71316
308 22:01:48.910644
309 22:01:48.914024 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 22:01:48.914521
311 22:01:48.919480 Board ID = 1
312 22:01:48.919971 Set cpu clk to 24M
313 22:01:48.920463 Set clk81 to 24M
314 22:01:48.925157 Use GP1_pll as DSU clk.
315 22:01:48.925640 DSU clk: 1200 Mhz
316 22:01:48.926086 CPU clk: 1200 MHz
317 22:01:48.930649 Set clk81 to 166.6M
318 22:01:48.936345 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 22:01:48.936838 board id: 1
320 22:01:48.943505 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 22:01:48.954361 fw parse done
322 22:01:48.960394 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 22:01:49.003539 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 22:01:49.014843 PIEI prepare done
325 22:01:49.015351 fastboot data load
326 22:01:49.015806 fastboot data verify
327 22:01:49.020249 verify result: 266
328 22:01:49.025918 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 22:01:49.026487 LPDDR4 probe
330 22:01:49.026952 ddr clk to 1584MHz
331 22:01:49.033893 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 22:01:49.071652
333 22:01:49.072333 dmc_version 0001
334 22:01:49.078602 Check phy result
335 22:01:49.084576 INFO : End of CA training
336 22:01:49.085073 INFO : End of initialization
337 22:01:49.090265 INFO : Training has run successfully!
338 22:01:49.090791 Check phy result
339 22:01:49.095809 INFO : End of initialization
340 22:01:49.096361 INFO : End of read enable training
341 22:01:49.099164 INFO : End of fine write leveling
342 22:01:49.104661 INFO : End of Write leveling coarse delay
343 22:01:49.110276 INFO : Training has run successfully!
344 22:01:49.110785 Check phy result
345 22:01:49.111238 INFO : End of initialization
346 22:01:49.115868 INFO : End of read dq deskew training
347 22:01:49.121472 INFO : End of MPR read delay center optimization
348 22:01:49.121985 INFO : End of write delay center optimization
349 22:01:49.127037 INFO : End of read delay center optimization
350 22:01:49.132640 INFO : End of max read latency training
351 22:01:49.133135 INFO : Training has run successfully!
352 22:01:49.138172 1D training succeed
353 22:01:49.144264 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 22:01:49.192934 Check phy result
355 22:01:49.193568 INFO : End of initialization
356 22:01:49.220040 INFO : End of 2D read delay Voltage center optimization
357 22:01:49.244035 INFO : End of 2D read delay Voltage center optimization
358 22:01:49.300645 INFO : End of 2D write delay Voltage center optimization
359 22:01:49.354516 INFO : End of 2D write delay Voltage center optimization
360 22:01:49.360357 INFO : Training has run successfully!
361 22:01:49.360856
362 22:01:49.361316 channel==0
363 22:01:49.365763 RxClkDly_Margin_A0==78 ps 8
364 22:01:49.366022 TxDqDly_Margin_A0==98 ps 10
365 22:01:49.371446 RxClkDly_Margin_A1==88 ps 9
366 22:01:49.371932 TxDqDly_Margin_A1==98 ps 10
367 22:01:49.372433 TrainedVREFDQ_A0==74
368 22:01:49.377055 TrainedVREFDQ_A1==75
369 22:01:49.377603 VrefDac_Margin_A0==23
370 22:01:49.378084 DeviceVref_Margin_A0==40
371 22:01:49.382663 VrefDac_Margin_A1==23
372 22:01:49.382950 DeviceVref_Margin_A1==39
373 22:01:49.383162
374 22:01:49.383370
375 22:01:49.388251 channel==1
376 22:01:49.388528 RxClkDly_Margin_A0==88 ps 9
377 22:01:49.388742 TxDqDly_Margin_A0==98 ps 10
378 22:01:49.393892 RxClkDly_Margin_A1==78 ps 8
379 22:01:49.394410 TxDqDly_Margin_A1==88 ps 9
380 22:01:49.399365 TrainedVREFDQ_A0==78
381 22:01:49.399899 TrainedVREFDQ_A1==75
382 22:01:49.400401 VrefDac_Margin_A0==23
383 22:01:49.405097 DeviceVref_Margin_A0==36
384 22:01:49.405611 VrefDac_Margin_A1==22
385 22:01:49.410676 DeviceVref_Margin_A1==39
386 22:01:49.411183
387 22:01:49.411639 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 22:01:49.412124
389 22:01:49.444138 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 22:01:49.444801 2D training succeed
391 22:01:49.449756 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 22:01:49.455344 auto size-- 65535DDR cs0 size: 2048MB
393 22:01:49.455861 DDR cs1 size: 2048MB
394 22:01:49.461059 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 22:01:49.461615 cs0 DataBus test pass
396 22:01:49.466542 cs1 DataBus test pass
397 22:01:49.467062 cs0 AddrBus test pass
398 22:01:49.467515 cs1 AddrBus test pass
399 22:01:49.467954
400 22:01:49.472129 100bdlr_step_size ps== 471
401 22:01:49.472659 result report
402 22:01:49.477715 boot times 0Enable ddr reg access
403 22:01:49.483053 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 22:01:49.496808 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 22:01:50.155510 bl2z: ptr: 05129330, size: 00001e40
406 22:01:50.162147 0.0;M3 CHK:0;cm4_sp_mode 0
407 22:01:50.162716 MVN_1=0x00000000
408 22:01:50.163172 MVN_2=0x00000000
409 22:01:50.173624 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 22:01:50.174213 OPS=0x04
411 22:01:50.174689 ring efuse init
412 22:01:50.176587 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 22:01:50.183096 [0.017354 Inits done]
414 22:01:50.183655 secure task start!
415 22:01:50.184186 high task start!
416 22:01:50.184657 low task start!
417 22:01:50.187272 run into bl31
418 22:01:50.195930 NOTICE: BL31: v1.3(release):4fc40b1
419 22:01:50.203726 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 22:01:50.204329 NOTICE: BL31: G12A normal boot!
421 22:01:50.219363 NOTICE: BL31: BL33 decompress pass
422 22:01:50.225057 ERROR: Error initializing runtime service opteed_fast
423 22:01:52.941777 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 22:01:52.942367 bl2_stage_init 0x01
425 22:01:52.942772 bl2_stage_init 0x81
426 22:01:52.947572 hw id: 0x0000 - pwm id 0x01
427 22:01:52.948228 bl2_stage_init 0xc1
428 22:01:52.948690 bl2_stage_init 0x02
429 22:01:52.949130
430 22:01:52.953032 L0:00000000
431 22:01:52.953552 L1:00000703
432 22:01:52.953992 L2:00008067
433 22:01:52.954422 L3:15000000
434 22:01:52.954854 S1:00000000
435 22:01:52.958632 B2:20282000
436 22:01:52.959158 B1:a0f83180
437 22:01:52.959595
438 22:01:52.960065 TE: 69658
439 22:01:52.960511
440 22:01:52.964213 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 22:01:52.964736
442 22:01:52.969812 Board ID = 1
443 22:01:52.970329 Set cpu clk to 24M
444 22:01:52.970765 Set clk81 to 24M
445 22:01:52.975489 Use GP1_pll as DSU clk.
446 22:01:52.976043 DSU clk: 1200 Mhz
447 22:01:52.976486 CPU clk: 1200 MHz
448 22:01:52.976914 Set clk81 to 166.6M
449 22:01:52.986571 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 22:01:52.987131 board id: 1
451 22:01:52.993017 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 22:01:53.003669 fw parse done
453 22:01:53.009714 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 22:01:53.052524 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 22:01:53.063256 PIEI prepare done
456 22:01:53.063829 fastboot data load
457 22:01:53.064332 fastboot data verify
458 22:01:53.068828 verify result: 266
459 22:01:53.074560 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 22:01:53.075071 LPDDR4 probe
461 22:01:53.075509 ddr clk to 1584MHz
462 22:01:53.082375 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 22:01:53.119701
464 22:01:53.120263 dmc_version 0001
465 22:01:53.126342 Check phy result
466 22:01:53.132264 INFO : End of CA training
467 22:01:53.132842 INFO : End of initialization
468 22:01:53.137854 INFO : Training has run successfully!
469 22:01:53.138382 Check phy result
470 22:01:53.143486 INFO : End of initialization
471 22:01:53.144040 INFO : End of read enable training
472 22:01:53.149136 INFO : End of fine write leveling
473 22:01:53.154742 INFO : End of Write leveling coarse delay
474 22:01:53.155318 INFO : Training has run successfully!
475 22:01:53.155815 Check phy result
476 22:01:53.160282 INFO : End of initialization
477 22:01:53.160818 INFO : End of read dq deskew training
478 22:01:53.165867 INFO : End of MPR read delay center optimization
479 22:01:53.171450 INFO : End of write delay center optimization
480 22:01:53.177053 INFO : End of read delay center optimization
481 22:01:53.177577 INFO : End of max read latency training
482 22:01:53.182632 INFO : Training has run successfully!
483 22:01:53.183153 1D training succeed
484 22:01:53.191777 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 22:01:53.239525 Check phy result
486 22:01:53.240134 INFO : End of initialization
487 22:01:53.261819 INFO : End of 2D read delay Voltage center optimization
488 22:01:53.281029 INFO : End of 2D read delay Voltage center optimization
489 22:01:53.332810 INFO : End of 2D write delay Voltage center optimization
490 22:01:53.382006 INFO : End of 2D write delay Voltage center optimization
491 22:01:53.387592 INFO : Training has run successfully!
492 22:01:53.388153
493 22:01:53.388625 channel==0
494 22:01:53.393176 RxClkDly_Margin_A0==78 ps 8
495 22:01:53.393695 TxDqDly_Margin_A0==98 ps 10
496 22:01:53.396488 RxClkDly_Margin_A1==88 ps 9
497 22:01:53.396997 TxDqDly_Margin_A1==98 ps 10
498 22:01:53.402094 TrainedVREFDQ_A0==74
499 22:01:53.402608 TrainedVREFDQ_A1==74
500 22:01:53.403071 VrefDac_Margin_A0==24
501 22:01:53.407679 DeviceVref_Margin_A0==40
502 22:01:53.408247 VrefDac_Margin_A1==22
503 22:01:53.413265 DeviceVref_Margin_A1==40
504 22:01:53.413782
505 22:01:53.414299
506 22:01:53.414785 channel==1
507 22:01:53.415237 RxClkDly_Margin_A0==78 ps 8
508 22:01:53.418929 TxDqDly_Margin_A0==88 ps 9
509 22:01:53.419458 RxClkDly_Margin_A1==78 ps 8
510 22:01:53.424512 TxDqDly_Margin_A1==78 ps 8
511 22:01:53.425039 TrainedVREFDQ_A0==76
512 22:01:53.425501 TrainedVREFDQ_A1==75
513 22:01:53.430110 VrefDac_Margin_A0==22
514 22:01:53.430650 DeviceVref_Margin_A0==38
515 22:01:53.435673 VrefDac_Margin_A1==22
516 22:01:53.436222 DeviceVref_Margin_A1==39
517 22:01:53.436680
518 22:01:53.441283 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 22:01:53.441800
520 22:01:53.469243 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
521 22:01:53.474872 2D training succeed
522 22:01:53.480469 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 22:01:53.480996 auto size-- 65535DDR cs0 size: 2048MB
524 22:01:53.486078 DDR cs1 size: 2048MB
525 22:01:53.486584 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 22:01:53.491677 cs0 DataBus test pass
527 22:01:53.492234 cs1 DataBus test pass
528 22:01:53.492693 cs0 AddrBus test pass
529 22:01:53.497269 cs1 AddrBus test pass
530 22:01:53.497783
531 22:01:53.498245 100bdlr_step_size ps== 478
532 22:01:53.498708 result report
533 22:01:53.502870 boot times 0Enable ddr reg access
534 22:01:53.510328 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 22:01:53.524122 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 22:01:54.178953 bl2z: ptr: 05129330, size: 00001e40
537 22:01:54.185437 0.0;M3 CHK:0;cm4_sp_mode 0
538 22:01:54.185988 MVN_1=0x00000000
539 22:01:54.186449 MVN_2=0x00000000
540 22:01:54.196870 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 22:01:54.197409 OPS=0x04
542 22:01:54.197873 ring efuse init
543 22:01:54.202536 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 22:01:54.203070 [0.017319 Inits done]
545 22:01:54.203532 secure task start!
546 22:01:54.209752 high task start!
547 22:01:54.210281 low task start!
548 22:01:54.210740 run into bl31
549 22:01:54.218334 NOTICE: BL31: v1.3(release):4fc40b1
550 22:01:54.226136 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 22:01:54.226663 NOTICE: BL31: G12A normal boot!
552 22:01:54.241681 NOTICE: BL31: BL33 decompress pass
553 22:01:54.247282 ERROR: Error initializing runtime service opteed_fast
554 22:01:55.638933 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 22:01:55.639333 bl2_stage_init 0x01
556 22:01:55.639571 bl2_stage_init 0x81
557 22:01:55.644311 hw id: 0x0000 - pwm id 0x01
558 22:01:55.644617 bl2_stage_init 0xc1
559 22:01:55.650015 bl2_stage_init 0x02
560 22:01:55.650320
561 22:01:55.650535 L0:00000000
562 22:01:55.650738 L1:00000703
563 22:01:55.650939 L2:00008067
564 22:01:55.651138 L3:15000000
565 22:01:55.655550 S1:00000000
566 22:01:55.656009 B2:20282000
567 22:01:55.656358 B1:a0f83180
568 22:01:55.656685
569 22:01:55.657002 TE: 68436
570 22:01:55.657324
571 22:01:55.661207 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 22:01:55.661643
573 22:01:55.666887 Board ID = 1
574 22:01:55.667338 Set cpu clk to 24M
575 22:01:55.667588 Set clk81 to 24M
576 22:01:55.672476 Use GP1_pll as DSU clk.
577 22:01:55.672784 DSU clk: 1200 Mhz
578 22:01:55.673002 CPU clk: 1200 MHz
579 22:01:55.677989 Set clk81 to 166.6M
580 22:01:55.683526 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 22:01:55.683971 board id: 1
582 22:01:55.690766 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 22:01:55.701474 fw parse done
584 22:01:55.707475 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 22:01:55.749914 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 22:01:55.760940 PIEI prepare done
587 22:01:55.761241 fastboot data load
588 22:01:55.761461 fastboot data verify
589 22:01:55.766473 verify result: 266
590 22:01:55.772053 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 22:01:55.772475 LPDDR4 probe
592 22:01:55.772823 ddr clk to 1584MHz
593 22:01:55.780090 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 22:01:55.817300
595 22:01:55.817634 dmc_version 0001
596 22:01:55.823960 Check phy result
597 22:01:55.829901 INFO : End of CA training
598 22:01:55.830327 INFO : End of initialization
599 22:01:55.835483 INFO : Training has run successfully!
600 22:01:55.835771 Check phy result
601 22:01:55.841099 INFO : End of initialization
602 22:01:55.841387 INFO : End of read enable training
603 22:01:55.846716 INFO : End of fine write leveling
604 22:01:55.852279 INFO : End of Write leveling coarse delay
605 22:01:55.852580 INFO : Training has run successfully!
606 22:01:55.852806 Check phy result
607 22:01:55.857924 INFO : End of initialization
608 22:01:55.858374 INFO : End of read dq deskew training
609 22:01:55.863501 INFO : End of MPR read delay center optimization
610 22:01:55.869102 INFO : End of write delay center optimization
611 22:01:55.874728 INFO : End of read delay center optimization
612 22:01:55.875019 INFO : End of max read latency training
613 22:01:55.880271 INFO : Training has run successfully!
614 22:01:55.880716 1D training succeed
615 22:01:55.889510 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 22:01:55.937121 Check phy result
617 22:01:55.937484 INFO : End of initialization
618 22:01:55.959417 INFO : End of 2D read delay Voltage center optimization
619 22:01:55.978563 INFO : End of 2D read delay Voltage center optimization
620 22:01:56.030418 INFO : End of 2D write delay Voltage center optimization
621 22:01:56.079620 INFO : End of 2D write delay Voltage center optimization
622 22:01:56.085110 INFO : Training has run successfully!
623 22:01:56.085412
624 22:01:56.085626 channel==0
625 22:01:56.090855 RxClkDly_Margin_A0==78 ps 8
626 22:01:56.091152 TxDqDly_Margin_A0==98 ps 10
627 22:01:56.096318 RxClkDly_Margin_A1==69 ps 7
628 22:01:56.096754 TxDqDly_Margin_A1==98 ps 10
629 22:01:56.097107 TrainedVREFDQ_A0==74
630 22:01:56.101941 TrainedVREFDQ_A1==74
631 22:01:56.102227 VrefDac_Margin_A0==24
632 22:01:56.102437 DeviceVref_Margin_A0==40
633 22:01:56.107577 VrefDac_Margin_A1==22
634 22:01:56.107871 DeviceVref_Margin_A1==40
635 22:01:56.108102
636 22:01:56.108306
637 22:01:56.113162 channel==1
638 22:01:56.113451 RxClkDly_Margin_A0==88 ps 9
639 22:01:56.113671 TxDqDly_Margin_A0==98 ps 10
640 22:01:56.118880 RxClkDly_Margin_A1==69 ps 7
641 22:01:56.119168 TxDqDly_Margin_A1==88 ps 9
642 22:01:56.124391 TrainedVREFDQ_A0==78
643 22:01:56.124818 TrainedVREFDQ_A1==77
644 22:01:56.125152 VrefDac_Margin_A0==22
645 22:01:56.129987 DeviceVref_Margin_A0==36
646 22:01:56.130273 VrefDac_Margin_A1==22
647 22:01:56.135583 DeviceVref_Margin_A1==37
648 22:01:56.136022
649 22:01:56.136378 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 22:01:56.136613
651 22:01:56.169232 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 22:01:56.169620 2D training succeed
653 22:01:56.174909 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 22:01:56.180415 auto size-- 65535DDR cs0 size: 2048MB
655 22:01:56.180855 DDR cs1 size: 2048MB
656 22:01:56.185992 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 22:01:56.186288 cs0 DataBus test pass
658 22:01:56.191581 cs1 DataBus test pass
659 22:01:56.192035 cs0 AddrBus test pass
660 22:01:56.192399 cs1 AddrBus test pass
661 22:01:56.192635
662 22:01:56.197176 100bdlr_step_size ps== 478
663 22:01:56.197604 result report
664 22:01:56.202777 boot times 0Enable ddr reg access
665 22:01:56.208159 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 22:01:56.221862 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 22:01:56.876561 bl2z: ptr: 05129330, size: 00001e40
668 22:01:56.883494 0.0;M3 CHK:0;cm4_sp_mode 0
669 22:01:56.884013 MVN_1=0x00000000
670 22:01:56.884456 MVN_2=0x00000000
671 22:01:56.894985 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 22:01:56.895462 OPS=0x04
673 22:01:56.895889 ring efuse init
674 22:01:56.898004 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 22:01:56.906383 [0.017319 Inits done]
676 22:01:56.906843 secure task start!
677 22:01:56.907263 high task start!
678 22:01:56.907669 low task start!
679 22:01:56.909536 run into bl31
680 22:01:56.917056 NOTICE: BL31: v1.3(release):4fc40b1
681 22:01:56.924880 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 22:01:56.925345 NOTICE: BL31: G12A normal boot!
683 22:01:56.940435 NOTICE: BL31: BL33 decompress pass
684 22:01:56.946134 ERROR: Error initializing runtime service opteed_fast
685 22:01:57.740280
686 22:01:57.740713
687 22:01:57.745680 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 22:01:57.746152
689 22:01:57.749193 Model: Libre Computer AML-S905D3-CC Solitude
690 22:01:57.895158 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 22:01:57.911386 DRAM: 2 GiB (effective 3.8 GiB)
692 22:01:58.012363 Core: 406 devices, 33 uclasses, devicetree: separate
693 22:01:58.018945 WDT: Not starting watchdog@f0d0
694 22:01:58.043269 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 22:01:58.055532 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 22:01:58.060490 ** Bad device specification mmc 0 **
697 22:01:58.070577 Card did not respond to voltage select! : -110
698 22:01:58.078619 ** Bad device specification mmc 0 **
699 22:01:58.078973 Couldn't find partition mmc 0
700 22:01:58.086568 Card did not respond to voltage select! : -110
701 22:01:58.092121 ** Bad device specification mmc 0 **
702 22:01:58.092479 Couldn't find partition mmc 0
703 22:01:58.097181 Error: could not access storage.
704 22:01:58.393574 Net: eth0: ethernet@ff3f0000
705 22:01:58.394003 starting USB...
706 22:01:58.638343 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 22:01:58.638949 Starting the controller
708 22:01:58.645179 USB XHCI 1.10
709 22:02:00.199092 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 22:02:00.207615 scanning usb for storage devices... 0 Storage Device(s) found
712 22:02:00.258841 Hit any key to stop autoboot: 1
713 22:02:00.259685 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 22:02:00.260115 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 22:02:00.260422 Setting prompt string to ['=>']
716 22:02:00.260700 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 22:02:00.273507 0
718 22:02:00.274243 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 22:02:00.375451 => setenv autoload no
721 22:02:00.376129 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 22:02:00.380208 setenv autoload no
724 22:02:00.481365 => setenv initrd_high 0xffffffff
725 22:02:00.482182 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
726 22:02:00.486401 setenv initrd_high 0xffffffff
728 22:02:00.587955 => setenv fdt_high 0xffffffff
729 22:02:00.588801 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
730 22:02:00.593017 setenv fdt_high 0xffffffff
732 22:02:00.694576 => dhcp
733 22:02:00.695350 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
734 22:02:00.699281 dhcp
735 22:02:01.505254 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 22:02:01.505907 Speed: 1000, full duplex
737 22:02:01.506364 BOOTP broadcast 1
738 22:02:01.753803 BOOTP broadcast 2
739 22:02:02.254643 BOOTP broadcast 3
740 22:02:03.255784 BOOTP broadcast 4
741 22:02:05.256896 BOOTP broadcast 5
742 22:02:05.267733 DHCP client bound to address 192.168.6.12 (3762 ms)
744 22:02:05.369337 => setenv serverip 192.168.6.2
745 22:02:05.370094 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
746 22:02:05.374523 setenv serverip 192.168.6.2
748 22:02:05.476087 => tftpboot 0x01080000 823105/tftp-deploy-w706l41p/kernel/uImage
749 22:02:05.477315 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
750 22:02:05.483891 tftpboot 0x01080000 823105/tftp-deploy-w706l41p/kernel/uImage
751 22:02:05.484580 Speed: 1000, full duplex
752 22:02:05.485199 Using ethernet@ff3f0000 device
753 22:02:05.489359 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
754 22:02:05.495106 Filename '823105/tftp-deploy-w706l41p/kernel/uImage'.
755 22:02:05.498960 Load address: 0x1080000
756 22:02:09.881202 Loading: *################################################## 43.6 MiB
757 22:02:09.881882 9.9 MiB/s
758 22:02:09.882362 done
759 22:02:09.884850 Bytes transferred = 45713984 (2b98a40 hex)
761 22:02:09.986562 => tftpboot 0x08000000 823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot
762 22:02:09.987375 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:31)
763 22:02:09.994154 tftpboot 0x08000000 823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot
764 22:02:09.994674 Speed: 1000, full duplex
765 22:02:09.995117 Using ethernet@ff3f0000 device
766 22:02:09.999812 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
767 22:02:10.009429 Filename '823105/tftp-deploy-w706l41p/ramdisk/ramdisk.cpio.gz.uboot'.
768 22:02:10.009854 Load address: 0x8000000
769 22:02:11.488690 Loading: *####### UDP wrong checksum 000000ff 0000abe5
770 22:02:11.518691 UDP wrong checksum 000000ff 00003bd8
771 22:02:20.283266 T ########################################## UDP wrong checksum 0000000f 0000bed3
772 22:02:25.283804 T UDP wrong checksum 0000000f 0000bed3
773 22:02:28.649872 UDP wrong checksum 000000ff 00000d47
774 22:02:28.679730 UDP wrong checksum 000000ff 00009339
775 22:02:35.284899 T T UDP wrong checksum 0000000f 0000bed3
776 22:02:35.932124 UDP wrong checksum 000000ff 0000c15f
777 22:02:35.942584 UDP wrong checksum 000000ff 00005452
778 22:02:55.289668 T T T T UDP wrong checksum 0000000f 0000bed3
779 22:03:10.293407 T T
780 22:03:10.294048 Retry count exceeded; starting again
782 22:03:10.295623 end: 2.4.3 bootloader-commands (duration 00:01:10) [common]
785 22:03:10.297780 end: 2.4 uboot-commands (duration 00:01:29) [common]
787 22:03:10.299344 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
789 22:03:10.300506 end: 2 uboot-action (duration 00:01:29) [common]
791 22:03:10.302186 Cleaning after the job
792 22:03:10.302780 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/ramdisk
793 22:03:10.304191 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/kernel
794 22:03:10.352189 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/dtb
795 22:03:10.353100 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823105/tftp-deploy-w706l41p/modules
796 22:03:10.373874 start: 4.1 power-off (timeout 00:00:30) [common]
797 22:03:10.374526 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
798 22:03:10.406722 >> OK - accepted request
799 22:03:10.408861 Returned 0 in 0 seconds
800 22:03:10.509906 end: 4.1 power-off (duration 00:00:00) [common]
802 22:03:10.510893 start: 4.2 read-feedback (timeout 00:10:00) [common]
803 22:03:10.511573 Listened to connection for namespace 'common' for up to 1s
804 22:03:11.512542 Finalising connection for namespace 'common'
805 22:03:11.513335 Disconnecting from shell: Finalise
806 22:03:11.513909 =>
807 22:03:11.614976 end: 4.2 read-feedback (duration 00:00:01) [common]
808 22:03:11.615705 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/823105
809 22:03:12.398707 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/823105
810 22:03:12.399318 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.