Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:52:35.700228 lava-dispatcher, installed at version: 2024.01
2 19:52:35.700983 start: 0 validate
3 19:52:35.701469 Start time: 2024-10-08 19:52:35.701439+00:00 (UTC)
4 19:52:35.702009 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:52:35.702548 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:52:35.740017 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:52:35.740573 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-5-gf7efea4fcf4b9%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:52:35.770304 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:52:35.770936 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-5-gf7efea4fcf4b9%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:52:35.804163 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:52:35.804683 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:52:35.836033 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:52:35.836541 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-5-gf7efea4fcf4b9%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:52:35.873812 validate duration: 0.17
16 19:52:35.874683 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:52:35.875031 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:52:35.875367 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:52:35.875956 Not decompressing ramdisk as can be used compressed.
20 19:52:35.876442 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 19:52:35.876735 saving as /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/ramdisk/initrd.cpio.gz
22 19:52:35.877019 total size: 5628169 (5 MB)
23 19:52:35.919216 progress 0 % (0 MB)
24 19:52:35.926835 progress 5 % (0 MB)
25 19:52:35.933176 progress 10 % (0 MB)
26 19:52:35.937603 progress 15 % (0 MB)
27 19:52:35.942717 progress 20 % (1 MB)
28 19:52:35.946232 progress 25 % (1 MB)
29 19:52:35.950137 progress 30 % (1 MB)
30 19:52:35.954230 progress 35 % (1 MB)
31 19:52:35.957766 progress 40 % (2 MB)
32 19:52:35.961698 progress 45 % (2 MB)
33 19:52:35.965295 progress 50 % (2 MB)
34 19:52:35.969110 progress 55 % (2 MB)
35 19:52:35.973029 progress 60 % (3 MB)
36 19:52:35.976594 progress 65 % (3 MB)
37 19:52:35.980531 progress 70 % (3 MB)
38 19:52:35.984087 progress 75 % (4 MB)
39 19:52:35.987817 progress 80 % (4 MB)
40 19:52:35.991101 progress 85 % (4 MB)
41 19:52:35.994736 progress 90 % (4 MB)
42 19:52:35.998298 progress 95 % (5 MB)
43 19:52:36.001565 progress 100 % (5 MB)
44 19:52:36.002259 5 MB downloaded in 0.13 s (42.86 MB/s)
45 19:52:36.002805 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:52:36.003730 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:52:36.004063 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:52:36.004361 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:52:36.004854 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/kernel/Image
51 19:52:36.005105 saving as /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/kernel/Image
52 19:52:36.005318 total size: 45713920 (43 MB)
53 19:52:36.005534 No compression specified
54 19:52:36.039019 progress 0 % (0 MB)
55 19:52:36.066148 progress 5 % (2 MB)
56 19:52:36.093411 progress 10 % (4 MB)
57 19:52:36.120499 progress 15 % (6 MB)
58 19:52:36.147552 progress 20 % (8 MB)
59 19:52:36.174416 progress 25 % (10 MB)
60 19:52:36.201546 progress 30 % (13 MB)
61 19:52:36.228785 progress 35 % (15 MB)
62 19:52:36.256187 progress 40 % (17 MB)
63 19:52:36.283446 progress 45 % (19 MB)
64 19:52:36.310458 progress 50 % (21 MB)
65 19:52:36.337687 progress 55 % (24 MB)
66 19:52:36.364948 progress 60 % (26 MB)
67 19:52:36.391681 progress 65 % (28 MB)
68 19:52:36.418735 progress 70 % (30 MB)
69 19:52:36.446350 progress 75 % (32 MB)
70 19:52:36.473643 progress 80 % (34 MB)
71 19:52:36.500619 progress 85 % (37 MB)
72 19:52:36.527893 progress 90 % (39 MB)
73 19:52:36.555031 progress 95 % (41 MB)
74 19:52:36.581212 progress 100 % (43 MB)
75 19:52:36.581728 43 MB downloaded in 0.58 s (75.64 MB/s)
76 19:52:36.582208 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:52:36.583040 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:52:36.583319 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:52:36.583589 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:52:36.584097 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 19:52:36.584379 saving as /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/dtb/meson-g12b-a311d-libretech-cc.dtb
83 19:52:36.584591 total size: 54703 (0 MB)
84 19:52:36.584805 No compression specified
85 19:52:36.622364 progress 59 % (0 MB)
86 19:52:36.623257 progress 100 % (0 MB)
87 19:52:36.623830 0 MB downloaded in 0.04 s (1.33 MB/s)
88 19:52:36.624351 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:52:36.625315 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:52:36.625703 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:52:36.626028 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:52:36.626539 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 19:52:36.626786 saving as /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/nfsrootfs/full.rootfs.tar
95 19:52:36.626995 total size: 120894716 (115 MB)
96 19:52:36.627209 Using unxz to decompress xz
97 19:52:36.662088 progress 0 % (0 MB)
98 19:52:37.457101 progress 5 % (5 MB)
99 19:52:38.316188 progress 10 % (11 MB)
100 19:52:39.108824 progress 15 % (17 MB)
101 19:52:39.840993 progress 20 % (23 MB)
102 19:52:40.430278 progress 25 % (28 MB)
103 19:52:41.254449 progress 30 % (34 MB)
104 19:52:42.044280 progress 35 % (40 MB)
105 19:52:42.386270 progress 40 % (46 MB)
106 19:52:42.755204 progress 45 % (51 MB)
107 19:52:43.477892 progress 50 % (57 MB)
108 19:52:44.376233 progress 55 % (63 MB)
109 19:52:45.161474 progress 60 % (69 MB)
110 19:52:45.935091 progress 65 % (74 MB)
111 19:52:46.730218 progress 70 % (80 MB)
112 19:52:47.576572 progress 75 % (86 MB)
113 19:52:48.363079 progress 80 % (92 MB)
114 19:52:49.137256 progress 85 % (98 MB)
115 19:52:49.993092 progress 90 % (103 MB)
116 19:52:50.767040 progress 95 % (109 MB)
117 19:52:51.601263 progress 100 % (115 MB)
118 19:52:51.613728 115 MB downloaded in 14.99 s (7.69 MB/s)
119 19:52:51.614353 end: 1.4.1 http-download (duration 00:00:15) [common]
121 19:52:51.615201 end: 1.4 download-retry (duration 00:00:15) [common]
122 19:52:51.615513 start: 1.5 download-retry (timeout 00:09:44) [common]
123 19:52:51.615790 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 19:52:51.616546 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/modules.tar.xz
125 19:52:51.617108 saving as /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/modules/modules.tar
126 19:52:51.617517 total size: 11593096 (11 MB)
127 19:52:51.618011 Using unxz to decompress xz
128 19:52:51.661671 progress 0 % (0 MB)
129 19:52:51.728634 progress 5 % (0 MB)
130 19:52:51.803444 progress 10 % (1 MB)
131 19:52:51.885535 progress 15 % (1 MB)
132 19:52:51.961507 progress 20 % (2 MB)
133 19:52:52.039102 progress 25 % (2 MB)
134 19:52:52.119075 progress 30 % (3 MB)
135 19:52:52.190812 progress 35 % (3 MB)
136 19:52:52.271254 progress 40 % (4 MB)
137 19:52:52.355355 progress 45 % (5 MB)
138 19:52:52.435847 progress 50 % (5 MB)
139 19:52:52.517881 progress 55 % (6 MB)
140 19:52:52.598778 progress 60 % (6 MB)
141 19:52:52.678261 progress 65 % (7 MB)
142 19:52:52.758737 progress 70 % (7 MB)
143 19:52:52.842298 progress 75 % (8 MB)
144 19:52:52.924593 progress 80 % (8 MB)
145 19:52:52.999720 progress 85 % (9 MB)
146 19:52:53.072037 progress 90 % (9 MB)
147 19:52:53.170433 progress 95 % (10 MB)
148 19:52:53.261792 progress 100 % (11 MB)
149 19:52:53.275840 11 MB downloaded in 1.66 s (6.67 MB/s)
150 19:52:53.276775 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:52:53.278564 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:52:53.279139 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 19:52:53.279713 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 19:53:09.858214 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/823113/extract-nfsrootfs-b5dk0j80
156 19:53:09.858832 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 19:53:09.859122 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 19:53:09.859748 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6
159 19:53:09.860233 makedir: /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin
160 19:53:09.860580 makedir: /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/tests
161 19:53:09.860899 makedir: /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/results
162 19:53:09.861236 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-add-keys
163 19:53:09.861806 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-add-sources
164 19:53:09.862382 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-background-process-start
165 19:53:09.862887 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-background-process-stop
166 19:53:09.863402 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-common-functions
167 19:53:09.863892 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-echo-ipv4
168 19:53:09.864414 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-install-packages
169 19:53:09.864893 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-installed-packages
170 19:53:09.865360 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-os-build
171 19:53:09.865829 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-probe-channel
172 19:53:09.866299 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-probe-ip
173 19:53:09.866772 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-target-ip
174 19:53:09.867236 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-target-mac
175 19:53:09.867732 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-target-storage
176 19:53:09.868261 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-case
177 19:53:09.868831 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-event
178 19:53:09.869313 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-feedback
179 19:53:09.869790 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-raise
180 19:53:09.870261 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-reference
181 19:53:09.870730 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-runner
182 19:53:09.871204 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-set
183 19:53:09.871704 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-test-shell
184 19:53:09.872239 Updating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-add-keys (debian)
185 19:53:09.872770 Updating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-add-sources (debian)
186 19:53:09.873269 Updating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-install-packages (debian)
187 19:53:09.873761 Updating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-installed-packages (debian)
188 19:53:09.874250 Updating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/bin/lava-os-build (debian)
189 19:53:09.874673 Creating /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/environment
190 19:53:09.875034 LAVA metadata
191 19:53:09.875290 - LAVA_JOB_ID=823113
192 19:53:09.875505 - LAVA_DISPATCHER_IP=192.168.6.2
193 19:53:09.875869 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 19:53:09.876853 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 19:53:09.877165 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 19:53:09.877374 skipped lava-vland-overlay
197 19:53:09.877614 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 19:53:09.877867 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 19:53:09.878082 skipped lava-multinode-overlay
200 19:53:09.878322 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 19:53:09.878573 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 19:53:09.878816 Loading test definitions
203 19:53:09.879091 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 19:53:09.879308 Using /lava-823113 at stage 0
205 19:53:09.880381 uuid=823113_1.6.2.4.1 testdef=None
206 19:53:09.880682 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 19:53:09.880944 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 19:53:09.882499 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 19:53:09.883284 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 19:53:09.885228 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 19:53:09.886048 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 19:53:09.887846 runner path: /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/0/tests/0_timesync-off test_uuid 823113_1.6.2.4.1
215 19:53:09.888400 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 19:53:09.889207 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 19:53:09.889430 Using /lava-823113 at stage 0
219 19:53:09.889775 Fetching tests from https://github.com/kernelci/test-definitions.git
220 19:53:09.890060 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/0/tests/1_kselftest-alsa'
221 19:53:13.500191 Running '/usr/bin/git checkout kernelci.org
222 19:53:13.908474 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 19:53:13.911338 uuid=823113_1.6.2.4.5 testdef=None
224 19:53:13.912090 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 19:53:13.912957 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 19:53:13.916206 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 19:53:13.917099 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 19:53:13.921159 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 19:53:13.922093 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 19:53:13.926133 runner path: /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/0/tests/1_kselftest-alsa test_uuid 823113_1.6.2.4.5
234 19:53:13.926492 BOARD='meson-g12b-a311d-libretech-cc'
235 19:53:13.926723 BRANCH='lee-mfd'
236 19:53:13.926931 SKIPFILE='/dev/null'
237 19:53:13.927134 SKIP_INSTALL='True'
238 19:53:13.927333 TESTPROG_URL='http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-5-gf7efea4fcf4b9/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 19:53:13.927537 TST_CASENAME=''
240 19:53:13.927745 TST_CMDFILES='alsa'
241 19:53:13.928501 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 19:53:13.929393 Creating lava-test-runner.conf files
244 19:53:13.929663 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/823113/lava-overlay-k27p0qn6/lava-823113/0 for stage 0
245 19:53:13.930176 - 0_timesync-off
246 19:53:13.930461 - 1_kselftest-alsa
247 19:53:13.930859 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 19:53:13.931176 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 19:53:37.139494 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 19:53:37.139939 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 19:53:37.140243 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 19:53:37.140519 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 19:53:37.140786 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 19:53:37.751378 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 19:53:37.751845 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 19:53:37.752150 extracting modules file /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/modules/modules.tar to /var/lib/lava/dispatcher/tmp/823113/extract-nfsrootfs-b5dk0j80
257 19:53:39.117557 extracting modules file /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/modules/modules.tar to /var/lib/lava/dispatcher/tmp/823113/extract-overlay-ramdisk-a6suf9zz/ramdisk
258 19:53:40.534317 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 19:53:40.534808 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 19:53:40.535118 [common] Applying overlay to NFS
261 19:53:40.535355 [common] Applying overlay /var/lib/lava/dispatcher/tmp/823113/compress-overlay-6q554ca6/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/823113/extract-nfsrootfs-b5dk0j80
262 19:53:43.299682 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 19:53:43.300188 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 19:53:43.300471 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 19:53:43.300707 Converting downloaded kernel to a uImage
266 19:53:43.301016 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/kernel/Image /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/kernel/uImage
267 19:53:43.790526 output: Image Name:
268 19:53:43.790948 output: Created: Tue Oct 8 19:53:43 2024
269 19:53:43.791164 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 19:53:43.791372 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 19:53:43.791575 output: Load Address: 01080000
272 19:53:43.791776 output: Entry Point: 01080000
273 19:53:43.791973 output:
274 19:53:43.792345 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 19:53:43.792619 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 19:53:43.792890 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 19:53:43.793143 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 19:53:43.793403 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 19:53:43.793659 Building ramdisk /var/lib/lava/dispatcher/tmp/823113/extract-overlay-ramdisk-a6suf9zz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/823113/extract-overlay-ramdisk-a6suf9zz/ramdisk
280 19:53:46.053146 >> 166772 blocks
281 19:53:53.753234 Adding RAMdisk u-boot header.
282 19:53:53.753687 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/823113/extract-overlay-ramdisk-a6suf9zz/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/823113/extract-overlay-ramdisk-a6suf9zz/ramdisk.cpio.gz.uboot
283 19:53:54.004846 output: Image Name:
284 19:53:54.005275 output: Created: Tue Oct 8 19:53:53 2024
285 19:53:54.005487 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 19:53:54.005692 output: Data Size: 23432351 Bytes = 22883.16 KiB = 22.35 MiB
287 19:53:54.005896 output: Load Address: 00000000
288 19:53:54.006097 output: Entry Point: 00000000
289 19:53:54.006298 output:
290 19:53:54.006959 rename /var/lib/lava/dispatcher/tmp/823113/extract-overlay-ramdisk-a6suf9zz/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot
291 19:53:54.007388 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 19:53:54.007675 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 19:53:54.007950 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 19:53:54.008516 No LXC device requested
295 19:53:54.009101 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 19:53:54.009669 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 19:53:54.010220 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 19:53:54.010678 Checking files for TFTP limit of 4294967296 bytes.
299 19:53:54.013697 end: 1 tftp-deploy (duration 00:01:18) [common]
300 19:53:54.014343 start: 2 uboot-action (timeout 00:05:00) [common]
301 19:53:54.014922 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 19:53:54.015468 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 19:53:54.016052 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 19:53:54.016636 Using kernel file from prepare-kernel: 823113/tftp-deploy-0x1lj087/kernel/uImage
305 19:53:54.017329 substitutions:
306 19:53:54.017778 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 19:53:54.018226 - {DTB_ADDR}: 0x01070000
308 19:53:54.018669 - {DTB}: 823113/tftp-deploy-0x1lj087/dtb/meson-g12b-a311d-libretech-cc.dtb
309 19:53:54.019114 - {INITRD}: 823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot
310 19:53:54.019555 - {KERNEL_ADDR}: 0x01080000
311 19:53:54.020014 - {KERNEL}: 823113/tftp-deploy-0x1lj087/kernel/uImage
312 19:53:54.020463 - {LAVA_MAC}: None
313 19:53:54.020939 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/823113/extract-nfsrootfs-b5dk0j80
314 19:53:54.021380 - {NFS_SERVER_IP}: 192.168.6.2
315 19:53:54.021812 - {PRESEED_CONFIG}: None
316 19:53:54.022246 - {PRESEED_LOCAL}: None
317 19:53:54.022681 - {RAMDISK_ADDR}: 0x08000000
318 19:53:54.023110 - {RAMDISK}: 823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot
319 19:53:54.023546 - {ROOT_PART}: None
320 19:53:54.023996 - {ROOT}: None
321 19:53:54.024436 - {SERVER_IP}: 192.168.6.2
322 19:53:54.024867 - {TEE_ADDR}: 0x83000000
323 19:53:54.025293 - {TEE}: None
324 19:53:54.025720 Parsed boot commands:
325 19:53:54.026137 - setenv autoload no
326 19:53:54.026564 - setenv initrd_high 0xffffffff
327 19:53:54.026987 - setenv fdt_high 0xffffffff
328 19:53:54.027407 - dhcp
329 19:53:54.027829 - setenv serverip 192.168.6.2
330 19:53:54.028284 - tftpboot 0x01080000 823113/tftp-deploy-0x1lj087/kernel/uImage
331 19:53:54.028719 - tftpboot 0x08000000 823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot
332 19:53:54.029149 - tftpboot 0x01070000 823113/tftp-deploy-0x1lj087/dtb/meson-g12b-a311d-libretech-cc.dtb
333 19:53:54.029579 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/823113/extract-nfsrootfs-b5dk0j80,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 19:53:54.030020 - bootm 0x01080000 0x08000000 0x01070000
335 19:53:54.030574 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 19:53:54.032258 start: 2.3 connect-device (timeout 00:05:00) [common]
338 19:53:54.032727 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 19:53:54.048255 Setting prompt string to ['lava-test: # ']
340 19:53:54.049904 end: 2.3 connect-device (duration 00:00:00) [common]
341 19:53:54.050573 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 19:53:54.051320 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 19:53:54.052007 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 19:53:54.053268 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 19:53:54.090723 >> OK - accepted request
346 19:53:54.092877 Returned 0 in 0 seconds
347 19:53:54.193728 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 19:53:54.195503 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 19:53:54.196147 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 19:53:54.196720 Setting prompt string to ['Hit any key to stop autoboot']
352 19:53:54.197210 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 19:53:54.198948 Trying 192.168.56.21...
354 19:53:54.199475 Connected to conserv1.
355 19:53:54.199927 Escape character is '^]'.
356 19:53:54.200410
357 19:53:54.200873 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 19:53:54.201340
359 19:54:06.336420 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 19:54:06.336862 bl2_stage_init 0x01
361 19:54:06.337085 bl2_stage_init 0x81
362 19:54:06.341777 hw id: 0x0000 - pwm id 0x01
363 19:54:06.342104 bl2_stage_init 0xc1
364 19:54:06.342336 bl2_stage_init 0x02
365 19:54:06.342548
366 19:54:06.347469 L0:00000000
367 19:54:06.347747 L1:20000703
368 19:54:06.347966 L2:00008067
369 19:54:06.348219 L3:14000000
370 19:54:06.352901 B2:00402000
371 19:54:06.353156 B1:e0f83180
372 19:54:06.353374
373 19:54:06.353579 TE: 58167
374 19:54:06.353783
375 19:54:06.358587 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 19:54:06.358842
377 19:54:06.359052 Board ID = 1
378 19:54:06.364293 Set A53 clk to 24M
379 19:54:06.364576 Set A73 clk to 24M
380 19:54:06.364778 Set clk81 to 24M
381 19:54:06.369777 A53 clk: 1200 MHz
382 19:54:06.370028 A73 clk: 1200 MHz
383 19:54:06.370231 CLK81: 166.6M
384 19:54:06.370431 smccc: 00012abe
385 19:54:06.375369 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 19:54:06.380894 board id: 1
387 19:54:06.386928 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 19:54:06.398008 fw parse done
389 19:54:06.403377 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 19:54:06.446049 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 19:54:06.456968 PIEI prepare done
392 19:54:06.457232 fastboot data load
393 19:54:06.457446 fastboot data verify
394 19:54:06.462648 verify result: 266
395 19:54:06.468210 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 19:54:06.468468 LPDDR4 probe
397 19:54:06.468679 ddr clk to 1584MHz
398 19:54:06.476178 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 19:54:06.513490
400 19:54:06.513823 dmc_version 0001
401 19:54:06.520231 Check phy result
402 19:54:06.526079 INFO : End of CA training
403 19:54:06.526345 INFO : End of initialization
404 19:54:06.531662 INFO : Training has run successfully!
405 19:54:06.531920 Check phy result
406 19:54:06.537260 INFO : End of initialization
407 19:54:06.537521 INFO : End of read enable training
408 19:54:06.542820 INFO : End of fine write leveling
409 19:54:06.548458 INFO : End of Write leveling coarse delay
410 19:54:06.548727 INFO : Training has run successfully!
411 19:54:06.548941 Check phy result
412 19:54:06.554105 INFO : End of initialization
413 19:54:06.554376 INFO : End of read dq deskew training
414 19:54:06.559840 INFO : End of MPR read delay center optimization
415 19:54:06.565335 INFO : End of write delay center optimization
416 19:54:06.570896 INFO : End of read delay center optimization
417 19:54:06.571224 INFO : End of max read latency training
418 19:54:06.576496 INFO : Training has run successfully!
419 19:54:06.576933 1D training succeed
420 19:54:06.585676 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 19:54:06.633187 Check phy result
422 19:54:06.633560 INFO : End of initialization
423 19:54:06.654893 INFO : End of 2D read delay Voltage center optimization
424 19:54:06.675074 INFO : End of 2D read delay Voltage center optimization
425 19:54:06.727279 INFO : End of 2D write delay Voltage center optimization
426 19:54:06.776602 INFO : End of 2D write delay Voltage center optimization
427 19:54:06.782133 INFO : Training has run successfully!
428 19:54:06.782425
429 19:54:06.782639 channel==0
430 19:54:06.787720 RxClkDly_Margin_A0==88 ps 9
431 19:54:06.788004 TxDqDly_Margin_A0==98 ps 10
432 19:54:06.791057 RxClkDly_Margin_A1==88 ps 9
433 19:54:06.791305 TxDqDly_Margin_A1==88 ps 9
434 19:54:06.796699 TrainedVREFDQ_A0==74
435 19:54:06.796948 TrainedVREFDQ_A1==74
436 19:54:06.797156 VrefDac_Margin_A0==25
437 19:54:06.802113 DeviceVref_Margin_A0==40
438 19:54:06.802360 VrefDac_Margin_A1==25
439 19:54:06.807849 DeviceVref_Margin_A1==40
440 19:54:06.808131
441 19:54:06.808342
442 19:54:06.808546 channel==1
443 19:54:06.808747 RxClkDly_Margin_A0==98 ps 10
444 19:54:06.811280 TxDqDly_Margin_A0==88 ps 9
445 19:54:06.816832 RxClkDly_Margin_A1==98 ps 10
446 19:54:06.817098 TxDqDly_Margin_A1==88 ps 9
447 19:54:06.817309 TrainedVREFDQ_A0==77
448 19:54:06.822354 TrainedVREFDQ_A1==77
449 19:54:06.822604 VrefDac_Margin_A0==22
450 19:54:06.827926 DeviceVref_Margin_A0==37
451 19:54:06.828203 VrefDac_Margin_A1==22
452 19:54:06.828416 DeviceVref_Margin_A1==37
453 19:54:06.828619
454 19:54:06.833562 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 19:54:06.833815
456 19:54:06.867216 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 19:54:06.867608 2D training succeed
458 19:54:06.872804 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 19:54:06.878430 auto size-- 65535DDR cs0 size: 2048MB
460 19:54:06.878683 DDR cs1 size: 2048MB
461 19:54:06.884087 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 19:54:06.884617 cs0 DataBus test pass
463 19:54:06.885027 cs1 DataBus test pass
464 19:54:06.889795 cs0 AddrBus test pass
465 19:54:06.890288 cs1 AddrBus test pass
466 19:54:06.890699
467 19:54:06.895352 100bdlr_step_size ps== 420
468 19:54:06.895850 result report
469 19:54:06.896296 boot times 0Enable ddr reg access
470 19:54:06.905030 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 19:54:06.918507 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 19:54:07.491755 0.0;M3 CHK:0;cm4_sp_mode 0
473 19:54:07.492433 MVN_1=0x00000000
474 19:54:07.497256 MVN_2=0x00000000
475 19:54:07.502989 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 19:54:07.503498 OPS=0x10
477 19:54:07.503926 ring efuse init
478 19:54:07.504385 chipver efuse init
479 19:54:07.508577 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 19:54:07.514161 [0.018961 Inits done]
481 19:54:07.514661 secure task start!
482 19:54:07.515077 high task start!
483 19:54:07.518746 low task start!
484 19:54:07.519244 run into bl31
485 19:54:07.525425 NOTICE: BL31: v1.3(release):4fc40b1
486 19:54:07.533258 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 19:54:07.533805 NOTICE: BL31: G12A normal boot!
488 19:54:07.558616 NOTICE: BL31: BL33 decompress pass
489 19:54:07.564369 ERROR: Error initializing runtime service opteed_fast
490 19:54:08.797195
491 19:54:08.797634
492 19:54:08.805454 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 19:54:08.805789
494 19:54:08.806014 Model: Libre Computer AML-A311D-CC Alta
495 19:54:09.013894 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 19:54:09.037249 DRAM: 2 GiB (effective 3.8 GiB)
497 19:54:09.180211 Core: 408 devices, 31 uclasses, devicetree: separate
498 19:54:09.186167 WDT: Not starting watchdog@f0d0
499 19:54:09.218374 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 19:54:09.230803 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 19:54:09.236220 ** Bad device specification mmc 0 **
502 19:54:09.246112 Card did not respond to voltage select! : -110
503 19:54:09.253778 ** Bad device specification mmc 0 **
504 19:54:09.254097 Couldn't find partition mmc 0
505 19:54:09.262086 Card did not respond to voltage select! : -110
506 19:54:09.267568 ** Bad device specification mmc 0 **
507 19:54:09.268040 Couldn't find partition mmc 0
508 19:54:09.272738 Error: could not access storage.
509 19:54:10.536771 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 19:54:10.537205 bl2_stage_init 0x01
511 19:54:10.537443 bl2_stage_init 0x81
512 19:54:10.542337 hw id: 0x0000 - pwm id 0x01
513 19:54:10.542770 bl2_stage_init 0xc1
514 19:54:10.543096 bl2_stage_init 0x02
515 19:54:10.543400
516 19:54:10.547888 L0:00000000
517 19:54:10.548203 L1:20000703
518 19:54:10.548425 L2:00008067
519 19:54:10.548626 L3:14000000
520 19:54:10.550849 B2:00402000
521 19:54:10.551239 B1:e0f83180
522 19:54:10.551547
523 19:54:10.551853 TE: 58124
524 19:54:10.552182
525 19:54:10.561955 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 19:54:10.562271
527 19:54:10.562487 Board ID = 1
528 19:54:10.562692 Set A53 clk to 24M
529 19:54:10.562897 Set A73 clk to 24M
530 19:54:10.567540 Set clk81 to 24M
531 19:54:10.567829 A53 clk: 1200 MHz
532 19:54:10.568067 A73 clk: 1200 MHz
533 19:54:10.571101 CLK81: 166.6M
534 19:54:10.571385 smccc: 00012a92
535 19:54:10.576658 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 19:54:10.582232 board id: 1
537 19:54:10.587326 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 19:54:10.598020 fw parse done
539 19:54:10.603975 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 19:54:10.646618 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 19:54:10.657538 PIEI prepare done
542 19:54:10.657862 fastboot data load
543 19:54:10.658079 fastboot data verify
544 19:54:10.663179 verify result: 266
545 19:54:10.668678 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 19:54:10.669096 LPDDR4 probe
547 19:54:10.669426 ddr clk to 1584MHz
548 19:54:10.676689 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 19:54:10.713994
550 19:54:10.714344 dmc_version 0001
551 19:54:10.720630 Check phy result
552 19:54:10.726505 INFO : End of CA training
553 19:54:10.726925 INFO : End of initialization
554 19:54:10.732104 INFO : Training has run successfully!
555 19:54:10.732441 Check phy result
556 19:54:10.737694 INFO : End of initialization
557 19:54:10.738145 INFO : End of read enable training
558 19:54:10.743294 INFO : End of fine write leveling
559 19:54:10.748915 INFO : End of Write leveling coarse delay
560 19:54:10.749253 INFO : Training has run successfully!
561 19:54:10.749510 Check phy result
562 19:54:10.754525 INFO : End of initialization
563 19:54:10.755000 INFO : End of read dq deskew training
564 19:54:10.760157 INFO : End of MPR read delay center optimization
565 19:54:10.765703 INFO : End of write delay center optimization
566 19:54:10.771377 INFO : End of read delay center optimization
567 19:54:10.771739 INFO : End of max read latency training
568 19:54:10.776875 INFO : Training has run successfully!
569 19:54:10.777371 1D training succeed
570 19:54:10.786076 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 19:54:10.833775 Check phy result
572 19:54:10.834206 INFO : End of initialization
573 19:54:10.855475 INFO : End of 2D read delay Voltage center optimization
574 19:54:10.875765 INFO : End of 2D read delay Voltage center optimization
575 19:54:10.927731 INFO : End of 2D write delay Voltage center optimization
576 19:54:10.977128 INFO : End of 2D write delay Voltage center optimization
577 19:54:10.982705 INFO : Training has run successfully!
578 19:54:10.983053
579 19:54:10.983289 channel==0
580 19:54:10.988301 RxClkDly_Margin_A0==88 ps 9
581 19:54:10.988784 TxDqDly_Margin_A0==98 ps 10
582 19:54:10.991519 RxClkDly_Margin_A1==88 ps 9
583 19:54:10.991969 TxDqDly_Margin_A1==98 ps 10
584 19:54:10.997121 TrainedVREFDQ_A0==74
585 19:54:10.997458 TrainedVREFDQ_A1==74
586 19:54:11.002712 VrefDac_Margin_A0==25
587 19:54:11.003171 DeviceVref_Margin_A0==40
588 19:54:11.003544 VrefDac_Margin_A1==25
589 19:54:11.008315 DeviceVref_Margin_A1==40
590 19:54:11.008823
591 19:54:11.009262
592 19:54:11.009683 channel==1
593 19:54:11.010095 RxClkDly_Margin_A0==98 ps 10
594 19:54:11.011761 TxDqDly_Margin_A0==98 ps 10
595 19:54:11.017329 RxClkDly_Margin_A1==98 ps 10
596 19:54:11.017795 TxDqDly_Margin_A1==88 ps 9
597 19:54:11.018216 TrainedVREFDQ_A0==77
598 19:54:11.022938 TrainedVREFDQ_A1==77
599 19:54:11.023403 VrefDac_Margin_A0==22
600 19:54:11.028568 DeviceVref_Margin_A0==37
601 19:54:11.029023 VrefDac_Margin_A1==22
602 19:54:11.029440 DeviceVref_Margin_A1==37
603 19:54:11.029850
604 19:54:11.034211 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 19:54:11.034665
606 19:54:11.067760 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
607 19:54:11.068192 2D training succeed
608 19:54:11.073403 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 19:54:11.078831 auto size-- 65535DDR cs0 size: 2048MB
610 19:54:11.079293 DDR cs1 size: 2048MB
611 19:54:11.084460 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 19:54:11.084799 cs0 DataBus test pass
613 19:54:11.085041 cs1 DataBus test pass
614 19:54:11.090084 cs0 AddrBus test pass
615 19:54:11.090556 cs1 AddrBus test pass
616 19:54:11.090924
617 19:54:11.095657 100bdlr_step_size ps== 420
618 19:54:11.096037 result report
619 19:54:11.096289 boot times 0Enable ddr reg access
620 19:54:11.105615 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 19:54:11.119126 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 19:54:11.692771 0.0;M3 CHK:0;cm4_sp_mode 0
623 19:54:11.693209 MVN_1=0x00000000
624 19:54:11.698486 MVN_2=0x00000000
625 19:54:11.704073 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 19:54:11.704432 OPS=0x10
627 19:54:11.704663 ring efuse init
628 19:54:11.704876 chipver efuse init
629 19:54:11.709602 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 19:54:11.715207 [0.018961 Inits done]
631 19:54:11.715545 secure task start!
632 19:54:11.715778 high task start!
633 19:54:11.719762 low task start!
634 19:54:11.720110 run into bl31
635 19:54:11.726377 NOTICE: BL31: v1.3(release):4fc40b1
636 19:54:11.734325 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 19:54:11.734692 NOTICE: BL31: G12A normal boot!
638 19:54:11.760129 NOTICE: BL31: BL33 decompress pass
639 19:54:11.765383 ERROR: Error initializing runtime service opteed_fast
640 19:54:12.998228
641 19:54:12.998635
642 19:54:13.006650 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 19:54:13.006980
644 19:54:13.007206 Model: Libre Computer AML-A311D-CC Alta
645 19:54:13.215134 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 19:54:13.238549 DRAM: 2 GiB (effective 3.8 GiB)
647 19:54:13.381626 Core: 408 devices, 31 uclasses, devicetree: separate
648 19:54:13.387433 WDT: Not starting watchdog@f0d0
649 19:54:13.419689 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 19:54:13.432168 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 19:54:13.437116 ** Bad device specification mmc 0 **
652 19:54:13.447528 Card did not respond to voltage select! : -110
653 19:54:13.455095 ** Bad device specification mmc 0 **
654 19:54:13.455488 Couldn't find partition mmc 0
655 19:54:13.463405 Card did not respond to voltage select! : -110
656 19:54:13.468931 ** Bad device specification mmc 0 **
657 19:54:13.469453 Couldn't find partition mmc 0
658 19:54:13.473999 Error: could not access storage.
659 19:54:13.816489 Net: eth0: ethernet@ff3f0000
660 19:54:13.816927 starting USB...
661 19:54:14.068262 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 19:54:14.068853 Starting the controller
663 19:54:14.075165 USB XHCI 1.10
664 19:54:15.786897 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 19:54:15.787359 bl2_stage_init 0x81
666 19:54:15.792372 hw id: 0x0000 - pwm id 0x01
667 19:54:15.792677 bl2_stage_init 0xc1
668 19:54:15.792903 bl2_stage_init 0x02
669 19:54:15.793111
670 19:54:15.797941 L0:00000000
671 19:54:15.798240 L1:20000703
672 19:54:15.798459 L2:00008067
673 19:54:15.798664 L3:14000000
674 19:54:15.798862 B2:00402000
675 19:54:15.800808 B1:e0f83180
676 19:54:15.801191
677 19:54:15.801497 TE: 58150
678 19:54:15.801814
679 19:54:15.811975 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 19:54:15.812525
681 19:54:15.812887 Board ID = 1
682 19:54:15.813217 Set A53 clk to 24M
683 19:54:15.813539 Set A73 clk to 24M
684 19:54:15.817621 Set clk81 to 24M
685 19:54:15.817944 A53 clk: 1200 MHz
686 19:54:15.818163 A73 clk: 1200 MHz
687 19:54:15.823194 CLK81: 166.6M
688 19:54:15.823631 smccc: 00012aac
689 19:54:15.828802 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 19:54:15.829238 board id: 1
691 19:54:15.837390 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 19:54:15.848088 fw parse done
693 19:54:15.855540 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 19:54:15.896613 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 19:54:15.907529 PIEI prepare done
696 19:54:15.907856 fastboot data load
697 19:54:15.908092 fastboot data verify
698 19:54:15.913158 verify result: 266
699 19:54:15.918881 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 19:54:15.919180 LPDDR4 probe
701 19:54:15.919391 ddr clk to 1584MHz
702 19:54:15.926785 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 19:54:15.964154
704 19:54:15.964693 dmc_version 0001
705 19:54:15.970690 Check phy result
706 19:54:15.976550 INFO : End of CA training
707 19:54:15.976850 INFO : End of initialization
708 19:54:15.982152 INFO : Training has run successfully!
709 19:54:15.982452 Check phy result
710 19:54:15.987750 INFO : End of initialization
711 19:54:15.988072 INFO : End of read enable training
712 19:54:15.993354 INFO : End of fine write leveling
713 19:54:15.998942 INFO : End of Write leveling coarse delay
714 19:54:15.999372 INFO : Training has run successfully!
715 19:54:15.999613 Check phy result
716 19:54:16.004550 INFO : End of initialization
717 19:54:16.004845 INFO : End of read dq deskew training
718 19:54:16.010151 INFO : End of MPR read delay center optimization
719 19:54:16.015756 INFO : End of write delay center optimization
720 19:54:16.021359 INFO : End of read delay center optimization
721 19:54:16.021660 INFO : End of max read latency training
722 19:54:16.026943 INFO : Training has run successfully!
723 19:54:16.027364 1D training succeed
724 19:54:16.036142 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 19:54:16.083006 Check phy result
726 19:54:16.083379 INFO : End of initialization
727 19:54:16.106538 INFO : End of 2D read delay Voltage center optimization
728 19:54:16.126755 INFO : End of 2D read delay Voltage center optimization
729 19:54:16.178782 INFO : End of 2D write delay Voltage center optimization
730 19:54:16.228098 INFO : End of 2D write delay Voltage center optimization
731 19:54:16.233649 INFO : Training has run successfully!
732 19:54:16.233925
733 19:54:16.234134 channel==0
734 19:54:16.239151 RxClkDly_Margin_A0==88 ps 9
735 19:54:16.239540 TxDqDly_Margin_A0==98 ps 10
736 19:54:16.242445 RxClkDly_Margin_A1==88 ps 9
737 19:54:16.242826 TxDqDly_Margin_A1==98 ps 10
738 19:54:16.248201 TrainedVREFDQ_A0==74
739 19:54:16.248475 TrainedVREFDQ_A1==75
740 19:54:16.248684 VrefDac_Margin_A0==24
741 19:54:16.253703 DeviceVref_Margin_A0==40
742 19:54:16.254090 VrefDac_Margin_A1==24
743 19:54:16.259278 DeviceVref_Margin_A1==39
744 19:54:16.259654
745 19:54:16.259965
746 19:54:16.260219 channel==1
747 19:54:16.260422 RxClkDly_Margin_A0==98 ps 10
748 19:54:16.262631 TxDqDly_Margin_A0==98 ps 10
749 19:54:16.268230 RxClkDly_Margin_A1==88 ps 9
750 19:54:16.268629 TxDqDly_Margin_A1==88 ps 9
751 19:54:16.268955 TrainedVREFDQ_A0==77
752 19:54:16.273802 TrainedVREFDQ_A1==77
753 19:54:16.274072 VrefDac_Margin_A0==22
754 19:54:16.279405 DeviceVref_Margin_A0==37
755 19:54:16.279793 VrefDac_Margin_A1==24
756 19:54:16.280158 DeviceVref_Margin_A1==37
757 19:54:16.280477
758 19:54:16.284953 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 19:54:16.285226
760 19:54:16.318505 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000017 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
761 19:54:16.318808 2D training succeed
762 19:54:16.324147 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 19:54:16.329735 auto size-- 65535DDR cs0 size: 2048MB
764 19:54:16.330000 DDR cs1 size: 2048MB
765 19:54:16.335350 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 19:54:16.335618 cs0 DataBus test pass
767 19:54:16.335833 cs1 DataBus test pass
768 19:54:16.340976 cs0 AddrBus test pass
769 19:54:16.341242 cs1 AddrBus test pass
770 19:54:16.341450
771 19:54:16.346543 100bdlr_step_size ps== 420
772 19:54:16.346812 result report
773 19:54:16.347023 boot times 0Enable ddr reg access
774 19:54:16.356443 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 19:54:16.370018 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 19:54:16.943759 0.0;M3 CHK:0;cm4_sp_mode 0
777 19:54:16.944432 MVN_1=0x00000000
778 19:54:16.949389 MVN_2=0x00000000
779 19:54:16.954959 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 19:54:16.955446 OPS=0x10
781 19:54:16.955890 ring efuse init
782 19:54:16.956365 chipver efuse init
783 19:54:16.960607 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 19:54:16.966223 [0.018961 Inits done]
785 19:54:16.966700 secure task start!
786 19:54:16.967136 high task start!
787 19:54:16.970838 low task start!
788 19:54:16.971314 run into bl31
789 19:54:16.977355 NOTICE: BL31: v1.3(release):4fc40b1
790 19:54:16.985308 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 19:54:16.985790 NOTICE: BL31: G12A normal boot!
792 19:54:17.010682 NOTICE: BL31: BL33 decompress pass
793 19:54:17.016279 ERROR: Error initializing runtime service opteed_fast
794 19:54:18.249362
795 19:54:18.250040
796 19:54:18.257666 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 19:54:18.258173
798 19:54:18.258641 Model: Libre Computer AML-A311D-CC Alta
799 19:54:18.466090 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 19:54:18.489543 DRAM: 2 GiB (effective 3.8 GiB)
801 19:54:18.632517 Core: 408 devices, 31 uclasses, devicetree: separate
802 19:54:18.638386 WDT: Not starting watchdog@f0d0
803 19:54:18.670425 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 19:54:18.682937 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 19:54:18.688059 ** Bad device specification mmc 0 **
806 19:54:18.698456 Card did not respond to voltage select! : -110
807 19:54:18.706033 ** Bad device specification mmc 0 **
808 19:54:18.706516 Couldn't find partition mmc 0
809 19:54:18.714425 Card did not respond to voltage select! : -110
810 19:54:18.719771 ** Bad device specification mmc 0 **
811 19:54:18.720288 Couldn't find partition mmc 0
812 19:54:18.724786 Error: could not access storage.
813 19:54:19.068504 Net: eth0: ethernet@ff3f0000
814 19:54:19.069192 starting USB...
815 19:54:19.320371 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 19:54:19.320795 Starting the controller
817 19:54:19.327298 USB XHCI 1.10
818 19:54:21.487223 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
819 19:54:21.487819 bl2_stage_init 0x81
820 19:54:21.492816 hw id: 0x0000 - pwm id 0x01
821 19:54:21.493124 bl2_stage_init 0xc1
822 19:54:21.493337 bl2_stage_init 0x02
823 19:54:21.493537
824 19:54:21.498424 L0:00000000
825 19:54:21.498813 L1:20000703
826 19:54:21.499120 L2:00008067
827 19:54:21.499420 L3:14000000
828 19:54:21.499709 B2:00402000
829 19:54:21.501191 B1:e0f83180
830 19:54:21.501559
831 19:54:21.501859 TE: 58150
832 19:54:21.502152
833 19:54:21.512423 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
834 19:54:21.512733
835 19:54:21.512940 Board ID = 1
836 19:54:21.513141 Set A53 clk to 24M
837 19:54:21.513341 Set A73 clk to 24M
838 19:54:21.517983 Set clk81 to 24M
839 19:54:21.518366 A53 clk: 1200 MHz
840 19:54:21.518674 A73 clk: 1200 MHz
841 19:54:21.521447 CLK81: 166.6M
842 19:54:21.521816 smccc: 00012aac
843 19:54:21.526951 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
844 19:54:21.532567 board id: 1
845 19:54:21.537831 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
846 19:54:21.548424 fw parse done
847 19:54:21.554451 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
848 19:54:21.596929 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
849 19:54:21.607831 PIEI prepare done
850 19:54:21.608175 fastboot data load
851 19:54:21.608390 fastboot data verify
852 19:54:21.613406 verify result: 266
853 19:54:21.618987 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
854 19:54:21.619363 LPDDR4 probe
855 19:54:21.619672 ddr clk to 1584MHz
856 19:54:21.627015 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
857 19:54:21.664250
858 19:54:21.664531 dmc_version 0001
859 19:54:21.670928 Check phy result
860 19:54:21.676786 INFO : End of CA training
861 19:54:21.677070 INFO : End of initialization
862 19:54:21.682462 INFO : Training has run successfully!
863 19:54:21.682749 Check phy result
864 19:54:21.688005 INFO : End of initialization
865 19:54:21.688288 INFO : End of read enable training
866 19:54:21.693603 INFO : End of fine write leveling
867 19:54:21.699189 INFO : End of Write leveling coarse delay
868 19:54:21.699473 INFO : Training has run successfully!
869 19:54:21.699685 Check phy result
870 19:54:21.704839 INFO : End of initialization
871 19:54:21.705222 INFO : End of read dq deskew training
872 19:54:21.710414 INFO : End of MPR read delay center optimization
873 19:54:21.716015 INFO : End of write delay center optimization
874 19:54:21.721603 INFO : End of read delay center optimization
875 19:54:21.721886 INFO : End of max read latency training
876 19:54:21.727238 INFO : Training has run successfully!
877 19:54:21.727513 1D training succeed
878 19:54:21.736421 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
879 19:54:21.784059 Check phy result
880 19:54:21.784412 INFO : End of initialization
881 19:54:21.805647 INFO : End of 2D read delay Voltage center optimization
882 19:54:21.825871 INFO : End of 2D read delay Voltage center optimization
883 19:54:21.877655 INFO : End of 2D write delay Voltage center optimization
884 19:54:21.926907 INFO : End of 2D write delay Voltage center optimization
885 19:54:21.932518 INFO : Training has run successfully!
886 19:54:21.932793
887 19:54:21.933006 channel==0
888 19:54:21.938116 RxClkDly_Margin_A0==88 ps 9
889 19:54:21.938490 TxDqDly_Margin_A0==98 ps 10
890 19:54:21.941395 RxClkDly_Margin_A1==88 ps 9
891 19:54:21.941758 TxDqDly_Margin_A1==98 ps 10
892 19:54:21.946942 TrainedVREFDQ_A0==74
893 19:54:21.948059 TrainedVREFDQ_A1==74
894 19:54:21.952578 VrefDac_Margin_A0==25
895 19:54:21.952881 DeviceVref_Margin_A0==40
896 19:54:21.953104 VrefDac_Margin_A1==25
897 19:54:21.958072 DeviceVref_Margin_A1==40
898 19:54:21.958353
899 19:54:21.958578
900 19:54:21.958786 channel==1
901 19:54:21.958991 RxClkDly_Margin_A0==98 ps 10
902 19:54:21.963901 TxDqDly_Margin_A0==88 ps 9
903 19:54:21.964212 RxClkDly_Margin_A1==88 ps 9
904 19:54:21.969298 TxDqDly_Margin_A1==88 ps 9
905 19:54:21.969584 TrainedVREFDQ_A0==77
906 19:54:21.969800 TrainedVREFDQ_A1==77
907 19:54:21.974892 VrefDac_Margin_A0==22
908 19:54:21.975180 DeviceVref_Margin_A0==37
909 19:54:21.980721 VrefDac_Margin_A1==24
910 19:54:21.981012 DeviceVref_Margin_A1==37
911 19:54:21.981226
912 19:54:21.986181 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
913 19:54:21.986479
914 19:54:22.014197 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
915 19:54:22.019736 2D training succeed
916 19:54:22.025188 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
917 19:54:22.025497 auto size-- 65535DDR cs0 size: 2048MB
918 19:54:22.030778 DDR cs1 size: 2048MB
919 19:54:22.031080 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
920 19:54:22.036379 cs0 DataBus test pass
921 19:54:22.036682 cs1 DataBus test pass
922 19:54:22.036905 cs0 AddrBus test pass
923 19:54:22.041945 cs1 AddrBus test pass
924 19:54:22.042246
925 19:54:22.042465 100bdlr_step_size ps== 420
926 19:54:22.042679 result report
927 19:54:22.047638 boot times 0Enable ddr reg access
928 19:54:22.055170 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
929 19:54:22.068709 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
930 19:54:22.640805 0.0;M3 CHK:0;cm4_sp_mode 0
931 19:54:22.641237 MVN_1=0x00000000
932 19:54:22.646253 MVN_2=0x00000000
933 19:54:22.652018 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
934 19:54:22.652486 OPS=0x10
935 19:54:22.652772 ring efuse init
936 19:54:22.653001 chipver efuse init
937 19:54:22.657571 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
938 19:54:22.663170 [0.018960 Inits done]
939 19:54:22.663594 secure task start!
940 19:54:22.663951 high task start!
941 19:54:22.667817 low task start!
942 19:54:22.668229 run into bl31
943 19:54:22.674416 NOTICE: BL31: v1.3(release):4fc40b1
944 19:54:22.682203 NOTICE: BL31: Built : 15:58:17, May 22 2019
945 19:54:22.682518 NOTICE: BL31: G12A normal boot!
946 19:54:22.707599 NOTICE: BL31: BL33 decompress pass
947 19:54:22.713246 ERROR: Error initializing runtime service opteed_fast
948 19:54:23.946209
949 19:54:23.946643
950 19:54:23.954479 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
951 19:54:23.954919
952 19:54:23.955288 Model: Libre Computer AML-A311D-CC Alta
953 19:54:24.163131 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
954 19:54:24.186362 DRAM: 2 GiB (effective 3.8 GiB)
955 19:54:24.329439 Core: 408 devices, 31 uclasses, devicetree: separate
956 19:54:24.335241 WDT: Not starting watchdog@f0d0
957 19:54:24.367509 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
958 19:54:24.380059 Loading Environment from FAT... Card did not respond to voltage select! : -110
959 19:54:24.384969 ** Bad device specification mmc 0 **
960 19:54:24.395249 Card did not respond to voltage select! : -110
961 19:54:24.402878 ** Bad device specification mmc 0 **
962 19:54:24.403199 Couldn't find partition mmc 0
963 19:54:24.411239 Card did not respond to voltage select! : -110
964 19:54:24.416749 ** Bad device specification mmc 0 **
965 19:54:24.417077 Couldn't find partition mmc 0
966 19:54:24.421779 Error: could not access storage.
967 19:54:24.766854 Net: eth0: ethernet@ff3f0000
968 19:54:24.767464 starting USB...
969 19:54:25.017313 Bus usb@ff500000: Register 3000140 NbrPorts 3
970 19:54:25.017915 Starting the controller
971 19:54:25.024236 USB XHCI 1.10
972 19:54:26.886709 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
973 19:54:26.887158 bl2_stage_init 0x01
974 19:54:26.887415 bl2_stage_init 0x81
975 19:54:26.892232 hw id: 0x0000 - pwm id 0x01
976 19:54:26.892689 bl2_stage_init 0xc1
977 19:54:26.893061 bl2_stage_init 0x02
978 19:54:26.893425
979 19:54:26.897829 L0:00000000
980 19:54:26.898283 L1:20000703
981 19:54:26.898559 L2:00008067
982 19:54:26.898939 L3:14000000
983 19:54:26.903438 B2:00402000
984 19:54:26.903772 B1:e0f83180
985 19:54:26.904042
986 19:54:26.904292 TE: 58159
987 19:54:26.904543
988 19:54:26.909042 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
989 19:54:26.909497
990 19:54:26.909884 Board ID = 1
991 19:54:26.914628 Set A53 clk to 24M
992 19:54:26.914941 Set A73 clk to 24M
993 19:54:26.915182 Set clk81 to 24M
994 19:54:26.920228 A53 clk: 1200 MHz
995 19:54:26.920661 A73 clk: 1200 MHz
996 19:54:26.921046 CLK81: 166.6M
997 19:54:26.921695 smccc: 00012ab5
998 19:54:26.925835 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
999 19:54:26.931425 board id: 1
1000 19:54:26.937315 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1001 19:54:26.947973 fw parse done
1002 19:54:26.953950 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1003 19:54:26.996573 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1004 19:54:27.007466 PIEI prepare done
1005 19:54:27.007789 fastboot data load
1006 19:54:27.008075 fastboot data verify
1007 19:54:27.013149 verify result: 266
1008 19:54:27.018711 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1009 19:54:27.019013 LPDDR4 probe
1010 19:54:27.019248 ddr clk to 1584MHz
1011 19:54:27.026796 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1012 19:54:27.064232
1013 19:54:27.064598 dmc_version 0001
1014 19:54:27.070787 Check phy result
1015 19:54:27.076664 INFO : End of CA training
1016 19:54:27.076963 INFO : End of initialization
1017 19:54:27.082296 INFO : Training has run successfully!
1018 19:54:27.082613 Check phy result
1019 19:54:27.087844 INFO : End of initialization
1020 19:54:27.088317 INFO : End of read enable training
1021 19:54:27.091208 INFO : End of fine write leveling
1022 19:54:27.096783 INFO : End of Write leveling coarse delay
1023 19:54:27.102300 INFO : Training has run successfully!
1024 19:54:27.102602 Check phy result
1025 19:54:27.102847 INFO : End of initialization
1026 19:54:27.107887 INFO : End of read dq deskew training
1027 19:54:27.111457 INFO : End of MPR read delay center optimization
1028 19:54:27.117078 INFO : End of write delay center optimization
1029 19:54:27.122690 INFO : End of read delay center optimization
1030 19:54:27.123149 INFO : End of max read latency training
1031 19:54:27.128209 INFO : Training has run successfully!
1032 19:54:27.128519 1D training succeed
1033 19:54:27.136179 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1034 19:54:27.183773 Check phy result
1035 19:54:27.184464 INFO : End of initialization
1036 19:54:27.205359 INFO : End of 2D read delay Voltage center optimization
1037 19:54:27.225545 INFO : End of 2D read delay Voltage center optimization
1038 19:54:27.277489 INFO : End of 2D write delay Voltage center optimization
1039 19:54:27.326718 INFO : End of 2D write delay Voltage center optimization
1040 19:54:27.332211 INFO : Training has run successfully!
1041 19:54:27.332534
1042 19:54:27.332784 channel==0
1043 19:54:27.337859 RxClkDly_Margin_A0==88 ps 9
1044 19:54:27.338314 TxDqDly_Margin_A0==98 ps 10
1045 19:54:27.343495 RxClkDly_Margin_A1==88 ps 9
1046 19:54:27.343947 TxDqDly_Margin_A1==98 ps 10
1047 19:54:27.344393 TrainedVREFDQ_A0==74
1048 19:54:27.349045 TrainedVREFDQ_A1==74
1049 19:54:27.349350 VrefDac_Margin_A0==25
1050 19:54:27.349591 DeviceVref_Margin_A0==40
1051 19:54:27.354757 VrefDac_Margin_A1==25
1052 19:54:27.355223 DeviceVref_Margin_A1==40
1053 19:54:27.355624
1054 19:54:27.356061
1055 19:54:27.360200 channel==1
1056 19:54:27.360512 RxClkDly_Margin_A0==98 ps 10
1057 19:54:27.360755 TxDqDly_Margin_A0==98 ps 10
1058 19:54:27.365832 RxClkDly_Margin_A1==98 ps 10
1059 19:54:27.366276 TxDqDly_Margin_A1==88 ps 9
1060 19:54:27.371475 TrainedVREFDQ_A0==77
1061 19:54:27.371776 TrainedVREFDQ_A1==77
1062 19:54:27.372050 VrefDac_Margin_A0==22
1063 19:54:27.377067 DeviceVref_Margin_A0==37
1064 19:54:27.377365 VrefDac_Margin_A1==22
1065 19:54:27.382620 DeviceVref_Margin_A1==37
1066 19:54:27.382918
1067 19:54:27.383157 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1068 19:54:27.388309
1069 19:54:27.416200 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1070 19:54:27.416571 2D training succeed
1071 19:54:27.421844 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1072 19:54:27.427481 auto size-- 65535DDR cs0 size: 2048MB
1073 19:54:27.427812 DDR cs1 size: 2048MB
1074 19:54:27.432890 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1075 19:54:27.433186 cs0 DataBus test pass
1076 19:54:27.438516 cs1 DataBus test pass
1077 19:54:27.438813 cs0 AddrBus test pass
1078 19:54:27.439056 cs1 AddrBus test pass
1079 19:54:27.439288
1080 19:54:27.444125 100bdlr_step_size ps== 420
1081 19:54:27.444423 result report
1082 19:54:27.449716 boot times 0Enable ddr reg access
1083 19:54:27.455141 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1084 19:54:27.468620 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1085 19:54:28.040668 0.0;M3 CHK:0;cm4_sp_mode 0
1086 19:54:28.041124 MVN_1=0x00000000
1087 19:54:28.046112 MVN_2=0x00000000
1088 19:54:28.051856 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1089 19:54:28.052267 OPS=0x10
1090 19:54:28.052515 ring efuse init
1091 19:54:28.052746 chipver efuse init
1092 19:54:28.057590 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1093 19:54:28.063070 [0.018961 Inits done]
1094 19:54:28.063621 secure task start!
1095 19:54:28.064082 high task start!
1096 19:54:28.067642 low task start!
1097 19:54:28.068017 run into bl31
1098 19:54:28.074293 NOTICE: BL31: v1.3(release):4fc40b1
1099 19:54:28.082092 NOTICE: BL31: Built : 15:58:17, May 22 2019
1100 19:54:28.082465 NOTICE: BL31: G12A normal boot!
1101 19:54:28.107639 NOTICE: BL31: BL33 decompress pass
1102 19:54:28.113251 ERROR: Error initializing runtime service opteed_fast
1103 19:54:29.346058
1104 19:54:29.346493
1105 19:54:29.354456 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1106 19:54:29.354915
1107 19:54:29.355394 Model: Libre Computer AML-A311D-CC Alta
1108 19:54:29.562943 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1109 19:54:29.586281 DRAM: 2 GiB (effective 3.8 GiB)
1110 19:54:29.729270 Core: 408 devices, 31 uclasses, devicetree: separate
1111 19:54:29.735095 WDT: Not starting watchdog@f0d0
1112 19:54:29.767396 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1113 19:54:29.779827 Loading Environment from FAT... Card did not respond to voltage select! : -110
1114 19:54:29.784803 ** Bad device specification mmc 0 **
1115 19:54:29.795135 Card did not respond to voltage select! : -110
1116 19:54:29.802809 ** Bad device specification mmc 0 **
1117 19:54:29.803103 Couldn't find partition mmc 0
1118 19:54:29.811126 Card did not respond to voltage select! : -110
1119 19:54:29.816724 ** Bad device specification mmc 0 **
1120 19:54:29.817129 Couldn't find partition mmc 0
1121 19:54:29.821794 Error: could not access storage.
1122 19:54:30.164152 Net: eth0: ethernet@ff3f0000
1123 19:54:30.164594 starting USB...
1124 19:54:30.416085 Bus usb@ff500000: Register 3000140 NbrPorts 3
1125 19:54:30.416707 Starting the controller
1126 19:54:30.423094 USB XHCI 1.10
1127 19:54:31.977189 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1128 19:54:31.985379 scanning usb for storage devices... 0 Storage Device(s) found
1130 19:54:32.036561 Hit any key to stop autoboot: 1
1131 19:54:32.037279 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1132 19:54:32.037815 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1133 19:54:32.038198 Setting prompt string to ['=>']
1134 19:54:32.038502 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1135 19:54:32.042793 0
1136 19:54:32.043458 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1137 19:54:32.043815 Sending with 10 millisecond of delay
1139 19:54:33.178781 => setenv autoload no
1140 19:54:33.189593 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1141 19:54:33.194492 setenv autoload no
1142 19:54:33.195260 Sending with 10 millisecond of delay
1144 19:54:34.992083 => setenv initrd_high 0xffffffff
1145 19:54:35.002853 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1146 19:54:35.003670 setenv initrd_high 0xffffffff
1147 19:54:35.004438 Sending with 10 millisecond of delay
1149 19:54:36.620751 => setenv fdt_high 0xffffffff
1150 19:54:36.631525 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1151 19:54:36.632385 setenv fdt_high 0xffffffff
1152 19:54:36.633100 Sending with 10 millisecond of delay
1154 19:54:36.924903 => dhcp
1155 19:54:36.935660 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1156 19:54:36.936525 dhcp
1157 19:54:36.936960 Speed: 1000, full duplex
1158 19:54:36.937371 BOOTP broadcast 1
1159 19:54:37.183822 BOOTP broadcast 2
1160 19:54:37.198183 DHCP client bound to address 192.168.6.33 (262 ms)
1161 19:54:37.198969 Sending with 10 millisecond of delay
1163 19:54:38.875353 => setenv serverip 192.168.6.2
1164 19:54:38.886218 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1165 19:54:38.887042 setenv serverip 192.168.6.2
1166 19:54:38.887745 Sending with 10 millisecond of delay
1168 19:54:42.610976 => tftpboot 0x01080000 823113/tftp-deploy-0x1lj087/kernel/uImage
1169 19:54:42.621760 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1170 19:54:42.622626 tftpboot 0x01080000 823113/tftp-deploy-0x1lj087/kernel/uImage
1171 19:54:42.623054 Speed: 1000, full duplex
1172 19:54:42.623453 Using ethernet@ff3f0000 device
1173 19:54:42.624393 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1174 19:54:42.629862 Filename '823113/tftp-deploy-0x1lj087/kernel/uImage'.
1175 19:54:42.633831 Load address: 0x1080000
1176 19:54:47.118885 Loading: *################################################## 43.6 MiB
1177 19:54:47.119481 9.7 MiB/s
1178 19:54:47.119890 done
1179 19:54:47.123188 Bytes transferred = 45713984 (2b98a40 hex)
1180 19:54:47.123943 Sending with 10 millisecond of delay
1182 19:54:51.810170 => tftpboot 0x08000000 823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot
1183 19:54:51.820977 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:02)
1184 19:54:51.821831 tftpboot 0x08000000 823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot
1185 19:54:51.822261 Speed: 1000, full duplex
1186 19:54:51.822661 Using ethernet@ff3f0000 device
1187 19:54:51.823775 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1188 19:54:51.832313 Filename '823113/tftp-deploy-0x1lj087/ramdisk/ramdisk.cpio.gz.uboot'.
1189 19:54:51.832779 Load address: 0x8000000
1190 19:54:53.600592 Loading: *################################################# UDP wrong checksum 00000005 0000fc3c
1191 19:54:58.602331 T UDP wrong checksum 00000005 0000fc3c
1192 19:55:08.604761 T T UDP wrong checksum 00000005 0000fc3c
1193 19:55:28.608328 T T T T UDP wrong checksum 00000005 0000fc3c
1194 19:55:48.613236 T T T
1195 19:55:48.613925 Retry count exceeded; starting again
1197 19:55:48.615487 end: 2.4.3 bootloader-commands (duration 00:01:17) [common]
1200 19:55:48.617646 end: 2.4 uboot-commands (duration 00:01:55) [common]
1202 19:55:48.619251 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1204 19:55:48.620425 end: 2 uboot-action (duration 00:01:55) [common]
1206 19:55:48.622075 Cleaning after the job
1207 19:55:48.622681 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/ramdisk
1208 19:55:48.624150 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/kernel
1209 19:55:48.651078 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/dtb
1210 19:55:48.652511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/nfsrootfs
1211 19:55:48.687119 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823113/tftp-deploy-0x1lj087/modules
1212 19:55:48.694097 start: 4.1 power-off (timeout 00:00:30) [common]
1213 19:55:48.694687 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1214 19:55:48.725617 >> OK - accepted request
1215 19:55:48.729328 Returned 0 in 0 seconds
1216 19:55:48.830107 end: 4.1 power-off (duration 00:00:00) [common]
1218 19:55:48.831100 start: 4.2 read-feedback (timeout 00:10:00) [common]
1219 19:55:48.831742 Listened to connection for namespace 'common' for up to 1s
1220 19:55:49.831959 Finalising connection for namespace 'common'
1221 19:55:49.832775 Disconnecting from shell: Finalise
1222 19:55:49.833341 =>
1223 19:55:49.934372 end: 4.2 read-feedback (duration 00:00:01) [common]
1224 19:55:49.935014 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/823113
1225 19:55:52.922852 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/823113
1226 19:55:52.923465 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.