Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 12:35:53.223874 lava-dispatcher, installed at version: 2024.01
2 12:35:53.224721 start: 0 validate
3 12:35:53.225180 Start time: 2024-10-09 12:35:53.225151+00:00 (UTC)
4 12:35:53.225744 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 12:35:53.226287 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 12:35:53.262418 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 12:35:53.262977 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-7-g556be13a9b36%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 12:35:53.296980 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 12:35:53.297631 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-7-g556be13a9b36%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 12:35:53.327793 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 12:35:53.329103 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-7-g556be13a9b36%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 12:35:53.370420 validate duration: 0.15
14 12:35:53.371503 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:35:53.371876 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:35:53.372248 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:35:53.372902 Not decompressing ramdisk as can be used compressed.
18 12:35:53.373372 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 12:35:53.373680 saving as /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/ramdisk/rootfs.cpio.gz
20 12:35:53.373998 total size: 47897469 (45 MB)
21 12:35:53.411648 progress 0 % (0 MB)
22 12:35:53.444589 progress 5 % (2 MB)
23 12:35:53.477342 progress 10 % (4 MB)
24 12:35:53.508428 progress 15 % (6 MB)
25 12:35:53.540472 progress 20 % (9 MB)
26 12:35:53.571152 progress 25 % (11 MB)
27 12:35:53.603624 progress 30 % (13 MB)
28 12:35:53.634491 progress 35 % (16 MB)
29 12:35:53.665858 progress 40 % (18 MB)
30 12:35:53.697464 progress 45 % (20 MB)
31 12:35:53.728136 progress 50 % (22 MB)
32 12:35:53.758675 progress 55 % (25 MB)
33 12:35:53.789302 progress 60 % (27 MB)
34 12:35:53.819622 progress 65 % (29 MB)
35 12:35:53.849939 progress 70 % (32 MB)
36 12:35:53.880057 progress 75 % (34 MB)
37 12:35:53.910616 progress 80 % (36 MB)
38 12:35:53.940432 progress 85 % (38 MB)
39 12:35:53.971114 progress 90 % (41 MB)
40 12:35:54.001057 progress 95 % (43 MB)
41 12:35:54.030684 progress 100 % (45 MB)
42 12:35:54.031431 45 MB downloaded in 0.66 s (69.48 MB/s)
43 12:35:54.032005 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:35:54.032903 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:35:54.033194 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:35:54.033466 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:35:54.033949 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/kernel/Image
49 12:35:54.034192 saving as /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/kernel/Image
50 12:35:54.034401 total size: 45713920 (43 MB)
51 12:35:54.034611 No compression specified
52 12:35:54.070058 progress 0 % (0 MB)
53 12:35:54.098262 progress 5 % (2 MB)
54 12:35:54.126874 progress 10 % (4 MB)
55 12:35:54.155512 progress 15 % (6 MB)
56 12:35:54.183731 progress 20 % (8 MB)
57 12:35:54.212590 progress 25 % (10 MB)
58 12:35:54.241333 progress 30 % (13 MB)
59 12:35:54.269961 progress 35 % (15 MB)
60 12:35:54.299615 progress 40 % (17 MB)
61 12:35:54.328328 progress 45 % (19 MB)
62 12:35:54.357975 progress 50 % (21 MB)
63 12:35:54.386673 progress 55 % (24 MB)
64 12:35:54.415610 progress 60 % (26 MB)
65 12:35:54.444425 progress 65 % (28 MB)
66 12:35:54.473087 progress 70 % (30 MB)
67 12:35:54.502091 progress 75 % (32 MB)
68 12:35:54.530537 progress 80 % (34 MB)
69 12:35:54.559040 progress 85 % (37 MB)
70 12:35:54.587723 progress 90 % (39 MB)
71 12:35:54.616227 progress 95 % (41 MB)
72 12:35:54.645114 progress 100 % (43 MB)
73 12:35:54.645666 43 MB downloaded in 0.61 s (71.32 MB/s)
74 12:35:54.646144 end: 1.2.1 http-download (duration 00:00:01) [common]
76 12:35:54.646963 end: 1.2 download-retry (duration 00:00:01) [common]
77 12:35:54.647236 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:35:54.647498 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:35:54.647998 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 12:35:54.648291 saving as /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 12:35:54.648500 total size: 53209 (0 MB)
82 12:35:54.648709 No compression specified
83 12:35:54.688189 progress 61 % (0 MB)
84 12:35:54.689039 progress 100 % (0 MB)
85 12:35:54.689567 0 MB downloaded in 0.04 s (1.24 MB/s)
86 12:35:54.690029 end: 1.3.1 http-download (duration 00:00:00) [common]
88 12:35:54.690836 end: 1.3 download-retry (duration 00:00:00) [common]
89 12:35:54.691099 start: 1.4 download-retry (timeout 00:09:59) [common]
90 12:35:54.691363 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 12:35:54.691853 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/modules.tar.xz
92 12:35:54.692155 saving as /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/modules/modules.tar
93 12:35:54.692372 total size: 11609636 (11 MB)
94 12:35:54.692584 Using unxz to decompress xz
95 12:35:54.728839 progress 0 % (0 MB)
96 12:35:54.791454 progress 5 % (0 MB)
97 12:35:54.869918 progress 10 % (1 MB)
98 12:35:54.956499 progress 15 % (1 MB)
99 12:35:55.048635 progress 20 % (2 MB)
100 12:35:55.131934 progress 25 % (2 MB)
101 12:35:55.210878 progress 30 % (3 MB)
102 12:35:55.293985 progress 35 % (3 MB)
103 12:35:55.370091 progress 40 % (4 MB)
104 12:35:55.447937 progress 45 % (5 MB)
105 12:35:55.533064 progress 50 % (5 MB)
106 12:35:55.611034 progress 55 % (6 MB)
107 12:35:55.696081 progress 60 % (6 MB)
108 12:35:55.771916 progress 65 % (7 MB)
109 12:35:55.852864 progress 70 % (7 MB)
110 12:35:55.926682 progress 75 % (8 MB)
111 12:35:56.004142 progress 80 % (8 MB)
112 12:35:56.088832 progress 85 % (9 MB)
113 12:35:56.168151 progress 90 % (9 MB)
114 12:35:56.248916 progress 95 % (10 MB)
115 12:35:56.329348 progress 100 % (11 MB)
116 12:35:56.340758 11 MB downloaded in 1.65 s (6.72 MB/s)
117 12:35:56.341352 end: 1.4.1 http-download (duration 00:00:02) [common]
119 12:35:56.342177 end: 1.4 download-retry (duration 00:00:02) [common]
120 12:35:56.342447 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 12:35:56.342712 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 12:35:56.342960 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 12:35:56.343215 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 12:35:56.343840 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz
125 12:35:56.344787 makedir: /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin
126 12:35:56.345517 makedir: /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/tests
127 12:35:56.346191 makedir: /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/results
128 12:35:56.346856 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-add-keys
129 12:35:56.347866 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-add-sources
130 12:35:56.348917 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-background-process-start
131 12:35:56.349936 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-background-process-stop
132 12:35:56.351036 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-common-functions
133 12:35:56.352082 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-echo-ipv4
134 12:35:56.353081 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-install-packages
135 12:35:56.354041 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-installed-packages
136 12:35:56.354996 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-os-build
137 12:35:56.355951 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-probe-channel
138 12:35:56.356963 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-probe-ip
139 12:35:56.357929 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-target-ip
140 12:35:56.358943 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-target-mac
141 12:35:56.359935 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-target-storage
142 12:35:56.360969 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-case
143 12:35:56.361935 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-event
144 12:35:56.362891 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-feedback
145 12:35:56.363842 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-raise
146 12:35:56.364841 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-reference
147 12:35:56.365799 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-runner
148 12:35:56.366806 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-set
149 12:35:56.367804 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-test-shell
150 12:35:56.368839 Updating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-install-packages (oe)
151 12:35:56.369889 Updating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/bin/lava-installed-packages (oe)
152 12:35:56.370813 Creating /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/environment
153 12:35:56.371591 LAVA metadata
154 12:35:56.372146 - LAVA_JOB_ID=826942
155 12:35:56.372618 - LAVA_DISPATCHER_IP=192.168.6.2
156 12:35:56.373340 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 12:35:56.375291 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 12:35:56.375935 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 12:35:56.376403 skipped lava-vland-overlay
160 12:35:56.376891 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 12:35:56.377398 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 12:35:56.377819 skipped lava-multinode-overlay
163 12:35:56.378294 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 12:35:56.378791 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 12:35:56.379263 Loading test definitions
166 12:35:56.379798 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 12:35:56.380267 Using /lava-826942 at stage 0
168 12:35:56.382413 uuid=826942_1.5.2.4.1 testdef=None
169 12:35:56.382991 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 12:35:56.383498 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 12:35:56.385532 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 12:35:56.386341 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 12:35:56.388524 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 12:35:56.389353 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 12:35:56.391442 runner path: /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/0/tests/0_igt-gpu-panfrost test_uuid 826942_1.5.2.4.1
178 12:35:56.392051 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 12:35:56.392863 Creating lava-test-runner.conf files
181 12:35:56.393071 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/826942/lava-overlay-izjh8riz/lava-826942/0 for stage 0
182 12:35:56.393412 - 0_igt-gpu-panfrost
183 12:35:56.393762 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 12:35:56.394042 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 12:35:56.417818 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 12:35:56.418253 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 12:35:56.418518 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 12:35:56.418785 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 12:35:56.419049 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 12:36:03.311124 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 12:36:03.311594 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 12:36:03.311842 extracting modules file /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk
193 12:36:04.714581 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 12:36:04.715065 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 12:36:04.715345 [common] Applying overlay /var/lib/lava/dispatcher/tmp/826942/compress-overlay-1egiwoxa/overlay-1.5.2.5.tar.gz to ramdisk
196 12:36:04.715560 [common] Applying overlay /var/lib/lava/dispatcher/tmp/826942/compress-overlay-1egiwoxa/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk
197 12:36:04.745756 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 12:36:04.746172 start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
199 12:36:04.746440 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
200 12:36:04.746664 Converting downloaded kernel to a uImage
201 12:36:04.746964 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/kernel/Image /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/kernel/uImage
202 12:36:05.229242 output: Image Name:
203 12:36:05.229661 output: Created: Wed Oct 9 12:36:04 2024
204 12:36:05.229867 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 12:36:05.230067 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 12:36:05.230264 output: Load Address: 01080000
207 12:36:05.230461 output: Entry Point: 01080000
208 12:36:05.230658 output:
209 12:36:05.230986 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 12:36:05.231250 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 12:36:05.231515 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 12:36:05.231762 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 12:36:05.232050 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 12:36:05.232323 Building ramdisk /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk
215 12:36:11.936406 >> 502360 blocks
216 12:36:33.002045 Adding RAMdisk u-boot header.
217 12:36:33.002502 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk.cpio.gz.uboot
218 12:36:33.694217 output: Image Name:
219 12:36:33.694633 output: Created: Wed Oct 9 12:36:33 2024
220 12:36:33.694846 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 12:36:33.695050 output: Data Size: 65705087 Bytes = 64165.12 KiB = 62.66 MiB
222 12:36:33.695249 output: Load Address: 00000000
223 12:36:33.695448 output: Entry Point: 00000000
224 12:36:33.695643 output:
225 12:36:33.696451 rename /var/lib/lava/dispatcher/tmp/826942/extract-overlay-ramdisk-fx7q9ccb/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot
226 12:36:33.697234 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 12:36:33.697832 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 12:36:33.698462 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 12:36:33.698959 No LXC device requested
230 12:36:33.699501 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 12:36:33.700089 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 12:36:33.700638 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 12:36:33.701089 Checking files for TFTP limit of 4294967296 bytes.
234 12:36:33.704036 end: 1 tftp-deploy (duration 00:00:40) [common]
235 12:36:33.704668 start: 2 uboot-action (timeout 00:05:00) [common]
236 12:36:33.705242 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 12:36:33.705785 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 12:36:33.706331 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 12:36:33.706902 Using kernel file from prepare-kernel: 826942/tftp-deploy-u01xpeyo/kernel/uImage
240 12:36:33.707557 substitutions:
241 12:36:33.708024 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 12:36:33.708471 - {DTB_ADDR}: 0x01070000
243 12:36:33.708909 - {DTB}: 826942/tftp-deploy-u01xpeyo/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 12:36:33.709346 - {INITRD}: 826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot
245 12:36:33.709778 - {KERNEL_ADDR}: 0x01080000
246 12:36:33.710210 - {KERNEL}: 826942/tftp-deploy-u01xpeyo/kernel/uImage
247 12:36:33.710638 - {LAVA_MAC}: None
248 12:36:33.711110 - {PRESEED_CONFIG}: None
249 12:36:33.711543 - {PRESEED_LOCAL}: None
250 12:36:33.711969 - {RAMDISK_ADDR}: 0x08000000
251 12:36:33.712422 - {RAMDISK}: 826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot
252 12:36:33.712855 - {ROOT_PART}: None
253 12:36:33.713279 - {ROOT}: None
254 12:36:33.713707 - {SERVER_IP}: 192.168.6.2
255 12:36:33.714140 - {TEE_ADDR}: 0x83000000
256 12:36:33.714564 - {TEE}: None
257 12:36:33.714990 Parsed boot commands:
258 12:36:33.715402 - setenv autoload no
259 12:36:33.715822 - setenv initrd_high 0xffffffff
260 12:36:33.716268 - setenv fdt_high 0xffffffff
261 12:36:33.716690 - dhcp
262 12:36:33.717114 - setenv serverip 192.168.6.2
263 12:36:33.717537 - tftpboot 0x01080000 826942/tftp-deploy-u01xpeyo/kernel/uImage
264 12:36:33.717964 - tftpboot 0x08000000 826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot
265 12:36:33.718391 - tftpboot 0x01070000 826942/tftp-deploy-u01xpeyo/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 12:36:33.718818 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 12:36:33.719247 - bootm 0x01080000 0x08000000 0x01070000
268 12:36:33.719788 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 12:36:33.721479 start: 2.3 connect-device (timeout 00:05:00) [common]
271 12:36:33.721956 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 12:36:33.736875 Setting prompt string to ['lava-test: # ']
273 12:36:33.738503 end: 2.3 connect-device (duration 00:00:00) [common]
274 12:36:33.739147 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 12:36:33.739736 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 12:36:33.740348 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 12:36:33.741562 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 12:36:33.780057 >> OK - accepted request
279 12:36:33.782192 Returned 0 in 0 seconds
280 12:36:33.883383 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 12:36:33.885240 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 12:36:33.885844 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 12:36:33.886383 Setting prompt string to ['Hit any key to stop autoboot']
285 12:36:33.886872 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 12:36:33.888599 Trying 192.168.56.21...
287 12:36:33.889119 Connected to conserv1.
288 12:36:33.889580 Escape character is '^]'.
289 12:36:33.890033
290 12:36:33.890500 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 12:36:33.890963
292 12:36:40.833515 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 12:36:40.834197 bl2_stage_init 0x01
294 12:36:40.834661 bl2_stage_init 0x81
295 12:36:40.839101 hw id: 0x0000 - pwm id 0x01
296 12:36:40.839603 bl2_stage_init 0xc1
297 12:36:40.844657 bl2_stage_init 0x02
298 12:36:40.845131
299 12:36:40.845584 L0:00000000
300 12:36:40.846013 L1:00000703
301 12:36:40.846440 L2:00008067
302 12:36:40.846863 L3:15000000
303 12:36:40.850182 S1:00000000
304 12:36:40.850654 B2:20282000
305 12:36:40.851099 B1:a0f83180
306 12:36:40.851527
307 12:36:40.851958 TE: 69990
308 12:36:40.852425
309 12:36:40.855893 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 12:36:40.856399
311 12:36:40.861433 Board ID = 1
312 12:36:40.861901 Set cpu clk to 24M
313 12:36:40.862331 Set clk81 to 24M
314 12:36:40.867058 Use GP1_pll as DSU clk.
315 12:36:40.867524 DSU clk: 1200 Mhz
316 12:36:40.867949 CPU clk: 1200 MHz
317 12:36:40.872652 Set clk81 to 166.6M
318 12:36:40.878207 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 12:36:40.878681 board id: 1
320 12:36:40.884426 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 12:36:40.896265 fw parse done
322 12:36:40.902220 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 12:36:40.944414 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 12:36:40.956567 PIEI prepare done
325 12:36:40.957046 fastboot data load
326 12:36:40.957483 fastboot data verify
327 12:36:40.962138 verify result: 266
328 12:36:40.967693 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 12:36:40.968226 LPDDR4 probe
330 12:36:40.968670 ddr clk to 1584MHz
331 12:36:40.975655 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 12:36:41.014973
333 12:36:41.015457 dmc_version 0001
334 12:36:41.020520 Check phy result
335 12:36:41.026481 INFO : End of CA training
336 12:36:41.026944 INFO : End of initialization
337 12:36:41.032074 INFO : Training has run successfully!
338 12:36:41.032533 Check phy result
339 12:36:41.037696 INFO : End of initialization
340 12:36:41.038153 INFO : End of read enable training
341 12:36:41.043192 INFO : End of fine write leveling
342 12:36:41.048862 INFO : End of Write leveling coarse delay
343 12:36:41.049317 INFO : Training has run successfully!
344 12:36:41.049745 Check phy result
345 12:36:41.054526 INFO : End of initialization
346 12:36:41.054989 INFO : End of read dq deskew training
347 12:36:41.060085 INFO : End of MPR read delay center optimization
348 12:36:41.065723 INFO : End of write delay center optimization
349 12:36:41.071190 INFO : End of read delay center optimization
350 12:36:41.071665 INFO : End of max read latency training
351 12:36:41.076784 INFO : Training has run successfully!
352 12:36:41.077240 1D training succeed
353 12:36:41.086044 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 12:36:41.134282 Check phy result
355 12:36:41.134818 INFO : End of initialization
356 12:36:41.161613 INFO : End of 2D read delay Voltage center optimization
357 12:36:41.184965 INFO : End of 2D read delay Voltage center optimization
358 12:36:41.242671 INFO : End of 2D write delay Voltage center optimization
359 12:36:41.296469 INFO : End of 2D write delay Voltage center optimization
360 12:36:41.302141 INFO : Training has run successfully!
361 12:36:41.303097
362 12:36:41.303947 channel==0
363 12:36:41.307912 RxClkDly_Margin_A0==88 ps 9
364 12:36:41.308278 TxDqDly_Margin_A0==98 ps 10
365 12:36:41.311041 RxClkDly_Margin_A1==88 ps 9
366 12:36:41.311360 TxDqDly_Margin_A1==98 ps 10
367 12:36:41.316535 TrainedVREFDQ_A0==74
368 12:36:41.316879 TrainedVREFDQ_A1==75
369 12:36:41.317138 VrefDac_Margin_A0==24
370 12:36:41.322255 DeviceVref_Margin_A0==40
371 12:36:41.322599 VrefDac_Margin_A1==23
372 12:36:41.327812 DeviceVref_Margin_A1==39
373 12:36:41.328189
374 12:36:41.328461
375 12:36:41.328709 channel==1
376 12:36:41.328953 RxClkDly_Margin_A0==78 ps 8
377 12:36:41.331331 TxDqDly_Margin_A0==98 ps 10
378 12:36:41.336834 RxClkDly_Margin_A1==78 ps 8
379 12:36:41.337216 TxDqDly_Margin_A1==88 ps 9
380 12:36:41.337493 TrainedVREFDQ_A0==78
381 12:36:41.342445 TrainedVREFDQ_A1==75
382 12:36:41.342826 VrefDac_Margin_A0==22
383 12:36:41.348254 DeviceVref_Margin_A0==36
384 12:36:41.348863 VrefDac_Margin_A1==20
385 12:36:41.349300 DeviceVref_Margin_A1==39
386 12:36:41.349724
387 12:36:41.353886 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 12:36:41.354442
389 12:36:41.387339 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
390 12:36:41.388021 2D training succeed
391 12:36:41.392984 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 12:36:41.398406 auto size-- 65535DDR cs0 size: 2048MB
393 12:36:41.398961 DDR cs1 size: 2048MB
394 12:36:41.404057 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 12:36:41.404609 cs0 DataBus test pass
396 12:36:41.405048 cs1 DataBus test pass
397 12:36:41.409626 cs0 AddrBus test pass
398 12:36:41.410168 cs1 AddrBus test pass
399 12:36:41.410604
400 12:36:41.415251 100bdlr_step_size ps== 478
401 12:36:41.415803 result report
402 12:36:41.416280 boot times 0Enable ddr reg access
403 12:36:41.424654 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 12:36:41.438782 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 12:36:42.097022 bl2z: ptr: 05129330, size: 00001e40
406 12:36:42.106124 0.0;M3 CHK:0;cm4_sp_mode 0
407 12:36:42.106674 MVN_1=0x00000000
408 12:36:42.107138 MVN_2=0x00000000
409 12:36:42.117726 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 12:36:42.118264 OPS=0x04
411 12:36:42.118724 ring efuse init
412 12:36:42.123229 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 12:36:42.123745 [0.017355 Inits done]
414 12:36:42.124239 secure task start!
415 12:36:42.131177 high task start!
416 12:36:42.131680 low task start!
417 12:36:42.132164 run into bl31
418 12:36:42.139798 NOTICE: BL31: v1.3(release):4fc40b1
419 12:36:42.147102 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 12:36:42.147627 NOTICE: BL31: G12A normal boot!
421 12:36:42.163130 NOTICE: BL31: BL33 decompress pass
422 12:36:42.168857 ERROR: Error initializing runtime service opteed_fast
423 12:36:44.883284 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 12:36:44.883707 bl2_stage_init 0x01
425 12:36:44.883928 bl2_stage_init 0x81
426 12:36:44.889041 hw id: 0x0000 - pwm id 0x01
427 12:36:44.889308 bl2_stage_init 0xc1
428 12:36:44.889517 bl2_stage_init 0x02
429 12:36:44.889718
430 12:36:44.894530 L0:00000000
431 12:36:44.894785 L1:00000703
432 12:36:44.894991 L2:00008067
433 12:36:44.895192 L3:15000000
434 12:36:44.895391 S1:00000000
435 12:36:44.900054 B2:20282000
436 12:36:44.900302 B1:a0f83180
437 12:36:44.900507
438 12:36:44.900736 TE: 69782
439 12:36:44.900944
440 12:36:44.905679 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 12:36:44.905935
442 12:36:44.906140 Board ID = 1
443 12:36:44.911307 Set cpu clk to 24M
444 12:36:44.911583 Set clk81 to 24M
445 12:36:44.911790 Use GP1_pll as DSU clk.
446 12:36:44.917003 DSU clk: 1200 Mhz
447 12:36:44.917274 CPU clk: 1200 MHz
448 12:36:44.917480 Set clk81 to 166.6M
449 12:36:44.922558 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 12:36:44.928113 board id: 1
451 12:36:44.933631 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 12:36:44.944532 fw parse done
453 12:36:44.950519 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 12:36:44.993710 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 12:36:45.004834 PIEI prepare done
456 12:36:45.005089 fastboot data load
457 12:36:45.005296 fastboot data verify
458 12:36:45.010477 verify result: 266
459 12:36:45.016283 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 12:36:45.016821 LPDDR4 probe
461 12:36:45.017295 ddr clk to 1584MHz
462 12:36:45.024184 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 12:36:45.061852
464 12:36:45.062427 dmc_version 0001
465 12:36:45.068027 Check phy result
466 12:36:45.075005 INFO : End of CA training
467 12:36:45.075591 INFO : End of initialization
468 12:36:45.080530 INFO : Training has run successfully!
469 12:36:45.081092 Check phy result
470 12:36:45.086071 INFO : End of initialization
471 12:36:45.086646 INFO : End of read enable training
472 12:36:45.091645 INFO : End of fine write leveling
473 12:36:45.097267 INFO : End of Write leveling coarse delay
474 12:36:45.097821 INFO : Training has run successfully!
475 12:36:45.098282 Check phy result
476 12:36:45.102925 INFO : End of initialization
477 12:36:45.103489 INFO : End of read dq deskew training
478 12:36:45.108504 INFO : End of MPR read delay center optimization
479 12:36:45.114088 INFO : End of write delay center optimization
480 12:36:45.119661 INFO : End of read delay center optimization
481 12:36:45.120244 INFO : End of max read latency training
482 12:36:45.125314 INFO : Training has run successfully!
483 12:36:45.125857 1D training succeed
484 12:36:45.134436 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 12:36:45.182626 Check phy result
486 12:36:45.183197 INFO : End of initialization
487 12:36:45.210169 INFO : End of 2D read delay Voltage center optimization
488 12:36:45.234352 INFO : End of 2D read delay Voltage center optimization
489 12:36:45.291065 INFO : End of 2D write delay Voltage center optimization
490 12:36:45.345046 INFO : End of 2D write delay Voltage center optimization
491 12:36:45.350625 INFO : Training has run successfully!
492 12:36:45.351170
493 12:36:45.351632 channel==0
494 12:36:45.356373 RxClkDly_Margin_A0==88 ps 9
495 12:36:45.356940 TxDqDly_Margin_A0==98 ps 10
496 12:36:45.361815 RxClkDly_Margin_A1==88 ps 9
497 12:36:45.362351 TxDqDly_Margin_A1==88 ps 9
498 12:36:45.362805 TrainedVREFDQ_A0==74
499 12:36:45.367372 TrainedVREFDQ_A1==74
500 12:36:45.367917 VrefDac_Margin_A0==23
501 12:36:45.368417 DeviceVref_Margin_A0==40
502 12:36:45.372987 VrefDac_Margin_A1==23
503 12:36:45.373525 DeviceVref_Margin_A1==40
504 12:36:45.373987
505 12:36:45.374435
506 12:36:45.374878 channel==1
507 12:36:45.378633 RxClkDly_Margin_A0==78 ps 8
508 12:36:45.379197 TxDqDly_Margin_A0==98 ps 10
509 12:36:45.384372 RxClkDly_Margin_A1==78 ps 8
510 12:36:45.384922 TxDqDly_Margin_A1==88 ps 9
511 12:36:45.389856 TrainedVREFDQ_A0==78
512 12:36:45.390408 TrainedVREFDQ_A1==78
513 12:36:45.390871 VrefDac_Margin_A0==22
514 12:36:45.395403 DeviceVref_Margin_A0==36
515 12:36:45.395945 VrefDac_Margin_A1==22
516 12:36:45.400980 DeviceVref_Margin_A1==36
517 12:36:45.401519
518 12:36:45.401981 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 12:36:45.402427
520 12:36:45.434570 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
521 12:36:45.435196 2D training succeed
522 12:36:45.440401 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 12:36:45.445841 auto size-- 65535DDR cs0 size: 2048MB
524 12:36:45.446384 DDR cs1 size: 2048MB
525 12:36:45.451401 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 12:36:45.451946 cs0 DataBus test pass
527 12:36:45.456970 cs1 DataBus test pass
528 12:36:45.457514 cs0 AddrBus test pass
529 12:36:45.457970 cs1 AddrBus test pass
530 12:36:45.458415
531 12:36:45.462636 100bdlr_step_size ps== 471
532 12:36:45.463191 result report
533 12:36:45.468379 boot times 0Enable ddr reg access
534 12:36:45.473390 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 12:36:45.487226 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 12:36:46.146616 bl2z: ptr: 05129330, size: 00001e40
537 12:36:46.155373 0.0;M3 CHK:0;cm4_sp_mode 0
538 12:36:46.155898 MVN_1=0x00000000
539 12:36:46.156405 MVN_2=0x00000000
540 12:36:46.166917 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 12:36:46.167435 OPS=0x04
542 12:36:46.167898 ring efuse init
543 12:36:46.172476 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 12:36:46.172994 [0.017354 Inits done]
545 12:36:46.173447 secure task start!
546 12:36:46.179773 high task start!
547 12:36:46.180307 low task start!
548 12:36:46.180759 run into bl31
549 12:36:46.188347 NOTICE: BL31: v1.3(release):4fc40b1
550 12:36:46.196181 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 12:36:46.196694 NOTICE: BL31: G12A normal boot!
552 12:36:46.211819 NOTICE: BL31: BL33 decompress pass
553 12:36:46.217430 ERROR: Error initializing runtime service opteed_fast
554 12:36:47.583159 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 12:36:47.583572 bl2_stage_init 0x01
556 12:36:47.583807 bl2_stage_init 0x81
557 12:36:47.589083 hw id: 0x0000 - pwm id 0x01
558 12:36:47.589355 bl2_stage_init 0xc1
559 12:36:47.594192 bl2_stage_init 0x02
560 12:36:47.594748
561 12:36:47.595185 L0:00000000
562 12:36:47.595604 L1:00000703
563 12:36:47.596045 L2:00008067
564 12:36:47.596460 L3:15000000
565 12:36:47.599935 S1:00000000
566 12:36:47.600507 B2:20282000
567 12:36:47.600943 B1:a0f83180
568 12:36:47.601357
569 12:36:47.601766 TE: 70503
570 12:36:47.602178
571 12:36:47.605430 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 12:36:47.605921
573 12:36:47.610967 Board ID = 1
574 12:36:47.611447 Set cpu clk to 24M
575 12:36:47.611861 Set clk81 to 24M
576 12:36:47.616674 Use GP1_pll as DSU clk.
577 12:36:47.617159 DSU clk: 1200 Mhz
578 12:36:47.617576 CPU clk: 1200 MHz
579 12:36:47.622250 Set clk81 to 166.6M
580 12:36:47.627828 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 12:36:47.628345 board id: 1
582 12:36:47.634921 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 12:36:47.645776 fw parse done
584 12:36:47.651743 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 12:36:47.694859 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 12:36:47.706039 PIEI prepare done
587 12:36:47.706555 fastboot data load
588 12:36:47.706986 fastboot data verify
589 12:36:47.711646 verify result: 266
590 12:36:47.717302 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 12:36:47.717809 LPDDR4 probe
592 12:36:47.718232 ddr clk to 1584MHz
593 12:36:47.725253 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 12:36:47.763010
595 12:36:47.763538 dmc_version 0001
596 12:36:47.770058 Check phy result
597 12:36:47.776064 INFO : End of CA training
598 12:36:47.776586 INFO : End of initialization
599 12:36:47.781680 INFO : Training has run successfully!
600 12:36:47.782186 Check phy result
601 12:36:47.787203 INFO : End of initialization
602 12:36:47.787713 INFO : End of read enable training
603 12:36:47.792790 INFO : End of fine write leveling
604 12:36:47.798425 INFO : End of Write leveling coarse delay
605 12:36:47.798929 INFO : Training has run successfully!
606 12:36:47.799351 Check phy result
607 12:36:47.804050 INFO : End of initialization
608 12:36:47.804562 INFO : End of read dq deskew training
609 12:36:47.809715 INFO : End of MPR read delay center optimization
610 12:36:47.815147 INFO : End of write delay center optimization
611 12:36:47.820853 INFO : End of read delay center optimization
612 12:36:47.821363 INFO : End of max read latency training
613 12:36:47.826396 INFO : Training has run successfully!
614 12:36:47.826899 1D training succeed
615 12:36:47.835575 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 12:36:47.883823 Check phy result
617 12:36:47.884403 INFO : End of initialization
618 12:36:47.911233 INFO : End of 2D read delay Voltage center optimization
619 12:36:47.935365 INFO : End of 2D read delay Voltage center optimization
620 12:36:47.992094 INFO : End of 2D write delay Voltage center optimization
621 12:36:48.046128 INFO : End of 2D write delay Voltage center optimization
622 12:36:48.051709 INFO : Training has run successfully!
623 12:36:48.052353
624 12:36:48.052812 channel==0
625 12:36:48.057268 RxClkDly_Margin_A0==78 ps 8
626 12:36:48.057844 TxDqDly_Margin_A0==98 ps 10
627 12:36:48.062851 RxClkDly_Margin_A1==88 ps 9
628 12:36:48.063396 TxDqDly_Margin_A1==98 ps 10
629 12:36:48.063826 TrainedVREFDQ_A0==74
630 12:36:48.068468 TrainedVREFDQ_A1==75
631 12:36:48.069004 VrefDac_Margin_A0==22
632 12:36:48.069427 DeviceVref_Margin_A0==40
633 12:36:48.074092 VrefDac_Margin_A1==23
634 12:36:48.074660 DeviceVref_Margin_A1==39
635 12:36:48.075089
636 12:36:48.075510
637 12:36:48.079696 channel==1
638 12:36:48.080275 RxClkDly_Margin_A0==78 ps 8
639 12:36:48.080704 TxDqDly_Margin_A0==98 ps 10
640 12:36:48.085263 RxClkDly_Margin_A1==78 ps 8
641 12:36:48.085797 TxDqDly_Margin_A1==88 ps 9
642 12:36:48.090861 TrainedVREFDQ_A0==78
643 12:36:48.091399 TrainedVREFDQ_A1==75
644 12:36:48.091821 VrefDac_Margin_A0==22
645 12:36:48.096480 DeviceVref_Margin_A0==36
646 12:36:48.097016 VrefDac_Margin_A1==22
647 12:36:48.102154 DeviceVref_Margin_A1==39
648 12:36:48.102685
649 12:36:48.103103 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 12:36:48.103508
651 12:36:48.135675 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
652 12:36:48.136308 2D training succeed
653 12:36:48.141301 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 12:36:48.146906 auto size-- 65535DDR cs0 size: 2048MB
655 12:36:48.147468 DDR cs1 size: 2048MB
656 12:36:48.152464 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 12:36:48.153014 cs0 DataBus test pass
658 12:36:48.158101 cs1 DataBus test pass
659 12:36:48.158659 cs0 AddrBus test pass
660 12:36:48.159081 cs1 AddrBus test pass
661 12:36:48.159489
662 12:36:48.163735 100bdlr_step_size ps== 478
663 12:36:48.164324 result report
664 12:36:48.169264 boot times 0Enable ddr reg access
665 12:36:48.174545 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 12:36:48.188359 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 12:36:48.847291 bl2z: ptr: 05129330, size: 00001e40
668 12:36:48.855690 0.0;M3 CHK:0;cm4_sp_mode 0
669 12:36:48.856216 MVN_1=0x00000000
670 12:36:48.856636 MVN_2=0x00000000
671 12:36:48.867161 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 12:36:48.867657 OPS=0x04
673 12:36:48.868108 ring efuse init
674 12:36:48.872824 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 12:36:48.873299 [0.017354 Inits done]
676 12:36:48.873710 secure task start!
677 12:36:48.880498 high task start!
678 12:36:48.880965 low task start!
679 12:36:48.881376 run into bl31
680 12:36:48.889156 NOTICE: BL31: v1.3(release):4fc40b1
681 12:36:48.896079 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 12:36:48.896557 NOTICE: BL31: G12A normal boot!
683 12:36:48.912466 NOTICE: BL31: BL33 decompress pass
684 12:36:48.918208 ERROR: Error initializing runtime service opteed_fast
685 12:36:49.713491
686 12:36:49.713888
687 12:36:49.718943 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 12:36:49.719441
689 12:36:49.722391 Model: Libre Computer AML-S905D3-CC Solitude
690 12:36:49.869373 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 12:36:49.884856 DRAM: 2 GiB (effective 3.8 GiB)
692 12:36:49.985857 Core: 406 devices, 33 uclasses, devicetree: separate
693 12:36:49.991641 WDT: Not starting watchdog@f0d0
694 12:36:50.016654 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 12:36:50.028964 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 12:36:50.033918 ** Bad device specification mmc 0 **
697 12:36:50.043948 Card did not respond to voltage select! : -110
698 12:36:50.051626 ** Bad device specification mmc 0 **
699 12:36:50.052117 Couldn't find partition mmc 0
700 12:36:50.060004 Card did not respond to voltage select! : -110
701 12:36:50.065412 ** Bad device specification mmc 0 **
702 12:36:50.065869 Couldn't find partition mmc 0
703 12:36:50.070480 Error: could not access storage.
704 12:36:50.367077 Net: eth0: ethernet@ff3f0000
705 12:36:50.367735 starting USB...
706 12:36:50.611786 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 12:36:50.612451 Starting the controller
708 12:36:50.618766 USB XHCI 1.10
709 12:36:52.174897 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 12:36:52.183246 scanning usb for storage devices... 0 Storage Device(s) found
712 12:36:52.235267 Hit any key to stop autoboot: 1
713 12:36:52.235994 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
714 12:36:52.236426 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 12:36:52.236957 Setting prompt string to ['=>']
716 12:36:52.237503 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 12:36:52.249233 0
718 12:36:52.250210 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 12:36:52.351586 => setenv autoload no
721 12:36:52.352439 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 12:36:52.358443 setenv autoload no
724 12:36:52.460087 => setenv initrd_high 0xffffffff
725 12:36:52.461120 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 12:36:52.465252 setenv initrd_high 0xffffffff
728 12:36:52.566828 => setenv fdt_high 0xffffffff
729 12:36:52.567640 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 12:36:52.572943 setenv fdt_high 0xffffffff
732 12:36:52.674586 => dhcp
733 12:36:52.675408 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 12:36:52.680278 dhcp
735 12:36:53.135839 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 12:36:53.136546 Speed: 1000, full duplex
737 12:36:53.137022 BOOTP broadcast 1
738 12:36:53.385361 BOOTP broadcast 2
739 12:36:53.887388 BOOTP broadcast 3
740 12:36:54.886510 BOOTP broadcast 4
741 12:36:56.887533 BOOTP broadcast 5
742 12:36:56.899316 DHCP client bound to address 192.168.6.12 (3764 ms)
744 12:36:57.000908 => setenv serverip 192.168.6.2
745 12:36:57.001957 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
746 12:36:57.005491 setenv serverip 192.168.6.2
748 12:36:57.107194 => tftpboot 0x01080000 826942/tftp-deploy-u01xpeyo/kernel/uImage
749 12:36:57.108495 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
750 12:36:57.115177 tftpboot 0x01080000 826942/tftp-deploy-u01xpeyo/kernel/uImage
751 12:36:57.115894 Speed: 1000, full duplex
752 12:36:57.116515 Using ethernet@ff3f0000 device
753 12:36:57.120437 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
754 12:36:57.125979 Filename '826942/tftp-deploy-u01xpeyo/kernel/uImage'.
755 12:36:57.129942 Load address: 0x1080000
756 12:37:01.393310 Loading: *################################################## 43.6 MiB
757 12:37:01.393843 10.2 MiB/s
758 12:37:01.394137 done
759 12:37:01.397754 Bytes transferred = 45713984 (2b98a40 hex)
761 12:37:01.498815 => tftpboot 0x08000000 826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot
762 12:37:01.499311 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
763 12:37:01.506050 tftpboot 0x08000000 826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot
764 12:37:01.506338 Speed: 1000, full duplex
765 12:37:01.506575 Using ethernet@ff3f0000 device
766 12:37:01.511588 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
767 12:37:01.521414 Filename '826942/tftp-deploy-u01xpeyo/ramdisk/ramdisk.cpio.gz.uboot'.
768 12:37:01.521732 Load address: 0x8000000
769 12:37:11.943326 Loading: *#######T ########################################## UDP wrong checksum 0000000f 000018c6
770 12:37:16.942636 T UDP wrong checksum 0000000f 000018c6
771 12:37:26.945519 T T UDP wrong checksum 0000000f 000018c6
772 12:37:28.398968 UDP wrong checksum 000000ff 0000e049
773 12:37:28.894700 UDP wrong checksum 000000ff 0000643c
774 12:37:46.584837 T T T UDP wrong checksum 000000ff 000048d5
775 12:37:46.604996 UDP wrong checksum 000000ff 0000cbc7
776 12:37:46.950893 UDP wrong checksum 0000000f 000018c6
777 12:38:01.953223 T T T
778 12:38:01.953619 Retry count exceeded; starting again
780 12:38:01.955338 end: 2.4.3 bootloader-commands (duration 00:01:10) [common]
783 12:38:01.957359 end: 2.4 uboot-commands (duration 00:01:28) [common]
785 12:38:01.958783 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
787 12:38:01.959854 end: 2 uboot-action (duration 00:01:28) [common]
789 12:38:01.961518 Cleaning after the job
790 12:38:01.962107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/ramdisk
791 12:38:01.963454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/kernel
792 12:38:02.012325 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/dtb
793 12:38:02.013239 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826942/tftp-deploy-u01xpeyo/modules
794 12:38:02.032960 start: 4.1 power-off (timeout 00:00:30) [common]
795 12:38:02.033639 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
796 12:38:02.067325 >> OK - accepted request
797 12:38:02.069482 Returned 0 in 0 seconds
798 12:38:02.170728 end: 4.1 power-off (duration 00:00:00) [common]
800 12:38:02.172688 start: 4.2 read-feedback (timeout 00:10:00) [common]
801 12:38:02.173507 Listened to connection for namespace 'common' for up to 1s
802 12:38:03.174404 Finalising connection for namespace 'common'
803 12:38:03.174882 Disconnecting from shell: Finalise
804 12:38:03.175318 =>
805 12:38:03.276287 end: 4.2 read-feedback (duration 00:00:01) [common]
806 12:38:03.276979 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/826942
807 12:38:03.983037 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/826942
808 12:38:03.983645 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.