Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 12:25:52.621478 lava-dispatcher, installed at version: 2024.01
2 12:25:52.622296 start: 0 validate
3 12:25:52.622753 Start time: 2024-10-09 12:25:52.622722+00:00 (UTC)
4 12:25:52.623315 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 12:25:52.623845 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 12:25:52.667125 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 12:25:52.667747 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-7-g556be13a9b36%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 12:25:52.697660 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 12:25:52.698516 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-7-g556be13a9b36%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 12:25:52.729364 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 12:25:52.729904 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 12:25:52.759311 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 12:25:52.759845 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Flee-mfd%2Ffor-mfd-next%2Fv6.12-rc1-7-g556be13a9b36%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 12:25:52.795466 validate duration: 0.17
16 12:25:52.796382 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 12:25:52.796758 start: 1.1 download-retry (timeout 00:10:00) [common]
18 12:25:52.797103 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 12:25:52.797742 Not decompressing ramdisk as can be used compressed.
20 12:25:52.798253 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 12:25:52.798576 saving as /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/ramdisk/initrd.cpio.gz
22 12:25:52.798878 total size: 5628169 (5 MB)
23 12:25:52.835549 progress 0 % (0 MB)
24 12:25:52.840328 progress 5 % (0 MB)
25 12:25:52.845385 progress 10 % (0 MB)
26 12:25:52.849830 progress 15 % (0 MB)
27 12:25:52.854690 progress 20 % (1 MB)
28 12:25:52.859167 progress 25 % (1 MB)
29 12:25:52.864157 progress 30 % (1 MB)
30 12:25:52.868883 progress 35 % (1 MB)
31 12:25:52.873123 progress 40 % (2 MB)
32 12:25:52.877842 progress 45 % (2 MB)
33 12:25:52.882042 progress 50 % (2 MB)
34 12:25:52.886527 progress 55 % (2 MB)
35 12:25:52.890987 progress 60 % (3 MB)
36 12:25:52.895118 progress 65 % (3 MB)
37 12:25:52.899599 progress 70 % (3 MB)
38 12:25:52.903650 progress 75 % (4 MB)
39 12:25:52.908124 progress 80 % (4 MB)
40 12:25:52.912084 progress 85 % (4 MB)
41 12:25:52.916484 progress 90 % (4 MB)
42 12:25:52.920790 progress 95 % (5 MB)
43 12:25:52.924334 progress 100 % (5 MB)
44 12:25:52.925072 5 MB downloaded in 0.13 s (42.54 MB/s)
45 12:25:52.925678 end: 1.1.1 http-download (duration 00:00:00) [common]
47 12:25:52.926662 end: 1.1 download-retry (duration 00:00:00) [common]
48 12:25:52.927022 start: 1.2 download-retry (timeout 00:10:00) [common]
49 12:25:52.927328 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 12:25:52.927817 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/kernel/Image
51 12:25:52.928121 saving as /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/kernel/Image
52 12:25:52.928367 total size: 45713920 (43 MB)
53 12:25:52.928591 No compression specified
54 12:25:52.970218 progress 0 % (0 MB)
55 12:25:53.003972 progress 5 % (2 MB)
56 12:25:53.037100 progress 10 % (4 MB)
57 12:25:53.069641 progress 15 % (6 MB)
58 12:25:53.101887 progress 20 % (8 MB)
59 12:25:53.133754 progress 25 % (10 MB)
60 12:25:53.165431 progress 30 % (13 MB)
61 12:25:53.195142 progress 35 % (15 MB)
62 12:25:53.226688 progress 40 % (17 MB)
63 12:25:53.259932 progress 45 % (19 MB)
64 12:25:53.294426 progress 50 % (21 MB)
65 12:25:53.324652 progress 55 % (24 MB)
66 12:25:53.355809 progress 60 % (26 MB)
67 12:25:53.385674 progress 65 % (28 MB)
68 12:25:53.415364 progress 70 % (30 MB)
69 12:25:53.445169 progress 75 % (32 MB)
70 12:25:53.475421 progress 80 % (34 MB)
71 12:25:53.505169 progress 85 % (37 MB)
72 12:25:53.535058 progress 90 % (39 MB)
73 12:25:53.564643 progress 95 % (41 MB)
74 12:25:53.594371 progress 100 % (43 MB)
75 12:25:53.594929 43 MB downloaded in 0.67 s (65.41 MB/s)
76 12:25:53.595398 end: 1.2.1 http-download (duration 00:00:01) [common]
78 12:25:53.596248 end: 1.2 download-retry (duration 00:00:01) [common]
79 12:25:53.596530 start: 1.3 download-retry (timeout 00:09:59) [common]
80 12:25:53.596800 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 12:25:53.597254 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 12:25:53.597529 saving as /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 12:25:53.597736 total size: 53209 (0 MB)
84 12:25:53.597944 No compression specified
85 12:25:53.631826 progress 61 % (0 MB)
86 12:25:53.632873 progress 100 % (0 MB)
87 12:25:53.633469 0 MB downloaded in 0.04 s (1.42 MB/s)
88 12:25:53.633966 end: 1.3.1 http-download (duration 00:00:00) [common]
90 12:25:53.634816 end: 1.3 download-retry (duration 00:00:00) [common]
91 12:25:53.635104 start: 1.4 download-retry (timeout 00:09:59) [common]
92 12:25:53.635375 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 12:25:53.635836 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 12:25:53.636123 saving as /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/nfsrootfs/full.rootfs.tar
95 12:25:53.636334 total size: 120894716 (115 MB)
96 12:25:53.636547 Using unxz to decompress xz
97 12:25:53.669002 progress 0 % (0 MB)
98 12:25:54.536768 progress 5 % (5 MB)
99 12:25:55.530445 progress 10 % (11 MB)
100 12:25:56.331832 progress 15 % (17 MB)
101 12:25:57.079100 progress 20 % (23 MB)
102 12:25:57.676927 progress 25 % (28 MB)
103 12:25:58.517526 progress 30 % (34 MB)
104 12:25:59.338613 progress 35 % (40 MB)
105 12:25:59.687006 progress 40 % (46 MB)
106 12:26:00.061041 progress 45 % (51 MB)
107 12:26:00.809260 progress 50 % (57 MB)
108 12:26:01.730452 progress 55 % (63 MB)
109 12:26:02.544456 progress 60 % (69 MB)
110 12:26:03.337322 progress 65 % (74 MB)
111 12:26:04.138476 progress 70 % (80 MB)
112 12:26:04.982972 progress 75 % (86 MB)
113 12:26:05.836015 progress 80 % (92 MB)
114 12:26:06.617271 progress 85 % (98 MB)
115 12:26:07.501549 progress 90 % (103 MB)
116 12:26:08.321076 progress 95 % (109 MB)
117 12:26:09.184827 progress 100 % (115 MB)
118 12:26:09.198788 115 MB downloaded in 15.56 s (7.41 MB/s)
119 12:26:09.199402 end: 1.4.1 http-download (duration 00:00:16) [common]
121 12:26:09.200518 end: 1.4 download-retry (duration 00:00:16) [common]
122 12:26:09.201090 start: 1.5 download-retry (timeout 00:09:44) [common]
123 12:26:09.201652 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 12:26:09.202634 downloading http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/modules.tar.xz
125 12:26:09.203147 saving as /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/modules/modules.tar
126 12:26:09.203586 total size: 11609636 (11 MB)
127 12:26:09.204093 Using unxz to decompress xz
128 12:26:09.249732 progress 0 % (0 MB)
129 12:26:09.321157 progress 5 % (0 MB)
130 12:26:09.400125 progress 10 % (1 MB)
131 12:26:09.490491 progress 15 % (1 MB)
132 12:26:09.583141 progress 20 % (2 MB)
133 12:26:09.666592 progress 25 % (2 MB)
134 12:26:09.745547 progress 30 % (3 MB)
135 12:26:09.830156 progress 35 % (3 MB)
136 12:26:09.906932 progress 40 % (4 MB)
137 12:26:09.989890 progress 45 % (5 MB)
138 12:26:10.073587 progress 50 % (5 MB)
139 12:26:10.152152 progress 55 % (6 MB)
140 12:26:10.237836 progress 60 % (6 MB)
141 12:26:10.313878 progress 65 % (7 MB)
142 12:26:10.394989 progress 70 % (7 MB)
143 12:26:10.469216 progress 75 % (8 MB)
144 12:26:10.547783 progress 80 % (8 MB)
145 12:26:10.635319 progress 85 % (9 MB)
146 12:26:10.715882 progress 90 % (9 MB)
147 12:26:10.797288 progress 95 % (10 MB)
148 12:26:10.877835 progress 100 % (11 MB)
149 12:26:10.889965 11 MB downloaded in 1.69 s (6.57 MB/s)
150 12:26:10.890688 end: 1.5.1 http-download (duration 00:00:02) [common]
152 12:26:10.892601 end: 1.5 download-retry (duration 00:00:02) [common]
153 12:26:10.893200 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 12:26:10.893790 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 12:26:29.866120 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/826910/extract-nfsrootfs-0pcf26p4
156 12:26:29.866723 end: 1.6.1 extract-nfsrootfs (duration 00:00:19) [common]
157 12:26:29.867043 start: 1.6.2 lava-overlay (timeout 00:09:23) [common]
158 12:26:29.867813 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec
159 12:26:29.868425 makedir: /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin
160 12:26:29.868861 makedir: /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/tests
161 12:26:29.869267 makedir: /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/results
162 12:26:29.869637 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-add-keys
163 12:26:29.870212 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-add-sources
164 12:26:29.870782 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-background-process-start
165 12:26:29.871371 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-background-process-stop
166 12:26:29.871959 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-common-functions
167 12:26:29.872526 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-echo-ipv4
168 12:26:29.873033 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-install-packages
169 12:26:29.873547 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-installed-packages
170 12:26:29.874039 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-os-build
171 12:26:29.874534 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-probe-channel
172 12:26:29.875113 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-probe-ip
173 12:26:29.875618 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-target-ip
174 12:26:29.876177 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-target-mac
175 12:26:29.876692 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-target-storage
176 12:26:29.877191 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-case
177 12:26:29.877742 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-event
178 12:26:29.878242 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-feedback
179 12:26:29.878729 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-raise
180 12:26:29.879221 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-reference
181 12:26:29.879732 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-runner
182 12:26:29.880247 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-set
183 12:26:29.880725 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-test-shell
184 12:26:29.881209 Updating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-add-keys (debian)
185 12:26:29.881741 Updating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-add-sources (debian)
186 12:26:29.882246 Updating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-install-packages (debian)
187 12:26:29.882782 Updating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-installed-packages (debian)
188 12:26:29.883302 Updating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/bin/lava-os-build (debian)
189 12:26:29.883799 Creating /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/environment
190 12:26:29.884236 LAVA metadata
191 12:26:29.884504 - LAVA_JOB_ID=826910
192 12:26:29.884719 - LAVA_DISPATCHER_IP=192.168.6.2
193 12:26:29.885093 start: 1.6.2.1 ssh-authorize (timeout 00:09:23) [common]
194 12:26:29.886091 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 12:26:29.886415 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:23) [common]
196 12:26:29.886624 skipped lava-vland-overlay
197 12:26:29.886863 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 12:26:29.887115 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:23) [common]
199 12:26:29.887331 skipped lava-multinode-overlay
200 12:26:29.887572 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 12:26:29.887823 start: 1.6.2.4 test-definition (timeout 00:09:23) [common]
202 12:26:29.888097 Loading test definitions
203 12:26:29.888380 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:23) [common]
204 12:26:29.888602 Using /lava-826910 at stage 0
205 12:26:29.889681 uuid=826910_1.6.2.4.1 testdef=None
206 12:26:29.889987 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 12:26:29.890251 start: 1.6.2.4.2 test-overlay (timeout 00:09:23) [common]
208 12:26:29.891814 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 12:26:29.892627 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:23) [common]
211 12:26:29.894637 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 12:26:29.895469 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:23) [common]
214 12:26:29.897433 runner path: /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/0/tests/0_timesync-off test_uuid 826910_1.6.2.4.1
215 12:26:29.898006 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 12:26:29.898827 start: 1.6.2.4.5 git-repo-action (timeout 00:09:23) [common]
218 12:26:29.899054 Using /lava-826910 at stage 0
219 12:26:29.899414 Fetching tests from https://github.com/kernelci/test-definitions.git
220 12:26:29.899710 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/0/tests/1_kselftest-dt'
221 12:26:33.783216 Running '/usr/bin/git checkout kernelci.org
222 12:26:34.238780 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 12:26:34.240304 uuid=826910_1.6.2.4.5 testdef=None
224 12:26:34.240702 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 12:26:34.241500 start: 1.6.2.4.6 test-overlay (timeout 00:09:19) [common]
227 12:26:34.244564 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 12:26:34.245453 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:19) [common]
230 12:26:34.249431 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 12:26:34.250372 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:19) [common]
233 12:26:34.254218 runner path: /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/0/tests/1_kselftest-dt test_uuid 826910_1.6.2.4.5
234 12:26:34.254551 BOARD='meson-sm1-s905d3-libretech-cc'
235 12:26:34.254778 BRANCH='lee-mfd'
236 12:26:34.254985 SKIPFILE='/dev/null'
237 12:26:34.255204 SKIP_INSTALL='True'
238 12:26:34.255412 TESTPROG_URL='http://storage.kernelci.org/lee-mfd/for-mfd-next/v6.12-rc1-7-g556be13a9b36/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 12:26:34.255620 TST_CASENAME=''
240 12:26:34.255822 TST_CMDFILES='dt'
241 12:26:34.256498 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 12:26:34.257334 Creating lava-test-runner.conf files
244 12:26:34.257554 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/826910/lava-overlay-lwreqdec/lava-826910/0 for stage 0
245 12:26:34.257948 - 0_timesync-off
246 12:26:34.258212 - 1_kselftest-dt
247 12:26:34.258579 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 12:26:34.258884 start: 1.6.2.5 compress-overlay (timeout 00:09:19) [common]
249 12:26:58.320718 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 12:26:58.321176 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:54) [common]
251 12:26:58.321480 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 12:26:58.321798 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 12:26:58.322102 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:54) [common]
254 12:26:59.158874 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 12:26:59.159349 start: 1.6.4 extract-modules (timeout 00:08:54) [common]
256 12:26:59.159609 extracting modules file /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/modules/modules.tar to /var/lib/lava/dispatcher/tmp/826910/extract-nfsrootfs-0pcf26p4
257 12:27:00.583758 extracting modules file /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/modules/modules.tar to /var/lib/lava/dispatcher/tmp/826910/extract-overlay-ramdisk-hkbzntq8/ramdisk
258 12:27:02.057258 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 12:27:02.057741 start: 1.6.5 apply-overlay-tftp (timeout 00:08:51) [common]
260 12:27:02.058037 [common] Applying overlay to NFS
261 12:27:02.058265 [common] Applying overlay /var/lib/lava/dispatcher/tmp/826910/compress-overlay-lc7p10k_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/826910/extract-nfsrootfs-0pcf26p4
262 12:27:04.803588 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 12:27:04.804120 start: 1.6.6 prepare-kernel (timeout 00:08:48) [common]
264 12:27:04.804410 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:48) [common]
265 12:27:04.804645 Converting downloaded kernel to a uImage
266 12:27:04.804963 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/kernel/Image /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/kernel/uImage
267 12:27:05.297643 output: Image Name:
268 12:27:05.298074 output: Created: Wed Oct 9 12:27:04 2024
269 12:27:05.298285 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 12:27:05.298490 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 12:27:05.298692 output: Load Address: 01080000
272 12:27:05.298891 output: Entry Point: 01080000
273 12:27:05.299089 output:
274 12:27:05.299425 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 12:27:05.299695 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 12:27:05.299965 start: 1.6.7 configure-preseed-file (timeout 00:08:47) [common]
277 12:27:05.300270 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 12:27:05.300533 start: 1.6.8 compress-ramdisk (timeout 00:08:47) [common]
279 12:27:05.300803 Building ramdisk /var/lib/lava/dispatcher/tmp/826910/extract-overlay-ramdisk-hkbzntq8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/826910/extract-overlay-ramdisk-hkbzntq8/ramdisk
280 12:27:07.537555 >> 166772 blocks
281 12:27:15.270782 Adding RAMdisk u-boot header.
282 12:27:15.271582 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/826910/extract-overlay-ramdisk-hkbzntq8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/826910/extract-overlay-ramdisk-hkbzntq8/ramdisk.cpio.gz.uboot
283 12:27:15.520550 output: Image Name:
284 12:27:15.520940 output: Created: Wed Oct 9 12:27:15 2024
285 12:27:15.521152 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 12:27:15.521356 output: Data Size: 23425269 Bytes = 22876.24 KiB = 22.34 MiB
287 12:27:15.521556 output: Load Address: 00000000
288 12:27:15.521755 output: Entry Point: 00000000
289 12:27:15.521955 output:
290 12:27:15.522613 rename /var/lib/lava/dispatcher/tmp/826910/extract-overlay-ramdisk-hkbzntq8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot
291 12:27:15.523034 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 12:27:15.523323 end: 1.6 prepare-tftp-overlay (duration 00:01:05) [common]
293 12:27:15.523621 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:37) [common]
294 12:27:15.523857 No LXC device requested
295 12:27:15.524330 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 12:27:15.524846 start: 1.8 deploy-device-env (timeout 00:08:37) [common]
297 12:27:15.525361 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 12:27:15.525771 Checking files for TFTP limit of 4294967296 bytes.
299 12:27:15.528523 end: 1 tftp-deploy (duration 00:01:23) [common]
300 12:27:15.529101 start: 2 uboot-action (timeout 00:05:00) [common]
301 12:27:15.529625 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 12:27:15.530119 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 12:27:15.530618 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 12:27:15.531142 Using kernel file from prepare-kernel: 826910/tftp-deploy-fsylj05w/kernel/uImage
305 12:27:15.531765 substitutions:
306 12:27:15.532204 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 12:27:15.532608 - {DTB_ADDR}: 0x01070000
308 12:27:15.533007 - {DTB}: 826910/tftp-deploy-fsylj05w/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 12:27:15.533405 - {INITRD}: 826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot
310 12:27:15.533799 - {KERNEL_ADDR}: 0x01080000
311 12:27:15.534189 - {KERNEL}: 826910/tftp-deploy-fsylj05w/kernel/uImage
312 12:27:15.534580 - {LAVA_MAC}: None
313 12:27:15.535008 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/826910/extract-nfsrootfs-0pcf26p4
314 12:27:15.535403 - {NFS_SERVER_IP}: 192.168.6.2
315 12:27:15.535789 - {PRESEED_CONFIG}: None
316 12:27:15.536205 - {PRESEED_LOCAL}: None
317 12:27:15.536596 - {RAMDISK_ADDR}: 0x08000000
318 12:27:15.536981 - {RAMDISK}: 826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot
319 12:27:15.537368 - {ROOT_PART}: None
320 12:27:15.537753 - {ROOT}: None
321 12:27:15.538139 - {SERVER_IP}: 192.168.6.2
322 12:27:15.538524 - {TEE_ADDR}: 0x83000000
323 12:27:15.538912 - {TEE}: None
324 12:27:15.539296 Parsed boot commands:
325 12:27:15.539669 - setenv autoload no
326 12:27:15.540093 - setenv initrd_high 0xffffffff
327 12:27:15.540484 - setenv fdt_high 0xffffffff
328 12:27:15.540868 - dhcp
329 12:27:15.541249 - setenv serverip 192.168.6.2
330 12:27:15.541638 - tftpboot 0x01080000 826910/tftp-deploy-fsylj05w/kernel/uImage
331 12:27:15.542028 - tftpboot 0x08000000 826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot
332 12:27:15.542416 - tftpboot 0x01070000 826910/tftp-deploy-fsylj05w/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 12:27:15.542804 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/826910/extract-nfsrootfs-0pcf26p4,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 12:27:15.543201 - bootm 0x01080000 0x08000000 0x01070000
335 12:27:15.543693 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 12:27:15.545199 start: 2.3 connect-device (timeout 00:05:00) [common]
338 12:27:15.545616 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 12:27:15.559903 Setting prompt string to ['lava-test: # ']
340 12:27:15.561447 end: 2.3 connect-device (duration 00:00:00) [common]
341 12:27:15.562047 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 12:27:15.562606 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 12:27:15.563303 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 12:27:15.564490 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 12:27:15.607226 >> OK - accepted request
346 12:27:15.609414 Returned 0 in 0 seconds
347 12:27:15.710448 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 12:27:15.712051 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 12:27:15.712613 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 12:27:15.713123 Setting prompt string to ['Hit any key to stop autoboot']
352 12:27:15.713561 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 12:27:15.715088 Trying 192.168.56.21...
354 12:27:15.715542 Connected to conserv1.
355 12:27:15.715942 Escape character is '^]'.
356 12:27:15.716395
357 12:27:15.716813 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 12:27:15.717236
359 12:27:22.968042 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 12:27:22.968679 bl2_stage_init 0x01
361 12:27:22.969131 bl2_stage_init 0x81
362 12:27:22.973579 hw id: 0x0000 - pwm id 0x01
363 12:27:22.974047 bl2_stage_init 0xc1
364 12:27:22.979107 bl2_stage_init 0x02
365 12:27:22.979566
366 12:27:22.980029 L0:00000000
367 12:27:22.980456 L1:00000703
368 12:27:22.980872 L2:00008067
369 12:27:22.981280 L3:15000000
370 12:27:22.984679 S1:00000000
371 12:27:22.985142 B2:20282000
372 12:27:22.985563 B1:a0f83180
373 12:27:22.985966
374 12:27:22.986365 TE: 69106
375 12:27:22.986769
376 12:27:22.990736 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 12:27:22.991174
378 12:27:22.995914 Board ID = 1
379 12:27:22.996368 Set cpu clk to 24M
380 12:27:22.996776 Set clk81 to 24M
381 12:27:23.001535 Use GP1_pll as DSU clk.
382 12:27:23.001965 DSU clk: 1200 Mhz
383 12:27:23.002367 CPU clk: 1200 MHz
384 12:27:23.007030 Set clk81 to 166.6M
385 12:27:23.012716 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 12:27:23.013151 board id: 1
387 12:27:23.019931 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 12:27:23.030825 fw parse done
389 12:27:23.036830 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 12:27:23.079808 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 12:27:23.090992 PIEI prepare done
392 12:27:23.091424 fastboot data load
393 12:27:23.091833 fastboot data verify
394 12:27:23.096566 verify result: 266
395 12:27:23.102165 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 12:27:23.102596 LPDDR4 probe
397 12:27:23.102996 ddr clk to 1584MHz
398 12:27:23.110158 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 12:27:23.149209
400 12:27:23.149654 dmc_version 0001
401 12:27:23.154953 Check phy result
402 12:27:23.160896 INFO : End of CA training
403 12:27:23.161324 INFO : End of initialization
404 12:27:23.166569 INFO : Training has run successfully!
405 12:27:23.167000 Check phy result
406 12:27:23.172102 INFO : End of initialization
407 12:27:23.172533 INFO : End of read enable training
408 12:27:23.177715 INFO : End of fine write leveling
409 12:27:23.183321 INFO : End of Write leveling coarse delay
410 12:27:23.183752 INFO : Training has run successfully!
411 12:27:23.184205 Check phy result
412 12:27:23.188913 INFO : End of initialization
413 12:27:23.189340 INFO : End of read dq deskew training
414 12:27:23.194606 INFO : End of MPR read delay center optimization
415 12:27:23.200134 INFO : End of write delay center optimization
416 12:27:23.205703 INFO : End of read delay center optimization
417 12:27:23.206140 INFO : End of max read latency training
418 12:27:23.211294 INFO : Training has run successfully!
419 12:27:23.211720 1D training succeed
420 12:27:23.220492 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 12:27:23.268865 Check phy result
422 12:27:23.269223 INFO : End of initialization
423 12:27:23.296232 INFO : End of 2D read delay Voltage center optimization
424 12:27:23.320417 INFO : End of 2D read delay Voltage center optimization
425 12:27:23.377131 INFO : End of 2D write delay Voltage center optimization
426 12:27:23.431022 INFO : End of 2D write delay Voltage center optimization
427 12:27:23.436621 INFO : Training has run successfully!
428 12:27:23.437136
429 12:27:23.437572 channel==0
430 12:27:23.442276 RxClkDly_Margin_A0==78 ps 8
431 12:27:23.442774 TxDqDly_Margin_A0==98 ps 10
432 12:27:23.445563 RxClkDly_Margin_A1==88 ps 9
433 12:27:23.446056 TxDqDly_Margin_A1==98 ps 10
434 12:27:23.451142 TrainedVREFDQ_A0==74
435 12:27:23.451645 TrainedVREFDQ_A1==74
436 12:27:23.456888 VrefDac_Margin_A0==23
437 12:27:23.457417 DeviceVref_Margin_A0==40
438 12:27:23.457845 VrefDac_Margin_A1==23
439 12:27:23.462354 DeviceVref_Margin_A1==40
440 12:27:23.462844
441 12:27:23.463270
442 12:27:23.463684 channel==1
443 12:27:23.464128 RxClkDly_Margin_A0==78 ps 8
444 12:27:23.465841 TxDqDly_Margin_A0==88 ps 9
445 12:27:23.471349 RxClkDly_Margin_A1==78 ps 8
446 12:27:23.471849 TxDqDly_Margin_A1==88 ps 9
447 12:27:23.472320 TrainedVREFDQ_A0==75
448 12:27:23.476928 TrainedVREFDQ_A1==75
449 12:27:23.477427 VrefDac_Margin_A0==22
450 12:27:23.482518 DeviceVref_Margin_A0==39
451 12:27:23.483027 VrefDac_Margin_A1==22
452 12:27:23.483448 DeviceVref_Margin_A1==39
453 12:27:23.483858
454 12:27:23.488203 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 12:27:23.488709
456 12:27:23.521591 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 12:27:23.522174 2D training succeed
458 12:27:23.527220 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 12:27:23.532822 auto size-- 65535DDR cs0 size: 2048MB
460 12:27:23.533324 DDR cs1 size: 2048MB
461 12:27:23.538392 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 12:27:23.538890 cs0 DataBus test pass
463 12:27:23.539305 cs1 DataBus test pass
464 12:27:23.543967 cs0 AddrBus test pass
465 12:27:23.544494 cs1 AddrBus test pass
466 12:27:23.544910
467 12:27:23.549660 100bdlr_step_size ps== 464
468 12:27:23.550169 result report
469 12:27:23.550590 boot times 0Enable ddr reg access
470 12:27:23.559297 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 12:27:23.573238 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 12:27:24.232362 bl2z: ptr: 05129330, size: 00001e40
473 12:27:24.240275 0.0;M3 CHK:0;cm4_sp_mode 0
474 12:27:24.240794 MVN_1=0x00000000
475 12:27:24.241222 MVN_2=0x00000000
476 12:27:24.251737 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 12:27:24.252290 OPS=0x04
478 12:27:24.252723 ring efuse init
479 12:27:24.254668 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 12:27:24.260419 [0.017354 Inits done]
481 12:27:24.260948 secure task start!
482 12:27:24.261374 high task start!
483 12:27:24.261785 low task start!
484 12:27:24.264699 run into bl31
485 12:27:24.273295 NOTICE: BL31: v1.3(release):4fc40b1
486 12:27:24.281140 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 12:27:24.281647 NOTICE: BL31: G12A normal boot!
488 12:27:24.296699 NOTICE: BL31: BL33 decompress pass
489 12:27:24.302370 ERROR: Error initializing runtime service opteed_fast
490 12:27:27.019189 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 12:27:27.019781 bl2_stage_init 0x01
492 12:27:27.020281 bl2_stage_init 0x81
493 12:27:27.024730 hw id: 0x0000 - pwm id 0x01
494 12:27:27.025272 bl2_stage_init 0xc1
495 12:27:27.029523 bl2_stage_init 0x02
496 12:27:27.030046
497 12:27:27.030443 L0:00000000
498 12:27:27.030834 L1:00000703
499 12:27:27.031221 L2:00008067
500 12:27:27.035175 L3:15000000
501 12:27:27.035659 S1:00000000
502 12:27:27.036085 B2:20282000
503 12:27:27.036473 B1:a0f83180
504 12:27:27.036854
505 12:27:27.037238 TE: 69604
506 12:27:27.037618
507 12:27:27.046244 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 12:27:27.046741
509 12:27:27.047137 Board ID = 1
510 12:27:27.047529 Set cpu clk to 24M
511 12:27:27.047913 Set clk81 to 24M
512 12:27:27.051840 Use GP1_pll as DSU clk.
513 12:27:27.052342 DSU clk: 1200 Mhz
514 12:27:27.052738 CPU clk: 1200 MHz
515 12:27:27.057427 Set clk81 to 166.6M
516 12:27:27.063132 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 12:27:27.063602 board id: 1
518 12:27:27.071148 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 12:27:27.081717 fw parse done
520 12:27:27.086794 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 12:27:27.130291 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 12:27:27.141311 PIEI prepare done
523 12:27:27.141789 fastboot data load
524 12:27:27.142186 fastboot data verify
525 12:27:27.146864 verify result: 266
526 12:27:27.152454 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 12:27:27.152928 LPDDR4 probe
528 12:27:27.153320 ddr clk to 1584MHz
529 12:27:27.160496 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 12:27:27.197704
531 12:27:27.198184 dmc_version 0001
532 12:27:27.204392 Check phy result
533 12:27:27.210395 INFO : End of CA training
534 12:27:27.210931 INFO : End of initialization
535 12:27:27.215951 INFO : Training has run successfully!
536 12:27:27.216483 Check phy result
537 12:27:27.221555 INFO : End of initialization
538 12:27:27.222049 INFO : End of read enable training
539 12:27:27.227171 INFO : End of fine write leveling
540 12:27:27.232733 INFO : End of Write leveling coarse delay
541 12:27:27.233219 INFO : Training has run successfully!
542 12:27:27.233637 Check phy result
543 12:27:27.238367 INFO : End of initialization
544 12:27:27.238856 INFO : End of read dq deskew training
545 12:27:27.243927 INFO : End of MPR read delay center optimization
546 12:27:27.249544 INFO : End of write delay center optimization
547 12:27:27.255159 INFO : End of read delay center optimization
548 12:27:27.255644 INFO : End of max read latency training
549 12:27:27.260730 INFO : Training has run successfully!
550 12:27:27.261219 1D training succeed
551 12:27:27.269890 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 12:27:27.317495 Check phy result
553 12:27:27.317996 INFO : End of initialization
554 12:27:27.339895 INFO : End of 2D read delay Voltage center optimization
555 12:27:27.359011 INFO : End of 2D read delay Voltage center optimization
556 12:27:27.410892 INFO : End of 2D write delay Voltage center optimization
557 12:27:27.460089 INFO : End of 2D write delay Voltage center optimization
558 12:27:27.465666 INFO : Training has run successfully!
559 12:27:27.466154
560 12:27:27.466575 channel==0
561 12:27:27.471330 RxClkDly_Margin_A0==78 ps 8
562 12:27:27.471813 TxDqDly_Margin_A0==98 ps 10
563 12:27:27.476884 RxClkDly_Margin_A1==88 ps 9
564 12:27:27.477372 TxDqDly_Margin_A1==88 ps 9
565 12:27:27.477794 TrainedVREFDQ_A0==74
566 12:27:27.484319 TrainedVREFDQ_A1==74
567 12:27:27.485296 VrefDac_Margin_A0==24
568 12:27:27.485515 DeviceVref_Margin_A0==40
569 12:27:27.487934 VrefDac_Margin_A1==23
570 12:27:27.488369 DeviceVref_Margin_A1==40
571 12:27:27.488704
572 12:27:27.489025
573 12:27:27.489261 channel==1
574 12:27:27.493648 RxClkDly_Margin_A0==78 ps 8
575 12:27:27.494252 TxDqDly_Margin_A0==88 ps 9
576 12:27:27.499297 RxClkDly_Margin_A1==88 ps 9
577 12:27:27.500684 TxDqDly_Margin_A1==88 ps 9
578 12:27:27.504857 TrainedVREFDQ_A0==75
579 12:27:27.506013 TrainedVREFDQ_A1==75
580 12:27:27.507199 VrefDac_Margin_A0==22
581 12:27:27.510427 DeviceVref_Margin_A0==39
582 12:27:27.511400 VrefDac_Margin_A1==22
583 12:27:27.512629 DeviceVref_Margin_A1==39
584 12:27:27.516081
585 12:27:27.516509 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 12:27:27.516721
587 12:27:27.549499 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
588 12:27:27.550361 2D training succeed
589 12:27:27.555263 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 12:27:27.560888 auto size-- 65535DDR cs0 size: 2048MB
591 12:27:27.561218 DDR cs1 size: 2048MB
592 12:27:27.566498 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 12:27:27.566834 cs0 DataBus test pass
594 12:27:27.572091 cs1 DataBus test pass
595 12:27:27.572728 cs0 AddrBus test pass
596 12:27:27.573228 cs1 AddrBus test pass
597 12:27:27.573701
598 12:27:27.577476 100bdlr_step_size ps== 478
599 12:27:27.578011 result report
600 12:27:27.583155 boot times 0Enable ddr reg access
601 12:27:27.588439 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 12:27:27.601976 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 12:27:28.256625 bl2z: ptr: 05129330, size: 00001e40
604 12:27:28.264239 0.0;M3 CHK:0;cm4_sp_mode 0
605 12:27:28.264779 MVN_1=0x00000000
606 12:27:28.265249 MVN_2=0x00000000
607 12:27:28.275800 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 12:27:28.276371 OPS=0x04
609 12:27:28.276861 ring efuse init
610 12:27:28.281427 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 12:27:28.281947 [0.017310 Inits done]
612 12:27:28.282407 secure task start!
613 12:27:28.289250 high task start!
614 12:27:28.289774 low task start!
615 12:27:28.290238 run into bl31
616 12:27:28.297785 NOTICE: BL31: v1.3(release):4fc40b1
617 12:27:28.305624 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 12:27:28.306130 NOTICE: BL31: G12A normal boot!
619 12:27:28.321035 NOTICE: BL31: BL33 decompress pass
620 12:27:28.326730 ERROR: Error initializing runtime service opteed_fast
621 12:27:29.721666 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 12:27:29.722287 bl2_stage_init 0x01
623 12:27:29.722761 bl2_stage_init 0x81
624 12:27:29.727218 hw id: 0x0000 - pwm id 0x01
625 12:27:29.727734 bl2_stage_init 0xc1
626 12:27:29.728248 bl2_stage_init 0x02
627 12:27:29.728708
628 12:27:29.732751 L0:00000000
629 12:27:29.733243 L1:00000703
630 12:27:29.733695 L2:00008067
631 12:27:29.734137 L3:15000000
632 12:27:29.734576 S1:00000000
633 12:27:29.738471 B2:20282000
634 12:27:29.738974 B1:a0f83180
635 12:27:29.739429
636 12:27:29.739876 TE: 71715
637 12:27:29.740364
638 12:27:29.744075 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 12:27:29.744579
640 12:27:29.749626 Board ID = 1
641 12:27:29.750117 Set cpu clk to 24M
642 12:27:29.750564 Set clk81 to 24M
643 12:27:29.755261 Use GP1_pll as DSU clk.
644 12:27:29.755745 DSU clk: 1200 Mhz
645 12:27:29.756239 CPU clk: 1200 MHz
646 12:27:29.756688 Set clk81 to 166.6M
647 12:27:29.766466 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 12:27:29.766967 board id: 1
649 12:27:29.772046 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 12:27:29.783820 fw parse done
651 12:27:29.789854 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 12:27:29.832987 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 12:27:29.842940 PIEI prepare done
654 12:27:29.843437 fastboot data load
655 12:27:29.843891 fastboot data verify
656 12:27:29.848570 verify result: 266
657 12:27:29.854140 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 12:27:29.854631 LPDDR4 probe
659 12:27:29.855079 ddr clk to 1584MHz
660 12:27:29.862112 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 12:27:29.899405
662 12:27:29.899911 dmc_version 0001
663 12:27:29.906035 Check phy result
664 12:27:29.911956 INFO : End of CA training
665 12:27:29.912476 INFO : End of initialization
666 12:27:29.917584 INFO : Training has run successfully!
667 12:27:29.918079 Check phy result
668 12:27:29.923165 INFO : End of initialization
669 12:27:29.923655 INFO : End of read enable training
670 12:27:29.928745 INFO : End of fine write leveling
671 12:27:29.934376 INFO : End of Write leveling coarse delay
672 12:27:29.934868 INFO : Training has run successfully!
673 12:27:29.935321 Check phy result
674 12:27:29.939936 INFO : End of initialization
675 12:27:29.940463 INFO : End of read dq deskew training
676 12:27:29.945572 INFO : End of MPR read delay center optimization
677 12:27:29.951161 INFO : End of write delay center optimization
678 12:27:29.956760 INFO : End of read delay center optimization
679 12:27:29.957252 INFO : End of max read latency training
680 12:27:29.962364 INFO : Training has run successfully!
681 12:27:29.962857 1D training succeed
682 12:27:29.971617 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 12:27:30.019201 Check phy result
684 12:27:30.019730 INFO : End of initialization
685 12:27:30.041424 INFO : End of 2D read delay Voltage center optimization
686 12:27:30.060631 INFO : End of 2D read delay Voltage center optimization
687 12:27:30.112653 INFO : End of 2D write delay Voltage center optimization
688 12:27:30.161764 INFO : End of 2D write delay Voltage center optimization
689 12:27:30.167336 INFO : Training has run successfully!
690 12:27:30.167882
691 12:27:30.168367 channel==0
692 12:27:30.172988 RxClkDly_Margin_A0==78 ps 8
693 12:27:30.173496 TxDqDly_Margin_A0==98 ps 10
694 12:27:30.178573 RxClkDly_Margin_A1==88 ps 9
695 12:27:30.179076 TxDqDly_Margin_A1==98 ps 10
696 12:27:30.179502 TrainedVREFDQ_A0==74
697 12:27:30.184245 TrainedVREFDQ_A1==74
698 12:27:30.184771 VrefDac_Margin_A0==24
699 12:27:30.185190 DeviceVref_Margin_A0==40
700 12:27:30.189775 VrefDac_Margin_A1==23
701 12:27:30.190277 DeviceVref_Margin_A1==40
702 12:27:30.190694
703 12:27:30.191103
704 12:27:30.195370 channel==1
705 12:27:30.195866 RxClkDly_Margin_A0==78 ps 8
706 12:27:30.196319 TxDqDly_Margin_A0==88 ps 9
707 12:27:30.200954 RxClkDly_Margin_A1==78 ps 8
708 12:27:30.201461 TxDqDly_Margin_A1==88 ps 9
709 12:27:30.206596 TrainedVREFDQ_A0==75
710 12:27:30.207113 TrainedVREFDQ_A1==75
711 12:27:30.207539 VrefDac_Margin_A0==22
712 12:27:30.212207 DeviceVref_Margin_A0==38
713 12:27:30.212718 VrefDac_Margin_A1==22
714 12:27:30.217824 DeviceVref_Margin_A1==39
715 12:27:30.218415
716 12:27:30.218894 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 12:27:30.219326
718 12:27:30.251315 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
719 12:27:30.251900 2D training succeed
720 12:27:30.256999 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 12:27:30.262568 auto size-- 65535DDR cs0 size: 2048MB
722 12:27:30.263119 DDR cs1 size: 2048MB
723 12:27:30.268208 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 12:27:30.268741 cs0 DataBus test pass
725 12:27:30.273833 cs1 DataBus test pass
726 12:27:30.274383 cs0 AddrBus test pass
727 12:27:30.274811 cs1 AddrBus test pass
728 12:27:30.275226
729 12:27:30.279385 100bdlr_step_size ps== 478
730 12:27:30.279916 result report
731 12:27:30.285043 boot times 0Enable ddr reg access
732 12:27:30.290177 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 12:27:30.303950 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 12:27:30.959146 bl2z: ptr: 05129330, size: 00001e40
735 12:27:30.967180 0.0;M3 CHK:0;cm4_sp_mode 0
736 12:27:30.967520 MVN_1=0x00000000
737 12:27:30.967735 MVN_2=0x00000000
738 12:27:30.978637 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 12:27:30.978973 OPS=0x04
740 12:27:30.979219 ring efuse init
741 12:27:30.981678 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 12:27:30.987707 [0.017319 Inits done]
743 12:27:30.988252 secure task start!
744 12:27:30.988710 high task start!
745 12:27:30.989107 low task start!
746 12:27:30.991993 run into bl31
747 12:27:31.000629 NOTICE: BL31: v1.3(release):4fc40b1
748 12:27:31.008527 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 12:27:31.009043 NOTICE: BL31: G12A normal boot!
750 12:27:31.024098 NOTICE: BL31: BL33 decompress pass
751 12:27:31.029803 ERROR: Error initializing runtime service opteed_fast
752 12:27:31.825162
753 12:27:31.825562
754 12:27:31.830603 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 12:27:31.831122
756 12:27:31.834098 Model: Libre Computer AML-S905D3-CC Solitude
757 12:27:31.981475 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 12:27:31.996487 DRAM: 2 GiB (effective 3.8 GiB)
759 12:27:32.097433 Core: 406 devices, 33 uclasses, devicetree: separate
760 12:27:32.103377 WDT: Not starting watchdog@f0d0
761 12:27:32.128370 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 12:27:32.140533 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 12:27:32.145540 ** Bad device specification mmc 0 **
764 12:27:32.155537 Card did not respond to voltage select! : -110
765 12:27:32.163226 ** Bad device specification mmc 0 **
766 12:27:32.163525 Couldn't find partition mmc 0
767 12:27:32.171620 Card did not respond to voltage select! : -110
768 12:27:32.177093 ** Bad device specification mmc 0 **
769 12:27:32.177394 Couldn't find partition mmc 0
770 12:27:32.181172 Error: could not access storage.
771 12:27:32.478550 Net: eth0: ethernet@ff3f0000
772 12:27:32.478950 starting USB...
773 12:27:32.723597 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 12:27:32.724031 Starting the controller
775 12:27:32.730369 USB XHCI 1.10
776 12:27:34.284335 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 12:27:34.292723 scanning usb for storage devices... 0 Storage Device(s) found
779 12:27:34.344243 Hit any key to stop autoboot: 1
780 12:27:34.345401 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 12:27:34.346025 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 12:27:34.346512 Setting prompt string to ['=>']
783 12:27:34.346997 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 12:27:34.358777 0
785 12:27:34.359675 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 12:27:34.460938 => setenv autoload no
788 12:27:34.461870 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 12:27:34.466745 setenv autoload no
791 12:27:34.568230 => setenv initrd_high 0xffffffff
792 12:27:34.569234 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 12:27:34.573477 setenv initrd_high 0xffffffff
795 12:27:34.675013 => setenv fdt_high 0xffffffff
796 12:27:34.676064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 12:27:34.680211 setenv fdt_high 0xffffffff
799 12:27:34.781728 => dhcp
800 12:27:34.782636 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 12:27:34.786506 dhcp
802 12:27:35.292127 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 12:27:35.292762 Speed: 1000, full duplex
804 12:27:35.292979 BOOTP broadcast 1
805 12:27:35.539502 BOOTP broadcast 2
806 12:27:36.041017 BOOTP broadcast 3
807 12:27:37.042183 BOOTP broadcast 4
808 12:27:39.043149 BOOTP broadcast 5
809 12:27:39.054595 DHCP client bound to address 192.168.6.12 (3762 ms)
811 12:27:39.156240 => setenv serverip 192.168.6.2
812 12:27:39.156993 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
813 12:27:39.161470 setenv serverip 192.168.6.2
815 12:27:39.262879 => tftpboot 0x01080000 826910/tftp-deploy-fsylj05w/kernel/uImage
816 12:27:39.263561 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
817 12:27:39.270366 tftpboot 0x01080000 826910/tftp-deploy-fsylj05w/kernel/uImage
818 12:27:39.270822 Speed: 1000, full duplex
819 12:27:39.271237 Using ethernet@ff3f0000 device
820 12:27:39.275627 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
821 12:27:39.281167 Filename '826910/tftp-deploy-fsylj05w/kernel/uImage'.
822 12:27:39.285039 Load address: 0x1080000
823 12:27:43.257045 Loading: *################################################## 43.6 MiB
824 12:27:43.257679 11 MiB/s
825 12:27:43.258107 done
826 12:27:43.261374 Bytes transferred = 45713984 (2b98a40 hex)
828 12:27:43.362854 => tftpboot 0x08000000 826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot
829 12:27:43.363744 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
830 12:27:43.370453 tftpboot 0x08000000 826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot
831 12:27:43.370938 Speed: 1000, full duplex
832 12:27:43.371357 Using ethernet@ff3f0000 device
833 12:27:43.375945 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
834 12:27:43.385687 Filename '826910/tftp-deploy-fsylj05w/ramdisk/ramdisk.cpio.gz.uboot'.
835 12:27:43.386176 Load address: 0x8000000
836 12:27:45.304840 Loading: *################################################# UDP wrong checksum 00000005 00003870
837 12:27:50.304215 T UDP wrong checksum 00000005 00003870
838 12:28:00.306231 T T UDP wrong checksum 00000005 00003870
839 12:28:05.101250 UDP wrong checksum 000000ff 000007c8
840 12:28:05.121330 UDP wrong checksum 000000ff 0000a4ba
841 12:28:20.310828 T T T T UDP wrong checksum 00000005 00003870
842 12:28:26.012178 T UDP wrong checksum 000000ff 0000120d
843 12:28:26.022087 UDP wrong checksum 000000ff 0000f8ed
844 12:28:26.041860 UDP wrong checksum 000000ff 00006a93
845 12:28:26.052136 UDP wrong checksum 000000ff 00005176
846 12:28:40.314995 T T
847 12:28:40.315590 Retry count exceeded; starting again
849 12:28:40.317144 end: 2.4.3 bootloader-commands (duration 00:01:06) [common]
852 12:28:40.318964 end: 2.4 uboot-commands (duration 00:01:25) [common]
854 12:28:40.320430 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
856 12:28:40.321466 end: 2 uboot-action (duration 00:01:25) [common]
858 12:28:40.323191 Cleaning after the job
859 12:28:40.323761 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/ramdisk
860 12:28:40.325179 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/kernel
861 12:28:40.371249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/dtb
862 12:28:40.372213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/nfsrootfs
863 12:28:40.427083 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/826910/tftp-deploy-fsylj05w/modules
864 12:28:40.448319 start: 4.1 power-off (timeout 00:00:30) [common]
865 12:28:40.448972 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
866 12:28:40.481837 >> OK - accepted request
867 12:28:40.484202 Returned 0 in 0 seconds
868 12:28:40.584988 end: 4.1 power-off (duration 00:00:00) [common]
870 12:28:40.585897 start: 4.2 read-feedback (timeout 00:10:00) [common]
871 12:28:40.586530 Listened to connection for namespace 'common' for up to 1s
872 12:28:41.587419 Finalising connection for namespace 'common'
873 12:28:41.587873 Disconnecting from shell: Finalise
874 12:28:41.588191 =>
875 12:28:41.688862 end: 4.2 read-feedback (duration 00:00:01) [common]
876 12:28:41.689430 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/826910
877 12:28:44.888695 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/826910
878 12:28:44.889312 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.