Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:18:14.404158 lava-dispatcher, installed at version: 2024.01
2 10:18:14.404944 start: 0 validate
3 10:18:14.405411 Start time: 2024-09-19 10:18:14.405383+00:00 (UTC)
4 10:18:14.405958 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:18:14.406492 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:18:14.446778 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:18:14.447321 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-7135-gde848da12f752%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 10:18:14.476108 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:18:14.476771 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-7135-gde848da12f752%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 10:18:14.505060 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:18:14.505537 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:18:14.538341 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:18:14.538885 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-7135-gde848da12f752%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 10:18:14.582965 validate duration: 0.18
16 10:18:14.583792 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:18:14.584166 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:18:14.584472 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:18:14.585062 Not decompressing ramdisk as can be used compressed.
20 10:18:14.585534 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 10:18:14.585806 saving as /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/ramdisk/initrd.cpio.gz
22 10:18:14.586082 total size: 5628182 (5 MB)
23 10:18:14.625422 progress 0 % (0 MB)
24 10:18:14.633561 progress 5 % (0 MB)
25 10:18:14.641267 progress 10 % (0 MB)
26 10:18:14.648225 progress 15 % (0 MB)
27 10:18:14.654195 progress 20 % (1 MB)
28 10:18:14.657856 progress 25 % (1 MB)
29 10:18:14.661882 progress 30 % (1 MB)
30 10:18:14.665886 progress 35 % (1 MB)
31 10:18:14.669411 progress 40 % (2 MB)
32 10:18:14.673428 progress 45 % (2 MB)
33 10:18:14.676997 progress 50 % (2 MB)
34 10:18:14.681036 progress 55 % (2 MB)
35 10:18:14.685013 progress 60 % (3 MB)
36 10:18:14.688552 progress 65 % (3 MB)
37 10:18:14.692515 progress 70 % (3 MB)
38 10:18:14.696118 progress 75 % (4 MB)
39 10:18:14.700103 progress 80 % (4 MB)
40 10:18:14.703655 progress 85 % (4 MB)
41 10:18:14.707792 progress 90 % (4 MB)
42 10:18:14.711485 progress 95 % (5 MB)
43 10:18:14.714741 progress 100 % (5 MB)
44 10:18:14.715378 5 MB downloaded in 0.13 s (41.52 MB/s)
45 10:18:14.715929 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:18:14.716851 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:18:14.717141 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:18:14.717410 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:18:14.717885 downloading http://storage.kernelci.org/mainline/master/v6.11-7135-gde848da12f752/arm64/defconfig+debug/gcc-12/kernel/Image
51 10:18:14.718132 saving as /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/kernel/Image
52 10:18:14.718342 total size: 168802816 (160 MB)
53 10:18:14.718551 No compression specified
54 10:18:14.751180 progress 0 % (0 MB)
55 10:18:14.853461 progress 5 % (8 MB)
56 10:18:14.955785 progress 10 % (16 MB)
57 10:18:15.057608 progress 15 % (24 MB)
58 10:18:15.159516 progress 20 % (32 MB)
59 10:18:15.260062 progress 25 % (40 MB)
60 10:18:15.361719 progress 30 % (48 MB)
61 10:18:15.462358 progress 35 % (56 MB)
62 10:18:15.564477 progress 40 % (64 MB)
63 10:18:15.667194 progress 45 % (72 MB)
64 10:18:15.769257 progress 50 % (80 MB)
65 10:18:15.872335 progress 55 % (88 MB)
66 10:18:15.975108 progress 60 % (96 MB)
67 10:18:16.077925 progress 65 % (104 MB)
68 10:18:16.181162 progress 70 % (112 MB)
69 10:18:16.283294 progress 75 % (120 MB)
70 10:18:16.386105 progress 80 % (128 MB)
71 10:18:16.489239 progress 85 % (136 MB)
72 10:18:16.593921 progress 90 % (144 MB)
73 10:18:16.700217 progress 95 % (152 MB)
74 10:18:16.802303 progress 100 % (160 MB)
75 10:18:16.802985 160 MB downloaded in 2.08 s (77.22 MB/s)
76 10:18:16.803461 end: 1.2.1 http-download (duration 00:00:02) [common]
78 10:18:16.804304 end: 1.2 download-retry (duration 00:00:02) [common]
79 10:18:16.804579 start: 1.3 download-retry (timeout 00:09:58) [common]
80 10:18:16.804844 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 10:18:16.805310 downloading http://storage.kernelci.org/mainline/master/v6.11-7135-gde848da12f752/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 10:18:16.805551 saving as /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 10:18:16.805757 total size: 53209 (0 MB)
84 10:18:16.805965 No compression specified
85 10:18:16.843867 progress 61 % (0 MB)
86 10:18:16.844759 progress 100 % (0 MB)
87 10:18:16.845301 0 MB downloaded in 0.04 s (1.28 MB/s)
88 10:18:16.845755 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:18:16.846554 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:18:16.846816 start: 1.4 download-retry (timeout 00:09:58) [common]
92 10:18:16.847077 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 10:18:16.847522 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 10:18:16.847756 saving as /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/nfsrootfs/full.rootfs.tar
95 10:18:16.847959 total size: 107552908 (102 MB)
96 10:18:16.848192 Using unxz to decompress xz
97 10:18:16.879051 progress 0 % (0 MB)
98 10:18:17.529755 progress 5 % (5 MB)
99 10:18:18.265923 progress 10 % (10 MB)
100 10:18:18.996068 progress 15 % (15 MB)
101 10:18:19.757884 progress 20 % (20 MB)
102 10:18:20.332203 progress 25 % (25 MB)
103 10:18:20.951310 progress 30 % (30 MB)
104 10:18:21.688582 progress 35 % (35 MB)
105 10:18:22.049764 progress 40 % (41 MB)
106 10:18:22.504126 progress 45 % (46 MB)
107 10:18:23.196585 progress 50 % (51 MB)
108 10:18:23.895040 progress 55 % (56 MB)
109 10:18:24.662284 progress 60 % (61 MB)
110 10:18:25.425301 progress 65 % (66 MB)
111 10:18:26.165442 progress 70 % (71 MB)
112 10:18:26.944611 progress 75 % (76 MB)
113 10:18:27.631786 progress 80 % (82 MB)
114 10:18:28.337752 progress 85 % (87 MB)
115 10:18:29.082711 progress 90 % (92 MB)
116 10:18:29.807144 progress 95 % (97 MB)
117 10:18:30.556347 progress 100 % (102 MB)
118 10:18:30.569239 102 MB downloaded in 13.72 s (7.48 MB/s)
119 10:18:30.569852 end: 1.4.1 http-download (duration 00:00:14) [common]
121 10:18:30.570672 end: 1.4 download-retry (duration 00:00:14) [common]
122 10:18:30.570933 start: 1.5 download-retry (timeout 00:09:44) [common]
123 10:18:30.571188 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 10:18:30.571730 downloading http://storage.kernelci.org/mainline/master/v6.11-7135-gde848da12f752/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 10:18:30.572069 saving as /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/modules/modules.tar
126 10:18:30.572529 total size: 27650992 (26 MB)
127 10:18:30.572980 Using unxz to decompress xz
128 10:18:30.619950 progress 0 % (0 MB)
129 10:18:30.813639 progress 5 % (1 MB)
130 10:18:31.025504 progress 10 % (2 MB)
131 10:18:31.226540 progress 15 % (3 MB)
132 10:18:31.434295 progress 20 % (5 MB)
133 10:18:31.635547 progress 25 % (6 MB)
134 10:18:31.843266 progress 30 % (7 MB)
135 10:18:32.040643 progress 35 % (9 MB)
136 10:18:32.241269 progress 40 % (10 MB)
137 10:18:32.443376 progress 45 % (11 MB)
138 10:18:32.641973 progress 50 % (13 MB)
139 10:18:32.834895 progress 55 % (14 MB)
140 10:18:33.045650 progress 60 % (15 MB)
141 10:18:33.264515 progress 65 % (17 MB)
142 10:18:33.469325 progress 70 % (18 MB)
143 10:18:33.703887 progress 75 % (19 MB)
144 10:18:33.929900 progress 80 % (21 MB)
145 10:18:34.127749 progress 85 % (22 MB)
146 10:18:34.337650 progress 90 % (23 MB)
147 10:18:34.534066 progress 95 % (25 MB)
148 10:18:34.736294 progress 100 % (26 MB)
149 10:18:34.750481 26 MB downloaded in 4.18 s (6.31 MB/s)
150 10:18:34.751378 end: 1.5.1 http-download (duration 00:00:04) [common]
152 10:18:34.753005 end: 1.5 download-retry (duration 00:00:04) [common]
153 10:18:34.753523 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 10:18:34.754039 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 10:18:44.467247 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/744160/extract-nfsrootfs-m6pau8l6
156 10:18:44.467855 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 10:18:44.468245 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 10:18:44.468915 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq
159 10:18:44.469410 makedir: /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin
160 10:18:44.469811 makedir: /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/tests
161 10:18:44.470199 makedir: /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/results
162 10:18:44.470586 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-add-keys
163 10:18:44.471211 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-add-sources
164 10:18:44.471805 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-background-process-start
165 10:18:44.472415 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-background-process-stop
166 10:18:44.472982 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-common-functions
167 10:18:44.473527 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-echo-ipv4
168 10:18:44.474126 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-install-packages
169 10:18:44.474719 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-installed-packages
170 10:18:44.475289 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-os-build
171 10:18:44.475856 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-probe-channel
172 10:18:44.476456 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-probe-ip
173 10:18:44.477032 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-target-ip
174 10:18:44.477601 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-target-mac
175 10:18:44.478176 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-target-storage
176 10:18:44.478764 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-case
177 10:18:44.479338 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-event
178 10:18:44.479907 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-feedback
179 10:18:44.480503 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-raise
180 10:18:44.481182 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-reference
181 10:18:44.481797 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-runner
182 10:18:44.482374 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-set
183 10:18:44.482943 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-test-shell
184 10:18:44.483524 Updating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-install-packages (oe)
185 10:18:44.484178 Updating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/bin/lava-installed-packages (oe)
186 10:18:44.484709 Creating /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/environment
187 10:18:44.485211 LAVA metadata
188 10:18:44.485513 - LAVA_JOB_ID=744160
189 10:18:44.485765 - LAVA_DISPATCHER_IP=192.168.6.2
190 10:18:44.486166 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 10:18:44.487259 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 10:18:44.487602 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 10:18:44.487849 skipped lava-vland-overlay
194 10:18:44.488161 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 10:18:44.488469 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 10:18:44.488723 skipped lava-multinode-overlay
197 10:18:44.489010 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 10:18:44.489306 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 10:18:44.489604 Loading test definitions
200 10:18:44.489930 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 10:18:44.490185 Using /lava-744160 at stage 0
202 10:18:44.491477 uuid=744160_1.6.2.4.1 testdef=None
203 10:18:44.491814 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 10:18:44.492145 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 10:18:44.494152 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 10:18:44.495012 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 10:18:44.497520 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 10:18:44.498415 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 10:18:44.500881 runner path: /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/0/tests/0_dmesg test_uuid 744160_1.6.2.4.1
212 10:18:44.501486 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 10:18:44.502298 Creating lava-test-runner.conf files
215 10:18:44.502528 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/744160/lava-overlay-qjin53cq/lava-744160/0 for stage 0
216 10:18:44.502911 - 0_dmesg
217 10:18:44.503299 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 10:18:44.503609 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 10:18:44.527972 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 10:18:44.528385 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 10:18:44.528689 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 10:18:44.528999 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 10:18:44.529308 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 10:18:45.152256 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 10:18:45.152734 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 10:18:45.152979 extracting modules file /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/744160/extract-nfsrootfs-m6pau8l6
227 10:18:46.912483 extracting modules file /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/744160/extract-overlay-ramdisk-zrzg4dc_/ramdisk
228 10:18:48.700935 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 10:18:48.701448 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 10:18:48.701737 [common] Applying overlay to NFS
231 10:18:48.701958 [common] Applying overlay /var/lib/lava/dispatcher/tmp/744160/compress-overlay-2ktv1vql/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/744160/extract-nfsrootfs-m6pau8l6
232 10:18:48.732790 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 10:18:48.733261 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 10:18:48.733546 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 10:18:48.733796 Converting downloaded kernel to a uImage
236 10:18:48.734115 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/kernel/Image /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/kernel/uImage
237 10:18:50.675287 output: Image Name:
238 10:18:50.675712 output: Created: Thu Sep 19 10:18:48 2024
239 10:18:50.675931 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 10:18:50.676170 output: Data Size: 168802816 Bytes = 164846.50 KiB = 160.98 MiB
241 10:18:50.676378 output: Load Address: 01080000
242 10:18:50.676590 output: Entry Point: 01080000
243 10:18:50.676786 output:
244 10:18:50.677135 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 10:18:50.677411 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 10:18:50.677686 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 10:18:50.677937 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 10:18:50.678198 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 10:18:50.678486 Building ramdisk /var/lib/lava/dispatcher/tmp/744160/extract-overlay-ramdisk-zrzg4dc_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/744160/extract-overlay-ramdisk-zrzg4dc_/ramdisk
250 10:18:56.274941 >> 424718 blocks
251 10:19:13.950668 Adding RAMdisk u-boot header.
252 10:19:13.951344 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/744160/extract-overlay-ramdisk-zrzg4dc_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/744160/extract-overlay-ramdisk-zrzg4dc_/ramdisk.cpio.gz.uboot
253 10:19:14.476651 output: Image Name:
254 10:19:14.477047 output: Created: Thu Sep 19 10:19:13 2024
255 10:19:14.477259 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 10:19:14.477465 output: Data Size: 50926991 Bytes = 49733.39 KiB = 48.57 MiB
257 10:19:14.477666 output: Load Address: 00000000
258 10:19:14.477864 output: Entry Point: 00000000
259 10:19:14.478060 output:
260 10:19:14.478757 rename /var/lib/lava/dispatcher/tmp/744160/extract-overlay-ramdisk-zrzg4dc_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/ramdisk/ramdisk.cpio.gz.uboot
261 10:19:14.479192 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 10:19:14.479481 end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
263 10:19:14.479754 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 10:19:14.480054 No LXC device requested
265 10:19:14.480584 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 10:19:14.481120 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 10:19:14.481612 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 10:19:14.482023 Checking files for TFTP limit of 4294967296 bytes.
269 10:19:14.485282 end: 1 tftp-deploy (duration 00:01:00) [common]
270 10:19:14.485889 start: 2 uboot-action (timeout 00:05:00) [common]
271 10:19:14.486409 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 10:19:14.486899 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 10:19:14.487396 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 10:19:14.487924 Using kernel file from prepare-kernel: 744160/tftp-deploy-nu689lfh/kernel/uImage
275 10:19:14.488589 substitutions:
276 10:19:14.488991 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 10:19:14.489730 - {DTB_ADDR}: 0x01070000
278 10:19:14.490154 - {DTB}: 744160/tftp-deploy-nu689lfh/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 10:19:14.490555 - {INITRD}: 744160/tftp-deploy-nu689lfh/ramdisk/ramdisk.cpio.gz.uboot
280 10:19:14.490951 - {KERNEL_ADDR}: 0x01080000
281 10:19:14.491342 - {KERNEL}: 744160/tftp-deploy-nu689lfh/kernel/uImage
282 10:19:14.491732 - {LAVA_MAC}: None
283 10:19:14.492500 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/744160/extract-nfsrootfs-m6pau8l6
284 10:19:14.492925 - {NFS_SERVER_IP}: 192.168.6.2
285 10:19:14.493320 - {PRESEED_CONFIG}: None
286 10:19:14.493708 - {PRESEED_LOCAL}: None
287 10:19:14.494096 - {RAMDISK_ADDR}: 0x08000000
288 10:19:14.494484 - {RAMDISK}: 744160/tftp-deploy-nu689lfh/ramdisk/ramdisk.cpio.gz.uboot
289 10:19:14.494868 - {ROOT_PART}: None
290 10:19:14.495254 - {ROOT}: None
291 10:19:14.495642 - {SERVER_IP}: 192.168.6.2
292 10:19:14.496085 - {TEE_ADDR}: 0x83000000
293 10:19:14.496482 - {TEE}: None
294 10:19:14.496872 Parsed boot commands:
295 10:19:14.497251 - setenv autoload no
296 10:19:14.497637 - setenv initrd_high 0xffffffff
297 10:19:14.498025 - setenv fdt_high 0xffffffff
298 10:19:14.498411 - dhcp
299 10:19:14.498800 - setenv serverip 192.168.6.2
300 10:19:14.499182 - tftpboot 0x01080000 744160/tftp-deploy-nu689lfh/kernel/uImage
301 10:19:14.499562 - tftpboot 0x08000000 744160/tftp-deploy-nu689lfh/ramdisk/ramdisk.cpio.gz.uboot
302 10:19:14.499947 - tftpboot 0x01070000 744160/tftp-deploy-nu689lfh/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 10:19:14.500365 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/744160/extract-nfsrootfs-m6pau8l6,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 10:19:14.500764 - bootm 0x01080000 0x08000000 0x01070000
305 10:19:14.501288 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 10:19:14.502778 start: 2.3 connect-device (timeout 00:05:00) [common]
308 10:19:14.503193 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 10:19:14.520669 Setting prompt string to ['lava-test: # ']
310 10:19:14.522185 end: 2.3 connect-device (duration 00:00:00) [common]
311 10:19:14.522873 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 10:19:14.523492 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 10:19:14.524117 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 10:19:14.525312 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 10:19:14.562439 >> OK - accepted request
316 10:19:14.564909 Returned 0 in 0 seconds
317 10:19:14.666100 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 10:19:14.667830 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 10:19:14.668499 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 10:19:14.669030 Setting prompt string to ['Hit any key to stop autoboot']
322 10:19:14.669511 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 10:19:14.671095 Trying 192.168.56.21...
324 10:19:14.671578 Connected to conserv1.
325 10:19:14.672031 Escape character is '^]'.
326 10:19:14.672463
327 10:19:14.673561 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 10:19:14.674154
329 10:19:22.474404 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 10:19:22.474839 bl2_stage_init 0x01
331 10:19:22.475059 bl2_stage_init 0x81
332 10:19:22.479891 hw id: 0x0000 - pwm id 0x01
333 10:19:22.480466 bl2_stage_init 0xc1
334 10:19:22.483961 bl2_stage_init 0x02
335 10:19:22.484507
336 10:19:22.484962 L0:00000000
337 10:19:22.485400 L1:00000703
338 10:19:22.489480 L2:00008067
339 10:19:22.490005 L3:15000000
340 10:19:22.490443 S1:00000000
341 10:19:22.490892 B2:20282000
342 10:19:22.491337 B1:a0f83180
343 10:19:22.491766
344 10:19:22.495070 TE: 70768
345 10:19:22.495599
346 10:19:22.500693 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 10:19:22.501213
348 10:19:22.501655 Board ID = 1
349 10:19:22.502086 Set cpu clk to 24M
350 10:19:22.506278 Set clk81 to 24M
351 10:19:22.506790 Use GP1_pll as DSU clk.
352 10:19:22.507228 DSU clk: 1200 Mhz
353 10:19:22.511847 CPU clk: 1200 MHz
354 10:19:22.512389 Set clk81 to 166.6M
355 10:19:22.517507 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 10:19:22.518031 board id: 1
357 10:19:22.526401 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 10:19:22.537318 fw parse done
359 10:19:22.543202 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 10:19:22.586200 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 10:19:22.597421 PIEI prepare done
362 10:19:22.597949 fastboot data load
363 10:19:22.598404 fastboot data verify
364 10:19:22.602897 verify result: 266
365 10:19:22.608552 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 10:19:22.609078 LPDDR4 probe
367 10:19:22.609523 ddr clk to 1584MHz
368 10:19:22.616580 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 10:19:22.654789
370 10:19:22.655787 dmc_version 0001
371 10:19:22.661361 Check phy result
372 10:19:22.667483 INFO : End of CA training
373 10:19:22.668360 INFO : End of initialization
374 10:19:22.672850 INFO : Training has run successfully!
375 10:19:22.673364 Check phy result
376 10:19:22.678440 INFO : End of initialization
377 10:19:22.678952 INFO : End of read enable training
378 10:19:22.684082 INFO : End of fine write leveling
379 10:19:22.689703 INFO : End of Write leveling coarse delay
380 10:19:22.690212 INFO : Training has run successfully!
381 10:19:22.690652 Check phy result
382 10:19:22.695278 INFO : End of initialization
383 10:19:22.695796 INFO : End of read dq deskew training
384 10:19:22.700859 INFO : End of MPR read delay center optimization
385 10:19:22.706653 INFO : End of write delay center optimization
386 10:19:22.712101 INFO : End of read delay center optimization
387 10:19:22.712621 INFO : End of max read latency training
388 10:19:22.717699 INFO : Training has run successfully!
389 10:19:22.718209 1D training succeed
390 10:19:22.726862 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 10:19:22.775364 Check phy result
392 10:19:22.776032 INFO : End of initialization
393 10:19:22.802616 INFO : End of 2D read delay Voltage center optimization
394 10:19:22.826762 INFO : End of 2D read delay Voltage center optimization
395 10:19:22.883556 INFO : End of 2D write delay Voltage center optimization
396 10:19:22.937826 INFO : End of 2D write delay Voltage center optimization
397 10:19:22.943263 INFO : Training has run successfully!
398 10:19:22.944187
399 10:19:22.945029 channel==0
400 10:19:22.948831 RxClkDly_Margin_A0==78 ps 8
401 10:19:22.949709 TxDqDly_Margin_A0==98 ps 10
402 10:19:22.954466 RxClkDly_Margin_A1==88 ps 9
403 10:19:22.955350 TxDqDly_Margin_A1==98 ps 10
404 10:19:22.956196 TrainedVREFDQ_A0==77
405 10:19:22.960017 TrainedVREFDQ_A1==74
406 10:19:22.960962 VrefDac_Margin_A0==23
407 10:19:22.961717 DeviceVref_Margin_A0==37
408 10:19:22.965721 VrefDac_Margin_A1==23
409 10:19:22.966619 DeviceVref_Margin_A1==40
410 10:19:22.967406
411 10:19:22.968279
412 10:19:22.971234 channel==1
413 10:19:22.972096 RxClkDly_Margin_A0==78 ps 8
414 10:19:22.972957 TxDqDly_Margin_A0==98 ps 10
415 10:19:22.976859 RxClkDly_Margin_A1==78 ps 8
416 10:19:22.977743 TxDqDly_Margin_A1==78 ps 8
417 10:19:22.982405 TrainedVREFDQ_A0==78
418 10:19:22.983354 TrainedVREFDQ_A1==75
419 10:19:22.984098 VrefDac_Margin_A0==22
420 10:19:22.987886 DeviceVref_Margin_A0==36
421 10:19:22.988457 VrefDac_Margin_A1==22
422 10:19:22.993745 DeviceVref_Margin_A1==39
423 10:19:22.995244
424 10:19:22.996391 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 10:19:22.997181
426 10:19:23.027229 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
427 10:19:23.028341 2D training succeed
428 10:19:23.032672 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 10:19:23.038254 auto size-- 65535DDR cs0 size: 2048MB
430 10:19:23.039140 DDR cs1 size: 2048MB
431 10:19:23.043792 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 10:19:23.044638 cs0 DataBus test pass
433 10:19:23.049645 cs1 DataBus test pass
434 10:19:23.050173 cs0 AddrBus test pass
435 10:19:23.050617 cs1 AddrBus test pass
436 10:19:23.051053
437 10:19:23.054959 100bdlr_step_size ps== 471
438 10:19:23.055476 result report
439 10:19:23.060543 boot times 0Enable ddr reg access
440 10:19:23.065813 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 10:19:23.079737 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 10:19:23.739593 bl2z: ptr: 05129330, size: 00001e40
443 10:19:23.747900 0.0;M3 CHK:0;cm4_sp_mode 0
444 10:19:23.748945 MVN_1=0x00000000
445 10:19:23.749728 MVN_2=0x00000000
446 10:19:23.759353 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 10:19:23.760333 OPS=0x04
448 10:19:23.761242 ring efuse init
449 10:19:23.762502 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 10:19:23.767961 [0.017354 Inits done]
451 10:19:23.768538 secure task start!
452 10:19:23.768998 high task start!
453 10:19:23.769449 low task start!
454 10:19:23.772268 run into bl31
455 10:19:23.780997 NOTICE: BL31: v1.3(release):4fc40b1
456 10:19:23.788690 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 10:19:23.789244 NOTICE: BL31: G12A normal boot!
458 10:19:23.804418 NOTICE: BL31: BL33 decompress pass
459 10:19:23.810002 ERROR: Error initializing runtime service opteed_fast
460 10:19:25.023776 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 10:19:25.024451 bl2_stage_init 0x01
462 10:19:25.024892 bl2_stage_init 0x81
463 10:19:25.029099 hw id: 0x0000 - pwm id 0x01
464 10:19:25.029657 bl2_stage_init 0xc1
465 10:19:25.034737 bl2_stage_init 0x02
466 10:19:25.035313
467 10:19:25.035753 L0:00000000
468 10:19:25.036493 L1:00000703
469 10:19:25.037078 L2:00008067
470 10:19:25.037524 L3:15000000
471 10:19:25.040253 S1:00000000
472 10:19:25.040678 B2:20282000
473 10:19:25.041068 B1:a0f83180
474 10:19:25.041465
475 10:19:25.041855 TE: 69909
476 10:19:25.042246
477 10:19:25.045783 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 10:19:25.046204
479 10:19:25.051378 Board ID = 1
480 10:19:25.051787 Set cpu clk to 24M
481 10:19:25.052210 Set clk81 to 24M
482 10:19:25.056948 Use GP1_pll as DSU clk.
483 10:19:25.057398 DSU clk: 1200 Mhz
484 10:19:25.057786 CPU clk: 1200 MHz
485 10:19:25.062596 Set clk81 to 166.6M
486 10:19:25.068125 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 10:19:25.068549 board id: 1
488 10:19:25.075344 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 10:19:25.086041 fw parse done
490 10:19:25.092039 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 10:19:25.134706 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 10:19:25.145732 PIEI prepare done
493 10:19:25.146179 fastboot data load
494 10:19:25.146574 fastboot data verify
495 10:19:25.151194 verify result: 266
496 10:19:25.156791 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 10:19:25.157219 LPDDR4 probe
498 10:19:25.157608 ddr clk to 1584MHz
499 10:19:26.524151 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 10:19:26.524634 bl2_stage_init 0x01
501 10:19:26.524886 bl2_stage_init 0x81
502 10:19:26.529656 hw id: 0x0000 - pwm id 0x01
503 10:19:26.530119 bl2_stage_init 0xc1
504 10:19:26.535260 bl2_stage_init 0x02
505 10:19:26.535848
506 10:19:26.536279 L0:00000000
507 10:19:26.536552 L1:00000703
508 10:19:26.536788 L2:00008067
509 10:19:26.537017 L3:15000000
510 10:19:26.540866 S1:00000000
511 10:19:26.541203 B2:20282000
512 10:19:26.541446 B1:a0f83180
513 10:19:26.541669
514 10:19:26.541901 TE: 69582
515 10:19:26.542127
516 10:19:26.546489 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 10:19:26.546818
518 10:19:26.552069 Board ID = 1
519 10:19:26.552398 Set cpu clk to 24M
520 10:19:26.552642 Set clk81 to 24M
521 10:19:26.557646 Use GP1_pll as DSU clk.
522 10:19:26.557971 DSU clk: 1200 Mhz
523 10:19:26.558211 CPU clk: 1200 MHz
524 10:19:26.563223 Set clk81 to 166.6M
525 10:19:26.568863 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 10:19:26.569191 board id: 1
527 10:19:26.576065 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 10:19:26.586831 fw parse done
529 10:19:26.592718 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 10:19:26.635321 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 10:19:26.646247 PIEI prepare done
532 10:19:26.646586 fastboot data load
533 10:19:26.646826 fastboot data verify
534 10:19:26.651925 verify result: 266
535 10:19:26.657423 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 10:19:26.657733 LPDDR4 probe
537 10:19:26.657985 ddr clk to 1584MHz
538 10:19:26.665414 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 10:19:26.702809
540 10:19:26.703223 dmc_version 0001
541 10:19:26.709353 Check phy result
542 10:19:26.715240 INFO : End of CA training
543 10:19:26.715584 INFO : End of initialization
544 10:19:26.720872 INFO : Training has run successfully!
545 10:19:26.721226 Check phy result
546 10:19:26.726458 INFO : End of initialization
547 10:19:26.726816 INFO : End of read enable training
548 10:19:26.732096 INFO : End of fine write leveling
549 10:19:26.737685 INFO : End of Write leveling coarse delay
550 10:19:26.738043 INFO : Training has run successfully!
551 10:19:26.738282 Check phy result
552 10:19:26.743302 INFO : End of initialization
553 10:19:26.743653 INFO : End of read dq deskew training
554 10:19:26.748951 INFO : End of MPR read delay center optimization
555 10:19:26.754500 INFO : End of write delay center optimization
556 10:19:26.760065 INFO : End of read delay center optimization
557 10:19:26.760397 INFO : End of max read latency training
558 10:19:26.765688 INFO : Training has run successfully!
559 10:19:26.766031 1D training succeed
560 10:19:26.774943 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 10:19:26.822550 Check phy result
562 10:19:26.822974 INFO : End of initialization
563 10:19:26.844766 INFO : End of 2D read delay Voltage center optimization
564 10:19:26.864069 INFO : End of 2D read delay Voltage center optimization
565 10:19:26.915872 INFO : End of 2D write delay Voltage center optimization
566 10:19:26.965040 INFO : End of 2D write delay Voltage center optimization
567 10:19:26.970566 INFO : Training has run successfully!
568 10:19:26.970919
569 10:19:26.971180 channel==0
570 10:19:26.976242 RxClkDly_Margin_A0==78 ps 8
571 10:19:26.976599 TxDqDly_Margin_A0==98 ps 10
572 10:19:26.981772 RxClkDly_Margin_A1==88 ps 9
573 10:19:26.982130 TxDqDly_Margin_A1==88 ps 9
574 10:19:26.982364 TrainedVREFDQ_A0==74
575 10:19:26.987347 TrainedVREFDQ_A1==74
576 10:19:26.987698 VrefDac_Margin_A0==22
577 10:19:26.987934 DeviceVref_Margin_A0==40
578 10:19:26.992974 VrefDac_Margin_A1==23
579 10:19:26.993337 DeviceVref_Margin_A1==40
580 10:19:26.993581
581 10:19:26.993815
582 10:19:26.994049 channel==1
583 10:19:26.998660 RxClkDly_Margin_A0==88 ps 9
584 10:19:26.999028 TxDqDly_Margin_A0==98 ps 10
585 10:19:27.004176 RxClkDly_Margin_A1==78 ps 8
586 10:19:27.004536 TxDqDly_Margin_A1==98 ps 10
587 10:19:27.009761 TrainedVREFDQ_A0==75
588 10:19:27.010125 TrainedVREFDQ_A1==78
589 10:19:27.010361 VrefDac_Margin_A0==22
590 10:19:27.015450 DeviceVref_Margin_A0==39
591 10:19:27.015820 VrefDac_Margin_A1==22
592 10:19:27.021090 DeviceVref_Margin_A1==36
593 10:19:27.021462
594 10:19:27.021701 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 10:19:27.021931
596 10:19:27.054759 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
597 10:19:27.055158 2D training succeed
598 10:19:27.060250 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 10:19:27.065763 auto size-- 65535DDR cs0 size: 2048MB
600 10:19:27.066123 DDR cs1 size: 2048MB
601 10:19:27.071337 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 10:19:27.071676 cs0 DataBus test pass
603 10:19:27.076989 cs1 DataBus test pass
604 10:19:27.077350 cs0 AddrBus test pass
605 10:19:27.077598 cs1 AddrBus test pass
606 10:19:27.077821
607 10:19:27.082566 100bdlr_step_size ps== 478
608 10:19:27.082920 result report
609 10:19:27.088401 boot times 0Enable ddr reg access
610 10:19:27.093413 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 10:19:27.107250 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 10:19:27.761284 bl2z: ptr: 05129330, size: 00001e40
613 10:19:27.767492 0.0;M3 CHK:0;cm4_sp_mode 0
614 10:19:27.768118 MVN_1=0x00000000
615 10:19:27.768412 MVN_2=0x00000000
616 10:19:27.779051 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 10:19:27.779449 OPS=0x04
618 10:19:27.779694 ring efuse init
619 10:19:27.781945 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 10:19:27.788329 [0.017319 Inits done]
621 10:19:27.788958 secure task start!
622 10:19:27.789414 high task start!
623 10:19:27.789857 low task start!
624 10:19:27.792573 run into bl31
625 10:19:27.801157 NOTICE: BL31: v1.3(release):4fc40b1
626 10:19:27.809001 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 10:19:27.809592 NOTICE: BL31: G12A normal boot!
628 10:19:27.824675 NOTICE: BL31: BL33 decompress pass
629 10:19:27.830251 ERROR: Error initializing runtime service opteed_fast
630 10:19:29.075578 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 10:19:29.076043 bl2_stage_init 0x01
632 10:19:29.076321 bl2_stage_init 0x81
633 10:19:29.081145 hw id: 0x0000 - pwm id 0x01
634 10:19:29.081525 bl2_stage_init 0xc1
635 10:19:29.085587 bl2_stage_init 0x02
636 10:19:29.085975
637 10:19:29.086257 L0:00000000
638 10:19:29.086516 L1:00000703
639 10:19:29.086768 L2:00008067
640 10:19:29.091073 L3:15000000
641 10:19:29.091503 S1:00000000
642 10:19:29.091789 B2:20282000
643 10:19:29.092089 B1:a0f83180
644 10:19:29.092365
645 10:19:29.092625 TE: 70883
646 10:19:29.092961
647 10:19:29.102318 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 10:19:29.102761
649 10:19:29.103054 Board ID = 1
650 10:19:29.103328 Set cpu clk to 24M
651 10:19:29.103590 Set clk81 to 24M
652 10:19:29.107956 Use GP1_pll as DSU clk.
653 10:19:29.108599 DSU clk: 1200 Mhz
654 10:19:29.108945 CPU clk: 1200 MHz
655 10:19:29.113393 Set clk81 to 166.6M
656 10:19:29.118996 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 10:19:29.119399 board id: 1
658 10:19:29.127402 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 10:19:29.138342 fw parse done
660 10:19:29.144551 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 10:19:29.187599 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 10:19:29.198593 PIEI prepare done
663 10:19:29.199137 fastboot data load
664 10:19:29.199488 fastboot data verify
665 10:19:29.204226 verify result: 266
666 10:19:29.209815 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 10:19:29.210243 LPDDR4 probe
668 10:19:29.210464 ddr clk to 1584MHz
669 10:19:29.218121 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 10:19:29.255490
671 10:19:29.256840 dmc_version 0001
672 10:19:29.263167 Check phy result
673 10:19:29.268660 INFO : End of CA training
674 10:19:29.269171 INFO : End of initialization
675 10:19:29.274372 INFO : Training has run successfully!
676 10:19:29.274972 Check phy result
677 10:19:29.279639 INFO : End of initialization
678 10:19:29.280095 INFO : End of read enable training
679 10:19:29.285335 INFO : End of fine write leveling
680 10:19:29.290858 INFO : End of Write leveling coarse delay
681 10:19:29.291494 INFO : Training has run successfully!
682 10:19:29.291828 Check phy result
683 10:19:29.296438 INFO : End of initialization
684 10:19:29.297056 INFO : End of read dq deskew training
685 10:19:29.302141 INFO : End of MPR read delay center optimization
686 10:19:29.307745 INFO : End of write delay center optimization
687 10:19:29.313381 INFO : End of read delay center optimization
688 10:19:29.313829 INFO : End of max read latency training
689 10:19:29.318897 INFO : Training has run successfully!
690 10:19:29.319346 1D training succeed
691 10:19:29.328147 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 10:19:29.376342 Check phy result
693 10:19:29.376842 INFO : End of initialization
694 10:19:29.403650 INFO : End of 2D read delay Voltage center optimization
695 10:19:29.427934 INFO : End of 2D read delay Voltage center optimization
696 10:19:29.484538 INFO : End of 2D write delay Voltage center optimization
697 10:19:29.538522 INFO : End of 2D write delay Voltage center optimization
698 10:19:29.544265 INFO : Training has run successfully!
699 10:19:29.545002
700 10:19:29.545400 channel==0
701 10:19:29.549736 RxClkDly_Margin_A0==88 ps 9
702 10:19:29.550559 TxDqDly_Margin_A0==88 ps 9
703 10:19:29.553143 RxClkDly_Margin_A1==88 ps 9
704 10:19:29.553553 TxDqDly_Margin_A1==98 ps 10
705 10:19:29.558567 TrainedVREFDQ_A0==74
706 10:19:29.559042 TrainedVREFDQ_A1==75
707 10:19:29.559426 VrefDac_Margin_A0==22
708 10:19:29.564240 DeviceVref_Margin_A0==40
709 10:19:29.564666 VrefDac_Margin_A1==22
710 10:19:29.569728 DeviceVref_Margin_A1==39
711 10:19:29.570110
712 10:19:29.570358
713 10:19:29.570596 channel==1
714 10:19:29.570833 RxClkDly_Margin_A0==88 ps 9
715 10:19:29.575480 TxDqDly_Margin_A0==98 ps 10
716 10:19:29.575972 RxClkDly_Margin_A1==78 ps 8
717 10:19:29.580969 TxDqDly_Margin_A1==78 ps 8
718 10:19:29.581463 TrainedVREFDQ_A0==78
719 10:19:29.581749 TrainedVREFDQ_A1==75
720 10:19:29.586699 VrefDac_Margin_A0==22
721 10:19:29.587259 DeviceVref_Margin_A0==36
722 10:19:29.592212 VrefDac_Margin_A1==22
723 10:19:29.592731 DeviceVref_Margin_A1==39
724 10:19:29.593155
725 10:19:29.597838 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 10:19:29.598597
727 10:19:29.625737 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000015 00000016 dram_vref_reg_value 0x 00000062
728 10:19:29.631385 2D training succeed
729 10:19:29.636936 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 10:19:29.637466 auto size-- 65535DDR cs0 size: 2048MB
731 10:19:29.642474 DDR cs1 size: 2048MB
732 10:19:29.642988 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 10:19:29.648074 cs0 DataBus test pass
734 10:19:29.648605 cs1 DataBus test pass
735 10:19:29.649047 cs0 AddrBus test pass
736 10:19:29.653660 cs1 AddrBus test pass
737 10:19:29.654167
738 10:19:29.654595 100bdlr_step_size ps== 471
739 10:19:29.655011 result report
740 10:19:29.659280 boot times 0Enable ddr reg access
741 10:19:29.666820 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 10:19:29.680751 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 10:19:30.340540 bl2z: ptr: 05129330, size: 00001e40
744 10:19:30.349413 0.0;M3 CHK:0;cm4_sp_mode 0
745 10:19:30.350014 MVN_1=0x00000000
746 10:19:30.350425 MVN_2=0x00000000
747 10:19:30.360811 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 10:19:30.361360 OPS=0x04
749 10:19:30.361765 ring efuse init
750 10:19:30.366426 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 10:19:30.366874 [0.017354 Inits done]
752 10:19:30.367271 secure task start!
753 10:19:30.374405 high task start!
754 10:19:30.374899 low task start!
755 10:19:30.375308 run into bl31
756 10:19:30.382920 NOTICE: BL31: v1.3(release):4fc40b1
757 10:19:30.390734 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 10:19:30.391420 NOTICE: BL31: G12A normal boot!
759 10:19:30.406486 NOTICE: BL31: BL33 decompress pass
760 10:19:30.412142 ERROR: Error initializing runtime service opteed_fast
761 10:19:31.207609
762 10:19:31.208445
763 10:19:31.212848 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 10:19:31.213427
765 10:19:31.216656 Model: Libre Computer AML-S905D3-CC Solitude
766 10:19:31.363393 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 10:19:31.378777 DRAM: 2 GiB (effective 3.8 GiB)
768 10:19:31.479847 Core: 406 devices, 33 uclasses, devicetree: separate
769 10:19:31.485615 WDT: Not starting watchdog@f0d0
770 10:19:31.510705 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 10:19:31.522971 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 10:19:31.527922 ** Bad device specification mmc 0 **
773 10:19:31.538013 Card did not respond to voltage select! : -110
774 10:19:31.545655 ** Bad device specification mmc 0 **
775 10:19:31.546265 Couldn't find partition mmc 0
776 10:19:31.553991 Card did not respond to voltage select! : -110
777 10:19:31.559468 ** Bad device specification mmc 0 **
778 10:19:31.560073 Couldn't find partition mmc 0
779 10:19:31.564549 Error: could not access storage.
780 10:19:31.860981 Net: eth0: ethernet@ff3f0000
781 10:19:31.861761 starting USB...
782 10:19:32.105733 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 10:19:32.106532 Starting the controller
784 10:19:32.112639 USB XHCI 1.10
785 10:19:33.668753 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 10:19:33.677011 scanning usb for storage devices... 0 Storage Device(s) found
788 10:19:33.728922 Hit any key to stop autoboot: 1
789 10:19:33.730046 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 10:19:33.730811 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 10:19:33.731433 Setting prompt string to ['=>']
792 10:19:33.732108 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 10:19:33.743085 0
794 10:19:33.744332 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 10:19:33.845917 => setenv autoload no
797 10:19:33.846923 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 10:19:33.853114 setenv autoload no
800 10:19:33.954931 => setenv initrd_high 0xffffffff
801 10:19:33.955737 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 10:19:33.959971 setenv initrd_high 0xffffffff
804 10:19:34.061823 => setenv fdt_high 0xffffffff
805 10:19:34.062803 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
806 10:19:34.067904 setenv fdt_high 0xffffffff
808 10:19:34.169811 => dhcp
809 10:19:34.170752 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 10:19:34.174935 dhcp
811 10:19:34.680335 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 10:19:34.681036 Speed: 1000, full duplex
813 10:19:34.681538 BOOTP broadcast 1
814 10:19:34.928359 BOOTP broadcast 2
815 10:19:35.429585 BOOTP broadcast 3
816 10:19:36.430398 BOOTP broadcast 4
817 10:19:38.431184 BOOTP broadcast 5
818 10:19:38.444855 DHCP client bound to address 192.168.6.12 (3764 ms)
820 10:19:38.546600 => setenv serverip 192.168.6.2
821 10:19:38.547647 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 10:19:38.550676 setenv serverip 192.168.6.2
824 10:19:38.652345 => tftpboot 0x01080000 744160/tftp-deploy-nu689lfh/kernel/uImage
825 10:19:38.653281 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 10:19:38.660651 tftpboot 0x01080000 744160/tftp-deploy-nu689lfh/kernel/uImage
827 10:19:38.661213 Speed: 1000, full duplex
828 10:19:38.661681 Using ethernet@ff3f0000 device
829 10:19:38.666224 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 10:19:38.671690 Filename '744160/tftp-deploy-nu689lfh/kernel/uImage'.
831 10:19:38.674988 Load address: 0x1080000
832 10:19:49.601368 Loading: *#################T ##
833 10:19:49.601792 TFTP error: trying to overwrite reserved memory...
835 10:19:49.602693 end: 2.4.3 bootloader-commands (duration 00:00:16) [common]
838 10:19:49.603606 end: 2.4 uboot-commands (duration 00:00:35) [common]
840 10:19:49.604448 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
842 10:19:49.605203 end: 2 uboot-action (duration 00:00:35) [common]
844 10:19:49.606409 Cleaning after the job
845 10:19:49.606801 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/ramdisk
846 10:19:49.632851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/kernel
847 10:19:49.684964 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/dtb
848 10:19:49.685807 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/nfsrootfs
849 10:19:49.712102 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/744160/tftp-deploy-nu689lfh/modules
850 10:19:49.723630 start: 4.1 power-off (timeout 00:00:30) [common]
851 10:19:49.724290 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
852 10:19:49.762188 >> OK - accepted request
853 10:19:49.764363 Returned 0 in 0 seconds
854 10:19:49.865529 end: 4.1 power-off (duration 00:00:00) [common]
856 10:19:49.866528 start: 4.2 read-feedback (timeout 00:10:00) [common]
857 10:19:49.867173 Listened to connection for namespace 'common' for up to 1s
858 10:19:50.867697 Finalising connection for namespace 'common'
859 10:19:50.868526 Disconnecting from shell: Finalise
860 10:19:50.869060 =>
861 10:19:50.970038 end: 4.2 read-feedback (duration 00:00:01) [common]
862 10:19:50.970707 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/744160
863 10:19:52.914123 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/744160
864 10:19:52.914729 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.