Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:44:25.515132 lava-dispatcher, installed at version: 2024.01
2 02:44:25.515974 start: 0 validate
3 02:44:25.516478 Start time: 2024-08-30 02:44:25.516447+00:00 (UTC)
4 02:44:25.517049 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:44:25.517729 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:44:25.558992 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:44:25.559723 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-151-g1b5fe53681d9%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fkernel%2FImage exists
8 02:44:25.597462 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:44:25.598112 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-151-g1b5fe53681d9%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:44:25.629136 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:44:25.629631 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:44:25.661309 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:44:25.661813 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-151-g1b5fe53681d9%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fmodules.tar.xz exists
14 02:44:25.705457 validate duration: 0.19
16 02:44:25.707311 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:44:25.707670 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:44:25.708072 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:44:25.709151 Not decompressing ramdisk as can be used compressed.
20 02:44:25.709849 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 02:44:25.710174 saving as /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/ramdisk/initrd.cpio.gz
22 02:44:25.710496 total size: 5628182 (5 MB)
23 02:44:25.748157 progress 0 % (0 MB)
24 02:44:25.752829 progress 5 % (0 MB)
25 02:44:25.757294 progress 10 % (0 MB)
26 02:44:25.761637 progress 15 % (0 MB)
27 02:44:25.766073 progress 20 % (1 MB)
28 02:44:25.769869 progress 25 % (1 MB)
29 02:44:25.774273 progress 30 % (1 MB)
30 02:44:25.778534 progress 35 % (1 MB)
31 02:44:25.782294 progress 40 % (2 MB)
32 02:44:25.786563 progress 45 % (2 MB)
33 02:44:25.790367 progress 50 % (2 MB)
34 02:44:25.794684 progress 55 % (2 MB)
35 02:44:25.798972 progress 60 % (3 MB)
36 02:44:25.802816 progress 65 % (3 MB)
37 02:44:25.807176 progress 70 % (3 MB)
38 02:44:25.810960 progress 75 % (4 MB)
39 02:44:25.815079 progress 80 % (4 MB)
40 02:44:25.818775 progress 85 % (4 MB)
41 02:44:25.822941 progress 90 % (4 MB)
42 02:44:25.827003 progress 95 % (5 MB)
43 02:44:25.830392 progress 100 % (5 MB)
44 02:44:25.831117 5 MB downloaded in 0.12 s (44.51 MB/s)
45 02:44:25.831723 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:44:25.832696 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:44:25.832996 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:44:25.833270 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:44:25.834139 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-151-g1b5fe53681d9/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/kernel/Image
51 02:44:25.834478 saving as /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/kernel/Image
52 02:44:25.834699 total size: 39019008 (37 MB)
53 02:44:25.834921 No compression specified
54 02:44:25.872628 progress 0 % (0 MB)
55 02:44:25.901600 progress 5 % (1 MB)
56 02:44:25.928747 progress 10 % (3 MB)
57 02:44:25.957110 progress 15 % (5 MB)
58 02:44:25.982162 progress 20 % (7 MB)
59 02:44:26.006639 progress 25 % (9 MB)
60 02:44:26.031413 progress 30 % (11 MB)
61 02:44:26.055912 progress 35 % (13 MB)
62 02:44:26.080829 progress 40 % (14 MB)
63 02:44:26.104864 progress 45 % (16 MB)
64 02:44:26.130094 progress 50 % (18 MB)
65 02:44:26.155005 progress 55 % (20 MB)
66 02:44:26.179872 progress 60 % (22 MB)
67 02:44:26.204257 progress 65 % (24 MB)
68 02:44:26.229106 progress 70 % (26 MB)
69 02:44:26.253640 progress 75 % (27 MB)
70 02:44:26.277952 progress 80 % (29 MB)
71 02:44:26.302423 progress 85 % (31 MB)
72 02:44:26.326392 progress 90 % (33 MB)
73 02:44:26.350973 progress 95 % (35 MB)
74 02:44:26.374353 progress 100 % (37 MB)
75 02:44:26.375117 37 MB downloaded in 0.54 s (68.86 MB/s)
76 02:44:26.375600 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:44:26.376450 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:44:26.376726 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:44:26.376993 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:44:26.379503 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-151-g1b5fe53681d9/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:44:26.379789 saving as /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:44:26.380023 total size: 53173 (0 MB)
84 02:44:26.380248 No compression specified
85 02:44:26.420940 progress 61 % (0 MB)
86 02:44:26.421886 progress 100 % (0 MB)
87 02:44:26.422523 0 MB downloaded in 0.04 s (1.19 MB/s)
88 02:44:26.423102 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:44:26.423968 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:44:26.424330 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:44:26.424618 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:44:26.425262 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 02:44:26.425603 saving as /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/nfsrootfs/full.rootfs.tar
95 02:44:26.425824 total size: 107552908 (102 MB)
96 02:44:26.426097 Using unxz to decompress xz
97 02:44:26.465945 progress 0 % (0 MB)
98 02:44:27.127721 progress 5 % (5 MB)
99 02:44:27.855152 progress 10 % (10 MB)
100 02:44:28.577617 progress 15 % (15 MB)
101 02:44:29.339343 progress 20 % (20 MB)
102 02:44:29.911406 progress 25 % (25 MB)
103 02:44:30.534581 progress 30 % (30 MB)
104 02:44:31.274160 progress 35 % (35 MB)
105 02:44:31.640415 progress 40 % (41 MB)
106 02:44:32.073922 progress 45 % (46 MB)
107 02:44:32.767929 progress 50 % (51 MB)
108 02:44:33.449145 progress 55 % (56 MB)
109 02:44:34.201688 progress 60 % (61 MB)
110 02:44:34.954614 progress 65 % (66 MB)
111 02:44:35.686961 progress 70 % (71 MB)
112 02:44:36.474359 progress 75 % (76 MB)
113 02:44:37.177843 progress 80 % (82 MB)
114 02:44:37.903664 progress 85 % (87 MB)
115 02:44:38.654731 progress 90 % (92 MB)
116 02:44:39.392516 progress 95 % (97 MB)
117 02:44:40.139278 progress 100 % (102 MB)
118 02:44:40.151389 102 MB downloaded in 13.73 s (7.47 MB/s)
119 02:44:40.152120 end: 1.4.1 http-download (duration 00:00:14) [common]
121 02:44:40.153198 end: 1.4 download-retry (duration 00:00:14) [common]
122 02:44:40.153584 start: 1.5 download-retry (timeout 00:09:46) [common]
123 02:44:40.153964 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 02:44:40.154684 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-151-g1b5fe53681d9/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/modules.tar.xz
125 02:44:40.154969 saving as /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/modules/modules.tar
126 02:44:40.155287 total size: 11626196 (11 MB)
127 02:44:40.155531 Using unxz to decompress xz
128 02:44:40.194215 progress 0 % (0 MB)
129 02:44:40.260891 progress 5 % (0 MB)
130 02:44:40.344557 progress 10 % (1 MB)
131 02:44:40.429469 progress 15 % (1 MB)
132 02:44:40.511914 progress 20 % (2 MB)
133 02:44:40.592062 progress 25 % (2 MB)
134 02:44:40.671204 progress 30 % (3 MB)
135 02:44:40.749590 progress 35 % (3 MB)
136 02:44:40.826663 progress 40 % (4 MB)
137 02:44:40.910631 progress 45 % (5 MB)
138 02:44:40.991777 progress 50 % (5 MB)
139 02:44:41.077160 progress 55 % (6 MB)
140 02:44:41.152744 progress 60 % (6 MB)
141 02:44:41.239736 progress 65 % (7 MB)
142 02:44:41.321778 progress 70 % (7 MB)
143 02:44:41.404812 progress 75 % (8 MB)
144 02:44:41.493969 progress 80 % (8 MB)
145 02:44:41.593357 progress 85 % (9 MB)
146 02:44:41.668158 progress 90 % (10 MB)
147 02:44:41.748595 progress 95 % (10 MB)
148 02:44:41.820801 progress 100 % (11 MB)
149 02:44:41.834519 11 MB downloaded in 1.68 s (6.60 MB/s)
150 02:44:41.835087 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:44:41.835908 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:44:41.836482 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 02:44:41.837070 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 02:44:51.865976 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/675401/extract-nfsrootfs-ugulg3yo
156 02:44:51.866549 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 02:44:51.866844 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 02:44:51.867453 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at
159 02:44:51.867920 makedir: /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin
160 02:44:51.868332 makedir: /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/tests
161 02:44:51.868687 makedir: /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/results
162 02:44:51.869025 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-add-keys
163 02:44:51.869564 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-add-sources
164 02:44:51.870077 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-background-process-start
165 02:44:51.870602 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-background-process-stop
166 02:44:51.871178 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-common-functions
167 02:44:51.871685 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-echo-ipv4
168 02:44:51.872245 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-install-packages
169 02:44:51.872765 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-installed-packages
170 02:44:51.873282 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-os-build
171 02:44:51.873855 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-probe-channel
172 02:44:51.874356 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-probe-ip
173 02:44:51.874839 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-target-ip
174 02:44:51.875328 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-target-mac
175 02:44:51.875834 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-target-storage
176 02:44:51.876438 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-case
177 02:44:51.876969 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-event
178 02:44:51.877514 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-feedback
179 02:44:51.878081 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-raise
180 02:44:51.878620 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-reference
181 02:44:51.879119 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-runner
182 02:44:51.879629 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-set
183 02:44:51.880231 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-test-shell
184 02:44:51.880783 Updating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-install-packages (oe)
185 02:44:51.881354 Updating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/bin/lava-installed-packages (oe)
186 02:44:51.881890 Creating /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/environment
187 02:44:51.882325 LAVA metadata
188 02:44:51.882595 - LAVA_JOB_ID=675401
189 02:44:51.882829 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:44:51.883213 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 02:44:51.884249 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:44:51.884584 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 02:44:51.884811 skipped lava-vland-overlay
194 02:44:51.885064 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:44:51.885328 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 02:44:51.885554 skipped lava-multinode-overlay
197 02:44:51.885818 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:44:51.886102 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 02:44:51.886383 Loading test definitions
200 02:44:51.886684 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 02:44:51.886908 Using /lava-675401 at stage 0
202 02:44:51.888245 uuid=675401_1.6.2.4.1 testdef=None
203 02:44:51.888573 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:44:51.888868 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 02:44:51.890847 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:44:51.891704 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 02:44:51.894309 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:44:51.895153 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 02:44:51.897478 runner path: /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/0/tests/0_dmesg test_uuid 675401_1.6.2.4.1
212 02:44:51.898068 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:44:51.898827 Creating lava-test-runner.conf files
215 02:44:51.899027 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/675401/lava-overlay-7dxie7at/lava-675401/0 for stage 0
216 02:44:51.899392 - 0_dmesg
217 02:44:51.899732 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:44:51.900023 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 02:44:51.922323 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:44:51.922744 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 02:44:51.923005 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:44:51.923271 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:44:51.923535 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 02:44:52.555500 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:44:52.555938 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 02:44:52.556226 extracting modules file /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675401/extract-nfsrootfs-ugulg3yo
227 02:44:54.078077 extracting modules file /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675401/extract-overlay-ramdisk-lqavri67/ramdisk
228 02:44:55.567952 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:44:55.568447 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 02:44:55.568726 [common] Applying overlay to NFS
231 02:44:55.568939 [common] Applying overlay /var/lib/lava/dispatcher/tmp/675401/compress-overlay-1vxblssr/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/675401/extract-nfsrootfs-ugulg3yo
232 02:44:55.598439 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:44:55.598855 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 02:44:55.599128 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 02:44:55.599361 Converting downloaded kernel to a uImage
236 02:44:55.599674 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/kernel/Image /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/kernel/uImage
237 02:44:56.000735 output: Image Name:
238 02:44:56.001156 output: Created: Fri Aug 30 02:44:55 2024
239 02:44:56.001382 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:44:56.001599 output: Data Size: 39019008 Bytes = 38104.50 KiB = 37.21 MiB
241 02:44:56.001819 output: Load Address: 01080000
242 02:44:56.002032 output: Entry Point: 01080000
243 02:44:56.002238 output:
244 02:44:56.002577 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:44:56.002853 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:44:56.003131 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 02:44:56.003391 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:44:56.003659 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 02:44:56.003924 Building ramdisk /var/lib/lava/dispatcher/tmp/675401/extract-overlay-ramdisk-lqavri67/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/675401/extract-overlay-ramdisk-lqavri67/ramdisk
250 02:44:58.273010 >> 171777 blocks
251 02:45:05.914501 Adding RAMdisk u-boot header.
252 02:45:05.915148 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/675401/extract-overlay-ramdisk-lqavri67/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/675401/extract-overlay-ramdisk-lqavri67/ramdisk.cpio.gz.uboot
253 02:45:06.166203 output: Image Name:
254 02:45:06.166618 output: Created: Fri Aug 30 02:45:05 2024
255 02:45:06.166834 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:45:06.167043 output: Data Size: 23942653 Bytes = 23381.50 KiB = 22.83 MiB
257 02:45:06.167250 output: Load Address: 00000000
258 02:45:06.167449 output: Entry Point: 00000000
259 02:45:06.167649 output:
260 02:45:06.168533 rename /var/lib/lava/dispatcher/tmp/675401/extract-overlay-ramdisk-lqavri67/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot
261 02:45:06.169259 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:45:06.169802 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 02:45:06.170329 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 02:45:06.170779 No LXC device requested
265 02:45:06.171275 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:45:06.171778 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 02:45:06.172304 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:45:06.172714 Checking files for TFTP limit of 4294967296 bytes.
269 02:45:06.175336 end: 1 tftp-deploy (duration 00:00:40) [common]
270 02:45:06.175895 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:45:06.176456 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:45:06.176955 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:45:06.177452 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:45:06.177971 Using kernel file from prepare-kernel: 675401/tftp-deploy-09nvgb1d/kernel/uImage
275 02:45:06.178592 substitutions:
276 02:45:06.178994 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:45:06.179395 - {DTB_ADDR}: 0x01070000
278 02:45:06.179793 - {DTB}: 675401/tftp-deploy-09nvgb1d/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 02:45:06.180223 - {INITRD}: 675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot
280 02:45:06.180622 - {KERNEL_ADDR}: 0x01080000
281 02:45:06.181014 - {KERNEL}: 675401/tftp-deploy-09nvgb1d/kernel/uImage
282 02:45:06.181406 - {LAVA_MAC}: None
283 02:45:06.181838 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/675401/extract-nfsrootfs-ugulg3yo
284 02:45:06.182236 - {NFS_SERVER_IP}: 192.168.6.2
285 02:45:06.182627 - {PRESEED_CONFIG}: None
286 02:45:06.183018 - {PRESEED_LOCAL}: None
287 02:45:06.183406 - {RAMDISK_ADDR}: 0x08000000
288 02:45:06.183792 - {RAMDISK}: 675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot
289 02:45:06.184207 - {ROOT_PART}: None
290 02:45:06.184599 - {ROOT}: None
291 02:45:06.184989 - {SERVER_IP}: 192.168.6.2
292 02:45:06.185376 - {TEE_ADDR}: 0x83000000
293 02:45:06.185760 - {TEE}: None
294 02:45:06.186149 Parsed boot commands:
295 02:45:06.186525 - setenv autoload no
296 02:45:06.186910 - setenv initrd_high 0xffffffff
297 02:45:06.187294 - setenv fdt_high 0xffffffff
298 02:45:06.187674 - dhcp
299 02:45:06.188080 - setenv serverip 192.168.6.2
300 02:45:06.188469 - tftpboot 0x01080000 675401/tftp-deploy-09nvgb1d/kernel/uImage
301 02:45:06.188855 - tftpboot 0x08000000 675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot
302 02:45:06.189241 - tftpboot 0x01070000 675401/tftp-deploy-09nvgb1d/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 02:45:06.189628 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/675401/extract-nfsrootfs-ugulg3yo,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:45:06.190024 - bootm 0x01080000 0x08000000 0x01070000
305 02:45:06.190515 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:45:06.192000 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:45:06.192422 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 02:45:06.207779 Setting prompt string to ['lava-test: # ']
310 02:45:06.209269 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:45:06.209856 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:45:06.210381 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:45:06.210901 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:45:06.212249 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 02:45:06.245609 >> OK - accepted request
316 02:45:06.247665 Returned 0 in 0 seconds
317 02:45:06.348621 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:45:06.350220 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:45:06.350795 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:45:06.351299 Setting prompt string to ['Hit any key to stop autoboot']
322 02:45:06.351757 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:45:06.353340 Trying 192.168.56.21...
324 02:45:06.353817 Connected to conserv1.
325 02:45:06.354224 Escape character is '^]'.
326 02:45:06.354640
327 02:45:06.355054 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 02:45:06.355466
329 02:45:14.221821 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 02:45:14.222398 bl2_stage_init 0x01
331 02:45:14.222810 bl2_stage_init 0x81
332 02:45:14.227377 hw id: 0x0000 - pwm id 0x01
333 02:45:14.227803 bl2_stage_init 0xc1
334 02:45:14.228285 bl2_stage_init 0x02
335 02:45:14.228682
336 02:45:14.233040 L0:00000000
337 02:45:14.233478 L1:00000703
338 02:45:14.233884 L2:00008067
339 02:45:14.234272 L3:15000000
340 02:45:14.234671 S1:00000000
341 02:45:14.239047 B2:20282000
342 02:45:14.239482 B1:a0f83180
343 02:45:14.239876
344 02:45:14.240303 TE: 69766
345 02:45:14.240698
346 02:45:14.244637 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 02:45:14.245064
348 02:45:14.245460 Board ID = 1
349 02:45:14.250401 Set cpu clk to 24M
350 02:45:14.250822 Set clk81 to 24M
351 02:45:14.251212 Use GP1_pll as DSU clk.
352 02:45:14.253678 DSU clk: 1200 Mhz
353 02:45:14.254087 CPU clk: 1200 MHz
354 02:45:14.259220 Set clk81 to 166.6M
355 02:45:14.264777 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 02:45:14.265197 board id: 1
357 02:45:14.272077 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:45:14.283667 fw parse done
359 02:45:14.288807 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:45:14.331458 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:45:14.343135 PIEI prepare done
362 02:45:14.343548 fastboot data load
363 02:45:14.343943 fastboot data verify
364 02:45:14.348846 verify result: 266
365 02:45:14.354343 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 02:45:14.354766 LPDDR4 probe
367 02:45:14.355166 ddr clk to 1584MHz
368 02:45:14.361486 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:45:14.398655
370 02:45:14.399088 dmc_version 0001
371 02:45:14.405355 Check phy result
372 02:45:14.412322 INFO : End of CA training
373 02:45:14.412742 INFO : End of initialization
374 02:45:14.417806 INFO : Training has run successfully!
375 02:45:14.418227 Check phy result
376 02:45:14.423474 INFO : End of initialization
377 02:45:14.423897 INFO : End of read enable training
378 02:45:14.426654 INFO : End of fine write leveling
379 02:45:14.432225 INFO : End of Write leveling coarse delay
380 02:45:14.437791 INFO : Training has run successfully!
381 02:45:14.438210 Check phy result
382 02:45:14.438613 INFO : End of initialization
383 02:45:14.443481 INFO : End of read dq deskew training
384 02:45:14.446822 INFO : End of MPR read delay center optimization
385 02:45:14.452316 INFO : End of write delay center optimization
386 02:45:14.457856 INFO : End of read delay center optimization
387 02:45:14.458279 INFO : End of max read latency training
388 02:45:14.463422 INFO : Training has run successfully!
389 02:45:14.463855 1D training succeed
390 02:45:14.470856 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:45:14.518359 Check phy result
392 02:45:14.518806 INFO : End of initialization
393 02:45:14.540843 INFO : End of 2D read delay Voltage center optimization
394 02:45:14.559842 INFO : End of 2D read delay Voltage center optimization
395 02:45:14.611713 INFO : End of 2D write delay Voltage center optimization
396 02:45:14.661959 INFO : End of 2D write delay Voltage center optimization
397 02:45:14.667578 INFO : Training has run successfully!
398 02:45:14.668024
399 02:45:14.668433 channel==0
400 02:45:14.673089 RxClkDly_Margin_A0==88 ps 9
401 02:45:14.673523 TxDqDly_Margin_A0==98 ps 10
402 02:45:14.678676 RxClkDly_Margin_A1==88 ps 9
403 02:45:14.679085 TxDqDly_Margin_A1==88 ps 9
404 02:45:14.679483 TrainedVREFDQ_A0==74
405 02:45:14.684283 TrainedVREFDQ_A1==74
406 02:45:14.684698 VrefDac_Margin_A0==24
407 02:45:14.685086 DeviceVref_Margin_A0==40
408 02:45:14.689860 VrefDac_Margin_A1==23
409 02:45:14.690267 DeviceVref_Margin_A1==40
410 02:45:14.690655
411 02:45:14.691044
412 02:45:14.691432 channel==1
413 02:45:14.695474 RxClkDly_Margin_A0==88 ps 9
414 02:45:14.695885 TxDqDly_Margin_A0==98 ps 10
415 02:45:14.701092 RxClkDly_Margin_A1==88 ps 9
416 02:45:14.701504 TxDqDly_Margin_A1==78 ps 8
417 02:45:14.706673 TrainedVREFDQ_A0==78
418 02:45:14.707084 TrainedVREFDQ_A1==75
419 02:45:14.707477 VrefDac_Margin_A0==23
420 02:45:14.712292 DeviceVref_Margin_A0==36
421 02:45:14.712698 VrefDac_Margin_A1==22
422 02:45:14.717976 DeviceVref_Margin_A1==39
423 02:45:14.718380
424 02:45:14.718770 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:45:14.719156
426 02:45:14.751539 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000014 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
427 02:45:14.752081 2D training succeed
428 02:45:14.757112 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:45:14.762736 auto size-- 65535DDR cs0 size: 2048MB
430 02:45:14.763149 DDR cs1 size: 2048MB
431 02:45:14.768281 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:45:14.768693 cs0 DataBus test pass
433 02:45:14.773895 cs1 DataBus test pass
434 02:45:14.774304 cs0 AddrBus test pass
435 02:45:14.774696 cs1 AddrBus test pass
436 02:45:14.775082
437 02:45:14.779480 100bdlr_step_size ps== 478
438 02:45:14.779907 result report
439 02:45:14.785099 boot times 0Enable ddr reg access
440 02:45:14.790239 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:45:14.803206 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 02:45:15.457807 bl2z: ptr: 05129330, size: 00001e40
443 02:45:15.466289 0.0;M3 CHK:0;cm4_sp_mode 0
444 02:45:15.466742 MVN_1=0x00000000
445 02:45:15.467148 MVN_2=0x00000000
446 02:45:15.477671 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 02:45:15.478109 OPS=0x04
448 02:45:15.478514 ring efuse init
449 02:45:15.480632 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 02:45:15.486410 [0.017310 Inits done]
451 02:45:15.486830 secure task start!
452 02:45:15.487231 high task start!
453 02:45:15.487629 low task start!
454 02:45:15.489712 run into bl31
455 02:45:15.499281 NOTICE: BL31: v1.3(release):4fc40b1
456 02:45:15.506192 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 02:45:15.506629 NOTICE: BL31: G12A normal boot!
458 02:45:15.522564 NOTICE: BL31: BL33 decompress pass
459 02:45:15.528279 ERROR: Error initializing runtime service opteed_fast
460 02:45:16.772985 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 02:45:16.773566 bl2_stage_init 0x01
462 02:45:16.773991 bl2_stage_init 0x81
463 02:45:16.778676 hw id: 0x0000 - pwm id 0x01
464 02:45:16.779145 bl2_stage_init 0xc1
465 02:45:16.779556 bl2_stage_init 0x02
466 02:45:16.779958
467 02:45:16.784466 L0:00000000
468 02:45:16.784979 L1:00000703
469 02:45:16.785375 L2:00008067
470 02:45:16.785757 L3:15000000
471 02:45:16.786138 S1:00000000
472 02:45:16.787806 B2:20282000
473 02:45:16.788236 B1:a0f83180
474 02:45:16.788622
475 02:45:16.789004 TE: 69818
476 02:45:16.789388
477 02:45:16.793495 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 02:45:16.799214
479 02:45:16.799626 Board ID = 1
480 02:45:16.800039 Set cpu clk to 24M
481 02:45:16.800424 Set clk81 to 24M
482 02:45:16.804496 Use GP1_pll as DSU clk.
483 02:45:16.804915 DSU clk: 1200 Mhz
484 02:45:16.805301 CPU clk: 1200 MHz
485 02:45:16.807927 Set clk81 to 166.6M
486 02:45:16.813493 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 02:45:16.813914 board id: 1
488 02:45:16.823249 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 02:45:16.833858 fw parse done
490 02:45:16.838915 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 02:45:16.882594 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 02:45:16.893533 PIEI prepare done
493 02:45:16.893961 fastboot data load
494 02:45:16.894354 fastboot data verify
495 02:45:16.899033 verify result: 266
496 02:45:16.904583 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 02:45:16.904997 LPDDR4 probe
498 02:45:16.905384 ddr clk to 1584MHz
499 02:45:16.913575 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 02:45:18.269622 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
501 02:45:18.270211 bl2_stage_init 0x01
502 02:45:18.270632 bl2_stage_init 0x81
503 02:45:18.275167 hw id: 0x0000 - pwm id 0x01
504 02:45:18.275654 bl2_stage_init 0xc1
505 02:45:18.280803 bl2_stage_init 0x02
506 02:45:18.281245
507 02:45:18.281657 L0:00000000
508 02:45:18.282062 L1:00000703
509 02:45:18.282465 L2:00008067
510 02:45:18.282869 L3:15000000
511 02:45:18.286355 S1:00000000
512 02:45:18.286789 B2:20282000
513 02:45:18.287195 B1:a0f83180
514 02:45:18.287598
515 02:45:18.288022 TE: 68467
516 02:45:18.288431
517 02:45:18.291968 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
518 02:45:18.292423
519 02:45:18.297587 Board ID = 1
520 02:45:18.298014 Set cpu clk to 24M
521 02:45:18.298418 Set clk81 to 24M
522 02:45:18.303173 Use GP1_pll as DSU clk.
523 02:45:18.303601 DSU clk: 1200 Mhz
524 02:45:18.304027 CPU clk: 1200 MHz
525 02:45:18.308750 Set clk81 to 166.6M
526 02:45:18.314345 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
527 02:45:18.314782 board id: 1
528 02:45:18.320618 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
529 02:45:18.332318 fw parse done
530 02:45:18.337273 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
531 02:45:18.380804 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
532 02:45:18.391766 PIEI prepare done
533 02:45:18.392246 fastboot data load
534 02:45:18.392656 fastboot data verify
535 02:45:18.397381 verify result: 266
536 02:45:18.402934 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
537 02:45:18.403377 LPDDR4 probe
538 02:45:18.403783 ddr clk to 1584MHz
539 02:45:18.410911 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 02:45:18.448206
541 02:45:18.448649 dmc_version 0001
542 02:45:18.454897 Check phy result
543 02:45:18.460810 INFO : End of CA training
544 02:45:18.461233 INFO : End of initialization
545 02:45:18.466409 INFO : Training has run successfully!
546 02:45:18.466833 Check phy result
547 02:45:18.472002 INFO : End of initialization
548 02:45:18.472428 INFO : End of read enable training
549 02:45:18.475361 INFO : End of fine write leveling
550 02:45:18.480904 INFO : End of Write leveling coarse delay
551 02:45:18.486617 INFO : Training has run successfully!
552 02:45:18.487041 Check phy result
553 02:45:18.487458 INFO : End of initialization
554 02:45:18.492139 INFO : End of read dq deskew training
555 02:45:18.497743 INFO : End of MPR read delay center optimization
556 02:45:18.498173 INFO : End of write delay center optimization
557 02:45:18.503383 INFO : End of read delay center optimization
558 02:45:18.508949 INFO : End of max read latency training
559 02:45:18.509379 INFO : Training has run successfully!
560 02:45:18.514615 1D training succeed
561 02:45:18.520456 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
562 02:45:18.568038 Check phy result
563 02:45:18.568479 INFO : End of initialization
564 02:45:18.590353 INFO : End of 2D read delay Voltage center optimization
565 02:45:18.609598 INFO : End of 2D read delay Voltage center optimization
566 02:45:18.661377 INFO : End of 2D write delay Voltage center optimization
567 02:45:18.710739 INFO : End of 2D write delay Voltage center optimization
568 02:45:18.716177 INFO : Training has run successfully!
569 02:45:18.716603
570 02:45:18.717009 channel==0
571 02:45:18.721772 RxClkDly_Margin_A0==88 ps 9
572 02:45:18.722211 TxDqDly_Margin_A0==88 ps 9
573 02:45:18.725038 RxClkDly_Margin_A1==88 ps 9
574 02:45:18.725457 TxDqDly_Margin_A1==88 ps 9
575 02:45:18.730693 TrainedVREFDQ_A0==74
576 02:45:18.731116 TrainedVREFDQ_A1==75
577 02:45:18.731519 VrefDac_Margin_A0==24
578 02:45:18.736194 DeviceVref_Margin_A0==40
579 02:45:18.736623 VrefDac_Margin_A1==23
580 02:45:18.741823 DeviceVref_Margin_A1==39
581 02:45:18.742252
582 02:45:18.742657
583 02:45:18.743054 channel==1
584 02:45:18.743449 RxClkDly_Margin_A0==88 ps 9
585 02:45:18.745131 TxDqDly_Margin_A0==88 ps 9
586 02:45:18.750737 RxClkDly_Margin_A1==78 ps 8
587 02:45:18.751157 TxDqDly_Margin_A1==78 ps 8
588 02:45:18.751564 TrainedVREFDQ_A0==75
589 02:45:18.756252 TrainedVREFDQ_A1==77
590 02:45:18.756686 VrefDac_Margin_A0==23
591 02:45:18.761814 DeviceVref_Margin_A0==39
592 02:45:18.762237 VrefDac_Margin_A1==22
593 02:45:18.762636 DeviceVref_Margin_A1==37
594 02:45:18.763028
595 02:45:18.770880 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
596 02:45:18.771311
597 02:45:18.798917 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
598 02:45:18.799409 2D training succeed
599 02:45:18.804508 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
600 02:45:18.810059 auto size-- 65535DDR cs0 size: 2048MB
601 02:45:18.810493 DDR cs1 size: 2048MB
602 02:45:18.815767 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
603 02:45:18.816226 cs0 DataBus test pass
604 02:45:18.821283 cs1 DataBus test pass
605 02:45:18.821708 cs0 AddrBus test pass
606 02:45:18.826816 cs1 AddrBus test pass
607 02:45:18.827241
608 02:45:18.827642 100bdlr_step_size ps== 464
609 02:45:18.828075 result report
610 02:45:18.832415 boot times 0Enable ddr reg access
611 02:45:18.838773 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
612 02:45:18.851642 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
613 02:45:19.507193 bl2z: ptr: 05129330, size: 00001e40
614 02:45:19.513978 0.0;M3 CHK:0;cm4_sp_mode 0
615 02:45:19.514566 MVN_1=0x00000000
616 02:45:19.515038 MVN_2=0x00000000
617 02:45:19.525495 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
618 02:45:19.526025 OPS=0x04
619 02:45:19.526495 ring efuse init
620 02:45:19.531049 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
621 02:45:19.531571 [0.017310 Inits done]
622 02:45:19.532086 secure task start!
623 02:45:19.538311 high task start!
624 02:45:19.538811 low task start!
625 02:45:19.539272 run into bl31
626 02:45:19.546965 NOTICE: BL31: v1.3(release):4fc40b1
627 02:45:19.554727 NOTICE: BL31: Built : 15:57:33, May 22 2019
628 02:45:19.555235 NOTICE: BL31: G12A normal boot!
629 02:45:19.570371 NOTICE: BL31: BL33 decompress pass
630 02:45:19.576085 ERROR: Error initializing runtime service opteed_fast
631 02:45:20.824277 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
632 02:45:20.825019 bl2_stage_init 0x01
633 02:45:20.825560 bl2_stage_init 0x81
634 02:45:20.829760 hw id: 0x0000 - pwm id 0x01
635 02:45:20.830160 bl2_stage_init 0xc1
636 02:45:20.830425 bl2_stage_init 0x02
637 02:45:20.830668
638 02:45:20.835326 L0:00000000
639 02:45:20.835712 L1:00000703
640 02:45:20.836031 L2:00008067
641 02:45:20.836296 L3:15000000
642 02:45:20.836615 S1:00000000
643 02:45:20.840965 B2:20282000
644 02:45:20.841574 B1:a0f83180
645 02:45:20.842017
646 02:45:20.842275 TE: 71927
647 02:45:20.842519
648 02:45:20.846507 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
649 02:45:20.846860
650 02:45:20.852319 Board ID = 1
651 02:45:20.852881 Set cpu clk to 24M
652 02:45:20.853584 Set clk81 to 24M
653 02:45:20.857973 Use GP1_pll as DSU clk.
654 02:45:20.858479 DSU clk: 1200 Mhz
655 02:45:20.858907 CPU clk: 1200 MHz
656 02:45:20.859328 Set clk81 to 166.6M
657 02:45:20.869264 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
658 02:45:20.869870 board id: 1
659 02:45:20.875415 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
660 02:45:20.886026 fw parse done
661 02:45:20.892118 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
662 02:45:20.933770 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
663 02:45:20.945673 PIEI prepare done
664 02:45:20.946218 fastboot data load
665 02:45:20.946645 fastboot data verify
666 02:45:20.951341 verify result: 266
667 02:45:20.956833 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
668 02:45:20.957348 LPDDR4 probe
669 02:45:20.957760 ddr clk to 1584MHz
670 02:45:20.963819 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
671 02:45:21.001135
672 02:45:21.001740 dmc_version 0001
673 02:45:21.008323 Check phy result
674 02:45:21.014596 INFO : End of CA training
675 02:45:21.015063 INFO : End of initialization
676 02:45:21.020380 INFO : Training has run successfully!
677 02:45:21.020915 Check phy result
678 02:45:21.025870 INFO : End of initialization
679 02:45:21.026361 INFO : End of read enable training
680 02:45:21.031422 INFO : End of fine write leveling
681 02:45:21.037015 INFO : End of Write leveling coarse delay
682 02:45:21.037510 INFO : Training has run successfully!
683 02:45:21.037926 Check phy result
684 02:45:21.042642 INFO : End of initialization
685 02:45:21.043165 INFO : End of read dq deskew training
686 02:45:21.048188 INFO : End of MPR read delay center optimization
687 02:45:21.054193 INFO : End of write delay center optimization
688 02:45:21.059518 INFO : End of read delay center optimization
689 02:45:21.059966 INFO : End of max read latency training
690 02:45:21.065008 INFO : Training has run successfully!
691 02:45:21.065488 1D training succeed
692 02:45:21.073208 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 02:45:21.121941 Check phy result
694 02:45:21.122488 INFO : End of initialization
695 02:45:21.144014 INFO : End of 2D read delay Voltage center optimization
696 02:45:21.163329 INFO : End of 2D read delay Voltage center optimization
697 02:45:21.214524 INFO : End of 2D write delay Voltage center optimization
698 02:45:21.265023 INFO : End of 2D write delay Voltage center optimization
699 02:45:21.270484 INFO : Training has run successfully!
700 02:45:21.270944
701 02:45:21.271180 channel==0
702 02:45:21.276476 RxClkDly_Margin_A0==78 ps 8
703 02:45:21.276886 TxDqDly_Margin_A0==98 ps 10
704 02:45:21.278935 RxClkDly_Margin_A1==78 ps 8
705 02:45:21.279280 TxDqDly_Margin_A1==88 ps 9
706 02:45:21.284412 TrainedVREFDQ_A0==74
707 02:45:21.284814 TrainedVREFDQ_A1==74
708 02:45:21.285029 VrefDac_Margin_A0==24
709 02:45:21.289978 DeviceVref_Margin_A0==40
710 02:45:21.290357 VrefDac_Margin_A1==23
711 02:45:21.295466 DeviceVref_Margin_A1==40
712 02:45:21.295749
713 02:45:21.295961
714 02:45:21.296202 channel==1
715 02:45:21.296405 RxClkDly_Margin_A0==88 ps 9
716 02:45:21.298975 TxDqDly_Margin_A0==98 ps 10
717 02:45:21.304600 RxClkDly_Margin_A1==88 ps 9
718 02:45:21.305010 TxDqDly_Margin_A1==88 ps 9
719 02:45:21.305242 TrainedVREFDQ_A0==78
720 02:45:21.310114 TrainedVREFDQ_A1==78
721 02:45:21.310490 VrefDac_Margin_A0==23
722 02:45:21.315684 DeviceVref_Margin_A0==36
723 02:45:21.316025 VrefDac_Margin_A1==22
724 02:45:21.316260 DeviceVref_Margin_A1==36
725 02:45:21.316478
726 02:45:21.321300 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
727 02:45:21.321667
728 02:45:21.355044 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
729 02:45:21.355464 2D training succeed
730 02:45:21.360627 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
731 02:45:21.366322 auto size-- 65535DDR cs0 size: 2048MB
732 02:45:21.367100 DDR cs1 size: 2048MB
733 02:45:21.371898 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
734 02:45:21.372535 cs0 DataBus test pass
735 02:45:21.372949 cs1 DataBus test pass
736 02:45:21.377417 cs0 AddrBus test pass
737 02:45:21.377985 cs1 AddrBus test pass
738 02:45:21.378396
739 02:45:21.383064 100bdlr_step_size ps== 478
740 02:45:21.383610 result report
741 02:45:21.384051 boot times 0Enable ddr reg access
742 02:45:21.392979 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
743 02:45:21.406593 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
744 02:45:22.062558 bl2z: ptr: 05129330, size: 00001e40
745 02:45:22.069285 0.0;M3 CHK:0;cm4_sp_mode 0
746 02:45:22.069812 MVN_1=0x00000000
747 02:45:22.070218 MVN_2=0x00000000
748 02:45:22.080802 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
749 02:45:22.081326 OPS=0x04
750 02:45:22.081729 ring efuse init
751 02:45:22.083691 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
752 02:45:22.089492 [0.017319 Inits done]
753 02:45:22.089949 secure task start!
754 02:45:22.090345 high task start!
755 02:45:22.090733 low task start!
756 02:45:22.093784 run into bl31
757 02:45:22.102369 NOTICE: BL31: v1.3(release):4fc40b1
758 02:45:22.110316 NOTICE: BL31: Built : 15:57:33, May 22 2019
759 02:45:22.110812 NOTICE: BL31: G12A normal boot!
760 02:45:22.125694 NOTICE: BL31: BL33 decompress pass
761 02:45:22.131460 ERROR: Error initializing runtime service opteed_fast
762 02:45:22.926838
763 02:45:22.927500
764 02:45:22.932303 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
765 02:45:22.932815
766 02:45:22.935818 Model: Libre Computer AML-S905D3-CC Solitude
767 02:45:23.082880 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
768 02:45:23.098410 DRAM: 2 GiB (effective 3.8 GiB)
769 02:45:23.199533 Core: 406 devices, 33 uclasses, devicetree: separate
770 02:45:23.205198 WDT: Not starting watchdog@f0d0
771 02:45:23.230170 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
772 02:45:23.242405 Loading Environment from FAT... Card did not respond to voltage select! : -110
773 02:45:23.246607 ** Bad device specification mmc 0 **
774 02:45:23.257365 Card did not respond to voltage select! : -110
775 02:45:23.265058 ** Bad device specification mmc 0 **
776 02:45:23.265438 Couldn't find partition mmc 0
777 02:45:23.273391 Card did not respond to voltage select! : -110
778 02:45:23.278894 ** Bad device specification mmc 0 **
779 02:45:23.279269 Couldn't find partition mmc 0
780 02:45:23.283975 Error: could not access storage.
781 02:45:23.580456 Net: eth0: ethernet@ff3f0000
782 02:45:23.581151 starting USB...
783 02:45:23.824964 Bus usb@ff500000: Register 3000140 NbrPorts 3
784 02:45:23.825464 Starting the controller
785 02:45:23.832074 USB XHCI 1.10
786 02:45:25.388353 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
787 02:45:25.396692 scanning usb for storage devices... 0 Storage Device(s) found
789 02:45:25.447952 Hit any key to stop autoboot: 1
790 02:45:25.448869 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
791 02:45:25.449417 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
792 02:45:25.449746 Setting prompt string to ['=>']
793 02:45:25.450072 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
794 02:45:25.462691 0
795 02:45:25.463534 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
797 02:45:25.564580 => setenv autoload no
798 02:45:25.565501 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
799 02:45:25.569788 setenv autoload no
801 02:45:25.670971 => setenv initrd_high 0xffffffff
802 02:45:25.671849 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
803 02:45:25.676495 setenv initrd_high 0xffffffff
805 02:45:25.777582 => setenv fdt_high 0xffffffff
806 02:45:25.778203 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
807 02:45:25.782815 setenv fdt_high 0xffffffff
809 02:45:25.884042 => dhcp
810 02:45:25.885109 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
811 02:45:25.889478 dhcp
812 02:45:26.745045 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
813 02:45:26.745702 Speed: 1000, full duplex
814 02:45:26.746180 BOOTP broadcast 1
815 02:45:26.993636 BOOTP broadcast 2
816 02:45:27.494699 BOOTP broadcast 3
817 02:45:28.495839 BOOTP broadcast 4
818 02:45:30.496792 BOOTP broadcast 5
819 02:45:30.511656 DHCP client bound to address 192.168.6.12 (3765 ms)
821 02:45:30.613369 => setenv serverip 192.168.6.2
822 02:45:30.614401 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
823 02:45:30.618829 setenv serverip 192.168.6.2
825 02:45:30.720437 => tftpboot 0x01080000 675401/tftp-deploy-09nvgb1d/kernel/uImage
826 02:45:30.721466 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
827 02:45:30.727928 tftpboot 0x01080000 675401/tftp-deploy-09nvgb1d/kernel/uImage
828 02:45:30.728503 Speed: 1000, full duplex
829 02:45:30.728960 Using ethernet@ff3f0000 device
830 02:45:30.733516 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
831 02:45:30.738920 Filename '675401/tftp-deploy-09nvgb1d/kernel/uImage'.
832 02:45:30.742934 Load address: 0x1080000
833 02:45:33.129075 Loading: *################################################## 37.2 MiB
834 02:45:33.129518 15.6 MiB/s
835 02:45:33.129742 done
836 02:45:33.133714 Bytes transferred = 39019072 (2536240 hex)
838 02:45:33.236168 => tftpboot 0x08000000 675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot
839 02:45:33.236853 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
840 02:45:33.243664 tftpboot 0x08000000 675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot
841 02:45:33.244209 Speed: 1000, full duplex
842 02:45:33.244651 Using ethernet@ff3f0000 device
843 02:45:33.249157 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
844 02:45:33.259078 Filename '675401/tftp-deploy-09nvgb1d/ramdisk/ramdisk.cpio.gz.uboot'.
845 02:45:33.259585 Load address: 0x8000000
846 02:45:34.735400 Loading: *################################################# UDP wrong checksum 00000005 0000baf9
847 02:45:39.735822 T UDP wrong checksum 00000005 0000baf9
848 02:45:44.899188 T UDP wrong checksum 000000ff 0000af06
849 02:45:44.912703 UDP wrong checksum 000000ff 000047f9
850 02:45:49.737730 T UDP wrong checksum 00000005 0000baf9
851 02:46:09.741920 T T T T UDP wrong checksum 00000005 0000baf9
852 02:46:17.360948 T UDP wrong checksum 000000ff 0000db99
853 02:46:17.378108 UDP wrong checksum 000000ff 00006b8c
854 02:46:29.745561 T T
855 02:46:29.746164 Retry count exceeded; starting again
857 02:46:29.747584 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
860 02:46:29.749468 end: 2.4 uboot-commands (duration 00:01:24) [common]
862 02:46:29.750901 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
864 02:46:29.751920 end: 2 uboot-action (duration 00:01:24) [common]
866 02:46:29.753530 Cleaning after the job
867 02:46:29.754073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/ramdisk
868 02:46:29.755352 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/kernel
869 02:46:29.796924 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/dtb
870 02:46:29.797798 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/nfsrootfs
871 02:46:29.957593 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675401/tftp-deploy-09nvgb1d/modules
872 02:46:29.979136 start: 4.1 power-off (timeout 00:00:30) [common]
873 02:46:29.979810 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
874 02:46:30.011038 >> OK - accepted request
875 02:46:30.013275 Returned 0 in 0 seconds
876 02:46:30.114048 end: 4.1 power-off (duration 00:00:00) [common]
878 02:46:30.115028 start: 4.2 read-feedback (timeout 00:10:00) [common]
879 02:46:30.115682 Listened to connection for namespace 'common' for up to 1s
880 02:46:31.116678 Finalising connection for namespace 'common'
881 02:46:31.117360 Disconnecting from shell: Finalise
882 02:46:31.117641 =>
883 02:46:31.218366 end: 4.2 read-feedback (duration 00:00:01) [common]
884 02:46:31.219005 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/675401
885 02:46:33.142791 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/675401
886 02:46:33.143532 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.