Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:38:09.661865 lava-dispatcher, installed at version: 2024.01
2 04:38:09.662649 start: 0 validate
3 04:38:09.663126 Start time: 2024-08-30 04:38:09.663095+00:00 (UTC)
4 04:38:09.663659 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:38:09.664215 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:38:09.701783 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:38:09.702386 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fkernel%2FImage exists
8 04:38:09.730951 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:38:09.731603 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:38:09.757807 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:38:09.758305 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:38:09.791645 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:38:09.792343 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fmodules.tar.xz exists
14 04:38:09.833668 validate duration: 0.17
16 04:38:09.834519 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:38:09.834846 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:38:09.835166 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:38:09.835738 Not decompressing ramdisk as can be used compressed.
20 04:38:09.836211 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 04:38:09.836498 saving as /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/ramdisk/initrd.cpio.gz
22 04:38:09.836777 total size: 5628182 (5 MB)
23 04:38:09.874855 progress 0 % (0 MB)
24 04:38:09.879086 progress 5 % (0 MB)
25 04:38:09.883687 progress 10 % (0 MB)
26 04:38:09.887517 progress 15 % (0 MB)
27 04:38:09.891821 progress 20 % (1 MB)
28 04:38:09.895639 progress 25 % (1 MB)
29 04:38:09.899946 progress 30 % (1 MB)
30 04:38:09.904097 progress 35 % (1 MB)
31 04:38:09.907794 progress 40 % (2 MB)
32 04:38:09.911865 progress 45 % (2 MB)
33 04:38:09.915486 progress 50 % (2 MB)
34 04:38:09.919494 progress 55 % (2 MB)
35 04:38:09.923501 progress 60 % (3 MB)
36 04:38:09.927071 progress 65 % (3 MB)
37 04:38:09.931010 progress 70 % (3 MB)
38 04:38:09.934569 progress 75 % (4 MB)
39 04:38:09.938548 progress 80 % (4 MB)
40 04:38:09.942104 progress 85 % (4 MB)
41 04:38:09.946053 progress 90 % (4 MB)
42 04:38:09.949733 progress 95 % (5 MB)
43 04:38:09.952980 progress 100 % (5 MB)
44 04:38:09.953619 5 MB downloaded in 0.12 s (45.94 MB/s)
45 04:38:09.954175 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:38:09.955085 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:38:09.955398 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:38:09.955685 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:38:09.956177 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/kernel/Image
51 04:38:09.956456 saving as /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/kernel/Image
52 04:38:09.956676 total size: 39019008 (37 MB)
53 04:38:09.956894 No compression specified
54 04:38:09.991425 progress 0 % (0 MB)
55 04:38:10.017171 progress 5 % (1 MB)
56 04:38:10.041738 progress 10 % (3 MB)
57 04:38:10.065961 progress 15 % (5 MB)
58 04:38:10.090441 progress 20 % (7 MB)
59 04:38:10.114658 progress 25 % (9 MB)
60 04:38:10.139706 progress 30 % (11 MB)
61 04:38:10.164189 progress 35 % (13 MB)
62 04:38:10.189303 progress 40 % (14 MB)
63 04:38:10.213842 progress 45 % (16 MB)
64 04:38:10.238407 progress 50 % (18 MB)
65 04:38:10.262715 progress 55 % (20 MB)
66 04:38:10.287821 progress 60 % (22 MB)
67 04:38:10.312464 progress 65 % (24 MB)
68 04:38:10.337349 progress 70 % (26 MB)
69 04:38:10.361881 progress 75 % (27 MB)
70 04:38:10.385812 progress 80 % (29 MB)
71 04:38:10.410175 progress 85 % (31 MB)
72 04:38:10.434137 progress 90 % (33 MB)
73 04:38:10.458319 progress 95 % (35 MB)
74 04:38:10.482338 progress 100 % (37 MB)
75 04:38:10.483049 37 MB downloaded in 0.53 s (70.70 MB/s)
76 04:38:10.483521 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:38:10.484405 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:38:10.484691 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:38:10.484958 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:38:10.485439 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:38:10.485690 saving as /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:38:10.485897 total size: 54667 (0 MB)
84 04:38:10.486106 No compression specified
85 04:38:10.525438 progress 59 % (0 MB)
86 04:38:10.526891 progress 100 % (0 MB)
87 04:38:10.527883 0 MB downloaded in 0.04 s (1.24 MB/s)
88 04:38:10.528463 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:38:10.529293 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:38:10.529596 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:38:10.529943 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:38:10.530454 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 04:38:10.530699 saving as /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/nfsrootfs/full.rootfs.tar
95 04:38:10.530902 total size: 107552908 (102 MB)
96 04:38:10.531113 Using unxz to decompress xz
97 04:38:10.562360 progress 0 % (0 MB)
98 04:38:11.197690 progress 5 % (5 MB)
99 04:38:11.915915 progress 10 % (10 MB)
100 04:38:12.635447 progress 15 % (15 MB)
101 04:38:13.386246 progress 20 % (20 MB)
102 04:38:13.950788 progress 25 % (25 MB)
103 04:38:14.569560 progress 30 % (30 MB)
104 04:38:15.300121 progress 35 % (35 MB)
105 04:38:15.654398 progress 40 % (41 MB)
106 04:38:16.079538 progress 45 % (46 MB)
107 04:38:16.763602 progress 50 % (51 MB)
108 04:38:17.438294 progress 55 % (56 MB)
109 04:38:18.189697 progress 60 % (61 MB)
110 04:38:18.937913 progress 65 % (66 MB)
111 04:38:19.661533 progress 70 % (71 MB)
112 04:38:20.423005 progress 75 % (76 MB)
113 04:38:21.099389 progress 80 % (82 MB)
114 04:38:21.801846 progress 85 % (87 MB)
115 04:38:22.528888 progress 90 % (92 MB)
116 04:38:23.243203 progress 95 % (97 MB)
117 04:38:23.982807 progress 100 % (102 MB)
118 04:38:23.994574 102 MB downloaded in 13.46 s (7.62 MB/s)
119 04:38:23.995133 end: 1.4.1 http-download (duration 00:00:13) [common]
121 04:38:23.995959 end: 1.4 download-retry (duration 00:00:13) [common]
122 04:38:23.996485 start: 1.5 download-retry (timeout 00:09:46) [common]
123 04:38:23.996993 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 04:38:23.997910 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/modules.tar.xz
125 04:38:23.998376 saving as /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/modules/modules.tar
126 04:38:23.998777 total size: 11631492 (11 MB)
127 04:38:23.999188 Using unxz to decompress xz
128 04:38:24.042826 progress 0 % (0 MB)
129 04:38:24.112266 progress 5 % (0 MB)
130 04:38:24.191256 progress 10 % (1 MB)
131 04:38:24.280541 progress 15 % (1 MB)
132 04:38:24.357887 progress 20 % (2 MB)
133 04:38:24.439060 progress 25 % (2 MB)
134 04:38:24.525269 progress 30 % (3 MB)
135 04:38:24.607468 progress 35 % (3 MB)
136 04:38:24.682887 progress 40 % (4 MB)
137 04:38:24.760597 progress 45 % (5 MB)
138 04:38:24.840225 progress 50 % (5 MB)
139 04:38:24.917920 progress 55 % (6 MB)
140 04:38:24.998760 progress 60 % (6 MB)
141 04:38:25.086659 progress 65 % (7 MB)
142 04:38:25.170075 progress 70 % (7 MB)
143 04:38:25.264017 progress 75 % (8 MB)
144 04:38:25.355518 progress 80 % (8 MB)
145 04:38:25.436848 progress 85 % (9 MB)
146 04:38:25.514724 progress 90 % (10 MB)
147 04:38:25.594050 progress 95 % (10 MB)
148 04:38:25.667719 progress 100 % (11 MB)
149 04:38:25.681835 11 MB downloaded in 1.68 s (6.59 MB/s)
150 04:38:25.682586 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:38:25.684465 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:38:25.685059 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 04:38:25.685642 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 04:38:35.769858 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/675823/extract-nfsrootfs-qrqwr7w_
156 04:38:35.770456 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 04:38:35.770743 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 04:38:35.771360 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3
159 04:38:35.771800 makedir: /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin
160 04:38:35.772175 makedir: /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/tests
161 04:38:35.772503 makedir: /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/results
162 04:38:35.772831 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-add-keys
163 04:38:35.773363 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-add-sources
164 04:38:35.773874 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-background-process-start
165 04:38:35.774418 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-background-process-stop
166 04:38:35.774952 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-common-functions
167 04:38:35.775446 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-echo-ipv4
168 04:38:35.775932 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-install-packages
169 04:38:35.776476 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-installed-packages
170 04:38:35.776976 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-os-build
171 04:38:35.777463 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-probe-channel
172 04:38:35.777963 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-probe-ip
173 04:38:35.778537 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-target-ip
174 04:38:35.779051 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-target-mac
175 04:38:35.779536 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-target-storage
176 04:38:35.780055 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-case
177 04:38:35.780564 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-event
178 04:38:35.781050 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-feedback
179 04:38:35.781535 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-raise
180 04:38:35.782012 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-reference
181 04:38:35.782489 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-runner
182 04:38:35.782980 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-set
183 04:38:35.783464 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-test-shell
184 04:38:35.783999 Updating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-install-packages (oe)
185 04:38:35.784598 Updating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/bin/lava-installed-packages (oe)
186 04:38:35.785071 Creating /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/environment
187 04:38:35.785449 LAVA metadata
188 04:38:35.785711 - LAVA_JOB_ID=675823
189 04:38:35.785925 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:38:35.786296 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 04:38:35.787280 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:38:35.787597 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 04:38:35.787804 skipped lava-vland-overlay
194 04:38:35.788068 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:38:35.788339 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 04:38:35.788562 skipped lava-multinode-overlay
197 04:38:35.788806 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:38:35.789058 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 04:38:35.789312 Loading test definitions
200 04:38:35.789609 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 04:38:35.789833 Using /lava-675823 at stage 0
202 04:38:35.791137 uuid=675823_1.6.2.4.1 testdef=None
203 04:38:35.791458 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:38:35.791720 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 04:38:35.793583 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:38:35.794457 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 04:38:35.796923 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:38:35.797768 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 04:38:35.799997 runner path: /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/0/tests/0_dmesg test_uuid 675823_1.6.2.4.1
212 04:38:35.800590 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:38:35.801344 Creating lava-test-runner.conf files
215 04:38:35.801546 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/675823/lava-overlay-3e4qlhv3/lava-675823/0 for stage 0
216 04:38:35.801891 - 0_dmesg
217 04:38:35.802231 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:38:35.802506 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 04:38:35.824524 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:38:35.824947 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 04:38:35.825209 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:38:35.825501 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:38:35.825808 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 04:38:36.462591 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:38:36.463066 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 04:38:36.463314 extracting modules file /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675823/extract-nfsrootfs-qrqwr7w_
227 04:38:37.821273 extracting modules file /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675823/extract-overlay-ramdisk-fbbnkigi/ramdisk
228 04:38:39.224237 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:38:39.224712 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 04:38:39.224992 [common] Applying overlay to NFS
231 04:38:39.225206 [common] Applying overlay /var/lib/lava/dispatcher/tmp/675823/compress-overlay-3q48d973/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/675823/extract-nfsrootfs-qrqwr7w_
232 04:38:39.254653 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:38:39.255063 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 04:38:39.255335 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 04:38:39.255568 Converting downloaded kernel to a uImage
236 04:38:39.255880 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/kernel/Image /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/kernel/uImage
237 04:38:39.656054 output: Image Name:
238 04:38:39.656467 output: Created: Fri Aug 30 04:38:39 2024
239 04:38:39.656679 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:38:39.656885 output: Data Size: 39019008 Bytes = 38104.50 KiB = 37.21 MiB
241 04:38:39.657089 output: Load Address: 01080000
242 04:38:39.657290 output: Entry Point: 01080000
243 04:38:39.657490 output:
244 04:38:39.657820 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:38:39.658085 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:38:39.658352 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 04:38:39.658604 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:38:39.658863 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 04:38:39.659129 Building ramdisk /var/lib/lava/dispatcher/tmp/675823/extract-overlay-ramdisk-fbbnkigi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/675823/extract-overlay-ramdisk-fbbnkigi/ramdisk
250 04:38:41.854609 >> 171778 blocks
251 04:38:50.395836 Adding RAMdisk u-boot header.
252 04:38:50.396330 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/675823/extract-overlay-ramdisk-fbbnkigi/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/675823/extract-overlay-ramdisk-fbbnkigi/ramdisk.cpio.gz.uboot
253 04:38:50.645489 output: Image Name:
254 04:38:50.645918 output: Created: Fri Aug 30 04:38:50 2024
255 04:38:50.646134 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:38:50.646340 output: Data Size: 23936039 Bytes = 23375.04 KiB = 22.83 MiB
257 04:38:50.646541 output: Load Address: 00000000
258 04:38:50.646740 output: Entry Point: 00000000
259 04:38:50.646937 output:
260 04:38:50.647582 rename /var/lib/lava/dispatcher/tmp/675823/extract-overlay-ramdisk-fbbnkigi/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot
261 04:38:50.648089 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 04:38:50.648656 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 04:38:50.649204 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 04:38:50.649659 No LXC device requested
265 04:38:50.650156 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:38:50.650662 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 04:38:50.651148 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:38:50.651555 Checking files for TFTP limit of 4294967296 bytes.
269 04:38:50.654221 end: 1 tftp-deploy (duration 00:00:41) [common]
270 04:38:50.654797 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:38:50.655320 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:38:50.655810 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:38:50.656346 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:38:50.656867 Using kernel file from prepare-kernel: 675823/tftp-deploy-8oy59lg5/kernel/uImage
275 04:38:50.657491 substitutions:
276 04:38:50.657898 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:38:50.658299 - {DTB_ADDR}: 0x01070000
278 04:38:50.658697 - {DTB}: 675823/tftp-deploy-8oy59lg5/dtb/meson-g12b-a311d-libretech-cc.dtb
279 04:38:50.659094 - {INITRD}: 675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot
280 04:38:50.659491 - {KERNEL_ADDR}: 0x01080000
281 04:38:50.659881 - {KERNEL}: 675823/tftp-deploy-8oy59lg5/kernel/uImage
282 04:38:50.660306 - {LAVA_MAC}: None
283 04:38:50.660739 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/675823/extract-nfsrootfs-qrqwr7w_
284 04:38:50.661140 - {NFS_SERVER_IP}: 192.168.6.2
285 04:38:50.661533 - {PRESEED_CONFIG}: None
286 04:38:50.661925 - {PRESEED_LOCAL}: None
287 04:38:50.662312 - {RAMDISK_ADDR}: 0x08000000
288 04:38:50.662700 - {RAMDISK}: 675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot
289 04:38:50.663092 - {ROOT_PART}: None
290 04:38:50.663481 - {ROOT}: None
291 04:38:50.663871 - {SERVER_IP}: 192.168.6.2
292 04:38:50.664287 - {TEE_ADDR}: 0x83000000
293 04:38:50.664681 - {TEE}: None
294 04:38:50.665074 Parsed boot commands:
295 04:38:50.665450 - setenv autoload no
296 04:38:50.665835 - setenv initrd_high 0xffffffff
297 04:38:50.666220 - setenv fdt_high 0xffffffff
298 04:38:50.666603 - dhcp
299 04:38:50.666986 - setenv serverip 192.168.6.2
300 04:38:50.667371 - tftpboot 0x01080000 675823/tftp-deploy-8oy59lg5/kernel/uImage
301 04:38:50.667757 - tftpboot 0x08000000 675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot
302 04:38:50.668171 - tftpboot 0x01070000 675823/tftp-deploy-8oy59lg5/dtb/meson-g12b-a311d-libretech-cc.dtb
303 04:38:50.668561 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/675823/extract-nfsrootfs-qrqwr7w_,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:38:50.668960 - bootm 0x01080000 0x08000000 0x01070000
305 04:38:50.669460 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:38:50.670947 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:38:50.671358 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 04:38:50.687123 Setting prompt string to ['lava-test: # ']
310 04:38:50.688626 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:38:50.689224 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:38:50.689755 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:38:50.690279 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:38:50.691500 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 04:38:50.732746 >> OK - accepted request
316 04:38:50.734915 Returned 0 in 0 seconds
317 04:38:50.835807 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:38:50.837479 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:38:50.838059 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:38:50.838571 Setting prompt string to ['Hit any key to stop autoboot']
322 04:38:50.839031 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:38:50.840598 Trying 192.168.56.21...
324 04:38:50.841082 Connected to conserv1.
325 04:38:50.841499 Escape character is '^]'.
326 04:38:50.841917
327 04:38:50.842333 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 04:38:50.842750
329 04:39:01.478155 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 04:39:01.478589 bl2_stage_init 0x01
331 04:39:01.478808 bl2_stage_init 0x81
332 04:39:01.483571 hw id: 0x0000 - pwm id 0x01
333 04:39:01.483880 bl2_stage_init 0xc1
334 04:39:01.484131 bl2_stage_init 0x02
335 04:39:01.484338
336 04:39:01.489270 L0:00000000
337 04:39:01.489559 L1:20000703
338 04:39:01.489771 L2:00008067
339 04:39:01.489979 L3:14000000
340 04:39:01.494768 B2:00402000
341 04:39:01.495061 B1:e0f83180
342 04:39:01.495279
343 04:39:01.495481 TE: 58124
344 04:39:01.495686
345 04:39:01.500437 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 04:39:01.500714
347 04:39:01.500917 Board ID = 1
348 04:39:01.506039 Set A53 clk to 24M
349 04:39:01.506303 Set A73 clk to 24M
350 04:39:01.506505 Set clk81 to 24M
351 04:39:01.511647 A53 clk: 1200 MHz
352 04:39:01.511925 A73 clk: 1200 MHz
353 04:39:01.512159 CLK81: 166.6M
354 04:39:01.512367 smccc: 00012a92
355 04:39:01.517235 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 04:39:01.522772 board id: 1
357 04:39:01.528721 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:39:01.539510 fw parse done
359 04:39:01.545414 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:39:01.587804 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:39:01.598764 PIEI prepare done
362 04:39:01.599138 fastboot data load
363 04:39:01.599350 fastboot data verify
364 04:39:01.604440 verify result: 266
365 04:39:01.609939 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 04:39:01.610248 LPDDR4 probe
367 04:39:01.610461 ddr clk to 1584MHz
368 04:39:01.617981 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:39:01.655324
370 04:39:01.655735 dmc_version 0001
371 04:39:01.661926 Check phy result
372 04:39:01.667782 INFO : End of CA training
373 04:39:01.668147 INFO : End of initialization
374 04:39:01.673423 INFO : Training has run successfully!
375 04:39:01.673778 Check phy result
376 04:39:01.678972 INFO : End of initialization
377 04:39:01.679309 INFO : End of read enable training
378 04:39:01.684566 INFO : End of fine write leveling
379 04:39:01.690130 INFO : End of Write leveling coarse delay
380 04:39:01.690462 INFO : Training has run successfully!
381 04:39:01.690674 Check phy result
382 04:39:01.695725 INFO : End of initialization
383 04:39:01.696086 INFO : End of read dq deskew training
384 04:39:01.701398 INFO : End of MPR read delay center optimization
385 04:39:01.706914 INFO : End of write delay center optimization
386 04:39:01.712522 INFO : End of read delay center optimization
387 04:39:01.712814 INFO : End of max read latency training
388 04:39:01.718100 INFO : Training has run successfully!
389 04:39:01.718387 1D training succeed
390 04:39:01.727420 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:39:01.774900 Check phy result
392 04:39:01.775277 INFO : End of initialization
393 04:39:01.796609 INFO : End of 2D read delay Voltage center optimization
394 04:39:01.816841 INFO : End of 2D read delay Voltage center optimization
395 04:39:01.868897 INFO : End of 2D write delay Voltage center optimization
396 04:39:01.918293 INFO : End of 2D write delay Voltage center optimization
397 04:39:01.923903 INFO : Training has run successfully!
398 04:39:01.924268
399 04:39:01.924491 channel==0
400 04:39:01.929494 RxClkDly_Margin_A0==88 ps 9
401 04:39:01.929835 TxDqDly_Margin_A0==98 ps 10
402 04:39:01.935091 RxClkDly_Margin_A1==88 ps 9
403 04:39:01.935448 TxDqDly_Margin_A1==98 ps 10
404 04:39:01.935674 TrainedVREFDQ_A0==74
405 04:39:01.940621 TrainedVREFDQ_A1==74
406 04:39:01.940967 VrefDac_Margin_A0==25
407 04:39:01.941183 DeviceVref_Margin_A0==40
408 04:39:01.946223 VrefDac_Margin_A1==25
409 04:39:01.946562 DeviceVref_Margin_A1==40
410 04:39:01.946775
411 04:39:01.946987
412 04:39:01.952090 channel==1
413 04:39:01.952423 RxClkDly_Margin_A0==98 ps 10
414 04:39:01.952651 TxDqDly_Margin_A0==98 ps 10
415 04:39:01.957397 RxClkDly_Margin_A1==98 ps 10
416 04:39:01.957681 TxDqDly_Margin_A1==88 ps 9
417 04:39:01.962951 TrainedVREFDQ_A0==77
418 04:39:01.963236 TrainedVREFDQ_A1==77
419 04:39:01.963460 VrefDac_Margin_A0==22
420 04:39:01.968571 DeviceVref_Margin_A0==37
421 04:39:01.968856 VrefDac_Margin_A1==22
422 04:39:01.974190 DeviceVref_Margin_A1==37
423 04:39:01.974481
424 04:39:01.974704 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:39:01.979748
426 04:39:02.007774 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 04:39:02.008218 2D training succeed
428 04:39:02.013483 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:39:02.019026 auto size-- 65535DDR cs0 size: 2048MB
430 04:39:02.019567 DDR cs1 size: 2048MB
431 04:39:02.024648 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:39:02.025029 cs0 DataBus test pass
433 04:39:02.030242 cs1 DataBus test pass
434 04:39:02.030622 cs0 AddrBus test pass
435 04:39:02.030914 cs1 AddrBus test pass
436 04:39:02.031188
437 04:39:02.035919 100bdlr_step_size ps== 420
438 04:39:02.036564 result report
439 04:39:02.041615 boot times 0Enable ddr reg access
440 04:39:02.046973 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:39:02.060455 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 04:39:02.634016 0.0;M3 CHK:0;cm4_sp_mode 0
443 04:39:02.634460 MVN_1=0x00000000
444 04:39:02.639547 MVN_2=0x00000000
445 04:39:02.645403 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 04:39:02.645925 OPS=0x10
447 04:39:02.646197 ring efuse init
448 04:39:02.646416 chipver efuse init
449 04:39:02.650976 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 04:39:02.656520 [0.018960 Inits done]
451 04:39:02.656875 secure task start!
452 04:39:02.657101 high task start!
453 04:39:02.661084 low task start!
454 04:39:02.661569 run into bl31
455 04:39:02.667728 NOTICE: BL31: v1.3(release):4fc40b1
456 04:39:02.675615 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 04:39:02.676161 NOTICE: BL31: G12A normal boot!
458 04:39:02.700900 NOTICE: BL31: BL33 decompress pass
459 04:39:02.706607 ERROR: Error initializing runtime service opteed_fast
460 04:39:03.940155
461 04:39:03.940746
462 04:39:03.947945 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 04:39:03.948305
464 04:39:03.948534 Model: Libre Computer AML-A311D-CC Alta
465 04:39:04.156421 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 04:39:04.179928 DRAM: 2 GiB (effective 3.8 GiB)
467 04:39:04.322935 Core: 408 devices, 31 uclasses, devicetree: separate
468 04:39:04.328634 WDT: Not starting watchdog@f0d0
469 04:39:04.360881 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 04:39:04.373352 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 04:39:04.378285 ** Bad device specification mmc 0 **
472 04:39:04.388712 Card did not respond to voltage select! : -110
473 04:39:04.396336 ** Bad device specification mmc 0 **
474 04:39:04.396725 Couldn't find partition mmc 0
475 04:39:04.404638 Card did not respond to voltage select! : -110
476 04:39:04.410205 ** Bad device specification mmc 0 **
477 04:39:04.410721 Couldn't find partition mmc 0
478 04:39:04.415236 Error: could not access storage.
479 04:39:05.678315 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 04:39:05.678866 bl2_stage_init 0x01
481 04:39:05.679213 bl2_stage_init 0x81
482 04:39:05.683936 hw id: 0x0000 - pwm id 0x01
483 04:39:05.684252 bl2_stage_init 0xc1
484 04:39:05.684474 bl2_stage_init 0x02
485 04:39:05.684684
486 04:39:05.689486 L0:00000000
487 04:39:05.689759 L1:20000703
488 04:39:05.689975 L2:00008067
489 04:39:05.690182 L3:14000000
490 04:39:05.695082 B2:00402000
491 04:39:05.695470 B1:e0f83180
492 04:39:05.695802
493 04:39:05.696149 TE: 58124
494 04:39:05.696471
495 04:39:05.700684 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 04:39:05.701065
497 04:39:05.701398 Board ID = 1
498 04:39:05.706347 Set A53 clk to 24M
499 04:39:05.706684 Set A73 clk to 24M
500 04:39:05.706903 Set clk81 to 24M
501 04:39:05.711955 A53 clk: 1200 MHz
502 04:39:05.712394 A73 clk: 1200 MHz
503 04:39:05.712739 CLK81: 166.6M
504 04:39:05.713074 smccc: 00012a92
505 04:39:05.717492 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 04:39:05.723081 board id: 1
507 04:39:05.729020 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 04:39:05.739733 fw parse done
509 04:39:05.745585 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 04:39:05.788215 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 04:39:05.799122 PIEI prepare done
512 04:39:05.799409 fastboot data load
513 04:39:05.799631 fastboot data verify
514 04:39:05.804735 verify result: 266
515 04:39:05.810324 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 04:39:05.810721 LPDDR4 probe
517 04:39:05.811066 ddr clk to 1584MHz
518 04:39:05.818306 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 04:39:05.855615
520 04:39:05.855969 dmc_version 0001
521 04:39:05.862254 Check phy result
522 04:39:05.868148 INFO : End of CA training
523 04:39:05.868438 INFO : End of initialization
524 04:39:05.873719 INFO : Training has run successfully!
525 04:39:05.874121 Check phy result
526 04:39:05.879299 INFO : End of initialization
527 04:39:05.879689 INFO : End of read enable training
528 04:39:05.884970 INFO : End of fine write leveling
529 04:39:05.890504 INFO : End of Write leveling coarse delay
530 04:39:05.890780 INFO : Training has run successfully!
531 04:39:05.890997 Check phy result
532 04:39:05.896129 INFO : End of initialization
533 04:39:05.896539 INFO : End of read dq deskew training
534 04:39:05.901735 INFO : End of MPR read delay center optimization
535 04:39:05.907306 INFO : End of write delay center optimization
536 04:39:05.912972 INFO : End of read delay center optimization
537 04:39:05.913257 INFO : End of max read latency training
538 04:39:05.918512 INFO : Training has run successfully!
539 04:39:05.918911 1D training succeed
540 04:39:05.927688 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 04:39:05.975290 Check phy result
542 04:39:05.975624 INFO : End of initialization
543 04:39:05.997033 INFO : End of 2D read delay Voltage center optimization
544 04:39:06.016269 INFO : End of 2D read delay Voltage center optimization
545 04:39:06.068174 INFO : End of 2D write delay Voltage center optimization
546 04:39:06.117305 INFO : End of 2D write delay Voltage center optimization
547 04:39:06.122887 INFO : Training has run successfully!
548 04:39:06.123165
549 04:39:06.123384 channel==0
550 04:39:06.128472 RxClkDly_Margin_A0==88 ps 9
551 04:39:06.128868 TxDqDly_Margin_A0==98 ps 10
552 04:39:06.131792 RxClkDly_Margin_A1==88 ps 9
553 04:39:06.132212 TxDqDly_Margin_A1==88 ps 9
554 04:39:06.137313 TrainedVREFDQ_A0==74
555 04:39:06.137590 TrainedVREFDQ_A1==74
556 04:39:06.137808 VrefDac_Margin_A0==25
557 04:39:06.143011 DeviceVref_Margin_A0==40
558 04:39:06.143398 VrefDac_Margin_A1==25
559 04:39:06.148513 DeviceVref_Margin_A1==40
560 04:39:06.148897
561 04:39:06.149233
562 04:39:06.149470 channel==1
563 04:39:06.149680 RxClkDly_Margin_A0==88 ps 9
564 04:39:06.154107 TxDqDly_Margin_A0==88 ps 9
565 04:39:06.154493 RxClkDly_Margin_A1==88 ps 9
566 04:39:06.159781 TxDqDly_Margin_A1==88 ps 9
567 04:39:06.160181 TrainedVREFDQ_A0==76
568 04:39:06.160525 TrainedVREFDQ_A1==77
569 04:39:06.165313 VrefDac_Margin_A0==23
570 04:39:06.165580 DeviceVref_Margin_A0==38
571 04:39:06.171035 VrefDac_Margin_A1==24
572 04:39:06.171439 DeviceVref_Margin_A1==37
573 04:39:06.171778
574 04:39:06.176511 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 04:39:06.176784
576 04:39:06.204509 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000019 00000019 0000001a 00000018 00000017 00000019 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 04:39:06.210160 2D training succeed
578 04:39:06.215815 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 04:39:06.216128 auto size-- 65535DDR cs0 size: 2048MB
580 04:39:06.221331 DDR cs1 size: 2048MB
581 04:39:06.221731 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 04:39:06.227025 cs0 DataBus test pass
583 04:39:06.227302 cs1 DataBus test pass
584 04:39:06.227518 cs0 AddrBus test pass
585 04:39:06.232522 cs1 AddrBus test pass
586 04:39:06.232918
587 04:39:06.233253 100bdlr_step_size ps== 420
588 04:39:06.233584 result report
589 04:39:06.238185 boot times 0Enable ddr reg access
590 04:39:06.245571 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 04:39:06.259087 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 04:39:06.831215 0.0;M3 CHK:0;cm4_sp_mode 0
593 04:39:06.831627 MVN_1=0x00000000
594 04:39:06.838398 MVN_2=0x00000000
595 04:39:06.842320 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 04:39:06.842605 OPS=0x10
597 04:39:06.842833 ring efuse init
598 04:39:06.843042 chipver efuse init
599 04:39:06.848029 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 04:39:06.853652 [0.018961 Inits done]
601 04:39:06.853918 secure task start!
602 04:39:06.854131 high task start!
603 04:39:06.858262 low task start!
604 04:39:06.858524 run into bl31
605 04:39:06.864778 NOTICE: BL31: v1.3(release):4fc40b1
606 04:39:06.872655 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 04:39:06.872962 NOTICE: BL31: G12A normal boot!
608 04:39:06.897992 NOTICE: BL31: BL33 decompress pass
609 04:39:06.903701 ERROR: Error initializing runtime service opteed_fast
610 04:39:08.136640
611 04:39:08.137072
612 04:39:08.145050 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 04:39:08.145500
614 04:39:08.145833 Model: Libre Computer AML-A311D-CC Alta
615 04:39:08.353471 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 04:39:08.376864 DRAM: 2 GiB (effective 3.8 GiB)
617 04:39:08.519723 Core: 408 devices, 31 uclasses, devicetree: separate
618 04:39:08.525609 WDT: Not starting watchdog@f0d0
619 04:39:08.557825 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 04:39:08.570282 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 04:39:08.575400 ** Bad device specification mmc 0 **
622 04:39:08.585631 Card did not respond to voltage select! : -110
623 04:39:08.593282 ** Bad device specification mmc 0 **
624 04:39:08.593555 Couldn't find partition mmc 0
625 04:39:08.601609 Card did not respond to voltage select! : -110
626 04:39:08.607106 ** Bad device specification mmc 0 **
627 04:39:08.607379 Couldn't find partition mmc 0
628 04:39:08.612210 Error: could not access storage.
629 04:39:08.954698 Net: eth0: ethernet@ff3f0000
630 04:39:08.955112 starting USB...
631 04:39:09.206512 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 04:39:09.207058 Starting the controller
633 04:39:09.213509 USB XHCI 1.10
634 04:39:10.928847 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 04:39:10.929304 bl2_stage_init 0x01
636 04:39:10.929553 bl2_stage_init 0x81
637 04:39:10.934291 hw id: 0x0000 - pwm id 0x01
638 04:39:10.934752 bl2_stage_init 0xc1
639 04:39:10.935118 bl2_stage_init 0x02
640 04:39:10.935484
641 04:39:10.940031 L0:00000000
642 04:39:10.940487 L1:20000703
643 04:39:10.940760 L2:00008067
644 04:39:10.940996 L3:14000000
645 04:39:10.942837 B2:00402000
646 04:39:10.943247 B1:e0f83180
647 04:39:10.943608
648 04:39:10.943970 TE: 58124
649 04:39:10.944358
650 04:39:10.953932 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 04:39:10.954304
652 04:39:10.954552 Board ID = 1
653 04:39:10.954786 Set A53 clk to 24M
654 04:39:10.955012 Set A73 clk to 24M
655 04:39:10.959667 Set clk81 to 24M
656 04:39:10.960140 A53 clk: 1200 MHz
657 04:39:10.960504 A73 clk: 1200 MHz
658 04:39:10.963062 CLK81: 166.6M
659 04:39:10.963482 smccc: 00012a92
660 04:39:10.968588 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 04:39:10.974213 board id: 1
662 04:39:10.979240 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 04:39:10.989896 fw parse done
664 04:39:10.995897 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 04:39:11.038534 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 04:39:11.049417 PIEI prepare done
667 04:39:11.049955 fastboot data load
668 04:39:11.050231 fastboot data verify
669 04:39:11.054992 verify result: 266
670 04:39:11.060584 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 04:39:11.060952 LPDDR4 probe
672 04:39:11.061194 ddr clk to 1584MHz
673 04:39:11.068588 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 04:39:11.106021
675 04:39:11.106606 dmc_version 0001
676 04:39:11.112521 Check phy result
677 04:39:11.118366 INFO : End of CA training
678 04:39:11.118703 INFO : End of initialization
679 04:39:11.124056 INFO : Training has run successfully!
680 04:39:11.124525 Check phy result
681 04:39:11.129572 INFO : End of initialization
682 04:39:11.129907 INFO : End of read enable training
683 04:39:11.132839 INFO : End of fine write leveling
684 04:39:11.138404 INFO : End of Write leveling coarse delay
685 04:39:11.144025 INFO : Training has run successfully!
686 04:39:11.144358 Check phy result
687 04:39:11.144595 INFO : End of initialization
688 04:39:11.149586 INFO : End of read dq deskew training
689 04:39:11.155226 INFO : End of MPR read delay center optimization
690 04:39:11.155698 INFO : End of write delay center optimization
691 04:39:11.160947 INFO : End of read delay center optimization
692 04:39:11.166408 INFO : End of max read latency training
693 04:39:11.166936 INFO : Training has run successfully!
694 04:39:11.172045 1D training succeed
695 04:39:11.177997 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 04:39:11.225572 Check phy result
697 04:39:11.226104 INFO : End of initialization
698 04:39:11.248197 INFO : End of 2D read delay Voltage center optimization
699 04:39:11.268584 INFO : End of 2D read delay Voltage center optimization
700 04:39:11.320458 INFO : End of 2D write delay Voltage center optimization
701 04:39:11.369745 INFO : End of 2D write delay Voltage center optimization
702 04:39:11.375280 INFO : Training has run successfully!
703 04:39:11.375791
704 04:39:11.376332 channel==0
705 04:39:11.380907 RxClkDly_Margin_A0==88 ps 9
706 04:39:11.381440 TxDqDly_Margin_A0==98 ps 10
707 04:39:11.384252 RxClkDly_Margin_A1==88 ps 9
708 04:39:11.384756 TxDqDly_Margin_A1==88 ps 9
709 04:39:11.389905 TrainedVREFDQ_A0==74
710 04:39:11.390412 TrainedVREFDQ_A1==74
711 04:39:11.390873 VrefDac_Margin_A0==25
712 04:39:11.395346 DeviceVref_Margin_A0==40
713 04:39:11.395869 VrefDac_Margin_A1==25
714 04:39:11.400929 DeviceVref_Margin_A1==40
715 04:39:11.401438
716 04:39:11.401903
717 04:39:11.402356 channel==1
718 04:39:11.402805 RxClkDly_Margin_A0==98 ps 10
719 04:39:11.404448 TxDqDly_Margin_A0==98 ps 10
720 04:39:11.410010 RxClkDly_Margin_A1==98 ps 10
721 04:39:11.410525 TxDqDly_Margin_A1==98 ps 10
722 04:39:11.410993 TrainedVREFDQ_A0==77
723 04:39:11.415613 TrainedVREFDQ_A1==78
724 04:39:11.416153 VrefDac_Margin_A0==22
725 04:39:11.421235 DeviceVref_Margin_A0==37
726 04:39:11.421735 VrefDac_Margin_A1==22
727 04:39:11.422195 DeviceVref_Margin_A1==36
728 04:39:11.422647
729 04:39:11.427005 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 04:39:11.427514
731 04:39:11.460320 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 04:39:11.460887 2D training succeed
733 04:39:11.465930 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 04:39:11.471480 auto size-- 65535DDR cs0 size: 2048MB
735 04:39:11.472013 DDR cs1 size: 2048MB
736 04:39:11.477115 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 04:39:11.477622 cs0 DataBus test pass
738 04:39:11.478081 cs1 DataBus test pass
739 04:39:11.482697 cs0 AddrBus test pass
740 04:39:11.483198 cs1 AddrBus test pass
741 04:39:11.483659
742 04:39:11.488273 100bdlr_step_size ps== 420
743 04:39:11.488790 result report
744 04:39:11.489246 boot times 0Enable ddr reg access
745 04:39:11.500223 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 04:39:11.511951 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 04:39:12.085485 0.0;M3 CHK:0;cm4_sp_mode 0
748 04:39:12.086166 MVN_1=0x00000000
749 04:39:12.090907 MVN_2=0x00000000
750 04:39:12.096712 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 04:39:12.097289 OPS=0x10
752 04:39:12.097742 ring efuse init
753 04:39:12.098178 chipver efuse init
754 04:39:12.102246 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 04:39:12.107894 [0.018961 Inits done]
756 04:39:12.108433 secure task start!
757 04:39:12.108875 high task start!
758 04:39:12.112435 low task start!
759 04:39:12.112906 run into bl31
760 04:39:12.119140 NOTICE: BL31: v1.3(release):4fc40b1
761 04:39:12.126938 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 04:39:12.127445 NOTICE: BL31: G12A normal boot!
763 04:39:12.152349 NOTICE: BL31: BL33 decompress pass
764 04:39:12.158047 ERROR: Error initializing runtime service opteed_fast
765 04:39:13.390990
766 04:39:13.391627
767 04:39:13.399300 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 04:39:13.399808
769 04:39:13.400313 Model: Libre Computer AML-A311D-CC Alta
770 04:39:13.607644 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 04:39:13.631150 DRAM: 2 GiB (effective 3.8 GiB)
772 04:39:13.774389 Core: 408 devices, 31 uclasses, devicetree: separate
773 04:39:13.780086 WDT: Not starting watchdog@f0d0
774 04:39:13.812362 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 04:39:13.824782 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 04:39:13.828878 ** Bad device specification mmc 0 **
777 04:39:13.840341 Card did not respond to voltage select! : -110
778 04:39:13.846780 ** Bad device specification mmc 0 **
779 04:39:13.847376 Couldn't find partition mmc 0
780 04:39:13.856223 Card did not respond to voltage select! : -110
781 04:39:13.861624 ** Bad device specification mmc 0 **
782 04:39:13.862259 Couldn't find partition mmc 0
783 04:39:13.866755 Error: could not access storage.
784 04:39:14.209418 Net: eth0: ethernet@ff3f0000
785 04:39:14.209854 starting USB...
786 04:39:14.460871 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 04:39:14.461348 Starting the controller
788 04:39:14.466970 USB XHCI 1.10
789 04:39:16.630148 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 04:39:16.630812 bl2_stage_init 0x01
791 04:39:16.631283 bl2_stage_init 0x81
792 04:39:16.635643 hw id: 0x0000 - pwm id 0x01
793 04:39:16.636178 bl2_stage_init 0xc1
794 04:39:16.636645 bl2_stage_init 0x02
795 04:39:16.637099
796 04:39:16.641307 L0:00000000
797 04:39:16.641799 L1:20000703
798 04:39:16.642254 L2:00008067
799 04:39:16.642701 L3:14000000
800 04:39:16.644171 B2:00402000
801 04:39:16.644650 B1:e0f83180
802 04:39:16.645098
803 04:39:16.645547 TE: 58159
804 04:39:16.645989
805 04:39:16.655278 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 04:39:16.655780
807 04:39:16.656274 Board ID = 1
808 04:39:16.656726 Set A53 clk to 24M
809 04:39:16.657168 Set A73 clk to 24M
810 04:39:16.660861 Set clk81 to 24M
811 04:39:16.661343 A53 clk: 1200 MHz
812 04:39:16.661793 A73 clk: 1200 MHz
813 04:39:16.664408 CLK81: 166.6M
814 04:39:16.664887 smccc: 00012ab5
815 04:39:16.669955 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 04:39:16.675524 board id: 1
817 04:39:16.680860 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 04:39:16.691251 fw parse done
819 04:39:16.697276 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 04:39:16.739907 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 04:39:16.750920 PIEI prepare done
822 04:39:16.751464 fastboot data load
823 04:39:16.751928 fastboot data verify
824 04:39:16.756552 verify result: 266
825 04:39:16.762007 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 04:39:16.762504 LPDDR4 probe
827 04:39:16.762954 ddr clk to 1584MHz
828 04:39:16.770053 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 04:39:16.807524
830 04:39:16.808147 dmc_version 0001
831 04:39:16.814138 Check phy result
832 04:39:16.819956 INFO : End of CA training
833 04:39:16.820508 INFO : End of initialization
834 04:39:16.826688 INFO : Training has run successfully!
835 04:39:16.827195 Check phy result
836 04:39:16.831790 INFO : End of initialization
837 04:39:16.832317 INFO : End of read enable training
838 04:39:16.834410 INFO : End of fine write leveling
839 04:39:16.842417 INFO : End of Write leveling coarse delay
840 04:39:16.846261 INFO : Training has run successfully!
841 04:39:16.846752 Check phy result
842 04:39:16.847204 INFO : End of initialization
843 04:39:16.851159 INFO : End of read dq deskew training
844 04:39:16.857490 INFO : End of MPR read delay center optimization
845 04:39:16.858044 INFO : End of write delay center optimization
846 04:39:16.862408 INFO : End of read delay center optimization
847 04:39:16.868418 INFO : End of max read latency training
848 04:39:16.868945 INFO : Training has run successfully!
849 04:39:16.873609 1D training succeed
850 04:39:16.879919 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 04:39:16.927218 Check phy result
852 04:39:16.927845 INFO : End of initialization
853 04:39:16.948730 INFO : End of 2D read delay Voltage center optimization
854 04:39:16.968812 INFO : End of 2D read delay Voltage center optimization
855 04:39:17.020778 INFO : End of 2D write delay Voltage center optimization
856 04:39:17.070099 INFO : End of 2D write delay Voltage center optimization
857 04:39:17.075535 INFO : Training has run successfully!
858 04:39:17.076079
859 04:39:17.076531 channel==0
860 04:39:17.081145 RxClkDly_Margin_A0==88 ps 9
861 04:39:17.081664 TxDqDly_Margin_A0==98 ps 10
862 04:39:17.086783 RxClkDly_Margin_A1==88 ps 9
863 04:39:17.087292 TxDqDly_Margin_A1==88 ps 9
864 04:39:17.087779 TrainedVREFDQ_A0==74
865 04:39:17.092321 TrainedVREFDQ_A1==74
866 04:39:17.092914 VrefDac_Margin_A0==25
867 04:39:17.093386 DeviceVref_Margin_A0==40
868 04:39:17.098058 VrefDac_Margin_A1==25
869 04:39:17.098615 DeviceVref_Margin_A1==40
870 04:39:17.099054
871 04:39:17.099489
872 04:39:17.099922 channel==1
873 04:39:17.103520 RxClkDly_Margin_A0==98 ps 10
874 04:39:17.104030 TxDqDly_Margin_A0==88 ps 9
875 04:39:17.109222 RxClkDly_Margin_A1==88 ps 9
876 04:39:17.109710 TxDqDly_Margin_A1==88 ps 9
877 04:39:17.114732 TrainedVREFDQ_A0==76
878 04:39:17.115036 TrainedVREFDQ_A1==77
879 04:39:17.115238 VrefDac_Margin_A0==22
880 04:39:17.120398 DeviceVref_Margin_A0==38
881 04:39:17.120657 VrefDac_Margin_A1==24
882 04:39:17.125902 DeviceVref_Margin_A1==37
883 04:39:17.126400
884 04:39:17.126838 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 04:39:17.127267
886 04:39:17.159497 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 04:39:17.159869 2D training succeed
888 04:39:17.165117 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 04:39:17.170689 auto size-- 65535DDR cs0 size: 2048MB
890 04:39:17.171219 DDR cs1 size: 2048MB
891 04:39:17.176397 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 04:39:17.176979 cs0 DataBus test pass
893 04:39:17.181960 cs1 DataBus test pass
894 04:39:17.182534 cs0 AddrBus test pass
895 04:39:17.183027 cs1 AddrBus test pass
896 04:39:17.183482
897 04:39:17.187432 100bdlr_step_size ps== 420
898 04:39:17.187814 result report
899 04:39:17.193168 boot times 0Enable ddr reg access
900 04:39:17.198357 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 04:39:17.211773 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 04:39:17.784003 0.0;M3 CHK:0;cm4_sp_mode 0
903 04:39:17.784444 MVN_1=0x00000000
904 04:39:17.789243 MVN_2=0x00000000
905 04:39:17.795169 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 04:39:17.795512 OPS=0x10
907 04:39:17.795749 ring efuse init
908 04:39:17.795970 chipver efuse init
909 04:39:17.801251 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 04:39:17.806449 [0.018961 Inits done]
911 04:39:17.806784 secure task start!
912 04:39:17.807016 high task start!
913 04:39:17.811228 low task start!
914 04:39:17.811584 run into bl31
915 04:39:17.817476 NOTICE: BL31: v1.3(release):4fc40b1
916 04:39:17.825290 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 04:39:17.825656 NOTICE: BL31: G12A normal boot!
918 04:39:17.850841 NOTICE: BL31: BL33 decompress pass
919 04:39:17.856432 ERROR: Error initializing runtime service opteed_fast
920 04:39:19.089389
921 04:39:19.089992
922 04:39:19.097754 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 04:39:19.098239
924 04:39:19.098666 Model: Libre Computer AML-A311D-CC Alta
925 04:39:19.306254 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 04:39:19.329533 DRAM: 2 GiB (effective 3.8 GiB)
927 04:39:19.472517 Core: 408 devices, 31 uclasses, devicetree: separate
928 04:39:19.478414 WDT: Not starting watchdog@f0d0
929 04:39:19.510773 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 04:39:19.523172 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 04:39:19.528173 ** Bad device specification mmc 0 **
932 04:39:19.538424 Card did not respond to voltage select! : -110
933 04:39:19.546182 ** Bad device specification mmc 0 **
934 04:39:19.546753 Couldn't find partition mmc 0
935 04:39:19.554442 Card did not respond to voltage select! : -110
936 04:39:19.559817 ** Bad device specification mmc 0 **
937 04:39:19.560392 Couldn't find partition mmc 0
938 04:39:19.564972 Error: could not access storage.
939 04:39:19.908585 Net: eth0: ethernet@ff3f0000
940 04:39:19.909225 starting USB...
941 04:39:20.160294 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 04:39:20.160761 Starting the controller
943 04:39:20.167291 USB XHCI 1.10
944 04:39:21.721596 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 04:39:21.728831 scanning usb for storage devices... 0 Storage Device(s) found
947 04:39:21.780454 Hit any key to stop autoboot: 1
948 04:39:21.781706 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 04:39:21.782368 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
950 04:39:21.782907 Setting prompt string to ['=>']
951 04:39:21.783454 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
952 04:39:21.796347 0
953 04:39:21.797304 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 04:39:21.797851 Sending with 10 millisecond of delay
956 04:39:22.933091 => setenv autoload no
957 04:39:22.943915 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
958 04:39:22.948818 setenv autoload no
959 04:39:22.949548 Sending with 10 millisecond of delay
961 04:39:24.746905 => setenv initrd_high 0xffffffff
962 04:39:24.757642 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
963 04:39:24.758386 setenv initrd_high 0xffffffff
964 04:39:24.758949 Sending with 10 millisecond of delay
966 04:39:26.375923 => setenv fdt_high 0xffffffff
967 04:39:26.386722 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 04:39:26.387553 setenv fdt_high 0xffffffff
969 04:39:26.388305 Sending with 10 millisecond of delay
971 04:39:26.680105 => dhcp
972 04:39:26.690881 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 04:39:26.691707 dhcp
974 04:39:26.692195 Speed: 1000, full duplex
975 04:39:26.692620 BOOTP broadcast 1
976 04:39:26.938835 BOOTP broadcast 2
977 04:39:26.954434 DHCP client bound to address 192.168.6.33 (263 ms)
978 04:39:26.955071 Sending with 10 millisecond of delay
980 04:39:28.631533 => setenv serverip 192.168.6.2
981 04:39:28.642404 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
982 04:39:28.643304 setenv serverip 192.168.6.2
983 04:39:28.644074 Sending with 10 millisecond of delay
985 04:39:32.369586 => tftpboot 0x01080000 675823/tftp-deploy-8oy59lg5/kernel/uImage
986 04:39:32.380215 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
987 04:39:32.380832 tftpboot 0x01080000 675823/tftp-deploy-8oy59lg5/kernel/uImage
988 04:39:32.381084 Speed: 1000, full duplex
989 04:39:32.381295 Using ethernet@ff3f0000 device
990 04:39:32.382716 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
991 04:39:32.388216 Filename '675823/tftp-deploy-8oy59lg5/kernel/uImage'.
992 04:39:32.392130 Load address: 0x1080000
993 04:39:34.990154 Loading: *################################################## 37.2 MiB
994 04:39:34.990590 14.3 MiB/s
995 04:39:34.990811 done
996 04:39:34.994496 Bytes transferred = 39019072 (2536240 hex)
997 04:39:34.995083 Sending with 10 millisecond of delay
999 04:39:39.687231 => tftpboot 0x08000000 675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot
1000 04:39:39.697987 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1001 04:39:39.698553 tftpboot 0x08000000 675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot
1002 04:39:39.698798 Speed: 1000, full duplex
1003 04:39:39.699011 Using ethernet@ff3f0000 device
1004 04:39:39.700810 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1005 04:39:39.712769 Filename '675823/tftp-deploy-8oy59lg5/ramdisk/ramdisk.cpio.gz.uboot'.
1006 04:39:39.713117 Load address: 0x8000000
1007 04:39:46.351946 Loading: *########################T ######################### UDP wrong checksum 00000005 0000dbc9
1008 04:39:51.354138 T UDP wrong checksum 00000005 0000dbc9
1009 04:40:01.356334 T T UDP wrong checksum 00000005 0000dbc9
1010 04:40:21.360674 T T T T UDP wrong checksum 00000005 0000dbc9
1011 04:40:36.364289 T T
1012 04:40:36.364959 Retry count exceeded; starting again
1014 04:40:36.366504 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1017 04:40:36.368680 end: 2.4 uboot-commands (duration 00:01:46) [common]
1019 04:40:36.371042 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1021 04:40:36.372197 end: 2 uboot-action (duration 00:01:46) [common]
1023 04:40:36.373879 Cleaning after the job
1024 04:40:36.374478 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/ramdisk
1025 04:40:36.375952 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/kernel
1026 04:40:36.408884 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/dtb
1027 04:40:36.410486 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/nfsrootfs
1028 04:40:36.473206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675823/tftp-deploy-8oy59lg5/modules
1029 04:40:36.479616 start: 4.1 power-off (timeout 00:00:30) [common]
1030 04:40:36.480206 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1031 04:40:36.513369 >> OK - accepted request
1032 04:40:36.515478 Returned 0 in 0 seconds
1033 04:40:36.616329 end: 4.1 power-off (duration 00:00:00) [common]
1035 04:40:36.617363 start: 4.2 read-feedback (timeout 00:10:00) [common]
1036 04:40:36.618015 Listened to connection for namespace 'common' for up to 1s
1037 04:40:37.619058 Finalising connection for namespace 'common'
1038 04:40:37.619822 Disconnecting from shell: Finalise
1039 04:40:37.620383 =>
1040 04:40:37.722205 end: 4.2 read-feedback (duration 00:00:01) [common]
1041 04:40:37.722938 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/675823
1042 04:40:39.368601 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/675823
1043 04:40:39.369207 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.