Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:09:30.875934 lava-dispatcher, installed at version: 2024.01
2 05:09:30.876727 start: 0 validate
3 05:09:30.877189 Start time: 2024-08-30 05:09:30.877158+00:00 (UTC)
4 05:09:30.877723 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:09:30.878247 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:09:30.920348 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:09:30.920912 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 05:09:30.947640 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:09:30.948403 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 05:09:30.979833 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:09:30.980309 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:09:31.011616 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:09:31.012100 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 05:09:31.050283 validate duration: 0.17
16 05:09:31.051151 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:09:31.051503 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:09:31.051819 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:09:31.052455 Not decompressing ramdisk as can be used compressed.
20 05:09:31.052952 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 05:09:31.053249 saving as /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/ramdisk/initrd.cpio.gz
22 05:09:31.053531 total size: 5628182 (5 MB)
23 05:09:31.092842 progress 0 % (0 MB)
24 05:09:31.097960 progress 5 % (0 MB)
25 05:09:31.103226 progress 10 % (0 MB)
26 05:09:31.107875 progress 15 % (0 MB)
27 05:09:31.112960 progress 20 % (1 MB)
28 05:09:31.117493 progress 25 % (1 MB)
29 05:09:31.122576 progress 30 % (1 MB)
30 05:09:31.127434 progress 35 % (1 MB)
31 05:09:31.131804 progress 40 % (2 MB)
32 05:09:31.136742 progress 45 % (2 MB)
33 05:09:31.141127 progress 50 % (2 MB)
34 05:09:31.145985 progress 55 % (2 MB)
35 05:09:31.150865 progress 60 % (3 MB)
36 05:09:31.155257 progress 65 % (3 MB)
37 05:09:31.160133 progress 70 % (3 MB)
38 05:09:31.164584 progress 75 % (4 MB)
39 05:09:31.169650 progress 80 % (4 MB)
40 05:09:31.174145 progress 85 % (4 MB)
41 05:09:31.179224 progress 90 % (4 MB)
42 05:09:31.183920 progress 95 % (5 MB)
43 05:09:31.187839 progress 100 % (5 MB)
44 05:09:31.188744 5 MB downloaded in 0.14 s (39.71 MB/s)
45 05:09:31.189461 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:09:31.190614 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:09:31.191004 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:09:31.191367 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:09:31.191962 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig+debug/gcc-12/kernel/Image
51 05:09:31.192327 saving as /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/kernel/Image
52 05:09:31.192604 total size: 167969280 (160 MB)
53 05:09:31.192869 No compression specified
54 05:09:31.231718 progress 0 % (0 MB)
55 05:09:31.335515 progress 5 % (8 MB)
56 05:09:31.441535 progress 10 % (16 MB)
57 05:09:31.545815 progress 15 % (24 MB)
58 05:09:31.650773 progress 20 % (32 MB)
59 05:09:31.754878 progress 25 % (40 MB)
60 05:09:31.858223 progress 30 % (48 MB)
61 05:09:31.962347 progress 35 % (56 MB)
62 05:09:32.065767 progress 40 % (64 MB)
63 05:09:32.171194 progress 45 % (72 MB)
64 05:09:32.275907 progress 50 % (80 MB)
65 05:09:32.380226 progress 55 % (88 MB)
66 05:09:32.483051 progress 60 % (96 MB)
67 05:09:32.587164 progress 65 % (104 MB)
68 05:09:32.689848 progress 70 % (112 MB)
69 05:09:32.793186 progress 75 % (120 MB)
70 05:09:32.896433 progress 80 % (128 MB)
71 05:09:33.000710 progress 85 % (136 MB)
72 05:09:33.102588 progress 90 % (144 MB)
73 05:09:33.205532 progress 95 % (152 MB)
74 05:09:33.309002 progress 100 % (160 MB)
75 05:09:33.309550 160 MB downloaded in 2.12 s (75.67 MB/s)
76 05:09:33.310033 end: 1.2.1 http-download (duration 00:00:02) [common]
78 05:09:33.310857 end: 1.2 download-retry (duration 00:00:02) [common]
79 05:09:33.311132 start: 1.3 download-retry (timeout 00:09:58) [common]
80 05:09:33.311398 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 05:09:33.311871 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 05:09:33.312178 saving as /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 05:09:33.312390 total size: 53173 (0 MB)
84 05:09:33.312599 No compression specified
85 05:09:33.354570 progress 61 % (0 MB)
86 05:09:33.355465 progress 100 % (0 MB)
87 05:09:33.356079 0 MB downloaded in 0.04 s (1.16 MB/s)
88 05:09:33.356565 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:09:33.357378 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:09:33.357640 start: 1.4 download-retry (timeout 00:09:58) [common]
92 05:09:33.357905 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 05:09:33.358364 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 05:09:33.358614 saving as /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/nfsrootfs/full.rootfs.tar
95 05:09:33.358817 total size: 107552908 (102 MB)
96 05:09:33.359025 Using unxz to decompress xz
97 05:09:33.395535 progress 0 % (0 MB)
98 05:09:34.026724 progress 5 % (5 MB)
99 05:09:34.743447 progress 10 % (10 MB)
100 05:09:35.457487 progress 15 % (15 MB)
101 05:09:36.207570 progress 20 % (20 MB)
102 05:09:36.774536 progress 25 % (25 MB)
103 05:09:37.392926 progress 30 % (30 MB)
104 05:09:38.117768 progress 35 % (35 MB)
105 05:09:38.477875 progress 40 % (41 MB)
106 05:09:38.901740 progress 45 % (46 MB)
107 05:09:39.587210 progress 50 % (51 MB)
108 05:09:40.262401 progress 55 % (56 MB)
109 05:09:41.010368 progress 60 % (61 MB)
110 05:09:41.760438 progress 65 % (66 MB)
111 05:09:42.486775 progress 70 % (71 MB)
112 05:09:43.247365 progress 75 % (76 MB)
113 05:09:43.928856 progress 80 % (82 MB)
114 05:09:44.629415 progress 85 % (87 MB)
115 05:09:45.349684 progress 90 % (92 MB)
116 05:09:46.048944 progress 95 % (97 MB)
117 05:09:46.779210 progress 100 % (102 MB)
118 05:09:46.790938 102 MB downloaded in 13.43 s (7.64 MB/s)
119 05:09:46.791508 end: 1.4.1 http-download (duration 00:00:13) [common]
121 05:09:46.792702 end: 1.4 download-retry (duration 00:00:13) [common]
122 05:09:46.793216 start: 1.5 download-retry (timeout 00:09:44) [common]
123 05:09:46.793718 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 05:09:46.795185 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 05:09:46.795694 saving as /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/modules/modules.tar
126 05:09:46.796173 total size: 27429732 (26 MB)
127 05:09:46.796607 Using unxz to decompress xz
128 05:09:46.844082 progress 0 % (0 MB)
129 05:09:47.023564 progress 5 % (1 MB)
130 05:09:47.225401 progress 10 % (2 MB)
131 05:09:47.423955 progress 15 % (3 MB)
132 05:09:47.631636 progress 20 % (5 MB)
133 05:09:47.828551 progress 25 % (6 MB)
134 05:09:48.028951 progress 30 % (7 MB)
135 05:09:48.207230 progress 35 % (9 MB)
136 05:09:48.411975 progress 40 % (10 MB)
137 05:09:48.609485 progress 45 % (11 MB)
138 05:09:48.809079 progress 50 % (13 MB)
139 05:09:49.010139 progress 55 % (14 MB)
140 05:09:49.210564 progress 60 % (15 MB)
141 05:09:49.405675 progress 65 % (17 MB)
142 05:09:49.617273 progress 70 % (18 MB)
143 05:09:49.816272 progress 75 % (19 MB)
144 05:09:50.054342 progress 80 % (20 MB)
145 05:09:50.249506 progress 85 % (22 MB)
146 05:09:50.459751 progress 90 % (23 MB)
147 05:09:50.652997 progress 95 % (24 MB)
148 05:09:50.854227 progress 100 % (26 MB)
149 05:09:50.866123 26 MB downloaded in 4.07 s (6.43 MB/s)
150 05:09:50.867061 end: 1.5.1 http-download (duration 00:00:04) [common]
152 05:09:50.868730 end: 1.5 download-retry (duration 00:00:04) [common]
153 05:09:50.869270 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 05:09:50.869798 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 05:10:00.867725 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/675915/extract-nfsrootfs-wxqcsbhm
156 05:10:00.868348 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 05:10:00.868639 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 05:10:00.869263 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp
159 05:10:00.869741 makedir: /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin
160 05:10:00.870080 makedir: /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/tests
161 05:10:00.870399 makedir: /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/results
162 05:10:00.870749 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-add-keys
163 05:10:00.871304 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-add-sources
164 05:10:00.871859 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-background-process-start
165 05:10:00.872425 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-background-process-stop
166 05:10:00.873019 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-common-functions
167 05:10:00.873518 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-echo-ipv4
168 05:10:00.873999 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-install-packages
169 05:10:00.874485 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-installed-packages
170 05:10:00.875073 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-os-build
171 05:10:00.875600 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-probe-channel
172 05:10:00.876134 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-probe-ip
173 05:10:00.876633 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-target-ip
174 05:10:00.877130 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-target-mac
175 05:10:00.877615 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-target-storage
176 05:10:00.878099 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-case
177 05:10:00.878579 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-event
178 05:10:00.879049 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-feedback
179 05:10:00.879512 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-raise
180 05:10:00.879996 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-reference
181 05:10:00.880495 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-runner
182 05:10:00.881002 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-set
183 05:10:00.881488 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-test-shell
184 05:10:00.881969 Updating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-install-packages (oe)
185 05:10:00.882562 Updating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/bin/lava-installed-packages (oe)
186 05:10:00.883013 Creating /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/environment
187 05:10:00.883381 LAVA metadata
188 05:10:00.883643 - LAVA_JOB_ID=675915
189 05:10:00.883857 - LAVA_DISPATCHER_IP=192.168.6.2
190 05:10:00.884248 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 05:10:00.885216 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 05:10:00.885539 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 05:10:00.885746 skipped lava-vland-overlay
194 05:10:00.885987 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 05:10:00.886241 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 05:10:00.886462 skipped lava-multinode-overlay
197 05:10:00.886717 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 05:10:00.886971 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 05:10:00.887222 Loading test definitions
200 05:10:00.887508 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 05:10:00.887731 Using /lava-675915 at stage 0
202 05:10:00.888955 uuid=675915_1.6.2.4.1 testdef=None
203 05:10:00.889271 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 05:10:00.889531 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 05:10:00.891293 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 05:10:00.892097 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 05:10:00.894329 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 05:10:00.895148 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 05:10:00.897290 runner path: /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/0/tests/0_dmesg test_uuid 675915_1.6.2.4.1
212 05:10:00.897827 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 05:10:00.898579 Creating lava-test-runner.conf files
215 05:10:00.898778 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/675915/lava-overlay-joqjvwnp/lava-675915/0 for stage 0
216 05:10:00.899103 - 0_dmesg
217 05:10:00.899429 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 05:10:00.899699 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 05:10:00.921114 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 05:10:00.921474 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 05:10:00.921733 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 05:10:00.921994 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 05:10:00.922251 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 05:10:01.617189 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 05:10:01.617656 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 05:10:01.617904 extracting modules file /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675915/extract-nfsrootfs-wxqcsbhm
227 05:10:03.430988 extracting modules file /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675915/extract-overlay-ramdisk-qfe0s4_m/ramdisk
228 05:10:05.431786 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 05:10:05.432285 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 05:10:05.432587 [common] Applying overlay to NFS
231 05:10:05.432822 [common] Applying overlay /var/lib/lava/dispatcher/tmp/675915/compress-overlay-oyeatm8e/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/675915/extract-nfsrootfs-wxqcsbhm
232 05:10:05.462119 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 05:10:05.462482 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 05:10:05.462752 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 05:10:05.462980 Converting downloaded kernel to a uImage
236 05:10:05.463281 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/kernel/Image /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/kernel/uImage
237 05:10:07.137542 output: Image Name:
238 05:10:07.137994 output: Created: Fri Aug 30 05:10:05 2024
239 05:10:07.138212 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 05:10:07.138417 output: Data Size: 167969280 Bytes = 164032.50 KiB = 160.19 MiB
241 05:10:07.138617 output: Load Address: 01080000
242 05:10:07.138816 output: Entry Point: 01080000
243 05:10:07.139013 output:
244 05:10:07.139358 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 05:10:07.139637 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 05:10:07.139908 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 05:10:07.140226 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 05:10:07.140496 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 05:10:07.140763 Building ramdisk /var/lib/lava/dispatcher/tmp/675915/extract-overlay-ramdisk-qfe0s4_m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/675915/extract-overlay-ramdisk-qfe0s4_m/ramdisk
250 05:10:12.639150 >> 421456 blocks
251 05:10:30.074467 Adding RAMdisk u-boot header.
252 05:10:30.075132 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/675915/extract-overlay-ramdisk-qfe0s4_m/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/675915/extract-overlay-ramdisk-qfe0s4_m/ramdisk.cpio.gz.uboot
253 05:10:30.592285 output: Image Name:
254 05:10:30.592707 output: Created: Fri Aug 30 05:10:30 2024
255 05:10:30.592919 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 05:10:30.593123 output: Data Size: 50547929 Bytes = 49363.21 KiB = 48.21 MiB
257 05:10:30.593322 output: Load Address: 00000000
258 05:10:30.593520 output: Entry Point: 00000000
259 05:10:30.593716 output:
260 05:10:30.594298 rename /var/lib/lava/dispatcher/tmp/675915/extract-overlay-ramdisk-qfe0s4_m/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/ramdisk/ramdisk.cpio.gz.uboot
261 05:10:30.594713 end: 1.6.8 compress-ramdisk (duration 00:00:23) [common]
262 05:10:30.594996 end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
263 05:10:30.595271 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 05:10:30.595511 No LXC device requested
265 05:10:30.595766 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 05:10:30.596239 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 05:10:30.596934 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 05:10:30.597405 Checking files for TFTP limit of 4294967296 bytes.
269 05:10:30.600365 end: 1 tftp-deploy (duration 00:01:00) [common]
270 05:10:30.601002 start: 2 uboot-action (timeout 00:05:00) [common]
271 05:10:30.601578 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 05:10:30.602116 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 05:10:30.602663 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 05:10:30.603237 Using kernel file from prepare-kernel: 675915/tftp-deploy-_wto_co5/kernel/uImage
275 05:10:30.603924 substitutions:
276 05:10:30.604403 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 05:10:30.604846 - {DTB_ADDR}: 0x01070000
278 05:10:30.605282 - {DTB}: 675915/tftp-deploy-_wto_co5/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 05:10:30.605718 - {INITRD}: 675915/tftp-deploy-_wto_co5/ramdisk/ramdisk.cpio.gz.uboot
280 05:10:30.606153 - {KERNEL_ADDR}: 0x01080000
281 05:10:30.606581 - {KERNEL}: 675915/tftp-deploy-_wto_co5/kernel/uImage
282 05:10:30.607007 - {LAVA_MAC}: None
283 05:10:30.607473 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/675915/extract-nfsrootfs-wxqcsbhm
284 05:10:30.607909 - {NFS_SERVER_IP}: 192.168.6.2
285 05:10:30.608363 - {PRESEED_CONFIG}: None
286 05:10:30.608789 - {PRESEED_LOCAL}: None
287 05:10:30.609211 - {RAMDISK_ADDR}: 0x08000000
288 05:10:30.609632 - {RAMDISK}: 675915/tftp-deploy-_wto_co5/ramdisk/ramdisk.cpio.gz.uboot
289 05:10:30.610056 - {ROOT_PART}: None
290 05:10:30.610477 - {ROOT}: None
291 05:10:30.610899 - {SERVER_IP}: 192.168.6.2
292 05:10:30.611323 - {TEE_ADDR}: 0x83000000
293 05:10:30.611742 - {TEE}: None
294 05:10:30.612191 Parsed boot commands:
295 05:10:30.612605 - setenv autoload no
296 05:10:30.613025 - setenv initrd_high 0xffffffff
297 05:10:30.613446 - setenv fdt_high 0xffffffff
298 05:10:30.613867 - dhcp
299 05:10:30.614286 - setenv serverip 192.168.6.2
300 05:10:30.614707 - tftpboot 0x01080000 675915/tftp-deploy-_wto_co5/kernel/uImage
301 05:10:30.615130 - tftpboot 0x08000000 675915/tftp-deploy-_wto_co5/ramdisk/ramdisk.cpio.gz.uboot
302 05:10:30.615553 - tftpboot 0x01070000 675915/tftp-deploy-_wto_co5/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 05:10:30.615975 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/675915/extract-nfsrootfs-wxqcsbhm,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 05:10:30.616430 - bootm 0x01080000 0x08000000 0x01070000
305 05:10:30.616970 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 05:10:30.618587 start: 2.3 connect-device (timeout 00:05:00) [common]
308 05:10:30.619039 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 05:10:30.634005 Setting prompt string to ['lava-test: # ']
310 05:10:30.635597 end: 2.3 connect-device (duration 00:00:00) [common]
311 05:10:30.636307 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 05:10:30.636927 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 05:10:30.637494 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 05:10:30.638763 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 05:10:30.673058 >> OK - accepted request
316 05:10:30.675142 Returned 0 in 0 seconds
317 05:10:30.776328 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 05:10:30.778084 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 05:10:30.778722 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 05:10:30.779280 Setting prompt string to ['Hit any key to stop autoboot']
322 05:10:30.779780 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 05:10:30.781524 Trying 192.168.56.21...
324 05:10:30.782064 Connected to conserv1.
325 05:10:30.782511 Escape character is '^]'.
326 05:10:30.782962
327 05:10:30.783419 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 05:10:30.783866
329 05:10:37.836127 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 05:10:37.836760 bl2_stage_init 0x01
331 05:10:37.837251 bl2_stage_init 0x81
332 05:10:37.841674 hw id: 0x0000 - pwm id 0x01
333 05:10:37.842175 bl2_stage_init 0xc1
334 05:10:37.845353 bl2_stage_init 0x02
335 05:10:37.845842
336 05:10:37.846305 L0:00000000
337 05:10:37.846752 L1:00000703
338 05:10:37.850926 L2:00008067
339 05:10:37.851414 L3:15000000
340 05:10:37.851885 S1:00000000
341 05:10:37.852392 B2:20282000
342 05:10:37.852843 B1:a0f83180
343 05:10:37.853287
344 05:10:37.856540 TE: 69664
345 05:10:37.857033
346 05:10:37.862120 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 05:10:37.862607
348 05:10:37.863061 Board ID = 1
349 05:10:37.863504 Set cpu clk to 24M
350 05:10:37.865443 Set clk81 to 24M
351 05:10:37.865925 Use GP1_pll as DSU clk.
352 05:10:37.870956 DSU clk: 1200 Mhz
353 05:10:37.871438 CPU clk: 1200 MHz
354 05:10:37.871887 Set clk81 to 166.6M
355 05:10:37.876551 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 05:10:37.882151 board id: 1
357 05:10:37.886021 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 05:10:37.898899 fw parse done
359 05:10:37.904872 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 05:10:37.948194 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 05:10:37.959238 PIEI prepare done
362 05:10:37.959742 fastboot data load
363 05:10:37.960255 fastboot data verify
364 05:10:37.964822 verify result: 266
365 05:10:37.970424 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 05:10:37.970921 LPDDR4 probe
367 05:10:37.971369 ddr clk to 1584MHz
368 05:10:37.978411 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 05:10:38.015907
370 05:10:38.016447 dmc_version 0001
371 05:10:38.023147 Check phy result
372 05:10:38.029167 INFO : End of CA training
373 05:10:38.029666 INFO : End of initialization
374 05:10:38.034759 INFO : Training has run successfully!
375 05:10:38.035257 Check phy result
376 05:10:38.040356 INFO : End of initialization
377 05:10:38.040851 INFO : End of read enable training
378 05:10:38.043674 INFO : End of fine write leveling
379 05:10:38.049167 INFO : End of Write leveling coarse delay
380 05:10:38.054794 INFO : Training has run successfully!
381 05:10:38.055286 Check phy result
382 05:10:38.055732 INFO : End of initialization
383 05:10:38.060397 INFO : End of read dq deskew training
384 05:10:38.065962 INFO : End of MPR read delay center optimization
385 05:10:38.066478 INFO : End of write delay center optimization
386 05:10:38.071660 INFO : End of read delay center optimization
387 05:10:38.077192 INFO : End of max read latency training
388 05:10:38.077702 INFO : Training has run successfully!
389 05:10:38.082775 1D training succeed
390 05:10:38.088755 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 05:10:38.137028 Check phy result
392 05:10:38.137554 INFO : End of initialization
393 05:10:38.164404 INFO : End of 2D read delay Voltage center optimization
394 05:10:38.188650 INFO : End of 2D read delay Voltage center optimization
395 05:10:38.245296 INFO : End of 2D write delay Voltage center optimization
396 05:10:38.299282 INFO : End of 2D write delay Voltage center optimization
397 05:10:38.304841 INFO : Training has run successfully!
398 05:10:38.305339
399 05:10:38.305791 channel==0
400 05:10:38.310469 RxClkDly_Margin_A0==78 ps 8
401 05:10:38.310965 TxDqDly_Margin_A0==98 ps 10
402 05:10:38.316087 RxClkDly_Margin_A1==88 ps 9
403 05:10:38.316587 TxDqDly_Margin_A1==88 ps 9
404 05:10:38.317045 TrainedVREFDQ_A0==74
405 05:10:38.321747 TrainedVREFDQ_A1==75
406 05:10:38.322252 VrefDac_Margin_A0==23
407 05:10:38.322696 DeviceVref_Margin_A0==40
408 05:10:38.327916 VrefDac_Margin_A1==23
409 05:10:38.328436 DeviceVref_Margin_A1==39
410 05:10:38.328884
411 05:10:38.329332
412 05:10:38.329776 channel==1
413 05:10:38.332860 RxClkDly_Margin_A0==88 ps 9
414 05:10:38.333356 TxDqDly_Margin_A0==98 ps 10
415 05:10:38.338455 RxClkDly_Margin_A1==78 ps 8
416 05:10:38.338948 TxDqDly_Margin_A1==78 ps 8
417 05:10:38.344058 TrainedVREFDQ_A0==78
418 05:10:38.344557 TrainedVREFDQ_A1==75
419 05:10:38.345007 VrefDac_Margin_A0==23
420 05:10:38.349756 DeviceVref_Margin_A0==36
421 05:10:38.350249 VrefDac_Margin_A1==22
422 05:10:38.355242 DeviceVref_Margin_A1==38
423 05:10:38.355734
424 05:10:38.356222 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 05:10:38.356664
426 05:10:38.388804 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 05:10:38.389384 2D training succeed
428 05:10:38.394421 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 05:10:38.408822 auto size-- 65535DDR cs0 size: 2048MB
430 05:10:38.409338 DDR cs1 size: 2048MB
431 05:10:38.409799 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 05:10:38.410553 cs0 DataBus test pass
433 05:10:38.411026 cs1 DataBus test pass
434 05:10:38.411468 cs0 AddrBus test pass
435 05:10:38.414915 cs1 AddrBus test pass
436 05:10:38.415447
437 05:10:38.415918 100bdlr_step_size ps== 485
438 05:10:38.416474 result report
439 05:10:38.420523 boot times 0Enable ddr reg access
440 05:10:38.427674 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 05:10:38.441522 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 05:10:39.100767 bl2z: ptr: 05129330, size: 00001e40
443 05:10:39.107948 0.0;M3 CHK:0;cm4_sp_mode 0
444 05:10:39.108490 MVN_1=0x00000000
445 05:10:39.108948 MVN_2=0x00000000
446 05:10:39.119428 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 05:10:39.119923 OPS=0x04
448 05:10:39.120414 ring efuse init
449 05:10:39.125075 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 05:10:39.125566 [0.017355 Inits done]
451 05:10:39.126014 secure task start!
452 05:10:39.133051 high task start!
453 05:10:39.133536 low task start!
454 05:10:39.133982 run into bl31
455 05:10:39.141735 NOTICE: BL31: v1.3(release):4fc40b1
456 05:10:39.149441 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 05:10:39.149939 NOTICE: BL31: G12A normal boot!
458 05:10:39.165051 NOTICE: BL31: BL33 decompress pass
459 05:10:39.170814 ERROR: Error initializing runtime service opteed_fast
460 05:10:40.388884 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 05:10:40.389510 bl2_stage_init 0x01
462 05:10:40.389996 bl2_stage_init 0x81
463 05:10:40.394549 hw id: 0x0000 - pwm id 0x01
464 05:10:40.395061 bl2_stage_init 0xc1
465 05:10:40.395516 bl2_stage_init 0x02
466 05:10:40.395962
467 05:10:40.400215 L0:00000000
468 05:10:40.400723 L1:00000703
469 05:10:40.401377 L2:00008067
470 05:10:40.401857 L3:15000000
471 05:10:40.402303 S1:00000000
472 05:10:40.403057 B2:20282000
473 05:10:40.407151 B1:a0f83180
474 05:10:40.407682
475 05:10:40.408189 TE: 71207
476 05:10:40.408653
477 05:10:40.412657 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 05:10:40.413173
479 05:10:40.413638 Board ID = 1
480 05:10:40.418116 Set cpu clk to 24M
481 05:10:40.418618 Set clk81 to 24M
482 05:10:40.419069 Use GP1_pll as DSU clk.
483 05:10:40.421681 DSU clk: 1200 Mhz
484 05:10:40.422182 CPU clk: 1200 MHz
485 05:10:40.427229 Set clk81 to 166.6M
486 05:10:40.432880 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 05:10:40.433385 board id: 1
488 05:10:40.438990 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 05:10:40.450587 fw parse done
490 05:10:40.456568 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 05:10:40.499247 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 05:10:40.510134 PIEI prepare done
493 05:10:40.510639 fastboot data load
494 05:10:40.511092 fastboot data verify
495 05:10:40.515810 verify result: 266
496 05:10:40.521416 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 05:10:40.521926 LPDDR4 probe
498 05:10:40.522377 ddr clk to 1584MHz
499 05:10:41.884998 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 05:10:41.885678 bl2_stage_init 0x01
501 05:10:41.886162 bl2_stage_init 0x81
502 05:10:41.890663 hw id: 0x0000 - pwm id 0x01
503 05:10:41.891211 bl2_stage_init 0xc1
504 05:10:41.896267 bl2_stage_init 0x02
505 05:10:41.896857
506 05:10:41.897323 L0:00000000
507 05:10:41.897764 L1:00000703
508 05:10:41.898195 L2:00008067
509 05:10:41.898627 L3:15000000
510 05:10:41.901736 S1:00000000
511 05:10:41.902249 B2:20282000
512 05:10:41.902689 B1:a0f83180
513 05:10:41.903120
514 05:10:41.903555 TE: 68454
515 05:10:41.904016
516 05:10:41.907240 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 05:10:41.907736
518 05:10:41.912888 Board ID = 1
519 05:10:41.913379 Set cpu clk to 24M
520 05:10:41.913812 Set clk81 to 24M
521 05:10:41.918429 Use GP1_pll as DSU clk.
522 05:10:41.918917 DSU clk: 1200 Mhz
523 05:10:41.919350 CPU clk: 1200 MHz
524 05:10:41.924080 Set clk81 to 166.6M
525 05:10:41.929614 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 05:10:41.930102 board id: 1
527 05:10:41.936815 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 05:10:41.947760 fw parse done
529 05:10:41.953728 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 05:10:41.996863 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 05:10:42.008071 PIEI prepare done
532 05:10:42.008573 fastboot data load
533 05:10:42.009009 fastboot data verify
534 05:10:42.013670 verify result: 266
535 05:10:42.019315 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 05:10:42.019811 LPDDR4 probe
537 05:10:42.020286 ddr clk to 1584MHz
538 05:10:42.027234 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 05:10:42.064963
540 05:10:42.065473 dmc_version 0001
541 05:10:42.072047 Check phy result
542 05:10:42.077978 INFO : End of CA training
543 05:10:42.078468 INFO : End of initialization
544 05:10:42.083564 INFO : Training has run successfully!
545 05:10:42.084100 Check phy result
546 05:10:42.089252 INFO : End of initialization
547 05:10:42.089794 INFO : End of read enable training
548 05:10:42.094778 INFO : End of fine write leveling
549 05:10:42.100358 INFO : End of Write leveling coarse delay
550 05:10:42.100871 INFO : Training has run successfully!
551 05:10:42.101331 Check phy result
552 05:10:42.105944 INFO : End of initialization
553 05:10:42.106472 INFO : End of read dq deskew training
554 05:10:42.111549 INFO : End of MPR read delay center optimization
555 05:10:42.117205 INFO : End of write delay center optimization
556 05:10:42.122782 INFO : End of read delay center optimization
557 05:10:42.123288 INFO : End of max read latency training
558 05:10:42.128394 INFO : Training has run successfully!
559 05:10:42.128900 1D training succeed
560 05:10:42.137545 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 05:10:42.185827 Check phy result
562 05:10:42.186337 INFO : End of initialization
563 05:10:42.213342 INFO : End of 2D read delay Voltage center optimization
564 05:10:42.237469 INFO : End of 2D read delay Voltage center optimization
565 05:10:42.294088 INFO : End of 2D write delay Voltage center optimization
566 05:10:42.348347 INFO : End of 2D write delay Voltage center optimization
567 05:10:42.353715 INFO : Training has run successfully!
568 05:10:42.354234
569 05:10:42.354695 channel==0
570 05:10:42.359452 RxClkDly_Margin_A0==88 ps 9
571 05:10:42.359969 TxDqDly_Margin_A0==88 ps 9
572 05:10:42.362701 RxClkDly_Margin_A1==88 ps 9
573 05:10:42.363208 TxDqDly_Margin_A1==88 ps 9
574 05:10:42.368294 TrainedVREFDQ_A0==74
575 05:10:42.368805 TrainedVREFDQ_A1==74
576 05:10:42.369264 VrefDac_Margin_A0==23
577 05:10:42.373831 DeviceVref_Margin_A0==40
578 05:10:42.374334 VrefDac_Margin_A1==23
579 05:10:42.379425 DeviceVref_Margin_A1==40
580 05:10:42.379939
581 05:10:42.380425
582 05:10:42.380871 channel==1
583 05:10:42.381306 RxClkDly_Margin_A0==88 ps 9
584 05:10:42.384971 TxDqDly_Margin_A0==88 ps 9
585 05:10:42.385481 RxClkDly_Margin_A1==78 ps 8
586 05:10:42.390580 TxDqDly_Margin_A1==88 ps 9
587 05:10:42.391087 TrainedVREFDQ_A0==75
588 05:10:42.391546 TrainedVREFDQ_A1==75
589 05:10:42.396272 VrefDac_Margin_A0==22
590 05:10:42.396772 DeviceVref_Margin_A0==39
591 05:10:42.397220 VrefDac_Margin_A1==22
592 05:10:42.401755 DeviceVref_Margin_A1==39
593 05:10:42.402259
594 05:10:42.407458 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 05:10:42.407966
596 05:10:42.435470 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
597 05:10:42.440928 2D training succeed
598 05:10:42.446486 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 05:10:42.446998 auto size-- 65535DDR cs0 size: 2048MB
600 05:10:42.452113 DDR cs1 size: 2048MB
601 05:10:42.452623 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 05:10:42.457682 cs0 DataBus test pass
603 05:10:42.458188 cs1 DataBus test pass
604 05:10:42.458636 cs0 AddrBus test pass
605 05:10:42.463344 cs1 AddrBus test pass
606 05:10:42.463850
607 05:10:42.464349 100bdlr_step_size ps== 471
608 05:10:42.464803 result report
609 05:10:42.468886 boot times 0Enable ddr reg access
610 05:10:42.476258 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 05:10:42.490035 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 05:10:43.149597 bl2z: ptr: 05129330, size: 00001e40
613 05:10:43.158307 0.0;M3 CHK:0;cm4_sp_mode 0
614 05:10:43.158848 MVN_1=0x00000000
615 05:10:43.159304 MVN_2=0x00000000
616 05:10:43.169755 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 05:10:43.170285 OPS=0x04
618 05:10:43.170759 ring efuse init
619 05:10:43.175436 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 05:10:43.175958 [0.017354 Inits done]
621 05:10:43.176452 secure task start!
622 05:10:43.182755 high task start!
623 05:10:43.183267 low task start!
624 05:10:43.183716 run into bl31
625 05:10:43.191461 NOTICE: BL31: v1.3(release):4fc40b1
626 05:10:43.199171 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 05:10:43.199710 NOTICE: BL31: G12A normal boot!
628 05:10:43.214738 NOTICE: BL31: BL33 decompress pass
629 05:10:43.220403 ERROR: Error initializing runtime service opteed_fast
630 05:10:44.436736 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 05:10:44.437384 bl2_stage_init 0x01
632 05:10:44.437881 bl2_stage_init 0x81
633 05:10:44.442415 hw id: 0x0000 - pwm id 0x01
634 05:10:44.442974 bl2_stage_init 0xc1
635 05:10:44.448057 bl2_stage_init 0x02
636 05:10:44.448623
637 05:10:44.449098 L0:00000000
638 05:10:44.449553 L1:00000703
639 05:10:44.450004 L2:00008067
640 05:10:44.450449 L3:15000000
641 05:10:44.453649 S1:00000000
642 05:10:44.454211 B2:20282000
643 05:10:44.454671 B1:a0f83180
644 05:10:44.455120
645 05:10:44.455563 TE: 70005
646 05:10:44.456041
647 05:10:44.459192 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 05:10:44.459744
649 05:10:44.464800 Board ID = 1
650 05:10:44.465358 Set cpu clk to 24M
651 05:10:44.465820 Set clk81 to 24M
652 05:10:44.470404 Use GP1_pll as DSU clk.
653 05:10:44.470967 DSU clk: 1200 Mhz
654 05:10:44.471424 CPU clk: 1200 MHz
655 05:10:44.476057 Set clk81 to 166.6M
656 05:10:44.481673 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 05:10:44.482257 board id: 1
658 05:10:44.488829 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 05:10:44.499528 fw parse done
660 05:10:44.505423 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 05:10:44.548054 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 05:10:44.559009 PIEI prepare done
663 05:10:44.559586 fastboot data load
664 05:10:44.560089 fastboot data verify
665 05:10:44.564671 verify result: 266
666 05:10:44.570176 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 05:10:44.570745 LPDDR4 probe
668 05:10:44.571211 ddr clk to 1584MHz
669 05:10:44.578086 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 05:10:44.615408
671 05:10:44.616051 dmc_version 0001
672 05:10:44.622124 Check phy result
673 05:10:44.628009 INFO : End of CA training
674 05:10:44.628569 INFO : End of initialization
675 05:10:44.633663 INFO : Training has run successfully!
676 05:10:44.634210 Check phy result
677 05:10:44.639170 INFO : End of initialization
678 05:10:44.639709 INFO : End of read enable training
679 05:10:44.644800 INFO : End of fine write leveling
680 05:10:44.650375 INFO : End of Write leveling coarse delay
681 05:10:44.650917 INFO : Training has run successfully!
682 05:10:44.651381 Check phy result
683 05:10:44.655972 INFO : End of initialization
684 05:10:44.656546 INFO : End of read dq deskew training
685 05:10:44.661658 INFO : End of MPR read delay center optimization
686 05:10:44.667180 INFO : End of write delay center optimization
687 05:10:44.672775 INFO : End of read delay center optimization
688 05:10:44.673314 INFO : End of max read latency training
689 05:10:44.678360 INFO : Training has run successfully!
690 05:10:44.678905 1D training succeed
691 05:10:44.687537 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 05:10:44.735149 Check phy result
693 05:10:44.735717 INFO : End of initialization
694 05:10:44.757522 INFO : End of 2D read delay Voltage center optimization
695 05:10:44.776768 INFO : End of 2D read delay Voltage center optimization
696 05:10:44.828600 INFO : End of 2D write delay Voltage center optimization
697 05:10:44.877767 INFO : End of 2D write delay Voltage center optimization
698 05:10:44.883325 INFO : Training has run successfully!
699 05:10:44.883888
700 05:10:44.884413 channel==0
701 05:10:44.888903 RxClkDly_Margin_A0==78 ps 8
702 05:10:44.889472 TxDqDly_Margin_A0==98 ps 10
703 05:10:44.894573 RxClkDly_Margin_A1==78 ps 8
704 05:10:44.895113 TxDqDly_Margin_A1==98 ps 10
705 05:10:44.895582 TrainedVREFDQ_A0==74
706 05:10:44.900097 TrainedVREFDQ_A1==74
707 05:10:44.900640 VrefDac_Margin_A0==23
708 05:10:44.901103 DeviceVref_Margin_A0==40
709 05:10:44.905696 VrefDac_Margin_A1==23
710 05:10:44.906243 DeviceVref_Margin_A1==40
711 05:10:44.906704
712 05:10:44.907152
713 05:10:44.911305 channel==1
714 05:10:44.911853 RxClkDly_Margin_A0==88 ps 9
715 05:10:44.912354 TxDqDly_Margin_A0==98 ps 10
716 05:10:44.916897 RxClkDly_Margin_A1==78 ps 8
717 05:10:44.917440 TxDqDly_Margin_A1==88 ps 9
718 05:10:44.922566 TrainedVREFDQ_A0==78
719 05:10:44.923128 TrainedVREFDQ_A1==75
720 05:10:44.923595 VrefDac_Margin_A0==22
721 05:10:44.928108 DeviceVref_Margin_A0==36
722 05:10:44.928653 VrefDac_Margin_A1==22
723 05:10:44.933729 DeviceVref_Margin_A1==38
724 05:10:44.934297
725 05:10:44.934766 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 05:10:44.935218
727 05:10:44.967283 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
728 05:10:44.967928 2D training succeed
729 05:10:44.972928 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 05:10:44.978479 auto size-- 65535DDR cs0 size: 2048MB
731 05:10:44.979038 DDR cs1 size: 2048MB
732 05:10:44.984133 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 05:10:44.984700 cs0 DataBus test pass
734 05:10:44.989729 cs1 DataBus test pass
735 05:10:44.990281 cs0 AddrBus test pass
736 05:10:44.990743 cs1 AddrBus test pass
737 05:10:44.991198
738 05:10:44.995279 100bdlr_step_size ps== 478
739 05:10:44.995842 result report
740 05:10:45.000900 boot times 0Enable ddr reg access
741 05:10:45.006168 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 05:10:45.019977 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 05:10:45.674913 bl2z: ptr: 05129330, size: 00001e40
744 05:10:45.682852 0.0;M3 CHK:0;cm4_sp_mode 0
745 05:10:45.683422 MVN_1=0x00000000
746 05:10:45.683891 MVN_2=0x00000000
747 05:10:45.694272 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 05:10:45.694838 OPS=0x04
749 05:10:45.695309 ring efuse init
750 05:10:45.699963 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 05:10:45.700546 [0.017319 Inits done]
752 05:10:45.701007 secure task start!
753 05:10:45.707162 high task start!
754 05:10:45.707699 low task start!
755 05:10:45.708203 run into bl31
756 05:10:45.715829 NOTICE: BL31: v1.3(release):4fc40b1
757 05:10:45.723596 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 05:10:45.724191 NOTICE: BL31: G12A normal boot!
759 05:10:45.739076 NOTICE: BL31: BL33 decompress pass
760 05:10:45.744864 ERROR: Error initializing runtime service opteed_fast
761 05:10:46.540172
762 05:10:46.540839
763 05:10:46.545531 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 05:10:46.546079
765 05:10:46.548999 Model: Libre Computer AML-S905D3-CC Solitude
766 05:10:46.696072 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 05:10:46.711426 DRAM: 2 GiB (effective 3.8 GiB)
768 05:10:46.812383 Core: 406 devices, 33 uclasses, devicetree: separate
769 05:10:46.818239 WDT: Not starting watchdog@f0d0
770 05:10:46.843372 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 05:10:46.855556 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 05:10:46.860591 ** Bad device specification mmc 0 **
773 05:10:46.870635 Card did not respond to voltage select! : -110
774 05:10:46.878287 ** Bad device specification mmc 0 **
775 05:10:46.878842 Couldn't find partition mmc 0
776 05:10:46.886603 Card did not respond to voltage select! : -110
777 05:10:46.892204 ** Bad device specification mmc 0 **
778 05:10:46.892782 Couldn't find partition mmc 0
779 05:10:46.897207 Error: could not access storage.
780 05:10:47.193482 Net: eth0: ethernet@ff3f0000
781 05:10:47.194127 starting USB...
782 05:10:47.438237 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 05:10:47.438816 Starting the controller
784 05:10:47.445296 USB XHCI 1.10
785 05:10:48.999699 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 05:10:49.008094 scanning usb for storage devices... 0 Storage Device(s) found
788 05:10:49.059693 Hit any key to stop autoboot: 1
789 05:10:49.060583 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 05:10:49.061323 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 05:10:49.061876 Setting prompt string to ['=>']
792 05:10:49.062419 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 05:10:49.074195 0
794 05:10:49.075170 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 05:10:49.176510 => setenv autoload no
797 05:10:49.177550 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 05:10:49.183206 setenv autoload no
800 05:10:49.284840 => setenv initrd_high 0xffffffff
801 05:10:49.285861 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 05:10:49.290466 setenv initrd_high 0xffffffff
804 05:10:49.392076 => setenv fdt_high 0xffffffff
805 05:10:49.393038 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 05:10:49.397700 setenv fdt_high 0xffffffff
808 05:10:49.499305 => dhcp
809 05:10:49.500132 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 05:10:49.505378 dhcp
811 05:10:50.160768 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 05:10:50.161405 Speed: 1000, full duplex
813 05:10:50.161877 BOOTP broadcast 1
814 05:10:50.409182 BOOTP broadcast 2
815 05:10:50.910207 BOOTP broadcast 3
816 05:10:51.911200 BOOTP broadcast 4
817 05:10:53.912260 BOOTP broadcast 5
818 05:10:53.923798 DHCP client bound to address 192.168.6.12 (3762 ms)
820 05:10:54.025416 => setenv serverip 192.168.6.2
821 05:10:54.026371 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
822 05:10:54.030926 setenv serverip 192.168.6.2
824 05:10:54.132503 => tftpboot 0x01080000 675915/tftp-deploy-_wto_co5/kernel/uImage
825 05:10:54.133434 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 05:10:54.140106 tftpboot 0x01080000 675915/tftp-deploy-_wto_co5/kernel/uImage
827 05:10:54.140633 Speed: 1000, full duplex
828 05:10:54.141092 Using ethernet@ff3f0000 device
829 05:10:54.145563 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 05:10:54.151000 Filename '675915/tftp-deploy-_wto_co5/kernel/uImage'.
831 05:10:54.154933 Load address: 0x1080000
832 05:10:58.281614 Loading: *###################
833 05:10:58.282266 TFTP error: trying to overwrite reserved memory...
835 05:10:58.283770 end: 2.4.3 bootloader-commands (duration 00:00:09) [common]
838 05:10:58.285859 end: 2.4 uboot-commands (duration 00:00:28) [common]
840 05:10:58.287439 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
842 05:10:58.288652 end: 2 uboot-action (duration 00:00:28) [common]
844 05:10:58.290355 Cleaning after the job
845 05:10:58.290947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/ramdisk
846 05:10:58.321072 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/kernel
847 05:10:58.372266 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/dtb
848 05:10:58.373061 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/nfsrootfs
849 05:10:58.518410 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675915/tftp-deploy-_wto_co5/modules
850 05:10:58.571131 start: 4.1 power-off (timeout 00:00:30) [common]
851 05:10:58.571815 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
852 05:10:58.608442 >> OK - accepted request
853 05:10:58.610497 Returned 0 in 0 seconds
854 05:10:58.711282 end: 4.1 power-off (duration 00:00:00) [common]
856 05:10:58.712316 start: 4.2 read-feedback (timeout 00:10:00) [common]
857 05:10:58.712980 Listened to connection for namespace 'common' for up to 1s
858 05:10:59.713926 Finalising connection for namespace 'common'
859 05:10:59.714399 Disconnecting from shell: Finalise
860 05:10:59.714672 =>
861 05:10:59.815322 end: 4.2 read-feedback (duration 00:00:01) [common]
862 05:10:59.815769 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/675915
863 05:11:01.642488 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/675915
864 05:11:01.643097 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.