Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:41:29.822241 lava-dispatcher, installed at version: 2024.01
2 04:41:29.823040 start: 0 validate
3 04:41:29.823517 Start time: 2024-08-30 04:41:29.823487+00:00 (UTC)
4 04:41:29.824089 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:41:29.824654 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:41:29.868367 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:41:29.868908 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:41:29.899697 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:41:29.900356 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:41:29.936460 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:41:29.936969 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:41:29.966021 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:41:29.966525 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:41:30.009234 validate duration: 0.19
16 04:41:30.010757 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:41:30.011364 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:41:30.011958 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:41:30.012961 Not decompressing ramdisk as can be used compressed.
20 04:41:30.013728 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:41:30.014241 saving as /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/ramdisk/initrd.cpio.gz
22 04:41:30.014752 total size: 5628140 (5 MB)
23 04:41:30.058019 progress 0 % (0 MB)
24 04:41:30.065546 progress 5 % (0 MB)
25 04:41:30.074515 progress 10 % (0 MB)
26 04:41:30.082560 progress 15 % (0 MB)
27 04:41:30.091017 progress 20 % (1 MB)
28 04:41:30.095126 progress 25 % (1 MB)
29 04:41:30.099139 progress 30 % (1 MB)
30 04:41:30.103105 progress 35 % (1 MB)
31 04:41:30.106720 progress 40 % (2 MB)
32 04:41:30.110737 progress 45 % (2 MB)
33 04:41:30.114375 progress 50 % (2 MB)
34 04:41:30.118403 progress 55 % (2 MB)
35 04:41:30.122404 progress 60 % (3 MB)
36 04:41:30.125968 progress 65 % (3 MB)
37 04:41:30.129867 progress 70 % (3 MB)
38 04:41:30.133402 progress 75 % (4 MB)
39 04:41:30.137370 progress 80 % (4 MB)
40 04:41:30.141372 progress 85 % (4 MB)
41 04:41:30.145290 progress 90 % (4 MB)
42 04:41:30.149141 progress 95 % (5 MB)
43 04:41:30.152467 progress 100 % (5 MB)
44 04:41:30.153145 5 MB downloaded in 0.14 s (38.78 MB/s)
45 04:41:30.153717 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:41:30.154657 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:41:30.154964 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:41:30.155244 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:41:30.155759 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig/gcc-12/kernel/Image
51 04:41:30.156035 saving as /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/kernel/Image
52 04:41:30.156260 total size: 45308416 (43 MB)
53 04:41:30.156481 No compression specified
54 04:41:30.199034 progress 0 % (0 MB)
55 04:41:30.226842 progress 5 % (2 MB)
56 04:41:30.254368 progress 10 % (4 MB)
57 04:41:30.281901 progress 15 % (6 MB)
58 04:41:30.309235 progress 20 % (8 MB)
59 04:41:30.336516 progress 25 % (10 MB)
60 04:41:30.363216 progress 30 % (12 MB)
61 04:41:30.390158 progress 35 % (15 MB)
62 04:41:30.417741 progress 40 % (17 MB)
63 04:41:30.444837 progress 45 % (19 MB)
64 04:41:30.471898 progress 50 % (21 MB)
65 04:41:30.498630 progress 55 % (23 MB)
66 04:41:30.525468 progress 60 % (25 MB)
67 04:41:30.552374 progress 65 % (28 MB)
68 04:41:30.579653 progress 70 % (30 MB)
69 04:41:30.607481 progress 75 % (32 MB)
70 04:41:30.634411 progress 80 % (34 MB)
71 04:41:30.661550 progress 85 % (36 MB)
72 04:41:30.688496 progress 90 % (38 MB)
73 04:41:30.715083 progress 95 % (41 MB)
74 04:41:30.741814 progress 100 % (43 MB)
75 04:41:30.742532 43 MB downloaded in 0.59 s (73.70 MB/s)
76 04:41:30.743010 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:41:30.743822 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:41:30.744126 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:41:30.744395 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:41:30.744870 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:41:30.745137 saving as /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:41:30.745343 total size: 54667 (0 MB)
84 04:41:30.745549 No compression specified
85 04:41:30.785058 progress 59 % (0 MB)
86 04:41:30.785951 progress 100 % (0 MB)
87 04:41:30.786543 0 MB downloaded in 0.04 s (1.27 MB/s)
88 04:41:30.787083 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:41:30.788041 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:41:30.788371 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:41:30.788686 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:41:30.789196 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:41:30.789477 saving as /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/nfsrootfs/full.rootfs.tar
95 04:41:30.789716 total size: 474398908 (452 MB)
96 04:41:30.789948 Using unxz to decompress xz
97 04:41:30.831646 progress 0 % (0 MB)
98 04:41:31.929483 progress 5 % (22 MB)
99 04:41:33.540544 progress 10 % (45 MB)
100 04:41:34.006499 progress 15 % (67 MB)
101 04:41:34.772734 progress 20 % (90 MB)
102 04:41:35.299301 progress 25 % (113 MB)
103 04:41:35.653149 progress 30 % (135 MB)
104 04:41:36.279376 progress 35 % (158 MB)
105 04:41:37.220420 progress 40 % (181 MB)
106 04:41:38.071205 progress 45 % (203 MB)
107 04:41:38.643673 progress 50 % (226 MB)
108 04:41:39.272089 progress 55 % (248 MB)
109 04:41:40.450911 progress 60 % (271 MB)
110 04:41:41.896464 progress 65 % (294 MB)
111 04:41:43.469787 progress 70 % (316 MB)
112 04:41:46.597551 progress 75 % (339 MB)
113 04:41:49.441280 progress 80 % (361 MB)
114 04:41:52.679117 progress 85 % (384 MB)
115 04:41:55.878361 progress 90 % (407 MB)
116 04:41:59.069558 progress 95 % (429 MB)
117 04:42:02.256906 progress 100 % (452 MB)
118 04:42:02.269961 452 MB downloaded in 31.48 s (14.37 MB/s)
119 04:42:02.270607 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:42:02.271430 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:42:02.271692 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:42:02.271950 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:42:02.272813 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig/gcc-12/modules.tar.xz
125 04:42:02.273322 saving as /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/modules/modules.tar
126 04:42:02.273724 total size: 11492696 (10 MB)
127 04:42:02.274135 Using unxz to decompress xz
128 04:42:02.323573 progress 0 % (0 MB)
129 04:42:02.389913 progress 5 % (0 MB)
130 04:42:02.473802 progress 10 % (1 MB)
131 04:42:02.554135 progress 15 % (1 MB)
132 04:42:02.641345 progress 20 % (2 MB)
133 04:42:02.735129 progress 25 % (2 MB)
134 04:42:02.813537 progress 30 % (3 MB)
135 04:42:02.886377 progress 35 % (3 MB)
136 04:42:02.966846 progress 40 % (4 MB)
137 04:42:03.044706 progress 45 % (4 MB)
138 04:42:03.124695 progress 50 % (5 MB)
139 04:42:03.204684 progress 55 % (6 MB)
140 04:42:03.283450 progress 60 % (6 MB)
141 04:42:03.363820 progress 65 % (7 MB)
142 04:42:03.444732 progress 70 % (7 MB)
143 04:42:03.527831 progress 75 % (8 MB)
144 04:42:03.619030 progress 80 % (8 MB)
145 04:42:03.717843 progress 85 % (9 MB)
146 04:42:03.788913 progress 90 % (9 MB)
147 04:42:03.866669 progress 95 % (10 MB)
148 04:42:03.938031 progress 100 % (10 MB)
149 04:42:03.951412 10 MB downloaded in 1.68 s (6.53 MB/s)
150 04:42:03.952111 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:42:03.953929 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:42:03.954502 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 04:42:03.955065 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 04:42:19.433767 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/675669/extract-nfsrootfs-d_tbtlz8
156 04:42:19.434364 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 04:42:19.434646 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 04:42:19.435259 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d
159 04:42:19.435775 makedir: /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin
160 04:42:19.436153 makedir: /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/tests
161 04:42:19.436480 makedir: /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/results
162 04:42:19.436805 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-add-keys
163 04:42:19.437332 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-add-sources
164 04:42:19.437834 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-background-process-start
165 04:42:19.438322 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-background-process-stop
166 04:42:19.438850 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-common-functions
167 04:42:19.439355 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-echo-ipv4
168 04:42:19.439900 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-install-packages
169 04:42:19.440431 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-installed-packages
170 04:42:19.440912 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-os-build
171 04:42:19.441434 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-probe-channel
172 04:42:19.441946 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-probe-ip
173 04:42:19.442441 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-target-ip
174 04:42:19.442915 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-target-mac
175 04:42:19.443393 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-target-storage
176 04:42:19.443915 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-case
177 04:42:19.444435 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-event
178 04:42:19.444907 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-feedback
179 04:42:19.445380 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-raise
180 04:42:19.445847 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-reference
181 04:42:19.446400 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-runner
182 04:42:19.446899 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-set
183 04:42:19.447371 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-test-shell
184 04:42:19.447850 Updating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-install-packages (oe)
185 04:42:19.448407 Updating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/bin/lava-installed-packages (oe)
186 04:42:19.448856 Creating /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/environment
187 04:42:19.449225 LAVA metadata
188 04:42:19.449478 - LAVA_JOB_ID=675669
189 04:42:19.449690 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:42:19.450049 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 04:42:19.451034 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:42:19.451342 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 04:42:19.451550 skipped lava-vland-overlay
194 04:42:19.451791 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:42:19.452067 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 04:42:19.452290 skipped lava-multinode-overlay
197 04:42:19.452532 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:42:19.452782 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 04:42:19.453030 Loading test definitions
200 04:42:19.453304 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:42:19.453520 Using /lava-675669 at stage 0
202 04:42:19.454684 uuid=675669_1.6.2.4.1 testdef=None
203 04:42:19.454983 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:42:19.455241 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:42:19.457020 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:42:19.457808 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:42:19.459964 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:42:19.460827 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:42:19.462927 runner path: /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 675669_1.6.2.4.1
212 04:42:19.463516 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:42:19.464297 Creating lava-test-runner.conf files
215 04:42:19.464503 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/675669/lava-overlay-n2room9d/lava-675669/0 for stage 0
216 04:42:19.464850 - 0_v4l2-decoder-conformance-h264
217 04:42:19.465200 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:42:19.465475 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:42:19.487304 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:42:19.487719 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:42:19.487975 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:42:19.488265 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:42:19.488526 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:42:20.136109 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:42:20.136580 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 04:42:20.136843 extracting modules file /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675669/extract-nfsrootfs-d_tbtlz8
227 04:42:21.487068 extracting modules file /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675669/extract-overlay-ramdisk-mhkgs7d8/ramdisk
228 04:42:22.862384 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:42:22.862861 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 04:42:22.863153 [common] Applying overlay to NFS
231 04:42:22.863379 [common] Applying overlay /var/lib/lava/dispatcher/tmp/675669/compress-overlay-vixdls1q/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/675669/extract-nfsrootfs-d_tbtlz8
232 04:42:22.892203 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:42:22.892558 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 04:42:22.892847 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 04:42:22.893081 Converting downloaded kernel to a uImage
236 04:42:22.893390 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/kernel/Image /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/kernel/uImage
237 04:42:23.360117 output: Image Name:
238 04:42:23.360519 output: Created: Fri Aug 30 04:42:22 2024
239 04:42:23.360730 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:42:23.360933 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
241 04:42:23.361132 output: Load Address: 01080000
242 04:42:23.361329 output: Entry Point: 01080000
243 04:42:23.361524 output:
244 04:42:23.361854 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:42:23.362116 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:42:23.362382 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 04:42:23.362633 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:42:23.362888 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 04:42:23.363135 Building ramdisk /var/lib/lava/dispatcher/tmp/675669/extract-overlay-ramdisk-mhkgs7d8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/675669/extract-overlay-ramdisk-mhkgs7d8/ramdisk
250 04:42:25.784159 >> 165125 blocks
251 04:42:33.561782 Adding RAMdisk u-boot header.
252 04:42:33.562524 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/675669/extract-overlay-ramdisk-mhkgs7d8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/675669/extract-overlay-ramdisk-mhkgs7d8/ramdisk.cpio.gz.uboot
253 04:42:33.817246 output: Image Name:
254 04:42:33.817658 output: Created: Fri Aug 30 04:42:33 2024
255 04:42:33.817867 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:42:33.818072 output: Data Size: 23253149 Bytes = 22708.15 KiB = 22.18 MiB
257 04:42:33.818270 output: Load Address: 00000000
258 04:42:33.818467 output: Entry Point: 00000000
259 04:42:33.818663 output:
260 04:42:33.819335 rename /var/lib/lava/dispatcher/tmp/675669/extract-overlay-ramdisk-mhkgs7d8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot
261 04:42:33.819792 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:42:33.820272 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 04:42:33.820874 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 04:42:33.821398 No LXC device requested
265 04:42:33.821949 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:42:33.822509 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 04:42:33.823047 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:42:33.823498 Checking files for TFTP limit of 4294967296 bytes.
269 04:42:33.827442 end: 1 tftp-deploy (duration 00:01:04) [common]
270 04:42:33.828212 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:42:33.828852 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:42:33.829471 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:42:33.830087 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:42:33.830712 Using kernel file from prepare-kernel: 675669/tftp-deploy-p9ojkfp1/kernel/uImage
275 04:42:33.831439 substitutions:
276 04:42:33.831901 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:42:33.832442 - {DTB_ADDR}: 0x01070000
278 04:42:33.832887 - {DTB}: 675669/tftp-deploy-p9ojkfp1/dtb/meson-g12b-a311d-libretech-cc.dtb
279 04:42:33.833321 - {INITRD}: 675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot
280 04:42:33.833760 - {KERNEL_ADDR}: 0x01080000
281 04:42:33.834189 - {KERNEL}: 675669/tftp-deploy-p9ojkfp1/kernel/uImage
282 04:42:33.834620 - {LAVA_MAC}: None
283 04:42:33.835099 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/675669/extract-nfsrootfs-d_tbtlz8
284 04:42:33.835536 - {NFS_SERVER_IP}: 192.168.6.2
285 04:42:33.835964 - {PRESEED_CONFIG}: None
286 04:42:33.836422 - {PRESEED_LOCAL}: None
287 04:42:33.836849 - {RAMDISK_ADDR}: 0x08000000
288 04:42:33.837273 - {RAMDISK}: 675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot
289 04:42:33.837697 - {ROOT_PART}: None
290 04:42:33.838120 - {ROOT}: None
291 04:42:33.838544 - {SERVER_IP}: 192.168.6.2
292 04:42:33.838969 - {TEE_ADDR}: 0x83000000
293 04:42:33.839393 - {TEE}: None
294 04:42:33.839821 Parsed boot commands:
295 04:42:33.840264 - setenv autoload no
296 04:42:33.840688 - setenv initrd_high 0xffffffff
297 04:42:33.841112 - setenv fdt_high 0xffffffff
298 04:42:33.841531 - dhcp
299 04:42:33.841965 - setenv serverip 192.168.6.2
300 04:42:33.842462 - tftpboot 0x01080000 675669/tftp-deploy-p9ojkfp1/kernel/uImage
301 04:42:33.842941 - tftpboot 0x08000000 675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot
302 04:42:33.843380 - tftpboot 0x01070000 675669/tftp-deploy-p9ojkfp1/dtb/meson-g12b-a311d-libretech-cc.dtb
303 04:42:33.843827 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/675669/extract-nfsrootfs-d_tbtlz8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:42:33.844337 - bootm 0x01080000 0x08000000 0x01070000
305 04:42:33.844935 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:42:33.846666 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:42:33.847145 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 04:42:33.863190 Setting prompt string to ['lava-test: # ']
310 04:42:33.864910 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:42:33.865578 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:42:33.866283 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:42:33.866847 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:42:33.867609 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 04:42:33.902423 >> OK - accepted request
316 04:42:33.904616 Returned 0 in 0 seconds
317 04:42:34.005953 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:42:34.007813 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:42:34.008579 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:42:34.009169 Setting prompt string to ['Hit any key to stop autoboot']
322 04:42:34.009683 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:42:34.011461 Trying 192.168.56.21...
324 04:42:34.012036 Connected to conserv1.
325 04:42:34.012511 Escape character is '^]'.
326 04:42:34.012976
327 04:42:34.013438 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:42:34.013892
329 04:42:44.679502 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 04:42:44.680182 bl2_stage_init 0x01
331 04:42:44.680640 bl2_stage_init 0x81
332 04:42:44.685059 hw id: 0x0000 - pwm id 0x01
333 04:42:44.685560 bl2_stage_init 0xc1
334 04:42:44.686014 bl2_stage_init 0x02
335 04:42:44.686447
336 04:42:44.690717 L0:00000000
337 04:42:44.691229 L1:20000703
338 04:42:44.691664 L2:00008067
339 04:42:44.692127 L3:14000000
340 04:42:44.696183 B2:00402000
341 04:42:44.696680 B1:e0f83180
342 04:42:44.697111
343 04:42:44.697545 TE: 58124
344 04:42:44.697978
345 04:42:44.701788 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 04:42:44.702274
347 04:42:44.702712 Board ID = 1
348 04:42:44.707339 Set A53 clk to 24M
349 04:42:44.707812 Set A73 clk to 24M
350 04:42:44.708525 Set clk81 to 24M
351 04:42:44.713009 A53 clk: 1200 MHz
352 04:42:44.713492 A73 clk: 1200 MHz
353 04:42:44.713922 CLK81: 166.6M
354 04:42:44.714347 smccc: 00012a92
355 04:42:44.718538 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 04:42:44.724226 board id: 1
357 04:42:44.730273 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:42:44.740549 fw parse done
359 04:42:44.746533 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:42:44.789283 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:42:44.800072 PIEI prepare done
362 04:42:44.800565 fastboot data load
363 04:42:44.801005 fastboot data verify
364 04:42:44.805725 verify result: 266
365 04:42:44.811399 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 04:42:44.811896 LPDDR4 probe
367 04:42:44.812361 ddr clk to 1584MHz
368 04:42:44.819420 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:42:44.856650
370 04:42:44.857239 dmc_version 0001
371 04:42:44.863330 Check phy result
372 04:42:44.869154 INFO : End of CA training
373 04:42:44.869660 INFO : End of initialization
374 04:42:44.874756 INFO : Training has run successfully!
375 04:42:44.875261 Check phy result
376 04:42:44.880351 INFO : End of initialization
377 04:42:44.880859 INFO : End of read enable training
378 04:42:44.885939 INFO : End of fine write leveling
379 04:42:44.891561 INFO : End of Write leveling coarse delay
380 04:42:44.892087 INFO : Training has run successfully!
381 04:42:44.892538 Check phy result
382 04:42:44.897158 INFO : End of initialization
383 04:42:44.897657 INFO : End of read dq deskew training
384 04:42:44.902762 INFO : End of MPR read delay center optimization
385 04:42:44.908369 INFO : End of write delay center optimization
386 04:42:44.913964 INFO : End of read delay center optimization
387 04:42:44.914465 INFO : End of max read latency training
388 04:42:44.919576 INFO : Training has run successfully!
389 04:42:44.920112 1D training succeed
390 04:42:44.928721 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:42:44.976365 Check phy result
392 04:42:44.976935 INFO : End of initialization
393 04:42:44.998098 INFO : End of 2D read delay Voltage center optimization
394 04:42:45.018312 INFO : End of 2D read delay Voltage center optimization
395 04:42:45.070497 INFO : End of 2D write delay Voltage center optimization
396 04:42:45.119754 INFO : End of 2D write delay Voltage center optimization
397 04:42:45.125404 INFO : Training has run successfully!
398 04:42:45.125912
399 04:42:45.126372 channel==0
400 04:42:45.130949 RxClkDly_Margin_A0==88 ps 9
401 04:42:45.131466 TxDqDly_Margin_A0==98 ps 10
402 04:42:45.136529 RxClkDly_Margin_A1==88 ps 9
403 04:42:45.137034 TxDqDly_Margin_A1==98 ps 10
404 04:42:45.137490 TrainedVREFDQ_A0==74
405 04:42:45.142156 TrainedVREFDQ_A1==74
406 04:42:45.142660 VrefDac_Margin_A0==25
407 04:42:45.143111 DeviceVref_Margin_A0==40
408 04:42:45.147731 VrefDac_Margin_A1==25
409 04:42:45.148317 DeviceVref_Margin_A1==40
410 04:42:45.148772
411 04:42:45.149217
412 04:42:45.153408 channel==1
413 04:42:45.153914 RxClkDly_Margin_A0==98 ps 10
414 04:42:45.154364 TxDqDly_Margin_A0==88 ps 9
415 04:42:45.158927 RxClkDly_Margin_A1==98 ps 10
416 04:42:45.159427 TxDqDly_Margin_A1==88 ps 9
417 04:42:45.164523 TrainedVREFDQ_A0==77
418 04:42:45.165021 TrainedVREFDQ_A1==77
419 04:42:45.165473 VrefDac_Margin_A0==22
420 04:42:45.170143 DeviceVref_Margin_A0==37
421 04:42:45.170647 VrefDac_Margin_A1==24
422 04:42:45.175724 DeviceVref_Margin_A1==37
423 04:42:45.176250
424 04:42:45.176706 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:42:45.177149
426 04:42:45.209354 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 04:42:45.209983 2D training succeed
428 04:42:45.214942 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:42:45.220521 auto size-- 65535DDR cs0 size: 2048MB
430 04:42:45.221033 DDR cs1 size: 2048MB
431 04:42:45.226177 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:42:45.226677 cs0 DataBus test pass
433 04:42:45.231707 cs1 DataBus test pass
434 04:42:45.232251 cs0 AddrBus test pass
435 04:42:45.232709 cs1 AddrBus test pass
436 04:42:45.233151
437 04:42:45.237406 100bdlr_step_size ps== 420
438 04:42:45.237916 result report
439 04:42:45.242897 boot times 0Enable ddr reg access
440 04:42:45.248295 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:42:45.261723 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 04:42:45.835314 0.0;M3 CHK:0;cm4_sp_mode 0
443 04:42:45.835952 MVN_1=0x00000000
444 04:42:45.840777 MVN_2=0x00000000
445 04:42:45.846550 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 04:42:45.847068 OPS=0x10
447 04:42:45.847528 ring efuse init
448 04:42:45.847974 chipver efuse init
449 04:42:45.852181 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 04:42:45.857865 [0.018961 Inits done]
451 04:42:45.858483 secure task start!
452 04:42:45.858979 high task start!
453 04:42:45.862480 low task start!
454 04:42:45.862983 run into bl31
455 04:42:45.868990 NOTICE: BL31: v1.3(release):4fc40b1
456 04:42:45.876801 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 04:42:45.877415 NOTICE: BL31: G12A normal boot!
458 04:42:45.902147 NOTICE: BL31: BL33 decompress pass
459 04:42:45.907787 ERROR: Error initializing runtime service opteed_fast
460 04:42:47.140596
461 04:42:47.140985
462 04:42:47.149004 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 04:42:47.149443
464 04:42:47.149793 Model: Libre Computer AML-A311D-CC Alta
465 04:42:47.357426 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 04:42:47.380857 DRAM: 2 GiB (effective 3.8 GiB)
467 04:42:47.523864 Core: 408 devices, 31 uclasses, devicetree: separate
468 04:42:47.529774 WDT: Not starting watchdog@f0d0
469 04:42:47.562004 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 04:42:47.574602 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 04:42:47.579473 ** Bad device specification mmc 0 **
472 04:42:47.589794 Card did not respond to voltage select! : -110
473 04:42:47.597446 ** Bad device specification mmc 0 **
474 04:42:47.597945 Couldn't find partition mmc 0
475 04:42:47.605791 Card did not respond to voltage select! : -110
476 04:42:47.611404 ** Bad device specification mmc 0 **
477 04:42:47.611908 Couldn't find partition mmc 0
478 04:42:47.616369 Error: could not access storage.
479 04:42:48.879650 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 04:42:48.880314 bl2_stage_init 0x01
481 04:42:48.880783 bl2_stage_init 0x81
482 04:42:48.885236 hw id: 0x0000 - pwm id 0x01
483 04:42:48.885773 bl2_stage_init 0xc1
484 04:42:48.886229 bl2_stage_init 0x02
485 04:42:48.886677
486 04:42:48.890867 L0:00000000
487 04:42:48.891355 L1:20000703
488 04:42:48.891803 L2:00008067
489 04:42:48.892284 L3:14000000
490 04:42:48.893827 B2:00402000
491 04:42:48.894304 B1:e0f83180
492 04:42:48.894748
493 04:42:48.895188 TE: 58124
494 04:42:48.895627
495 04:42:48.905004 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 04:42:48.905537
497 04:42:48.905997 Board ID = 1
498 04:42:48.906434 Set A53 clk to 24M
499 04:42:48.906870 Set A73 clk to 24M
500 04:42:48.910616 Set clk81 to 24M
501 04:42:48.911104 A53 clk: 1200 MHz
502 04:42:48.911553 A73 clk: 1200 MHz
503 04:42:48.916213 CLK81: 166.6M
504 04:42:48.916751 smccc: 00012a91
505 04:42:48.921813 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 04:42:48.922304 board id: 1
507 04:42:48.930276 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 04:42:48.940966 fw parse done
509 04:42:48.946924 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 04:42:48.989650 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 04:42:49.000448 PIEI prepare done
512 04:42:49.000968 fastboot data load
513 04:42:49.001424 fastboot data verify
514 04:42:49.006183 verify result: 266
515 04:42:49.011759 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 04:42:49.012327 LPDDR4 probe
517 04:42:49.012787 ddr clk to 1584MHz
518 04:42:49.019798 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 04:42:49.057019
520 04:42:49.057596 dmc_version 0001
521 04:42:49.063686 Check phy result
522 04:42:49.069586 INFO : End of CA training
523 04:42:49.070110 INFO : End of initialization
524 04:42:49.075097 INFO : Training has run successfully!
525 04:42:49.075621 Check phy result
526 04:42:49.080697 INFO : End of initialization
527 04:42:49.081215 INFO : End of read enable training
528 04:42:49.086337 INFO : End of fine write leveling
529 04:42:49.091952 INFO : End of Write leveling coarse delay
530 04:42:49.092539 INFO : Training has run successfully!
531 04:42:49.092996 Check phy result
532 04:42:49.097588 INFO : End of initialization
533 04:42:49.098126 INFO : End of read dq deskew training
534 04:42:49.103219 INFO : End of MPR read delay center optimization
535 04:42:49.108797 INFO : End of write delay center optimization
536 04:42:49.114366 INFO : End of read delay center optimization
537 04:42:49.114895 INFO : End of max read latency training
538 04:42:49.119946 INFO : Training has run successfully!
539 04:42:49.120518 1D training succeed
540 04:42:49.129115 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 04:42:49.176773 Check phy result
542 04:42:49.177376 INFO : End of initialization
543 04:42:49.198473 INFO : End of 2D read delay Voltage center optimization
544 04:42:49.218053 INFO : End of 2D read delay Voltage center optimization
545 04:42:49.270092 INFO : End of 2D write delay Voltage center optimization
546 04:42:49.319268 INFO : End of 2D write delay Voltage center optimization
547 04:42:49.324894 INFO : Training has run successfully!
548 04:42:49.325415
549 04:42:49.325883 channel==0
550 04:42:49.330390 RxClkDly_Margin_A0==78 ps 8
551 04:42:49.330895 TxDqDly_Margin_A0==98 ps 10
552 04:42:49.336105 RxClkDly_Margin_A1==88 ps 9
553 04:42:49.336653 TxDqDly_Margin_A1==98 ps 10
554 04:42:49.337118 TrainedVREFDQ_A0==74
555 04:42:49.341618 TrainedVREFDQ_A1==74
556 04:42:49.342105 VrefDac_Margin_A0==25
557 04:42:49.342553 DeviceVref_Margin_A0==40
558 04:42:49.347208 VrefDac_Margin_A1==25
559 04:42:49.347757 DeviceVref_Margin_A1==40
560 04:42:49.348248
561 04:42:49.348697
562 04:42:49.352945 channel==1
563 04:42:49.353470 RxClkDly_Margin_A0==78 ps 8
564 04:42:49.353907 TxDqDly_Margin_A0==88 ps 9
565 04:42:49.358415 RxClkDly_Margin_A1==88 ps 9
566 04:42:49.358886 TxDqDly_Margin_A1==88 ps 9
567 04:42:49.364053 TrainedVREFDQ_A0==77
568 04:42:49.364584 TrainedVREFDQ_A1==77
569 04:42:49.365050 VrefDac_Margin_A0==23
570 04:42:49.369651 DeviceVref_Margin_A0==37
571 04:42:49.370181 VrefDac_Margin_A1==24
572 04:42:49.375193 DeviceVref_Margin_A1==37
573 04:42:49.375672
574 04:42:49.376148 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 04:42:49.376587
576 04:42:49.408913 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 04:42:49.409551 2D training succeed
578 04:42:49.414439 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 04:42:49.420097 auto size-- 65535DDR cs0 size: 2048MB
580 04:42:49.420625 DDR cs1 size: 2048MB
581 04:42:49.425716 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 04:42:49.426241 cs0 DataBus test pass
583 04:42:49.431240 cs1 DataBus test pass
584 04:42:49.431762 cs0 AddrBus test pass
585 04:42:49.432239 cs1 AddrBus test pass
586 04:42:49.432672
587 04:42:49.436931 100bdlr_step_size ps== 420
588 04:42:49.437423 result report
589 04:42:49.442400 boot times 0Enable ddr reg access
590 04:42:49.447691 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 04:42:49.461112 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 04:42:50.034342 0.0;M3 CHK:0;cm4_sp_mode 0
593 04:42:50.034974 MVN_1=0x00000000
594 04:42:50.040101 MVN_2=0x00000000
595 04:42:50.046844 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 04:42:50.047391 OPS=0x10
597 04:42:50.047802 ring efuse init
598 04:42:50.048337 chipver efuse init
599 04:42:50.055447 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 04:42:50.056039 [0.018960 Inits done]
601 04:42:50.056448 secure task start!
602 04:42:50.061499 high task start!
603 04:42:50.062073 low task start!
604 04:42:50.062513 run into bl31
605 04:42:50.068201 NOTICE: BL31: v1.3(release):4fc40b1
606 04:42:50.079420 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 04:42:50.080069 NOTICE: BL31: G12A normal boot!
608 04:42:50.101183 NOTICE: BL31: BL33 decompress pass
609 04:42:50.106994 ERROR: Error initializing runtime service opteed_fast
610 04:42:51.339847
611 04:42:51.340576
612 04:42:51.348202 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 04:42:51.348712
614 04:42:51.349143 Model: Libre Computer AML-A311D-CC Alta
615 04:42:51.556597 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 04:42:51.580059 DRAM: 2 GiB (effective 3.8 GiB)
617 04:42:51.722975 Core: 408 devices, 31 uclasses, devicetree: separate
618 04:42:51.728866 WDT: Not starting watchdog@f0d0
619 04:42:51.761177 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 04:42:51.773538 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 04:42:51.779065 ** Bad device specification mmc 0 **
622 04:42:51.789688 Card did not respond to voltage select! : -110
623 04:42:51.796422 ** Bad device specification mmc 0 **
624 04:42:51.796910 Couldn't find partition mmc 0
625 04:42:51.804797 Card did not respond to voltage select! : -110
626 04:42:51.810385 ** Bad device specification mmc 0 **
627 04:42:51.810934 Couldn't find partition mmc 0
628 04:42:51.815463 Error: could not access storage.
629 04:42:52.159036 Net: eth0: ethernet@ff3f0000
630 04:42:52.159501 starting USB...
631 04:42:52.410867 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 04:42:52.411468 Starting the controller
633 04:42:52.417701 USB XHCI 1.10
634 04:42:54.129806 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 04:42:54.130224 bl2_stage_init 0x01
636 04:42:54.130434 bl2_stage_init 0x81
637 04:42:54.135543 hw id: 0x0000 - pwm id 0x01
638 04:42:54.136159 bl2_stage_init 0xc1
639 04:42:54.136634 bl2_stage_init 0x02
640 04:42:54.137093
641 04:42:54.141072 L0:00000000
642 04:42:54.141587 L1:20000703
643 04:42:54.142047 L2:00008067
644 04:42:54.142497 L3:14000000
645 04:42:54.146688 B2:00402000
646 04:42:54.147205 B1:e0f83180
647 04:42:54.147665
648 04:42:54.148155 TE: 58124
649 04:42:54.148613
650 04:42:54.152264 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 04:42:54.152787
652 04:42:54.153246 Board ID = 1
653 04:42:54.157871 Set A53 clk to 24M
654 04:42:54.158393 Set A73 clk to 24M
655 04:42:54.158851 Set clk81 to 24M
656 04:42:54.163452 A53 clk: 1200 MHz
657 04:42:54.164008 A73 clk: 1200 MHz
658 04:42:54.164484 CLK81: 166.6M
659 04:42:54.164936 smccc: 00012a92
660 04:42:54.169073 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 04:42:54.174715 board id: 1
662 04:42:54.180651 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 04:42:54.191087 fw parse done
664 04:42:54.197069 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 04:42:54.239729 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 04:42:54.250610 PIEI prepare done
667 04:42:54.251151 fastboot data load
668 04:42:54.251616 fastboot data verify
669 04:42:54.256398 verify result: 266
670 04:42:54.261964 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 04:42:54.262533 LPDDR4 probe
672 04:42:54.263002 ddr clk to 1584MHz
673 04:42:54.269950 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 04:42:54.307193
675 04:42:54.307815 dmc_version 0001
676 04:42:54.313834 Check phy result
677 04:42:54.319726 INFO : End of CA training
678 04:42:54.320323 INFO : End of initialization
679 04:42:54.325366 INFO : Training has run successfully!
680 04:42:54.325931 Check phy result
681 04:42:54.330984 INFO : End of initialization
682 04:42:54.331557 INFO : End of read enable training
683 04:42:54.334232 INFO : End of fine write leveling
684 04:42:54.339758 INFO : End of Write leveling coarse delay
685 04:42:54.345381 INFO : Training has run successfully!
686 04:42:54.345950 Check phy result
687 04:42:54.346419 INFO : End of initialization
688 04:42:54.351005 INFO : End of read dq deskew training
689 04:42:54.356594 INFO : End of MPR read delay center optimization
690 04:42:54.357146 INFO : End of write delay center optimization
691 04:42:54.362226 INFO : End of read delay center optimization
692 04:42:54.367737 INFO : End of max read latency training
693 04:42:54.368327 INFO : Training has run successfully!
694 04:42:54.373420 1D training succeed
695 04:42:54.379390 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 04:42:54.426924 Check phy result
697 04:42:54.427509 INFO : End of initialization
698 04:42:54.449446 INFO : End of 2D read delay Voltage center optimization
699 04:42:54.469647 INFO : End of 2D read delay Voltage center optimization
700 04:42:54.522005 INFO : End of 2D write delay Voltage center optimization
701 04:42:54.571126 INFO : End of 2D write delay Voltage center optimization
702 04:42:54.576869 INFO : Training has run successfully!
703 04:42:54.577419
704 04:42:54.577887 channel==0
705 04:42:54.582377 RxClkDly_Margin_A0==88 ps 9
706 04:42:54.582925 TxDqDly_Margin_A0==98 ps 10
707 04:42:54.585655 RxClkDly_Margin_A1==88 ps 9
708 04:42:54.586198 TxDqDly_Margin_A1==98 ps 10
709 04:42:54.591284 TrainedVREFDQ_A0==74
710 04:42:54.591840 TrainedVREFDQ_A1==74
711 04:42:54.592352 VrefDac_Margin_A0==24
712 04:42:54.596847 DeviceVref_Margin_A0==40
713 04:42:54.597400 VrefDac_Margin_A1==25
714 04:42:54.602538 DeviceVref_Margin_A1==40
715 04:42:54.603081
716 04:42:54.603546
717 04:42:54.604021 channel==1
718 04:42:54.604477 RxClkDly_Margin_A0==98 ps 10
719 04:42:54.608109 TxDqDly_Margin_A0==98 ps 10
720 04:42:54.608657 RxClkDly_Margin_A1==98 ps 10
721 04:42:54.613608 TxDqDly_Margin_A1==98 ps 10
722 04:42:54.614162 TrainedVREFDQ_A0==77
723 04:42:54.614628 TrainedVREFDQ_A1==77
724 04:42:54.619290 VrefDac_Margin_A0==22
725 04:42:54.619838 DeviceVref_Margin_A0==37
726 04:42:54.624873 VrefDac_Margin_A1==22
727 04:42:54.625417 DeviceVref_Margin_A1==37
728 04:42:54.625873
729 04:42:54.630398 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 04:42:54.630943
731 04:42:54.658370 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 04:42:54.664045 2D training succeed
733 04:42:54.669607 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 04:42:54.670161 auto size-- 65535DDR cs0 size: 2048MB
735 04:42:54.675191 DDR cs1 size: 2048MB
736 04:42:54.675733 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 04:42:54.680865 cs0 DataBus test pass
738 04:42:54.681430 cs1 DataBus test pass
739 04:42:54.681894 cs0 AddrBus test pass
740 04:42:54.686398 cs1 AddrBus test pass
741 04:42:54.686938
742 04:42:54.687406 100bdlr_step_size ps== 420
743 04:42:54.687879 result report
744 04:42:54.691970 boot times 0Enable ddr reg access
745 04:42:54.699868 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 04:42:54.713213 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 04:42:55.286329 0.0;M3 CHK:0;cm4_sp_mode 0
748 04:42:55.287017 MVN_1=0x00000000
749 04:42:55.291907 MVN_2=0x00000000
750 04:42:55.297639 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 04:42:55.298232 OPS=0x10
752 04:42:55.298677 ring efuse init
753 04:42:55.299107 chipver efuse init
754 04:42:55.305795 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 04:42:55.306326 [0.018961 Inits done]
756 04:42:55.306764 secure task start!
757 04:42:55.313328 high task start!
758 04:42:55.313821 low task start!
759 04:42:55.314252 run into bl31
760 04:42:55.319916 NOTICE: BL31: v1.3(release):4fc40b1
761 04:42:55.327674 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 04:42:55.328205 NOTICE: BL31: G12A normal boot!
763 04:42:55.353128 NOTICE: BL31: BL33 decompress pass
764 04:42:55.358940 ERROR: Error initializing runtime service opteed_fast
765 04:42:56.591746
766 04:42:56.592462
767 04:42:56.600203 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 04:42:56.600737
769 04:42:56.601212 Model: Libre Computer AML-A311D-CC Alta
770 04:42:56.808470 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 04:42:56.831943 DRAM: 2 GiB (effective 3.8 GiB)
772 04:42:56.974946 Core: 408 devices, 31 uclasses, devicetree: separate
773 04:42:56.980724 WDT: Not starting watchdog@f0d0
774 04:42:57.013066 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 04:42:57.025411 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 04:42:57.030502 ** Bad device specification mmc 0 **
777 04:42:57.040825 Card did not respond to voltage select! : -110
778 04:42:57.048475 ** Bad device specification mmc 0 **
779 04:42:57.048988 Couldn't find partition mmc 0
780 04:42:57.056781 Card did not respond to voltage select! : -110
781 04:42:57.062179 ** Bad device specification mmc 0 **
782 04:42:57.062687 Couldn't find partition mmc 0
783 04:42:57.067308 Error: could not access storage.
784 04:42:57.409839 Net: eth0: ethernet@ff3f0000
785 04:42:57.410469 starting USB...
786 04:42:57.661606 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 04:42:57.662162 Starting the controller
788 04:42:57.668577 USB XHCI 1.10
789 04:42:59.831483 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 04:42:59.832190 bl2_stage_init 0x01
791 04:42:59.832672 bl2_stage_init 0x81
792 04:42:59.836968 hw id: 0x0000 - pwm id 0x01
793 04:42:59.837462 bl2_stage_init 0xc1
794 04:42:59.837918 bl2_stage_init 0x02
795 04:42:59.838369
796 04:42:59.842597 L0:00000000
797 04:42:59.843080 L1:20000703
798 04:42:59.843534 L2:00008067
799 04:42:59.843977 L3:14000000
800 04:42:59.848160 B2:00402000
801 04:42:59.848640 B1:e0f83180
802 04:42:59.849086
803 04:42:59.849535 TE: 58124
804 04:42:59.849982
805 04:42:59.853808 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 04:42:59.854299
807 04:42:59.854758 Board ID = 1
808 04:42:59.859640 Set A53 clk to 24M
809 04:42:59.860145 Set A73 clk to 24M
810 04:42:59.860597 Set clk81 to 24M
811 04:42:59.864980 A53 clk: 1200 MHz
812 04:42:59.865456 A73 clk: 1200 MHz
813 04:42:59.865905 CLK81: 166.6M
814 04:42:59.866342 smccc: 00012a92
815 04:42:59.870623 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 04:42:59.876174 board id: 1
817 04:42:59.882196 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 04:42:59.892590 fw parse done
819 04:42:59.898556 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 04:42:59.941210 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 04:42:59.952125 PIEI prepare done
822 04:42:59.952464 fastboot data load
823 04:42:59.952691 fastboot data verify
824 04:42:59.957733 verify result: 266
825 04:42:59.963354 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 04:42:59.963763 LPDDR4 probe
827 04:42:59.964146 ddr clk to 1584MHz
828 04:42:59.971331 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 04:43:00.008623
830 04:43:00.008964 dmc_version 0001
831 04:43:00.015268 Check phy result
832 04:43:00.021189 INFO : End of CA training
833 04:43:00.021523 INFO : End of initialization
834 04:43:00.026791 INFO : Training has run successfully!
835 04:43:00.027256 Check phy result
836 04:43:00.032419 INFO : End of initialization
837 04:43:00.032874 INFO : End of read enable training
838 04:43:00.035663 INFO : End of fine write leveling
839 04:43:00.041197 INFO : End of Write leveling coarse delay
840 04:43:00.046870 INFO : Training has run successfully!
841 04:43:00.047245 Check phy result
842 04:43:00.047529 INFO : End of initialization
843 04:43:00.052468 INFO : End of read dq deskew training
844 04:43:00.058035 INFO : End of MPR read delay center optimization
845 04:43:00.058414 INFO : End of write delay center optimization
846 04:43:00.063685 INFO : End of read delay center optimization
847 04:43:00.069223 INFO : End of max read latency training
848 04:43:00.069770 INFO : Training has run successfully!
849 04:43:00.074861 1D training succeed
850 04:43:00.080855 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 04:43:00.128384 Check phy result
852 04:43:00.128817 INFO : End of initialization
853 04:43:00.150854 INFO : End of 2D read delay Voltage center optimization
854 04:43:00.170094 INFO : End of 2D read delay Voltage center optimization
855 04:43:00.222109 INFO : End of 2D write delay Voltage center optimization
856 04:43:00.271298 INFO : End of 2D write delay Voltage center optimization
857 04:43:00.276794 INFO : Training has run successfully!
858 04:43:00.277323
859 04:43:00.277651 channel==0
860 04:43:00.282350 RxClkDly_Margin_A0==88 ps 9
861 04:43:00.282883 TxDqDly_Margin_A0==98 ps 10
862 04:43:00.285649 RxClkDly_Margin_A1==88 ps 9
863 04:43:00.286006 TxDqDly_Margin_A1==98 ps 10
864 04:43:00.291203 TrainedVREFDQ_A0==74
865 04:43:00.292308 TrainedVREFDQ_A1==75
866 04:43:00.296896 VrefDac_Margin_A0==24
867 04:43:00.297595 DeviceVref_Margin_A0==40
868 04:43:00.298141 VrefDac_Margin_A1==24
869 04:43:00.302565 DeviceVref_Margin_A1==39
870 04:43:00.303238
871 04:43:00.303775
872 04:43:00.304333 channel==1
873 04:43:00.304842 RxClkDly_Margin_A0==88 ps 9
874 04:43:00.305880 TxDqDly_Margin_A0==98 ps 10
875 04:43:00.311540 RxClkDly_Margin_A1==88 ps 9
876 04:43:00.312272 TxDqDly_Margin_A1==88 ps 9
877 04:43:00.312818 TrainedVREFDQ_A0==77
878 04:43:00.317152 TrainedVREFDQ_A1==77
879 04:43:00.317838 VrefDac_Margin_A0==23
880 04:43:00.322730 DeviceVref_Margin_A0==37
881 04:43:00.323436 VrefDac_Margin_A1==24
882 04:43:00.323953 DeviceVref_Margin_A1==37
883 04:43:00.324528
884 04:43:00.328258 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 04:43:00.328939
886 04:43:00.361776 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000017 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000019 0000001a 0000001a 00000018 00000017 00000019 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 04:43:00.362581 2D training succeed
888 04:43:00.367525 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 04:43:00.372978 auto size-- 65535DDR cs0 size: 2048MB
890 04:43:00.373658 DDR cs1 size: 2048MB
891 04:43:00.378601 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 04:43:00.379312 cs0 DataBus test pass
893 04:43:00.379904 cs1 DataBus test pass
894 04:43:00.384247 cs0 AddrBus test pass
895 04:43:00.384929 cs1 AddrBus test pass
896 04:43:00.385472
897 04:43:00.389747 100bdlr_step_size ps== 420
898 04:43:00.390420 result report
899 04:43:00.390946 boot times 0Enable ddr reg access
900 04:43:00.399583 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 04:43:00.413055 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 04:43:00.985104 0.0;M3 CHK:0;cm4_sp_mode 0
903 04:43:00.985936 MVN_1=0x00000000
904 04:43:00.990560 MVN_2=0x00000000
905 04:43:00.996308 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 04:43:00.997000 OPS=0x10
907 04:43:00.997571 ring efuse init
908 04:43:00.998161 chipver efuse init
909 04:43:01.001895 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 04:43:01.007543 [0.018961 Inits done]
911 04:43:01.008255 secure task start!
912 04:43:01.008845 high task start!
913 04:43:01.012051 low task start!
914 04:43:01.012421 run into bl31
915 04:43:01.018751 NOTICE: BL31: v1.3(release):4fc40b1
916 04:43:01.026616 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 04:43:01.027005 NOTICE: BL31: G12A normal boot!
918 04:43:01.052009 NOTICE: BL31: BL33 decompress pass
919 04:43:01.057640 ERROR: Error initializing runtime service opteed_fast
920 04:43:02.290721
921 04:43:02.291519
922 04:43:02.298908 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 04:43:02.299728
924 04:43:02.300290 Model: Libre Computer AML-A311D-CC Alta
925 04:43:02.507363 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 04:43:02.530859 DRAM: 2 GiB (effective 3.8 GiB)
927 04:43:02.673832 Core: 408 devices, 31 uclasses, devicetree: separate
928 04:43:02.679590 WDT: Not starting watchdog@f0d0
929 04:43:02.711839 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 04:43:02.724308 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 04:43:02.729264 ** Bad device specification mmc 0 **
932 04:43:02.739629 Card did not respond to voltage select! : -110
933 04:43:02.747275 ** Bad device specification mmc 0 **
934 04:43:02.747802 Couldn't find partition mmc 0
935 04:43:02.755628 Card did not respond to voltage select! : -110
936 04:43:02.761128 ** Bad device specification mmc 0 **
937 04:43:02.761642 Couldn't find partition mmc 0
938 04:43:02.766193 Error: could not access storage.
939 04:43:03.109705 Net: eth0: ethernet@ff3f0000
940 04:43:03.110319 starting USB...
941 04:43:03.361479 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 04:43:03.362026 Starting the controller
943 04:43:03.368483 USB XHCI 1.10
944 04:43:04.922757 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 04:43:04.930976 scanning usb for storage devices... 0 Storage Device(s) found
947 04:43:04.982160 Hit any key to stop autoboot: 1
948 04:43:04.983036 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 04:43:04.983602 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
950 04:43:04.984033 Setting prompt string to ['=>']
951 04:43:04.984347 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
952 04:43:04.998375 0
953 04:43:04.999058 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 04:43:04.999488 Sending with 10 millisecond of delay
956 04:43:06.135418 => setenv autoload no
957 04:43:06.146014 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
958 04:43:06.148838 setenv autoload no
959 04:43:06.149562 Sending with 10 millisecond of delay
961 04:43:07.946313 => setenv initrd_high 0xffffffff
962 04:43:07.956862 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
963 04:43:07.957375 setenv initrd_high 0xffffffff
964 04:43:07.957840 Sending with 10 millisecond of delay
966 04:43:09.575172 => setenv fdt_high 0xffffffff
967 04:43:09.585986 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 04:43:09.586913 setenv fdt_high 0xffffffff
969 04:43:09.587635 Sending with 10 millisecond of delay
971 04:43:09.879659 => dhcp
972 04:43:09.890492 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 04:43:09.891172 dhcp
974 04:43:09.891443 Speed: 1000, full duplex
975 04:43:09.891674 BOOTP broadcast 1
976 04:43:10.138177 BOOTP broadcast 2
977 04:43:10.326338 DHCP client bound to address 192.168.6.33 (435 ms)
978 04:43:10.326971 Sending with 10 millisecond of delay
980 04:43:12.004055 => setenv serverip 192.168.6.2
981 04:43:12.014675 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
982 04:43:12.015298 setenv serverip 192.168.6.2
983 04:43:12.015764 Sending with 10 millisecond of delay
985 04:43:15.743825 => tftpboot 0x01080000 675669/tftp-deploy-p9ojkfp1/kernel/uImage
986 04:43:15.755271 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
987 04:43:15.756223 tftpboot 0x01080000 675669/tftp-deploy-p9ojkfp1/kernel/uImage
988 04:43:15.756515 Speed: 1000, full duplex
989 04:43:15.756749 Using ethernet@ff3f0000 device
990 04:43:15.757834 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
991 04:43:15.763399 Filename '675669/tftp-deploy-p9ojkfp1/kernel/uImage'.
992 04:43:15.767454 Load address: 0x1080000
993 04:43:18.990858 Loading: *################################################## 43.2 MiB
994 04:43:18.991256 13.4 MiB/s
995 04:43:18.991499 done
996 04:43:18.995201 Bytes transferred = 45308480 (2b35a40 hex)
997 04:43:18.995781 Sending with 10 millisecond of delay
999 04:43:23.694260 => tftpboot 0x08000000 675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot
1000 04:43:23.705014 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1001 04:43:23.705568 tftpboot 0x08000000 675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot
1002 04:43:23.705810 Speed: 1000, full duplex
1003 04:43:23.706022 Using ethernet@ff3f0000 device
1004 04:43:23.707501 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1005 04:43:23.719364 Filename '675669/tftp-deploy-p9ojkfp1/ramdisk/ramdisk.cpio.gz.uboot'.
1006 04:43:23.719733 Load address: 0x8000000
1007 04:43:30.974762 Loading: *#######T ########################################## UDP wrong checksum 00000005 0000b67c
1008 04:43:35.976806 T UDP wrong checksum 00000005 0000b67c
1009 04:43:45.978599 T T UDP wrong checksum 00000005 0000b67c
1010 04:43:56.810785 T T UDP wrong checksum 000000ff 00003f67
1011 04:43:56.838369 UDP wrong checksum 000000ff 0000c859
1012 04:43:59.201667 UDP wrong checksum 000000ff 0000d90e
1013 04:43:59.226632 UDP wrong checksum 000000ff 00006b01
1014 04:44:05.982683 T T UDP wrong checksum 00000005 0000b67c
1015 04:44:20.985883 T T
1016 04:44:20.986521 Retry count exceeded; starting again
1018 04:44:20.987948 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1021 04:44:20.989896 end: 2.4 uboot-commands (duration 00:01:47) [common]
1023 04:44:20.991253 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1025 04:44:20.992267 end: 2 uboot-action (duration 00:01:47) [common]
1027 04:44:20.993749 Cleaning after the job
1028 04:44:20.994285 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/ramdisk
1029 04:44:20.995562 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/kernel
1030 04:44:21.012276 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/dtb
1031 04:44:21.013442 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/nfsrootfs
1032 04:44:21.074797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675669/tftp-deploy-p9ojkfp1/modules
1033 04:44:21.081035 start: 4.1 power-off (timeout 00:00:30) [common]
1034 04:44:21.081622 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1035 04:44:21.113564 >> OK - accepted request
1036 04:44:21.115307 Returned 0 in 0 seconds
1037 04:44:21.216075 end: 4.1 power-off (duration 00:00:00) [common]
1039 04:44:21.217088 start: 4.2 read-feedback (timeout 00:10:00) [common]
1040 04:44:21.217737 Listened to connection for namespace 'common' for up to 1s
1041 04:44:22.218928 Finalising connection for namespace 'common'
1042 04:44:22.219496 Disconnecting from shell: Finalise
1043 04:44:22.219833 =>
1044 04:44:22.320645 end: 4.2 read-feedback (duration 00:00:01) [common]
1045 04:44:22.321221 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/675669
1046 04:44:24.618369 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/675669
1047 04:44:24.618987 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.