Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:17:08.970963 lava-dispatcher, installed at version: 2024.01
2 04:17:08.971770 start: 0 validate
3 04:17:08.972269 Start time: 2024-08-30 04:17:08.972240+00:00 (UTC)
4 04:17:08.972846 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:17:08.973393 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:17:09.014116 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:17:09.014678 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:17:09.046485 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:17:09.047105 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:17:09.077356 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:17:09.077846 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:17:09.120655 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:17:09.121165 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-176-g20371ba12063%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:17:09.172209 validate duration: 0.20
16 04:17:09.173720 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:17:09.174393 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:17:09.174977 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:17:09.175967 Not decompressing ramdisk as can be used compressed.
20 04:17:09.176828 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:17:09.177360 saving as /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/ramdisk/initrd.cpio.gz
22 04:17:09.177874 total size: 5628140 (5 MB)
23 04:17:09.222813 progress 0 % (0 MB)
24 04:17:09.230441 progress 5 % (0 MB)
25 04:17:09.237987 progress 10 % (0 MB)
26 04:17:09.244815 progress 15 % (0 MB)
27 04:17:09.252542 progress 20 % (1 MB)
28 04:17:09.257856 progress 25 % (1 MB)
29 04:17:09.261965 progress 30 % (1 MB)
30 04:17:09.266190 progress 35 % (1 MB)
31 04:17:09.269956 progress 40 % (2 MB)
32 04:17:09.274071 progress 45 % (2 MB)
33 04:17:09.277781 progress 50 % (2 MB)
34 04:17:09.281842 progress 55 % (2 MB)
35 04:17:09.285881 progress 60 % (3 MB)
36 04:17:09.289589 progress 65 % (3 MB)
37 04:17:09.293663 progress 70 % (3 MB)
38 04:17:09.297506 progress 75 % (4 MB)
39 04:17:09.301541 progress 80 % (4 MB)
40 04:17:09.305157 progress 85 % (4 MB)
41 04:17:09.309028 progress 90 % (4 MB)
42 04:17:09.312705 progress 95 % (5 MB)
43 04:17:09.316116 progress 100 % (5 MB)
44 04:17:09.316826 5 MB downloaded in 0.14 s (38.63 MB/s)
45 04:17:09.317392 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:17:09.318293 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:17:09.318588 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:17:09.318860 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:17:09.319352 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig/gcc-12/kernel/Image
51 04:17:09.319606 saving as /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/kernel/Image
52 04:17:09.319813 total size: 45308416 (43 MB)
53 04:17:09.320051 No compression specified
54 04:17:09.367722 progress 0 % (0 MB)
55 04:17:09.395204 progress 5 % (2 MB)
56 04:17:09.423011 progress 10 % (4 MB)
57 04:17:09.450532 progress 15 % (6 MB)
58 04:17:09.477790 progress 20 % (8 MB)
59 04:17:09.505016 progress 25 % (10 MB)
60 04:17:09.531742 progress 30 % (12 MB)
61 04:17:09.558575 progress 35 % (15 MB)
62 04:17:09.585855 progress 40 % (17 MB)
63 04:17:09.612969 progress 45 % (19 MB)
64 04:17:09.639926 progress 50 % (21 MB)
65 04:17:09.666763 progress 55 % (23 MB)
66 04:17:09.693801 progress 60 % (25 MB)
67 04:17:09.720845 progress 65 % (28 MB)
68 04:17:09.747621 progress 70 % (30 MB)
69 04:17:09.774927 progress 75 % (32 MB)
70 04:17:09.801859 progress 80 % (34 MB)
71 04:17:09.832502 progress 85 % (36 MB)
72 04:17:09.865062 progress 90 % (38 MB)
73 04:17:09.897355 progress 95 % (41 MB)
74 04:17:09.928935 progress 100 % (43 MB)
75 04:17:09.929782 43 MB downloaded in 0.61 s (70.84 MB/s)
76 04:17:09.930380 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:17:09.931388 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:17:09.931738 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:17:09.932095 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:17:09.932688 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:17:09.933028 saving as /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:17:09.933283 total size: 53173 (0 MB)
84 04:17:09.933535 No compression specified
85 04:17:09.975293 progress 61 % (0 MB)
86 04:17:09.976352 progress 100 % (0 MB)
87 04:17:09.977022 0 MB downloaded in 0.04 s (1.16 MB/s)
88 04:17:09.977621 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:17:09.978603 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:17:09.978928 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:17:09.979253 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:17:09.979804 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:17:09.980146 saving as /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/nfsrootfs/full.rootfs.tar
95 04:17:09.980398 total size: 474398908 (452 MB)
96 04:17:09.980650 Using unxz to decompress xz
97 04:17:10.025548 progress 0 % (0 MB)
98 04:17:11.208277 progress 5 % (22 MB)
99 04:17:12.750225 progress 10 % (45 MB)
100 04:17:13.226503 progress 15 % (67 MB)
101 04:17:14.068565 progress 20 % (90 MB)
102 04:17:14.619581 progress 25 % (113 MB)
103 04:17:14.968493 progress 30 % (135 MB)
104 04:17:15.578845 progress 35 % (158 MB)
105 04:17:16.573180 progress 40 % (181 MB)
106 04:17:17.337723 progress 45 % (203 MB)
107 04:17:17.894441 progress 50 % (226 MB)
108 04:17:18.534588 progress 55 % (248 MB)
109 04:17:19.769788 progress 60 % (271 MB)
110 04:17:21.261844 progress 65 % (294 MB)
111 04:17:22.867544 progress 70 % (316 MB)
112 04:17:26.306908 progress 75 % (339 MB)
113 04:17:28.778389 progress 80 % (361 MB)
114 04:17:31.644458 progress 85 % (384 MB)
115 04:17:34.817148 progress 90 % (407 MB)
116 04:17:38.456129 progress 95 % (429 MB)
117 04:17:41.604773 progress 100 % (452 MB)
118 04:17:41.617597 452 MB downloaded in 31.64 s (14.30 MB/s)
119 04:17:41.618562 end: 1.4.1 http-download (duration 00:00:32) [common]
121 04:17:41.620209 end: 1.4 download-retry (duration 00:00:32) [common]
122 04:17:41.620727 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:17:41.621232 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:17:41.622213 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-176-g20371ba12063/arm64/defconfig/gcc-12/modules.tar.xz
125 04:17:41.622683 saving as /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/modules/modules.tar
126 04:17:41.623086 total size: 11492696 (10 MB)
127 04:17:41.623499 Using unxz to decompress xz
128 04:17:41.675622 progress 0 % (0 MB)
129 04:17:41.742299 progress 5 % (0 MB)
130 04:17:41.824512 progress 10 % (1 MB)
131 04:17:41.905297 progress 15 % (1 MB)
132 04:17:41.991699 progress 20 % (2 MB)
133 04:17:42.065502 progress 25 % (2 MB)
134 04:17:42.142996 progress 30 % (3 MB)
135 04:17:42.215331 progress 35 % (3 MB)
136 04:17:42.294429 progress 40 % (4 MB)
137 04:17:42.371422 progress 45 % (4 MB)
138 04:17:42.451122 progress 50 % (5 MB)
139 04:17:42.534522 progress 55 % (6 MB)
140 04:17:42.611971 progress 60 % (6 MB)
141 04:17:42.693511 progress 65 % (7 MB)
142 04:17:42.773770 progress 70 % (7 MB)
143 04:17:42.856513 progress 75 % (8 MB)
144 04:17:42.946612 progress 80 % (8 MB)
145 04:17:43.043857 progress 85 % (9 MB)
146 04:17:43.114226 progress 90 % (9 MB)
147 04:17:43.197239 progress 95 % (10 MB)
148 04:17:43.282910 progress 100 % (10 MB)
149 04:17:43.298918 10 MB downloaded in 1.68 s (6.54 MB/s)
150 04:17:43.299533 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:17:43.300777 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:17:43.301303 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 04:17:43.301817 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 04:17:58.827135 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/675610/extract-nfsrootfs-m155qj5j
156 04:17:58.827753 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 04:17:58.828103 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 04:17:58.828855 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51
159 04:17:58.829357 makedir: /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin
160 04:17:58.829774 makedir: /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/tests
161 04:17:58.830183 makedir: /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/results
162 04:17:58.830593 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-add-keys
163 04:17:58.831304 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-add-sources
164 04:17:58.831815 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-background-process-start
165 04:17:58.832344 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-background-process-stop
166 04:17:58.832870 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-common-functions
167 04:17:58.833360 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-echo-ipv4
168 04:17:58.833834 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-install-packages
169 04:17:58.834314 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-installed-packages
170 04:17:58.834861 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-os-build
171 04:17:58.835350 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-probe-channel
172 04:17:58.835845 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-probe-ip
173 04:17:58.836379 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-target-ip
174 04:17:58.836861 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-target-mac
175 04:17:58.837337 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-target-storage
176 04:17:58.837820 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-case
177 04:17:58.838295 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-event
178 04:17:58.838766 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-feedback
179 04:17:58.839233 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-raise
180 04:17:58.839710 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-reference
181 04:17:58.840229 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-runner
182 04:17:58.840718 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-set
183 04:17:58.841191 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-test-shell
184 04:17:58.841669 Updating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-install-packages (oe)
185 04:17:58.842193 Updating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/bin/lava-installed-packages (oe)
186 04:17:58.842626 Creating /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/environment
187 04:17:58.842989 LAVA metadata
188 04:17:58.843243 - LAVA_JOB_ID=675610
189 04:17:58.843457 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:17:58.843806 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 04:17:58.844792 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:17:58.845101 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 04:17:58.845312 skipped lava-vland-overlay
194 04:17:58.845556 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:17:58.845809 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 04:17:58.846027 skipped lava-multinode-overlay
197 04:17:58.846268 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:17:58.846518 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 04:17:58.846764 Loading test definitions
200 04:17:58.847037 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 04:17:58.847258 Using /lava-675610 at stage 0
202 04:17:58.848396 uuid=675610_1.6.2.4.1 testdef=None
203 04:17:58.848700 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:17:58.848962 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 04:17:58.850690 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:17:58.851475 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 04:17:58.853620 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:17:58.854443 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 04:17:58.856501 runner path: /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 675610_1.6.2.4.1
212 04:17:58.857063 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:17:58.857816 Creating lava-test-runner.conf files
215 04:17:58.858017 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/675610/lava-overlay-jgtx0w51/lava-675610/0 for stage 0
216 04:17:58.858358 - 0_v4l2-decoder-conformance-h265
217 04:17:58.858710 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:17:58.858980 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 04:17:58.880305 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:17:58.880661 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 04:17:58.880915 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:17:58.881178 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:17:58.881436 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 04:17:59.510334 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:17:59.510820 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 04:17:59.511078 extracting modules file /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675610/extract-nfsrootfs-m155qj5j
227 04:18:00.862756 extracting modules file /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/675610/extract-overlay-ramdisk-q2tuk15y/ramdisk
228 04:18:02.243623 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:18:02.244092 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 04:18:02.244372 [common] Applying overlay to NFS
231 04:18:02.244586 [common] Applying overlay /var/lib/lava/dispatcher/tmp/675610/compress-overlay-1bisinl0/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/675610/extract-nfsrootfs-m155qj5j
232 04:18:02.274444 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:18:02.274825 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 04:18:02.275097 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 04:18:02.275328 Converting downloaded kernel to a uImage
236 04:18:02.275634 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/kernel/Image /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/kernel/uImage
237 04:18:02.743572 output: Image Name:
238 04:18:02.744022 output: Created: Fri Aug 30 04:18:02 2024
239 04:18:02.744255 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:18:02.744471 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
241 04:18:02.744679 output: Load Address: 01080000
242 04:18:02.744884 output: Entry Point: 01080000
243 04:18:02.745085 output:
244 04:18:02.745427 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:18:02.745703 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:18:02.745984 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 04:18:02.746252 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:18:02.746521 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 04:18:02.746785 Building ramdisk /var/lib/lava/dispatcher/tmp/675610/extract-overlay-ramdisk-q2tuk15y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/675610/extract-overlay-ramdisk-q2tuk15y/ramdisk
250 04:18:04.967830 >> 165125 blocks
251 04:18:12.620405 Adding RAMdisk u-boot header.
252 04:18:12.621121 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/675610/extract-overlay-ramdisk-q2tuk15y/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/675610/extract-overlay-ramdisk-q2tuk15y/ramdisk.cpio.gz.uboot
253 04:18:12.865703 output: Image Name:
254 04:18:12.866348 output: Created: Fri Aug 30 04:18:12 2024
255 04:18:12.866806 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:18:12.867257 output: Data Size: 23253133 Bytes = 22708.14 KiB = 22.18 MiB
257 04:18:12.867699 output: Load Address: 00000000
258 04:18:12.868188 output: Entry Point: 00000000
259 04:18:12.868630 output:
260 04:18:12.869873 rename /var/lib/lava/dispatcher/tmp/675610/extract-overlay-ramdisk-q2tuk15y/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot
261 04:18:12.870663 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:18:12.871256 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 04:18:12.871837 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 04:18:12.872386 No LXC device requested
265 04:18:12.872949 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:18:12.873559 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 04:18:12.874113 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:18:12.874573 Checking files for TFTP limit of 4294967296 bytes.
269 04:18:12.877520 end: 1 tftp-deploy (duration 00:01:04) [common]
270 04:18:12.878153 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:18:12.878731 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:18:12.879278 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:18:12.879831 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:18:12.880446 Using kernel file from prepare-kernel: 675610/tftp-deploy-tp067df8/kernel/uImage
275 04:18:12.881138 substitutions:
276 04:18:12.881586 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:18:12.882026 - {DTB_ADDR}: 0x01070000
278 04:18:12.882465 - {DTB}: 675610/tftp-deploy-tp067df8/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:18:12.882904 - {INITRD}: 675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot
280 04:18:12.883340 - {KERNEL_ADDR}: 0x01080000
281 04:18:12.883769 - {KERNEL}: 675610/tftp-deploy-tp067df8/kernel/uImage
282 04:18:12.884234 - {LAVA_MAC}: None
283 04:18:12.884708 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/675610/extract-nfsrootfs-m155qj5j
284 04:18:12.885150 - {NFS_SERVER_IP}: 192.168.6.2
285 04:18:12.885579 - {PRESEED_CONFIG}: None
286 04:18:12.886006 - {PRESEED_LOCAL}: None
287 04:18:12.886434 - {RAMDISK_ADDR}: 0x08000000
288 04:18:12.886858 - {RAMDISK}: 675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot
289 04:18:12.887287 - {ROOT_PART}: None
290 04:18:12.887713 - {ROOT}: None
291 04:18:12.888165 - {SERVER_IP}: 192.168.6.2
292 04:18:12.888595 - {TEE_ADDR}: 0x83000000
293 04:18:12.889023 - {TEE}: None
294 04:18:12.889450 Parsed boot commands:
295 04:18:12.889868 - setenv autoload no
296 04:18:12.890295 - setenv initrd_high 0xffffffff
297 04:18:12.890716 - setenv fdt_high 0xffffffff
298 04:18:12.891135 - dhcp
299 04:18:12.891555 - setenv serverip 192.168.6.2
300 04:18:12.891977 - tftpboot 0x01080000 675610/tftp-deploy-tp067df8/kernel/uImage
301 04:18:12.892428 - tftpboot 0x08000000 675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot
302 04:18:12.892850 - tftpboot 0x01070000 675610/tftp-deploy-tp067df8/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:18:12.893277 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/675610/extract-nfsrootfs-m155qj5j,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:18:12.893718 - bootm 0x01080000 0x08000000 0x01070000
305 04:18:12.894265 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:18:12.895891 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:18:12.896380 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:18:12.911393 Setting prompt string to ['lava-test: # ']
310 04:18:12.913036 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:18:12.913687 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:18:12.914281 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:18:12.914862 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:18:12.916133 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:18:12.952817 >> OK - accepted request
316 04:18:12.955634 Returned 0 in 0 seconds
317 04:18:13.056945 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:18:13.058093 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:18:13.058502 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:18:13.058855 Setting prompt string to ['Hit any key to stop autoboot']
322 04:18:13.059133 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:18:13.060267 Trying 192.168.56.21...
324 04:18:13.060613 Connected to conserv1.
325 04:18:13.060871 Escape character is '^]'.
326 04:18:13.061116
327 04:18:13.061366 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 04:18:13.061617
329 04:18:20.106440 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:18:20.106857 bl2_stage_init 0x01
331 04:18:20.107084 bl2_stage_init 0x81
332 04:18:20.111925 hw id: 0x0000 - pwm id 0x01
333 04:18:20.112221 bl2_stage_init 0xc1
334 04:18:20.117441 bl2_stage_init 0x02
335 04:18:20.117701
336 04:18:20.117917 L0:00000000
337 04:18:20.118140 L1:00000703
338 04:18:20.118348 L2:00008067
339 04:18:20.118556 L3:15000000
340 04:18:20.123081 S1:00000000
341 04:18:20.123346 B2:20282000
342 04:18:20.123567 B1:a0f83180
343 04:18:20.123777
344 04:18:20.124006 TE: 70107
345 04:18:20.124219
346 04:18:20.128614 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:18:20.128868
348 04:18:20.134366 Board ID = 1
349 04:18:20.134617 Set cpu clk to 24M
350 04:18:20.134826 Set clk81 to 24M
351 04:18:20.139943 Use GP1_pll as DSU clk.
352 04:18:20.140213 DSU clk: 1200 Mhz
353 04:18:20.140428 CPU clk: 1200 MHz
354 04:18:20.145386 Set clk81 to 166.6M
355 04:18:20.151065 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:18:20.151318 board id: 1
357 04:18:20.158092 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:18:20.168781 fw parse done
359 04:18:20.174780 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:18:20.217410 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:18:20.228297 PIEI prepare done
362 04:18:20.228794 fastboot data load
363 04:18:20.229239 fastboot data verify
364 04:18:20.233912 verify result: 266
365 04:18:20.239629 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:18:20.240145 LPDDR4 probe
367 04:18:20.240583 ddr clk to 1584MHz
368 04:18:20.247489 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:18:20.284779
370 04:18:20.285277 dmc_version 0001
371 04:18:20.291392 Check phy result
372 04:18:20.297315 INFO : End of CA training
373 04:18:20.297776 INFO : End of initialization
374 04:18:20.302914 INFO : Training has run successfully!
375 04:18:20.303378 Check phy result
376 04:18:20.308541 INFO : End of initialization
377 04:18:20.309012 INFO : End of read enable training
378 04:18:20.314071 INFO : End of fine write leveling
379 04:18:20.319776 INFO : End of Write leveling coarse delay
380 04:18:20.320264 INFO : Training has run successfully!
381 04:18:20.320697 Check phy result
382 04:18:20.325327 INFO : End of initialization
383 04:18:20.325791 INFO : End of read dq deskew training
384 04:18:20.330928 INFO : End of MPR read delay center optimization
385 04:18:20.336564 INFO : End of write delay center optimization
386 04:18:20.342116 INFO : End of read delay center optimization
387 04:18:20.342585 INFO : End of max read latency training
388 04:18:20.347805 INFO : Training has run successfully!
389 04:18:20.348313 1D training succeed
390 04:18:20.356924 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:18:20.404454 Check phy result
392 04:18:20.404944 INFO : End of initialization
393 04:18:20.426908 INFO : End of 2D read delay Voltage center optimization
394 04:18:20.445989 INFO : End of 2D read delay Voltage center optimization
395 04:18:20.498074 INFO : End of 2D write delay Voltage center optimization
396 04:18:20.547030 INFO : End of 2D write delay Voltage center optimization
397 04:18:20.552601 INFO : Training has run successfully!
398 04:18:20.553063
399 04:18:20.553504 channel==0
400 04:18:20.558182 RxClkDly_Margin_A0==78 ps 8
401 04:18:20.558661 TxDqDly_Margin_A0==98 ps 10
402 04:18:20.563815 RxClkDly_Margin_A1==88 ps 9
403 04:18:20.564323 TxDqDly_Margin_A1==98 ps 10
404 04:18:20.564762 TrainedVREFDQ_A0==74
405 04:18:20.569392 TrainedVREFDQ_A1==75
406 04:18:20.569859 VrefDac_Margin_A0==23
407 04:18:20.570295 DeviceVref_Margin_A0==40
408 04:18:20.574982 VrefDac_Margin_A1==23
409 04:18:20.575449 DeviceVref_Margin_A1==39
410 04:18:20.575881
411 04:18:20.576347
412 04:18:20.580597 channel==1
413 04:18:20.581067 RxClkDly_Margin_A0==88 ps 9
414 04:18:20.581499 TxDqDly_Margin_A0==98 ps 10
415 04:18:20.586190 RxClkDly_Margin_A1==88 ps 9
416 04:18:20.586653 TxDqDly_Margin_A1==78 ps 8
417 04:18:20.591812 TrainedVREFDQ_A0==78
418 04:18:20.592309 TrainedVREFDQ_A1==75
419 04:18:20.592746 VrefDac_Margin_A0==23
420 04:18:20.597418 DeviceVref_Margin_A0==36
421 04:18:20.597877 VrefDac_Margin_A1==22
422 04:18:20.602984 DeviceVref_Margin_A1==39
423 04:18:20.603440
424 04:18:20.603876 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:18:20.604340
426 04:18:20.636648 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 04:18:20.637221 2D training succeed
428 04:18:20.642229 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:18:20.647834 auto size-- 65535DDR cs0 size: 2048MB
430 04:18:20.648338 DDR cs1 size: 2048MB
431 04:18:20.653397 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:18:20.653865 cs0 DataBus test pass
433 04:18:20.658974 cs1 DataBus test pass
434 04:18:20.659450 cs0 AddrBus test pass
435 04:18:20.659881 cs1 AddrBus test pass
436 04:18:20.660343
437 04:18:20.664608 100bdlr_step_size ps== 478
438 04:18:20.665080 result report
439 04:18:20.670192 boot times 0Enable ddr reg access
440 04:18:20.675456 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:18:20.689287 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:18:21.344500 bl2z: ptr: 05129330, size: 00001e40
443 04:18:21.350040 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:18:21.350296 MVN_1=0x00000000
445 04:18:21.350501 MVN_2=0x00000000
446 04:18:21.355775 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:18:21.356039 OPS=0x04
448 04:18:21.362965 ring efuse init
449 04:18:21.363213 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:18:21.368426 [0.017319 Inits done]
451 04:18:21.368671 secure task start!
452 04:18:21.368874 high task start!
453 04:18:21.373508 low task start!
454 04:18:21.373793 run into bl31
455 04:18:21.382116 NOTICE: BL31: v1.3(release):4fc40b1
456 04:18:21.390019 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:18:21.390304 NOTICE: BL31: G12A normal boot!
458 04:18:21.405497 NOTICE: BL31: BL33 decompress pass
459 04:18:21.411165 ERROR: Error initializing runtime service opteed_fast
460 04:18:22.654764 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:18:22.655222 bl2_stage_init 0x01
462 04:18:22.655466 bl2_stage_init 0x81
463 04:18:22.660309 hw id: 0x0000 - pwm id 0x01
464 04:18:22.660726 bl2_stage_init 0xc1
465 04:18:22.665186 bl2_stage_init 0x02
466 04:18:22.665488
467 04:18:22.665712 L0:00000000
468 04:18:22.665938 L1:00000703
469 04:18:22.666150 L2:00008067
470 04:18:22.670819 L3:15000000
471 04:18:22.671245 S1:00000000
472 04:18:22.671615 B2:20282000
473 04:18:22.671954 B1:a0f83180
474 04:18:22.672311
475 04:18:22.672555 TE: 68341
476 04:18:22.672777
477 04:18:22.681959 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:18:22.682265
479 04:18:22.682493 Board ID = 1
480 04:18:22.682727 Set cpu clk to 24M
481 04:18:22.682937 Set clk81 to 24M
482 04:18:22.687651 Use GP1_pll as DSU clk.
483 04:18:22.687938 DSU clk: 1200 Mhz
484 04:18:22.688175 CPU clk: 1200 MHz
485 04:18:22.693197 Set clk81 to 166.6M
486 04:18:22.698783 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:18:22.699076 board id: 1
488 04:18:22.706696 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:18:22.717589 fw parse done
490 04:18:22.723554 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:18:22.766704 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:18:22.777810 PIEI prepare done
493 04:18:22.778142 fastboot data load
494 04:18:22.778365 fastboot data verify
495 04:18:22.783393 verify result: 266
496 04:18:22.788991 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:18:22.789290 LPDDR4 probe
498 04:18:22.789509 ddr clk to 1584MHz
499 04:18:22.797377 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 04:18:24.160270 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
501 04:18:24.160911 bl2_stage_init 0x01
502 04:18:24.161434 bl2_stage_init 0x81
503 04:18:24.165864 hw id: 0x0000 - pwm id 0x01
504 04:18:24.166432 bl2_stage_init 0xc1
505 04:18:24.171483 bl2_stage_init 0x02
506 04:18:24.172211
507 04:18:24.172711 L0:00000000
508 04:18:24.173148 L1:00000703
509 04:18:24.173579 L2:00008067
510 04:18:24.174013 L3:15000000
511 04:18:24.177000 S1:00000000
512 04:18:24.177529 B2:20282000
513 04:18:24.177962 B1:a0f83180
514 04:18:24.178389
515 04:18:24.178814 TE: 72714
516 04:18:24.179240
517 04:18:24.182565 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
518 04:18:24.183089
519 04:18:24.188175 Board ID = 1
520 04:18:24.188698 Set cpu clk to 24M
521 04:18:24.189131 Set clk81 to 24M
522 04:18:24.193811 Use GP1_pll as DSU clk.
523 04:18:24.194341 DSU clk: 1200 Mhz
524 04:18:24.194769 CPU clk: 1200 MHz
525 04:18:24.199458 Set clk81 to 166.6M
526 04:18:24.204979 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
527 04:18:24.205497 board id: 1
528 04:18:24.212208 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
529 04:18:24.223061 fw parse done
530 04:18:24.229073 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
531 04:18:24.272159 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
532 04:18:24.283365 PIEI prepare done
533 04:18:24.283894 fastboot data load
534 04:18:24.284377 fastboot data verify
535 04:18:24.288967 verify result: 266
536 04:18:24.294600 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
537 04:18:24.295132 LPDDR4 probe
538 04:18:24.295568 ddr clk to 1584MHz
539 04:18:24.302649 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 04:18:24.340336
541 04:18:24.340887 dmc_version 0001
542 04:18:24.347375 Check phy result
543 04:18:24.353298 INFO : End of CA training
544 04:18:24.353811 INFO : End of initialization
545 04:18:24.359099 INFO : Training has run successfully!
546 04:18:24.359629 Check phy result
547 04:18:24.364652 INFO : End of initialization
548 04:18:24.365208 INFO : End of read enable training
549 04:18:24.370129 INFO : End of fine write leveling
550 04:18:24.375709 INFO : End of Write leveling coarse delay
551 04:18:24.376269 INFO : Training has run successfully!
552 04:18:24.376734 Check phy result
553 04:18:24.381328 INFO : End of initialization
554 04:18:24.381870 INFO : End of read dq deskew training
555 04:18:24.386916 INFO : End of MPR read delay center optimization
556 04:18:24.392594 INFO : End of write delay center optimization
557 04:18:24.398116 INFO : End of read delay center optimization
558 04:18:24.398669 INFO : End of max read latency training
559 04:18:24.403706 INFO : Training has run successfully!
560 04:18:24.404280 1D training succeed
561 04:18:24.412856 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
562 04:18:24.461190 Check phy result
563 04:18:24.461762 INFO : End of initialization
564 04:18:24.488715 INFO : End of 2D read delay Voltage center optimization
565 04:18:24.512781 INFO : End of 2D read delay Voltage center optimization
566 04:18:24.569536 INFO : End of 2D write delay Voltage center optimization
567 04:18:24.623465 INFO : End of 2D write delay Voltage center optimization
568 04:18:24.628997 INFO : Training has run successfully!
569 04:18:24.629523
570 04:18:24.629986 channel==0
571 04:18:24.634615 RxClkDly_Margin_A0==88 ps 9
572 04:18:24.635141 TxDqDly_Margin_A0==98 ps 10
573 04:18:24.640227 RxClkDly_Margin_A1==78 ps 8
574 04:18:24.640753 TxDqDly_Margin_A1==98 ps 10
575 04:18:24.641215 TrainedVREFDQ_A0==74
576 04:18:24.645816 TrainedVREFDQ_A1==75
577 04:18:24.646352 VrefDac_Margin_A0==23
578 04:18:24.646807 DeviceVref_Margin_A0==40
579 04:18:24.651395 VrefDac_Margin_A1==23
580 04:18:24.651916 DeviceVref_Margin_A1==39
581 04:18:24.652411
582 04:18:24.652865
583 04:18:24.657044 channel==1
584 04:18:24.657578 RxClkDly_Margin_A0==88 ps 9
585 04:18:24.658032 TxDqDly_Margin_A0==98 ps 10
586 04:18:24.662612 RxClkDly_Margin_A1==88 ps 9
587 04:18:24.663132 TxDqDly_Margin_A1==88 ps 9
588 04:18:24.668239 TrainedVREFDQ_A0==78
589 04:18:24.668765 TrainedVREFDQ_A1==75
590 04:18:24.669218 VrefDac_Margin_A0==23
591 04:18:24.673812 DeviceVref_Margin_A0==36
592 04:18:24.674335 VrefDac_Margin_A1==22
593 04:18:24.679425 DeviceVref_Margin_A1==39
594 04:18:24.679945
595 04:18:24.680444 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
596 04:18:24.680897
597 04:18:24.712941 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
598 04:18:24.713538 2D training succeed
599 04:18:24.718648 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
600 04:18:24.724268 auto size-- 65535DDR cs0 size: 2048MB
601 04:18:24.724805 DDR cs1 size: 2048MB
602 04:18:24.729798 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
603 04:18:24.730324 cs0 DataBus test pass
604 04:18:24.735418 cs1 DataBus test pass
605 04:18:24.735960 cs0 AddrBus test pass
606 04:18:24.736459 cs1 AddrBus test pass
607 04:18:24.736904
608 04:18:24.741002 100bdlr_step_size ps== 471
609 04:18:24.741537 result report
610 04:18:24.746642 boot times 0Enable ddr reg access
611 04:18:24.751856 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
612 04:18:24.765692 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
613 04:18:25.425152 bl2z: ptr: 05129330, size: 00001e40
614 04:18:25.432661 0.0;M3 CHK:0;cm4_sp_mode 0
615 04:18:25.433253 MVN_1=0x00000000
616 04:18:25.433732 MVN_2=0x00000000
617 04:18:25.444018 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
618 04:18:25.444589 OPS=0x04
619 04:18:25.445058 ring efuse init
620 04:18:25.446955 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
621 04:18:25.453213 [0.017354 Inits done]
622 04:18:25.453758 secure task start!
623 04:18:25.454221 high task start!
624 04:18:25.454710 low task start!
625 04:18:25.457442 run into bl31
626 04:18:25.465956 NOTICE: BL31: v1.3(release):4fc40b1
627 04:18:25.474389 NOTICE: BL31: Built : 15:57:33, May 22 2019
628 04:18:25.474962 NOTICE: BL31: G12A normal boot!
629 04:18:25.489475 NOTICE: BL31: BL33 decompress pass
630 04:18:25.496990 ERROR: Error initializing runtime service opteed_fast
631 04:18:26.709008 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
632 04:18:26.709435 bl2_stage_init 0x01
633 04:18:26.709666 bl2_stage_init 0x81
634 04:18:26.714579 hw id: 0x0000 - pwm id 0x01
635 04:18:26.715035 bl2_stage_init 0xc1
636 04:18:26.720229 bl2_stage_init 0x02
637 04:18:26.720799
638 04:18:26.721311 L0:00000000
639 04:18:26.721785 L1:00000703
640 04:18:26.722232 L2:00008067
641 04:18:26.722671 L3:15000000
642 04:18:26.725821 S1:00000000
643 04:18:26.726322 B2:20282000
644 04:18:26.726775 B1:a0f83180
645 04:18:26.727227
646 04:18:26.727704 TE: 72536
647 04:18:26.728218
648 04:18:26.731352 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
649 04:18:26.731912
650 04:18:26.736977 Board ID = 1
651 04:18:26.737572 Set cpu clk to 24M
652 04:18:26.738087 Set clk81 to 24M
653 04:18:26.742633 Use GP1_pll as DSU clk.
654 04:18:26.743223 DSU clk: 1200 Mhz
655 04:18:26.743735 CPU clk: 1200 MHz
656 04:18:26.748217 Set clk81 to 166.6M
657 04:18:26.753837 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
658 04:18:26.754431 board id: 1
659 04:18:26.760959 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
660 04:18:26.771572 fw parse done
661 04:18:26.777495 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
662 04:18:26.820130 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
663 04:18:26.831123 PIEI prepare done
664 04:18:26.831638 fastboot data load
665 04:18:26.832152 fastboot data verify
666 04:18:26.836645 verify result: 266
667 04:18:26.842262 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
668 04:18:26.842762 LPDDR4 probe
669 04:18:26.843217 ddr clk to 1584MHz
670 04:18:26.850242 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
671 04:18:26.887525
672 04:18:26.888103 dmc_version 0001
673 04:18:26.894183 Check phy result
674 04:18:26.900078 INFO : End of CA training
675 04:18:26.900582 INFO : End of initialization
676 04:18:26.905668 INFO : Training has run successfully!
677 04:18:26.906175 Check phy result
678 04:18:26.911353 INFO : End of initialization
679 04:18:26.911860 INFO : End of read enable training
680 04:18:26.916894 INFO : End of fine write leveling
681 04:18:26.922545 INFO : End of Write leveling coarse delay
682 04:18:26.923048 INFO : Training has run successfully!
683 04:18:26.923510 Check phy result
684 04:18:26.928237 INFO : End of initialization
685 04:18:26.928764 INFO : End of read dq deskew training
686 04:18:26.933718 INFO : End of MPR read delay center optimization
687 04:18:26.939331 INFO : End of write delay center optimization
688 04:18:26.944887 INFO : End of read delay center optimization
689 04:18:26.945387 INFO : End of max read latency training
690 04:18:26.950502 INFO : Training has run successfully!
691 04:18:26.951004 1D training succeed
692 04:18:26.959694 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 04:18:27.007316 Check phy result
694 04:18:27.007836 INFO : End of initialization
695 04:18:27.029617 INFO : End of 2D read delay Voltage center optimization
696 04:18:27.048758 INFO : End of 2D read delay Voltage center optimization
697 04:18:27.100580 INFO : End of 2D write delay Voltage center optimization
698 04:18:27.149964 INFO : End of 2D write delay Voltage center optimization
699 04:18:27.155459 INFO : Training has run successfully!
700 04:18:27.155970
701 04:18:27.156507 channel==0
702 04:18:27.160940 RxClkDly_Margin_A0==78 ps 8
703 04:18:27.161440 TxDqDly_Margin_A0==98 ps 10
704 04:18:27.164267 RxClkDly_Margin_A1==88 ps 9
705 04:18:27.164759 TxDqDly_Margin_A1==98 ps 10
706 04:18:27.169846 TrainedVREFDQ_A0==75
707 04:18:27.170374 TrainedVREFDQ_A1==74
708 04:18:27.170846 VrefDac_Margin_A0==23
709 04:18:27.175526 DeviceVref_Margin_A0==39
710 04:18:27.176076 VrefDac_Margin_A1==23
711 04:18:27.181051 DeviceVref_Margin_A1==40
712 04:18:27.181556
713 04:18:27.182017
714 04:18:27.182469 channel==1
715 04:18:27.182914 RxClkDly_Margin_A0==88 ps 9
716 04:18:27.186725 TxDqDly_Margin_A0==88 ps 9
717 04:18:27.187241 RxClkDly_Margin_A1==88 ps 9
718 04:18:27.192255 TxDqDly_Margin_A1==88 ps 9
719 04:18:27.192767 TrainedVREFDQ_A0==75
720 04:18:27.193226 TrainedVREFDQ_A1==77
721 04:18:27.197947 VrefDac_Margin_A0==22
722 04:18:27.198461 DeviceVref_Margin_A0==39
723 04:18:27.203443 VrefDac_Margin_A1==22
724 04:18:27.203956 DeviceVref_Margin_A1==37
725 04:18:27.204449
726 04:18:27.209185 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
727 04:18:27.209705
728 04:18:27.237154 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
729 04:18:27.242605 2D training succeed
730 04:18:27.248419 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
731 04:18:27.248938 auto size-- 65535DDR cs0 size: 2048MB
732 04:18:27.253903 DDR cs1 size: 2048MB
733 04:18:27.254412 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
734 04:18:27.259500 cs0 DataBus test pass
735 04:18:27.260043 cs1 DataBus test pass
736 04:18:27.260514 cs0 AddrBus test pass
737 04:18:27.265121 cs1 AddrBus test pass
738 04:18:27.265633
739 04:18:27.266091 100bdlr_step_size ps== 478
740 04:18:27.266555 result report
741 04:18:27.270710 boot times 0Enable ddr reg access
742 04:18:27.277153 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
743 04:18:27.291305 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
744 04:18:27.946533 bl2z: ptr: 05129330, size: 00001e40
745 04:18:27.954700 0.0;M3 CHK:0;cm4_sp_mode 0
746 04:18:27.955237 MVN_1=0x00000000
747 04:18:27.955700 MVN_2=0x00000000
748 04:18:27.966218 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
749 04:18:27.966777 OPS=0x04
750 04:18:27.967247 ring efuse init
751 04:18:27.971891 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
752 04:18:27.972444 [0.017319 Inits done]
753 04:18:27.972902 secure task start!
754 04:18:27.979718 high task start!
755 04:18:27.980255 low task start!
756 04:18:27.980721 run into bl31
757 04:18:27.988375 NOTICE: BL31: v1.3(release):4fc40b1
758 04:18:27.996203 NOTICE: BL31: Built : 15:57:33, May 22 2019
759 04:18:27.996713 NOTICE: BL31: G12A normal boot!
760 04:18:28.011788 NOTICE: BL31: BL33 decompress pass
761 04:18:28.017428 ERROR: Error initializing runtime service opteed_fast
762 04:18:28.813021
763 04:18:28.813686
764 04:18:28.818173 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
765 04:18:28.818684
766 04:18:28.821675 Model: Libre Computer AML-S905D3-CC Solitude
767 04:18:28.968755 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
768 04:18:28.984113 DRAM: 2 GiB (effective 3.8 GiB)
769 04:18:29.085043 Core: 406 devices, 33 uclasses, devicetree: separate
770 04:18:29.090953 WDT: Not starting watchdog@f0d0
771 04:18:29.116075 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
772 04:18:29.128219 Loading Environment from FAT... Card did not respond to voltage select! : -110
773 04:18:29.133179 ** Bad device specification mmc 0 **
774 04:18:29.143226 Card did not respond to voltage select! : -110
775 04:18:29.150887 ** Bad device specification mmc 0 **
776 04:18:29.151386 Couldn't find partition mmc 0
777 04:18:29.159228 Card did not respond to voltage select! : -110
778 04:18:29.164871 ** Bad device specification mmc 0 **
779 04:18:29.165363 Couldn't find partition mmc 0
780 04:18:29.169880 Error: could not access storage.
781 04:18:29.467207 Net: eth0: ethernet@ff3f0000
782 04:18:29.467832 starting USB...
783 04:18:29.712034 Bus usb@ff500000: Register 3000140 NbrPorts 3
784 04:18:29.712650 Starting the controller
785 04:18:29.718927 USB XHCI 1.10
786 04:18:31.273146 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
787 04:18:31.281388 scanning usb for storage devices... 0 Storage Device(s) found
789 04:18:31.332966 Hit any key to stop autoboot: 1
790 04:18:31.333813 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
791 04:18:31.334472 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
792 04:18:31.335006 Setting prompt string to ['=>']
793 04:18:31.335544 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
794 04:18:31.347429 0
795 04:18:31.348389 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
797 04:18:31.449719 => setenv autoload no
798 04:18:31.450459 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
799 04:18:31.455761 setenv autoload no
801 04:18:31.557408 => setenv initrd_high 0xffffffff
802 04:18:31.558147 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
803 04:18:31.562545 setenv initrd_high 0xffffffff
805 04:18:31.664149 => setenv fdt_high 0xffffffff
806 04:18:31.664978 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
807 04:18:31.669398 setenv fdt_high 0xffffffff
809 04:18:31.771004 => dhcp
810 04:18:31.771748 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
811 04:18:31.775776 dhcp
812 04:18:32.681881 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
813 04:18:32.682536 Speed: 1000, full duplex
814 04:18:32.683005 BOOTP broadcast 1
815 04:18:32.929851 BOOTP broadcast 2
816 04:18:33.430877 BOOTP broadcast 3
817 04:18:34.431773 BOOTP broadcast 4
818 04:18:36.432952 BOOTP broadcast 5
819 04:18:36.446541 DHCP client bound to address 192.168.6.12 (3764 ms)
821 04:18:36.548242 => setenv serverip 192.168.6.2
822 04:18:36.549125 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
823 04:18:36.553689 setenv serverip 192.168.6.2
825 04:18:36.655764 => tftpboot 0x01080000 675610/tftp-deploy-tp067df8/kernel/uImage
826 04:18:36.656427 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
827 04:18:36.663303 tftpboot 0x01080000 675610/tftp-deploy-tp067df8/kernel/uImage
828 04:18:36.663839 Speed: 1000, full duplex
829 04:18:36.664338 Using ethernet@ff3f0000 device
830 04:18:36.668975 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
831 04:18:36.674336 Filename '675610/tftp-deploy-tp067df8/kernel/uImage'.
832 04:18:36.678163 Load address: 0x1080000
833 04:18:37.282754 Loading: *########## UDP wrong checksum 000000ff 00009160
834 04:18:37.299914 UDP wrong checksum 000000ff 00002753
835 04:18:39.669542 ######################################## 43.2 MiB
836 04:18:39.669978 14.4 MiB/s
837 04:18:39.670211 done
838 04:18:39.673984 Bytes transferred = 45308480 (2b35a40 hex)
840 04:18:39.775566 => tftpboot 0x08000000 675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot
841 04:18:39.776162 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
842 04:18:39.782954 tftpboot 0x08000000 675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot
843 04:18:39.783370 Speed: 1000, full duplex
844 04:18:39.783639 Using ethernet@ff3f0000 device
845 04:18:39.788380 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
846 04:18:39.798115 Filename '675610/tftp-deploy-tp067df8/ramdisk/ramdisk.cpio.gz.uboot'.
847 04:18:39.798480 Load address: 0x8000000
848 04:18:41.303158 Loading: *################################################# UDP wrong checksum 00000005 0000873b
849 04:18:46.302989 T UDP wrong checksum 00000005 0000873b
850 04:18:50.640922 UDP wrong checksum 000000ff 000017f7
851 04:18:50.689713 UDP wrong checksum 000000ff 0000b0e9
852 04:18:56.304898 T T UDP wrong checksum 00000005 0000873b
853 04:19:16.308875 T T T T UDP wrong checksum 00000005 0000873b
854 04:19:36.313549 T T T
855 04:19:36.313955 Retry count exceeded; starting again
857 04:19:36.314815 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
860 04:19:36.315775 end: 2.4 uboot-commands (duration 00:01:23) [common]
862 04:19:36.316534 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
864 04:19:36.317089 end: 2 uboot-action (duration 00:01:23) [common]
866 04:19:36.317921 Cleaning after the job
867 04:19:36.318248 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/ramdisk
868 04:19:36.319049 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/kernel
869 04:19:36.323051 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/dtb
870 04:19:36.323718 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/nfsrootfs
871 04:19:36.402841 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/675610/tftp-deploy-tp067df8/modules
872 04:19:36.410349 start: 4.1 power-off (timeout 00:00:30) [common]
873 04:19:36.410997 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
874 04:19:36.444454 >> OK - accepted request
875 04:19:36.446982 Returned 0 in 0 seconds
876 04:19:36.547773 end: 4.1 power-off (duration 00:00:00) [common]
878 04:19:36.548821 start: 4.2 read-feedback (timeout 00:10:00) [common]
879 04:19:36.549487 Listened to connection for namespace 'common' for up to 1s
880 04:19:37.550481 Finalising connection for namespace 'common'
881 04:19:37.550978 Disconnecting from shell: Finalise
882 04:19:37.551267 =>
883 04:19:37.652046 end: 4.2 read-feedback (duration 00:00:01) [common]
884 04:19:37.652718 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/675610
885 04:19:40.197625 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/675610
886 04:19:40.198231 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.