Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:41:43.346281 lava-dispatcher, installed at version: 2024.01
2 22:41:43.347146 start: 0 validate
3 22:41:43.347641 Start time: 2024-08-30 22:41:43.347607+00:00 (UTC)
4 22:41:43.348243 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:41:43.348810 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:41:43.391380 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:41:43.391961 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-207-gfb24560f31f9d%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 22:41:43.429957 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:41:43.430975 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-207-gfb24560f31f9d%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:41:43.462423 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:41:43.462956 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:41:43.496308 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:41:43.496858 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-207-gfb24560f31f9d%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 22:41:43.535466 validate duration: 0.19
16 22:41:43.536463 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:41:43.536804 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:41:43.537104 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:41:43.537914 Not decompressing ramdisk as can be used compressed.
20 22:41:43.538476 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 22:41:43.538783 saving as /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/ramdisk/initrd.cpio.gz
22 22:41:43.539091 total size: 5628140 (5 MB)
23 22:41:43.583152 progress 0 % (0 MB)
24 22:41:43.587508 progress 5 % (0 MB)
25 22:41:43.591905 progress 10 % (0 MB)
26 22:41:43.595775 progress 15 % (0 MB)
27 22:41:43.599904 progress 20 % (1 MB)
28 22:41:43.603659 progress 25 % (1 MB)
29 22:41:43.607817 progress 30 % (1 MB)
30 22:41:43.611949 progress 35 % (1 MB)
31 22:41:43.615639 progress 40 % (2 MB)
32 22:41:43.619834 progress 45 % (2 MB)
33 22:41:43.623628 progress 50 % (2 MB)
34 22:41:43.627748 progress 55 % (2 MB)
35 22:41:43.631880 progress 60 % (3 MB)
36 22:41:43.635664 progress 65 % (3 MB)
37 22:41:43.639914 progress 70 % (3 MB)
38 22:41:43.644007 progress 75 % (4 MB)
39 22:41:43.648102 progress 80 % (4 MB)
40 22:41:43.651753 progress 85 % (4 MB)
41 22:41:43.655828 progress 90 % (4 MB)
42 22:41:43.659744 progress 95 % (5 MB)
43 22:41:43.663036 progress 100 % (5 MB)
44 22:41:43.663678 5 MB downloaded in 0.12 s (43.09 MB/s)
45 22:41:43.664246 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:41:43.665129 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:41:43.665418 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:41:43.665690 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:41:43.666283 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/clang-16/kernel/Image
51 22:41:43.666556 saving as /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/kernel/Image
52 22:41:43.666776 total size: 37409280 (35 MB)
53 22:41:43.666999 No compression specified
54 22:41:43.700080 progress 0 % (0 MB)
55 22:41:43.724377 progress 5 % (1 MB)
56 22:41:43.756264 progress 10 % (3 MB)
57 22:41:43.787486 progress 15 % (5 MB)
58 22:41:43.819309 progress 20 % (7 MB)
59 22:41:43.851478 progress 25 % (8 MB)
60 22:41:43.882748 progress 30 % (10 MB)
61 22:41:43.914014 progress 35 % (12 MB)
62 22:41:43.945573 progress 40 % (14 MB)
63 22:41:43.976169 progress 45 % (16 MB)
64 22:41:44.007493 progress 50 % (17 MB)
65 22:41:44.039720 progress 55 % (19 MB)
66 22:41:44.070812 progress 60 % (21 MB)
67 22:41:44.102945 progress 65 % (23 MB)
68 22:41:44.134081 progress 70 % (25 MB)
69 22:41:44.165043 progress 75 % (26 MB)
70 22:41:44.196834 progress 80 % (28 MB)
71 22:41:44.228553 progress 85 % (30 MB)
72 22:41:44.259298 progress 90 % (32 MB)
73 22:41:44.290322 progress 95 % (33 MB)
74 22:41:44.320905 progress 100 % (35 MB)
75 22:41:44.321805 35 MB downloaded in 0.66 s (54.47 MB/s)
76 22:41:44.322460 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:41:44.323562 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:41:44.323959 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:41:44.324396 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:41:44.325084 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 22:41:44.325485 saving as /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 22:41:44.325809 total size: 53173 (0 MB)
84 22:41:44.326090 No compression specified
85 22:41:44.370708 progress 61 % (0 MB)
86 22:41:44.371592 progress 100 % (0 MB)
87 22:41:44.372217 0 MB downloaded in 0.05 s (1.09 MB/s)
88 22:41:44.372760 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:41:44.373653 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:41:44.373958 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:41:44.374263 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:41:44.374985 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 22:41:44.375271 saving as /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/nfsrootfs/full.rootfs.tar
95 22:41:44.375505 total size: 474398908 (452 MB)
96 22:41:44.375743 Using unxz to decompress xz
97 22:41:44.415076 progress 0 % (0 MB)
98 22:41:45.511555 progress 5 % (22 MB)
99 22:41:46.952106 progress 10 % (45 MB)
100 22:41:47.400958 progress 15 % (67 MB)
101 22:41:48.170338 progress 20 % (90 MB)
102 22:41:48.716471 progress 25 % (113 MB)
103 22:41:49.057135 progress 30 % (135 MB)
104 22:41:49.666177 progress 35 % (158 MB)
105 22:41:50.584196 progress 40 % (181 MB)
106 22:41:51.450283 progress 45 % (203 MB)
107 22:41:52.069078 progress 50 % (226 MB)
108 22:41:52.760909 progress 55 % (248 MB)
109 22:41:54.163999 progress 60 % (271 MB)
110 22:41:55.856722 progress 65 % (294 MB)
111 22:41:57.577052 progress 70 % (316 MB)
112 22:42:00.863072 progress 75 % (339 MB)
113 22:42:03.540233 progress 80 % (361 MB)
114 22:42:06.493532 progress 85 % (384 MB)
115 22:42:09.675232 progress 90 % (407 MB)
116 22:42:12.873788 progress 95 % (429 MB)
117 22:42:16.161772 progress 100 % (452 MB)
118 22:42:16.174632 452 MB downloaded in 31.80 s (14.23 MB/s)
119 22:42:16.175551 end: 1.4.1 http-download (duration 00:00:32) [common]
121 22:42:16.177363 end: 1.4 download-retry (duration 00:00:32) [common]
122 22:42:16.177927 start: 1.5 download-retry (timeout 00:09:27) [common]
123 22:42:16.178491 start: 1.5.1 http-download (timeout 00:09:27) [common]
124 22:42:16.179522 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/clang-16/modules.tar.xz
125 22:42:16.180083 saving as /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/modules/modules.tar
126 22:42:16.180549 total size: 11632600 (11 MB)
127 22:42:16.181030 Using unxz to decompress xz
128 22:42:16.225661 progress 0 % (0 MB)
129 22:42:16.296121 progress 5 % (0 MB)
130 22:42:16.375631 progress 10 % (1 MB)
131 22:42:16.464881 progress 15 % (1 MB)
132 22:42:16.543207 progress 20 % (2 MB)
133 22:42:16.624942 progress 25 % (2 MB)
134 22:42:16.711945 progress 30 % (3 MB)
135 22:42:16.793642 progress 35 % (3 MB)
136 22:42:16.870248 progress 40 % (4 MB)
137 22:42:16.947912 progress 45 % (5 MB)
138 22:42:17.027402 progress 50 % (5 MB)
139 22:42:17.105704 progress 55 % (6 MB)
140 22:42:17.186214 progress 60 % (6 MB)
141 22:42:17.273762 progress 65 % (7 MB)
142 22:42:17.357400 progress 70 % (7 MB)
143 22:42:17.451817 progress 75 % (8 MB)
144 22:42:17.544276 progress 80 % (8 MB)
145 22:42:17.625451 progress 85 % (9 MB)
146 22:42:17.703126 progress 90 % (10 MB)
147 22:42:17.783426 progress 95 % (10 MB)
148 22:42:17.857066 progress 100 % (11 MB)
149 22:42:17.871338 11 MB downloaded in 1.69 s (6.56 MB/s)
150 22:42:17.871974 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:42:17.873925 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:42:17.874498 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 22:42:17.875065 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 22:42:33.710655 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/680098/extract-nfsrootfs-xq6epa7u
156 22:42:33.711265 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 22:42:33.711550 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 22:42:33.712224 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1
159 22:42:33.712696 makedir: /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin
160 22:42:33.713034 makedir: /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/tests
161 22:42:33.713364 makedir: /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/results
162 22:42:33.713695 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-add-keys
163 22:42:33.714223 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-add-sources
164 22:42:33.714750 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-background-process-start
165 22:42:33.715263 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-background-process-stop
166 22:42:33.715827 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-common-functions
167 22:42:33.716368 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-echo-ipv4
168 22:42:33.716871 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-install-packages
169 22:42:33.717381 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-installed-packages
170 22:42:33.717874 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-os-build
171 22:42:33.718391 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-probe-channel
172 22:42:33.718919 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-probe-ip
173 22:42:33.719434 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-target-ip
174 22:42:33.719967 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-target-mac
175 22:42:33.720542 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-target-storage
176 22:42:33.721060 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-case
177 22:42:33.721554 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-event
178 22:42:33.722059 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-feedback
179 22:42:33.722587 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-raise
180 22:42:33.723109 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-reference
181 22:42:33.723603 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-runner
182 22:42:33.724142 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-set
183 22:42:33.724676 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-test-shell
184 22:42:33.725203 Updating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-install-packages (oe)
185 22:42:33.725754 Updating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/bin/lava-installed-packages (oe)
186 22:42:33.726228 Creating /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/environment
187 22:42:33.726638 LAVA metadata
188 22:42:33.726902 - LAVA_JOB_ID=680098
189 22:42:33.727117 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:42:33.727490 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 22:42:33.728494 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:42:33.728815 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 22:42:33.729026 skipped lava-vland-overlay
194 22:42:33.729267 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:42:33.729522 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 22:42:33.729742 skipped lava-multinode-overlay
197 22:42:33.729984 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:42:33.730234 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 22:42:33.730484 Loading test definitions
200 22:42:33.730763 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 22:42:33.730986 Using /lava-680098 at stage 0
202 22:42:33.732226 uuid=680098_1.6.2.4.1 testdef=None
203 22:42:33.732549 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:42:33.732815 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 22:42:33.734633 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:42:33.735426 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 22:42:33.737645 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:42:33.738482 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 22:42:33.740663 runner path: /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 680098_1.6.2.4.1
212 22:42:33.741307 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:42:33.742076 Creating lava-test-runner.conf files
215 22:42:33.742279 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/680098/lava-overlay-zmet1so1/lava-680098/0 for stage 0
216 22:42:33.742643 - 0_v4l2-decoder-conformance-h264
217 22:42:33.742998 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:42:33.743275 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 22:42:33.765171 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:42:33.765582 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 22:42:33.765840 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:42:33.766108 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:42:33.766370 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 22:42:34.478291 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:42:34.478757 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 22:42:34.479005 extracting modules file /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/680098/extract-nfsrootfs-xq6epa7u
227 22:42:36.021238 extracting modules file /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/680098/extract-overlay-ramdisk-fe19bkbo/ramdisk
228 22:42:37.728534 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:42:37.729043 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 22:42:37.729366 [common] Applying overlay to NFS
231 22:42:37.729640 [common] Applying overlay /var/lib/lava/dispatcher/tmp/680098/compress-overlay-riv2ft4b/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/680098/extract-nfsrootfs-xq6epa7u
232 22:42:37.760967 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:42:37.761424 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 22:42:37.761698 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 22:42:37.761928 Converting downloaded kernel to a uImage
236 22:42:37.762259 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/kernel/Image /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/kernel/uImage
237 22:42:38.774477 output: Image Name:
238 22:42:38.774905 output: Created: Fri Aug 30 22:42:37 2024
239 22:42:38.775119 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:42:38.775323 output: Data Size: 37409280 Bytes = 36532.50 KiB = 35.68 MiB
241 22:42:38.775524 output: Load Address: 01080000
242 22:42:38.775721 output: Entry Point: 01080000
243 22:42:38.775918 output:
244 22:42:38.776290 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 22:42:38.776563 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 22:42:38.776831 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 22:42:38.777083 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:42:38.777338 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 22:42:38.777598 Building ramdisk /var/lib/lava/dispatcher/tmp/680098/extract-overlay-ramdisk-fe19bkbo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/680098/extract-overlay-ramdisk-fe19bkbo/ramdisk
250 22:42:41.346817 >> 171766 blocks
251 22:42:49.654851 Adding RAMdisk u-boot header.
252 22:42:49.655285 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/680098/extract-overlay-ramdisk-fe19bkbo/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/680098/extract-overlay-ramdisk-fe19bkbo/ramdisk.cpio.gz.uboot
253 22:42:49.909848 output: Image Name:
254 22:42:49.910294 output: Created: Fri Aug 30 22:42:49 2024
255 22:42:49.910791 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:42:49.911255 output: Data Size: 23951579 Bytes = 23390.21 KiB = 22.84 MiB
257 22:42:49.911732 output: Load Address: 00000000
258 22:42:49.912234 output: Entry Point: 00000000
259 22:42:49.912683 output:
260 22:42:49.913822 rename /var/lib/lava/dispatcher/tmp/680098/extract-overlay-ramdisk-fe19bkbo/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot
261 22:42:49.914619 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 22:42:49.915235 end: 1.6 prepare-tftp-overlay (duration 00:00:32) [common]
263 22:42:49.915828 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:54) [common]
264 22:42:49.916375 No LXC device requested
265 22:42:49.916952 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:42:49.917529 start: 1.8 deploy-device-env (timeout 00:08:54) [common]
267 22:42:49.918088 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:42:49.918546 Checking files for TFTP limit of 4294967296 bytes.
269 22:42:49.921667 end: 1 tftp-deploy (duration 00:01:06) [common]
270 22:42:49.922313 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:42:49.922901 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:42:49.923462 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:42:49.924087 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:42:49.924690 Using kernel file from prepare-kernel: 680098/tftp-deploy-izm4x_jl/kernel/uImage
275 22:42:49.925388 substitutions:
276 22:42:49.925840 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:42:49.926284 - {DTB_ADDR}: 0x01070000
278 22:42:49.926726 - {DTB}: 680098/tftp-deploy-izm4x_jl/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 22:42:49.927168 - {INITRD}: 680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot
280 22:42:49.927609 - {KERNEL_ADDR}: 0x01080000
281 22:42:49.928072 - {KERNEL}: 680098/tftp-deploy-izm4x_jl/kernel/uImage
282 22:42:49.928512 - {LAVA_MAC}: None
283 22:42:49.928993 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/680098/extract-nfsrootfs-xq6epa7u
284 22:42:49.929440 - {NFS_SERVER_IP}: 192.168.6.2
285 22:42:49.929876 - {PRESEED_CONFIG}: None
286 22:42:49.930306 - {PRESEED_LOCAL}: None
287 22:42:49.930736 - {RAMDISK_ADDR}: 0x08000000
288 22:42:49.931163 - {RAMDISK}: 680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot
289 22:42:49.931590 - {ROOT_PART}: None
290 22:42:49.932042 - {ROOT}: None
291 22:42:49.932480 - {SERVER_IP}: 192.168.6.2
292 22:42:49.932912 - {TEE_ADDR}: 0x83000000
293 22:42:49.933340 - {TEE}: None
294 22:42:49.933770 Parsed boot commands:
295 22:42:49.934187 - setenv autoload no
296 22:42:49.934613 - setenv initrd_high 0xffffffff
297 22:42:49.935040 - setenv fdt_high 0xffffffff
298 22:42:49.935466 - dhcp
299 22:42:49.935887 - setenv serverip 192.168.6.2
300 22:42:49.936343 - tftpboot 0x01080000 680098/tftp-deploy-izm4x_jl/kernel/uImage
301 22:42:49.936776 - tftpboot 0x08000000 680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot
302 22:42:49.937201 - tftpboot 0x01070000 680098/tftp-deploy-izm4x_jl/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 22:42:49.937629 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/680098/extract-nfsrootfs-xq6epa7u,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:42:49.938071 - bootm 0x01080000 0x08000000 0x01070000
305 22:42:49.938619 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:42:49.940272 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:42:49.940742 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 22:42:49.955303 Setting prompt string to ['lava-test: # ']
310 22:42:49.956925 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:42:49.957604 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:42:49.958226 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:42:49.958862 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:42:49.960174 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 22:42:49.998445 >> OK - accepted request
316 22:42:50.001110 Returned 0 in 0 seconds
317 22:42:50.104249 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:42:50.105202 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:42:50.105562 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:42:50.105903 Setting prompt string to ['Hit any key to stop autoboot']
322 22:42:50.106175 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:42:50.107112 Trying 192.168.56.21...
324 22:42:50.107398 Connected to conserv1.
325 22:42:50.107616 Escape character is '^]'.
326 22:42:50.107827
327 22:42:50.108085 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 22:42:50.108313
329 22:42:57.437642 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 22:42:57.438287 bl2_stage_init 0x01
331 22:42:57.438749 bl2_stage_init 0x81
332 22:42:57.443179 hw id: 0x0000 - pwm id 0x01
333 22:42:57.443657 bl2_stage_init 0xc1
334 22:42:57.444158 bl2_stage_init 0x02
335 22:42:57.444604
336 22:42:57.448966 L0:00000000
337 22:42:57.449439 L1:00000703
338 22:42:57.449892 L2:00008067
339 22:42:57.450331 L3:15000000
340 22:42:57.450769 S1:00000000
341 22:42:57.454391 B2:20282000
342 22:42:57.454872 B1:a0f83180
343 22:42:57.455311
344 22:42:57.455754 TE: 71399
345 22:42:57.456223
346 22:42:57.459932 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 22:42:57.460428
348 22:42:57.465599 Board ID = 1
349 22:42:57.466061 Set cpu clk to 24M
350 22:42:57.466499 Set clk81 to 24M
351 22:42:57.471224 Use GP1_pll as DSU clk.
352 22:42:57.471688 DSU clk: 1200 Mhz
353 22:42:57.472153 CPU clk: 1200 MHz
354 22:42:57.472590 Set clk81 to 166.6M
355 22:42:57.482475 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 22:42:57.482944 board id: 1
357 22:42:57.487946 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:42:57.499443 fw parse done
359 22:42:57.505483 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:42:57.547658 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:42:57.558992 PIEI prepare done
362 22:42:57.559452 fastboot data load
363 22:42:57.559894 fastboot data verify
364 22:42:57.564553 verify result: 266
365 22:42:57.570174 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 22:42:57.570637 LPDDR4 probe
367 22:42:57.571070 ddr clk to 1584MHz
368 22:42:57.577672 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:42:57.615409
370 22:42:57.615871 dmc_version 0001
371 22:42:57.621465 Check phy result
372 22:42:57.627951 INFO : End of CA training
373 22:42:57.628432 INFO : End of initialization
374 22:42:57.633558 INFO : Training has run successfully!
375 22:42:57.634019 Check phy result
376 22:42:57.639280 INFO : End of initialization
377 22:42:57.639742 INFO : End of read enable training
378 22:42:57.642593 INFO : End of fine write leveling
379 22:42:57.647972 INFO : End of Write leveling coarse delay
380 22:42:57.653580 INFO : Training has run successfully!
381 22:42:57.654035 Check phy result
382 22:42:57.654471 INFO : End of initialization
383 22:42:57.659208 INFO : End of read dq deskew training
384 22:42:57.664781 INFO : End of MPR read delay center optimization
385 22:42:57.665249 INFO : End of write delay center optimization
386 22:42:57.670399 INFO : End of read delay center optimization
387 22:42:57.676084 INFO : End of max read latency training
388 22:42:57.676543 INFO : Training has run successfully!
389 22:42:57.681617 1D training succeed
390 22:42:57.686639 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:42:57.734795 Check phy result
392 22:42:57.735339 INFO : End of initialization
393 22:42:57.757419 INFO : End of 2D read delay Voltage center optimization
394 22:42:57.776060 INFO : End of 2D read delay Voltage center optimization
395 22:42:57.828535 INFO : End of 2D write delay Voltage center optimization
396 22:42:57.877851 INFO : End of 2D write delay Voltage center optimization
397 22:42:57.883549 INFO : Training has run successfully!
398 22:42:57.884020
399 22:42:57.884449 channel==0
400 22:42:57.889033 RxClkDly_Margin_A0==78 ps 8
401 22:42:57.889459 TxDqDly_Margin_A0==88 ps 9
402 22:42:57.892259 RxClkDly_Margin_A1==88 ps 9
403 22:42:57.892697 TxDqDly_Margin_A1==98 ps 10
404 22:42:57.897701 TrainedVREFDQ_A0==74
405 22:42:57.898124 TrainedVREFDQ_A1==75
406 22:42:57.898523 VrefDac_Margin_A0==23
407 22:42:57.903282 DeviceVref_Margin_A0==40
408 22:42:57.903703 VrefDac_Margin_A1==23
409 22:42:57.909083 DeviceVref_Margin_A1==39
410 22:42:57.909572
411 22:42:57.909975
412 22:42:57.910373 channel==1
413 22:42:57.910769 RxClkDly_Margin_A0==78 ps 8
414 22:42:57.912553 TxDqDly_Margin_A0==98 ps 10
415 22:42:57.918294 RxClkDly_Margin_A1==88 ps 9
416 22:42:57.918723 TxDqDly_Margin_A1==88 ps 9
417 22:42:57.919121 TrainedVREFDQ_A0==78
418 22:42:57.923714 TrainedVREFDQ_A1==78
419 22:42:57.924172 VrefDac_Margin_A0==22
420 22:42:57.929305 DeviceVref_Margin_A0==36
421 22:42:57.929730 VrefDac_Margin_A1==22
422 22:42:57.930123 DeviceVref_Margin_A1==36
423 22:42:57.930512
424 22:42:57.938230 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:42:57.938655
426 22:42:57.964103 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
427 22:42:57.969710 2D training succeed
428 22:42:57.975367 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:42:57.975665 auto size-- 65535DDR cs0 size: 2048MB
430 22:42:57.981002 DDR cs1 size: 2048MB
431 22:42:57.981305 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:42:57.986541 cs0 DataBus test pass
433 22:42:57.986844 cs1 DataBus test pass
434 22:42:57.987057 cs0 AddrBus test pass
435 22:42:57.992183 cs1 AddrBus test pass
436 22:42:57.992476
437 22:42:57.992690 100bdlr_step_size ps== 478
438 22:42:57.997726 result report
439 22:42:57.998018 boot times 0Enable ddr reg access
440 22:42:58.006106 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:42:58.019331 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 22:42:58.674263 bl2z: ptr: 05129330, size: 00001e40
443 22:42:58.682970 0.0;M3 CHK:0;cm4_sp_mode 0
444 22:42:58.683299 MVN_1=0x00000000
445 22:42:58.683517 MVN_2=0x00000000
446 22:42:58.694431 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 22:42:58.694764 OPS=0x04
448 22:42:58.694986 ring efuse init
449 22:42:58.700090 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 22:42:58.700415 [0.017319 Inits done]
451 22:42:58.700630 secure task start!
452 22:42:58.707921 high task start!
453 22:42:58.708282 low task start!
454 22:42:58.708510 run into bl31
455 22:42:58.716531 NOTICE: BL31: v1.3(release):4fc40b1
456 22:42:58.723379 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 22:42:58.723713 NOTICE: BL31: G12A normal boot!
458 22:42:58.740010 NOTICE: BL31: BL33 decompress pass
459 22:42:58.745604 ERROR: Error initializing runtime service opteed_fast
460 22:42:59.987374 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 22:42:59.987788 bl2_stage_init 0x01
462 22:42:59.988045 bl2_stage_init 0x81
463 22:42:59.993140 hw id: 0x0000 - pwm id 0x01
464 22:42:59.993443 bl2_stage_init 0xc1
465 22:42:59.993655 bl2_stage_init 0x02
466 22:42:59.993865
467 22:42:59.998635 L0:00000000
468 22:42:59.998948 L1:00000703
469 22:42:59.999163 L2:00008067
470 22:42:59.999368 L3:15000000
471 22:42:59.999569 S1:00000000
472 22:43:00.005199 B2:20282000
473 22:43:00.005495 B1:a0f83180
474 22:43:00.005704
475 22:43:00.005909 TE: 71225
476 22:43:00.006110
477 22:43:00.010886 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 22:43:00.011194
479 22:43:00.011412 Board ID = 1
480 22:43:00.016446 Set cpu clk to 24M
481 22:43:00.016749 Set clk81 to 24M
482 22:43:00.016958 Use GP1_pll as DSU clk.
483 22:43:00.022184 DSU clk: 1200 Mhz
484 22:43:00.022495 CPU clk: 1200 MHz
485 22:43:00.022703 Set clk81 to 166.6M
486 22:43:00.027642 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 22:43:00.033304 board id: 1
488 22:43:00.038069 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 22:43:00.049367 fw parse done
490 22:43:00.055087 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 22:43:00.097633 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 22:43:00.108855 PIEI prepare done
493 22:43:00.109174 fastboot data load
494 22:43:00.109398 fastboot data verify
495 22:43:00.114455 verify result: 266
496 22:43:00.120038 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 22:43:00.120343 LPDDR4 probe
498 22:43:00.120555 ddr clk to 1584MHz
499 22:43:01.484678 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 22:43:01.485069 bl2_stage_init 0x01
501 22:43:01.485309 bl2_stage_init 0x81
502 22:43:01.490338 hw id: 0x0000 - pwm id 0x01
503 22:43:01.490631 bl2_stage_init 0xc1
504 22:43:01.495876 bl2_stage_init 0x02
505 22:43:01.496183
506 22:43:01.496400 L0:00000000
507 22:43:01.496782 L1:00000703
508 22:43:01.497628 L2:00008067
509 22:43:01.498486 L3:15000000
510 22:43:01.501468 S1:00000000
511 22:43:01.501760 B2:20282000
512 22:43:01.501967 B1:a0f83180
513 22:43:01.502169
514 22:43:01.502372 TE: 69563
515 22:43:01.502573
516 22:43:01.507054 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 22:43:01.507341
518 22:43:01.512630 Board ID = 1
519 22:43:01.512912 Set cpu clk to 24M
520 22:43:01.513119 Set clk81 to 24M
521 22:43:01.518305 Use GP1_pll as DSU clk.
522 22:43:01.518575 DSU clk: 1200 Mhz
523 22:43:01.518778 CPU clk: 1200 MHz
524 22:43:01.523898 Set clk81 to 166.6M
525 22:43:01.529637 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 22:43:01.530174 board id: 1
527 22:43:01.535845 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 22:43:01.547622 fw parse done
529 22:43:01.552995 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 22:43:01.596680 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 22:43:01.607956 PIEI prepare done
532 22:43:01.608505 fastboot data load
533 22:43:01.608954 fastboot data verify
534 22:43:01.613570 verify result: 266
535 22:43:01.619189 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 22:43:01.619729 LPDDR4 probe
537 22:43:01.620210 ddr clk to 1584MHz
538 22:43:01.627051 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 22:43:01.664684
540 22:43:01.665232 dmc_version 0001
541 22:43:01.671306 Check phy result
542 22:43:01.677861 INFO : End of CA training
543 22:43:01.678383 INFO : End of initialization
544 22:43:01.683617 INFO : Training has run successfully!
545 22:43:01.684180 Check phy result
546 22:43:01.689072 INFO : End of initialization
547 22:43:01.689598 INFO : End of read enable training
548 22:43:01.694673 INFO : End of fine write leveling
549 22:43:01.700307 INFO : End of Write leveling coarse delay
550 22:43:01.700847 INFO : Training has run successfully!
551 22:43:01.701293 Check phy result
552 22:43:01.705847 INFO : End of initialization
553 22:43:01.706376 INFO : End of read dq deskew training
554 22:43:01.711542 INFO : End of MPR read delay center optimization
555 22:43:01.717073 INFO : End of write delay center optimization
556 22:43:01.722729 INFO : End of read delay center optimization
557 22:43:01.723266 INFO : End of max read latency training
558 22:43:01.728332 INFO : Training has run successfully!
559 22:43:01.728857 1D training succeed
560 22:43:01.737077 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 22:43:01.785707 Check phy result
562 22:43:01.786240 INFO : End of initialization
563 22:43:01.812340 INFO : End of 2D read delay Voltage center optimization
564 22:43:01.836738 INFO : End of 2D read delay Voltage center optimization
565 22:43:01.893804 INFO : End of 2D write delay Voltage center optimization
566 22:43:01.947830 INFO : End of 2D write delay Voltage center optimization
567 22:43:01.953392 INFO : Training has run successfully!
568 22:43:01.953919
569 22:43:01.954390 channel==0
570 22:43:01.959002 RxClkDly_Margin_A0==78 ps 8
571 22:43:01.959545 TxDqDly_Margin_A0==98 ps 10
572 22:43:01.964629 RxClkDly_Margin_A1==88 ps 9
573 22:43:01.965156 TxDqDly_Margin_A1==88 ps 9
574 22:43:01.965639 TrainedVREFDQ_A0==74
575 22:43:01.970253 TrainedVREFDQ_A1==75
576 22:43:01.970780 VrefDac_Margin_A0==24
577 22:43:01.971218 DeviceVref_Margin_A0==40
578 22:43:01.975843 VrefDac_Margin_A1==23
579 22:43:01.976392 DeviceVref_Margin_A1==39
580 22:43:01.976838
581 22:43:01.977276
582 22:43:01.977712 channel==1
583 22:43:01.981407 RxClkDly_Margin_A0==78 ps 8
584 22:43:01.981931 TxDqDly_Margin_A0==98 ps 10
585 22:43:01.987071 RxClkDly_Margin_A1==78 ps 8
586 22:43:01.987587 TxDqDly_Margin_A1==88 ps 9
587 22:43:01.992715 TrainedVREFDQ_A0==78
588 22:43:01.993238 TrainedVREFDQ_A1==75
589 22:43:01.993684 VrefDac_Margin_A0==22
590 22:43:01.998223 DeviceVref_Margin_A0==36
591 22:43:01.998744 VrefDac_Margin_A1==22
592 22:43:02.003822 DeviceVref_Margin_A1==39
593 22:43:02.004379
594 22:43:02.004825 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 22:43:02.005266
596 22:43:02.037379 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
597 22:43:02.037949 2D training succeed
598 22:43:02.043034 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 22:43:02.048608 auto size-- 65535DDR cs0 size: 2048MB
600 22:43:02.049137 DDR cs1 size: 2048MB
601 22:43:02.054207 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 22:43:02.054729 cs0 DataBus test pass
603 22:43:02.059784 cs1 DataBus test pass
604 22:43:02.060345 cs0 AddrBus test pass
605 22:43:02.060789 cs1 AddrBus test pass
606 22:43:02.061223
607 22:43:02.065383 100bdlr_step_size ps== 471
608 22:43:02.065921 result report
609 22:43:02.071035 boot times 0Enable ddr reg access
610 22:43:02.075553 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 22:43:02.089643 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 22:43:02.748521 bl2z: ptr: 05129330, size: 00001e40
613 22:43:02.756264 0.0;M3 CHK:0;cm4_sp_mode 0
614 22:43:02.756853 MVN_1=0x00000000
615 22:43:02.757332 MVN_2=0x00000000
616 22:43:02.767687 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 22:43:02.768306 OPS=0x04
618 22:43:02.768796 ring efuse init
619 22:43:02.773413 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 22:43:02.773959 [0.017355 Inits done]
621 22:43:02.774421 secure task start!
622 22:43:02.780583 high task start!
623 22:43:02.781122 low task start!
624 22:43:02.781589 run into bl31
625 22:43:02.789202 NOTICE: BL31: v1.3(release):4fc40b1
626 22:43:02.797031 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 22:43:02.797650 NOTICE: BL31: G12A normal boot!
628 22:43:02.812666 NOTICE: BL31: BL33 decompress pass
629 22:43:02.817867 ERROR: Error initializing runtime service opteed_fast
630 22:43:04.040290 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 22:43:04.040699 bl2_stage_init 0x01
632 22:43:04.040938 bl2_stage_init 0x81
633 22:43:04.045989 hw id: 0x0000 - pwm id 0x01
634 22:43:04.046311 bl2_stage_init 0xc1
635 22:43:04.046543 bl2_stage_init 0x02
636 22:43:04.046768
637 22:43:04.051400 L0:00000000
638 22:43:04.051835 L1:00000703
639 22:43:04.052236 L2:00008067
640 22:43:04.052601 L3:15000000
641 22:43:04.052968 S1:00000000
642 22:43:04.053906 B2:20282000
643 22:43:04.058712 B1:a0f83180
644 22:43:04.059265
645 22:43:04.059736 TE: 73909
646 22:43:04.060244
647 22:43:04.064511 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 22:43:04.065094
649 22:43:04.065566 Board ID = 1
650 22:43:04.069805 Set cpu clk to 24M
651 22:43:04.070380 Set clk81 to 24M
652 22:43:04.070851 Use GP1_pll as DSU clk.
653 22:43:04.075436 DSU clk: 1200 Mhz
654 22:43:04.076031 CPU clk: 1200 MHz
655 22:43:04.076509 Set clk81 to 166.6M
656 22:43:04.081070 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 22:43:04.086753 board id: 1
658 22:43:04.090730 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 22:43:04.102446 fw parse done
660 22:43:04.107522 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 22:43:04.151272 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 22:43:04.162558 PIEI prepare done
663 22:43:04.163152 fastboot data load
664 22:43:04.163634 fastboot data verify
665 22:43:04.168179 verify result: 266
666 22:43:04.173751 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 22:43:04.174332 LPDDR4 probe
668 22:43:04.174803 ddr clk to 1584MHz
669 22:43:04.180832 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 22:43:04.219517
671 22:43:04.220212 dmc_version 0001
672 22:43:04.226306 Check phy result
673 22:43:04.232472 INFO : End of CA training
674 22:43:04.233048 INFO : End of initialization
675 22:43:04.238094 INFO : Training has run successfully!
676 22:43:04.238674 Check phy result
677 22:43:04.243708 INFO : End of initialization
678 22:43:04.244323 INFO : End of read enable training
679 22:43:04.246975 INFO : End of fine write leveling
680 22:43:04.252519 INFO : End of Write leveling coarse delay
681 22:43:04.258135 INFO : Training has run successfully!
682 22:43:04.258706 Check phy result
683 22:43:04.259180 INFO : End of initialization
684 22:43:04.263707 INFO : End of read dq deskew training
685 22:43:04.269361 INFO : End of MPR read delay center optimization
686 22:43:04.269932 INFO : End of write delay center optimization
687 22:43:04.274952 INFO : End of read delay center optimization
688 22:43:04.280528 INFO : End of max read latency training
689 22:43:04.281098 INFO : Training has run successfully!
690 22:43:04.286150 1D training succeed
691 22:43:04.292101 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 22:43:04.339457 Check phy result
693 22:43:04.340135 INFO : End of initialization
694 22:43:04.366860 INFO : End of 2D read delay Voltage center optimization
695 22:43:04.390953 INFO : End of 2D read delay Voltage center optimization
696 22:43:04.447597 INFO : End of 2D write delay Voltage center optimization
697 22:43:04.502640 INFO : End of 2D write delay Voltage center optimization
698 22:43:04.508101 INFO : Training has run successfully!
699 22:43:04.508754
700 22:43:04.509290 channel==0
701 22:43:04.513694 RxClkDly_Margin_A0==78 ps 8
702 22:43:04.514297 TxDqDly_Margin_A0==98 ps 10
703 22:43:04.519300 RxClkDly_Margin_A1==88 ps 9
704 22:43:04.519929 TxDqDly_Margin_A1==88 ps 9
705 22:43:04.520497 TrainedVREFDQ_A0==74
706 22:43:04.525029 TrainedVREFDQ_A1==74
707 22:43:04.525683 VrefDac_Margin_A0==24
708 22:43:04.526204 DeviceVref_Margin_A0==40
709 22:43:04.530459 VrefDac_Margin_A1==23
710 22:43:04.531034 DeviceVref_Margin_A1==40
711 22:43:04.531506
712 22:43:04.531972
713 22:43:04.532623 channel==1
714 22:43:04.536072 RxClkDly_Margin_A0==88 ps 9
715 22:43:04.536640 TxDqDly_Margin_A0==98 ps 10
716 22:43:04.541635 RxClkDly_Margin_A1==78 ps 8
717 22:43:04.542205 TxDqDly_Margin_A1==88 ps 9
718 22:43:04.547248 TrainedVREFDQ_A0==78
719 22:43:04.547813 TrainedVREFDQ_A1==76
720 22:43:04.548349 VrefDac_Margin_A0==23
721 22:43:04.552855 DeviceVref_Margin_A0==36
722 22:43:04.553424 VrefDac_Margin_A1==22
723 22:43:04.558408 DeviceVref_Margin_A1==38
724 22:43:04.558970
725 22:43:04.559435 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 22:43:04.559886
727 22:43:04.591959 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 22:43:04.592636 2D training succeed
729 22:43:04.597644 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 22:43:04.603249 auto size-- 65535DDR cs0 size: 2048MB
731 22:43:04.603825 DDR cs1 size: 2048MB
732 22:43:04.608816 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 22:43:04.609382 cs0 DataBus test pass
734 22:43:04.614419 cs1 DataBus test pass
735 22:43:04.614983 cs0 AddrBus test pass
736 22:43:04.615453 cs1 AddrBus test pass
737 22:43:04.615918
738 22:43:04.620068 100bdlr_step_size ps== 471
739 22:43:04.620647 result report
740 22:43:04.625639 boot times 0Enable ddr reg access
741 22:43:04.630190 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 22:43:04.644304 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 22:43:05.302035 bl2z: ptr: 05129330, size: 00001e40
744 22:43:05.310638 0.0;M3 CHK:0;cm4_sp_mode 0
745 22:43:05.311480 MVN_1=0x00000000
746 22:43:05.311964 MVN_2=0x00000000
747 22:43:05.322048 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 22:43:05.322661 OPS=0x04
749 22:43:05.323119 ring efuse init
750 22:43:05.327725 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 22:43:05.328305 [0.017354 Inits done]
752 22:43:05.328750 secure task start!
753 22:43:05.335243 high task start!
754 22:43:05.335784 low task start!
755 22:43:05.336270 run into bl31
756 22:43:05.343763 NOTICE: BL31: v1.3(release):4fc40b1
757 22:43:05.351569 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 22:43:05.352139 NOTICE: BL31: G12A normal boot!
759 22:43:05.367112 NOTICE: BL31: BL33 decompress pass
760 22:43:05.372839 ERROR: Error initializing runtime service opteed_fast
761 22:43:06.166854
762 22:43:06.167293
763 22:43:06.172729 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 22:43:06.173076
765 22:43:06.175335 Model: Libre Computer AML-S905D3-CC Solitude
766 22:43:06.322621 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 22:43:06.338159 DRAM: 2 GiB (effective 3.8 GiB)
768 22:43:06.438965 Core: 406 devices, 33 uclasses, devicetree: separate
769 22:43:06.444184 WDT: Not starting watchdog@f0d0
770 22:43:06.469908 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 22:43:06.482145 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 22:43:06.486757 ** Bad device specification mmc 0 **
773 22:43:06.497211 Card did not respond to voltage select! : -110
774 22:43:06.504431 ** Bad device specification mmc 0 **
775 22:43:06.504772 Couldn't find partition mmc 0
776 22:43:06.513190 Card did not respond to voltage select! : -110
777 22:43:06.518799 ** Bad device specification mmc 0 **
778 22:43:06.519265 Couldn't find partition mmc 0
779 22:43:06.523720 Error: could not access storage.
780 22:43:06.820068 Net: eth0: ethernet@ff3f0000
781 22:43:06.820728 starting USB...
782 22:43:07.064969 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 22:43:07.065627 Starting the controller
784 22:43:07.070938 USB XHCI 1.10
785 22:43:08.628528 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 22:43:08.635822 scanning usb for storage devices... 0 Storage Device(s) found
788 22:43:08.687167 Hit any key to stop autoboot: 1
789 22:43:08.688243 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 22:43:08.688654 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 22:43:08.688959 Setting prompt string to ['=>']
792 22:43:08.689256 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 22:43:08.701857 0
794 22:43:08.702611 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 22:43:08.803538 => setenv autoload no
797 22:43:08.804343 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 22:43:08.807547 setenv autoload no
800 22:43:08.909275 => setenv initrd_high 0xffffffff
801 22:43:08.910201 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 22:43:08.914346 setenv initrd_high 0xffffffff
804 22:43:09.015820 => setenv fdt_high 0xffffffff
805 22:43:09.016741 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 22:43:09.020056 setenv fdt_high 0xffffffff
808 22:43:09.121711 => dhcp
809 22:43:09.122630 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 22:43:09.125917 dhcp
811 22:43:09.681150 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 22:43:09.681713 Speed: 1000, full duplex
813 22:43:09.682085 BOOTP broadcast 1
814 22:43:09.929127 BOOTP broadcast 2
815 22:43:10.430516 BOOTP broadcast 3
816 22:43:11.431246 BOOTP broadcast 4
817 22:43:13.433136 BOOTP broadcast 5
818 22:43:13.444247 DHCP client bound to address 192.168.6.12 (3762 ms)
820 22:43:13.546028 => setenv serverip 192.168.6.2
821 22:43:13.546869 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 22:43:13.550797 setenv serverip 192.168.6.2
824 22:43:13.652474 => tftpboot 0x01080000 680098/tftp-deploy-izm4x_jl/kernel/uImage
825 22:43:13.653532 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 22:43:13.660310 tftpboot 0x01080000 680098/tftp-deploy-izm4x_jl/kernel/uImage
827 22:43:13.660881 Speed: 1000, full duplex
828 22:43:13.661348 Using ethernet@ff3f0000 device
829 22:43:13.665796 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 22:43:13.671170 Filename '680098/tftp-deploy-izm4x_jl/kernel/uImage'.
831 22:43:13.675020 Load address: 0x1080000
832 22:43:15.993051 Loading: *################################################## 35.7 MiB
833 22:43:15.993486 15.4 MiB/s
834 22:43:15.993707 done
835 22:43:15.997392 Bytes transferred = 37409344 (23ad240 hex)
837 22:43:16.098503 => tftpboot 0x08000000 680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot
838 22:43:16.099193 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:34)
839 22:43:16.105861 tftpboot 0x08000000 680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot
840 22:43:16.106172 Speed: 1000, full duplex
841 22:43:16.106388 Using ethernet@ff3f0000 device
842 22:43:16.111287 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 22:43:16.121026 Filename '680098/tftp-deploy-izm4x_jl/ramdisk/ramdisk.cpio.gz.uboot'.
844 22:43:16.121342 Load address: 0x8000000
845 22:43:18.044951 Loading: *################################################# UDP wrong checksum 00000005 0000b3de
846 22:43:23.048800 T UDP wrong checksum 00000005 0000b3de
847 22:43:33.048510 T T UDP wrong checksum 00000005 0000b3de
848 22:43:53.051890 T T T T UDP wrong checksum 00000005 0000b3de
849 22:44:03.977083 T T UDP wrong checksum 000000ff 0000ab67
850 22:44:03.992665 UDP wrong checksum 000000ff 00003b5a
851 22:44:13.056530 T
852 22:44:13.057195 Retry count exceeded; starting again
854 22:44:13.058690 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
857 22:44:13.060762 end: 2.4 uboot-commands (duration 00:01:23) [common]
859 22:44:13.062285 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
861 22:44:13.063436 end: 2 uboot-action (duration 00:01:23) [common]
863 22:44:13.065172 Cleaning after the job
864 22:44:13.065786 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/ramdisk
865 22:44:13.067147 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/kernel
866 22:44:13.090020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/dtb
867 22:44:13.090888 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/nfsrootfs
868 22:44:13.166615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680098/tftp-deploy-izm4x_jl/modules
869 22:44:13.183441 start: 4.1 power-off (timeout 00:00:30) [common]
870 22:44:13.184116 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
871 22:44:13.216909 >> OK - accepted request
872 22:44:13.219130 Returned 0 in 0 seconds
873 22:44:13.319952 end: 4.1 power-off (duration 00:00:00) [common]
875 22:44:13.320982 start: 4.2 read-feedback (timeout 00:10:00) [common]
876 22:44:13.321635 Listened to connection for namespace 'common' for up to 1s
877 22:44:14.323202 Finalising connection for namespace 'common'
878 22:44:14.323753 Disconnecting from shell: Finalise
879 22:44:14.324096 =>
880 22:44:14.425251 end: 4.2 read-feedback (duration 00:00:01) [common]
881 22:44:14.426121 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/680098
882 22:44:18.876183 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/680098
883 22:44:18.876872 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.