Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:10:42.106046 lava-dispatcher, installed at version: 2024.01
2 22:10:42.106823 start: 0 validate
3 22:10:42.107291 Start time: 2024-08-30 22:10:42.107262+00:00 (UTC)
4 22:10:42.107822 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:10:42.108384 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:10:42.150684 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:10:42.151221 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-207-gfb24560f31f9d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:10:42.181220 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:10:42.181810 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-207-gfb24560f31f9d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:10:42.213955 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:10:42.214445 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:10:42.244407 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:10:42.244894 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-207-gfb24560f31f9d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:10:42.280337 validate duration: 0.17
16 22:10:42.281182 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:10:42.281522 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:10:42.281851 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:10:42.282429 Not decompressing ramdisk as can be used compressed.
20 22:10:42.282891 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 22:10:42.283195 saving as /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/ramdisk/initrd.cpio.gz
22 22:10:42.283470 total size: 5628169 (5 MB)
23 22:10:42.319899 progress 0 % (0 MB)
24 22:10:42.326626 progress 5 % (0 MB)
25 22:10:42.334489 progress 10 % (0 MB)
26 22:10:42.340746 progress 15 % (0 MB)
27 22:10:42.344831 progress 20 % (1 MB)
28 22:10:42.348375 progress 25 % (1 MB)
29 22:10:42.352304 progress 30 % (1 MB)
30 22:10:42.356289 progress 35 % (1 MB)
31 22:10:42.359894 progress 40 % (2 MB)
32 22:10:42.363815 progress 45 % (2 MB)
33 22:10:42.367340 progress 50 % (2 MB)
34 22:10:42.371255 progress 55 % (2 MB)
35 22:10:42.375206 progress 60 % (3 MB)
36 22:10:42.378721 progress 65 % (3 MB)
37 22:10:42.382666 progress 70 % (3 MB)
38 22:10:42.386464 progress 75 % (4 MB)
39 22:10:42.390415 progress 80 % (4 MB)
40 22:10:42.393963 progress 85 % (4 MB)
41 22:10:42.397902 progress 90 % (4 MB)
42 22:10:42.401755 progress 95 % (5 MB)
43 22:10:42.405008 progress 100 % (5 MB)
44 22:10:42.405671 5 MB downloaded in 0.12 s (43.93 MB/s)
45 22:10:42.406239 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:10:42.407183 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:10:42.407503 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:10:42.407800 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:10:42.408304 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/gcc-12/kernel/Image
51 22:10:42.408571 saving as /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/kernel/Image
52 22:10:42.408793 total size: 45308416 (43 MB)
53 22:10:42.409014 No compression specified
54 22:10:42.444074 progress 0 % (0 MB)
55 22:10:42.473417 progress 5 % (2 MB)
56 22:10:42.502972 progress 10 % (4 MB)
57 22:10:42.532643 progress 15 % (6 MB)
58 22:10:42.561266 progress 20 % (8 MB)
59 22:10:42.590330 progress 25 % (10 MB)
60 22:10:42.618810 progress 30 % (12 MB)
61 22:10:42.647800 progress 35 % (15 MB)
62 22:10:42.677143 progress 40 % (17 MB)
63 22:10:42.705607 progress 45 % (19 MB)
64 22:10:42.734457 progress 50 % (21 MB)
65 22:10:42.762838 progress 55 % (23 MB)
66 22:10:42.792109 progress 60 % (25 MB)
67 22:10:42.821137 progress 65 % (28 MB)
68 22:10:42.850534 progress 70 % (30 MB)
69 22:10:42.880840 progress 75 % (32 MB)
70 22:10:42.910122 progress 80 % (34 MB)
71 22:10:42.939601 progress 85 % (36 MB)
72 22:10:42.969366 progress 90 % (38 MB)
73 22:10:42.997997 progress 95 % (41 MB)
74 22:10:43.026493 progress 100 % (43 MB)
75 22:10:43.027169 43 MB downloaded in 0.62 s (69.88 MB/s)
76 22:10:43.027657 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:10:43.028619 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:10:43.028912 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:10:43.029183 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:10:43.029749 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:10:43.030048 saving as /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:10:43.030260 total size: 54667 (0 MB)
84 22:10:43.030472 No compression specified
85 22:10:43.067971 progress 59 % (0 MB)
86 22:10:43.068848 progress 100 % (0 MB)
87 22:10:43.069407 0 MB downloaded in 0.04 s (1.33 MB/s)
88 22:10:43.069897 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:10:43.070724 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:10:43.070989 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:10:43.071254 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:10:43.071768 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 22:10:43.072056 saving as /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/nfsrootfs/full.rootfs.tar
95 22:10:43.072270 total size: 120894716 (115 MB)
96 22:10:43.072481 Using unxz to decompress xz
97 22:10:43.107946 progress 0 % (0 MB)
98 22:10:43.892795 progress 5 % (5 MB)
99 22:10:44.719375 progress 10 % (11 MB)
100 22:10:45.508049 progress 15 % (17 MB)
101 22:10:46.237637 progress 20 % (23 MB)
102 22:10:46.826094 progress 25 % (28 MB)
103 22:10:47.644722 progress 30 % (34 MB)
104 22:10:48.431996 progress 35 % (40 MB)
105 22:10:48.784401 progress 40 % (46 MB)
106 22:10:49.167508 progress 45 % (51 MB)
107 22:10:49.883761 progress 50 % (57 MB)
108 22:10:50.799598 progress 55 % (63 MB)
109 22:10:51.581745 progress 60 % (69 MB)
110 22:10:52.336257 progress 65 % (74 MB)
111 22:10:53.113839 progress 70 % (80 MB)
112 22:10:53.935302 progress 75 % (86 MB)
113 22:10:54.724626 progress 80 % (92 MB)
114 22:10:55.500672 progress 85 % (98 MB)
115 22:10:56.375894 progress 90 % (103 MB)
116 22:10:57.171817 progress 95 % (109 MB)
117 22:10:57.995582 progress 100 % (115 MB)
118 22:10:58.007942 115 MB downloaded in 14.94 s (7.72 MB/s)
119 22:10:58.008974 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:10:58.010771 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:10:58.011347 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:10:58.011922 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:10:58.012825 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/gcc-12/modules.tar.xz
125 22:10:58.013336 saving as /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/modules/modules.tar
126 22:10:58.013800 total size: 11509952 (10 MB)
127 22:10:58.014266 Using unxz to decompress xz
128 22:10:58.057760 progress 0 % (0 MB)
129 22:10:58.126127 progress 5 % (0 MB)
130 22:10:58.202499 progress 10 % (1 MB)
131 22:10:58.284326 progress 15 % (1 MB)
132 22:10:58.363501 progress 20 % (2 MB)
133 22:10:58.438909 progress 25 % (2 MB)
134 22:10:58.519743 progress 30 % (3 MB)
135 22:10:58.593195 progress 35 % (3 MB)
136 22:10:58.670516 progress 40 % (4 MB)
137 22:10:58.744914 progress 45 % (4 MB)
138 22:10:58.817954 progress 50 % (5 MB)
139 22:10:58.893031 progress 55 % (6 MB)
140 22:10:58.971503 progress 60 % (6 MB)
141 22:10:59.056138 progress 65 % (7 MB)
142 22:10:59.132388 progress 70 % (7 MB)
143 22:10:59.226703 progress 75 % (8 MB)
144 22:10:59.319965 progress 80 % (8 MB)
145 22:10:59.395262 progress 85 % (9 MB)
146 22:10:59.469358 progress 90 % (9 MB)
147 22:10:59.540265 progress 95 % (10 MB)
148 22:10:59.615610 progress 100 % (10 MB)
149 22:10:59.626339 10 MB downloaded in 1.61 s (6.81 MB/s)
150 22:10:59.627086 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:10:59.628800 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:10:59.629340 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 22:10:59.629870 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 22:11:16.092833 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/680311/extract-nfsrootfs-xqz2_bef
156 22:11:16.093449 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 22:11:16.093737 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 22:11:16.094449 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz
159 22:11:16.094918 makedir: /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin
160 22:11:16.095259 makedir: /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/tests
161 22:11:16.095578 makedir: /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/results
162 22:11:16.095911 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-add-keys
163 22:11:16.096474 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-add-sources
164 22:11:16.096979 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-background-process-start
165 22:11:16.097535 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-background-process-stop
166 22:11:16.098270 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-common-functions
167 22:11:16.098787 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-echo-ipv4
168 22:11:16.099266 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-install-packages
169 22:11:16.099734 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-installed-packages
170 22:11:16.100243 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-os-build
171 22:11:16.100732 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-probe-channel
172 22:11:16.101210 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-probe-ip
173 22:11:16.101720 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-target-ip
174 22:11:16.102242 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-target-mac
175 22:11:16.102729 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-target-storage
176 22:11:16.103213 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-case
177 22:11:16.103687 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-event
178 22:11:16.104209 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-feedback
179 22:11:16.104706 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-raise
180 22:11:16.105182 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-reference
181 22:11:16.105688 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-runner
182 22:11:16.106197 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-set
183 22:11:16.106672 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-test-shell
184 22:11:16.107154 Updating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-add-keys (debian)
185 22:11:16.107681 Updating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-add-sources (debian)
186 22:11:16.108212 Updating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-install-packages (debian)
187 22:11:16.108721 Updating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-installed-packages (debian)
188 22:11:16.109268 Updating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/bin/lava-os-build (debian)
189 22:11:16.109719 Creating /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/environment
190 22:11:16.110089 LAVA metadata
191 22:11:16.110346 - LAVA_JOB_ID=680311
192 22:11:16.110558 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:11:16.110910 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 22:11:16.111839 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:11:16.112178 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 22:11:16.112388 skipped lava-vland-overlay
197 22:11:16.112628 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:11:16.112880 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 22:11:16.113095 skipped lava-multinode-overlay
200 22:11:16.113335 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:11:16.113583 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 22:11:16.113831 Loading test definitions
203 22:11:16.114104 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 22:11:16.114323 Using /lava-680311 at stage 0
205 22:11:16.115388 uuid=680311_1.6.2.4.1 testdef=None
206 22:11:16.115693 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:11:16.115956 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 22:11:16.117522 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:11:16.118305 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 22:11:16.120203 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:11:16.121024 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 22:11:16.122834 runner path: /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/0/tests/0_timesync-off test_uuid 680311_1.6.2.4.1
215 22:11:16.123377 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:11:16.124211 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 22:11:16.124437 Using /lava-680311 at stage 0
219 22:11:16.124785 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:11:16.125075 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/0/tests/1_kselftest-rtc'
221 22:11:19.642662 Running '/usr/bin/git checkout kernelci.org
222 22:11:20.086632 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 22:11:20.088087 uuid=680311_1.6.2.4.5 testdef=None
224 22:11:20.088436 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 22:11:20.089183 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 22:11:20.092014 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:11:20.092834 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 22:11:20.096562 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:11:20.097415 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 22:11:20.100988 runner path: /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/0/tests/1_kselftest-rtc test_uuid 680311_1.6.2.4.5
234 22:11:20.101274 BOARD='meson-g12b-a311d-libretech-cc'
235 22:11:20.101480 BRANCH='mainline'
236 22:11:20.101679 SKIPFILE='/dev/null'
237 22:11:20.101876 SKIP_INSTALL='True'
238 22:11:20.102071 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc5-207-gfb24560f31f9d/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:11:20.102270 TST_CASENAME=''
240 22:11:20.102467 TST_CMDFILES='rtc'
241 22:11:20.103011 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:11:20.103797 Creating lava-test-runner.conf files
244 22:11:20.104019 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/680311/lava-overlay-wr5qjkwz/lava-680311/0 for stage 0
245 22:11:20.104369 - 0_timesync-off
246 22:11:20.104608 - 1_kselftest-rtc
247 22:11:20.104933 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:11:20.105213 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 22:11:43.416868 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 22:11:43.417324 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 22:11:43.417626 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:11:43.417943 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 22:11:43.418244 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 22:11:44.074378 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:11:44.074871 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 22:11:44.075145 extracting modules file /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/680311/extract-nfsrootfs-xqz2_bef
257 22:11:45.435819 extracting modules file /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/680311/extract-overlay-ramdisk-99u1su8a/ramdisk
258 22:11:46.833962 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:11:46.834449 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 22:11:46.834745 [common] Applying overlay to NFS
261 22:11:46.834963 [common] Applying overlay /var/lib/lava/dispatcher/tmp/680311/compress-overlay-p0y1w_68/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/680311/extract-nfsrootfs-xqz2_bef
262 22:11:49.588199 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:11:49.588682 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 22:11:49.588957 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 22:11:49.589188 Converting downloaded kernel to a uImage
266 22:11:49.589513 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/kernel/Image /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/kernel/uImage
267 22:11:50.074144 output: Image Name:
268 22:11:50.074569 output: Created: Fri Aug 30 22:11:49 2024
269 22:11:50.074782 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:11:50.074986 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
271 22:11:50.075187 output: Load Address: 01080000
272 22:11:50.075386 output: Entry Point: 01080000
273 22:11:50.075580 output:
274 22:11:50.075915 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 22:11:50.076241 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 22:11:50.076535 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 22:11:50.076811 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:11:50.077085 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 22:11:50.077354 Building ramdisk /var/lib/lava/dispatcher/tmp/680311/extract-overlay-ramdisk-99u1su8a/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/680311/extract-overlay-ramdisk-99u1su8a/ramdisk
280 22:11:52.216755 >> 165125 blocks
281 22:11:59.868543 Adding RAMdisk u-boot header.
282 22:11:59.868991 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/680311/extract-overlay-ramdisk-99u1su8a/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/680311/extract-overlay-ramdisk-99u1su8a/ramdisk.cpio.gz.uboot
283 22:12:00.115236 output: Image Name:
284 22:12:00.115662 output: Created: Fri Aug 30 22:11:59 2024
285 22:12:00.115873 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:12:00.116226 output: Data Size: 23249673 Bytes = 22704.76 KiB = 22.17 MiB
287 22:12:00.116633 output: Load Address: 00000000
288 22:12:00.117026 output: Entry Point: 00000000
289 22:12:00.117419 output:
290 22:12:00.118519 rename /var/lib/lava/dispatcher/tmp/680311/extract-overlay-ramdisk-99u1su8a/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot
291 22:12:00.119231 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:12:00.119770 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 22:12:00.120409 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 22:12:00.120858 No LXC device requested
295 22:12:00.121354 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:12:00.121857 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 22:12:00.122347 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:12:00.122754 Checking files for TFTP limit of 4294967296 bytes.
299 22:12:00.125480 end: 1 tftp-deploy (duration 00:01:18) [common]
300 22:12:00.126066 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:12:00.126617 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:12:00.127116 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:12:00.127614 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:12:00.128378 Using kernel file from prepare-kernel: 680311/tftp-deploy-1pa4k0f7/kernel/uImage
305 22:12:00.129342 substitutions:
306 22:12:00.129893 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:12:00.130419 - {DTB_ADDR}: 0x01070000
308 22:12:00.130936 - {DTB}: 680311/tftp-deploy-1pa4k0f7/dtb/meson-g12b-a311d-libretech-cc.dtb
309 22:12:00.131463 - {INITRD}: 680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot
310 22:12:00.132022 - {KERNEL_ADDR}: 0x01080000
311 22:12:00.132556 - {KERNEL}: 680311/tftp-deploy-1pa4k0f7/kernel/uImage
312 22:12:00.133073 - {LAVA_MAC}: None
313 22:12:00.133631 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/680311/extract-nfsrootfs-xqz2_bef
314 22:12:00.134148 - {NFS_SERVER_IP}: 192.168.6.2
315 22:12:00.134655 - {PRESEED_CONFIG}: None
316 22:12:00.135170 - {PRESEED_LOCAL}: None
317 22:12:00.135667 - {RAMDISK_ADDR}: 0x08000000
318 22:12:00.136204 - {RAMDISK}: 680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot
319 22:12:00.136715 - {ROOT_PART}: None
320 22:12:00.137219 - {ROOT}: None
321 22:12:00.137718 - {SERVER_IP}: 192.168.6.2
322 22:12:00.138219 - {TEE_ADDR}: 0x83000000
323 22:12:00.138717 - {TEE}: None
324 22:12:00.139205 Parsed boot commands:
325 22:12:00.139691 - setenv autoload no
326 22:12:00.140215 - setenv initrd_high 0xffffffff
327 22:12:00.140720 - setenv fdt_high 0xffffffff
328 22:12:00.141220 - dhcp
329 22:12:00.141716 - setenv serverip 192.168.6.2
330 22:12:00.142220 - tftpboot 0x01080000 680311/tftp-deploy-1pa4k0f7/kernel/uImage
331 22:12:00.142725 - tftpboot 0x08000000 680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot
332 22:12:00.143231 - tftpboot 0x01070000 680311/tftp-deploy-1pa4k0f7/dtb/meson-g12b-a311d-libretech-cc.dtb
333 22:12:00.143726 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/680311/extract-nfsrootfs-xqz2_bef,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:12:00.144276 - bootm 0x01080000 0x08000000 0x01070000
335 22:12:00.144941 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:12:00.146877 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:12:00.147424 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 22:12:00.164275 Setting prompt string to ['lava-test: # ']
340 22:12:00.166207 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:12:00.167024 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:12:00.167805 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:12:00.168669 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:12:00.170131 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 22:12:00.208595 >> OK - accepted request
346 22:12:00.210691 Returned 0 in 0 seconds
347 22:12:00.311829 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:12:00.313924 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:12:00.314637 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:12:00.315295 Setting prompt string to ['Hit any key to stop autoboot']
352 22:12:00.315873 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:12:00.317932 Trying 192.168.56.21...
354 22:12:00.318561 Connected to conserv1.
355 22:12:00.319081 Escape character is '^]'.
356 22:12:00.319615
357 22:12:00.320191 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 22:12:00.320742
359 22:12:11.635802 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 22:12:11.636656 bl2_stage_init 0x01
361 22:12:11.637214 bl2_stage_init 0x81
362 22:12:11.641447 hw id: 0x0000 - pwm id 0x01
363 22:12:11.642136 bl2_stage_init 0xc1
364 22:12:11.642707 bl2_stage_init 0x02
365 22:12:11.643239
366 22:12:11.648169 L0:00000000
367 22:12:11.648696 L1:20000703
368 22:12:11.649117 L2:00008067
369 22:12:11.649533 L3:14000000
370 22:12:11.652523 B2:00402000
371 22:12:11.653017 B1:e0f83180
372 22:12:11.653431
373 22:12:11.653829 TE: 58124
374 22:12:11.654220
375 22:12:11.658247 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 22:12:11.658723
377 22:12:11.659120 Board ID = 1
378 22:12:11.663766 Set A53 clk to 24M
379 22:12:11.664258 Set A73 clk to 24M
380 22:12:11.664678 Set clk81 to 24M
381 22:12:11.669399 A53 clk: 1200 MHz
382 22:12:11.669863 A73 clk: 1200 MHz
383 22:12:11.670251 CLK81: 166.6M
384 22:12:11.670632 smccc: 00012a92
385 22:12:11.674955 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 22:12:11.680552 board id: 1
387 22:12:11.686416 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:12:11.697097 fw parse done
389 22:12:11.703040 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:12:11.745680 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:12:11.756578 PIEI prepare done
392 22:12:11.757042 fastboot data load
393 22:12:11.757436 fastboot data verify
394 22:12:11.762216 verify result: 266
395 22:12:11.767788 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 22:12:11.768298 LPDDR4 probe
397 22:12:11.768695 ddr clk to 1584MHz
398 22:12:11.775709 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:12:11.812999
400 22:12:11.813522 dmc_version 0001
401 22:12:11.819660 Check phy result
402 22:12:11.825514 INFO : End of CA training
403 22:12:11.826001 INFO : End of initialization
404 22:12:11.831115 INFO : Training has run successfully!
405 22:12:11.831586 Check phy result
406 22:12:11.836790 INFO : End of initialization
407 22:12:11.837278 INFO : End of read enable training
408 22:12:11.842350 INFO : End of fine write leveling
409 22:12:11.847949 INFO : End of Write leveling coarse delay
410 22:12:11.848446 INFO : Training has run successfully!
411 22:12:11.848849 Check phy result
412 22:12:11.853520 INFO : End of initialization
413 22:12:11.854004 INFO : End of read dq deskew training
414 22:12:11.859127 INFO : End of MPR read delay center optimization
415 22:12:11.864721 INFO : End of write delay center optimization
416 22:12:11.870324 INFO : End of read delay center optimization
417 22:12:11.870815 INFO : End of max read latency training
418 22:12:11.875917 INFO : Training has run successfully!
419 22:12:11.876434 1D training succeed
420 22:12:11.885113 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:12:11.932701 Check phy result
422 22:12:11.933221 INFO : End of initialization
423 22:12:11.955191 INFO : End of 2D read delay Voltage center optimization
424 22:12:11.975380 INFO : End of 2D read delay Voltage center optimization
425 22:12:12.027320 INFO : End of 2D write delay Voltage center optimization
426 22:12:12.076609 INFO : End of 2D write delay Voltage center optimization
427 22:12:12.082078 INFO : Training has run successfully!
428 22:12:12.082557
429 22:12:12.082962 channel==0
430 22:12:12.087687 RxClkDly_Margin_A0==88 ps 9
431 22:12:12.088207 TxDqDly_Margin_A0==98 ps 10
432 22:12:12.091107 RxClkDly_Margin_A1==88 ps 9
433 22:12:12.091562 TxDqDly_Margin_A1==88 ps 9
434 22:12:12.096681 TrainedVREFDQ_A0==74
435 22:12:12.097158 TrainedVREFDQ_A1==74
436 22:12:12.097564 VrefDac_Margin_A0==25
437 22:12:12.102313 DeviceVref_Margin_A0==40
438 22:12:12.102782 VrefDac_Margin_A1==25
439 22:12:12.107916 DeviceVref_Margin_A1==40
440 22:12:12.108417
441 22:12:12.108821
442 22:12:12.109214 channel==1
443 22:12:12.109602 RxClkDly_Margin_A0==98 ps 10
444 22:12:12.113521 TxDqDly_Margin_A0==88 ps 9
445 22:12:12.113996 RxClkDly_Margin_A1==88 ps 9
446 22:12:12.119102 TxDqDly_Margin_A1==98 ps 10
447 22:12:12.119577 TrainedVREFDQ_A0==77
448 22:12:12.119974 TrainedVREFDQ_A1==77
449 22:12:12.126369 VrefDac_Margin_A0==22
450 22:12:12.126840 DeviceVref_Margin_A0==37
451 22:12:12.130408 VrefDac_Margin_A1==24
452 22:12:12.130879 DeviceVref_Margin_A1==37
453 22:12:12.131274
454 22:12:12.135910 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:12:12.136401
456 22:12:12.163311 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 22:12:12.168852 2D training succeed
458 22:12:12.174499 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:12:12.174987 auto size-- 65535DDR cs0 size: 2048MB
460 22:12:12.179943 DDR cs1 size: 2048MB
461 22:12:12.180446 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:12:12.185590 cs0 DataBus test pass
463 22:12:12.186070 cs1 DataBus test pass
464 22:12:12.186475 cs0 AddrBus test pass
465 22:12:12.191181 cs1 AddrBus test pass
466 22:12:12.191666
467 22:12:12.192106 100bdlr_step_size ps== 420
468 22:12:12.196795 result report
469 22:12:12.197303 boot times 0Enable ddr reg access
470 22:12:12.204824 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:12:12.218280 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 22:12:12.790193 0.0;M3 CHK:0;cm4_sp_mode 0
473 22:12:12.790635 MVN_1=0x00000000
474 22:12:12.795689 MVN_2=0x00000000
475 22:12:12.801553 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 22:12:12.802073 OPS=0x10
477 22:12:12.802401 ring efuse init
478 22:12:12.802614 chipver efuse init
479 22:12:12.807037 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 22:12:12.812701 [0.018961 Inits done]
481 22:12:12.813006 secure task start!
482 22:12:12.813225 high task start!
483 22:12:12.817211 low task start!
484 22:12:12.817490 run into bl31
485 22:12:12.824046 NOTICE: BL31: v1.3(release):4fc40b1
486 22:12:12.831909 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 22:12:12.832438 NOTICE: BL31: G12A normal boot!
488 22:12:12.857221 NOTICE: BL31: BL33 decompress pass
489 22:12:12.862913 ERROR: Error initializing runtime service opteed_fast
490 22:12:14.095966
491 22:12:14.096914
492 22:12:14.104281 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 22:12:14.104921
494 22:12:14.105136 Model: Libre Computer AML-A311D-CC Alta
495 22:12:14.312674 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 22:12:14.335932 DRAM: 2 GiB (effective 3.8 GiB)
497 22:12:14.479014 Core: 408 devices, 31 uclasses, devicetree: separate
498 22:12:14.484764 WDT: Not starting watchdog@f0d0
499 22:12:14.517135 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 22:12:14.529469 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 22:12:14.534503 ** Bad device specification mmc 0 **
502 22:12:14.544807 Card did not respond to voltage select! : -110
503 22:12:14.552448 ** Bad device specification mmc 0 **
504 22:12:14.552945 Couldn't find partition mmc 0
505 22:12:14.560858 Card did not respond to voltage select! : -110
506 22:12:14.566353 ** Bad device specification mmc 0 **
507 22:12:14.566874 Couldn't find partition mmc 0
508 22:12:14.571374 Error: could not access storage.
509 22:12:15.836207 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 22:12:15.836822 bl2_stage_init 0x01
511 22:12:15.837250 bl2_stage_init 0x81
512 22:12:15.841775 hw id: 0x0000 - pwm id 0x01
513 22:12:15.842249 bl2_stage_init 0xc1
514 22:12:15.842662 bl2_stage_init 0x02
515 22:12:15.843066
516 22:12:15.847362 L0:00000000
517 22:12:15.847825 L1:20000703
518 22:12:15.848282 L2:00008067
519 22:12:15.848686 L3:14000000
520 22:12:15.850360 B2:00402000
521 22:12:15.850823 B1:e0f83180
522 22:12:15.851228
523 22:12:15.851629 TE: 58159
524 22:12:15.852062
525 22:12:15.861462 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 22:12:15.861951
527 22:12:15.862360 Board ID = 1
528 22:12:15.862755 Set A53 clk to 24M
529 22:12:15.863182 Set A73 clk to 24M
530 22:12:15.867137 Set clk81 to 24M
531 22:12:15.867617 A53 clk: 1200 MHz
532 22:12:15.868053 A73 clk: 1200 MHz
533 22:12:15.872720 CLK81: 166.6M
534 22:12:15.873184 smccc: 00012ab5
535 22:12:15.878307 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 22:12:15.878779 board id: 1
537 22:12:15.886891 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 22:12:15.897619 fw parse done
539 22:12:15.903519 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:12:15.946118 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 22:12:15.957087 PIEI prepare done
542 22:12:15.957744 fastboot data load
543 22:12:15.958296 fastboot data verify
544 22:12:15.962774 verify result: 266
545 22:12:15.968402 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 22:12:15.969041 LPDDR4 probe
547 22:12:15.969586 ddr clk to 1584MHz
548 22:12:15.976352 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 22:12:16.013574
550 22:12:16.014239 dmc_version 0001
551 22:12:16.020311 Check phy result
552 22:12:16.026162 INFO : End of CA training
553 22:12:16.026707 INFO : End of initialization
554 22:12:16.031720 INFO : Training has run successfully!
555 22:12:16.032280 Check phy result
556 22:12:16.037308 INFO : End of initialization
557 22:12:16.037805 INFO : End of read enable training
558 22:12:16.042875 INFO : End of fine write leveling
559 22:12:16.048454 INFO : End of Write leveling coarse delay
560 22:12:16.048929 INFO : Training has run successfully!
561 22:12:16.049335 Check phy result
562 22:12:16.054049 INFO : End of initialization
563 22:12:16.054525 INFO : End of read dq deskew training
564 22:12:16.059659 INFO : End of MPR read delay center optimization
565 22:12:16.065325 INFO : End of write delay center optimization
566 22:12:16.070868 INFO : End of read delay center optimization
567 22:12:16.071347 INFO : End of max read latency training
568 22:12:16.076454 INFO : Training has run successfully!
569 22:12:16.076924 1D training succeed
570 22:12:16.085505 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 22:12:16.133219 Check phy result
572 22:12:16.133881 INFO : End of initialization
573 22:12:16.155647 INFO : End of 2D read delay Voltage center optimization
574 22:12:16.175849 INFO : End of 2D read delay Voltage center optimization
575 22:12:16.227715 INFO : End of 2D write delay Voltage center optimization
576 22:12:16.276995 INFO : End of 2D write delay Voltage center optimization
577 22:12:16.282502 INFO : Training has run successfully!
578 22:12:16.282983
579 22:12:16.283399 channel==0
580 22:12:16.288092 RxClkDly_Margin_A0==88 ps 9
581 22:12:16.288568 TxDqDly_Margin_A0==98 ps 10
582 22:12:16.293713 RxClkDly_Margin_A1==88 ps 9
583 22:12:16.294185 TxDqDly_Margin_A1==88 ps 9
584 22:12:16.294597 TrainedVREFDQ_A0==74
585 22:12:16.299339 TrainedVREFDQ_A1==74
586 22:12:16.299815 VrefDac_Margin_A0==24
587 22:12:16.300260 DeviceVref_Margin_A0==40
588 22:12:16.304886 VrefDac_Margin_A1==25
589 22:12:16.305357 DeviceVref_Margin_A1==40
590 22:12:16.305763
591 22:12:16.306162
592 22:12:16.306559 channel==1
593 22:12:16.310479 RxClkDly_Margin_A0==98 ps 10
594 22:12:16.310952 TxDqDly_Margin_A0==88 ps 9
595 22:12:16.316100 RxClkDly_Margin_A1==98 ps 10
596 22:12:16.316576 TxDqDly_Margin_A1==88 ps 9
597 22:12:16.321705 TrainedVREFDQ_A0==77
598 22:12:16.322180 TrainedVREFDQ_A1==77
599 22:12:16.322589 VrefDac_Margin_A0==22
600 22:12:16.327332 DeviceVref_Margin_A0==37
601 22:12:16.327801 VrefDac_Margin_A1==22
602 22:12:16.332892 DeviceVref_Margin_A1==37
603 22:12:16.333360
604 22:12:16.333768 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 22:12:16.334170
606 22:12:16.366546 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 22:12:16.367121 2D training succeed
608 22:12:16.372107 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 22:12:16.377693 auto size-- 65535DDR cs0 size: 2048MB
610 22:12:16.378168 DDR cs1 size: 2048MB
611 22:12:16.383373 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 22:12:16.383844 cs0 DataBus test pass
613 22:12:16.388883 cs1 DataBus test pass
614 22:12:16.389359 cs0 AddrBus test pass
615 22:12:16.389764 cs1 AddrBus test pass
616 22:12:16.390159
617 22:12:16.394472 100bdlr_step_size ps== 420
618 22:12:16.394958 result report
619 22:12:16.400092 boot times 0Enable ddr reg access
620 22:12:16.405417 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 22:12:16.418769 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 22:12:16.991488 0.0;M3 CHK:0;cm4_sp_mode 0
623 22:12:16.992260 MVN_1=0x00000000
624 22:12:16.996688 MVN_2=0x00000000
625 22:12:17.002318 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 22:12:17.003002 OPS=0x10
627 22:12:17.003464 ring efuse init
628 22:12:17.003906 chipver efuse init
629 22:12:17.007668 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 22:12:17.013155 [0.018961 Inits done]
631 22:12:17.013654 secure task start!
632 22:12:17.014087 high task start!
633 22:12:17.018902 low task start!
634 22:12:17.019547 run into bl31
635 22:12:17.024635 NOTICE: BL31: v1.3(release):4fc40b1
636 22:12:17.032293 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 22:12:17.032812 NOTICE: BL31: G12A normal boot!
638 22:12:17.057695 NOTICE: BL31: BL33 decompress pass
639 22:12:17.063393 ERROR: Error initializing runtime service opteed_fast
640 22:12:18.296501
641 22:12:18.297181
642 22:12:18.304788 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 22:12:18.305304
644 22:12:18.305763 Model: Libre Computer AML-A311D-CC Alta
645 22:12:18.513216 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 22:12:18.536594 DRAM: 2 GiB (effective 3.8 GiB)
647 22:12:18.679644 Core: 408 devices, 31 uclasses, devicetree: separate
648 22:12:18.685471 WDT: Not starting watchdog@f0d0
649 22:12:18.717785 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 22:12:18.730083 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 22:12:18.735195 ** Bad device specification mmc 0 **
652 22:12:18.745443 Card did not respond to voltage select! : -110
653 22:12:18.753140 ** Bad device specification mmc 0 **
654 22:12:18.753630 Couldn't find partition mmc 0
655 22:12:18.761542 Card did not respond to voltage select! : -110
656 22:12:18.766964 ** Bad device specification mmc 0 **
657 22:12:18.767455 Couldn't find partition mmc 0
658 22:12:18.772021 Error: could not access storage.
659 22:12:19.114650 Net: eth0: ethernet@ff3f0000
660 22:12:19.115293 starting USB...
661 22:12:19.366629 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 22:12:19.367294 Starting the controller
663 22:12:19.373349 USB XHCI 1.10
664 22:12:21.086682 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 22:12:21.087330 bl2_stage_init 0x01
666 22:12:21.087761 bl2_stage_init 0x81
667 22:12:21.092308 hw id: 0x0000 - pwm id 0x01
668 22:12:21.092786 bl2_stage_init 0xc1
669 22:12:21.093198 bl2_stage_init 0x02
670 22:12:21.093600
671 22:12:21.097849 L0:00000000
672 22:12:21.098325 L1:20000703
673 22:12:21.098733 L2:00008067
674 22:12:21.099132 L3:14000000
675 22:12:21.103390 B2:00402000
676 22:12:21.103855 B1:e0f83180
677 22:12:21.104299
678 22:12:21.104706 TE: 58159
679 22:12:21.105110
680 22:12:21.109241 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 22:12:21.109714
682 22:12:21.110123 Board ID = 1
683 22:12:21.114626 Set A53 clk to 24M
684 22:12:21.115094 Set A73 clk to 24M
685 22:12:21.115501 Set clk81 to 24M
686 22:12:21.120207 A53 clk: 1200 MHz
687 22:12:21.120668 A73 clk: 1200 MHz
688 22:12:21.121070 CLK81: 166.6M
689 22:12:21.121470 smccc: 00012ab5
690 22:12:21.125738 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 22:12:21.131323 board id: 1
692 22:12:21.137257 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 22:12:21.147929 fw parse done
694 22:12:21.153911 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:12:21.196473 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 22:12:21.207378 PIEI prepare done
697 22:12:21.207861 fastboot data load
698 22:12:21.208329 fastboot data verify
699 22:12:21.213059 verify result: 266
700 22:12:21.218600 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 22:12:21.219069 LPDDR4 probe
702 22:12:21.219476 ddr clk to 1584MHz
703 22:12:21.226586 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 22:12:21.263873
705 22:12:21.264431 dmc_version 0001
706 22:12:21.270527 Check phy result
707 22:12:21.276391 INFO : End of CA training
708 22:12:21.276852 INFO : End of initialization
709 22:12:21.282030 INFO : Training has run successfully!
710 22:12:21.282492 Check phy result
711 22:12:21.287574 INFO : End of initialization
712 22:12:21.288063 INFO : End of read enable training
713 22:12:21.293198 INFO : End of fine write leveling
714 22:12:21.298777 INFO : End of Write leveling coarse delay
715 22:12:21.299257 INFO : Training has run successfully!
716 22:12:21.299660 Check phy result
717 22:12:21.304397 INFO : End of initialization
718 22:12:21.304876 INFO : End of read dq deskew training
719 22:12:21.310037 INFO : End of MPR read delay center optimization
720 22:12:21.315599 INFO : End of write delay center optimization
721 22:12:21.321192 INFO : End of read delay center optimization
722 22:12:21.321663 INFO : End of max read latency training
723 22:12:21.326770 INFO : Training has run successfully!
724 22:12:21.327238 1D training succeed
725 22:12:21.335922 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 22:12:21.383591 Check phy result
727 22:12:21.384144 INFO : End of initialization
728 22:12:21.405349 INFO : End of 2D read delay Voltage center optimization
729 22:12:21.425600 INFO : End of 2D read delay Voltage center optimization
730 22:12:21.477710 INFO : End of 2D write delay Voltage center optimization
731 22:12:21.527008 INFO : End of 2D write delay Voltage center optimization
732 22:12:21.532648 INFO : Training has run successfully!
733 22:12:21.533115
734 22:12:21.533526 channel==0
735 22:12:21.538170 RxClkDly_Margin_A0==88 ps 9
736 22:12:21.538635 TxDqDly_Margin_A0==98 ps 10
737 22:12:21.543862 RxClkDly_Margin_A1==88 ps 9
738 22:12:21.544364 TxDqDly_Margin_A1==88 ps 9
739 22:12:21.544776 TrainedVREFDQ_A0==74
740 22:12:21.549465 TrainedVREFDQ_A1==74
741 22:12:21.549940 VrefDac_Margin_A0==25
742 22:12:21.550346 DeviceVref_Margin_A0==40
743 22:12:21.554967 VrefDac_Margin_A1==25
744 22:12:21.555433 DeviceVref_Margin_A1==40
745 22:12:21.555843
746 22:12:21.556281
747 22:12:21.556684 channel==1
748 22:12:21.560663 RxClkDly_Margin_A0==98 ps 10
749 22:12:21.561129 TxDqDly_Margin_A0==88 ps 9
750 22:12:21.566301 RxClkDly_Margin_A1==88 ps 9
751 22:12:21.566765 TxDqDly_Margin_A1==88 ps 9
752 22:12:21.571854 TrainedVREFDQ_A0==76
753 22:12:21.572349 TrainedVREFDQ_A1==77
754 22:12:21.572755 VrefDac_Margin_A0==22
755 22:12:21.577439 DeviceVref_Margin_A0==38
756 22:12:21.577899 VrefDac_Margin_A1==24
757 22:12:21.582998 DeviceVref_Margin_A1==37
758 22:12:21.583464
759 22:12:21.583874 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 22:12:21.584309
761 22:12:21.616531 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 22:12:21.617070 2D training succeed
763 22:12:21.622346 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 22:12:21.627718 auto size-- 65535DDR cs0 size: 2048MB
765 22:12:21.628211 DDR cs1 size: 2048MB
766 22:12:21.633317 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 22:12:21.633786 cs0 DataBus test pass
768 22:12:21.638925 cs1 DataBus test pass
769 22:12:21.639382 cs0 AddrBus test pass
770 22:12:21.639789 cs1 AddrBus test pass
771 22:12:21.640223
772 22:12:21.644518 100bdlr_step_size ps== 420
773 22:12:21.644991 result report
774 22:12:21.650106 boot times 0Enable ddr reg access
775 22:12:21.655359 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 22:12:21.668764 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 22:12:22.242480 0.0;M3 CHK:0;cm4_sp_mode 0
778 22:12:22.243366 MVN_1=0x00000000
779 22:12:22.247877 MVN_2=0x00000000
780 22:12:22.253591 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 22:12:22.253953 OPS=0x10
782 22:12:22.254210 ring efuse init
783 22:12:22.254479 chipver efuse init
784 22:12:22.259141 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 22:12:22.264763 [0.018961 Inits done]
786 22:12:22.265074 secure task start!
787 22:12:22.265323 high task start!
788 22:12:22.269331 low task start!
789 22:12:22.269634 run into bl31
790 22:12:22.275893 NOTICE: BL31: v1.3(release):4fc40b1
791 22:12:22.283708 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 22:12:22.284002 NOTICE: BL31: G12A normal boot!
793 22:12:22.309076 NOTICE: BL31: BL33 decompress pass
794 22:12:22.314780 ERROR: Error initializing runtime service opteed_fast
795 22:12:23.547796
796 22:12:23.548573
797 22:12:23.556089 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 22:12:23.556613
799 22:12:23.557079 Model: Libre Computer AML-A311D-CC Alta
800 22:12:23.764461 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 22:12:23.787856 DRAM: 2 GiB (effective 3.8 GiB)
802 22:12:23.931692 Core: 408 devices, 31 uclasses, devicetree: separate
803 22:12:23.936710 WDT: Not starting watchdog@f0d0
804 22:12:23.969001 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 22:12:23.981396 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 22:12:23.986404 ** Bad device specification mmc 0 **
807 22:12:23.996766 Card did not respond to voltage select! : -110
808 22:12:24.004417 ** Bad device specification mmc 0 **
809 22:12:24.004909 Couldn't find partition mmc 0
810 22:12:24.012754 Card did not respond to voltage select! : -110
811 22:12:24.018294 ** Bad device specification mmc 0 **
812 22:12:24.018793 Couldn't find partition mmc 0
813 22:12:24.023372 Error: could not access storage.
814 22:12:24.366916 Net: eth0: ethernet@ff3f0000
815 22:12:24.367567 starting USB...
816 22:12:24.618604 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 22:12:24.619241 Starting the controller
818 22:12:24.625569 USB XHCI 1.10
819 22:12:26.788101 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 22:12:26.788770 bl2_stage_init 0x01
821 22:12:26.789245 bl2_stage_init 0x81
822 22:12:26.793708 hw id: 0x0000 - pwm id 0x01
823 22:12:26.794209 bl2_stage_init 0xc1
824 22:12:26.794668 bl2_stage_init 0x02
825 22:12:26.795115
826 22:12:26.799236 L0:00000000
827 22:12:26.799715 L1:20000703
828 22:12:26.800205 L2:00008067
829 22:12:26.800650 L3:14000000
830 22:12:26.804762 B2:00402000
831 22:12:26.805245 B1:e0f83180
832 22:12:26.805692
833 22:12:26.806132 TE: 58124
834 22:12:26.806576
835 22:12:26.810363 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 22:12:26.810849
837 22:12:26.811296 Board ID = 1
838 22:12:26.816053 Set A53 clk to 24M
839 22:12:26.816541 Set A73 clk to 24M
840 22:12:26.816986 Set clk81 to 24M
841 22:12:26.821754 A53 clk: 1200 MHz
842 22:12:26.822245 A73 clk: 1200 MHz
843 22:12:26.822694 CLK81: 166.6M
844 22:12:26.823134 smccc: 00012a91
845 22:12:26.827220 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 22:12:26.832773 board id: 1
847 22:12:26.838613 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 22:12:26.849256 fw parse done
849 22:12:26.855225 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:12:26.897853 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 22:12:26.908709 PIEI prepare done
852 22:12:26.909192 fastboot data load
853 22:12:26.909648 fastboot data verify
854 22:12:26.914469 verify result: 266
855 22:12:26.920021 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 22:12:26.920506 LPDDR4 probe
857 22:12:26.920955 ddr clk to 1584MHz
858 22:12:26.928040 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 22:12:26.965231
860 22:12:26.965719 dmc_version 0001
861 22:12:26.971942 Check phy result
862 22:12:26.977753 INFO : End of CA training
863 22:12:26.978229 INFO : End of initialization
864 22:12:26.983402 INFO : Training has run successfully!
865 22:12:26.983874 Check phy result
866 22:12:26.988943 INFO : End of initialization
867 22:12:26.989422 INFO : End of read enable training
868 22:12:26.994538 INFO : End of fine write leveling
869 22:12:27.000167 INFO : End of Write leveling coarse delay
870 22:12:27.000650 INFO : Training has run successfully!
871 22:12:27.001104 Check phy result
872 22:12:27.005740 INFO : End of initialization
873 22:12:27.006217 INFO : End of read dq deskew training
874 22:12:27.011363 INFO : End of MPR read delay center optimization
875 22:12:27.016989 INFO : End of write delay center optimization
876 22:12:27.022551 INFO : End of read delay center optimization
877 22:12:27.023029 INFO : End of max read latency training
878 22:12:27.028164 INFO : Training has run successfully!
879 22:12:27.028644 1D training succeed
880 22:12:27.037309 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 22:12:27.084877 Check phy result
882 22:12:27.085364 INFO : End of initialization
883 22:12:27.107381 INFO : End of 2D read delay Voltage center optimization
884 22:12:27.127466 INFO : End of 2D read delay Voltage center optimization
885 22:12:27.179490 INFO : End of 2D write delay Voltage center optimization
886 22:12:27.228662 INFO : End of 2D write delay Voltage center optimization
887 22:12:27.234276 INFO : Training has run successfully!
888 22:12:27.234755
889 22:12:27.235211 channel==0
890 22:12:27.239857 RxClkDly_Margin_A0==88 ps 9
891 22:12:27.240365 TxDqDly_Margin_A0==98 ps 10
892 22:12:27.243189 RxClkDly_Margin_A1==88 ps 9
893 22:12:27.243661 TxDqDly_Margin_A1==98 ps 10
894 22:12:27.248630 TrainedVREFDQ_A0==74
895 22:12:27.249108 TrainedVREFDQ_A1==76
896 22:12:27.254298 VrefDac_Margin_A0==24
897 22:12:27.254756 DeviceVref_Margin_A0==40
898 22:12:27.255179 VrefDac_Margin_A1==25
899 22:12:27.259945 DeviceVref_Margin_A1==38
900 22:12:27.260449
901 22:12:27.260882
902 22:12:27.261305 channel==1
903 22:12:27.261724 RxClkDly_Margin_A0==98 ps 10
904 22:12:27.265554 TxDqDly_Margin_A0==88 ps 9
905 22:12:27.266018 RxClkDly_Margin_A1==98 ps 10
906 22:12:27.271120 TxDqDly_Margin_A1==98 ps 10
907 22:12:27.271596 TrainedVREFDQ_A0==77
908 22:12:27.272058 TrainedVREFDQ_A1==78
909 22:12:27.276607 VrefDac_Margin_A0==22
910 22:12:27.277064 DeviceVref_Margin_A0==37
911 22:12:27.282209 VrefDac_Margin_A1==22
912 22:12:27.282660 DeviceVref_Margin_A1==36
913 22:12:27.283085
914 22:12:27.287838 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 22:12:27.288334
916 22:12:27.315859 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 22:12:27.321540 2D training succeed
918 22:12:27.327114 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 22:12:27.327578 auto size-- 65535DDR cs0 size: 2048MB
920 22:12:27.332725 DDR cs1 size: 2048MB
921 22:12:27.333183 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 22:12:27.338327 cs0 DataBus test pass
923 22:12:27.338822 cs1 DataBus test pass
924 22:12:27.339240 cs0 AddrBus test pass
925 22:12:27.343934 cs1 AddrBus test pass
926 22:12:27.344419
927 22:12:27.344817 100bdlr_step_size ps== 420
928 22:12:27.345218 result report
929 22:12:27.349530 boot times 0Enable ddr reg access
930 22:12:27.357349 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 22:12:27.370776 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 22:12:27.942653 0.0;M3 CHK:0;cm4_sp_mode 0
933 22:12:27.943188 MVN_1=0x00000000
934 22:12:27.948188 MVN_2=0x00000000
935 22:12:27.953940 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 22:12:27.954408 OPS=0x10
937 22:12:27.954827 ring efuse init
938 22:12:27.955228 chipver efuse init
939 22:12:27.959549 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 22:12:27.965132 [0.018961 Inits done]
941 22:12:27.965607 secure task start!
942 22:12:27.966018 high task start!
943 22:12:27.969737 low task start!
944 22:12:27.970202 run into bl31
945 22:12:27.976381 NOTICE: BL31: v1.3(release):4fc40b1
946 22:12:27.984177 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 22:12:27.984657 NOTICE: BL31: G12A normal boot!
948 22:12:28.009524 NOTICE: BL31: BL33 decompress pass
949 22:12:28.015109 ERROR: Error initializing runtime service opteed_fast
950 22:12:29.248043
951 22:12:29.248450
952 22:12:29.256431 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 22:12:29.256919
954 22:12:29.257355 Model: Libre Computer AML-A311D-CC Alta
955 22:12:29.464867 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 22:12:29.488218 DRAM: 2 GiB (effective 3.8 GiB)
957 22:12:29.631244 Core: 408 devices, 31 uclasses, devicetree: separate
958 22:12:29.637145 WDT: Not starting watchdog@f0d0
959 22:12:29.669357 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 22:12:29.681808 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 22:12:29.686801 ** Bad device specification mmc 0 **
962 22:12:29.697152 Card did not respond to voltage select! : -110
963 22:12:29.704789 ** Bad device specification mmc 0 **
964 22:12:29.705249 Couldn't find partition mmc 0
965 22:12:29.713140 Card did not respond to voltage select! : -110
966 22:12:29.718652 ** Bad device specification mmc 0 **
967 22:12:29.719115 Couldn't find partition mmc 0
968 22:12:29.723739 Error: could not access storage.
969 22:12:30.067212 Net: eth0: ethernet@ff3f0000
970 22:12:30.067767 starting USB...
971 22:12:30.319039 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 22:12:30.319537 Starting the controller
973 22:12:30.325964 USB XHCI 1.10
974 22:12:32.056366 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 22:12:32.056944 bl2_stage_init 0x01
976 22:12:32.057384 bl2_stage_init 0x81
977 22:12:32.062001 hw id: 0x0000 - pwm id 0x01
978 22:12:32.062504 bl2_stage_init 0xc1
979 22:12:32.062923 bl2_stage_init 0x02
980 22:12:32.063331
981 22:12:32.067571 L0:00000000
982 22:12:32.068105 L1:20000703
983 22:12:32.068531 L2:00008067
984 22:12:32.068940 L3:14000000
985 22:12:32.073170 B2:00402000
986 22:12:32.073672 B1:e0f83180
987 22:12:32.074090
988 22:12:32.074497 TE: 58159
989 22:12:32.074899
990 22:12:32.078769 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 22:12:32.079269
992 22:12:32.079687 Board ID = 1
993 22:12:32.084382 Set A53 clk to 24M
994 22:12:32.084876 Set A73 clk to 24M
995 22:12:32.085290 Set clk81 to 24M
996 22:12:32.089976 A53 clk: 1200 MHz
997 22:12:32.090473 A73 clk: 1200 MHz
998 22:12:32.090887 CLK81: 166.6M
999 22:12:32.091289 smccc: 00012ab5
1000 22:12:32.095577 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 22:12:32.101175 board id: 1
1002 22:12:32.107037 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 22:12:32.117718 fw parse done
1004 22:12:32.123678 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 22:12:32.166250 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 22:12:32.177176 PIEI prepare done
1007 22:12:32.177665 fastboot data load
1008 22:12:32.178078 fastboot data verify
1009 22:12:32.182811 verify result: 266
1010 22:12:32.188429 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 22:12:32.188928 LPDDR4 probe
1012 22:12:32.189343 ddr clk to 1584MHz
1013 22:12:32.195497 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 22:12:32.232722
1015 22:12:32.233227 dmc_version 0001
1016 22:12:32.239424 Check phy result
1017 22:12:32.246178 INFO : End of CA training
1018 22:12:32.246677 INFO : End of initialization
1019 22:12:32.251833 INFO : Training has run successfully!
1020 22:12:32.252376 Check phy result
1021 22:12:32.257384 INFO : End of initialization
1022 22:12:32.257894 INFO : End of read enable training
1023 22:12:32.260676 INFO : End of fine write leveling
1024 22:12:32.266189 INFO : End of Write leveling coarse delay
1025 22:12:32.271808 INFO : Training has run successfully!
1026 22:12:32.272324 Check phy result
1027 22:12:32.272720 INFO : End of initialization
1028 22:12:32.277404 INFO : End of read dq deskew training
1029 22:12:32.280752 INFO : End of MPR read delay center optimization
1030 22:12:32.286347 INFO : End of write delay center optimization
1031 22:12:32.292016 INFO : End of read delay center optimization
1032 22:12:32.292668 INFO : End of max read latency training
1033 22:12:32.297533 INFO : Training has run successfully!
1034 22:12:32.298021 1D training succeed
1035 22:12:32.304794 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 22:12:32.353388 Check phy result
1037 22:12:32.353892 INFO : End of initialization
1038 22:12:32.374964 INFO : End of 2D read delay Voltage center optimization
1039 22:12:32.395251 INFO : End of 2D read delay Voltage center optimization
1040 22:12:32.447113 INFO : End of 2D write delay Voltage center optimization
1041 22:12:32.496418 INFO : End of 2D write delay Voltage center optimization
1042 22:12:32.501936 INFO : Training has run successfully!
1043 22:12:32.502435
1044 22:12:32.502858 channel==0
1045 22:12:32.507598 RxClkDly_Margin_A0==88 ps 9
1046 22:12:32.508125 TxDqDly_Margin_A0==98 ps 10
1047 22:12:32.510906 RxClkDly_Margin_A1==88 ps 9
1048 22:12:32.511390 TxDqDly_Margin_A1==88 ps 9
1049 22:12:32.516497 TrainedVREFDQ_A0==74
1050 22:12:32.516992 TrainedVREFDQ_A1==74
1051 22:12:32.517408 VrefDac_Margin_A0==25
1052 22:12:32.522060 DeviceVref_Margin_A0==40
1053 22:12:32.522555 VrefDac_Margin_A1==25
1054 22:12:32.527667 DeviceVref_Margin_A1==40
1055 22:12:32.528173
1056 22:12:32.528594
1057 22:12:32.528997 channel==1
1058 22:12:32.529391 RxClkDly_Margin_A0==98 ps 10
1059 22:12:32.531117 TxDqDly_Margin_A0==88 ps 9
1060 22:12:32.536726 RxClkDly_Margin_A1==98 ps 10
1061 22:12:32.537257 TxDqDly_Margin_A1==88 ps 9
1062 22:12:32.537675 TrainedVREFDQ_A0==74
1063 22:12:32.542326 TrainedVREFDQ_A1==77
1064 22:12:32.542825 VrefDac_Margin_A0==22
1065 22:12:32.547888 DeviceVref_Margin_A0==40
1066 22:12:32.548412 VrefDac_Margin_A1==24
1067 22:12:32.548828 DeviceVref_Margin_A1==37
1068 22:12:32.549227
1069 22:12:32.556858 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 22:12:32.557356
1071 22:12:32.584967 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
1072 22:12:32.585556 2D training succeed
1073 22:12:32.590547 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 22:12:32.595953 auto size-- 65535DDR cs0 size: 2048MB
1075 22:12:32.596476 DDR cs1 size: 2048MB
1076 22:12:32.601554 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 22:12:32.602049 cs0 DataBus test pass
1078 22:12:32.607186 cs1 DataBus test pass
1079 22:12:32.607677 cs0 AddrBus test pass
1080 22:12:32.612741 cs1 AddrBus test pass
1081 22:12:32.613237
1082 22:12:32.613656 100bdlr_step_size ps== 420
1083 22:12:32.614071 result report
1084 22:12:32.618347 boot times 0Enable ddr reg access
1085 22:12:32.624674 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 22:12:32.638108 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 22:12:33.210139 0.0;M3 CHK:0;cm4_sp_mode 0
1088 22:12:33.210677 MVN_1=0x00000000
1089 22:12:33.215714 MVN_2=0x00000000
1090 22:12:33.221442 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 22:12:33.221937 OPS=0x10
1092 22:12:33.222355 ring efuse init
1093 22:12:33.222757 chipver efuse init
1094 22:12:33.227037 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 22:12:33.232640 [0.018961 Inits done]
1096 22:12:33.233137 secure task start!
1097 22:12:33.233556 high task start!
1098 22:12:33.237217 low task start!
1099 22:12:33.237715 run into bl31
1100 22:12:33.243871 NOTICE: BL31: v1.3(release):4fc40b1
1101 22:12:33.251702 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 22:12:33.252238 NOTICE: BL31: G12A normal boot!
1103 22:12:33.277033 NOTICE: BL31: BL33 decompress pass
1104 22:12:33.282733 ERROR: Error initializing runtime service opteed_fast
1105 22:12:34.515656
1106 22:12:34.516322
1107 22:12:34.524109 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 22:12:34.524673
1109 22:12:34.525100 Model: Libre Computer AML-A311D-CC Alta
1110 22:12:34.732603 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 22:12:34.755912 DRAM: 2 GiB (effective 3.8 GiB)
1112 22:12:34.898894 Core: 408 devices, 31 uclasses, devicetree: separate
1113 22:12:34.904713 WDT: Not starting watchdog@f0d0
1114 22:12:34.937001 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 22:12:34.949386 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 22:12:34.954432 ** Bad device specification mmc 0 **
1117 22:12:34.964829 Card did not respond to voltage select! : -110
1118 22:12:34.972454 ** Bad device specification mmc 0 **
1119 22:12:34.972995 Couldn't find partition mmc 0
1120 22:12:34.980771 Card did not respond to voltage select! : -110
1121 22:12:34.986295 ** Bad device specification mmc 0 **
1122 22:12:34.986822 Couldn't find partition mmc 0
1123 22:12:34.991352 Error: could not access storage.
1124 22:12:35.333790 Net: eth0: ethernet@ff3f0000
1125 22:12:35.334395 starting USB...
1126 22:12:35.585606 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 22:12:35.586197 Starting the controller
1128 22:12:35.592572 USB XHCI 1.10
1129 22:12:37.146689 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 22:12:37.155036 scanning usb for storage devices... 0 Storage Device(s) found
1132 22:12:37.206633 Hit any key to stop autoboot: 1
1133 22:12:37.207710 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1134 22:12:37.208374 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1135 22:12:37.208870 Setting prompt string to ['=>']
1136 22:12:37.209365 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1137 22:12:37.222488 0
1138 22:12:37.223385 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 22:12:37.223898 Sending with 10 millisecond of delay
1141 22:12:38.359017 => setenv autoload no
1142 22:12:38.369917 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1143 22:12:38.372698 setenv autoload no
1144 22:12:38.373675 Sending with 10 millisecond of delay
1146 22:12:40.171879 => setenv initrd_high 0xffffffff
1147 22:12:40.182767 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1148 22:12:40.183650 setenv initrd_high 0xffffffff
1149 22:12:40.184447 Sending with 10 millisecond of delay
1151 22:12:41.800716 => setenv fdt_high 0xffffffff
1152 22:12:41.811517 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1153 22:12:41.812397 setenv fdt_high 0xffffffff
1154 22:12:41.813140 Sending with 10 millisecond of delay
1156 22:12:42.105006 => dhcp
1157 22:12:42.115808 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1158 22:12:42.116699 dhcp
1159 22:12:42.117155 Speed: 1000, full duplex
1160 22:12:42.117596 BOOTP broadcast 1
1161 22:12:42.363939 BOOTP broadcast 2
1162 22:12:42.473406 DHCP client bound to address 192.168.6.33 (358 ms)
1163 22:12:42.473948 Sending with 10 millisecond of delay
1165 22:12:44.150360 => setenv serverip 192.168.6.2
1166 22:12:44.160935 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1167 22:12:44.161545 setenv serverip 192.168.6.2
1168 22:12:44.162077 Sending with 10 millisecond of delay
1170 22:12:47.884821 => tftpboot 0x01080000 680311/tftp-deploy-1pa4k0f7/kernel/uImage
1171 22:12:47.895582 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1172 22:12:47.896438 tftpboot 0x01080000 680311/tftp-deploy-1pa4k0f7/kernel/uImage
1173 22:12:47.896893 Speed: 1000, full duplex
1174 22:12:47.897314 Using ethernet@ff3f0000 device
1175 22:12:47.898423 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1176 22:12:47.903855 Filename '680311/tftp-deploy-1pa4k0f7/kernel/uImage'.
1177 22:12:47.907884 Load address: 0x1080000
1178 22:12:51.024128 Loading: *################################################## 43.2 MiB
1179 22:12:51.024734 13.9 MiB/s
1180 22:12:51.025173 done
1181 22:12:51.028274 Bytes transferred = 45308480 (2b35a40 hex)
1182 22:12:51.029104 Sending with 10 millisecond of delay
1184 22:12:55.717034 => tftpboot 0x08000000 680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot
1185 22:12:55.727840 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1186 22:12:55.728813 tftpboot 0x08000000 680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot
1187 22:12:55.729329 Speed: 1000, full duplex
1188 22:12:55.729779 Using ethernet@ff3f0000 device
1189 22:12:55.730967 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1190 22:12:55.742560 Filename '680311/tftp-deploy-1pa4k0f7/ramdisk/ramdisk.cpio.gz.uboot'.
1191 22:12:55.743121 Load address: 0x8000000
1192 22:13:02.591164 Loading: *#############T #################################### UDP wrong checksum 00000005 000057bf
1193 22:13:07.592697 T UDP wrong checksum 00000005 000057bf
1194 22:13:17.594579 T T UDP wrong checksum 00000005 000057bf
1195 22:13:37.598774 T T T T UDP wrong checksum 00000005 000057bf
1196 22:13:52.602940 T T
1197 22:13:52.603758 Retry count exceeded; starting again
1199 22:13:52.605680 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1202 22:13:52.608331 end: 2.4 uboot-commands (duration 00:01:52) [common]
1204 22:13:52.610137 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1206 22:13:52.611459 end: 2 uboot-action (duration 00:01:52) [common]
1208 22:13:52.613473 Cleaning after the job
1209 22:13:52.614192 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/ramdisk
1210 22:13:52.615845 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/kernel
1211 22:13:52.665591 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/dtb
1212 22:13:52.666689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/nfsrootfs
1213 22:13:52.875324 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/680311/tftp-deploy-1pa4k0f7/modules
1214 22:13:52.901137 start: 4.1 power-off (timeout 00:00:30) [common]
1215 22:13:52.901957 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1216 22:13:52.935805 >> OK - accepted request
1217 22:13:52.937989 Returned 0 in 0 seconds
1218 22:13:53.038877 end: 4.1 power-off (duration 00:00:00) [common]
1220 22:13:53.040096 start: 4.2 read-feedback (timeout 00:10:00) [common]
1221 22:13:53.040907 Listened to connection for namespace 'common' for up to 1s
1222 22:13:54.041179 Finalising connection for namespace 'common'
1223 22:13:54.042126 Disconnecting from shell: Finalise
1224 22:13:54.042793 =>
1225 22:13:54.144056 end: 4.2 read-feedback (duration 00:00:01) [common]
1226 22:13:54.144899 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/680311
1227 22:13:57.163155 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/680311
1228 22:13:57.163769 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.