Boot log: beaglebone-black
- Warnings: 2
- Kernel Warnings: 15
- Errors: 0
- Boot result: PASS
- Kernel Errors: 10
1 07:24:39.367681 lava-dispatcher, installed at version: 2023.08
2 07:24:39.368056 start: 0 validate
3 07:24:39.368295 Start time: 2024-08-31 07:24:39.368280+00:00 (UTC)
4 07:24:39.368562 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz exists
5 07:24:39.702765 Validating that http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/kernel/zImage exists
6 07:24:39.865134 Validating that http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/dtbs/ti/omap/am335x-boneblack.dtb exists
7 07:24:40.020230 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz exists
8 07:24:40.176778 Validating that http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/modules.tar.xz exists
9 07:24:40.341012 validate duration: 0.97
11 07:24:40.342092 start: 1 tftp-deploy (timeout 00:10:00) [common]
12 07:24:40.342563 start: 1.1 download-retry (timeout 00:10:00) [common]
13 07:24:40.343000 start: 1.1.1 http-download (timeout 00:10:00) [common]
14 07:24:40.343771 Not decompressing ramdisk as can be used compressed.
15 07:24:40.344203 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz
16 07:24:40.344537 saving as /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/ramdisk/initrd.cpio.gz
17 07:24:40.344879 total size: 4775763 (4 MB)
18 07:24:40.656277 progress 0 % (0 MB)
19 07:24:41.117729 progress 5 % (0 MB)
20 07:24:41.422544 progress 10 % (0 MB)
21 07:24:41.443733 progress 15 % (0 MB)
22 07:24:41.577195 progress 20 % (0 MB)
23 07:24:41.584582 progress 25 % (1 MB)
24 07:24:41.731999 progress 30 % (1 MB)
25 07:24:41.893877 progress 35 % (1 MB)
26 07:24:42.050607 progress 40 % (1 MB)
27 07:24:42.205395 progress 45 % (2 MB)
28 07:24:42.359241 progress 50 % (2 MB)
29 07:24:42.518362 progress 55 % (2 MB)
30 07:24:42.671746 progress 60 % (2 MB)
31 07:24:42.824479 progress 65 % (2 MB)
32 07:24:42.982332 progress 70 % (3 MB)
33 07:24:43.133855 progress 75 % (3 MB)
34 07:24:43.285457 progress 80 % (3 MB)
35 07:24:43.435184 progress 85 % (3 MB)
36 07:24:43.594526 progress 90 % (4 MB)
37 07:24:43.744091 progress 95 % (4 MB)
38 07:24:43.891883 progress 100 % (4 MB)
39 07:24:43.892911 4 MB downloaded in 3.55 s (1.28 MB/s)
40 07:24:43.893611 end: 1.1.1 http-download (duration 00:00:04) [common]
42 07:24:43.894873 end: 1.1 download-retry (duration 00:00:04) [common]
43 07:24:43.895297 start: 1.2 download-retry (timeout 00:09:56) [common]
44 07:24:43.895745 start: 1.2.1 http-download (timeout 00:09:56) [common]
45 07:24:43.896359 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/kernel/zImage
46 07:24:43.896685 saving as /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/kernel/zImage
47 07:24:43.896994 total size: 11964928 (11 MB)
48 07:24:43.897306 No compression specified
49 07:24:44.055507 progress 0 % (0 MB)
50 07:24:44.377952 progress 5 % (0 MB)
51 07:24:44.974391 progress 10 % (1 MB)
52 07:24:45.436478 progress 15 % (1 MB)
53 07:24:45.899242 progress 20 % (2 MB)
54 07:24:46.354390 progress 25 % (2 MB)
55 07:24:46.685527 progress 30 % (3 MB)
56 07:24:47.142644 progress 35 % (4 MB)
57 07:24:47.601732 progress 40 % (4 MB)
58 07:24:48.053471 progress 45 % (5 MB)
59 07:24:48.506937 progress 50 % (5 MB)
60 07:24:48.956315 progress 55 % (6 MB)
61 07:24:49.333387 progress 60 % (6 MB)
62 07:24:49.753852 progress 65 % (7 MB)
63 07:24:50.204859 progress 70 % (8 MB)
64 07:24:50.653883 progress 75 % (8 MB)
65 07:24:51.098323 progress 80 % (9 MB)
66 07:24:51.439010 progress 85 % (9 MB)
67 07:24:51.879784 progress 90 % (10 MB)
68 07:24:52.204867 progress 95 % (10 MB)
69 07:24:52.628625 progress 100 % (11 MB)
70 07:24:52.628949 11 MB downloaded in 8.73 s (1.31 MB/s)
71 07:24:52.629332 end: 1.2.1 http-download (duration 00:00:09) [common]
73 07:24:52.629858 end: 1.2 download-retry (duration 00:00:09) [common]
74 07:24:52.630040 start: 1.3 download-retry (timeout 00:09:48) [common]
75 07:24:52.630231 start: 1.3.1 http-download (timeout 00:09:48) [common]
76 07:24:52.630558 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/dtbs/ti/omap/am335x-boneblack.dtb
77 07:24:52.630711 saving as /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/dtb/am335x-boneblack.dtb
78 07:24:52.630856 total size: 70308 (0 MB)
79 07:24:52.630985 No compression specified
80 07:24:52.788663 progress 46 % (0 MB)
81 07:24:52.791488 progress 93 % (0 MB)
82 07:24:52.792564 progress 100 % (0 MB)
83 07:24:52.793095 0 MB downloaded in 0.16 s (0.41 MB/s)
84 07:24:52.793653 end: 1.3.1 http-download (duration 00:00:00) [common]
86 07:24:52.794735 end: 1.3 download-retry (duration 00:00:00) [common]
87 07:24:52.795128 start: 1.4 download-retry (timeout 00:09:48) [common]
88 07:24:52.795526 start: 1.4.1 http-download (timeout 00:09:48) [common]
89 07:24:52.795838 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz
90 07:24:52.796160 saving as /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/nfsrootfs/full.rootfs.tar
91 07:24:52.796451 total size: 117747780 (112 MB)
92 07:24:52.796754 Using unxz to decompress xz
93 07:24:52.974834 progress 0 % (0 MB)
94 07:24:56.809461 progress 5 % (5 MB)
95 07:25:00.206697 progress 10 % (11 MB)
96 07:25:03.390296 progress 15 % (16 MB)
97 07:25:05.598888 progress 20 % (22 MB)
98 07:25:07.245356 progress 25 % (28 MB)
99 07:25:08.466235 progress 30 % (33 MB)
100 07:25:09.414616 progress 35 % (39 MB)
101 07:25:10.363290 progress 40 % (44 MB)
102 07:25:11.559676 progress 45 % (50 MB)
103 07:25:12.853997 progress 50 % (56 MB)
104 07:25:14.104105 progress 55 % (61 MB)
105 07:25:15.303731 progress 60 % (67 MB)
106 07:25:16.491143 progress 65 % (73 MB)
107 07:25:17.666522 progress 70 % (78 MB)
108 07:25:18.838455 progress 75 % (84 MB)
109 07:25:20.015778 progress 80 % (89 MB)
110 07:25:21.233061 progress 85 % (95 MB)
111 07:25:22.671328 progress 90 % (101 MB)
112 07:25:23.951112 progress 95 % (106 MB)
113 07:25:25.141322 progress 100 % (112 MB)
114 07:25:25.149713 112 MB downloaded in 32.35 s (3.47 MB/s)
115 07:25:25.150285 end: 1.4.1 http-download (duration 00:00:32) [common]
117 07:25:25.151411 end: 1.4 download-retry (duration 00:00:32) [common]
118 07:25:25.151753 start: 1.5 download-retry (timeout 00:09:15) [common]
119 07:25:25.152048 start: 1.5.1 http-download (timeout 00:09:15) [common]
120 07:25:25.152689 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/modules.tar.xz
121 07:25:25.153005 saving as /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/modules/modules.tar
122 07:25:25.153301 total size: 6919776 (6 MB)
123 07:25:25.153604 Using unxz to decompress xz
124 07:25:25.312890 progress 0 % (0 MB)
125 07:25:25.493062 progress 5 % (0 MB)
126 07:25:25.536396 progress 10 % (0 MB)
127 07:25:25.637202 progress 15 % (1 MB)
128 07:25:25.674440 progress 20 % (1 MB)
129 07:25:25.704118 progress 25 % (1 MB)
130 07:25:25.831357 progress 30 % (2 MB)
131 07:25:25.935197 progress 35 % (2 MB)
132 07:25:26.149376 progress 40 % (2 MB)
133 07:25:26.193626 progress 45 % (3 MB)
134 07:25:26.281757 progress 50 % (3 MB)
135 07:25:26.431072 progress 55 % (3 MB)
136 07:25:26.537962 progress 60 % (3 MB)
137 07:25:26.620111 progress 65 % (4 MB)
138 07:25:26.762987 progress 70 % (4 MB)
139 07:25:26.908321 progress 75 % (4 MB)
140 07:25:27.050418 progress 80 % (5 MB)
141 07:25:27.194717 progress 85 % (5 MB)
142 07:25:27.302116 progress 90 % (5 MB)
143 07:25:27.385577 progress 95 % (6 MB)
144 07:25:27.522364 progress 100 % (6 MB)
145 07:25:27.532919 6 MB downloaded in 2.38 s (2.77 MB/s)
146 07:25:27.533579 end: 1.5.1 http-download (duration 00:00:02) [common]
148 07:25:27.534702 end: 1.5 download-retry (duration 00:00:02) [common]
149 07:25:27.535104 start: 1.6 prepare-tftp-overlay (timeout 00:09:13) [common]
150 07:25:27.535502 start: 1.6.1 extract-nfsrootfs (timeout 00:09:13) [common]
151 07:25:34.782639 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8
152 07:25:34.782931 end: 1.6.1 extract-nfsrootfs (duration 00:00:07) [common]
153 07:25:34.783087 start: 1.6.2 lava-overlay (timeout 00:09:06) [common]
154 07:25:34.783396 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r
155 07:25:34.783674 makedir: /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin
156 07:25:34.783852 makedir: /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/tests
157 07:25:34.784043 makedir: /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/results
158 07:25:34.784207 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-add-keys
159 07:25:34.784462 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-add-sources
160 07:25:34.784690 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-background-process-start
161 07:25:34.784917 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-background-process-stop
162 07:25:34.785163 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-common-functions
163 07:25:34.785387 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-echo-ipv4
164 07:25:34.785613 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-install-packages
165 07:25:34.785843 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-installed-packages
166 07:25:34.786064 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-os-build
167 07:25:34.786289 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-probe-channel
168 07:25:34.786512 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-probe-ip
169 07:25:34.786731 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-target-ip
170 07:25:34.786965 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-target-mac
171 07:25:34.787186 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-target-storage
172 07:25:34.787411 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-case
173 07:25:34.787653 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-event
174 07:25:34.787882 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-feedback
175 07:25:34.788121 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-raise
176 07:25:34.788345 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-reference
177 07:25:34.788567 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-runner
178 07:25:34.788788 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-set
179 07:25:34.789010 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-test-shell
180 07:25:34.789237 Updating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-add-keys (debian)
181 07:25:34.820754 Updating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-add-sources (debian)
182 07:25:34.821063 Updating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-install-packages (debian)
183 07:25:34.821332 Updating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-installed-packages (debian)
184 07:25:34.821605 Updating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/bin/lava-os-build (debian)
185 07:25:34.821826 Creating /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/environment
186 07:25:34.821998 LAVA metadata
187 07:25:34.822119 - LAVA_JOB_ID=1186507
188 07:25:34.822234 - LAVA_DISPATCHER_IP=172.16.3.3
189 07:25:34.822411 start: 1.6.2.1 ssh-authorize (timeout 00:09:06) [common]
190 07:25:34.822865 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
191 07:25:34.823023 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:06) [common]
192 07:25:34.823133 skipped lava-vland-overlay
193 07:25:34.823265 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
194 07:25:34.823405 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:06) [common]
195 07:25:34.823518 skipped lava-multinode-overlay
196 07:25:34.823707 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
197 07:25:34.823848 start: 1.6.2.4 test-definition (timeout 00:09:06) [common]
198 07:25:34.823983 Loading test definitions
199 07:25:34.824127 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:06) [common]
200 07:25:34.824242 Using /lava-1186507 at stage 0
201 07:25:34.824789 uuid=1186507_1.6.2.4.1 testdef=None
202 07:25:34.824934 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
203 07:25:34.825072 start: 1.6.2.4.2 test-overlay (timeout 00:09:06) [common]
204 07:25:34.825867 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
206 07:25:34.826269 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:06) [common]
207 07:25:34.827247 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
209 07:25:34.827652 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:06) [common]
210 07:25:34.843732 runner path: /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/0/tests/0_timesync-off test_uuid 1186507_1.6.2.4.1
211 07:25:34.844003 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
213 07:25:34.844405 start: 1.6.2.4.5 git-repo-action (timeout 00:09:05) [common]
214 07:25:34.844530 Using /lava-1186507 at stage 0
215 07:25:34.844706 Fetching tests from https://github.com/kernelci/test-definitions.git
216 07:25:34.844832 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/0/tests/1_kselftest-dt'
217 07:25:40.465427 Running '/usr/bin/git checkout kernelci.org
218 07:25:40.800619 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
219 07:25:40.802191 uuid=1186507_1.6.2.4.5 testdef=None
220 07:25:40.802621 end: 1.6.2.4.5 git-repo-action (duration 00:00:06) [common]
222 07:25:40.803580 start: 1.6.2.4.6 test-overlay (timeout 00:09:00) [common]
223 07:25:40.806649 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
225 07:25:40.807663 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:00) [common]
226 07:25:40.811754 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
228 07:25:40.812697 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:00) [common]
229 07:25:40.816827 runner path: /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/0/tests/1_kselftest-dt test_uuid 1186507_1.6.2.4.5
230 07:25:40.817180 BOARD='beaglebone-black'
231 07:25:40.817469 BRANCH='mainline'
232 07:25:40.817743 SKIPFILE='/dev/null'
233 07:25:40.818013 SKIP_INSTALL='True'
234 07:25:40.818278 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/kselftest.tar.xz'
235 07:25:40.818550 TST_CASENAME=''
236 07:25:40.818815 TST_CMDFILES='dt'
237 07:25:40.819460 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
239 07:25:40.820168 Creating lava-test-runner.conf files
240 07:25:40.820438 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/1186507/lava-overlay-2zmfwy_r/lava-1186507/0 for stage 0
241 07:25:40.820853 - 0_timesync-off
242 07:25:40.821139 - 1_kselftest-dt
243 07:25:40.821571 end: 1.6.2.4 test-definition (duration 00:00:06) [common]
244 07:25:40.821935 start: 1.6.2.5 compress-overlay (timeout 00:09:00) [common]
245 07:25:50.395849 end: 1.6.2.5 compress-overlay (duration 00:00:10) [common]
246 07:25:50.396098 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:50) [common]
247 07:25:50.396241 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
248 07:25:50.396386 end: 1.6.2 lava-overlay (duration 00:00:16) [common]
249 07:25:50.396528 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:50) [common]
250 07:25:50.534651 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
251 07:25:50.534895 start: 1.6.4 extract-modules (timeout 00:08:50) [common]
252 07:25:50.535022 extracting modules file /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8
253 07:25:50.927373 extracting modules file /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1186507/extract-overlay-ramdisk-uu1_ct_b/ramdisk
254 07:25:51.311912 end: 1.6.4 extract-modules (duration 00:00:01) [common]
255 07:25:51.312170 start: 1.6.5 apply-overlay-tftp (timeout 00:08:49) [common]
256 07:25:51.312302 [common] Applying overlay to NFS
257 07:25:51.312413 [common] Applying overlay /var/lib/lava/dispatcher/tmp/1186507/compress-overlay-3ji1p9ne/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8
258 07:25:52.621703 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
259 07:25:52.621939 start: 1.6.6 prepare-kernel (timeout 00:08:48) [common]
260 07:25:52.622083 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:48) [common]
261 07:25:52.622228 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
262 07:25:52.622360 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
263 07:25:52.622495 start: 1.6.7 configure-preseed-file (timeout 00:08:48) [common]
264 07:25:52.622626 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
265 07:25:52.622758 start: 1.6.8 compress-ramdisk (timeout 00:08:48) [common]
266 07:25:52.622871 Building ramdisk /var/lib/lava/dispatcher/tmp/1186507/extract-overlay-ramdisk-uu1_ct_b/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/1186507/extract-overlay-ramdisk-uu1_ct_b/ramdisk
267 07:25:52.901342 >> 78981 blocks
268 07:25:55.187649 Adding RAMdisk u-boot header.
269 07:25:55.187919 mkimage -A arm -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/1186507/extract-overlay-ramdisk-uu1_ct_b/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/1186507/extract-overlay-ramdisk-uu1_ct_b/ramdisk.cpio.gz.uboot
270 07:25:55.425404 output: Image Name:
271 07:25:55.425788 output: Created: Sat Aug 31 07:25:55 2024
272 07:25:55.426113 output: Image Type: ARM Linux RAMDisk Image (uncompressed)
273 07:25:55.426417 output: Data Size: 15348846 Bytes = 14989.11 KiB = 14.64 MiB
274 07:25:55.426711 output: Load Address: 00000000
275 07:25:55.427002 output: Entry Point: 00000000
276 07:25:55.427289 output:
277 07:25:55.427737 rename /var/lib/lava/dispatcher/tmp/1186507/extract-overlay-ramdisk-uu1_ct_b/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot
278 07:25:55.428034 end: 1.6.8 compress-ramdisk (duration 00:00:03) [common]
279 07:25:55.428439 end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
280 07:25:55.428839 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:45) [common]
281 07:25:55.429147 No LXC device requested
282 07:25:55.429518 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
283 07:25:55.429905 start: 1.8 deploy-device-env (timeout 00:08:45) [common]
284 07:25:55.430278 end: 1.8 deploy-device-env (duration 00:00:00) [common]
285 07:25:55.430575 Checking files for TFTP limit of 4294967296 bytes.
286 07:25:55.432157 end: 1 tftp-deploy (duration 00:01:15) [common]
287 07:25:55.432568 start: 2 uboot-action (timeout 00:05:00) [common]
288 07:25:55.432968 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
289 07:25:55.433342 end: 2.1 uboot-from-media (duration 00:00:00) [common]
290 07:25:55.433727 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
291 07:25:55.434275 substitutions:
292 07:25:55.434582 - {BOOTX}: bootz 0x82000000 0x83000000 0x88000000
293 07:25:55.434878 - {DTB_ADDR}: 0x88000000
294 07:25:55.435166 - {DTB}: 1186507/tftp-deploy-2efq0q0e/dtb/am335x-boneblack.dtb
295 07:25:55.435454 - {INITRD}: 1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot
296 07:25:55.435706 - {KERNEL_ADDR}: 0x82000000
297 07:25:55.435821 - {KERNEL}: 1186507/tftp-deploy-2efq0q0e/kernel/zImage
298 07:25:55.436020 - {LAVA_MAC}: None
299 07:25:55.436319 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8
300 07:25:55.436604 - {NFS_SERVER_IP}: 172.16.3.3
301 07:25:55.436882 - {PRESEED_CONFIG}: None
302 07:25:55.437160 - {PRESEED_LOCAL}: None
303 07:25:55.437440 - {RAMDISK_ADDR}: 0x83000000
304 07:25:55.437720 - {RAMDISK}: 1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot
305 07:25:55.438001 - {ROOT_PART}: None
306 07:25:55.438275 - {ROOT}: None
307 07:25:55.438549 - {SERVER_IP}: 172.16.3.3
308 07:25:55.438821 - {TEE_ADDR}: 0x83000000
309 07:25:55.439094 - {TEE}: None
310 07:25:55.439370 Parsed boot commands:
311 07:25:55.439670 - setenv autoload no
312 07:25:55.439782 - setenv initrd_high 0xffffffff
313 07:25:55.439905 - setenv fdt_high 0xffffffff
314 07:25:55.440183 - dhcp
315 07:25:55.440458 - setenv serverip 172.16.3.3
316 07:25:55.440729 - tftp 0x82000000 1186507/tftp-deploy-2efq0q0e/kernel/zImage
317 07:25:55.441006 - tftp 0x83000000 1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot
318 07:25:55.441283 - setenv initrd_size ${filesize}
319 07:25:55.441558 - tftp 0x88000000 1186507/tftp-deploy-2efq0q0e/dtb/am335x-boneblack.dtb
320 07:25:55.441834 - setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
321 07:25:55.442119 - bootz 0x82000000 0x83000000 0x88000000
322 07:25:55.442480 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
324 07:25:55.443475 start: 2.3 connect-device (timeout 00:05:00) [common]
325 07:25:55.443711 [common] connect-device Connecting to device using 'telnet ts5 2000'
326 07:25:55.450200 Setting prompt string to ['lava-test: # ']
327 07:25:55.450649 end: 2.3 connect-device (duration 00:00:00) [common]
328 07:25:55.450838 start: 2.4 uboot-commands (timeout 00:05:00) [common]
329 07:25:55.451012 start: 2.4.1 reset-device (timeout 00:05:00) [common]
330 07:25:55.451176 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
331 07:25:55.451442 Calling: 'drpm' 'lf-bbb' 'powercycle'
332 07:25:55.732322 >> OFF
333 07:26:11.061834 >> ON
334 07:26:11.062593 Returned 0 in 15 seconds
335 07:26:11.163317 end: 2.4.1.1 pdu-reboot (duration 00:00:16) [common]
337 07:26:11.164321 end: 2.4.1 reset-device (duration 00:00:16) [common]
338 07:26:11.164755 start: 2.4.2 bootloader-interrupt (timeout 00:04:44) [common]
339 07:26:11.165141 Setting prompt string to ['Hit any key to stop autoboot']
340 07:26:11.165487 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
341 07:26:11.166455 Trying 192.168.1.205...
342 07:26:11.166779 Connected to ts5.
343 07:26:11.167064 Escape character is '^]'.
344 07:26:11.167355
345 07:26:11.167657 ser2net port telnet,2000 device serialdev,/dev/ttyUSB-lf-bbb-01,115200n81,local [] (Debian GNU/Linux)
346 07:26:11.167832
347 07:26:11.977014
348 07:26:11.984953 U-Boot SPL 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
349 07:26:11.985344 Trying to boot from MMC2
350 07:26:12.497933
351 07:26:12.498337
352 07:26:12.503004 U-Boot 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
353 07:26:12.503402
354 07:26:12.503770 CPU : AM335X-GP rev 2.1
355 07:26:12.509695 Model: TI AM335x BeagleBone Black
356 07:26:12.510096 DRAM: 512 MiB
357 07:26:12.589426 WDT: Started with servicing (60s timeout)
358 07:26:12.995426 NAND: 0 MiB
359 07:26:13.005068 MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
360 07:26:13.039727 Loading Environment from FAT... <ethaddr> not set. Validating first E-fuse MAC
361 07:26:13.068856 Net: eth2: ethernet@4a100000, eth3: usb_ether
362 07:26:13.127640 end: 2.4.2 bootloader-interrupt (duration 00:00:02) [common]
363 07:26:13.128142 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
364 07:26:13.128512 Setting prompt string to ['=> ']
365 07:26:13.128874 bootloader-commands: Wait for prompt ['=> '] (timeout 00:04:42)
366 07:26:13.137356 Hit any key to stop autoboot: 2 0
367 07:26:13.138137 Setting prompt string to ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
368 07:26:13.138530 Sending with 10 millisecond of delay
370 07:26:14.275197 => setenv autoload no
371 07:26:14.285809 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:41)
372 07:26:14.288939 setenv autoload no
373 07:26:14.289578 Sending with 10 millisecond of delay
375 07:26:16.089416 => setenv initrd_high 0xffffffff
376 07:26:16.100092 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:39)
377 07:26:16.100771 setenv initrd_high 0xffffffff
378 07:26:16.101349 Sending with 10 millisecond of delay
380 07:26:17.720704 => setenv fdt_high 0xffffffff
381 07:26:17.731320 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:38)
382 07:26:17.731992 setenv fdt_high 0xffffffff
383 07:26:17.732565 Sending with 10 millisecond of delay
385 07:26:18.024750 => dhcp
386 07:26:18.035303 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:37)
387 07:26:18.036203 dhcp
388 07:26:18.036533 link up on port 0, speed 100, full duplex
389 07:26:18.036840 BOOTP broadcast 1
390 07:26:18.088935 DHCP client bound to address 172.16.3.211 (47 ms)
391 07:26:18.089561 Sending with 10 millisecond of delay
393 07:26:19.708819 => setenv serverip 172.16.3.3
394 07:26:19.719411 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:36)
395 07:26:19.720075 setenv serverip 172.16.3.3
396 07:26:19.720647 Sending with 10 millisecond of delay
398 07:26:23.269952 => tftp 0x82000000 1186507/tftp-deploy-2efq0q0e/kernel/zImage
399 07:26:23.280690 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:32)
400 07:26:23.281353 tftp 0x82000000 1186507/tftp-deploy-2efq0q0e/kernel/zImage
401 07:26:23.281681 link up on port 0, speed 100, full duplex
402 07:26:23.286314 Using ethernet@4a100000 device
403 07:26:23.292395 TFTP from server 172.16.3.3; our IP address is 172.16.3.211
404 07:26:23.299223 Filename '1186507/tftp-deploy-2efq0q0e/kernel/zImage'.
405 07:26:23.299653 Load address: 0x82000000
406 07:26:26.210755 Loading: *################################################## 11.4 MiB
407 07:26:26.211267 3.9 MiB/s
408 07:26:26.211565 done
409 07:26:26.215004 Bytes transferred = 11964928 (b69200 hex)
410 07:26:26.215593 Sending with 10 millisecond of delay
412 07:26:30.729532 => tftp 0x83000000 1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot
413 07:26:30.740229 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:25)
414 07:26:30.740877 tftp 0x83000000 1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot
415 07:26:30.741208 link up on port 0, speed 100, full duplex
416 07:26:30.746062 Using ethernet@4a100000 device
417 07:26:30.752013 TFTP from server 172.16.3.3; our IP address is 172.16.3.211
418 07:26:30.759820 Filename '1186507/tftp-deploy-2efq0q0e/ramdisk/ramdisk.cpio.gz.uboot'.
419 07:26:30.760022 Load address: 0x83000000
420 07:26:34.380503 Loading: *################################################## 14.6 MiB
421 07:26:34.380926 4 MiB/s
422 07:26:34.381240 done
423 07:26:34.384930 Bytes transferred = 15348910 (ea34ae hex)
424 07:26:34.385593 Sending with 10 millisecond of delay
426 07:26:36.244895 => setenv initrd_size ${filesize}
427 07:26:36.255450 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:19)
428 07:26:36.256099 setenv initrd_size ${filesize}
429 07:26:36.256669 Sending with 10 millisecond of delay
431 07:26:40.468451 => tftp 0x88000000 1186507/tftp-deploy-2efq0q0e/dtb/am335x-boneblack.dtb
432 07:26:40.479042 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:15)
433 07:26:40.479962 tftp 0x88000000 1186507/tftp-deploy-2efq0q0e/dtb/am335x-boneblack.dtb
434 07:26:40.480300 link up on port 0, speed 100, full duplex
435 07:26:40.484985 Using ethernet@4a100000 device
436 07:26:40.489972 TFTP from server 172.16.3.3; our IP address is 172.16.3.211
437 07:26:40.504624 Filename '1186507/tftp-deploy-2efq0q0e/dtb/am335x-boneblack.dtb'.
438 07:26:40.504916 Load address: 0x88000000
439 07:26:40.520621 Loading: *################################################## 68.7 KiB
440 07:26:40.521010 3.7 MiB/s
441 07:26:40.521324 done
442 07:26:40.524937 Bytes transferred = 70308 (112a4 hex)
443 07:26:40.525566 Sending with 10 millisecond of delay
445 07:26:53.908124 => setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
446 07:26:53.918741 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:02)
447 07:26:53.919364 setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
448 07:26:53.919976 Sending with 10 millisecond of delay
450 07:26:56.262492 => bootz 0x82000000 0x83000000 0x88000000
451 07:26:56.273122 Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
452 07:26:56.273573 bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:03:59)
453 07:26:56.274305 bootz 0x82000000 0x83000000 0x88000000
454 07:26:56.274637 Kernel image @ 0x82000000 [ 0x000000 - 0xb69200 ]
455 07:26:56.277563 ## Loading init Ramdisk from Legacy Image at 83000000 ...
456 07:26:56.282476 Image Name:
457 07:26:56.282861 Created: 2024-08-31 7:25:55 UTC
458 07:26:56.291095 Image Type: ARM Linux RAMDisk Image (uncompressed)
459 07:26:56.291486 Data Size: 15348846 Bytes = 14.6 MiB
460 07:26:56.299246 Load Address: 00000000
461 07:26:56.299651 Entry Point: 00000000
462 07:26:56.474991 Verifying Checksum ... OK
463 07:26:56.475380 ## Flattened Device Tree blob at 88000000
464 07:26:56.479940 Booting using the fdt blob at 0x88000000
465 07:26:56.485448 Using Device Tree in place at 88000000, end 880142a3
466 07:26:56.498572
467 07:26:56.498964 Starting kernel ...
468 07:26:56.499274
469 07:26:56.499975 end: 2.4.3 bootloader-commands (duration 00:00:43) [common]
470 07:26:56.500403 start: 2.4.4 auto-login-action (timeout 00:03:59) [common]
471 07:26:56.500750 Setting prompt string to ['Linux version [0-9]']
472 07:26:56.501089 Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
473 07:26:56.501431 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:05:00)
474 07:26:57.326049 [ 0.000000] Booting Linux on physical CPU 0x0
475 07:26:57.332536 start: 2.4.4.1 login-action (timeout 00:03:58) [common]
476 07:26:57.332957 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
477 07:26:57.333306 Setting prompt string to []
478 07:26:57.333658 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
479 07:26:57.333996 Using line separator: #'\n'#
480 07:26:57.334295 No login prompt set.
481 07:26:57.334603 Parsing kernel messages
482 07:26:57.334885 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
483 07:26:57.335420 [login-action] Waiting for messages, (timeout 00:03:58)
484 07:26:57.345773 [ 0.000000] Linux version 6.11.0-rc5 (KernelCI@build-j302940-arm-clang-15-multi-v7-defconfig-rgxcm) (Debian clang version 15.0.7, Debian LLD 15.0.7) #1 SMP Sat Aug 31 05:05:28 UTC 2024
485 07:26:57.351867 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
486 07:26:57.358023 [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
487 07:26:57.366656 [ 0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
488 07:26:57.372736 [ 0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
489 07:26:57.378807 [ 0.000000] printk: legacy bootconsole [omap8250] enabled
490 07:26:57.382376 [ 0.000000] Memory policy: Data cache writeback
491 07:26:57.388735 [ 0.000000] efi: UEFI not found.
492 07:26:57.397266 [ 0.000000] cma: Reserved 64 MiB at 0x9b800000 on node -1
493 07:26:57.397649 [ 0.000000] Zone ranges:
494 07:26:57.403393 [ 0.000000] DMA [mem 0x0000000080000000-0x000000009fdfffff]
495 07:26:57.408526 [ 0.000000] Normal empty
496 07:26:57.408909 [ 0.000000] HighMem empty
497 07:26:57.414714 [ 0.000000] Movable zone start for each node
498 07:26:57.420684 [ 0.000000] Early memory node ranges
499 07:26:57.424328 [ 0.000000] node 0: [mem 0x0000000080000000-0x000000009fdfffff]
500 07:26:57.431146 [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
501 07:26:57.449341 [ 0.000000] CPU: All CPU(s) started in SVC mode.
502 07:26:57.458964 [ 0.000000] AM335X ES2.1 (sgx neon)
503 07:26:57.467486 [ 0.000000] percpu: Embedded 17 pages/cpu s40268 r8192 d21172 u69632
504 07:26:57.485068 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp
505 07:26:57.497335 <6>[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
506 07:26:57.502216 <6>[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
507 07:26:57.508340 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130560
508 07:26:57.518867 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
509 07:26:57.547451 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
510 07:26:57.553458 <6>[ 0.000000] trace event string verifier disabled
511 07:26:57.553850 <6>[ 0.000000] rcu: Hierarchical RCU implementation.
512 07:26:57.561091 <6>[ 0.000000] rcu: RCU event tracing is enabled.
513 07:26:57.567424 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=1.
514 07:26:57.577112 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
515 07:26:57.585456 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
516 07:26:57.598814 <6>[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
517 07:26:57.616512 <6>[ 0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
518 07:26:57.623456 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
519 07:26:57.726833 <6>[ 0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
520 07:26:57.735421 <6>[ 0.000002] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
521 07:26:57.747962 <6>[ 0.008337] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
522 07:26:57.756286 <6>[ 0.019224] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
523 07:26:57.765829 <6>[ 0.034365] Console: colour dummy device 80x30
524 07:26:57.771236 Matched prompt #6: WARNING:
525 07:26:57.771663 Setting prompt string to ['end trace[^\\r]*\\r', '/ #', 'Login timed out', 'Login incorrect']
526 07:26:57.777101 <3>[ 0.039261] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
527 07:26:57.780649 <3>[ 0.046337] This ensures that you still see kernel messages. Please
528 07:26:57.786340 <3>[ 0.053064] update your kernel commandline.
529 07:26:57.826212 <6>[ 0.057676] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
530 07:26:57.832307 <6>[ 0.096225] CPU: Testing write buffer coherency: ok
531 07:26:57.835781 <6>[ 0.101598] CPU0: Spectre v2: using BPIALL workaround
532 07:26:57.840833 <6>[ 0.107061] pid_max: default: 32768 minimum: 301
533 07:26:57.845964 <6>[ 0.112258] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
534 07:26:57.857077 <6>[ 0.120083] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
535 07:26:57.863332 <6>[ 0.129432] CPU0: thread -1, cpu 0, socket -1, mpidr 0
536 07:26:57.872928 <6>[ 0.136352] Setting up static identity map for 0x80300000 - 0x803000ac
537 07:26:57.877968 <6>[ 0.146066] rcu: Hierarchical SRCU implementation.
538 07:26:57.884933 <6>[ 0.151349] rcu: Max phase no-delay instances is 1000.
539 07:26:57.894336 <6>[ 0.162825] EFI services will not be available.
540 07:26:57.900493 <6>[ 0.168091] smp: Bringing up secondary CPUs ...
541 07:26:57.906840 <6>[ 0.173140] smp: Brought up 1 node, 1 CPU
542 07:26:57.914116 <6>[ 0.177539] SMP: Total of 1 processors activated (996.14 BogoMIPS).
543 07:26:57.920306 <6>[ 0.184292] CPU: All CPU(s) started in SVC mode.
544 07:26:57.938239 <6>[ 0.189506] Memory: 405444K/522240K available (17408K kernel code, 2536K rwdata, 6644K rodata, 2048K init, 432K bss, 49592K reserved, 65536K cma-reserved, 0K highmem)
545 07:26:57.938643 <6>[ 0.205760] devtmpfs: initialized
546 07:26:57.962333 <6>[ 0.224442] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
547 07:26:57.973710 <6>[ 0.233079] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
548 07:26:57.979125 <6>[ 0.243518] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
549 07:26:57.990920 <6>[ 0.255768] pinctrl core: initialized pinctrl subsystem
550 07:26:57.999371 <6>[ 0.266761] DMI not present or invalid.
551 07:26:58.007818 <6>[ 0.272644] NET: Registered PF_NETLINK/PF_ROUTE protocol family
552 07:26:58.017201 <6>[ 0.281576] DMA: preallocated 256 KiB pool for atomic coherent allocations
553 07:26:58.032572 <6>[ 0.293139] thermal_sys: Registered thermal governor 'step_wise'
554 07:26:58.032960 <6>[ 0.293299] cpuidle: using governor menu
555 07:26:58.060082 <6>[ 0.328827] No ATAGs?
556 07:26:58.066776 <6>[ 0.331560] hw-breakpoint: debug architecture 0x4 unsupported.
557 07:26:58.077127 <6>[ 0.343803] Serial: AMBA PL011 UART driver
558 07:26:58.116202 <6>[ 0.385204] iommu: Default domain type: Translated
559 07:26:58.125565 <6>[ 0.390554] iommu: DMA domain TLB invalidation policy: strict mode
560 07:26:58.143153 <5>[ 0.410503] SCSI subsystem initialized
561 07:26:58.157941 <6>[ 0.420132] usbcore: registered new interface driver usbfs
562 07:26:58.164076 <6>[ 0.426093] usbcore: registered new interface driver hub
563 07:26:58.164464 <6>[ 0.431915] usbcore: registered new device driver usb
564 07:26:58.171492 <6>[ 0.438472] pps_core: LinuxPPS API ver. 1 registered
565 07:26:58.183933 <6>[ 0.443900] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
566 07:26:58.187199 <6>[ 0.453599] PTP clock support registered
567 07:26:58.225331 <6>[ 0.493076] EDAC MC: Ver: 3.0.0
568 07:26:58.230905 <6>[ 0.497307] scmi_core: SCMI protocol bus registered
569 07:26:58.258577 <6>[ 0.526578] vgaarb: loaded
570 07:26:58.264055 <6>[ 0.530400] clocksource: Switched to clocksource dmtimer
571 07:26:58.312954 <6>[ 0.581241] NET: Registered PF_INET protocol family
572 07:26:58.325197 <6>[ 0.586861] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
573 07:26:58.332548 <6>[ 0.595902] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
574 07:26:58.343923 <6>[ 0.604827] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
575 07:26:58.348756 <6>[ 0.613090] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
576 07:26:58.359933 <6>[ 0.621376] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)
577 07:26:58.366068 <6>[ 0.629079] TCP: Hash tables configured (established 4096 bind 4096)
578 07:26:58.369700 <6>[ 0.635999] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
579 07:26:58.379716 <6>[ 0.643046] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
580 07:26:58.385187 <6>[ 0.650657] NET: Registered PF_UNIX/PF_LOCAL protocol family
581 07:26:58.421997 <6>[ 0.684811] RPC: Registered named UNIX socket transport module.
582 07:26:58.422383 <6>[ 0.691240] RPC: Registered udp transport module.
583 07:26:58.427075 <6>[ 0.696347] RPC: Registered tcp transport module.
584 07:26:58.435837 <6>[ 0.701484] RPC: Registered tcp-with-tls transport module.
585 07:26:58.441816 <6>[ 0.707394] RPC: Registered tcp NFSv4.1 backchannel transport module.
586 07:26:58.448191 <6>[ 0.714316] PCI: CLS 0 bytes, default 64
587 07:26:58.451701 <5>[ 0.720190] Initialise system trusted keyrings
588 07:26:58.472691 <6>[ 0.738332] Trying to unpack rootfs image as initramfs...
589 07:26:58.510233 <6>[ 0.772572] workingset: timestamp_bits=30 max_order=17 bucket_order=0
590 07:26:58.514850 <6>[ 0.780031] squashfs: version 4.0 (2009/01/31) Phillip Lougher
591 07:26:58.562333 <5>[ 0.830775] NFS: Registering the id_resolver key type
592 07:26:58.568453 <5>[ 0.836367] Key type id_resolver registered
593 07:26:58.574834 <5>[ 0.841038] Key type id_legacy registered
594 07:26:58.582299 <6>[ 0.845495] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
595 07:26:58.589305 <6>[ 0.852693] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
596 07:26:58.632300 <5>[ 0.901243] Key type asymmetric registered
597 07:26:58.638464 <5>[ 0.905768] Asymmetric key parser 'x509' registered
598 07:26:58.646986 <6>[ 0.911292] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
599 07:26:58.652076 <6>[ 0.919177] io scheduler mq-deadline registered
600 07:26:58.658192 <6>[ 0.924154] io scheduler kyber registered
601 07:26:58.661312 <6>[ 0.928610] io scheduler bfq registered
602 07:26:59.027650 <6>[ 1.291949] Serial: 8250/16550 driver, 5 ports, IRQ sharing enabled
603 07:26:59.078517 <6>[ 1.345993] msm_serial: driver initialized
604 07:26:59.083341 <6>[ 1.351036] SuperH (H)SCI(F) driver initialized
605 07:26:59.089723 <6>[ 1.356176] STMicroelectronics ASC driver initialized
606 07:26:59.095335 <6>[ 1.361871] STM32 USART driver initialized
607 07:26:59.192845 <6>[ 1.461801] brd: module loaded
608 07:26:59.250502 <6>[ 1.518437] loop: module loaded
609 07:26:59.291004 <6>[ 1.558626] CAN device driver interface
610 07:26:59.297133 <6>[ 1.563947] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
611 07:26:59.303256 <6>[ 1.571039] e1000e: Intel(R) PRO/1000 Network Driver
612 07:26:59.309389 <6>[ 1.576425] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
613 07:26:59.315635 <6>[ 1.582895] igb: Intel(R) Gigabit Ethernet Network Driver
614 07:26:59.326642 <6>[ 1.588719] igb: Copyright (c) 2007-2014 Intel Corporation.
615 07:26:59.332896 <6>[ 1.598010] pegasus: Pegasus/Pegasus II USB Ethernet driver
616 07:26:59.339198 <6>[ 1.604167] usbcore: registered new interface driver pegasus
617 07:26:59.345318 <6>[ 1.610296] usbcore: registered new interface driver asix
618 07:26:59.351346 <6>[ 1.616179] usbcore: registered new interface driver ax88179_178a
619 07:26:59.356298 <6>[ 1.622768] usbcore: registered new interface driver cdc_ether
620 07:26:59.362401 <6>[ 1.629067] usbcore: registered new interface driver smsc75xx
621 07:26:59.368572 <6>[ 1.635309] usbcore: registered new interface driver smsc95xx
622 07:26:59.374814 <6>[ 1.641541] usbcore: registered new interface driver net1080
623 07:26:59.383327 <6>[ 1.647661] usbcore: registered new interface driver cdc_subset
624 07:26:59.389582 <6>[ 1.654068] usbcore: registered new interface driver zaurus
625 07:26:59.397849 <6>[ 1.660136] usbcore: registered new interface driver cdc_ncm
626 07:26:59.404633 <6>[ 1.669613] usbcore: registered new interface driver usb-storage
627 07:26:59.512901 <6>[ 1.780532] i2c_dev: i2c /dev entries driver
628 07:26:59.576063 <5>[ 1.837142] cpuidle: enable-method property 'ti,am3352' found operations
629 07:26:59.582032 <6>[ 1.846823] sdhci: Secure Digital Host Controller Interface driver
630 07:26:59.588315 <6>[ 1.853594] sdhci: Copyright(c) Pierre Ossman
631 07:26:59.594321 <6>[ 1.860056] Synopsys Designware Multimedia Card Interface Driver
632 07:26:59.602327 <6>[ 1.867996] sdhci-pltfm: SDHCI platform and OF driver helper
633 07:26:59.669056 <6>[ 1.933647] ledtrig-cpu: registered to indicate activity on CPUs
634 07:26:59.702092 <6>[ 1.963662] usbcore: registered new interface driver usbhid
635 07:26:59.702483 <6>[ 1.969700] usbhid: USB HID core driver
636 07:26:59.743159 <6>[ 2.008969] NET: Registered PF_INET6 protocol family
637 07:26:59.802330 <6>[ 2.071140] Segment Routing with IPv6
638 07:26:59.808677 <6>[ 2.075288] In-situ OAM (IOAM) with IPv6
639 07:26:59.816028 <6>[ 2.079683] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
640 07:26:59.820774 <6>[ 2.087148] NET: Registered PF_PACKET protocol family
641 07:26:59.827080 <6>[ 2.092717] can: controller area network core
642 07:26:59.832014 <6>[ 2.097546] NET: Registered PF_CAN protocol family
643 07:26:59.832399 <6>[ 2.102775] can: raw protocol
644 07:26:59.838305 <6>[ 2.106098] can: broadcast manager protocol
645 07:26:59.845815 <6>[ 2.110707] can: netlink gateway - max_hops=1
646 07:26:59.851927 <5>[ 2.116217] Key type dns_resolver registered
647 07:26:59.856801 <6>[ 2.121291] ThumbEE CPU extension supported.
648 07:26:59.857182 <5>[ 2.125982] Registering SWP/SWPB emulation handler
649 07:26:59.867235 <3>[ 2.131703] omap_voltage_late_init: Voltage driver support not added
650 07:26:59.934735 <5>[ 2.200859] Loading compiled-in X.509 certificates
651 07:27:00.076138 <6>[ 2.331765] platform 44e10800.pinmux: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/clkout2-pins
652 07:27:00.082931 <6>[ 2.348451] pinctrl-single 44e10800.pinmux: 142 pins, size 568
653 07:27:00.110743 <3>[ 2.372889] ti-sysc 44e31000.target-module: probe with driver ti-sysc failed with error -16
654 07:27:00.201870 <3>[ 2.465023] ti-sysc 48040000.target-module: probe with driver ti-sysc failed with error -16
655 07:27:00.294661 <6>[ 2.561335] OMAP GPIO hardware version 0.1
656 07:27:00.315900 <6>[ 2.580501] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
657 07:27:00.377411 <4>[ 2.642153] at24 2-0054: supply vcc not found, using dummy regulator
658 07:27:00.442165 <4>[ 2.706972] at24 2-0055: supply vcc not found, using dummy regulator
659 07:27:00.481128 <4>[ 2.745904] at24 2-0056: supply vcc not found, using dummy regulator
660 07:27:00.531107 <4>[ 2.795960] at24 2-0057: supply vcc not found, using dummy regulator
661 07:27:00.581911 <6>[ 2.847123] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
662 07:27:00.664723 <3>[ 2.925402] 48000000.interconnect:segment@200000:target-module@0:mpu@0:fck: device ID is greater than 24
663 07:27:00.689129 <6>[ 2.946718] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
664 07:27:00.710868 <4>[ 2.973649] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
665 07:27:00.757745 <4>[ 3.021349] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
666 07:27:00.812723 <6>[ 3.077382] omap_rng 48310000.rng: Random Number Generator ver. 20
667 07:27:00.835689 <5>[ 3.104084] random: crng init done
668 07:27:00.927898 <6>[ 3.191158] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
669 07:27:01.458614 <6>[ 3.725422] Freeing initrd memory: 14992K
670 07:27:01.500577 <6>[ 3.762912] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver SMSC LAN8710/LAN8720
671 07:27:01.506692 <6>[ 3.773141] cpsw-switch 4a100000.switch: initialized cpsw ale version 1.4
672 07:27:01.515628 <6>[ 3.780492] cpsw-switch 4a100000.switch: ALE Table size 1024
673 07:27:01.520487 <6>[ 3.786901] cpsw-switch 4a100000.switch: cpts: overflow check period 500 (jiffies)
674 07:27:01.531723 <6>[ 3.795037] cpsw-switch 4a100000.switch: CPTS: ref_clk_freq:250000000 calc_mult:2147483648 calc_shift:29 error:0 nsec/sec
675 07:27:01.544991 <6>[ 3.806670] cpsw-switch 4a100000.switch: Detected MACID = 34:03:de:5e:2c:05
676 07:27:01.555569 <5>[ 3.815846] cpsw-switch 4a100000.switch: initialized (regs 0x4a100000, pool size 256) hw_ver:0019010C 1.12 (0)
677 07:27:01.582824 <3>[ 3.846404] debugfs: Directory '49000000.dma' with parent 'dmaengine' already present!
678 07:27:01.589574 <6>[ 3.854991] edma 49000000.dma: TI EDMA DMA engine driver
679 07:27:01.661924 <3>[ 3.924135] target-module@4b000000:target-module@140000:pmu@0:fck: device ID is greater than 24
680 07:27:01.674891 <6>[ 3.938590] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
681 07:27:01.694917 <3>[ 3.960736] l3-aon-clkctrl:0000:0: failed to disable
682 07:27:01.733066 <6>[ 3.995717] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 36, base_baud = 3000000) is a 8250
683 07:27:01.738046 <6>[ 4.005229] printk: legacy console [ttyS0] enabled
684 07:27:01.744293 <6>[ 4.005229] printk: legacy console [ttyS0] enabled
685 07:27:01.750390 <6>[ 4.015551] printk: legacy bootconsole [omap8250] disabled
686 07:27:01.755026 <6>[ 4.015551] printk: legacy bootconsole [omap8250] disabled
687 07:27:01.809735 <4>[ 4.071113] tps65217-pmic: Failed to locate of_node [id: -1]
688 07:27:01.812996 <4>[ 4.078511] tps65217-bl: Failed to locate of_node [id: -1]
689 07:27:01.829900 <6>[ 4.098302] tps65217 0-0024: TPS65217 ID 0xe version 1.2
690 07:27:01.849438 <6>[ 4.105327] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
691 07:27:01.860756 <6>[ 4.119101] i2c 0-0070: Fixed dependency cycle(s) with /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
692 07:27:01.865038 <6>[ 4.131000] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
693 07:27:01.888396 <6>[ 4.151447] omap_gpio 44e07000.gpio: Could not set line 6 debounce to 200000 microseconds (-22)
694 07:27:01.894361 <6>[ 4.160600] sdhci-omap 48060000.mmc: Got CD GPIO
695 07:27:01.902455 <4>[ 4.165717] sdhci-omap 48060000.mmc: supply pbias not found, using dummy regulator
696 07:27:01.917467 <4>[ 4.179309] sdhci-omap 48060000.mmc: supply vqmmc not found, using dummy regulator
697 07:27:01.923790 <4>[ 4.188125] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
698 07:27:01.933091 <4>[ 4.196819] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
699 07:27:02.007094 <6>[ 4.271645] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
700 07:27:02.030618 <6>[ 4.293531] mmc1: SDHCI controller on 481d8000.mmc [481d8000.mmc] using External DMA
701 07:27:02.055745 <6>[ 4.318067] mmc0: SDHCI controller on 48060000.mmc [48060000.mmc] using External DMA
702 07:27:02.062495 <6>[ 4.327003] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
703 07:27:02.130889 <6>[ 4.390240] mmc1: new high speed MMC card at address 0001
704 07:27:02.131277 <6>[ 4.397847] mmcblk1: mmc1:0001 M62704 3.56 GiB
705 07:27:02.139773 <6>[ 4.406525] mmcblk1: p1
706 07:27:02.148148 <6>[ 4.411208] mmcblk1boot0: mmc1:0001 M62704 2.00 MiB
707 07:27:02.151780 <6>[ 4.419274] mmcblk1boot1: mmc1:0001 M62704 2.00 MiB
708 07:27:02.162077 <6>[ 4.427390] mmcblk1rpmb: mmc1:0001 M62704 512 KiB, chardev (236:0)
709 07:27:02.191400 <6>[ 4.451527] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
710 07:27:04.327795 <6>[ 6.591382] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
711 07:27:04.441835 <5>[ 6.650536] Sending DHCP requests ., OK
712 07:27:04.452799 <6>[ 6.714899] IP-Config: Got DHCP answer from 172.16.3.3, my address is 172.16.3.211
713 07:27:04.453183 <6>[ 6.722972] IP-Config: Complete:
714 07:27:04.467582 <6>[ 6.726507] device=eth0, hwaddr=34:03:de:5e:2c:05, ipaddr=172.16.3.211, mask=255.255.255.0, gw=172.16.3.3
715 07:27:04.472463 <6>[ 6.736935] host=172.16.3.211, domain=denx.de, nis-domain=(none)
716 07:27:04.478697 <6>[ 6.743752] bootserver=172.16.3.33, rootserver=172.16.3.3, rootpath=
717 07:27:04.484796 <6>[ 6.743787] nameserver0=172.16.3.3
718 07:27:04.490967 <6>[ 6.755104] ntpserver0=172.16.3.3
719 07:27:04.491348 <6>[ 6.760566] clk: Disabling unused clocks
720 07:27:04.498942 <6>[ 6.765180] PM: genpd: Disabling unused power domains
721 07:27:04.515934 <6>[ 6.781546] Freeing unused kernel image (initmem) memory: 2048K
722 07:27:04.522925 <6>[ 6.791278] Run /init as init process
723 07:27:04.547936 Loading, please wait...
724 07:27:04.623706 Starting systemd-udevd version 252.22-1~deb12u1
725 07:27:07.781740 <4>[ 10.044052] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
726 07:27:07.979735 <4>[ 10.241794] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
727 07:27:08.144215 <6>[ 10.411873] tda998x 0-0070: found TDA19988
728 07:27:08.167527 <6>[ 10.436280] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
729 07:27:08.177865 <6>[ 10.442129] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
730 07:27:08.325414 <6>[ 10.593134] hub 1-0:1.0: USB hub found
731 07:27:08.392721 <6>[ 10.660240] hub 1-0:1.0: 1 port detected
732 07:27:11.143507 Begin: Loading essential drivers ... done.
733 07:27:11.148388 Begin: Running /scripts/init-premount ... done.
734 07:27:11.154517 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
735 07:27:11.168631 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
736 07:27:11.169017 Device /sys/class/net/eth0 found
737 07:27:11.169325 done.
738 07:27:11.246096 Begin: Waiting up to 180 secs for any network device to become available ... done.
739 07:27:11.314869 IP-Config: eth0 hardware address 34:03:de:5e:2c:05 mtu 1500 DHCP
740 07:27:11.339140 IP-Config: eth0 complete (dhcp from 172.16.3.3):
741 07:27:11.350138 address: 172.16.3.211 broadcast: 172.16.3.255 netmask: 255.255.255.0
742 07:27:11.353636 gateway: 172.16.3.3 dns0 : 172.16.3.3 dns1 : 0.0.0.0
743 07:27:11.363658 domain : denx.de
744 07:27:11.364040 rootserver: 172.16.3.33 rootpath:
745 07:27:11.369202 filename : this-host-is-not-configured.kpxe
746 07:27:11.393796 done.
747 07:27:11.408821 Begin: Running /scripts/nfs-bottom ... done.
748 07:27:11.476756 Begin: Running /scripts/init-bottom ... done.
749 07:27:12.910096 <30>[ 15.175669] systemd[1]: System time before build time, advancing clock.
750 07:27:13.107239 <30>[ 15.342585] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
751 07:27:13.112685 <30>[ 15.379420] systemd[1]: Detected architecture arm.
752 07:27:13.125237
753 07:27:13.125633 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
754 07:27:13.125943
755 07:27:13.190780 <30>[ 15.455405] systemd[1]: Hostname set to <debian-bookworm-armhf>.
756 07:27:15.544952 <30>[ 17.809680] systemd[1]: Queued start job for default target graphical.target.
757 07:27:15.563810 <30>[ 17.826980] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
758 07:27:15.571932 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
759 07:27:15.611987 <30>[ 17.873417] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
760 07:27:15.618111 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
761 07:27:15.651721 <30>[ 17.913775] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
762 07:27:15.658833 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
763 07:27:15.689465 <30>[ 17.952644] systemd[1]: Created slice user.slice - User and Session Slice.
764 07:27:15.696196 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
765 07:27:15.732104 <30>[ 17.992671] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
766 07:27:15.745199 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
767 07:27:15.779158 <30>[ 18.041661] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
768 07:27:15.790833 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
769 07:27:15.826793 <30>[ 18.081674] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
770 07:27:15.839155 <30>[ 18.102148] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
771 07:27:15.844684 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
772 07:27:15.877293 <30>[ 18.140834] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
773 07:27:15.885795 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
774 07:27:15.918542 <30>[ 18.181358] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
775 07:27:15.926895 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
776 07:27:15.958417 <30>[ 18.221358] systemd[1]: Reached target paths.target - Path Units.
777 07:27:15.962738 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
778 07:27:15.998655 <30>[ 18.261053] systemd[1]: Reached target remote-fs.target - Remote File Systems.
779 07:27:16.005420 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
780 07:27:16.037907 <30>[ 18.300935] systemd[1]: Reached target slices.target - Slice Units.
781 07:27:16.043480 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
782 07:27:16.078524 <30>[ 18.341960] systemd[1]: Reached target swap.target - Swaps.
783 07:27:16.082829 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
784 07:27:16.117788 <30>[ 18.381246] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
785 07:27:16.126126 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
786 07:27:16.158771 <30>[ 18.422008] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
787 07:27:16.167145 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
788 07:27:16.268931 <30>[ 18.523881] systemd[1]: systemd-journald-audit.socket - Journal Audit Socket was skipped because of an unmet condition check (ConditionSecurity=audit).
789 07:27:16.281528 <30>[ 18.541489] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
790 07:27:16.288277 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
791 07:27:16.320063 <30>[ 18.582466] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
792 07:27:16.327207 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
793 07:27:16.361014 <30>[ 18.624181] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
794 07:27:16.369254 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
795 07:27:16.402910 <30>[ 18.665926] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
796 07:27:16.409027 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
797 07:27:16.450277 <30>[ 18.714092] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
798 07:27:16.463180 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
799 07:27:16.505402 <30>[ 18.762144] systemd[1]: dev-hugepages.mount - Huge Pages File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/mm/hugepages).
800 07:27:16.522029 <30>[ 18.778852] systemd[1]: dev-mqueue.mount - POSIX Message Queue File System was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/mqueue).
801 07:27:16.559154 <30>[ 18.823045] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
802 07:27:16.571958 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
803 07:27:16.650684 <30>[ 18.913585] systemd[1]: Mounting sys-kernel-tracing.mount - Kernel Trace File System...
804 07:27:16.702711 Mounting [0;1;39msys-kernel-tracin…[0m - Kernel Trace File System...
805 07:27:16.781521 <30>[ 19.043814] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
806 07:27:16.800649 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
807 07:27:16.826517 <30>[ 19.089635] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
808 07:27:16.849022 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
809 07:27:16.911703 <30>[ 19.174782] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
810 07:27:16.926684 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
811 07:27:16.950164 <30>[ 19.214668] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
812 07:27:16.973568 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
813 07:27:17.040514 <30>[ 19.302935] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
814 07:27:17.054722 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
815 07:27:17.118501 <30>[ 19.381828] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
816 07:27:17.130241 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
817 07:27:17.200215 <30>[ 19.464107] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
818 07:27:17.217240 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
819 07:27:17.236150 <28>[ 19.494942] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
820 07:27:17.256654 <28>[ 19.520040] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
821 07:27:17.311027 <30>[ 19.575314] systemd[1]: Starting systemd-journald.service - Journal Service...
822 07:27:17.329151 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
823 07:27:17.418126 <30>[ 19.681983] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
824 07:27:17.443689 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
825 07:27:17.501629 <30>[ 19.765868] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
826 07:27:17.548210 Starting [0;1;39msystemd-network-g… units from Kernel command line...
827 07:27:17.604722 <30>[ 19.866349] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
828 07:27:17.656743 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
829 07:27:17.748860 <30>[ 20.012738] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
830 07:27:17.800884 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
831 07:27:17.859226 <30>[ 20.123582] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
832 07:27:17.899853 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
833 07:27:17.940151 <30>[ 20.204534] systemd[1]: Mounted sys-kernel-tracing.mount - Kernel Trace File System.
834 07:27:17.965757 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-tracing…nt[0m - Kernel Trace File System.
835 07:27:17.991729 <30>[ 20.254716] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
836 07:27:18.019727 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
837 07:27:18.168858 <30>[ 20.433613] systemd[1]: modprobe@configfs.service: Deactivated successfully.
838 07:27:18.197734 <30>[ 20.462231] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
839 07:27:18.230644 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
840 07:27:18.235659 <30>[ 20.502151] systemd[1]: Started systemd-journald.service - Journal Service.
841 07:27:18.245101 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
842 07:27:18.288762 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
843 07:27:18.327230 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
844 07:27:18.363349 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
845 07:27:18.402703 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
846 07:27:18.448552 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
847 07:27:18.498593 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
848 07:27:18.538118 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
849 07:27:18.571195 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
850 07:27:18.611787 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
851 07:27:18.687015 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
852 07:27:18.731640 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
853 07:27:18.793893 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
854 07:27:18.854487 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
855 07:27:18.954023 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
856 07:27:19.121200 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
857 07:27:19.177704 <46>[ 21.441194] systemd-journald[163]: Received client request to flush runtime journal.
858 07:27:19.307774 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
859 07:27:19.380006 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
860 07:27:19.446557 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
861 07:27:19.520960 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
862 07:27:20.499569 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
863 07:27:20.529567 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
864 07:27:20.549056 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
865 07:27:20.809841 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
866 07:27:21.373927 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
867 07:27:21.439714 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
868 07:27:21.864267 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
869 07:27:21.957255 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
870 07:27:24.036091 [[0m[0;31m* [0m] (1 of 4) Job systemd-udev-trigger.s…vice/start running (8s / no limit)
871 07:27:24.412595 M[K[[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
872 07:27:25.043968 [K[[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
873 07:27:25.143317 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
874 07:27:25.358167 <5>[ 27.623024] cfg80211: Loading compiled-in X.509 certificates for regulatory database
875 07:27:26.483482 <5>[ 28.749656] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
876 07:27:26.546637 <5>[ 28.812427] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
877 07:27:26.558369 <4>[ 28.823498] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
878 07:27:26.565070 <6>[ 28.832598] cfg80211: failed to load regulatory.db
879 07:27:27.287524 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
880 07:27:34.476491 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
881 07:27:34.514838 [[0;32m OK [0m] Reached target [0;1;39musb-gadget.…m - Hardware activated USB gadget.
882 07:27:34.547871 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
883 07:27:34.644224 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
884 07:27:34.701614 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
885 07:27:34.729312 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
886 07:27:34.763231 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
887 07:27:34.978804 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
888 07:27:35.065440 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
889 07:27:35.101757 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
890 07:27:35.162257 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
891 07:27:35.190986 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
892 07:27:35.234701 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
893 07:27:35.409527 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
894 07:27:35.946907 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
895 07:27:36.010524 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
896 07:27:36.047990 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
897 07:27:36.078028 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
898 07:27:36.202806 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
899 07:27:36.303596 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
900 07:27:36.337876 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
901 07:27:36.437421 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
902 07:27:36.567906 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
903 07:27:36.595388 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
904 07:27:36.641021 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
905 07:27:36.677256 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
906 07:27:36.711341 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
907 07:27:36.790654 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
908 07:27:36.837276 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
909 07:27:37.141503 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
910 07:27:37.307471 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
911 07:27:37.388098 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
912 07:27:37.404443 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
913 07:27:37.508206 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
914 07:27:37.546263 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
915 07:27:37.776481 Starting [0;1;39msystemd-hostnamed.service[0m - Hostname Service...
916 07:27:37.810627 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
917 07:27:37.877363 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
918 07:27:37.941103 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
919 07:27:37.980288 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
920 07:27:38.044874 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
921 07:27:38.489640 [[0;32m OK [0m] Started [0;1;39msystemd-hostnamed.service[0m - Hostname Service.
922 07:27:38.607328 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
923 07:27:38.666612 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
924 07:27:38.711280 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
925 07:27:38.809685 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
926 07:27:39.030630 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
927 07:27:39.269469
928 07:27:39.272690 Debian GNU/Linux 12 debian-booworm-armhf login: root (automatic login)
929 07:27:39.273078
930 07:27:39.650224 Linux debian-bookworm-armhf 6.11.0-rc5 #1 SMP Sat Aug 31 05:05:28 UTC 2024 armv7l
931 07:27:39.650609
932 07:27:39.656310 The programs included with the Debian GNU/Linux system are free software;
933 07:27:39.665126 the exact distribution terms for each program are described in the
934 07:27:39.665513 individual files in /usr/share/doc/*/copyright.
935 07:27:39.665826
936 07:27:39.670188 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
937 07:27:39.677293 permitted by applicable law.
938 07:27:44.473526 Unable to match end of the kernel message
940 07:27:44.474539 Setting prompt string to ['/ #']
941 07:27:44.474963 end: 2.4.4.1 login-action (duration 00:00:47) [common]
943 07:27:44.475940 end: 2.4.4 auto-login-action (duration 00:00:48) [common]
944 07:27:44.476355 start: 2.4.5 expect-shell-connection (timeout 00:03:11) [common]
945 07:27:44.476696 Setting prompt string to ['/ #']
946 07:27:44.476993 Forcing a shell prompt, looking for ['/ #']
948 07:27:44.527744 / #
949 07:27:44.528254 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
950 07:27:44.528619 Waiting using forced prompt support (timeout 00:02:30)
951 07:27:44.535392
952 07:27:44.545408 end: 2.4.5 expect-shell-connection (duration 00:00:00) [common]
953 07:27:44.545893 start: 2.4.6 export-device-env (timeout 00:03:11) [common]
954 07:27:44.546258 Sending with 10 millisecond of delay
956 07:27:49.603766 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8'
957 07:27:49.614442 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1186507/extract-nfsrootfs-kqw7tjl8'
958 07:27:49.617924 Sending with 10 millisecond of delay
960 07:27:51.659418 / # export NFS_SERVER_IP='172.16.3.3'
961 07:27:51.670152 export NFS_SERVER_IP='172.16.3.3'
962 07:27:51.673267 end: 2.4.6 export-device-env (duration 00:00:07) [common]
963 07:27:51.673745 end: 2.4 uboot-commands (duration 00:01:56) [common]
964 07:27:51.674195 end: 2 uboot-action (duration 00:01:56) [common]
965 07:27:51.674625 start: 3 lava-test-retry (timeout 00:06:49) [common]
966 07:27:51.675059 start: 3.1 lava-test-shell (timeout 00:06:49) [common]
967 07:27:51.675415 Using namespace: common
969 07:27:51.776468 / # #
970 07:27:51.776977 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
971 07:27:51.783222 #
972 07:27:51.790174 Using /lava-1186507
974 07:27:51.891240 / # export SHELL=/bin/bash
975 07:27:51.898213 export SHELL=/bin/bash
977 07:27:52.005861 / # . /lava-1186507/environment
978 07:27:52.012198 . /lava-1186507/environment
980 07:27:52.126257 / # /lava-1186507/bin/lava-test-runner /lava-1186507/0
981 07:27:52.126771 Test shell timeout: 10s (minimum of the action and connection timeout)
982 07:27:52.133989 /lava-1186507/bin/lava-test-runner /lava-1186507/0
983 07:27:52.748338 + export TESTRUN_ID=0_timesync-off
984 07:27:52.756453 + TESTRUN_ID=0_timesync-off
985 07:27:52.756840 + cd /lava-1186507/0/tests/0_timesync-off
986 07:27:52.757157 ++ cat uuid
987 07:27:52.777376 + UUID=1186507_1.6.2.4.1
988 07:27:52.777764 + set +x
989 07:27:52.783572 <LAVA_SIGNAL_STARTRUN 0_timesync-off 1186507_1.6.2.4.1>
990 07:27:52.784240 Received signal: <STARTRUN> 0_timesync-off 1186507_1.6.2.4.1
991 07:27:52.784571 Starting test lava.0_timesync-off (1186507_1.6.2.4.1)
992 07:27:52.784951 Skipping test definition patterns.
993 07:27:52.786690 + systemctl stop systemd-timesyncd
994 07:27:53.094960 + set +x
995 07:27:53.095585 Received signal: <ENDRUN> 0_timesync-off 1186507_1.6.2.4.1
996 07:27:53.095991 Ending use of test pattern.
997 07:27:53.096294 Ending test lava.0_timesync-off (1186507_1.6.2.4.1), duration 0.31
999 07:27:53.098184 <LAVA_SIGNAL_ENDRUN 0_timesync-off 1186507_1.6.2.4.1>
1000 07:27:53.480224 + export TESTRUN_ID=1_kselftest-dt
1001 07:27:53.489344 + TESTRUN_ID=1_kselftest-dt
1002 07:27:53.489731 + cd /lava-1186507/0/tests/1_kselftest-dt
1003 07:27:53.490052 ++ cat uuid
1004 07:27:53.509426 + UUID=1186507_1.6.2.4.5
1005 07:27:53.509815 + set +x
1006 07:27:53.514495 <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 1186507_1.6.2.4.5>
1007 07:27:53.514882 + cd ./automated/linux/kselftest/
1008 07:27:53.515437 Received signal: <STARTRUN> 1_kselftest-dt 1186507_1.6.2.4.5
1009 07:27:53.515787 Starting test lava.1_kselftest-dt (1186507_1.6.2.4.5)
1010 07:27:53.516151 Skipping test definition patterns.
1011 07:27:53.543624 + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/kselftest.tar.xz -L '' -S /dev/null -b beaglebone-black -g mainline -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
1012 07:27:53.710839 INFO: install_deps skipped
1013 07:27:54.359584 --2024-01-26 21:49:17-- http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm/multi_v7_defconfig/clang-15/kselftest.tar.xz
1014 07:27:54.419718 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
1015 07:27:54.578153 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
1016 07:27:54.736442 HTTP request sent, awaiting response... 200 OK
1017 07:27:54.736827 Length: 2274044 (2.2M) [application/octet-stream]
1018 07:27:54.742682 Saving to: 'kselftest_armhf.tar.gz'
1019 07:27:54.743060
1020 07:27:56.442604 kselftest_armhf.tar 0%[ ] 0 --.-KB/s kselftest_armhf.tar 2%[ ] 49.92K 163KB/s kselftest_armhf.tar 9%[> ] 218.67K 353KB/s kselftest_armhf.tar 29%[====> ] 664.45K 703KB/s kselftest_armhf.tar 55%[==========> ] 1.21M 1003KB/s kselftest_armhf.tar 80%[===============> ] 1.74M 1.20MB/s kselftest_armhf.tar 99%[==================> ] 2.16M 1.27MB/s kselftest_armhf.tar 100%[===================>] 2.17M 1.28MB/s in 1.7s
1021 07:27:56.443026
1022 07:27:56.893687 2024-01-26 21:49:19 (1.28 MB/s) - 'kselftest_armhf.tar.gz' saved [2274044/2274044]
1023 07:27:56.894094
1024 07:27:57.148347 tar: ./ftrace/ftracetest: time stamp 2024-08-20 15:21:34 is 17861533.76314612 s in the future
1025 07:27:57.267073 tar: ./ftrace/config: time stamp 2024-08-20 15:21:34 is 17861533.643326245 s in the future
1026 07:27:57.411974 tar: ./ftrace/settings: time stamp 2024-08-20 15:21:34 is 17861533.498147537 s in the future
1027 07:27:57.553735 tar: ./ftrace/ftracetest-ktap: time stamp 2024-08-20 15:21:34 is 17861533.35674862 s in the future
1028 07:27:57.785536 tar: ./ftrace/test.d/ftrace/func_stack_tracer.tc: time stamp 2024-08-20 15:21:34 is 17861533.126736203 s in the future
1029 07:27:57.911932 tar: ./ftrace/test.d/ftrace/func-filter-notrace-pid.tc: time stamp 2024-08-20 15:21:34 is 17861533.001655953 s in the future
1030 07:27:58.047555 tar: ./ftrace/test.d/ftrace/func_mod_trace.tc: time stamp 2024-08-20 15:21:34 is 17861532.864300037 s in the future
1031 07:27:58.173774 tar: ./ftrace/test.d/ftrace/fgraph-filter.tc: time stamp 2024-08-20 15:21:34 is 17861532.737854162 s in the future
1032 07:27:58.302340 tar: ./ftrace/test.d/ftrace/fgraph-retval.tc: time stamp 2024-08-20 15:21:34 is 17861532.609671828 s in the future
1033 07:27:58.424342 tar: ./ftrace/test.d/ftrace/func-filter-pid.tc: time stamp 2024-08-20 15:21:34 is 17861532.487547495 s in the future
1034 07:27:58.553837 tar: ./ftrace/test.d/ftrace/func_traceonoff_triggers.tc: time stamp 2024-08-20 15:21:34 is 17861532.358824037 s in the future
1035 07:27:58.713036 tar: ./ftrace/test.d/ftrace/func-filter-stacktrace.tc: time stamp 2024-08-20 15:21:34 is 17861532.20032262 s in the future
1036 07:27:58.850854 tar: ./ftrace/test.d/ftrace/func_cpumask.tc: time stamp 2024-08-20 15:21:34 is 17861532.061627245 s in the future
1037 07:27:58.981295 tar: ./ftrace/test.d/ftrace/func_profiler.tc: time stamp 2024-08-20 15:21:34 is 17861531.929990912 s in the future
1038 07:27:59.117221 tar: ./ftrace/test.d/ftrace/func_profile_stat.tc: time stamp 2024-08-20 15:21:34 is 17861531.795457912 s in the future
1039 07:27:59.251079 tar: ./ftrace/test.d/ftrace/fgraph-filter-stack.tc: time stamp 2024-08-20 15:21:34 is 17861531.661933162 s in the future
1040 07:27:59.367892 tar: ./ftrace/test.d/ftrace/func_event_triggers.tc: time stamp 2024-08-20 15:21:34 is 17861531.54447612 s in the future
1041 07:27:59.486474 tar: ./ftrace/test.d/ftrace/fgraph-multi.tc: time stamp 2024-08-20 15:21:34 is 17861531.425256245 s in the future
1042 07:27:59.620136 tar: ./ftrace/test.d/ftrace/func-filter-glob.tc: time stamp 2024-08-20 15:21:34 is 17861531.29124087 s in the future
1043 07:27:59.762355 tar: ./ftrace/test.d/ftrace/func_hotplug.tc: time stamp 2024-08-20 15:21:34 is 17861531.149429745 s in the future
1044 07:27:59.876987 tar: ./ftrace/test.d/ftrace/func_set_ftrace_file.tc: time stamp 2024-08-20 15:21:34 is 17861531.035760578 s in the future
1045 07:28:00.004252 tar: ./ftrace/test.d/ftrace/tracing-error-log.tc: time stamp 2024-08-20 15:21:34 is 17861530.908158203 s in the future
1046 07:28:00.064764 tar: ./ftrace/test.d/ftrace: time stamp 2024-08-20 15:21:34 is 17861530.845558287 s in the future
1047 07:28:00.218420 tar: ./ftrace/test.d/event/subsystem-enable.tc: time stamp 2024-08-20 15:21:34 is 17861530.693701287 s in the future
1048 07:28:00.335084 tar: ./ftrace/test.d/event/event-enable.tc: time stamp 2024-08-20 15:21:34 is 17861530.576953995 s in the future
1049 07:28:00.459338 tar: ./ftrace/test.d/event/event-pid.tc: time stamp 2024-08-20 15:21:34 is 17861530.451837995 s in the future
1050 07:28:00.579323 tar: ./ftrace/test.d/event/event-no-pid.tc: time stamp 2024-08-20 15:21:34 is 17861530.332022411 s in the future
1051 07:28:00.707891 tar: ./ftrace/test.d/event/trace_printk.tc: time stamp 2024-08-20 15:21:34 is 17861530.204281995 s in the future
1052 07:28:00.836162 tar: ./ftrace/test.d/event/toplevel-enable.tc: time stamp 2024-08-20 15:21:34 is 17861530.076556995 s in the future
1053 07:28:00.887310 tar: ./ftrace/test.d/event: time stamp 2024-08-20 15:21:34 is 17861530.023325536 s in the future
1054 07:28:01.020691 tar: ./ftrace/test.d/selftest/bashisms.tc: time stamp 2024-08-20 15:21:34 is 17861529.890559786 s in the future
1055 07:28:01.075014 tar: ./ftrace/test.d/selftest: time stamp 2024-08-20 15:21:34 is 17861529.836172911 s in the future
1056 07:28:01.226598 tar: ./ftrace/test.d/00basic/basic3.tc: time stamp 2024-08-20 15:21:34 is 17861529.684967203 s in the future
1057 07:28:01.363365 tar: ./ftrace/test.d/00basic/basic4.tc: time stamp 2024-08-20 15:21:34 is 17861529.54781362 s in the future
1058 07:28:01.485225 tar: ./ftrace/test.d/00basic/basic2.tc: time stamp 2024-08-20 15:21:34 is 17861529.425869911 s in the future
1059 07:28:01.606334 tar: ./ftrace/test.d/00basic/snapshot1.tc: time stamp 2024-08-20 15:21:34 is 17861529.306014411 s in the future
1060 07:28:01.733840 tar: ./ftrace/test.d/00basic/test_ownership.tc: time stamp 2024-08-20 15:21:34 is 17861529.178534745 s in the future
1061 07:28:01.877148 tar: ./ftrace/test.d/00basic/ringbuffer_size.tc: time stamp 2024-08-20 15:21:34 is 17861529.033933828 s in the future
1062 07:28:01.998190 tar: ./ftrace/test.d/00basic/trace_marker.tc: time stamp 2024-08-20 15:21:34 is 17861528.913980161 s in the future
1063 07:28:02.113702 tar: ./ftrace/test.d/00basic/basic1.tc: time stamp 2024-08-20 15:21:34 is 17861528.79719787 s in the future
1064 07:28:02.242258 tar: ./ftrace/test.d/00basic/trace_pipe.tc: time stamp 2024-08-20 15:21:34 is 17861528.669967578 s in the future
1065 07:28:02.395824 tar: ./ftrace/test.d/00basic/ringbuffer_subbuf_size.tc: time stamp 2024-08-20 15:21:34 is 17861528.51673012 s in the future
1066 07:28:02.516822 tar: ./ftrace/test.d/00basic/snapshot.tc: time stamp 2024-08-20 15:21:34 is 17861528.394559078 s in the future
1067 07:28:02.576308 tar: ./ftrace/test.d/00basic: time stamp 2024-08-20 15:21:34 is 17861528.333251411 s in the future
1068 07:28:02.752077 tar: ./ftrace/test.d/kprobe/kprobe_non_uniq_symbol.tc: time stamp 2024-08-20 15:21:34 is 17861528.159514411 s in the future
1069 07:28:02.895193 tar: ./ftrace/test.d/kprobe/kprobe_args_symbol.tc: time stamp 2024-08-20 15:21:34 is 17861528.017422578 s in the future
1070 07:28:03.015287 tar: ./ftrace/test.d/kprobe/kretprobe_entry_arg.tc: time stamp 2024-08-20 15:21:34 is 17861527.897286953 s in the future
1071 07:28:03.132037 tar: ./ftrace/test.d/kprobe/kprobe_eventname.tc: time stamp 2024-08-20 15:21:34 is 17861527.78044912 s in the future
1072 07:28:03.259532 tar: ./ftrace/test.d/kprobe/multiple_kprobes.tc: time stamp 2024-08-20 15:21:34 is 17861527.652645578 s in the future
1073 07:28:03.388032 tar: ./ftrace/test.d/kprobe/kretprobe_maxactive.tc: time stamp 2024-08-20 15:21:34 is 17861527.525248453 s in the future
1074 07:28:03.523776 tar: ./ftrace/test.d/kprobe/kprobe_multiprobe.tc: time stamp 2024-08-20 15:21:34 is 17861527.388494119 s in the future
1075 07:28:03.632188 tar: ./ftrace/test.d/kprobe/kprobe_syntax_errors.tc: time stamp 2024-08-20 15:21:34 is 17861527.279974536 s in the future
1076 07:28:03.754250 tar: ./ftrace/test.d/kprobe/add_and_remove.tc: time stamp 2024-08-20 15:21:34 is 17861527.158178828 s in the future
1077 07:28:03.884699 tar: ./ftrace/test.d/kprobe/kprobe_args_type.tc: time stamp 2024-08-20 15:21:34 is 17861527.027228494 s in the future
1078 07:28:04.015071 tar: ./ftrace/test.d/kprobe/kprobe_ftrace.tc: time stamp 2024-08-20 15:21:34 is 17861526.896339328 s in the future
1079 07:28:04.131641 tar: ./ftrace/test.d/kprobe/busy_check.tc: time stamp 2024-08-20 15:21:34 is 17861526.779550703 s in the future
1080 07:28:04.254654 tar: ./ftrace/test.d/kprobe/kretprobe_return_suffix.tc: time stamp 2024-08-20 15:21:34 is 17861526.657683036 s in the future
1081 07:28:04.376679 tar: ./ftrace/test.d/kprobe/kprobe_args_vfs.tc: time stamp 2024-08-20 15:21:34 is 17861526.535263494 s in the future
1082 07:28:04.507249 tar: ./ftrace/test.d/kprobe/kprobe_insn_boundary.tc: time stamp 2024-08-20 15:21:34 is 17861526.404224869 s in the future
1083 07:28:04.632299 tar: ./ftrace/test.d/kprobe/kretprobe_args.tc: time stamp 2024-08-20 15:21:34 is 17861526.279054411 s in the future
1084 07:28:04.759399 tar: ./ftrace/test.d/kprobe/kprobe_args.tc: time stamp 2024-08-20 15:21:34 is 17861526.151690203 s in the future
1085 07:28:04.894119 tar: ./ftrace/test.d/kprobe/kprobe_args_comm.tc: time stamp 2024-08-20 15:21:34 is 17861526.018197953 s in the future
1086 07:28:05.024483 tar: ./ftrace/test.d/kprobe/kprobe_opt_types.tc: time stamp 2024-08-20 15:21:34 is 17861525.887177161 s in the future
1087 07:28:05.141237 tar: ./ftrace/test.d/kprobe/kprobe_args_syntax.tc: time stamp 2024-08-20 15:21:34 is 17861525.770264786 s in the future
1088 07:28:05.263178 tar: ./ftrace/test.d/kprobe/probepoint.tc: time stamp 2024-08-20 15:21:34 is 17861525.648280786 s in the future
1089 07:28:05.402101 tar: ./ftrace/test.d/kprobe/profile.tc: time stamp 2024-08-20 15:21:34 is 17861525.509527994 s in the future
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1093 07:28:05.944089 tar: ./ftrace/test.d/kprobe/kprobe_args_string.tc: time stamp 2024-08-20 15:21:34 is 17861524.967663828 s in the future
1094 07:28:06.076829 tar: ./ftrace/test.d/kprobe/uprobe_syntax_errors.tc: time stamp 2024-08-20 15:21:34 is 17861524.835961369 s in the future
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1109 07:28:07.880473 tar: ./ftrace/test.d/trigger/trigger-trace-marker-synthetic-kernel.tc: time stamp 2024-08-20 15:21:34 is 17861523.033342369 s in the future
1110 07:28:07.996109 tar: ./ftrace/test.d/trigger/trigger-traceonoff.tc: time stamp 2024-08-20 15:21:34 is 17861522.916296911 s in the future
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1139 07:28:11.749190 tar: ./ftrace/test.d/dynevent/fprobe_entry_arg.tc: time stamp 2024-08-20 15:21:34 is 17861519.16262016 s in the future
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1141 07:28:11.983901 tar: ./ftrace/test.d/dynevent/tprobe_syntax_errors.tc: time stamp 2024-08-20 15:21:34 is 17861518.929044493 s in the future
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1143 07:28:12.215535 tar: ./ftrace/test.d/dynevent/add_remove_fprobe.tc: time stamp 2024-08-20 15:21:34 is 17861518.696335785 s in the future
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1147 07:28:12.665560 tar: ./ftrace/test.d/dynevent/eprobes_syntax_errors.tc: time stamp 2024-08-20 15:21:34 is 17861518.246530327 s in the future
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1149 07:28:12.893040 tar: ./ftrace/test.d/dynevent/fprobe_syntax_errors.tc: time stamp 2024-08-20 15:21:34 is 17861518.01975066 s in the future
1150 07:28:13.074253 tar: ./ftrace/test.d/dynevent/add_remove_kprobe.tc: time stamp 2024-08-20 15:21:34 is 17861517.837371493 s in the future
1151 07:28:13.198328 tar: ./ftrace/test.d/dynevent/add_remove_synth.tc: time stamp 2024-08-20 15:21:34 is 17861517.712903327 s in the future
1152 07:28:13.324768 tar: ./ftrace/test.d/dynevent/clear_select_events.tc: time stamp 2024-08-20 15:21:34 is 17861517.587689827 s in the future
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1154 07:28:13.534081 tar: ./ftrace/test.d/instances/instance.tc: time stamp 2024-08-20 15:21:34 is 17861517.377623702 s in the future
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1157 07:28:13.826498 tar: ./ftrace/test.d/preemptirq/irqsoff_tracer.tc: time stamp 2024-08-20 15:21:34 is 17861517.085517868 s in the future
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1161 07:28:14.154924 tar: ./rust/config: time stamp 2024-08-20 15:21:34 is 17861516.754147285 s in the future
1162 07:28:14.285194 tar: ./rust/test_probe_samples.sh: time stamp 2024-08-20 15:21:34 is 17861516.628194035 s in the future
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1174 07:28:15.741784 tar: ./drivers/net/virtio_net/config: time stamp 2024-08-20 15:21:34 is 17861515.168572326 s in the future
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1176 07:28:15.978401 tar: ./drivers/net/virtio_net/virtio_net_common.sh: time stamp 2024-08-20 15:21:34 is 17861514.933530243 s in the future
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1178 07:28:16.151345 tar: ./drivers/net/stats.py: time stamp 2024-08-20 15:21:34 is 17861514.758452576 s in the future
1179 07:28:16.267951 tar: ./drivers/net/ping.py: time stamp 2024-08-20 15:21:34 is 17861514.641519118 s in the future
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1182 07:28:16.684525 tar: ./drivers/net/lib/py/remote.py: time stamp 2024-08-20 15:21:34 is 17861514.226034826 s in the future
1183 07:28:16.800087 tar: ./drivers/net/lib/py/env.py: time stamp 2024-08-20 15:21:34 is 17861514.109194368 s in the future
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1230 07:28:21.938171 tar: ./tdx: time stamp 2024-08-31 05:26:22 is 18776196.969127492 s in the future
1231 07:28:22.088752 tar: ./uevent/uevent_filtering: time stamp 2024-08-31 05:25:58 is 18776172.821107534 s in the future
1232 07:28:22.196905 tar: ./uevent/config: time stamp 2024-08-20 15:21:34 is 17861508.712751701 s in the future
1233 07:28:22.246878 tar: ./uevent: time stamp 2024-08-31 05:26:23 is 18776197.660647284 s in the future
1234 07:28:22.421438 tar: ./damon/damos_quota.py: time stamp 2024-08-20 15:21:34 is 17861508.487785534 s in the future
1235 07:28:22.549813 tar: ./damon/debugfs_schemes.sh: time stamp 2024-08-20 15:21:34 is 17861508.360270492 s in the future
1236 07:28:22.655965 tar: ./damon/debugfs_attrs.sh: time stamp 2024-08-20 15:21:34 is 17861508.254394159 s in the future
1237 07:28:22.764673 tar: ./damon/debugfs_empty_targets.sh: time stamp 2024-08-20 15:21:34 is 17861508.145269742 s in the future
1238 07:28:22.875438 tar: ./damon/damos_quota_goal.py: time stamp 2024-08-20 15:21:34 is 17861508.034634075 s in the future
1239 07:28:22.991987 tar: ./damon/debugfs_target_ids_pid_leak.sh: time stamp 2024-08-20 15:21:34 is 17861507.9181207 s in the future
1240 07:28:23.098020 tar: ./damon/_debugfs_common.sh: time stamp 2024-08-20 15:21:34 is 17861507.812205742 s in the future
1241 07:28:23.241084 tar: ./damon/debugfs_target_ids.sh: time stamp 2024-08-20 15:21:34 is 17861507.669853742 s in the future
1242 07:28:23.368446 tar: ./damon/sysfs_update_removed_scheme_dir.sh: time stamp 2024-08-20 15:21:34 is 17861507.5428652 s in the future
1243 07:28:23.483960 tar: ./damon/lru_sort.sh: time stamp 2024-08-20 15:21:34 is 17861507.425973242 s in the future
1244 07:28:23.597155 tar: ./damon/reclaim.sh: time stamp 2024-08-20 15:21:34 is 17861507.3117357 s in the future
1245 07:28:23.710134 tar: ./damon/sysfs_update_schemes_tried_regions_wss_estimation.py: time stamp 2024-08-20 15:21:34 is 17861507.202652367 s in the future
1246 07:28:23.827936 tar: ./damon/debugfs_duplicate_context_creation.sh: time stamp 2024-08-20 15:21:34 is 17861507.08397045 s in the future
1247 07:28:23.942422 tar: ./damon/damon_nr_regions.py: time stamp 2024-08-20 15:21:34 is 17861506.967084742 s in the future
1248 07:28:24.064324 tar: ./damon/config: time stamp 2024-08-20 15:21:34 is 17861506.844569492 s in the future
1249 07:28:24.175818 tar: ./damon/debugfs_huge_count_read_write.sh: time stamp 2024-08-20 15:21:34 is 17861506.735561534 s in the future
1250 07:28:24.293469 tar: ./damon/damos_tried_regions.py: time stamp 2024-08-20 15:21:34 is 17861506.616764242 s in the future
1251 07:28:24.413679 tar: ./damon/debugfs_target_ids_read_before_terminate_race.sh: time stamp 2024-08-20 15:21:34 is 17861506.500010617 s in the future
1252 07:28:24.541012 tar: ./damon/access_memory: time stamp 2024-08-31 05:24:02 is 18776054.368993992 s in the future
1253 07:28:24.651464 tar: ./damon/sysfs_update_schemes_tried_regions_hang.py: time stamp 2024-08-20 15:21:34 is 17861506.260106534 s in the future
1254 07:28:24.779161 tar: ./damon/debugfs_target_ids_read_before_terminate_race: time stamp 2024-08-31 05:24:02 is 18776054.132905784 s in the future
1255 07:28:24.901865 tar: ./damon/access_memory_even: time stamp 2024-08-31 05:24:02 is 18776054.00776295 s in the future
1256 07:28:25.023547 tar: ./damon/sysfs.sh: time stamp 2024-08-20 15:21:34 is 17861505.885201575 s in the future
1257 07:28:25.133784 tar: ./damon/_chk_dependency.sh: time stamp 2024-08-20 15:21:34 is 17861505.77630245 s in the future
1258 07:28:25.243981 tar: ./damon/damos_apply_interval.py: time stamp 2024-08-20 15:21:34 is 17861505.665813825 s in the future
1259 07:28:25.377423 tar: ./damon/huge_count_read_write: time stamp 2024-08-31 05:24:01 is 18776052.532237492 s in the future
1260 07:28:25.493029 tar: ./damon/debugfs_rm_non_contexts.sh: time stamp 2024-08-20 15:21:34 is 17861505.418044659 s in the future
1261 07:28:25.618053 tar: ./damon/debugfs_target_ids_pid_leak: time stamp 2024-08-31 05:24:02 is 18776053.292411325 s in the future
1262 07:28:25.673304 tar: ./damon: time stamp 2024-08-31 05:26:09 is 18776180.234128033 s in the future
1263 07:28:25.841226 tar: ./sync/sync_test: time stamp 2024-08-31 05:25:52 is 18776163.067729867 s in the future
1264 07:28:25.957679 tar: ./sync/config: time stamp 2024-08-20 15:21:34 is 17861504.95120545 s in the future
1265 07:28:26.006510 tar: ./sync: time stamp 2024-08-31 05:26:21 is 18776191.900920283 s in the future
1266 07:28:26.151421 tar: ./seccomp/seccomp_benchmark: time stamp 2024-08-31 05:25:51 is 18776161.758712325 s in the future
1267 07:28:26.267917 tar: ./seccomp/config: time stamp 2024-08-20 15:21:34 is 17861504.639836992 s in the future
1268 07:28:26.400215 tar: ./seccomp/settings: time stamp 2024-08-20 15:21:34 is 17861504.508421158 s in the future
1269 07:28:26.667597 tar: ./seccomp/seccomp_bpf: time stamp 2024-08-31 05:25:51 is 18776161.24182795 s in the future
1270 07:28:26.718717 tar: ./seccomp: time stamp 2024-08-31 05:26:21 is 18776191.189392283 s in the future
1271 07:28:26.850978 tar: ./nsfs/config: time stamp 2024-08-20 15:21:34 is 17861504.058395033 s in the future
1272 07:28:27.008598 tar: ./nsfs/owner: time stamp 2024-08-31 05:25:41 is 18776150.899781158 s in the future
1273 07:28:27.153677 tar: ./nsfs/pidns: time stamp 2024-08-31 05:25:41 is 18776150.755487075 s in the future
1274 07:28:27.208799 tar: ./nsfs: time stamp 2024-08-31 05:26:17 is 18776186.699532867 s in the future
1275 07:28:27.361116 tar: ./tpm2/tpm2.py: time stamp 2024-08-20 15:21:34 is 17861503.547089617 s in the future
1276 07:28:27.495341 tar: ./tpm2/tpm2_tests.py: time stamp 2024-08-20 15:21:34 is 17861503.413426283 s in the future
1277 07:28:27.625803 tar: ./tpm2/settings: time stamp 2024-08-20 15:21:34 is 17861503.282680325 s in the future
1278 07:28:27.743357 tar: ./tpm2/test_smoke.sh: time stamp 2024-08-20 15:21:34 is 17861503.165706033 s in the future
1279 07:28:27.854450 tar: ./tpm2/test_async.sh: time stamp 2024-08-20 15:21:34 is 17861503.054689617 s in the future
1280 07:28:27.979223 tar: ./tpm2/test_space.sh: time stamp 2024-08-20 15:21:34 is 17861502.9296952 s in the future
1281 07:28:28.036414 tar: ./tpm2: time stamp 2024-08-31 05:26:23 is 18776191.871337408 s in the future
1282 07:28:28.192968 tar: ./gpio/gpio-line-name: time stamp 2024-08-31 05:25:08 is 18776116.715413075 s in the future
1283 07:28:28.343273 tar: ./gpio/gpio-sim.sh: time stamp 2024-08-20 15:21:34 is 17861502.565592825 s in the future
1284 07:28:28.454355 tar: ./gpio/gpio-mockup.sh: time stamp 2024-08-20 15:21:34 is 17861502.454339325 s in the future
1285 07:28:28.590848 tar: ./gpio/config: time stamp 2024-08-20 15:21:34 is 17861502.318200533 s in the future
1286 07:28:28.719064 tar: ./gpio/gpio-chip-info: time stamp 2024-08-31 05:25:08 is 18776116.189729908 s in the future
1287 07:28:28.845301 tar: ./gpio/gpio-mockup-sysfs.sh: time stamp 2024-08-20 15:21:34 is 17861502.0644262 s in the future
1288 07:28:28.963969 tar: ./gpio/gpio-mockup-cdev: time stamp 2024-08-31 05:25:08 is 18776115.945355408 s in the future
1289 07:28:29.026385 tar: ./gpio: time stamp 2024-08-31 05:26:12 is 18776179.881248075 s in the future
1290 07:28:29.180966 tar: ./sigaltstack/sas: time stamp 2024-08-31 05:25:51 is 18776158.728497158 s in the future
1291 07:28:29.226756 tar: ./sigaltstack: time stamp 2024-08-31 05:26:21 is 18776188.681351575 s in the future
1292 07:28:29.369737 tar: ./pidfd/pidfd_test: time stamp 2024-08-31 05:25:41 is 18776148.539328325 s in the future
1293 07:28:29.519986 tar: ./pidfd/pidfd_getfd_test: time stamp 2024-08-31 05:25:42 is 18776149.389031116 s in the future
1294 07:28:29.646059 tar: ./pidfd/pidfd_fdinfo_test: time stamp 2024-08-31 05:25:41 is 18776148.263847491 s in the future
1295 07:28:29.770015 tar: ./pidfd/pidfd_poll_test: time stamp 2024-08-31 05:25:42 is 18776149.1389177 s in the future
1296 07:28:29.894950 tar: ./pidfd/config: time stamp 2024-08-20 15:21:34 is 17861501.013664533 s in the future
1297 07:28:30.050429 tar: ./pidfd/pidfd_setns_test: time stamp 2024-08-31 05:25:42 is 18776148.858465366 s in the future
1298 07:28:30.212465 tar: ./pidfd/pidfd_wait: time stamp 2024-08-31 05:25:42 is 18776148.696568366 s in the future
1299 07:28:30.337603 tar: ./pidfd/pidfd_open_test: time stamp 2024-08-31 05:25:42 is 18776148.571862241 s in the future
1300 07:28:30.386459 tar: ./pidfd: time stamp 2024-08-31 05:26:18 is 18776184.521701325 s in the future
1301 07:28:30.515587 tar: ./intel_pstate/run.sh: time stamp 2024-08-20 15:21:34 is 17861500.394026533 s in the future
1302 07:28:30.600481 tar: ./intel_pstate: time stamp 2024-08-31 05:26:12 is 18776178.308276991 s in the future
1303 07:28:30.781778 tar: ./devices/error_logs/test_device_error_logs.py: time stamp 2024-08-20 15:21:34 is 17861500.129352033 s in the future
1304 07:28:30.829700 tar: ./devices/error_logs: time stamp 2024-08-31 05:26:09 is 18776175.079656325 s in the future
1305 07:28:30.984293 tar: ./devices/probe/boards/Dell Inc.,XPS 13 9300.yaml: time stamp 2024-08-20 15:21:34 is 17861499.926913616 s in the future
1306 07:28:31.111733 tar: ./devices/probe/boards/google,spherion.yaml: time stamp 2024-08-20 15:21:34 is 17861499.799483283 s in the future
1307 07:28:31.171032 tar: ./devices/probe/boards: time stamp 2024-08-20 15:21:34 is 17861499.737446283 s in the future
1308 07:28:31.289813 tar: ./devices/probe/test_discoverable_devices.py: time stamp 2024-08-20 15:21:34 is 17861499.620587324 s in the future
1309 07:28:31.340970 tar: ./devices/probe: time stamp 2024-08-31 05:26:09 is 18776174.568267033 s in the future
1310 07:28:31.395053 tar: ./devices: time stamp 2024-08-31 05:26:09 is 18776174.512137908 s in the future
1311 07:28:31.560129 tar: ./move_mount_set_group/config: time stamp 2024-08-20 15:21:34 is 17861499.349102866 s in the future
1312 07:28:31.715849 tar: ./move_mount_set_group/move_mount_set_group_test: time stamp 2024-08-31 05:25:23 is 18776128.195226199 s in the future
1313 07:28:31.767958 tar: ./move_mount_set_group: time stamp 2024-08-31 05:26:15 is 18776180.140858324 s in the future
1314 07:28:31.912755 tar: ./ipc/config: time stamp 2024-08-20 15:21:34 is 17861498.994470324 s in the future
1315 07:28:32.032361 tar: ./ipc/msgque: time stamp 2024-08-31 05:25:12 is 18776116.875843199 s in the future
1316 07:28:32.091825 tar: ./ipc: time stamp 2024-08-31 05:26:12 is 18776176.815462991 s in the future
1317 07:28:32.259882 tar: ./lib/prime_numbers.sh: time stamp 2024-08-20 15:21:34 is 17861498.648672908 s in the future
1318 07:28:32.371018 tar: ./lib/config: time stamp 2024-08-20 15:21:34 is 17861498.536391616 s in the future
1319 07:28:32.491546 tar: ./lib/printf.sh: time stamp 2024-08-20 15:21:34 is 17861498.417188574 s in the future
1320 07:28:32.635376 tar: ./lib/strscpy.sh: time stamp 2024-08-20 15:21:34 is 17861498.273472199 s in the future
1321 07:28:32.764546 tar: ./lib/bitmap.sh: time stamp 2024-08-20 15:21:34 is 17861498.144470699 s in the future
1322 07:28:32.872683 tar: ./lib/scanf.sh: time stamp 2024-08-20 15:21:34 is 17861498.035944991 s in the future
1323 07:28:32.930005 tar: ./lib: time stamp 2024-08-31 05:26:13 is 18776176.976951574 s in the future
1324 07:28:33.068552 tar: ./futex/run.sh: time stamp 2024-08-31 05:26:12 is 18776175.840051658 s in the future
1325 07:28:33.232870 tar: ./futex/functional/futex_wait_wouldblock: time stamp 2024-08-31 05:25:06 is 18776109.678251449 s in the future
1326 07:28:33.357902 tar: ./futex/functional/futex_waitv: time stamp 2024-08-31 05:25:08 is 18776111.552009366 s in the future
1327 07:28:33.511410 tar: ./futex/functional/run.sh: time stamp 2024-08-20 15:21:34 is 17861497.397942033 s in the future
1328 07:28:33.670329 tar: ./futex/functional/futex_wait: time stamp 2024-08-31 05:25:07 is 18776110.239381324 s in the future
1329 07:28:33.812393 tar: ./futex/functional/futex_requeue_pi: time stamp 2024-08-31 05:25:06 is 18776109.097956824 s in the future
1330 07:28:33.934507 tar: ./futex/functional/futex_wait_uninitialized_heap: time stamp 2024-08-31 05:25:07 is 18776109.976643116 s in the future
1331 07:28:34.050192 tar: ./futex/functional/futex_requeue: time stamp 2024-08-31 05:25:07 is 18776109.859097657 s in the future
1332 07:28:34.162915 tar: ./futex/functional/futex_requeue_pi_signal_restart: time stamp 2024-08-31 05:25:07 is 18776109.747649241 s in the future
1333 07:28:34.305180 tar: ./futex/functional/futex_wait_private_mapped_file: time stamp 2024-08-31 05:25:07 is 18776109.605732282 s in the future
1334 07:28:34.427291 tar: ./futex/functional/futex_requeue_pi_mismatched_ops: time stamp 2024-08-31 05:25:07 is 18776109.484491074 s in the future
1335 07:28:34.559875 tar: ./futex/functional/futex_wait_timeout: time stamp 2024-08-31 05:25:06 is 18776108.350287907 s in the future
1336 07:28:34.609879 tar: ./futex/functional: time stamp 2024-08-31 05:26:12 is 18776174.298536699 s in the future
1337 07:28:34.659873 tar: ./futex: time stamp 2024-08-31 05:26:12 is 18776174.248553616 s in the future
1338 07:28:34.828007 tar: ./fpu/test_fpu: time stamp 2024-08-31 05:25:06 is 18776108.080402574 s in the future
1339 07:28:34.948855 tar: ./fpu/run_test_fpu.sh: time stamp 2024-08-20 15:21:34 is 17861495.959164991 s in the future
1340 07:28:35.009093 tar: ./fpu: time stamp 2024-08-31 05:26:11 is 18776172.898035366 s in the future
1341 07:28:35.159675 tar: ./dt/test_unprobed_devices.sh: time stamp 2024-08-20 15:21:34 is 17861495.749665699 s in the future
1342 07:28:35.353198 tar: ./dt/compatible_list: time stamp 2024-08-31 05:25:02 is 18776103.555347491 s in the future
1343 07:28:35.474928 tar: ./dt/compatible_ignore_list: time stamp 2024-08-20 15:21:34 is 17861495.433587116 s in the future
1344 07:28:35.548843 tar: ./dt: time stamp 2024-08-31 05:26:10 is 18776171.358638657 s in the future
1345 07:28:35.678163 tar: ./tmpfs/bug-link-o-tmpfile: time stamp 2024-08-31 05:25:57 is 18776158.230627282 s in the future
1346 07:28:35.735453 tar: ./tmpfs: time stamp 2024-08-31 05:26:22 is 18776183.172375616 s in the future
1347 07:28:35.884861 tar: ./proc/proc-self-map-files-002: time stamp 2024-08-31 05:25:44 is 18776145.024756199 s in the future
1348 07:28:36.017292 tar: ./proc/proc-multiple-procfs: time stamp 2024-08-31 05:25:45 is 18776145.891478491 s in the future
1349 07:28:36.146564 tar: ./proc/proc-loadavg-001: time stamp 2024-08-31 05:25:43 is 18776143.762913574 s in the future
1350 07:28:36.271502 tar: ./proc/proc-uptime-002: time stamp 2024-08-31 05:25:45 is 18776145.637826449 s in the future
1351 07:28:36.401803 tar: ./proc/proc-self-syscall: time stamp 2024-08-31 05:25:44 is 18776144.507688907 s in the future
1352 07:28:36.517269 tar: ./proc/proc-tid0: time stamp 2024-08-31 05:25:44 is 18776144.391230949 s in the future
1353 07:28:36.629669 tar: ./proc/proc-self-isnt-kthread: time stamp 2024-08-31 05:25:44 is 18776144.279477532 s in the future
1354 07:28:36.778854 tar: ./proc/proc-2-is-kthread: time stamp 2024-08-31 05:25:43 is 18776143.129230199 s in the future
1355 07:28:36.900479 tar: ./proc/config: time stamp 2024-08-20 15:21:34 is 17861494.007404574 s in the future
1356 07:28:37.033795 tar: ./proc/proc-empty-vm: time stamp 2024-08-31 05:25:43 is 18776142.873933615 s in the future
1357 07:28:37.155635 tar: ./proc/proc-subset-pid: time stamp 2024-08-31 05:25:44 is 18776143.753938199 s in the future
1358 07:28:37.305090 tar: ./proc/proc-fsconfig-hidepid: time stamp 2024-08-31 05:25:46 is 18776145.604056199 s in the future
1359 07:28:37.438865 tar: ./proc/fd-002-posix-eq: time stamp 2024-08-31 05:25:43 is 18776142.470480199 s in the future
1360 07:28:37.551225 tar: ./proc/fd-001-lookup: time stamp 2024-08-31 05:25:43 is 18776142.356791407 s in the future
1361 07:28:37.686851 tar: ./proc/fd-003-kthread: time stamp 2024-08-31 05:25:43 is 18776142.22212224 s in the future
1362 07:28:37.821341 tar: ./proc/setns-dcache: time stamp 2024-08-31 05:25:45 is 18776144.086946199 s in the future
1363 07:28:37.943230 tar: ./proc/proc-uptime-001: time stamp 2024-08-31 05:25:45 is 18776143.964849532 s in the future
1364 07:28:38.084997 tar: ./proc/read: time stamp 2024-08-31 05:25:45 is 18776143.822890782 s in the future
1365 07:28:38.205819 tar: ./proc/setns-sysvipc: time stamp 2024-08-31 05:25:45 is 18776143.703268615 s in the future
1366 07:28:38.338265 tar: ./proc/proc-pid-vm: time stamp 2024-08-31 05:25:44 is 18776142.569823532 s in the future
1367 07:28:38.473953 tar: ./proc/proc-self-map-files-001: time stamp 2024-08-31 05:25:44 is 18776142.436355574 s in the future
1368 07:28:38.611657 tar: ./proc/thread-self: time stamp 2024-08-31 05:25:45 is 18776143.297436574 s in the future
1369 07:28:38.747039 tar: ./proc/proc-self-wchan: time stamp 2024-08-31 05:25:44 is 18776142.161223282 s in the future
1370 07:28:38.871797 tar: ./proc/self: time stamp 2024-08-31 05:25:45 is 18776143.036035699 s in the future
1371 07:28:38.921638 tar: ./proc: time stamp 2024-08-31 05:26:18 is 18776175.986046449 s in the future
1372 07:28:39.072003 tar: ./syscall_user_dispatch/config: time stamp 2024-08-20 15:21:34 is 17861491.837393824 s in the future
1373 07:28:39.198355 tar: ./syscall_user_dispatch/sud_benchmark: time stamp 2024-08-31 05:25:53 is 18776150.712172574 s in the future
1374 07:28:39.324444 tar: ./syscall_user_dispatch/sud_test: time stamp 2024-08-31 05:25:52 is 18776149.585541865 s in the future
1375 07:28:39.381807 tar: ./syscall_user_dispatch: time stamp 2024-08-31 05:26:22 is 18776179.527203449 s in the future
1376 07:28:39.539275 tar: ./user/test_user_copy.sh: time stamp 2024-08-20 15:21:34 is 17861491.369085699 s in the future
1377 07:28:39.647056 tar: ./user/config: time stamp 2024-08-20 15:21:34 is 17861491.260295907 s in the future
1378 07:28:39.703100 tar: ./user: time stamp 2024-08-31 05:26:23 is 18776180.203430407 s in the future
1379 07:28:39.888929 tar: ./net/lib.sh: time stamp 2024-08-20 15:21:34 is 17861491.018423782 s in the future
1380 07:28:40.040276 tar: ./net/netfilter/nf_nat_edemux.sh: time stamp 2024-08-20 15:21:34 is 17861490.868761032 s in the future
1381 07:28:40.159284 tar: ./net/netfilter/conntrack_tcp_unreplied.sh: time stamp 2024-08-20 15:21:34 is 17861490.751456907 s in the future
1382 07:28:40.291727 tar: ./net/netfilter/connect_close: time stamp 2024-08-31 05:25:40 is 18776136.618000073 s in the future
1383 07:28:40.413554 tar: ./net/netfilter/lib.sh: time stamp 2024-08-20 15:21:34 is 17861490.495760865 s in the future
1384 07:28:40.548405 tar: ./net/netfilter/nft_conntrack_helper.sh: time stamp 2024-08-20 15:21:34 is 17861490.362297657 s in the future
1385 07:28:40.662789 tar: ./net/netfilter/nft_meta.sh: time stamp 2024-08-20 15:21:34 is 17861490.245545615 s in the future
1386 07:28:40.782506 tar: ./net/netfilter/rpath.sh: time stamp 2024-08-20 15:21:34 is 17861490.126480948 s in the future
1387 07:28:40.909790 tar: ./net/netfilter/br_netfilter_queue.sh: time stamp 2024-08-20 15:21:34 is 17861490.000764573 s in the future
1388 07:28:41.033771 tar: ./net/netfilter/nft_queue.sh: time stamp 2024-08-20 15:21:34 is 17861489.87599399 s in the future
1389 07:28:41.140017 tar: ./net/netfilter/nft_synproxy.sh: time stamp 2024-08-20 15:21:34 is 17861489.770080865 s in the future
1390 07:28:41.258853 tar: ./net/netfilter/nft_concat_range.sh: time stamp 2024-08-20 15:21:34 is 17861489.651339907 s in the future
1391 07:28:41.384049 tar: ./net/netfilter/sctp_collision: time stamp 2024-08-31 05:25:40 is 18776135.525256407 s in the future
1392 07:28:41.516595 tar: ./net/netfilter/config: time stamp 2024-08-20 15:21:34 is 17861489.392403948 s in the future
1393 07:28:41.656340 tar: ./net/netfilter/nft_nat.sh: time stamp 2024-08-20 15:21:34 is 17861489.252948157 s in the future
1394 07:28:41.792029 tar: ./net/netfilter/conntrack_icmp_related.sh: time stamp 2024-08-20 15:21:34 is 17861489.117623948 s in the future
1395 07:28:41.909611 tar: ./net/netfilter/audit_logread: time stamp 2024-08-31 05:25:40 is 18776134.999798198 s in the future
1396 07:28:42.044245 tar: ./net/netfilter/conntrack_sctp_collision.sh: time stamp 2024-08-20 15:21:34 is 17861488.866364907 s in the future
1397 07:28:42.158816 tar: ./net/netfilter/nft_audit.sh: time stamp 2024-08-20 15:21:34 is 17861488.750703157 s in the future
1398 07:28:42.317669 tar: ./net/netfilter/conntrack_dump_flush: time stamp 2024-08-31 05:25:40 is 18776134.59205949 s in the future
1399 07:28:42.426799 tar: ./net/netfilter/settings: time stamp 2024-08-20 15:21:34 is 17861488.482253865 s in the future
1400 07:28:42.551877 tar: ./net/netfilter/nft_zones_many.sh: time stamp 2024-08-20 15:21:34 is 17861488.357555823 s in the future
1401 07:28:42.675883 tar: ./net/netfilter/br_netfilter.sh: time stamp 2024-08-20 15:21:34 is 17861488.233430365 s in the future
1402 07:28:42.818100 tar: ./net/netfilter/nft_concat_range_perf.sh: time stamp 2024-08-20 15:21:34 is 17861488.091680448 s in the future
1403 07:28:42.927303 tar: ./net/netfilter/conntrack_vrf.sh: time stamp 2024-08-20 15:21:34 is 17861487.98219349 s in the future
1404 07:28:43.077609 tar: ./net/netfilter/nf_queue: time stamp 2024-08-31 05:25:40 is 18776133.831772406 s in the future
1405 07:28:43.201820 tar: ./net/netfilter/nft_fib.sh: time stamp 2024-08-20 15:21:34 is 17861487.707886406 s in the future
1406 07:28:43.318640 tar: ./net/netfilter/nft_nat_zones.sh: time stamp 2024-08-20 15:21:34 is 17861487.591083865 s in the future
1407 07:28:43.437509 tar: ./net/netfilter/conntrack_ipip_mtu.sh: time stamp 2024-08-20 15:21:34 is 17861487.473012948 s in the future
1408 07:28:43.562768 tar: ./net/netfilter/nf_conntrack_packetdrill.sh: time stamp 2024-08-20 15:21:34 is 17861487.347934323 s in the future
1409 07:28:43.667673 tar: ./net/netfilter/bridge_brouter.sh: time stamp 2024-08-20 15:21:34 is 17861487.240726406 s in the future
1410 07:28:43.855591 tar: ./net/netfilter/packetdrill/conntrack_synack_reuse.pkt: time stamp 2024-08-20 15:21:34 is 17861487.05600774 s in the future
1411 07:28:43.970130 tar: ./net/netfilter/packetdrill/common.sh: time stamp 2024-08-20 15:21:34 is 17861486.93937049 s in the future
1412 07:28:44.095718 tar: ./net/netfilter/packetdrill/conntrack_inexact_rst.pkt: time stamp 2024-08-20 15:21:34 is 17861486.815720323 s in the future
1413 07:28:44.220055 tar: ./net/netfilter/packetdrill/conntrack_rst_invalid.pkt: time stamp 2024-08-20 15:21:34 is 17861486.690615906 s in the future
1414 07:28:44.339077 tar: ./net/netfilter/packetdrill/conntrack_synack_old.pkt: time stamp 2024-08-20 15:21:34 is 17861486.572285823 s in the future
1415 07:28:44.455946 tar: ./net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt: time stamp 2024-08-20 15:21:34 is 17861486.455491781 s in the future
1416 07:28:44.571620 tar: ./net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt: time stamp 2024-08-20 15:21:34 is 17861486.340308906 s in the future
1417 07:28:44.620762 tar: ./net/netfilter/packetdrill: time stamp 2024-08-20 15:21:34 is 17861486.288590615 s in the future
1418 07:28:44.744866 tar: ./net/netfilter/nft_flowtable.sh: time stamp 2024-08-20 15:21:34 is 17861486.164443781 s in the future
1419 07:28:44.869912 tar: ./net/netfilter/ipvs.sh: time stamp 2024-08-20 15:21:34 is 17861486.038237115 s in the future
1420 07:28:45.011913 tar: ./net/netfilter/xt_string.sh: time stamp 2024-08-20 15:21:34 is 17861485.896598573 s in the future
1421 07:28:45.076585 tar: ./net/netfilter: time stamp 2024-08-31 05:26:17 is 18776168.831046573 s in the future
1422 07:28:45.284985 tar: ./net/tcp_ao/icmps-discard_ipv4: time stamp 2024-08-31 05:25:35 is 18776126.623424073 s in the future
1423 07:28:45.462937 tar: ./net/tcp_ao/connect-deny_ipv6: time stamp 2024-08-31 05:25:37 is 18776128.446203906 s in the future
1424 07:28:45.646113 tar: ./net/tcp_ao/unsigned-md5_ipv4: time stamp 2024-08-31 05:25:37 is 18776128.262858364 s in the future
1425 07:28:45.819688 tar: ./net/tcp_ao/icmps-discard_ipv6: time stamp 2024-08-31 05:25:38 is 18776129.089569406 s in the future
1426 07:28:46.068278 tar: ./net/tcp_ao/icmps-accept_ipv6: time stamp 2024-08-31 05:25:38 is 18776128.840521948 s in the future
1427 07:28:46.243880 tar: ./net/tcp_ao/rst_ipv4: time stamp 2024-08-31 05:25:36 is 18776126.663792489 s in the future
1428 07:28:46.404698 tar: ./net/tcp_ao/seq-ext_ipv6: time stamp 2024-08-31 05:25:39 is 18776129.503938823 s in the future
1429 07:28:46.577429 tar: ./net/tcp_ao/seq-ext_ipv4: time stamp 2024-08-31 05:25:36 is 18776126.331246823 s in the future
1430 07:28:46.760771 tar: ./net/tcp_ao/icmps-accept_ipv4: time stamp 2024-08-31 05:25:35 is 18776125.148663031 s in the future
1431 07:28:46.937581 tar: ./net/tcp_ao/bench-lookups_ipv4: time stamp 2024-08-31 05:25:34 is 18776123.971573864 s in the future
1432 07:28:47.187011 tar: ./net/tcp_ao/rst_ipv6: time stamp 2024-08-31 05:25:39 is 18776128.720372948 s in the future
1433 07:28:47.368985 tar: ./net/tcp_ao/restore_ipv4: time stamp 2024-08-31 05:25:35 is 18776124.539302239 s in the future
1434 07:28:47.535064 tar: ./net/tcp_ao/connect_ipv6: time stamp 2024-08-31 05:25:37 is 18776126.372987948 s in the future
1435 07:28:47.662119 tar: ./net/tcp_ao/config: time stamp 2024-08-20 15:21:34 is 17861483.245943531 s in the future
1436 07:28:47.838910 tar: ./net/tcp_ao/key-management_ipv4: time stamp 2024-08-31 05:25:35 is 18776124.069893031 s in the future
1437 07:28:48.020021 tar: ./net/tcp_ao/bench-lookups_ipv6: time stamp 2024-08-31 05:25:37 is 18776125.888634906 s in the future
1438 07:28:48.194682 tar: ./net/tcp_ao/setsockopt-closed_ipv6: time stamp 2024-08-31 05:25:39 is 18776127.714133447 s in the future
1439 07:28:48.354511 tar: ./net/tcp_ao/connect_ipv4: time stamp 2024-08-31 05:25:34 is 18776122.553869989 s in the future
1440 07:28:48.471963 tar: ./net/tcp_ao/settings: time stamp 2024-08-20 15:21:34 is 17861482.435966656 s in the future
1441 07:28:48.637232 tar: ./net/tcp_ao/key-management_ipv6: time stamp 2024-08-31 05:25:38 is 18776126.271723197 s in the future
1442 07:28:48.837238 tar: ./net/tcp_ao/connect-deny_ipv4: time stamp 2024-08-31 05:25:34 is 18776122.071969197 s in the future
1443 07:28:49.006577 tar: ./net/tcp_ao/self-connect_ipv6: time stamp 2024-08-31 05:25:39 is 18776126.902855656 s in the future
1444 07:28:49.165361 tar: ./net/tcp_ao/self-connect_ipv4: time stamp 2024-08-31 05:25:36 is 18776123.743741364 s in the future
1445 07:28:49.345204 tar: ./net/tcp_ao/restore_ipv6: time stamp 2024-08-31 05:25:38 is 18776125.563041156 s in the future
1446 07:28:49.536857 tar: ./net/tcp_ao/setsockopt-closed_ipv4: time stamp 2024-08-31 05:25:36 is 18776123.371727822 s in the future
1447 07:28:49.740029 tar: ./net/tcp_ao/unsigned-md5_ipv6: time stamp 2024-08-31 05:25:40 is 18776127.169034614 s in the future
1448 07:28:49.787830 tar: ./net/tcp_ao: time stamp 2024-08-31 05:26:17 is 18776164.118550989 s in the future
1449 07:28:49.965742 tar: ./net/mptcp/mptcp_connect: time stamp 2024-08-31 05:25:31 is 18776117.943132072 s in the future
1450 07:28:50.136982 tar: ./net/mptcp/mptcp_join.sh: time stamp 2024-08-30 01:40:58 is 18676244.771126281 s in the future
1451 07:28:50.281036 tar: ./net/mptcp/mptcp_sockopt: time stamp 2024-08-31 05:25:32 is 18776118.627077072 s in the future
1452 07:28:50.407110 tar: ./net/mptcp/pm_nl_ctl: time stamp 2024-08-31 05:25:32 is 18776118.501272947 s in the future
1453 07:28:50.523578 tar: ./net/mptcp/pm_netlink.sh: time stamp 2024-08-20 15:21:34 is 17861480.384439156 s in the future
1454 07:28:50.639976 tar: ./net/mptcp/config: time stamp 2024-08-20 15:21:34 is 17861480.267740781 s in the future
1455 07:28:50.781737 tar: ./net/mptcp/mptcp_inq: time stamp 2024-08-31 05:25:32 is 18776118.126416364 s in the future
1456 07:28:50.934994 tar: ./net/mptcp/diag.sh: time stamp 2024-08-20 15:21:34 is 17861479.972368197 s in the future
1457 07:28:51.049504 tar: ./net/mptcp/settings: time stamp 2024-08-20 15:21:34 is 17861479.859051155 s in the future
1458 07:28:51.171299 tar: ./net/mptcp/mptcp_lib.sh: time stamp 2024-08-30 01:40:58 is 18676243.737013322 s in the future
1459 07:28:51.299491 tar: ./net/mptcp/mptcp_connect.sh: time stamp 2024-08-20 15:21:34 is 17861479.608989947 s in the future
1460 07:28:51.425568 tar: ./net/mptcp/userspace_pm.sh: time stamp 2024-08-20 15:21:34 is 17861479.483596989 s in the future
1461 07:28:51.542057 tar: ./net/mptcp/mptcp_sockopt.sh: time stamp 2024-08-20 15:21:34 is 17861479.36688828 s in the future
1462 07:28:51.663894 tar: ./net/mptcp/simult_flows.sh: time stamp 2024-08-20 15:21:34 is 17861479.24463703 s in the future
1463 07:28:51.723450 tar: ./net/mptcp: time stamp 2024-08-31 05:26:16 is 18776161.183771072 s in the future
1464 07:28:51.900112 tar: ./net/openvswitch/openvswitch.sh: time stamp 2024-08-20 15:21:34 is 17861479.008551864 s in the future
1465 07:28:52.059038 tar: ./net/openvswitch/ovs-dpctl.py: time stamp 2024-08-20 15:21:34 is 17861478.849684155 s in the future
1466 07:28:52.197741 tar: ./net/openvswitch/settings: time stamp 2024-08-20 15:21:34 is 17861478.711225864 s in the future
1467 07:28:52.263371 tar: ./net/openvswitch: time stamp 2024-08-31 05:26:17 is 18776161.644435489 s in the future
1468 07:28:52.437785 tar: ./net/af_unix/scm_pidfd: time stamp 2024-08-31 05:25:31 is 18776115.46951728 s in the future
1469 07:28:52.589216 tar: ./net/af_unix/msg_oob: time stamp 2024-08-31 05:25:31 is 18776115.319141864 s in the future
1470 07:28:52.756406 tar: ./net/af_unix/scm_rights: time stamp 2024-08-31 05:25:31 is 18776115.152339989 s in the future
1471 07:28:52.898521 tar: ./net/af_unix/unix_connect: time stamp 2024-08-31 05:25:31 is 18776115.010484322 s in the future
1472 07:28:53.030881 tar: ./net/af_unix/config: time stamp 2024-08-20 15:21:34 is 17861477.877511864 s in the future
1473 07:28:53.178828 tar: ./net/af_unix/diag_uid: time stamp 2024-08-31 05:25:30 is 18776113.728623572 s in the future
1474 07:28:53.236987 tar: ./net/af_unix: time stamp 2024-08-31 05:26:16 is 18776159.669390614 s in the future
1475 07:28:53.390474 tar: ./net/forwarding/mirror_gre_bound.sh: time stamp 2024-08-20 15:21:34 is 17861477.51856928 s in the future
1476 07:28:53.506976 tar: ./net/forwarding/mirror_gre_lib.sh: time stamp 2024-08-20 15:21:34 is 17861477.401981447 s in the future
1477 07:28:53.637709 tar: ./net/forwarding/bridge_fdb_learning_limit.sh: time stamp 2024-08-20 15:21:34 is 17861477.273253363 s in the future
1478 07:28:53.777770 tar: ./net/forwarding/vxlan_bridge_1q_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861477.131261572 s in the future
1479 07:28:53.899870 tar: ./net/forwarding/gre_inner_v6_multipath.sh: time stamp 2024-08-20 15:21:34 is 17861477.009637572 s in the future
1480 07:28:54.050267 tar: ./net/forwarding/mirror_gre_bridge_1d_vlan.sh: time stamp 2024-08-20 15:21:34 is 17861476.859894863 s in the future
1481 07:28:54.177612 tar: ./net/forwarding/fib_offload_lib.sh: time stamp 2024-08-20 15:21:34 is 17861476.73099753 s in the future
1482 07:28:54.303834 tar: ./net/forwarding/router_multipath.sh: time stamp 2024-08-20 15:21:34 is 17861476.605859322 s in the future
1483 07:28:54.425906 tar: ./net/forwarding/router_bridge_pvid_vlan_upper.sh: time stamp 2024-08-20 15:21:34 is 17861476.48401853 s in the future
1484 07:28:54.548786 tar: ./net/forwarding/ip6gre_hier.sh: time stamp 2024-08-20 15:21:34 is 17861476.359501655 s in the future
1485 07:28:54.670816 tar: ./net/forwarding/vxlan_bridge_1d_port_8472_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861476.238936405 s in the future
1486 07:28:54.790781 tar: ./net/forwarding/sch_tbf_etsprio.sh: time stamp 2024-08-20 15:21:34 is 17861476.117625447 s in the future
1487 07:28:54.933872 tar: ./net/forwarding/bridge_vlan_mcast.sh: time stamp 2024-08-20 15:21:34 is 17861475.97491403 s in the future
1488 07:28:55.056821 tar: ./net/forwarding/lib.sh: time stamp 2024-08-27 23:50:52 is 18496833.850780405 s in the future
1489 07:28:55.195801 tar: ./net/forwarding/ip6_forward_instats_vrf.sh: time stamp 2024-08-20 15:21:34 is 17861475.71342128 s in the future
1490 07:28:55.329394 tar: ./net/forwarding/gre_multipath.sh: time stamp 2024-08-20 15:21:34 is 17861475.579913655 s in the future
1491 07:28:55.468495 tar: ./net/forwarding/skbedit_priority.sh: time stamp 2024-08-20 15:21:34 is 17861475.441434155 s in the future
1492 07:28:55.609455 tar: ./net/forwarding/gre_multipath_nh_res.sh: time stamp 2024-08-20 15:21:34 is 17861475.300149447 s in the future
1493 07:28:55.737752 tar: ./net/forwarding/router.sh: time stamp 2024-08-20 15:21:34 is 17861475.171289738 s in the future
1494 07:28:55.871057 tar: ./net/forwarding/tc_flower_l2_miss.sh: time stamp 2024-08-20 15:21:34 is 17861475.037765863 s in the future
1495 07:28:56.002695 tar: ./net/forwarding/bridge_vlan_unaware.sh: time stamp 2024-08-20 15:21:34 is 17861474.907577905 s in the future
1496 07:28:56.118603 tar: ./net/forwarding/vxlan_bridge_1q_port_8472.sh: time stamp 2024-08-20 15:21:34 is 17861474.791377155 s in the future
1497 07:28:56.242692 tar: ./net/forwarding/tc_flower_port_range.sh: time stamp 2024-08-20 15:21:34 is 17861474.666290072 s in the future
1498 07:28:56.367730 tar: ./net/forwarding/tc_police.sh: time stamp 2024-08-20 15:21:34 is 17861474.541136197 s in the future
1499 07:28:56.501336 tar: ./net/forwarding/sch_ets_core.sh: time stamp 2024-08-20 15:21:34 is 17861474.40708478 s in the future
1500 07:28:56.626333 tar: ./net/forwarding/tc_chains.sh: time stamp 2024-08-20 15:21:34 is 17861474.282738321 s in the future
1501 07:28:56.771666 tar: ./net/forwarding/ipip_flat_gre_keys.sh: time stamp 2024-08-20 15:21:34 is 17861474.137066155 s in the future
1502 07:28:56.905222 tar: ./net/forwarding/tc_vlan_modify.sh: time stamp 2024-08-20 15:21:34 is 17861474.00347953 s in the future
1503 07:28:57.035416 tar: ./net/forwarding/ip6gre_lib.sh: time stamp 2024-08-20 15:21:34 is 17861473.87328728 s in the future
1504 07:28:57.160597 tar: ./net/forwarding/vxlan_bridge_1q.sh: time stamp 2024-08-20 15:21:34 is 17861473.748935863 s in the future
1505 07:28:57.281552 tar: ./net/forwarding/router_mpath_nh.sh: time stamp 2024-08-20 15:21:34 is 17861473.628163321 s in the future
1506 07:28:57.413956 tar: ./net/forwarding/tc_mpls_l2vpn.sh: time stamp 2024-08-20 15:21:34 is 17861473.494631655 s in the future
1507 07:28:57.544429 tar: ./net/forwarding/pedit_ip.sh: time stamp 2024-08-20 15:21:34 is 17861473.364462738 s in the future
1508 07:28:57.668360 tar: ./net/forwarding/sch_tbf_ets.sh: time stamp 2024-08-20 15:21:34 is 17861473.240070905 s in the future
1509 07:28:57.790358 tar: ./net/forwarding/mirror_gre_lag_lacp.sh: time stamp 2024-08-20 15:21:34 is 17861473.119336696 s in the future
1510 07:28:57.918758 tar: ./net/forwarding/mirror_topo_lib.sh: time stamp 2024-08-20 15:21:34 is 17861472.989824321 s in the future
1511 07:28:58.044798 tar: ./net/forwarding/sch_tbf_root.sh: time stamp 2024-08-20 15:21:34 is 17861472.86400103 s in the future
1512 07:28:58.185653 tar: ./net/forwarding/vxlan_symmetric.sh: time stamp 2024-08-20 15:21:34 is 17861472.723102988 s in the future
1513 07:28:58.310691 tar: ./net/forwarding/ip6gre_hier_key.sh: time stamp 2024-08-20 15:21:34 is 17861472.59780653 s in the future
1514 07:28:58.432635 tar: ./net/forwarding/bridge_mdb_host.sh: time stamp 2024-08-20 15:21:34 is 17861472.476989738 s in the future
1515 07:28:58.587354 tar: ./net/forwarding/sch_tbf_prio.sh: time stamp 2024-08-20 15:21:34 is 17861472.321862488 s in the future
1516 07:28:58.719716 tar: ./net/forwarding/ipip_flat_gre_key.sh: time stamp 2024-08-20 15:21:34 is 17861472.188892821 s in the future
1517 07:28:58.840629 tar: ./net/forwarding/bridge_mdb_port_down.sh: time stamp 2024-08-20 15:21:34 is 17861472.068367655 s in the future
1518 07:28:58.974066 tar: ./net/forwarding/dual_vxlan_bridge.sh: time stamp 2024-08-20 15:21:34 is 17861471.93466303 s in the future
1519 07:28:59.128669 tar: ./net/forwarding/gre_multipath_nh.sh: time stamp 2024-08-20 15:21:34 is 17861471.779717488 s in the future
1520 07:28:59.253687 tar: ./net/forwarding/router_mpath_nh_res.sh: time stamp 2024-08-20 15:21:34 is 17861471.654772779 s in the future
1521 07:28:59.383000 tar: ./net/forwarding/mirror_gre_bridge_1d.sh: time stamp 2024-08-20 15:21:34 is 17861471.526059529 s in the future
1522 07:28:59.503719 tar: ./net/forwarding/router_bridge_lag.sh: time stamp 2024-08-20 15:21:34 is 17861471.404618779 s in the future
1523 07:28:59.637411 tar: ./net/forwarding/router_nh.sh: time stamp 2024-08-20 15:21:34 is 17861471.270963238 s in the future
1524 07:28:59.762429 tar: ./net/forwarding/router_vid_1.sh: time stamp 2024-08-20 15:21:34 is 17861471.146296904 s in the future
1525 07:28:59.891679 tar: ./net/forwarding/tc_tunnel_key.sh: time stamp 2024-08-20 15:21:34 is 17861471.017244696 s in the future
1526 07:29:00.013696 tar: ./net/forwarding/router_bridge_vlan_upper.sh: time stamp 2024-08-20 15:21:34 is 17861470.896082863 s in the future
1527 07:29:00.146074 tar: ./net/forwarding/sch_red.sh: time stamp 2024-08-20 15:21:34 is 17861470.762089779 s in the future
1528 07:29:00.279566 tar: ./net/forwarding/min_max_mtu.sh: time stamp 2024-08-20 15:21:34 is 17861470.629104821 s in the future
1529 07:29:00.407689 tar: ./net/forwarding/config: time stamp 2024-08-20 15:21:34 is 17861470.500044904 s in the future
1530 07:29:00.546429 tar: ./net/forwarding/q_in_vni_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861470.362206529 s in the future
1531 07:29:00.672718 tar: ./net/forwarding/ipip_hier_gre_key.sh: time stamp 2024-08-20 15:21:34 is 17861470.236811238 s in the future
1532 07:29:00.789610 tar: ./net/forwarding/vxlan_bridge_1d_port_8472.sh: time stamp 2024-08-20 15:21:34 is 17861470.120402863 s in the future
1533 07:29:00.916615 tar: ./net/forwarding/ipip_flat_gre.sh: time stamp 2024-08-20 15:21:34 is 17861469.991241446 s in the future
1534 07:29:01.063689 tar: ./net/forwarding/router_mpath_nh_lib.sh: time stamp 2024-08-20 15:21:34 is 17861469.844986821 s in the future
1535 07:29:01.188898 tar: ./net/forwarding/router_bridge.sh: time stamp 2024-08-20 15:21:34 is 17861469.719534113 s in the future
1536 07:29:01.315025 tar: ./net/forwarding/ip6gre_inner_v4_multipath.sh: time stamp 2024-08-20 15:21:34 is 17861469.594740738 s in the future
1537 07:29:01.450616 tar: ./net/forwarding/ip6gre_flat_keys.sh: time stamp 2024-08-20 15:21:34 is 17861469.457369613 s in the future
1538 07:29:01.631792 tar: ./net/forwarding/vxlan_bridge_1d_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861469.278008821 s in the future
1539 07:29:01.765326 tar: ./net/forwarding/forwarding.config.sample: time stamp 2024-08-20 15:21:34 is 17861469.144067363 s in the future
1540 07:29:01.889288 tar: ./net/forwarding/sch_tbf_core.sh: time stamp 2024-08-20 15:21:34 is 17861469.019387821 s in the future
1541 07:29:02.018584 tar: ./net/forwarding/tc_shblocks.sh: time stamp 2024-08-20 15:21:34 is 17861468.890199821 s in the future
1542 07:29:02.139268 tar: ./net/forwarding/no_forwarding.sh: time stamp 2024-08-30 01:40:58 is 18676232.769247404 s in the future
1543 07:29:02.273776 tar: ./net/forwarding/tc_common.sh: time stamp 2024-08-20 15:21:34 is 17861468.634881362 s in the future
1544 07:29:02.397787 tar: ./net/forwarding/local_termination.sh: time stamp 2024-08-30 01:40:58 is 18676232.510554237 s in the future
1545 07:29:02.551713 tar: ./net/forwarding/router_broadcast.sh: time stamp 2024-08-20 15:21:34 is 17861468.356579779 s in the future
1546 07:29:02.670486 tar: ./net/forwarding/bridge_locked_port.sh: time stamp 2024-08-20 15:21:34 is 17861468.237666529 s in the future
1547 07:29:02.780658 tar: ./net/forwarding/settings: time stamp 2024-08-20 15:21:34 is 17861468.126345612 s in the future
1548 07:29:02.908148 tar: ./net/forwarding/mirror_gre_bridge_1q_lag.sh: time stamp 2024-08-20 15:21:34 is 17861468.001922279 s in the future
1549 07:29:03.028073 tar: ./net/forwarding/ip6gre_inner_v6_multipath.sh: time stamp 2024-08-20 15:21:34 is 17861467.880960946 s in the future
1550 07:29:03.137269 tar: ./net/forwarding/sch_ets.sh: time stamp 2024-08-20 15:21:34 is 17861467.770709446 s in the future
1551 07:29:03.275092 tar: ./net/forwarding/mirror_gre_topo_lib.sh: time stamp 2024-08-20 15:21:34 is 17861467.634098737 s in the future
1552 07:29:03.390670 tar: ./net/forwarding/router_mpath_seed.sh: time stamp 2024-08-20 15:21:34 is 17861467.518037904 s in the future
1553 07:29:03.524035 tar: ./net/forwarding/tc_flower_router.sh: time stamp 2024-08-20 15:21:34 is 17861467.384625529 s in the future
1554 07:29:03.649111 tar: ./net/forwarding/bridge_igmp.sh: time stamp 2024-08-20 15:21:34 is 17861467.259486029 s in the future
1555 07:29:03.775561 tar: ./net/forwarding/mirror_gre.sh: time stamp 2024-08-20 15:21:34 is 17861467.133601904 s in the future
1556 07:29:03.899619 tar: ./net/forwarding/custom_multipath_hash.sh: time stamp 2024-08-20 15:21:34 is 17861467.009233904 s in the future
1557 07:29:04.020315 tar: ./net/forwarding/tc_actions.sh: time stamp 2024-08-20 15:21:34 is 17861466.887990112 s in the future
1558 07:29:04.166593 tar: ./net/forwarding/router_multicast.sh: time stamp 2024-08-20 15:21:34 is 17861466.741588612 s in the future
1559 07:29:04.333889 tar: ./net/forwarding/devlink_lib.sh: time stamp 2024-08-20 15:21:34 is 17861466.574639279 s in the future
1560 07:29:04.450500 tar: ./net/forwarding/q_in_vni.sh: time stamp 2024-08-20 15:21:34 is 17861466.458740446 s in the future
1561 07:29:04.587498 tar: ./net/forwarding/lib_sh_test.sh: time stamp 2024-08-20 15:21:34 is 17861466.320610737 s in the future
1562 07:29:04.708251 tar: ./net/forwarding/mirror_vlan.sh: time stamp 2024-08-20 15:21:34 is 17861466.200324779 s in the future
1563 07:29:04.834410 tar: ./net/forwarding/router_bridge_1d.sh: time stamp 2024-08-20 15:21:34 is 17861466.074323362 s in the future
1564 07:29:04.966787 tar: ./net/forwarding/router_bridge_1d_lag.sh: time stamp 2024-08-20 15:21:34 is 17861465.941787279 s in the future
1565 07:29:05.084602 tar: ./net/forwarding/mirror_gre_vlan.sh: time stamp 2024-08-20 15:21:34 is 17861465.824893487 s in the future
1566 07:29:05.208600 tar: ./net/forwarding/router_bridge_vlan.sh: time stamp 2024-08-20 15:21:34 is 17861465.699764445 s in the future
1567 07:29:05.334636 tar: ./net/forwarding/mirror_gre_changes.sh: time stamp 2024-08-20 15:21:34 is 17861465.573842695 s in the future
1568 07:29:05.452585 tar: ./net/forwarding/vxlan_bridge_1q_port_8472_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861465.45796782 s in the future
1569 07:29:05.575636 tar: ./net/forwarding/sch_ets_tests.sh: time stamp 2024-08-20 15:21:34 is 17861465.332928362 s in the future
1570 07:29:05.702036 tar: ./net/forwarding/ip6gre_custom_multipath_hash.sh: time stamp 2024-08-20 15:21:34 is 17861465.207633695 s in the future
1571 07:29:05.827287 tar: ./net/forwarding/pedit_dsfield.sh: time stamp 2024-08-20 15:21:34 is 17861465.081628654 s in the future
1572 07:29:05.952387 tar: ./net/forwarding/gre_custom_multipath_hash.sh: time stamp 2024-08-20 15:21:34 is 17861464.957471904 s in the future
1573 07:29:06.075467 tar: ./net/forwarding/vxlan_asymmetric.sh: time stamp 2024-08-20 15:21:34 is 17861464.832391445 s in the future
1574 07:29:06.201504 tar: ./net/forwarding/bridge_mld.sh: time stamp 2024-08-20 15:21:34 is 17861464.70722382 s in the future
1575 07:29:06.337289 tar: ./net/forwarding/vxlan_symmetric_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861464.57230257 s in the future
1576 07:29:06.459230 tar: ./net/forwarding/mirror_lib.sh: time stamp 2024-08-20 15:21:34 is 17861464.448655404 s in the future
1577 07:29:06.598000 tar: ./net/forwarding/vxlan_bridge_1d.sh: time stamp 2024-08-20 15:21:34 is 17861464.310170487 s in the future
1578 07:29:06.710638 tar: ./net/forwarding/bridge_vlan_aware.sh: time stamp 2024-08-27 23:50:52 is 18496822.19848407 s in the future
1579 07:29:06.835721 tar: ./net/forwarding/bridge_sticky_fdb.sh: time stamp 2024-08-20 15:21:34 is 17861464.072469112 s in the future
1580 07:29:06.969311 tar: ./net/forwarding/ip6gre_flat_key.sh: time stamp 2024-08-20 15:21:34 is 17861463.939901195 s in the future
1581 07:29:07.093257 tar: ./net/forwarding/ipip_lib.sh: time stamp 2024-08-20 15:21:34 is 17861463.814585779 s in the future
1582 07:29:07.219415 tar: ./net/forwarding/ipip_hier_gre_keys.sh: time stamp 2024-08-20 15:21:34 is 17861463.689664029 s in the future
1583 07:29:07.361477 tar: ./net/forwarding/bridge_mdb_max.sh: time stamp 2024-08-20 15:21:34 is 17861463.546856904 s in the future
1584 07:29:07.495140 tar: ./net/forwarding/vxlan_asymmetric_ipv6.sh: time stamp 2024-08-20 15:21:34 is 17861463.414098529 s in the future
1585 07:29:07.628694 tar: ./net/forwarding/gre_inner_v4_multipath.sh: time stamp 2024-08-20 15:21:34 is 17861463.280763362 s in the future
1586 07:29:07.819350 tar: ./net/forwarding/ipip_hier_gre.sh: time stamp 2024-08-20 15:21:34 is 17861463.089003903 s in the future
1587 07:29:07.945834 tar: ./net/forwarding/mirror_gre_vlan_bridge_1q.sh: time stamp 2024-08-20 15:21:34 is 17861462.96313807 s in the future
1588 07:29:08.069857 tar: ./net/forwarding/mirror_gre_bridge_1q.sh: time stamp 2024-08-20 15:21:34 is 17861462.83877982 s in the future
1589 07:29:08.206562 tar: ./net/forwarding/pedit_l4port.sh: time stamp 2024-08-20 15:21:34 is 17861462.70112857 s in the future
1590 07:29:08.328366 tar: ./net/forwarding/mirror_gre_flower.sh: time stamp 2024-08-20 15:21:34 is 17861462.580182653 s in the future
1591 07:29:08.454552 tar: ./net/forwarding/bridge_port_isolation.sh: time stamp 2024-08-20 15:21:34 is 17861462.454331528 s in the future
1592 07:29:08.595508 tar: ./net/forwarding/bridge_mdb.sh: time stamp 2024-08-20 15:21:34 is 17861462.313392403 s in the future
1593 07:29:08.736621 tar: ./net/forwarding/tc_flower.sh: time stamp 2024-08-20 15:21:34 is 17861462.17144307 s in the future
1594 07:29:08.877442 tar: ./net/forwarding/mirror_gre_nh.sh: time stamp 2024-08-20 15:21:34 is 17861462.029791403 s in the future
1595 07:29:09.004659 tar: ./net/forwarding/mirror_gre_neigh.sh: time stamp 2024-08-20 15:21:34 is 17861461.903780653 s in the future
1596 07:29:09.137382 tar: ./net/forwarding/tc_flower_cfm.sh: time stamp 2024-08-20 15:21:34 is 17861461.771135362 s in the future
1597 07:29:09.260405 tar: ./net/forwarding/router_bridge_vlan_upper_pvid.sh: time stamp 2024-08-20 15:21:34 is 17861461.649187987 s in the future
1598 07:29:09.404588 tar: ./net/forwarding/ip6gre_hier_keys.sh: time stamp 2024-08-20 15:21:34 is 17861461.504290612 s in the future
1599 07:29:09.521201 tar: ./net/forwarding/ip6gre_flat.sh: time stamp 2024-08-20 15:21:34 is 17861461.38673282 s in the future
1600 07:29:09.583920 tar: ./net/forwarding: time stamp 2024-08-31 05:26:16 is 18776143.322905487 s in the future
1601 07:29:09.737583 tar: ./net/hsr/hsr_redbox.sh: time stamp 2024-08-20 15:21:34 is 17861461.170649487 s in the future
1602 07:29:09.875347 tar: ./net/hsr/config: time stamp 2024-08-20 15:21:34 is 17861461.031850737 s in the future
1603 07:29:09.996032 tar: ./net/hsr/hsr_ping.sh: time stamp 2024-08-20 15:21:34 is 17861460.911247195 s in the future
1604 07:29:10.129362 tar: ./net/hsr/hsr_common.sh: time stamp 2024-08-20 15:21:34 is 17861460.77787757 s in the future
1605 07:29:10.184565 tar: ./net/hsr: time stamp 2024-08-31 05:26:16 is 18776142.722286445 s in the future
1606 07:29:10.243875 tar: ./net: time stamp 2024-08-27 23:50:52 is 18496818.661911153 s in the future
1607 07:29:10.401648 tar: ./landlock/base_test: time stamp 2024-08-31 05:25:13 is 18776079.506323236 s in the future
1608 07:29:10.644834 tar: ./landlock/fs_test: time stamp 2024-08-31 05:25:17 is 18776083.261825736 s in the future
1609 07:29:11.010503 tar: ./landlock/true: time stamp 2024-08-31 05:25:18 is 18776083.896873445 s in the future
1610 07:29:11.163045 tar: ./landlock/net_test: time stamp 2024-08-31 05:25:18 is 18776083.743579903 s in the future
1611 07:29:11.334384 tar: ./landlock/config: time stamp 2024-08-20 15:21:34 is 17861459.572649278 s in the future
1612 07:29:11.463491 tar: ./landlock/ptrace_test: time stamp 2024-08-31 05:25:18 is 18776083.443395278 s in the future
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1614 07:29:11.685693 tar: ./cpufreq/main.sh: time stamp 2024-08-20 15:21:34 is 17861459.221206611 s in the future
1615 07:29:11.803517 tar: ./cpufreq/cpufreq.sh: time stamp 2024-08-20 15:21:34 is 17861459.104367236 s in the future
1616 07:29:11.920243 tar: ./cpufreq/special-tests.sh: time stamp 2024-08-20 15:21:34 is 17861458.987615445 s in the future
1617 07:29:12.069361 tar: ./cpufreq/config: time stamp 2024-08-20 15:21:34 is 17861458.837489028 s in the future
1618 07:29:12.196218 tar: ./cpufreq/module.sh: time stamp 2024-08-20 15:21:34 is 17861458.710670695 s in the future
1619 07:29:12.320981 tar: ./cpufreq/cpu.sh: time stamp 2024-08-20 15:21:34 is 17861458.585535986 s in the future
1620 07:29:12.437509 tar: ./cpufreq/governor.sh: time stamp 2024-08-20 15:21:34 is 17861458.470549736 s in the future
1621 07:29:12.499973 tar: ./cpufreq: time stamp 2024-08-31 05:26:08 is 18776132.405643903 s in the future
1622 07:29:12.665087 tar: ./tty/tty_tstamp_update: time stamp 2024-08-31 05:25:57 is 18776121.242282403 s in the future
1623 07:29:12.719298 tar: ./tty: time stamp 2024-08-31 05:26:23 is 18776147.186875153 s in the future
1624 07:29:12.877860 tar: ./zram/zram_lib.sh: time stamp 2024-08-20 15:21:34 is 17861458.029109528 s in the future
1625 07:29:13.010010 tar: ./zram/zram02.sh: time stamp 2024-08-20 15:21:34 is 17861457.896850028 s in the future
1626 07:29:13.128498 tar: ./zram/zram.sh: time stamp 2024-08-20 15:21:34 is 17861457.778340236 s in the future
1627 07:29:13.238475 tar: ./zram/config: time stamp 2024-08-20 15:21:34 is 17861457.668025278 s in the future
1628 07:29:13.379272 tar: ./zram/zram01.sh: time stamp 2024-08-20 15:21:34 is 17861457.528077444 s in the future
1629 07:29:13.436513 tar: ./zram: time stamp 2024-08-31 05:26:24 is 18776147.470200528 s in the future
1630 07:29:13.592266 tar: ./static_keys/test_static_keys.sh: time stamp 2024-08-20 15:21:34 is 17861457.316603194 s in the future
1631 07:29:13.709695 tar: ./static_keys/config: time stamp 2024-08-20 15:21:34 is 17861457.197134778 s in the future
1632 07:29:13.763860 tar: ./static_keys: time stamp 2024-08-31 05:26:21 is 18776144.142574653 s in the future
1633 07:29:14.061775 tar: ./dmabuf-heaps/dmabuf-heap: time stamp 2024-08-31 05:24:02 is 18776004.844933236 s in the future
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1635 07:29:14.253641 tar: ./dmabuf-heaps: time stamp 2024-08-31 05:26:09 is 18776131.652544403 s in the future
1636 07:29:14.457682 tar: ./rtc/rtctest: time stamp 2024-08-31 05:25:50 is 18776112.450575736 s in the future
1637 07:29:14.591031 tar: ./rtc/setdate: time stamp 2024-08-31 05:25:50 is 18776112.315764236 s in the future
1638 07:29:14.718922 tar: ./rtc/settings: time stamp 2024-08-20 15:21:34 is 17861456.187164069 s in the future
1639 07:29:14.772916 tar: ./rtc: time stamp 2024-08-31 05:26:21 is 18776143.132361819 s in the future
1640 07:29:14.941297 tar: ./pid_namespace/regression_enomem: time stamp 2024-08-31 05:25:43 is 18776104.966650861 s in the future
1641 07:29:15.066329 tar: ./pid_namespace/config: time stamp 2024-08-20 15:21:34 is 17861455.841595611 s in the future
1642 07:29:15.123546 tar: ./pid_namespace: time stamp 2024-08-31 05:26:18 is 18776139.782073444 s in the future
1643 07:29:15.283160 tar: ./ir/ir_loopback: time stamp 2024-08-31 05:25:12 is 18776073.623294736 s in the future
1644 07:29:15.421693 tar: ./ir/ir_loopback.sh: time stamp 2024-08-20 15:21:34 is 17861455.484670278 s in the future
1645 07:29:15.480954 tar: ./ir: time stamp 2024-08-31 05:26:12 is 18776133.424513028 s in the future
1646 07:29:15.619063 tar: ./power_supply/test_power_supply_properties.sh: time stamp 2024-08-20 15:21:34 is 17861455.289874694 s in the future
1647 07:29:15.737714 tar: ./power_supply/helpers.sh: time stamp 2024-08-20 15:21:34 is 17861455.169520319 s in the future
1648 07:29:15.793967 tar: ./power_supply: time stamp 2024-08-31 05:26:18 is 18776139.112599861 s in the future
1649 07:29:15.958039 tar: ./memfd/fuse_mnt: time stamp 2024-08-31 05:25:21 is 18776081.949052652 s in the future
1650 07:29:16.091262 tar: ./memfd/fuse_test: time stamp 2024-08-31 05:25:21 is 18776081.815619777 s in the future
1651 07:29:16.223624 tar: ./memfd/config: time stamp 2024-08-20 15:21:34 is 17861454.682240736 s in the future
1652 07:29:16.365527 tar: ./memfd/run_hugetlbfs_test.sh: time stamp 2024-08-20 15:21:34 is 17861454.542375319 s in the future
1653 07:29:16.508201 tar: ./memfd/memfd_test: time stamp 2024-08-31 05:25:21 is 18776081.398559361 s in the future
1654 07:29:16.634299 tar: ./memfd/run_fuse_test.sh: time stamp 2024-08-20 15:21:34 is 17861454.273621944 s in the future
1655 07:29:16.682903 tar: ./memfd: time stamp 2024-08-31 05:26:15 is 18776135.222254986 s in the future
1656 07:29:16.821439 tar: ./run_kselftest.sh: time stamp 2024-08-31 05:26:07 is 18776127.085016444 s in the future
1657 07:29:16.977318 tar: ./connector/proc_filter: time stamp 2024-08-31 05:24:01 is 18776000.930267694 s in the future
1658 07:29:17.032441 tar: ./connector: time stamp 2024-08-31 05:26:08 is 18776127.872988652 s in the future
1659 07:29:17.185931 tar: ./lsm/lsm_get_self_attr_test: time stamp 2024-08-31 05:25:20 is 18776079.721757444 s in the future
1660 07:29:17.322464 tar: ./lsm/config: time stamp 2024-08-20 15:21:34 is 17861453.584508694 s in the future
1661 07:29:17.475166 tar: ./lsm/lsm_set_self_attr_test: time stamp 2024-08-31 05:25:20 is 18776079.432965486 s in the future
1662 07:29:17.609482 tar: ./lsm/lsm_list_modules_test: time stamp 2024-08-31 05:25:20 is 18776079.297460319 s in the future
1663 07:29:17.659184 tar: ./lsm: time stamp 2024-08-31 05:26:14 is 18776133.246287652 s in the future
1664 07:29:17.875769 tar: ./iommu/iommufd: time stamp 2024-08-31 05:25:11 is 18776070.030457902 s in the future
1665 07:29:18.012219 tar: ./iommu/config: time stamp 2024-08-20 15:21:34 is 17861452.894205777 s in the future
1666 07:29:18.153993 tar: ./iommu/iommufd_fail_nth: time stamp 2024-08-31 05:25:12 is 18776070.752527694 s in the future
1667 07:29:18.216556 tar: ./iommu: time stamp 2024-08-31 05:26:12 is 18776130.688706611 s in the future
1668 07:29:18.365925 tar: ./amd-pstate/basic.sh: time stamp 2024-08-20 15:21:34 is 17861452.540545986 s in the future
1669 07:29:18.496036 tar: ./amd-pstate/run.sh: time stamp 2024-08-20 15:21:34 is 17861452.410525652 s in the future
1670 07:29:18.627509 tar: ./amd-pstate/config: time stamp 2024-08-20 15:21:34 is 17861452.278952819 s in the future
1671 07:29:18.769388 tar: ./amd-pstate/tbench.sh: time stamp 2024-08-20 15:21:34 is 17861452.137038944 s in the future
1672 07:29:18.892435 tar: ./amd-pstate/gitsource.sh: time stamp 2024-08-20 15:21:34 is 17861452.014848152 s in the future
1673 07:29:18.948528 tar: ./amd-pstate: time stamp 2024-08-31 05:26:07 is 18776124.956925319 s in the future
1674 07:29:19.196407 tar: ./filesystems/epoll/epoll_wakeup_test: time stamp 2024-08-31 05:25:05 is 18776062.711939402 s in the future
1675 07:29:19.251530 tar: ./filesystems/epoll: time stamp 2024-08-31 05:26:11 is 18776128.654634694 s in the future
1676 07:29:19.377411 tar: ./filesystems/dnotify_test: time stamp 2024-08-31 05:25:04 is 18776061.529319402 s in the future
1677 07:29:19.558502 tar: ./filesystems/fat/run_fat_tests.sh: time stamp 2024-08-20 15:21:34 is 17861451.349178152 s in the future
1678 07:29:19.709210 tar: ./filesystems/fat/config: time stamp 2024-08-20 15:21:34 is 17861451.19804936 s in the future
1679 07:29:19.836477 tar: ./filesystems/fat/rename_exchange: time stamp 2024-08-31 05:25:05 is 18776062.07071361 s in the future
1680 07:29:19.886433 tar: ./filesystems/fat: time stamp 2024-08-31 05:26:11 is 18776128.01928011 s in the future
1681 07:29:20.031527 tar: ./filesystems/overlayfs/dev_in_maps: time stamp 2024-08-31 05:25:05 is 18776061.876233277 s in the future
1682 07:29:20.089205 tar: ./filesystems/overlayfs: time stamp 2024-08-31 05:26:11 is 18776127.81794061 s in the future
1683 07:29:20.254337 tar: ./filesystems/binderfs/config: time stamp 2024-08-20 15:21:34 is 17861450.652271694 s in the future
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1837 07:29:39.564061 tar: ./tc-testing/tc-tests/filters/u32.json: time stamp 2024-08-20 15:21:34 is 17861431.343907858 s in the future
1838 07:29:39.620327 tar: ./tc-testing/tc-tests/filters: time stamp 2024-08-20 15:21:34 is 17861431.286500233 s in the future
1839 07:29:39.768660 tar: ./tc-testing/tc-tests/infra/actions.json: time stamp 2024-08-20 15:21:34 is 17861431.138631941 s in the future
1840 07:29:39.888282 tar: ./tc-testing/tc-tests/infra/filter.json: time stamp 2024-08-20 15:21:34 is 17861431.018668066 s in the future
1841 07:29:39.939264 tar: ./tc-testing/tc-tests/infra: time stamp 2024-08-20 15:21:34 is 17861430.967558983 s in the future
1842 07:29:39.987214 tar: ./tc-testing/tc-tests: time stamp 2024-08-20 15:21:34 is 17861430.918552733 s in the future
1843 07:29:40.119484 tar: ./tc-testing/settings: time stamp 2024-08-20 15:21:34 is 17861430.786073941 s in the future
1844 07:29:40.239240 tar: ./tc-testing/tdc_config_local_template.py: time stamp 2024-08-20 15:21:34 is 17861430.667414608 s in the future
1845 07:29:40.378908 tar: ./tc-testing/tdc.py: time stamp 2024-08-27 23:50:52 is 18496788.527424358 s in the future
1846 07:29:40.496575 tar: ./tc-testing/tdc_batch.py: time stamp 2024-08-20 15:21:34 is 17861430.409743191 s in the future
1847 07:29:40.611182 tar: ./tc-testing/plugins/__init__.py: time stamp 2024-08-20 15:21:34 is 17861430.29582165 s in the future
1848 07:29:40.663130 tar: ./tc-testing/plugins: time stamp 2024-08-20 15:21:34 is 17861430.241851983 s in the future
1849 07:29:40.793639 tar: ./tc-testing/tdc_helper.py: time stamp 2024-08-20 15:21:34 is 17861430.113016441 s in the future
1850 07:29:40.921564 tar: ./tc-testing/TdcResults.py: time stamp 2024-08-20 15:21:34 is 17861429.984103483 s in the future
1851 07:29:40.970351 tar: ./tc-testing: time stamp 2024-08-31 05:26:22 is 18776117.934105358 s in the future
1852 07:29:41.119852 tar: ./cachestat/test_cachestat: time stamp 2024-08-31 05:23:57 is 18775972.786974941 s in the future
1853 07:29:41.180236 tar: ./cachestat: time stamp 2024-08-31 05:26:08 is 18776103.724539774 s in the future
1854 07:29:41.320862 tar: ./timens/gettime_perf: time stamp 2024-08-31 05:25:54 is 18776089.584723858 s in the future
1855 07:29:41.444393 tar: ./timens/futex: time stamp 2024-08-31 05:25:54 is 18776089.459927358 s in the future
1856 07:29:41.564020 tar: ./timens/clock_nanosleep: time stamp 2024-08-31 05:25:53 is 18776088.341682524 s in the future
1857 07:29:41.689919 tar: ./timens/timer: time stamp 2024-08-31 05:25:53 is 18776088.215779816 s in the future
1858 07:29:41.841247 tar: ./timens/vfork_exec: time stamp 2024-08-31 05:25:54 is 18776089.065191316 s in the future
1859 07:29:41.972148 tar: ./timens/config: time stamp 2024-08-20 15:21:34 is 17861428.932340233 s in the future
1860 07:29:42.105369 tar: ./timens/exec: time stamp 2024-08-31 05:25:54 is 18776088.799612774 s in the future
1861 07:29:42.231295 tar: ./timens/procfs: time stamp 2024-08-31 05:25:54 is 18776088.673525108 s in the future
1862 07:29:42.374157 tar: ./timens/timens: time stamp 2024-08-31 05:25:53 is 18776087.531935483 s in the future
1863 07:29:42.499140 tar: ./timens/timerfd: time stamp 2024-08-31 05:25:53 is 18776087.406963774 s in the future
1864 07:29:42.554265 tar: ./timens: time stamp 2024-08-31 05:26:22 is 18776116.349335524 s in the future
1865 07:29:42.696052 tar: ./ptrace/get_syscall_info: time stamp 2024-08-31 05:25:46 is 18776080.210784483 s in the future
1866 07:29:42.819970 tar: ./ptrace/peeksiginfo: time stamp 2024-08-31 05:25:46 is 18776080.085853566 s in the future
1867 07:29:42.956398 tar: ./ptrace/get_set_sud: time stamp 2024-08-31 05:25:46 is 18776079.948709649 s in the future
1868 07:29:43.094982 tar: ./ptrace/vmaccess: time stamp 2024-08-31 05:25:46 is 18776079.810466899 s in the future
1869 07:29:43.152171 tar: ./ptrace: time stamp 2024-08-31 05:26:18 is 18776111.752143566 s in the future
1870 07:29:43.320725 tar: ./alsa/test-pcmtest-driver: time stamp 2024-08-31 05:23:56 is 18775969.585653899 s in the future
1871 07:29:43.465045 tar: ./alsa/pcm-test.conf: time stamp 2024-08-20 15:21:34 is 17861427.441199024 s in the future
1872 07:29:43.615283 tar: ./alsa/libatest.so: time stamp 2024-08-31 05:23:56 is 18775969.289846149 s in the future
1873 07:29:43.747916 tar: ./alsa/conf.d/Lenovo_ThinkPad_P1_Gen2.conf: time stamp 2024-08-20 15:21:34 is 17861427.159655733 s in the future
1874 07:29:43.811577 tar: ./alsa/conf.d: time stamp 2024-08-20 15:21:34 is 17861427.093655024 s in the future
1875 07:29:43.957300 tar: ./alsa/mixer-test: time stamp 2024-08-31 05:23:56 is 18775968.947177191 s in the future
1876 07:29:44.100033 tar: ./alsa/pcm-test: time stamp 2024-08-31 05:23:56 is 18775968.805605941 s in the future
1877 07:29:44.148867 tar: ./alsa: time stamp 2024-08-31 05:26:07 is 18776099.755816274 s in the future
1878 07:29:44.301541 tar: ./cpu-hotplug/cpu-on-off-test.sh: time stamp 2024-08-20 15:21:34 is 17861426.605302066 s in the future
1879 07:29:44.362210 tar: ./cpu-hotplug: time stamp 2024-08-31 05:26:08 is 18776100.543302774 s in the future
1880 07:29:44.528466 tar: ./timers/nanosleep: time stamp 2024-08-31 05:25:54 is 18776086.376500816 s in the future
1881 07:29:44.659780 tar: ./timers/inconsistency-check: time stamp 2024-08-31 05:25:55 is 18776087.246858607 s in the future
1882 07:29:44.792150 tar: ./timers/valid-adjtimex: time stamp 2024-08-31 05:25:56 is 18776088.113253232 s in the future
1883 07:29:44.920113 tar: ./timers/mqueue-lat: time stamp 2024-08-31 05:25:55 is 18776086.984392982 s in the future
1884 07:29:45.075763 tar: ./timers/freq-step: time stamp 2024-08-31 05:25:56 is 18776087.829672149 s in the future
1885 07:29:45.258590 tar: ./timers/nsleep-lat: time stamp 2024-08-31 05:25:55 is 18776086.646406816 s in the future
1886 07:29:45.383338 tar: ./timers/rtcpie: time stamp 2024-08-31 05:25:55 is 18776086.521147316 s in the future
1887 07:29:45.512608 tar: ./timers/set-timer-lat: time stamp 2024-08-31 05:25:55 is 18776086.392695232 s in the future
1888 07:29:45.654434 tar: ./timers/posix_timers: time stamp 2024-08-31 05:25:54 is 18776085.250761649 s in the future
1889 07:29:45.784656 tar: ./timers/leapcrash: time stamp 2024-08-31 05:25:57 is 18776088.120513316 s in the future
1890 07:29:45.909481 tar: ./timers/adjtick: time stamp 2024-08-31 05:25:56 is 18776086.995384441 s in the future
1891 07:29:46.040810 tar: ./timers/alarmtimer-suspend: time stamp 2024-08-31 05:25:56 is 18776086.865961941 s in the future
1892 07:29:46.176242 tar: ./timers/raw_skew: time stamp 2024-08-31 05:25:55 is 18776085.728447857 s in the future
1893 07:29:46.314913 tar: ./timers/skew_consistency: time stamp 2024-08-31 05:25:56 is 18776086.591744149 s in the future
1894 07:29:46.443885 tar: ./timers/leap-a-day: time stamp 2024-08-31 05:25:57 is 18776087.461524982 s in the future
1895 07:29:46.577267 tar: ./timers/clocksource-switch: time stamp 2024-08-31 05:25:56 is 18776086.328088232 s in the future
1896 07:29:46.710634 tar: ./timers/settings: time stamp 2024-08-20 15:21:34 is 17861424.194673815 s in the future
1897 07:29:46.835783 tar: ./timers/change_skew: time stamp 2024-08-31 05:25:56 is 18776086.069790107 s in the future
1898 07:29:46.977671 tar: ./timers/threadtest: time stamp 2024-08-31 05:25:55 is 18776084.927831274 s in the future
1899 07:29:47.106771 tar: ./timers/set-tai: time stamp 2024-08-31 05:25:57 is 18776086.798373065 s in the future
1900 07:29:47.235908 tar: ./timers/set-tz: time stamp 2024-08-31 05:25:57 is 18776086.669247524 s in the future
1901 07:29:47.385052 tar: ./timers/set-2038: time stamp 2024-08-31 05:25:57 is 18776086.51922244 s in the future
1902 07:29:47.438081 tar: ./timers: time stamp 2024-08-31 05:26:22 is 18776111.466490149 s in the future
1903 07:29:47.581941 tar: ./lkdtm/BUG.sh: time stamp 2024-08-31 05:25:19 is 18776048.323004232 s in the future
1904 07:29:47.749260 tar: ./lkdtm/REFCOUNT_TIMING.sh: time stamp 2024-08-31 05:25:19 is 18776048.15732569 s in the future
1905 07:29:47.876139 tar: ./lkdtm/SLAB_LINEAR_OVERFLOW.sh: time stamp 2024-08-31 05:25:19 is 18776048.029246315 s in the future
1906 07:29:48.004410 tar: ./lkdtm/UNALIGNED_LOAD_STORE_WRITE.sh: time stamp 2024-08-31 05:25:19 is 18776047.902042399 s in the future
1907 07:29:48.134719 tar: ./lkdtm/EXEC_DATA.sh: time stamp 2024-08-31 05:25:19 is 18776047.770627565 s in the future
1908 07:29:48.249144 tar: ./lkdtm/LOOP.sh: time stamp 2024-08-31 05:25:19 is 18776047.656670315 s in the future
1909 07:29:48.369242 tar: ./lkdtm/SLAB_FREE_PAGE.sh: time stamp 2024-08-31 05:25:19 is 18776047.537085982 s in the future
1910 07:29:48.496383 tar: ./lkdtm/REFCOUNT_INC_ZERO.sh: time stamp 2024-08-31 05:25:19 is 18776047.40983769 s in the future
1911 07:29:48.637528 tar: ./lkdtm/REFCOUNT_DEC_AND_TEST_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776047.270180357 s in the future
1912 07:29:48.750205 tar: ./lkdtm/FORTIFY_STR_MEMBER.sh: time stamp 2024-08-31 05:25:19 is 18776047.15621044 s in the future
1913 07:29:48.875177 tar: ./lkdtm/HUNG_TASK.sh: time stamp 2024-08-31 05:25:19 is 18776047.031116024 s in the future
1914 07:29:49.031147 tar: ./lkdtm/REFCOUNT_ADD_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776046.876056732 s in the future
1915 07:29:49.169928 tar: ./lkdtm/FORTIFY_STRSCPY.sh: time stamp 2024-08-31 05:25:19 is 18776046.736469565 s in the future
1916 07:29:49.307370 tar: ./lkdtm/WRITE_RO.sh: time stamp 2024-08-31 05:25:19 is 18776046.597454065 s in the future
1917 07:29:49.428129 tar: ./lkdtm/PANIC_STOP_IRQOFF.sh: time stamp 2024-08-31 05:25:19 is 18776046.477875524 s in the future
1918 07:29:49.555393 tar: ./lkdtm/USERCOPY_STACK_FRAME_TO.sh: time stamp 2024-08-31 05:25:19 is 18776046.350482357 s in the future
1919 07:29:49.727994 tar: ./lkdtm/READ_AFTER_FREE.sh: time stamp 2024-08-31 05:25:19 is 18776046.17762644 s in the future
1920 07:29:49.852135 tar: ./lkdtm/REFCOUNT_INC_NOT_ZERO_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776046.055342148 s in the future
1921 07:29:49.995118 tar: ./lkdtm/USERCOPY_KERNEL.sh: time stamp 2024-08-31 05:25:19 is 18776045.910795523 s in the future
1922 07:29:50.113155 tar: ./lkdtm/REFCOUNT_ADD_NOT_ZERO_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776045.793987232 s in the future
1923 07:29:50.278222 tar: ./lkdtm/FORTIFY_MEM_MEMBER.sh: time stamp 2024-08-31 05:25:19 is 18776045.627099565 s in the future
1924 07:29:50.418012 tar: ./lkdtm/REFCOUNT_DEC_ZERO.sh: time stamp 2024-08-31 05:25:19 is 18776045.48822169 s in the future
1925 07:29:50.552337 tar: ./lkdtm/PANIC.sh: time stamp 2024-08-31 05:25:19 is 18776045.351963023 s in the future
1926 07:29:50.678230 tar: ./lkdtm/ARRAY_BOUNDS.sh: time stamp 2024-08-31 05:25:19 is 18776045.226886648 s in the future
1927 07:29:50.811566 tar: ./lkdtm/WARNING.sh: time stamp 2024-08-31 05:25:19 is 18776045.093408607 s in the future
1928 07:29:50.952827 tar: ./lkdtm/USERCOPY_SLAB_WHITELIST_TO.sh: time stamp 2024-08-31 05:25:19 is 18776044.954463648 s in the future
1929 07:29:51.084149 tar: ./lkdtm/ACCESS_NULL.sh: time stamp 2024-08-31 05:25:19 is 18776044.820955315 s in the future
1930 07:29:51.198627 tar: ./lkdtm/SMP_CALL_LOCKUP.sh: time stamp 2024-08-31 05:25:19 is 18776044.70726644 s in the future
1931 07:29:51.330158 tar: ./lkdtm/USERCOPY_STACK_FRAME_FROM.sh: time stamp 2024-08-31 05:25:19 is 18776044.57627094 s in the future
1932 07:29:51.476200 tar: ./lkdtm/SOFTLOCKUP.sh: time stamp 2024-08-31 05:25:19 is 18776044.428999232 s in the future
1933 07:29:51.610720 tar: ./lkdtm/REFCOUNT_INC_OVERFLOW.sh: time stamp 2024-08-31 05:25:19 is 18776044.295487232 s in the future
1934 07:29:51.733817 tar: ./lkdtm/REFCOUNT_SUB_AND_TEST_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776044.17347444 s in the future
1935 07:29:51.881040 tar: ./lkdtm/REFCOUNT_ADD_OVERFLOW.sh: time stamp 2024-08-31 05:25:19 is 18776044.025791898 s in the future
1936 07:29:52.042995 tar: ./lkdtm/FORTIFY_STR_OBJECT.sh: time stamp 2024-08-31 05:25:19 is 18776043.861985648 s in the future
1937 07:29:52.197644 tar: ./lkdtm/REFCOUNT_DEC_AND_TEST_NEGATIVE.sh: time stamp 2024-08-31 05:25:19 is 18776043.70891544 s in the future
1938 07:29:52.315111 tar: ./lkdtm/EXEC_NULL.sh: time stamp 2024-08-31 05:25:19 is 18776043.58930969 s in the future
1939 07:29:52.447686 tar: ./lkdtm/REPORT_STACK_CANARY.sh: time stamp 2024-08-31 05:25:19 is 18776043.45873569 s in the future
1940 07:29:52.594716 tar: ./lkdtm/SLAB_FREE_CROSS.sh: time stamp 2024-08-31 05:25:19 is 18776043.311446148 s in the future
1941 07:29:52.731229 tar: ./lkdtm/FORTIFY_MEM_OBJECT.sh: time stamp 2024-08-31 05:25:19 is 18776043.174600148 s in the future
1942 07:29:52.859590 tar: ./lkdtm/STACK_GUARD_PAGE_LEADING.sh: time stamp 2024-08-31 05:25:19 is 18776043.047120231 s in the future
1943 07:29:52.997025 tar: ./lkdtm/tests.txt: time stamp 2024-08-20 15:21:34 is 17861417.907929981 s in the future
1944 07:29:53.127201 tar: ./lkdtm/HARDLOCKUP.sh: time stamp 2024-08-31 05:25:19 is 18776042.777734648 s in the future
1945 07:29:53.256458 tar: ./lkdtm/REFCOUNT_DEC_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776042.649408148 s in the future
1946 07:29:53.376134 tar: ./lkdtm/UNSET_SMEP.sh: time stamp 2024-08-31 05:25:19 is 18776042.529924815 s in the future
1947 07:29:53.506397 tar: ./lkdtm/stack-entropy.sh: time stamp 2024-08-20 15:21:34 is 17861417.399181148 s in the future
1948 07:29:53.637853 tar: ./lkdtm/CORRUPT_STACK_STRONG.sh: time stamp 2024-08-31 05:25:19 is 18776042.268888565 s in the future
1949 07:29:53.781863 tar: ./lkdtm/WRITE_AFTER_FREE.sh: time stamp 2024-08-31 05:25:19 is 18776042.123905356 s in the future
1950 07:29:53.911171 tar: ./lkdtm/STACK_GUARD_PAGE_TRAILING.sh: time stamp 2024-08-31 05:25:19 is 18776041.996065356 s in the future
1951 07:29:54.039315 tar: ./lkdtm/config: time stamp 2024-08-20 15:21:34 is 17861416.865432023 s in the future
1952 07:29:54.170925 tar: ./lkdtm/CFI_FORWARD_PROTO.sh: time stamp 2024-08-31 05:25:19 is 18776041.734971523 s in the future
1953 07:29:54.307376 tar: ./lkdtm/WARNING_MESSAGE.sh: time stamp 2024-08-31 05:25:19 is 18776041.598497981 s in the future
1954 07:29:54.434546 tar: ./lkdtm/DOUBLE_FAULT.sh: time stamp 2024-08-31 05:25:19 is 18776041.47053894 s in the future
1955 07:29:54.577592 tar: ./lkdtm/WRITE_BUDDY_AFTER_FREE.sh: time stamp 2024-08-31 05:25:19 is 18776041.328330231 s in the future
1956 07:29:54.704838 tar: ./lkdtm/STACKLEAK_ERASING.sh: time stamp 2024-08-31 05:25:19 is 18776041.201368648 s in the future
1957 07:29:54.840184 tar: ./lkdtm/EXEC_KMALLOC.sh: time stamp 2024-08-31 05:25:19 is 18776041.064559856 s in the future
1958 07:29:54.965103 tar: ./lkdtm/CORRUPT_PAC.sh: time stamp 2024-08-31 05:25:19 is 18776040.93964569 s in the future
1959 07:29:55.111415 tar: ./lkdtm/CORRUPT_LIST_DEL.sh: time stamp 2024-08-31 05:25:19 is 18776040.794504314 s in the future
1960 07:29:55.237406 tar: ./lkdtm/EXEC_STACK.sh: time stamp 2024-08-31 05:25:19 is 18776040.667598648 s in the future
1961 07:29:55.397408 tar: ./lkdtm/USERCOPY_SLAB_SIZE_FROM.sh: time stamp 2024-08-31 05:25:19 is 18776040.509187481 s in the future
1962 07:29:55.533138 tar: ./lkdtm/BUDDY_INIT_ON_ALLOC.sh: time stamp 2024-08-31 05:25:19 is 18776040.372509314 s in the future
1963 07:29:55.678195 tar: ./lkdtm/USERCOPY_STACK_BEYOND.sh: time stamp 2024-08-31 05:25:19 is 18776040.227641731 s in the future
1964 07:29:55.813944 tar: ./lkdtm/REFCOUNT_ADD_NOT_ZERO_OVERFLOW.sh: time stamp 2024-08-31 05:25:19 is 18776040.092132481 s in the future
1965 07:29:55.944052 tar: ./lkdtm/ACCESS_USERSPACE.sh: time stamp 2024-08-31 05:25:19 is 18776039.960808773 s in the future
1966 07:29:56.075492 tar: ./lkdtm/REFCOUNT_DEC_NEGATIVE.sh: time stamp 2024-08-31 05:25:19 is 18776039.830465148 s in the future
1967 07:29:56.208887 tar: ./lkdtm/CORRUPT_STACK.sh: time stamp 2024-08-31 05:25:19 is 18776039.696868814 s in the future
1968 07:29:56.338028 tar: ./lkdtm/EXCEPTION.sh: time stamp 2024-08-31 05:25:19 is 18776039.566842731 s in the future
1969 07:29:56.481028 tar: ./lkdtm/ATOMIC_TIMING.sh: time stamp 2024-08-31 05:25:19 is 18776039.424775064 s in the future
1970 07:29:56.603881 tar: ./lkdtm/EXEC_RODATA.sh: time stamp 2024-08-31 05:25:19 is 18776039.301551898 s in the future
1971 07:29:56.736054 tar: ./lkdtm/PPC_SLB_MULTIHIT.sh: time stamp 2024-08-31 05:25:19 is 18776039.168679356 s in the future
1972 07:29:56.872752 tar: ./lkdtm/REFCOUNT_ADD_ZERO.sh: time stamp 2024-08-31 05:25:19 is 18776039.032950356 s in the future
1973 07:29:57.009574 tar: ./lkdtm/EXEC_USERSPACE.sh: time stamp 2024-08-31 05:25:19 is 18776038.896266814 s in the future
1974 07:29:57.143087 tar: ./lkdtm/SPINLOCKUP.sh: time stamp 2024-08-31 05:25:19 is 18776038.762824898 s in the future
1975 07:29:57.271273 tar: ./lkdtm/CORRUPT_LIST_ADD.sh: time stamp 2024-08-31 05:25:19 is 18776038.634727731 s in the future
1976 07:29:57.405539 tar: ./lkdtm/WRITE_OPD.sh: time stamp 2024-08-31 05:25:19 is 18776038.498939398 s in the future
1977 07:29:57.540020 tar: ./lkdtm/SLAB_INIT_ON_ALLOC.sh: time stamp 2024-08-31 05:25:19 is 18776038.365477356 s in the future
1978 07:29:57.664009 tar: ./lkdtm/REFCOUNT_INC_SATURATED.sh: time stamp 2024-08-31 05:25:19 is 18776038.242610064 s in the future
1979 07:29:57.822400 tar: ./lkdtm/REFCOUNT_INC_NOT_ZERO_OVERFLOW.sh: time stamp 2024-08-31 05:25:19 is 18776038.084564106 s in the future
1980 07:29:57.958139 tar: ./lkdtm/USERCOPY_SLAB_SIZE_TO.sh: time stamp 2024-08-31 05:25:19 is 18776037.948498564 s in the future
1981 07:29:58.083415 tar: ./lkdtm/REFCOUNT_SUB_AND_TEST_NEGATIVE.sh: time stamp 2024-08-31 05:25:19 is 18776037.823348314 s in the future
1982 07:29:58.217911 tar: ./lkdtm/WRITE_KERN.sh: time stamp 2024-08-31 05:25:19 is 18776037.686943606 s in the future
1983 07:29:58.346264 tar: ./lkdtm/VMALLOC_LINEAR_OVERFLOW.sh: time stamp 2024-08-31 05:25:19 is 18776037.559275772 s in the future
1984 07:29:58.483097 tar: ./lkdtm/READ_BUDDY_AFTER_FREE.sh: time stamp 2024-08-31 05:25:19 is 18776037.423075856 s in the future
1985 07:29:58.615545 tar: ./lkdtm/SLAB_FREE_DOUBLE.sh: time stamp 2024-08-31 05:25:19 is 18776037.289581439 s in the future
1986 07:29:58.773354 tar: ./lkdtm/USERCOPY_SLAB_WHITELIST_FROM.sh: time stamp 2024-08-31 05:25:19 is 18776037.133117106 s in the future
1987 07:29:58.904736 tar: ./lkdtm/EXHAUST_STACK.sh: time stamp 2024-08-31 05:25:19 is 18776037.000618606 s in the future
1988 07:29:59.040033 tar: ./lkdtm/CFI_BACKWARD.sh: time stamp 2024-08-31 05:25:19 is 18776036.864345939 s in the future
1989 07:29:59.167134 tar: ./lkdtm/WRITE_RO_AFTER_INIT.sh: time stamp 2024-08-31 05:25:19 is 18776036.739074022 s in the future
1990 07:29:59.294396 tar: ./lkdtm/EXEC_VMALLOC.sh: time stamp 2024-08-31 05:25:19 is 18776036.611038064 s in the future
1991 07:29:59.353605 tar: ./lkdtm: time stamp 2024-08-31 05:26:14 is 18776091.550084689 s in the future
1992 07:29:59.505993 tar: ./efivarfs/open-unlink: time stamp 2024-08-31 05:25:02 is 18776019.399943689 s in the future
1993 07:29:59.635071 tar: ./efivarfs/config: time stamp 2024-08-20 15:21:34 is 17861411.269086439 s in the future
1994 07:29:59.764214 tar: ./efivarfs/efivarfs.sh: time stamp 2024-08-20 15:21:34 is 17861411.140401397 s in the future
1995 07:29:59.915861 tar: ./efivarfs/create-read: time stamp 2024-08-31 05:25:02 is 18776018.989992981 s in the future
1996 07:29:59.976086 tar: ./efivarfs: time stamp 2024-08-31 05:26:10 is 18776086.927086106 s in the future
1997 07:30:00.144452 tar: ./breakpoints/step_after_suspend_test: time stamp 2024-08-31 05:23:57 is 18775953.761649647 s in the future
1998 07:30:00.202715 tar: ./breakpoints: time stamp 2024-08-31 05:26:07 is 18776083.701964814 s in the future
1999 07:30:00.371170 tar: ./membarrier/membarrier_test_single_thread: time stamp 2024-08-31 05:25:21 is 18776037.535220272 s in the future
2000 07:30:00.585173 tar: ./membarrier/membarrier_test_multi_thread: time stamp 2024-08-31 05:25:21 is 18776037.323854189 s in the future
2001 07:30:00.638247 tar: ./membarrier: time stamp 2024-08-31 05:26:14 is 18776090.265739356 s in the future
2002 07:30:00.812802 tar: ./capabilities/validate_cap: time stamp 2024-08-31 05:23:57 is 18775953.093176147 s in the future
2003 07:30:00.949513 tar: ./capabilities/test_execve: time stamp 2024-08-31 05:23:57 is 18775952.95583773 s in the future
2004 07:30:01.002511 tar: ./capabilities: time stamp 2024-08-31 05:26:08 is 18776083.90152473 s in the future
2005 07:30:01.147569 tar: ./vDSO/vdso_test_abi: time stamp 2024-08-31 05:25:59 is 18776074.756908189 s in the future
2006 07:30:01.278911 tar: ./vDSO/vdso_test_correctness: time stamp 2024-08-31 05:25:59 is 18776074.62693523 s in the future
2007 07:30:01.425973 tar: ./vDSO/vdso_test_clock_getres: time stamp 2024-08-31 05:25:59 is 18776074.479078189 s in the future
2008 07:30:01.561335 tar: ./vDSO/vdso_test_getcpu: time stamp 2024-08-31 05:25:59 is 18776074.343358022 s in the future
2009 07:30:01.706190 tar: ./vDSO/vdso_test_getrandom: time stamp 2024-08-31 05:25:59 is 18776074.198551689 s in the future
2010 07:30:01.851013 tar: ./vDSO/vdso_test_gettimeofday: time stamp 2024-08-31 05:25:59 is 18776074.05368398 s in the future
2011 07:30:01.908129 tar: ./vDSO: time stamp 2024-08-31 05:26:23 is 18776097.995380772 s in the future
2012 07:30:02.058188 tar: ./clone3/clone3_set_tid: time stamp 2024-08-31 05:24:00 is 18775954.846295772 s in the future
2013 07:30:02.205561 tar: ./clone3/clone3_cap_checkpoint_restore: time stamp 2024-08-31 05:24:01 is 18775955.701113355 s in the future
2014 07:30:02.349543 tar: ./clone3/clone3_clear_sighand: time stamp 2024-08-31 05:24:00 is 18775954.555894939 s in the future
2015 07:30:02.473317 tar: ./clone3/clone3: time stamp 2024-08-31 05:24:00 is 18775954.430806689 s in the future
2016 07:30:02.535908 tar: ./clone3: time stamp 2024-08-31 05:26:08 is 18776082.367597439 s in the future
2017 07:30:02.594090 tar: .: time stamp 2024-08-31 05:26:25 is 18776099.308134314 s in the future
2018 07:30:02.868416 skiplist:
2019 07:30:02.868798 ========================================
2020 07:30:02.873927 ========================================
2021 07:30:03.189040 dt:test_unprobed_devices.sh
2022 07:30:03.308968 ============== Tests to run ===============
2023 07:30:03.320525 dt:test_unprobed_devices.sh
2024 07:30:03.323798 ===========End Tests to run ===============
2025 07:30:03.356992 shardfile-dt pass
2026 07:30:03.695516 <12>[ 185.971218] kselftest: Running tests in dt
2027 07:30:03.725333 TAP version 13
2028 07:30:03.758360 1..1
2029 07:30:03.816624 # timeout set to 45
2030 07:30:03.817008 # selftests: dt: test_unprobed_devices.sh
2031 07:30:04.694996 # TAP version 13
2032 07:30:17.491695 # 1..255
2033 07:30:17.696845 # ok 1 / # SKIP
2034 07:30:17.719478 # ok 2 /clk_mcasp0
2035 07:30:17.795372 # ok 3 /clk_mcasp0_fixed # SKIP
2036 07:30:17.869907 # ok 4 /cpus/cpu@0 # SKIP
2037 07:30:17.945783 # ok 5 /cpus/idle-states/mpu_gate # SKIP
2038 07:30:17.966369 # ok 6 /fixedregulator0
2039 07:30:17.987793 # ok 7 /leds
2040 07:30:18.010472 # ok 8 /ocp
2041 07:30:18.034310 # ok 9 /ocp/interconnect@44c00000
2042 07:30:18.063544 # ok 10 /ocp/interconnect@44c00000/segment@0
2043 07:30:18.084399 # ok 11 /ocp/interconnect@44c00000/segment@100000
2044 07:30:18.114363 # ok 12 /ocp/interconnect@44c00000/segment@100000/target-module@0
2045 07:30:18.188346 # not ok 13 /ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0
2046 07:30:18.211405 # ok 14 /ocp/interconnect@44c00000/segment@200000
2047 07:30:18.231963 # ok 15 /ocp/interconnect@44c00000/segment@200000/target-module@0
2048 07:30:18.347311 # not ok 16 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0
2049 07:30:18.423522 # ok 17 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0 # SKIP
2050 07:30:18.501842 # ok 18 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0 # SKIP
2051 07:30:18.567724 # ok 19 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120 # SKIP
2052 07:30:18.652493 # ok 20 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c # SKIP
2053 07:30:18.727878 # ok 21 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18 # SKIP
2054 07:30:18.801940 # ok 22 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c # SKIP
2055 07:30:18.871226 # ok 23 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24 # SKIP
2056 07:30:18.950907 # ok 24 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38 # SKIP
2057 07:30:19.028607 # ok 25 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8 # SKIP
2058 07:30:19.101842 # ok 26 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400 # SKIP
2059 07:30:19.178039 # ok 27 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0 # SKIP
2060 07:30:19.250298 # ok 28 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14 # SKIP
2061 07:30:19.329146 # ok 29 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0 # SKIP
2062 07:30:19.399968 # ok 30 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600 # SKIP
2063 07:30:19.481809 # ok 31 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0 # SKIP
2064 07:30:19.556091 # ok 32 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800 # SKIP
2065 07:30:19.630510 # ok 33 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0 # SKIP
2066 07:30:19.706050 # ok 34 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900 # SKIP
2067 07:30:19.780313 # ok 35 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0 # SKIP
2068 07:30:19.858968 # ok 36 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00 # SKIP
2069 07:30:19.930258 # ok 37 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0 # SKIP
2070 07:30:20.011949 # ok 38 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz # SKIP
2071 07:30:20.085445 # ok 39 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768 # SKIP
2072 07:30:20.163146 # ok 40 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k # SKIP
2073 07:30:20.239127 # ok 41 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k # SKIP
2074 07:30:20.310855 # ok 42 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk # SKIP
2075 07:30:20.391500 # ok 43 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520 # SKIP
2076 07:30:20.467908 # ok 44 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2 # SKIP
2077 07:30:20.543392 # ok 45 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480 # SKIP
2078 07:30:20.616915 # ok 46 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484 # SKIP
2079 07:30:20.693315 # ok 47 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8 # SKIP
2080 07:30:20.767832 # ok 48 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2 # SKIP
2081 07:30:20.848937 # ok 49 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2 # SKIP
2082 07:30:20.923221 # ok 50 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0 # SKIP
2083 07:30:21.000539 # ok 51 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4 # SKIP
2084 07:30:21.073564 # ok 52 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8 # SKIP
2085 07:30:21.151042 # ok 53 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4 # SKIP
2086 07:30:21.226708 # ok 54 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm # SKIP
2087 07:30:21.303180 # ok 55 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac # SKIP
2088 07:30:21.378352 # ok 56 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c # SKIP
2089 07:30:21.453911 # ok 57 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4 # SKIP
2090 07:30:21.530120 # ok 58 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk # SKIP
2091 07:30:21.601129 # ok 59 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk # SKIP
2092 07:30:21.682812 # ok 60 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk # SKIP
2093 07:30:21.758913 # ok 61 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk # SKIP
2094 07:30:21.828074 # ok 62 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk # SKIP
2095 07:30:21.911975 # ok 63 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk # SKIP
2096 07:30:21.979007 # ok 64 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534 # SKIP
2097 07:30:22.057858 # ok 65 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc # SKIP
2098 07:30:22.139130 # ok 66 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914 # SKIP
2099 07:30:22.213487 # ok 67 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530 # SKIP
2100 07:30:22.291824 # ok 68 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div # SKIP
2101 07:30:22.365414 # ok 69 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin # SKIP
2102 07:30:22.441122 # ok 70 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528 # SKIP
2103 07:30:22.523019 # ok 71 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508 # SKIP
2104 07:30:22.592224 # ok 72 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c # SKIP
2105 07:30:22.671870 # ok 73 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510 # SKIP
2106 07:30:22.748369 # ok 74 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518 # SKIP
2107 07:30:22.820856 # ok 75 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c # SKIP
2108 07:30:22.903626 # ok 76 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504 # SKIP
2109 07:30:22.971721 # ok 77 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c # SKIP
2110 07:30:23.053350 # ok 78 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000 # SKIP
2111 07:30:23.126867 # ok 79 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000 # SKIP
2112 07:30:23.203715 # ok 80 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000 # SKIP
2113 07:30:23.281126 # ok 81 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000 # SKIP
2114 07:30:23.358809 # ok 82 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538 # SKIP
2115 07:30:23.431916 # ok 83 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488 # SKIP
2116 07:30:23.501201 # ok 84 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c # SKIP
2117 07:30:23.582902 # ok 85 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490 # SKIP
2118 07:30:23.651919 # ok 86 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494 # SKIP
2119 07:30:23.736890 # ok 87 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498 # SKIP
2120 07:30:23.812782 # ok 88 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c # SKIP
2121 07:30:23.882946 # ok 89 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div@0 # SKIP
2122 07:30:23.963999 # ok 90 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel@1 # SKIP
2123 07:30:24.040600 # ok 91 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700 # SKIP
2124 07:30:24.115230 # ok 92 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div@3 # SKIP
2125 07:30:24.192991 # ok 93 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2@7 # SKIP
2126 07:30:24.261331 # ok 94 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre@0 # SKIP
2127 07:30:24.289942 # ok 95 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000
2128 07:30:24.305862 # ok 96 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100
2129 07:30:24.336884 # ok 97 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200
2130 07:30:24.364413 # ok 98 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00
2131 07:30:24.388806 # ok 99 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00
2132 07:30:24.409606 # ok 100 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00
2133 07:30:24.437496 # ok 101 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00
2134 07:30:24.463144 # ok 102 /ocp/interconnect@44c00000/segment@200000/target-module@10000
2135 07:30:24.568672 # not ok 103 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0
2136 07:30:24.599555 # ok 104 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620
2137 07:30:24.619070 # ok 105 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90
2138 07:30:24.649235 # ok 106 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800
2139 07:30:24.757684 # not ok 107 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0
2140 07:30:24.834649 # ok 108 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck # SKIP
2141 07:30:24.914508 # ok 109 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck # SKIP
2142 07:30:24.990741 # ok 110 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck # SKIP
2143 07:30:25.057868 # ok 111 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck # SKIP
2144 07:30:25.141958 # ok 112 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck # SKIP
2145 07:30:25.212345 # ok 113 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck # SKIP
2146 07:30:25.291050 # ok 114 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck # SKIP
2147 07:30:25.369875 # ok 115 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck # SKIP
2148 07:30:25.442586 # ok 116 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck # SKIP
2149 07:30:25.515101 # ok 117 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck # SKIP
2150 07:30:25.594998 # ok 118 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40 # SKIP
2151 07:30:25.670636 # ok 119 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664 # SKIP
2152 07:30:25.751591 # ok 120 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk@0 # SKIP
2153 07:30:25.826234 # ok 121 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk@1 # SKIP
2154 07:30:25.896063 # ok 122 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk@2 # SKIP
2155 07:30:25.925889 # ok 123 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel
2156 07:30:25.992850 # not ok 124 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324
2157 07:30:26.067914 # not ok 125 /ocp/interconnect@44c00000/segment@200000/target-module@31000
2158 07:30:26.149338 # ok 126 /ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0 # SKIP
2159 07:30:26.165302 # ok 127 /ocp/interconnect@44c00000/segment@200000/target-module@35000
2160 07:30:26.242565 # not ok 128 /ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0
2161 07:30:26.266982 # ok 129 /ocp/interconnect@44c00000/segment@200000/target-module@3e000
2162 07:30:26.347133 # not ok 130 /ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0
2163 07:30:26.364074 # ok 131 /ocp/interconnect@44c00000/segment@200000/target-module@7000
2164 07:30:26.390829 # ok 132 /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0
2165 07:30:26.417611 # ok 133 /ocp/interconnect@44c00000/segment@200000/target-module@9000
2166 07:30:26.439984 # ok 134 /ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0
2167 07:30:26.469508 # ok 135 /ocp/interconnect@44c00000/segment@200000/target-module@b000
2168 07:30:26.489836 # ok 136 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0
2169 07:30:26.522073 # ok 137 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50
2170 07:30:26.539475 # ok 138 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
2171 07:30:26.571367 # ok 139 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24
2172 07:30:26.641767 # not ok 140 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/charger
2173 07:30:26.715962 # not ok 141 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/pwrbutton
2174 07:30:26.747117 # ok 142 /ocp/interconnect@44c00000/segment@200000/target-module@d000
2175 07:30:26.814925 # not ok 143 /ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc
2176 07:30:26.897149 # not ok 144 /ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/tsc
2177 07:30:27.003630 # not ok 145 /ocp/interconnect@47c00000
2178 07:30:27.075127 # not ok 146 /ocp/interconnect@47c00000/segment@0
2179 07:30:27.093957 # ok 147 /ocp/interconnect@48000000
2180 07:30:27.115905 # ok 148 /ocp/interconnect@48000000/segment@0
2181 07:30:27.141479 # ok 149 /ocp/interconnect@48000000/segment@0/target-module@22000
2182 07:30:27.170992 # ok 150 /ocp/interconnect@48000000/segment@0/target-module@24000
2183 07:30:27.195483 # ok 151 /ocp/interconnect@48000000/segment@0/target-module@2a000
2184 07:30:27.217597 # ok 152 /ocp/interconnect@48000000/segment@0/target-module@30000
2185 07:30:27.237607 # ok 153 /ocp/interconnect@48000000/segment@0/target-module@38000
2186 07:30:27.270329 # ok 154 /ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0
2187 07:30:27.285492 # ok 155 /ocp/interconnect@48000000/segment@0/target-module@3c000
2188 07:30:27.366049 # not ok 156 /ocp/interconnect@48000000/segment@0/target-module@40000
2189 07:30:27.443498 # ok 157 /ocp/interconnect@48000000/segment@0/target-module@40000/timer@0 # SKIP
2190 07:30:27.469226 # ok 158 /ocp/interconnect@48000000/segment@0/target-module@42000
2191 07:30:27.493974 # ok 159 /ocp/interconnect@48000000/segment@0/target-module@42000/timer@0
2192 07:30:27.510868 # ok 160 /ocp/interconnect@48000000/segment@0/target-module@44000
2193 07:30:27.537240 # ok 161 /ocp/interconnect@48000000/segment@0/target-module@44000/timer@0
2194 07:30:27.565823 # ok 162 /ocp/interconnect@48000000/segment@0/target-module@46000
2195 07:30:27.584949 # ok 163 /ocp/interconnect@48000000/segment@0/target-module@46000/timer@0
2196 07:30:27.609480 # ok 164 /ocp/interconnect@48000000/segment@0/target-module@48000
2197 07:30:27.633946 # ok 165 /ocp/interconnect@48000000/segment@0/target-module@48000/timer@0
2198 07:30:27.663425 # ok 166 /ocp/interconnect@48000000/segment@0/target-module@4a000
2199 07:30:27.689915 # ok 167 /ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0
2200 07:30:27.705029 # ok 168 /ocp/interconnect@48000000/segment@0/target-module@4c000
2201 07:30:27.735151 # ok 169 /ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0
2202 07:30:27.759176 # ok 170 /ocp/interconnect@48000000/segment@0/target-module@60000
2203 07:30:27.779370 # ok 171 /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0
2204 07:30:27.808991 # ok 172 /ocp/interconnect@48000000/segment@0/target-module@80000
2205 07:30:27.827098 # ok 173 /ocp/interconnect@48000000/segment@0/target-module@c8000
2206 07:30:27.855878 # ok 174 /ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0
2207 07:30:27.880176 # ok 175 /ocp/interconnect@48000000/segment@0/target-module@ca000
2208 07:30:27.905931 # ok 176 /ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0
2209 07:30:27.925769 # ok 177 /ocp/interconnect@48000000/segment@100000
2210 07:30:27.949061 # ok 178 /ocp/interconnect@48000000/segment@100000/target-module@9c000
2211 07:30:27.979658 # ok 179 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0
2212 07:30:28.055396 # not ok 180 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54
2213 07:30:28.123223 # not ok 181 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55
2214 07:30:28.200836 # not ok 182 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56
2215 07:30:28.268745 # not ok 183 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57
2216 07:30:28.297461 # ok 184 /ocp/interconnect@48000000/segment@100000/target-module@a0000
2217 07:30:28.317788 # ok 185 /ocp/interconnect@48000000/segment@100000/target-module@a6000
2218 07:30:28.337953 # ok 186 /ocp/interconnect@48000000/segment@100000/target-module@a8000
2219 07:30:28.369568 # ok 187 /ocp/interconnect@48000000/segment@100000/target-module@aa000
2220 07:30:28.385736 # ok 188 /ocp/interconnect@48000000/segment@100000/target-module@ac000
2221 07:30:28.416898 # ok 189 /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0
2222 07:30:28.441238 # ok 190 /ocp/interconnect@48000000/segment@100000/target-module@ae000
2223 07:30:28.466912 # ok 191 /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0
2224 07:30:28.489075 # ok 192 /ocp/interconnect@48000000/segment@100000/target-module@cc000
2225 07:30:28.508185 # ok 193 /ocp/interconnect@48000000/segment@100000/target-module@d0000
2226 07:30:28.535909 # ok 194 /ocp/interconnect@48000000/segment@100000/target-module@d8000
2227 07:30:28.558052 # ok 195 /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0
2228 07:30:28.586248 # ok 196 /ocp/interconnect@48000000/segment@200000
2229 07:30:28.604446 # ok 197 /ocp/interconnect@48000000/segment@200000/target-module@0
2230 07:30:28.686231 # ok 198 /ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0 # SKIP
2231 07:30:28.707062 # ok 199 /ocp/interconnect@48000000/segment@300000
2232 07:30:28.728301 # ok 200 /ocp/interconnect@48000000/segment@300000/target-module@0
2233 07:30:28.758557 # ok 201 /ocp/interconnect@48000000/segment@300000/target-module@10000
2234 07:30:28.782087 # ok 202 /ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0
2235 07:30:28.807099 # ok 203 /ocp/interconnect@48000000/segment@300000/target-module@2000
2236 07:30:28.823907 # ok 204 /ocp/interconnect@48000000/segment@300000/target-module@4000
2237 07:30:28.850329 # ok 205 /ocp/interconnect@48000000/segment@300000/target-module@e000
2238 07:30:28.930906 # not ok 206 /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
2239 07:30:28.945459 # ok 207 /ocp/interconnect@4a000000
2240 07:30:28.973723 # ok 208 /ocp/interconnect@4a000000/segment@0
2241 07:30:28.997037 # ok 209 /ocp/interconnect@4a000000/segment@0/target-module@100000
2242 07:30:29.025055 # ok 210 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0
2243 07:30:29.051733 # ok 211 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000
2244 07:30:29.073427 # ok 212 /ocp/interconnect@4a000000/segment@0/target-module@300000
2245 07:30:29.146283 # not ok 213 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0
2246 07:30:29.260783 # ok 214 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000 # SKIP
2247 07:30:29.337821 # not ok 215 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000
2248 07:30:29.448971 # ok 216 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000 # SKIP
2249 07:30:29.518014 # not ok 217 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000
2250 07:30:29.600961 # not ok 218 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000
2251 07:30:29.705358 # not ok 219 /ocp/interconnect@4b140000
2252 07:30:29.779439 # not ok 220 /ocp/interconnect@4b140000/segment@0
2253 07:30:29.849092 # ok 221 /ocp/interrupt-controller@48200000 # SKIP
2254 07:30:29.874071 # ok 222 /ocp/target-module@40300000
2255 07:30:29.901771 # ok 223 /ocp/target-module@40300000/sram@0
2256 07:30:29.975915 # ok 224 /ocp/target-module@40300000/sram@0/pm-code-sram@0 # SKIP
2257 07:30:30.048076 # ok 225 /ocp/target-module@40300000/sram@0/pm-data-sram@1000 # SKIP
2258 07:30:30.073659 # ok 226 /ocp/target-module@47400000
2259 07:30:30.099291 # ok 227 /ocp/target-module@47400000/dma-controller@2000
2260 07:30:30.118050 # ok 228 /ocp/target-module@47400000/usb-phy@1300
2261 07:30:30.145681 # ok 229 /ocp/target-module@47400000/usb-phy@1b00
2262 07:30:30.164428 # ok 230 /ocp/target-module@47400000/usb@1400
2263 07:30:30.194888 # ok 231 /ocp/target-module@47400000/usb@1800
2264 07:30:30.210309 # ok 232 /ocp/target-module@47810000
2265 07:30:30.233149 # ok 233 /ocp/target-module@49000000
2266 07:30:30.257039 # ok 234 /ocp/target-module@49000000/dma@0
2267 07:30:30.279887 # ok 235 /ocp/target-module@49800000
2268 07:30:30.308167 # ok 236 /ocp/target-module@49800000/dma@0
2269 07:30:30.331042 # ok 237 /ocp/target-module@49900000
2270 07:30:30.352856 # ok 238 /ocp/target-module@49900000/dma@0
2271 07:30:30.373777 # ok 239 /ocp/target-module@49a00000
2272 07:30:30.400989 # ok 240 /ocp/target-module@49a00000/dma@0
2273 07:30:30.423843 # ok 241 /ocp/target-module@4c000000
2274 07:30:30.502599 # not ok 242 /ocp/target-module@4c000000/emif@0
2275 07:30:30.517347 # ok 243 /ocp/target-module@50000000
2276 07:30:30.542903 # ok 244 /ocp/target-module@53100000
2277 07:30:30.617631 # not ok 245 /ocp/target-module@53100000/sham@0
2278 07:30:30.639452 # ok 246 /ocp/target-module@53500000
2279 07:30:30.720516 # not ok 247 /ocp/target-module@53500000/aes@0
2280 07:30:30.742294 # ok 248 /ocp/target-module@56000000
2281 07:30:30.851856 # ok 249 /ocp/target-module@56000000/gpu@0 # SKIP
2282 07:30:30.922077 # ok 250 /opp-table # SKIP
2283 07:30:30.995396 # ok 251 /soc # SKIP
2284 07:30:31.016867 # ok 252 /sound
2285 07:30:31.041743 # ok 253 /target-module@4b000000
2286 07:30:31.066927 # ok 254 /target-module@4b000000/target-module@140000
2287 07:30:31.087982 # ok 255 /target-module@4b000000/target-module@140000/pmu@0
2288 07:30:31.096052 # # Totals: pass:118 fail:29 xfail:0 xpass:0 skip:108 error:0
2289 07:30:31.105496 not ok 1 selftests: dt: test_unprobed_devices.sh # exit=1
2290 07:30:33.675769 dt_test_unprobed_devices_sh_ skip
2291 07:30:33.680572 dt_test_unprobed_devices_sh_clk_mcasp0 pass
2292 07:30:33.685756 dt_test_unprobed_devices_sh_clk_mcasp0_fixed skip
2293 07:30:33.686135 dt_test_unprobed_devices_sh_cpus_cpu_0 skip
2294 07:30:33.694524 dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate skip
2295 07:30:33.694903 dt_test_unprobed_devices_sh_fixedregulator0 pass
2296 07:30:33.700604 dt_test_unprobed_devices_sh_leds pass
2297 07:30:33.705622 dt_test_unprobed_devices_sh_ocp pass
2298 07:30:33.711895 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 pass
2299 07:30:33.716749 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 pass
2300 07:30:33.722856 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 pass
2301 07:30:33.727977 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 pass
2302 07:30:33.737976 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 fail
2303 07:30:33.744101 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 pass
2304 07:30:33.753703 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 pass
2305 07:30:33.759063 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 fail
2306 07:30:33.769912 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 skip
2307 07:30:33.780068 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 skip
2308 07:30:33.790973 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 skip
2309 07:30:33.801062 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c skip
2310 07:30:33.812182 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 skip
2311 07:30:33.822189 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c skip
2312 07:30:33.833140 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 skip
2313 07:30:33.843019 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 skip
2314 07:30:33.854174 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 skip
2315 07:30:33.858952 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 skip
2316 07:30:33.870180 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 skip
2317 07:30:33.879740 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 skip
2318 07:30:33.890933 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 skip
2319 07:30:33.900615 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 skip
2320 07:30:33.911827 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 skip
2321 07:30:33.921495 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 skip
2322 07:30:33.931820 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 skip
2323 07:30:33.942666 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 skip
2324 07:30:33.952670 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 skip
2325 07:30:33.958804 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 skip
2326 07:30:33.968676 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 skip
2327 07:30:33.978562 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz skip
2328 07:30:33.989679 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 skip
2329 07:30:34.000543 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k skip
2330 07:30:34.010353 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k skip
2331 07:30:34.021686 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk skip
2332 07:30:34.036400 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 skip
2333 07:30:34.047555 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 skip
2334 07:30:34.058669 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 skip
2335 07:30:34.068504 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 skip
2336 07:30:34.079693 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 skip
2337 07:30:34.089482 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 skip
2338 07:30:34.100672 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 skip
2339 07:30:34.115703 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 skip
2340 07:30:34.126675 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 skip
2341 07:30:34.136533 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 skip
2342 07:30:34.147693 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 skip
2343 07:30:34.157549 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm skip
2344 07:30:34.168544 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac skip
2345 07:30:34.178304 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c skip
2346 07:30:34.189202 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 skip
2347 07:30:34.205414 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk skip
2348 07:30:34.210214 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk skip
2349 07:30:34.226171 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk skip
2350 07:30:34.236032 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk skip
2351 07:30:34.247211 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk skip
2352 07:30:34.256885 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk skip
2353 07:30:34.268125 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 skip
2354 07:30:34.278178 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc skip
2355 07:30:34.289397 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 skip
2356 07:30:34.299038 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 skip
2357 07:30:34.310155 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div skip
2358 07:30:34.319931 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin skip
2359 07:30:34.331139 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 skip
2360 07:30:34.340764 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 skip
2361 07:30:34.352024 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c skip
2362 07:30:34.366663 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 skip
2363 07:30:34.376656 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 skip
2364 07:30:34.387683 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c skip
2365 07:30:34.398678 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 skip
2366 07:30:34.408660 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c skip
2367 07:30:34.419697 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 skip
2368 07:30:34.429553 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 skip
2369 07:30:34.440656 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 skip
2370 07:30:34.450425 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 skip
2371 07:30:34.461431 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 skip
2372 07:30:34.471562 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 skip
2373 07:30:34.482551 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c skip
2374 07:30:34.492393 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 skip
2375 07:30:34.503432 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 skip
2376 07:30:34.513262 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 skip
2377 07:30:34.524118 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c skip
2378 07:30:34.534179 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 skip
2379 07:30:34.545389 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 skip
2380 07:30:34.555550 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 skip
2381 07:30:34.566443 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 skip
2382 07:30:34.582552 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 skip
2383 07:30:34.592268 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 skip
2384 07:30:34.603698 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 pass
2385 07:30:34.608545 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 pass
2386 07:30:34.618424 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 pass
2387 07:30:34.629541 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 pass
2388 07:30:34.639292 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 pass
2389 07:30:34.649531 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 pass
2390 07:30:34.659544 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 pass
2391 07:30:34.665654 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 pass
2392 07:30:34.676649 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 fail
2393 07:30:34.686788 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 pass
2394 07:30:34.691692 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 pass
2395 07:30:34.702788 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 pass
2396 07:30:34.712797 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 fail
2397 07:30:34.723814 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck skip
2398 07:30:34.734925 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck skip
2399 07:30:34.751205 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck skip
2400 07:30:34.760958 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck skip
2401 07:30:34.772394 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck skip
2402 07:30:34.787172 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck skip
2403 07:30:34.798334 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck skip
2404 07:30:34.809520 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck skip
2405 07:30:34.820637 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck skip
2406 07:30:34.831930 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck skip
2407 07:30:34.843172 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 skip
2408 07:30:34.854158 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 skip
2409 07:30:34.871449 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 skip
2410 07:30:34.882539 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 skip
2411 07:30:34.899696 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 skip
2412 07:30:34.909663 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel pass
2413 07:30:34.915911 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 fail
2414 07:30:34.927035 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 fail
2415 07:30:34.933171 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 skip
2416 07:30:34.944281 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 pass
2417 07:30:34.955685 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 fail
2418 07:30:34.961640 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 pass
2419 07:30:34.972755 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 fail
2420 07:30:34.977644 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 pass
2421 07:30:34.987792 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 pass
2422 07:30:34.993906 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 pass
2423 07:30:35.004900 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 pass
2424 07:30:35.011167 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 pass
2425 07:30:35.022257 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 pass
2426 07:30:35.032172 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 pass
2427 07:30:35.043178 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 pass
2428 07:30:35.049254 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 pass
2429 07:30:35.060283 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger fail
2430 07:30:35.069933 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton fail
2431 07:30:35.081184 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 pass
2432 07:30:35.086009 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc fail
2433 07:30:35.095896 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc fail
2434 07:30:35.102052 dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 fail
2435 07:30:35.106784 dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 fail
2436 07:30:35.116659 dt_test_unprobed_devices_sh_ocp_interconnect_48000000 pass
2437 07:30:35.122804 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 pass
2438 07:30:35.127715 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 pass
2439 07:30:35.137653 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 pass
2440 07:30:35.143782 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 pass
2441 07:30:35.148646 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 pass
2442 07:30:35.158668 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 pass
2443 07:30:35.169897 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 pass
2444 07:30:35.173790 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 pass
2445 07:30:35.186176 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 fail
2446 07:30:35.191293 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 skip
2447 07:30:35.201034 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 pass
2448 07:30:35.207161 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 pass
2449 07:30:35.217052 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 pass
2450 07:30:35.228278 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 pass
2451 07:30:35.233198 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 pass
2452 07:30:35.243168 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 pass
2453 07:30:35.249386 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 pass
2454 07:30:35.259035 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 pass
2455 07:30:35.264103 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 pass
2456 07:30:35.275245 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 pass
2457 07:30:35.285043 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 pass
2458 07:30:35.291394 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 pass
2459 07:30:35.296267 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 pass
2460 07:30:35.306150 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 pass
2461 07:30:35.317035 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000 pass
2462 07:30:35.321772 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 pass
2463 07:30:35.332884 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 pass
2464 07:30:35.337894 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 pass
2465 07:30:35.347789 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 pass
2466 07:30:35.352662 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 pass
2467 07:30:35.363778 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 pass
2468 07:30:35.375042 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 pass
2469 07:30:35.379915 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 fail
2470 07:30:35.389703 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 fail
2471 07:30:35.401050 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 fail
2472 07:30:35.410928 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 fail
2473 07:30:35.422049 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 pass
2474 07:30:35.431939 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 pass
2475 07:30:35.438164 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 pass
2476 07:30:35.448020 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 pass
2477 07:30:35.453024 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 pass
2478 07:30:35.464107 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 pass
2479 07:30:35.473913 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 pass
2480 07:30:35.480004 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 pass
2481 07:30:35.489639 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 pass
2482 07:30:35.500749 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 pass
2483 07:30:35.505758 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 pass
2484 07:30:35.514542 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 pass
2485 07:30:35.520623 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 pass
2486 07:30:35.526765 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 pass
2487 07:30:35.536660 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 skip
2488 07:30:35.542801 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 pass
2489 07:30:35.552398 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 pass
2490 07:30:35.563684 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 pass
2491 07:30:35.568530 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 pass
2492 07:30:35.578287 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 pass
2493 07:30:35.584520 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 pass
2494 07:30:35.594142 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 pass
2495 07:30:35.605531 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 fail
2496 07:30:35.610410 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 pass
2497 07:30:35.615213 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 pass
2498 07:30:35.620144 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 pass
2499 07:30:35.631539 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 pass
2500 07:30:35.641299 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 pass
2501 07:30:35.647732 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 pass
2502 07:30:35.657565 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 fail
2503 07:30:35.668627 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 skip
2504 07:30:35.678536 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 fail
2505 07:30:35.688655 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 skip
2506 07:30:35.694779 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 fail
2507 07:30:35.703533 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 fail
2508 07:30:35.709786 dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 fail
2509 07:30:35.715825 dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 fail
2510 07:30:35.725594 dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 skip
2511 07:30:35.730690 dt_test_unprobed_devices_sh_ocp_target-module_40300000 pass
2512 07:30:35.735685 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 pass
2513 07:30:35.740750 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 skip
2514 07:30:35.746905 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 skip
2515 07:30:35.753275 dt_test_unprobed_devices_sh_ocp_target-module_47400000 pass
2516 07:30:35.762812 dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 pass
2517 07:30:35.768030 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 pass
2518 07:30:35.774279 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 pass
2519 07:30:35.779039 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 pass
2520 07:30:35.788877 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 pass
2521 07:30:35.795040 dt_test_unprobed_devices_sh_ocp_target-module_47810000 pass
2522 07:30:35.800031 dt_test_unprobed_devices_sh_ocp_target-module_49000000 pass
2523 07:30:35.804719 dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 pass
2524 07:30:35.809727 dt_test_unprobed_devices_sh_ocp_target-module_49800000 pass
2525 07:30:35.815908 dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 pass
2526 07:30:35.820982 dt_test_unprobed_devices_sh_ocp_target-module_49900000 pass
2527 07:30:35.825801 dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 pass
2528 07:30:35.830941 dt_test_unprobed_devices_sh_ocp_target-module_49a00000 pass
2529 07:30:35.837132 dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 pass
2530 07:30:35.842166 dt_test_unprobed_devices_sh_ocp_target-module_4c000000 pass
2531 07:30:35.846942 dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 fail
2532 07:30:35.852000 dt_test_unprobed_devices_sh_ocp_target-module_50000000 pass
2533 07:30:35.858147 dt_test_unprobed_devices_sh_ocp_target-module_53100000 pass
2534 07:30:35.862986 dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 fail
2535 07:30:35.869399 dt_test_unprobed_devices_sh_ocp_target-module_53500000 pass
2536 07:30:35.875518 dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 fail
2537 07:30:35.880406 dt_test_unprobed_devices_sh_ocp_target-module_56000000 pass
2538 07:30:35.890088 dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 skip
2539 07:30:35.890476 dt_test_unprobed_devices_sh_opp-table skip
2540 07:30:35.896164 dt_test_unprobed_devices_sh_soc skip
2541 07:30:35.901168 dt_test_unprobed_devices_sh_sound pass
2542 07:30:35.901551 dt_test_unprobed_devices_sh_target-module_4b000000 pass
2543 07:30:35.911019 dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 pass
2544 07:30:35.917135 dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 pass
2545 07:30:35.922052 dt_test_unprobed_devices_sh fail
2546 07:30:35.925390 + ../../utils/send-to-lava.sh ./output/result.txt
2547 07:30:36.051731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=pass>
2548 07:30:36.052820 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=pass
2550 07:30:36.239534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip>
2551 07:30:36.240185 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip
2553 07:30:36.451761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass>
2554 07:30:36.452381 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass
2556 07:30:36.646390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip>
2557 07:30:36.647010 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip
2559 07:30:36.862044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip>
2560 07:30:36.862661 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip
2562 07:30:37.069337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip>
2563 07:30:37.069954 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip
2565 07:30:37.262679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass>
2566 07:30:37.263304 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass
2568 07:30:37.452791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass>
2569 07:30:37.453423 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass
2571 07:30:37.636375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass>
2572 07:30:37.636980 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass
2574 07:30:37.829130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass>
2575 07:30:37.829753 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass
2577 07:30:38.011217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass>
2578 07:30:38.011860 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass
2580 07:30:38.181777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass>
2581 07:30:38.182402 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass
2583 07:30:38.365262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass>
2584 07:30:38.365882 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass
2586 07:30:38.550849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail>
2587 07:30:38.551469 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail
2589 07:30:38.718373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass>
2590 07:30:38.718994 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass
2592 07:30:38.895445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass>
2593 07:30:38.896092 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass
2595 07:30:39.075835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail>
2596 07:30:39.076450 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail
2598 07:30:39.260169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip>
2599 07:30:39.260767 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip
2601 07:30:39.433211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip>
2602 07:30:39.433831 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip
2604 07:30:39.596642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip>
2605 07:30:39.597264 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip
2607 07:30:39.778445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip>
2608 07:30:39.779069 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip
2610 07:30:39.973690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip>
2611 07:30:39.974312 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip
2613 07:30:40.167811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip>
2614 07:30:40.168435 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip
2616 07:30:40.356639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip>
2617 07:30:40.357260 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip
2619 07:30:40.532676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip>
2620 07:30:40.533297 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip
2622 07:30:40.716393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip>
2623 07:30:40.717014 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip
2625 07:30:40.900939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip>
2626 07:30:40.901562 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip
2628 07:30:41.079324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip>
2629 07:30:41.079971 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip
2631 07:30:41.265082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip>
2632 07:30:41.265702 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip
2634 07:30:41.476157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip>
2635 07:30:41.476780 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip
2637 07:30:41.664912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip>
2638 07:30:41.665535 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip
2640 07:30:41.852727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip>
2641 07:30:41.853352 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip
2643 07:30:42.037649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip>
2644 07:30:42.038276 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip
2646 07:30:42.226553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip>
2647 07:30:42.227174 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip
2649 07:30:42.417721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip>
2650 07:30:42.418349 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip
2652 07:30:42.608846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip>
2653 07:30:42.609468 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip
2655 07:30:42.791327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip>
2656 07:30:42.791973 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip
2658 07:30:42.980019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip>
2659 07:30:42.980641 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip
2661 07:30:43.156426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip>
2662 07:30:43.157047 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip
2664 07:30:43.338204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip>
2665 07:30:43.338827 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip
2667 07:30:43.530274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip>
2668 07:30:43.530894 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip
2670 07:30:43.720462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip>
2671 07:30:43.721083 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip
2673 07:30:43.905239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip>
2674 07:30:43.905857 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip
2676 07:30:44.095570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip>
2677 07:30:44.096226 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip
2679 07:30:44.280523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip>
2680 07:30:44.281144 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip
2682 07:30:44.463130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip>
2683 07:30:44.463755 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip
2685 07:30:44.638609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip>
2686 07:30:44.639234 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip
2688 07:30:44.806559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip>
2689 07:30:44.807182 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip
2691 07:30:44.993717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip>
2692 07:30:44.994339 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip
2694 07:30:45.168024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip>
2695 07:30:45.168649 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip
2697 07:30:45.371790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip>
2698 07:30:45.372413 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip
2700 07:30:45.568553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip>
2701 07:30:45.569174 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip
2703 07:30:45.767389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip>
2704 07:30:45.768043 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip
2706 07:30:45.941671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip>
2707 07:30:45.942293 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip
2709 07:30:46.121471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip>
2710 07:30:46.122092 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip
2712 07:30:46.303168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip>
2713 07:30:46.303790 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip
2715 07:30:46.484698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip>
2716 07:30:46.485321 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip
2718 07:30:46.692808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip>
2719 07:30:46.693431 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip
2721 07:30:46.873273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip>
2722 07:30:46.873896 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip
2724 07:30:47.057085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip>
2725 07:30:47.057704 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip
2727 07:30:47.248423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip>
2728 07:30:47.249045 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip
2730 07:30:47.435713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip>
2731 07:30:47.436334 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip
2733 07:30:47.628010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip>
2734 07:30:47.628632 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip
2736 07:30:47.798172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip>
2737 07:30:47.798791 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip
2739 07:30:47.974580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip>
2740 07:30:47.975199 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip
2742 07:30:48.180359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip>
2743 07:30:48.180980 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip
2745 07:30:48.360032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip>
2746 07:30:48.360653 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip
2748 07:30:48.536429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip>
2749 07:30:48.537055 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip
2751 07:30:48.721331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip>
2752 07:30:48.721950 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip
2754 07:30:48.904107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip>
2755 07:30:48.904727 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip
2757 07:30:49.087858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip>
2758 07:30:49.088477 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip
2760 07:30:49.275877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip>
2761 07:30:49.276499 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip
2763 07:30:49.455586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip>
2764 07:30:49.456237 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip
2766 07:30:49.636201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip>
2767 07:30:49.636824 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip
2769 07:30:49.818972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip>
2770 07:30:49.819590 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip
2772 07:30:50.019801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip>
2773 07:30:50.020425 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip
2775 07:30:50.206451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip>
2776 07:30:50.207075 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip
2778 07:30:50.396527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip>
2779 07:30:50.397149 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip
2781 07:30:50.576280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip>
2782 07:30:50.576899 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip
2784 07:30:50.747582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip>
2785 07:30:50.748230 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip
2787 07:30:50.932409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip>
2788 07:30:50.933030 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip
2790 07:30:51.105575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip>
2791 07:30:51.106197 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip
2793 07:30:51.285364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip>
2794 07:30:51.285987 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip
2796 07:30:51.475393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip>
2797 07:30:51.476046 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip
2799 07:30:51.682421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip>
2800 07:30:51.683042 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip
2802 07:30:51.860724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip>
2803 07:30:51.861350 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip
2805 07:30:52.034925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip>
2806 07:30:52.035552 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip
2808 07:30:52.249398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip>
2809 07:30:52.250023 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip
2811 07:30:52.432869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip>
2812 07:30:52.433490 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip
2814 07:30:52.627563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip>
2815 07:30:52.628218 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip
2817 07:30:52.826335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip>
2818 07:30:52.826956 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip
2820 07:30:53.038649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip>
2821 07:30:53.039273 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip
2823 07:30:53.227797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip>
2824 07:30:53.228416 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip
2826 07:30:53.403163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip>
2827 07:30:53.403787 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip
2829 07:30:53.586142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip>
2830 07:30:53.586765 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip
2832 07:30:53.765548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass>
2833 07:30:53.766179 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass
2835 07:30:53.970053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass>
2836 07:30:53.970668 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass
2838 07:30:54.166301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass>
2839 07:30:54.166917 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass
2841 07:30:54.341473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass>
2842 07:30:54.342097 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass
2844 07:30:54.527310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass>
2845 07:30:54.527956 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass
2847 07:30:54.698253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass>
2848 07:30:54.698875 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass
2850 07:30:54.880690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass>
2851 07:30:54.881316 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass
2853 07:30:55.054757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass>
2854 07:30:55.055384 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass
2856 07:30:55.244363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail>
2857 07:30:55.244984 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail
2859 07:30:55.445938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass>
2860 07:30:55.446560 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass
2862 07:30:55.627378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass>
2863 07:30:55.628049 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass
2865 07:30:55.848946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass>
2866 07:30:55.849571 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass
2868 07:30:56.031677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail>
2869 07:30:56.032300 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail
2871 07:30:56.227311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip>
2872 07:30:56.227962 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip
2874 07:30:56.435432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip>
2875 07:30:56.436082 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip
2877 07:30:56.626565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip>
2878 07:30:56.627189 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip
2880 07:30:56.837113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip>
2881 07:30:56.837734 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip
2883 07:30:57.029546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip>
2884 07:30:57.030168 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip
2886 07:30:57.219687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip>
2887 07:30:57.220309 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip
2889 07:30:57.417303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip>
2890 07:30:57.417929 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip
2892 07:30:57.607538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip>
2893 07:30:57.608186 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip
2895 07:30:57.811545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip>
2896 07:30:57.812192 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip
2898 07:30:57.988090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip>
2899 07:30:57.988713 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip
2901 07:30:58.182449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip>
2902 07:30:58.183072 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip
2904 07:30:58.409348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip>
2905 07:30:58.409931 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip
2907 07:30:58.586069 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip
2909 07:30:58.589169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip>
2910 07:30:58.777698 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip
2912 07:30:58.780662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip>
2913 07:30:58.970432 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip
2915 07:30:58.973478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip>
2916 07:30:59.155096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass>
2917 07:30:59.155696 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass
2919 07:30:59.345103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail>
2920 07:30:59.345723 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail
2922 07:30:59.516916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail>
2923 07:30:59.517539 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail
2925 07:30:59.700441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip>
2926 07:30:59.701070 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip
2928 07:30:59.884764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass>
2929 07:30:59.885384 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass
2931 07:31:00.108364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail>
2932 07:31:00.109007 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail
2934 07:31:00.298221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass>
2935 07:31:00.298864 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass
2937 07:31:00.481571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail>
2938 07:31:00.482192 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail
2940 07:31:00.668439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass>
2941 07:31:00.669062 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass
2943 07:31:00.861333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass>
2944 07:31:00.861951 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass
2946 07:31:01.083150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass>
2947 07:31:01.083772 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass
2949 07:31:01.255733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass>
2950 07:31:01.256354 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass
2952 07:31:01.442222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass>
2953 07:31:01.442841 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass
2955 07:31:01.625427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass>
2956 07:31:01.626046 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass
2958 07:31:01.817530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass>
2959 07:31:01.818154 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass
2961 07:31:02.035097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass>
2962 07:31:02.035694 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass
2964 07:31:02.229309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass>
2965 07:31:02.229943 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass
2967 07:31:02.410881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail>
2968 07:31:02.411504 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail
2970 07:31:02.585173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail>
2971 07:31:02.585801 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail
2973 07:31:02.775219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass>
2974 07:31:02.775875 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass
2976 07:31:02.975773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc RESULT=fail>
2977 07:31:02.976395 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc RESULT=fail
2979 07:31:03.168706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc RESULT=fail>
2980 07:31:03.169327 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc RESULT=fail
2982 07:31:03.355927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail>
2983 07:31:03.356550 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail
2985 07:31:03.555740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail>
2986 07:31:03.556357 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail
2988 07:31:03.744917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass>
2989 07:31:03.745533 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass
2991 07:31:03.939556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass>
2992 07:31:03.940209 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass
2994 07:31:04.125226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass>
2995 07:31:04.125841 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass
2997 07:31:04.327649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass>
2998 07:31:04.328264 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass
3000 07:31:04.524773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass>
3001 07:31:04.525395 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass
3003 07:31:04.747945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass>
3004 07:31:04.748564 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass
3006 07:31:04.933574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass>
3007 07:31:04.934197 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass
3009 07:31:05.128487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass>
3010 07:31:05.129111 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass
3012 07:31:05.318589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass>
3013 07:31:05.319211 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass
3015 07:31:05.501924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail>
3016 07:31:05.502556 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail
3018 07:31:05.684352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip>
3019 07:31:05.684979 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip
3021 07:31:05.878383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass>
3022 07:31:05.879004 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass
3024 07:31:06.054363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass>
3025 07:31:06.054987 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass
3027 07:31:06.237952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass>
3028 07:31:06.238574 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass
3030 07:31:06.441601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass>
3031 07:31:06.442219 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass
3033 07:31:06.640696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass>
3034 07:31:06.641326 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass
3036 07:31:06.852463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass>
3037 07:31:06.853103 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass
3039 07:31:07.087518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass>
3040 07:31:07.088166 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass
3042 07:31:07.271943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass>
3043 07:31:07.272585 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass
3045 07:31:07.474392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass>
3046 07:31:07.475009 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass
3048 07:31:07.659715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass>
3049 07:31:07.660337 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass
3051 07:31:07.854641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass>
3052 07:31:07.855262 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass
3054 07:31:08.043573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass>
3055 07:31:08.044220 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass
3057 07:31:08.235395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass>
3058 07:31:08.236046 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass
3060 07:31:08.466535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass>
3061 07:31:08.467157 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass
3063 07:31:08.680498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000 RESULT=pass>
3064 07:31:08.681130 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000 RESULT=pass
3066 07:31:08.864052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass>
3067 07:31:08.864669 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass
3069 07:31:09.056027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass>
3070 07:31:09.056669 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass
3072 07:31:09.243687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass>
3073 07:31:09.244302 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass
3075 07:31:09.429298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass>
3076 07:31:09.429930 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass
3078 07:31:09.607205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass>
3079 07:31:09.607827 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass
3081 07:31:09.798110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass>
3082 07:31:09.798731 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass
3084 07:31:09.997485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass>
3085 07:31:09.998133 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass
3087 07:31:10.174802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail>
3088 07:31:10.175436 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail
3090 07:31:10.358441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail>
3091 07:31:10.359060 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail
3093 07:31:10.545294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail>
3094 07:31:10.545945 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail
3096 07:31:10.732178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail>
3097 07:31:10.732802 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail
3099 07:31:10.917733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass>
3100 07:31:10.918379 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass
3102 07:31:11.111808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass>
3103 07:31:11.112431 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass
3105 07:31:11.294349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass>
3106 07:31:11.294970 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass
3108 07:31:11.488535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass>
3109 07:31:11.489156 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass
3111 07:31:11.672855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass>
3112 07:31:11.673474 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass
3114 07:31:11.854410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass>
3115 07:31:11.855032 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass
3117 07:31:12.064296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass>
3118 07:31:12.064916 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass
3120 07:31:12.294372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass>
3121 07:31:12.294995 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass
3123 07:31:12.499073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass>
3124 07:31:12.499692 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass
3126 07:31:12.690822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass>
3127 07:31:12.691444 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass
3129 07:31:12.910370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass>
3130 07:31:12.910987 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass
3132 07:31:13.124463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass>
3133 07:31:13.125081 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass
3135 07:31:13.321263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass>
3136 07:31:13.321882 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass
3138 07:31:13.520540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass>
3139 07:31:13.521160 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass
3141 07:31:13.710499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip>
3142 07:31:13.711120 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip
3144 07:31:13.885265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass>
3145 07:31:13.885889 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass
3147 07:31:14.074947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass>
3148 07:31:14.075568 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass
3150 07:31:14.282628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass>
3151 07:31:14.283249 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass
3153 07:31:14.473522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass>
3154 07:31:14.474143 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass
3156 07:31:14.667470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass>
3157 07:31:14.668121 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass
3159 07:31:14.845623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass>
3160 07:31:14.846244 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass
3162 07:31:15.037337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass>
3163 07:31:15.037958 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass
3165 07:31:15.233374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail>
3166 07:31:15.233996 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail
3168 07:31:15.422852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass>
3169 07:31:15.423477 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass
3171 07:31:15.620589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass>
3172 07:31:15.621214 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass
3174 07:31:15.810514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass>
3175 07:31:15.811135 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass
3177 07:31:16.043296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass>
3178 07:31:16.043968 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass
3180 07:31:16.243977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass>
3181 07:31:16.244603 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass
3183 07:31:16.458983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass>
3184 07:31:16.459646 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass
3186 07:31:16.659312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail>
3187 07:31:16.659987 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail
3189 07:31:16.841901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip>
3190 07:31:16.842523 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip
3192 07:31:17.053160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail>
3193 07:31:17.053787 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail
3195 07:31:17.264105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip>
3196 07:31:17.264730 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip
3198 07:31:17.440391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail>
3199 07:31:17.441016 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail
3201 07:31:17.638918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail>
3202 07:31:17.639544 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail
3204 07:31:17.830267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail>
3205 07:31:17.830891 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail
3207 07:31:18.031310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail>
3208 07:31:18.031958 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail
3210 07:31:18.213249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip>
3211 07:31:18.213870 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip
3213 07:31:18.393118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass>
3214 07:31:18.393738 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass
3216 07:31:18.569920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass>
3217 07:31:18.570540 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass
3219 07:31:18.748846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip>
3220 07:31:18.749464 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip
3222 07:31:18.939953 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip
3224 07:31:18.942983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip>
3225 07:31:19.121717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass>
3226 07:31:19.122337 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass
3228 07:31:19.309149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass>
3229 07:31:19.309764 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass
3231 07:31:19.533361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass>
3232 07:31:19.533983 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass
3234 07:31:19.725301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass>
3235 07:31:19.725922 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass
3237 07:31:19.924301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass>
3238 07:31:19.924922 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass
3240 07:31:20.124243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass>
3241 07:31:20.124862 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass
3243 07:31:20.299933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass>
3244 07:31:20.300552 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass
3246 07:31:20.492657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass>
3247 07:31:20.493303 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass
3249 07:31:20.666248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass>
3250 07:31:20.666883 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass
3252 07:31:20.846339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass>
3253 07:31:20.846964 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass
3255 07:31:21.034002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass>
3256 07:31:21.034622 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass
3258 07:31:21.220213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass>
3259 07:31:21.220833 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass
3261 07:31:21.402386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass>
3262 07:31:21.403010 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass
3264 07:31:21.598258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass>
3265 07:31:21.598878 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass
3267 07:31:21.790797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass>
3268 07:31:21.791416 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass
3270 07:31:21.967487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass>
3271 07:31:21.968146 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass
3273 07:31:22.146591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail>
3274 07:31:22.147240 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail
3276 07:31:22.313024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass>
3277 07:31:22.313672 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass
3279 07:31:22.531915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass>
3280 07:31:22.532534 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass
3282 07:31:22.733923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail>
3283 07:31:22.734543 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail
3285 07:31:22.937193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass>
3286 07:31:22.937814 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass
3288 07:31:23.148895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail>
3289 07:31:23.149516 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail
3291 07:31:23.333029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass>
3292 07:31:23.333647 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass
3294 07:31:23.550228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip>
3295 07:31:23.550845 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip
3297 07:31:23.728877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip>
3298 07:31:23.729497 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip
3300 07:31:23.922130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip>
3301 07:31:23.922748 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip
3303 07:31:24.119754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass>
3304 07:31:24.120374 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass
3306 07:31:24.324990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass>
3307 07:31:24.325607 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass
3309 07:31:24.511404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass>
3310 07:31:24.512057 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass
3312 07:31:24.703122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass>
3313 07:31:24.703746 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass
3315 07:31:24.891348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail>
3316 07:31:24.891995 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail
3318 07:31:24.897916 + set +x
3319 07:31:24.898533 Received signal: <ENDRUN> 1_kselftest-dt 1186507_1.6.2.4.5
3320 07:31:24.898880 Ending use of test pattern.
3321 07:31:24.899182 Ending test lava.1_kselftest-dt (1186507_1.6.2.4.5), duration 211.38
3323 07:31:24.901187 <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 1186507_1.6.2.4.5>
3324 07:31:24.960658 <LAVA_TEST_RUNNER EXIT>
3325 07:31:24.961271 ok: lava_test_shell seems to have completed
3326 07:31:24.968773 dt_test_unprobed_devices_sh: fail
dt_test_unprobed_devices_sh_: skip
dt_test_unprobed_devices_sh_clk_mcasp0: pass
dt_test_unprobed_devices_sh_clk_mcasp0_fixed: skip
dt_test_unprobed_devices_sh_cpus_cpu_0: skip
dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate: skip
dt_test_unprobed_devices_sh_fixedregulator0: pass
dt_test_unprobed_devices_sh_leds: pass
dt_test_unprobed_devices_sh_ocp: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0: fail
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000: skip
dt_test_unprobed_devices_sh_ocp_target-module_47400000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800: pass
dt_test_unprobed_devices_sh_ocp_target-module_47810000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_50000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_53500000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_56000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0: skip
dt_test_unprobed_devices_sh_opp-table: skip
dt_test_unprobed_devices_sh_soc: skip
dt_test_unprobed_devices_sh_sound: pass
dt_test_unprobed_devices_sh_target-module_4b000000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0: pass
shardfile-dt: pass
3327 07:31:24.970189 end: 3.1 lava-test-shell (duration 00:03:33) [common]
3328 07:31:24.970596 end: 3 lava-test-retry (duration 00:03:33) [common]
3329 07:31:24.971003 start: 4 finalize (timeout 00:03:15) [common]
3330 07:31:24.971422 start: 4.1 power-off (timeout 00:00:30) [common]
3331 07:31:24.971923 Calling: 'drpm' 'lf-bbb' 'off'
3332 07:31:25.272918 >> OFF
3333 07:31:25.274255 Returned 0 in 0 seconds
3334 07:31:25.375256 end: 4.1 power-off (duration 00:00:00) [common]
3336 07:31:25.376439 start: 4.2 read-feedback (timeout 00:03:15) [common]
3337 07:31:25.377296 Listened to connection for namespace 'common' for up to 1s
3338 07:31:25.377973 Listened to connection for namespace 'common' for up to 1s
3339 07:31:26.377505 Finalising connection for namespace 'common'
3340 07:31:26.377986 Disconnecting from shell: Finalise
3341 07:31:26.378370 / #
3342 07:31:26.479122 end: 4.2 read-feedback (duration 00:00:01) [common]
3343 07:31:26.479671 end: 4 finalize (duration 00:00:02) [common]
3344 07:31:26.480170 Cleaning after the job
3345 07:31:26.480629 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/ramdisk
3346 07:31:26.486400 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/kernel
3347 07:31:26.491045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/dtb
3348 07:31:26.491934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/nfsrootfs
3349 07:31:26.595921 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1186507/tftp-deploy-2efq0q0e/modules
3350 07:31:26.601205 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/1186507
3351 07:31:27.767556 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/1186507
3352 07:31:27.768067 Job finished correctly