Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:52:13.497130 lava-dispatcher, installed at version: 2024.01
2 04:52:13.497946 start: 0 validate
3 04:52:13.498436 Start time: 2024-08-31 04:52:13.498406+00:00 (UTC)
4 04:52:13.499062 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:52:13.499615 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:52:13.545318 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:52:13.545890 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-219-g1934261d89746%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 04:52:13.579395 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:52:13.580048 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-219-g1934261d89746%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:52:13.607710 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:52:13.608202 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:52:13.640519 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:52:13.640987 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-219-g1934261d89746%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 04:52:13.689975 validate duration: 0.19
16 04:52:13.691450 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:52:13.692106 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:52:13.692693 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:52:13.693687 Not decompressing ramdisk as can be used compressed.
20 04:52:13.694399 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 04:52:13.694920 saving as /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/ramdisk/initrd.cpio.gz
22 04:52:13.695433 total size: 5628182 (5 MB)
23 04:52:13.739704 progress 0 % (0 MB)
24 04:52:13.747720 progress 5 % (0 MB)
25 04:52:13.755462 progress 10 % (0 MB)
26 04:52:13.762641 progress 15 % (0 MB)
27 04:52:13.770623 progress 20 % (1 MB)
28 04:52:13.776871 progress 25 % (1 MB)
29 04:52:13.780965 progress 30 % (1 MB)
30 04:52:13.785370 progress 35 % (1 MB)
31 04:52:13.789079 progress 40 % (2 MB)
32 04:52:13.793031 progress 45 % (2 MB)
33 04:52:13.796660 progress 50 % (2 MB)
34 04:52:13.800669 progress 55 % (2 MB)
35 04:52:13.804739 progress 60 % (3 MB)
36 04:52:13.808349 progress 65 % (3 MB)
37 04:52:13.812530 progress 70 % (3 MB)
38 04:52:13.816250 progress 75 % (4 MB)
39 04:52:13.820324 progress 80 % (4 MB)
40 04:52:13.823775 progress 85 % (4 MB)
41 04:52:13.827475 progress 90 % (4 MB)
42 04:52:13.831164 progress 95 % (5 MB)
43 04:52:13.834477 progress 100 % (5 MB)
44 04:52:13.835147 5 MB downloaded in 0.14 s (38.42 MB/s)
45 04:52:13.835719 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:52:13.836671 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:52:13.836987 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:52:13.837276 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:52:13.837834 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm64/defconfig+debug/gcc-12/kernel/Image
51 04:52:13.838104 saving as /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/kernel/Image
52 04:52:13.838328 total size: 167969280 (160 MB)
53 04:52:13.838553 No compression specified
54 04:52:13.876271 progress 0 % (0 MB)
55 04:52:13.978469 progress 5 % (8 MB)
56 04:52:14.080654 progress 10 % (16 MB)
57 04:52:14.182362 progress 15 % (24 MB)
58 04:52:14.284863 progress 20 % (32 MB)
59 04:52:14.386534 progress 25 % (40 MB)
60 04:52:14.488465 progress 30 % (48 MB)
61 04:52:14.590993 progress 35 % (56 MB)
62 04:52:14.692658 progress 40 % (64 MB)
63 04:52:14.794643 progress 45 % (72 MB)
64 04:52:14.897112 progress 50 % (80 MB)
65 04:52:14.998602 progress 55 % (88 MB)
66 04:52:15.100656 progress 60 % (96 MB)
67 04:52:15.202336 progress 65 % (104 MB)
68 04:52:15.304723 progress 70 % (112 MB)
69 04:52:15.406028 progress 75 % (120 MB)
70 04:52:15.508496 progress 80 % (128 MB)
71 04:52:15.610653 progress 85 % (136 MB)
72 04:52:15.712575 progress 90 % (144 MB)
73 04:52:15.814086 progress 95 % (152 MB)
74 04:52:15.914888 progress 100 % (160 MB)
75 04:52:15.915409 160 MB downloaded in 2.08 s (77.12 MB/s)
76 04:52:15.915887 end: 1.2.1 http-download (duration 00:00:02) [common]
78 04:52:15.916744 end: 1.2 download-retry (duration 00:00:02) [common]
79 04:52:15.917022 start: 1.3 download-retry (timeout 00:09:58) [common]
80 04:52:15.917291 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 04:52:15.917751 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:52:15.918018 saving as /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:52:15.918229 total size: 53173 (0 MB)
84 04:52:15.918442 No compression specified
85 04:52:15.960692 progress 61 % (0 MB)
86 04:52:15.961561 progress 100 % (0 MB)
87 04:52:15.962107 0 MB downloaded in 0.04 s (1.16 MB/s)
88 04:52:15.962571 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:52:15.963390 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:52:15.963656 start: 1.4 download-retry (timeout 00:09:58) [common]
92 04:52:15.963927 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 04:52:15.964485 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 04:52:15.964752 saving as /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/nfsrootfs/full.rootfs.tar
95 04:52:15.964961 total size: 107552908 (102 MB)
96 04:52:15.965175 Using unxz to decompress xz
97 04:52:16.005416 progress 0 % (0 MB)
98 04:52:16.644335 progress 5 % (5 MB)
99 04:52:17.364600 progress 10 % (10 MB)
100 04:52:18.099371 progress 15 % (15 MB)
101 04:52:18.859290 progress 20 % (20 MB)
102 04:52:19.455874 progress 25 % (25 MB)
103 04:52:20.258015 progress 30 % (30 MB)
104 04:52:21.197016 progress 35 % (35 MB)
105 04:52:21.563084 progress 40 % (41 MB)
106 04:52:21.990579 progress 45 % (46 MB)
107 04:52:22.671478 progress 50 % (51 MB)
108 04:52:23.350442 progress 55 % (56 MB)
109 04:52:24.101874 progress 60 % (61 MB)
110 04:52:24.853117 progress 65 % (66 MB)
111 04:52:25.591169 progress 70 % (71 MB)
112 04:52:26.360062 progress 75 % (76 MB)
113 04:52:27.044605 progress 80 % (82 MB)
114 04:52:27.751712 progress 85 % (87 MB)
115 04:52:28.478427 progress 90 % (92 MB)
116 04:52:29.182157 progress 95 % (97 MB)
117 04:52:29.924132 progress 100 % (102 MB)
118 04:52:29.936016 102 MB downloaded in 13.97 s (7.34 MB/s)
119 04:52:29.936949 end: 1.4.1 http-download (duration 00:00:14) [common]
121 04:52:29.938771 end: 1.4 download-retry (duration 00:00:14) [common]
122 04:52:29.939360 start: 1.5 download-retry (timeout 00:09:44) [common]
123 04:52:29.939945 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 04:52:29.941121 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 04:52:29.941656 saving as /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/modules/modules.tar
126 04:52:29.942127 total size: 27403736 (26 MB)
127 04:52:29.942601 Using unxz to decompress xz
128 04:52:29.981973 progress 0 % (0 MB)
129 04:52:30.202640 progress 5 % (1 MB)
130 04:52:30.461533 progress 10 % (2 MB)
131 04:52:30.699303 progress 15 % (3 MB)
132 04:52:30.955280 progress 20 % (5 MB)
133 04:52:31.156187 progress 25 % (6 MB)
134 04:52:31.348675 progress 30 % (7 MB)
135 04:52:31.545000 progress 35 % (9 MB)
136 04:52:31.740846 progress 40 % (10 MB)
137 04:52:31.939115 progress 45 % (11 MB)
138 04:52:32.136239 progress 50 % (13 MB)
139 04:52:32.317365 progress 55 % (14 MB)
140 04:52:32.522423 progress 60 % (15 MB)
141 04:52:32.735376 progress 65 % (17 MB)
142 04:52:32.936959 progress 70 % (18 MB)
143 04:52:33.168692 progress 75 % (19 MB)
144 04:52:33.385315 progress 80 % (20 MB)
145 04:52:33.579830 progress 85 % (22 MB)
146 04:52:33.796703 progress 90 % (23 MB)
147 04:52:33.993545 progress 95 % (24 MB)
148 04:52:34.200804 progress 100 % (26 MB)
149 04:52:34.211746 26 MB downloaded in 4.27 s (6.12 MB/s)
150 04:52:34.212431 end: 1.5.1 http-download (duration 00:00:04) [common]
152 04:52:34.213381 end: 1.5 download-retry (duration 00:00:04) [common]
153 04:52:34.213697 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 04:52:34.214014 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 04:52:44.021423 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/681352/extract-nfsrootfs-eazxzogv
156 04:52:44.022021 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 04:52:44.022312 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 04:52:44.022940 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz
159 04:52:44.023390 makedir: /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin
160 04:52:44.023730 makedir: /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/tests
161 04:52:44.024084 makedir: /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/results
162 04:52:44.024438 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-add-keys
163 04:52:44.025052 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-add-sources
164 04:52:44.025563 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-background-process-start
165 04:52:44.026071 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-background-process-stop
166 04:52:44.026621 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-common-functions
167 04:52:44.027123 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-echo-ipv4
168 04:52:44.027606 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-install-packages
169 04:52:44.028121 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-installed-packages
170 04:52:44.028623 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-os-build
171 04:52:44.029103 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-probe-channel
172 04:52:44.029590 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-probe-ip
173 04:52:44.030091 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-target-ip
174 04:52:44.030605 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-target-mac
175 04:52:44.031091 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-target-storage
176 04:52:44.031583 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-case
177 04:52:44.032086 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-event
178 04:52:44.032573 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-feedback
179 04:52:44.033046 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-raise
180 04:52:44.033523 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-reference
181 04:52:44.034016 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-runner
182 04:52:44.034514 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-set
183 04:52:44.034990 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-test-shell
184 04:52:44.035481 Updating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-install-packages (oe)
185 04:52:44.036050 Updating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/bin/lava-installed-packages (oe)
186 04:52:44.036535 Creating /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/environment
187 04:52:44.036915 LAVA metadata
188 04:52:44.037184 - LAVA_JOB_ID=681352
189 04:52:44.037405 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:52:44.037779 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 04:52:44.038770 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:52:44.039098 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 04:52:44.039314 skipped lava-vland-overlay
194 04:52:44.039563 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:52:44.039826 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 04:52:44.040079 skipped lava-multinode-overlay
197 04:52:44.040339 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:52:44.040599 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 04:52:44.040861 Loading test definitions
200 04:52:44.041149 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 04:52:44.041379 Using /lava-681352 at stage 0
202 04:52:44.042614 uuid=681352_1.6.2.4.1 testdef=None
203 04:52:44.042937 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:52:44.043210 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 04:52:44.045058 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:52:44.045866 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 04:52:44.048161 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:52:44.049016 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 04:52:44.051201 runner path: /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/0/tests/0_dmesg test_uuid 681352_1.6.2.4.1
212 04:52:44.051755 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:52:44.052548 Creating lava-test-runner.conf files
215 04:52:44.052759 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/681352/lava-overlay-91tccnoz/lava-681352/0 for stage 0
216 04:52:44.053100 - 0_dmesg
217 04:52:44.053450 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:52:44.053731 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 04:52:44.075614 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:52:44.076056 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 04:52:44.076330 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:52:44.076605 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:52:44.076875 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 04:52:44.691701 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:52:44.692223 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 04:52:44.692524 extracting modules file /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/modules/modules.tar to /var/lib/lava/dispatcher/tmp/681352/extract-nfsrootfs-eazxzogv
227 04:52:46.370048 extracting modules file /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/modules/modules.tar to /var/lib/lava/dispatcher/tmp/681352/extract-overlay-ramdisk-nxzpkrgj/ramdisk
228 04:52:48.129843 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:52:48.130331 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 04:52:48.130615 [common] Applying overlay to NFS
231 04:52:48.130830 [common] Applying overlay /var/lib/lava/dispatcher/tmp/681352/compress-overlay-7offsk1j/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/681352/extract-nfsrootfs-eazxzogv
232 04:52:48.160755 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:52:48.161180 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 04:52:48.161458 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 04:52:48.161694 Converting downloaded kernel to a uImage
236 04:52:48.162010 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/kernel/Image /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/kernel/uImage
237 04:52:49.922432 output: Image Name:
238 04:52:49.922862 output: Created: Sat Aug 31 04:52:48 2024
239 04:52:49.923078 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:52:49.923288 output: Data Size: 167969280 Bytes = 164032.50 KiB = 160.19 MiB
241 04:52:49.923493 output: Load Address: 01080000
242 04:52:49.923694 output: Entry Point: 01080000
243 04:52:49.923892 output:
244 04:52:49.924267 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 04:52:49.924534 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 04:52:49.924803 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 04:52:49.925056 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:52:49.925314 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 04:52:49.925570 Building ramdisk /var/lib/lava/dispatcher/tmp/681352/extract-overlay-ramdisk-nxzpkrgj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/681352/extract-overlay-ramdisk-nxzpkrgj/ramdisk
250 04:52:55.176786 >> 421456 blocks
251 04:53:12.681876 Adding RAMdisk u-boot header.
252 04:53:12.682528 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/681352/extract-overlay-ramdisk-nxzpkrgj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/681352/extract-overlay-ramdisk-nxzpkrgj/ramdisk.cpio.gz.uboot
253 04:53:13.201412 output: Image Name:
254 04:53:13.202035 output: Created: Sat Aug 31 04:53:12 2024
255 04:53:13.202479 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:53:13.202907 output: Data Size: 50546937 Bytes = 49362.24 KiB = 48.21 MiB
257 04:53:13.203326 output: Load Address: 00000000
258 04:53:13.203735 output: Entry Point: 00000000
259 04:53:13.204199 output:
260 04:53:13.205171 rename /var/lib/lava/dispatcher/tmp/681352/extract-overlay-ramdisk-nxzpkrgj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/ramdisk/ramdisk.cpio.gz.uboot
261 04:53:13.205895 end: 1.6.8 compress-ramdisk (duration 00:00:23) [common]
262 04:53:13.206469 end: 1.6 prepare-tftp-overlay (duration 00:00:39) [common]
263 04:53:13.207021 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 04:53:13.207493 No LXC device requested
265 04:53:13.208042 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:53:13.208582 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 04:53:13.209097 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:53:13.209525 Checking files for TFTP limit of 4294967296 bytes.
269 04:53:13.212216 end: 1 tftp-deploy (duration 00:01:00) [common]
270 04:53:13.212806 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:53:13.213352 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:53:13.213867 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:53:13.214384 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:53:13.214924 Using kernel file from prepare-kernel: 681352/tftp-deploy-iqr2q4po/kernel/uImage
275 04:53:13.215567 substitutions:
276 04:53:13.216006 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:53:13.216429 - {DTB_ADDR}: 0x01070000
278 04:53:13.216837 - {DTB}: 681352/tftp-deploy-iqr2q4po/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:53:13.217244 - {INITRD}: 681352/tftp-deploy-iqr2q4po/ramdisk/ramdisk.cpio.gz.uboot
280 04:53:13.217647 - {KERNEL_ADDR}: 0x01080000
281 04:53:13.218048 - {KERNEL}: 681352/tftp-deploy-iqr2q4po/kernel/uImage
282 04:53:13.218448 - {LAVA_MAC}: None
283 04:53:13.218888 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/681352/extract-nfsrootfs-eazxzogv
284 04:53:13.219298 - {NFS_SERVER_IP}: 192.168.6.2
285 04:53:13.219724 - {PRESEED_CONFIG}: None
286 04:53:13.220174 - {PRESEED_LOCAL}: None
287 04:53:13.220579 - {RAMDISK_ADDR}: 0x08000000
288 04:53:13.220976 - {RAMDISK}: 681352/tftp-deploy-iqr2q4po/ramdisk/ramdisk.cpio.gz.uboot
289 04:53:13.221373 - {ROOT_PART}: None
290 04:53:13.221770 - {ROOT}: None
291 04:53:13.222168 - {SERVER_IP}: 192.168.6.2
292 04:53:13.222587 - {TEE_ADDR}: 0x83000000
293 04:53:13.222991 - {TEE}: None
294 04:53:13.223560 Parsed boot commands:
295 04:53:13.224024 - setenv autoload no
296 04:53:13.224447 - setenv initrd_high 0xffffffff
297 04:53:13.224850 - setenv fdt_high 0xffffffff
298 04:53:13.225250 - dhcp
299 04:53:13.225648 - setenv serverip 192.168.6.2
300 04:53:13.226044 - tftpboot 0x01080000 681352/tftp-deploy-iqr2q4po/kernel/uImage
301 04:53:13.226442 - tftpboot 0x08000000 681352/tftp-deploy-iqr2q4po/ramdisk/ramdisk.cpio.gz.uboot
302 04:53:13.226838 - tftpboot 0x01070000 681352/tftp-deploy-iqr2q4po/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:53:13.227237 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/681352/extract-nfsrootfs-eazxzogv,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:53:13.227645 - bootm 0x01080000 0x08000000 0x01070000
305 04:53:13.228190 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:53:13.229783 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:53:13.230238 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:53:13.245446 Setting prompt string to ['lava-test: # ']
310 04:53:13.246923 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:53:13.247572 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:53:13.248283 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:53:13.248864 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:53:13.250036 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:53:13.287567 >> OK - accepted request
316 04:53:13.289640 Returned 0 in 0 seconds
317 04:53:13.390539 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:53:13.392332 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:53:13.392958 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:53:13.393496 Setting prompt string to ['Hit any key to stop autoboot']
322 04:53:13.393976 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:53:13.395558 Trying 192.168.56.21...
324 04:53:13.396103 Connected to conserv1.
325 04:53:13.396553 Escape character is '^]'.
326 04:53:13.396981
327 04:53:13.397417 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:53:13.397839
329 04:53:20.986284 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:53:20.986889 bl2_stage_init 0x01
331 04:53:20.987316 bl2_stage_init 0x81
332 04:53:20.991823 hw id: 0x0000 - pwm id 0x01
333 04:53:20.992311 bl2_stage_init 0xc1
334 04:53:20.996480 bl2_stage_init 0x02
335 04:53:20.996909
336 04:53:20.997328 L0:00000000
337 04:53:20.997751 L1:00000703
338 04:53:20.998173 L2:00008067
339 04:53:21.002047 L3:15000000
340 04:53:21.002482 S1:00000000
341 04:53:21.002903 B2:20282000
342 04:53:21.003304 B1:a0f83180
343 04:53:21.003702
344 04:53:21.004131 TE: 70299
345 04:53:21.004534
346 04:53:21.013169 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:53:21.013612
348 04:53:21.014024 Board ID = 1
349 04:53:21.014428 Set cpu clk to 24M
350 04:53:21.014827 Set clk81 to 24M
351 04:53:21.018732 Use GP1_pll as DSU clk.
352 04:53:21.019164 DSU clk: 1200 Mhz
353 04:53:21.019565 CPU clk: 1200 MHz
354 04:53:21.024338 Set clk81 to 166.6M
355 04:53:21.029878 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:53:21.030313 board id: 1
357 04:53:21.038174 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:53:21.048777 fw parse done
359 04:53:21.054261 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:53:21.096572 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:53:21.108422 PIEI prepare done
362 04:53:21.108861 fastboot data load
363 04:53:21.109271 fastboot data verify
364 04:53:21.113916 verify result: 266
365 04:53:21.119469 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:53:21.119894 LPDDR4 probe
367 04:53:21.120331 ddr clk to 1584MHz
368 04:53:21.127528 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:53:21.164521
370 04:53:21.164955 dmc_version 0001
371 04:53:21.171225 Check phy result
372 04:53:21.177417 INFO : End of CA training
373 04:53:21.177837 INFO : End of initialization
374 04:53:21.182914 INFO : Training has run successfully!
375 04:53:21.183340 Check phy result
376 04:53:21.188520 INFO : End of initialization
377 04:53:21.188944 INFO : End of read enable training
378 04:53:21.194258 INFO : End of fine write leveling
379 04:53:21.199782 INFO : End of Write leveling coarse delay
380 04:53:21.200231 INFO : Training has run successfully!
381 04:53:21.200639 Check phy result
382 04:53:21.205415 INFO : End of initialization
383 04:53:21.205864 INFO : End of read dq deskew training
384 04:53:21.210900 INFO : End of MPR read delay center optimization
385 04:53:21.216549 INFO : End of write delay center optimization
386 04:53:21.222206 INFO : End of read delay center optimization
387 04:53:21.222639 INFO : End of max read latency training
388 04:53:21.227711 INFO : Training has run successfully!
389 04:53:21.228167 1D training succeed
390 04:53:21.236240 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:53:21.283594 Check phy result
392 04:53:21.284070 INFO : End of initialization
393 04:53:21.306070 INFO : End of 2D read delay Voltage center optimization
394 04:53:21.325465 INFO : End of 2D read delay Voltage center optimization
395 04:53:21.377191 INFO : End of 2D write delay Voltage center optimization
396 04:53:21.427077 INFO : End of 2D write delay Voltage center optimization
397 04:53:21.432652 INFO : Training has run successfully!
398 04:53:21.433090
399 04:53:21.433498 channel==0
400 04:53:21.438246 RxClkDly_Margin_A0==78 ps 8
401 04:53:21.438669 TxDqDly_Margin_A0==98 ps 10
402 04:53:21.443822 RxClkDly_Margin_A1==88 ps 9
403 04:53:21.444283 TxDqDly_Margin_A1==98 ps 10
404 04:53:21.444694 TrainedVREFDQ_A0==74
405 04:53:21.449435 TrainedVREFDQ_A1==75
406 04:53:21.449863 VrefDac_Margin_A0==23
407 04:53:21.450265 DeviceVref_Margin_A0==40
408 04:53:21.455005 VrefDac_Margin_A1==23
409 04:53:21.455429 DeviceVref_Margin_A1==39
410 04:53:21.455829
411 04:53:21.456261
412 04:53:21.460622 channel==1
413 04:53:21.461045 RxClkDly_Margin_A0==78 ps 8
414 04:53:21.461448 TxDqDly_Margin_A0==98 ps 10
415 04:53:21.466268 RxClkDly_Margin_A1==88 ps 9
416 04:53:21.466692 TxDqDly_Margin_A1==78 ps 8
417 04:53:21.471839 TrainedVREFDQ_A0==78
418 04:53:21.472287 TrainedVREFDQ_A1==75
419 04:53:21.472693 VrefDac_Margin_A0==22
420 04:53:21.477453 DeviceVref_Margin_A0==36
421 04:53:21.477875 VrefDac_Margin_A1==22
422 04:53:21.483033 DeviceVref_Margin_A1==38
423 04:53:21.483454
424 04:53:21.483862 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:53:21.484298
426 04:53:21.516636 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
427 04:53:21.517137 2D training succeed
428 04:53:21.522254 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:53:21.527851 auto size-- 65535DDR cs0 size: 2048MB
430 04:53:21.528302 DDR cs1 size: 2048MB
431 04:53:21.533471 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:53:21.533893 cs0 DataBus test pass
433 04:53:21.539088 cs1 DataBus test pass
434 04:53:21.539506 cs0 AddrBus test pass
435 04:53:21.539905 cs1 AddrBus test pass
436 04:53:21.540333
437 04:53:21.544647 100bdlr_step_size ps== 478
438 04:53:21.545079 result report
439 04:53:21.550270 boot times 0Enable ddr reg access
440 04:53:21.554588 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:53:21.568892 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:53:22.224289 bl2z: ptr: 05129330, size: 00001e40
443 04:53:22.231499 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:53:22.231943 MVN_1=0x00000000
445 04:53:22.232413 MVN_2=0x00000000
446 04:53:22.242911 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:53:22.243348 OPS=0x04
448 04:53:22.243760 ring efuse init
449 04:53:22.248533 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:53:22.248968 [0.017319 Inits done]
451 04:53:22.249371 secure task start!
452 04:53:22.256538 high task start!
453 04:53:22.256961 low task start!
454 04:53:22.257365 run into bl31
455 04:53:22.265069 NOTICE: BL31: v1.3(release):4fc40b1
456 04:53:22.272891 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:53:22.273327 NOTICE: BL31: G12A normal boot!
458 04:53:22.288491 NOTICE: BL31: BL33 decompress pass
459 04:53:22.294053 ERROR: Error initializing runtime service opteed_fast
460 04:53:23.535413 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:53:23.535781 bl2_stage_init 0x01
462 04:53:23.536027 bl2_stage_init 0x81
463 04:53:23.540893 hw id: 0x0000 - pwm id 0x01
464 04:53:23.541176 bl2_stage_init 0xc1
465 04:53:23.541383 bl2_stage_init 0x02
466 04:53:23.541584
467 04:53:23.546522 L0:00000000
468 04:53:23.547330 L1:00000703
469 04:53:23.547538 L2:00008067
470 04:53:23.547739 L3:15000000
471 04:53:23.547938 S1:00000000
472 04:53:23.552061 B2:20282000
473 04:53:23.552287 B1:a0f83180
474 04:53:23.552486
475 04:53:23.552715 TE: 68455
476 04:53:23.552917
477 04:53:23.557677 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:53:23.557908
479 04:53:23.563307 Board ID = 1
480 04:53:23.564223 Set cpu clk to 24M
481 04:53:23.565177 Set clk81 to 24M
482 04:53:23.568964 Use GP1_pll as DSU clk.
483 04:53:23.569522 DSU clk: 1200 Mhz
484 04:53:23.569973 CPU clk: 1200 MHz
485 04:53:23.570412 Set clk81 to 166.6M
486 04:53:23.580116 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:53:23.580639 board id: 1
488 04:53:23.586586 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:53:23.597205 fw parse done
490 04:53:23.603182 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:53:23.644866 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:53:23.656846 PIEI prepare done
493 04:53:23.657383 fastboot data load
494 04:53:23.657827 fastboot data verify
495 04:53:23.662419 verify result: 266
496 04:53:23.668021 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:53:23.668531 LPDDR4 probe
498 04:53:23.668969 ddr clk to 1584MHz
499 04:53:23.676274 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 04:53:25.038465 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
501 04:53:25.039100 bl2_stage_init 0x01
502 04:53:25.039586 bl2_stage_init 0x81
503 04:53:25.044115 hw id: 0x0000 - pwm id 0x01
504 04:53:25.044696 bl2_stage_init 0xc1
505 04:53:25.049696 bl2_stage_init 0x02
506 04:53:25.050248
507 04:53:25.050722 L0:00000000
508 04:53:25.051181 L1:00000703
509 04:53:25.051634 L2:00008067
510 04:53:25.052130 L3:15000000
511 04:53:25.055290 S1:00000000
512 04:53:25.055840 B2:20282000
513 04:53:25.056350 B1:a0f83180
514 04:53:25.056817
515 04:53:25.057275 TE: 71276
516 04:53:25.057731
517 04:53:25.060978 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
518 04:53:25.061533
519 04:53:25.066482 Board ID = 1
520 04:53:25.067029 Set cpu clk to 24M
521 04:53:25.067494 Set clk81 to 24M
522 04:53:25.072073 Use GP1_pll as DSU clk.
523 04:53:25.072629 DSU clk: 1200 Mhz
524 04:53:25.073096 CPU clk: 1200 MHz
525 04:53:25.077690 Set clk81 to 166.6M
526 04:53:25.083273 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
527 04:53:25.083816 board id: 1
528 04:53:25.090478 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
529 04:53:25.101163 fw parse done
530 04:53:25.107116 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
531 04:53:25.149742 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
532 04:53:25.160833 PIEI prepare done
533 04:53:25.161388 fastboot data load
534 04:53:25.161857 fastboot data verify
535 04:53:25.166327 verify result: 266
536 04:53:25.172078 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
537 04:53:25.172639 LPDDR4 probe
538 04:53:25.173110 ddr clk to 1584MHz
539 04:53:25.179937 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 04:53:25.216212
541 04:53:25.216776 dmc_version 0001
542 04:53:25.222957 Check phy result
543 04:53:25.229842 INFO : End of CA training
544 04:53:25.230411 INFO : End of initialization
545 04:53:25.235348 INFO : Training has run successfully!
546 04:53:25.235901 Check phy result
547 04:53:25.241060 INFO : End of initialization
548 04:53:25.241615 INFO : End of read enable training
549 04:53:25.246554 INFO : End of fine write leveling
550 04:53:25.252139 INFO : End of Write leveling coarse delay
551 04:53:25.252702 INFO : Training has run successfully!
552 04:53:25.253174 Check phy result
553 04:53:25.257858 INFO : End of initialization
554 04:53:25.258425 INFO : End of read dq deskew training
555 04:53:25.263358 INFO : End of MPR read delay center optimization
556 04:53:25.269063 INFO : End of write delay center optimization
557 04:53:25.274532 INFO : End of read delay center optimization
558 04:53:25.275080 INFO : End of max read latency training
559 04:53:25.280157 INFO : Training has run successfully!
560 04:53:25.280705 1D training succeed
561 04:53:25.289282 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
562 04:53:25.336915 Check phy result
563 04:53:25.337482 INFO : End of initialization
564 04:53:25.359324 INFO : End of 2D read delay Voltage center optimization
565 04:53:25.378435 INFO : End of 2D read delay Voltage center optimization
566 04:53:25.430303 INFO : End of 2D write delay Voltage center optimization
567 04:53:25.479480 INFO : End of 2D write delay Voltage center optimization
568 04:53:25.485090 INFO : Training has run successfully!
569 04:53:25.485699
570 04:53:25.485919 channel==0
571 04:53:25.490460 RxClkDly_Margin_A0==78 ps 8
572 04:53:25.491193 TxDqDly_Margin_A0==98 ps 10
573 04:53:25.496091 RxClkDly_Margin_A1==78 ps 8
574 04:53:25.497079 TxDqDly_Margin_A1==98 ps 10
575 04:53:25.498411 TrainedVREFDQ_A0==74
576 04:53:25.501716 TrainedVREFDQ_A1==75
577 04:53:25.502277 VrefDac_Margin_A0==24
578 04:53:25.502727 DeviceVref_Margin_A0==40
579 04:53:25.507225 VrefDac_Margin_A1==23
580 04:53:25.507689 DeviceVref_Margin_A1==39
581 04:53:25.508151
582 04:53:25.508614
583 04:53:25.512915 channel==1
584 04:53:25.513397 RxClkDly_Margin_A0==88 ps 9
585 04:53:25.513825 TxDqDly_Margin_A0==98 ps 10
586 04:53:25.518416 RxClkDly_Margin_A1==88 ps 9
587 04:53:25.518884 TxDqDly_Margin_A1==88 ps 9
588 04:53:25.524042 TrainedVREFDQ_A0==78
589 04:53:25.524529 TrainedVREFDQ_A1==77
590 04:53:25.524954 VrefDac_Margin_A0==22
591 04:53:25.529615 DeviceVref_Margin_A0==36
592 04:53:25.530085 VrefDac_Margin_A1==22
593 04:53:25.535235 DeviceVref_Margin_A1==37
594 04:53:25.535698
595 04:53:25.536156 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
596 04:53:25.536574
597 04:53:25.568912 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
598 04:53:25.569449 2D training succeed
599 04:53:25.574431 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
600 04:53:25.580226 auto size-- 65535DDR cs0 size: 2048MB
601 04:53:25.580715 DDR cs1 size: 2048MB
602 04:53:25.585799 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
603 04:53:25.586271 cs0 DataBus test pass
604 04:53:25.591354 cs1 DataBus test pass
605 04:53:25.591835 cs0 AddrBus test pass
606 04:53:25.592304 cs1 AddrBus test pass
607 04:53:25.592725
608 04:53:25.597027 100bdlr_step_size ps== 478
609 04:53:25.597504 result report
610 04:53:25.602555 boot times 0Enable ddr reg access
611 04:53:25.607824 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
612 04:53:25.621638 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
613 04:53:26.276922 bl2z: ptr: 05129330, size: 00001e40
614 04:53:26.284459 0.0;M3 CHK:0;cm4_sp_mode 0
615 04:53:26.284972 MVN_1=0x00000000
616 04:53:26.285417 MVN_2=0x00000000
617 04:53:26.295963 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
618 04:53:26.296496 OPS=0x04
619 04:53:26.296924 ring efuse init
620 04:53:26.298968 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
621 04:53:26.304616 [0.017320 Inits done]
622 04:53:26.305084 secure task start!
623 04:53:26.305504 high task start!
624 04:53:26.305915 low task start!
625 04:53:26.308897 run into bl31
626 04:53:26.317635 NOTICE: BL31: v1.3(release):4fc40b1
627 04:53:26.325446 NOTICE: BL31: Built : 15:57:33, May 22 2019
628 04:53:26.325941 NOTICE: BL31: G12A normal boot!
629 04:53:26.340922 NOTICE: BL31: BL33 decompress pass
630 04:53:26.346585 ERROR: Error initializing runtime service opteed_fast
631 04:53:27.586581 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
632 04:53:27.587218 bl2_stage_init 0x01
633 04:53:27.587700 bl2_stage_init 0x81
634 04:53:27.591920 hw id: 0x0000 - pwm id 0x01
635 04:53:27.592516 bl2_stage_init 0xc1
636 04:53:27.597528 bl2_stage_init 0x02
637 04:53:27.598076
638 04:53:27.598585 L0:00000000
639 04:53:27.599063 L1:00000703
640 04:53:27.599517 L2:00008067
641 04:53:27.599965 L3:15000000
642 04:53:27.603917 S1:00000000
643 04:53:27.604548 B2:20282000
644 04:53:27.605025 B1:a0f83180
645 04:53:27.605474
646 04:53:27.605924 TE: 69266
647 04:53:27.606370
648 04:53:27.609726 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
649 04:53:27.610300
650 04:53:27.615079 Board ID = 1
651 04:53:27.615624 Set cpu clk to 24M
652 04:53:27.616142 Set clk81 to 24M
653 04:53:27.618717 Use GP1_pll as DSU clk.
654 04:53:27.619263 DSU clk: 1200 Mhz
655 04:53:27.619726 CPU clk: 1200 MHz
656 04:53:27.624266 Set clk81 to 166.6M
657 04:53:27.629829 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
658 04:53:27.630400 board id: 1
659 04:53:27.638520 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
660 04:53:27.649292 fw parse done
661 04:53:27.655348 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
662 04:53:27.697363 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
663 04:53:27.710285 PIEI prepare done
664 04:53:27.710851 fastboot data load
665 04:53:27.711342 fastboot data verify
666 04:53:27.715149 verify result: 266
667 04:53:27.720768 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
668 04:53:27.721327 LPDDR4 probe
669 04:53:27.721788 ddr clk to 1584MHz
670 04:53:27.727601 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
671 04:53:27.765516
672 04:53:27.766082 dmc_version 0001
673 04:53:27.772376 Check phy result
674 04:53:27.779447 INFO : End of CA training
675 04:53:27.780021 INFO : End of initialization
676 04:53:27.784939 INFO : Training has run successfully!
677 04:53:27.785423 Check phy result
678 04:53:27.790520 INFO : End of initialization
679 04:53:27.790978 INFO : End of read enable training
680 04:53:27.793755 INFO : End of fine write leveling
681 04:53:27.799350 INFO : End of Write leveling coarse delay
682 04:53:27.804936 INFO : Training has run successfully!
683 04:53:27.805396 Check phy result
684 04:53:27.805800 INFO : End of initialization
685 04:53:27.810477 INFO : End of read dq deskew training
686 04:53:27.816096 INFO : End of MPR read delay center optimization
687 04:53:27.816552 INFO : End of write delay center optimization
688 04:53:27.821683 INFO : End of read delay center optimization
689 04:53:27.827353 INFO : End of max read latency training
690 04:53:27.827818 INFO : Training has run successfully!
691 04:53:27.832843 1D training succeed
692 04:53:27.838868 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 04:53:27.887237 Check phy result
694 04:53:27.887739 INFO : End of initialization
695 04:53:27.914587 INFO : End of 2D read delay Voltage center optimization
696 04:53:27.938808 INFO : End of 2D read delay Voltage center optimization
697 04:53:27.995578 INFO : End of 2D write delay Voltage center optimization
698 04:53:28.049517 INFO : End of 2D write delay Voltage center optimization
699 04:53:28.055040 INFO : Training has run successfully!
700 04:53:28.055516
701 04:53:28.055944 channel==0
702 04:53:28.060662 RxClkDly_Margin_A0==88 ps 9
703 04:53:28.061169 TxDqDly_Margin_A0==98 ps 10
704 04:53:28.066241 RxClkDly_Margin_A1==88 ps 9
705 04:53:28.066715 TxDqDly_Margin_A1==88 ps 9
706 04:53:28.067124 TrainedVREFDQ_A0==74
707 04:53:28.071837 TrainedVREFDQ_A1==74
708 04:53:28.072346 VrefDac_Margin_A0==25
709 04:53:28.072756 DeviceVref_Margin_A0==40
710 04:53:28.077456 VrefDac_Margin_A1==23
711 04:53:28.077912 DeviceVref_Margin_A1==40
712 04:53:28.078314
713 04:53:28.078714
714 04:53:28.079109 channel==1
715 04:53:28.083034 RxClkDly_Margin_A0==88 ps 9
716 04:53:28.083488 TxDqDly_Margin_A0==98 ps 10
717 04:53:28.088622 RxClkDly_Margin_A1==88 ps 9
718 04:53:28.089080 TxDqDly_Margin_A1==88 ps 9
719 04:53:28.094137 TrainedVREFDQ_A0==78
720 04:53:28.094601 TrainedVREFDQ_A1==75
721 04:53:28.095007 VrefDac_Margin_A0==23
722 04:53:28.099818 DeviceVref_Margin_A0==36
723 04:53:28.100315 VrefDac_Margin_A1==22
724 04:53:28.105443 DeviceVref_Margin_A1==39
725 04:53:28.105898
726 04:53:28.106303 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
727 04:53:28.106695
728 04:53:28.138906 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
729 04:53:28.139471 2D training succeed
730 04:53:28.144494 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
731 04:53:28.150099 auto size-- 65535DDR cs0 size: 2048MB
732 04:53:28.150561 DDR cs1 size: 2048MB
733 04:53:28.155680 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
734 04:53:28.156169 cs0 DataBus test pass
735 04:53:28.161373 cs1 DataBus test pass
736 04:53:28.161863 cs0 AddrBus test pass
737 04:53:28.162263 cs1 AddrBus test pass
738 04:53:28.162656
739 04:53:28.166855 100bdlr_step_size ps== 478
740 04:53:28.167333 result report
741 04:53:28.172480 boot times 0Enable ddr reg access
742 04:53:28.177689 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
743 04:53:28.191557 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
744 04:53:28.850864 bl2z: ptr: 05129330, size: 00001e40
745 04:53:28.857929 0.0;M3 CHK:0;cm4_sp_mode 0
746 04:53:28.858282 MVN_1=0x00000000
747 04:53:28.858525 MVN_2=0x00000000
748 04:53:28.869434 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
749 04:53:28.869991 OPS=0x04
750 04:53:28.870402 ring efuse init
751 04:53:28.875024 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
752 04:53:28.875493 [0.017355 Inits done]
753 04:53:28.875912 secure task start!
754 04:53:28.883142 high task start!
755 04:53:28.883607 low task start!
756 04:53:28.884044 run into bl31
757 04:53:28.891764 NOTICE: BL31: v1.3(release):4fc40b1
758 04:53:28.899571 NOTICE: BL31: Built : 15:57:33, May 22 2019
759 04:53:28.900044 NOTICE: BL31: G12A normal boot!
760 04:53:28.915297 NOTICE: BL31: BL33 decompress pass
761 04:53:28.920954 ERROR: Error initializing runtime service opteed_fast
762 04:53:29.716497
763 04:53:29.717069
764 04:53:29.721785 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
765 04:53:29.722135
766 04:53:29.724278 Model: Libre Computer AML-S905D3-CC Solitude
767 04:53:29.872289 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
768 04:53:29.887594 DRAM: 2 GiB (effective 3.8 GiB)
769 04:53:29.988730 Core: 406 devices, 33 uclasses, devicetree: separate
770 04:53:29.993715 WDT: Not starting watchdog@f0d0
771 04:53:30.019615 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
772 04:53:30.031865 Loading Environment from FAT... Card did not respond to voltage select! : -110
773 04:53:30.035829 ** Bad device specification mmc 0 **
774 04:53:30.046832 Card did not respond to voltage select! : -110
775 04:53:30.054496 ** Bad device specification mmc 0 **
776 04:53:30.054838 Couldn't find partition mmc 0
777 04:53:30.062920 Card did not respond to voltage select! : -110
778 04:53:30.068351 ** Bad device specification mmc 0 **
779 04:53:30.069006 Couldn't find partition mmc 0
780 04:53:30.072553 Error: could not access storage.
781 04:53:30.369848 Net: eth0: ethernet@ff3f0000
782 04:53:30.370476 starting USB...
783 04:53:30.614554 Bus usb@ff500000: Register 3000140 NbrPorts 3
784 04:53:30.615170 Starting the controller
785 04:53:30.621514 USB XHCI 1.10
786 04:53:32.175825 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
787 04:53:32.184118 scanning usb for storage devices... 0 Storage Device(s) found
789 04:53:32.235826 Hit any key to stop autoboot: 1
790 04:53:32.236883 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
791 04:53:32.237753 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
792 04:53:32.238320 Setting prompt string to ['=>']
793 04:53:32.238892 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
794 04:53:32.250158 0
795 04:53:32.251150 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
797 04:53:32.352541 => setenv autoload no
798 04:53:32.353542 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
799 04:53:32.358917 setenv autoload no
801 04:53:32.460569 => setenv initrd_high 0xffffffff
802 04:53:32.461334 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
803 04:53:32.465792 setenv initrd_high 0xffffffff
805 04:53:32.567366 => setenv fdt_high 0xffffffff
806 04:53:32.568149 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
807 04:53:32.571560 setenv fdt_high 0xffffffff
809 04:53:32.673050 => dhcp
810 04:53:32.673818 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
811 04:53:32.685880 dhcp
812 04:53:33.183357 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
813 04:53:33.183959 Speed: 1000, full duplex
814 04:53:33.184473 BOOTP broadcast 1
815 04:53:33.432388 BOOTP broadcast 2
816 04:53:33.932367 BOOTP broadcast 3
817 04:53:34.934408 BOOTP broadcast 4
818 04:53:36.935596 BOOTP broadcast 5
819 04:53:36.948163 DHCP client bound to address 192.168.6.12 (3764 ms)
821 04:53:37.049987 => setenv serverip 192.168.6.2
822 04:53:37.050858 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
823 04:53:37.056450 setenv serverip 192.168.6.2
825 04:53:37.158673 => tftpboot 0x01080000 681352/tftp-deploy-iqr2q4po/kernel/uImage
826 04:53:37.159790 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
827 04:53:37.166444 tftpboot 0x01080000 681352/tftp-deploy-iqr2q4po/kernel/uImage
828 04:53:37.167058 Speed: 1000, full duplex
829 04:53:37.167562 Using ethernet@ff3f0000 device
830 04:53:37.171927 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
831 04:53:37.177372 Filename '681352/tftp-deploy-iqr2q4po/kernel/uImage'.
832 04:53:37.181327 Load address: 0x1080000
833 04:53:41.439888 Loading: *###################
834 04:53:41.440327 TFTP error: trying to overwrite reserved memory...
836 04:53:41.444566 end: 2.4.3 bootloader-commands (duration 00:00:09) [common]
839 04:53:41.445574 end: 2.4 uboot-commands (duration 00:00:28) [common]
841 04:53:41.446328 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
843 04:53:41.446858 end: 2 uboot-action (duration 00:00:28) [common]
845 04:53:41.447656 Cleaning after the job
846 04:53:41.447963 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/ramdisk
847 04:53:41.470090 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/kernel
848 04:53:41.530570 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/dtb
849 04:53:41.532414 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/nfsrootfs
850 04:53:41.702982 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681352/tftp-deploy-iqr2q4po/modules
851 04:53:41.763804 start: 4.1 power-off (timeout 00:00:30) [common]
852 04:53:41.764542 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
853 04:53:41.795253 >> OK - accepted request
854 04:53:41.797068 Returned 0 in 0 seconds
855 04:53:41.897846 end: 4.1 power-off (duration 00:00:00) [common]
857 04:53:41.898844 start: 4.2 read-feedback (timeout 00:10:00) [common]
858 04:53:41.899486 Listened to connection for namespace 'common' for up to 1s
859 04:53:42.899471 Finalising connection for namespace 'common'
860 04:53:42.900272 Disconnecting from shell: Finalise
861 04:53:42.900777 =>
862 04:53:43.001775 end: 4.2 read-feedback (duration 00:00:01) [common]
863 04:53:43.002517 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/681352
864 04:53:44.834353 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/681352
865 04:53:44.834977 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.