Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 06:34:37.427019 lava-dispatcher, installed at version: 2024.01
2 06:34:37.427797 start: 0 validate
3 06:34:37.428296 Start time: 2024-08-31 06:34:37.428266+00:00 (UTC)
4 06:34:37.428835 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 06:34:37.429385 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 06:34:37.468341 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 06:34:37.468877 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-219-g1934261d89746%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 06:34:37.498364 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 06:34:37.499363 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-219-g1934261d89746%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 06:34:37.528958 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 06:34:37.529458 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 06:34:37.559642 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 06:34:37.560161 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-219-g1934261d89746%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 06:34:37.596862 validate duration: 0.17
16 06:34:37.597730 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 06:34:37.598048 start: 1.1 download-retry (timeout 00:10:00) [common]
18 06:34:37.598355 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 06:34:37.599057 Not decompressing ramdisk as can be used compressed.
20 06:34:37.599536 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 06:34:37.599818 saving as /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/ramdisk/initrd.cpio.gz
22 06:34:37.600118 total size: 5628140 (5 MB)
23 06:34:37.636634 progress 0 % (0 MB)
24 06:34:37.641777 progress 5 % (0 MB)
25 06:34:37.646763 progress 10 % (0 MB)
26 06:34:37.651329 progress 15 % (0 MB)
27 06:34:37.655974 progress 20 % (1 MB)
28 06:34:37.660874 progress 25 % (1 MB)
29 06:34:37.665690 progress 30 % (1 MB)
30 06:34:37.670717 progress 35 % (1 MB)
31 06:34:37.675125 progress 40 % (2 MB)
32 06:34:37.681628 progress 45 % (2 MB)
33 06:34:37.686161 progress 50 % (2 MB)
34 06:34:37.690492 progress 55 % (2 MB)
35 06:34:37.695081 progress 60 % (3 MB)
36 06:34:37.699406 progress 65 % (3 MB)
37 06:34:37.704619 progress 70 % (3 MB)
38 06:34:37.709375 progress 75 % (4 MB)
39 06:34:37.714120 progress 80 % (4 MB)
40 06:34:37.718433 progress 85 % (4 MB)
41 06:34:37.723780 progress 90 % (4 MB)
42 06:34:37.728842 progress 95 % (5 MB)
43 06:34:37.732426 progress 100 % (5 MB)
44 06:34:37.733128 5 MB downloaded in 0.13 s (40.36 MB/s)
45 06:34:37.733744 end: 1.1.1 http-download (duration 00:00:00) [common]
47 06:34:37.734734 end: 1.1 download-retry (duration 00:00:00) [common]
48 06:34:37.735089 start: 1.2 download-retry (timeout 00:10:00) [common]
49 06:34:37.735405 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 06:34:37.735907 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm64/defconfig/gcc-12/kernel/Image
51 06:34:37.736212 saving as /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/kernel/Image
52 06:34:37.736449 total size: 45308416 (43 MB)
53 06:34:37.736685 No compression specified
54 06:34:37.773645 progress 0 % (0 MB)
55 06:34:37.801848 progress 5 % (2 MB)
56 06:34:37.829683 progress 10 % (4 MB)
57 06:34:37.857539 progress 15 % (6 MB)
58 06:34:37.884805 progress 20 % (8 MB)
59 06:34:37.912415 progress 25 % (10 MB)
60 06:34:37.939679 progress 30 % (12 MB)
61 06:34:37.966894 progress 35 % (15 MB)
62 06:34:37.994750 progress 40 % (17 MB)
63 06:34:38.022353 progress 45 % (19 MB)
64 06:34:38.049632 progress 50 % (21 MB)
65 06:34:38.077182 progress 55 % (23 MB)
66 06:34:38.104848 progress 60 % (25 MB)
67 06:34:38.132401 progress 65 % (28 MB)
68 06:34:38.159553 progress 70 % (30 MB)
69 06:34:38.187077 progress 75 % (32 MB)
70 06:34:38.214931 progress 80 % (34 MB)
71 06:34:38.242016 progress 85 % (36 MB)
72 06:34:38.269391 progress 90 % (38 MB)
73 06:34:38.296658 progress 95 % (41 MB)
74 06:34:38.324039 progress 100 % (43 MB)
75 06:34:38.324725 43 MB downloaded in 0.59 s (73.45 MB/s)
76 06:34:38.325207 end: 1.2.1 http-download (duration 00:00:01) [common]
78 06:34:38.326024 end: 1.2 download-retry (duration 00:00:01) [common]
79 06:34:38.326299 start: 1.3 download-retry (timeout 00:09:59) [common]
80 06:34:38.326565 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 06:34:38.327036 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 06:34:38.327311 saving as /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/dtb/meson-g12b-a311d-libretech-cc.dtb
83 06:34:38.327522 total size: 54667 (0 MB)
84 06:34:38.327730 No compression specified
85 06:34:38.366225 progress 59 % (0 MB)
86 06:34:38.367071 progress 100 % (0 MB)
87 06:34:38.367618 0 MB downloaded in 0.04 s (1.30 MB/s)
88 06:34:38.368133 end: 1.3.1 http-download (duration 00:00:00) [common]
90 06:34:38.368960 end: 1.3 download-retry (duration 00:00:00) [common]
91 06:34:38.369223 start: 1.4 download-retry (timeout 00:09:59) [common]
92 06:34:38.369489 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 06:34:38.369938 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 06:34:38.370183 saving as /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/nfsrootfs/full.rootfs.tar
95 06:34:38.370389 total size: 474398908 (452 MB)
96 06:34:38.370598 Using unxz to decompress xz
97 06:34:38.408869 progress 0 % (0 MB)
98 06:34:39.529844 progress 5 % (22 MB)
99 06:34:40.970998 progress 10 % (45 MB)
100 06:34:41.425209 progress 15 % (67 MB)
101 06:34:42.284908 progress 20 % (90 MB)
102 06:34:42.831132 progress 25 % (113 MB)
103 06:34:43.203315 progress 30 % (135 MB)
104 06:34:43.818968 progress 35 % (158 MB)
105 06:34:44.770887 progress 40 % (181 MB)
106 06:34:45.618204 progress 45 % (203 MB)
107 06:34:46.169368 progress 50 % (226 MB)
108 06:34:46.821986 progress 55 % (248 MB)
109 06:34:48.047962 progress 60 % (271 MB)
110 06:34:49.557154 progress 65 % (294 MB)
111 06:34:51.227611 progress 70 % (316 MB)
112 06:34:54.375840 progress 75 % (339 MB)
113 06:34:56.791149 progress 80 % (361 MB)
114 06:34:59.725966 progress 85 % (384 MB)
115 06:35:02.899056 progress 90 % (407 MB)
116 06:35:06.089243 progress 95 % (429 MB)
117 06:35:09.261639 progress 100 % (452 MB)
118 06:35:09.275010 452 MB downloaded in 30.90 s (14.64 MB/s)
119 06:35:09.275935 end: 1.4.1 http-download (duration 00:00:31) [common]
121 06:35:09.277909 end: 1.4 download-retry (duration 00:00:31) [common]
122 06:35:09.278520 start: 1.5 download-retry (timeout 00:09:28) [common]
123 06:35:09.279110 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 06:35:09.280102 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-219-g1934261d89746/arm64/defconfig/gcc-12/modules.tar.xz
125 06:35:09.280669 saving as /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/modules/modules.tar
126 06:35:09.281132 total size: 11496964 (10 MB)
127 06:35:09.281608 Using unxz to decompress xz
128 06:35:09.323926 progress 0 % (0 MB)
129 06:35:09.392750 progress 5 % (0 MB)
130 06:35:09.477027 progress 10 % (1 MB)
131 06:35:09.558641 progress 15 % (1 MB)
132 06:35:09.643433 progress 20 % (2 MB)
133 06:35:09.716322 progress 25 % (2 MB)
134 06:35:09.794357 progress 30 % (3 MB)
135 06:35:09.866353 progress 35 % (3 MB)
136 06:35:09.945171 progress 40 % (4 MB)
137 06:35:10.021825 progress 45 % (4 MB)
138 06:35:10.100853 progress 50 % (5 MB)
139 06:35:10.179433 progress 55 % (6 MB)
140 06:35:10.256496 progress 60 % (6 MB)
141 06:35:10.341284 progress 65 % (7 MB)
142 06:35:10.415774 progress 70 % (7 MB)
143 06:35:10.497769 progress 75 % (8 MB)
144 06:35:10.587569 progress 80 % (8 MB)
145 06:35:10.684037 progress 85 % (9 MB)
146 06:35:10.753804 progress 90 % (9 MB)
147 06:35:10.830847 progress 95 % (10 MB)
148 06:35:10.901453 progress 100 % (10 MB)
149 06:35:10.915165 10 MB downloaded in 1.63 s (6.71 MB/s)
150 06:35:10.915749 end: 1.5.1 http-download (duration 00:00:02) [common]
152 06:35:10.917245 end: 1.5 download-retry (duration 00:00:02) [common]
153 06:35:10.917772 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 06:35:10.918288 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 06:35:27.075265 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/681564/extract-nfsrootfs-kkw4ufwv
156 06:35:27.076018 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 06:35:27.076387 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 06:35:27.077125 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl
159 06:35:27.077649 makedir: /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin
160 06:35:27.078054 makedir: /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/tests
161 06:35:27.078436 makedir: /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/results
162 06:35:27.078841 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-add-keys
163 06:35:27.079518 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-add-sources
164 06:35:27.080209 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-background-process-start
165 06:35:27.080844 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-background-process-stop
166 06:35:27.081482 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-common-functions
167 06:35:27.082088 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-echo-ipv4
168 06:35:27.082673 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-install-packages
169 06:35:27.083265 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-installed-packages
170 06:35:27.083872 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-os-build
171 06:35:27.084508 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-probe-channel
172 06:35:27.085096 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-probe-ip
173 06:35:27.085674 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-target-ip
174 06:35:27.086254 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-target-mac
175 06:35:27.086926 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-target-storage
176 06:35:27.087580 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-case
177 06:35:27.088227 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-event
178 06:35:27.088830 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-feedback
179 06:35:27.089414 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-raise
180 06:35:27.089985 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-reference
181 06:35:27.090562 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-runner
182 06:35:27.091146 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-set
183 06:35:27.091748 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-test-shell
184 06:35:27.092385 Updating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-install-packages (oe)
185 06:35:27.093038 Updating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/bin/lava-installed-packages (oe)
186 06:35:27.093567 Creating /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/environment
187 06:35:27.094019 LAVA metadata
188 06:35:27.094339 - LAVA_JOB_ID=681564
189 06:35:27.094599 - LAVA_DISPATCHER_IP=192.168.6.2
190 06:35:27.095040 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 06:35:27.096213 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 06:35:27.096595 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 06:35:27.096849 skipped lava-vland-overlay
194 06:35:27.097145 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 06:35:27.097460 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 06:35:27.097725 skipped lava-multinode-overlay
197 06:35:27.098020 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 06:35:27.098332 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 06:35:27.098633 Loading test definitions
200 06:35:27.098972 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 06:35:27.099244 Using /lava-681564 at stage 0
202 06:35:27.100661 uuid=681564_1.6.2.4.1 testdef=None
203 06:35:27.101023 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 06:35:27.101346 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 06:35:27.103410 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 06:35:27.104394 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 06:35:27.106984 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 06:35:27.108008 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 06:35:27.110509 runner path: /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 681564_1.6.2.4.1
212 06:35:27.111208 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 06:35:27.112155 Creating lava-test-runner.conf files
215 06:35:27.112402 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/681564/lava-overlay-k8bxttdl/lava-681564/0 for stage 0
216 06:35:27.112808 - 0_v4l2-decoder-conformance-vp9
217 06:35:27.113223 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 06:35:27.113559 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 06:35:27.139612 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 06:35:27.140060 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 06:35:27.140385 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 06:35:27.140702 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 06:35:27.141022 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 06:35:27.759156 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 06:35:27.759594 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 06:35:27.759846 extracting modules file /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/681564/extract-nfsrootfs-kkw4ufwv
227 06:35:29.174383 extracting modules file /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/681564/extract-overlay-ramdisk-4be032ab/ramdisk
228 06:35:30.685857 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 06:35:30.686323 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 06:35:30.686605 [common] Applying overlay to NFS
231 06:35:30.686822 [common] Applying overlay /var/lib/lava/dispatcher/tmp/681564/compress-overlay-jldokjaa/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/681564/extract-nfsrootfs-kkw4ufwv
232 06:35:30.716638 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 06:35:30.717071 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 06:35:30.717352 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 06:35:30.717586 Converting downloaded kernel to a uImage
236 06:35:30.717902 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/kernel/Image /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/kernel/uImage
237 06:35:31.169753 output: Image Name:
238 06:35:31.170170 output: Created: Sat Aug 31 06:35:30 2024
239 06:35:31.170401 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 06:35:31.170619 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
241 06:35:31.170829 output: Load Address: 01080000
242 06:35:31.171037 output: Entry Point: 01080000
243 06:35:31.171240 output:
244 06:35:31.171583 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 06:35:31.171865 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 06:35:31.172203 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 06:35:31.172479 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 06:35:31.172753 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 06:35:31.173028 Building ramdisk /var/lib/lava/dispatcher/tmp/681564/extract-overlay-ramdisk-4be032ab/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/681564/extract-overlay-ramdisk-4be032ab/ramdisk
250 06:35:33.333231 >> 165125 blocks
251 06:35:40.972235 Adding RAMdisk u-boot header.
252 06:35:40.972967 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/681564/extract-overlay-ramdisk-4be032ab/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/681564/extract-overlay-ramdisk-4be032ab/ramdisk.cpio.gz.uboot
253 06:35:41.215813 output: Image Name:
254 06:35:41.216471 output: Created: Sat Aug 31 06:35:40 2024
255 06:35:41.216941 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 06:35:41.217426 output: Data Size: 23255121 Bytes = 22710.08 KiB = 22.18 MiB
257 06:35:41.217876 output: Load Address: 00000000
258 06:35:41.218321 output: Entry Point: 00000000
259 06:35:41.218762 output:
260 06:35:41.220121 rename /var/lib/lava/dispatcher/tmp/681564/extract-overlay-ramdisk-4be032ab/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot
261 06:35:41.221056 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 06:35:41.221689 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 06:35:41.222283 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 06:35:41.222799 No LXC device requested
265 06:35:41.223361 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 06:35:41.223931 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 06:35:41.224532 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 06:35:41.225001 Checking files for TFTP limit of 4294967296 bytes.
269 06:35:41.228006 end: 1 tftp-deploy (duration 00:01:04) [common]
270 06:35:41.228688 start: 2 uboot-action (timeout 00:05:00) [common]
271 06:35:41.229276 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 06:35:41.229832 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 06:35:41.230393 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 06:35:41.230993 Using kernel file from prepare-kernel: 681564/tftp-deploy-1qsbnuwn/kernel/uImage
275 06:35:41.231698 substitutions:
276 06:35:41.232199 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 06:35:41.232650 - {DTB_ADDR}: 0x01070000
278 06:35:41.233093 - {DTB}: 681564/tftp-deploy-1qsbnuwn/dtb/meson-g12b-a311d-libretech-cc.dtb
279 06:35:41.233535 - {INITRD}: 681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot
280 06:35:41.233974 - {KERNEL_ADDR}: 0x01080000
281 06:35:41.234412 - {KERNEL}: 681564/tftp-deploy-1qsbnuwn/kernel/uImage
282 06:35:41.234851 - {LAVA_MAC}: None
283 06:35:41.235329 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/681564/extract-nfsrootfs-kkw4ufwv
284 06:35:41.235774 - {NFS_SERVER_IP}: 192.168.6.2
285 06:35:41.236246 - {PRESEED_CONFIG}: None
286 06:35:41.236685 - {PRESEED_LOCAL}: None
287 06:35:41.237117 - {RAMDISK_ADDR}: 0x08000000
288 06:35:41.237546 - {RAMDISK}: 681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot
289 06:35:41.237976 - {ROOT_PART}: None
290 06:35:41.238407 - {ROOT}: None
291 06:35:41.238839 - {SERVER_IP}: 192.168.6.2
292 06:35:41.239269 - {TEE_ADDR}: 0x83000000
293 06:35:41.239697 - {TEE}: None
294 06:35:41.240153 Parsed boot commands:
295 06:35:41.240580 - setenv autoload no
296 06:35:41.241012 - setenv initrd_high 0xffffffff
297 06:35:41.241443 - setenv fdt_high 0xffffffff
298 06:35:41.241870 - dhcp
299 06:35:41.242298 - setenv serverip 192.168.6.2
300 06:35:41.242726 - tftpboot 0x01080000 681564/tftp-deploy-1qsbnuwn/kernel/uImage
301 06:35:41.243155 - tftpboot 0x08000000 681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot
302 06:35:41.243581 - tftpboot 0x01070000 681564/tftp-deploy-1qsbnuwn/dtb/meson-g12b-a311d-libretech-cc.dtb
303 06:35:41.244030 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/681564/extract-nfsrootfs-kkw4ufwv,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 06:35:41.244481 - bootm 0x01080000 0x08000000 0x01070000
305 06:35:41.245055 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 06:35:41.246706 start: 2.3 connect-device (timeout 00:05:00) [common]
308 06:35:41.247185 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 06:35:41.264360 Setting prompt string to ['lava-test: # ']
310 06:35:41.266020 end: 2.3 connect-device (duration 00:00:00) [common]
311 06:35:41.266690 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 06:35:41.267278 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 06:35:41.267974 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 06:35:41.269396 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 06:35:41.312962 >> OK - accepted request
316 06:35:41.315187 Returned 0 in 0 seconds
317 06:35:41.416540 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 06:35:41.418478 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 06:35:41.419162 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 06:35:41.419774 Setting prompt string to ['Hit any key to stop autoboot']
322 06:35:41.420446 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 06:35:41.422485 Trying 192.168.56.21...
324 06:35:41.423210 Connected to conserv1.
325 06:35:41.423837 Escape character is '^]'.
326 06:35:41.424421
327 06:35:41.424957 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 06:35:41.425363
329 06:35:52.947554 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 06:35:52.948322 bl2_stage_init 0x01
331 06:35:52.948837 bl2_stage_init 0x81
332 06:35:52.953068 hw id: 0x0000 - pwm id 0x01
333 06:35:52.953712 bl2_stage_init 0xc1
334 06:35:52.954293 bl2_stage_init 0x02
335 06:35:52.954766
336 06:35:52.958612 L0:00000000
337 06:35:52.959182 L1:20000703
338 06:35:52.959653 L2:00008067
339 06:35:52.960150 L3:14000000
340 06:35:52.964244 B2:00402000
341 06:35:52.964880 B1:e0f83180
342 06:35:52.965367
343 06:35:52.965812 TE: 58124
344 06:35:52.966271
345 06:35:52.969818 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 06:35:52.970370
347 06:35:52.970825 Board ID = 1
348 06:35:52.975389 Set A53 clk to 24M
349 06:35:52.975944 Set A73 clk to 24M
350 06:35:52.976451 Set clk81 to 24M
351 06:35:52.980994 A53 clk: 1200 MHz
352 06:35:52.981529 A73 clk: 1200 MHz
353 06:35:52.981962 CLK81: 166.6M
354 06:35:52.982386 smccc: 00012a92
355 06:35:52.986596 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 06:35:52.992208 board id: 1
357 06:35:52.998080 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 06:35:53.008777 fw parse done
359 06:35:53.014706 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 06:35:53.057411 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 06:35:53.068238 PIEI prepare done
362 06:35:53.068829 fastboot data load
363 06:35:53.069310 fastboot data verify
364 06:35:53.073959 verify result: 266
365 06:35:53.079527 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 06:35:53.080194 LPDDR4 probe
367 06:35:53.080668 ddr clk to 1584MHz
368 06:35:53.086511 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 06:35:53.124706
370 06:35:53.125230 dmc_version 0001
371 06:35:53.131524 Check phy result
372 06:35:53.137307 INFO : End of CA training
373 06:35:53.137805 INFO : End of initialization
374 06:35:53.142888 INFO : Training has run successfully!
375 06:35:53.143377 Check phy result
376 06:35:53.148484 INFO : End of initialization
377 06:35:53.148967 INFO : End of read enable training
378 06:35:53.154063 INFO : End of fine write leveling
379 06:35:53.159700 INFO : End of Write leveling coarse delay
380 06:35:53.160221 INFO : Training has run successfully!
381 06:35:53.160670 Check phy result
382 06:35:53.165282 INFO : End of initialization
383 06:35:53.165768 INFO : End of read dq deskew training
384 06:35:53.170842 INFO : End of MPR read delay center optimization
385 06:35:53.176475 INFO : End of write delay center optimization
386 06:35:53.182050 INFO : End of read delay center optimization
387 06:35:53.182539 INFO : End of max read latency training
388 06:35:53.187663 INFO : Training has run successfully!
389 06:35:53.188192 1D training succeed
390 06:35:53.195890 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 06:35:53.244525 Check phy result
392 06:35:53.245107 INFO : End of initialization
393 06:35:53.266147 INFO : End of 2D read delay Voltage center optimization
394 06:35:53.286373 INFO : End of 2D read delay Voltage center optimization
395 06:35:53.338434 INFO : End of 2D write delay Voltage center optimization
396 06:35:53.387770 INFO : End of 2D write delay Voltage center optimization
397 06:35:53.393426 INFO : Training has run successfully!
398 06:35:53.393947
399 06:35:53.394412 channel==0
400 06:35:53.398946 RxClkDly_Margin_A0==88 ps 9
401 06:35:53.399446 TxDqDly_Margin_A0==98 ps 10
402 06:35:53.402316 RxClkDly_Margin_A1==88 ps 9
403 06:35:53.402820 TxDqDly_Margin_A1==88 ps 9
404 06:35:53.407860 TrainedVREFDQ_A0==74
405 06:35:53.408401 TrainedVREFDQ_A1==74
406 06:35:53.408857 VrefDac_Margin_A0==25
407 06:35:53.413463 DeviceVref_Margin_A0==40
408 06:35:53.413960 VrefDac_Margin_A1==25
409 06:35:53.419102 DeviceVref_Margin_A1==40
410 06:35:53.419603
411 06:35:53.420094
412 06:35:53.420547 channel==1
413 06:35:53.420988 RxClkDly_Margin_A0==98 ps 10
414 06:35:53.424650 TxDqDly_Margin_A0==88 ps 9
415 06:35:53.425152 RxClkDly_Margin_A1==98 ps 10
416 06:35:53.430300 TxDqDly_Margin_A1==88 ps 9
417 06:35:53.430799 TrainedVREFDQ_A0==77
418 06:35:53.431247 TrainedVREFDQ_A1==77
419 06:35:53.435856 VrefDac_Margin_A0==22
420 06:35:53.436381 DeviceVref_Margin_A0==37
421 06:35:53.441461 VrefDac_Margin_A1==22
422 06:35:53.441951 DeviceVref_Margin_A1==37
423 06:35:53.442399
424 06:35:53.447067 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 06:35:53.447565
426 06:35:53.475055 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
427 06:35:53.480686 2D training succeed
428 06:35:53.486311 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 06:35:53.486810 auto size-- 65535DDR cs0 size: 2048MB
430 06:35:53.491857 DDR cs1 size: 2048MB
431 06:35:53.492404 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 06:35:53.497478 cs0 DataBus test pass
433 06:35:53.497970 cs1 DataBus test pass
434 06:35:53.498418 cs0 AddrBus test pass
435 06:35:53.503058 cs1 AddrBus test pass
436 06:35:53.503544
437 06:35:53.504025 100bdlr_step_size ps== 420
438 06:35:53.504490 result report
439 06:35:53.508658 boot times 0Enable ddr reg access
440 06:35:53.516924 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 06:35:53.529711 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 06:35:54.103390 0.0;M3 CHK:0;cm4_sp_mode 0
443 06:35:54.103923 MVN_1=0x00000000
444 06:35:54.108891 MVN_2=0x00000000
445 06:35:54.114668 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 06:35:54.115139 OPS=0x10
447 06:35:54.115590 ring efuse init
448 06:35:54.116058 chipver efuse init
449 06:35:54.122973 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 06:35:54.123455 [0.018961 Inits done]
451 06:35:54.123897 secure task start!
452 06:35:54.130437 high task start!
453 06:35:54.130904 low task start!
454 06:35:54.131344 run into bl31
455 06:35:54.137057 NOTICE: BL31: v1.3(release):4fc40b1
456 06:35:54.144860 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 06:35:54.145335 NOTICE: BL31: G12A normal boot!
458 06:35:54.170237 NOTICE: BL31: BL33 decompress pass
459 06:35:54.174995 ERROR: Error initializing runtime service opteed_fast
460 06:35:55.408782
461 06:35:55.409119
462 06:35:55.417156 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 06:35:55.417391
464 06:35:55.417597 Model: Libre Computer AML-A311D-CC Alta
465 06:35:55.625716 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 06:35:55.649036 DRAM: 2 GiB (effective 3.8 GiB)
467 06:35:55.792098 Core: 408 devices, 31 uclasses, devicetree: separate
468 06:35:55.797913 WDT: Not starting watchdog@f0d0
469 06:35:55.830140 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 06:35:55.842748 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 06:35:55.847691 ** Bad device specification mmc 0 **
472 06:35:55.857955 Card did not respond to voltage select! : -110
473 06:35:55.865597 ** Bad device specification mmc 0 **
474 06:35:55.866067 Couldn't find partition mmc 0
475 06:35:55.873924 Card did not respond to voltage select! : -110
476 06:35:55.879472 ** Bad device specification mmc 0 **
477 06:35:55.879943 Couldn't find partition mmc 0
478 06:35:55.884508 Error: could not access storage.
479 06:35:57.148280 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 06:35:57.148882 bl2_stage_init 0x01
481 06:35:57.149338 bl2_stage_init 0x81
482 06:35:57.153726 hw id: 0x0000 - pwm id 0x01
483 06:35:57.154228 bl2_stage_init 0xc1
484 06:35:57.154677 bl2_stage_init 0x02
485 06:35:57.155117
486 06:35:57.159345 L0:00000000
487 06:35:57.159809 L1:20000703
488 06:35:57.160303 L2:00008067
489 06:35:57.160745 L3:14000000
490 06:35:57.162248 B2:00402000
491 06:35:57.162711 B1:e0f83180
492 06:35:57.163153
493 06:35:57.163591 TE: 58167
494 06:35:57.164063
495 06:35:57.173423 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 06:35:57.173900
497 06:35:57.174348 Board ID = 1
498 06:35:57.174779 Set A53 clk to 24M
499 06:35:57.175211 Set A73 clk to 24M
500 06:35:57.179022 Set clk81 to 24M
501 06:35:57.179489 A53 clk: 1200 MHz
502 06:35:57.179932 A73 clk: 1200 MHz
503 06:35:57.184518 CLK81: 166.6M
504 06:35:57.184986 smccc: 00012abd
505 06:35:57.190205 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 06:35:57.190669 board id: 1
507 06:35:57.198835 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 06:35:57.209445 fw parse done
509 06:35:57.215424 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 06:35:57.257699 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 06:35:57.268953 PIEI prepare done
512 06:35:57.269428 fastboot data load
513 06:35:57.269873 fastboot data verify
514 06:35:57.274590 verify result: 266
515 06:35:57.280103 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 06:35:57.280572 LPDDR4 probe
517 06:35:57.281017 ddr clk to 1584MHz
518 06:35:57.288113 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 06:35:57.324372
520 06:35:57.324858 dmc_version 0001
521 06:35:57.332116 Check phy result
522 06:35:57.337970 INFO : End of CA training
523 06:35:57.338440 INFO : End of initialization
524 06:35:57.343471 INFO : Training has run successfully!
525 06:35:57.343943 Check phy result
526 06:35:57.349058 INFO : End of initialization
527 06:35:57.349526 INFO : End of read enable training
528 06:35:57.354682 INFO : End of fine write leveling
529 06:35:57.360301 INFO : End of Write leveling coarse delay
530 06:35:57.360781 INFO : Training has run successfully!
531 06:35:57.361224 Check phy result
532 06:35:57.366007 INFO : End of initialization
533 06:35:57.366490 INFO : End of read dq deskew training
534 06:35:57.371499 INFO : End of MPR read delay center optimization
535 06:35:57.377085 INFO : End of write delay center optimization
536 06:35:57.382722 INFO : End of read delay center optimization
537 06:35:57.383184 INFO : End of max read latency training
538 06:35:57.388305 INFO : Training has run successfully!
539 06:35:57.388774 1D training succeed
540 06:35:57.397474 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 06:35:57.445122 Check phy result
542 06:35:57.445604 INFO : End of initialization
543 06:35:57.467596 INFO : End of 2D read delay Voltage center optimization
544 06:35:57.487304 INFO : End of 2D read delay Voltage center optimization
545 06:35:57.540009 INFO : End of 2D write delay Voltage center optimization
546 06:35:57.589370 INFO : End of 2D write delay Voltage center optimization
547 06:35:57.594825 INFO : Training has run successfully!
548 06:35:57.595315
549 06:35:57.595762 channel==0
550 06:35:57.600410 RxClkDly_Margin_A0==88 ps 9
551 06:35:57.600896 TxDqDly_Margin_A0==98 ps 10
552 06:35:57.606030 RxClkDly_Margin_A1==88 ps 9
553 06:35:57.606507 TxDqDly_Margin_A1==98 ps 10
554 06:35:57.606952 TrainedVREFDQ_A0==74
555 06:35:57.611626 TrainedVREFDQ_A1==75
556 06:35:57.612138 VrefDac_Margin_A0==24
557 06:35:57.612583 DeviceVref_Margin_A0==40
558 06:35:57.617213 VrefDac_Margin_A1==24
559 06:35:57.617676 DeviceVref_Margin_A1==39
560 06:35:57.618115
561 06:35:57.618552
562 06:35:57.622816 channel==1
563 06:35:57.623275 RxClkDly_Margin_A0==98 ps 10
564 06:35:57.623714 TxDqDly_Margin_A0==98 ps 10
565 06:35:57.628380 RxClkDly_Margin_A1==98 ps 10
566 06:35:57.628845 TxDqDly_Margin_A1==88 ps 9
567 06:35:57.634026 TrainedVREFDQ_A0==77
568 06:35:57.634494 TrainedVREFDQ_A1==77
569 06:35:57.634939 VrefDac_Margin_A0==22
570 06:35:57.639593 DeviceVref_Margin_A0==37
571 06:35:57.640081 VrefDac_Margin_A1==24
572 06:35:57.645206 DeviceVref_Margin_A1==37
573 06:35:57.645668
574 06:35:57.646104 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 06:35:57.650797
576 06:35:57.678805 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 06:35:57.679306 2D training succeed
578 06:35:57.684414 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 06:35:57.690040 auto size-- 65535DDR cs0 size: 2048MB
580 06:35:57.690508 DDR cs1 size: 2048MB
581 06:35:57.695609 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 06:35:57.696107 cs0 DataBus test pass
583 06:35:57.701204 cs1 DataBus test pass
584 06:35:57.701670 cs0 AddrBus test pass
585 06:35:57.702111 cs1 AddrBus test pass
586 06:35:57.702544
587 06:35:57.706813 100bdlr_step_size ps== 420
588 06:35:57.707293 result report
589 06:35:57.712410 boot times 0Enable ddr reg access
590 06:35:57.717858 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 06:35:57.731344 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 06:35:58.305011 0.0;M3 CHK:0;cm4_sp_mode 0
593 06:35:58.305525 MVN_1=0x00000000
594 06:35:58.310495 MVN_2=0x00000000
595 06:35:58.316260 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 06:35:58.316769 OPS=0x10
597 06:35:58.317222 ring efuse init
598 06:35:58.317680 chipver efuse init
599 06:35:58.321872 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 06:35:58.327427 [0.018960 Inits done]
601 06:35:58.327887 secure task start!
602 06:35:58.328372 high task start!
603 06:35:58.332187 low task start!
604 06:35:58.332646 run into bl31
605 06:35:58.338661 NOTICE: BL31: v1.3(release):4fc40b1
606 06:35:58.346451 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 06:35:58.346909 NOTICE: BL31: G12A normal boot!
608 06:35:58.371941 NOTICE: BL31: BL33 decompress pass
609 06:35:58.377583 ERROR: Error initializing runtime service opteed_fast
610 06:35:59.610454
611 06:35:59.610878
612 06:35:59.618802 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 06:35:59.619201
614 06:35:59.619537 Model: Libre Computer AML-A311D-CC Alta
615 06:35:59.827283 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 06:35:59.850611 DRAM: 2 GiB (effective 3.8 GiB)
617 06:35:59.993623 Core: 408 devices, 31 uclasses, devicetree: separate
618 06:35:59.999458 WDT: Not starting watchdog@f0d0
619 06:36:00.031761 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 06:36:00.044197 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 06:36:00.049198 ** Bad device specification mmc 0 **
622 06:36:00.059511 Card did not respond to voltage select! : -110
623 06:36:00.067218 ** Bad device specification mmc 0 **
624 06:36:00.067490 Couldn't find partition mmc 0
625 06:36:00.075536 Card did not respond to voltage select! : -110
626 06:36:00.081015 ** Bad device specification mmc 0 **
627 06:36:00.081284 Couldn't find partition mmc 0
628 06:36:00.086088 Error: could not access storage.
629 06:36:00.428551 Net: eth0: ethernet@ff3f0000
630 06:36:00.429095 starting USB...
631 06:36:00.680390 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 06:36:00.680778 Starting the controller
633 06:36:00.687298 USB XHCI 1.10
634 06:36:02.398440 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 06:36:02.399016 bl2_stage_init 0x01
636 06:36:02.399272 bl2_stage_init 0x81
637 06:36:02.404055 hw id: 0x0000 - pwm id 0x01
638 06:36:02.404354 bl2_stage_init 0xc1
639 06:36:02.404569 bl2_stage_init 0x02
640 06:36:02.404776
641 06:36:02.409574 L0:00000000
642 06:36:02.410016 L1:20000703
643 06:36:02.410363 L2:00008067
644 06:36:02.410694 L3:14000000
645 06:36:02.415071 B2:00402000
646 06:36:02.415507 B1:e0f83180
647 06:36:02.415855
648 06:36:02.416130 TE: 58159
649 06:36:02.416350
650 06:36:02.420745 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 06:36:02.421219
652 06:36:02.421574 Board ID = 1
653 06:36:02.426368 Set A53 clk to 24M
654 06:36:02.426811 Set A73 clk to 24M
655 06:36:02.427061 Set clk81 to 24M
656 06:36:02.431926 A53 clk: 1200 MHz
657 06:36:02.432245 A73 clk: 1200 MHz
658 06:36:02.432461 CLK81: 166.6M
659 06:36:02.432666 smccc: 00012ab5
660 06:36:02.437480 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 06:36:02.443098 board id: 1
662 06:36:02.448950 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 06:36:02.459694 fw parse done
664 06:36:02.465612 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 06:36:02.508164 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 06:36:02.519031 PIEI prepare done
667 06:36:02.519288 fastboot data load
668 06:36:02.519502 fastboot data verify
669 06:36:02.524637 verify result: 266
670 06:36:02.530244 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 06:36:02.530627 LPDDR4 probe
672 06:36:02.530960 ddr clk to 1584MHz
673 06:36:02.538214 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 06:36:02.575466
675 06:36:02.575725 dmc_version 0001
676 06:36:02.582149 Check phy result
677 06:36:02.588060 INFO : End of CA training
678 06:36:02.588421 INFO : End of initialization
679 06:36:02.593587 INFO : Training has run successfully!
680 06:36:02.593844 Check phy result
681 06:36:02.599208 INFO : End of initialization
682 06:36:02.599586 INFO : End of read enable training
683 06:36:02.602603 INFO : End of fine write leveling
684 06:36:02.608176 INFO : End of Write leveling coarse delay
685 06:36:02.613751 INFO : Training has run successfully!
686 06:36:02.614005 Check phy result
687 06:36:02.614216 INFO : End of initialization
688 06:36:02.619323 INFO : End of read dq deskew training
689 06:36:02.622795 INFO : End of MPR read delay center optimization
690 06:36:02.628339 INFO : End of write delay center optimization
691 06:36:02.633937 INFO : End of read delay center optimization
692 06:36:02.634301 INFO : End of max read latency training
693 06:36:02.639582 INFO : Training has run successfully!
694 06:36:02.639830 1D training succeed
695 06:36:02.647663 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 06:36:02.695195 Check phy result
697 06:36:02.695455 INFO : End of initialization
698 06:36:02.716922 INFO : End of 2D read delay Voltage center optimization
699 06:36:02.737233 INFO : End of 2D read delay Voltage center optimization
700 06:36:02.789226 INFO : End of 2D write delay Voltage center optimization
701 06:36:02.838754 INFO : End of 2D write delay Voltage center optimization
702 06:36:02.844231 INFO : Training has run successfully!
703 06:36:02.844481
704 06:36:02.844695 channel==0
705 06:36:02.849818 RxClkDly_Margin_A0==88 ps 9
706 06:36:02.850200 TxDqDly_Margin_A0==98 ps 10
707 06:36:02.855384 RxClkDly_Margin_A1==88 ps 9
708 06:36:02.855749 TxDqDly_Margin_A1==98 ps 10
709 06:36:02.856093 TrainedVREFDQ_A0==74
710 06:36:02.861069 TrainedVREFDQ_A1==75
711 06:36:02.861519 VrefDac_Margin_A0==25
712 06:36:02.861934 DeviceVref_Margin_A0==40
713 06:36:02.866762 VrefDac_Margin_A1==25
714 06:36:02.867198 DeviceVref_Margin_A1==39
715 06:36:02.867607
716 06:36:02.868049
717 06:36:02.872245 channel==1
718 06:36:02.872675 RxClkDly_Margin_A0==98 ps 10
719 06:36:02.873083 TxDqDly_Margin_A0==98 ps 10
720 06:36:02.877829 RxClkDly_Margin_A1==98 ps 10
721 06:36:02.878260 TxDqDly_Margin_A1==88 ps 9
722 06:36:02.883437 TrainedVREFDQ_A0==77
723 06:36:02.883872 TrainedVREFDQ_A1==77
724 06:36:02.884305 VrefDac_Margin_A0==22
725 06:36:02.889061 DeviceVref_Margin_A0==37
726 06:36:02.889488 VrefDac_Margin_A1==22
727 06:36:02.894775 DeviceVref_Margin_A1==37
728 06:36:02.895239
729 06:36:02.895664 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 06:36:02.900248
731 06:36:02.928202 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
732 06:36:02.928675 2D training succeed
733 06:36:02.933797 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 06:36:02.939379 auto size-- 65535DDR cs0 size: 2048MB
735 06:36:02.939806 DDR cs1 size: 2048MB
736 06:36:02.944992 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 06:36:02.945421 cs0 DataBus test pass
738 06:36:02.950672 cs1 DataBus test pass
739 06:36:02.951098 cs0 AddrBus test pass
740 06:36:02.951497 cs1 AddrBus test pass
741 06:36:02.951890
742 06:36:02.956188 100bdlr_step_size ps== 420
743 06:36:02.956626 result report
744 06:36:02.961760 boot times 0Enable ddr reg access
745 06:36:02.967214 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 06:36:02.980748 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 06:36:03.554477 0.0;M3 CHK:0;cm4_sp_mode 0
748 06:36:03.555091 MVN_1=0x00000000
749 06:36:03.560166 MVN_2=0x00000000
750 06:36:03.567184 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 06:36:03.567737 OPS=0x10
752 06:36:03.568193 ring efuse init
753 06:36:03.570430 chipver efuse init
754 06:36:03.570881 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 06:36:03.575963 [0.018961 Inits done]
756 06:36:03.576472 secure task start!
757 06:36:03.576870 high task start!
758 06:36:03.581655 low task start!
759 06:36:03.582191 run into bl31
760 06:36:03.588241 NOTICE: BL31: v1.3(release):4fc40b1
761 06:36:03.596036 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 06:36:03.596514 NOTICE: BL31: G12A normal boot!
763 06:36:03.621448 NOTICE: BL31: BL33 decompress pass
764 06:36:03.627034 ERROR: Error initializing runtime service opteed_fast
765 06:36:04.860170
766 06:36:04.860798
767 06:36:04.868380 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 06:36:04.868866
769 06:36:04.869294 Model: Libre Computer AML-A311D-CC Alta
770 06:36:05.076836 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 06:36:05.100174 DRAM: 2 GiB (effective 3.8 GiB)
772 06:36:05.243212 Core: 408 devices, 31 uclasses, devicetree: separate
773 06:36:05.249008 WDT: Not starting watchdog@f0d0
774 06:36:05.281200 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 06:36:05.293687 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 06:36:05.298758 ** Bad device specification mmc 0 **
777 06:36:05.309071 Card did not respond to voltage select! : -110
778 06:36:05.316664 ** Bad device specification mmc 0 **
779 06:36:05.317189 Couldn't find partition mmc 0
780 06:36:05.325142 Card did not respond to voltage select! : -110
781 06:36:05.330560 ** Bad device specification mmc 0 **
782 06:36:05.331046 Couldn't find partition mmc 0
783 06:36:05.335637 Error: could not access storage.
784 06:36:05.679171 Net: eth0: ethernet@ff3f0000
785 06:36:05.679783 starting USB...
786 06:36:05.931065 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 06:36:05.931671 Starting the controller
788 06:36:05.937980 USB XHCI 1.10
789 06:36:08.099844 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 06:36:08.100498 bl2_stage_init 0x01
791 06:36:08.100945 bl2_stage_init 0x81
792 06:36:08.105373 hw id: 0x0000 - pwm id 0x01
793 06:36:08.105851 bl2_stage_init 0xc1
794 06:36:08.106272 bl2_stage_init 0x02
795 06:36:08.106680
796 06:36:08.110940 L0:00000000
797 06:36:08.111410 L1:20000703
798 06:36:08.111826 L2:00008067
799 06:36:08.112273 L3:14000000
800 06:36:08.113956 B2:00402000
801 06:36:08.114409 B1:e0f83180
802 06:36:08.114817
803 06:36:08.115222 TE: 58159
804 06:36:08.115622
805 06:36:08.125048 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 06:36:08.125585
807 06:36:08.126018 Board ID = 1
808 06:36:08.126428 Set A53 clk to 24M
809 06:36:08.126835 Set A73 clk to 24M
810 06:36:08.130770 Set clk81 to 24M
811 06:36:08.131243 A53 clk: 1200 MHz
812 06:36:08.131660 A73 clk: 1200 MHz
813 06:36:08.134436 CLK81: 166.6M
814 06:36:08.134898 smccc: 00012ab5
815 06:36:08.139796 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 06:36:08.145537 board id: 1
817 06:36:08.150622 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 06:36:08.160997 fw parse done
819 06:36:08.166958 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 06:36:08.209599 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 06:36:08.220617 PIEI prepare done
822 06:36:08.221150 fastboot data load
823 06:36:08.221580 fastboot data verify
824 06:36:08.226155 verify result: 266
825 06:36:08.231752 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 06:36:08.232258 LPDDR4 probe
827 06:36:08.232676 ddr clk to 1584MHz
828 06:36:08.239728 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 06:36:08.276954
830 06:36:08.277415 dmc_version 0001
831 06:36:08.283663 Check phy result
832 06:36:08.289523 INFO : End of CA training
833 06:36:08.289977 INFO : End of initialization
834 06:36:08.295127 INFO : Training has run successfully!
835 06:36:08.295584 Check phy result
836 06:36:08.300713 INFO : End of initialization
837 06:36:08.301163 INFO : End of read enable training
838 06:36:08.306357 INFO : End of fine write leveling
839 06:36:08.311903 INFO : End of Write leveling coarse delay
840 06:36:08.312389 INFO : Training has run successfully!
841 06:36:08.312801 Check phy result
842 06:36:08.317543 INFO : End of initialization
843 06:36:08.318065 INFO : End of read dq deskew training
844 06:36:08.323142 INFO : End of MPR read delay center optimization
845 06:36:08.328734 INFO : End of write delay center optimization
846 06:36:08.334369 INFO : End of read delay center optimization
847 06:36:08.334822 INFO : End of max read latency training
848 06:36:08.339926 INFO : Training has run successfully!
849 06:36:08.340414 1D training succeed
850 06:36:08.349120 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 06:36:08.396699 Check phy result
852 06:36:08.397173 INFO : End of initialization
853 06:36:08.418546 INFO : End of 2D read delay Voltage center optimization
854 06:36:08.438827 INFO : End of 2D read delay Voltage center optimization
855 06:36:08.490824 INFO : End of 2D write delay Voltage center optimization
856 06:36:08.540287 INFO : End of 2D write delay Voltage center optimization
857 06:36:08.545744 INFO : Training has run successfully!
858 06:36:08.546277
859 06:36:08.546714 channel==0
860 06:36:08.551346 RxClkDly_Margin_A0==88 ps 9
861 06:36:08.551875 TxDqDly_Margin_A0==98 ps 10
862 06:36:08.556952 RxClkDly_Margin_A1==88 ps 9
863 06:36:08.557493 TxDqDly_Margin_A1==98 ps 10
864 06:36:08.557955 TrainedVREFDQ_A0==74
865 06:36:08.562619 TrainedVREFDQ_A1==75
866 06:36:08.563183 VrefDac_Margin_A0==25
867 06:36:08.563620 DeviceVref_Margin_A0==40
868 06:36:08.568121 VrefDac_Margin_A1==25
869 06:36:08.568662 DeviceVref_Margin_A1==39
870 06:36:08.569060
871 06:36:08.569451
872 06:36:08.573744 channel==1
873 06:36:08.574251 RxClkDly_Margin_A0==98 ps 10
874 06:36:08.574648 TxDqDly_Margin_A0==98 ps 10
875 06:36:08.579302 RxClkDly_Margin_A1==98 ps 10
876 06:36:08.579799 TxDqDly_Margin_A1==88 ps 9
877 06:36:08.584930 TrainedVREFDQ_A0==77
878 06:36:08.585437 TrainedVREFDQ_A1==77
879 06:36:08.585840 VrefDac_Margin_A0==22
880 06:36:08.590539 DeviceVref_Margin_A0==37
881 06:36:08.591040 VrefDac_Margin_A1==22
882 06:36:08.596121 DeviceVref_Margin_A1==37
883 06:36:08.596626
884 06:36:08.597025 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 06:36:08.601709
886 06:36:08.629678 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 06:36:08.630266 2D training succeed
888 06:36:08.635331 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 06:36:08.640926 auto size-- 65535DDR cs0 size: 2048MB
890 06:36:08.641433 DDR cs1 size: 2048MB
891 06:36:08.646537 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 06:36:08.647037 cs0 DataBus test pass
893 06:36:08.652138 cs1 DataBus test pass
894 06:36:08.652647 cs0 AddrBus test pass
895 06:36:08.653044 cs1 AddrBus test pass
896 06:36:08.653430
897 06:36:08.657739 100bdlr_step_size ps== 420
898 06:36:08.658254 result report
899 06:36:08.663328 boot times 0Enable ddr reg access
900 06:36:08.668750 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 06:36:08.682197 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 06:36:09.255923 0.0;M3 CHK:0;cm4_sp_mode 0
903 06:36:09.256581 MVN_1=0x00000000
904 06:36:09.261431 MVN_2=0x00000000
905 06:36:09.267154 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 06:36:09.267674 OPS=0x10
907 06:36:09.268181 ring efuse init
908 06:36:09.268603 chipver efuse init
909 06:36:09.272750 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 06:36:09.278350 [0.018960 Inits done]
911 06:36:09.278856 secure task start!
912 06:36:09.279279 high task start!
913 06:36:09.282924 low task start!
914 06:36:09.283422 run into bl31
915 06:36:09.289581 NOTICE: BL31: v1.3(release):4fc40b1
916 06:36:09.297363 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 06:36:09.297875 NOTICE: BL31: G12A normal boot!
918 06:36:09.323278 NOTICE: BL31: BL33 decompress pass
919 06:36:09.328975 ERROR: Error initializing runtime service opteed_fast
920 06:36:10.561801
921 06:36:10.562218
922 06:36:10.570171 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 06:36:10.570948
924 06:36:10.572105 Model: Libre Computer AML-A311D-CC Alta
925 06:36:10.778640 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 06:36:10.801925 DRAM: 2 GiB (effective 3.8 GiB)
927 06:36:10.944912 Core: 408 devices, 31 uclasses, devicetree: separate
928 06:36:10.950786 WDT: Not starting watchdog@f0d0
929 06:36:10.983048 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 06:36:10.995503 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 06:36:11.000474 ** Bad device specification mmc 0 **
932 06:36:11.010823 Card did not respond to voltage select! : -110
933 06:36:11.018460 ** Bad device specification mmc 0 **
934 06:36:11.018925 Couldn't find partition mmc 0
935 06:36:11.026807 Card did not respond to voltage select! : -110
936 06:36:11.032321 ** Bad device specification mmc 0 **
937 06:36:11.032788 Couldn't find partition mmc 0
938 06:36:11.037387 Error: could not access storage.
939 06:36:11.381013 Net: eth0: ethernet@ff3f0000
940 06:36:11.381627 starting USB...
941 06:36:11.632863 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 06:36:11.633361 Starting the controller
943 06:36:11.639715 USB XHCI 1.10
944 06:36:13.194014 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 06:36:13.202292 scanning usb for storage devices... 0 Storage Device(s) found
947 06:36:13.253788 Hit any key to stop autoboot: 1
948 06:36:13.254598 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 06:36:13.254951 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 06:36:13.255220 Setting prompt string to ['=>']
951 06:36:13.255552 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 06:36:13.269715 0
953 06:36:13.270603 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 06:36:13.271106 Sending with 10 millisecond of delay
956 06:36:14.408964 => setenv autoload no
957 06:36:14.419840 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 06:36:14.425278 setenv autoload no
959 06:36:14.426055 Sending with 10 millisecond of delay
961 06:36:16.225959 => setenv initrd_high 0xffffffff
962 06:36:16.236849 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 06:36:16.237877 setenv initrd_high 0xffffffff
964 06:36:16.238647 Sending with 10 millisecond of delay
966 06:36:17.855022 => setenv fdt_high 0xffffffff
967 06:36:17.865614 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 06:36:17.866183 setenv fdt_high 0xffffffff
969 06:36:17.866633 Sending with 10 millisecond of delay
971 06:36:18.158209 => dhcp
972 06:36:18.169059 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 06:36:18.169967 dhcp
974 06:36:18.170426 Speed: 1000, full duplex
975 06:36:18.170865 BOOTP broadcast 1
976 06:36:18.417380 BOOTP broadcast 2
977 06:36:18.432148 DHCP client bound to address 192.168.6.33 (261 ms)
978 06:36:18.432932 Sending with 10 millisecond of delay
980 06:36:20.109189 => setenv serverip 192.168.6.2
981 06:36:20.120048 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
982 06:36:20.120968 setenv serverip 192.168.6.2
983 06:36:20.121686 Sending with 10 millisecond of delay
985 06:36:23.844913 => tftpboot 0x01080000 681564/tftp-deploy-1qsbnuwn/kernel/uImage
986 06:36:23.855768 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
987 06:36:23.856718 tftpboot 0x01080000 681564/tftp-deploy-1qsbnuwn/kernel/uImage
988 06:36:23.857205 Speed: 1000, full duplex
989 06:36:23.857665 Using ethernet@ff3f0000 device
990 06:36:23.862268 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
991 06:36:23.867242 Filename '681564/tftp-deploy-1qsbnuwn/kernel/uImage'.
992 06:36:23.869251 Load address: 0x1080000
993 06:36:26.720409 Loading: *################################################## 43.2 MiB
994 06:36:26.721034 15.1 MiB/s
995 06:36:26.721474 done
996 06:36:26.724942 Bytes transferred = 45308480 (2b35a40 hex)
997 06:36:26.725749 Sending with 10 millisecond of delay
999 06:36:31.415096 => tftpboot 0x08000000 681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot
1000 06:36:31.425751 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1001 06:36:31.426938 tftpboot 0x08000000 681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot
1002 06:36:31.427557 Speed: 1000, full duplex
1003 06:36:31.427771 Using ethernet@ff3f0000 device
1004 06:36:31.428433 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1005 06:36:31.440228 Filename '681564/tftp-deploy-1qsbnuwn/ramdisk/ramdisk.cpio.gz.uboot'.
1006 06:36:31.440834 Load address: 0x8000000
1007 06:36:38.091807 Loading: *####################T ############################# UDP wrong checksum 00000005 0000960b
1008 06:36:43.093910 T UDP wrong checksum 00000005 0000960b
1009 06:36:53.096062 T T UDP wrong checksum 00000005 0000960b
1010 06:37:13.099759 T T T T UDP wrong checksum 00000005 0000960b
1011 06:37:28.104053 T T
1012 06:37:28.104673 Retry count exceeded; starting again
1014 06:37:28.106102 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1017 06:37:28.108046 end: 2.4 uboot-commands (duration 00:01:47) [common]
1019 06:37:28.109454 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1021 06:37:28.110487 end: 2 uboot-action (duration 00:01:47) [common]
1023 06:37:28.112005 Cleaning after the job
1024 06:37:28.112557 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/ramdisk
1025 06:37:28.113827 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/kernel
1026 06:37:28.158733 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/dtb
1027 06:37:28.159497 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/nfsrootfs
1028 06:37:28.458509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/681564/tftp-deploy-1qsbnuwn/modules
1029 06:37:28.477532 start: 4.1 power-off (timeout 00:00:30) [common]
1030 06:37:28.478167 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1031 06:37:28.511019 >> OK - accepted request
1032 06:37:28.512758 Returned 0 in 0 seconds
1033 06:37:28.613486 end: 4.1 power-off (duration 00:00:00) [common]
1035 06:37:28.614423 start: 4.2 read-feedback (timeout 00:10:00) [common]
1036 06:37:28.615067 Listened to connection for namespace 'common' for up to 1s
1037 06:37:29.616342 Finalising connection for namespace 'common'
1038 06:37:29.617097 Disconnecting from shell: Finalise
1039 06:37:29.617367 =>
1040 06:37:29.717974 end: 4.2 read-feedback (duration 00:00:01) [common]
1041 06:37:29.718348 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/681564
1042 06:37:32.311350 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/681564
1043 06:37:32.312004 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.