Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:48:26.904204 lava-dispatcher, installed at version: 2024.01
2 20:48:26.904988 start: 0 validate
3 20:48:26.905479 Start time: 2024-08-31 20:48:26.905449+00:00 (UTC)
4 20:48:26.906026 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:48:26.906557 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:48:26.953689 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:48:26.954294 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 20:48:26.985095 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:48:26.985828 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 20:48:27.014916 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:48:27.015447 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:48:27.049864 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:48:27.050582 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 20:48:27.090014 validate duration: 0.18
16 20:48:27.090848 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:48:27.091195 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:48:27.091507 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:48:27.092139 Not decompressing ramdisk as can be used compressed.
20 20:48:27.092608 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 20:48:27.092904 saving as /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/ramdisk/initrd.cpio.gz
22 20:48:27.093180 total size: 5628182 (5 MB)
23 20:48:27.131563 progress 0 % (0 MB)
24 20:48:27.135760 progress 5 % (0 MB)
25 20:48:27.140094 progress 10 % (0 MB)
26 20:48:27.143874 progress 15 % (0 MB)
27 20:48:27.147959 progress 20 % (1 MB)
28 20:48:27.151562 progress 25 % (1 MB)
29 20:48:27.155639 progress 30 % (1 MB)
30 20:48:27.159719 progress 35 % (1 MB)
31 20:48:27.163352 progress 40 % (2 MB)
32 20:48:27.167443 progress 45 % (2 MB)
33 20:48:27.171238 progress 50 % (2 MB)
34 20:48:27.175537 progress 55 % (2 MB)
35 20:48:27.180156 progress 60 % (3 MB)
36 20:48:27.184132 progress 65 % (3 MB)
37 20:48:27.188515 progress 70 % (3 MB)
38 20:48:27.192565 progress 75 % (4 MB)
39 20:48:27.196871 progress 80 % (4 MB)
40 20:48:27.200776 progress 85 % (4 MB)
41 20:48:27.204815 progress 90 % (4 MB)
42 20:48:27.208458 progress 95 % (5 MB)
43 20:48:27.211857 progress 100 % (5 MB)
44 20:48:27.212541 5 MB downloaded in 0.12 s (44.98 MB/s)
45 20:48:27.213091 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:48:27.214022 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:48:27.214334 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:48:27.214651 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:48:27.215135 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
51 20:48:27.215416 saving as /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/kernel/Image
52 20:48:27.215633 total size: 43798536 (41 MB)
53 20:48:27.215846 No compression specified
54 20:48:27.256357 progress 0 % (0 MB)
55 20:48:27.283275 progress 5 % (2 MB)
56 20:48:27.309807 progress 10 % (4 MB)
57 20:48:27.336383 progress 15 % (6 MB)
58 20:48:27.363011 progress 20 % (8 MB)
59 20:48:27.389817 progress 25 % (10 MB)
60 20:48:27.416101 progress 30 % (12 MB)
61 20:48:27.442951 progress 35 % (14 MB)
62 20:48:27.469249 progress 40 % (16 MB)
63 20:48:27.495480 progress 45 % (18 MB)
64 20:48:27.522489 progress 50 % (20 MB)
65 20:48:27.548829 progress 55 % (23 MB)
66 20:48:27.574985 progress 60 % (25 MB)
67 20:48:27.601318 progress 65 % (27 MB)
68 20:48:27.628002 progress 70 % (29 MB)
69 20:48:27.654325 progress 75 % (31 MB)
70 20:48:27.680380 progress 80 % (33 MB)
71 20:48:27.706767 progress 85 % (35 MB)
72 20:48:27.733262 progress 90 % (37 MB)
73 20:48:27.759834 progress 95 % (39 MB)
74 20:48:27.785892 progress 100 % (41 MB)
75 20:48:27.786590 41 MB downloaded in 0.57 s (73.16 MB/s)
76 20:48:27.787079 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:48:27.787937 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:48:27.788249 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:48:27.788523 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:48:27.788988 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 20:48:27.789238 saving as /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 20:48:27.789448 total size: 53173 (0 MB)
84 20:48:27.789657 No compression specified
85 20:48:27.829621 progress 61 % (0 MB)
86 20:48:27.830482 progress 100 % (0 MB)
87 20:48:27.831031 0 MB downloaded in 0.04 s (1.22 MB/s)
88 20:48:27.831520 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:48:27.832399 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:48:27.832677 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:48:27.832948 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:48:27.833432 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 20:48:27.833692 saving as /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/nfsrootfs/full.rootfs.tar
95 20:48:27.833900 total size: 107552908 (102 MB)
96 20:48:27.834116 Using unxz to decompress xz
97 20:48:27.878570 progress 0 % (0 MB)
98 20:48:28.528964 progress 5 % (5 MB)
99 20:48:29.286421 progress 10 % (10 MB)
100 20:48:30.092515 progress 15 % (15 MB)
101 20:48:30.899162 progress 20 % (20 MB)
102 20:48:31.519711 progress 25 % (25 MB)
103 20:48:32.139957 progress 30 % (30 MB)
104 20:48:32.879840 progress 35 % (35 MB)
105 20:48:33.225869 progress 40 % (41 MB)
106 20:48:33.650693 progress 45 % (46 MB)
107 20:48:34.351676 progress 50 % (51 MB)
108 20:48:35.050521 progress 55 % (56 MB)
109 20:48:35.806137 progress 60 % (61 MB)
110 20:48:36.560105 progress 65 % (66 MB)
111 20:48:37.287968 progress 70 % (71 MB)
112 20:48:38.050029 progress 75 % (76 MB)
113 20:48:38.729570 progress 80 % (82 MB)
114 20:48:39.437164 progress 85 % (87 MB)
115 20:48:40.175890 progress 90 % (92 MB)
116 20:48:40.892154 progress 95 % (97 MB)
117 20:48:41.636919 progress 100 % (102 MB)
118 20:48:41.649597 102 MB downloaded in 13.82 s (7.42 MB/s)
119 20:48:41.650300 end: 1.4.1 http-download (duration 00:00:14) [common]
121 20:48:41.651248 end: 1.4 download-retry (duration 00:00:14) [common]
122 20:48:41.651584 start: 1.5 download-retry (timeout 00:09:45) [common]
123 20:48:41.651889 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 20:48:41.652964 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
125 20:48:41.653671 saving as /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/modules/modules.tar
126 20:48:41.654309 total size: 11339736 (10 MB)
127 20:48:41.654879 Using unxz to decompress xz
128 20:48:41.703970 progress 0 % (0 MB)
129 20:48:41.775132 progress 5 % (0 MB)
130 20:48:41.852455 progress 10 % (1 MB)
131 20:48:41.938850 progress 15 % (1 MB)
132 20:48:42.020463 progress 20 % (2 MB)
133 20:48:42.098308 progress 25 % (2 MB)
134 20:48:42.177838 progress 30 % (3 MB)
135 20:48:42.257268 progress 35 % (3 MB)
136 20:48:42.332095 progress 40 % (4 MB)
137 20:48:42.403080 progress 45 % (4 MB)
138 20:48:42.482362 progress 50 % (5 MB)
139 20:48:42.554080 progress 55 % (5 MB)
140 20:48:42.633971 progress 60 % (6 MB)
141 20:48:42.716969 progress 65 % (7 MB)
142 20:48:42.799574 progress 70 % (7 MB)
143 20:48:42.893628 progress 75 % (8 MB)
144 20:48:42.984210 progress 80 % (8 MB)
145 20:48:43.064770 progress 85 % (9 MB)
146 20:48:43.135672 progress 90 % (9 MB)
147 20:48:43.210496 progress 95 % (10 MB)
148 20:48:43.287099 progress 100 % (10 MB)
149 20:48:43.297385 10 MB downloaded in 1.64 s (6.58 MB/s)
150 20:48:43.298086 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:48:43.299744 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:48:43.300342 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 20:48:43.300882 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 20:48:53.111512 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/683041/extract-nfsrootfs-7chunaz0
156 20:48:53.112199 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 20:48:53.112510 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 20:48:53.113275 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r
159 20:48:53.113750 makedir: /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin
160 20:48:53.114145 makedir: /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/tests
161 20:48:53.114484 makedir: /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/results
162 20:48:53.114830 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-add-keys
163 20:48:53.115440 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-add-sources
164 20:48:53.115961 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-background-process-start
165 20:48:53.116501 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-background-process-stop
166 20:48:53.117034 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-common-functions
167 20:48:53.117535 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-echo-ipv4
168 20:48:53.118239 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-install-packages
169 20:48:53.118762 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-installed-packages
170 20:48:53.119362 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-os-build
171 20:48:53.119947 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-probe-channel
172 20:48:53.120492 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-probe-ip
173 20:48:53.121048 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-target-ip
174 20:48:53.121550 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-target-mac
175 20:48:53.122094 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-target-storage
176 20:48:53.122621 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-case
177 20:48:53.123122 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-event
178 20:48:53.123700 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-feedback
179 20:48:53.124246 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-raise
180 20:48:53.124842 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-reference
181 20:48:53.125351 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-runner
182 20:48:53.125899 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-set
183 20:48:53.126408 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-test-shell
184 20:48:53.126910 Updating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-install-packages (oe)
185 20:48:53.127454 Updating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/bin/lava-installed-packages (oe)
186 20:48:53.127903 Creating /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/environment
187 20:48:53.128308 LAVA metadata
188 20:48:53.128576 - LAVA_JOB_ID=683041
189 20:48:53.128795 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:48:53.129154 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 20:48:53.130143 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:48:53.130468 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 20:48:53.130682 skipped lava-vland-overlay
194 20:48:53.130928 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:48:53.131188 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 20:48:53.131411 skipped lava-multinode-overlay
197 20:48:53.131657 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:48:53.131911 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 20:48:53.132189 Loading test definitions
200 20:48:53.132476 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 20:48:53.132769 Using /lava-683041 at stage 0
202 20:48:53.133966 uuid=683041_1.6.2.4.1 testdef=None
203 20:48:53.134275 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:48:53.134541 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 20:48:53.136367 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:48:53.137161 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 20:48:53.139402 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:48:53.140334 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 20:48:53.142515 runner path: /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/0/tests/0_dmesg test_uuid 683041_1.6.2.4.1
212 20:48:53.143065 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:48:53.143829 Creating lava-test-runner.conf files
215 20:48:53.144056 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/683041/lava-overlay-6agpbu6r/lava-683041/0 for stage 0
216 20:48:53.144398 - 0_dmesg
217 20:48:53.144743 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:48:53.145019 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 20:48:53.167304 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:48:53.167693 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 20:48:53.167963 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:48:53.168267 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:48:53.168537 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 20:48:53.783831 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:48:53.784325 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 20:48:53.784578 extracting modules file /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683041/extract-nfsrootfs-7chunaz0
227 20:48:55.138628 extracting modules file /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683041/extract-overlay-ramdisk-wqxdh7k0/ramdisk
228 20:48:56.548828 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:48:56.549266 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 20:48:56.549580 [common] Applying overlay to NFS
231 20:48:56.549798 [common] Applying overlay /var/lib/lava/dispatcher/tmp/683041/compress-overlay-p2poz20j/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/683041/extract-nfsrootfs-7chunaz0
232 20:48:56.580085 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:48:56.580486 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 20:48:56.580760 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 20:48:56.580994 Converting downloaded kernel to a uImage
236 20:48:56.581318 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/kernel/Image /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/kernel/uImage
237 20:48:57.035860 output: Image Name:
238 20:48:57.036316 output: Created: Sat Aug 31 20:48:56 2024
239 20:48:57.036538 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:48:57.036748 output: Data Size: 43798536 Bytes = 42772.01 KiB = 41.77 MiB
241 20:48:57.036954 output: Load Address: 01080000
242 20:48:57.037159 output: Entry Point: 01080000
243 20:48:57.037362 output:
244 20:48:57.037707 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 20:48:57.037984 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 20:48:57.038264 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 20:48:57.038524 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:48:57.038786 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 20:48:57.039046 Building ramdisk /var/lib/lava/dispatcher/tmp/683041/extract-overlay-ramdisk-wqxdh7k0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/683041/extract-overlay-ramdisk-wqxdh7k0/ramdisk
250 20:48:59.171885 >> 163544 blocks
251 20:49:07.633449 Adding RAMdisk u-boot header.
252 20:49:07.633891 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/683041/extract-overlay-ramdisk-wqxdh7k0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/683041/extract-overlay-ramdisk-wqxdh7k0/ramdisk.cpio.gz.uboot
253 20:49:07.907405 output: Image Name:
254 20:49:07.908183 output: Created: Sat Aug 31 20:49:07 2024
255 20:49:07.908675 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:49:07.909137 output: Data Size: 23396755 Bytes = 22848.39 KiB = 22.31 MiB
257 20:49:07.909598 output: Load Address: 00000000
258 20:49:07.910050 output: Entry Point: 00000000
259 20:49:07.910492 output:
260 20:49:07.911611 rename /var/lib/lava/dispatcher/tmp/683041/extract-overlay-ramdisk-wqxdh7k0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot
261 20:49:07.912429 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 20:49:07.913039 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 20:49:07.913625 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 20:49:07.914129 No LXC device requested
265 20:49:07.914722 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:49:07.915335 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 20:49:07.915960 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:49:07.916479 Checking files for TFTP limit of 4294967296 bytes.
269 20:49:07.919438 end: 1 tftp-deploy (duration 00:00:41) [common]
270 20:49:07.920166 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:49:07.920769 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:49:07.921327 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:49:07.921884 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:49:07.922473 Using kernel file from prepare-kernel: 683041/tftp-deploy-0zloqcb5/kernel/uImage
275 20:49:07.923171 substitutions:
276 20:49:07.923625 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:49:07.924109 - {DTB_ADDR}: 0x01070000
278 20:49:07.924561 - {DTB}: 683041/tftp-deploy-0zloqcb5/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 20:49:07.925011 - {INITRD}: 683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot
280 20:49:07.925454 - {KERNEL_ADDR}: 0x01080000
281 20:49:07.925894 - {KERNEL}: 683041/tftp-deploy-0zloqcb5/kernel/uImage
282 20:49:07.926334 - {LAVA_MAC}: None
283 20:49:07.926815 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/683041/extract-nfsrootfs-7chunaz0
284 20:49:07.927262 - {NFS_SERVER_IP}: 192.168.6.2
285 20:49:07.927699 - {PRESEED_CONFIG}: None
286 20:49:07.928171 - {PRESEED_LOCAL}: None
287 20:49:07.928614 - {RAMDISK_ADDR}: 0x08000000
288 20:49:07.929047 - {RAMDISK}: 683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot
289 20:49:07.929487 - {ROOT_PART}: None
290 20:49:07.929924 - {ROOT}: None
291 20:49:07.930357 - {SERVER_IP}: 192.168.6.2
292 20:49:07.930786 - {TEE_ADDR}: 0x83000000
293 20:49:07.931222 - {TEE}: None
294 20:49:07.931659 Parsed boot commands:
295 20:49:07.932112 - setenv autoload no
296 20:49:07.932556 - setenv initrd_high 0xffffffff
297 20:49:07.932992 - setenv fdt_high 0xffffffff
298 20:49:07.933424 - dhcp
299 20:49:07.933864 - setenv serverip 192.168.6.2
300 20:49:07.934297 - tftpboot 0x01080000 683041/tftp-deploy-0zloqcb5/kernel/uImage
301 20:49:07.934728 - tftpboot 0x08000000 683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot
302 20:49:07.935162 - tftpboot 0x01070000 683041/tftp-deploy-0zloqcb5/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 20:49:07.935594 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/683041/extract-nfsrootfs-7chunaz0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:49:07.936065 - bootm 0x01080000 0x08000000 0x01070000
305 20:49:07.936630 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:49:07.938362 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:49:07.938861 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 20:49:07.955346 Setting prompt string to ['lava-test: # ']
310 20:49:07.956993 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:49:07.957647 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:49:07.958246 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:49:07.958890 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:49:07.960243 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 20:49:07.997692 >> OK - accepted request
316 20:49:07.999935 Returned 0 in 0 seconds
317 20:49:08.101299 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:49:08.103093 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:49:08.103740 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:49:08.104403 Setting prompt string to ['Hit any key to stop autoboot']
322 20:49:08.104929 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:49:08.106625 Trying 192.168.56.21...
324 20:49:08.107145 Connected to conserv1.
325 20:49:08.107613 Escape character is '^]'.
326 20:49:08.108120
327 20:49:08.108599 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 20:49:08.109084
329 20:49:14.559812 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 20:49:14.560501 bl2_stage_init 0x01
331 20:49:14.561002 bl2_stage_init 0x81
332 20:49:14.565417 hw id: 0x0000 - pwm id 0x01
333 20:49:14.565931 bl2_stage_init 0xc1
334 20:49:14.571019 bl2_stage_init 0x02
335 20:49:14.571498
336 20:49:14.571964 L0:00000000
337 20:49:14.572453 L1:00000703
338 20:49:14.572905 L2:00008067
339 20:49:14.573349 L3:15000000
340 20:49:14.576500 S1:00000000
341 20:49:14.576998 B2:20282000
342 20:49:14.577453 B1:a0f83180
343 20:49:14.577902
344 20:49:14.578351 TE: 69897
345 20:49:14.578795
346 20:49:14.582266 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 20:49:14.582782
348 20:49:14.587682 Board ID = 1
349 20:49:14.588192 Set cpu clk to 24M
350 20:49:14.588651 Set clk81 to 24M
351 20:49:14.593351 Use GP1_pll as DSU clk.
352 20:49:14.593830 DSU clk: 1200 Mhz
353 20:49:14.594277 CPU clk: 1200 MHz
354 20:49:14.599001 Set clk81 to 166.6M
355 20:49:14.604650 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 20:49:14.605240 board id: 1
357 20:49:14.611836 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:49:14.622745 fw parse done
359 20:49:14.628632 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:49:14.671666 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:49:14.682792 PIEI prepare done
362 20:49:14.683331 fastboot data load
363 20:49:14.683800 fastboot data verify
364 20:49:14.688378 verify result: 266
365 20:49:14.694028 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 20:49:14.694512 LPDDR4 probe
367 20:49:14.694961 ddr clk to 1584MHz
368 20:49:14.701015 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:49:14.739949
370 20:49:14.740475 dmc_version 0001
371 20:49:14.746790 Check phy result
372 20:49:14.752746 INFO : End of CA training
373 20:49:14.753228 INFO : End of initialization
374 20:49:14.758334 INFO : Training has run successfully!
375 20:49:14.758807 Check phy result
376 20:49:14.763927 INFO : End of initialization
377 20:49:14.764449 INFO : End of read enable training
378 20:49:14.767176 INFO : End of fine write leveling
379 20:49:14.772756 INFO : End of Write leveling coarse delay
380 20:49:14.778378 INFO : Training has run successfully!
381 20:49:14.778853 Check phy result
382 20:49:14.779301 INFO : End of initialization
383 20:49:14.783955 INFO : End of read dq deskew training
384 20:49:14.789564 INFO : End of MPR read delay center optimization
385 20:49:14.790061 INFO : End of write delay center optimization
386 20:49:14.795469 INFO : End of read delay center optimization
387 20:49:14.800712 INFO : End of max read latency training
388 20:49:14.801190 INFO : Training has run successfully!
389 20:49:14.806318 1D training succeed
390 20:49:14.812313 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:49:14.860647 Check phy result
392 20:49:14.861186 INFO : End of initialization
393 20:49:14.887936 INFO : End of 2D read delay Voltage center optimization
394 20:49:14.911215 INFO : End of 2D read delay Voltage center optimization
395 20:49:14.968907 INFO : End of 2D write delay Voltage center optimization
396 20:49:15.022797 INFO : End of 2D write delay Voltage center optimization
397 20:49:15.028271 INFO : Training has run successfully!
398 20:49:15.028748
399 20:49:15.029202 channel==0
400 20:49:15.033902 RxClkDly_Margin_A0==88 ps 9
401 20:49:15.034415 TxDqDly_Margin_A0==98 ps 10
402 20:49:15.037255 RxClkDly_Margin_A1==88 ps 9
403 20:49:15.037729 TxDqDly_Margin_A1==98 ps 10
404 20:49:15.042718 TrainedVREFDQ_A0==74
405 20:49:15.043192 TrainedVREFDQ_A1==75
406 20:49:15.048360 VrefDac_Margin_A0==23
407 20:49:15.048846 DeviceVref_Margin_A0==40
408 20:49:15.049294 VrefDac_Margin_A1==23
409 20:49:15.053918 DeviceVref_Margin_A1==39
410 20:49:15.054389
411 20:49:15.054844
412 20:49:15.055297 channel==1
413 20:49:15.055739 RxClkDly_Margin_A0==78 ps 8
414 20:49:15.059527 TxDqDly_Margin_A0==98 ps 10
415 20:49:15.060040 RxClkDly_Margin_A1==78 ps 8
416 20:49:15.065092 TxDqDly_Margin_A1==88 ps 9
417 20:49:15.065596 TrainedVREFDQ_A0==78
418 20:49:15.066053 TrainedVREFDQ_A1==78
419 20:49:15.070709 VrefDac_Margin_A0==22
420 20:49:15.071193 DeviceVref_Margin_A0==36
421 20:49:15.076351 VrefDac_Margin_A1==22
422 20:49:15.076822 DeviceVref_Margin_A1==36
423 20:49:15.077266
424 20:49:15.081877 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:49:15.082359
426 20:49:15.109910 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
427 20:49:15.115483 2D training succeed
428 20:49:15.121127 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:49:15.121750 auto size-- 65535DDR cs0 size: 2048MB
430 20:49:15.126727 DDR cs1 size: 2048MB
431 20:49:15.127203 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:49:15.132313 cs0 DataBus test pass
433 20:49:15.132783 cs1 DataBus test pass
434 20:49:15.133234 cs0 AddrBus test pass
435 20:49:15.137889 cs1 AddrBus test pass
436 20:49:15.138359
437 20:49:15.138807 100bdlr_step_size ps== 471
438 20:49:15.139259 result report
439 20:49:15.143497 boot times 0Enable ddr reg access
440 20:49:15.151156 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:49:15.164936 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 20:49:15.823910 bl2z: ptr: 05129330, size: 00001e40
443 20:49:15.831618 0.0;M3 CHK:0;cm4_sp_mode 0
444 20:49:15.832153 MVN_1=0x00000000
445 20:49:15.832612 MVN_2=0x00000000
446 20:49:15.843050 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 20:49:15.843542 OPS=0x04
448 20:49:15.844024 ring efuse init
449 20:49:15.848809 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 20:49:15.849321 [0.017354 Inits done]
451 20:49:15.849777 secure task start!
452 20:49:15.856094 high task start!
453 20:49:15.856574 low task start!
454 20:49:15.857025 run into bl31
455 20:49:15.864805 NOTICE: BL31: v1.3(release):4fc40b1
456 20:49:15.872449 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 20:49:15.872936 NOTICE: BL31: G12A normal boot!
458 20:49:15.887966 NOTICE: BL31: BL33 decompress pass
459 20:49:15.893702 ERROR: Error initializing runtime service opteed_fast
460 20:49:17.108442 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 20:49:17.109118 bl2_stage_init 0x01
462 20:49:17.109351 bl2_stage_init 0x81
463 20:49:17.113979 hw id: 0x0000 - pwm id 0x01
464 20:49:17.114475 bl2_stage_init 0xc1
465 20:49:17.119633 bl2_stage_init 0x02
466 20:49:17.120160
467 20:49:17.120630 L0:00000000
468 20:49:17.121079 L1:00000703
469 20:49:17.121527 L2:00008067
470 20:49:17.121970 L3:15000000
471 20:49:17.125230 S1:00000000
472 20:49:17.125710 B2:20282000
473 20:49:17.126162 B1:a0f83180
474 20:49:17.126609
475 20:49:17.127053 TE: 69688
476 20:49:17.127500
477 20:49:17.130806 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 20:49:17.131287
479 20:49:17.136405 Board ID = 1
480 20:49:17.136881 Set cpu clk to 24M
481 20:49:17.137331 Set clk81 to 24M
482 20:49:17.141995 Use GP1_pll as DSU clk.
483 20:49:17.142471 DSU clk: 1200 Mhz
484 20:49:17.142920 CPU clk: 1200 MHz
485 20:49:17.147648 Set clk81 to 166.6M
486 20:49:17.153235 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 20:49:17.153733 board id: 1
488 20:49:17.160351 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 20:49:17.171304 fw parse done
490 20:49:17.177269 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 20:49:17.219435 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 20:49:17.231513 PIEI prepare done
493 20:49:17.232086 fastboot data load
494 20:49:17.232554 fastboot data verify
495 20:49:17.237077 verify result: 266
496 20:49:17.242658 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 20:49:17.243140 LPDDR4 probe
498 20:49:17.243591 ddr clk to 1584MHz
499 20:49:18.612419 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 20:49:18.612853 bl2_stage_init 0x01
501 20:49:18.613073 bl2_stage_init 0x81
502 20:49:18.617968 hw id: 0x0000 - pwm id 0x01
503 20:49:18.618279 bl2_stage_init 0xc1
504 20:49:18.618506 bl2_stage_init 0x02
505 20:49:18.618720
506 20:49:18.623561 L0:00000000
507 20:49:18.623845 L1:00000703
508 20:49:18.624095 L2:00008067
509 20:49:18.624308 L3:15000000
510 20:49:18.624514 S1:00000000
511 20:49:18.629743 B2:20282000
512 20:49:18.630025 B1:a0f83180
513 20:49:18.630237
514 20:49:18.630446 TE: 73138
515 20:49:18.630651
516 20:49:18.635360 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 20:49:18.635638
518 20:49:18.635847 Board ID = 1
519 20:49:18.640964 Set cpu clk to 24M
520 20:49:18.641217 Set clk81 to 24M
521 20:49:18.641419 Use GP1_pll as DSU clk.
522 20:49:18.646561 DSU clk: 1200 Mhz
523 20:49:18.646815 CPU clk: 1200 MHz
524 20:49:18.647019 Set clk81 to 166.6M
525 20:49:18.652161 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 20:49:18.657755 board id: 1
527 20:49:18.663523 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 20:49:18.674516 fw parse done
529 20:49:18.679493 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 20:49:18.722655 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 20:49:18.734764 PIEI prepare done
532 20:49:18.735087 fastboot data load
533 20:49:18.735310 fastboot data verify
534 20:49:18.740304 verify result: 266
535 20:49:18.745896 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 20:49:18.746233 LPDDR4 probe
537 20:49:18.746447 ddr clk to 1584MHz
538 20:49:18.753801 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 20:49:18.791657
540 20:49:18.792328 dmc_version 0001
541 20:49:18.798714 Check phy result
542 20:49:18.804664 INFO : End of CA training
543 20:49:18.805185 INFO : End of initialization
544 20:49:18.810276 INFO : Training has run successfully!
545 20:49:18.810776 Check phy result
546 20:49:18.815844 INFO : End of initialization
547 20:49:18.816387 INFO : End of read enable training
548 20:49:18.821446 INFO : End of fine write leveling
549 20:49:18.827001 INFO : End of Write leveling coarse delay
550 20:49:18.827500 INFO : Training has run successfully!
551 20:49:18.827970 Check phy result
552 20:49:18.832661 INFO : End of initialization
553 20:49:18.833168 INFO : End of read dq deskew training
554 20:49:18.838233 INFO : End of MPR read delay center optimization
555 20:49:18.843851 INFO : End of write delay center optimization
556 20:49:18.849405 INFO : End of read delay center optimization
557 20:49:18.849919 INFO : End of max read latency training
558 20:49:18.855051 INFO : Training has run successfully!
559 20:49:18.855587 1D training succeed
560 20:49:18.864312 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 20:49:18.912102 Check phy result
562 20:49:18.912668 INFO : End of initialization
563 20:49:18.939897 INFO : End of 2D read delay Voltage center optimization
564 20:49:18.964033 INFO : End of 2D read delay Voltage center optimization
565 20:49:19.019767 INFO : End of 2D write delay Voltage center optimization
566 20:49:19.074688 INFO : End of 2D write delay Voltage center optimization
567 20:49:19.080283 INFO : Training has run successfully!
568 20:49:19.080793
569 20:49:19.081261 channel==0
570 20:49:19.085768 RxClkDly_Margin_A0==78 ps 8
571 20:49:19.086282 TxDqDly_Margin_A0==98 ps 10
572 20:49:19.089093 RxClkDly_Margin_A1==88 ps 9
573 20:49:19.089580 TxDqDly_Margin_A1==98 ps 10
574 20:49:19.094687 TrainedVREFDQ_A0==74
575 20:49:19.095237 TrainedVREFDQ_A1==75
576 20:49:19.100303 VrefDac_Margin_A0==23
577 20:49:19.100835 DeviceVref_Margin_A0==40
578 20:49:19.101301 VrefDac_Margin_A1==23
579 20:49:19.105814 DeviceVref_Margin_A1==39
580 20:49:19.106312
581 20:49:19.106768
582 20:49:19.107214 channel==1
583 20:49:19.107654 RxClkDly_Margin_A0==78 ps 8
584 20:49:19.111409 TxDqDly_Margin_A0==98 ps 10
585 20:49:19.111901 RxClkDly_Margin_A1==78 ps 8
586 20:49:19.117027 TxDqDly_Margin_A1==88 ps 9
587 20:49:19.117519 TrainedVREFDQ_A0==78
588 20:49:19.117977 TrainedVREFDQ_A1==75
589 20:49:19.122574 VrefDac_Margin_A0==23
590 20:49:19.123075 DeviceVref_Margin_A0==36
591 20:49:19.128270 VrefDac_Margin_A1==22
592 20:49:19.128764 DeviceVref_Margin_A1==38
593 20:49:19.129217
594 20:49:19.133827 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 20:49:19.134331
596 20:49:19.161800 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000016 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
597 20:49:19.167451 2D training succeed
598 20:49:19.173060 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 20:49:19.173570 auto size-- 65535DDR cs0 size: 2048MB
600 20:49:19.178643 DDR cs1 size: 2048MB
601 20:49:19.179143 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 20:49:19.184296 cs0 DataBus test pass
603 20:49:19.184794 cs1 DataBus test pass
604 20:49:19.185256 cs0 AddrBus test pass
605 20:49:19.189788 cs1 AddrBus test pass
606 20:49:19.190279
607 20:49:19.190738 100bdlr_step_size ps== 471
608 20:49:19.191204 result report
609 20:49:19.195386 boot times 0Enable ddr reg access
610 20:49:19.203036 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 20:49:19.216021 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 20:49:19.875677 bl2z: ptr: 05129330, size: 00001e40
613 20:49:19.883928 0.0;M3 CHK:0;cm4_sp_mode 0
614 20:49:19.884510 MVN_1=0x00000000
615 20:49:19.884980 MVN_2=0x00000000
616 20:49:19.895528 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 20:49:19.896064 OPS=0x04
618 20:49:19.896532 ring efuse init
619 20:49:19.898275 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 20:49:19.904283 [0.017355 Inits done]
621 20:49:19.904796 secure task start!
622 20:49:19.905256 high task start!
623 20:49:19.905706 low task start!
624 20:49:19.908650 run into bl31
625 20:49:19.917258 NOTICE: BL31: v1.3(release):4fc40b1
626 20:49:19.925135 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 20:49:19.925642 NOTICE: BL31: G12A normal boot!
628 20:49:19.940941 NOTICE: BL31: BL33 decompress pass
629 20:49:19.949116 ERROR: Error initializing runtime service opteed_fast
630 20:49:21.157863 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 20:49:21.158529 bl2_stage_init 0x01
632 20:49:21.159012 bl2_stage_init 0x81
633 20:49:21.163457 hw id: 0x0000 - pwm id 0x01
634 20:49:21.163976 bl2_stage_init 0xc1
635 20:49:21.168986 bl2_stage_init 0x02
636 20:49:21.169507
637 20:49:21.169986 L0:00000000
638 20:49:21.170445 L1:00000703
639 20:49:21.170900 L2:00008067
640 20:49:21.171350 L3:15000000
641 20:49:21.174729 S1:00000000
642 20:49:21.175249 B2:20282000
643 20:49:21.175714 B1:a0f83180
644 20:49:21.176206
645 20:49:21.176670 TE: 67517
646 20:49:21.177124
647 20:49:21.180209 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 20:49:21.180708
649 20:49:21.185839 Board ID = 1
650 20:49:21.186343 Set cpu clk to 24M
651 20:49:21.186804 Set clk81 to 24M
652 20:49:21.191560 Use GP1_pll as DSU clk.
653 20:49:21.192096 DSU clk: 1200 Mhz
654 20:49:21.192563 CPU clk: 1200 MHz
655 20:49:21.196915 Set clk81 to 166.6M
656 20:49:21.202564 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 20:49:21.203075 board id: 1
658 20:49:21.209736 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 20:49:21.220322 fw parse done
660 20:49:21.225378 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 20:49:21.268251 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 20:49:21.279934 PIEI prepare done
663 20:49:21.280516 fastboot data load
664 20:49:21.280993 fastboot data verify
665 20:49:21.285630 verify result: 266
666 20:49:21.291136 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 20:49:21.291643 LPDDR4 probe
668 20:49:21.292134 ddr clk to 1584MHz
669 20:49:21.298445 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 20:49:21.335870
671 20:49:21.336453 dmc_version 0001
672 20:49:21.342391 Check phy result
673 20:49:21.348938 INFO : End of CA training
674 20:49:21.349441 INFO : End of initialization
675 20:49:21.354683 INFO : Training has run successfully!
676 20:49:21.355197 Check phy result
677 20:49:21.360147 INFO : End of initialization
678 20:49:21.360649 INFO : End of read enable training
679 20:49:21.363386 INFO : End of fine write leveling
680 20:49:21.368967 INFO : End of Write leveling coarse delay
681 20:49:21.374696 INFO : Training has run successfully!
682 20:49:21.375200 Check phy result
683 20:49:21.375660 INFO : End of initialization
684 20:49:21.380163 INFO : End of read dq deskew training
685 20:49:21.385798 INFO : End of MPR read delay center optimization
686 20:49:21.386303 INFO : End of write delay center optimization
687 20:49:21.391339 INFO : End of read delay center optimization
688 20:49:21.397044 INFO : End of max read latency training
689 20:49:21.397548 INFO : Training has run successfully!
690 20:49:21.402663 1D training succeed
691 20:49:21.408249 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 20:49:21.455901 Check phy result
693 20:49:21.456514 INFO : End of initialization
694 20:49:21.477610 INFO : End of 2D read delay Voltage center optimization
695 20:49:21.497028 INFO : End of 2D read delay Voltage center optimization
696 20:49:21.549339 INFO : End of 2D write delay Voltage center optimization
697 20:49:21.598722 INFO : End of 2D write delay Voltage center optimization
698 20:49:21.604772 INFO : Training has run successfully!
699 20:49:21.605948
700 20:49:21.606180 channel==0
701 20:49:21.610110 RxClkDly_Margin_A0==78 ps 8
702 20:49:21.610582 TxDqDly_Margin_A0==98 ps 10
703 20:49:21.615613 RxClkDly_Margin_A1==88 ps 9
704 20:49:21.616243 TxDqDly_Margin_A1==98 ps 10
705 20:49:21.616527 TrainedVREFDQ_A0==74
706 20:49:21.621182 TrainedVREFDQ_A1==75
707 20:49:21.621512 VrefDac_Margin_A0==24
708 20:49:21.621743 DeviceVref_Margin_A0==40
709 20:49:21.626791 VrefDac_Margin_A1==23
710 20:49:21.627121 DeviceVref_Margin_A1==39
711 20:49:21.627347
712 20:49:21.627749
713 20:49:21.632403 channel==1
714 20:49:21.632871 RxClkDly_Margin_A0==78 ps 8
715 20:49:21.633115 TxDqDly_Margin_A0==98 ps 10
716 20:49:21.637883 RxClkDly_Margin_A1==78 ps 8
717 20:49:21.638472 TxDqDly_Margin_A1==78 ps 8
718 20:49:21.643638 TrainedVREFDQ_A0==78
719 20:49:21.644257 TrainedVREFDQ_A1==77
720 20:49:21.644697 VrefDac_Margin_A0==22
721 20:49:21.649166 DeviceVref_Margin_A0==36
722 20:49:21.649492 VrefDac_Margin_A1==22
723 20:49:21.654788 DeviceVref_Margin_A1==37
724 20:49:21.655266
725 20:49:21.655668 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 20:49:21.656057
727 20:49:21.688424 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
728 20:49:21.688806 2D training succeed
729 20:49:21.693886 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 20:49:21.699511 auto size-- 65535DDR cs0 size: 2048MB
731 20:49:21.699855 DDR cs1 size: 2048MB
732 20:49:21.706385 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 20:49:21.706716 cs0 DataBus test pass
734 20:49:21.710609 cs1 DataBus test pass
735 20:49:21.710900 cs0 AddrBus test pass
736 20:49:21.711138 cs1 AddrBus test pass
737 20:49:21.711350
738 20:49:21.716221 100bdlr_step_size ps== 464
739 20:49:21.716499 result report
740 20:49:21.721834 boot times 0Enable ddr reg access
741 20:49:21.727160 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 20:49:21.740751 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 20:49:22.396201 bl2z: ptr: 05129330, size: 00001e40
744 20:49:22.404377 0.0;M3 CHK:0;cm4_sp_mode 0
745 20:49:22.404723 MVN_1=0x00000000
746 20:49:22.404950 MVN_2=0x00000000
747 20:49:22.415832 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 20:49:22.416336 OPS=0x04
749 20:49:22.416701 ring efuse init
750 20:49:22.421480 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 20:49:22.421942 [0.017310 Inits done]
752 20:49:22.422212 secure task start!
753 20:49:22.428444 high task start!
754 20:49:22.428781 low task start!
755 20:49:22.429006 run into bl31
756 20:49:22.437729 NOTICE: BL31: v1.3(release):4fc40b1
757 20:49:22.444627 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 20:49:22.445092 NOTICE: BL31: G12A normal boot!
759 20:49:22.461245 NOTICE: BL31: BL33 decompress pass
760 20:49:22.465916 ERROR: Error initializing runtime service opteed_fast
761 20:49:23.262737
762 20:49:23.263179
763 20:49:23.268323 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 20:49:23.268993
765 20:49:23.271765 Model: Libre Computer AML-S905D3-CC Solitude
766 20:49:23.417917 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 20:49:23.432954 DRAM: 2 GiB (effective 3.8 GiB)
768 20:49:23.534769 Core: 406 devices, 33 uclasses, devicetree: separate
769 20:49:23.540823 WDT: Not starting watchdog@f0d0
770 20:49:23.565739 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 20:49:23.577941 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 20:49:23.582033 ** Bad device specification mmc 0 **
773 20:49:23.593500 Card did not respond to voltage select! : -110
774 20:49:23.600114 ** Bad device specification mmc 0 **
775 20:49:23.600523 Couldn't find partition mmc 0
776 20:49:23.608854 Card did not respond to voltage select! : -110
777 20:49:23.614499 ** Bad device specification mmc 0 **
778 20:49:23.615578 Couldn't find partition mmc 0
779 20:49:23.619011 Error: could not access storage.
780 20:49:23.916778 Net: eth0: ethernet@ff3f0000
781 20:49:23.917384 starting USB...
782 20:49:24.161560 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 20:49:24.162175 Starting the controller
784 20:49:24.168373 USB XHCI 1.10
785 20:49:25.722701 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 20:49:25.731141 scanning usb for storage devices... 0 Storage Device(s) found
788 20:49:25.783446 Hit any key to stop autoboot: 1
789 20:49:25.785121 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 20:49:25.786196 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 20:49:25.786476 Setting prompt string to ['=>']
792 20:49:25.786745 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 20:49:25.797123 0
794 20:49:25.798306 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 20:49:25.899815 => setenv autoload no
797 20:49:25.900957 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
798 20:49:25.906542 setenv autoload no
800 20:49:26.008559 => setenv initrd_high 0xffffffff
801 20:49:26.009590 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
802 20:49:26.013756 setenv initrd_high 0xffffffff
804 20:49:26.115505 => setenv fdt_high 0xffffffff
805 20:49:26.116614 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
806 20:49:26.120414 setenv fdt_high 0xffffffff
808 20:49:26.222270 => dhcp
809 20:49:26.223116 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
810 20:49:26.228051 dhcp
811 20:49:26.733551 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 20:49:26.734222 Speed: 1000, full duplex
813 20:49:26.734732 BOOTP broadcast 1
814 20:49:26.981393 BOOTP broadcast 2
815 20:49:27.482468 BOOTP broadcast 3
816 20:49:28.483370 BOOTP broadcast 4
817 20:49:30.484425 BOOTP broadcast 5
818 20:49:30.497762 DHCP client bound to address 192.168.6.12 (3764 ms)
820 20:49:30.598861 => setenv serverip 192.168.6.2
821 20:49:30.599621 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
822 20:49:30.604032 setenv serverip 192.168.6.2
824 20:49:30.705077 => tftpboot 0x01080000 683041/tftp-deploy-0zloqcb5/kernel/uImage
825 20:49:30.705808 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
826 20:49:30.712923 tftpboot 0x01080000 683041/tftp-deploy-0zloqcb5/kernel/uImage
827 20:49:30.713265 Speed: 1000, full duplex
828 20:49:30.713484 Using ethernet@ff3f0000 device
829 20:49:30.717925 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 20:49:30.723355 Filename '683041/tftp-deploy-0zloqcb5/kernel/uImage'.
831 20:49:30.726719 Load address: 0x1080000
832 20:49:30.731566 Loading: * UDP wrong checksum 00000005 00006d4f
833 20:49:33.522280 ################################################## 41.8 MiB
834 20:49:33.522949 14.9 MiB/s
835 20:49:33.523404 done
836 20:49:33.526483 Bytes transferred = 43798600 (29c5048 hex)
838 20:49:33.628094 => tftpboot 0x08000000 683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot
839 20:49:33.628891 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:34)
840 20:49:33.635656 tftpboot 0x08000000 683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot
841 20:49:33.636215 Speed: 1000, full duplex
842 20:49:33.636662 Using ethernet@ff3f0000 device
843 20:49:33.641190 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
844 20:49:33.650850 Filename '683041/tftp-deploy-0zloqcb5/ramdisk/ramdisk.cpio.gz.uboot'.
845 20:49:33.651185 Load address: 0x8000000
846 20:49:35.218934 Loading: *################################################# UDP wrong checksum 00000004 0000c6ad
847 20:49:38.333691 UDP wrong checksum 000000ff 0000a341
848 20:49:38.359093 UDP wrong checksum 000000ff 00003834
849 20:49:40.220686 T UDP wrong checksum 00000004 0000c6ad
850 20:49:47.898577 T UDP wrong checksum 000000ff 000056f3
851 20:49:47.907270 UDP wrong checksum 000000ff 0000dae5
852 20:49:50.221318 T UDP wrong checksum 00000004 0000c6ad
853 20:49:57.757270 T UDP wrong checksum 000000ff 0000d4f7
854 20:49:57.807510 UDP wrong checksum 000000ff 00005dea
855 20:50:02.561259 T UDP wrong checksum 000000ff 0000a155
856 20:50:02.571152 UDP wrong checksum 000000ff 00002348
857 20:50:07.958466 T UDP wrong checksum 000000ff 00008551
858 20:50:08.013522 UDP wrong checksum 000000ff 00000c44
859 20:50:10.224280 UDP wrong checksum 00000004 0000c6ad
860 20:50:12.894066 T UDP wrong checksum 000000ff 00000cc9
861 20:50:12.910706 UDP wrong checksum 000000ff 00009ebb
862 20:50:30.231319 T T T
863 20:50:30.231754 Retry count exceeded; starting again
865 20:50:30.232641 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
868 20:50:30.233591 end: 2.4 uboot-commands (duration 00:01:22) [common]
870 20:50:30.234331 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
872 20:50:30.234889 end: 2 uboot-action (duration 00:01:22) [common]
874 20:50:30.235762 Cleaning after the job
875 20:50:30.236131 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/ramdisk
876 20:50:30.237124 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/kernel
877 20:50:30.251295 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/dtb
878 20:50:30.252206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/nfsrootfs
879 20:50:30.281886 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683041/tftp-deploy-0zloqcb5/modules
880 20:50:30.289091 start: 4.1 power-off (timeout 00:00:30) [common]
881 20:50:30.289751 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
882 20:50:30.338257 >> OK - accepted request
883 20:50:30.340386 Returned 0 in 0 seconds
884 20:50:30.441184 end: 4.1 power-off (duration 00:00:00) [common]
886 20:50:30.442202 start: 4.2 read-feedback (timeout 00:10:00) [common]
887 20:50:30.442880 Listened to connection for namespace 'common' for up to 1s
888 20:50:31.443787 Finalising connection for namespace 'common'
889 20:50:31.444365 Disconnecting from shell: Finalise
890 20:50:31.444641 =>
891 20:50:31.545391 end: 4.2 read-feedback (duration 00:00:01) [common]
892 20:50:31.546095 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/683041
893 20:50:33.425287 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/683041
894 20:50:33.425954 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.