Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:43:06.769629 lava-dispatcher, installed at version: 2024.01
2 20:43:06.770417 start: 0 validate
3 20:43:06.770884 Start time: 2024-08-31 20:43:06.770855+00:00 (UTC)
4 20:43:06.771443 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:43:06.772004 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:43:06.810219 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:43:06.810781 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 20:43:06.841403 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:43:06.842034 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 20:43:06.869344 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:43:06.869810 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:43:06.899770 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:43:06.900262 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 20:43:06.932737 validate duration: 0.16
16 20:43:06.933578 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:43:06.933904 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:43:06.934196 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:43:06.934822 Not decompressing ramdisk as can be used compressed.
20 20:43:06.935309 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 20:43:06.935583 saving as /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/ramdisk/initrd.cpio.gz
22 20:43:06.935853 total size: 5628182 (5 MB)
23 20:43:06.968884 progress 0 % (0 MB)
24 20:43:06.972957 progress 5 % (0 MB)
25 20:43:06.977218 progress 10 % (0 MB)
26 20:43:06.980853 progress 15 % (0 MB)
27 20:43:06.985020 progress 20 % (1 MB)
28 20:43:06.988759 progress 25 % (1 MB)
29 20:43:06.992859 progress 30 % (1 MB)
30 20:43:06.996986 progress 35 % (1 MB)
31 20:43:07.000695 progress 40 % (2 MB)
32 20:43:07.004795 progress 45 % (2 MB)
33 20:43:07.008513 progress 50 % (2 MB)
34 20:43:07.012694 progress 55 % (2 MB)
35 20:43:07.016776 progress 60 % (3 MB)
36 20:43:07.020438 progress 65 % (3 MB)
37 20:43:07.024558 progress 70 % (3 MB)
38 20:43:07.028326 progress 75 % (4 MB)
39 20:43:07.032418 progress 80 % (4 MB)
40 20:43:07.036165 progress 85 % (4 MB)
41 20:43:07.040254 progress 90 % (4 MB)
42 20:43:07.044189 progress 95 % (5 MB)
43 20:43:07.047523 progress 100 % (5 MB)
44 20:43:07.048208 5 MB downloaded in 0.11 s (47.78 MB/s)
45 20:43:07.048776 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:43:07.049675 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:43:07.049975 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:43:07.050250 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:43:07.050716 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/clang-16/kernel/Image
51 20:43:07.050966 saving as /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/kernel/Image
52 20:43:07.051176 total size: 37409280 (35 MB)
53 20:43:07.051387 No compression specified
54 20:43:07.083161 progress 0 % (0 MB)
55 20:43:07.107082 progress 5 % (1 MB)
56 20:43:07.130988 progress 10 % (3 MB)
57 20:43:07.154773 progress 15 % (5 MB)
58 20:43:07.178644 progress 20 % (7 MB)
59 20:43:07.202919 progress 25 % (8 MB)
60 20:43:07.226751 progress 30 % (10 MB)
61 20:43:07.250550 progress 35 % (12 MB)
62 20:43:07.274414 progress 40 % (14 MB)
63 20:43:07.298576 progress 45 % (16 MB)
64 20:43:07.322300 progress 50 % (17 MB)
65 20:43:07.345979 progress 55 % (19 MB)
66 20:43:07.369526 progress 60 % (21 MB)
67 20:43:07.393870 progress 65 % (23 MB)
68 20:43:07.417260 progress 70 % (25 MB)
69 20:43:07.440653 progress 75 % (26 MB)
70 20:43:07.464235 progress 80 % (28 MB)
71 20:43:07.487964 progress 85 % (30 MB)
72 20:43:07.512212 progress 90 % (32 MB)
73 20:43:07.536313 progress 95 % (33 MB)
74 20:43:07.559172 progress 100 % (35 MB)
75 20:43:07.559854 35 MB downloaded in 0.51 s (70.14 MB/s)
76 20:43:07.560397 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:43:07.561243 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:43:07.561527 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:43:07.561798 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:43:07.562278 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 20:43:07.562532 saving as /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 20:43:07.562742 total size: 53173 (0 MB)
84 20:43:07.562953 No compression specified
85 20:43:07.601949 progress 61 % (0 MB)
86 20:43:07.602848 progress 100 % (0 MB)
87 20:43:07.603430 0 MB downloaded in 0.04 s (1.25 MB/s)
88 20:43:07.603899 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:43:07.604762 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:43:07.605034 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:43:07.605303 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:43:07.605763 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 20:43:07.606009 saving as /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/nfsrootfs/full.rootfs.tar
95 20:43:07.606214 total size: 107552908 (102 MB)
96 20:43:07.606426 Using unxz to decompress xz
97 20:43:07.641581 progress 0 % (0 MB)
98 20:43:08.287495 progress 5 % (5 MB)
99 20:43:09.013168 progress 10 % (10 MB)
100 20:43:09.738235 progress 15 % (15 MB)
101 20:43:10.573558 progress 20 % (20 MB)
102 20:43:11.154793 progress 25 % (25 MB)
103 20:43:11.786196 progress 30 % (30 MB)
104 20:43:12.533883 progress 35 % (35 MB)
105 20:43:12.888467 progress 40 % (41 MB)
106 20:43:13.314796 progress 45 % (46 MB)
107 20:43:14.016405 progress 50 % (51 MB)
108 20:43:14.711189 progress 55 % (56 MB)
109 20:43:15.466005 progress 60 % (61 MB)
110 20:43:16.218505 progress 65 % (66 MB)
111 20:43:16.948035 progress 70 % (71 MB)
112 20:43:17.716277 progress 75 % (76 MB)
113 20:43:18.399530 progress 80 % (82 MB)
114 20:43:19.111574 progress 85 % (87 MB)
115 20:43:19.852387 progress 90 % (92 MB)
116 20:43:20.568667 progress 95 % (97 MB)
117 20:43:21.315630 progress 100 % (102 MB)
118 20:43:21.328489 102 MB downloaded in 13.72 s (7.47 MB/s)
119 20:43:21.329073 end: 1.4.1 http-download (duration 00:00:14) [common]
121 20:43:21.329902 end: 1.4 download-retry (duration 00:00:14) [common]
122 20:43:21.330169 start: 1.5 download-retry (timeout 00:09:46) [common]
123 20:43:21.330431 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 20:43:21.330891 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/clang-16/modules.tar.xz
125 20:43:21.331131 saving as /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/modules/modules.tar
126 20:43:21.331335 total size: 11643384 (11 MB)
127 20:43:21.331546 Using unxz to decompress xz
128 20:43:21.373737 progress 0 % (0 MB)
129 20:43:21.458244 progress 5 % (0 MB)
130 20:43:21.544384 progress 10 % (1 MB)
131 20:43:21.643190 progress 15 % (1 MB)
132 20:43:21.798107 progress 20 % (2 MB)
133 20:43:21.875924 progress 25 % (2 MB)
134 20:43:21.961764 progress 30 % (3 MB)
135 20:43:22.042708 progress 35 % (3 MB)
136 20:43:22.121766 progress 40 % (4 MB)
137 20:43:22.194530 progress 45 % (5 MB)
138 20:43:22.274150 progress 50 % (5 MB)
139 20:43:22.352228 progress 55 % (6 MB)
140 20:43:22.440909 progress 60 % (6 MB)
141 20:43:22.525772 progress 65 % (7 MB)
142 20:43:22.609571 progress 70 % (7 MB)
143 20:43:22.704300 progress 75 % (8 MB)
144 20:43:22.801307 progress 80 % (8 MB)
145 20:43:22.883407 progress 85 % (9 MB)
146 20:43:22.955451 progress 90 % (10 MB)
147 20:43:23.034253 progress 95 % (10 MB)
148 20:43:23.113528 progress 100 % (11 MB)
149 20:43:23.125527 11 MB downloaded in 1.79 s (6.19 MB/s)
150 20:43:23.126417 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:43:23.128052 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:43:23.128589 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 20:43:23.129108 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 20:43:33.134426 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/682700/extract-nfsrootfs-fh087s8p
156 20:43:33.135066 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 20:43:33.135396 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 20:43:33.136087 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0
159 20:43:33.136567 makedir: /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin
160 20:43:33.136907 makedir: /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/tests
161 20:43:33.137233 makedir: /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/results
162 20:43:33.137662 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-add-keys
163 20:43:33.138294 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-add-sources
164 20:43:33.139032 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-background-process-start
165 20:43:33.140137 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-background-process-stop
166 20:43:33.140886 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-common-functions
167 20:43:33.141445 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-echo-ipv4
168 20:43:33.141955 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-install-packages
169 20:43:33.142481 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-installed-packages
170 20:43:33.142963 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-os-build
171 20:43:33.143460 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-probe-channel
172 20:43:33.143955 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-probe-ip
173 20:43:33.144526 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-target-ip
174 20:43:33.145120 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-target-mac
175 20:43:33.145707 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-target-storage
176 20:43:33.146207 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-case
177 20:43:33.146692 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-event
178 20:43:33.147166 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-feedback
179 20:43:33.147639 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-raise
180 20:43:33.148135 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-reference
181 20:43:33.148621 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-runner
182 20:43:33.149101 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-set
183 20:43:33.149569 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-test-shell
184 20:43:33.150050 Updating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-install-packages (oe)
185 20:43:33.150572 Updating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/bin/lava-installed-packages (oe)
186 20:43:33.151009 Creating /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/environment
187 20:43:33.151377 LAVA metadata
188 20:43:33.151636 - LAVA_JOB_ID=682700
189 20:43:33.151866 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:43:33.152315 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 20:43:33.153317 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:43:33.153631 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 20:43:33.153841 skipped lava-vland-overlay
194 20:43:33.154085 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:43:33.154342 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 20:43:33.154562 skipped lava-multinode-overlay
197 20:43:33.154803 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:43:33.155055 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 20:43:33.155300 Loading test definitions
200 20:43:33.155577 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 20:43:33.155798 Using /lava-682700 at stage 0
202 20:43:33.157092 uuid=682700_1.6.2.4.1 testdef=None
203 20:43:33.157403 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:43:33.157667 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 20:43:33.159429 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:43:33.160242 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 20:43:33.162487 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:43:33.163308 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 20:43:33.165501 runner path: /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/0/tests/0_dmesg test_uuid 682700_1.6.2.4.1
212 20:43:33.166055 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:43:33.166806 Creating lava-test-runner.conf files
215 20:43:33.167006 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/682700/lava-overlay-g6nc7sy0/lava-682700/0 for stage 0
216 20:43:33.167335 - 0_dmesg
217 20:43:33.167677 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:43:33.167954 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 20:43:33.191661 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:43:33.192092 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 20:43:33.192358 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:43:33.192623 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:43:33.192883 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 20:43:33.887923 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:43:33.888417 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 20:43:33.888668 extracting modules file /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/682700/extract-nfsrootfs-fh087s8p
227 20:43:35.357575 extracting modules file /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/682700/extract-overlay-ramdisk-3kkq9r56/ramdisk
228 20:43:36.958649 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:43:36.959231 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 20:43:36.959572 [common] Applying overlay to NFS
231 20:43:36.959832 [common] Applying overlay /var/lib/lava/dispatcher/tmp/682700/compress-overlay-u67pbt7r/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/682700/extract-nfsrootfs-fh087s8p
232 20:43:36.996877 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:43:36.997410 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 20:43:36.997747 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 20:43:36.998039 Converting downloaded kernel to a uImage
236 20:43:36.998418 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/kernel/Image /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/kernel/uImage
237 20:43:38.478386 output: Image Name:
238 20:43:38.478893 output: Created: Sat Aug 31 20:43:36 2024
239 20:43:38.479152 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:43:38.479402 output: Data Size: 37409280 Bytes = 36532.50 KiB = 35.68 MiB
241 20:43:38.479646 output: Load Address: 01080000
242 20:43:38.479889 output: Entry Point: 01080000
243 20:43:38.480181 output:
244 20:43:38.480593 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 20:43:38.480922 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 20:43:38.481254 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 20:43:38.481561 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:43:38.481882 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 20:43:38.482191 Building ramdisk /var/lib/lava/dispatcher/tmp/682700/extract-overlay-ramdisk-3kkq9r56/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/682700/extract-overlay-ramdisk-3kkq9r56/ramdisk
250 20:43:40.761992 >> 171801 blocks
251 20:43:48.391594 Adding RAMdisk u-boot header.
252 20:43:48.392352 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/682700/extract-overlay-ramdisk-3kkq9r56/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/682700/extract-overlay-ramdisk-3kkq9r56/ramdisk.cpio.gz.uboot
253 20:43:48.646754 output: Image Name:
254 20:43:48.647184 output: Created: Sat Aug 31 20:43:48 2024
255 20:43:48.647399 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:43:48.647605 output: Data Size: 23957413 Bytes = 23395.91 KiB = 22.85 MiB
257 20:43:48.647808 output: Load Address: 00000000
258 20:43:48.648115 output: Entry Point: 00000000
259 20:43:48.648571 output:
260 20:43:48.650757 rename /var/lib/lava/dispatcher/tmp/682700/extract-overlay-ramdisk-3kkq9r56/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot
261 20:43:48.651562 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 20:43:48.652204 end: 1.6 prepare-tftp-overlay (duration 00:00:26) [common]
263 20:43:48.652801 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
264 20:43:48.653305 No LXC device requested
265 20:43:48.653854 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:43:48.654414 start: 1.8 deploy-device-env (timeout 00:09:18) [common]
267 20:43:48.654961 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:43:48.655412 Checking files for TFTP limit of 4294967296 bytes.
269 20:43:48.658352 end: 1 tftp-deploy (duration 00:00:42) [common]
270 20:43:48.658975 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:43:48.659551 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:43:48.660135 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:43:48.660701 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:43:48.661278 Using kernel file from prepare-kernel: 682700/tftp-deploy-_v9lxwsr/kernel/uImage
275 20:43:48.661965 substitutions:
276 20:43:48.662414 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:43:48.662860 - {DTB_ADDR}: 0x01070000
278 20:43:48.663297 - {DTB}: 682700/tftp-deploy-_v9lxwsr/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 20:43:48.663734 - {INITRD}: 682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot
280 20:43:48.664212 - {KERNEL_ADDR}: 0x01080000
281 20:43:48.664650 - {KERNEL}: 682700/tftp-deploy-_v9lxwsr/kernel/uImage
282 20:43:48.665084 - {LAVA_MAC}: None
283 20:43:48.665555 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/682700/extract-nfsrootfs-fh087s8p
284 20:43:48.665996 - {NFS_SERVER_IP}: 192.168.6.2
285 20:43:48.666427 - {PRESEED_CONFIG}: None
286 20:43:48.666855 - {PRESEED_LOCAL}: None
287 20:43:48.667283 - {RAMDISK_ADDR}: 0x08000000
288 20:43:48.667708 - {RAMDISK}: 682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot
289 20:43:48.668160 - {ROOT_PART}: None
290 20:43:48.668594 - {ROOT}: None
291 20:43:48.669020 - {SERVER_IP}: 192.168.6.2
292 20:43:48.669445 - {TEE_ADDR}: 0x83000000
293 20:43:48.669870 - {TEE}: None
294 20:43:48.670296 Parsed boot commands:
295 20:43:48.670711 - setenv autoload no
296 20:43:48.671139 - setenv initrd_high 0xffffffff
297 20:43:48.671567 - setenv fdt_high 0xffffffff
298 20:43:48.672010 - dhcp
299 20:43:48.672439 - setenv serverip 192.168.6.2
300 20:43:48.672864 - tftpboot 0x01080000 682700/tftp-deploy-_v9lxwsr/kernel/uImage
301 20:43:48.673288 - tftpboot 0x08000000 682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot
302 20:43:48.673717 - tftpboot 0x01070000 682700/tftp-deploy-_v9lxwsr/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 20:43:48.674144 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/682700/extract-nfsrootfs-fh087s8p,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:43:48.674587 - bootm 0x01080000 0x08000000 0x01070000
305 20:43:48.675128 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:43:48.676789 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:43:48.677247 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 20:43:48.694509 Setting prompt string to ['lava-test: # ']
310 20:43:48.696110 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:43:48.696763 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:43:48.697364 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:43:48.697933 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:43:48.699157 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 20:43:48.736364 >> OK - accepted request
316 20:43:48.738631 Returned 0 in 0 seconds
317 20:43:48.839804 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:43:48.841760 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:43:48.842397 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:43:48.842965 Setting prompt string to ['Hit any key to stop autoboot']
322 20:43:48.843507 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:43:48.845324 Trying 192.168.56.21...
324 20:43:48.845855 Connected to conserv1.
325 20:43:48.846310 Escape character is '^]'.
326 20:43:48.846762
327 20:43:48.847223 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 20:43:48.847685
329 20:43:55.805728 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 20:43:55.806343 bl2_stage_init 0x01
331 20:43:55.806804 bl2_stage_init 0x81
332 20:43:55.811022 hw id: 0x0000 - pwm id 0x01
333 20:43:55.811494 bl2_stage_init 0xc1
334 20:43:55.816667 bl2_stage_init 0x02
335 20:43:55.817128
336 20:43:55.817568 L0:00000000
337 20:43:55.817998 L1:00000703
338 20:43:55.818425 L2:00008067
339 20:43:55.818847 L3:15000000
340 20:43:55.822335 S1:00000000
341 20:43:55.822807 B2:20282000
342 20:43:55.823247 B1:a0f83180
343 20:43:55.823675
344 20:43:55.824147 TE: 68666
345 20:43:55.824580
346 20:43:55.827697 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 20:43:55.828196
348 20:43:55.833413 Board ID = 1
349 20:43:55.833877 Set cpu clk to 24M
350 20:43:55.834311 Set clk81 to 24M
351 20:43:55.839026 Use GP1_pll as DSU clk.
352 20:43:55.839488 DSU clk: 1200 Mhz
353 20:43:55.839919 CPU clk: 1200 MHz
354 20:43:55.844609 Set clk81 to 166.6M
355 20:43:55.850355 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 20:43:55.850861 board id: 1
357 20:43:55.856346 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:43:55.868202 fw parse done
359 20:43:55.874230 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:43:55.916530 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:43:55.928443 PIEI prepare done
362 20:43:55.928904 fastboot data load
363 20:43:55.929344 fastboot data verify
364 20:43:55.934037 verify result: 266
365 20:43:55.939696 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 20:43:55.940197 LPDDR4 probe
367 20:43:55.940630 ddr clk to 1584MHz
368 20:43:55.947584 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:43:55.985420
370 20:43:55.985896 dmc_version 0001
371 20:43:55.991508 Check phy result
372 20:43:55.998351 INFO : End of CA training
373 20:43:55.998808 INFO : End of initialization
374 20:43:56.003880 INFO : Training has run successfully!
375 20:43:56.004368 Check phy result
376 20:43:56.009733 INFO : End of initialization
377 20:43:56.010188 INFO : End of read enable training
378 20:43:56.015350 INFO : End of fine write leveling
379 20:43:56.020803 INFO : End of Write leveling coarse delay
380 20:43:56.021267 INFO : Training has run successfully!
381 20:43:56.021701 Check phy result
382 20:43:56.026337 INFO : End of initialization
383 20:43:56.026804 INFO : End of read dq deskew training
384 20:43:56.031968 INFO : End of MPR read delay center optimization
385 20:43:56.037604 INFO : End of write delay center optimization
386 20:43:56.043193 INFO : End of read delay center optimization
387 20:43:56.043646 INFO : End of max read latency training
388 20:43:56.048716 INFO : Training has run successfully!
389 20:43:56.049173 1D training succeed
390 20:43:56.057340 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:43:56.105862 Check phy result
392 20:43:56.106342 INFO : End of initialization
393 20:43:56.132784 INFO : End of 2D read delay Voltage center optimization
394 20:43:56.157744 INFO : End of 2D read delay Voltage center optimization
395 20:43:56.214240 INFO : End of 2D write delay Voltage center optimization
396 20:43:56.268505 INFO : End of 2D write delay Voltage center optimization
397 20:43:56.274022 INFO : Training has run successfully!
398 20:43:56.274478
399 20:43:56.274916 channel==0
400 20:43:56.279566 RxClkDly_Margin_A0==78 ps 8
401 20:43:56.280055 TxDqDly_Margin_A0==88 ps 9
402 20:43:56.285158 RxClkDly_Margin_A1==88 ps 9
403 20:43:56.285610 TxDqDly_Margin_A1==88 ps 9
404 20:43:56.286045 TrainedVREFDQ_A0==74
405 20:43:56.290830 TrainedVREFDQ_A1==74
406 20:43:56.291308 VrefDac_Margin_A0==24
407 20:43:56.291744 DeviceVref_Margin_A0==40
408 20:43:56.296374 VrefDac_Margin_A1==23
409 20:43:56.296837 DeviceVref_Margin_A1==40
410 20:43:56.297268
411 20:43:56.297701
412 20:43:56.298132 channel==1
413 20:43:56.301986 RxClkDly_Margin_A0==78 ps 8
414 20:43:56.302444 TxDqDly_Margin_A0==98 ps 10
415 20:43:56.307551 RxClkDly_Margin_A1==98 ps 10
416 20:43:56.308037 TxDqDly_Margin_A1==88 ps 9
417 20:43:56.313204 TrainedVREFDQ_A0==78
418 20:43:56.313662 TrainedVREFDQ_A1==75
419 20:43:56.314093 VrefDac_Margin_A0==22
420 20:43:56.318751 DeviceVref_Margin_A0==36
421 20:43:56.319203 VrefDac_Margin_A1==22
422 20:43:56.324501 DeviceVref_Margin_A1==39
423 20:43:56.324953
424 20:43:56.325385 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:43:56.325816
426 20:43:56.358070 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 20:43:56.358648 2D training succeed
428 20:43:56.363681 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:43:56.369290 auto size-- 65535DDR cs0 size: 2048MB
430 20:43:56.369752 DDR cs1 size: 2048MB
431 20:43:56.374922 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:43:56.375428 cs0 DataBus test pass
433 20:43:56.380689 cs1 DataBus test pass
434 20:43:56.381202 cs0 AddrBus test pass
435 20:43:56.381661 cs1 AddrBus test pass
436 20:43:56.382112
437 20:43:56.386200 100bdlr_step_size ps== 471
438 20:43:56.386695 result report
439 20:43:56.391693 boot times 0Enable ddr reg access
440 20:43:56.396100 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:43:56.410633 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 20:43:57.070944 bl2z: ptr: 05129330, size: 00001e40
443 20:43:57.078734 0.0;M3 CHK:0;cm4_sp_mode 0
444 20:43:57.079267 MVN_1=0x00000000
445 20:43:57.079705 MVN_2=0x00000000
446 20:43:57.090321 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 20:43:57.090834 OPS=0x04
448 20:43:57.091292 ring efuse init
449 20:43:57.093189 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 20:43:57.099000 [0.017354 Inits done]
451 20:43:57.099462 secure task start!
452 20:43:57.099892 high task start!
453 20:43:57.100352 low task start!
454 20:43:57.102708 run into bl31
455 20:43:57.111952 NOTICE: BL31: v1.3(release):4fc40b1
456 20:43:57.118882 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 20:43:57.119359 NOTICE: BL31: G12A normal boot!
458 20:43:57.135333 NOTICE: BL31: BL33 decompress pass
459 20:43:57.140216 ERROR: Error initializing runtime service opteed_fast
460 20:43:58.358095 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 20:43:58.358735 bl2_stage_init 0x01
462 20:43:58.359203 bl2_stage_init 0x81
463 20:43:58.363742 hw id: 0x0000 - pwm id 0x01
464 20:43:58.364316 bl2_stage_init 0xc1
465 20:43:58.369005 bl2_stage_init 0x02
466 20:43:58.369539
467 20:43:58.370028 L0:00000000
468 20:43:58.370494 L1:00000703
469 20:43:58.370951 L2:00008067
470 20:43:58.371393 L3:15000000
471 20:43:58.374646 S1:00000000
472 20:43:58.375173 B2:20282000
473 20:43:58.375638 B1:a0f83180
474 20:43:58.376118
475 20:43:58.376568 TE: 69714
476 20:43:58.377008
477 20:43:58.380202 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 20:43:58.385894
479 20:43:58.386459 Board ID = 1
480 20:43:58.386941 Set cpu clk to 24M
481 20:43:58.387453 Set clk81 to 24M
482 20:43:58.391401 Use GP1_pll as DSU clk.
483 20:43:58.391938 DSU clk: 1200 Mhz
484 20:43:58.392453 CPU clk: 1200 MHz
485 20:43:58.397049 Set clk81 to 166.6M
486 20:43:58.402629 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 20:43:58.403138 board id: 1
488 20:43:58.409739 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 20:43:58.420731 fw parse done
490 20:43:58.426738 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 20:43:58.468963 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 20:43:58.480296 PIEI prepare done
493 20:43:58.480809 fastboot data load
494 20:43:58.481260 fastboot data verify
495 20:43:58.485983 verify result: 266
496 20:43:58.491461 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 20:43:58.491966 LPDDR4 probe
498 20:43:58.492459 ddr clk to 1584MHz
499 20:43:59.856188 Load ddrfw from SPI, src: 0x00018000, des: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 20:43:59.856972 bl2_stage_init 0x01
501 20:43:59.857489 bl2_stage_init 0x81
502 20:43:59.861837 hw id: 0x0000 - pwm id 0x01
503 20:43:59.862365 bl2_stage_init 0xc1
504 20:43:59.867437 bl2_stage_init 0x02
505 20:43:59.868009
506 20:43:59.868507 L0:00000000
507 20:43:59.868949 L1:00000703
508 20:43:59.869376 L2:00008067
509 20:43:59.869804 L3:15000000
510 20:43:59.873126 S1:00000000
511 20:43:59.873628 B2:20282000
512 20:43:59.874062 B1:a0f83180
513 20:43:59.874489
514 20:43:59.874916 TE: 69517
515 20:43:59.875342
516 20:43:59.878535 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 20:43:59.879029
518 20:43:59.884128 Board ID = 1
519 20:43:59.884608 Set cpu clk to 24M
520 20:43:59.885036 Set clk81 to 24M
521 20:43:59.889726 Use GP1_pll as DSU clk.
522 20:43:59.890201 DSU clk: 1200 Mhz
523 20:43:59.890630 CPU clk: 1200 MHz
524 20:43:59.895332 Set clk81 to 166.6M
525 20:43:59.900890 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 20:43:59.901378 board id: 1
527 20:43:59.908204 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 20:43:59.919149 fw parse done
529 20:43:59.925058 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 20:43:59.968197 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 20:43:59.979319 PIEI prepare done
532 20:43:59.979811 fastboot data load
533 20:43:59.980283 fastboot data verify
534 20:43:59.984924 verify result: 266
535 20:43:59.990508 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 20:43:59.990999 LPDDR4 probe
537 20:43:59.991429 ddr clk to 1584MHz
538 20:43:59.998513 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 20:44:00.036356
540 20:44:00.036874 dmc_version 0001
541 20:44:00.043283 Check phy result
542 20:44:00.049283 INFO : End of CA training
543 20:44:00.049789 INFO : End of initialization
544 20:44:00.054893 INFO : Training has run successfully!
545 20:44:00.055385 Check phy result
546 20:44:00.060480 INFO : End of initialization
547 20:44:00.060962 INFO : End of read enable training
548 20:44:00.066109 INFO : End of fine write leveling
549 20:44:00.071688 INFO : End of Write leveling coarse delay
550 20:44:00.072230 INFO : Training has run successfully!
551 20:44:00.072685 Check phy result
552 20:44:00.077292 INFO : End of initialization
553 20:44:00.077794 INFO : End of read dq deskew training
554 20:44:00.082920 INFO : End of MPR read delay center optimization
555 20:44:00.088446 INFO : End of write delay center optimization
556 20:44:00.094070 INFO : End of read delay center optimization
557 20:44:00.094566 INFO : End of max read latency training
558 20:44:00.099661 INFO : Training has run successfully!
559 20:44:00.100182 1D training succeed
560 20:44:00.108887 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 20:44:00.157206 Check phy result
562 20:44:00.157723 INFO : End of initialization
563 20:44:00.184449 INFO : End of 2D read delay Voltage center optimization
564 20:44:00.208717 INFO : End of 2D read delay Voltage center optimization
565 20:44:00.265301 INFO : End of 2D write delay Voltage center optimization
566 20:44:00.319304 INFO : End of 2D write delay Voltage center optimization
567 20:44:00.324928 INFO : Training has run successfully!
568 20:44:00.325442
569 20:44:00.325882 channel==0
570 20:44:00.330438 RxClkDly_Margin_A0==78 ps 8
571 20:44:00.330946 TxDqDly_Margin_A0==98 ps 10
572 20:44:00.336050 RxClkDly_Margin_A1==88 ps 9
573 20:44:00.336544 TxDqDly_Margin_A1==98 ps 10
574 20:44:00.336983 TrainedVREFDQ_A0==75
575 20:44:00.341642 TrainedVREFDQ_A1==74
576 20:44:00.342246 VrefDac_Margin_A0==23
577 20:44:00.342687 DeviceVref_Margin_A0==39
578 20:44:00.347285 VrefDac_Margin_A1==23
579 20:44:00.347774 DeviceVref_Margin_A1==40
580 20:44:00.348245
581 20:44:00.348680
582 20:44:00.352916 channel==1
583 20:44:00.353405 RxClkDly_Margin_A0==88 ps 9
584 20:44:00.353837 TxDqDly_Margin_A0==98 ps 10
585 20:44:00.358450 RxClkDly_Margin_A1==88 ps 9
586 20:44:00.358936 TxDqDly_Margin_A1==98 ps 10
587 20:44:00.364040 TrainedVREFDQ_A0==78
588 20:44:00.364538 TrainedVREFDQ_A1==78
589 20:44:00.364972 VrefDac_Margin_A0==23
590 20:44:00.369650 DeviceVref_Margin_A0==36
591 20:44:00.370140 VrefDac_Margin_A1==22
592 20:44:00.375275 DeviceVref_Margin_A1==36
593 20:44:00.375773
594 20:44:00.376244 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 20:44:00.376679
596 20:44:00.408946 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
597 20:44:00.409513 2D training succeed
598 20:44:00.414434 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 20:44:00.420062 auto size-- 65535DDR cs0 size: 2048MB
600 20:44:00.420559 DDR cs1 size: 2048MB
601 20:44:00.425639 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 20:44:00.426155 cs0 DataBus test pass
603 20:44:00.431281 cs1 DataBus test pass
604 20:44:00.431785 cs0 AddrBus test pass
605 20:44:00.432260 cs1 AddrBus test pass
606 20:44:00.432689
607 20:44:00.436886 100bdlr_step_size ps== 471
608 20:44:00.437401 result report
609 20:44:00.442414 boot times 0Enable ddr reg access
610 20:44:00.447763 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 20:44:00.461607 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 20:44:01.120863 bl2z: ptr: 05129330, size: 00001e40
613 20:44:01.129963 0.0;M3 CHK:0;cm4_sp_mode 0
614 20:44:01.130518 MVN_1=0x00000000
615 20:44:01.130985 MVN_2=0x00000000
616 20:44:01.141479 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 20:44:01.142005 OPS=0x04
618 20:44:01.142469 ring efuse init
619 20:44:01.144484 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 20:44:01.150708 [0.017354 Inits done]
621 20:44:01.151213 secure task start!
622 20:44:01.151663 high task start!
623 20:44:01.152158 low task start!
624 20:44:01.154047 run into bl31
625 20:44:01.163432 NOTICE: BL31: v1.3(release):4fc40b1
626 20:44:01.171279 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 20:44:01.171789 NOTICE: BL31: G12A normal boot!
628 20:44:01.186763 NOTICE: BL31: BL33 decompress pass
629 20:44:01.192479 ERROR: Error initializing runtime service opteed_fast
630 20:44:02.409430 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 20:44:02.410048 bl2_stage_init 0x01
632 20:44:02.410510 bl2_stage_init 0x81
633 20:44:02.414840 hw id: 0x0000 - pwm id 0x01
634 20:44:02.415353 bl2_stage_init 0xc1
635 20:44:02.419642 bl2_stage_init 0x02
636 20:44:02.420199
637 20:44:02.420679 L0:00000000
638 20:44:02.421128 L1:00000703
639 20:44:02.421570 L2:00008067
640 20:44:02.425333 L3:15000000
641 20:44:02.425837 S1:00000000
642 20:44:02.426287 B2:20282000
643 20:44:02.426730 B1:a0f83180
644 20:44:02.427167
645 20:44:02.427608 TE: 72288
646 20:44:02.428087
647 20:44:02.436381 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 20:44:02.436889
649 20:44:02.437343 Board ID = 1
650 20:44:02.437781 Set cpu clk to 24M
651 20:44:02.438212 Set clk81 to 24M
652 20:44:02.442082 Use GP1_pll as DSU clk.
653 20:44:02.442581 DSU clk: 1200 Mhz
654 20:44:02.443022 CPU clk: 1200 MHz
655 20:44:02.447613 Set clk81 to 166.6M
656 20:44:02.453254 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 20:44:02.453761 board id: 1
658 20:44:02.461284 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 20:44:02.472135 fw parse done
660 20:44:02.478084 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 20:44:02.521338 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 20:44:02.532391 PIEI prepare done
663 20:44:02.532945 fastboot data load
664 20:44:02.533420 fastboot data verify
665 20:44:02.537959 verify result: 266
666 20:44:02.543591 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 20:44:02.544189 LPDDR4 probe
668 20:44:02.544650 ddr clk to 1584MHz
669 20:44:02.550768 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 20:44:02.589348
671 20:44:02.589859 dmc_version 0001
672 20:44:02.596376 Check phy result
673 20:44:02.602382 INFO : End of CA training
674 20:44:02.602886 INFO : End of initialization
675 20:44:02.608002 INFO : Training has run successfully!
676 20:44:02.608509 Check phy result
677 20:44:02.613615 INFO : End of initialization
678 20:44:02.614118 INFO : End of read enable training
679 20:44:02.619219 INFO : End of fine write leveling
680 20:44:02.624818 INFO : End of Write leveling coarse delay
681 20:44:02.625319 INFO : Training has run successfully!
682 20:44:02.625767 Check phy result
683 20:44:02.630365 INFO : End of initialization
684 20:44:02.630866 INFO : End of read dq deskew training
685 20:44:02.636037 INFO : End of MPR read delay center optimization
686 20:44:02.641637 INFO : End of write delay center optimization
687 20:44:02.647161 INFO : End of read delay center optimization
688 20:44:02.647661 INFO : End of max read latency training
689 20:44:02.652802 INFO : Training has run successfully!
690 20:44:02.653298 1D training succeed
691 20:44:02.660987 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 20:44:02.710237 Check phy result
693 20:44:02.710737 INFO : End of initialization
694 20:44:02.737608 INFO : End of 2D read delay Voltage center optimization
695 20:44:02.761888 INFO : End of 2D read delay Voltage center optimization
696 20:44:02.818992 INFO : End of 2D write delay Voltage center optimization
697 20:44:02.872501 INFO : End of 2D write delay Voltage center optimization
698 20:44:02.878185 INFO : Training has run successfully!
699 20:44:02.878702
700 20:44:02.879153 channel==0
701 20:44:02.883808 RxClkDly_Margin_A0==78 ps 8
702 20:44:02.884377 TxDqDly_Margin_A0==98 ps 10
703 20:44:02.887064 RxClkDly_Margin_A1==88 ps 9
704 20:44:02.887567 TxDqDly_Margin_A1==98 ps 10
705 20:44:02.892713 TrainedVREFDQ_A0==74
706 20:44:02.893220 TrainedVREFDQ_A1==75
707 20:44:02.898153 VrefDac_Margin_A0==23
708 20:44:02.898676 DeviceVref_Margin_A0==40
709 20:44:02.899121 VrefDac_Margin_A1==23
710 20:44:02.903711 DeviceVref_Margin_A1==39
711 20:44:02.904253
712 20:44:02.904707
713 20:44:02.905145 channel==1
714 20:44:02.905575 RxClkDly_Margin_A0==78 ps 8
715 20:44:02.907326 TxDqDly_Margin_A0==98 ps 10
716 20:44:02.912829 RxClkDly_Margin_A1==78 ps 8
717 20:44:02.913350 TxDqDly_Margin_A1==78 ps 8
718 20:44:02.913814 TrainedVREFDQ_A0==78
719 20:44:02.918534 TrainedVREFDQ_A1==75
720 20:44:02.919043 VrefDac_Margin_A0==22
721 20:44:02.924185 DeviceVref_Margin_A0==36
722 20:44:02.924709 VrefDac_Margin_A1==22
723 20:44:02.925163 DeviceVref_Margin_A1==39
724 20:44:02.925605
725 20:44:02.933070 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 20:44:02.933589
727 20:44:02.958970 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
728 20:44:02.964633 2D training succeed
729 20:44:02.970103 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 20:44:02.970622 auto size-- 65535DDR cs0 size: 2048MB
731 20:44:02.975668 DDR cs1 size: 2048MB
732 20:44:02.976219 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 20:44:02.981328 cs0 DataBus test pass
734 20:44:02.981867 cs1 DataBus test pass
735 20:44:02.986875 cs0 AddrBus test pass
736 20:44:02.987392 cs1 AddrBus test pass
737 20:44:02.987848
738 20:44:02.988351 100bdlr_step_size ps== 471
739 20:44:02.992753 result report
740 20:44:02.993285 boot times 0Enable ddr reg access
741 20:44:02.999955 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 20:44:03.014672 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 20:44:03.674647 bl2z: ptr: 05129330, size: 00001e40
744 20:44:03.682586 0.0;M3 CHK:0;cm4_sp_mode 0
745 20:44:03.683199 MVN_1=0x00000000
746 20:44:03.683678 MVN_2=0x00000000
747 20:44:03.694096 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 20:44:03.694608 OPS=0x04
749 20:44:03.695032 ring efuse init
750 20:44:03.700041 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 20:44:03.700522 [0.017354 Inits done]
752 20:44:03.700939 secure task start!
753 20:44:03.707566 high task start!
754 20:44:03.708046 low task start!
755 20:44:03.708461 run into bl31
756 20:44:03.715962 NOTICE: BL31: v1.3(release):4fc40b1
757 20:44:03.723785 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 20:44:03.724287 NOTICE: BL31: G12A normal boot!
759 20:44:03.740234 NOTICE: BL31: BL33 decompress pass
760 20:44:03.744965 ERROR: Error initializing runtime service opteed_fast
761 20:44:04.540425
762 20:44:04.541014
763 20:44:04.545789 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 20:44:04.546310
765 20:44:04.548935 Model: Libre Computer AML-S905D3-CC Solitude
766 20:44:04.695952 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 20:44:04.711063 DRAM: 2 GiB (effective 3.8 GiB)
768 20:44:04.812841 Core: 406 devices, 33 uclasses, devicetree: separate
769 20:44:04.818296 WDT: Not starting watchdog@f0d0
770 20:44:04.843590 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 20:44:04.855903 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 20:44:04.860049 ** Bad device specification mmc 0 **
773 20:44:04.870920 Card did not respond to voltage select! : -110
774 20:44:04.877985 ** Bad device specification mmc 0 **
775 20:44:04.878496 Couldn't find partition mmc 0
776 20:44:04.886960 Card did not respond to voltage select! : -110
777 20:44:04.892388 ** Bad device specification mmc 0 **
778 20:44:04.892883 Couldn't find partition mmc 0
779 20:44:04.897419 Error: could not access storage.
780 20:44:05.192987 Net: eth0: ethernet@ff3f0000
781 20:44:05.193674 starting USB...
782 20:44:05.438564 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 20:44:05.439117 Starting the controller
784 20:44:05.445495 USB XHCI 1.10
785 20:44:07.001541 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 20:44:07.009846 scanning usb for storage devices... 0 Storage Device(s) found
788 20:44:07.061572 Hit any key to stop autoboot: 1
789 20:44:07.062587 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 20:44:07.063235 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 20:44:07.063849 Setting prompt string to ['=>']
792 20:44:07.064288 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 20:44:07.075635 0
794 20:44:07.076410 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 20:44:07.177530 => setenv autoload no
797 20:44:07.178475 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 20:44:07.184878 setenv autoload no
800 20:44:07.286807 => setenv initrd_high 0xffffffff
801 20:44:07.287777 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 20:44:07.291480 setenv initrd_high 0xffffffff
804 20:44:07.393539 => setenv fdt_high 0xffffffff
805 20:44:07.394516 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 20:44:07.398023 setenv fdt_high 0xffffffff
808 20:44:07.499897 => dhcp
809 20:44:07.500958 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 20:44:07.504320 dhcp
811 20:44:07.959518 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 20:44:07.960071 Speed: 1000, full duplex
813 20:44:07.960367 BOOTP broadcast 1
814 20:44:08.208171 BOOTP broadcast 2
815 20:44:08.709486 BOOTP broadcast 3
816 20:44:09.710262 BOOTP broadcast 4
817 20:44:11.711130 BOOTP broadcast 5
818 20:44:11.723297 DHCP client bound to address 192.168.6.12 (3763 ms)
820 20:44:11.824562 => setenv serverip 192.168.6.2
821 20:44:11.825170 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
822 20:44:11.828659 setenv serverip 192.168.6.2
824 20:44:11.929829 => tftpboot 0x01080000 682700/tftp-deploy-_v9lxwsr/kernel/uImage
825 20:44:11.930682 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
826 20:44:11.937036 tftpboot 0x01080000 682700/tftp-deploy-_v9lxwsr/kernel/uImage
827 20:44:11.937429 Speed: 1000, full duplex
828 20:44:11.937696 Using ethernet@ff3f0000 device
829 20:44:11.942583 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 20:44:11.948194 Filename '682700/tftp-deploy-_v9lxwsr/kernel/uImage'.
831 20:44:11.951449 Load address: 0x1080000
832 20:44:14.297898 Loading: *################################################## 35.7 MiB
833 20:44:14.298570 15.2 MiB/s
834 20:44:14.299043 done
835 20:44:14.302280 Bytes transferred = 37409344 (23ad240 hex)
837 20:44:14.404168 => tftpboot 0x08000000 682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot
838 20:44:14.405224 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:34)
839 20:44:14.411801 tftpboot 0x08000000 682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot
840 20:44:14.412398 Speed: 1000, full duplex
841 20:44:14.412866 Using ethernet@ff3f0000 device
842 20:44:14.417242 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 20:44:14.426048 Filename '682700/tftp-deploy-_v9lxwsr/ramdisk/ramdisk.cpio.gz.uboot'.
844 20:44:14.426664 Load address: 0x8000000
845 20:44:16.158105 Loading: *################################################# UDP wrong checksum 00000005 00006208
846 20:44:21.121611 UDP wrong checksum 000000ff 0000109c
847 20:44:21.133538 UDP wrong checksum 000000ff 0000ad8e
848 20:44:21.158053 T UDP wrong checksum 00000005 00006208
849 20:44:31.160010 T T UDP wrong checksum 00000005 00006208
850 20:44:44.315060 T T UDP wrong checksum 000000ff 0000b59b
851 20:44:44.326512 UDP wrong checksum 000000ff 00003f8e
852 20:44:51.163267 T UDP wrong checksum 00000005 00006208
853 20:45:11.168847 T T T T
854 20:45:11.169507 Retry count exceeded; starting again
856 20:45:11.171020 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
859 20:45:11.173150 end: 2.4 uboot-commands (duration 00:01:22) [common]
861 20:45:11.175384 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
863 20:45:11.176520 end: 2 uboot-action (duration 00:01:23) [common]
865 20:45:11.178296 Cleaning after the job
866 20:45:11.178895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/ramdisk
867 20:45:11.180238 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/kernel
868 20:45:11.223587 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/dtb
869 20:45:11.224625 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/nfsrootfs
870 20:45:11.375498 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682700/tftp-deploy-_v9lxwsr/modules
871 20:45:11.395734 start: 4.1 power-off (timeout 00:00:30) [common]
872 20:45:11.396373 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
873 20:45:11.427046 >> OK - accepted request
874 20:45:11.428834 Returned 0 in 0 seconds
875 20:45:11.529574 end: 4.1 power-off (duration 00:00:00) [common]
877 20:45:11.530524 start: 4.2 read-feedback (timeout 00:10:00) [common]
878 20:45:11.531173 Listened to connection for namespace 'common' for up to 1s
879 20:45:12.532103 Finalising connection for namespace 'common'
880 20:45:12.532567 Disconnecting from shell: Finalise
881 20:45:12.532835 =>
882 20:45:12.633432 end: 4.2 read-feedback (duration 00:00:01) [common]
883 20:45:12.633815 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/682700
884 20:45:14.416069 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/682700
885 20:45:14.416691 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.