Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:13:28.118487 lava-dispatcher, installed at version: 2024.01
2 21:13:28.119287 start: 0 validate
3 21:13:28.119747 Start time: 2024-08-31 21:13:28.119717+00:00 (UTC)
4 21:13:28.120357 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:13:28.120877 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 21:13:28.161647 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:13:28.162184 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 21:13:28.191660 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:13:28.192331 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:13:28.226962 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:13:28.227468 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
12 21:13:28.269175 validate duration: 0.15
14 21:13:28.270691 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 21:13:28.271304 start: 1.1 download-retry (timeout 00:10:00) [common]
16 21:13:28.271860 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 21:13:28.272604 Not decompressing ramdisk as can be used compressed.
18 21:13:28.273039 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 21:13:28.273308 saving as /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/ramdisk/rootfs.cpio.gz
20 21:13:28.273576 total size: 47897469 (45 MB)
21 21:13:28.311487 progress 0 % (0 MB)
22 21:13:28.342285 progress 5 % (2 MB)
23 21:13:28.372161 progress 10 % (4 MB)
24 21:13:28.401700 progress 15 % (6 MB)
25 21:13:28.431324 progress 20 % (9 MB)
26 21:13:28.461218 progress 25 % (11 MB)
27 21:13:28.491044 progress 30 % (13 MB)
28 21:13:28.520890 progress 35 % (16 MB)
29 21:13:28.550550 progress 40 % (18 MB)
30 21:13:28.580333 progress 45 % (20 MB)
31 21:13:28.609799 progress 50 % (22 MB)
32 21:13:28.639251 progress 55 % (25 MB)
33 21:13:28.669321 progress 60 % (27 MB)
34 21:13:28.699274 progress 65 % (29 MB)
35 21:13:28.728738 progress 70 % (32 MB)
36 21:13:28.757889 progress 75 % (34 MB)
37 21:13:28.787160 progress 80 % (36 MB)
38 21:13:28.816487 progress 85 % (38 MB)
39 21:13:28.845937 progress 90 % (41 MB)
40 21:13:28.875180 progress 95 % (43 MB)
41 21:13:28.904254 progress 100 % (45 MB)
42 21:13:28.905013 45 MB downloaded in 0.63 s (72.34 MB/s)
43 21:13:28.905594 end: 1.1.1 http-download (duration 00:00:01) [common]
45 21:13:28.906486 end: 1.1 download-retry (duration 00:00:01) [common]
46 21:13:28.906782 start: 1.2 download-retry (timeout 00:09:59) [common]
47 21:13:28.907055 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 21:13:28.907531 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/clang-16/kernel/Image
49 21:13:28.907783 saving as /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/kernel/Image
50 21:13:28.908023 total size: 37409280 (35 MB)
51 21:13:28.908244 No compression specified
52 21:13:28.943397 progress 0 % (0 MB)
53 21:13:28.969908 progress 5 % (1 MB)
54 21:13:28.993536 progress 10 % (3 MB)
55 21:13:29.017441 progress 15 % (5 MB)
56 21:13:29.041293 progress 20 % (7 MB)
57 21:13:29.064734 progress 25 % (8 MB)
58 21:13:29.088654 progress 30 % (10 MB)
59 21:13:29.112410 progress 35 % (12 MB)
60 21:13:29.135836 progress 40 % (14 MB)
61 21:13:29.159646 progress 45 % (16 MB)
62 21:13:29.183008 progress 50 % (17 MB)
63 21:13:29.206465 progress 55 % (19 MB)
64 21:13:29.230045 progress 60 % (21 MB)
65 21:13:29.253929 progress 65 % (23 MB)
66 21:13:29.277081 progress 70 % (25 MB)
67 21:13:29.301981 progress 75 % (26 MB)
68 21:13:29.325679 progress 80 % (28 MB)
69 21:13:29.349108 progress 85 % (30 MB)
70 21:13:29.372922 progress 90 % (32 MB)
71 21:13:29.396906 progress 95 % (33 MB)
72 21:13:29.419644 progress 100 % (35 MB)
73 21:13:29.420405 35 MB downloaded in 0.51 s (69.63 MB/s)
74 21:13:29.420915 end: 1.2.1 http-download (duration 00:00:01) [common]
76 21:13:29.421752 end: 1.2 download-retry (duration 00:00:01) [common]
77 21:13:29.422030 start: 1.3 download-retry (timeout 00:09:59) [common]
78 21:13:29.422301 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 21:13:29.422808 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 21:13:29.423098 saving as /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 21:13:29.423313 total size: 53173 (0 MB)
82 21:13:29.423525 No compression specified
83 21:13:29.459294 progress 61 % (0 MB)
84 21:13:29.460543 progress 100 % (0 MB)
85 21:13:29.461127 0 MB downloaded in 0.04 s (1.34 MB/s)
86 21:13:29.461634 end: 1.3.1 http-download (duration 00:00:00) [common]
88 21:13:29.462455 end: 1.3 download-retry (duration 00:00:00) [common]
89 21:13:29.462720 start: 1.4 download-retry (timeout 00:09:59) [common]
90 21:13:29.462984 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 21:13:29.463446 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/clang-16/modules.tar.xz
92 21:13:29.463706 saving as /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/modules/modules.tar
93 21:13:29.463918 total size: 11643384 (11 MB)
94 21:13:29.464177 Using unxz to decompress xz
95 21:13:29.507198 progress 0 % (0 MB)
96 21:13:29.576554 progress 5 % (0 MB)
97 21:13:29.656176 progress 10 % (1 MB)
98 21:13:29.745405 progress 15 % (1 MB)
99 21:13:29.827754 progress 20 % (2 MB)
100 21:13:29.904667 progress 25 % (2 MB)
101 21:13:29.989554 progress 30 % (3 MB)
102 21:13:30.069992 progress 35 % (3 MB)
103 21:13:30.150330 progress 40 % (4 MB)
104 21:13:30.224987 progress 45 % (5 MB)
105 21:13:30.304910 progress 50 % (5 MB)
106 21:13:30.383100 progress 55 % (6 MB)
107 21:13:30.468560 progress 60 % (6 MB)
108 21:13:30.551359 progress 65 % (7 MB)
109 21:13:30.634980 progress 70 % (7 MB)
110 21:13:30.729363 progress 75 % (8 MB)
111 21:13:30.826522 progress 80 % (8 MB)
112 21:13:30.908705 progress 85 % (9 MB)
113 21:13:30.981310 progress 90 % (10 MB)
114 21:13:31.061245 progress 95 % (10 MB)
115 21:13:31.140020 progress 100 % (11 MB)
116 21:13:31.151086 11 MB downloaded in 1.69 s (6.58 MB/s)
117 21:13:31.151731 end: 1.4.1 http-download (duration 00:00:02) [common]
119 21:13:31.153306 end: 1.4 download-retry (duration 00:00:02) [common]
120 21:13:31.153888 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 21:13:31.154462 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 21:13:31.155007 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 21:13:31.155562 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 21:13:31.156663 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg
125 21:13:31.157635 makedir: /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin
126 21:13:31.158352 makedir: /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/tests
127 21:13:31.159047 makedir: /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/results
128 21:13:31.159715 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-add-keys
129 21:13:31.160814 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-add-sources
130 21:13:31.161853 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-background-process-start
131 21:13:31.162908 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-background-process-stop
132 21:13:31.164044 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-common-functions
133 21:13:31.165092 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-echo-ipv4
134 21:13:31.166146 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-install-packages
135 21:13:31.167162 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-installed-packages
136 21:13:31.168190 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-os-build
137 21:13:31.169203 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-probe-channel
138 21:13:31.170217 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-probe-ip
139 21:13:31.171223 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-target-ip
140 21:13:31.172250 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-target-mac
141 21:13:31.173267 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-target-storage
142 21:13:31.174295 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-case
143 21:13:31.175338 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-event
144 21:13:31.176408 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-feedback
145 21:13:31.177824 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-raise
146 21:13:31.178867 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-reference
147 21:13:31.179873 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-runner
148 21:13:31.180940 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-set
149 21:13:31.181947 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-test-shell
150 21:13:31.182982 Updating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-install-packages (oe)
151 21:13:31.184096 Updating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/bin/lava-installed-packages (oe)
152 21:13:31.185039 Creating /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/environment
153 21:13:31.185862 LAVA metadata
154 21:13:31.186405 - LAVA_JOB_ID=682765
155 21:13:31.186880 - LAVA_DISPATCHER_IP=192.168.6.2
156 21:13:31.187624 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 21:13:31.189635 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 21:13:31.190249 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 21:13:31.190662 skipped lava-vland-overlay
160 21:13:31.191152 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 21:13:31.191659 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 21:13:31.192122 skipped lava-multinode-overlay
163 21:13:31.192616 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 21:13:31.193445 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 21:13:31.193756 Loading test definitions
166 21:13:31.194060 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 21:13:31.194293 Using /lava-682765 at stage 0
168 21:13:31.195556 uuid=682765_1.5.2.4.1 testdef=None
169 21:13:31.195893 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 21:13:31.196195 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 21:13:31.198030 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 21:13:31.198896 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 21:13:31.201257 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 21:13:31.202124 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 21:13:31.204450 runner path: /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/0/tests/0_igt-gpu-panfrost test_uuid 682765_1.5.2.4.1
178 21:13:31.205095 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 21:13:31.205925 Creating lava-test-runner.conf files
181 21:13:31.206132 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/682765/lava-overlay-eo544zfg/lava-682765/0 for stage 0
182 21:13:31.206497 - 0_igt-gpu-panfrost
183 21:13:31.206866 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 21:13:31.207158 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 21:13:31.231751 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 21:13:31.232230 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 21:13:31.232504 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 21:13:31.232780 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 21:13:31.233046 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 21:13:38.848521 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:08) [common]
191 21:13:38.849246 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
192 21:13:38.849721 extracting modules file /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk
193 21:13:40.497351 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 21:13:40.497854 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 21:13:40.498143 [common] Applying overlay /var/lib/lava/dispatcher/tmp/682765/compress-overlay-tetdrui9/overlay-1.5.2.5.tar.gz to ramdisk
196 21:13:40.498363 [common] Applying overlay /var/lib/lava/dispatcher/tmp/682765/compress-overlay-tetdrui9/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk
197 21:13:40.530994 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 21:13:40.531469 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 21:13:40.531753 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 21:13:40.532008 Converting downloaded kernel to a uImage
201 21:13:40.532341 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/kernel/Image /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/kernel/uImage
202 21:13:40.905597 output: Image Name:
203 21:13:40.906067 output: Created: Sat Aug 31 21:13:40 2024
204 21:13:40.906326 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 21:13:40.906557 output: Data Size: 37409280 Bytes = 36532.50 KiB = 35.68 MiB
206 21:13:40.907047 output: Load Address: 01080000
207 21:13:40.907342 output: Entry Point: 01080000
208 21:13:40.907602 output:
209 21:13:40.908025 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 21:13:40.908376 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 21:13:40.908719 start: 1.5.7 configure-preseed-file (timeout 00:09:47) [common]
212 21:13:40.909050 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 21:13:40.909361 start: 1.5.8 compress-ramdisk (timeout 00:09:47) [common]
214 21:13:40.909922 Building ramdisk /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk
215 21:13:47.862919 >> 507388 blocks
216 21:14:08.421422 Adding RAMdisk u-boot header.
217 21:14:08.422200 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk.cpio.gz.uboot
218 21:14:09.123416 output: Image Name:
219 21:14:09.123856 output: Created: Sat Aug 31 21:14:08 2024
220 21:14:09.124125 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 21:14:09.124347 output: Data Size: 66241563 Bytes = 64689.03 KiB = 63.17 MiB
222 21:14:09.124556 output: Load Address: 00000000
223 21:14:09.124762 output: Entry Point: 00000000
224 21:14:09.124965 output:
225 21:14:09.125937 rename /var/lib/lava/dispatcher/tmp/682765/extract-overlay-ramdisk-9ai0xn04/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot
226 21:14:09.126411 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 21:14:09.126727 end: 1.5 prepare-tftp-overlay (duration 00:00:38) [common]
228 21:14:09.127056 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 21:14:09.127317 No LXC device requested
230 21:14:09.127592 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 21:14:09.127871 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 21:14:09.128169 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 21:14:09.128398 Checking files for TFTP limit of 4294967296 bytes.
234 21:14:09.129949 end: 1 tftp-deploy (duration 00:00:41) [common]
235 21:14:09.130300 start: 2 uboot-action (timeout 00:05:00) [common]
236 21:14:09.130587 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 21:14:09.130858 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 21:14:09.131137 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 21:14:09.131445 Using kernel file from prepare-kernel: 682765/tftp-deploy-wpnw888b/kernel/uImage
240 21:14:09.131772 substitutions:
241 21:14:09.132004 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 21:14:09.132218 - {DTB_ADDR}: 0x01070000
243 21:14:09.132425 - {DTB}: 682765/tftp-deploy-wpnw888b/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 21:14:09.132634 - {INITRD}: 682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot
245 21:14:09.132836 - {KERNEL_ADDR}: 0x01080000
246 21:14:09.133035 - {KERNEL}: 682765/tftp-deploy-wpnw888b/kernel/uImage
247 21:14:09.133234 - {LAVA_MAC}: None
248 21:14:09.133460 - {PRESEED_CONFIG}: None
249 21:14:09.133666 - {PRESEED_LOCAL}: None
250 21:14:09.133865 - {RAMDISK_ADDR}: 0x08000000
251 21:14:09.134062 - {RAMDISK}: 682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot
252 21:14:09.134264 - {ROOT_PART}: None
253 21:14:09.134464 - {ROOT}: None
254 21:14:09.134667 - {SERVER_IP}: 192.168.6.2
255 21:14:09.134869 - {TEE_ADDR}: 0x83000000
256 21:14:09.135066 - {TEE}: None
257 21:14:09.135260 Parsed boot commands:
258 21:14:09.135453 - setenv autoload no
259 21:14:09.135653 - setenv initrd_high 0xffffffff
260 21:14:09.135864 - setenv fdt_high 0xffffffff
261 21:14:09.136111 - dhcp
262 21:14:09.136320 - setenv serverip 192.168.6.2
263 21:14:09.136522 - tftpboot 0x01080000 682765/tftp-deploy-wpnw888b/kernel/uImage
264 21:14:09.136723 - tftpboot 0x08000000 682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot
265 21:14:09.136924 - tftpboot 0x01070000 682765/tftp-deploy-wpnw888b/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 21:14:09.137122 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 21:14:09.137323 - bootm 0x01080000 0x08000000 0x01070000
268 21:14:09.137622 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 21:14:09.138447 start: 2.3 connect-device (timeout 00:05:00) [common]
271 21:14:09.138708 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 21:14:09.151528 Setting prompt string to ['lava-test: # ']
273 21:14:09.152653 end: 2.3 connect-device (duration 00:00:00) [common]
274 21:14:09.153016 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 21:14:09.153346 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 21:14:09.153651 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 21:14:09.154318 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 21:14:09.192995 >> OK - accepted request
279 21:14:09.194485 Returned 0 in 0 seconds
280 21:14:09.295257 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 21:14:09.296264 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 21:14:09.296567 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 21:14:09.296834 Setting prompt string to ['Hit any key to stop autoboot']
285 21:14:09.297075 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 21:14:09.297982 Trying 192.168.56.21...
287 21:14:09.298245 Connected to conserv1.
288 21:14:09.298460 Escape character is '^]'.
289 21:14:09.298672
290 21:14:09.298892 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 21:14:09.299109
292 21:14:17.216999 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 21:14:17.217418 bl2_stage_init 0x01
294 21:14:17.217657 bl2_stage_init 0x81
295 21:14:17.222557 hw id: 0x0000 - pwm id 0x01
296 21:14:17.222950 bl2_stage_init 0xc1
297 21:14:17.228138 bl2_stage_init 0x02
298 21:14:17.228513
299 21:14:17.228840 L0:00000000
300 21:14:17.229152 L1:00000703
301 21:14:17.229381 L2:00008067
302 21:14:17.229589 L3:15000000
303 21:14:17.233836 S1:00000000
304 21:14:17.234217 B2:20282000
305 21:14:17.234538 B1:a0f83180
306 21:14:17.234853
307 21:14:17.235162 TE: 68331
308 21:14:17.235481
309 21:14:17.239351 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 21:14:17.239615
311 21:14:17.244957 Board ID = 1
312 21:14:17.245226 Set cpu clk to 24M
313 21:14:17.245439 Set clk81 to 24M
314 21:14:17.250533 Use GP1_pll as DSU clk.
315 21:14:17.250897 DSU clk: 1200 Mhz
316 21:14:17.251215 CPU clk: 1200 MHz
317 21:14:17.256117 Set clk81 to 166.6M
318 21:14:17.261832 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 21:14:17.262212 board id: 1
320 21:14:17.268953 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 21:14:17.279850 fw parse done
322 21:14:17.285897 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 21:14:17.328952 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 21:14:17.340207 PIEI prepare done
325 21:14:17.340476 fastboot data load
326 21:14:17.340689 fastboot data verify
327 21:14:17.345706 verify result: 266
328 21:14:17.351302 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 21:14:17.351661 LPDDR4 probe
330 21:14:17.351974 ddr clk to 1584MHz
331 21:14:17.359277 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 21:14:17.397018
333 21:14:17.397283 dmc_version 0001
334 21:14:17.404065 Check phy result
335 21:14:17.410008 INFO : End of CA training
336 21:14:17.410489 INFO : End of initialization
337 21:14:17.415630 INFO : Training has run successfully!
338 21:14:17.416134 Check phy result
339 21:14:17.421224 INFO : End of initialization
340 21:14:17.421689 INFO : End of read enable training
341 21:14:17.426901 INFO : End of fine write leveling
342 21:14:17.432385 INFO : End of Write leveling coarse delay
343 21:14:17.432847 INFO : Training has run successfully!
344 21:14:17.433321 Check phy result
345 21:14:17.438003 INFO : End of initialization
346 21:14:17.438483 INFO : End of read dq deskew training
347 21:14:17.443625 INFO : End of MPR read delay center optimization
348 21:14:17.449206 INFO : End of write delay center optimization
349 21:14:17.454902 INFO : End of read delay center optimization
350 21:14:17.455365 INFO : End of max read latency training
351 21:14:17.460374 INFO : Training has run successfully!
352 21:14:17.460832 1D training succeed
353 21:14:17.469666 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 21:14:17.518053 Check phy result
355 21:14:17.518569 INFO : End of initialization
356 21:14:17.545258 INFO : End of 2D read delay Voltage center optimization
357 21:14:17.569397 INFO : End of 2D read delay Voltage center optimization
358 21:14:17.626047 INFO : End of 2D write delay Voltage center optimization
359 21:14:17.680352 INFO : End of 2D write delay Voltage center optimization
360 21:14:17.685834 INFO : Training has run successfully!
361 21:14:17.686304
362 21:14:17.686756 channel==0
363 21:14:17.691554 RxClkDly_Margin_A0==88 ps 9
364 21:14:17.692066 TxDqDly_Margin_A0==98 ps 10
365 21:14:17.697188 RxClkDly_Margin_A1==88 ps 9
366 21:14:17.697664 TxDqDly_Margin_A1==98 ps 10
367 21:14:17.698116 TrainedVREFDQ_A0==74
368 21:14:17.702745 TrainedVREFDQ_A1==74
369 21:14:17.703243 VrefDac_Margin_A0==24
370 21:14:17.703689 DeviceVref_Margin_A0==40
371 21:14:17.708329 VrefDac_Margin_A1==23
372 21:14:17.708799 DeviceVref_Margin_A1==40
373 21:14:17.709238
374 21:14:17.709682
375 21:14:17.713783 channel==1
376 21:14:17.714252 RxClkDly_Margin_A0==88 ps 9
377 21:14:17.714696 TxDqDly_Margin_A0==98 ps 10
378 21:14:17.719525 RxClkDly_Margin_A1==88 ps 9
379 21:14:17.720015 TxDqDly_Margin_A1==78 ps 8
380 21:14:17.724955 TrainedVREFDQ_A0==78
381 21:14:17.725430 TrainedVREFDQ_A1==75
382 21:14:17.725879 VrefDac_Margin_A0==23
383 21:14:17.730708 DeviceVref_Margin_A0==36
384 21:14:17.731171 VrefDac_Margin_A1==22
385 21:14:17.736228 DeviceVref_Margin_A1==39
386 21:14:17.736688
387 21:14:17.737133 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 21:14:17.737576
389 21:14:17.769805 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
390 21:14:17.770349 2D training succeed
391 21:14:17.775542 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 21:14:17.780804 auto size-- 65535DDR cs0 size: 2048MB
393 21:14:17.781273 DDR cs1 size: 2048MB
394 21:14:17.786381 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 21:14:17.786850 cs0 DataBus test pass
396 21:14:17.792014 cs1 DataBus test pass
397 21:14:17.792484 cs0 AddrBus test pass
398 21:14:17.792928 cs1 AddrBus test pass
399 21:14:17.793363
400 21:14:17.797626 100bdlr_step_size ps== 471
401 21:14:17.798102 result report
402 21:14:17.803175 boot times 0Enable ddr reg access
403 21:14:17.808447 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 21:14:17.822344 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 21:14:18.480103 bl2z: ptr: 05129330, size: 00001e40
406 21:14:18.488770 0.0;M3 CHK:0;cm4_sp_mode 0
407 21:14:18.489112 MVN_1=0x00000000
408 21:14:18.489332 MVN_2=0x00000000
409 21:14:18.500357 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 21:14:18.500696 OPS=0x04
411 21:14:18.500919 ring efuse init
412 21:14:18.503183 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 21:14:18.508792 [0.017354 Inits done]
414 21:14:18.509088 secure task start!
415 21:14:18.509303 high task start!
416 21:14:18.509513 low task start!
417 21:14:18.512930 run into bl31
418 21:14:18.522457 NOTICE: BL31: v1.3(release):4fc40b1
419 21:14:18.529922 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 21:14:18.530250 NOTICE: BL31: G12A normal boot!
421 21:14:18.545995 NOTICE: BL31: BL33 decompress pass
422 21:14:18.551570 ERROR: Error initializing runtime service opteed_fast
423 21:14:19.771043 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 21:14:19.771695 bl2_stage_init 0x01
425 21:14:19.772228 bl2_stage_init 0x81
426 21:14:19.776583 hw id: 0x0000 - pwm id 0x01
427 21:14:19.777124 bl2_stage_init 0xc1
428 21:14:19.782229 bl2_stage_init 0x02
429 21:14:19.782742
430 21:14:19.783194 L0:00000000
431 21:14:19.783628 L1:00000703
432 21:14:19.784091 L2:00008067
433 21:14:19.784526 L3:15000000
434 21:14:19.787801 S1:00000000
435 21:14:19.788392 B2:20282000
436 21:14:19.788834 B1:a0f83180
437 21:14:19.789272
438 21:14:19.789718 TE: 70582
439 21:14:19.790157
440 21:14:19.793405 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 21:14:19.793915
442 21:14:19.798985 Board ID = 1
443 21:14:19.799475 Set cpu clk to 24M
444 21:14:19.799924 Set clk81 to 24M
445 21:14:19.804576 Use GP1_pll as DSU clk.
446 21:14:19.805065 DSU clk: 1200 Mhz
447 21:14:19.805513 CPU clk: 1200 MHz
448 21:14:19.810233 Set clk81 to 166.6M
449 21:14:19.815814 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 21:14:19.816349 board id: 1
451 21:14:19.823014 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 21:14:19.833973 fw parse done
453 21:14:19.839827 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 21:14:19.882983 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 21:14:19.894291 PIEI prepare done
456 21:14:19.894791 fastboot data load
457 21:14:19.895229 fastboot data verify
458 21:14:19.899782 verify result: 266
459 21:14:19.907741 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 21:14:19.908263 LPDDR4 probe
461 21:14:19.908699 ddr clk to 1584MHz
462 21:14:21.269805 Load ddrfw from S SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
463 21:14:21.270470 bl2_stage_init 0x01
464 21:14:21.270976 bl2_stage_init 0x81
465 21:14:21.275429 hw id: 0x0000 - pwm id 0x01
466 21:14:21.276016 bl2_stage_init 0xc1
467 21:14:21.280893 bl2_stage_init 0x02
468 21:14:21.281422
469 21:14:21.281917 L0:00000000
470 21:14:21.282428 L1:00000703
471 21:14:21.282910 L2:00008067
472 21:14:21.283391 L3:15000000
473 21:14:21.286563 S1:00000000
474 21:14:21.287121 B2:20282000
475 21:14:21.287592 B1:a0f83180
476 21:14:21.288096
477 21:14:21.288561 TE: 71144
478 21:14:21.289034
479 21:14:21.292248 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
480 21:14:21.292818
481 21:14:21.297676 Board ID = 1
482 21:14:21.298199 Set cpu clk to 24M
483 21:14:21.298667 Set clk81 to 24M
484 21:14:21.303370 Use GP1_pll as DSU clk.
485 21:14:21.303897 DSU clk: 1200 Mhz
486 21:14:21.304403 CPU clk: 1200 MHz
487 21:14:21.308849 Set clk81 to 166.6M
488 21:14:21.314477 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
489 21:14:21.315000 board id: 1
490 21:14:21.321697 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
491 21:14:21.332401 fw parse done
492 21:14:21.338278 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
493 21:14:21.381091 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
494 21:14:21.392022 PIEI prepare done
495 21:14:21.392571 fastboot data load
496 21:14:21.393043 fastboot data verify
497 21:14:21.397644 verify result: 266
498 21:14:21.403179 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
499 21:14:21.403753 LPDDR4 probe
500 21:14:21.404376 ddr clk to 1584MHz
501 21:14:21.411090 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
502 21:14:21.448418
503 21:14:21.448971 dmc_version 0001
504 21:14:21.455070 Check phy result
505 21:14:21.461014 INFO : End of CA training
506 21:14:21.461603 INFO : End of initialization
507 21:14:21.466640 INFO : Training has run successfully!
508 21:14:21.467198 Check phy result
509 21:14:21.472271 INFO : End of initialization
510 21:14:21.472860 INFO : End of read enable training
511 21:14:21.475556 INFO : End of fine write leveling
512 21:14:21.481118 INFO : End of Write leveling coarse delay
513 21:14:21.486714 INFO : Training has run successfully!
514 21:14:21.487248 Check phy result
515 21:14:21.487714 INFO : End of initialization
516 21:14:21.492319 INFO : End of read dq deskew training
517 21:14:21.497913 INFO : End of MPR read delay center optimization
518 21:14:21.498456 INFO : End of write delay center optimization
519 21:14:21.503555 INFO : End of read delay center optimization
520 21:14:21.509108 INFO : End of max read latency training
521 21:14:21.509643 INFO : Training has run successfully!
522 21:14:21.514741 1D training succeed
523 21:14:21.520613 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
524 21:14:21.568197 Check phy result
525 21:14:21.568746 INFO : End of initialization
526 21:14:21.590710 INFO : End of 2D read delay Voltage center optimization
527 21:14:21.609772 INFO : End of 2D read delay Voltage center optimization
528 21:14:21.661553 INFO : End of 2D write delay Voltage center optimization
529 21:14:21.710642 INFO : End of 2D write delay Voltage center optimization
530 21:14:21.716321 INFO : Training has run successfully!
531 21:14:21.717343
532 21:14:21.718259 channel==0
533 21:14:21.721794 RxClkDly_Margin_A0==88 ps 9
534 21:14:21.722066 TxDqDly_Margin_A0==88 ps 9
535 21:14:21.725193 RxClkDly_Margin_A1==88 ps 9
536 21:14:21.725444 TxDqDly_Margin_A1==98 ps 10
537 21:14:21.730813 TrainedVREFDQ_A0==74
538 21:14:21.731802 TrainedVREFDQ_A1==75
539 21:14:21.732753 VrefDac_Margin_A0==24
540 21:14:21.736464 DeviceVref_Margin_A0==40
541 21:14:21.736827 VrefDac_Margin_A1==23
542 21:14:21.741998 DeviceVref_Margin_A1==39
543 21:14:21.742332
544 21:14:21.742564
545 21:14:21.742778 channel==1
546 21:14:21.742981 RxClkDly_Margin_A0==78 ps 8
547 21:14:21.747620 TxDqDly_Margin_A0==88 ps 9
548 21:14:21.747950 RxClkDly_Margin_A1==78 ps 8
549 21:14:21.753279 TxDqDly_Margin_A1==78 ps 8
550 21:14:21.753619 TrainedVREFDQ_A0==75
551 21:14:21.753847 TrainedVREFDQ_A1==75
552 21:14:21.758813 VrefDac_Margin_A0==22
553 21:14:21.759268 DeviceVref_Margin_A0==38
554 21:14:21.759630 VrefDac_Margin_A1==22
555 21:14:21.764508 DeviceVref_Margin_A1==39
556 21:14:21.764972
557 21:14:21.769997 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
558 21:14:21.770331
559 21:14:21.797967 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
560 21:14:21.803606 2D training succeed
561 21:14:21.809278 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
562 21:14:21.809599 auto size-- 65535DDR cs0 size: 2048MB
563 21:14:21.814887 DDR cs1 size: 2048MB
564 21:14:21.815341 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
565 21:14:21.820499 cs0 DataBus test pass
566 21:14:21.820940 cs1 DataBus test pass
567 21:14:21.821201 cs0 AddrBus test pass
568 21:14:21.826012 cs1 AddrBus test pass
569 21:14:21.826335
570 21:14:21.826556 100bdlr_step_size ps== 478
571 21:14:21.826765 result report
572 21:14:21.831580 boot times 0Enable ddr reg access
573 21:14:21.839039 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
574 21:14:21.852740 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
575 21:14:22.508239 bl2z: ptr: 05129330, size: 00001e40
576 21:14:22.514609 0.0;M3 CHK:0;cm4_sp_mode 0
577 21:14:22.515108 MVN_1=0x00000000
578 21:14:22.515539 MVN_2=0x00000000
579 21:14:22.526090 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
580 21:14:22.526575 OPS=0x04
581 21:14:22.527002 ring efuse init
582 21:14:22.531698 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
583 21:14:22.532209 [0.017319 Inits done]
584 21:14:22.532639 secure task start!
585 21:14:22.538918 high task start!
586 21:14:22.539383 low task start!
587 21:14:22.539807 run into bl31
588 21:14:22.547609 NOTICE: BL31: v1.3(release):4fc40b1
589 21:14:22.555403 NOTICE: BL31: Built : 15:57:33, May 22 2019
590 21:14:22.555875 NOTICE: BL31: G12A normal boot!
591 21:14:22.570905 NOTICE: BL31: BL33 decompress pass
592 21:14:22.576663 ERROR: Error initializing runtime service opteed_fast
593 21:14:23.819177 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
594 21:14:23.819768 bl2_stage_init 0x01
595 21:14:23.820256 bl2_stage_init 0x81
596 21:14:23.824815 hw id: 0x0000 - pwm id 0x01
597 21:14:23.825285 bl2_stage_init 0xc1
598 21:14:23.829421 bl2_stage_init 0x02
599 21:14:23.829882
600 21:14:23.830302 L0:00000000
601 21:14:23.830711 L1:00000703
602 21:14:23.831118 L2:00008067
603 21:14:23.834960 L3:15000000
604 21:14:23.835418 S1:00000000
605 21:14:23.835831 B2:20282000
606 21:14:23.836276 B1:a0f83180
607 21:14:23.836700
608 21:14:23.837113 TE: 70204
609 21:14:23.837517
610 21:14:23.846268 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
611 21:14:23.846733
612 21:14:23.847153 Board ID = 1
613 21:14:23.847556 Set cpu clk to 24M
614 21:14:23.847958 Set clk81 to 24M
615 21:14:23.851825 Use GP1_pll as DSU clk.
616 21:14:23.852308 DSU clk: 1200 Mhz
617 21:14:23.852724 CPU clk: 1200 MHz
618 21:14:23.857479 Set clk81 to 166.6M
619 21:14:23.862967 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
620 21:14:23.863427 board id: 1
621 21:14:23.870377 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
622 21:14:23.881872 fw parse done
623 21:14:23.887783 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
624 21:14:23.929470 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
625 21:14:23.941199 PIEI prepare done
626 21:14:23.941653 fastboot data load
627 21:14:23.942067 fastboot data verify
628 21:14:23.946837 verify result: 266
629 21:14:23.952354 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
630 21:14:23.952804 LPDDR4 probe
631 21:14:23.953217 ddr clk to 1584MHz
632 21:14:23.960378 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
633 21:14:23.997639
634 21:14:23.998097 dmc_version 0001
635 21:14:24.004310 Check phy result
636 21:14:24.010199 INFO : End of CA training
637 21:14:24.010646 INFO : End of initialization
638 21:14:24.015781 INFO : Training has run successfully!
639 21:14:24.016278 Check phy result
640 21:14:24.021422 INFO : End of initialization
641 21:14:24.021871 INFO : End of read enable training
642 21:14:24.027042 INFO : End of fine write leveling
643 21:14:24.032630 INFO : End of Write leveling coarse delay
644 21:14:24.033080 INFO : Training has run successfully!
645 21:14:24.033496 Check phy result
646 21:14:24.038293 INFO : End of initialization
647 21:14:24.038740 INFO : End of read dq deskew training
648 21:14:24.043817 INFO : End of MPR read delay center optimization
649 21:14:24.049402 INFO : End of write delay center optimization
650 21:14:24.055063 INFO : End of read delay center optimization
651 21:14:24.055533 INFO : End of max read latency training
652 21:14:24.060649 INFO : Training has run successfully!
653 21:14:24.061112 1D training succeed
654 21:14:24.069911 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
655 21:14:24.117455 Check phy result
656 21:14:24.117906 INFO : End of initialization
657 21:14:24.139838 INFO : End of 2D read delay Voltage center optimization
658 21:14:24.158966 INFO : End of 2D read delay Voltage center optimization
659 21:14:24.210849 INFO : End of 2D write delay Voltage center optimization
660 21:14:24.260064 INFO : End of 2D write delay Voltage center optimization
661 21:14:24.265595 INFO : Training has run successfully!
662 21:14:24.266047
663 21:14:24.266470 channel==0
664 21:14:24.271206 RxClkDly_Margin_A0==78 ps 8
665 21:14:24.271655 TxDqDly_Margin_A0==98 ps 10
666 21:14:24.276970 RxClkDly_Margin_A1==88 ps 9
667 21:14:24.277428 TxDqDly_Margin_A1==98 ps 10
668 21:14:24.277850 TrainedVREFDQ_A0==74
669 21:14:24.282414 TrainedVREFDQ_A1==74
670 21:14:24.282864 VrefDac_Margin_A0==23
671 21:14:24.283280 DeviceVref_Margin_A0==40
672 21:14:24.288033 VrefDac_Margin_A1==23
673 21:14:24.288492 DeviceVref_Margin_A1==40
674 21:14:24.288905
675 21:14:24.289325
676 21:14:24.293603 channel==1
677 21:14:24.294059 RxClkDly_Margin_A0==88 ps 9
678 21:14:24.294477 TxDqDly_Margin_A0==98 ps 10
679 21:14:24.299172 RxClkDly_Margin_A1==78 ps 8
680 21:14:24.299640 TxDqDly_Margin_A1==78 ps 8
681 21:14:24.304893 TrainedVREFDQ_A0==78
682 21:14:24.305362 TrainedVREFDQ_A1==75
683 21:14:24.305789 VrefDac_Margin_A0==22
684 21:14:24.310394 DeviceVref_Margin_A0==36
685 21:14:24.310847 VrefDac_Margin_A1==22
686 21:14:24.316069 DeviceVref_Margin_A1==38
687 21:14:24.316525
688 21:14:24.316945 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
689 21:14:24.317360
690 21:14:24.349766 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
691 21:14:24.350250 2D training succeed
692 21:14:24.355211 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
693 21:14:24.360783 auto size-- 65535DDR cs0 size: 2048MB
694 21:14:24.361240 DDR cs1 size: 2048MB
695 21:14:24.366269 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
696 21:14:24.366724 cs0 DataBus test pass
697 21:14:24.371860 cs1 DataBus test pass
698 21:14:24.372349 cs0 AddrBus test pass
699 21:14:24.372767 cs1 AddrBus test pass
700 21:14:24.373174
701 21:14:24.377471 100bdlr_step_size ps== 478
702 21:14:24.377939 result report
703 21:14:24.383045 boot times 0Enable ddr reg access
704 21:14:24.388329 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
705 21:14:24.402156 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
706 21:14:25.057215 bl2z: ptr: 05129330, size: 00001e40
707 21:14:25.064528 0.0;M3 CHK:0;cm4_sp_mode 0
708 21:14:25.065096 MVN_1=0x00000000
709 21:14:25.065504 MVN_2=0x00000000
710 21:14:25.075955 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
711 21:14:25.076462 OPS=0x04
712 21:14:25.076868 ring efuse init
713 21:14:25.078909 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
714 21:14:25.085029 [0.017319 Inits done]
715 21:14:25.085491 secure task start!
716 21:14:25.085888 high task start!
717 21:14:25.086277 low task start!
718 21:14:25.089352 run into bl31
719 21:14:25.097978 NOTICE: BL31: v1.3(release):4fc40b1
720 21:14:25.105841 NOTICE: BL31: Built : 15:57:33, May 22 2019
721 21:14:25.106380 NOTICE: BL31: G12A normal boot!
722 21:14:25.121310 NOTICE: BL31: BL33 decompress pass
723 21:14:25.127063 ERROR: Error initializing runtime service opteed_fast
724 21:14:25.922458
725 21:14:25.923063
726 21:14:25.927862 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
727 21:14:25.928460
728 21:14:25.931368 Model: Libre Computer AML-S905D3-CC Solitude
729 21:14:26.078368 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
730 21:14:26.093716 DRAM: 2 GiB (effective 3.8 GiB)
731 21:14:26.194788 Core: 406 devices, 33 uclasses, devicetree: separate
732 21:14:26.200623 WDT: Not starting watchdog@f0d0
733 21:14:26.225723 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
734 21:14:26.237857 Loading Environment from FAT... Card did not respond to voltage select! : -110
735 21:14:26.242858 ** Bad device specification mmc 0 **
736 21:14:26.252920 Card did not respond to voltage select! : -110
737 21:14:26.260545 ** Bad device specification mmc 0 **
738 21:14:26.261086 Couldn't find partition mmc 0
739 21:14:26.268872 Card did not respond to voltage select! : -110
740 21:14:26.274375 ** Bad device specification mmc 0 **
741 21:14:26.274854 Couldn't find partition mmc 0
742 21:14:26.278870 Error: could not access storage.
743 21:14:26.577119 Net: eth0: ethernet@ff3f0000
744 21:14:26.577556 starting USB...
745 21:14:26.821657 Bus usb@ff500000: Register 3000140 NbrPorts 3
746 21:14:26.822230 Starting the controller
747 21:14:26.827713 USB XHCI 1.10
748 21:14:28.382810 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
749 21:14:28.391153 scanning usb for storage devices... 0 Storage Device(s) found
751 21:14:28.442303 Hit any key to stop autoboot: 1
752 21:14:28.443196 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
753 21:14:28.443593 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
754 21:14:28.443860 Setting prompt string to ['=>']
755 21:14:28.444150 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
756 21:14:28.457165 0
757 21:14:28.457803 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
759 21:14:28.558803 => setenv autoload no
760 21:14:28.559605 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
761 21:14:28.563647 setenv autoload no
763 21:14:28.664732 => setenv initrd_high 0xffffffff
764 21:14:28.665443 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
765 21:14:28.669571 setenv initrd_high 0xffffffff
767 21:14:28.770631 => setenv fdt_high 0xffffffff
768 21:14:28.771396 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
769 21:14:28.775548 setenv fdt_high 0xffffffff
771 21:14:28.876725 => dhcp
772 21:14:28.877276 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
773 21:14:28.881187 dhcp
774 21:14:29.486978 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
775 21:14:29.487541 Speed: 1000, full duplex
776 21:14:29.487809 BOOTP broadcast 1
777 21:14:29.735890 BOOTP broadcast 2
778 21:14:30.236807 BOOTP broadcast 3
779 21:14:31.237626 BOOTP broadcast 4
780 21:14:33.238677 BOOTP broadcast 5
781 21:14:33.251307 DHCP client bound to address 192.168.6.12 (3764 ms)
783 21:14:33.352945 => setenv serverip 192.168.6.2
784 21:14:33.353946 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
785 21:14:33.358516 setenv serverip 192.168.6.2
787 21:14:33.460101 => tftpboot 0x01080000 682765/tftp-deploy-wpnw888b/kernel/uImage
788 21:14:33.461096 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
789 21:14:33.467912 tftpboot 0x01080000 682765/tftp-deploy-wpnw888b/kernel/uImage
790 21:14:33.468512 Speed: 1000, full duplex
791 21:14:33.468982 Using ethernet@ff3f0000 device
792 21:14:33.473713 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
793 21:14:33.478883 Filename '682765/tftp-deploy-wpnw888b/kernel/uImage'.
794 21:14:33.482658 Load address: 0x1080000
795 21:14:35.817593 Loading: *################################################## 35.7 MiB
796 21:14:35.818033 15.3 MiB/s
797 21:14:35.818255 done
798 21:14:35.821937 Bytes transferred = 37409344 (23ad240 hex)
800 21:14:35.922972 => tftpboot 0x08000000 682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot
801 21:14:35.923521 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
802 21:14:35.930184 tftpboot 0x08000000 682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot
803 21:14:35.930474 Speed: 1000, full duplex
804 21:14:35.930686 Using ethernet@ff3f0000 device
805 21:14:35.935685 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
806 21:14:35.945397 Filename '682765/tftp-deploy-wpnw888b/ramdisk/ramdisk.cpio.gz.uboot'.
807 21:14:35.945704 Load address: 0x8000000
808 21:14:39.804473 Loading: *############################################### UDP wrong checksum 00000005 0000d687
809 21:14:40.012673 ## UDP wrong checksum 0000000f 00000b9c
810 21:14:45.013603 T UDP wrong checksum 0000000f 00000b9c
811 21:14:55.015692 T T UDP wrong checksum 0000000f 00000b9c
812 21:15:15.015248 T T T UDP wrong checksum 000000ff 0000a2c2
813 21:15:15.018665 T UDP wrong checksum 0000000f 00000b9c
814 21:15:15.044247 UDP wrong checksum 000000ff 000029b5
815 21:15:35.023270 T T T
816 21:15:35.023915 Retry count exceeded; starting again
818 21:15:35.025543 end: 2.4.3 bootloader-commands (duration 00:01:07) [common]
821 21:15:35.027600 end: 2.4 uboot-commands (duration 00:01:26) [common]
823 21:15:35.029232 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
825 21:15:35.030421 end: 2 uboot-action (duration 00:01:26) [common]
827 21:15:35.032142 Cleaning after the job
828 21:15:35.032748 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/ramdisk
829 21:15:35.034201 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/kernel
830 21:15:35.076713 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/dtb
831 21:15:35.077574 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682765/tftp-deploy-wpnw888b/modules
832 21:15:35.096897 start: 4.1 power-off (timeout 00:00:30) [common]
833 21:15:35.097522 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
834 21:15:35.129233 >> OK - accepted request
835 21:15:35.130986 Returned 0 in 0 seconds
836 21:15:35.231678 end: 4.1 power-off (duration 00:00:00) [common]
838 21:15:35.232594 start: 4.2 read-feedback (timeout 00:10:00) [common]
839 21:15:35.233239 Listened to connection for namespace 'common' for up to 1s
840 21:15:36.234229 Finalising connection for namespace 'common'
841 21:15:36.235010 Disconnecting from shell: Finalise
842 21:15:36.235579 =>
843 21:15:36.336692 end: 4.2 read-feedback (duration 00:00:01) [common]
844 21:15:36.337405 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/682765
845 21:15:37.099301 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/682765
846 21:15:37.099911 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.