Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:28:28.447113 lava-dispatcher, installed at version: 2024.01
2 21:28:28.447880 start: 0 validate
3 21:28:28.448383 Start time: 2024-08-31 21:28:28.448353+00:00 (UTC)
4 21:28:28.448916 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:28:28.449441 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:28:28.489449 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:28:28.489993 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:28:28.521432 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:28:28.522352 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:28:28.554447 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:28:28.555164 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:28:28.586130 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:28:28.586571 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-310-ge8784b0aef62c%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 21:28:28.628117 validate duration: 0.18
16 21:28:28.629579 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:28:28.630209 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:28:28.630788 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:28:28.631902 Not decompressing ramdisk as can be used compressed.
20 21:28:28.632765 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 21:28:28.633292 saving as /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/ramdisk/initrd.cpio.gz
22 21:28:28.633831 total size: 5628169 (5 MB)
23 21:28:28.673112 progress 0 % (0 MB)
24 21:28:28.680915 progress 5 % (0 MB)
25 21:28:28.688989 progress 10 % (0 MB)
26 21:28:28.696204 progress 15 % (0 MB)
27 21:28:28.704218 progress 20 % (1 MB)
28 21:28:28.708055 progress 25 % (1 MB)
29 21:28:28.712201 progress 30 % (1 MB)
30 21:28:28.716342 progress 35 % (1 MB)
31 21:28:28.720220 progress 40 % (2 MB)
32 21:28:28.724334 progress 45 % (2 MB)
33 21:28:28.728080 progress 50 % (2 MB)
34 21:28:28.732256 progress 55 % (2 MB)
35 21:28:28.736316 progress 60 % (3 MB)
36 21:28:28.740031 progress 65 % (3 MB)
37 21:28:28.744203 progress 70 % (3 MB)
38 21:28:28.748005 progress 75 % (4 MB)
39 21:28:28.752162 progress 80 % (4 MB)
40 21:28:28.755844 progress 85 % (4 MB)
41 21:28:28.760075 progress 90 % (4 MB)
42 21:28:28.764086 progress 95 % (5 MB)
43 21:28:28.767424 progress 100 % (5 MB)
44 21:28:28.768108 5 MB downloaded in 0.13 s (39.98 MB/s)
45 21:28:28.768678 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:28:28.769625 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:28:28.769947 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:28:28.770245 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:28:28.770742 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/gcc-12/kernel/Image
51 21:28:28.771011 saving as /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/kernel/Image
52 21:28:28.771235 total size: 45308416 (43 MB)
53 21:28:28.771458 No compression specified
54 21:28:28.805431 progress 0 % (0 MB)
55 21:28:28.834776 progress 5 % (2 MB)
56 21:28:28.864258 progress 10 % (4 MB)
57 21:28:28.893358 progress 15 % (6 MB)
58 21:28:28.921934 progress 20 % (8 MB)
59 21:28:28.950609 progress 25 % (10 MB)
60 21:28:28.978982 progress 30 % (12 MB)
61 21:28:29.007764 progress 35 % (15 MB)
62 21:28:29.037231 progress 40 % (17 MB)
63 21:28:29.066460 progress 45 % (19 MB)
64 21:28:29.095226 progress 50 % (21 MB)
65 21:28:29.123763 progress 55 % (23 MB)
66 21:28:29.152810 progress 60 % (25 MB)
67 21:28:29.182091 progress 65 % (28 MB)
68 21:28:29.210917 progress 70 % (30 MB)
69 21:28:29.240267 progress 75 % (32 MB)
70 21:28:29.269473 progress 80 % (34 MB)
71 21:28:29.298363 progress 85 % (36 MB)
72 21:28:29.327277 progress 90 % (38 MB)
73 21:28:29.356309 progress 95 % (41 MB)
74 21:28:29.385048 progress 100 % (43 MB)
75 21:28:29.385734 43 MB downloaded in 0.61 s (70.32 MB/s)
76 21:28:29.386217 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:28:29.387048 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:28:29.387325 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:28:29.387594 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:28:29.388090 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 21:28:29.388374 saving as /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 21:28:29.388584 total size: 53173 (0 MB)
84 21:28:29.388795 No compression specified
85 21:28:29.425556 progress 61 % (0 MB)
86 21:28:29.426403 progress 100 % (0 MB)
87 21:28:29.426937 0 MB downloaded in 0.04 s (1.32 MB/s)
88 21:28:29.427417 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:28:29.428277 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:28:29.428545 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:28:29.428811 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:28:29.429265 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 21:28:29.429513 saving as /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/nfsrootfs/full.rootfs.tar
95 21:28:29.429718 total size: 120894716 (115 MB)
96 21:28:29.429928 Using unxz to decompress xz
97 21:28:29.466645 progress 0 % (0 MB)
98 21:28:30.249785 progress 5 % (5 MB)
99 21:28:31.077030 progress 10 % (11 MB)
100 21:28:31.864482 progress 15 % (17 MB)
101 21:28:32.596594 progress 20 % (23 MB)
102 21:28:33.280545 progress 25 % (28 MB)
103 21:28:34.193545 progress 30 % (34 MB)
104 21:28:34.978846 progress 35 % (40 MB)
105 21:28:35.322658 progress 40 % (46 MB)
106 21:28:35.713644 progress 45 % (51 MB)
107 21:28:36.423953 progress 50 % (57 MB)
108 21:28:37.299664 progress 55 % (63 MB)
109 21:28:38.177964 progress 60 % (69 MB)
110 21:28:38.929360 progress 65 % (74 MB)
111 21:28:39.700746 progress 70 % (80 MB)
112 21:28:40.523187 progress 75 % (86 MB)
113 21:28:41.305058 progress 80 % (92 MB)
114 21:28:42.062410 progress 85 % (98 MB)
115 21:28:42.905787 progress 90 % (103 MB)
116 21:28:43.671240 progress 95 % (109 MB)
117 21:28:44.559902 progress 100 % (115 MB)
118 21:28:44.572314 115 MB downloaded in 15.14 s (7.61 MB/s)
119 21:28:44.573014 end: 1.4.1 http-download (duration 00:00:15) [common]
121 21:28:44.574646 end: 1.4 download-retry (duration 00:00:15) [common]
122 21:28:44.575171 start: 1.5 download-retry (timeout 00:09:44) [common]
123 21:28:44.575696 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 21:28:44.576786 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/gcc-12/modules.tar.xz
125 21:28:44.577270 saving as /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/modules/modules.tar
126 21:28:44.577687 total size: 11508472 (10 MB)
127 21:28:44.578110 Using unxz to decompress xz
128 21:28:44.618930 progress 0 % (0 MB)
129 21:28:44.687515 progress 5 % (0 MB)
130 21:28:44.764273 progress 10 % (1 MB)
131 21:28:44.845975 progress 15 % (1 MB)
132 21:28:44.926421 progress 20 % (2 MB)
133 21:28:45.003496 progress 25 % (2 MB)
134 21:28:45.084749 progress 30 % (3 MB)
135 21:28:45.158632 progress 35 % (3 MB)
136 21:28:45.236952 progress 40 % (4 MB)
137 21:28:45.312363 progress 45 % (4 MB)
138 21:28:45.386061 progress 50 % (5 MB)
139 21:28:45.461596 progress 55 % (6 MB)
140 21:28:45.540224 progress 60 % (6 MB)
141 21:28:45.625403 progress 65 % (7 MB)
142 21:28:45.702212 progress 70 % (7 MB)
143 21:28:45.796910 progress 75 % (8 MB)
144 21:28:45.885873 progress 80 % (8 MB)
145 21:28:45.966753 progress 85 % (9 MB)
146 21:28:46.041299 progress 90 % (9 MB)
147 21:28:46.112611 progress 95 % (10 MB)
148 21:28:46.188625 progress 100 % (10 MB)
149 21:28:46.199087 10 MB downloaded in 1.62 s (6.77 MB/s)
150 21:28:46.199656 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:28:46.201214 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:28:46.201796 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 21:28:46.202367 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 21:29:03.308344 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/682844/extract-nfsrootfs-zn3m8j6x
156 21:29:03.308953 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 21:29:03.309240 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 21:29:03.309874 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c
159 21:29:03.310296 makedir: /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin
160 21:29:03.310632 makedir: /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/tests
161 21:29:03.310981 makedir: /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/results
162 21:29:03.311321 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-add-keys
163 21:29:03.311850 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-add-sources
164 21:29:03.312381 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-background-process-start
165 21:29:03.312874 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-background-process-stop
166 21:29:03.313385 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-common-functions
167 21:29:03.313869 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-echo-ipv4
168 21:29:03.314344 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-install-packages
169 21:29:03.314853 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-installed-packages
170 21:29:03.315357 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-os-build
171 21:29:03.315840 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-probe-channel
172 21:29:03.316447 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-probe-ip
173 21:29:03.316937 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-target-ip
174 21:29:03.317406 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-target-mac
175 21:29:03.317877 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-target-storage
176 21:29:03.318358 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-case
177 21:29:03.318851 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-event
178 21:29:03.319336 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-feedback
179 21:29:03.319809 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-raise
180 21:29:03.320323 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-reference
181 21:29:03.320803 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-runner
182 21:29:03.321278 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-set
183 21:29:03.321744 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-test-shell
184 21:29:03.322224 Updating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-add-keys (debian)
185 21:29:03.322746 Updating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-add-sources (debian)
186 21:29:03.323240 Updating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-install-packages (debian)
187 21:29:03.323732 Updating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-installed-packages (debian)
188 21:29:03.324242 Updating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/bin/lava-os-build (debian)
189 21:29:03.324677 Creating /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/environment
190 21:29:03.325042 LAVA metadata
191 21:29:03.325298 - LAVA_JOB_ID=682844
192 21:29:03.325513 - LAVA_DISPATCHER_IP=192.168.6.2
193 21:29:03.325868 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 21:29:03.326835 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 21:29:03.327148 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 21:29:03.327355 skipped lava-vland-overlay
197 21:29:03.327598 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 21:29:03.327851 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 21:29:03.328093 skipped lava-multinode-overlay
200 21:29:03.328340 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 21:29:03.328593 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 21:29:03.328840 Loading test definitions
203 21:29:03.329113 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 21:29:03.329333 Using /lava-682844 at stage 0
205 21:29:03.330377 uuid=682844_1.6.2.4.1 testdef=None
206 21:29:03.330671 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 21:29:03.330933 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 21:29:03.332512 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 21:29:03.333303 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 21:29:03.335252 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 21:29:03.336096 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 21:29:03.337899 runner path: /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/0/tests/0_timesync-off test_uuid 682844_1.6.2.4.1
215 21:29:03.338427 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 21:29:03.339234 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 21:29:03.339455 Using /lava-682844 at stage 0
219 21:29:03.339802 Fetching tests from https://github.com/kernelci/test-definitions.git
220 21:29:03.340132 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/0/tests/1_kselftest-alsa'
221 21:29:06.709724 Running '/usr/bin/git checkout kernelci.org
222 21:29:07.158722 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 21:29:07.161526 uuid=682844_1.6.2.4.5 testdef=None
224 21:29:07.162196 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 21:29:07.163825 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 21:29:07.169869 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 21:29:07.171618 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 21:29:07.179568 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 21:29:07.181447 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 21:29:07.189171 runner path: /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/0/tests/1_kselftest-alsa test_uuid 682844_1.6.2.4.5
234 21:29:07.189760 BOARD='meson-sm1-s905d3-libretech-cc'
235 21:29:07.190207 BRANCH='mainline'
236 21:29:07.190643 SKIPFILE='/dev/null'
237 21:29:07.191075 SKIP_INSTALL='True'
238 21:29:07.191505 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc5-310-ge8784b0aef62c/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 21:29:07.191946 TST_CASENAME=''
240 21:29:07.192416 TST_CMDFILES='alsa'
241 21:29:07.193535 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 21:29:07.195233 Creating lava-test-runner.conf files
244 21:29:07.195677 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/682844/lava-overlay-zcg2yx5c/lava-682844/0 for stage 0
245 21:29:07.196405 - 0_timesync-off
246 21:29:07.196908 - 1_kselftest-alsa
247 21:29:07.197590 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 21:29:07.198177 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 21:29:30.496476 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 21:29:30.496910 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 21:29:30.497178 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 21:29:30.497451 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 21:29:30.497718 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 21:29:31.189738 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 21:29:31.190175 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 21:29:31.190426 extracting modules file /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/682844/extract-nfsrootfs-zn3m8j6x
257 21:29:32.537376 extracting modules file /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/682844/extract-overlay-ramdisk-52axdkt8/ramdisk
258 21:29:33.921398 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 21:29:33.921865 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 21:29:33.922145 [common] Applying overlay to NFS
261 21:29:33.922359 [common] Applying overlay /var/lib/lava/dispatcher/tmp/682844/compress-overlay-6dxf5jkq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/682844/extract-nfsrootfs-zn3m8j6x
262 21:29:36.663745 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 21:29:36.664259 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 21:29:36.664543 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 21:29:36.664777 Converting downloaded kernel to a uImage
266 21:29:36.665089 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/kernel/Image /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/kernel/uImage
267 21:29:37.113401 output: Image Name:
268 21:29:37.113794 output: Created: Sat Aug 31 21:29:36 2024
269 21:29:37.114003 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 21:29:37.114207 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
271 21:29:37.114410 output: Load Address: 01080000
272 21:29:37.114610 output: Entry Point: 01080000
273 21:29:37.114808 output:
274 21:29:37.115139 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 21:29:37.115411 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 21:29:37.115682 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 21:29:37.115940 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 21:29:37.116244 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 21:29:37.116507 Building ramdisk /var/lib/lava/dispatcher/tmp/682844/extract-overlay-ramdisk-52axdkt8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/682844/extract-overlay-ramdisk-52axdkt8/ramdisk
280 21:29:39.250812 >> 165159 blocks
281 21:29:47.282896 Adding RAMdisk u-boot header.
282 21:29:47.283345 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/682844/extract-overlay-ramdisk-52axdkt8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/682844/extract-overlay-ramdisk-52axdkt8/ramdisk.cpio.gz.uboot
283 21:29:47.558324 output: Image Name:
284 21:29:47.558815 output: Created: Sat Aug 31 21:29:47 2024
285 21:29:47.559045 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 21:29:47.559260 output: Data Size: 23258473 Bytes = 22713.35 KiB = 22.18 MiB
287 21:29:47.559469 output: Load Address: 00000000
288 21:29:47.559717 output: Entry Point: 00000000
289 21:29:47.559949 output:
290 21:29:47.560628 rename /var/lib/lava/dispatcher/tmp/682844/extract-overlay-ramdisk-52axdkt8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot
291 21:29:47.561067 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 21:29:47.561368 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 21:29:47.561654 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 21:29:47.561980 No LXC device requested
295 21:29:47.562267 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 21:29:47.562542 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 21:29:47.562805 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 21:29:47.563068 Checking files for TFTP limit of 4294967296 bytes.
299 21:29:47.564648 end: 1 tftp-deploy (duration 00:01:19) [common]
300 21:29:47.564980 start: 2 uboot-action (timeout 00:05:00) [common]
301 21:29:47.565263 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 21:29:47.565526 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 21:29:47.565792 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 21:29:47.566103 Using kernel file from prepare-kernel: 682844/tftp-deploy-chj3dmo6/kernel/uImage
305 21:29:47.566443 substitutions:
306 21:29:47.566663 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 21:29:47.566871 - {DTB_ADDR}: 0x01070000
308 21:29:47.567147 - {DTB}: 682844/tftp-deploy-chj3dmo6/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 21:29:47.567429 - {INITRD}: 682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot
310 21:29:47.567650 - {KERNEL_ADDR}: 0x01080000
311 21:29:47.567855 - {KERNEL}: 682844/tftp-deploy-chj3dmo6/kernel/uImage
312 21:29:47.568076 - {LAVA_MAC}: None
313 21:29:47.568306 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/682844/extract-nfsrootfs-zn3m8j6x
314 21:29:47.568529 - {NFS_SERVER_IP}: 192.168.6.2
315 21:29:47.568731 - {PRESEED_CONFIG}: None
316 21:29:47.568934 - {PRESEED_LOCAL}: None
317 21:29:47.569134 - {RAMDISK_ADDR}: 0x08000000
318 21:29:47.569332 - {RAMDISK}: 682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot
319 21:29:47.569593 - {ROOT_PART}: None
320 21:29:47.569802 - {ROOT}: None
321 21:29:47.570005 - {SERVER_IP}: 192.168.6.2
322 21:29:47.570204 - {TEE_ADDR}: 0x83000000
323 21:29:47.570402 - {TEE}: None
324 21:29:47.570597 Parsed boot commands:
325 21:29:47.570825 - setenv autoload no
326 21:29:47.571035 - setenv initrd_high 0xffffffff
327 21:29:47.571236 - setenv fdt_high 0xffffffff
328 21:29:47.571433 - dhcp
329 21:29:47.571629 - setenv serverip 192.168.6.2
330 21:29:47.571827 - tftpboot 0x01080000 682844/tftp-deploy-chj3dmo6/kernel/uImage
331 21:29:47.572046 - tftpboot 0x08000000 682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot
332 21:29:47.572250 - tftpboot 0x01070000 682844/tftp-deploy-chj3dmo6/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 21:29:47.572450 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/682844/extract-nfsrootfs-zn3m8j6x,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 21:29:47.572709 - bootm 0x01080000 0x08000000 0x01070000
335 21:29:47.572982 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 21:29:47.573812 start: 2.3 connect-device (timeout 00:05:00) [common]
338 21:29:47.574050 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 21:29:47.586325 Setting prompt string to ['lava-test: # ']
340 21:29:47.587312 end: 2.3 connect-device (duration 00:00:00) [common]
341 21:29:47.587656 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 21:29:47.588063 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 21:29:47.588360 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 21:29:47.589039 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 21:29:47.622769 >> OK - accepted request
346 21:29:47.624859 Returned 0 in 0 seconds
347 21:29:47.725651 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 21:29:47.726788 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 21:29:47.727123 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 21:29:47.727504 Setting prompt string to ['Hit any key to stop autoboot']
352 21:29:47.727777 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 21:29:47.728787 Trying 192.168.56.21...
354 21:29:47.729165 Connected to conserv1.
355 21:29:47.729395 Escape character is '^]'.
356 21:29:47.729628
357 21:29:47.729860 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 21:29:47.730089
359 21:29:55.063381 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 21:29:55.064161 bl2_stage_init 0x01
361 21:29:55.064645 bl2_stage_init 0x81
362 21:29:55.068849 hw id: 0x0000 - pwm id 0x01
363 21:29:55.069372 bl2_stage_init 0xc1
364 21:29:55.074431 bl2_stage_init 0x02
365 21:29:55.074994
366 21:29:55.075467 L0:00000000
367 21:29:55.076016 L1:00000703
368 21:29:55.076487 L2:00008067
369 21:29:55.076931 L3:15000000
370 21:29:55.080069 S1:00000000
371 21:29:55.080573 B2:20282000
372 21:29:55.081093 B1:a0f83180
373 21:29:55.081532
374 21:29:55.082033 TE: 69143
375 21:29:55.082526
376 21:29:55.085596 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 21:29:55.086083
378 21:29:55.091402 Board ID = 1
379 21:29:55.091886 Set cpu clk to 24M
380 21:29:55.092357 Set clk81 to 24M
381 21:29:55.096781 Use GP1_pll as DSU clk.
382 21:29:55.097319 DSU clk: 1200 Mhz
383 21:29:55.097772 CPU clk: 1200 MHz
384 21:29:55.102445 Set clk81 to 166.6M
385 21:29:55.108037 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 21:29:55.108527 board id: 1
387 21:29:55.115263 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 21:29:55.125857 fw parse done
389 21:29:55.131865 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 21:29:55.174429 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 21:29:55.185395 PIEI prepare done
392 21:29:55.185911 fastboot data load
393 21:29:55.186453 fastboot data verify
394 21:29:55.190930 verify result: 266
395 21:29:55.196556 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 21:29:55.197065 LPDDR4 probe
397 21:29:55.197507 ddr clk to 1584MHz
398 21:29:55.204545 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 21:29:55.241798
400 21:29:55.242366 dmc_version 0001
401 21:29:55.248440 Check phy result
402 21:29:55.254327 INFO : End of CA training
403 21:29:55.254829 INFO : End of initialization
404 21:29:55.259917 INFO : Training has run successfully!
405 21:29:55.260460 Check phy result
406 21:29:55.265567 INFO : End of initialization
407 21:29:55.266070 INFO : End of read enable training
408 21:29:55.271252 INFO : End of fine write leveling
409 21:29:55.276770 INFO : End of Write leveling coarse delay
410 21:29:55.277352 INFO : Training has run successfully!
411 21:29:55.277804 Check phy result
412 21:29:55.282357 INFO : End of initialization
413 21:29:55.282928 INFO : End of read dq deskew training
414 21:29:55.287968 INFO : End of MPR read delay center optimization
415 21:29:55.293547 INFO : End of write delay center optimization
416 21:29:55.299253 INFO : End of read delay center optimization
417 21:29:55.299766 INFO : End of max read latency training
418 21:29:55.304786 INFO : Training has run successfully!
419 21:29:55.305316 1D training succeed
420 21:29:55.313955 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 21:29:55.361642 Check phy result
422 21:29:55.362191 INFO : End of initialization
423 21:29:55.383899 INFO : End of 2D read delay Voltage center optimization
424 21:29:55.403077 INFO : End of 2D read delay Voltage center optimization
425 21:29:55.455019 INFO : End of 2D write delay Voltage center optimization
426 21:29:55.504793 INFO : End of 2D write delay Voltage center optimization
427 21:29:55.509835 INFO : Training has run successfully!
428 21:29:55.510435
429 21:29:55.511013 channel==0
430 21:29:55.515395 RxClkDly_Margin_A0==78 ps 8
431 21:29:55.515754 TxDqDly_Margin_A0==88 ps 9
432 21:29:55.521027 RxClkDly_Margin_A1==88 ps 9
433 21:29:55.521656 TxDqDly_Margin_A1==88 ps 9
434 21:29:55.521971 TrainedVREFDQ_A0==74
435 21:29:55.526495 TrainedVREFDQ_A1==74
436 21:29:55.527058 VrefDac_Margin_A0==23
437 21:29:55.527472 DeviceVref_Margin_A0==40
438 21:29:55.532042 VrefDac_Margin_A1==22
439 21:29:55.532593 DeviceVref_Margin_A1==40
440 21:29:55.533007
441 21:29:55.533425
442 21:29:55.533845 channel==1
443 21:29:55.537623 RxClkDly_Margin_A0==88 ps 9
444 21:29:55.538113 TxDqDly_Margin_A0==98 ps 10
445 21:29:55.543269 RxClkDly_Margin_A1==78 ps 8
446 21:29:55.543698 TxDqDly_Margin_A1==88 ps 9
447 21:29:55.548817 TrainedVREFDQ_A0==78
448 21:29:55.549223 TrainedVREFDQ_A1==75
449 21:29:55.549453 VrefDac_Margin_A0==22
450 21:29:55.554453 DeviceVref_Margin_A0==36
451 21:29:55.555020 VrefDac_Margin_A1==22
452 21:29:55.555436 DeviceVref_Margin_A1==39
453 21:29:55.560105
454 21:29:55.560650 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 21:29:55.561060
456 21:29:55.593661 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 21:29:55.594336 2D training succeed
458 21:29:55.599379 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 21:29:55.604846 auto size-- 65535DDR cs0 size: 2048MB
460 21:29:55.605352 DDR cs1 size: 2048MB
461 21:29:55.610470 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 21:29:55.610985 cs0 DataBus test pass
463 21:29:55.616087 cs1 DataBus test pass
464 21:29:55.616607 cs0 AddrBus test pass
465 21:29:55.617016 cs1 AddrBus test pass
466 21:29:55.617412
467 21:29:55.621666 100bdlr_step_size ps== 478
468 21:29:55.622202 result report
469 21:29:55.627393 boot times 0Enable ddr reg access
470 21:29:55.631490 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 21:29:55.646125 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 21:29:56.300637 bl2z: ptr: 05129330, size: 00001e40
473 21:29:56.308050 0.0;M3 CHK:0;cm4_sp_mode 0
474 21:29:56.308550 MVN_1=0x00000000
475 21:29:56.308955 MVN_2=0x00000000
476 21:29:56.319472 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 21:29:56.319949 OPS=0x04
478 21:29:56.320383 ring efuse init
479 21:29:56.325128 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 21:29:56.325603 [0.017319 Inits done]
481 21:29:56.326008 secure task start!
482 21:29:56.332803 high task start!
483 21:29:56.333268 low task start!
484 21:29:56.333667 run into bl31
485 21:29:56.341392 NOTICE: BL31: v1.3(release):4fc40b1
486 21:29:56.349210 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 21:29:56.349674 NOTICE: BL31: G12A normal boot!
488 21:29:56.364753 NOTICE: BL31: BL33 decompress pass
489 21:29:56.370462 ERROR: Error initializing runtime service opteed_fast
490 21:29:57.617111 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 21:29:57.617698 bl2_stage_init 0x01
492 21:29:57.618109 bl2_stage_init 0x81
493 21:29:57.622741 hw id: 0x0000 - pwm id 0x01
494 21:29:57.623216 bl2_stage_init 0xc1
495 21:29:57.628319 bl2_stage_init 0x02
496 21:29:57.628782
497 21:29:57.629198 L0:00000000
498 21:29:57.629606 L1:00000703
499 21:29:57.630005 L2:00008067
500 21:29:57.630401 L3:15000000
501 21:29:57.633932 S1:00000000
502 21:29:57.634395 B2:20282000
503 21:29:57.634800 B1:a0f83180
504 21:29:57.635197
505 21:29:57.635594 TE: 71500
506 21:29:57.636023
507 21:29:57.639545 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 21:29:57.640032
509 21:29:57.645123 Board ID = 1
510 21:29:57.645598 Set cpu clk to 24M
511 21:29:57.646010 Set clk81 to 24M
512 21:29:57.650722 Use GP1_pll as DSU clk.
513 21:29:57.651186 DSU clk: 1200 Mhz
514 21:29:57.651597 CPU clk: 1200 MHz
515 21:29:57.656296 Set clk81 to 166.6M
516 21:29:57.661911 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 21:29:57.662375 board id: 1
518 21:29:57.669098 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 21:29:57.680047 fw parse done
520 21:29:57.685008 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 21:29:57.729072 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 21:29:57.740300 PIEI prepare done
523 21:29:57.740775 fastboot data load
524 21:29:57.741200 fastboot data verify
525 21:29:57.745920 verify result: 266
526 21:29:57.753726 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 21:29:57.754213 LPDDR4 probe
528 21:29:57.754605 ddr clk to 1584MHz
529 21:29:59.112098 Load ddrfw from` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 21:29:59.112717 bl2_stage_init 0x01
531 21:29:59.113131 bl2_stage_init 0x81
532 21:29:59.117778 hw id: 0x0000 - pwm id 0x01
533 21:29:59.118256 bl2_stage_init 0xc1
534 21:29:59.123320 bl2_stage_init 0x02
535 21:29:59.123785
536 21:29:59.124228 L0:00000000
537 21:29:59.124625 L1:00000703
538 21:29:59.125018 L2:00008067
539 21:29:59.125406 L3:15000000
540 21:29:59.128870 S1:00000000
541 21:29:59.129330 B2:20282000
542 21:29:59.129726 B1:a0f83180
543 21:29:59.130120
544 21:29:59.130514 TE: 68105
545 21:29:59.130905
546 21:29:59.134495 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 21:29:59.134970
548 21:29:59.140101 Board ID = 1
549 21:29:59.140564 Set cpu clk to 24M
550 21:29:59.140962 Set clk81 to 24M
551 21:29:59.145757 Use GP1_pll as DSU clk.
552 21:29:59.146222 DSU clk: 1200 Mhz
553 21:29:59.146614 CPU clk: 1200 MHz
554 21:29:59.151268 Set clk81 to 166.6M
555 21:29:59.156876 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 21:29:59.157348 board id: 1
557 21:29:59.164107 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 21:29:59.174776 fw parse done
559 21:29:59.180748 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 21:29:59.223315 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 21:29:59.234336 PIEI prepare done
562 21:29:59.234810 fastboot data load
563 21:29:59.235212 fastboot data verify
564 21:29:59.239932 verify result: 266
565 21:29:59.245523 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 21:29:59.246001 LPDDR4 probe
567 21:29:59.246397 ddr clk to 1584MHz
568 21:29:59.253441 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 21:29:59.290724
570 21:29:59.291202 dmc_version 0001
571 21:29:59.297477 Check phy result
572 21:29:59.303335 INFO : End of CA training
573 21:29:59.303736 INFO : End of initialization
574 21:29:59.308918 INFO : Training has run successfully!
575 21:29:59.309280 Check phy result
576 21:29:59.314479 INFO : End of initialization
577 21:29:59.314755 INFO : End of read enable training
578 21:29:59.319993 INFO : End of fine write leveling
579 21:29:59.325727 INFO : End of Write leveling coarse delay
580 21:29:59.325997 INFO : Training has run successfully!
581 21:29:59.326204 Check phy result
582 21:29:59.331188 INFO : End of initialization
583 21:29:59.331457 INFO : End of read dq deskew training
584 21:29:59.336794 INFO : End of MPR read delay center optimization
585 21:29:59.342386 INFO : End of write delay center optimization
586 21:29:59.348019 INFO : End of read delay center optimization
587 21:29:59.348295 INFO : End of max read latency training
588 21:29:59.353584 INFO : Training has run successfully!
589 21:29:59.353855 1D training succeed
590 21:29:59.362754 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 21:29:59.410455 Check phy result
592 21:29:59.410756 INFO : End of initialization
593 21:29:59.432810 INFO : End of 2D read delay Voltage center optimization
594 21:29:59.451934 INFO : End of 2D read delay Voltage center optimization
595 21:29:59.503708 INFO : End of 2D write delay Voltage center optimization
596 21:29:59.552915 INFO : End of 2D write delay Voltage center optimization
597 21:29:59.558424 INFO : Training has run successfully!
598 21:29:59.558927
599 21:29:59.559380 channel==0
600 21:29:59.564041 RxClkDly_Margin_A0==78 ps 8
601 21:29:59.564543 TxDqDly_Margin_A0==98 ps 10
602 21:29:59.569712 RxClkDly_Margin_A1==88 ps 9
603 21:29:59.570220 TxDqDly_Margin_A1==88 ps 9
604 21:29:59.570684 TrainedVREFDQ_A0==75
605 21:29:59.575233 TrainedVREFDQ_A1==74
606 21:29:59.575732 VrefDac_Margin_A0==22
607 21:29:59.576214 DeviceVref_Margin_A0==39
608 21:29:59.580856 VrefDac_Margin_A1==23
609 21:29:59.581348 DeviceVref_Margin_A1==40
610 21:29:59.581792
611 21:29:59.582231
612 21:29:59.582666 channel==1
613 21:29:59.586428 RxClkDly_Margin_A0==88 ps 9
614 21:29:59.586922 TxDqDly_Margin_A0==98 ps 10
615 21:29:59.592039 RxClkDly_Margin_A1==78 ps 8
616 21:29:59.592525 TxDqDly_Margin_A1==88 ps 9
617 21:29:59.597719 TrainedVREFDQ_A0==78
618 21:29:59.598204 TrainedVREFDQ_A1==75
619 21:29:59.598651 VrefDac_Margin_A0==23
620 21:29:59.603208 DeviceVref_Margin_A0==36
621 21:29:59.603683 VrefDac_Margin_A1==22
622 21:29:59.608824 DeviceVref_Margin_A1==39
623 21:29:59.609309
624 21:29:59.609748 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 21:29:59.610184
626 21:29:59.642431 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
627 21:29:59.643000 2D training succeed
628 21:29:59.648044 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 21:29:59.653735 auto size-- 65535DDR cs0 size: 2048MB
630 21:29:59.654217 DDR cs1 size: 2048MB
631 21:29:59.659216 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 21:29:59.659699 cs0 DataBus test pass
633 21:29:59.664822 cs1 DataBus test pass
634 21:29:59.665308 cs0 AddrBus test pass
635 21:29:59.665744 cs1 AddrBus test pass
636 21:29:59.666175
637 21:29:59.670412 100bdlr_step_size ps== 478
638 21:29:59.670902 result report
639 21:29:59.676082 boot times 0Enable ddr reg access
640 21:29:59.680309 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 21:29:59.695036 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 21:30:00.349162 bl2z: ptr: 05129330, size: 00001e40
643 21:30:00.355194 0.0;M3 CHK:0;cm4_sp_mode 0
644 21:30:00.355747 MVN_1=0x00000000
645 21:30:00.356223 MVN_2=0x00000000
646 21:30:00.366799 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 21:30:00.367330 OPS=0x04
648 21:30:00.367739 ring efuse init
649 21:30:00.369627 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 21:30:00.375174 [0.017319 Inits done]
651 21:30:00.375681 secure task start!
652 21:30:00.376119 high task start!
653 21:30:00.376517 low task start!
654 21:30:00.380527 run into bl31
655 21:30:00.389108 NOTICE: BL31: v1.3(release):4fc40b1
656 21:30:00.396942 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 21:30:00.397438 NOTICE: BL31: G12A normal boot!
658 21:30:00.412420 NOTICE: BL31: BL33 decompress pass
659 21:30:00.418192 ERROR: Error initializing runtime service opteed_fast
660 21:30:01.664191 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 21:30:01.664799 bl2_stage_init 0x01
662 21:30:01.665237 bl2_stage_init 0x81
663 21:30:01.669808 hw id: 0x0000 - pwm id 0x01
664 21:30:01.670319 bl2_stage_init 0xc1
665 21:30:01.675372 bl2_stage_init 0x02
666 21:30:01.675876
667 21:30:01.676352 L0:00000000
668 21:30:01.676766 L1:00000703
669 21:30:01.677174 L2:00008067
670 21:30:01.677578 L3:15000000
671 21:30:01.680970 S1:00000000
672 21:30:01.681456 B2:20282000
673 21:30:01.681872 B1:a0f83180
674 21:30:01.682277
675 21:30:01.682687 TE: 69773
676 21:30:01.683095
677 21:30:01.686532 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 21:30:01.687028
679 21:30:01.692178 Board ID = 1
680 21:30:01.692680 Set cpu clk to 24M
681 21:30:01.693103 Set clk81 to 24M
682 21:30:01.697745 Use GP1_pll as DSU clk.
683 21:30:01.698234 DSU clk: 1200 Mhz
684 21:30:01.698657 CPU clk: 1200 MHz
685 21:30:01.703369 Set clk81 to 166.6M
686 21:30:01.708965 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 21:30:01.709464 board id: 1
688 21:30:01.716305 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 21:30:01.726829 fw parse done
690 21:30:01.732832 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 21:30:01.775414 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 21:30:01.786426 PIEI prepare done
693 21:30:01.786932 fastboot data load
694 21:30:01.787351 fastboot data verify
695 21:30:01.792070 verify result: 266
696 21:30:01.797605 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 21:30:01.798101 LPDDR4 probe
698 21:30:01.798526 ddr clk to 1584MHz
699 21:30:01.805660 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 21:30:01.842825
701 21:30:01.843327 dmc_version 0001
702 21:30:01.849577 Check phy result
703 21:30:01.855421 INFO : End of CA training
704 21:30:01.855915 INFO : End of initialization
705 21:30:01.861050 INFO : Training has run successfully!
706 21:30:01.861548 Check phy result
707 21:30:01.866658 INFO : End of initialization
708 21:30:01.867155 INFO : End of read enable training
709 21:30:01.872295 INFO : End of fine write leveling
710 21:30:01.877831 INFO : End of Write leveling coarse delay
711 21:30:01.878324 INFO : Training has run successfully!
712 21:30:01.878742 Check phy result
713 21:30:01.883431 INFO : End of initialization
714 21:30:01.883924 INFO : End of read dq deskew training
715 21:30:01.889080 INFO : End of MPR read delay center optimization
716 21:30:01.894628 INFO : End of write delay center optimization
717 21:30:01.900315 INFO : End of read delay center optimization
718 21:30:01.900809 INFO : End of max read latency training
719 21:30:01.905854 INFO : Training has run successfully!
720 21:30:01.906363 1D training succeed
721 21:30:01.915087 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 21:30:01.962637 Check phy result
723 21:30:01.963188 INFO : End of initialization
724 21:30:01.984964 INFO : End of 2D read delay Voltage center optimization
725 21:30:02.003218 INFO : End of 2D read delay Voltage center optimization
726 21:30:02.056077 INFO : End of 2D write delay Voltage center optimization
727 21:30:02.105239 INFO : End of 2D write delay Voltage center optimization
728 21:30:02.110684 INFO : Training has run successfully!
729 21:30:02.111184
730 21:30:02.111608 channel==0
731 21:30:02.116323 RxClkDly_Margin_A0==88 ps 9
732 21:30:02.116817 TxDqDly_Margin_A0==98 ps 10
733 21:30:02.121901 RxClkDly_Margin_A1==88 ps 9
734 21:30:02.122390 TxDqDly_Margin_A1==98 ps 10
735 21:30:02.122814 TrainedVREFDQ_A0==75
736 21:30:02.127477 TrainedVREFDQ_A1==75
737 21:30:02.127972 VrefDac_Margin_A0==22
738 21:30:02.128433 DeviceVref_Margin_A0==39
739 21:30:02.133135 VrefDac_Margin_A1==22
740 21:30:02.133627 DeviceVref_Margin_A1==39
741 21:30:02.134043
742 21:30:02.134452
743 21:30:02.138704 channel==1
744 21:30:02.139208 RxClkDly_Margin_A0==78 ps 8
745 21:30:02.139630 TxDqDly_Margin_A0==88 ps 9
746 21:30:02.144314 RxClkDly_Margin_A1==78 ps 8
747 21:30:02.144805 TxDqDly_Margin_A1==88 ps 9
748 21:30:02.149892 TrainedVREFDQ_A0==75
749 21:30:02.150381 TrainedVREFDQ_A1==75
750 21:30:02.150808 VrefDac_Margin_A0==23
751 21:30:02.155466 DeviceVref_Margin_A0==39
752 21:30:02.155952 VrefDac_Margin_A1==20
753 21:30:02.161159 DeviceVref_Margin_A1==38
754 21:30:02.161643
755 21:30:02.162055 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 21:30:02.162458
757 21:30:02.194643 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
758 21:30:02.195180 2D training succeed
759 21:30:02.200315 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 21:30:02.205926 auto size-- 65535DDR cs0 size: 2048MB
761 21:30:02.206416 DDR cs1 size: 2048MB
762 21:30:02.211520 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 21:30:02.212050 cs0 DataBus test pass
764 21:30:02.217187 cs1 DataBus test pass
765 21:30:02.217673 cs0 AddrBus test pass
766 21:30:02.218091 cs1 AddrBus test pass
767 21:30:02.218494
768 21:30:02.222725 100bdlr_step_size ps== 478
769 21:30:02.223219 result report
770 21:30:02.228309 boot times 0Enable ddr reg access
771 21:30:02.233513 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 21:30:02.247341 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 21:30:02.901656 bl2z: ptr: 05129330, size: 00001e40
774 21:30:02.909722 0.0;M3 CHK:0;cm4_sp_mode 0
775 21:30:02.910465 MVN_1=0x00000000
776 21:30:02.910985 MVN_2=0x00000000
777 21:30:02.920394 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 21:30:02.920967 OPS=0x04
779 21:30:02.921450 ring efuse init
780 21:30:02.926078 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 21:30:02.926613 [0.017319 Inits done]
782 21:30:02.927062 secure task start!
783 21:30:02.933324 high task start!
784 21:30:02.933851 low task start!
785 21:30:02.934296 run into bl31
786 21:30:02.941936 NOTICE: BL31: v1.3(release):4fc40b1
787 21:30:02.949731 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 21:30:02.950256 NOTICE: BL31: G12A normal boot!
789 21:30:02.965276 NOTICE: BL31: BL33 decompress pass
790 21:30:02.970971 ERROR: Error initializing runtime service opteed_fast
791 21:30:03.766420
792 21:30:03.766833
793 21:30:03.771868 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 21:30:03.772487
795 21:30:03.775368 Model: Libre Computer AML-S905D3-CC Solitude
796 21:30:03.922361 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 21:30:03.937673 DRAM: 2 GiB (effective 3.8 GiB)
798 21:30:04.038619 Core: 406 devices, 33 uclasses, devicetree: separate
799 21:30:04.044455 WDT: Not starting watchdog@f0d0
800 21:30:04.069535 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 21:30:04.081790 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 21:30:04.086743 ** Bad device specification mmc 0 **
803 21:30:04.096812 Card did not respond to voltage select! : -110
804 21:30:04.104452 ** Bad device specification mmc 0 **
805 21:30:04.104783 Couldn't find partition mmc 0
806 21:30:04.112790 Card did not respond to voltage select! : -110
807 21:30:04.118324 ** Bad device specification mmc 0 **
808 21:30:04.118641 Couldn't find partition mmc 0
809 21:30:04.123411 Error: could not access storage.
810 21:30:04.419913 Net: eth0: ethernet@ff3f0000
811 21:30:04.420369 starting USB...
812 21:30:04.664525 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 21:30:04.664928 Starting the controller
814 21:30:04.671497 USB XHCI 1.10
815 21:30:06.225982 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 21:30:06.234287 scanning usb for storage devices... 0 Storage Device(s) found
818 21:30:06.285944 Hit any key to stop autoboot: 1
819 21:30:06.286862 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 21:30:06.287551 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 21:30:06.288183 Setting prompt string to ['=>']
822 21:30:06.288755 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 21:30:06.299338 0
824 21:30:06.300369 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 21:30:06.401686 => setenv autoload no
827 21:30:06.402367 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 21:30:06.407610 setenv autoload no
830 21:30:06.509185 => setenv initrd_high 0xffffffff
831 21:30:06.509857 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 21:30:06.514278 setenv initrd_high 0xffffffff
834 21:30:06.615771 => setenv fdt_high 0xffffffff
835 21:30:06.616516 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 21:30:06.620188 setenv fdt_high 0xffffffff
838 21:30:06.721727 => dhcp
839 21:30:06.722384 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 21:30:06.726731 dhcp
841 21:30:07.432200 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 21:30:07.432841 Speed: 1000, full duplex
843 21:30:07.433317 BOOTP broadcast 1
844 21:30:07.680618 BOOTP broadcast 2
845 21:30:08.181612 BOOTP broadcast 3
846 21:30:09.182641 BOOTP broadcast 4
847 21:30:11.183683 BOOTP broadcast 5
848 21:30:11.198940 DHCP client bound to address 192.168.6.12 (3766 ms)
850 21:30:11.300455 => setenv serverip 192.168.6.2
851 21:30:11.301357 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
852 21:30:11.305815 setenv serverip 192.168.6.2
854 21:30:11.407267 => tftpboot 0x01080000 682844/tftp-deploy-chj3dmo6/kernel/uImage
855 21:30:11.408180 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
856 21:30:11.414777 tftpboot 0x01080000 682844/tftp-deploy-chj3dmo6/kernel/uImage
857 21:30:11.415272 Speed: 1000, full duplex
858 21:30:11.415695 Using ethernet@ff3f0000 device
859 21:30:11.420260 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
860 21:30:11.425746 Filename '682844/tftp-deploy-chj3dmo6/kernel/uImage'.
861 21:30:11.429666 Load address: 0x1080000
862 21:30:14.318365 Loading: *################################################## 43.2 MiB
863 21:30:14.318957 14.9 MiB/s
864 21:30:14.319396 done
865 21:30:14.322200 Bytes transferred = 45308480 (2b35a40 hex)
867 21:30:14.423864 => tftpboot 0x08000000 682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot
868 21:30:14.424682 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
869 21:30:14.431272 tftpboot 0x08000000 682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot
870 21:30:14.431800 Speed: 1000, full duplex
871 21:30:14.432247 Using ethernet@ff3f0000 device
872 21:30:14.436776 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
873 21:30:14.446633 Filename '682844/tftp-deploy-chj3dmo6/ramdisk/ramdisk.cpio.gz.uboot'.
874 21:30:14.447164 Load address: 0x8000000
875 21:30:15.863788 Loading: *################################################# UDP wrong checksum 00000005 0000fabb
876 21:30:20.863596 T UDP wrong checksum 00000005 0000fabb
877 21:30:30.865528 T T UDP wrong checksum 00000005 0000fabb
878 21:30:50.868531 T T T UDP wrong checksum 00000005 0000fabb
879 21:31:10.874055 T T T T
880 21:31:10.874461 Retry count exceeded; starting again
882 21:31:10.877427 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
885 21:31:10.878418 end: 2.4 uboot-commands (duration 00:01:23) [common]
887 21:31:10.879149 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
889 21:31:10.879709 end: 2 uboot-action (duration 00:01:23) [common]
891 21:31:10.880596 Cleaning after the job
892 21:31:10.880901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/ramdisk
893 21:31:10.881782 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/kernel
894 21:31:10.906676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/dtb
895 21:31:10.907435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/nfsrootfs
896 21:31:11.076629 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/682844/tftp-deploy-chj3dmo6/modules
897 21:31:11.097249 start: 4.1 power-off (timeout 00:00:30) [common]
898 21:31:11.097916 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
899 21:31:11.128405 >> OK - accepted request
900 21:31:11.130383 Returned 0 in 0 seconds
901 21:31:11.231118 end: 4.1 power-off (duration 00:00:00) [common]
903 21:31:11.232078 start: 4.2 read-feedback (timeout 00:10:00) [common]
904 21:31:11.232727 Listened to connection for namespace 'common' for up to 1s
905 21:31:12.233667 Finalising connection for namespace 'common'
906 21:31:12.234139 Disconnecting from shell: Finalise
907 21:31:12.234428 =>
908 21:31:12.335075 end: 4.2 read-feedback (duration 00:00:01) [common]
909 21:31:12.335465 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/682844
910 21:31:15.308837 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/682844
911 21:31:15.309459 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.