Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:59:54.512065 lava-dispatcher, installed at version: 2024.01
2 23:59:54.513027 start: 0 validate
3 23:59:54.513596 Start time: 2024-08-31 23:59:54.513566+00:00 (UTC)
4 23:59:54.514282 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:59:54.514917 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:59:54.562077 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:59:54.562778 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 23:59:54.596366 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:59:54.597118 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:59:54.632034 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:59:54.632601 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:59:54.667507 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:59:54.668064 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 23:59:54.715007 validate duration: 0.20
16 23:59:54.716916 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:59:54.717738 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:59:54.718525 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:59:54.719797 Not decompressing ramdisk as can be used compressed.
20 23:59:54.720858 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 23:59:54.721555 saving as /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/ramdisk/initrd.cpio.gz
22 23:59:54.722270 total size: 5628182 (5 MB)
23 23:59:54.765506 progress 0 % (0 MB)
24 23:59:54.774832 progress 5 % (0 MB)
25 23:59:54.784473 progress 10 % (0 MB)
26 23:59:54.793294 progress 15 % (0 MB)
27 23:59:54.799533 progress 20 % (1 MB)
28 23:59:54.803907 progress 25 % (1 MB)
29 23:59:54.808895 progress 30 % (1 MB)
30 23:59:54.813801 progress 35 % (1 MB)
31 23:59:54.818113 progress 40 % (2 MB)
32 23:59:54.822922 progress 45 % (2 MB)
33 23:59:54.827220 progress 50 % (2 MB)
34 23:59:54.831969 progress 55 % (2 MB)
35 23:59:54.836781 progress 60 % (3 MB)
36 23:59:54.841064 progress 65 % (3 MB)
37 23:59:54.845816 progress 70 % (3 MB)
38 23:59:54.850334 progress 75 % (4 MB)
39 23:59:54.855184 progress 80 % (4 MB)
40 23:59:54.859451 progress 85 % (4 MB)
41 23:59:54.864187 progress 90 % (4 MB)
42 23:59:54.868769 progress 95 % (5 MB)
43 23:59:54.872602 progress 100 % (5 MB)
44 23:59:54.873378 5 MB downloaded in 0.15 s (35.52 MB/s)
45 23:59:54.874059 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:59:54.875177 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:59:54.875564 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:59:54.875914 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:59:54.876521 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
51 23:59:54.876852 saving as /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/kernel/Image
52 23:59:54.877124 total size: 43798536 (41 MB)
53 23:59:54.877390 No compression specified
54 23:59:54.917169 progress 0 % (0 MB)
55 23:59:54.948898 progress 5 % (2 MB)
56 23:59:54.981071 progress 10 % (4 MB)
57 23:59:55.012720 progress 15 % (6 MB)
58 23:59:55.044682 progress 20 % (8 MB)
59 23:59:55.076856 progress 25 % (10 MB)
60 23:59:55.108854 progress 30 % (12 MB)
61 23:59:55.140937 progress 35 % (14 MB)
62 23:59:55.173060 progress 40 % (16 MB)
63 23:59:55.205260 progress 45 % (18 MB)
64 23:59:55.237986 progress 50 % (20 MB)
65 23:59:55.270470 progress 55 % (23 MB)
66 23:59:55.302837 progress 60 % (25 MB)
67 23:59:55.335154 progress 65 % (27 MB)
68 23:59:55.366878 progress 70 % (29 MB)
69 23:59:55.398678 progress 75 % (31 MB)
70 23:59:55.430487 progress 80 % (33 MB)
71 23:59:55.463172 progress 85 % (35 MB)
72 23:59:55.494608 progress 90 % (37 MB)
73 23:59:55.527105 progress 95 % (39 MB)
74 23:59:55.558670 progress 100 % (41 MB)
75 23:59:55.559493 41 MB downloaded in 0.68 s (61.21 MB/s)
76 23:59:55.560117 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:59:55.561160 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:59:55.561519 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:59:55.561857 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:59:55.562437 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:59:55.562742 saving as /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:59:55.563005 total size: 53173 (0 MB)
84 23:59:55.563273 No compression specified
85 23:59:55.606854 progress 61 % (0 MB)
86 23:59:55.607860 progress 100 % (0 MB)
87 23:59:55.608565 0 MB downloaded in 0.05 s (1.11 MB/s)
88 23:59:55.609143 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:59:55.610152 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:59:55.610500 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:59:55.610837 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:59:55.611411 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 23:59:55.611709 saving as /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/nfsrootfs/full.rootfs.tar
95 23:59:55.611972 total size: 107552908 (102 MB)
96 23:59:55.612264 Using unxz to decompress xz
97 23:59:55.654252 progress 0 % (0 MB)
98 23:59:56.282903 progress 5 % (5 MB)
99 23:59:57.004921 progress 10 % (10 MB)
100 23:59:57.737263 progress 15 % (15 MB)
101 23:59:58.483697 progress 20 % (20 MB)
102 23:59:59.049436 progress 25 % (25 MB)
103 23:59:59.667216 progress 30 % (30 MB)
104 00:00:00.412292 progress 35 % (35 MB)
105 00:00:00.757805 progress 40 % (41 MB)
106 00:00:01.181083 progress 45 % (46 MB)
107 00:00:01.864058 progress 50 % (51 MB)
108 00:00:02.542343 progress 55 % (56 MB)
109 00:00:03.287573 progress 60 % (61 MB)
110 00:00:04.032504 progress 65 % (66 MB)
111 00:00:04.753520 progress 70 % (71 MB)
112 00:00:05.511629 progress 75 % (76 MB)
113 00:00:06.181677 progress 80 % (82 MB)
114 00:00:06.881447 progress 85 % (87 MB)
115 00:00:07.677074 progress 90 % (92 MB)
116 00:00:08.389788 progress 95 % (97 MB)
117 00:00:09.126659 progress 100 % (102 MB)
118 00:00:09.138351 102 MB downloaded in 13.53 s (7.58 MB/s)
119 00:00:09.139214 end: 1.4.1 http-download (duration 00:00:14) [common]
121 00:00:09.140892 end: 1.4 download-retry (duration 00:00:14) [common]
122 00:00:09.141427 start: 1.5 download-retry (timeout 00:09:46) [common]
123 00:00:09.141951 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 00:00:09.142768 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
125 00:00:09.143232 saving as /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/modules/modules.tar
126 00:00:09.143647 total size: 11365484 (10 MB)
127 00:00:09.144104 Using unxz to decompress xz
128 00:00:09.190161 progress 0 % (0 MB)
129 00:00:09.272054 progress 5 % (0 MB)
130 00:00:09.348571 progress 10 % (1 MB)
131 00:00:09.435970 progress 15 % (1 MB)
132 00:00:09.512469 progress 20 % (2 MB)
133 00:00:09.587081 progress 25 % (2 MB)
134 00:00:09.669108 progress 30 % (3 MB)
135 00:00:09.742437 progress 35 % (3 MB)
136 00:00:09.816843 progress 40 % (4 MB)
137 00:00:09.891781 progress 45 % (4 MB)
138 00:00:09.964922 progress 50 % (5 MB)
139 00:00:10.035503 progress 55 % (5 MB)
140 00:00:10.118160 progress 60 % (6 MB)
141 00:00:10.201567 progress 65 % (7 MB)
142 00:00:10.283601 progress 70 % (7 MB)
143 00:00:10.385692 progress 75 % (8 MB)
144 00:00:10.475191 progress 80 % (8 MB)
145 00:00:10.551555 progress 85 % (9 MB)
146 00:00:10.628915 progress 90 % (9 MB)
147 00:00:10.700549 progress 95 % (10 MB)
148 00:00:10.772458 progress 100 % (10 MB)
149 00:00:10.785914 10 MB downloaded in 1.64 s (6.60 MB/s)
150 00:00:10.786837 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:00:10.788640 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:00:10.789212 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 00:00:10.789781 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 00:00:20.487504 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/683507/extract-nfsrootfs-hon0l158
156 00:00:20.488139 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 00:00:20.488444 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 00:00:20.489072 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d
159 00:00:20.489509 makedir: /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin
160 00:00:20.489845 makedir: /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/tests
161 00:00:20.490170 makedir: /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/results
162 00:00:20.490519 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-add-keys
163 00:00:20.491058 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-add-sources
164 00:00:20.491569 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-background-process-start
165 00:00:20.492101 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-background-process-stop
166 00:00:20.492656 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-common-functions
167 00:00:20.493160 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-echo-ipv4
168 00:00:20.493651 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-install-packages
169 00:00:20.494153 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-installed-packages
170 00:00:20.494638 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-os-build
171 00:00:20.495116 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-probe-channel
172 00:00:20.495603 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-probe-ip
173 00:00:20.496129 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-target-ip
174 00:00:20.496653 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-target-mac
175 00:00:20.497136 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-target-storage
176 00:00:20.497627 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-case
177 00:00:20.498117 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-event
178 00:00:20.498591 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-feedback
179 00:00:20.499075 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-raise
180 00:00:20.499552 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-reference
181 00:00:20.500074 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-runner
182 00:00:20.500611 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-set
183 00:00:20.501103 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-test-shell
184 00:00:20.501597 Updating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-install-packages (oe)
185 00:00:20.502163 Updating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/bin/lava-installed-packages (oe)
186 00:00:20.502616 Creating /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/environment
187 00:00:20.503000 LAVA metadata
188 00:00:20.503264 - LAVA_JOB_ID=683507
189 00:00:20.503484 - LAVA_DISPATCHER_IP=192.168.6.2
190 00:00:20.503849 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 00:00:20.504876 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 00:00:20.505200 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 00:00:20.505410 skipped lava-vland-overlay
194 00:00:20.505655 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 00:00:20.505910 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 00:00:20.506129 skipped lava-multinode-overlay
197 00:00:20.506372 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 00:00:20.506624 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 00:00:20.506875 Loading test definitions
200 00:00:20.507156 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 00:00:20.507383 Using /lava-683507 at stage 0
202 00:00:20.508620 uuid=683507_1.6.2.4.1 testdef=None
203 00:00:20.508942 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 00:00:20.509208 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 00:00:20.511013 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 00:00:20.511841 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 00:00:20.514168 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 00:00:20.515012 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 00:00:20.517252 runner path: /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/0/tests/0_dmesg test_uuid 683507_1.6.2.4.1
212 00:00:20.517828 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 00:00:20.518598 Creating lava-test-runner.conf files
215 00:00:20.518803 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/683507/lava-overlay-31dntw4d/lava-683507/0 for stage 0
216 00:00:20.519146 - 0_dmesg
217 00:00:20.519497 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 00:00:20.519777 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 00:00:20.541552 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 00:00:20.541973 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 00:00:20.542240 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 00:00:20.542513 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 00:00:20.542783 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 00:00:21.155797 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 00:00:21.156329 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 00:00:21.156585 extracting modules file /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683507/extract-nfsrootfs-hon0l158
227 00:00:22.487548 extracting modules file /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683507/extract-overlay-ramdisk-_uwvbmet/ramdisk
228 00:00:23.855802 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 00:00:23.856316 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 00:00:23.856597 [common] Applying overlay to NFS
231 00:00:23.856812 [common] Applying overlay /var/lib/lava/dispatcher/tmp/683507/compress-overlay-qoz6_ry9/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/683507/extract-nfsrootfs-hon0l158
232 00:00:23.885954 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 00:00:23.886360 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 00:00:23.886662 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 00:00:23.886898 Converting downloaded kernel to a uImage
236 00:00:23.887210 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/kernel/Image /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/kernel/uImage
237 00:00:24.366665 output: Image Name:
238 00:00:24.367085 output: Created: Sun Sep 1 00:00:23 2024
239 00:00:24.367299 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 00:00:24.367506 output: Data Size: 43798536 Bytes = 42772.01 KiB = 41.77 MiB
241 00:00:24.367711 output: Load Address: 01080000
242 00:00:24.367911 output: Entry Point: 01080000
243 00:00:24.368141 output:
244 00:00:24.368487 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 00:00:24.368754 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 00:00:24.369022 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 00:00:24.369282 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 00:00:24.369543 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 00:00:24.369800 Building ramdisk /var/lib/lava/dispatcher/tmp/683507/extract-overlay-ramdisk-_uwvbmet/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/683507/extract-overlay-ramdisk-_uwvbmet/ramdisk
250 00:00:26.488761 >> 163544 blocks
251 00:00:34.857406 Adding RAMdisk u-boot header.
252 00:00:34.857911 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/683507/extract-overlay-ramdisk-_uwvbmet/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/683507/extract-overlay-ramdisk-_uwvbmet/ramdisk.cpio.gz.uboot
253 00:00:35.141703 output: Image Name:
254 00:00:35.142143 output: Created: Sun Sep 1 00:00:34 2024
255 00:00:35.142469 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 00:00:35.142915 output: Data Size: 23397607 Bytes = 22849.23 KiB = 22.31 MiB
257 00:00:35.143347 output: Load Address: 00000000
258 00:00:35.143753 output: Entry Point: 00000000
259 00:00:35.144214 output:
260 00:00:35.145268 rename /var/lib/lava/dispatcher/tmp/683507/extract-overlay-ramdisk-_uwvbmet/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot
261 00:00:35.146007 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 00:00:35.146797 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 00:00:35.147378 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 00:00:35.147860 No LXC device requested
265 00:00:35.148450 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 00:00:35.149023 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 00:00:35.149584 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 00:00:35.150217 Checking files for TFTP limit of 4294967296 bytes.
269 00:00:35.153055 end: 1 tftp-deploy (duration 00:00:40) [common]
270 00:00:35.153670 start: 2 uboot-action (timeout 00:05:00) [common]
271 00:00:35.154444 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 00:00:35.155055 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 00:00:35.155586 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 00:00:35.156162 Using kernel file from prepare-kernel: 683507/tftp-deploy-or8gsnxk/kernel/uImage
275 00:00:35.156809 substitutions:
276 00:00:35.157235 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 00:00:35.157664 - {DTB_ADDR}: 0x01070000
278 00:00:35.158099 - {DTB}: 683507/tftp-deploy-or8gsnxk/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 00:00:35.158533 - {INITRD}: 683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot
280 00:00:35.158971 - {KERNEL_ADDR}: 0x01080000
281 00:00:35.159370 - {KERNEL}: 683507/tftp-deploy-or8gsnxk/kernel/uImage
282 00:00:35.159788 - {LAVA_MAC}: None
283 00:00:35.160271 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/683507/extract-nfsrootfs-hon0l158
284 00:00:35.160712 - {NFS_SERVER_IP}: 192.168.6.2
285 00:00:35.161144 - {PRESEED_CONFIG}: None
286 00:00:35.161575 - {PRESEED_LOCAL}: None
287 00:00:35.162005 - {RAMDISK_ADDR}: 0x08000000
288 00:00:35.162405 - {RAMDISK}: 683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot
289 00:00:35.162820 - {ROOT_PART}: None
290 00:00:35.163261 - {ROOT}: None
291 00:00:35.163681 - {SERVER_IP}: 192.168.6.2
292 00:00:35.164107 - {TEE_ADDR}: 0x83000000
293 00:00:35.164543 - {TEE}: None
294 00:00:35.164997 Parsed boot commands:
295 00:00:35.165400 - setenv autoload no
296 00:00:35.165796 - setenv initrd_high 0xffffffff
297 00:00:35.166192 - setenv fdt_high 0xffffffff
298 00:00:35.166587 - dhcp
299 00:00:35.166980 - setenv serverip 192.168.6.2
300 00:00:35.167371 - tftpboot 0x01080000 683507/tftp-deploy-or8gsnxk/kernel/uImage
301 00:00:35.167760 - tftpboot 0x08000000 683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot
302 00:00:35.168182 - tftpboot 0x01070000 683507/tftp-deploy-or8gsnxk/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 00:00:35.168583 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/683507/extract-nfsrootfs-hon0l158,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 00:00:35.168991 - bootm 0x01080000 0x08000000 0x01070000
305 00:00:35.169516 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 00:00:35.171037 start: 2.3 connect-device (timeout 00:05:00) [common]
308 00:00:35.171471 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 00:00:35.186614 Setting prompt string to ['lava-test: # ']
310 00:00:35.188173 end: 2.3 connect-device (duration 00:00:00) [common]
311 00:00:35.188821 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 00:00:35.189397 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 00:00:35.189960 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 00:00:35.191093 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 00:00:35.227883 >> OK - accepted request
316 00:00:35.230069 Returned 0 in 0 seconds
317 00:00:35.331238 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 00:00:35.332999 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 00:00:35.333588 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 00:00:35.334126 Setting prompt string to ['Hit any key to stop autoboot']
322 00:00:35.334601 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 00:00:35.336210 Trying 192.168.56.21...
324 00:00:35.336695 Connected to conserv1.
325 00:00:35.337111 Escape character is '^]'.
326 00:00:35.337526
327 00:00:35.337958 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 00:00:35.338390
329 00:00:43.231689 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 00:00:43.232466 bl2_stage_init 0x01
331 00:00:43.233003 bl2_stage_init 0x81
332 00:00:43.237011 hw id: 0x0000 - pwm id 0x01
333 00:00:43.237577 bl2_stage_init 0xc1
334 00:00:43.242575 bl2_stage_init 0x02
335 00:00:43.243178
336 00:00:43.243625 L0:00000000
337 00:00:43.244088 L1:00000703
338 00:00:43.244519 L2:00008067
339 00:00:43.244937 L3:15000000
340 00:00:43.248413 S1:00000000
341 00:00:43.248972 B2:20282000
342 00:00:43.249428 B1:a0f83180
343 00:00:43.249849
344 00:00:43.250292 TE: 68769
345 00:00:43.250716
346 00:00:43.253881 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 00:00:43.254443
348 00:00:43.259683 Board ID = 1
349 00:00:43.260243 Set cpu clk to 24M
350 00:00:43.260665 Set clk81 to 24M
351 00:00:43.265125 Use GP1_pll as DSU clk.
352 00:00:43.265665 DSU clk: 1200 Mhz
353 00:00:43.266106 CPU clk: 1200 MHz
354 00:00:43.270733 Set clk81 to 166.6M
355 00:00:43.276411 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 00:00:43.276978 board id: 1
357 00:00:43.283379 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 00:00:43.293977 fw parse done
359 00:00:43.300070 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 00:00:43.342621 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 00:00:43.353537 PIEI prepare done
362 00:00:43.354090 fastboot data load
363 00:00:43.354521 fastboot data verify
364 00:00:43.359150 verify result: 266
365 00:00:43.364740 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 00:00:43.365258 LPDDR4 probe
367 00:00:43.365668 ddr clk to 1584MHz
368 00:00:43.372636 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 00:00:43.409983
370 00:00:43.410513 dmc_version 0001
371 00:00:43.416600 Check phy result
372 00:00:43.422506 INFO : End of CA training
373 00:00:43.422981 INFO : End of initialization
374 00:00:43.428109 INFO : Training has run successfully!
375 00:00:43.428577 Check phy result
376 00:00:43.433704 INFO : End of initialization
377 00:00:43.434171 INFO : End of read enable training
378 00:00:43.439294 INFO : End of fine write leveling
379 00:00:43.444926 INFO : End of Write leveling coarse delay
380 00:00:43.445397 INFO : Training has run successfully!
381 00:00:43.445808 Check phy result
382 00:00:43.450524 INFO : End of initialization
383 00:00:43.451005 INFO : End of read dq deskew training
384 00:00:43.456128 INFO : End of MPR read delay center optimization
385 00:00:43.461658 INFO : End of write delay center optimization
386 00:00:43.467283 INFO : End of read delay center optimization
387 00:00:43.467751 INFO : End of max read latency training
388 00:00:43.472948 INFO : Training has run successfully!
389 00:00:43.473428 1D training succeed
390 00:00:43.482086 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 00:00:43.529667 Check phy result
392 00:00:43.530173 INFO : End of initialization
393 00:00:43.552054 INFO : End of 2D read delay Voltage center optimization
394 00:00:43.571179 INFO : End of 2D read delay Voltage center optimization
395 00:00:43.623193 INFO : End of 2D write delay Voltage center optimization
396 00:00:43.672459 INFO : End of 2D write delay Voltage center optimization
397 00:00:43.677882 INFO : Training has run successfully!
398 00:00:43.678354
399 00:00:43.678774 channel==0
400 00:00:43.683500 RxClkDly_Margin_A0==88 ps 9
401 00:00:43.683968 TxDqDly_Margin_A0==98 ps 10
402 00:00:43.686893 RxClkDly_Margin_A1==88 ps 9
403 00:00:43.687370 TxDqDly_Margin_A1==98 ps 10
404 00:00:43.692447 TrainedVREFDQ_A0==75
405 00:00:43.692922 TrainedVREFDQ_A1==74
406 00:00:43.693336 VrefDac_Margin_A0==23
407 00:00:43.698062 DeviceVref_Margin_A0==39
408 00:00:43.698523 VrefDac_Margin_A1==23
409 00:00:43.703512 DeviceVref_Margin_A1==40
410 00:00:43.703973
411 00:00:43.704424
412 00:00:43.704831 channel==1
413 00:00:43.705229 RxClkDly_Margin_A0==78 ps 8
414 00:00:43.707049 TxDqDly_Margin_A0==98 ps 10
415 00:00:43.712632 RxClkDly_Margin_A1==78 ps 8
416 00:00:43.713112 TxDqDly_Margin_A1==78 ps 8
417 00:00:43.713543 TrainedVREFDQ_A0==78
418 00:00:43.718127 TrainedVREFDQ_A1==75
419 00:00:43.718590 VrefDac_Margin_A0==22
420 00:00:43.723806 DeviceVref_Margin_A0==36
421 00:00:43.724312 VrefDac_Margin_A1==22
422 00:00:43.724720 DeviceVref_Margin_A1==39
423 00:00:43.725117
424 00:00:43.729352 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 00:00:43.729819
426 00:00:43.762944 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 00:00:43.763515 2D training succeed
428 00:00:43.768641 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 00:00:43.774065 auto size-- 65535DDR cs0 size: 2048MB
430 00:00:43.774527 DDR cs1 size: 2048MB
431 00:00:43.779659 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 00:00:43.780149 cs0 DataBus test pass
433 00:00:43.780560 cs1 DataBus test pass
434 00:00:43.785286 cs0 AddrBus test pass
435 00:00:43.785750 cs1 AddrBus test pass
436 00:00:43.786157
437 00:00:43.790889 100bdlr_step_size ps== 478
438 00:00:43.791368 result report
439 00:00:43.791777 boot times 0Enable ddr reg access
440 00:00:43.800579 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 00:00:43.814393 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 00:00:44.469368 bl2z: ptr: 05129330, size: 00001e40
443 00:00:44.475700 0.0;M3 CHK:0;cm4_sp_mode 0
444 00:00:44.476247 MVN_1=0x00000000
445 00:00:44.476670 MVN_2=0x00000000
446 00:00:44.487244 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 00:00:44.487729 OPS=0x04
448 00:00:44.488179 ring efuse init
449 00:00:44.492778 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 00:00:44.493247 [0.017319 Inits done]
451 00:00:44.493654 secure task start!
452 00:00:44.500521 high task start!
453 00:00:44.500985 low task start!
454 00:00:44.501391 run into bl31
455 00:00:44.509167 NOTICE: BL31: v1.3(release):4fc40b1
456 00:00:44.516960 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 00:00:44.517437 NOTICE: BL31: G12A normal boot!
458 00:00:44.532435 NOTICE: BL31: BL33 decompress pass
459 00:00:44.538092 ERROR: Error initializing runtime service opteed_fast
460 00:00:45.782784 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 00:00:45.783204 bl2_stage_init 0x01
462 00:00:45.783431 bl2_stage_init 0x81
463 00:00:45.788395 hw id: 0x0000 - pwm id 0x01
464 00:00:45.788678 bl2_stage_init 0xc1
465 00:00:45.793966 bl2_stage_init 0x02
466 00:00:45.794288
467 00:00:45.794497 L0:00000000
468 00:00:45.794697 L1:00000703
469 00:00:45.794897 L2:00008067
470 00:00:45.795094 L3:15000000
471 00:00:45.799551 S1:00000000
472 00:00:45.799823 B2:20282000
473 00:00:45.800068 B1:a0f83180
474 00:00:45.800274
475 00:00:45.800473 TE: 70435
476 00:00:45.800671
477 00:00:45.805140 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 00:00:45.805414
479 00:00:45.810730 Board ID = 1
480 00:00:45.810998 Set cpu clk to 24M
481 00:00:45.811204 Set clk81 to 24M
482 00:00:45.816370 Use GP1_pll as DSU clk.
483 00:00:45.816644 DSU clk: 1200 Mhz
484 00:00:45.816848 CPU clk: 1200 MHz
485 00:00:45.821947 Set clk81 to 166.6M
486 00:00:45.827533 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 00:00:45.827807 board id: 1
488 00:00:45.834719 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 00:00:45.845422 fw parse done
490 00:00:45.851448 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 00:00:45.894076 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 00:00:45.905006 PIEI prepare done
493 00:00:45.905476 fastboot data load
494 00:00:45.905874 fastboot data verify
495 00:00:45.910678 verify result: 266
496 00:00:45.916325 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 00:00:45.916798 LPDDR4 probe
498 00:00:45.917190 ddr clk to 1584MHz
499 00:00:47.283673 Load ddrfw from SPI, src: 0x00018000, des SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 00:00:47.284422 bl2_stage_init 0x01
501 00:00:47.284861 bl2_stage_init 0x81
502 00:00:47.289359 hw id: 0x0000 - pwm id 0x01
503 00:00:47.289916 bl2_stage_init 0xc1
504 00:00:47.294486 bl2_stage_init 0x02
505 00:00:47.294993
506 00:00:47.295413 L0:00000000
507 00:00:47.295829 L1:00000703
508 00:00:47.296272 L2:00008067
509 00:00:47.300083 L3:15000000
510 00:00:47.300586 S1:00000000
511 00:00:47.301007 B2:20282000
512 00:00:47.301415 B1:a0f83180
513 00:00:47.301815
514 00:00:47.302221 TE: 72619
515 00:00:47.302626
516 00:00:47.305708 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 00:00:47.311265
518 00:00:47.311576 Board ID = 1
519 00:00:47.311792 Set cpu clk to 24M
520 00:00:47.312019 Set clk81 to 24M
521 00:00:47.316856 Use GP1_pll as DSU clk.
522 00:00:47.317367 DSU clk: 1200 Mhz
523 00:00:47.317778 CPU clk: 1200 MHz
524 00:00:47.322465 Set clk81 to 166.6M
525 00:00:47.328059 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 00:00:47.328567 board id: 1
527 00:00:47.335772 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 00:00:47.346340 fw parse done
529 00:00:47.352304 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 00:00:47.394889 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 00:00:47.405921 PIEI prepare done
532 00:00:47.406460 fastboot data load
533 00:00:47.406832 fastboot data verify
534 00:00:47.411539 verify result: 266
535 00:00:47.416987 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 00:00:47.417324 LPDDR4 probe
537 00:00:47.417546 ddr clk to 1584MHz
538 00:00:47.425095 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 00:00:47.462376
540 00:00:47.462913 dmc_version 0001
541 00:00:47.468990 Check phy result
542 00:00:47.474970 INFO : End of CA training
543 00:00:47.475477 INFO : End of initialization
544 00:00:47.480570 INFO : Training has run successfully!
545 00:00:47.481076 Check phy result
546 00:00:47.486138 INFO : End of initialization
547 00:00:47.486654 INFO : End of read enable training
548 00:00:47.491827 INFO : End of fine write leveling
549 00:00:47.497327 INFO : End of Write leveling coarse delay
550 00:00:47.497824 INFO : Training has run successfully!
551 00:00:47.498237 Check phy result
552 00:00:47.502953 INFO : End of initialization
553 00:00:47.503445 INFO : End of read dq deskew training
554 00:00:47.508550 INFO : End of MPR read delay center optimization
555 00:00:47.514130 INFO : End of write delay center optimization
556 00:00:47.519833 INFO : End of read delay center optimization
557 00:00:47.520372 INFO : End of max read latency training
558 00:00:47.525377 INFO : Training has run successfully!
559 00:00:47.525669 1D training succeed
560 00:00:47.534452 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 00:00:47.582045 Check phy result
562 00:00:47.582574 INFO : End of initialization
563 00:00:47.604489 INFO : End of 2D read delay Voltage center optimization
564 00:00:47.623683 INFO : End of 2D read delay Voltage center optimization
565 00:00:47.675478 INFO : End of 2D write delay Voltage center optimization
566 00:00:47.724709 INFO : End of 2D write delay Voltage center optimization
567 00:00:47.730249 INFO : Training has run successfully!
568 00:00:47.730746
569 00:00:47.731165 channel==0
570 00:00:47.735900 RxClkDly_Margin_A0==88 ps 9
571 00:00:47.736478 TxDqDly_Margin_A0==98 ps 10
572 00:00:47.741482 RxClkDly_Margin_A1==88 ps 9
573 00:00:47.741990 TxDqDly_Margin_A1==98 ps 10
574 00:00:47.742406 TrainedVREFDQ_A0==77
575 00:00:47.747029 TrainedVREFDQ_A1==75
576 00:00:47.747524 VrefDac_Margin_A0==23
577 00:00:47.747936 DeviceVref_Margin_A0==37
578 00:00:47.752677 VrefDac_Margin_A1==23
579 00:00:47.753168 DeviceVref_Margin_A1==39
580 00:00:47.753579
581 00:00:47.753983
582 00:00:47.758253 channel==1
583 00:00:47.758758 RxClkDly_Margin_A0==88 ps 9
584 00:00:47.759168 TxDqDly_Margin_A0==88 ps 9
585 00:00:47.763883 RxClkDly_Margin_A1==78 ps 8
586 00:00:47.764405 TxDqDly_Margin_A1==88 ps 9
587 00:00:47.769451 TrainedVREFDQ_A0==76
588 00:00:47.769948 TrainedVREFDQ_A1==77
589 00:00:47.770361 VrefDac_Margin_A0==22
590 00:00:47.775047 DeviceVref_Margin_A0==38
591 00:00:47.775535 VrefDac_Margin_A1==22
592 00:00:47.780619 DeviceVref_Margin_A1==37
593 00:00:47.781113
594 00:00:47.781524 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 00:00:47.781922
596 00:00:47.814161 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 00:00:47.814747 2D training succeed
598 00:00:47.819869 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 00:00:47.825436 auto size-- 65535DDR cs0 size: 2048MB
600 00:00:47.825935 DDR cs1 size: 2048MB
601 00:00:47.831064 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 00:00:47.831571 cs0 DataBus test pass
603 00:00:47.836616 cs1 DataBus test pass
604 00:00:47.837107 cs0 AddrBus test pass
605 00:00:47.837516 cs1 AddrBus test pass
606 00:00:47.837915
607 00:00:47.842209 100bdlr_step_size ps== 478
608 00:00:47.842700 result report
609 00:00:47.847875 boot times 0Enable ddr reg access
610 00:00:47.853016 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 00:00:47.865922 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 00:00:48.522367 bl2z: ptr: 05129330, size: 00001e40
613 00:00:48.528951 0.0;M3 CHK:0;cm4_sp_mode 0
614 00:00:48.529443 MVN_1=0x00000000
615 00:00:48.529856 MVN_2=0x00000000
616 00:00:48.540386 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 00:00:48.540868 OPS=0x04
618 00:00:48.541273 ring efuse init
619 00:00:48.546066 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 00:00:48.546542 [0.017310 Inits done]
621 00:00:48.546947 secure task start!
622 00:00:48.553942 high task start!
623 00:00:48.554407 low task start!
624 00:00:48.554813 run into bl31
625 00:00:48.562526 NOTICE: BL31: v1.3(release):4fc40b1
626 00:00:48.570355 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 00:00:48.570845 NOTICE: BL31: G12A normal boot!
628 00:00:48.585892 NOTICE: BL31: BL33 decompress pass
629 00:00:48.590566 ERROR: Error initializing runtime service opteed_fast
630 00:00:49.830420 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 00:00:49.830836 bl2_stage_init 0x01
632 00:00:49.831075 bl2_stage_init 0x81
633 00:00:49.835845 hw id: 0x0000 - pwm id 0x01
634 00:00:49.836153 bl2_stage_init 0xc1
635 00:00:49.841908 bl2_stage_init 0x02
636 00:00:49.842306
637 00:00:49.842666 L0:00000000
638 00:00:49.843011 L1:00000703
639 00:00:49.843350 L2:00008067
640 00:00:49.843689 L3:15000000
641 00:00:49.844210 S1:00000000
642 00:00:49.848655 B2:20282000
643 00:00:49.848943 B1:a0f83180
644 00:00:49.849166
645 00:00:49.849381 TE: 67647
646 00:00:49.849594
647 00:00:49.861196 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 00:00:49.861542
649 00:00:49.861783 Board ID = 1
650 00:00:49.862008 Set cpu clk to 24M
651 00:00:49.862225 Set clk81 to 24M
652 00:00:49.862439 Use GP1_pll as DSU clk.
653 00:00:49.866191 DSU clk: 1200 Mhz
654 00:00:49.866525 CPU clk: 1200 MHz
655 00:00:49.876376 Set clk81 to 166.6M
656 00:00:49.877338 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 00:00:49.877650 board id: 1
658 00:00:49.882380 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 00:00:49.893179 fw parse done
660 00:00:49.899353 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 00:00:49.941625 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 00:00:49.952488 PIEI prepare done
663 00:00:49.953037 fastboot data load
664 00:00:49.953474 fastboot data verify
665 00:00:49.958318 verify result: 266
666 00:00:49.963870 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 00:00:49.964454 LPDDR4 probe
668 00:00:49.964888 ddr clk to 1584MHz
669 00:00:49.971714 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 00:00:50.008955
671 00:00:50.009542 dmc_version 0001
672 00:00:50.015627 Check phy result
673 00:00:50.021507 INFO : End of CA training
674 00:00:50.022057 INFO : End of initialization
675 00:00:50.027165 INFO : Training has run successfully!
676 00:00:50.027704 Check phy result
677 00:00:50.033062 INFO : End of initialization
678 00:00:50.033614 INFO : End of read enable training
679 00:00:50.038387 INFO : End of fine write leveling
680 00:00:50.044899 INFO : End of Write leveling coarse delay
681 00:00:50.045447 INFO : Training has run successfully!
682 00:00:50.045890 Check phy result
683 00:00:50.049570 INFO : End of initialization
684 00:00:50.050094 INFO : End of read dq deskew training
685 00:00:50.056048 INFO : End of MPR read delay center optimization
686 00:00:50.060886 INFO : End of write delay center optimization
687 00:00:50.066378 INFO : End of read delay center optimization
688 00:00:50.066922 INFO : End of max read latency training
689 00:00:50.072484 INFO : Training has run successfully!
690 00:00:50.073033 1D training succeed
691 00:00:50.081270 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 00:00:50.128778 Check phy result
693 00:00:50.129345 INFO : End of initialization
694 00:00:50.151062 INFO : End of 2D read delay Voltage center optimization
695 00:00:50.170350 INFO : End of 2D read delay Voltage center optimization
696 00:00:50.222097 INFO : End of 2D write delay Voltage center optimization
697 00:00:50.271454 INFO : End of 2D write delay Voltage center optimization
698 00:00:50.277091 INFO : Training has run successfully!
699 00:00:50.277625
700 00:00:50.278058 channel==0
701 00:00:50.282434 RxClkDly_Margin_A0==78 ps 8
702 00:00:50.282962 TxDqDly_Margin_A0==98 ps 10
703 00:00:50.285826 RxClkDly_Margin_A1==88 ps 9
704 00:00:50.286348 TxDqDly_Margin_A1==88 ps 9
705 00:00:50.291439 TrainedVREFDQ_A0==74
706 00:00:50.291976 TrainedVREFDQ_A1==74
707 00:00:50.292474 VrefDac_Margin_A0==23
708 00:00:50.297324 DeviceVref_Margin_A0==40
709 00:00:50.297972 VrefDac_Margin_A1==23
710 00:00:50.302544 DeviceVref_Margin_A1==40
711 00:00:50.303102
712 00:00:50.303586
713 00:00:50.304049 channel==1
714 00:00:50.304473 RxClkDly_Margin_A0==78 ps 8
715 00:00:50.305868 TxDqDly_Margin_A0==98 ps 10
716 00:00:50.311600 RxClkDly_Margin_A1==78 ps 8
717 00:00:50.311958 TxDqDly_Margin_A1==88 ps 9
718 00:00:50.312237 TrainedVREFDQ_A0==78
719 00:00:50.317251 TrainedVREFDQ_A1==75
720 00:00:50.317804 VrefDac_Margin_A0==22
721 00:00:50.322770 DeviceVref_Margin_A0==36
722 00:00:50.323320 VrefDac_Margin_A1==22
723 00:00:50.323734 DeviceVref_Margin_A1==39
724 00:00:50.324212
725 00:00:50.328306 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 00:00:50.328832
727 00:00:50.361834 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
728 00:00:50.362237 2D training succeed
729 00:00:50.367459 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 00:00:50.373052 auto size-- 65535DDR cs0 size: 2048MB
731 00:00:50.373620 DDR cs1 size: 2048MB
732 00:00:50.378651 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 00:00:50.379205 cs0 DataBus test pass
734 00:00:50.379645 cs1 DataBus test pass
735 00:00:50.385560 cs0 AddrBus test pass
736 00:00:50.386102 cs1 AddrBus test pass
737 00:00:50.386501
738 00:00:50.389862 100bdlr_step_size ps== 478
739 00:00:50.390414 result report
740 00:00:50.390845 boot times 0Enable ddr reg access
741 00:00:50.399529 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 00:00:50.413409 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 00:00:51.067438 bl2z: ptr: 05129330, size: 00001e40
744 00:00:51.076159 0.0;M3 CHK:0;cm4_sp_mode 0
745 00:00:51.076727 MVN_1=0x00000000
746 00:00:51.077158 MVN_2=0x00000000
747 00:00:51.086728 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 00:00:51.087295 OPS=0x04
749 00:00:51.087701 ring efuse init
750 00:00:51.095952 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 00:00:51.096532 [0.017319 Inits done]
752 00:00:51.096960 secure task start!
753 00:00:51.099621 high task start!
754 00:00:51.100473 low task start!
755 00:00:51.100897 run into bl31
756 00:00:51.112169 NOTICE: BL31: v1.3(release):4fc40b1
757 00:00:51.116100 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 00:00:51.116610 NOTICE: BL31: G12A normal boot!
759 00:00:51.131474 NOTICE: BL31: BL33 decompress pass
760 00:00:51.140083 ERROR: Error initializing runtime service opteed_fast
761 00:00:51.931590
762 00:00:51.932277
763 00:00:51.936937 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 00:00:51.937476
765 00:00:51.940505 Model: Libre Computer AML-S905D3-CC Solitude
766 00:00:52.087301 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 00:00:52.102655 DRAM: 2 GiB (effective 3.8 GiB)
768 00:00:52.203457 Core: 406 devices, 33 uclasses, devicetree: separate
769 00:00:52.209345 WDT: Not starting watchdog@f0d0
770 00:00:52.234294 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 00:00:52.246603 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 00:00:52.251575 ** Bad device specification mmc 0 **
773 00:00:52.261618 Card did not respond to voltage select! : -110
774 00:00:52.269297 ** Bad device specification mmc 0 **
775 00:00:52.269689 Couldn't find partition mmc 0
776 00:00:52.277595 Card did not respond to voltage select! : -110
777 00:00:52.283218 ** Bad device specification mmc 0 **
778 00:00:52.283740 Couldn't find partition mmc 0
779 00:00:52.288157 Error: could not access storage.
780 00:00:52.584800 Net: eth0: ethernet@ff3f0000
781 00:00:52.585444 starting USB...
782 00:00:52.829832 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 00:00:52.838605 Starting the controller
784 00:00:52.839275 USB XHCI 1.10
785 00:00:54.390175 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 00:00:54.398610 scanning usb for storage devices... 0 Storage Device(s) found
788 00:00:54.450274 Hit any key to stop autoboot: 1
789 00:00:54.451119 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 00:00:54.451525 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 00:00:54.451825 Setting prompt string to ['=>']
792 00:00:54.452192 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 00:00:54.464437 0
794 00:00:54.465229 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 00:00:54.566203 => setenv autoload no
797 00:00:54.566979 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 00:00:54.571056 setenv autoload no
800 00:00:54.672230 => setenv initrd_high 0xffffffff
801 00:00:54.672798 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
802 00:00:54.676979 setenv initrd_high 0xffffffff
804 00:00:54.778156 => setenv fdt_high 0xffffffff
805 00:00:54.778717 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
806 00:00:54.782999 setenv fdt_high 0xffffffff
808 00:00:54.884696 => dhcp
809 00:00:54.885245 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 00:00:54.889158 dhcp
811 00:00:55.344631 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 00:00:55.345036 Speed: 1000, full duplex
813 00:00:55.345254 BOOTP broadcast 1
814 00:00:55.592693 BOOTP broadcast 2
815 00:00:56.093723 BOOTP broadcast 3
816 00:00:57.094862 BOOTP broadcast 4
817 00:00:59.095868 BOOTP broadcast 5
818 00:00:59.107594 DHCP client bound to address 192.168.6.12 (3762 ms)
820 00:00:59.209017 => setenv serverip 192.168.6.2
821 00:00:59.209746 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 00:00:59.214335 setenv serverip 192.168.6.2
824 00:00:59.315598 => tftpboot 0x01080000 683507/tftp-deploy-or8gsnxk/kernel/uImage
825 00:00:59.316187 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 00:00:59.322914 tftpboot 0x01080000 683507/tftp-deploy-or8gsnxk/kernel/uImage
827 00:00:59.323228 Speed: 1000, full duplex
828 00:00:59.323466 Using ethernet@ff3f0000 device
829 00:00:59.328400 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 00:00:59.333893 Filename '683507/tftp-deploy-or8gsnxk/kernel/uImage'.
831 00:00:59.337758 Load address: 0x1080000
832 00:01:02.070306 Loading: *################################################## 41.8 MiB
833 00:01:02.070913 15.3 MiB/s
834 00:01:02.071321 done
835 00:01:02.074745 Bytes transferred = 43798600 (29c5048 hex)
837 00:01:02.176452 => tftpboot 0x08000000 683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot
838 00:01:02.177218 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
839 00:01:02.184116 tftpboot 0x08000000 683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot
840 00:01:02.184638 Speed: 1000, full duplex
841 00:01:02.185039 Using ethernet@ff3f0000 device
842 00:01:02.189612 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 00:01:02.199345 Filename '683507/tftp-deploy-or8gsnxk/ramdisk/ramdisk.cpio.gz.uboot'.
844 00:01:02.199877 Load address: 0x8000000
845 00:01:03.702804 Loading: *################################################# UDP wrong checksum 00000004 00003f76
846 00:01:08.702690 T UDP wrong checksum 00000004 00003f76
847 00:01:09.831441 UDP wrong checksum 000000ff 00004f7c
848 00:01:09.841777 UDP wrong checksum 000000ff 00009f73
849 00:01:18.704355 T UDP wrong checksum 00000004 00003f76
850 00:01:38.708693 T T T T T UDP wrong checksum 00000004 00003f76
851 00:01:58.713181 T T T
852 00:01:58.713598 Retry count exceeded; starting again
854 00:01:58.720227 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
857 00:01:58.724398 end: 2.4 uboot-commands (duration 00:01:24) [common]
859 00:01:58.727476 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
861 00:01:58.728942 end: 2 uboot-action (duration 00:01:24) [common]
863 00:01:58.729746 Cleaning after the job
864 00:01:58.730046 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/ramdisk
865 00:01:58.732556 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/kernel
866 00:01:58.748098 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/dtb
867 00:01:58.749557 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/nfsrootfs
868 00:01:58.786976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683507/tftp-deploy-or8gsnxk/modules
869 00:01:58.795056 start: 4.1 power-off (timeout 00:00:30) [common]
870 00:01:58.795738 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
871 00:01:58.826904 >> OK - accepted request
872 00:01:58.828884 Returned 0 in 0 seconds
873 00:01:58.929626 end: 4.1 power-off (duration 00:00:00) [common]
875 00:01:58.930544 start: 4.2 read-feedback (timeout 00:10:00) [common]
876 00:01:58.931179 Listened to connection for namespace 'common' for up to 1s
877 00:01:59.931789 Finalising connection for namespace 'common'
878 00:01:59.932285 Disconnecting from shell: Finalise
879 00:01:59.932576 =>
880 00:02:00.033309 end: 4.2 read-feedback (duration 00:00:01) [common]
881 00:02:00.033929 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/683507
882 00:02:01.721492 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/683507
883 00:02:01.722117 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.