Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:15:33.139720 lava-dispatcher, installed at version: 2024.01
2 23:15:33.140593 start: 0 validate
3 23:15:33.141080 Start time: 2024-08-31 23:15:33.141048+00:00 (UTC)
4 23:15:33.141642 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:15:33.142195 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 23:15:33.179542 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:15:33.180162 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 23:15:34.218136 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:15:34.219085 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:15:39.287720 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:15:39.288288 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
12 23:15:41.342632 validate duration: 8.20
14 23:15:41.343667 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 23:15:41.344106 start: 1.1 download-retry (timeout 00:10:00) [common]
16 23:15:41.344469 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 23:15:41.345190 Not decompressing ramdisk as can be used compressed.
18 23:15:41.345673 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 23:15:41.345949 saving as /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/ramdisk/rootfs.cpio.gz
20 23:15:41.346218 total size: 8181887 (7 MB)
21 23:15:41.379301 progress 0 % (0 MB)
22 23:15:41.391016 progress 5 % (0 MB)
23 23:15:41.401374 progress 10 % (0 MB)
24 23:15:41.410573 progress 15 % (1 MB)
25 23:15:41.416068 progress 20 % (1 MB)
26 23:15:41.422014 progress 25 % (1 MB)
27 23:15:41.427457 progress 30 % (2 MB)
28 23:15:41.433405 progress 35 % (2 MB)
29 23:15:41.438843 progress 40 % (3 MB)
30 23:15:41.444699 progress 45 % (3 MB)
31 23:15:41.449995 progress 50 % (3 MB)
32 23:15:41.455791 progress 55 % (4 MB)
33 23:15:41.461212 progress 60 % (4 MB)
34 23:15:41.466984 progress 65 % (5 MB)
35 23:15:41.472398 progress 70 % (5 MB)
36 23:15:41.478031 progress 75 % (5 MB)
37 23:15:41.483365 progress 80 % (6 MB)
38 23:15:41.489174 progress 85 % (6 MB)
39 23:15:41.494436 progress 90 % (7 MB)
40 23:15:41.500323 progress 95 % (7 MB)
41 23:15:41.505280 progress 100 % (7 MB)
42 23:15:41.505941 7 MB downloaded in 0.16 s (48.86 MB/s)
43 23:15:41.506488 end: 1.1.1 http-download (duration 00:00:00) [common]
45 23:15:41.507378 end: 1.1 download-retry (duration 00:00:00) [common]
46 23:15:41.507677 start: 1.2 download-retry (timeout 00:10:00) [common]
47 23:15:41.507946 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 23:15:41.508453 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig/clang-15/kernel/Image
49 23:15:41.508703 saving as /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/kernel/Image
50 23:15:41.508912 total size: 37407232 (35 MB)
51 23:15:41.509124 No compression specified
52 23:15:41.548858 progress 0 % (0 MB)
53 23:15:41.572592 progress 5 % (1 MB)
54 23:15:41.595895 progress 10 % (3 MB)
55 23:15:41.619111 progress 15 % (5 MB)
56 23:15:41.642522 progress 20 % (7 MB)
57 23:15:41.666813 progress 25 % (8 MB)
58 23:15:41.689907 progress 30 % (10 MB)
59 23:15:41.715221 progress 35 % (12 MB)
60 23:15:41.738292 progress 40 % (14 MB)
61 23:15:41.761546 progress 45 % (16 MB)
62 23:15:41.785463 progress 50 % (17 MB)
63 23:15:41.809219 progress 55 % (19 MB)
64 23:15:41.833703 progress 60 % (21 MB)
65 23:15:41.858474 progress 65 % (23 MB)
66 23:15:41.882029 progress 70 % (25 MB)
67 23:15:41.905571 progress 75 % (26 MB)
68 23:15:41.928637 progress 80 % (28 MB)
69 23:15:41.951897 progress 85 % (30 MB)
70 23:15:41.975011 progress 90 % (32 MB)
71 23:15:41.998384 progress 95 % (33 MB)
72 23:15:42.021068 progress 100 % (35 MB)
73 23:15:42.021782 35 MB downloaded in 0.51 s (69.56 MB/s)
74 23:15:42.022302 end: 1.2.1 http-download (duration 00:00:01) [common]
76 23:15:42.023164 end: 1.2 download-retry (duration 00:00:01) [common]
77 23:15:42.023463 start: 1.3 download-retry (timeout 00:09:59) [common]
78 23:15:42.023744 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 23:15:42.024280 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 23:15:42.024599 saving as /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/dtb/meson-g12b-a311d-libretech-cc.dtb
81 23:15:42.024828 total size: 54667 (0 MB)
82 23:15:42.025053 No compression specified
83 23:15:42.060749 progress 59 % (0 MB)
84 23:15:42.061622 progress 100 % (0 MB)
85 23:15:42.062406 0 MB downloaded in 0.04 s (1.39 MB/s)
86 23:15:42.063261 end: 1.3.1 http-download (duration 00:00:00) [common]
88 23:15:42.064327 end: 1.3 download-retry (duration 00:00:00) [common]
89 23:15:42.064659 start: 1.4 download-retry (timeout 00:09:59) [common]
90 23:15:42.064975 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 23:15:42.065490 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig/clang-15/modules.tar.xz
92 23:15:42.065793 saving as /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/modules/modules.tar
93 23:15:42.066021 total size: 11635712 (11 MB)
94 23:15:42.066274 Using unxz to decompress xz
95 23:15:42.104336 progress 0 % (0 MB)
96 23:15:42.192359 progress 5 % (0 MB)
97 23:15:42.284691 progress 10 % (1 MB)
98 23:15:42.375211 progress 15 % (1 MB)
99 23:15:42.463627 progress 20 % (2 MB)
100 23:15:42.541502 progress 25 % (2 MB)
101 23:15:43.183016 progress 30 % (3 MB)
102 23:15:43.270032 progress 35 % (3 MB)
103 23:15:43.362720 progress 40 % (4 MB)
104 23:15:43.450924 progress 45 % (5 MB)
105 23:15:43.540993 progress 50 % (5 MB)
106 23:15:43.629687 progress 55 % (6 MB)
107 23:15:43.712199 progress 60 % (6 MB)
108 23:15:43.796719 progress 65 % (7 MB)
109 23:15:43.880547 progress 70 % (7 MB)
110 23:15:43.967931 progress 75 % (8 MB)
111 23:15:44.065401 progress 80 % (8 MB)
112 23:15:44.161568 progress 85 % (9 MB)
113 23:15:44.238348 progress 90 % (10 MB)
114 23:15:44.322151 progress 95 % (10 MB)
115 23:15:44.402666 progress 100 % (11 MB)
116 23:15:44.416476 11 MB downloaded in 2.35 s (4.72 MB/s)
117 23:15:44.417151 end: 1.4.1 http-download (duration 00:00:02) [common]
119 23:15:44.418026 end: 1.4 download-retry (duration 00:00:02) [common]
120 23:15:44.418316 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 23:15:44.418599 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 23:15:44.418865 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 23:15:44.419134 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 23:15:44.419807 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa
125 23:15:44.420392 makedir: /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin
126 23:15:44.420768 makedir: /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/tests
127 23:15:44.421116 makedir: /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/results
128 23:15:44.421478 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-add-keys
129 23:15:44.422212 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-add-sources
130 23:15:44.422921 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-background-process-start
131 23:15:44.423627 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-background-process-stop
132 23:15:44.424264 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-common-functions
133 23:15:44.424829 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-echo-ipv4
134 23:15:44.425337 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-install-packages
135 23:15:44.425871 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-installed-packages
136 23:15:44.426481 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-os-build
137 23:15:44.427051 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-probe-channel
138 23:15:44.427628 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-probe-ip
139 23:15:44.428259 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-target-ip
140 23:15:44.428841 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-target-mac
141 23:15:44.429392 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-target-storage
142 23:15:44.429940 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-case
143 23:15:44.430504 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-event
144 23:15:44.431042 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-feedback
145 23:15:44.431589 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-raise
146 23:15:44.432159 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-reference
147 23:15:44.432718 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-runner
148 23:15:44.433356 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-set
149 23:15:44.433948 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-test-shell
150 23:15:44.434523 Updating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-install-packages (oe)
151 23:15:44.435113 Updating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/bin/lava-installed-packages (oe)
152 23:15:44.435627 Creating /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/environment
153 23:15:44.436097 LAVA metadata
154 23:15:44.436397 - LAVA_JOB_ID=683278
155 23:15:44.436633 - LAVA_DISPATCHER_IP=192.168.6.2
156 23:15:44.437034 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 23:15:44.438171 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 23:15:44.438558 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 23:15:44.438790 skipped lava-vland-overlay
160 23:15:44.439056 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 23:15:44.439339 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 23:15:44.439579 skipped lava-multinode-overlay
163 23:15:44.439850 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 23:15:44.440166 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 23:15:44.440453 Loading test definitions
166 23:15:44.440765 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 23:15:44.441011 Using /lava-683278 at stage 0
168 23:15:44.442385 uuid=683278_1.5.2.4.1 testdef=None
169 23:15:44.442759 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 23:15:44.443060 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 23:15:44.445302 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 23:15:44.446225 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 23:15:44.448944 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 23:15:44.449900 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 23:15:44.452538 runner path: /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/0/tests/0_dmesg test_uuid 683278_1.5.2.4.1
178 23:15:44.453256 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 23:15:44.454119 Creating lava-test-runner.conf files
181 23:15:44.454339 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/683278/lava-overlay-zhq14fqa/lava-683278/0 for stage 0
182 23:15:44.454748 - 0_dmesg
183 23:15:44.455159 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 23:15:44.455485 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 23:15:44.483834 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 23:15:44.484359 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 23:15:44.484700 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 23:15:44.485001 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 23:15:44.485290 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 23:15:45.447529 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 23:15:45.448067 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 23:15:45.448349 extracting modules file /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk
193 23:15:46.942685 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 23:15:46.943184 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
195 23:15:46.943470 [common] Applying overlay /var/lib/lava/dispatcher/tmp/683278/compress-overlay-4dyebxi7/overlay-1.5.2.5.tar.gz to ramdisk
196 23:15:46.943686 [common] Applying overlay /var/lib/lava/dispatcher/tmp/683278/compress-overlay-4dyebxi7/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk
197 23:15:46.974931 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 23:15:46.975405 start: 1.5.6 prepare-kernel (timeout 00:09:54) [common]
199 23:15:46.975680 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:54) [common]
200 23:15:46.975915 Converting downloaded kernel to a uImage
201 23:15:46.976261 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/kernel/Image /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/kernel/uImage
202 23:15:47.932462 output: Image Name:
203 23:15:47.932890 output: Created: Sat Aug 31 23:15:46 2024
204 23:15:47.933107 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 23:15:47.933312 output: Data Size: 37407232 Bytes = 36530.50 KiB = 35.67 MiB
206 23:15:47.933515 output: Load Address: 01080000
207 23:15:47.933714 output: Entry Point: 01080000
208 23:15:47.933911 output:
209 23:15:47.934244 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
210 23:15:47.934515 end: 1.5.6 prepare-kernel (duration 00:00:01) [common]
211 23:15:47.934786 start: 1.5.7 configure-preseed-file (timeout 00:09:53) [common]
212 23:15:47.935041 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 23:15:47.935298 start: 1.5.8 compress-ramdisk (timeout 00:09:53) [common]
214 23:15:47.935553 Building ramdisk /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk
215 23:15:51.009761 >> 186581 blocks
216 23:15:59.350438 Adding RAMdisk u-boot header.
217 23:15:59.350921 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk.cpio.gz.uboot
218 23:15:59.661296 output: Image Name:
219 23:15:59.661721 output: Created: Sat Aug 31 23:15:59 2024
220 23:15:59.662184 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 23:15:59.662649 output: Data Size: 26591491 Bytes = 25968.25 KiB = 25.36 MiB
222 23:15:59.663104 output: Load Address: 00000000
223 23:15:59.663552 output: Entry Point: 00000000
224 23:15:59.664042 output:
225 23:15:59.665211 rename /var/lib/lava/dispatcher/tmp/683278/extract-overlay-ramdisk-qmwezxn6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot
226 23:15:59.666006 end: 1.5.8 compress-ramdisk (duration 00:00:12) [common]
227 23:15:59.666620 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
228 23:15:59.667261 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:42) [common]
229 23:15:59.667783 No LXC device requested
230 23:15:59.668409 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 23:15:59.668995 start: 1.7 deploy-device-env (timeout 00:09:42) [common]
232 23:15:59.669555 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 23:15:59.670018 Checking files for TFTP limit of 4294967296 bytes.
234 23:15:59.673036 end: 1 tftp-deploy (duration 00:00:18) [common]
235 23:15:59.673688 start: 2 uboot-action (timeout 00:05:00) [common]
236 23:15:59.674276 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 23:15:59.674836 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 23:15:59.675399 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 23:15:59.676020 Using kernel file from prepare-kernel: 683278/tftp-deploy-_maya_id/kernel/uImage
240 23:15:59.676728 substitutions:
241 23:15:59.677194 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 23:15:59.677646 - {DTB_ADDR}: 0x01070000
243 23:15:59.678093 - {DTB}: 683278/tftp-deploy-_maya_id/dtb/meson-g12b-a311d-libretech-cc.dtb
244 23:15:59.678543 - {INITRD}: 683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot
245 23:15:59.678993 - {KERNEL_ADDR}: 0x01080000
246 23:15:59.679435 - {KERNEL}: 683278/tftp-deploy-_maya_id/kernel/uImage
247 23:15:59.679881 - {LAVA_MAC}: None
248 23:15:59.680400 - {PRESEED_CONFIG}: None
249 23:15:59.680852 - {PRESEED_LOCAL}: None
250 23:15:59.681296 - {RAMDISK_ADDR}: 0x08000000
251 23:15:59.681734 - {RAMDISK}: 683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot
252 23:15:59.682179 - {ROOT_PART}: None
253 23:15:59.682614 - {ROOT}: None
254 23:15:59.683049 - {SERVER_IP}: 192.168.6.2
255 23:15:59.683493 - {TEE_ADDR}: 0x83000000
256 23:15:59.683930 - {TEE}: None
257 23:15:59.684401 Parsed boot commands:
258 23:15:59.684828 - setenv autoload no
259 23:15:59.685263 - setenv initrd_high 0xffffffff
260 23:15:59.685701 - setenv fdt_high 0xffffffff
261 23:15:59.686132 - dhcp
262 23:15:59.686567 - setenv serverip 192.168.6.2
263 23:15:59.686999 - tftpboot 0x01080000 683278/tftp-deploy-_maya_id/kernel/uImage
264 23:15:59.687434 - tftpboot 0x08000000 683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot
265 23:15:59.687868 - tftpboot 0x01070000 683278/tftp-deploy-_maya_id/dtb/meson-g12b-a311d-libretech-cc.dtb
266 23:15:59.688340 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 23:15:59.688787 - bootm 0x01080000 0x08000000 0x01070000
268 23:15:59.689366 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 23:15:59.691042 start: 2.3 connect-device (timeout 00:05:00) [common]
271 23:15:59.691554 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 23:15:59.705328 Setting prompt string to ['lava-test: # ']
273 23:15:59.706302 end: 2.3 connect-device (duration 00:00:00) [common]
274 23:15:59.706703 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 23:15:59.707040 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 23:15:59.707343 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 23:15:59.708038 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 23:15:59.753121 >> OK - accepted request
279 23:15:59.755314 Returned 0 in 0 seconds
280 23:15:59.856146 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 23:15:59.857188 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 23:15:59.857528 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 23:15:59.857845 Setting prompt string to ['Hit any key to stop autoboot']
285 23:15:59.858109 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 23:15:59.859064 Trying 192.168.56.21...
287 23:15:59.859340 Connected to conserv1.
288 23:15:59.859579 Escape character is '^]'.
289 23:15:59.912002
290 23:15:59.912435 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 23:15:59.912698
292 23:16:10.738416 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 23:16:10.739097 bl2_stage_init 0x01
294 23:16:10.739540 bl2_stage_init 0x81
295 23:16:10.743837 hw id: 0x0000 - pwm id 0x01
296 23:16:10.744505 bl2_stage_init 0xc1
297 23:16:10.744932 bl2_stage_init 0x02
298 23:16:10.745349
299 23:16:10.749563 L0:00000000
300 23:16:10.750168 L1:20000703
301 23:16:10.750586 L2:00008067
302 23:16:10.750981 L3:14000000
303 23:16:10.752296 B2:00402000
304 23:16:10.753437 B1:e0f83180
305 23:16:10.753855
306 23:16:10.754255 TE: 58124
307 23:16:10.754657
308 23:16:10.763208 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 23:16:10.763653
310 23:16:10.763921 Board ID = 1
311 23:16:10.764213 Set A53 clk to 24M
312 23:16:10.764456 Set A73 clk to 24M
313 23:16:10.768828 Set clk81 to 24M
314 23:16:10.769236 A53 clk: 1200 MHz
315 23:16:10.769489 A73 clk: 1200 MHz
316 23:16:10.772745 CLK81: 166.6M
317 23:16:10.773138 smccc: 00012a92
318 23:16:10.778113 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 23:16:10.783739 board id: 1
320 23:16:10.788722 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 23:16:10.799286 fw parse done
322 23:16:10.805331 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 23:16:10.848034 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 23:16:10.859436 PIEI prepare done
325 23:16:10.860069 fastboot data load
326 23:16:10.860523 fastboot data verify
327 23:16:10.864588 verify result: 266
328 23:16:10.870274 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 23:16:10.870814 LPDDR4 probe
330 23:16:10.871263 ddr clk to 1584MHz
331 23:16:10.878164 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 23:16:10.915523
333 23:16:10.916158 dmc_version 0001
334 23:16:10.921057 Check phy result
335 23:16:10.927935 INFO : End of CA training
336 23:16:10.928489 INFO : End of initialization
337 23:16:10.933566 INFO : Training has run successfully!
338 23:16:10.934099 Check phy result
339 23:16:10.939097 INFO : End of initialization
340 23:16:10.939606 INFO : End of read enable training
341 23:16:10.944612 INFO : End of fine write leveling
342 23:16:10.950236 INFO : End of Write leveling coarse delay
343 23:16:10.950574 INFO : Training has run successfully!
344 23:16:10.950795 Check phy result
345 23:16:10.955783 INFO : End of initialization
346 23:16:10.956154 INFO : End of read dq deskew training
347 23:16:10.961489 INFO : End of MPR read delay center optimization
348 23:16:10.966981 INFO : End of write delay center optimization
349 23:16:10.972562 INFO : End of read delay center optimization
350 23:16:10.972874 INFO : End of max read latency training
351 23:16:10.978187 INFO : Training has run successfully!
352 23:16:10.978506 1D training succeed
353 23:16:10.987400 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 23:16:11.035046 Check phy result
355 23:16:11.035463 INFO : End of initialization
356 23:16:11.057642 INFO : End of 2D read delay Voltage center optimization
357 23:16:11.077916 INFO : End of 2D read delay Voltage center optimization
358 23:16:11.129970 INFO : End of 2D write delay Voltage center optimization
359 23:16:11.179369 INFO : End of 2D write delay Voltage center optimization
360 23:16:11.184833 INFO : Training has run successfully!
361 23:16:11.185156
362 23:16:11.185398 channel==0
363 23:16:11.190397 RxClkDly_Margin_A0==88 ps 9
364 23:16:11.190724 TxDqDly_Margin_A0==98 ps 10
365 23:16:11.196120 RxClkDly_Margin_A1==88 ps 9
366 23:16:11.196436 TxDqDly_Margin_A1==98 ps 10
367 23:16:11.196681 TrainedVREFDQ_A0==74
368 23:16:11.201704 TrainedVREFDQ_A1==75
369 23:16:11.202018 VrefDac_Margin_A0==25
370 23:16:11.202255 DeviceVref_Margin_A0==40
371 23:16:11.207332 VrefDac_Margin_A1==25
372 23:16:11.207653 DeviceVref_Margin_A1==39
373 23:16:11.207903
374 23:16:11.208174
375 23:16:11.212842 channel==1
376 23:16:11.213156 RxClkDly_Margin_A0==98 ps 10
377 23:16:11.213410 TxDqDly_Margin_A0==88 ps 9
378 23:16:11.218522 RxClkDly_Margin_A1==98 ps 10
379 23:16:11.218851 TxDqDly_Margin_A1==88 ps 9
380 23:16:11.224160 TrainedVREFDQ_A0==76
381 23:16:11.224492 TrainedVREFDQ_A1==77
382 23:16:11.224755 VrefDac_Margin_A0==23
383 23:16:11.229738 DeviceVref_Margin_A0==38
384 23:16:11.230078 VrefDac_Margin_A1==23
385 23:16:11.235405 DeviceVref_Margin_A1==37
386 23:16:11.235749
387 23:16:11.236053 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 23:16:11.236332
389 23:16:11.268927 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
390 23:16:11.269365 2D training succeed
391 23:16:11.274469 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 23:16:11.280022 auto size-- 65535DDR cs0 size: 2048MB
393 23:16:11.280381 DDR cs1 size: 2048MB
394 23:16:11.285588 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 23:16:11.285941 cs0 DataBus test pass
396 23:16:11.291265 cs1 DataBus test pass
397 23:16:11.291610 cs0 AddrBus test pass
398 23:16:11.291882 cs1 AddrBus test pass
399 23:16:11.292183
400 23:16:11.296793 100bdlr_step_size ps== 420
401 23:16:11.297252 result report
402 23:16:11.302385 boot times 0Enable ddr reg access
403 23:16:11.307734 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 23:16:11.321294 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 23:16:11.896140 0.0;M3 CHK:0;cm4_sp_mode 0
406 23:16:11.896602 MVN_1=0x00000000
407 23:16:11.900395 MVN_2=0x00000000
408 23:16:11.906236 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 23:16:11.906716 OPS=0x10
410 23:16:11.907006 ring efuse init
411 23:16:11.907260 chipver efuse init
412 23:16:11.911817 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 23:16:11.917382 [0.018961 Inits done]
414 23:16:11.917797 secure task start!
415 23:16:11.918047 high task start!
416 23:16:11.921937 low task start!
417 23:16:11.922349 run into bl31
418 23:16:11.928589 NOTICE: BL31: v1.3(release):4fc40b1
419 23:16:11.936472 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 23:16:11.936931 NOTICE: BL31: G12A normal boot!
421 23:16:11.961833 NOTICE: BL31: BL33 decompress pass
422 23:16:11.967531 ERROR: Error initializing runtime service opteed_fast
423 23:16:13.200304
424 23:16:13.200739
425 23:16:13.207765 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 23:16:13.208281
427 23:16:13.208621 Model: Libre Computer AML-A311D-CC Alta
428 23:16:13.416822 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 23:16:13.439693 DRAM: 2 GiB (effective 3.8 GiB)
430 23:16:13.583817 Core: 408 devices, 31 uclasses, devicetree: separate
431 23:16:13.588686 WDT: Not starting watchdog@f0d0
432 23:16:13.621784 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 23:16:13.634153 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 23:16:13.638760 ** Bad device specification mmc 0 **
435 23:16:13.649876 Card did not respond to voltage select! : -110
436 23:16:13.656797 ** Bad device specification mmc 0 **
437 23:16:13.657423 Couldn't find partition mmc 0
438 23:16:13.665477 Card did not respond to voltage select! : -110
439 23:16:13.670876 ** Bad device specification mmc 0 **
440 23:16:13.671365 Couldn't find partition mmc 0
441 23:16:13.675182 Error: could not access storage.
442 23:16:14.938430 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
443 23:16:14.938869 bl2_stage_init 0x81
444 23:16:14.943902 hw id: 0x0000 - pwm id 0x01
445 23:16:14.944875 bl2_stage_init 0xc1
446 23:16:14.945252 bl2_stage_init 0x02
447 23:16:14.945500
448 23:16:14.949531 L0:00000000
449 23:16:14.949870 L1:20000703
450 23:16:14.950087 L2:00008067
451 23:16:14.950294 L3:14000000
452 23:16:14.950498 B2:00402000
453 23:16:14.955079 B1:e0f83180
454 23:16:14.955544
455 23:16:14.955882 TE: 58150
456 23:16:14.956235
457 23:16:14.960705 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
458 23:16:14.961166
459 23:16:14.961499 Board ID = 1
460 23:16:14.966301 Set A53 clk to 24M
461 23:16:14.966658 Set A73 clk to 24M
462 23:16:14.966884 Set clk81 to 24M
463 23:16:14.971848 A53 clk: 1200 MHz
464 23:16:14.972480 A73 clk: 1200 MHz
465 23:16:14.972935 CLK81: 166.6M
466 23:16:14.973368 smccc: 00012aab
467 23:16:14.977580 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
468 23:16:14.983133 board id: 1
469 23:16:14.988476 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
470 23:16:14.999555 fw parse done
471 23:16:15.005331 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
472 23:16:15.048192 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
473 23:16:15.059073 PIEI prepare done
474 23:16:15.059575 fastboot data load
475 23:16:15.060033 fastboot data verify
476 23:16:15.064724 verify result: 266
477 23:16:15.070268 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
478 23:16:15.070640 LPDDR4 probe
479 23:16:15.070877 ddr clk to 1584MHz
480 23:16:15.077363 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
481 23:16:15.114623
482 23:16:15.115247 dmc_version 0001
483 23:16:15.121295 Check phy result
484 23:16:15.128048 INFO : End of CA training
485 23:16:15.128562 INFO : End of initialization
486 23:16:15.133744 INFO : Training has run successfully!
487 23:16:15.134231 Check phy result
488 23:16:15.139239 INFO : End of initialization
489 23:16:15.139716 INFO : End of read enable training
490 23:16:15.142604 INFO : End of fine write leveling
491 23:16:15.148214 INFO : End of Write leveling coarse delay
492 23:16:15.153829 INFO : Training has run successfully!
493 23:16:15.154321 Check phy result
494 23:16:15.154742 INFO : End of initialization
495 23:16:15.159370 INFO : End of read dq deskew training
496 23:16:15.164994 INFO : End of MPR read delay center optimization
497 23:16:15.165473 INFO : End of write delay center optimization
498 23:16:15.170631 INFO : End of read delay center optimization
499 23:16:15.176193 INFO : End of max read latency training
500 23:16:15.176692 INFO : Training has run successfully!
501 23:16:15.181861 1D training succeed
502 23:16:15.187083 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
503 23:16:15.234325 Check phy result
504 23:16:15.234935 INFO : End of initialization
505 23:16:15.257902 INFO : End of 2D read delay Voltage center optimization
506 23:16:15.276995 INFO : End of 2D read delay Voltage center optimization
507 23:16:15.329411 INFO : End of 2D write delay Voltage center optimization
508 23:16:15.379054 INFO : End of 2D write delay Voltage center optimization
509 23:16:15.384599 INFO : Training has run successfully!
510 23:16:15.385174
511 23:16:15.385611 channel==0
512 23:16:15.390083 RxClkDly_Margin_A0==88 ps 9
513 23:16:15.390567 TxDqDly_Margin_A0==98 ps 10
514 23:16:15.395818 RxClkDly_Margin_A1==88 ps 9
515 23:16:15.396305 TxDqDly_Margin_A1==98 ps 10
516 23:16:15.396735 TrainedVREFDQ_A0==74
517 23:16:15.401342 TrainedVREFDQ_A1==74
518 23:16:15.401829 VrefDac_Margin_A0==24
519 23:16:15.402245 DeviceVref_Margin_A0==40
520 23:16:15.406939 VrefDac_Margin_A1==25
521 23:16:15.407454 DeviceVref_Margin_A1==40
522 23:16:15.407873
523 23:16:15.408331
524 23:16:15.412550 channel==1
525 23:16:15.413020 RxClkDly_Margin_A0==98 ps 10
526 23:16:15.413430 TxDqDly_Margin_A0==98 ps 10
527 23:16:15.418167 RxClkDly_Margin_A1==98 ps 10
528 23:16:15.418648 TxDqDly_Margin_A1==98 ps 10
529 23:16:15.423825 TrainedVREFDQ_A0==77
530 23:16:15.424336 TrainedVREFDQ_A1==78
531 23:16:15.424754 VrefDac_Margin_A0==23
532 23:16:15.429356 DeviceVref_Margin_A0==37
533 23:16:15.429816 VrefDac_Margin_A1==23
534 23:16:15.434943 DeviceVref_Margin_A1==36
535 23:16:15.435406
536 23:16:15.435820 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
537 23:16:15.440538
538 23:16:15.468646 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
539 23:16:15.469240 2D training succeed
540 23:16:15.474236 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
541 23:16:15.479811 auto size-- 65535DDR cs0 size: 2048MB
542 23:16:15.480138 DDR cs1 size: 2048MB
543 23:16:15.485435 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
544 23:16:15.485956 cs0 DataBus test pass
545 23:16:15.490989 cs1 DataBus test pass
546 23:16:15.491516 cs0 AddrBus test pass
547 23:16:15.491925 cs1 AddrBus test pass
548 23:16:15.492363
549 23:16:15.496481 100bdlr_step_size ps== 420
550 23:16:15.496771 result report
551 23:16:15.502082 boot times 0Enable ddr reg access
552 23:16:15.507540 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
553 23:16:15.520271 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
554 23:16:16.093060 0.0;M3 CHK:0;cm4_sp_mode 0
555 23:16:16.093507 MVN_1=0x00000000
556 23:16:16.098507 MVN_2=0x00000000
557 23:16:16.104328 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
558 23:16:16.104684 OPS=0x10
559 23:16:16.104908 ring efuse init
560 23:16:16.105118 chipver efuse init
561 23:16:16.109942 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
562 23:16:16.115558 [0.018960 Inits done]
563 23:16:16.115905 secure task start!
564 23:16:16.116172 high task start!
565 23:16:16.119364 low task start!
566 23:16:16.119697 run into bl31
567 23:16:16.126759 NOTICE: BL31: v1.3(release):4fc40b1
568 23:16:16.134218 NOTICE: BL31: Built : 15:58:17, May 22 2019
569 23:16:16.134610 NOTICE: BL31: G12A normal boot!
570 23:16:16.160447 NOTICE: BL31: BL33 decompress pass
571 23:16:16.165613 ERROR: Error initializing runtime service opteed_fast
572 23:16:17.398655
573 23:16:17.399173
574 23:16:17.406500 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
575 23:16:17.406896
576 23:16:17.407112 Model: Libre Computer AML-A311D-CC Alta
577 23:16:17.615470 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
578 23:16:17.638931 DRAM: 2 GiB (effective 3.8 GiB)
579 23:16:17.782008 Core: 408 devices, 31 uclasses, devicetree: separate
580 23:16:17.793432 WDT: Not starting watchdog@f0d0
581 23:16:17.820030 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
582 23:16:17.832422 Loading Environment from FAT... Card did not respond to voltage select! : -110
583 23:16:17.837177 ** Bad device specification mmc 0 **
584 23:16:17.847823 Card did not respond to voltage select! : -110
585 23:16:17.854782 ** Bad device specification mmc 0 **
586 23:16:17.855350 Couldn't find partition mmc 0
587 23:16:17.863726 Card did not respond to voltage select! : -110
588 23:16:17.869260 ** Bad device specification mmc 0 **
589 23:16:17.869750 Couldn't find partition mmc 0
590 23:16:17.873495 Error: could not access storage.
591 23:16:18.216010 Net: eth0: ethernet@ff3f0000
592 23:16:18.216458 starting USB...
593 23:16:18.468554 Bus usb@ff500000: Register 3000140 NbrPorts 3
594 23:16:18.468989 Starting the controller
595 23:16:18.474736 USB XHCI 1.10
596 23:16:20.189555 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
597 23:16:20.190037 bl2_stage_init 0x01
598 23:16:20.190482 bl2_stage_init 0x81
599 23:16:20.195012 hw id: 0x0000 - pwm id 0x01
600 23:16:20.195342 bl2_stage_init 0xc1
601 23:16:20.195561 bl2_stage_init 0x02
602 23:16:20.195802
603 23:16:20.200475 L0:00000000
604 23:16:20.200792 L1:20000703
605 23:16:20.201017 L2:00008067
606 23:16:20.201234 L3:14000000
607 23:16:20.203590 B2:00402000
608 23:16:20.203931 B1:e0f83180
609 23:16:20.204200
610 23:16:20.204412 TE: 58124
611 23:16:20.204619
612 23:16:20.214672 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
613 23:16:20.215052
614 23:16:20.215270 Board ID = 1
615 23:16:20.215474 Set A53 clk to 24M
616 23:16:20.215679 Set A73 clk to 24M
617 23:16:20.220239 Set clk81 to 24M
618 23:16:20.220557 A53 clk: 1200 MHz
619 23:16:20.220772 A73 clk: 1200 MHz
620 23:16:20.225872 CLK81: 166.6M
621 23:16:20.226310 smccc: 00012a92
622 23:16:20.231487 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
623 23:16:20.231794 board id: 1
624 23:16:20.239636 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
625 23:16:20.250624 fw parse done
626 23:16:20.255643 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
627 23:16:20.298783 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
628 23:16:20.310112 PIEI prepare done
629 23:16:20.310465 fastboot data load
630 23:16:20.310711 fastboot data verify
631 23:16:20.315773 verify result: 266
632 23:16:20.321350 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
633 23:16:20.321661 LPDDR4 probe
634 23:16:20.321872 ddr clk to 1584MHz
635 23:16:20.328497 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
636 23:16:20.365708
637 23:16:20.366108 dmc_version 0001
638 23:16:20.372501 Check phy result
639 23:16:20.379059 INFO : End of CA training
640 23:16:20.379387 INFO : End of initialization
641 23:16:20.384661 INFO : Training has run successfully!
642 23:16:20.384972 Check phy result
643 23:16:20.390443 INFO : End of initialization
644 23:16:20.390776 INFO : End of read enable training
645 23:16:20.393682 INFO : End of fine write leveling
646 23:16:20.399267 INFO : End of Write leveling coarse delay
647 23:16:20.404743 INFO : Training has run successfully!
648 23:16:20.405070 Check phy result
649 23:16:20.405283 INFO : End of initialization
650 23:16:20.410388 INFO : End of read dq deskew training
651 23:16:20.413896 INFO : End of MPR read delay center optimization
652 23:16:20.419287 INFO : End of write delay center optimization
653 23:16:20.424928 INFO : End of read delay center optimization
654 23:16:20.425250 INFO : End of max read latency training
655 23:16:20.430737 INFO : Training has run successfully!
656 23:16:20.431042 1D training succeed
657 23:16:20.438172 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
658 23:16:20.485334 Check phy result
659 23:16:20.485758 INFO : End of initialization
660 23:16:20.507449 INFO : End of 2D read delay Voltage center optimization
661 23:16:20.527352 INFO : End of 2D read delay Voltage center optimization
662 23:16:20.580380 INFO : End of 2D write delay Voltage center optimization
663 23:16:20.630251 INFO : End of 2D write delay Voltage center optimization
664 23:16:20.635273 INFO : Training has run successfully!
665 23:16:20.635631
666 23:16:20.636006 channel==0
667 23:16:20.640958 RxClkDly_Margin_A0==69 ps 7
668 23:16:20.641380 TxDqDly_Margin_A0==98 ps 10
669 23:16:20.646546 RxClkDly_Margin_A1==88 ps 9
670 23:16:20.646908 TxDqDly_Margin_A1==98 ps 10
671 23:16:20.647137 TrainedVREFDQ_A0==74
672 23:16:20.652092 TrainedVREFDQ_A1==74
673 23:16:20.652434 VrefDac_Margin_A0==25
674 23:16:20.652674 DeviceVref_Margin_A0==40
675 23:16:20.657655 VrefDac_Margin_A1==25
676 23:16:20.657993 DeviceVref_Margin_A1==40
677 23:16:20.658216
678 23:16:20.658443
679 23:16:20.663273 channel==1
680 23:16:20.663613 RxClkDly_Margin_A0==98 ps 10
681 23:16:20.663839 TxDqDly_Margin_A0==98 ps 10
682 23:16:20.668872 RxClkDly_Margin_A1==98 ps 10
683 23:16:20.669217 TxDqDly_Margin_A1==88 ps 9
684 23:16:20.674496 TrainedVREFDQ_A0==77
685 23:16:20.674969 TrainedVREFDQ_A1==77
686 23:16:20.675325 VrefDac_Margin_A0==23
687 23:16:20.680120 DeviceVref_Margin_A0==37
688 23:16:20.680590 VrefDac_Margin_A1==22
689 23:16:20.685768 DeviceVref_Margin_A1==37
690 23:16:20.686290
691 23:16:20.686555 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
692 23:16:20.691378
693 23:16:20.719275 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
694 23:16:20.719857 2D training succeed
695 23:16:20.724853 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
696 23:16:20.730533 auto size-- 65535DDR cs0 size: 2048MB
697 23:16:20.730860 DDR cs1 size: 2048MB
698 23:16:20.736050 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
699 23:16:20.736367 cs0 DataBus test pass
700 23:16:20.741644 cs1 DataBus test pass
701 23:16:20.741972 cs0 AddrBus test pass
702 23:16:20.742199 cs1 AddrBus test pass
703 23:16:20.742408
704 23:16:20.747265 100bdlr_step_size ps== 420
705 23:16:20.747591 result report
706 23:16:20.752905 boot times 0Enable ddr reg access
707 23:16:20.757340 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
708 23:16:20.770836 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
709 23:16:21.348129 0.0;M3 CHK:0;cm4_sp_mode 0
710 23:16:21.348841 MVN_1=0x00000000
711 23:16:21.351743 MVN_2=0x00000000
712 23:16:21.356709 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
713 23:16:21.357084 OPS=0x10
714 23:16:21.357315 ring efuse init
715 23:16:21.357529 chipver efuse init
716 23:16:21.362274 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
717 23:16:21.368342 [0.018960 Inits done]
718 23:16:21.368760 secure task start!
719 23:16:21.369051 high task start!
720 23:16:21.371994 low task start!
721 23:16:21.372380 run into bl31
722 23:16:21.379656 NOTICE: BL31: v1.3(release):4fc40b1
723 23:16:21.386121 NOTICE: BL31: Built : 15:58:17, May 22 2019
724 23:16:21.386528 NOTICE: BL31: G12A normal boot!
725 23:16:21.413451 NOTICE: BL31: BL33 decompress pass
726 23:16:21.417543 ERROR: Error initializing runtime service opteed_fast
727 23:16:22.651268
728 23:16:22.651719
729 23:16:22.659173 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
730 23:16:22.659841
731 23:16:22.660261 Model: Libre Computer AML-A311D-CC Alta
732 23:16:22.867512 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
733 23:16:22.890364 DRAM: 2 GiB (effective 3.8 GiB)
734 23:16:23.034075 Core: 408 devices, 31 uclasses, devicetree: separate
735 23:16:23.038909 WDT: Not starting watchdog@f0d0
736 23:16:23.072166 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
737 23:16:23.084635 Loading Environment from FAT... Card did not respond to voltage select! : -110
738 23:16:23.088603 ** Bad device specification mmc 0 **
739 23:16:23.099938 Card did not respond to voltage select! : -110
740 23:16:23.106609 ** Bad device specification mmc 0 **
741 23:16:23.107014 Couldn't find partition mmc 0
742 23:16:23.115928 Card did not respond to voltage select! : -110
743 23:16:23.121453 ** Bad device specification mmc 0 **
744 23:16:23.121894 Couldn't find partition mmc 0
745 23:16:23.126026 Error: could not access storage.
746 23:16:23.468930 Net: eth0: ethernet@ff3f0000
747 23:16:23.469349 starting USB...
748 23:16:23.720688 Bus usb@ff500000: Register 3000140 NbrPorts 3
749 23:16:23.721120 Starting the controller
750 23:16:23.727451 USB XHCI 1.10
751 23:16:25.888770 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
752 23:16:25.889163 bl2_stage_init 0x01
753 23:16:25.889384 bl2_stage_init 0x81
754 23:16:25.894273 hw id: 0x0000 - pwm id 0x01
755 23:16:25.894683 bl2_stage_init 0xc1
756 23:16:25.895046 bl2_stage_init 0x02
757 23:16:25.895376
758 23:16:25.899833 L0:00000000
759 23:16:25.900152 L1:20000703
760 23:16:25.900378 L2:00008067
761 23:16:25.900592 L3:14000000
762 23:16:25.902908 B2:00402000
763 23:16:25.903294 B1:e0f83180
764 23:16:25.903625
765 23:16:25.903962 TE: 58167
766 23:16:25.904231
767 23:16:25.913997 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
768 23:16:25.914298
769 23:16:25.914516 Board ID = 1
770 23:16:25.914718 Set A53 clk to 24M
771 23:16:25.914918 Set A73 clk to 24M
772 23:16:25.919743 Set clk81 to 24M
773 23:16:25.920156 A53 clk: 1200 MHz
774 23:16:25.920487 A73 clk: 1200 MHz
775 23:16:25.925083 CLK81: 166.6M
776 23:16:25.925474 smccc: 00012abe
777 23:16:25.930703 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
778 23:16:25.931104 board id: 1
779 23:16:25.936238 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
780 23:16:25.950211 fw parse done
781 23:16:25.955474 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
782 23:16:25.997571 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
783 23:16:26.009417 PIEI prepare done
784 23:16:26.009704 fastboot data load
785 23:16:26.009935 fastboot data verify
786 23:16:26.015088 verify result: 266
787 23:16:26.020668 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
788 23:16:26.021084 LPDDR4 probe
789 23:16:26.021463 ddr clk to 1584MHz
790 23:16:26.028234 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
791 23:16:26.064949
792 23:16:26.065253 dmc_version 0001
793 23:16:26.071837 Check phy result
794 23:16:26.078478 INFO : End of CA training
795 23:16:26.078891 INFO : End of initialization
796 23:16:26.084111 INFO : Training has run successfully!
797 23:16:26.084391 Check phy result
798 23:16:26.089657 INFO : End of initialization
799 23:16:26.090067 INFO : End of read enable training
800 23:16:26.095263 INFO : End of fine write leveling
801 23:16:26.100855 INFO : End of Write leveling coarse delay
802 23:16:26.101133 INFO : Training has run successfully!
803 23:16:26.101361 Check phy result
804 23:16:26.106462 INFO : End of initialization
805 23:16:26.106879 INFO : End of read dq deskew training
806 23:16:26.112116 INFO : End of MPR read delay center optimization
807 23:16:26.117653 INFO : End of write delay center optimization
808 23:16:26.123283 INFO : End of read delay center optimization
809 23:16:26.123563 INFO : End of max read latency training
810 23:16:26.128868 INFO : Training has run successfully!
811 23:16:26.129285 1D training succeed
812 23:16:26.137904 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
813 23:16:26.185652 Check phy result
814 23:16:26.185958 INFO : End of initialization
815 23:16:26.207560 INFO : End of 2D read delay Voltage center optimization
816 23:16:26.228221 INFO : End of 2D read delay Voltage center optimization
817 23:16:26.280113 INFO : End of 2D write delay Voltage center optimization
818 23:16:26.329876 INFO : End of 2D write delay Voltage center optimization
819 23:16:26.335460 INFO : Training has run successfully!
820 23:16:26.335743
821 23:16:26.335961 channel==0
822 23:16:26.341043 RxClkDly_Margin_A0==88 ps 9
823 23:16:26.341452 TxDqDly_Margin_A0==98 ps 10
824 23:16:26.346690 RxClkDly_Margin_A1==88 ps 9
825 23:16:26.347090 TxDqDly_Margin_A1==98 ps 10
826 23:16:26.347424 TrainedVREFDQ_A0==74
827 23:16:26.352241 TrainedVREFDQ_A1==74
828 23:16:26.352515 VrefDac_Margin_A0==25
829 23:16:26.352721 DeviceVref_Margin_A0==40
830 23:16:26.357848 VrefDac_Margin_A1==25
831 23:16:26.358118 DeviceVref_Margin_A1==40
832 23:16:26.358326
833 23:16:26.358527
834 23:16:26.363455 channel==1
835 23:16:26.363722 RxClkDly_Margin_A0==98 ps 10
836 23:16:26.363930 TxDqDly_Margin_A0==98 ps 10
837 23:16:26.369028 RxClkDly_Margin_A1==98 ps 10
838 23:16:26.369298 TxDqDly_Margin_A1==88 ps 9
839 23:16:26.374709 TrainedVREFDQ_A0==77
840 23:16:26.375199 TrainedVREFDQ_A1==77
841 23:16:26.375601 VrefDac_Margin_A0==23
842 23:16:26.380266 DeviceVref_Margin_A0==37
843 23:16:26.380747 VrefDac_Margin_A1==23
844 23:16:26.385836 DeviceVref_Margin_A1==37
845 23:16:26.386310
846 23:16:26.386730 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
847 23:16:26.391429
848 23:16:26.419398 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
849 23:16:26.419905 2D training succeed
850 23:16:26.424999 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
851 23:16:26.430655 auto size-- 65535DDR cs0 size: 2048MB
852 23:16:26.431142 DDR cs1 size: 2048MB
853 23:16:26.436245 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
854 23:16:26.436695 cs0 DataBus test pass
855 23:16:26.441812 cs1 DataBus test pass
856 23:16:26.442287 cs0 AddrBus test pass
857 23:16:26.442680 cs1 AddrBus test pass
858 23:16:26.443067
859 23:16:26.447428 100bdlr_step_size ps== 420
860 23:16:26.447905 result report
861 23:16:26.453009 boot times 0Enable ddr reg access
862 23:16:26.458204 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
863 23:16:26.471768 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
864 23:16:27.045571 0.0;M3 CHK:0;cm4_sp_mode 0
865 23:16:27.046160 MVN_1=0x00000000
866 23:16:27.051082 MVN_2=0x00000000
867 23:16:27.056821 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
868 23:16:27.057347 OPS=0x10
869 23:16:27.057787 ring efuse init
870 23:16:27.058203 chipver efuse init
871 23:16:27.065046 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
872 23:16:27.065625 [0.018961 Inits done]
873 23:16:27.072351 secure task start!
874 23:16:27.072889 high task start!
875 23:16:27.073324 low task start!
876 23:16:27.073742 run into bl31
877 23:16:27.079306 NOTICE: BL31: v1.3(release):4fc40b1
878 23:16:27.087004 NOTICE: BL31: Built : 15:58:17, May 22 2019
879 23:16:27.087538 NOTICE: BL31: G12A normal boot!
880 23:16:27.112462 NOTICE: BL31: BL33 decompress pass
881 23:16:27.118157 ERROR: Error initializing runtime service opteed_fast
882 23:16:28.350995
883 23:16:28.351612
884 23:16:28.359440 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
885 23:16:28.359922
886 23:16:28.360383 Model: Libre Computer AML-A311D-CC Alta
887 23:16:28.566941 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
888 23:16:28.591183 DRAM: 2 GiB (effective 3.8 GiB)
889 23:16:28.734167 Core: 408 devices, 31 uclasses, devicetree: separate
890 23:16:28.740066 WDT: Not starting watchdog@f0d0
891 23:16:28.772280 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
892 23:16:28.784700 Loading Environment from FAT... Card did not respond to voltage select! : -110
893 23:16:28.789734 ** Bad device specification mmc 0 **
894 23:16:28.800037 Card did not respond to voltage select! : -110
895 23:16:28.807682 ** Bad device specification mmc 0 **
896 23:16:28.808163 Couldn't find partition mmc 0
897 23:16:28.816050 Card did not respond to voltage select! : -110
898 23:16:28.821536 ** Bad device specification mmc 0 **
899 23:16:28.821982 Couldn't find partition mmc 0
900 23:16:28.826624 Error: could not access storage.
901 23:16:29.170208 Net: eth0: ethernet@ff3f0000
902 23:16:29.170798 starting USB...
903 23:16:29.422017 Bus usb@ff500000: Register 3000140 NbrPorts 3
904 23:16:29.422590 Starting the controller
905 23:16:29.428914 USB XHCI 1.10
906 23:16:30.983057 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
907 23:16:30.990500 scanning usb for storage devices... 0 Storage Device(s) found
909 23:16:31.042050 Hit any key to stop autoboot: 1
910 23:16:31.042835 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
911 23:16:31.043437 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
912 23:16:31.043925 Setting prompt string to ['=>']
913 23:16:31.044452 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
914 23:16:31.047831 0
915 23:16:31.048710 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
916 23:16:31.049215 Sending with 10 millisecond of delay
918 23:16:32.183740 => setenv autoload no
919 23:16:32.195471 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
920 23:16:32.198153 setenv autoload no
921 23:16:32.198655 Sending with 10 millisecond of delay
923 23:16:33.994799 => setenv initrd_high 0xffffffff
924 23:16:34.005350 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
925 23:16:34.005835 setenv initrd_high 0xffffffff
926 23:16:34.006291 Sending with 10 millisecond of delay
928 23:16:35.621740 => setenv fdt_high 0xffffffff
929 23:16:35.632276 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
930 23:16:35.632771 setenv fdt_high 0xffffffff
931 23:16:35.633244 Sending with 10 millisecond of delay
933 23:16:35.924666 => dhcp
934 23:16:35.935394 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
935 23:16:35.935902 dhcp
936 23:16:35.936173 Speed: 1000, full duplex
937 23:16:35.936382 BOOTP broadcast 1
938 23:16:36.130958 DHCP client bound to address 192.168.6.33 (196 ms)
939 23:16:36.131575 Sending with 10 millisecond of delay
941 23:16:37.808073 => setenv serverip 192.168.6.2
942 23:16:37.818913 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
943 23:16:37.820098 setenv serverip 192.168.6.2
944 23:16:37.820983 Sending with 10 millisecond of delay
946 23:16:41.545323 => tftpboot 0x01080000 683278/tftp-deploy-_maya_id/kernel/uImage
947 23:16:41.556112 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
948 23:16:41.556929 tftpboot 0x01080000 683278/tftp-deploy-_maya_id/kernel/uImage
949 23:16:41.557395 Speed: 1000, full duplex
950 23:16:41.557812 Using ethernet@ff3f0000 device
951 23:16:41.558862 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
952 23:16:41.564361 Filename '683278/tftp-deploy-_maya_id/kernel/uImage'.
953 23:16:41.568181 Load address: 0x1080000
954 23:16:43.995086 Loading: *################################################## 35.7 MiB
955 23:16:43.995703 14.7 MiB/s
956 23:16:43.996208 done
957 23:16:43.999499 Bytes transferred = 37407296 (23aca40 hex)
958 23:16:44.000357 Sending with 10 millisecond of delay
960 23:16:48.689206 => tftpboot 0x08000000 683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot
961 23:16:48.699799 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
962 23:16:48.700457 tftpboot 0x08000000 683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot
963 23:16:48.700730 Speed: 1000, full duplex
964 23:16:48.700968 Using ethernet@ff3f0000 device
965 23:16:48.702561 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
966 23:16:48.711240 Filename '683278/tftp-deploy-_maya_id/ramdisk/ramdisk.cpio.gz.uboot'.
967 23:16:48.711803 Load address: 0x8000000
968 23:16:55.477766 Loading: *T ################################################# UDP wrong checksum 00000005 00009a9b
969 23:17:00.478879 T UDP wrong checksum 00000005 00009a9b
970 23:17:10.481907 T T UDP wrong checksum 00000005 00009a9b
971 23:17:30.486042 T T T T UDP wrong checksum 00000005 00009a9b
972 23:17:39.986232 T UDP wrong checksum 000000ff 00008f4e
973 23:17:40.041630 UDP wrong checksum 000000ff 00002041
974 23:17:45.489957 T
975 23:17:45.490588 Retry count exceeded; starting again
977 23:17:45.491969 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
980 23:17:45.493846 end: 2.4 uboot-commands (duration 00:01:46) [common]
982 23:17:45.495180 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
984 23:17:45.496235 end: 2 uboot-action (duration 00:01:46) [common]
986 23:17:45.497759 Cleaning after the job
987 23:17:45.498320 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/ramdisk
988 23:17:45.499677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/kernel
989 23:17:45.522850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/dtb
990 23:17:45.524349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683278/tftp-deploy-_maya_id/modules
991 23:17:45.530687 start: 4.1 power-off (timeout 00:00:30) [common]
992 23:17:45.531737 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
993 23:17:45.566931 >> OK - accepted request
994 23:17:45.569168 Returned 0 in 0 seconds
995 23:17:45.670110 end: 4.1 power-off (duration 00:00:00) [common]
997 23:17:45.671734 start: 4.2 read-feedback (timeout 00:10:00) [common]
998 23:17:45.672913 Listened to connection for namespace 'common' for up to 1s
999 23:17:46.673730 Finalising connection for namespace 'common'
1000 23:17:46.674278 Disconnecting from shell: Finalise
1001 23:17:46.674615 =>
1002 23:17:46.775555 end: 4.2 read-feedback (duration 00:00:01) [common]
1003 23:17:46.776077 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/683278
1004 23:17:47.350399 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/683278
1005 23:17:47.351005 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.