Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:34:15.667845 lava-dispatcher, installed at version: 2024.01
2 00:34:15.668680 start: 0 validate
3 00:34:15.669148 Start time: 2024-09-01 00:34:15.669119+00:00 (UTC)
4 00:34:15.669701 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:34:15.670237 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:34:15.712959 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:34:15.713502 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:34:15.743514 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:34:15.744160 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:34:15.775716 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:34:15.776259 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:34:15.811330 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:34:15.811829 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc5-316-g6cd90e5ea72f3%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:34:15.850062 validate duration: 0.18
16 00:34:15.850953 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:34:15.851307 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:34:15.851620 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:34:15.852301 Not decompressing ramdisk as can be used compressed.
20 00:34:15.852801 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 00:34:15.853093 saving as /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/ramdisk/initrd.cpio.gz
22 00:34:15.853382 total size: 5628140 (5 MB)
23 00:34:15.894376 progress 0 % (0 MB)
24 00:34:15.898822 progress 5 % (0 MB)
25 00:34:15.902968 progress 10 % (0 MB)
26 00:34:15.906725 progress 15 % (0 MB)
27 00:34:15.910885 progress 20 % (1 MB)
28 00:34:15.914575 progress 25 % (1 MB)
29 00:34:15.918654 progress 30 % (1 MB)
30 00:34:15.922758 progress 35 % (1 MB)
31 00:34:15.926516 progress 40 % (2 MB)
32 00:34:15.930603 progress 45 % (2 MB)
33 00:34:15.934259 progress 50 % (2 MB)
34 00:34:15.938271 progress 55 % (2 MB)
35 00:34:15.942352 progress 60 % (3 MB)
36 00:34:15.946026 progress 65 % (3 MB)
37 00:34:15.950134 progress 70 % (3 MB)
38 00:34:15.954123 progress 75 % (4 MB)
39 00:34:15.958295 progress 80 % (4 MB)
40 00:34:15.962053 progress 85 % (4 MB)
41 00:34:15.966068 progress 90 % (4 MB)
42 00:34:15.969807 progress 95 % (5 MB)
43 00:34:15.973144 progress 100 % (5 MB)
44 00:34:15.973805 5 MB downloaded in 0.12 s (44.58 MB/s)
45 00:34:15.974366 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:34:15.975251 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:34:15.975559 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:34:15.975834 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:34:15.976330 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig/clang-15/kernel/Image
51 00:34:15.976585 saving as /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/kernel/Image
52 00:34:15.976796 total size: 37407232 (35 MB)
53 00:34:15.977007 No compression specified
54 00:34:16.014479 progress 0 % (0 MB)
55 00:34:16.038504 progress 5 % (1 MB)
56 00:34:16.062419 progress 10 % (3 MB)
57 00:34:16.085731 progress 15 % (5 MB)
58 00:34:16.109026 progress 20 % (7 MB)
59 00:34:16.132734 progress 25 % (8 MB)
60 00:34:16.156611 progress 30 % (10 MB)
61 00:34:16.180269 progress 35 % (12 MB)
62 00:34:16.203762 progress 40 % (14 MB)
63 00:34:16.227479 progress 45 % (16 MB)
64 00:34:16.250867 progress 50 % (17 MB)
65 00:34:16.274762 progress 55 % (19 MB)
66 00:34:16.298397 progress 60 % (21 MB)
67 00:34:16.322240 progress 65 % (23 MB)
68 00:34:16.345913 progress 70 % (25 MB)
69 00:34:16.370006 progress 75 % (26 MB)
70 00:34:16.393486 progress 80 % (28 MB)
71 00:34:16.417015 progress 85 % (30 MB)
72 00:34:16.440740 progress 90 % (32 MB)
73 00:34:16.464190 progress 95 % (33 MB)
74 00:34:16.487316 progress 100 % (35 MB)
75 00:34:16.488025 35 MB downloaded in 0.51 s (69.78 MB/s)
76 00:34:16.488510 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:34:16.489335 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:34:16.489611 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:34:16.489881 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:34:16.490336 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:34:16.490612 saving as /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:34:16.490820 total size: 53173 (0 MB)
84 00:34:16.491028 No compression specified
85 00:34:16.535315 progress 61 % (0 MB)
86 00:34:16.536218 progress 100 % (0 MB)
87 00:34:16.536775 0 MB downloaded in 0.05 s (1.10 MB/s)
88 00:34:16.537267 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:34:16.538078 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:34:16.538345 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:34:16.538610 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:34:16.539060 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 00:34:16.539307 saving as /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/nfsrootfs/full.rootfs.tar
95 00:34:16.539514 total size: 474398908 (452 MB)
96 00:34:16.539725 Using unxz to decompress xz
97 00:34:16.580513 progress 0 % (0 MB)
98 00:34:17.673593 progress 5 % (22 MB)
99 00:34:19.107202 progress 10 % (45 MB)
100 00:34:19.563720 progress 15 % (67 MB)
101 00:34:20.350305 progress 20 % (90 MB)
102 00:34:20.886934 progress 25 % (113 MB)
103 00:34:21.272382 progress 30 % (135 MB)
104 00:34:21.885855 progress 35 % (158 MB)
105 00:34:22.749222 progress 40 % (181 MB)
106 00:34:23.531097 progress 45 % (203 MB)
107 00:34:24.083417 progress 50 % (226 MB)
108 00:34:24.725153 progress 55 % (248 MB)
109 00:34:25.936547 progress 60 % (271 MB)
110 00:34:27.421786 progress 65 % (294 MB)
111 00:34:29.066335 progress 70 % (316 MB)
112 00:34:32.155060 progress 75 % (339 MB)
113 00:34:34.575467 progress 80 % (361 MB)
114 00:34:37.423389 progress 85 % (384 MB)
115 00:34:40.579654 progress 90 % (407 MB)
116 00:34:43.760666 progress 95 % (429 MB)
117 00:34:46.963728 progress 100 % (452 MB)
118 00:34:46.978232 452 MB downloaded in 30.44 s (14.86 MB/s)
119 00:34:46.980467 end: 1.4.1 http-download (duration 00:00:30) [common]
121 00:34:46.987831 end: 1.4 download-retry (duration 00:00:30) [common]
122 00:34:46.992008 start: 1.5 download-retry (timeout 00:09:29) [common]
123 00:34:46.992472 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 00:34:46.993221 downloading http://storage.kernelci.org/mainline/master/v6.11-rc5-316-g6cd90e5ea72f3/arm64/defconfig/clang-15/modules.tar.xz
125 00:34:46.993616 saving as /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/modules/modules.tar
126 00:34:46.993902 total size: 11635712 (11 MB)
127 00:34:46.994176 Using unxz to decompress xz
128 00:34:47.046561 progress 0 % (0 MB)
129 00:34:47.130610 progress 5 % (0 MB)
130 00:34:47.234188 progress 10 % (1 MB)
131 00:34:47.337151 progress 15 % (1 MB)
132 00:34:47.440332 progress 20 % (2 MB)
133 00:34:47.529593 progress 25 % (2 MB)
134 00:34:47.623256 progress 30 % (3 MB)
135 00:34:47.716716 progress 35 % (3 MB)
136 00:34:47.813396 progress 40 % (4 MB)
137 00:34:47.908811 progress 45 % (5 MB)
138 00:34:48.004752 progress 50 % (5 MB)
139 00:34:48.105968 progress 55 % (6 MB)
140 00:34:48.199073 progress 60 % (6 MB)
141 00:34:48.297982 progress 65 % (7 MB)
142 00:34:48.395037 progress 70 % (7 MB)
143 00:34:48.495725 progress 75 % (8 MB)
144 00:34:48.608309 progress 80 % (8 MB)
145 00:34:48.721586 progress 85 % (9 MB)
146 00:34:48.807630 progress 90 % (10 MB)
147 00:34:48.889192 progress 95 % (10 MB)
148 00:34:48.966081 progress 100 % (11 MB)
149 00:34:48.978425 11 MB downloaded in 1.98 s (5.59 MB/s)
150 00:34:48.979536 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:34:48.981747 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:34:48.982427 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 00:34:48.983104 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 00:35:05.215290 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/683321/extract-nfsrootfs-7501c87y
156 00:35:05.215909 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 00:35:05.216251 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 00:35:05.216982 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo
159 00:35:05.217517 makedir: /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin
160 00:35:05.217899 makedir: /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/tests
161 00:35:05.218355 makedir: /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/results
162 00:35:05.218731 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-add-keys
163 00:35:05.219357 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-add-sources
164 00:35:05.220056 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-background-process-start
165 00:35:05.221249 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-background-process-stop
166 00:35:05.221894 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-common-functions
167 00:35:05.222471 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-echo-ipv4
168 00:35:05.223012 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-install-packages
169 00:35:05.223553 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-installed-packages
170 00:35:05.224101 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-os-build
171 00:35:05.224843 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-probe-channel
172 00:35:05.225396 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-probe-ip
173 00:35:05.225930 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-target-ip
174 00:35:05.226473 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-target-mac
175 00:35:05.227011 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-target-storage
176 00:35:05.227552 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-case
177 00:35:05.228141 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-event
178 00:35:05.228679 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-feedback
179 00:35:05.229209 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-raise
180 00:35:05.229734 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-reference
181 00:35:05.230270 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-runner
182 00:35:05.230893 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-set
183 00:35:05.231431 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-test-shell
184 00:35:05.232024 Updating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-install-packages (oe)
185 00:35:05.232657 Updating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/bin/lava-installed-packages (oe)
186 00:35:05.234294 Creating /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/environment
187 00:35:05.235079 LAVA metadata
188 00:35:05.235370 - LAVA_JOB_ID=683321
189 00:35:05.235589 - LAVA_DISPATCHER_IP=192.168.6.2
190 00:35:05.236001 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 00:35:05.237224 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 00:35:05.237593 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 00:35:05.237807 skipped lava-vland-overlay
194 00:35:05.238054 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 00:35:05.238312 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 00:35:05.238533 skipped lava-multinode-overlay
197 00:35:05.238776 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 00:35:05.239028 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 00:35:05.239286 Loading test definitions
200 00:35:05.239572 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 00:35:05.239796 Using /lava-683321 at stage 0
202 00:35:05.241116 uuid=683321_1.6.2.4.1 testdef=None
203 00:35:05.241477 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 00:35:05.241749 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 00:35:05.243651 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 00:35:05.244562 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 00:35:05.247316 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 00:35:05.248246 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 00:35:05.250749 runner path: /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 683321_1.6.2.4.1
212 00:35:05.251453 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 00:35:05.252309 Creating lava-test-runner.conf files
215 00:35:05.252521 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/683321/lava-overlay-lhbdtimo/lava-683321/0 for stage 0
216 00:35:05.252927 - 0_v4l2-decoder-conformance-h264
217 00:35:05.253549 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 00:35:05.253880 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 00:35:05.281118 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 00:35:05.281579 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 00:35:05.281845 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 00:35:05.282119 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 00:35:05.282384 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 00:35:05.972892 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 00:35:05.973376 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 00:35:05.973649 extracting modules file /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683321/extract-nfsrootfs-7501c87y
227 00:35:07.400612 extracting modules file /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/683321/extract-overlay-ramdisk-961nh8pv/ramdisk
228 00:35:08.815807 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 00:35:08.816320 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 00:35:08.816599 [common] Applying overlay to NFS
231 00:35:08.816813 [common] Applying overlay /var/lib/lava/dispatcher/tmp/683321/compress-overlay-3lpuw2rl/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/683321/extract-nfsrootfs-7501c87y
232 00:35:08.846169 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 00:35:08.846558 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 00:35:08.846829 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 00:35:08.847059 Converting downloaded kernel to a uImage
236 00:35:08.847370 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/kernel/Image /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/kernel/uImage
237 00:35:09.241426 output: Image Name:
238 00:35:09.241845 output: Created: Sun Sep 1 00:35:08 2024
239 00:35:09.242058 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 00:35:09.242262 output: Data Size: 37407232 Bytes = 36530.50 KiB = 35.67 MiB
241 00:35:09.242464 output: Load Address: 01080000
242 00:35:09.242663 output: Entry Point: 01080000
243 00:35:09.242861 output:
244 00:35:09.243196 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 00:35:09.243465 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 00:35:09.243735 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 00:35:09.244024 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 00:35:09.244302 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 00:35:09.244557 Building ramdisk /var/lib/lava/dispatcher/tmp/683321/extract-overlay-ramdisk-961nh8pv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/683321/extract-overlay-ramdisk-961nh8pv/ramdisk
250 00:35:11.863858 >> 171797 blocks
251 00:35:19.485399 Adding RAMdisk u-boot header.
252 00:35:19.486097 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/683321/extract-overlay-ramdisk-961nh8pv/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/683321/extract-overlay-ramdisk-961nh8pv/ramdisk.cpio.gz.uboot
253 00:35:19.744516 output: Image Name:
254 00:35:19.744969 output: Created: Sun Sep 1 00:35:19 2024
255 00:35:19.745210 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 00:35:19.745418 output: Data Size: 23961597 Bytes = 23400.00 KiB = 22.85 MiB
257 00:35:19.745621 output: Load Address: 00000000
258 00:35:19.745821 output: Entry Point: 00000000
259 00:35:19.746021 output:
260 00:35:19.746661 rename /var/lib/lava/dispatcher/tmp/683321/extract-overlay-ramdisk-961nh8pv/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot
261 00:35:19.747088 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 00:35:19.747378 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 00:35:19.747679 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 00:35:19.747923 No LXC device requested
265 00:35:19.748389 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 00:35:19.748909 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 00:35:19.749408 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 00:35:19.749824 Checking files for TFTP limit of 4294967296 bytes.
269 00:35:19.752519 end: 1 tftp-deploy (duration 00:01:04) [common]
270 00:35:19.753102 start: 2 uboot-action (timeout 00:05:00) [common]
271 00:35:19.753626 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 00:35:19.754121 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 00:35:19.754622 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 00:35:19.755146 Using kernel file from prepare-kernel: 683321/tftp-deploy-dz812mfy/kernel/uImage
275 00:35:19.755813 substitutions:
276 00:35:19.756260 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 00:35:19.756664 - {DTB_ADDR}: 0x01070000
278 00:35:19.757058 - {DTB}: 683321/tftp-deploy-dz812mfy/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 00:35:19.757454 - {INITRD}: 683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot
280 00:35:19.757850 - {KERNEL_ADDR}: 0x01080000
281 00:35:19.758238 - {KERNEL}: 683321/tftp-deploy-dz812mfy/kernel/uImage
282 00:35:19.758626 - {LAVA_MAC}: None
283 00:35:19.759056 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/683321/extract-nfsrootfs-7501c87y
284 00:35:19.759615 - {NFS_SERVER_IP}: 192.168.6.2
285 00:35:19.760041 - {PRESEED_CONFIG}: None
286 00:35:19.760441 - {PRESEED_LOCAL}: None
287 00:35:19.760835 - {RAMDISK_ADDR}: 0x08000000
288 00:35:19.761223 - {RAMDISK}: 683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot
289 00:35:19.761611 - {ROOT_PART}: None
290 00:35:19.762002 - {ROOT}: None
291 00:35:19.762388 - {SERVER_IP}: 192.168.6.2
292 00:35:19.762772 - {TEE_ADDR}: 0x83000000
293 00:35:19.763155 - {TEE}: None
294 00:35:19.763541 Parsed boot commands:
295 00:35:19.763920 - setenv autoload no
296 00:35:19.764326 - setenv initrd_high 0xffffffff
297 00:35:19.764712 - setenv fdt_high 0xffffffff
298 00:35:19.765097 - dhcp
299 00:35:19.765479 - setenv serverip 192.168.6.2
300 00:35:19.765861 - tftpboot 0x01080000 683321/tftp-deploy-dz812mfy/kernel/uImage
301 00:35:19.766247 - tftpboot 0x08000000 683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot
302 00:35:19.766630 - tftpboot 0x01070000 683321/tftp-deploy-dz812mfy/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 00:35:19.767010 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/683321/extract-nfsrootfs-7501c87y,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 00:35:19.767405 - bootm 0x01080000 0x08000000 0x01070000
305 00:35:19.767904 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 00:35:19.769423 start: 2.3 connect-device (timeout 00:05:00) [common]
308 00:35:19.769840 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 00:35:19.784944 Setting prompt string to ['lava-test: # ']
310 00:35:19.786436 end: 2.3 connect-device (duration 00:00:00) [common]
311 00:35:19.787026 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 00:35:19.787578 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 00:35:19.788135 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 00:35:19.789254 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 00:35:19.826374 >> OK - accepted request
316 00:35:19.828504 Returned 0 in 0 seconds
317 00:35:19.929633 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 00:35:19.931273 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 00:35:19.931811 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 00:35:19.932387 Setting prompt string to ['Hit any key to stop autoboot']
322 00:35:19.932850 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 00:35:19.934407 Trying 192.168.56.21...
324 00:35:19.934888 Connected to conserv1.
325 00:35:19.935306 Escape character is '^]'.
326 00:35:19.935726
327 00:35:19.936227 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 00:35:19.936662
329 00:35:27.173902 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 00:35:27.174355 bl2_stage_init 0x01
331 00:35:27.174615 bl2_stage_init 0x81
332 00:35:27.179384 hw id: 0x0000 - pwm id 0x01
333 00:35:27.179750 bl2_stage_init 0xc1
334 00:35:27.184256 bl2_stage_init 0x02
335 00:35:27.184618
336 00:35:27.184872 L0:00000000
337 00:35:27.185107 L1:00000703
338 00:35:27.185360 L2:00008067
339 00:35:27.189807 L3:15000000
340 00:35:27.190176 S1:00000000
341 00:35:27.190442 B2:20282000
342 00:35:27.190682 B1:a0f83180
343 00:35:27.190914
344 00:35:27.191145 TE: 70360
345 00:35:27.191380
346 00:35:27.201075 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 00:35:27.201483
348 00:35:27.201728 Board ID = 1
349 00:35:27.201968 Set cpu clk to 24M
350 00:35:27.202199 Set clk81 to 24M
351 00:35:27.204436 Use GP1_pll as DSU clk.
352 00:35:27.204761 DSU clk: 1200 Mhz
353 00:35:27.209998 CPU clk: 1200 MHz
354 00:35:27.210347 Set clk81 to 166.6M
355 00:35:27.215601 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 00:35:27.215912 board id: 1
357 00:35:27.224822 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 00:35:27.236355 fw parse done
359 00:35:27.242387 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 00:35:27.285282 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 00:35:27.295920 PIEI prepare done
362 00:35:27.296608 fastboot data load
363 00:35:27.297152 fastboot data verify
364 00:35:27.301499 verify result: 266
365 00:35:27.307202 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 00:35:27.307791 LPDDR4 probe
367 00:35:27.308356 ddr clk to 1584MHz
368 00:35:27.315162 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 00:35:27.352480
370 00:35:27.353084 dmc_version 0001
371 00:35:27.359119 Check phy result
372 00:35:27.364988 INFO : End of CA training
373 00:35:27.365506 INFO : End of initialization
374 00:35:27.370569 INFO : Training has run successfully!
375 00:35:27.371084 Check phy result
376 00:35:27.376222 INFO : End of initialization
377 00:35:27.376699 INFO : End of read enable training
378 00:35:27.379479 INFO : End of fine write leveling
379 00:35:27.385114 INFO : End of Write leveling coarse delay
380 00:35:27.390651 INFO : Training has run successfully!
381 00:35:27.391195 Check phy result
382 00:35:27.391622 INFO : End of initialization
383 00:35:27.396228 INFO : End of read dq deskew training
384 00:35:27.401898 INFO : End of MPR read delay center optimization
385 00:35:27.402421 INFO : End of write delay center optimization
386 00:35:27.407483 INFO : End of read delay center optimization
387 00:35:27.413097 INFO : End of max read latency training
388 00:35:27.413606 INFO : Training has run successfully!
389 00:35:27.418627 1D training succeed
390 00:35:27.424672 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 00:35:27.472324 Check phy result
392 00:35:27.473058 INFO : End of initialization
393 00:35:27.494611 INFO : End of 2D read delay Voltage center optimization
394 00:35:27.513740 INFO : End of 2D read delay Voltage center optimization
395 00:35:27.565659 INFO : End of 2D write delay Voltage center optimization
396 00:35:27.614963 INFO : End of 2D write delay Voltage center optimization
397 00:35:27.620337 INFO : Training has run successfully!
398 00:35:27.620984
399 00:35:27.621557 channel==0
400 00:35:27.625924 RxClkDly_Margin_A0==78 ps 8
401 00:35:27.626562 TxDqDly_Margin_A0==98 ps 10
402 00:35:27.629379 RxClkDly_Margin_A1==88 ps 9
403 00:35:27.630031 TxDqDly_Margin_A1==98 ps 10
404 00:35:27.634850 TrainedVREFDQ_A0==74
405 00:35:27.635484 TrainedVREFDQ_A1==74
406 00:35:27.636046 VrefDac_Margin_A0==23
407 00:35:27.640541 DeviceVref_Margin_A0==40
408 00:35:27.641126 VrefDac_Margin_A1==23
409 00:35:27.646137 DeviceVref_Margin_A1==40
410 00:35:27.646754
411 00:35:27.647306
412 00:35:27.647846 channel==1
413 00:35:27.648407 RxClkDly_Margin_A0==78 ps 8
414 00:35:27.649600 TxDqDly_Margin_A0==98 ps 10
415 00:35:27.655314 RxClkDly_Margin_A1==88 ps 9
416 00:35:27.655953 TxDqDly_Margin_A1==88 ps 9
417 00:35:27.656538 TrainedVREFDQ_A0==78
418 00:35:27.660759 TrainedVREFDQ_A1==75
419 00:35:27.661347 VrefDac_Margin_A0==23
420 00:35:27.666461 DeviceVref_Margin_A0==36
421 00:35:27.667077 VrefDac_Margin_A1==20
422 00:35:27.667609 DeviceVref_Margin_A1==39
423 00:35:27.668161
424 00:35:27.671944 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 00:35:27.672555
426 00:35:27.705502 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000016 00000017 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 00:35:27.706218 2D training succeed
428 00:35:27.711270 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 00:35:27.716715 auto size-- 65535DDR cs0 size: 2048MB
430 00:35:27.717230 DDR cs1 size: 2048MB
431 00:35:27.722325 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 00:35:27.722831 cs0 DataBus test pass
433 00:35:27.723279 cs1 DataBus test pass
434 00:35:27.727917 cs0 AddrBus test pass
435 00:35:27.728454 cs1 AddrBus test pass
436 00:35:27.728903
437 00:35:27.733519 100bdlr_step_size ps== 464
438 00:35:27.734041 result report
439 00:35:27.734485 boot times 0Enable ddr reg access
440 00:35:27.743137 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 00:35:27.756914 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 00:35:28.411499 bl2z: ptr: 05129330, size: 00001e40
443 00:35:28.417169 0.0;M3 CHK:0;cm4_sp_mode 0
444 00:35:28.417596 MVN_1=0x00000000
445 00:35:28.417851 MVN_2=0x00000000
446 00:35:28.428555 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 00:35:28.428962 OPS=0x04
448 00:35:28.429202 ring efuse init
449 00:35:28.434263 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 00:35:28.434648 [0.017319 Inits done]
451 00:35:28.434894 secure task start!
452 00:35:28.441706 high task start!
453 00:35:28.442129 low task start!
454 00:35:28.442385 run into bl31
455 00:35:28.450324 NOTICE: BL31: v1.3(release):4fc40b1
456 00:35:28.458142 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 00:35:28.458760 NOTICE: BL31: G12A normal boot!
458 00:35:28.473637 NOTICE: BL31: BL33 decompress pass
459 00:35:28.479527 ERROR: Error initializing runtime service opteed_fast
460 00:35:29.724282 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 00:35:29.724906 bl2_stage_init 0x01
462 00:35:29.725341 bl2_stage_init 0x81
463 00:35:29.729943 hw id: 0x0000 - pwm id 0x01
464 00:35:29.730395 bl2_stage_init 0xc1
465 00:35:29.736076 bl2_stage_init 0x02
466 00:35:29.736520
467 00:35:29.736941 L0:00000000
468 00:35:29.737347 L1:00000703
469 00:35:29.737754 L2:00008067
470 00:35:29.738159 L3:15000000
471 00:35:29.741491 S1:00000000
472 00:35:29.741950 B2:20282000
473 00:35:29.742357 B1:a0f83180
474 00:35:29.742771
475 00:35:29.743178 TE: 69399
476 00:35:29.743576
477 00:35:29.747080 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 00:35:29.747538
479 00:35:29.752659 Board ID = 1
480 00:35:29.753101 Set cpu clk to 24M
481 00:35:29.753505 Set clk81 to 24M
482 00:35:29.758349 Use GP1_pll as DSU clk.
483 00:35:29.758793 DSU clk: 1200 Mhz
484 00:35:29.759201 CPU clk: 1200 MHz
485 00:35:29.759600 Set clk81 to 166.6M
486 00:35:29.769545 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 00:35:29.769991 board id: 1
488 00:35:29.776264 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 00:35:29.786906 fw parse done
490 00:35:29.792877 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 00:35:29.835570 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 00:35:29.846495 PIEI prepare done
493 00:35:29.846946 fastboot data load
494 00:35:29.847360 fastboot data verify
495 00:35:29.852071 verify result: 266
496 00:35:29.857634 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 00:35:29.857920 LPDDR4 probe
498 00:35:29.858133 ddr clk to 1584MHz
499 00:35:31.223785 Load ddrfw from SPI, src: 0x00018000, des: 0xff SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 00:35:31.224453 bl2_stage_init 0x01
501 00:35:31.224892 bl2_stage_init 0x81
502 00:35:31.229396 hw id: 0x0000 - pwm id 0x01
503 00:35:31.229878 bl2_stage_init 0xc1
504 00:35:31.230291 bl2_stage_init 0x02
505 00:35:31.230693
506 00:35:31.234997 L0:00000000
507 00:35:31.235507 L1:00000703
508 00:35:31.235902 L2:00008067
509 00:35:31.236333 L3:15000000
510 00:35:31.236734 S1:00000000
511 00:35:31.240610 B2:20282000
512 00:35:31.241051 B1:a0f83180
513 00:35:31.241443
514 00:35:31.241836 TE: 69816
515 00:35:31.242228
516 00:35:31.246167 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 00:35:31.246597
518 00:35:31.251749 Board ID = 1
519 00:35:31.252204 Set cpu clk to 24M
520 00:35:31.252601 Set clk81 to 24M
521 00:35:31.257352 Use GP1_pll as DSU clk.
522 00:35:31.257774 DSU clk: 1200 Mhz
523 00:35:31.258162 CPU clk: 1200 MHz
524 00:35:31.258545 Set clk81 to 166.6M
525 00:35:31.268593 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 00:35:31.269052 board id: 1
527 00:35:31.274966 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 00:35:31.285897 fw parse done
529 00:35:31.291869 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 00:35:31.335152 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 00:35:31.346098 PIEI prepare done
532 00:35:31.346411 fastboot data load
533 00:35:31.346629 fastboot data verify
534 00:35:31.351676 verify result: 266
535 00:35:31.357395 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 00:35:31.357929 LPDDR4 probe
537 00:35:31.358355 ddr clk to 1584MHz
538 00:35:31.365288 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 00:35:31.403077
540 00:35:31.403604 dmc_version 0001
541 00:35:31.410088 Check phy result
542 00:35:31.416104 INFO : End of CA training
543 00:35:31.416615 INFO : End of initialization
544 00:35:31.421728 INFO : Training has run successfully!
545 00:35:31.422256 Check phy result
546 00:35:31.427363 INFO : End of initialization
547 00:35:31.427883 INFO : End of read enable training
548 00:35:31.430713 INFO : End of fine write leveling
549 00:35:31.436225 INFO : End of Write leveling coarse delay
550 00:35:31.441810 INFO : Training has run successfully!
551 00:35:31.442338 Check phy result
552 00:35:31.442759 INFO : End of initialization
553 00:35:31.447379 INFO : End of read dq deskew training
554 00:35:31.452985 INFO : End of MPR read delay center optimization
555 00:35:31.453579 INFO : End of write delay center optimization
556 00:35:31.458729 INFO : End of read delay center optimization
557 00:35:31.464312 INFO : End of max read latency training
558 00:35:31.464640 INFO : Training has run successfully!
559 00:35:31.469865 1D training succeed
560 00:35:31.475787 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 00:35:31.524033 Check phy result
562 00:35:31.524637 INFO : End of initialization
563 00:35:31.551416 INFO : End of 2D read delay Voltage center optimization
564 00:35:31.575556 INFO : End of 2D read delay Voltage center optimization
565 00:35:31.632249 INFO : End of 2D write delay Voltage center optimization
566 00:35:31.686064 INFO : End of 2D write delay Voltage center optimization
567 00:35:31.691663 INFO : Training has run successfully!
568 00:35:31.692211
569 00:35:31.692665 channel==0
570 00:35:31.697162 RxClkDly_Margin_A0==78 ps 8
571 00:35:31.697633 TxDqDly_Margin_A0==88 ps 9
572 00:35:31.700516 RxClkDly_Margin_A1==88 ps 9
573 00:35:31.700976 TxDqDly_Margin_A1==98 ps 10
574 00:35:31.706101 TrainedVREFDQ_A0==74
575 00:35:31.706587 TrainedVREFDQ_A1==74
576 00:35:31.707003 VrefDac_Margin_A0==24
577 00:35:31.711679 DeviceVref_Margin_A0==40
578 00:35:31.712193 VrefDac_Margin_A1==23
579 00:35:31.717302 DeviceVref_Margin_A1==40
580 00:35:31.717774
581 00:35:31.718188
582 00:35:31.718592 channel==1
583 00:35:31.718989 RxClkDly_Margin_A0==78 ps 8
584 00:35:31.720645 TxDqDly_Margin_A0==88 ps 9
585 00:35:31.726194 RxClkDly_Margin_A1==78 ps 8
586 00:35:31.726616 TxDqDly_Margin_A1==88 ps 9
587 00:35:31.727022 TrainedVREFDQ_A0==75
588 00:35:31.731823 TrainedVREFDQ_A1==75
589 00:35:31.732327 VrefDac_Margin_A0==22
590 00:35:31.737425 DeviceVref_Margin_A0==39
591 00:35:31.737922 VrefDac_Margin_A1==22
592 00:35:31.738338 DeviceVref_Margin_A1==38
593 00:35:31.738744
594 00:35:31.743059 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 00:35:31.743607
596 00:35:31.776673 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 00:35:31.777279 2D training succeed
598 00:35:31.782221 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 00:35:31.787814 auto size-- 65535DDR cs0 size: 2048MB
600 00:35:31.788316 DDR cs1 size: 2048MB
601 00:35:31.793400 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 00:35:31.793856 cs0 DataBus test pass
603 00:35:31.794281 cs1 DataBus test pass
604 00:35:31.798998 cs0 AddrBus test pass
605 00:35:31.799431 cs1 AddrBus test pass
606 00:35:31.799859
607 00:35:31.804679 100bdlr_step_size ps== 478
608 00:35:31.805184 result report
609 00:35:31.805617 boot times 0Enable ddr reg access
610 00:35:31.814240 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 00:35:31.828241 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 00:35:32.486518 bl2z: ptr: 05129330, size: 00001e40
613 00:35:32.494156 0.0;M3 CHK:0;cm4_sp_mode 0
614 00:35:32.494646 MVN_1=0x00000000
615 00:35:32.495068 MVN_2=0x00000000
616 00:35:32.505741 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 00:35:32.506233 OPS=0x04
618 00:35:32.506653 ring efuse init
619 00:35:32.511277 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 00:35:32.511733 [0.017354 Inits done]
621 00:35:32.512174 secure task start!
622 00:35:32.518674 high task start!
623 00:35:32.519148 low task start!
624 00:35:32.519576 run into bl31
625 00:35:32.527285 NOTICE: BL31: v1.3(release):4fc40b1
626 00:35:32.535077 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 00:35:32.535548 NOTICE: BL31: G12A normal boot!
628 00:35:32.550736 NOTICE: BL31: BL33 decompress pass
629 00:35:32.556345 ERROR: Error initializing runtime service opteed_fast
630 00:35:33.774220 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 00:35:33.774833 bl2_stage_init 0x01
632 00:35:33.775293 bl2_stage_init 0x81
633 00:35:33.779711 hw id: 0x0000 - pwm id 0x01
634 00:35:33.780223 bl2_stage_init 0xc1
635 00:35:33.784196 bl2_stage_init 0x02
636 00:35:33.784644
637 00:35:33.785062 L0:00000000
638 00:35:33.785465 L1:00000703
639 00:35:33.785861 L2:00008067
640 00:35:33.789599 L3:15000000
641 00:35:33.790027 S1:00000000
642 00:35:33.790429 B2:20282000
643 00:35:33.790825 B1:a0f83180
644 00:35:33.791215
645 00:35:33.791609 TE: 70517
646 00:35:33.795264
647 00:35:33.800770 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 00:35:33.801213
649 00:35:33.801623 Board ID = 1
650 00:35:33.802020 Set cpu clk to 24M
651 00:35:33.806374 Set clk81 to 24M
652 00:35:33.806803 Use GP1_pll as DSU clk.
653 00:35:33.807206 DSU clk: 1200 Mhz
654 00:35:33.807599 CPU clk: 1200 MHz
655 00:35:33.812054 Set clk81 to 166.6M
656 00:35:33.817611 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 00:35:33.818044 board id: 1
658 00:35:33.826135 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 00:35:33.836695 fw parse done
660 00:35:33.842672 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 00:35:33.884426 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 00:35:33.896297 PIEI prepare done
663 00:35:33.896746 fastboot data load
664 00:35:33.897161 fastboot data verify
665 00:35:33.901850 verify result: 266
666 00:35:33.907454 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 00:35:33.907895 LPDDR4 probe
668 00:35:33.908343 ddr clk to 1584MHz
669 00:35:33.915457 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 00:35:33.952694
671 00:35:33.953173 dmc_version 0001
672 00:35:33.959274 Check phy result
673 00:35:33.965180 INFO : End of CA training
674 00:35:33.965642 INFO : End of initialization
675 00:35:33.970864 INFO : Training has run successfully!
676 00:35:33.971342 Check phy result
677 00:35:33.976473 INFO : End of initialization
678 00:35:33.976911 INFO : End of read enable training
679 00:35:33.979722 INFO : End of fine write leveling
680 00:35:33.985298 INFO : End of Write leveling coarse delay
681 00:35:33.990898 INFO : Training has run successfully!
682 00:35:33.991367 Check phy result
683 00:35:33.991783 INFO : End of initialization
684 00:35:33.996486 INFO : End of read dq deskew training
685 00:35:33.999875 INFO : End of MPR read delay center optimization
686 00:35:34.005485 INFO : End of write delay center optimization
687 00:35:34.011145 INFO : End of read delay center optimization
688 00:35:34.011624 INFO : End of max read latency training
689 00:35:34.016569 INFO : Training has run successfully!
690 00:35:34.017026 1D training succeed
691 00:35:34.024890 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 00:35:34.072362 Check phy result
693 00:35:34.072868 INFO : End of initialization
694 00:35:34.094708 INFO : End of 2D read delay Voltage center optimization
695 00:35:34.113900 INFO : End of 2D read delay Voltage center optimization
696 00:35:34.165830 INFO : End of 2D write delay Voltage center optimization
697 00:35:34.215384 INFO : End of 2D write delay Voltage center optimization
698 00:35:34.220697 INFO : Training has run successfully!
699 00:35:34.221161
700 00:35:34.221580 channel==0
701 00:35:34.226251 RxClkDly_Margin_A0==88 ps 9
702 00:35:34.226689 TxDqDly_Margin_A0==98 ps 10
703 00:35:34.229514 RxClkDly_Margin_A1==88 ps 9
704 00:35:34.229944 TxDqDly_Margin_A1==88 ps 9
705 00:35:34.235389 TrainedVREFDQ_A0==77
706 00:35:34.235819 TrainedVREFDQ_A1==74
707 00:35:34.240485 VrefDac_Margin_A0==23
708 00:35:34.240919 DeviceVref_Margin_A0==37
709 00:35:34.241327 VrefDac_Margin_A1==23
710 00:35:34.246781 DeviceVref_Margin_A1==40
711 00:35:34.247207
712 00:35:34.247613
713 00:35:34.248040 channel==1
714 00:35:34.248446 RxClkDly_Margin_A0==78 ps 8
715 00:35:34.249699 TxDqDly_Margin_A0==98 ps 10
716 00:35:34.255281 RxClkDly_Margin_A1==78 ps 8
717 00:35:34.255744 TxDqDly_Margin_A1==88 ps 9
718 00:35:34.256189 TrainedVREFDQ_A0==78
719 00:35:34.260803 TrainedVREFDQ_A1==78
720 00:35:34.261241 VrefDac_Margin_A0==23
721 00:35:34.266371 DeviceVref_Margin_A0==36
722 00:35:34.266818 VrefDac_Margin_A1==22
723 00:35:34.267227 DeviceVref_Margin_A1==36
724 00:35:34.267627
725 00:35:34.272045 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 00:35:34.272482
727 00:35:34.305704 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 00:35:34.306185 2D training succeed
729 00:35:34.311299 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 00:35:34.316929 auto size-- 65535DDR cs0 size: 2048MB
731 00:35:34.317398 DDR cs1 size: 2048MB
732 00:35:34.322501 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 00:35:34.322944 cs0 DataBus test pass
734 00:35:34.323352 cs1 DataBus test pass
735 00:35:34.328204 cs0 AddrBus test pass
736 00:35:34.328650 cs1 AddrBus test pass
737 00:35:34.329052
738 00:35:34.333692 100bdlr_step_size ps== 478
739 00:35:34.334138 result report
740 00:35:34.334543 boot times 0Enable ddr reg access
741 00:35:34.343441 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 00:35:34.357269 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 00:35:35.012098 bl2z: ptr: 05129330, size: 00001e40
744 00:35:35.020443 0.0;M3 CHK:0;cm4_sp_mode 0
745 00:35:35.020916 MVN_1=0x00000000
746 00:35:35.021329 MVN_2=0x00000000
747 00:35:35.031949 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 00:35:35.032436 OPS=0x04
749 00:35:35.032850 ring efuse init
750 00:35:35.037561 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 00:35:35.038015 [0.017319 Inits done]
752 00:35:35.038425 secure task start!
753 00:35:35.045356 high task start!
754 00:35:35.045797 low task start!
755 00:35:35.046208 run into bl31
756 00:35:35.053959 NOTICE: BL31: v1.3(release):4fc40b1
757 00:35:35.060889 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 00:35:35.061364 NOTICE: BL31: G12A normal boot!
759 00:35:35.077224 NOTICE: BL31: BL33 decompress pass
760 00:35:35.082934 ERROR: Error initializing runtime service opteed_fast
761 00:35:35.878242
762 00:35:35.878821
763 00:35:35.883662 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 00:35:35.884182
765 00:35:35.887226 Model: Libre Computer AML-S905D3-CC Solitude
766 00:35:36.034242 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 00:35:36.049669 DRAM: 2 GiB (effective 3.8 GiB)
768 00:35:36.150589 Core: 406 devices, 33 uclasses, devicetree: separate
769 00:35:36.156538 WDT: Not starting watchdog@f0d0
770 00:35:36.181542 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 00:35:36.193756 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 00:35:36.198760 ** Bad device specification mmc 0 **
773 00:35:36.208836 Card did not respond to voltage select! : -110
774 00:35:36.216479 ** Bad device specification mmc 0 **
775 00:35:36.217026 Couldn't find partition mmc 0
776 00:35:36.224824 Card did not respond to voltage select! : -110
777 00:35:36.230465 ** Bad device specification mmc 0 **
778 00:35:36.231042 Couldn't find partition mmc 0
779 00:35:36.235492 Error: could not access storage.
780 00:35:36.531765 Net: eth0: ethernet@ff3f0000
781 00:35:36.532443 starting USB...
782 00:35:36.776476 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 00:35:36.777072 Starting the controller
784 00:35:36.783458 USB XHCI 1.10
785 00:35:38.339654 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 00:35:38.347973 scanning usb for storage devices... 0 Storage Device(s) found
788 00:35:38.399053 Hit any key to stop autoboot: 1
789 00:35:38.400247 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 00:35:38.400934 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 00:35:38.401445 Setting prompt string to ['=>']
792 00:35:38.401939 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 00:35:38.413720 0
794 00:35:38.414605 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 00:35:38.515837 => setenv autoload no
797 00:35:38.516728 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 00:35:38.521606 setenv autoload no
800 00:35:38.623132 => setenv initrd_high 0xffffffff
801 00:35:38.623814 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 00:35:38.628100 setenv initrd_high 0xffffffff
804 00:35:38.729604 => setenv fdt_high 0xffffffff
805 00:35:38.730357 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 00:35:38.734640 setenv fdt_high 0xffffffff
808 00:35:38.836231 => dhcp
809 00:35:38.836942 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 00:35:38.840045 dhcp
811 00:35:39.696848 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 00:35:39.697492 Speed: 1000, full duplex
813 00:35:39.697981 BOOTP broadcast 1
814 00:35:39.945550 BOOTP broadcast 2
815 00:35:40.446369 BOOTP broadcast 3
816 00:35:41.447435 BOOTP broadcast 4
817 00:35:43.448383 BOOTP broadcast 5
818 00:35:43.464226 DHCP client bound to address 192.168.6.12 (3766 ms)
820 00:35:43.565858 => setenv serverip 192.168.6.2
821 00:35:43.566809 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 00:35:43.571385 setenv serverip 192.168.6.2
824 00:35:43.672987 => tftpboot 0x01080000 683321/tftp-deploy-dz812mfy/kernel/uImage
825 00:35:43.673929 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 00:35:43.680829 tftpboot 0x01080000 683321/tftp-deploy-dz812mfy/kernel/uImage
827 00:35:43.681396 Speed: 1000, full duplex
828 00:35:43.681865 Using ethernet@ff3f0000 device
829 00:35:43.686172 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 00:35:43.691651 Filename '683321/tftp-deploy-dz812mfy/kernel/uImage'.
831 00:35:43.695628 Load address: 0x1080000
832 00:35:46.151049 Loading: *################################################## 35.7 MiB
833 00:35:46.151718 14.5 MiB/s
834 00:35:46.152259 done
835 00:35:46.155657 Bytes transferred = 37407296 (23aca40 hex)
837 00:35:46.257313 => tftpboot 0x08000000 683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot
838 00:35:46.258229 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
839 00:35:46.265085 tftpboot 0x08000000 683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot
840 00:35:46.265639 Speed: 1000, full duplex
841 00:35:46.266109 Using ethernet@ff3f0000 device
842 00:35:46.270487 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 00:35:46.280382 Filename '683321/tftp-deploy-dz812mfy/ramdisk/ramdisk.cpio.gz.uboot'.
844 00:35:46.280948 Load address: 0x8000000
845 00:35:47.772727 Loading: *################################################# UDP wrong checksum 00000005 00003875
846 00:35:52.773201 T UDP wrong checksum 00000005 00003875
847 00:36:02.775658 T T UDP wrong checksum 00000005 00003875
848 00:36:22.779455 T T T T UDP wrong checksum 00000005 00003875
849 00:36:37.435498 T T UDP wrong checksum 000000ff 0000771e
850 00:36:37.479593 UDP wrong checksum 000000ff 0000fc10
851 00:36:42.784125 T
852 00:36:42.784537 Retry count exceeded; starting again
854 00:36:42.785820 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
857 00:36:42.787244 end: 2.4 uboot-commands (duration 00:01:23) [common]
859 00:36:42.787939 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
861 00:36:42.788525 end: 2 uboot-action (duration 00:01:23) [common]
863 00:36:42.789482 Cleaning after the job
864 00:36:42.789815 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/ramdisk
865 00:36:42.790736 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/kernel
866 00:36:42.802912 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/dtb
867 00:36:42.803880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/nfsrootfs
868 00:36:43.098589 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/683321/tftp-deploy-dz812mfy/modules
869 00:36:43.122576 start: 4.1 power-off (timeout 00:00:30) [common]
870 00:36:43.123271 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
871 00:36:43.170404 >> OK - accepted request
872 00:36:43.172528 Returned 0 in 0 seconds
873 00:36:43.273258 end: 4.1 power-off (duration 00:00:00) [common]
875 00:36:43.274201 start: 4.2 read-feedback (timeout 00:10:00) [common]
876 00:36:43.274819 Listened to connection for namespace 'common' for up to 1s
877 00:36:44.275699 Finalising connection for namespace 'common'
878 00:36:44.276204 Disconnecting from shell: Finalise
879 00:36:44.276514 =>
880 00:36:44.377142 end: 4.2 read-feedback (duration 00:00:01) [common]
881 00:36:44.377570 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/683321
882 00:36:46.997290 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/683321
883 00:36:46.997899 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.