Boot log: beaglebone-black
- Warnings: 2
- Kernel Warnings: 15
- Errors: 0
- Boot result: PASS
- Kernel Errors: 10
1 07:17:12.922186 lava-dispatcher, installed at version: 2023.08
2 07:17:12.922552 start: 0 validate
3 07:17:12.922786 Start time: 2024-09-06 07:17:12.922772+00:00 (UTC)
4 07:17:12.923065 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz exists
5 07:17:13.283590 Validating that http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/kernel/zImage exists
6 07:17:13.445054 Validating that http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/dtbs/ti/omap/am335x-boneblack.dtb exists
7 07:17:13.605716 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz exists
8 07:17:13.768510 Validating that http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/modules.tar.xz exists
9 07:17:13.937658 validate duration: 1.01
11 07:17:13.938750 start: 1 tftp-deploy (timeout 00:10:00) [common]
12 07:17:13.939226 start: 1.1 download-retry (timeout 00:10:00) [common]
13 07:17:13.939692 start: 1.1.1 http-download (timeout 00:10:00) [common]
14 07:17:13.940464 Not decompressing ramdisk as can be used compressed.
15 07:17:13.940900 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz
16 07:17:13.941242 saving as /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/ramdisk/initrd.cpio.gz
17 07:17:13.941588 total size: 4775763 (4 MB)
18 07:17:14.264008 progress 0 % (0 MB)
19 07:17:14.747854 progress 5 % (0 MB)
20 07:17:15.099908 progress 10 % (0 MB)
21 07:17:15.105921 progress 15 % (0 MB)
22 07:17:15.112744 progress 20 % (0 MB)
23 07:17:15.230203 progress 25 % (1 MB)
24 07:17:15.269099 progress 30 % (1 MB)
25 07:17:15.424060 progress 35 % (1 MB)
26 07:17:15.559996 progress 40 % (1 MB)
27 07:17:15.706252 progress 45 % (2 MB)
28 07:17:15.747454 progress 50 % (2 MB)
29 07:17:15.899095 progress 55 % (2 MB)
30 07:17:16.028702 progress 60 % (2 MB)
31 07:17:16.068663 progress 65 % (2 MB)
32 07:17:16.219455 progress 70 % (3 MB)
33 07:17:16.348714 progress 75 % (3 MB)
34 07:17:16.389198 progress 80 % (3 MB)
35 07:17:16.517983 progress 85 % (3 MB)
36 07:17:16.666552 progress 90 % (4 MB)
37 07:17:16.705175 progress 95 % (4 MB)
38 07:17:16.832131 progress 100 % (4 MB)
39 07:17:16.833150 4 MB downloaded in 2.89 s (1.58 MB/s)
40 07:17:16.833853 end: 1.1.1 http-download (duration 00:00:03) [common]
42 07:17:16.835042 end: 1.1 download-retry (duration 00:00:03) [common]
43 07:17:16.835466 start: 1.2 download-retry (timeout 00:09:57) [common]
44 07:17:16.835909 start: 1.2.1 http-download (timeout 00:09:57) [common]
45 07:17:16.836508 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/kernel/zImage
46 07:17:16.836833 saving as /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/kernel/zImage
47 07:17:16.837145 total size: 11354624 (10 MB)
48 07:17:16.837461 No compression specified
49 07:17:17.003584 progress 0 % (0 MB)
50 07:17:17.196664 progress 5 % (0 MB)
51 07:17:17.508022 progress 10 % (1 MB)
52 07:17:17.824301 progress 15 % (1 MB)
53 07:17:18.140862 progress 20 % (2 MB)
54 07:17:18.453033 progress 25 % (2 MB)
55 07:17:18.762322 progress 30 % (3 MB)
56 07:17:19.068187 progress 35 % (3 MB)
57 07:17:19.266846 progress 40 % (4 MB)
58 07:17:19.574294 progress 45 % (4 MB)
59 07:17:19.889855 progress 50 % (5 MB)
60 07:17:20.071548 progress 55 % (5 MB)
61 07:17:20.379746 progress 60 % (6 MB)
62 07:17:20.691879 progress 65 % (7 MB)
63 07:17:20.984091 progress 70 % (7 MB)
64 07:17:21.184725 progress 75 % (8 MB)
65 07:17:21.497130 progress 80 % (8 MB)
66 07:17:21.787992 progress 85 % (9 MB)
67 07:17:21.988112 progress 90 % (9 MB)
68 07:17:22.299265 progress 95 % (10 MB)
69 07:17:22.598516 progress 100 % (10 MB)
70 07:17:22.599477 10 MB downloaded in 5.76 s (1.88 MB/s)
71 07:17:22.600342 end: 1.2.1 http-download (duration 00:00:06) [common]
73 07:17:22.601567 end: 1.2 download-retry (duration 00:00:06) [common]
74 07:17:22.601985 start: 1.3 download-retry (timeout 00:09:51) [common]
75 07:17:22.602420 start: 1.3.1 http-download (timeout 00:09:51) [common]
76 07:17:22.603070 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/dtbs/ti/omap/am335x-boneblack.dtb
77 07:17:22.603430 saving as /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/dtb/am335x-boneblack.dtb
78 07:17:22.603802 total size: 70308 (0 MB)
79 07:17:22.604110 No compression specified
80 07:17:22.770387 progress 46 % (0 MB)
81 07:17:22.773060 progress 93 % (0 MB)
82 07:17:22.774308 progress 100 % (0 MB)
83 07:17:22.774843 0 MB downloaded in 0.17 s (0.39 MB/s)
84 07:17:22.775404 end: 1.3.1 http-download (duration 00:00:00) [common]
86 07:17:22.776541 end: 1.3 download-retry (duration 00:00:00) [common]
87 07:17:22.776939 start: 1.4 download-retry (timeout 00:09:51) [common]
88 07:17:22.777380 start: 1.4.1 http-download (timeout 00:09:51) [common]
89 07:17:22.777914 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz
90 07:17:22.778228 saving as /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/nfsrootfs/full.rootfs.tar
91 07:17:22.778565 total size: 117747780 (112 MB)
92 07:17:22.778875 Using unxz to decompress xz
93 07:17:22.944208 progress 0 % (0 MB)
94 07:17:26.167661 progress 5 % (5 MB)
95 07:17:29.028320 progress 10 % (11 MB)
96 07:17:31.857176 progress 15 % (16 MB)
97 07:17:34.642475 progress 20 % (22 MB)
98 07:17:37.287432 progress 25 % (28 MB)
99 07:17:39.770905 progress 30 % (33 MB)
100 07:17:42.187265 progress 35 % (39 MB)
101 07:17:44.418430 progress 40 % (44 MB)
102 07:17:46.265195 progress 45 % (50 MB)
103 07:17:47.715543 progress 50 % (56 MB)
104 07:17:49.122718 progress 55 % (61 MB)
105 07:17:50.526558 progress 60 % (67 MB)
106 07:17:51.788467 progress 65 % (73 MB)
107 07:17:53.057257 progress 70 % (78 MB)
108 07:17:54.528496 progress 75 % (84 MB)
109 07:17:56.017698 progress 80 % (89 MB)
110 07:17:57.435694 progress 85 % (95 MB)
111 07:17:59.024637 progress 90 % (101 MB)
112 07:18:00.691557 progress 95 % (106 MB)
113 07:18:02.182684 progress 100 % (112 MB)
114 07:18:02.187964 112 MB downloaded in 39.41 s (2.85 MB/s)
115 07:18:02.188619 end: 1.4.1 http-download (duration 00:00:39) [common]
117 07:18:02.189746 end: 1.4 download-retry (duration 00:00:39) [common]
118 07:18:02.190146 start: 1.5 download-retry (timeout 00:09:12) [common]
119 07:18:02.190546 start: 1.5.1 http-download (timeout 00:09:12) [common]
120 07:18:02.191184 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/modules.tar.xz
121 07:18:02.191499 saving as /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/modules/modules.tar
122 07:18:02.191760 total size: 6609796 (6 MB)
123 07:18:02.191999 Using unxz to decompress xz
124 07:18:02.355792 progress 0 % (0 MB)
125 07:18:02.541846 progress 5 % (0 MB)
126 07:18:02.582788 progress 10 % (0 MB)
127 07:18:02.615410 progress 15 % (0 MB)
128 07:18:02.700709 progress 20 % (1 MB)
129 07:18:02.845799 progress 25 % (1 MB)
130 07:18:02.884868 progress 30 % (1 MB)
131 07:18:03.068208 progress 35 % (2 MB)
132 07:18:03.198912 progress 40 % (2 MB)
133 07:18:03.388457 progress 45 % (2 MB)
134 07:18:03.427970 progress 50 % (3 MB)
135 07:18:03.536193 progress 55 % (3 MB)
136 07:18:03.696903 progress 60 % (3 MB)
137 07:18:03.854935 progress 65 % (4 MB)
138 07:18:04.009314 progress 70 % (4 MB)
139 07:18:04.164995 progress 75 % (4 MB)
140 07:18:04.319324 progress 80 % (5 MB)
141 07:18:04.469262 progress 85 % (5 MB)
142 07:18:04.595667 progress 90 % (5 MB)
143 07:18:04.672053 progress 95 % (6 MB)
144 07:18:04.823142 progress 100 % (6 MB)
145 07:18:04.834511 6 MB downloaded in 2.64 s (2.39 MB/s)
146 07:18:04.835137 end: 1.5.1 http-download (duration 00:00:03) [common]
148 07:18:04.836206 end: 1.5 download-retry (duration 00:00:03) [common]
149 07:18:04.836609 start: 1.6 prepare-tftp-overlay (timeout 00:09:09) [common]
150 07:18:04.837040 start: 1.6.1 extract-nfsrootfs (timeout 00:09:09) [common]
151 07:18:12.000355 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9
152 07:18:12.000656 end: 1.6.1 extract-nfsrootfs (duration 00:00:07) [common]
153 07:18:12.000809 start: 1.6.2 lava-overlay (timeout 00:09:02) [common]
154 07:18:12.001101 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa
155 07:18:12.001343 makedir: /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin
156 07:18:12.001512 makedir: /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/tests
157 07:18:12.001681 makedir: /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/results
158 07:18:12.001842 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-add-keys
159 07:18:12.002095 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-add-sources
160 07:18:12.002320 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-background-process-start
161 07:18:12.002543 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-background-process-stop
162 07:18:12.002783 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-common-functions
163 07:18:12.003006 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-echo-ipv4
164 07:18:12.003227 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-install-packages
165 07:18:12.003445 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-installed-packages
166 07:18:12.003732 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-os-build
167 07:18:12.003953 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-probe-channel
168 07:18:12.004170 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-probe-ip
169 07:18:12.004398 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-target-ip
170 07:18:12.004618 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-target-mac
171 07:18:12.004833 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-target-storage
172 07:18:12.005057 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-case
173 07:18:12.005277 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-event
174 07:18:12.005493 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-feedback
175 07:18:12.005711 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-raise
176 07:18:12.005932 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-reference
177 07:18:12.006155 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-runner
178 07:18:12.006372 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-set
179 07:18:12.006584 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-test-shell
180 07:18:12.006803 Updating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-add-keys (debian)
181 07:18:12.040602 Updating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-add-sources (debian)
182 07:18:12.040946 Updating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-install-packages (debian)
183 07:18:12.041238 Updating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-installed-packages (debian)
184 07:18:12.041526 Updating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/bin/lava-os-build (debian)
185 07:18:12.041745 Creating /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/environment
186 07:18:12.041911 LAVA metadata
187 07:18:12.042030 - LAVA_JOB_ID=1189987
188 07:18:12.042141 - LAVA_DISPATCHER_IP=172.16.3.3
189 07:18:12.042314 start: 1.6.2.1 ssh-authorize (timeout 00:09:02) [common]
190 07:18:12.042751 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
191 07:18:12.042903 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:02) [common]
192 07:18:12.043011 skipped lava-vland-overlay
193 07:18:12.043140 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
194 07:18:12.043275 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:02) [common]
195 07:18:12.043386 skipped lava-multinode-overlay
196 07:18:12.043514 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
197 07:18:12.043683 start: 1.6.2.4 test-definition (timeout 00:09:02) [common]
198 07:18:12.043813 Loading test definitions
199 07:18:12.043970 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:02) [common]
200 07:18:12.044083 Using /lava-1189987 at stage 0
201 07:18:12.044627 uuid=1189987_1.6.2.4.1 testdef=None
202 07:18:12.044769 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
203 07:18:12.044903 start: 1.6.2.4.2 test-overlay (timeout 00:09:02) [common]
204 07:18:12.045656 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
206 07:18:12.046062 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:02) [common]
207 07:18:12.046965 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
209 07:18:12.047354 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:02) [common]
210 07:18:12.050706 runner path: /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/0/tests/0_timesync-off test_uuid 1189987_1.6.2.4.1
211 07:18:12.050992 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
213 07:18:12.051411 start: 1.6.2.4.5 git-repo-action (timeout 00:09:02) [common]
214 07:18:12.051544 Using /lava-1189987 at stage 0
215 07:18:12.051740 Fetching tests from https://github.com/kernelci/test-definitions.git
216 07:18:12.051866 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/0/tests/1_kselftest-dt'
217 07:18:17.831265 Running '/usr/bin/git checkout kernelci.org
218 07:18:18.161424 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
219 07:18:18.162369 uuid=1189987_1.6.2.4.5 testdef=None
220 07:18:18.162610 end: 1.6.2.4.5 git-repo-action (duration 00:00:06) [common]
222 07:18:18.163138 start: 1.6.2.4.6 test-overlay (timeout 00:08:56) [common]
223 07:18:18.164918 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
225 07:18:18.165466 start: 1.6.2.4.7 test-install-overlay (timeout 00:08:56) [common]
226 07:18:18.167909 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
228 07:18:18.168483 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:08:56) [common]
229 07:18:18.170858 runner path: /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/0/tests/1_kselftest-dt test_uuid 1189987_1.6.2.4.5
230 07:18:18.171048 BOARD='beaglebone-black'
231 07:18:18.171202 BRANCH='mainline'
232 07:18:18.171349 SKIPFILE='/dev/null'
233 07:18:18.171495 SKIP_INSTALL='True'
234 07:18:18.171664 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz'
235 07:18:18.171783 TST_CASENAME=''
236 07:18:18.171932 TST_CMDFILES='dt'
237 07:18:18.172281 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
239 07:18:18.172783 Creating lava-test-runner.conf files
240 07:18:18.172934 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/1189987/lava-overlay-gge_buqa/lava-1189987/0 for stage 0
241 07:18:18.173159 - 0_timesync-off
242 07:18:18.173315 - 1_kselftest-dt
243 07:18:18.173548 end: 1.6.2.4 test-definition (duration 00:00:06) [common]
244 07:18:18.173746 start: 1.6.2.5 compress-overlay (timeout 00:08:56) [common]
245 07:18:27.642667 end: 1.6.2.5 compress-overlay (duration 00:00:09) [common]
246 07:18:27.642894 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:46) [common]
247 07:18:27.643036 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
248 07:18:27.643180 end: 1.6.2 lava-overlay (duration 00:00:16) [common]
249 07:18:27.643322 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:46) [common]
250 07:18:27.781797 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
251 07:18:27.782045 start: 1.6.4 extract-modules (timeout 00:08:46) [common]
252 07:18:27.782173 extracting modules file /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9
253 07:18:28.164546 extracting modules file /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1189987/extract-overlay-ramdisk-bpqd4ck6/ramdisk
254 07:18:28.546482 end: 1.6.4 extract-modules (duration 00:00:01) [common]
255 07:18:28.546730 start: 1.6.5 apply-overlay-tftp (timeout 00:08:45) [common]
256 07:18:28.546861 [common] Applying overlay to NFS
257 07:18:28.546968 [common] Applying overlay /var/lib/lava/dispatcher/tmp/1189987/compress-overlay-qucfn5_4/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9
258 07:18:29.845786 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
259 07:18:29.846027 start: 1.6.6 prepare-kernel (timeout 00:08:44) [common]
260 07:18:29.846175 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:44) [common]
261 07:18:29.846322 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
262 07:18:29.846456 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
263 07:18:29.846607 start: 1.6.7 configure-preseed-file (timeout 00:08:44) [common]
264 07:18:29.846738 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
265 07:18:29.846873 start: 1.6.8 compress-ramdisk (timeout 00:08:44) [common]
266 07:18:29.846986 Building ramdisk /var/lib/lava/dispatcher/tmp/1189987/extract-overlay-ramdisk-bpqd4ck6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/1189987/extract-overlay-ramdisk-bpqd4ck6/ramdisk
267 07:18:30.129119 >> 74799 blocks
268 07:18:32.194784 Adding RAMdisk u-boot header.
269 07:18:32.195095 mkimage -A arm -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/1189987/extract-overlay-ramdisk-bpqd4ck6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/1189987/extract-overlay-ramdisk-bpqd4ck6/ramdisk.cpio.gz.uboot
270 07:18:32.537615 output: Image Name:
271 07:18:32.537929 output: Created: Fri Sep 6 07:18:32 2024
272 07:18:32.538107 output: Image Type: ARM Linux RAMDisk Image (uncompressed)
273 07:18:32.538246 output: Data Size: 14798221 Bytes = 14451.39 KiB = 14.11 MiB
274 07:18:32.538380 output: Load Address: 00000000
275 07:18:32.538510 output: Entry Point: 00000000
276 07:18:32.538640 output:
277 07:18:32.538876 rename /var/lib/lava/dispatcher/tmp/1189987/extract-overlay-ramdisk-bpqd4ck6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot
278 07:18:32.539108 end: 1.6.8 compress-ramdisk (duration 00:00:03) [common]
279 07:18:32.539295 end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
280 07:18:32.539476 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
281 07:18:32.539632 No LXC device requested
282 07:18:32.539803 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
283 07:18:32.539991 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
284 07:18:32.540161 end: 1.8 deploy-device-env (duration 00:00:00) [common]
285 07:18:32.540299 Checking files for TFTP limit of 4294967296 bytes.
286 07:18:32.541750 end: 1 tftp-deploy (duration 00:01:19) [common]
287 07:18:32.542148 start: 2 uboot-action (timeout 00:05:00) [common]
288 07:18:32.542330 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
289 07:18:32.542703 end: 2.1 uboot-from-media (duration 00:00:00) [common]
290 07:18:32.542877 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
291 07:18:32.543231 substitutions:
292 07:18:32.543553 - {BOOTX}: bootz 0x82000000 0x83000000 0x88000000
293 07:18:32.543699 - {DTB_ADDR}: 0x88000000
294 07:18:32.543830 - {DTB}: 1189987/tftp-deploy-t_2g7ikq/dtb/am335x-boneblack.dtb
295 07:18:32.543960 - {INITRD}: 1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot
296 07:18:32.544090 - {KERNEL_ADDR}: 0x82000000
297 07:18:32.544217 - {KERNEL}: 1189987/tftp-deploy-t_2g7ikq/kernel/zImage
298 07:18:32.544345 - {LAVA_MAC}: None
299 07:18:32.544479 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9
300 07:18:32.544607 - {NFS_SERVER_IP}: 172.16.3.3
301 07:18:32.544732 - {PRESEED_CONFIG}: None
302 07:18:32.544980 - {PRESEED_LOCAL}: None
303 07:18:32.545232 - {RAMDISK_ADDR}: 0x83000000
304 07:18:32.545486 - {RAMDISK}: 1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot
305 07:18:32.545740 - {ROOT_PART}: None
306 07:18:32.545989 - {ROOT}: None
307 07:18:32.546236 - {SERVER_IP}: 172.16.3.3
308 07:18:32.546482 - {TEE_ADDR}: 0x83000000
309 07:18:32.546729 - {TEE}: None
310 07:18:32.546977 Parsed boot commands:
311 07:18:32.547221 - setenv autoload no
312 07:18:32.547469 - setenv initrd_high 0xffffffff
313 07:18:32.547700 - setenv fdt_high 0xffffffff
314 07:18:32.547822 - dhcp
315 07:18:32.548063 - setenv serverip 172.16.3.3
316 07:18:32.548308 - tftp 0x82000000 1189987/tftp-deploy-t_2g7ikq/kernel/zImage
317 07:18:32.548557 - tftp 0x83000000 1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot
318 07:18:32.548808 - setenv initrd_size ${filesize}
319 07:18:32.549055 - tftp 0x88000000 1189987/tftp-deploy-t_2g7ikq/dtb/am335x-boneblack.dtb
320 07:18:32.549305 - setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
321 07:18:32.549564 - bootz 0x82000000 0x83000000 0x88000000
322 07:18:32.549868 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
324 07:18:32.550818 start: 2.3 connect-device (timeout 00:05:00) [common]
325 07:18:32.551131 [common] connect-device Connecting to device using 'telnet ts5 2000'
326 07:18:32.558552 Setting prompt string to ['lava-test: # ']
327 07:18:32.559141 end: 2.3 connect-device (duration 00:00:00) [common]
328 07:18:32.559409 start: 2.4 uboot-commands (timeout 00:05:00) [common]
329 07:18:32.559666 start: 2.4.1 reset-device (timeout 00:05:00) [common]
330 07:18:32.559854 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
331 07:18:32.560149 Calling: 'drpm' 'lf-bbb' 'powercycle'
332 07:18:32.932583 >> OFF
333 07:18:48.267091 >> ON
334 07:18:48.268108 Returned 0 in 15 seconds
335 07:18:48.369068 end: 2.4.1.1 pdu-reboot (duration 00:00:16) [common]
337 07:18:48.370205 end: 2.4.1 reset-device (duration 00:00:16) [common]
338 07:18:48.370641 start: 2.4.2 bootloader-interrupt (timeout 00:04:44) [common]
339 07:18:48.371036 Setting prompt string to ['Hit any key to stop autoboot']
340 07:18:48.371381 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
341 07:18:48.372341 Trying 192.168.1.205...
342 07:18:48.372666 Connected to ts5.
343 07:18:48.372966 Escape character is '^]'.
344 07:18:48.373256
345 07:18:48.373541 ser2net port telnet,2000 device serialdev,/dev/ttyUSB-lf-bbb-01,115200n81,local [] (Debian GNU/Linux)
346 07:18:48.373838
347 07:18:49.203679
348 07:18:49.211544 U-Boot SPL 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
349 07:18:49.211957 Trying to boot from MMC2
350 07:18:49.724522
351 07:18:49.725029
352 07:18:49.729289 U-Boot 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
353 07:18:49.729716
354 07:18:49.730142 CPU : AM335X-GP rev 2.1
355 07:18:49.736160 Model: TI AM335x BeagleBone Black
356 07:18:49.736566 DRAM: 512 MiB
357 07:18:49.817250 WDT: Started with servicing (60s timeout)
358 07:18:50.222412 NAND: 0 MiB
359 07:18:50.233098 MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
360 07:18:50.265489 Loading Environment from FAT... <ethaddr> not set. Validating first E-fuse MAC
361 07:18:50.295721 Net: eth2: ethernet@4a100000, eth3: usb_ether
362 07:18:50.354436 end: 2.4.2 bootloader-interrupt (duration 00:00:02) [common]
363 07:18:50.354998 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
364 07:18:50.355418 Setting prompt string to ['=> ']
365 07:18:50.355879 bootloader-commands: Wait for prompt ['=> '] (timeout 00:04:42)
366 07:18:50.364211 Hit any key to stop autoboot: 2 0
367 07:18:50.364999 Setting prompt string to ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
368 07:18:50.365419 Sending with 10 millisecond of delay
370 07:18:51.502019 => setenv autoload no
371 07:18:51.512645 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:41)
372 07:18:51.515811 setenv autoload no
373 07:18:51.516429 Sending with 10 millisecond of delay
375 07:18:53.316504 => setenv initrd_high 0xffffffff
376 07:18:53.327117 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:39)
377 07:18:53.327781 setenv initrd_high 0xffffffff
378 07:18:53.328352 Sending with 10 millisecond of delay
380 07:18:54.947521 => setenv fdt_high 0xffffffff
381 07:18:54.958145 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:38)
382 07:18:54.958839 setenv fdt_high 0xffffffff
383 07:18:54.959428 Sending with 10 millisecond of delay
385 07:18:55.251678 => dhcp
386 07:18:55.262240 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:37)
387 07:18:55.263632 dhcp
388 07:18:55.264073 link up on port 0, speed 100, full duplex
389 07:18:55.264467 BOOTP broadcast 1
390 07:18:55.338212 DHCP client bound to address 172.16.3.210 (70 ms)
391 07:18:55.338849 Sending with 10 millisecond of delay
393 07:18:56.957857 => setenv serverip 172.16.3.3
394 07:18:56.968460 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:36)
395 07:18:56.969161 setenv serverip 172.16.3.3
396 07:18:56.969749 Sending with 10 millisecond of delay
398 07:19:00.518103 => tftp 0x82000000 1189987/tftp-deploy-t_2g7ikq/kernel/zImage
399 07:19:00.528790 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:32)
400 07:19:00.530082 tftp 0x82000000 1189987/tftp-deploy-t_2g7ikq/kernel/zImage
401 07:19:00.530417 link up on port 0, speed 100, full duplex
402 07:19:00.536110 Using ethernet@4a100000 device
403 07:19:00.541100 TFTP from server 172.16.3.3; our IP address is 172.16.3.210
404 07:19:00.548985 Filename '1189987/tftp-deploy-t_2g7ikq/kernel/zImage'.
405 07:19:00.549156 Load address: 0x82000000
406 07:19:03.103540 Loading: *################################################## 10.8 MiB
407 07:19:03.104057 4.2 MiB/s
408 07:19:03.104370 done
409 07:19:03.107670 Bytes transferred = 11354624 (ad4200 hex)
410 07:19:03.108314 Sending with 10 millisecond of delay
412 07:19:07.622055 => tftp 0x83000000 1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot
413 07:19:07.632689 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:25)
414 07:19:07.633780 tftp 0x83000000 1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot
415 07:19:07.634116 link up on port 0, speed 100, full duplex
416 07:19:07.638994 Using ethernet@4a100000 device
417 07:19:07.642658 TFTP from server 172.16.3.3; our IP address is 172.16.3.210
418 07:19:07.648620 Filename '1189987/tftp-deploy-t_2g7ikq/ramdisk/ramdisk.cpio.gz.uboot'.
419 07:19:07.654096 Load address: 0x83000000
420 07:19:10.952760 Loading: *################################################## 14.1 MiB
421 07:19:10.953192 4.3 MiB/s
422 07:19:10.953509 done
423 07:19:10.957005 Bytes transferred = 14798285 (e1cdcd hex)
424 07:19:10.957657 Sending with 10 millisecond of delay
426 07:19:12.818052 => setenv initrd_size ${filesize}
427 07:19:12.828653 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:20)
428 07:19:12.829275 setenv initrd_size ${filesize}
429 07:19:12.829838 Sending with 10 millisecond of delay
431 07:19:17.042588 => tftp 0x88000000 1189987/tftp-deploy-t_2g7ikq/dtb/am335x-boneblack.dtb
432 07:19:17.053174 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:15)
433 07:19:17.055043 tftp 0x88000000 1189987/tftp-deploy-t_2g7ikq/dtb/am335x-boneblack.dtb
434 07:19:17.055437 link up on port 0, speed 100, full duplex
435 07:19:17.058793 Using ethernet@4a100000 device
436 07:19:17.065034 TFTP from server 172.16.3.3; our IP address is 172.16.3.210
437 07:19:17.075828 Filename '1189987/tftp-deploy-t_2g7ikq/dtb/am335x-boneblack.dtb'.
438 07:19:17.076101 Load address: 0x88000000
439 07:19:17.088420 Loading: *################################################## 68.7 KiB
440 07:19:17.088806 4.2 MiB/s
441 07:19:17.096399 done
442 07:19:17.096779 Bytes transferred = 70308 (112a4 hex)
443 07:19:17.097350 Sending with 10 millisecond of delay
445 07:19:30.477096 => setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
446 07:19:30.487703 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:02)
447 07:19:30.488330 setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
448 07:19:30.488912 Sending with 10 millisecond of delay
450 07:19:32.830446 => bootz 0x82000000 0x83000000 0x88000000
451 07:19:32.841040 Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
452 07:19:32.841500 bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:00)
453 07:19:32.842360 bootz 0x82000000 0x83000000 0x88000000
454 07:19:32.842694 Kernel image @ 0x82000000 [ 0x000000 - 0xad4200 ]
455 07:19:32.845128 ## Loading init Ramdisk from Legacy Image at 83000000 ...
456 07:19:32.850004 Image Name:
457 07:19:32.850396 Created: 2024-09-06 7:18:32 UTC
458 07:19:32.858744 Image Type: ARM Linux RAMDisk Image (uncompressed)
459 07:19:32.859139 Data Size: 14798221 Bytes = 14.1 MiB
460 07:19:32.867017 Load Address: 00000000
461 07:19:32.867413 Entry Point: 00000000
462 07:19:33.036010 Verifying Checksum ... OK
463 07:19:33.036403 ## Flattened Device Tree blob at 88000000
464 07:19:33.042124 Booting using the fdt blob at 0x88000000
465 07:19:33.047774 Using Device Tree in place at 88000000, end 880142a3
466 07:19:33.061005
467 07:19:33.061398 Starting kernel ...
468 07:19:33.061792
469 07:19:33.062568 end: 2.4.3 bootloader-commands (duration 00:00:43) [common]
470 07:19:33.063056 start: 2.4.4 auto-login-action (timeout 00:03:59) [common]
471 07:19:33.063441 Setting prompt string to ['Linux version [0-9]']
472 07:19:33.063875 Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
473 07:19:33.064288 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:05:00)
474 07:19:33.893829 [ 0.000000] Booting Linux on physical CPU 0x0
475 07:19:33.900245 start: 2.4.4.1 login-action (timeout 00:03:59) [common]
476 07:19:33.900696 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
477 07:19:33.901094 Setting prompt string to []
478 07:19:33.901533 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
479 07:19:33.901932 Using line separator: #'\n'#
480 07:19:33.902292 No login prompt set.
481 07:19:33.902679 Parsing kernel messages
482 07:19:33.903031 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
483 07:19:33.903713 [login-action] Waiting for messages, (timeout 00:03:59)
484 07:19:33.912243 [ 0.000000] Linux version 6.11.0-rc6 (KernelCI@build-j310032-arm-gcc-12-multi-v7-defconfig-pfvsf) (arm-linux-gnueabihf-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP Fri Sep 6 06:56:26 UTC 2024
485 07:19:33.924820 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
486 07:19:33.928346 [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
487 07:19:33.933585 [ 0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
488 07:19:33.944774 [ 0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
489 07:19:33.945168 [ 0.000000] printk: legacy bootconsole [omap8250] enabled
490 07:19:33.949842 [ 0.000000] Memory policy: Data cache writeback
491 07:19:33.955949 [ 0.000000] efi: UEFI not found.
492 07:19:33.965575 [ 0.000000] cma: Reserved 64 MiB at 0x9b800000 on node -1
493 07:19:33.965966 [ 0.000000] Zone ranges:
494 07:19:33.975270 [ 0.000000] DMA [mem 0x0000000080000000-0x000000009fdfffff]
495 07:19:33.975589 [ 0.000000] Normal empty
496 07:19:33.981522 [ 0.000000] HighMem empty
497 07:19:33.987647 [ 0.000000] Movable zone start for each node
498 07:19:33.988039 [ 0.000000] Early memory node ranges
499 07:19:33.996197 [ 0.000000] node 0: [mem 0x0000000080000000-0x000000009fdfffff]
500 07:19:34.002011 [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
501 07:19:34.026611 [ 0.000000] CPU: All CPU(s) started in SVC mode.
502 07:19:34.032242 [ 0.000000] AM335X ES2.1 (sgx neon)
503 07:19:34.044858 [ 0.000000] percpu: Embedded 17 pages/cpu s40332 r8192 d21108 u69632
504 07:19:34.064651 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp
505 07:19:34.070735 <6>[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
506 07:19:34.079261 <6>[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
507 07:19:34.085346 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130560
508 07:19:34.094869 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
509 07:19:34.124118 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
510 07:19:34.130260 <6>[ 0.000000] trace event string verifier disabled
511 07:19:34.130658 <6>[ 0.000000] rcu: Hierarchical RCU implementation.
512 07:19:34.137611 <6>[ 0.000000] rcu: RCU event tracing is enabled.
513 07:19:34.142610 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=1.
514 07:19:34.153883 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
515 07:19:34.160756 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
516 07:19:34.175638 <6>[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
517 07:19:34.192226 <6>[ 0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
518 07:19:34.199130 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
519 07:19:34.292024 <6>[ 0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
520 07:19:34.300414 <6>[ 0.000002] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
521 07:19:34.311897 <6>[ 0.008331] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
522 07:19:34.321592 <6>[ 0.019154] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
523 07:19:34.330098 <6>[ 0.033965] Console: colour dummy device 80x30
524 07:19:34.336562 Matched prompt #6: WARNING:
525 07:19:34.336981 Setting prompt string to ['end trace[^\\r]*\\r', '/ #', 'Login timed out', 'Login incorrect']
526 07:19:34.342316 <3>[ 0.038861] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
527 07:19:34.344724 <3>[ 0.045931] This ensures that you still see kernel messages. Please
528 07:19:34.351669 <3>[ 0.052656] update your kernel commandline.
529 07:19:34.391420 <6>[ 0.057266] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
530 07:19:34.397586 <6>[ 0.096159] CPU: Testing write buffer coherency: ok
531 07:19:34.399832 <6>[ 0.101526] CPU0: Spectre v2: using BPIALL workaround
532 07:19:34.404909 <6>[ 0.106992] pid_max: default: 32768 minimum: 301
533 07:19:34.411072 <6>[ 0.112171] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
534 07:19:34.420776 <6>[ 0.119989] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
535 07:19:34.426945 <6>[ 0.129290] CPU0: thread -1, cpu 0, socket -1, mpidr 0
536 07:19:34.441381 <6>[ 0.136145] Setting up static identity map for 0x80300000 - 0x803000ac
537 07:19:34.446412 <6>[ 0.145713] rcu: Hierarchical SRCU implementation.
538 07:19:34.450807 <6>[ 0.150995] rcu: Max phase no-delay instances is 1000.
539 07:19:34.458321 <6>[ 0.162044] EFI services will not be available.
540 07:19:34.464440 <6>[ 0.167291] smp: Bringing up secondary CPUs ...
541 07:19:34.470658 <6>[ 0.172327] smp: Brought up 1 node, 1 CPU
542 07:19:34.478287 <6>[ 0.176727] SMP: Total of 1 processors activated (996.14 BogoMIPS).
543 07:19:34.484411 <6>[ 0.183475] CPU: All CPU(s) started in SVC mode.
544 07:19:34.502425 <6>[ 0.188655] Memory: 407008K/522240K available (16384K kernel code, 2540K rwdata, 6736K rodata, 2048K init, 430K bss, 48028K reserved, 65536K cma-reserved, 0K highmem)
545 07:19:34.502635 <6>[ 0.204891] devtmpfs: initialized
546 07:19:34.524310 <6>[ 0.221694] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
547 07:19:34.532818 <6>[ 0.230260] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
548 07:19:34.540939 <6>[ 0.240694] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
549 07:19:34.552426 <6>[ 0.253036] pinctrl core: initialized pinctrl subsystem
550 07:19:34.561088 <6>[ 0.263697] DMI not present or invalid.
551 07:19:34.570707 <6>[ 0.269525] NET: Registered PF_NETLINK/PF_ROUTE protocol family
552 07:19:34.578979 <6>[ 0.278371] DMA: preallocated 256 KiB pool for atomic coherent allocations
553 07:19:34.594425 <6>[ 0.289779] thermal_sys: Registered thermal governor 'step_wise'
554 07:19:34.594811 <6>[ 0.289920] cpuidle: using governor menu
555 07:19:34.620835 <6>[ 0.325364] No ATAGs?
556 07:19:34.628960 <6>[ 0.328006] hw-breakpoint: debug architecture 0x4 unsupported.
557 07:19:34.638188 <6>[ 0.339969] Serial: AMBA PL011 UART driver
558 07:19:34.679637 <6>[ 0.382809] iommu: Default domain type: Translated
559 07:19:34.688975 <6>[ 0.388039] iommu: DMA domain TLB invalidation policy: strict mode
560 07:19:34.697204 <5>[ 0.400699] SCSI subsystem initialized
561 07:19:34.721715 <6>[ 0.420443] usbcore: registered new interface driver usbfs
562 07:19:34.729117 <6>[ 0.426400] usbcore: registered new interface driver hub
563 07:19:34.729501 <6>[ 0.432225] usbcore: registered new device driver usb
564 07:19:34.736485 <6>[ 0.438711] pps_core: LinuxPPS API ver. 1 registered
565 07:19:34.748599 <6>[ 0.444143] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
566 07:19:34.751848 <6>[ 0.453840] PTP clock support registered
567 07:19:34.776733 <6>[ 0.479588] EDAC MC: Ver: 3.0.0
568 07:19:34.795734 <6>[ 0.496733] scmi_core: SCMI protocol bus registered
569 07:19:34.809982 <6>[ 0.514021] vgaarb: loaded
570 07:19:34.823808 <6>[ 0.526968] clocksource: Switched to clocksource dmtimer
571 07:19:34.859884 <6>[ 0.562728] NET: Registered PF_INET protocol family
572 07:19:34.871988 <6>[ 0.568386] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
573 07:19:34.877089 <6>[ 0.577233] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
574 07:19:34.889210 <6>[ 0.586122] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
575 07:19:34.895482 <6>[ 0.594392] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
576 07:19:34.906488 <6>[ 0.602678] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)
577 07:19:34.912605 <6>[ 0.610395] TCP: Hash tables configured (established 4096 bind 4096)
578 07:19:34.918584 <6>[ 0.617311] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
579 07:19:34.924737 <6>[ 0.624325] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
580 07:19:34.931638 <6>[ 0.631932] NET: Registered PF_UNIX/PF_LOCAL protocol family
581 07:19:34.968239 <6>[ 0.666410] RPC: Registered named UNIX socket transport module.
582 07:19:34.968641 <6>[ 0.672834] RPC: Registered udp transport module.
583 07:19:34.974590 <6>[ 0.677965] RPC: Registered tcp transport module.
584 07:19:34.982088 <6>[ 0.683068] RPC: Registered tcp-with-tls transport module.
585 07:19:34.988242 <6>[ 0.688998] RPC: Registered tcp NFSv4.1 backchannel transport module.
586 07:19:34.995489 <6>[ 0.695905] PCI: CLS 0 bytes, default 64
587 07:19:34.997851 <5>[ 0.701678] Initialise system trusted keyrings
588 07:19:35.025317 <6>[ 0.725629] Trying to unpack rootfs image as initramfs...
589 07:19:35.050487 <6>[ 0.747661] workingset: timestamp_bits=30 max_order=17 bucket_order=0
590 07:19:35.055984 <6>[ 0.755144] squashfs: version 4.0 (2009/01/31) Phillip Lougher
591 07:19:35.093969 <5>[ 0.797389] NFS: Registering the id_resolver key type
592 07:19:35.099109 <5>[ 0.802986] Key type id_resolver registered
593 07:19:35.105187 <5>[ 0.807619] Key type id_legacy registered
594 07:19:35.113981 <6>[ 0.812063] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
595 07:19:35.120829 <6>[ 0.819280] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
596 07:19:35.167350 <5>[ 0.870853] Key type asymmetric registered
597 07:19:35.173611 <5>[ 0.875374] Asymmetric key parser 'x509' registered
598 07:19:35.182074 <6>[ 0.880860] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
599 07:19:35.186983 <6>[ 0.888792] io scheduler mq-deadline registered
600 07:19:35.196173 <6>[ 0.893721] io scheduler kyber registered
601 07:19:35.196556 <6>[ 0.898193] io scheduler bfq registered
602 07:19:35.575014 <6>[ 1.275232] Serial: 8250/16550 driver, 5 ports, IRQ sharing enabled
603 07:19:35.608760 <6>[ 1.311726] msm_serial: driver initialized
604 07:19:35.613762 <6>[ 1.316505] SuperH (H)SCI(F) driver initialized
605 07:19:35.619865 <6>[ 1.321833] STMicroelectronics ASC driver initialized
606 07:19:35.624614 <6>[ 1.327511] STM32 USART driver initialized
607 07:19:35.727363 <6>[ 1.430492] brd: module loaded
608 07:19:35.760857 <6>[ 1.464163] loop: module loaded
609 07:19:35.802167 <6>[ 1.504574] CAN device driver interface
610 07:19:35.808524 <6>[ 1.509830] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
611 07:19:35.814521 <6>[ 1.516727] e1000e: Intel(R) PRO/1000 Network Driver
612 07:19:35.820633 <6>[ 1.522189] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
613 07:19:35.825638 <6>[ 1.528624] igb: Intel(R) Gigabit Ethernet Network Driver
614 07:19:35.835293 <6>[ 1.534445] igb: Copyright (c) 2007-2014 Intel Corporation.
615 07:19:35.840120 <6>[ 1.543534] pegasus: Pegasus/Pegasus II USB Ethernet driver
616 07:19:35.851591 <6>[ 1.549692] usbcore: registered new interface driver pegasus
617 07:19:35.857702 <6>[ 1.555812] usbcore: registered new interface driver asix
618 07:19:35.863862 <6>[ 1.561693] usbcore: registered new interface driver ax88179_178a
619 07:19:35.868700 <6>[ 1.568298] usbcore: registered new interface driver cdc_ether
620 07:19:35.874842 <6>[ 1.574610] usbcore: registered new interface driver smsc75xx
621 07:19:35.880948 <6>[ 1.580847] usbcore: registered new interface driver smsc95xx
622 07:19:35.886104 <6>[ 1.587077] usbcore: registered new interface driver net1080
623 07:19:35.892193 <6>[ 1.593193] usbcore: registered new interface driver cdc_subset
624 07:19:35.898361 <6>[ 1.599603] usbcore: registered new interface driver zaurus
625 07:19:35.905158 <6>[ 1.605646] usbcore: registered new interface driver cdc_ncm
626 07:19:35.914841 <6>[ 1.614970] usbcore: registered new interface driver usb-storage
627 07:19:36.028732 <6>[ 1.729706] i2c_dev: i2c /dev entries driver
628 07:19:36.087883 <5>[ 1.783215] cpuidle: enable-method property 'ti,am3352' found operations
629 07:19:36.092698 <6>[ 1.792796] sdhci: Secure Digital Host Controller Interface driver
630 07:19:36.101589 <6>[ 1.799566] sdhci: Copyright(c) Pierre Ossman
631 07:19:36.108835 <6>[ 1.805882] Synopsys Designware Multimedia Card Interface Driver
632 07:19:36.113193 <6>[ 1.813711] sdhci-pltfm: SDHCI platform and OF driver helper
633 07:19:36.167075 <6>[ 1.867197] ledtrig-cpu: registered to indicate activity on CPUs
634 07:19:36.202466 <6>[ 1.898292] usbcore: registered new interface driver usbhid
635 07:19:36.202863 <6>[ 1.904329] usbhid: USB HID core driver
636 07:19:36.242466 <6>[ 1.943451] NET: Registered PF_INET6 protocol family
637 07:19:36.284840 <6>[ 1.988420] Segment Routing with IPv6
638 07:19:36.290858 <6>[ 1.992568] In-situ OAM (IOAM) with IPv6
639 07:19:36.296957 <6>[ 1.997042] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
640 07:19:36.304588 <6>[ 2.004267] NET: Registered PF_PACKET protocol family
641 07:19:36.310566 <6>[ 2.009828] can: controller area network core
642 07:19:36.310948 <6>[ 2.014649] NET: Registered PF_CAN protocol family
643 07:19:36.316718 <6>[ 2.019872] can: raw protocol
644 07:19:36.320440 <6>[ 2.023199] can: broadcast manager protocol
645 07:19:36.326579 <6>[ 2.027792] can: netlink gateway - max_hops=1
646 07:19:36.331592 <5>[ 2.033264] Key type dns_resolver registered
647 07:19:36.337699 <6>[ 2.038326] ThumbEE CPU extension supported.
648 07:19:36.341465 <5>[ 2.043011] Registering SWP/SWPB emulation handler
649 07:19:36.349487 <3>[ 2.048706] omap_voltage_late_init: Voltage driver support not added
650 07:19:36.432837 <5>[ 2.133279] Loading compiled-in X.509 certificates
651 07:19:36.573954 <6>[ 2.265414] platform 44e10800.pinmux: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/clkout2-pins
652 07:19:36.582163 <6>[ 2.282074] pinctrl-single 44e10800.pinmux: 142 pins, size 568
653 07:19:36.608119 <3>[ 2.305567] ti-sysc 44e31000.target-module: probe with driver ti-sysc failed with error -16
654 07:19:36.688968 <3>[ 2.386260] ti-sysc 48040000.target-module: probe with driver ti-sysc failed with error -16
655 07:19:36.795339 <6>[ 2.497514] OMAP GPIO hardware version 0.1
656 07:19:36.816526 <6>[ 2.515944] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
657 07:19:36.880162 <4>[ 2.579909] at24 2-0054: supply vcc not found, using dummy regulator
658 07:19:36.956275 <4>[ 2.655742] at24 2-0055: supply vcc not found, using dummy regulator
659 07:19:37.005056 <4>[ 2.704840] at24 2-0056: supply vcc not found, using dummy regulator
660 07:19:37.051522 <4>[ 2.751439] at24 2-0057: supply vcc not found, using dummy regulator
661 07:19:37.100151 <6>[ 2.800612] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
662 07:19:37.173318 <3>[ 2.869950] 48000000.interconnect:segment@200000:target-module@0:mpu@0:fck: device ID is greater than 24
663 07:19:37.198677 <6>[ 2.890831] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
664 07:19:37.234083 <4>[ 2.931551] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
665 07:19:37.269205 <4>[ 2.967773] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
666 07:19:37.307086 <6>[ 3.007429] omap_rng 48310000.rng: Random Number Generator ver. 20
667 07:19:37.329947 <5>[ 3.033301] random: crng init done
668 07:19:37.419083 <6>[ 3.117274] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
669 07:19:38.079519 <6>[ 3.781032] Freeing initrd memory: 14452K
670 07:19:38.122613 <6>[ 3.819367] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver SMSC LAN8710/LAN8720
671 07:19:38.126486 <6>[ 3.829568] cpsw-switch 4a100000.switch: initialized cpsw ale version 1.4
672 07:19:38.136377 <6>[ 3.836835] cpsw-switch 4a100000.switch: ALE Table size 1024
673 07:19:38.147487 <6>[ 3.843299] cpsw-switch 4a100000.switch: cpts: overflow check period 500 (jiffies)
674 07:19:38.156061 <6>[ 3.851428] cpsw-switch 4a100000.switch: CPTS: ref_clk_freq:250000000 calc_mult:2147483648 calc_shift:29 error:0 nsec/sec
675 07:19:38.164688 <6>[ 3.863057] cpsw-switch 4a100000.switch: Detected MACID = 34:03:de:5e:2c:05
676 07:19:38.176448 <5>[ 3.872081] cpsw-switch 4a100000.switch: initialized (regs 0x4a100000, pool size 256) hw_ver:0019010C 1.12 (0)
677 07:19:38.203683 <3>[ 3.901678] debugfs: Directory '49000000.dma' with parent 'dmaengine' already present!
678 07:19:38.209294 <6>[ 3.910248] edma 49000000.dma: TI EDMA DMA engine driver
679 07:19:38.280419 <3>[ 3.977227] target-module@4b000000:target-module@140000:pmu@0:fck: device ID is greater than 24
680 07:19:38.293443 <6>[ 3.991469] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
681 07:19:38.312327 <3>[ 4.013282] l3-aon-clkctrl:0000:0: failed to disable
682 07:19:38.349045 <6>[ 4.047577] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 36, base_baud = 3000000) is a 8250
683 07:19:38.355215 <6>[ 4.056905] printk: legacy console [ttyS0] enabled
684 07:19:38.358769 <6>[ 4.056905] printk: legacy console [ttyS0] enabled
685 07:19:38.368796 <6>[ 4.067299] printk: legacy bootconsole [omap8250] disabled
686 07:19:38.372044 <6>[ 4.067299] printk: legacy bootconsole [omap8250] disabled
687 07:19:38.429710 <4>[ 4.127685] tps65217-pmic: Failed to locate of_node [id: -1]
688 07:19:38.434050 <4>[ 4.135046] tps65217-bl: Failed to locate of_node [id: -1]
689 07:19:38.449934 <6>[ 4.154240] tps65217 0-0024: TPS65217 ID 0xe version 1.2
690 07:19:38.469949 <6>[ 4.161171] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
691 07:19:38.482206 <6>[ 4.174861] i2c 0-0070: Fixed dependency cycle(s) with /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
692 07:19:38.485565 <6>[ 4.186706] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
693 07:19:38.507576 <6>[ 4.206580] omap_gpio 44e07000.gpio: Could not set line 6 debounce to 200000 microseconds (-22)
694 07:19:38.513845 <6>[ 4.215819] sdhci-omap 48060000.mmc: Got CD GPIO
695 07:19:38.521957 <4>[ 4.220981] sdhci-omap 48060000.mmc: supply pbias not found, using dummy regulator
696 07:19:38.537677 <4>[ 4.234231] sdhci-omap 48060000.mmc: supply vqmmc not found, using dummy regulator
697 07:19:38.543846 <4>[ 4.243194] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
698 07:19:38.553145 <4>[ 4.251985] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
699 07:19:38.676949 <6>[ 4.375460] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
700 07:19:38.702820 <6>[ 4.400078] mmc1: SDHCI controller on 481d8000.mmc [481d8000.mmc] using External DMA
701 07:19:38.727849 <6>[ 4.424557] mmc0: SDHCI controller on 48060000.mmc [48060000.mmc] using External DMA
702 07:19:38.733305 <6>[ 4.433494] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
703 07:19:38.803335 <6>[ 4.496221] mmc1: new high speed MMC card at address 0001
704 07:19:38.803746 <6>[ 4.503787] mmcblk1: mmc1:0001 M62704 3.56 GiB
705 07:19:38.806932 <6>[ 4.512276] mmcblk1: p1
706 07:19:38.815318 <6>[ 4.516667] mmcblk1boot0: mmc1:0001 M62704 2.00 MiB
707 07:19:38.823845 <6>[ 4.524659] mmcblk1boot1: mmc1:0001 M62704 2.00 MiB
708 07:19:38.833080 <6>[ 4.532661] mmcblk1rpmb: mmc1:0001 M62704 512 KiB, chardev (236:0)
709 07:19:38.862298 <6>[ 4.558168] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
710 07:19:40.990178 <6>[ 6.687931] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
711 07:19:41.103088 <5>[ 6.726975] Sending DHCP requests ., OK
712 07:19:41.114078 <6>[ 6.811490] IP-Config: Got DHCP answer from 172.16.3.3, my address is 172.16.3.210
713 07:19:41.114461 <6>[ 6.819530] IP-Config: Complete:
714 07:19:41.127711 <6>[ 6.823065] device=eth0, hwaddr=34:03:de:5e:2c:05, ipaddr=172.16.3.210, mask=255.255.255.0, gw=172.16.3.3
715 07:19:41.132553 <6>[ 6.833512] host=172.16.3.210, domain=denx.de, nis-domain=(none)
716 07:19:41.143575 <6>[ 6.840330] bootserver=172.16.3.33, rootserver=172.16.3.3, rootpath=
717 07:19:41.143982 <6>[ 6.840363] nameserver0=172.16.3.3
718 07:19:41.149688 <6>[ 6.851662] ntpserver0=172.16.3.3
719 07:19:41.155840 <6>[ 6.857105] clk: Disabling unused clocks
720 07:19:41.159215 <6>[ 6.861710] PM: genpd: Disabling unused power domains
721 07:19:41.186584 <6>[ 6.879538] Freeing unused kernel image (initmem) memory: 2048K
722 07:19:41.186970 <6>[ 6.889111] Run /init as init process
723 07:19:41.209275 Loading, please wait...
724 07:19:41.283917 Starting systemd-udevd version 252.22-1~deb12u1
725 07:19:44.284976 <4>[ 9.981523] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
726 07:19:44.402820 <4>[ 10.099473] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
727 07:19:44.553579 <6>[ 10.258721] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
728 07:19:44.565268 <6>[ 10.264392] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
729 07:19:44.705594 <6>[ 10.407620] hub 1-0:1.0: USB hub found
730 07:19:44.751842 <6>[ 10.453670] hub 1-0:1.0: 1 port detected
731 07:19:44.887712 <6>[ 10.590532] tda998x 0-0070: found TDA19988
732 07:19:47.689929 Begin: Loading essential drivers ... done.
733 07:19:47.694809 Begin: Running /scripts/init-premount ... done.
734 07:19:47.700802 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
735 07:19:47.708124 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
736 07:19:47.714880 Device /sys/class/net/eth0 found
737 07:19:47.715260 done.
738 07:19:47.782876 Begin: Waiting up to 180 secs for any network device to become available ... done.
739 07:19:47.855777 IP-Config: eth0 hardware address 34:03:de:5e:2c:05 mtu 1500 DHCP
740 07:19:47.884074 IP-Config: eth0 complete (dhcp from 172.16.3.3):
741 07:19:47.895105 address: 172.16.3.210 broadcast: 172.16.3.255 netmask: 255.255.255.0
742 07:19:47.898666 gateway: 172.16.3.3 dns0 : 172.16.3.3 dns1 : 0.0.0.0
743 07:19:47.903705 domain : denx.de
744 07:19:47.909821 rootserver: 172.16.3.33 rootpath:
745 07:19:47.914134 filename : this-host-is-not-configured.kpxe
746 07:19:47.959814 done.
747 07:19:47.970483 Begin: Running /scripts/nfs-bottom ... done.
748 07:19:48.036260 Begin: Running /scripts/init-bottom ... done.
749 07:19:49.230054 <30>[ 14.929735] systemd[1]: System time before build time, advancing clock.
750 07:19:49.381512 <30>[ 15.056370] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
751 07:19:49.390737 <30>[ 15.093194] systemd[1]: Detected architecture arm.
752 07:19:49.406520
753 07:19:49.406904 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
754 07:19:49.407217
755 07:19:49.446683 <30>[ 15.147715] systemd[1]: Hostname set to <debian-bookworm-armhf>.
756 07:19:51.672426 <30>[ 17.371998] systemd[1]: Queued start job for default target graphical.target.
757 07:19:51.692533 <30>[ 17.389780] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
758 07:19:51.699419 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
759 07:19:51.733023 <30>[ 17.429962] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
760 07:19:51.740260 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
761 07:19:51.775982 <30>[ 17.472886] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
762 07:19:51.783374 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
763 07:19:51.819897 <30>[ 17.518755] systemd[1]: Created slice user.slice - User and Session Slice.
764 07:19:51.826841 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
765 07:19:51.862656 <30>[ 17.559224] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
766 07:19:51.876424 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
767 07:19:51.909987 <30>[ 17.608189] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
768 07:19:51.921806 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
769 07:19:51.958575 <30>[ 17.648236] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
770 07:19:51.969693 <30>[ 17.668734] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
771 07:19:51.976447 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
772 07:19:52.008875 <30>[ 17.707390] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
773 07:19:52.017082 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
774 07:19:52.049692 <30>[ 17.747845] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
775 07:19:52.057931 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
776 07:19:52.091712 <30>[ 17.788921] systemd[1]: Reached target paths.target - Path Units.
777 07:19:52.096064 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
778 07:19:52.129432 <30>[ 17.827569] systemd[1]: Reached target remote-fs.target - Remote File Systems.
779 07:19:52.136206 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
780 07:19:52.168826 <30>[ 17.867571] systemd[1]: Reached target slices.target - Slice Units.
781 07:19:52.174565 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
782 07:19:52.209433 <30>[ 17.907756] systemd[1]: Reached target swap.target - Swaps.
783 07:19:52.213809 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
784 07:19:52.249890 <30>[ 17.948489] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
785 07:19:52.261944 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
786 07:19:52.290451 <30>[ 17.988630] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
787 07:19:52.298815 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
788 07:19:52.392803 <30>[ 18.085709] systemd[1]: systemd-journald-audit.socket - Journal Audit Socket was skipped because of an unmet condition check (ConditionSecurity=audit).
789 07:19:52.405333 <30>[ 18.103214] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
790 07:19:52.413798 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
791 07:19:52.452066 <30>[ 18.151290] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
792 07:19:52.463846 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
793 07:19:52.502810 <30>[ 18.200705] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
794 07:19:52.511255 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
795 07:19:52.547455 <30>[ 18.244688] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
796 07:19:52.553571 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
797 07:19:52.591570 <30>[ 18.289185] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
798 07:19:52.598705 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
799 07:19:52.637566 <30>[ 18.328813] systemd[1]: dev-hugepages.mount - Huge Pages File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/mm/hugepages).
800 07:19:52.653062 <30>[ 18.345489] systemd[1]: dev-mqueue.mount - POSIX Message Queue File System was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/mqueue).
801 07:19:52.690194 <30>[ 18.389382] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
802 07:19:52.710503 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
803 07:19:52.761515 <30>[ 18.460270] systemd[1]: Mounting sys-kernel-tracing.mount - Kernel Trace File System...
804 07:19:52.798647 Mounting [0;1;39msys-kernel-tracin…[0m - Kernel Trace File System...
805 07:19:52.875064 <30>[ 18.573306] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
806 07:19:52.893428 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
807 07:19:52.917052 <30>[ 18.615974] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
808 07:19:52.937428 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
809 07:19:53.002249 <30>[ 18.700734] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
810 07:19:53.027773 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
811 07:19:53.092416 <30>[ 18.791410] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
812 07:19:53.107422 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
813 07:19:53.159475 <30>[ 18.858163] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
814 07:19:53.179995 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
815 07:19:53.240528 <30>[ 18.939721] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
816 07:19:53.264893 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
817 07:19:53.336116 <30>[ 19.035464] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
818 07:19:53.355548 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
819 07:19:53.397419 <28>[ 19.089282] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
820 07:19:53.405344 <28>[ 19.103442] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
821 07:19:53.448894 <30>[ 19.148424] systemd[1]: Starting systemd-journald.service - Journal Service...
822 07:19:53.477668 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
823 07:19:53.560120 <30>[ 19.259300] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
824 07:19:53.586800 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
825 07:19:53.622526 <30>[ 19.321581] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
826 07:19:53.668115 Starting [0;1;39msystemd-network-g… units from Kernel command line...
827 07:19:53.733554 <30>[ 19.430028] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
828 07:19:53.788274 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
829 07:19:53.874131 <30>[ 19.572486] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
830 07:19:53.937789 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
831 07:19:54.019948 <30>[ 19.718144] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
832 07:19:54.027936 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
833 07:19:54.061046 <30>[ 19.760052] systemd[1]: Mounted sys-kernel-tracing.mount - Kernel Trace File System.
834 07:19:54.108846 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-tracing…nt[0m - Kernel Trace File System.
835 07:19:54.144124 <30>[ 19.842015] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
836 07:19:54.179708 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
837 07:19:54.314054 <30>[ 20.013855] systemd[1]: Started systemd-journald.service - Journal Service.
838 07:19:54.338754 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
839 07:19:54.380129 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
840 07:19:54.421808 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
841 07:19:54.460117 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
842 07:19:54.511310 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
843 07:19:54.549533 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
844 07:19:54.589795 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
845 07:19:54.629202 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
846 07:19:54.661209 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
847 07:19:54.699562 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
848 07:19:54.734018 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
849 07:19:54.769906 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
850 07:19:54.831461 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
851 07:19:54.894908 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
852 07:19:54.963714 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
853 07:19:55.033778 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
854 07:19:55.165038 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
855 07:19:55.192650 <46>[ 20.891293] systemd-journald[163]: Received client request to flush runtime journal.
856 07:19:55.389152 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
857 07:19:55.452896 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
858 07:19:55.499518 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
859 07:19:55.569163 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
860 07:19:56.835931 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
861 07:19:56.869918 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
862 07:19:56.898513 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
863 07:19:57.145834 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
864 07:19:57.364473 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
865 07:19:57.458831 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
866 07:19:58.050123 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
867 07:19:58.144338 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
868 07:19:59.670681 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
869 07:20:00.148933 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
870 07:20:00.845492 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
871 07:20:01.104182 <5>[ 26.803778] cfg80211: Loading compiled-in X.509 certificates for regulatory database
872 07:20:02.067680 <5>[ 27.769200] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
873 07:20:02.156493 <5>[ 27.856760] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
874 07:20:02.167704 <4>[ 27.867407] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
875 07:20:02.173346 <6>[ 27.876375] cfg80211: failed to load regulatory.db
876 07:20:02.953757 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
877 07:20:10.109689 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
878 07:20:10.152993 [[0;32m OK [0m] Reached target [0;1;39musb-gadget.…m - Hardware activated USB gadget.
879 07:20:10.193462 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
880 07:20:10.283400 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
881 07:20:10.332040 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
882 07:20:10.399796 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
883 07:20:10.471717 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
884 07:20:10.655586 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
885 07:20:10.740336 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
886 07:20:10.781856 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
887 07:20:10.828567 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
888 07:20:10.875405 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
889 07:20:10.899017 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
890 07:20:11.022908 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
891 07:20:11.517941 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
892 07:20:11.549861 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
893 07:20:11.583999 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
894 07:20:11.617890 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
895 07:20:11.797521 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
896 07:20:11.896172 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
897 07:20:11.934712 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
898 07:20:12.038460 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
899 07:20:12.172874 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
900 07:20:12.208851 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
901 07:20:12.252628 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
902 07:20:12.287746 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
903 07:20:12.322746 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
904 07:20:12.404288 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
905 07:20:12.447670 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
906 07:20:12.649499 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
907 07:20:12.839534 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
908 07:20:12.883985 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
909 07:20:12.921093 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
910 07:20:13.047827 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
911 07:20:13.086034 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
912 07:20:13.101380 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
913 07:20:13.209018 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
914 07:20:13.290672 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
915 07:20:13.318614 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
916 07:20:13.534924 Starting [0;1;39msystemd-hostnamed.service[0m - Hostname Service...
917 07:20:13.556427 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
918 07:20:14.102459 [[0;32m OK [0m] Started [0;1;39msystemd-hostnamed.service[0m - Hostname Service.
919 07:20:14.210691 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
920 07:20:14.278413 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
921 07:20:14.330209 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
922 07:20:14.443549 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
923 07:20:14.642558 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
924 07:20:14.815491
925 07:20:14.820969 Debian GNU/Linux 12 debian-debian-bookworm-armhf login: root (automatic login)
926 07:20:14.821360
927 07:20:15.205177 Linux debian-bookworm-armhf 6.11.0-rc6 #1 SMP Fri Sep 6 06:56:26 UTC 2024 armv7l
928 07:20:15.205568
929 07:20:15.210091 The programs included with the Debian GNU/Linux system are free software;
930 07:20:15.213709 the exact distribution terms for each program are described in the
931 07:20:15.218650 individual files in /usr/share/doc/*/copyright.
932 07:20:15.219032
933 07:20:15.224783 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
934 07:20:15.229288 permitted by applicable law.
935 07:20:19.933019 Unable to match end of the kernel message
937 07:20:19.934024 Setting prompt string to ['/ #']
938 07:20:19.934445 end: 2.4.4.1 login-action (duration 00:00:46) [common]
940 07:20:19.935397 end: 2.4.4 auto-login-action (duration 00:00:47) [common]
941 07:20:19.935842 start: 2.4.5 expect-shell-connection (timeout 00:03:13) [common]
942 07:20:19.936186 Setting prompt string to ['/ #']
943 07:20:19.936484 Forcing a shell prompt, looking for ['/ #']
945 07:20:19.987235 / #
946 07:20:19.987776 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
947 07:20:19.988167 Waiting using forced prompt support (timeout 00:02:30)
948 07:20:19.995019
949 07:20:20.001933 end: 2.4.5 expect-shell-connection (duration 00:00:00) [common]
950 07:20:20.002408 start: 2.4.6 export-device-env (timeout 00:03:13) [common]
951 07:20:20.002778 Sending with 10 millisecond of delay
953 07:20:25.059271 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9'
954 07:20:25.069998 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1189987/extract-nfsrootfs-e3zh61a9'
955 07:20:25.073105 Sending with 10 millisecond of delay
957 07:20:27.114320 / # export NFS_SERVER_IP='172.16.3.3'
958 07:20:27.125017 export NFS_SERVER_IP='172.16.3.3'
959 07:20:27.128284 end: 2.4.6 export-device-env (duration 00:00:07) [common]
960 07:20:27.128758 end: 2.4 uboot-commands (duration 00:01:55) [common]
961 07:20:27.129213 end: 2 uboot-action (duration 00:01:55) [common]
962 07:20:27.129646 start: 3 lava-test-retry (timeout 00:06:47) [common]
963 07:20:27.130084 start: 3.1 lava-test-shell (timeout 00:06:47) [common]
964 07:20:27.130433 Using namespace: common
966 07:20:27.231418 / # #
967 07:20:27.231958 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
968 07:20:27.239373 #
969 07:20:27.245127 Using /lava-1189987
971 07:20:27.346175 / # export SHELL=/bin/bash
972 07:20:27.354373 export SHELL=/bin/bash
974 07:20:27.460947 / # . /lava-1189987/environment
975 07:20:27.468457 . /lava-1189987/environment
977 07:20:27.581317 / # /lava-1189987/bin/lava-test-runner /lava-1189987/0
978 07:20:27.581831 Test shell timeout: 10s (minimum of the action and connection timeout)
979 07:20:27.589152 /lava-1189987/bin/lava-test-runner /lava-1189987/0
980 07:20:28.126336 + export TESTRUN_ID=0_timesync-off
981 07:20:28.134374 + TESTRUN_ID=0_timesync-off
982 07:20:28.134761 + cd /lava-1189987/0/tests/0_timesync-off
983 07:20:28.135078 ++ cat uuid
984 07:20:28.149264 + UUID=1189987_1.6.2.4.1
985 07:20:28.149652 + set +x
986 07:20:28.154126 <LAVA_SIGNAL_STARTRUN 0_timesync-off 1189987_1.6.2.4.1>
987 07:20:28.154764 Received signal: <STARTRUN> 0_timesync-off 1189987_1.6.2.4.1
988 07:20:28.155107 Starting test lava.0_timesync-off (1189987_1.6.2.4.1)
989 07:20:28.155488 Skipping test definition patterns.
990 07:20:28.158491 + systemctl stop systemd-timesyncd
991 07:20:28.502683 + set +x
992 07:20:28.503305 Received signal: <ENDRUN> 0_timesync-off 1189987_1.6.2.4.1
993 07:20:28.503703 Ending use of test pattern.
994 07:20:28.504012 Ending test lava.0_timesync-off (1189987_1.6.2.4.1), duration 0.35
996 07:20:28.505864 <LAVA_SIGNAL_ENDRUN 0_timesync-off 1189987_1.6.2.4.1>
997 07:20:28.752665 + export TESTRUN_ID=1_kselftest-dt
998 07:20:28.760850 + TESTRUN_ID=1_kselftest-dt
999 07:20:28.761239 + cd /lava-1189987/0/tests/1_kselftest-dt
1000 07:20:28.761557 ++ cat uuid
1001 07:20:28.776641 + UUID=1189987_1.6.2.4.5
1002 07:20:28.777028 + set +x
1003 07:20:28.782874 <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 1189987_1.6.2.4.5>
1004 07:20:28.783261 + cd ./automated/linux/kselftest/
1005 07:20:28.783814 Received signal: <STARTRUN> 1_kselftest-dt 1189987_1.6.2.4.5
1006 07:20:28.784135 Starting test lava.1_kselftest-dt (1189987_1.6.2.4.5)
1007 07:20:28.784487 Skipping test definition patterns.
1008 07:20:28.810917 + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b beaglebone-black -g mainline -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
1009 07:20:29.004500 INFO: install_deps skipped
1010 07:20:29.782746 --2024-01-26 21:49:16-- http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz
1011 07:20:30.064755 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
1012 07:20:30.229385 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
1013 07:20:30.388912 HTTP request sent, awaiting response... 200 OK
1014 07:20:30.389297 Length: 3833748 (3.7M) [application/octet-stream]
1015 07:20:30.393980 Saving to: 'kselftest_armhf.tar.gz'
1016 07:20:30.394365
1017 07:20:32.941082 kselftest_armhf.tar 0%[ ] 0 --.-KB/s kselftest_armhf.tar 1%[ ] 49.92K 158KB/s kselftest_armhf.tar 5%[> ] 218.67K 344KB/s kselftest_armhf.tar 16%[==> ] 621.60K 743KB/s kselftest_armhf.tar 30%[=====> ] 1.11M 1.00MB/s kselftest_armhf.tar 46%[========> ] 1.72M 1.31MB/s kselftest_armhf.tar 55%[==========> ] 2.04M 1.29MB/s kselftest_armhf.tar 71%[=============> ] 2.61M 1.46MB/s kselftest_armhf.tar 83%[===============> ] 3.05M 1.50MB/s kselftest_armhf.tar 91%[=================> ] 3.35M 1.47MB/s kselftest_armhf.tar 98%[==================> ] 3.60M 1.44MB/s kselftest_armhf.tar 100%[===================>] 3.66M 1.44MB/s in 2.5s
1018 07:20:32.941546
1019 07:20:33.592584 2024-01-26 21:49:19 (1.44 MB/s) - 'kselftest_armhf.tar.gz' saved [3833748/3833748]
1020 07:20:33.593015
1021 07:20:33.833459 tar: ./memory-hotplug/config: time stamp 2024-08-21 05:07:56 is 17911115.397552412 s in the future
1022 07:20:33.949837 tar: ./memory-hotplug/mem-on-off-test.sh: time stamp 2024-08-21 05:07:56 is 17911115.280717245 s in the future
1023 07:20:34.001904 tar: ./memory-hotplug: time stamp 2024-09-06 07:06:11 is 19300610.227104578 s in the future
1024 07:20:34.137337 tar: ./rtc/settings: time stamp 2024-08-21 05:07:56 is 17911115.091970453 s in the future
1025 07:20:34.277031 tar: ./rtc/setdate: time stamp 2024-09-06 07:05:44 is 19300582.952860995 s in the future
1026 07:20:34.403818 tar: ./rtc/rtctest: time stamp 2024-09-06 07:05:44 is 19300582.825041953 s in the future
1027 07:20:34.462227 tar: ./rtc: time stamp 2024-09-06 07:06:15 is 19300613.766725287 s in the future
1028 07:20:34.620074 tar: ./clone3/clone3_set_tid: time stamp 2024-09-06 07:04:21 is 19300499.609883245 s in the future
1029 07:20:34.786006 tar: ./clone3/clone3: time stamp 2024-09-06 07:04:20 is 19300498.443276203 s in the future
1030 07:20:34.955378 tar: ./clone3/clone3_cap_checkpoint_restore: time stamp 2024-09-06 07:04:21 is 19300499.274821037 s in the future
1031 07:20:35.095316 tar: ./clone3/clone3_clear_sighand: time stamp 2024-09-06 07:04:20 is 19300498.134868787 s in the future
1032 07:20:35.142995 tar: ./clone3: time stamp 2024-09-06 07:06:05 is 19300603.08514637 s in the future
1033 07:20:35.294368 tar: ./firmware/settings: time stamp 2024-08-21 05:07:56 is 17911113.934558162 s in the future
1034 07:20:35.412868 tar: ./firmware/config: time stamp 2024-08-21 05:07:56 is 17911113.816021328 s in the future
1035 07:20:35.533725 tar: ./firmware/fw_run_tests.sh: time stamp 2024-08-21 05:07:56 is 17911113.696060995 s in the future
1036 07:20:35.664066 tar: ./firmware/fw_lib.sh: time stamp 2024-08-21 05:07:56 is 17911113.565737328 s in the future
1037 07:20:35.787987 tar: ./firmware/fw_filesystem.sh: time stamp 2024-08-21 05:07:56 is 17911113.442231995 s in the future
1038 07:20:35.927881 tar: ./firmware/fw_namespace: time stamp 2024-09-06 07:04:51 is 19300528.302206912 s in the future
1039 07:20:36.050603 tar: ./firmware/fw_fallback.sh: time stamp 2024-08-21 05:07:56 is 17911113.17876212 s in the future
1040 07:20:36.177473 tar: ./firmware/fw_upload.sh: time stamp 2024-08-21 05:07:56 is 17911113.052048037 s in the future
1041 07:20:36.236954 tar: ./firmware: time stamp 2024-09-06 07:06:08 is 19300604.992098953 s in the future
1042 07:20:36.380858 tar: ./rseq/settings: time stamp 2024-08-21 05:07:56 is 17911112.84850462 s in the future
1043 07:20:36.540834 tar: ./rseq/basic_percpu_ops_mm_cid_test: time stamp 2024-09-06 07:05:41 is 19300577.690164828 s in the future
1044 07:20:36.713202 tar: ./rseq/param_test_mm_cid_compare_twice: time stamp 2024-09-06 07:05:44 is 19300580.517017203 s in the future
1045 07:20:36.845455 tar: ./rseq/librseq.so: time stamp 2024-09-06 07:05:40 is 19300576.383585953 s in the future
1046 07:20:36.996982 tar: ./rseq/param_test_mm_cid: time stamp 2024-09-06 07:05:43 is 19300579.233211411 s in the future
1047 07:20:37.155873 tar: ./rseq/param_test_benchmark: time stamp 2024-09-06 07:05:42 is 19300578.074546161 s in the future
1048 07:20:37.288054 tar: ./rseq/basic_percpu_ops_test: time stamp 2024-09-06 07:05:41 is 19300576.94109737 s in the future
1049 07:20:37.428835 tar: ./rseq/param_test: time stamp 2024-09-06 07:05:41 is 19300576.799989745 s in the future
1050 07:20:37.598308 tar: ./rseq/param_test_compare_twice: time stamp 2024-09-06 07:05:42 is 19300577.632425203 s in the future
1051 07:20:37.731627 tar: ./rseq/run_param_test.sh: time stamp 2024-08-21 05:07:56 is 17911111.497583245 s in the future
1052 07:20:37.870309 tar: ./rseq/param_test_mm_cid_benchmark: time stamp 2024-09-06 07:05:43 is 19300578.360259078 s in the future
1053 07:20:38.005682 tar: ./rseq/basic_test: time stamp 2024-09-06 07:05:40 is 19300575.223892995 s in the future
1054 07:20:38.061689 tar: ./rseq: time stamp 2024-09-06 07:06:15 is 19300610.166361036 s in the future
1055 07:20:38.189810 tar: ./tpm2/settings: time stamp 2024-08-21 05:07:56 is 17911111.038772203 s in the future
1056 07:20:38.307348 tar: ./tpm2/test_space.sh: time stamp 2024-08-21 05:07:56 is 17911110.921927203 s in the future
1057 07:20:38.446086 tar: ./tpm2/tpm2.py: time stamp 2024-08-21 05:07:56 is 17911110.78312562 s in the future
1058 07:20:38.565727 tar: ./tpm2/test_smoke.sh: time stamp 2024-08-21 05:07:56 is 17911110.663354828 s in the future
1059 07:20:38.690555 tar: ./tpm2/tpm2_tests.py: time stamp 2024-08-21 05:07:56 is 17911110.53818387 s in the future
1060 07:20:38.799534 tar: ./tpm2/test_async.sh: time stamp 2024-08-21 05:07:56 is 17911110.429671328 s in the future
1061 07:20:38.910804 tar: ./tpm2: time stamp 2024-09-06 07:06:17 is 19300611.317683161 s in the future
1062 07:20:39.047349 tar: ./perf_events/settings: time stamp 2024-08-21 05:07:56 is 17911110.181934161 s in the future
1063 07:20:39.156429 tar: ./perf_events/config: time stamp 2024-08-21 05:07:56 is 17911110.072942786 s in the future
1064 07:20:39.292305 tar: ./perf_events/sigtrap_threads: time stamp 2024-09-06 07:05:32 is 19300565.937679911 s in the future
1065 07:20:39.442757 tar: ./perf_events/watermark_signal: time stamp 2024-09-06 07:05:32 is 19300565.787736995 s in the future
1066 07:20:39.564465 tar: ./perf_events/remove_on_exec: time stamp 2024-09-06 07:05:32 is 19300565.664954953 s in the future
1067 07:20:39.631461 tar: ./perf_events: time stamp 2024-09-06 07:06:13 is 19300606.598240078 s in the future
1068 07:20:39.773196 tar: ./lsm/config: time stamp 2024-08-21 05:07:56 is 17911109.455736244 s in the future
1069 07:20:39.909940 tar: ./lsm/lsm_set_self_attr_test: time stamp 2024-09-06 07:05:08 is 19300541.320531994 s in the future
1070 07:20:40.060144 tar: ./lsm/lsm_get_self_attr_test: time stamp 2024-09-06 07:05:07 is 19300540.170051036 s in the future
1071 07:20:40.200023 tar: ./lsm/lsm_list_modules_test: time stamp 2024-09-06 07:05:07 is 19300540.030351536 s in the future
1072 07:20:40.252941 tar: ./lsm: time stamp 2024-09-06 07:06:10 is 19300602.974720119 s in the future
1073 07:20:40.400900 tar: ./timens/config: time stamp 2024-08-21 05:07:56 is 17911108.828277494 s in the future
1074 07:20:40.538324 tar: ./timens/timerfd: time stamp 2024-09-06 07:05:48 is 19300580.689732578 s in the future
1075 07:20:40.672664 tar: ./timens/procfs: time stamp 2024-09-06 07:05:49 is 19300581.555971869 s in the future
1076 07:20:40.792270 tar: ./timens/timens: time stamp 2024-09-06 07:05:48 is 19300580.436316744 s in the future
1077 07:20:40.918321 tar: ./timens/timer: time stamp 2024-09-06 07:05:48 is 19300580.311005036 s in the future
1078 07:20:41.033304 tar: ./timens/futex: time stamp 2024-09-06 07:05:49 is 19300581.194537411 s in the future
1079 07:20:41.172948 tar: ./timens/exec: time stamp 2024-09-06 07:05:49 is 19300581.055581453 s in the future
1080 07:20:41.291434 tar: ./timens/vfork_exec: time stamp 2024-09-06 07:05:49 is 19300580.937618161 s in the future
1081 07:20:41.418561 tar: ./timens/gettime_perf: time stamp 2024-09-06 07:05:49 is 19300580.810691911 s in the future
1082 07:20:41.556307 tar: ./timens/clock_nanosleep: time stamp 2024-09-06 07:05:48 is 19300579.673277869 s in the future
1083 07:20:41.623018 tar: ./timens: time stamp 2024-09-06 07:06:17 is 19300608.605380244 s in the future
1084 07:20:41.758394 tar: ./mount_setattr/config: time stamp 2024-08-21 05:07:56 is 17911107.470859744 s in the future
1085 07:20:42.009001 tar: ./mount_setattr/mount_setattr_test: time stamp 2024-09-06 07:05:10 is 19300541.220523453 s in the future
1086 07:20:42.068703 tar: ./mount_setattr: time stamp 2024-09-06 07:06:11 is 19300602.160219994 s in the future
1087 07:20:42.209248 tar: ./iommu/config: time stamp 2024-08-21 05:07:56 is 17911107.018743244 s in the future
1088 07:20:42.410288 tar: ./iommu/iommufd: time stamp 2024-09-06 07:04:57 is 19300527.818680244 s in the future
1089 07:20:42.544894 tar: ./iommu/iommufd_fail_nth: time stamp 2024-09-06 07:04:57 is 19300527.684790661 s in the future
1090 07:20:42.602146 tar: ./iommu: time stamp 2024-09-06 07:06:09 is 19300599.626402494 s in the future
1091 07:20:42.743877 tar: ./sync/config: time stamp 2024-08-21 05:07:56 is 17911106.484886411 s in the future
1092 07:20:42.866597 tar: ./sync/sync_test: time stamp 2024-09-06 07:05:48 is 19300578.362453744 s in the future
1093 07:20:42.917440 tar: ./sync: time stamp 2024-09-06 07:06:16 is 19300606.309710786 s in the future
1094 07:20:43.061442 tar: ./lib/config: time stamp 2024-08-21 05:07:56 is 17911106.167656786 s in the future
1095 07:20:43.181937 tar: ./lib/printf.sh: time stamp 2024-08-21 05:07:56 is 17911106.046804619 s in the future
1096 07:20:43.294232 tar: ./lib/bitmap.sh: time stamp 2024-08-21 05:07:56 is 17911105.934181452 s in the future
1097 07:20:43.394989 tar: ./lib/prime_numbers.sh: time stamp 2024-08-21 05:07:56 is 17911105.834019077 s in the future
1098 07:20:43.519983 tar: ./lib/strscpy.sh: time stamp 2024-08-21 05:07:56 is 17911105.708852369 s in the future
1099 07:20:43.628040 tar: ./lib/scanf.sh: time stamp 2024-08-21 05:07:56 is 17911105.600461327 s in the future
1100 07:20:43.677945 tar: ./lib: time stamp 2024-09-06 07:06:10 is 19300599.550356494 s in the future
1101 07:20:43.824938 tar: ./ipc/config: time stamp 2024-08-21 05:07:56 is 17911105.403288702 s in the future
1102 07:20:43.972940 tar: ./ipc/msgque: time stamp 2024-09-06 07:04:57 is 19300526.256053327 s in the future
1103 07:20:44.052298 tar: ./ipc: time stamp 2024-09-06 07:06:09 is 19300598.175027786 s in the future
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1259 07:21:02.446924 tar: ./filesystems/devpts_pts: time stamp 2024-09-06 07:04:49 is 19300499.782342367 s in the future
1260 07:21:02.579358 tar: ./filesystems/binderfs/config: time stamp 2024-08-21 05:07:56 is 17911086.649456158 s in the future
1261 07:21:02.721497 tar: ./filesystems/binderfs/binderfs_test: time stamp 2024-09-06 07:04:49 is 19300499.507448408 s in the future
1262 07:21:02.779986 tar: ./filesystems/binderfs: time stamp 2024-09-06 07:06:07 is 19300577.448925617 s in the future
1263 07:21:02.828872 tar: ./filesystems: time stamp 2024-09-06 07:06:08 is 19300578.398970408 s in the future
1264 07:21:03.397100 tar: ./openat2/openat2_test: time stamp 2024-09-06 07:05:36 is 19300545.832334242 s in the future
1265 07:21:03.812237 tar: ./openat2/resolve_test: time stamp 2024-09-06 07:05:38 is 19300547.415758075 s in the future
1266 07:21:04.188334 tar: ./openat2/rename_attack_test: time stamp 2024-09-06 07:05:39 is 19300548.040420492 s in the future
1267 07:21:04.245744 tar: ./openat2: time stamp 2024-09-06 07:06:14 is 19300582.981989075 s in the future
1268 07:21:04.387650 tar: ./gpio/config: time stamp 2024-08-21 05:07:56 is 17911084.84027895 s in the future
1269 07:21:04.562115 tar: ./gpio/gpio-sim.sh: time stamp 2024-08-21 05:07:56 is 17911084.665440283 s in the future
1270 07:21:04.696577 tar: ./gpio/gpio-mockup-cdev: time stamp 2024-09-06 07:04:53 is 19300501.531926158 s in the future
1271 07:21:04.862870 tar: ./gpio/gpio-chip-info: time stamp 2024-09-06 07:04:53 is 19300501.365176908 s in the future
1272 07:21:04.988856 tar: ./gpio/gpio-mockup.sh: time stamp 2024-08-21 05:07:56 is 17911084.240070533 s in the future
1273 07:21:05.105230 tar: ./gpio/gpio-line-name: time stamp 2024-09-06 07:04:53 is 19300501.123010825 s in the future
1274 07:21:05.238691 tar: ./gpio/gpio-mockup-sysfs.sh: time stamp 2024-08-21 05:07:56 is 17911083.989828033 s in the future
1275 07:21:05.287655 tar: ./gpio: time stamp 2024-09-06 07:06:09 is 19300576.939736575 s in the future
1276 07:21:05.440089 tar: ./devices/probe/test_discoverable_devices.py: time stamp 2024-08-21 05:07:56 is 17911083.789451908 s in the future
1277 07:21:05.565167 tar: ./devices/probe/boards/google,spherion.yaml: time stamp 2024-08-21 05:07:56 is 17911083.664496575 s in the future
1278 07:21:05.674845 tar: ./devices/probe/boards/Dell Inc.,XPS 13 9300.yaml: time stamp 2024-08-21 05:07:56 is 17911083.556023491 s in the future
1279 07:21:05.722866 tar: ./devices/probe/boards: time stamp 2024-08-21 05:07:56 is 17911083.506001325 s in the future
1280 07:21:05.771533 tar: ./devices/probe: time stamp 2024-09-06 07:06:06 is 19300573.456038491 s in the future
1281 07:21:05.908561 tar: ./devices/error_logs/test_device_error_logs.py: time stamp 2024-08-21 05:07:56 is 17911083.322198158 s in the future
1282 07:21:05.956436 tar: ./devices/error_logs: time stamp 2024-09-06 07:06:06 is 19300573.271981908 s in the future
1283 07:21:06.012570 tar: ./devices: time stamp 2024-09-06 07:06:06 is 19300573.214153158 s in the future
1284 07:21:06.138340 tar: ./user/config: time stamp 2024-08-21 05:07:56 is 17911083.088772366 s in the future
1285 07:21:06.315088 tar: ./user/test_user_copy.sh: time stamp 2024-08-21 05:07:56 is 17911082.913678616 s in the future
1286 07:21:06.363971 tar: ./user: time stamp 2024-09-06 07:06:18 is 19300584.863597241 s in the future
1287 07:21:06.505859 tar: ./pstore/config: time stamp 2024-08-21 05:07:56 is 17911082.721898241 s in the future
1288 07:21:06.623368 tar: ./pstore/pstore_tests: time stamp 2024-08-21 05:07:56 is 17911082.605042116 s in the future
1289 07:21:06.748068 tar: ./pstore/pstore_crash_test: time stamp 2024-08-21 05:07:56 is 17911082.480107241 s in the future
1290 07:21:06.882700 tar: ./pstore/common_tests: time stamp 2024-08-21 05:07:56 is 17911082.346139366 s in the future
1291 07:21:06.999086 tar: ./pstore/pstore_post_reboot_tests: time stamp 2024-08-21 05:07:56 is 17911082.229811283 s in the future
1292 07:21:07.047112 tar: ./pstore: time stamp 2024-09-06 07:06:13 is 19300579.179639491 s in the future
1293 07:21:07.181346 tar: ./vDSO/vdso_test_abi: time stamp 2024-09-06 07:05:53 is 19300559.046114158 s in the future
1294 07:21:07.300068 tar: ./vDSO/vdso_test_getrandom: time stamp 2024-09-06 07:05:53 is 19300558.929017325 s in the future
1295 07:21:07.408342 tar: ./vDSO/vdso_test_clock_getres: time stamp 2024-09-06 07:05:53 is 19300558.820542033 s in the future
1296 07:21:07.516471 tar: ./vDSO/vdso_test_getcpu: time stamp 2024-09-06 07:05:53 is 19300558.711971075 s in the future
1297 07:21:07.641479 tar: ./vDSO/vdso_test_correctness: time stamp 2024-09-06 07:05:53 is 19300558.587435908 s in the future
1298 07:21:07.759197 tar: ./vDSO/vdso_test_gettimeofday: time stamp 2024-09-06 07:05:53 is 19300558.470231408 s in the future
1299 07:21:07.806980 tar: ./vDSO: time stamp 2024-09-06 07:06:18 is 19300583.420261783 s in the future
1300 07:21:07.956962 tar: ./intel_pstate/run.sh: time stamp 2024-08-21 05:07:56 is 17911081.270404616 s in the future
1301 07:21:08.006850 tar: ./intel_pstate: time stamp 2024-09-06 07:06:09 is 19300574.219976116 s in the future
1302 07:21:08.140134 tar: ./ftrace/settings: time stamp 2024-08-21 05:07:56 is 17911081.087651533 s in the future
1303 07:21:08.265069 tar: ./ftrace/config: time stamp 2024-08-21 05:07:56 is 17911080.961599991 s in the future
1304 07:21:08.374111 tar: ./ftrace/ftracetest-ktap: time stamp 2024-08-21 05:07:56 is 17911080.853567449 s in the future
1305 07:21:08.527067 tar: ./ftrace/test.d/dynevent/add_remove_tprobe.tc: time stamp 2024-08-21 05:07:56 is 17911080.703089491 s in the future
1306 07:21:08.652394 tar: ./ftrace/test.d/dynevent/add_remove_btfarg.tc: time stamp 2024-08-21 05:07:56 is 17911080.577680699 s in the future
1307 07:21:08.761960 tar: ./ftrace/test.d/dynevent/fprobe_syntax_errors.tc: time stamp 2024-08-21 05:07:56 is 17911080.469344283 s in the future
1308 07:21:08.877262 tar: ./ftrace/test.d/dynevent/clear_select_events.tc: time stamp 2024-08-21 05:07:56 is 17911080.352549533 s in the future
1309 07:21:09.001861 tar: ./ftrace/test.d/dynevent/fprobe_args_vfs.tc: time stamp 2024-08-21 05:07:56 is 17911080.227345616 s in the future
1310 07:21:09.111216 tar: ./ftrace/test.d/dynevent/add_remove_fprobe.tc: time stamp 2024-08-21 05:07:56 is 17911080.118882616 s in the future
1311 07:21:09.228078 tar: ./ftrace/test.d/dynevent/tprobe_syntax_errors.tc: time stamp 2024-08-21 05:07:56 is 17911080.002137949 s in the future
1312 07:21:09.336402 tar: ./ftrace/test.d/dynevent/generic_clear_event.tc: time stamp 2024-08-21 05:07:56 is 17911079.893854366 s in the future
1313 07:21:09.444532 tar: ./ftrace/test.d/dynevent/test_duplicates.tc: time stamp 2024-08-21 05:07:56 is 17911079.785484991 s in the future
1314 07:21:09.586674 tar: ./ftrace/test.d/dynevent/add_remove_kprobe.tc: time stamp 2024-08-21 05:07:56 is 17911079.643415408 s in the future
1315 07:21:09.696172 tar: ./ftrace/test.d/dynevent/fprobe_entry_arg.tc: time stamp 2024-08-21 05:07:56 is 17911079.535021283 s in the future
1316 07:21:09.803531 tar: ./ftrace/test.d/dynevent/add_remove_synth.tc: time stamp 2024-08-21 05:07:56 is 17911079.426756991 s in the future
1317 07:21:09.927821 tar: ./ftrace/test.d/dynevent/add_remove_eprobe.tc: time stamp 2024-08-21 05:07:56 is 17911079.301645616 s in the future
1318 07:21:10.045586 tar: ./ftrace/test.d/dynevent/eprobes_syntax_errors.tc: time stamp 2024-08-21 05:07:56 is 17911079.184715074 s in the future
1319 07:21:10.100914 tar: ./ftrace/test.d/dynevent: time stamp 2024-08-21 05:07:56 is 17911079.126348449 s in the future
1320 07:21:10.227097 tar: ./ftrace/test.d/direct/kprobe-direct.tc: time stamp 2024-08-21 05:07:56 is 17911079.001693324 s in the future
1321 07:21:10.336294 tar: ./ftrace/test.d/direct/ftrace-direct.tc: time stamp 2024-08-21 05:07:56 is 17911078.892994491 s in the future
1322 07:21:10.393635 tar: ./ftrace/test.d/direct: time stamp 2024-08-21 05:07:56 is 17911078.834358991 s in the future
1323 07:21:10.545105 tar: ./ftrace/test.d/00basic/basic3.tc: time stamp 2024-08-21 05:07:56 is 17911078.684145741 s in the future
1324 07:21:10.653213 tar: ./ftrace/test.d/00basic/basic2.tc: time stamp 2024-08-21 05:07:56 is 17911078.575750282 s in the future
1325 07:21:10.779439 tar: ./ftrace/test.d/00basic/trace_marker.tc: time stamp 2024-08-21 05:07:56 is 17911078.450612407 s in the future
1326 07:21:10.920593 tar: ./ftrace/test.d/00basic/snapshot1.tc: time stamp 2024-08-21 05:07:56 is 17911078.308769657 s in the future
1327 07:21:11.037350 tar: ./ftrace/test.d/00basic/basic1.tc: time stamp 2024-08-21 05:07:56 is 17911078.191970366 s in the future
1328 07:21:11.153978 tar: ./ftrace/test.d/00basic/ringbuffer_size.tc: time stamp 2024-08-21 05:07:56 is 17911078.075304824 s in the future
1329 07:21:11.262215 tar: ./ftrace/test.d/00basic/snapshot.tc: time stamp 2024-08-21 05:07:56 is 17911077.966724616 s in the future
1330 07:21:11.412453 tar: ./ftrace/test.d/00basic/trace_pipe.tc: time stamp 2024-08-21 05:07:56 is 17911077.816695366 s in the future
1331 07:21:11.521878 tar: ./ftrace/test.d/00basic/test_ownership.tc: time stamp 2024-08-21 05:07:56 is 17911077.708158241 s in the future
1332 07:21:11.629089 tar: ./ftrace/test.d/00basic/basic4.tc: time stamp 2024-08-21 05:07:56 is 17911077.599852157 s in the future
1333 07:21:11.739858 tar: ./ftrace/test.d/00basic/ringbuffer_subbuf_size.tc: time stamp 2024-08-21 05:07:56 is 17911077.491247199 s in the future
1334 07:21:11.786568 tar: ./ftrace/test.d/00basic: time stamp 2024-08-21 05:07:56 is 17911077.441178699 s in the future
1335 07:21:11.930651 tar: ./ftrace/test.d/kprobe/multiple_kprobes.tc: time stamp 2024-08-21 05:07:56 is 17911077.299515782 s in the future
1336 07:21:12.047583 tar: ./ftrace/test.d/kprobe/kprobe_eventname.tc: time stamp 2024-08-21 05:07:56 is 17911077.182771366 s in the future
1337 07:21:12.172732 tar: ./ftrace/test.d/kprobe/kprobe_args_string.tc: time stamp 2024-08-21 05:07:56 is 17911077.057377657 s in the future
1338 07:21:12.280972 tar: ./ftrace/test.d/kprobe/kretprobe_maxactive.tc: time stamp 2024-08-21 05:07:56 is 17911076.948937699 s in the future
1339 07:21:12.388617 tar: ./ftrace/test.d/kprobe/kprobe_args_symbol.tc: time stamp 2024-08-21 05:07:56 is 17911076.841349116 s in the future
1340 07:21:12.499082 tar: ./ftrace/test.d/kprobe/kprobe_non_uniq_symbol.tc: time stamp 2024-08-21 05:07:56 is 17911076.732056991 s in the future
1341 07:21:12.605090 tar: ./ftrace/test.d/kprobe/profile.tc: time stamp 2024-08-21 05:07:56 is 17911076.624032199 s in the future
1342 07:21:12.721987 tar: ./ftrace/test.d/kprobe/probepoint.tc: time stamp 2024-08-21 05:07:56 is 17911076.506903741 s in the future
1343 07:21:12.839569 tar: ./ftrace/test.d/kprobe/kretprobe_args.tc: time stamp 2024-08-21 05:07:56 is 17911076.390360324 s in the future
1344 07:21:12.956578 tar: ./ftrace/test.d/kprobe/kprobe_args_comm.tc: time stamp 2024-08-21 05:07:56 is 17911076.273550532 s in the future
1345 07:21:13.065023 tar: ./ftrace/test.d/kprobe/kretprobe_entry_arg.tc: time stamp 2024-08-21 05:07:56 is 17911076.165168616 s in the future
1346 07:21:13.173508 tar: ./ftrace/test.d/kprobe/kprobe_syntax_errors.tc: time stamp 2024-08-21 05:07:56 is 17911076.05634724 s in the future
1347 07:21:13.323068 tar: ./ftrace/test.d/kprobe/kprobe_args_type.tc: time stamp 2024-08-21 05:07:56 is 17911075.906496324 s in the future
1348 07:21:13.439970 tar: ./ftrace/test.d/kprobe/kprobe_insn_boundary.tc: time stamp 2024-08-21 05:07:56 is 17911075.789715865 s in the future
1349 07:21:13.548278 tar: ./ftrace/test.d/kprobe/kprobe_module.tc: time stamp 2024-08-21 05:07:56 is 17911075.681319282 s in the future
1350 07:21:13.657597 tar: ./ftrace/test.d/kprobe/kprobe_opt_types.tc: time stamp 2024-08-21 05:07:56 is 17911075.572332032 s in the future
1351 07:21:13.782074 tar: ./ftrace/test.d/kprobe/kretprobe_return_suffix.tc: time stamp 2024-08-21 05:07:56 is 17911075.44764799 s in the future
1352 07:21:13.898811 tar: ./ftrace/test.d/kprobe/add_and_remove.tc: time stamp 2024-08-21 05:07:56 is 17911075.330994907 s in the future
1353 07:21:14.015481 tar: ./ftrace/test.d/kprobe/kprobe_args_syntax.tc: time stamp 2024-08-21 05:07:56 is 17911075.21403149 s in the future
1354 07:21:14.131983 tar: ./ftrace/test.d/kprobe/kprobe_args_char.tc: time stamp 2024-08-21 05:07:56 is 17911075.097106699 s in the future
1355 07:21:14.248832 tar: ./ftrace/test.d/kprobe/kprobe_ftrace.tc: time stamp 2024-08-21 05:07:56 is 17911074.98043824 s in the future
1356 07:21:14.365459 tar: ./ftrace/test.d/kprobe/busy_check.tc: time stamp 2024-08-21 05:07:56 is 17911074.863801907 s in the future
1357 07:21:14.508850 tar: ./ftrace/test.d/kprobe/uprobe_syntax_errors.tc: time stamp 2024-08-21 05:07:56 is 17911074.721841532 s in the future
1358 07:21:14.617048 tar: ./ftrace/test.d/kprobe/kprobe_args_vfs.tc: time stamp 2024-08-21 05:07:56 is 17911074.613311365 s in the future
1359 07:21:14.783547 tar: ./ftrace/test.d/kprobe/kprobe_args_user.tc: time stamp 2024-08-21 05:07:56 is 17911074.446536199 s in the future
1360 07:21:14.899089 tar: ./ftrace/test.d/kprobe/kprobe_args.tc: time stamp 2024-08-21 05:07:56 is 17911074.329737324 s in the future
1361 07:21:15.008303 tar: ./ftrace/test.d/kprobe/kprobe_multiprobe.tc: time stamp 2024-08-21 05:07:56 is 17911074.221391157 s in the future
1362 07:21:15.056163 tar: ./ftrace/test.d/kprobe: time stamp 2024-08-21 05:07:56 is 17911074.171185782 s in the future
1363 07:21:15.183469 tar: ./ftrace/test.d/event/subsystem-enable.tc: time stamp 2024-08-21 05:07:56 is 17911074.046072115 s in the future
1364 07:21:15.298995 tar: ./ftrace/test.d/event/trace_printk.tc: time stamp 2024-08-21 05:07:56 is 17911073.929256282 s in the future
1365 07:21:15.425284 tar: ./ftrace/test.d/event/toplevel-enable.tc: time stamp 2024-08-21 05:07:56 is 17911073.804288657 s in the future
1366 07:21:15.541037 tar: ./ftrace/test.d/event/event-enable.tc: time stamp 2024-08-21 05:07:56 is 17911073.68741374 s in the future
1367 07:21:15.658834 tar: ./ftrace/test.d/event/event-pid.tc: time stamp 2024-08-21 05:07:56 is 17911073.570633615 s in the future
1368 07:21:15.808312 tar: ./ftrace/test.d/event/event-no-pid.tc: time stamp 2024-08-21 05:07:56 is 17911073.420444865 s in the future
1369 07:21:15.857087 tar: ./ftrace/test.d/event: time stamp 2024-08-21 05:07:56 is 17911073.370576615 s in the future
1370 07:21:15.983206 tar: ./ftrace/test.d/tracer/wakeup_rt.tc: time stamp 2024-08-21 05:07:56 is 17911073.245399532 s in the future
1371 07:21:16.118071 tar: ./ftrace/test.d/tracer/wakeup.tc: time stamp 2024-08-21 05:07:56 is 17911073.111740615 s in the future
1372 07:21:16.165794 tar: ./ftrace/test.d/tracer: time stamp 2024-08-21 05:07:56 is 17911073.06180324 s in the future
1373 07:21:16.311161 tar: ./ftrace/test.d/filter/event-filter-function.tc: time stamp 2024-08-21 05:07:56 is 17911072.920060282 s in the future
1374 07:21:16.366604 tar: ./ftrace/test.d/filter: time stamp 2024-08-21 05:07:56 is 17911072.861652323 s in the future
1375 07:21:16.501237 tar: ./ftrace/test.d/instances/instance-event.tc: time stamp 2024-08-21 05:07:56 is 17911072.728118073 s in the future
1376 07:21:16.616907 tar: ./ftrace/test.d/instances/instance.tc: time stamp 2024-08-21 05:07:56 is 17911072.611261282 s in the future
1377 07:21:16.675565 tar: ./ftrace/test.d/instances: time stamp 2024-08-21 05:07:56 is 17911072.552855532 s in the future
1378 07:21:16.809326 tar: ./ftrace/test.d/selftest/bashisms.tc: time stamp 2024-08-21 05:07:56 is 17911072.419474198 s in the future
1379 07:21:16.858322 tar: ./ftrace/test.d/selftest: time stamp 2024-08-21 05:07:56 is 17911072.369375115 s in the future
1380 07:21:16.975956 tar: ./ftrace/test.d/template: time stamp 2024-08-21 05:07:56 is 17911072.252455448 s in the future
1381 07:21:17.117900 tar: ./ftrace/test.d/ftrace/tracing-error-log.tc: time stamp 2024-08-21 05:07:56 is 17911072.111450532 s in the future
1382 07:21:17.236027 tar: ./ftrace/test.d/ftrace/func_profile_stat.tc: time stamp 2024-08-21 05:07:56 is 17911071.99410824 s in the future
1383 07:21:17.344270 tar: ./ftrace/test.d/ftrace/func_set_ftrace_file.tc: time stamp 2024-08-21 05:07:56 is 17911071.885482823 s in the future
1384 07:21:17.452462 tar: ./ftrace/test.d/ftrace/func_hotplug.tc: time stamp 2024-08-21 05:07:56 is 17911071.777164365 s in the future
1385 07:21:17.569384 tar: ./ftrace/test.d/ftrace/func-filter-pid.tc: time stamp 2024-08-21 05:07:56 is 17911071.66017824 s in the future
1386 07:21:17.676738 tar: ./ftrace/test.d/ftrace/func_mod_trace.tc: time stamp 2024-08-21 05:07:56 is 17911071.551918073 s in the future
1387 07:21:17.787461 tar: ./ftrace/test.d/ftrace/func-filter-notrace-pid.tc: time stamp 2024-08-21 05:07:56 is 17911071.443214532 s in the future
1388 07:21:17.903170 tar: ./ftrace/test.d/ftrace/func_stack_tracer.tc: time stamp 2024-08-21 05:07:56 is 17911071.326552948 s in the future
1389 07:21:18.027180 tar: ./ftrace/test.d/ftrace/func_cpumask.tc: time stamp 2024-08-21 05:07:56 is 17911071.201431407 s in the future
1390 07:21:18.146066 tar: ./ftrace/test.d/ftrace/fgraph-filter-stack.tc: time stamp 2024-08-21 05:07:56 is 17911071.084602698 s in the future
1391 07:21:18.253309 tar: ./ftrace/test.d/ftrace/fgraph-filter.tc: time stamp 2024-08-21 05:07:56 is 17911070.976193282 s in the future
1392 07:21:18.378763 tar: ./ftrace/test.d/ftrace/func_traceonoff_triggers.tc: time stamp 2024-08-21 05:07:56 is 17911070.850877698 s in the future
1393 07:21:18.512406 tar: ./ftrace/test.d/ftrace/func_event_triggers.tc: time stamp 2024-08-21 05:07:56 is 17911070.71734349 s in the future
1394 07:21:18.627938 tar: ./ftrace/test.d/ftrace/func_profiler.tc: time stamp 2024-08-21 05:07:56 is 17911070.60054199 s in the future
1395 07:21:18.737294 tar: ./ftrace/test.d/ftrace/func-filter-stacktrace.tc: time stamp 2024-08-21 05:07:56 is 17911070.49209024 s in the future
1396 07:21:18.845801 tar: ./ftrace/test.d/ftrace/fgraph-multi.tc: time stamp 2024-08-21 05:07:56 is 17911070.383723198 s in the future
1397 07:21:18.962423 tar: ./ftrace/test.d/ftrace/fgraph-retval.tc: time stamp 2024-08-21 05:07:56 is 17911070.266856115 s in the future
1398 07:21:19.112936 tar: ./ftrace/test.d/ftrace/func-filter-glob.tc: time stamp 2024-08-21 05:07:56 is 17911070.11666449 s in the future
1399 07:21:19.160935 tar: ./ftrace/test.d/ftrace: time stamp 2024-08-21 05:07:56 is 17911070.06712874 s in the future
1400 07:21:19.288111 tar: ./ftrace/test.d/trigger/trigger-traceonoff.tc: time stamp 2024-08-21 05:07:56 is 17911069.941440448 s in the future
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1402 07:21:19.529890 tar: ./ftrace/test.d/trigger/trigger-stacktrace.tc: time stamp 2024-08-21 05:07:56 is 17911069.700157656 s in the future
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1420 07:21:21.801688 tar: ./ftrace/test.d/trigger/inter-event/trigger-onmatch-onmax-action-hist.tc: time stamp 2024-08-21 05:07:56 is 17911067.430302906 s in the future
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1450 07:21:25.269331 tar: ./dmabuf-heaps/config: time stamp 2024-08-21 05:07:56 is 17911063.958152656 s in the future
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1453 07:21:25.768744 tar: ./sysctl/config: time stamp 2024-08-21 05:07:56 is 17911063.457960364 s in the future
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1456 07:21:26.092603 tar: ./landlock/config: time stamp 2024-08-21 05:07:56 is 17911063.134541572 s in the future
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1458 07:21:26.433957 tar: ./landlock/net_test: time stamp 2024-09-06 07:05:06 is 19300492.793292447 s in the future
1459 07:21:26.601538 tar: ./landlock/base_test: time stamp 2024-09-06 07:04:58 is 19300484.626024531 s in the future
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1471 07:21:28.159963 tar: ./proc/proc-subset-pid: time stamp 2024-09-06 07:05:34 is 19300519.066614072 s in the future
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1478 07:21:29.037893 tar: ./proc/proc-pid-vm: time stamp 2024-09-06 07:05:34 is 19300518.189328655 s in the future
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1482 07:21:29.563933 tar: ./proc/setns-sysvipc: time stamp 2024-09-06 07:05:35 is 19300518.663979572 s in the future
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1507 07:21:32.499038 tar: ./mincore/mincore_selftest: time stamp 2024-09-06 07:05:08 is 19300488.72783928 s in the future
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1515 07:21:33.357372 tar: ./splice: time stamp 2024-09-06 07:06:16 is 19300555.868721738 s in the future
1516 07:21:33.516012 tar: ./pidfd/pidfd_open_test: time stamp 2024-09-06 07:05:32 is 19300511.710862988 s in the future
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1519 07:21:33.908752 tar: ./pidfd/pidfd_wait: time stamp 2024-09-06 07:05:33 is 19300512.318081946 s in the future
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1522 07:21:34.364734 tar: ./pidfd/pidfd_getfd_test: time stamp 2024-09-06 07:05:33 is 19300511.861645071 s in the future
1523 07:21:34.509714 tar: ./pidfd/pidfd_fdinfo_test: time stamp 2024-09-06 07:05:32 is 19300510.717650863 s in the future
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1525 07:21:34.757346 tar: ./net/openvswitch/settings: time stamp 2024-08-21 05:07:56 is 17911054.470429905 s in the future
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1527 07:21:35.100509 tar: ./net/openvswitch/ovs-dpctl.py: time stamp 2024-08-21 05:07:56 is 17911054.127001155 s in the future
1528 07:21:35.191596 tar: ./net/openvswitch: time stamp 2024-09-06 07:06:12 is 19300550.035088155 s in the future
1529 07:21:35.340864 tar: ./net/netfilter/settings: time stamp 2024-08-21 05:07:56 is 17911053.885431738 s in the future
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1542 07:21:36.869221 tar: ./net/netfilter/nft_synproxy.sh: time stamp 2024-08-21 05:07:56 is 17911052.358817363 s in the future
1543 07:21:36.977636 tar: ./net/netfilter/nf_queue: time stamp 2024-09-06 07:05:31 is 19300507.249886571 s in the future
1544 07:21:37.113194 tar: ./net/netfilter/conntrack_ipip_mtu.sh: time stamp 2024-08-21 05:07:56 is 17911052.114581029 s in the future
1545 07:21:37.244596 tar: ./net/netfilter/nft_nat.sh: time stamp 2024-08-21 05:07:56 is 17911051.982803363 s in the future
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1552 07:21:38.105988 tar: ./net/netfilter/conntrack_tcp_unreplied.sh: time stamp 2024-08-21 05:07:56 is 17911051.121909279 s in the future
1553 07:21:38.262745 tar: ./net/netfilter/sctp_collision: time stamp 2024-09-06 07:05:31 is 19300505.965193613 s in the future
1554 07:21:38.386742 tar: ./net/netfilter/nft_meta.sh: time stamp 2024-08-21 05:07:56 is 17911050.840850196 s in the future
1555 07:21:38.519875 tar: ./net/netfilter/ipvs.sh: time stamp 2024-08-21 05:07:56 is 17911050.706557987 s in the future
1556 07:21:38.638331 tar: ./net/netfilter/lib.sh: time stamp 2024-08-21 05:07:56 is 17911050.588159446 s in the future
1557 07:21:38.780703 tar: ./net/netfilter/packetdrill/conntrack_synack_old.pkt: time stamp 2024-08-21 05:07:56 is 17911050.448043112 s in the future
1558 07:21:38.906677 tar: ./net/netfilter/packetdrill/common.sh: time stamp 2024-08-21 05:07:56 is 17911050.321226321 s in the future
1559 07:21:39.017479 tar: ./net/netfilter/packetdrill/conntrack_rst_invalid.pkt: time stamp 2024-08-21 05:07:56 is 17911050.212528362 s in the future
1560 07:21:39.143033 tar: ./net/netfilter/packetdrill/conntrack_synack_reuse.pkt: time stamp 2024-08-21 05:07:56 is 17911050.087545737 s in the future
1561 07:21:39.257974 tar: ./net/netfilter/packetdrill/conntrack_inexact_rst.pkt: time stamp 2024-08-21 05:07:56 is 17911049.972426487 s in the future
1562 07:21:39.373858 tar: ./net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt: time stamp 2024-08-21 05:07:56 is 17911049.855778571 s in the future
1563 07:21:39.492888 tar: ./net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt: time stamp 2024-08-21 05:07:56 is 17911049.737227821 s in the future
1564 07:21:39.539863 tar: ./net/netfilter/packetdrill: time stamp 2024-08-21 05:07:56 is 17911049.687167071 s in the future
1565 07:21:39.665982 tar: ./net/netfilter/nf_conntrack_packetdrill.sh: time stamp 2024-08-21 05:07:56 is 17911049.562051904 s in the future
1566 07:21:39.780730 tar: ./net/netfilter/nft_conntrack_helper.sh: time stamp 2024-08-21 05:07:56 is 17911049.447728071 s in the future
1567 07:21:39.905676 tar: ./net/netfilter/br_netfilter.sh: time stamp 2024-08-21 05:07:56 is 17911049.322746321 s in the future
1568 07:21:40.031824 tar: ./net/netfilter/nft_concat_range.sh: time stamp 2024-08-21 05:07:56 is 17911049.195118362 s in the future
1569 07:21:40.157755 tar: ./net/netfilter/xt_string.sh: time stamp 2024-08-21 05:07:56 is 17911049.069821529 s in the future
1570 07:21:40.212886 tar: ./net/netfilter: time stamp 2024-09-06 07:06:13 is 19300546.013199946 s in the future
1571 07:21:40.380093 tar: ./net/hsr/config: time stamp 2024-08-21 05:07:56 is 17911048.845742821 s in the future
1572 07:21:40.490184 tar: ./net/hsr/hsr_redbox.sh: time stamp 2024-08-21 05:07:56 is 17911048.736190696 s in the future
1573 07:21:40.598290 tar: ./net/hsr/hsr_ping.sh: time stamp 2024-08-21 05:07:56 is 17911048.627919987 s in the future
1574 07:21:40.740091 tar: ./net/hsr/hsr_common.sh: time stamp 2024-08-21 05:07:56 is 17911048.487093862 s in the future
1575 07:21:40.798717 tar: ./net/hsr: time stamp 2024-09-06 07:06:12 is 19300544.427495529 s in the future
1576 07:21:40.998637 tar: ./net/tcp_ao/connect_ipv6: time stamp 2024-09-06 07:05:27 is 19300499.228607029 s in the future
1577 07:21:41.108895 tar: ./net/tcp_ao/settings: time stamp 2024-08-21 05:07:56 is 17911048.118882362 s in the future
1578 07:21:41.224287 tar: ./net/tcp_ao/config: time stamp 2024-08-21 05:07:56 is 17911048.001962987 s in the future
1579 07:21:41.431711 tar: ./net/tcp_ao/unsigned-md5_ipv4: time stamp 2024-09-06 07:05:27 is 19300498.796552237 s in the future
1580 07:21:41.598908 tar: ./net/tcp_ao/unsigned-md5_ipv6: time stamp 2024-09-06 07:05:31 is 19300502.628120654 s in the future
1581 07:21:41.792539 tar: ./net/tcp_ao/key-management_ipv6: time stamp 2024-09-06 07:05:29 is 19300500.435193112 s in the future
1582 07:21:41.975501 tar: ./net/tcp_ao/connect-deny_ipv6: time stamp 2024-09-06 07:05:28 is 19300499.251853195 s in the future
1583 07:21:42.173389 tar: ./net/tcp_ao/icmps-accept_ipv6: time stamp 2024-09-06 07:05:28 is 19300499.054412737 s in the future
1584 07:21:42.375517 tar: ./net/tcp_ao/icmps-discard_ipv6: time stamp 2024-09-06 07:05:28 is 19300498.852509362 s in the future
1585 07:21:42.542783 tar: ./net/tcp_ao/icmps-accept_ipv4: time stamp 2024-09-06 07:05:24 is 19300494.684223029 s in the future
1586 07:21:42.764705 tar: ./net/tcp_ao/rst_ipv6: time stamp 2024-09-06 07:05:29 is 19300499.461684279 s in the future
1587 07:21:42.956241 tar: ./net/tcp_ao/restore_ipv4: time stamp 2024-09-06 07:05:25 is 19300495.270578695 s in the future
1588 07:21:43.140579 tar: ./net/tcp_ao/bench-lookups_ipv4: time stamp 2024-09-06 07:05:24 is 19300494.087035779 s in the future
1589 07:21:43.323922 tar: ./net/tcp_ao/self-connect_ipv4: time stamp 2024-09-06 07:05:26 is 19300495.903509612 s in the future
1590 07:21:43.514339 tar: ./net/tcp_ao/connect_ipv4: time stamp 2024-09-06 07:05:24 is 19300493.713183154 s in the future
1591 07:21:43.705968 tar: ./net/tcp_ao/self-connect_ipv6: time stamp 2024-09-06 07:05:30 is 19300499.52132857 s in the future
1592 07:21:43.891174 tar: ./net/tcp_ao/icmps-discard_ipv4: time stamp 2024-09-06 07:05:24 is 19300493.335549945 s in the future
1593 07:21:44.076034 tar: ./net/tcp_ao/restore_ipv6: time stamp 2024-09-06 07:05:29 is 19300498.150161903 s in the future
1594 07:21:44.286773 tar: ./net/tcp_ao/setsockopt-closed_ipv4: time stamp 2024-09-06 07:05:27 is 19300495.94172032 s in the future
1595 07:21:44.458127 tar: ./net/tcp_ao/bench-lookups_ipv6: time stamp 2024-09-06 07:05:27 is 19300495.769152153 s in the future
1596 07:21:44.666499 tar: ./net/tcp_ao/seq-ext_ipv6: time stamp 2024-09-06 07:05:30 is 19300498.56080982 s in the future
1597 07:21:44.883137 tar: ./net/tcp_ao/seq-ext_ipv4: time stamp 2024-09-06 07:05:26 is 19300494.344035487 s in the future
1598 07:21:45.065452 tar: ./net/tcp_ao/key-management_ipv4: time stamp 2024-09-06 07:05:25 is 19300493.16183482 s in the future
1599 07:21:45.259449 tar: ./net/tcp_ao/setsockopt-closed_ipv6: time stamp 2024-09-06 07:05:30 is 19300497.968796362 s in the future
1600 07:21:45.466636 tar: ./net/tcp_ao/rst_ipv4: time stamp 2024-09-06 07:05:26 is 19300493.760326445 s in the future
1601 07:21:45.642312 tar: ./net/tcp_ao/connect-deny_ipv4: time stamp 2024-09-06 07:05:24 is 19300491.58524157 s in the future
1602 07:21:45.701682 tar: ./net/tcp_ao: time stamp 2024-09-06 07:06:12 is 19300539.523945528 s in the future
1603 07:21:45.849841 tar: ./net/af_unix/config: time stamp 2024-08-21 05:07:56 is 17911043.375992153 s in the future
1604 07:21:45.992751 tar: ./net/af_unix/unix_connect: time stamp 2024-09-06 07:05:20 is 19300487.235128487 s in the future
1605 07:21:46.119976 tar: ./net/af_unix/scm_pidfd: time stamp 2024-09-06 07:05:20 is 19300487.106850487 s in the future
1606 07:21:46.294669 tar: ./net/af_unix/msg_oob: time stamp 2024-09-06 07:05:20 is 19300486.931477487 s in the future
1607 07:21:46.459308 tar: ./net/af_unix/diag_uid: time stamp 2024-09-06 07:05:20 is 19300486.767045778 s in the future
1608 07:21:46.600028 tar: ./net/af_unix/scm_rights: time stamp 2024-09-06 07:05:20 is 19300486.626126237 s in the future
1609 07:21:46.653039 tar: ./net/af_unix: time stamp 2024-09-06 07:06:11 is 19300537.573032778 s in the future
1610 07:21:46.793663 tar: ./net/lib.sh: time stamp 2024-08-21 05:07:56 is 17911042.43126557 s in the future
1611 07:21:46.963082 tar: ./net/forwarding/devlink_lib.sh: time stamp 2024-08-21 05:07:56 is 17911042.264312445 s in the future
1612 07:21:47.101029 tar: ./net/forwarding/mirror_gre.sh: time stamp 2024-08-21 05:07:56 is 17911042.125795695 s in the future
1613 07:21:47.219735 tar: ./net/forwarding/mirror_gre_bridge_1d.sh: time stamp 2024-08-21 05:07:56 is 17911042.008018111 s in the future
1614 07:21:47.338543 tar: ./net/forwarding/tc_mpls_l2vpn.sh: time stamp 2024-08-21 05:07:56 is 17911041.889004695 s in the future
1615 07:21:47.466644 tar: ./net/forwarding/settings: time stamp 2024-08-21 05:07:56 is 17911041.760976236 s in the future
1616 07:21:47.605411 tar: ./net/forwarding/lib_sh_test.sh: time stamp 2024-08-21 05:07:56 is 17911041.622116445 s in the future
1617 07:21:47.736836 tar: ./net/forwarding/ipip_flat_gre_key.sh: time stamp 2024-08-21 05:07:56 is 17911041.491949111 s in the future
1618 07:21:47.852518 tar: ./net/forwarding/gre_multipath.sh: time stamp 2024-08-21 05:07:56 is 17911041.375126361 s in the future
1619 07:21:47.991140 tar: ./net/forwarding/tc_common.sh: time stamp 2024-08-21 05:07:56 is 17911041.235713236 s in the future
1620 07:21:48.123774 tar: ./net/forwarding/router_multicast.sh: time stamp 2024-08-21 05:07:56 is 17911041.104899111 s in the future
1621 07:21:48.253090 tar: ./net/forwarding/sch_ets_tests.sh: time stamp 2024-08-21 05:07:56 is 17911040.974686778 s in the future
1622 07:21:48.381407 tar: ./net/forwarding/vxlan_bridge_1q.sh: time stamp 2024-08-21 05:07:56 is 17911040.846274736 s in the future
1623 07:21:48.497886 tar: ./net/forwarding/gre_inner_v6_multipath.sh: time stamp 2024-08-21 05:07:56 is 17911040.729545778 s in the future
1624 07:21:48.631386 tar: ./net/forwarding/min_max_mtu.sh: time stamp 2024-08-21 05:07:56 is 17911040.596102736 s in the future
1625 07:21:48.753216 tar: ./net/forwarding/config: time stamp 2024-08-21 05:07:56 is 17911040.473453861 s in the future
1626 07:21:48.882601 tar: ./net/forwarding/vxlan_bridge_1d_port_8472.sh: time stamp 2024-08-21 05:07:56 is 17911040.34585732 s in the future
1627 07:21:49.024894 tar: ./net/forwarding/mirror_gre_bridge_1d_vlan.sh: time stamp 2024-08-21 05:07:56 is 17911040.204137653 s in the future
1628 07:21:49.158639 tar: ./net/forwarding/vxlan_bridge_1q_port_8472_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911040.070536153 s in the future
1629 07:21:49.286680 tar: ./net/forwarding/tc_chains.sh: time stamp 2024-08-21 05:07:56 is 17911039.940445736 s in the future
1630 07:21:49.411972 tar: ./net/forwarding/gre_multipath_nh_res.sh: time stamp 2024-08-21 05:07:56 is 17911039.815363445 s in the future
1631 07:21:49.535139 tar: ./net/forwarding/bridge_mdb_port_down.sh: time stamp 2024-08-21 05:07:56 is 17911039.692945611 s in the future
1632 07:21:49.656877 tar: ./net/forwarding/ip6gre_hier_keys.sh: time stamp 2024-08-21 05:07:56 is 17911039.570053111 s in the future
1633 07:21:49.791591 tar: ./net/forwarding/tc_flower_l2_miss.sh: time stamp 2024-08-21 05:07:56 is 17911039.439963361 s in the future
1634 07:21:49.925139 tar: ./net/forwarding/mirror_gre_bound.sh: time stamp 2024-08-21 05:07:56 is 17911039.303088653 s in the future
1635 07:21:50.059726 tar: ./net/forwarding/sch_ets.sh: time stamp 2024-08-21 05:07:56 is 17911039.167650819 s in the future
1636 07:21:50.192070 tar: ./net/forwarding/vxlan_bridge_1q_port_8472.sh: time stamp 2024-08-21 05:07:56 is 17911039.036191111 s in the future
1637 07:21:50.313139 tar: ./net/forwarding/ip6gre_flat.sh: time stamp 2024-08-21 05:07:56 is 17911038.913767194 s in the future
1638 07:21:50.434258 tar: ./net/forwarding/router_bridge_vlan_upper_pvid.sh: time stamp 2024-08-21 05:07:56 is 17911038.794251403 s in the future
1639 07:21:50.594554 tar: ./net/forwarding/router_bridge_vlan.sh: time stamp 2024-08-21 05:07:56 is 17911038.633955278 s in the future
1640 07:21:50.719728 tar: ./net/forwarding/bridge_port_isolation.sh: time stamp 2024-08-21 05:07:56 is 17911038.508823861 s in the future
1641 07:21:50.854589 tar: ./net/forwarding/pedit_dsfield.sh: time stamp 2024-08-21 05:07:56 is 17911038.372193736 s in the future
1642 07:21:50.979565 tar: ./net/forwarding/ip6gre_hier.sh: time stamp 2024-08-21 05:07:56 is 17911038.247289194 s in the future
1643 07:21:51.109779 tar: ./net/forwarding/mirror_vlan.sh: time stamp 2024-08-21 05:07:56 is 17911038.116979986 s in the future
1644 07:21:51.252874 tar: ./net/forwarding/router_mpath_nh_lib.sh: time stamp 2024-08-21 05:07:56 is 17911037.975179611 s in the future
1645 07:21:51.388336 tar: ./net/forwarding/router.sh: time stamp 2024-08-21 05:07:56 is 17911037.838615444 s in the future
1646 07:21:51.513457 tar: ./net/forwarding/dual_vxlan_bridge.sh: time stamp 2024-08-21 05:07:56 is 17911037.713465653 s in the future
1647 07:21:51.643723 tar: ./net/forwarding/bridge_vlan_aware.sh: time stamp 2024-08-27 12:10:49 is 18454810.583314986 s in the future
1648 07:21:51.785726 tar: ./net/forwarding/bridge_vlan_mcast.sh: time stamp 2024-08-21 05:07:56 is 17911037.441660111 s in the future
1649 07:21:51.922461 tar: ./net/forwarding/vxlan_symmetric_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911037.304752861 s in the future
1650 07:21:52.043627 tar: ./net/forwarding/ip6_forward_instats_vrf.sh: time stamp 2024-08-21 05:07:56 is 17911037.184115653 s in the future
1651 07:21:52.169890 tar: ./net/forwarding/ip6gre_inner_v6_multipath.sh: time stamp 2024-08-21 05:07:56 is 17911037.057881319 s in the future
1652 07:21:52.298376 tar: ./net/forwarding/tc_flower_port_range.sh: time stamp 2024-08-21 05:07:56 is 17911036.929390694 s in the future
1653 07:21:52.432984 tar: ./net/forwarding/ip6gre_custom_multipath_hash.sh: time stamp 2024-08-21 05:07:56 is 17911036.795065236 s in the future
1654 07:21:52.552828 tar: ./net/forwarding/gre_custom_multipath_hash.sh: time stamp 2024-08-21 05:07:56 is 17911036.675123111 s in the future
1655 07:21:52.678059 tar: ./net/forwarding/mirror_topo_lib.sh: time stamp 2024-08-21 05:07:56 is 17911036.549377777 s in the future
1656 07:21:52.803183 tar: ./net/forwarding/sch_tbf_core.sh: time stamp 2024-08-21 05:07:56 is 17911036.424161694 s in the future
1657 07:21:52.948117 tar: ./net/forwarding/router_vid_1.sh: time stamp 2024-08-21 05:07:56 is 17911036.278943819 s in the future
1658 07:21:53.064766 tar: ./net/forwarding/gre_multipath_nh.sh: time stamp 2024-08-21 05:07:56 is 17911036.162056486 s in the future
1659 07:21:53.186605 tar: ./net/forwarding/custom_multipath_hash.sh: time stamp 2024-08-21 05:07:56 is 17911036.040599819 s in the future
1660 07:21:53.331624 tar: ./net/forwarding/vxlan_symmetric.sh: time stamp 2024-08-21 05:07:56 is 17911035.894831902 s in the future
1661 07:21:53.466054 tar: ./net/forwarding/tc_flower.sh: time stamp 2024-08-21 05:07:56 is 17911035.760835819 s in the future
1662 07:21:53.586975 tar: ./net/forwarding/bridge_vlan_unaware.sh: time stamp 2024-08-21 05:07:56 is 17911035.640844319 s in the future
1663 07:21:53.728023 tar: ./net/forwarding/bridge_locked_port.sh: time stamp 2024-08-21 05:07:56 is 17911035.498784611 s in the future
1664 07:21:53.862601 tar: ./net/forwarding/pedit_l4port.sh: time stamp 2024-08-21 05:07:56 is 17911035.365123111 s in the future
1665 07:21:53.983294 tar: ./net/forwarding/router_nh.sh: time stamp 2024-08-21 05:07:56 is 17911035.243859861 s in the future
1666 07:21:54.104124 tar: ./net/forwarding/router_broadcast.sh: time stamp 2024-08-21 05:07:56 is 17911035.123781277 s in the future
1667 07:21:54.229268 tar: ./net/forwarding/router_mpath_nh.sh: time stamp 2024-08-21 05:07:56 is 17911034.998275444 s in the future
1668 07:21:54.358818 tar: ./net/forwarding/ip6gre_inner_v4_multipath.sh: time stamp 2024-08-21 05:07:56 is 17911034.868979611 s in the future
1669 07:21:54.475488 tar: ./net/forwarding/mirror_gre_flower.sh: time stamp 2024-08-21 05:07:56 is 17911034.751707194 s in the future
1670 07:21:54.595162 tar: ./net/forwarding/sch_tbf_root.sh: time stamp 2024-08-21 05:07:56 is 17911034.631459361 s in the future
1671 07:21:54.721462 tar: ./net/forwarding/router_bridge_lag.sh: time stamp 2024-08-21 05:07:56 is 17911034.506289652 s in the future
1672 07:21:54.855298 tar: ./net/forwarding/vxlan_bridge_1d_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911034.372791902 s in the future
1673 07:21:54.976374 tar: ./net/forwarding/router_bridge_1d.sh: time stamp 2024-08-21 05:07:56 is 17911034.251233611 s in the future
1674 07:21:55.101448 tar: ./net/forwarding/bridge_mdb_max.sh: time stamp 2024-08-21 05:07:56 is 17911034.126586819 s in the future
1675 07:21:55.255142 tar: ./net/forwarding/vxlan_asymmetric_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911033.972366735 s in the future
1676 07:21:55.379036 tar: ./net/forwarding/sch_tbf_ets.sh: time stamp 2024-08-21 05:07:56 is 17911033.847587027 s in the future
1677 07:21:55.509475 tar: ./net/forwarding/tc_police.sh: time stamp 2024-08-21 05:07:56 is 17911033.717894902 s in the future
1678 07:21:55.650469 tar: ./net/forwarding/router_mpath_nh_res.sh: time stamp 2024-08-21 05:07:56 is 17911033.576130152 s in the future
1679 07:21:55.780998 tar: ./net/forwarding/mirror_gre_bridge_1q.sh: time stamp 2024-08-21 05:07:56 is 17911033.447071819 s in the future
1680 07:21:55.912444 tar: ./net/forwarding/q_in_vni.sh: time stamp 2024-08-21 05:07:56 is 17911033.313686027 s in the future
1681 07:21:56.042640 tar: ./net/forwarding/router_bridge.sh: time stamp 2024-08-21 05:07:56 is 17911033.18411711 s in the future
1682 07:21:56.161627 tar: ./net/forwarding/vxlan_bridge_1d_port_8472_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911033.067427485 s in the future
1683 07:21:56.297120 tar: ./net/forwarding/sch_tbf_prio.sh: time stamp 2024-08-21 05:07:56 is 17911032.929862777 s in the future
1684 07:21:56.423441 tar: ./net/forwarding/ipip_flat_gre_keys.sh: time stamp 2024-08-21 05:07:56 is 17911032.804755735 s in the future
1685 07:21:56.543322 tar: ./net/forwarding/tc_flower_router.sh: time stamp 2024-08-21 05:07:56 is 17911032.683670652 s in the future
1686 07:21:56.692775 tar: ./net/forwarding/q_in_vni_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911032.533485027 s in the future
1687 07:21:56.823265 tar: ./net/forwarding/router_multipath.sh: time stamp 2024-08-21 05:07:56 is 17911032.404262277 s in the future
1688 07:21:56.955447 tar: ./net/forwarding/tc_flower_cfm.sh: time stamp 2024-08-21 05:07:56 is 17911032.270786194 s in the future
1689 07:21:57.077528 tar: ./net/forwarding/ip6gre_lib.sh: time stamp 2024-08-21 05:07:56 is 17911032.149668985 s in the future
1690 07:21:57.202699 tar: ./net/forwarding/router_bridge_1d_lag.sh: time stamp 2024-08-21 05:07:56 is 17911032.024648652 s in the future
1691 07:21:57.340443 tar: ./net/forwarding/ip6gre_flat_key.sh: time stamp 2024-08-21 05:07:56 is 17911031.887151402 s in the future
1692 07:21:57.489890 tar: ./net/forwarding/ip6gre_hier_key.sh: time stamp 2024-08-21 05:07:56 is 17911031.736932027 s in the future
1693 07:21:57.628842 tar: ./net/forwarding/router_bridge_vlan_upper.sh: time stamp 2024-08-21 05:07:56 is 17911031.599076985 s in the future
1694 07:21:57.768765 tar: ./net/forwarding/ipip_flat_gre.sh: time stamp 2024-08-21 05:07:56 is 17911031.45752436 s in the future
1695 07:21:57.907650 tar: ./net/forwarding/mirror_gre_bridge_1q_lag.sh: time stamp 2024-08-21 05:07:56 is 17911031.319908777 s in the future
1696 07:21:58.057103 tar: ./net/forwarding/ipip_lib.sh: time stamp 2024-08-21 05:07:56 is 17911031.169657235 s in the future
1697 07:21:58.179203 tar: ./net/forwarding/ipip_hier_gre_key.sh: time stamp 2024-08-21 05:07:56 is 17911031.048627735 s in the future
1698 07:21:58.294644 tar: ./net/forwarding/mirror_gre_lag_lacp.sh: time stamp 2024-08-21 05:07:56 is 17911030.932061485 s in the future
1699 07:21:58.425060 tar: ./net/forwarding/local_termination.sh: time stamp 2024-08-30 00:49:46 is 18673140.802508443 s in the future
1700 07:21:58.581559 tar: ./net/forwarding/lib.sh: time stamp 2024-08-27 12:10:49 is 18454803.64415286 s in the future
1701 07:21:58.703527 tar: ./net/forwarding/mirror_gre_neigh.sh: time stamp 2024-08-21 05:07:56 is 17911030.523193735 s in the future
1702 07:21:58.845543 tar: ./net/forwarding/tc_tunnel_key.sh: time stamp 2024-08-21 05:07:56 is 17911030.381648193 s in the future
1703 07:21:59.008633 tar: ./net/forwarding/gre_inner_v4_multipath.sh: time stamp 2024-08-21 05:07:56 is 17911030.218566985 s in the future
1704 07:21:59.143275 tar: ./net/forwarding/mirror_gre_topo_lib.sh: time stamp 2024-08-21 05:07:56 is 17911030.085095652 s in the future
1705 07:21:59.287418 tar: ./net/forwarding/tc_actions.sh: time stamp 2024-08-21 05:07:56 is 17911029.939427693 s in the future
1706 07:21:59.404003 tar: ./net/forwarding/mirror_gre_nh.sh: time stamp 2024-08-21 05:07:56 is 17911029.822855777 s in the future
1707 07:21:59.534405 tar: ./net/forwarding/vxlan_bridge_1q_ipv6.sh: time stamp 2024-08-21 05:07:56 is 17911029.693009902 s in the future
1708 07:21:59.658522 tar: ./net/forwarding/bridge_sticky_fdb.sh: time stamp 2024-08-21 05:07:56 is 17911029.56793361 s in the future
1709 07:21:59.813190 tar: ./net/forwarding/bridge_mdb.sh: time stamp 2024-08-21 05:07:56 is 17911029.413606652 s in the future
1710 07:21:59.955218 tar: ./net/forwarding/mirror_lib.sh: time stamp 2024-08-21 05:07:56 is 17911029.272216485 s in the future
1711 07:22:00.091739 tar: ./net/forwarding/bridge_mld.sh: time stamp 2024-08-21 05:07:56 is 17911029.134214277 s in the future
1712 07:22:00.226395 tar: ./net/forwarding/sch_ets_core.sh: time stamp 2024-08-21 05:07:56 is 17911029.000809193 s in the future
1713 07:22:00.364150 tar: ./net/forwarding/mirror_gre_changes.sh: time stamp 2024-08-21 05:07:56 is 17911028.86337411 s in the future
1714 07:22:00.488041 tar: ./net/forwarding/mirror_gre_lib.sh: time stamp 2024-08-21 05:07:56 is 17911028.738568527 s in the future
1715 07:22:00.617377 tar: ./net/forwarding/tc_shblocks.sh: time stamp 2024-08-21 05:07:56 is 17911028.608731027 s in the future
1716 07:22:00.768019 tar: ./net/forwarding/router_bridge_pvid_vlan_upper.sh: time stamp 2024-08-21 05:07:56 is 17911028.460318818 s in the future
1717 07:22:00.905985 tar: ./net/forwarding/fib_offload_lib.sh: time stamp 2024-08-21 05:07:56 is 17911028.321486901 s in the future
1718 07:22:01.031013 tar: ./net/forwarding/forwarding.config.sample: time stamp 2024-08-21 05:07:56 is 17911028.196411026 s in the future
1719 07:22:01.160184 tar: ./net/forwarding/no_forwarding.sh: time stamp 2024-08-30 00:49:46 is 18673138.066700985 s in the future
1720 07:22:01.302451 tar: ./net/forwarding/bridge_igmp.sh: time stamp 2024-08-21 05:07:56 is 17911027.924666651 s in the future
1721 07:22:01.446465 tar: ./net/forwarding/sch_tbf_etsprio.sh: time stamp 2024-08-21 05:07:56 is 17911027.779473526 s in the future
1722 07:22:01.581064 tar: ./net/forwarding/skbedit_priority.sh: time stamp 2024-08-21 05:07:56 is 17911027.645962443 s in the future
1723 07:22:01.729515 tar: ./net/forwarding/mirror_gre_vlan_bridge_1q.sh: time stamp 2024-08-21 05:07:56 is 17911027.499275276 s in the future
1724 07:22:01.870483 tar: ./net/forwarding/router_mpath_seed.sh: time stamp 2024-08-21 05:07:56 is 17911027.35744311 s in the future
1725 07:22:02.015461 tar: ./net/forwarding/ipip_hier_gre_keys.sh: time stamp 2024-08-21 05:07:56 is 17911027.212011693 s in the future
1726 07:22:02.157496 tar: ./net/forwarding/vxlan_bridge_1d.sh: time stamp 2024-08-21 05:07:56 is 17911027.07012361 s in the future
1727 07:22:02.295315 tar: ./net/forwarding/bridge_mdb_host.sh: time stamp 2024-08-21 05:07:56 is 17911026.932109568 s in the future
1728 07:22:02.427651 tar: ./net/forwarding/ip6gre_flat_keys.sh: time stamp 2024-08-21 05:07:56 is 17911026.798677193 s in the future
1729 07:22:02.547519 tar: ./net/forwarding/pedit_ip.sh: time stamp 2024-08-21 05:07:56 is 17911026.678420568 s in the future
1730 07:22:02.673505 tar: ./net/forwarding/vxlan_asymmetric.sh: time stamp 2024-08-21 05:07:56 is 17911026.55312311 s in the future
1731 07:22:02.812407 tar: ./net/forwarding/tc_vlan_modify.sh: time stamp 2024-08-21 05:07:56 is 17911026.415068526 s in the future
1732 07:22:02.946190 tar: ./net/forwarding/bridge_fdb_learning_limit.sh: time stamp 2024-08-21 05:07:56 is 17911026.281467651 s in the future
1733 07:22:03.074452 tar: ./net/forwarding/mirror_gre_vlan.sh: time stamp 2024-08-21 05:07:56 is 17911026.152732318 s in the future
1734 07:22:03.206951 tar: ./net/forwarding/sch_red.sh: time stamp 2024-08-21 05:07:56 is 17911026.019232026 s in the future
1735 07:22:03.354057 tar: ./net/forwarding/ipip_hier_gre.sh: time stamp 2024-08-21 05:07:56 is 17911025.87278536 s in the future
1736 07:22:03.416547 tar: ./net/forwarding: time stamp 2024-09-06 07:06:12 is 19300521.808837526 s in the future
1737 07:22:03.565599 tar: ./net/mptcp/settings: time stamp 2024-08-21 05:07:56 is 17911025.659428859 s in the future
1738 07:22:03.695715 tar: ./net/mptcp/config: time stamp 2024-08-21 05:07:56 is 17911025.529370568 s in the future
1739 07:22:03.836456 tar: ./net/mptcp/mptcp_connect.sh: time stamp 2024-08-21 05:07:56 is 17911025.388853443 s in the future
1740 07:22:03.967946 tar: ./net/mptcp/pm_netlink.sh: time stamp 2024-08-21 05:07:56 is 17911025.258511068 s in the future
1741 07:22:04.134063 tar: ./net/mptcp/mptcp_join.sh: time stamp 2024-08-30 00:49:46 is 18673135.091854901 s in the future
1742 07:22:04.267450 tar: ./net/mptcp/mptcp_sockopt.sh: time stamp 2024-08-21 05:07:56 is 17911024.959079734 s in the future
1743 07:22:04.433385 tar: ./net/mptcp/pm_nl_ctl: time stamp 2024-09-06 07:05:21 is 19300469.792001568 s in the future
1744 07:22:04.567793 tar: ./net/mptcp/simult_flows.sh: time stamp 2024-08-21 05:07:56 is 17911024.658197109 s in the future
1745 07:22:04.701254 tar: ./net/mptcp/diag.sh: time stamp 2024-08-21 05:07:56 is 17911024.524707193 s in the future
1746 07:22:04.850751 tar: ./net/mptcp/mptcp_connect: time stamp 2024-09-06 07:05:21 is 19300469.375175359 s in the future
1747 07:22:04.991884 tar: ./net/mptcp/mptcp_inq: time stamp 2024-09-06 07:05:22 is 19300470.233385776 s in the future
1748 07:22:05.125692 tar: ./net/mptcp/userspace_pm.sh: time stamp 2024-08-21 05:07:56 is 17911024.099671818 s in the future
1749 07:22:05.260344 tar: ./net/mptcp/mptcp_lib.sh: time stamp 2024-08-30 00:49:46 is 18673133.966161193 s in the future
1750 07:22:05.384348 tar: ./net/mptcp/mptcp_sockopt: time stamp 2024-09-06 07:05:22 is 19300469.841349776 s in the future
1751 07:22:05.440588 tar: ./net/mptcp: time stamp 2024-09-06 07:06:12 is 19300519.784127776 s in the future
1752 07:22:05.505358 tar: ./net: time stamp 2024-09-06 05:46:42 is 19295749.719570359 s in the future
1753 07:22:05.652428 tar: ./mm/split_huge_page_test: time stamp 2024-09-06 07:06:02 is 19300509.574114568 s in the future
1754 07:22:05.794331 tar: ./mm/hugetlb_madv_vs_map: time stamp 2024-09-06 07:06:03 is 19300510.432118734 s in the future
1755 07:22:05.967716 tar: ./mm/settings: time stamp 2024-08-21 05:07:56 is 17911023.257451734 s in the future
1756 07:22:06.150544 tar: ./mm/hmm-tests: time stamp 2024-09-06 07:05:55 is 19300502.074244068 s in the future
1757 07:22:06.334540 tar: ./mm/hugepage-mmap: time stamp 2024-09-06 07:05:56 is 19300502.890658359 s in the future
1758 07:22:06.467760 tar: ./mm/config: time stamp 2024-08-21 05:07:56 is 17911022.757163692 s in the future
1759 07:22:06.600944 tar: ./mm/hugetlb_dio: time stamp 2024-09-06 07:06:04 is 19300510.623655984 s in the future
1760 07:22:06.759771 tar: ./mm/mlock-random-test: time stamp 2024-09-06 07:05:59 is 19300505.465336651 s in the future
1761 07:22:06.916522 tar: ./mm/hugepage-vmemmap: time stamp 2024-09-06 07:05:57 is 19300503.309990692 s in the future
1762 07:22:07.036521 tar: ./mm/map_fixed_noreplace: time stamp 2024-09-06 07:05:57 is 19300503.190153317 s in the future
1763 07:22:07.168638 tar: ./mm/on-fault-limit: time stamp 2024-09-06 07:06:00 is 19300506.056645151 s in the future
1764 07:22:07.293483 tar: ./mm/madv_populate: time stamp 2024-09-06 07:05:57 is 19300502.931393026 s in the future
1765 07:22:07.443894 tar: ./mm/gup_longterm: time stamp 2024-09-06 07:05:54 is 19300499.781497317 s in the future
1766 07:22:07.577170 tar: ./mm/khugepaged: time stamp 2024-09-06 07:05:57 is 19300502.648106276 s in the future
1767 07:22:07.718943 tar: ./mm/mdwe_test: time stamp 2024-09-06 07:06:03 is 19300508.506368901 s in the future
1768 07:22:07.833399 tar: ./mm/test_hmm.sh: time stamp 2024-08-21 05:07:56 is 17911021.392398734 s in the future
1769 07:22:07.974302 tar: ./mm/soft-dirty: time stamp 2024-09-06 07:06:04 is 19300509.250762109 s in the future
1770 07:22:08.095140 tar: ./mm/write_hugetlb_memory.sh: time stamp 2024-08-21 05:07:56 is 17911021.130889609 s in the future
1771 07:22:08.225282 tar: ./mm/cow: time stamp 2024-09-06 07:05:54 is 19300498.998986151 s in the future
1772 07:22:08.354536 tar: ./mm/charge_reserved_hugetlb.sh: time stamp 2024-08-21 05:07:56 is 17911020.871982734 s in the future
1773 07:22:08.485527 tar: ./mm/mlock2-tests: time stamp 2024-09-06 07:05:59 is 19300503.738664317 s in the future
1774 07:22:08.611282 tar: ./mm/mremap_dontunmap: time stamp 2024-09-06 07:05:59 is 19300503.613864776 s in the future
1775 07:22:08.744630 tar: ./mm/mremap_test: time stamp 2024-09-06 07:05:59 is 19300503.480214359 s in the future
1776 07:22:08.877733 tar: ./mm/mseal_test: time stamp 2024-09-06 07:06:00 is 19300504.346863609 s in the future
1777 07:22:09.002530 tar: ./mm/gup_test: time stamp 2024-09-06 07:05:54 is 19300498.221441192 s in the future
1778 07:22:09.136884 tar: ./mm/hugetlb-madvise: time stamp 2024-09-06 07:05:55 is 19300499.088389942 s in the future
1779 07:22:09.277521 tar: ./mm/hugepage-mremap: time stamp 2024-09-06 07:05:56 is 19300499.947639525 s in the future
1780 07:22:09.420370 tar: ./mm/map_populate: time stamp 2024-09-06 07:05:58 is 19300501.8045049 s in the future
1781 07:22:09.563275 tar: ./mm/transhuge-stress: time stamp 2024-09-06 07:06:01 is 19300504.662720234 s in the future
1782 07:22:09.678783 tar: ./mm/test_vmalloc.sh: time stamp 2024-08-21 05:07:56 is 17911019.546450109 s in the future
1783 07:22:09.797625 tar: ./mm/hugetlb_reparenting_test.sh: time stamp 2024-08-21 05:07:56 is 17911019.429654192 s in the future
1784 07:22:09.922531 tar: ./mm/hugetlb-soft-offline: time stamp 2024-09-06 07:05:56 is 19300499.303927567 s in the future
1785 07:22:10.070640 tar: ./mm/droppable: time stamp 2024-09-06 07:06:04 is 19300507.153843109 s in the future
1786 07:22:10.212238 tar: ./mm/va_high_addr_switch.sh: time stamp 2024-08-21 05:07:56 is 17911019.012934317 s in the future
1787 07:22:10.403618 tar: ./mm/hugepage-shm: time stamp 2024-09-06 07:05:56 is 19300498.821107275 s in the future
1788 07:22:10.655235 tar: ./mm/pagemap_ioctl: time stamp 2024-09-06 07:06:01 is 19300503.570111567 s in the future
1789 07:22:10.828335 tar: ./mm/mkdirty: time stamp 2024-09-06 07:05:58 is 19300500.395171734 s in the future
1790 07:22:11.004225 tar: ./mm/thuge-gen: time stamp 2024-09-06 07:06:01 is 19300503.220871525 s in the future
1791 07:22:11.155289 tar: ./mm/hugetlb_fault_after_madv: time stamp 2024-09-06 07:06:03 is 19300505.070876984 s in the future
1792 07:22:11.355241 tar: ./mm/compaction_test: time stamp 2024-09-06 07:05:54 is 19300495.869588609 s in the future
1793 07:22:11.521332 tar: ./mm/migration: time stamp 2024-09-06 07:05:58 is 19300499.703064192 s in the future
1794 07:22:11.654766 tar: ./mm/run_vmtests.sh: time stamp 2024-08-21 05:07:56 is 17911017.570633984 s in the future
1795 07:22:11.803778 tar: ./mm/map_hugetlb: time stamp 2024-09-06 07:05:58 is 19300499.420476442 s in the future
1796 07:22:11.939463 tar: ./mm/hugetlb-read-hwpoison: time stamp 2024-09-06 07:05:56 is 19300497.285676025 s in the future
1797 07:22:12.105636 tar: ./mm/uffd-unit-tests: time stamp 2024-09-06 07:06:02 is 19300503.119116733 s in the future
1798 07:22:12.237784 tar: ./mm/ksm_tests: time stamp 2024-09-06 07:06:02 is 19300502.986970442 s in the future
1799 07:22:12.381002 tar: ./mm/ksm_functional_tests: time stamp 2024-09-06 07:06:03 is 19300503.844929858 s in the future
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1801 07:22:12.664211 tar: ./mm/mrelease_test: time stamp 2024-09-06 07:05:59 is 19300499.560196858 s in the future
1802 07:22:12.779721 tar: ./mm/seal_elf: time stamp 2024-09-06 07:06:00 is 19300500.444783442 s in the future
1803 07:22:12.830512 tar: ./mm: time stamp 2024-09-06 07:06:18 is 19300518.393239025 s in the future
1804 07:22:12.997770 tar: ./core/close_range_test: time stamp 2024-09-06 07:04:21 is 19300401.227730067 s in the future
1805 07:22:13.055873 tar: ./core: time stamp 2024-09-06 07:06:05 is 19300505.168018525 s in the future
1806 07:22:13.200034 tar: ./lkdtm/READ_BUDDY_AFTER_FREE.sh: time stamp 2024-09-06 07:05:06 is 19300446.026247192 s in the future
1807 07:22:13.323933 tar: ./lkdtm/CFI_BACKWARD.sh: time stamp 2024-09-06 07:05:07 is 19300446.901089275 s in the future
1808 07:22:13.430862 tar: ./lkdtm/STACKLEAK_ERASING.sh: time stamp 2024-09-06 07:05:07 is 19300446.79467615 s in the future
1809 07:22:13.557950 tar: ./lkdtm/CORRUPT_STACK.sh: time stamp 2024-09-06 07:05:06 is 19300445.667551567 s in the future
1810 07:22:13.674408 tar: ./lkdtm/REFCOUNT_TIMING.sh: time stamp 2024-09-06 07:05:07 is 19300446.550801442 s in the future
1811 07:22:13.791988 tar: ./lkdtm/WARNING_MESSAGE.sh: time stamp 2024-09-06 07:05:06 is 19300445.433954733 s in the future
1812 07:22:13.899031 tar: ./lkdtm/REFCOUNT_DEC_NEGATIVE.sh: time stamp 2024-09-06 07:05:07 is 19300446.327650275 s in the future
1813 07:22:14.007644 tar: ./lkdtm/config: time stamp 2024-08-21 05:07:56 is 17911015.2170604 s in the future
1814 07:22:14.140731 tar: ./lkdtm/REFCOUNT_DEC_ZERO.sh: time stamp 2024-09-06 07:05:07 is 19300446.085077025 s in the future
1815 07:22:14.260475 tar: ./lkdtm/REFCOUNT_INC_NOT_ZERO_SATURATED.sh: time stamp 2024-09-06 07:05:07 is 19300445.966806067 s in the future
1816 07:22:14.365700 tar: ./lkdtm/STACK_GUARD_PAGE_TRAILING.sh: time stamp 2024-09-06 07:05:06 is 19300444.86035515 s in the future
1817 07:22:14.483517 tar: ./lkdtm/SLAB_FREE_PAGE.sh: time stamp 2024-09-06 07:05:06 is 19300444.741552942 s in the future
1818 07:22:14.609696 tar: ./lkdtm/VMALLOC_LINEAR_OVERFLOW.sh: time stamp 2024-09-06 07:05:06 is 19300444.616424817 s in the future
1819 07:22:14.734721 tar: ./lkdtm/WRITE_BUDDY_AFTER_FREE.sh: time stamp 2024-09-06 07:05:06 is 19300444.491314858 s in the future
1820 07:22:14.849258 tar: ./lkdtm/UNSET_SMEP.sh: time stamp 2024-09-06 07:05:06 is 19300444.376570108 s in the future
1821 07:22:14.969072 tar: ./lkdtm/REFCOUNT_INC_NOT_ZERO_OVERFLOW.sh: time stamp 2024-09-06 07:05:07 is 19300445.257732441 s in the future
1822 07:22:15.110212 tar: ./lkdtm/PPC_SLB_MULTIHIT.sh: time stamp 2024-09-06 07:05:07 is 19300445.11595765 s in the future
1823 07:22:15.225683 tar: ./lkdtm/ACCESS_NULL.sh: time stamp 2024-09-06 07:05:07 is 19300444.999136775 s in the future
1824 07:22:15.348753 tar: ./lkdtm/EXEC_KMALLOC.sh: time stamp 2024-09-06 07:05:06 is 19300443.87612465 s in the future
1825 07:22:15.468501 tar: ./lkdtm/FORTIFY_MEM_OBJECT.sh: time stamp 2024-09-06 07:05:07 is 19300444.757269691 s in the future
1826 07:22:15.585124 tar: ./lkdtm/SPINLOCKUP.sh: time stamp 2024-09-06 07:05:06 is 19300443.640503441 s in the future
1827 07:22:15.711342 tar: ./lkdtm/REFCOUNT_INC_SATURATED.sh: time stamp 2024-09-06 07:05:07 is 19300444.515349983 s in the future
1828 07:22:15.842901 tar: ./lkdtm/UNALIGNED_LOAD_STORE_WRITE.sh: time stamp 2024-09-06 07:05:06 is 19300443.384044858 s in the future
1829 07:22:15.952198 tar: ./lkdtm/WARNING.sh: time stamp 2024-09-06 07:05:06 is 19300443.273404233 s in the future
1830 07:22:16.077038 tar: ./lkdtm/FORTIFY_STRSCPY.sh: time stamp 2024-09-06 07:05:07 is 19300444.148362191 s in the future
1831 07:22:16.234884 tar: ./lkdtm/ARRAY_BOUNDS.sh: time stamp 2024-09-06 07:05:06 is 19300442.989915816 s in the future
1832 07:22:16.341993 tar: ./lkdtm/CORRUPT_PAC.sh: time stamp 2024-09-06 07:05:06 is 19300442.883567775 s in the future
1833 07:22:16.457660 tar: ./lkdtm/REFCOUNT_DEC_SATURATED.sh: time stamp 2024-09-06 07:05:07 is 19300443.768127441 s in the future
1834 07:22:16.578465 tar: ./lkdtm/FORTIFY_STR_OBJECT.sh: time stamp 2024-09-06 07:05:07 is 19300443.647799025 s in the future
1835 07:22:16.694882 tar: ./lkdtm/USERCOPY_SLAB_SIZE_FROM.sh: time stamp 2024-09-06 07:05:07 is 19300443.53103965 s in the future
1836 07:22:16.802241 tar: ./lkdtm/REFCOUNT_ADD_NOT_ZERO_SATURATED.sh: time stamp 2024-09-06 07:05:07 is 19300443.424827025 s in the future
1837 07:22:16.927986 tar: ./lkdtm/EXEC_VMALLOC.sh: time stamp 2024-09-06 07:05:06 is 19300442.297448983 s in the future
1838 07:22:17.044715 tar: ./lkdtm/FORTIFY_MEM_MEMBER.sh: time stamp 2024-09-06 07:05:07 is 19300443.1807329 s in the future
1839 07:22:17.178213 tar: ./lkdtm/DOUBLE_FAULT.sh: time stamp 2024-09-06 07:05:06 is 19300442.047252733 s in the future
1840 07:22:17.292588 tar: ./lkdtm/EXEC_RODATA.sh: time stamp 2024-09-06 07:05:06 is 19300441.932523191 s in the future
1841 07:22:17.403980 tar: ./lkdtm/REFCOUNT_INC_OVERFLOW.sh: time stamp 2024-09-06 07:05:07 is 19300442.822013108 s in the future
1842 07:22:17.512085 tar: ./lkdtm/REFCOUNT_ADD_NOT_ZERO_OVERFLOW.sh: time stamp 2024-09-06 07:05:07 is 19300442.713582983 s in the future
1843 07:22:17.638318 tar: ./lkdtm/USERCOPY_STACK_FRAME_TO.sh: time stamp 2024-09-06 07:05:07 is 19300442.588387566 s in the future
1844 07:22:17.742341 tar: ./lkdtm/REFCOUNT_ADD_ZERO.sh: time stamp 2024-09-06 07:05:07 is 19300442.482170066 s in the future
1845 07:22:17.862103 tar: ./lkdtm/PANIC.sh: time stamp 2024-09-06 07:05:06 is 19300441.363186066 s in the future
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1994 07:22:36.776697 tar: ./timers/adjtick: time stamp 2024-09-06 07:05:50 is 19300466.447042731 s in the future
1995 07:22:36.895008 tar: ./timers/rtcpie: time stamp 2024-09-06 07:05:50 is 19300466.328283897 s in the future
1996 07:22:37.012512 tar: ./timers/leapcrash: time stamp 2024-09-06 07:05:51 is 19300467.211432814 s in the future
1997 07:22:37.135222 tar: ./timers/mqueue-lat: time stamp 2024-09-06 07:05:50 is 19300466.088442439 s in the future
1998 07:22:37.268533 tar: ./timers/change_skew: time stamp 2024-09-06 07:05:50 is 19300465.955104522 s in the future
1999 07:22:37.412263 tar: ./timers/set-tz: time stamp 2024-09-06 07:05:51 is 19300466.811185022 s in the future
2000 07:22:37.537147 tar: ./timers/threadtest: time stamp 2024-09-06 07:05:50 is 19300465.686049355 s in the future
2001 07:22:37.652305 tar: ./timers/raw_skew: time stamp 2024-09-06 07:05:50 is 19300465.571424939 s in the future
2002 07:22:37.785700 tar: ./timers/nanosleep: time stamp 2024-09-06 07:05:49 is 19300464.437903605 s in the future
2003 07:22:37.913986 tar: ./timers/valid-adjtimex: time stamp 2024-09-06 07:05:50 is 19300465.310667855 s in the future
2004 07:22:38.046136 tar: ./timers/freq-step: time stamp 2024-09-06 07:05:51 is 19300466.177228105 s in the future
2005 07:22:38.201719 tar: ./timers/clocksource-switch: time stamp 2024-09-06 07:05:51 is 19300466.022786814 s in the future
2006 07:22:38.344376 tar: ./timers/set-2038: time stamp 2024-09-06 07:05:51 is 19300465.878828272 s in the future
2007 07:22:38.472651 tar: ./timers/inconsistency-check: time stamp 2024-09-06 07:05:50 is 19300464.751869605 s in the future
2008 07:22:38.621752 tar: ./timers/set-tai: time stamp 2024-09-06 07:05:51 is 19300465.601749605 s in the future
2009 07:22:38.745653 tar: ./timers/set-timer-lat: time stamp 2024-09-06 07:05:49 is 19300463.478469147 s in the future
2010 07:22:38.870229 tar: ./timers/posix_timers: time stamp 2024-09-06 07:05:49 is 19300463.35340923 s in the future
2011 07:22:38.997282 tar: ./timers/leap-a-day: time stamp 2024-09-06 07:05:51 is 19300465.226435897 s in the future
2012 07:22:39.131780 tar: ./timers/alarmtimer-suspend: time stamp 2024-09-06 07:05:50 is 19300464.092964064 s in the future
2013 07:22:39.263039 tar: ./timers/nsleep-lat: time stamp 2024-09-06 07:05:49 is 19300462.961270064 s in the future
2014 07:22:39.385940 tar: ./timers/skew_consistency: time stamp 2024-09-06 07:05:50 is 19300463.838326105 s in the future
2015 07:22:39.437875 tar: ./timers: time stamp 2024-09-06 07:06:17 is 19300490.784981605 s in the future
2016 07:22:39.594751 tar: ./syscall_user_dispatch/config: time stamp 2024-08-21 05:07:56 is 17910989.629973314 s in the future
2017 07:22:39.748235 tar: ./syscall_user_dispatch/sud_benchmark: time stamp 2024-09-06 07:05:48 is 19300461.476600355 s in the future
2018 07:22:39.882801 tar: ./syscall_user_dispatch/sud_test: time stamp 2024-09-06 07:05:48 is 19300461.342077647 s in the future
2019 07:22:39.947374 tar: ./syscall_user_dispatch: time stamp 2024-09-06 07:06:16 is 19300489.277216272 s in the future
2020 07:22:40.098736 tar: ./ptrace/get_syscall_info: time stamp 2024-09-06 07:05:35 is 19300448.125666563 s in the future
2021 07:22:40.243671 tar: ./ptrace/vmaccess: time stamp 2024-09-06 07:05:35 is 19300447.980498688 s in the future
2022 07:22:40.363191 tar: ./ptrace/get_set_sud: time stamp 2024-09-06 07:05:36 is 19300448.860499313 s in the future
2023 07:22:40.488130 tar: ./ptrace/peeksiginfo: time stamp 2024-09-06 07:05:35 is 19300447.735036355 s in the future
2024 07:22:40.541907 tar: ./ptrace: time stamp 2024-09-06 07:06:13 is 19300485.680264813 s in the future
2025 07:22:40.690121 tar: ./static_keys/config: time stamp 2024-08-21 05:07:56 is 17910988.533339605 s in the future
2026 07:22:40.816048 tar: ./static_keys/test_static_keys.sh: time stamp 2024-08-21 05:07:56 is 17910988.408070063 s in the future
2027 07:22:40.871409 tar: ./static_keys: time stamp 2024-09-06 07:06:16 is 19300488.351776772 s in the future
2028 07:22:40.998548 tar: ./kselftest-list.txt: time stamp 2024-09-06 07:06:20 is 19300492.225546855 s in the future
2029 07:22:41.154108 tar: ./connector/proc_filter: time stamp 2024-09-06 07:04:21 is 19300373.070159772 s in the future
2030 07:22:41.215571 tar: ./connector: time stamp 2024-09-06 07:06:05 is 19300477.007736438 s in the future
2031 07:22:41.773349 tar: ./fchmodat2/fchmodat2_test: time stamp 2024-09-06 07:04:49 is 19300400.451258105 s in the future
2032 07:22:41.823242 tar: ./fchmodat2: time stamp 2024-09-06 07:06:07 is 19300478.399279647 s in the future
2033 07:22:41.966038 tar: ./damon/debugfs_schemes.sh: time stamp 2024-08-21 05:07:56 is 17910987.257457688 s in the future
2034 07:22:42.094506 tar: ./damon/sysfs_update_schemes_tried_regions_hang.py: time stamp 2024-08-21 05:07:56 is 17910987.132120897 s in the future
2035 07:22:42.206817 tar: ./damon/access_memory_even: time stamp 2024-09-06 07:04:21 is 19300372.016973272 s in the future
2036 07:22:42.340015 tar: ./damon/_debugfs_common.sh: time stamp 2024-08-21 05:07:56 is 17910986.883484772 s in the future
2037 07:22:42.465919 tar: ./damon/config: time stamp 2024-08-21 05:07:56 is 17910986.756906688 s in the future
2038 07:22:42.611283 tar: ./damon/debugfs_target_ids_read_before_terminate_race: time stamp 2024-09-06 07:04:21 is 19300371.614945855 s in the future
2039 07:22:42.723221 tar: ./damon/lru_sort.sh: time stamp 2024-08-21 05:07:56 is 17910986.499881105 s in the future
2040 07:22:42.857835 tar: ./damon/reclaim.sh: time stamp 2024-08-21 05:07:56 is 17910986.366220396 s in the future
2041 07:22:42.968016 tar: ./damon/debugfs_target_ids_pid_leak.sh: time stamp 2024-08-21 05:07:56 is 17910986.256443771 s in the future
2042 07:22:43.126836 tar: ./damon/debugfs_target_ids_pid_leak: time stamp 2024-09-06 07:04:21 is 19300371.098077146 s in the future
2043 07:22:43.241302 tar: ./damon/damos_quota.py: time stamp 2024-08-21 05:07:56 is 17910985.982479313 s in the future
2044 07:22:43.385789 tar: ./damon/debugfs_target_ids_read_before_terminate_race.sh: time stamp 2024-08-21 05:07:56 is 17910985.84077848 s in the future
2045 07:22:43.509781 tar: ./damon/_chk_dependency.sh: time stamp 2024-08-21 05:07:56 is 17910985.714311646 s in the future
2046 07:22:43.643138 tar: ./damon/huge_count_read_write: time stamp 2024-09-06 07:04:21 is 19300370.580678271 s in the future
2047 07:22:43.761086 tar: ./damon/debugfs_duplicate_context_creation.sh: time stamp 2024-08-21 05:07:56 is 17910985.46546373 s in the future
2048 07:22:43.900732 tar: ./damon/debugfs_rm_non_contexts.sh: time stamp 2024-08-21 05:07:56 is 17910985.323735021 s in the future
2049 07:22:44.019701 tar: ./damon/damos_tried_regions.py: time stamp 2024-08-21 05:07:56 is 17910985.205375021 s in the future
2050 07:22:44.144738 tar: ./damon/debugfs_target_ids.sh: time stamp 2024-08-21 05:07:56 is 17910985.080041521 s in the future
2051 07:22:44.262745 tar: ./damon/sysfs_update_schemes_tried_regions_wss_estimation.py: time stamp 2024-08-21 05:07:56 is 17910984.964903271 s in the future
2052 07:22:44.393082 tar: ./damon/damos_quota_goal.py: time stamp 2024-08-21 05:07:56 is 17910984.831381646 s in the future
2053 07:22:44.512903 tar: ./damon/debugfs_huge_count_read_write.sh: time stamp 2024-08-21 05:07:56 is 17910984.713084271 s in the future
2054 07:22:44.635632 tar: ./damon/access_memory: time stamp 2024-09-06 07:04:21 is 19300369.58777898 s in the future
2055 07:22:44.758473 tar: ./damon/damon_nr_regions.py: time stamp 2024-08-21 05:07:56 is 17910984.464289855 s in the future
2056 07:22:44.907993 tar: ./damon/debugfs_empty_targets.sh: time stamp 2024-08-21 05:07:56 is 17910984.317280521 s in the future
2057 07:22:45.028765 tar: ./damon/debugfs_attrs.sh: time stamp 2024-08-21 05:07:56 is 17910984.195886313 s in the future
2058 07:22:45.160757 tar: ./damon/sysfs.sh: time stamp 2024-08-21 05:07:56 is 17910984.062321813 s in the future
2059 07:22:45.285916 tar: ./damon/damos_apply_interval.py: time stamp 2024-08-21 05:07:56 is 17910983.938879771 s in the future
2060 07:22:45.420529 tar: ./damon/sysfs_update_removed_scheme_dir.sh: time stamp 2024-08-21 05:07:56 is 17910983.805383688 s in the future
2061 07:22:45.468137 tar: ./damon: time stamp 2024-09-06 07:06:06 is 19300473.753879688 s in the future
2062 07:22:45.638873 tar: ./membarrier/membarrier_test_multi_thread: time stamp 2024-09-06 07:05:08 is 19300415.586981104 s in the future
2063 07:22:45.769104 tar: ./membarrier/membarrier_test_single_thread: time stamp 2024-09-06 07:05:08 is 19300415.455587313 s in the future
2064 07:22:45.825245 tar: ./membarrier: time stamp 2024-09-06 07:06:10 is 19300477.397352771 s in the future
2065 07:22:45.978549 tar: ./size/get_size: time stamp 2024-09-06 07:05:47 is 19300454.245037896 s in the future
2066 07:22:46.032773 tar: ./size: time stamp 2024-09-06 07:06:16 is 19300483.191083813 s in the future
2067 07:22:46.193389 tar: ./rlimits/config: time stamp 2024-08-21 05:07:56 is 17910983.029310896 s in the future
2068 07:22:46.327866 tar: ./rlimits/rlimits-per-userns: time stamp 2024-09-06 07:05:40 is 19300446.896825438 s in the future
2069 07:22:46.375560 tar: ./rlimits: time stamp 2024-09-06 07:06:15 is 19300481.847126104 s in the future
2070 07:22:46.521868 tar: ./move_mount_set_group/config: time stamp 2024-08-21 05:07:56 is 17910982.702786688 s in the future
2071 07:22:46.681986 tar: ./move_mount_set_group/move_mount_set_group_test: time stamp 2024-09-06 07:05:11 is 19300417.544328229 s in the future
2072 07:22:46.728868 tar: ./move_mount_set_group: time stamp 2024-09-06 07:06:11 is 19300477.495471104 s in the future
2073 07:22:46.960333 tar: ./tmpfs/bug-link-o-tmpfile: time stamp 2024-09-06 07:05:51 is 19300457.263395313 s in the future
2074 07:22:47.023698 tar: ./tmpfs: time stamp 2024-09-06 07:06:17 is 19300483.198744771 s in the future
2075 07:22:47.181840 tar: ./power_supply/test_power_supply_properties.sh: time stamp 2024-08-21 05:07:56 is 17910982.044108938 s in the future
2076 07:22:47.295142 tar: ./power_supply/helpers.sh: time stamp 2024-08-21 05:07:56 is 17910981.928278104 s in the future
2077 07:22:47.351221 tar: ./power_supply: time stamp 2024-09-06 07:06:13 is 19300478.870933104 s in the future
2078 07:22:47.486693 tar: ./rust/config: time stamp 2024-08-21 05:07:56 is 17910981.736392813 s in the future
2079 07:22:47.617756 tar: ./rust/test_probe_samples.sh: time stamp 2024-08-21 05:07:56 is 17910981.606444396 s in the future
2080 07:22:47.671056 tar: ./rust: time stamp 2024-09-06 07:06:16 is 19300481.551958938 s in the future
2081 07:22:47.812135 tar: ./cpu-hotplug/cpu-on-off-test.sh: time stamp 2024-08-21 05:07:56 is 17910981.412085354 s in the future
2082 07:22:47.866207 tar: ./cpu-hotplug: time stamp 2024-09-06 07:06:05 is 19300470.356256021 s in the future
2083 07:22:48.033080 tar: ./nci/config: time stamp 2024-08-21 05:07:56 is 17910981.190387771 s in the future
2084 07:22:48.188702 tar: ./nci/nci_dev: time stamp 2024-09-06 07:05:11 is 19300416.034627437 s in the future
2085 07:22:48.243789 tar: ./nci: time stamp 2024-09-06 07:06:11 is 19300475.979082646 s in the future
2086 07:22:48.295698 tar: .: time stamp 2024-09-06 07:06:20 is 19300484.926176521 s in the future
2087 07:22:48.591032 skiplist:
2088 07:22:48.591424 ========================================
2089 07:22:48.596469 ========================================
2090 07:22:48.928585 dt:test_unprobed_devices.sh
2091 07:22:49.049792 ============== Tests to run ===============
2092 07:22:49.059270 dt:test_unprobed_devices.sh
2093 07:22:49.063666 ===========End Tests to run ===============
2094 07:22:49.098966 shardfile-dt pass
2095 07:22:49.450139 <12>[ 195.161154] kselftest: Running tests in dt
2096 07:22:49.481123 TAP version 13
2097 07:22:49.505761 1..1
2098 07:22:49.561777 # timeout set to 45
2099 07:22:49.562165 # selftests: dt: test_unprobed_devices.sh
2100 07:22:50.393931 # TAP version 13
2101 07:23:02.462379 # 1..255
2102 07:23:02.638279 # ok 1 / # SKIP
2103 07:23:02.659263 # ok 2 /clk_mcasp0
2104 07:23:02.727681 # ok 3 /clk_mcasp0_fixed # SKIP
2105 07:23:02.795669 # ok 4 /cpus/cpu@0 # SKIP
2106 07:23:02.867203 # ok 5 /cpus/idle-states/mpu_gate # SKIP
2107 07:23:02.887970 # ok 6 /fixedregulator0
2108 07:23:02.911693 # ok 7 /leds
2109 07:23:02.927859 # ok 8 /ocp
2110 07:23:02.951725 # ok 9 /ocp/interconnect@44c00000
2111 07:23:02.974861 # ok 10 /ocp/interconnect@44c00000/segment@0
2112 07:23:02.998017 # ok 11 /ocp/interconnect@44c00000/segment@100000
2113 07:23:03.021403 # ok 12 /ocp/interconnect@44c00000/segment@100000/target-module@0
2114 07:23:03.098441 # not ok 13 /ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0
2115 07:23:03.116149 # ok 14 /ocp/interconnect@44c00000/segment@200000
2116 07:23:03.137771 # ok 15 /ocp/interconnect@44c00000/segment@200000/target-module@0
2117 07:23:03.250314 # not ok 16 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0
2118 07:23:03.322512 # ok 17 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0 # SKIP
2119 07:23:03.390771 # ok 18 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0 # SKIP
2120 07:23:03.469192 # ok 19 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120 # SKIP
2121 07:23:03.542255 # ok 20 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c # SKIP
2122 07:23:03.613437 # ok 21 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18 # SKIP
2123 07:23:03.687630 # ok 22 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c # SKIP
2124 07:23:03.752657 # ok 23 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24 # SKIP
2125 07:23:03.831047 # ok 24 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38 # SKIP
2126 07:23:03.895438 # ok 25 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8 # SKIP
2127 07:23:03.973051 # ok 26 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400 # SKIP
2128 07:23:04.037737 # ok 27 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0 # SKIP
2129 07:23:04.117634 # ok 28 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14 # SKIP
2130 07:23:04.190784 # ok 29 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0 # SKIP
2131 07:23:04.255314 # ok 30 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600 # SKIP
2132 07:23:04.334017 # ok 31 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0 # SKIP
2133 07:23:04.399819 # ok 32 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800 # SKIP
2134 07:23:04.477553 # ok 33 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0 # SKIP
2135 07:23:04.550512 # ok 34 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900 # SKIP
2136 07:23:04.616565 # ok 35 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0 # SKIP
2137 07:23:04.693047 # ok 36 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00 # SKIP
2138 07:23:04.761009 # ok 37 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0 # SKIP
2139 07:23:04.837676 # ok 38 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz # SKIP
2140 07:23:04.912043 # ok 39 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768 # SKIP
2141 07:23:04.984130 # ok 40 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k # SKIP
2142 07:23:05.049998 # ok 41 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k # SKIP
2143 07:23:05.130869 # ok 42 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk # SKIP
2144 07:23:05.199711 # ok 43 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520 # SKIP
2145 07:23:05.274011 # ok 44 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2 # SKIP
2146 07:23:05.344120 # ok 45 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480 # SKIP
2147 07:23:05.411265 # ok 46 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484 # SKIP
2148 07:23:05.491914 # ok 47 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8 # SKIP
2149 07:23:05.563180 # ok 48 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2 # SKIP
2150 07:23:05.634424 # ok 49 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2 # SKIP
2151 07:23:05.705553 # ok 50 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0 # SKIP
2152 07:23:05.779387 # ok 51 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4 # SKIP
2153 07:23:05.850799 # ok 52 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8 # SKIP
2154 07:23:05.924002 # ok 53 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4 # SKIP
2155 07:23:05.991003 # ok 54 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm # SKIP
2156 07:23:06.070895 # ok 55 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac # SKIP
2157 07:23:06.141363 # ok 56 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c # SKIP
2158 07:23:06.213712 # ok 57 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4 # SKIP
2159 07:23:06.282170 # ok 58 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk # SKIP
2160 07:23:06.359686 # ok 59 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk # SKIP
2161 07:23:06.428991 # ok 60 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk # SKIP
2162 07:23:06.500349 # ok 61 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk # SKIP
2163 07:23:06.563127 # ok 62 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk # SKIP
2164 07:23:06.640766 # ok 63 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk # SKIP
2165 07:23:06.706003 # ok 64 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534 # SKIP
2166 07:23:06.783507 # ok 65 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc # SKIP
2167 07:23:06.850978 # ok 66 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914 # SKIP
2168 07:23:06.926452 # ok 67 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530 # SKIP
2169 07:23:07.000851 # ok 68 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div # SKIP
2170 07:23:07.064832 # ok 69 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin # SKIP
2171 07:23:07.142233 # ok 70 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528 # SKIP
2172 07:23:07.212990 # ok 71 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508 # SKIP
2173 07:23:07.282108 # ok 72 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c # SKIP
2174 07:23:07.358972 # ok 73 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510 # SKIP
2175 07:23:07.429094 # ok 74 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518 # SKIP
2176 07:23:07.493913 # ok 75 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c # SKIP
2177 07:23:07.572723 # ok 76 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504 # SKIP
2178 07:23:07.639669 # ok 77 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c # SKIP
2179 07:23:07.714360 # ok 78 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000 # SKIP
2180 07:23:07.782697 # ok 79 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000 # SKIP
2181 07:23:07.850923 # ok 80 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000 # SKIP
2182 07:23:07.930227 # ok 81 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000 # SKIP
2183 07:23:07.994187 # ok 82 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538 # SKIP
2184 07:23:08.072975 # ok 83 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488 # SKIP
2185 07:23:08.142936 # ok 84 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c # SKIP
2186 07:23:08.207938 # ok 85 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490 # SKIP
2187 07:23:08.287377 # ok 86 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494 # SKIP
2188 07:23:08.358437 # ok 87 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498 # SKIP
2189 07:23:08.430090 # ok 88 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c # SKIP
2190 07:23:08.497377 # ok 89 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div@0 # SKIP
2191 07:23:08.575402 # ok 90 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel@1 # SKIP
2192 07:23:08.641322 # ok 91 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700 # SKIP
2193 07:23:08.721719 # ok 92 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div@3 # SKIP
2194 07:23:08.786879 # ok 93 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2@7 # SKIP
2195 07:23:08.864648 # ok 94 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre@0 # SKIP
2196 07:23:08.884855 # ok 95 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000
2197 07:23:08.911072 # ok 96 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100
2198 07:23:08.931434 # ok 97 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200
2199 07:23:08.950569 # ok 98 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00
2200 07:23:08.980161 # ok 99 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00
2201 07:23:08.998942 # ok 100 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00
2202 07:23:09.021166 # ok 101 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00
2203 07:23:09.050952 # ok 102 /ocp/interconnect@44c00000/segment@200000/target-module@10000
2204 07:23:09.153832 # not ok 103 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0
2205 07:23:09.180465 # ok 104 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620
2206 07:23:09.197508 # ok 105 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90
2207 07:23:09.228809 # ok 106 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800
2208 07:23:09.328121 # not ok 107 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0
2209 07:23:09.408044 # ok 108 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck # SKIP
2210 07:23:09.475186 # ok 109 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck # SKIP
2211 07:23:09.553966 # ok 110 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck # SKIP
2212 07:23:09.625182 # ok 111 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck # SKIP
2213 07:23:09.699908 # ok 112 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck # SKIP
2214 07:23:09.773478 # ok 113 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck # SKIP
2215 07:23:09.844690 # ok 114 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck # SKIP
2216 07:23:09.914088 # ok 115 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck # SKIP
2217 07:23:09.990442 # ok 116 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck # SKIP
2218 07:23:10.063086 # ok 117 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck # SKIP
2219 07:23:10.135730 # ok 118 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40 # SKIP
2220 07:23:10.201940 # ok 119 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664 # SKIP
2221 07:23:10.276834 # ok 120 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk@0 # SKIP
2222 07:23:10.351712 # ok 121 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk@1 # SKIP
2223 07:23:10.425208 # ok 122 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk@2 # SKIP
2224 07:23:10.443698 # ok 123 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel
2225 07:23:10.511845 # not ok 124 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324
2226 07:23:10.584788 # not ok 125 /ocp/interconnect@44c00000/segment@200000/target-module@31000
2227 07:23:10.658960 # ok 126 /ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0 # SKIP
2228 07:23:10.673918 # ok 127 /ocp/interconnect@44c00000/segment@200000/target-module@35000
2229 07:23:10.750428 # not ok 128 /ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0
2230 07:23:10.768816 # ok 129 /ocp/interconnect@44c00000/segment@200000/target-module@3e000
2231 07:23:10.846290 # not ok 130 /ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0
2232 07:23:10.870540 # ok 131 /ocp/interconnect@44c00000/segment@200000/target-module@7000
2233 07:23:10.888926 # ok 132 /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0
2234 07:23:10.917318 # ok 133 /ocp/interconnect@44c00000/segment@200000/target-module@9000
2235 07:23:10.935780 # ok 134 /ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0
2236 07:23:10.963290 # ok 135 /ocp/interconnect@44c00000/segment@200000/target-module@b000
2237 07:23:10.989956 # ok 136 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0
2238 07:23:11.007638 # ok 137 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50
2239 07:23:11.038494 # ok 138 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
2240 07:23:11.059290 # ok 139 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24
2241 07:23:11.127494 # not ok 140 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/charger
2242 07:23:11.200867 # not ok 141 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/pwrbutton
2243 07:23:11.229714 # ok 142 /ocp/interconnect@44c00000/segment@200000/target-module@d000
2244 07:23:11.296548 # not ok 143 /ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc
2245 07:23:11.369697 # not ok 144 /ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/tsc
2246 07:23:11.470901 # not ok 145 /ocp/interconnect@47c00000
2247 07:23:11.542572 # not ok 146 /ocp/interconnect@47c00000/segment@0
2248 07:23:11.563439 # ok 147 /ocp/interconnect@48000000
2249 07:23:11.586187 # ok 148 /ocp/interconnect@48000000/segment@0
2250 07:23:11.609158 # ok 149 /ocp/interconnect@48000000/segment@0/target-module@22000
2251 07:23:11.635399 # ok 150 /ocp/interconnect@48000000/segment@0/target-module@24000
2252 07:23:11.659688 # ok 151 /ocp/interconnect@48000000/segment@0/target-module@2a000
2253 07:23:11.676924 # ok 152 /ocp/interconnect@48000000/segment@0/target-module@30000
2254 07:23:11.705936 # ok 153 /ocp/interconnect@48000000/segment@0/target-module@38000
2255 07:23:11.724928 # ok 154 /ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0
2256 07:23:11.754601 # ok 155 /ocp/interconnect@48000000/segment@0/target-module@3c000
2257 07:23:11.824540 # not ok 156 /ocp/interconnect@48000000/segment@0/target-module@40000
2258 07:23:11.897933 # ok 157 /ocp/interconnect@48000000/segment@0/target-module@40000/timer@0 # SKIP
2259 07:23:11.919305 # ok 158 /ocp/interconnect@48000000/segment@0/target-module@42000
2260 07:23:11.938183 # ok 159 /ocp/interconnect@48000000/segment@0/target-module@42000/timer@0
2261 07:23:11.968011 # ok 160 /ocp/interconnect@48000000/segment@0/target-module@44000
2262 07:23:11.984959 # ok 161 /ocp/interconnect@48000000/segment@0/target-module@44000/timer@0
2263 07:23:12.011952 # ok 162 /ocp/interconnect@48000000/segment@0/target-module@46000
2264 07:23:12.036095 # ok 163 /ocp/interconnect@48000000/segment@0/target-module@46000/timer@0
2265 07:23:12.060542 # ok 164 /ocp/interconnect@48000000/segment@0/target-module@48000
2266 07:23:12.077913 # ok 165 /ocp/interconnect@48000000/segment@0/target-module@48000/timer@0
2267 07:23:12.105917 # ok 166 /ocp/interconnect@48000000/segment@0/target-module@4a000
2268 07:23:12.127053 # ok 167 /ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0
2269 07:23:12.155042 # ok 168 /ocp/interconnect@48000000/segment@0/target-module@4c000
2270 07:23:12.177003 # ok 169 /ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0
2271 07:23:12.191907 # ok 170 /ocp/interconnect@48000000/segment@0/target-module@60000
2272 07:23:12.220595 # ok 171 /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0
2273 07:23:12.246179 # ok 172 /ocp/interconnect@48000000/segment@0/target-module@80000
2274 07:23:12.260979 # ok 173 /ocp/interconnect@48000000/segment@0/target-module@c8000
2275 07:23:12.290539 # ok 174 /ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0
2276 07:23:12.308976 # ok 175 /ocp/interconnect@48000000/segment@0/target-module@ca000
2277 07:23:12.338928 # ok 176 /ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0
2278 07:23:12.357750 # ok 177 /ocp/interconnect@48000000/segment@100000
2279 07:23:12.378045 # ok 178 /ocp/interconnect@48000000/segment@100000/target-module@9c000
2280 07:23:12.408958 # ok 179 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0
2281 07:23:12.475852 # not ok 180 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54
2282 07:23:12.553075 # not ok 181 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55
2283 07:23:12.616685 # not ok 182 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56
2284 07:23:12.689903 # not ok 183 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57
2285 07:23:12.709578 # ok 184 /ocp/interconnect@48000000/segment@100000/target-module@a0000
2286 07:23:12.737078 # ok 185 /ocp/interconnect@48000000/segment@100000/target-module@a6000
2287 07:23:12.752951 # ok 186 /ocp/interconnect@48000000/segment@100000/target-module@a8000
2288 07:23:12.778188 # ok 187 /ocp/interconnect@48000000/segment@100000/target-module@aa000
2289 07:23:12.806975 # ok 188 /ocp/interconnect@48000000/segment@100000/target-module@ac000
2290 07:23:12.823150 # ok 189 /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0
2291 07:23:12.848340 # ok 190 /ocp/interconnect@48000000/segment@100000/target-module@ae000
2292 07:23:12.875461 # ok 191 /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0
2293 07:23:12.899720 # ok 192 /ocp/interconnect@48000000/segment@100000/target-module@cc000
2294 07:23:12.919088 # ok 193 /ocp/interconnect@48000000/segment@100000/target-module@d0000
2295 07:23:12.945356 # ok 194 /ocp/interconnect@48000000/segment@100000/target-module@d8000
2296 07:23:12.970719 # ok 195 /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0
2297 07:23:12.983497 # ok 196 /ocp/interconnect@48000000/segment@200000
2298 07:23:13.011206 # ok 197 /ocp/interconnect@48000000/segment@200000/target-module@0
2299 07:23:13.085491 # ok 198 /ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0 # SKIP
2300 07:23:13.107452 # ok 199 /ocp/interconnect@48000000/segment@300000
2301 07:23:13.125350 # ok 200 /ocp/interconnect@48000000/segment@300000/target-module@0
2302 07:23:13.153863 # ok 201 /ocp/interconnect@48000000/segment@300000/target-module@10000
2303 07:23:13.177062 # ok 202 /ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0
2304 07:23:13.200472 # ok 203 /ocp/interconnect@48000000/segment@300000/target-module@2000
2305 07:23:13.218742 # ok 204 /ocp/interconnect@48000000/segment@300000/target-module@4000
2306 07:23:13.249347 # ok 205 /ocp/interconnect@48000000/segment@300000/target-module@e000
2307 07:23:13.314217 # not ok 206 /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
2308 07:23:13.335363 # ok 207 /ocp/interconnect@4a000000
2309 07:23:13.356340 # ok 208 /ocp/interconnect@4a000000/segment@0
2310 07:23:13.382947 # ok 209 /ocp/interconnect@4a000000/segment@0/target-module@100000
2311 07:23:13.409828 # ok 210 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0
2312 07:23:13.437359 # ok 211 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000
2313 07:23:13.452154 # ok 212 /ocp/interconnect@4a000000/segment@0/target-module@300000
2314 07:23:13.528385 # not ok 213 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0
2315 07:23:13.635318 # ok 214 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000 # SKIP
2316 07:23:13.710767 # not ok 215 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000
2317 07:23:13.811972 # ok 216 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000 # SKIP
2318 07:23:13.880701 # not ok 217 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000
2319 07:23:13.950935 # not ok 218 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000
2320 07:23:14.054107 # not ok 219 /ocp/interconnect@4b140000
2321 07:23:14.118257 # not ok 220 /ocp/interconnect@4b140000/segment@0
2322 07:23:14.195413 # ok 221 /ocp/interrupt-controller@48200000 # SKIP
2323 07:23:14.214182 # ok 222 /ocp/target-module@40300000
2324 07:23:14.239402 # ok 223 /ocp/target-module@40300000/sram@0
2325 07:23:14.312286 # ok 224 /ocp/target-module@40300000/sram@0/pm-code-sram@0 # SKIP
2326 07:23:14.385065 # ok 225 /ocp/target-module@40300000/sram@0/pm-data-sram@1000 # SKIP
2327 07:23:14.404452 # ok 226 /ocp/target-module@47400000
2328 07:23:14.427920 # ok 227 /ocp/target-module@47400000/dma-controller@2000
2329 07:23:14.452166 # ok 228 /ocp/target-module@47400000/usb-phy@1300
2330 07:23:14.475225 # ok 229 /ocp/target-module@47400000/usb-phy@1b00
2331 07:23:14.490952 # ok 230 /ocp/target-module@47400000/usb@1400
2332 07:23:14.513848 # ok 231 /ocp/target-module@47400000/usb@1800
2333 07:23:14.535794 # ok 232 /ocp/target-module@47810000
2334 07:23:14.560824 # ok 233 /ocp/target-module@49000000
2335 07:23:14.585933 # ok 234 /ocp/target-module@49000000/dma@0
2336 07:23:14.601386 # ok 235 /ocp/target-module@49800000
2337 07:23:14.626547 # ok 236 /ocp/target-module@49800000/dma@0
2338 07:23:14.650710 # ok 237 /ocp/target-module@49900000
2339 07:23:14.673692 # ok 238 /ocp/target-module@49900000/dma@0
2340 07:23:14.694386 # ok 239 /ocp/target-module@49a00000
2341 07:23:14.715727 # ok 240 /ocp/target-module@49a00000/dma@0
2342 07:23:14.735710 # ok 241 /ocp/target-module@4c000000
2343 07:23:14.805304 # not ok 242 /ocp/target-module@4c000000/emif@0
2344 07:23:14.827152 # ok 243 /ocp/target-module@50000000
2345 07:23:14.853214 # ok 244 /ocp/target-module@53100000
2346 07:23:14.925833 # not ok 245 /ocp/target-module@53100000/sham@0
2347 07:23:14.944546 # ok 246 /ocp/target-module@53500000
2348 07:23:15.013066 # not ok 247 /ocp/target-module@53500000/aes@0
2349 07:23:15.036037 # ok 248 /ocp/target-module@56000000
2350 07:23:15.140223 # ok 249 /ocp/target-module@56000000/gpu@0 # SKIP
2351 07:23:15.205413 # ok 250 /opp-table # SKIP
2352 07:23:15.279784 # ok 251 /soc # SKIP
2353 07:23:15.300440 # ok 252 /sound
2354 07:23:15.319199 # ok 253 /target-module@4b000000
2355 07:23:15.346574 # ok 254 /target-module@4b000000/target-module@140000
2356 07:23:15.365714 # ok 255 /target-module@4b000000/target-module@140000/pmu@0
2357 07:23:15.373800 # # Totals: pass:118 fail:29 xfail:0 xpass:0 skip:108 error:0
2358 07:23:15.381841 not ok 1 selftests: dt: test_unprobed_devices.sh # exit=1
2359 07:23:17.876078 dt_test_unprobed_devices_sh_ skip
2360 07:23:17.881980 dt_test_unprobed_devices_sh_clk_mcasp0 pass
2361 07:23:17.887243 dt_test_unprobed_devices_sh_clk_mcasp0_fixed skip
2362 07:23:17.887656 dt_test_unprobed_devices_sh_cpus_cpu_0 skip
2363 07:23:17.895860 dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate skip
2364 07:23:17.896248 dt_test_unprobed_devices_sh_fixedregulator0 pass
2365 07:23:17.901997 dt_test_unprobed_devices_sh_leds pass
2366 07:23:17.906986 dt_test_unprobed_devices_sh_ocp pass
2367 07:23:17.911927 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 pass
2368 07:23:17.916728 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 pass
2369 07:23:17.922829 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 pass
2370 07:23:17.927843 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 pass
2371 07:23:17.936475 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 fail
2372 07:23:17.947730 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 pass
2373 07:23:17.953825 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 pass
2374 07:23:17.965192 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 fail
2375 07:23:17.970158 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 skip
2376 07:23:17.980113 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 skip
2377 07:23:17.991185 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 skip
2378 07:23:18.000941 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c skip
2379 07:23:18.012103 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 skip
2380 07:23:18.021948 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c skip
2381 07:23:18.033189 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 skip
2382 07:23:18.043072 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 skip
2383 07:23:18.054175 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 skip
2384 07:23:18.064047 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 skip
2385 07:23:18.070153 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 skip
2386 07:23:18.085073 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 skip
2387 07:23:18.091186 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 skip
2388 07:23:18.101065 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 skip
2389 07:23:18.112051 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 skip
2390 07:23:18.121809 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 skip
2391 07:23:18.132797 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 skip
2392 07:23:18.142503 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 skip
2393 07:23:18.152516 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 skip
2394 07:23:18.158680 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 skip
2395 07:23:18.174511 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 skip
2396 07:23:18.179515 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz skip
2397 07:23:18.195515 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 skip
2398 07:23:18.200545 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k skip
2399 07:23:18.216411 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k skip
2400 07:23:18.226182 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk skip
2401 07:23:18.237314 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 skip
2402 07:23:18.247054 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 skip
2403 07:23:18.258056 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 skip
2404 07:23:18.268043 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 skip
2405 07:23:18.279308 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 skip
2406 07:23:18.294063 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 skip
2407 07:23:18.305056 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 skip
2408 07:23:18.314938 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 skip
2409 07:23:18.325917 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 skip
2410 07:23:18.335787 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 skip
2411 07:23:18.345677 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 skip
2412 07:23:18.361677 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm skip
2413 07:23:18.372673 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac skip
2414 07:23:18.383828 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c skip
2415 07:23:18.393787 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 skip
2416 07:23:18.403648 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk skip
2417 07:23:18.414792 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk skip
2418 07:23:18.424791 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk skip
2419 07:23:18.435923 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk skip
2420 07:23:18.446931 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk skip
2421 07:23:18.456658 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk skip
2422 07:23:18.467690 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 skip
2423 07:23:18.477473 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc skip
2424 07:23:18.488670 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 skip
2425 07:23:18.498384 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 skip
2426 07:23:18.509684 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div skip
2427 07:23:18.519476 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin skip
2428 07:23:18.530680 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 skip
2429 07:23:18.545437 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 skip
2430 07:23:18.556516 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c skip
2431 07:23:18.566274 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 skip
2432 07:23:18.577566 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 skip
2433 07:23:18.587295 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c skip
2434 07:23:18.598270 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 skip
2435 07:23:18.608278 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c skip
2436 07:23:18.619289 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 skip
2437 07:23:18.629311 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 skip
2438 07:23:18.640500 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 skip
2439 07:23:18.650389 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 skip
2440 07:23:18.661473 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 skip
2441 07:23:18.671438 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 skip
2442 07:23:18.682466 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c skip
2443 07:23:18.692379 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 skip
2444 07:23:18.703563 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 skip
2445 07:23:18.713313 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 skip
2446 07:23:18.724270 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c skip
2447 07:23:18.734275 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 skip
2448 07:23:18.745288 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 skip
2449 07:23:18.761379 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 skip
2450 07:23:18.771144 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 skip
2451 07:23:18.782390 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 skip
2452 07:23:18.792096 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 skip
2453 07:23:18.803419 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 pass
2454 07:23:18.813158 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 pass
2455 07:23:18.824166 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 pass
2456 07:23:18.829033 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 pass
2457 07:23:18.838824 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 pass
2458 07:23:18.849905 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 pass
2459 07:23:18.859772 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 pass
2460 07:23:18.866056 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 pass
2461 07:23:18.875766 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 fail
2462 07:23:18.887056 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 pass
2463 07:23:18.896915 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 pass
2464 07:23:18.908153 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 pass
2465 07:23:18.913257 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 fail
2466 07:23:18.929447 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck skip
2467 07:23:18.939405 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck skip
2468 07:23:18.950409 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck skip
2469 07:23:18.965299 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck skip
2470 07:23:18.976281 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck skip
2471 07:23:18.986291 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck skip
2472 07:23:18.997311 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck skip
2473 07:23:19.007304 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck skip
2474 07:23:19.023164 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck skip
2475 07:23:19.034417 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck skip
2476 07:23:19.049296 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 skip
2477 07:23:19.060525 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 skip
2478 07:23:19.070535 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 skip
2479 07:23:19.086666 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 skip
2480 07:23:19.097796 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 skip
2481 07:23:19.107791 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel pass
2482 07:23:19.118929 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 fail
2483 07:23:19.123780 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 fail
2484 07:23:19.137669 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 skip
2485 07:23:19.147271 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 pass
2486 07:23:19.152103 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 fail
2487 07:23:19.163531 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 pass
2488 07:23:19.169782 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 fail
2489 07:23:19.179471 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 pass
2490 07:23:19.190662 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 pass
2491 07:23:19.195531 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 pass
2492 07:23:19.205451 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 pass
2493 07:23:19.211787 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 pass
2494 07:23:19.221808 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 pass
2495 07:23:19.232794 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 pass
2496 07:23:19.242664 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 pass
2497 07:23:19.253742 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 pass
2498 07:23:19.263794 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger fail
2499 07:23:19.268656 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton fail
2500 07:23:19.279787 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 pass
2501 07:23:19.289803 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc fail
2502 07:23:19.296036 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc fail
2503 07:23:19.300898 dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 fail
2504 07:23:19.310903 dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 fail
2505 07:23:19.317296 dt_test_unprobed_devices_sh_ocp_interconnect_48000000 pass
2506 07:23:19.322138 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 pass
2507 07:23:19.327274 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 pass
2508 07:23:19.338428 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 pass
2509 07:23:19.343303 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 pass
2510 07:23:19.353296 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 pass
2511 07:23:19.359434 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 pass
2512 07:23:19.369155 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 pass
2513 07:23:19.380415 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 pass
2514 07:23:19.385291 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 fail
2515 07:23:19.395275 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 skip
2516 07:23:19.401440 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 pass
2517 07:23:19.411403 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 pass
2518 07:23:19.416274 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 pass
2519 07:23:19.427259 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 pass
2520 07:23:19.432110 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 pass
2521 07:23:19.443418 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 pass
2522 07:23:19.448122 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 pass
2523 07:23:19.458162 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 pass
2524 07:23:19.469177 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 pass
2525 07:23:19.474039 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 pass
2526 07:23:19.485302 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 pass
2527 07:23:19.490140 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 pass
2528 07:23:19.499930 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 pass
2529 07:23:19.506051 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 pass
2530 07:23:19.516033 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000 pass
2531 07:23:19.520920 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 pass
2532 07:23:19.532056 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 pass
2533 07:23:19.541925 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 pass
2534 07:23:19.548035 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 pass
2535 07:23:19.553032 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 pass
2536 07:23:19.562781 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 pass
2537 07:23:19.574055 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 pass
2538 07:23:19.583785 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 fail
2539 07:23:19.594806 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 fail
2540 07:23:19.603526 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 fail
2541 07:23:19.614777 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 fail
2542 07:23:19.620915 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 pass
2543 07:23:19.631902 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 pass
2544 07:23:19.637031 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 pass
2545 07:23:19.646778 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 pass
2546 07:23:19.652889 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 pass
2547 07:23:19.663036 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 pass
2548 07:23:19.674040 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 pass
2549 07:23:19.679031 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 pass
2550 07:23:19.688773 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 pass
2551 07:23:19.700051 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 pass
2552 07:23:19.704911 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 pass
2553 07:23:19.715882 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 pass
2554 07:23:19.721016 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 pass
2555 07:23:19.730808 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 pass
2556 07:23:19.736930 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 skip
2557 07:23:19.742037 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 pass
2558 07:23:19.751799 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 pass
2559 07:23:19.762779 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 pass
2560 07:23:19.772677 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 pass
2561 07:23:19.778780 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 pass
2562 07:23:19.788537 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 pass
2563 07:23:19.793553 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 pass
2564 07:23:19.804667 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 fail
2565 07:23:19.809534 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 pass
2566 07:23:19.814544 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 pass
2567 07:23:19.825531 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 pass
2568 07:23:19.830408 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 pass
2569 07:23:19.841421 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 pass
2570 07:23:19.851133 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 pass
2571 07:23:19.856264 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 fail
2572 07:23:19.867525 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 skip
2573 07:23:19.877310 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 fail
2574 07:23:19.888522 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 skip
2575 07:23:19.898299 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 fail
2576 07:23:19.909539 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 fail
2577 07:23:19.914414 dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 fail
2578 07:23:19.919272 dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 fail
2579 07:23:19.925420 dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 skip
2580 07:23:19.930206 dt_test_unprobed_devices_sh_ocp_target-module_40300000 pass
2581 07:23:19.935049 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 pass
2582 07:23:19.946410 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 skip
2583 07:23:19.951244 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 skip
2584 07:23:19.956115 dt_test_unprobed_devices_sh_ocp_target-module_47400000 pass
2585 07:23:19.961039 dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 pass
2586 07:23:19.967274 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 pass
2587 07:23:19.977016 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 pass
2588 07:23:19.981915 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 pass
2589 07:23:19.988258 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 pass
2590 07:23:19.993141 dt_test_unprobed_devices_sh_ocp_target-module_47810000 pass
2591 07:23:19.998031 dt_test_unprobed_devices_sh_ocp_target-module_49000000 pass
2592 07:23:20.003038 dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 pass
2593 07:23:20.009160 dt_test_unprobed_devices_sh_ocp_target-module_49800000 pass
2594 07:23:20.014036 dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 pass
2595 07:23:20.018894 dt_test_unprobed_devices_sh_ocp_target-module_49900000 pass
2596 07:23:20.029817 dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 pass
2597 07:23:20.030208 dt_test_unprobed_devices_sh_ocp_target-module_49a00000 pass
2598 07:23:20.039915 dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 pass
2599 07:23:20.044778 dt_test_unprobed_devices_sh_ocp_target-module_4c000000 pass
2600 07:23:20.050887 dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 fail
2601 07:23:20.055959 dt_test_unprobed_devices_sh_ocp_target-module_50000000 pass
2602 07:23:20.060831 dt_test_unprobed_devices_sh_ocp_target-module_53100000 pass
2603 07:23:20.065741 dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 fail
2604 07:23:20.071841 dt_test_unprobed_devices_sh_ocp_target-module_53500000 pass
2605 07:23:20.077037 dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 fail
2606 07:23:20.081842 dt_test_unprobed_devices_sh_ocp_target-module_56000000 pass
2607 07:23:20.086727 dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 skip
2608 07:23:20.092832 dt_test_unprobed_devices_sh_opp-table skip
2609 07:23:20.098027 dt_test_unprobed_devices_sh_soc skip
2610 07:23:20.098413 dt_test_unprobed_devices_sh_sound pass
2611 07:23:20.102669 dt_test_unprobed_devices_sh_target-module_4b000000 pass
2612 07:23:20.113921 dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 pass
2613 07:23:20.119054 dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 pass
2614 07:23:20.119257 dt_test_unprobed_devices_sh fail
2615 07:23:20.123741 + ../../utils/send-to-lava.sh ./output/result.txt
2616 07:23:20.252865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=pass>
2617 07:23:20.254072 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=pass
2619 07:23:20.436634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip>
2620 07:23:20.437266 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip
2622 07:23:20.694583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass>
2623 07:23:20.695212 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass
2625 07:23:20.883951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip>
2626 07:23:20.884577 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip
2628 07:23:21.060086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip>
2629 07:23:21.060708 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip
2631 07:23:21.253798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip>
2632 07:23:21.254427 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip
2634 07:23:21.438782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass>
2635 07:23:21.439418 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass
2637 07:23:21.620563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass>
2638 07:23:21.621195 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass
2640 07:23:21.821319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass>
2641 07:23:21.821942 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass
2643 07:23:22.031787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass>
2644 07:23:22.032411 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass
2646 07:23:22.215150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass>
2647 07:23:22.215789 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass
2649 07:23:22.405903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass>
2650 07:23:22.406529 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass
2652 07:23:22.585062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass>
2653 07:23:22.585687 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass
2655 07:23:22.765628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail>
2656 07:23:22.766256 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail
2658 07:23:22.943380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass>
2659 07:23:22.944034 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass
2661 07:23:23.116373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass>
2662 07:23:23.116994 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass
2664 07:23:23.289241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail>
2665 07:23:23.289863 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail
2667 07:23:23.466624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip>
2668 07:23:23.467249 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip
2670 07:23:23.643877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip>
2671 07:23:23.644501 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip
2673 07:23:23.812985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip>
2674 07:23:23.813611 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip
2676 07:23:24.002817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip>
2677 07:23:24.003449 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip
2679 07:23:24.199486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip>
2680 07:23:24.200137 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip
2682 07:23:24.373730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip>
2683 07:23:24.374355 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip
2685 07:23:24.540536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip>
2686 07:23:24.541165 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip
2688 07:23:24.723626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip>
2689 07:23:24.724253 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip
2691 07:23:24.918972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip>
2692 07:23:24.919596 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip
2694 07:23:25.128004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip>
2695 07:23:25.128632 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip
2697 07:23:25.327647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip>
2698 07:23:25.328279 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip
2700 07:23:25.524208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip>
2701 07:23:25.524835 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip
2703 07:23:25.733474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip>
2704 07:23:25.734104 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip
2706 07:23:25.937184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip>
2707 07:23:25.937808 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip
2709 07:23:26.112594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip>
2710 07:23:26.113226 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip
2712 07:23:26.282455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip>
2713 07:23:26.283087 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip
2715 07:23:26.456675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip>
2716 07:23:26.457304 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip
2718 07:23:26.623475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip>
2719 07:23:26.624129 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip
2721 07:23:26.795578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip>
2722 07:23:26.796226 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip
2724 07:23:26.986469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip>
2725 07:23:26.987100 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip
2727 07:23:27.166944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip>
2728 07:23:27.167573 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip
2730 07:23:27.350846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip>
2731 07:23:27.351473 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip
2733 07:23:27.524799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip>
2734 07:23:27.525427 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip
2736 07:23:27.701212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip>
2737 07:23:27.701839 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip
2739 07:23:27.876685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip>
2740 07:23:27.877312 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip
2742 07:23:28.068913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip>
2743 07:23:28.069539 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip
2745 07:23:28.280281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip>
2746 07:23:28.280904 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip
2748 07:23:28.460069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip>
2749 07:23:28.460693 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip
2751 07:23:28.652235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip>
2752 07:23:28.652860 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip
2754 07:23:28.841488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip>
2755 07:23:28.842109 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip
2757 07:23:29.018254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip>
2758 07:23:29.018879 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip
2760 07:23:29.199976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip>
2761 07:23:29.200598 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip
2763 07:23:29.394529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip>
2764 07:23:29.395155 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip
2766 07:23:29.581528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip>
2767 07:23:29.582152 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip
2769 07:23:29.764657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip>
2770 07:23:29.765280 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip
2772 07:23:29.936026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip>
2773 07:23:29.936651 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip
2775 07:23:30.118717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip>
2776 07:23:30.119343 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip
2778 07:23:30.337656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip>
2779 07:23:30.338277 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip
2781 07:23:30.498528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip>
2782 07:23:30.499156 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip
2784 07:23:30.675039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip>
2785 07:23:30.675683 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip
2787 07:23:30.848516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip>
2788 07:23:30.849146 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip
2790 07:23:31.019798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip>
2791 07:23:31.020427 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip
2793 07:23:31.219529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip>
2794 07:23:31.220179 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip
2796 07:23:31.396764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip>
2797 07:23:31.397390 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip
2799 07:23:31.566794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip>
2800 07:23:31.567421 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip
2802 07:23:31.742240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip>
2803 07:23:31.742866 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip
2805 07:23:31.914561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip>
2806 07:23:31.915188 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip
2808 07:23:32.087863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip>
2809 07:23:32.088491 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip
2811 07:23:32.269543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip>
2812 07:23:32.270174 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip
2814 07:23:32.459700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip>
2815 07:23:32.460332 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip
2817 07:23:32.660448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip>
2818 07:23:32.660817 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip
2820 07:23:32.837494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip>
2821 07:23:32.838126 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip
2823 07:23:33.003237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip>
2824 07:23:33.003886 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip
2826 07:23:33.166123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip>
2827 07:23:33.166748 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip
2829 07:23:33.351745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip>
2830 07:23:33.352373 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip
2832 07:23:33.529739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip>
2833 07:23:33.530367 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip
2835 07:23:33.724099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip>
2836 07:23:33.724722 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip
2838 07:23:33.899654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip>
2839 07:23:33.900280 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip
2841 07:23:34.109744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip>
2842 07:23:34.110368 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip
2844 07:23:34.275740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip>
2845 07:23:34.276366 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip
2847 07:23:34.461874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip>
2848 07:23:34.462498 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip
2850 07:23:34.639138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip>
2851 07:23:34.639720 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip
2853 07:23:34.805208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip>
2854 07:23:34.805833 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip
2856 07:23:35.017782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip>
2857 07:23:35.018406 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip
2859 07:23:35.220561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip>
2860 07:23:35.221177 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip
2862 07:23:35.397967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip>
2863 07:23:35.398590 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip
2865 07:23:35.620674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip>
2866 07:23:35.621304 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip
2868 07:23:35.806575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip>
2869 07:23:35.807202 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip
2871 07:23:36.000635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip>
2872 07:23:36.001268 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip
2874 07:23:36.201444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip>
2875 07:23:36.202073 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip
2877 07:23:36.397745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip>
2878 07:23:36.398169 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip
2880 07:23:36.561666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip>
2881 07:23:36.562302 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip
2883 07:23:36.740382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip>
2884 07:23:36.741021 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip
2886 07:23:36.921090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip>
2887 07:23:36.921720 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip
2889 07:23:37.096363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip>
2890 07:23:37.096992 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip
2892 07:23:37.276890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip>
2893 07:23:37.277520 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip
2895 07:23:37.468140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip>
2896 07:23:37.468770 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip
2898 07:23:37.693664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip>
2899 07:23:37.694297 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip
2901 07:23:37.876149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass>
2902 07:23:37.876781 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass
2904 07:23:38.077882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass>
2905 07:23:38.078508 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass
2907 07:23:38.265777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass>
2908 07:23:38.266402 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass
2910 07:23:38.435790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass>
2911 07:23:38.436411 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass
2913 07:23:38.629096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass>
2914 07:23:38.629720 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass
2916 07:23:38.810690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass>
2917 07:23:38.811314 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass
2919 07:23:38.984049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass>
2920 07:23:38.984670 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass
2922 07:23:39.149735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass>
2923 07:23:39.150360 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass
2925 07:23:39.321716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail>
2926 07:23:39.322346 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail
2928 07:23:39.477953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass>
2929 07:23:39.478574 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass
2931 07:23:39.656447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass>
2932 07:23:39.657070 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass
2934 07:23:39.833709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass>
2935 07:23:39.834337 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass
2937 07:23:40.025982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail>
2938 07:23:40.026605 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail
2940 07:23:40.224972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip>
2941 07:23:40.225603 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip
2943 07:23:40.400682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip>
2944 07:23:40.401307 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip
2946 07:23:40.589762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip>
2947 07:23:40.590383 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip
2949 07:23:40.769631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip>
2950 07:23:40.770257 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip
2952 07:23:40.986598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip>
2953 07:23:40.987228 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip
2955 07:23:41.217872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip>
2956 07:23:41.218496 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip
2958 07:23:41.411412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip>
2959 07:23:41.411830 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip
2961 07:23:41.586884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip>
2962 07:23:41.587511 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip
2964 07:23:41.771064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip>
2965 07:23:41.771691 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip
2967 07:23:41.940329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip>
2968 07:23:41.940956 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip
2970 07:23:42.149942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip>
2971 07:23:42.150567 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip
2973 07:23:42.347801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip>
2974 07:23:42.348428 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip
2976 07:23:42.543818 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip
2978 07:23:42.547947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip>
2979 07:23:42.730759 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip
2981 07:23:42.732620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip>
2982 07:23:42.889482 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip
2984 07:23:42.892470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip>
2985 07:23:43.058274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass>
2986 07:23:43.058901 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass
2988 07:23:43.230430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail>
2989 07:23:43.231058 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail
2991 07:23:43.446693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail>
2992 07:23:43.447315 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail
2994 07:23:43.633394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip>
2995 07:23:43.634014 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip
2997 07:23:43.806640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass>
2998 07:23:43.807260 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass
3000 07:23:43.988927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail>
3001 07:23:43.989547 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail
3003 07:23:44.172555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass>
3004 07:23:44.173177 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass
3006 07:23:44.367690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail>
3007 07:23:44.368313 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail
3009 07:23:44.557565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass>
3010 07:23:44.558186 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass
3012 07:23:44.735773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass>
3013 07:23:44.736394 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass
3015 07:23:44.917945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass>
3016 07:23:44.918566 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass
3018 07:23:45.111084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass>
3019 07:23:45.111695 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass
3021 07:23:45.305383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass>
3022 07:23:45.306004 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass
3024 07:23:45.490873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass>
3025 07:23:45.491493 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass
3027 07:23:45.691651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass>
3028 07:23:45.692273 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass
3030 07:23:45.897665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass>
3031 07:23:45.898288 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass
3033 07:23:46.081363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass>
3034 07:23:46.081988 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass
3036 07:23:46.266878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail>
3037 07:23:46.267502 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail
3039 07:23:46.441372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail>
3040 07:23:46.441995 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail
3042 07:23:46.607043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass>
3043 07:23:46.607682 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass
3045 07:23:46.808536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc RESULT=fail>
3046 07:23:46.809168 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc RESULT=fail
3048 07:23:46.988034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc RESULT=fail>
3049 07:23:46.988655 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc RESULT=fail
3051 07:23:47.175413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail>
3052 07:23:47.176072 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail
3054 07:23:47.356328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail>
3055 07:23:47.356952 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail
3057 07:23:47.538365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass>
3058 07:23:47.538987 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass
3060 07:23:47.739670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass>
3061 07:23:47.740245 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass
3063 07:23:47.933511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass>
3064 07:23:47.934135 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass
3066 07:23:48.115908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass>
3067 07:23:48.116529 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass
3069 07:23:48.285640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass>
3070 07:23:48.286259 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass
3072 07:23:48.447017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass>
3073 07:23:48.447656 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass
3075 07:23:48.630260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass>
3076 07:23:48.630881 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass
3078 07:23:48.814762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass>
3079 07:23:48.815381 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass
3081 07:23:48.985209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass>
3082 07:23:48.985826 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass
3084 07:23:49.156965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail>
3085 07:23:49.157586 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail
3087 07:23:49.340384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip>
3088 07:23:49.341007 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip
3090 07:23:49.531237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass>
3091 07:23:49.531878 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass
3093 07:23:49.728765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass>
3094 07:23:49.729382 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass
3096 07:23:49.900701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass>
3097 07:23:49.901319 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass
3099 07:23:50.099883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass>
3100 07:23:50.100503 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass
3102 07:23:50.264457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass>
3103 07:23:50.265078 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass
3105 07:23:50.438625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass>
3106 07:23:50.439247 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass
3108 07:23:50.607263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass>
3109 07:23:50.607913 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass
3111 07:23:50.775912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass>
3112 07:23:50.776535 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass
3114 07:23:50.982728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass>
3115 07:23:50.983351 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass
3117 07:23:51.158713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass>
3118 07:23:51.159338 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass
3120 07:23:51.329489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass>
3121 07:23:51.330112 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass
3123 07:23:51.500089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass>
3124 07:23:51.500714 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass
3126 07:23:51.666691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass>
3127 07:23:51.667312 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass
3129 07:23:51.841721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass>
3130 07:23:51.842343 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass
3132 07:23:52.073556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000 RESULT=pass>
3133 07:23:52.074177 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000 RESULT=pass
3135 07:23:52.252790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass>
3136 07:23:52.253412 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass
3138 07:23:52.442542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass>
3139 07:23:52.443165 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass
3141 07:23:52.658877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass>
3142 07:23:52.659514 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass
3144 07:23:52.825550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass>
3145 07:23:52.826178 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass
3147 07:23:52.996306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass>
3148 07:23:52.996928 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass
3150 07:23:53.167073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass>
3151 07:23:53.167691 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass
3153 07:23:53.385679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass>
3154 07:23:53.386305 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass
3156 07:23:53.576803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail>
3157 07:23:53.577428 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail
3159 07:23:53.752066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail>
3160 07:23:53.752693 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail
3162 07:23:53.936784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail>
3163 07:23:53.937409 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail
3165 07:23:54.120530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail>
3166 07:23:54.121156 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail
3168 07:23:54.302772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass>
3169 07:23:54.303394 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass
3171 07:23:54.485414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass>
3172 07:23:54.486039 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass
3174 07:23:54.677413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass>
3175 07:23:54.678039 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass
3177 07:23:54.869210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass>
3178 07:23:54.869835 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass
3180 07:23:55.061351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass>
3181 07:23:55.061975 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass
3183 07:23:55.239637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass>
3184 07:23:55.240265 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass
3186 07:23:55.410528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass>
3187 07:23:55.411154 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass
3189 07:23:55.594263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass>
3190 07:23:55.594886 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass
3192 07:23:55.750357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass>
3193 07:23:55.750981 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass
3195 07:23:55.909629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass>
3196 07:23:55.910251 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass
3198 07:23:56.069752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass>
3199 07:23:56.070375 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass
3201 07:23:56.268902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass>
3202 07:23:56.269522 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass
3204 07:23:56.440648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass>
3205 07:23:56.441267 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass
3207 07:23:56.614643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass>
3208 07:23:56.615263 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass
3210 07:23:56.794652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip>
3211 07:23:56.795275 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip
3213 07:23:56.968470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass>
3214 07:23:56.969090 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass
3216 07:23:57.154146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass>
3217 07:23:57.154768 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass
3219 07:23:57.376751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass>
3220 07:23:57.377375 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass
3222 07:23:57.538238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass>
3223 07:23:57.538863 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass
3225 07:23:57.695380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass>
3226 07:23:57.695960 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass
3228 07:23:57.864998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass>
3229 07:23:57.865622 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass
3231 07:23:58.036743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass>
3232 07:23:58.037364 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass
3234 07:23:58.225631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail>
3235 07:23:58.226256 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail
3237 07:23:58.397085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass>
3238 07:23:58.397711 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass
3240 07:23:58.577252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass>
3241 07:23:58.577877 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass
3243 07:23:58.752226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass>
3244 07:23:58.752849 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass
3246 07:23:58.917590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass>
3247 07:23:58.918215 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass
3249 07:23:59.098506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass>
3250 07:23:59.099131 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass
3252 07:23:59.286102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass>
3253 07:23:59.286725 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass
3255 07:23:59.479254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail>
3256 07:23:59.479900 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail
3258 07:23:59.655456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip>
3259 07:23:59.656113 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip
3261 07:23:59.848910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail>
3262 07:23:59.849540 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail
3264 07:24:00.030682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip>
3265 07:24:00.031308 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip
3267 07:24:00.214624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail>
3268 07:24:00.215249 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail
3270 07:24:00.405453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail>
3271 07:24:00.406081 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail
3273 07:24:00.585477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail>
3274 07:24:00.586098 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail
3276 07:24:00.769494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail>
3277 07:24:00.770116 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail
3279 07:24:00.944167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip>
3280 07:24:00.944788 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip
3282 07:24:01.122049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass>
3283 07:24:01.122674 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass
3285 07:24:01.285318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass>
3286 07:24:01.285944 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass
3288 07:24:01.466491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip>
3289 07:24:01.467112 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip
3291 07:24:01.673299 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip
3293 07:24:01.676286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip>
3294 07:24:01.843282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass>
3295 07:24:01.843935 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass
3297 07:24:02.012945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass>
3298 07:24:02.013570 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass
3300 07:24:02.194075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass>
3301 07:24:02.194701 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass
3303 07:24:02.366690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass>
3304 07:24:02.367315 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass
3306 07:24:02.558281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass>
3307 07:24:02.558904 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass
3309 07:24:02.736285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass>
3310 07:24:02.736907 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass
3312 07:24:02.925535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass>
3313 07:24:02.926161 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass
3315 07:24:03.111650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass>
3316 07:24:03.112274 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass
3318 07:24:03.286429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass>
3319 07:24:03.287056 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass
3321 07:24:03.470514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass>
3322 07:24:03.471140 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass
3324 07:24:03.670384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass>
3325 07:24:03.671005 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass
3327 07:24:03.844921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass>
3328 07:24:03.845549 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass
3330 07:24:04.030292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass>
3331 07:24:04.030917 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass
3333 07:24:04.210372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass>
3334 07:24:04.210994 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass
3336 07:24:04.388231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass>
3337 07:24:04.388858 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass
3339 07:24:04.560627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass>
3340 07:24:04.561251 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass
3342 07:24:04.737431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail>
3343 07:24:04.738059 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail
3345 07:24:04.912144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass>
3346 07:24:04.912766 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass
3348 07:24:05.092007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass>
3349 07:24:05.092631 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass
3351 07:24:05.266517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail>
3352 07:24:05.267136 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail
3354 07:24:05.479153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass>
3355 07:24:05.479780 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass
3357 07:24:05.655160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail>
3358 07:24:05.655782 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail
3360 07:24:05.835994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass>
3361 07:24:05.836619 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass
3363 07:24:06.025534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip>
3364 07:24:06.026156 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip
3366 07:24:06.207403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip>
3367 07:24:06.208056 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip
3369 07:24:06.397480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip>
3370 07:24:06.398098 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip
3372 07:24:06.607785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass>
3373 07:24:06.608407 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass
3375 07:24:06.816223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass>
3376 07:24:06.816842 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass
3378 07:24:06.998369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass>
3379 07:24:06.998990 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass
3381 07:24:07.181620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass>
3382 07:24:07.182243 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass
3384 07:24:07.360888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail>
3385 07:24:07.361277 + set +x
3386 07:24:07.361830 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail
3388 07:24:07.365263 <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 1189987_1.6.2.4.5>
3389 07:24:07.365885 Received signal: <ENDRUN> 1_kselftest-dt 1189987_1.6.2.4.5
3390 07:24:07.366238 Ending use of test pattern.
3391 07:24:07.366548 Ending test lava.1_kselftest-dt (1189987_1.6.2.4.5), duration 218.58
3393 07:24:07.409233 <LAVA_TEST_RUNNER EXIT>
3394 07:24:07.409856 ok: lava_test_shell seems to have completed
3395 07:24:07.417639 dt_test_unprobed_devices_sh: fail
dt_test_unprobed_devices_sh_: skip
dt_test_unprobed_devices_sh_clk_mcasp0: pass
dt_test_unprobed_devices_sh_clk_mcasp0_fixed: skip
dt_test_unprobed_devices_sh_cpus_cpu_0: skip
dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate: skip
dt_test_unprobed_devices_sh_fixedregulator0: pass
dt_test_unprobed_devices_sh_leds: pass
dt_test_unprobed_devices_sh_ocp: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0: fail
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_adc: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000_tscadc_0_tsc: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_80000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000: skip
dt_test_unprobed_devices_sh_ocp_target-module_47400000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800: pass
dt_test_unprobed_devices_sh_ocp_target-module_47810000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_50000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_53500000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_56000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0: skip
dt_test_unprobed_devices_sh_opp-table: skip
dt_test_unprobed_devices_sh_soc: skip
dt_test_unprobed_devices_sh_sound: pass
dt_test_unprobed_devices_sh_target-module_4b000000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0: pass
shardfile-dt: pass
3396 07:24:07.419078 end: 3.1 lava-test-shell (duration 00:03:40) [common]
3397 07:24:07.419505 end: 3 lava-test-retry (duration 00:03:40) [common]
3398 07:24:07.419947 start: 4 finalize (timeout 00:03:07) [common]
3399 07:24:07.420369 start: 4.1 power-off (timeout 00:00:30) [common]
3400 07:24:07.420861 Calling: 'drpm' 'lf-bbb' 'off'
3401 07:24:07.801381 >> OFF
3402 07:24:07.802718 Returned 0 in 0 seconds
3403 07:24:07.903716 end: 4.1 power-off (duration 00:00:00) [common]
3405 07:24:07.904874 start: 4.2 read-feedback (timeout 00:03:06) [common]
3406 07:24:07.905732 Listened to connection for namespace 'common' for up to 1s
3407 07:24:07.906421 Listened to connection for namespace 'common' for up to 1s
3408 07:24:08.905822 Finalising connection for namespace 'common'
3409 07:24:08.906040 Disconnecting from shell: Finalise
3410 07:24:08.906203 / #
3411 07:24:09.006738 end: 4.2 read-feedback (duration 00:00:01) [common]
3412 07:24:09.007261 end: 4 finalize (duration 00:00:02) [common]
3413 07:24:09.007729 Cleaning after the job
3414 07:24:09.008052 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/ramdisk
3415 07:24:09.013219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/kernel
3416 07:24:09.017214 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/dtb
3417 07:24:09.017947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/nfsrootfs
3418 07:24:09.118310 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1189987/tftp-deploy-t_2g7ikq/modules
3419 07:24:09.123024 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/1189987
3420 07:24:10.251544 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/1189987
3421 07:24:10.252025 Job finished correctly