Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 06:33:50.788782 lava-dispatcher, installed at version: 2024.01
2 06:33:50.789602 start: 0 validate
3 06:33:50.790121 Start time: 2024-09-06 06:33:50.790089+00:00 (UTC)
4 06:33:50.790702 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 06:33:50.791229 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 06:33:50.832630 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 06:33:50.833245 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-16%2Fkernel%2FImage exists
8 06:33:50.870065 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 06:33:50.870697 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 06:33:50.904146 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 06:33:50.904644 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 06:33:50.938587 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 06:33:50.939061 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-16%2Fmodules.tar.xz exists
14 06:33:50.983462 validate duration: 0.19
16 06:33:50.984970 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 06:33:50.985597 start: 1.1 download-retry (timeout 00:10:00) [common]
18 06:33:50.986172 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 06:33:50.987158 Not decompressing ramdisk as can be used compressed.
20 06:33:50.987863 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 06:33:50.988418 saving as /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/ramdisk/initrd.cpio.gz
22 06:33:50.988930 total size: 5628182 (5 MB)
23 06:33:51.032536 progress 0 % (0 MB)
24 06:33:51.040093 progress 5 % (0 MB)
25 06:33:51.047874 progress 10 % (0 MB)
26 06:33:51.054720 progress 15 % (0 MB)
27 06:33:51.059359 progress 20 % (1 MB)
28 06:33:51.062961 progress 25 % (1 MB)
29 06:33:51.066971 progress 30 % (1 MB)
30 06:33:51.071020 progress 35 % (1 MB)
31 06:33:51.074655 progress 40 % (2 MB)
32 06:33:51.078642 progress 45 % (2 MB)
33 06:33:51.082196 progress 50 % (2 MB)
34 06:33:51.086100 progress 55 % (2 MB)
35 06:33:51.090085 progress 60 % (3 MB)
36 06:33:51.093651 progress 65 % (3 MB)
37 06:33:51.097566 progress 70 % (3 MB)
38 06:33:51.101283 progress 75 % (4 MB)
39 06:33:51.105207 progress 80 % (4 MB)
40 06:33:51.108609 progress 85 % (4 MB)
41 06:33:51.112235 progress 90 % (4 MB)
42 06:33:51.115818 progress 95 % (5 MB)
43 06:33:51.119061 progress 100 % (5 MB)
44 06:33:51.119715 5 MB downloaded in 0.13 s (41.05 MB/s)
45 06:33:51.120280 end: 1.1.1 http-download (duration 00:00:00) [common]
47 06:33:51.121175 end: 1.1 download-retry (duration 00:00:00) [common]
48 06:33:51.121465 start: 1.2 download-retry (timeout 00:10:00) [common]
49 06:33:51.121734 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 06:33:51.122207 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-16/kernel/Image
51 06:33:51.122484 saving as /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/kernel/Image
52 06:33:51.122701 total size: 39021056 (37 MB)
53 06:33:51.122913 No compression specified
54 06:33:51.163361 progress 0 % (0 MB)
55 06:33:51.187162 progress 5 % (1 MB)
56 06:33:51.210941 progress 10 % (3 MB)
57 06:33:51.234409 progress 15 % (5 MB)
58 06:33:51.258202 progress 20 % (7 MB)
59 06:33:51.281756 progress 25 % (9 MB)
60 06:33:51.305834 progress 30 % (11 MB)
61 06:33:51.329526 progress 35 % (13 MB)
62 06:33:51.353051 progress 40 % (14 MB)
63 06:33:51.376210 progress 45 % (16 MB)
64 06:33:51.399839 progress 50 % (18 MB)
65 06:33:51.423564 progress 55 % (20 MB)
66 06:33:51.447033 progress 60 % (22 MB)
67 06:33:51.470582 progress 65 % (24 MB)
68 06:33:51.493623 progress 70 % (26 MB)
69 06:33:51.517455 progress 75 % (27 MB)
70 06:33:51.540465 progress 80 % (29 MB)
71 06:33:51.563862 progress 85 % (31 MB)
72 06:33:51.586836 progress 90 % (33 MB)
73 06:33:51.610623 progress 95 % (35 MB)
74 06:33:51.632943 progress 100 % (37 MB)
75 06:33:51.633729 37 MB downloaded in 0.51 s (72.82 MB/s)
76 06:33:51.634247 end: 1.2.1 http-download (duration 00:00:01) [common]
78 06:33:51.635103 end: 1.2 download-retry (duration 00:00:01) [common]
79 06:33:51.635406 start: 1.3 download-retry (timeout 00:09:59) [common]
80 06:33:51.635687 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 06:33:51.636203 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 06:33:51.636482 saving as /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 06:33:51.636698 total size: 53173 (0 MB)
84 06:33:51.636913 No compression specified
85 06:33:51.675562 progress 61 % (0 MB)
86 06:33:51.677040 progress 100 % (0 MB)
87 06:33:51.678007 0 MB downloaded in 0.04 s (1.23 MB/s)
88 06:33:51.678827 end: 1.3.1 http-download (duration 00:00:00) [common]
90 06:33:51.680297 end: 1.3 download-retry (duration 00:00:00) [common]
91 06:33:51.680574 start: 1.4 download-retry (timeout 00:09:59) [common]
92 06:33:51.680838 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 06:33:51.681309 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 06:33:51.681555 saving as /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/nfsrootfs/full.rootfs.tar
95 06:33:51.681759 total size: 107552908 (102 MB)
96 06:33:51.681971 Using unxz to decompress xz
97 06:33:51.716895 progress 0 % (0 MB)
98 06:33:52.368086 progress 5 % (5 MB)
99 06:33:53.098313 progress 10 % (10 MB)
100 06:33:53.818491 progress 15 % (15 MB)
101 06:33:54.572924 progress 20 % (20 MB)
102 06:33:55.144727 progress 25 % (25 MB)
103 06:33:55.764275 progress 30 % (30 MB)
104 06:33:56.498127 progress 35 % (35 MB)
105 06:33:56.845663 progress 40 % (41 MB)
106 06:33:57.275338 progress 45 % (46 MB)
107 06:33:57.967786 progress 50 % (51 MB)
108 06:33:58.649826 progress 55 % (56 MB)
109 06:33:59.403900 progress 60 % (61 MB)
110 06:34:00.160688 progress 65 % (66 MB)
111 06:34:00.898317 progress 70 % (71 MB)
112 06:34:01.666226 progress 75 % (76 MB)
113 06:34:02.341714 progress 80 % (82 MB)
114 06:34:03.047039 progress 85 % (87 MB)
115 06:34:03.776086 progress 90 % (92 MB)
116 06:34:04.493976 progress 95 % (97 MB)
117 06:34:05.247023 progress 100 % (102 MB)
118 06:34:05.258835 102 MB downloaded in 13.58 s (7.55 MB/s)
119 06:34:05.259719 end: 1.4.1 http-download (duration 00:00:14) [common]
121 06:34:05.261412 end: 1.4 download-retry (duration 00:00:14) [common]
122 06:34:05.261944 start: 1.5 download-retry (timeout 00:09:46) [common]
123 06:34:05.262471 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 06:34:05.263273 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-16/modules.tar.xz
125 06:34:05.263740 saving as /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/modules/modules.tar
126 06:34:05.264195 total size: 11617708 (11 MB)
127 06:34:05.264630 Using unxz to decompress xz
128 06:34:05.310956 progress 0 % (0 MB)
129 06:34:05.377248 progress 5 % (0 MB)
130 06:34:05.460627 progress 10 % (1 MB)
131 06:34:05.544770 progress 15 % (1 MB)
132 06:34:05.626366 progress 20 % (2 MB)
133 06:34:05.707879 progress 25 % (2 MB)
134 06:34:05.788301 progress 30 % (3 MB)
135 06:34:05.866368 progress 35 % (3 MB)
136 06:34:05.943252 progress 40 % (4 MB)
137 06:34:06.029542 progress 45 % (5 MB)
138 06:34:06.111137 progress 50 % (5 MB)
139 06:34:06.194180 progress 55 % (6 MB)
140 06:34:06.273350 progress 60 % (6 MB)
141 06:34:06.360480 progress 65 % (7 MB)
142 06:34:06.442313 progress 70 % (7 MB)
143 06:34:06.521836 progress 75 % (8 MB)
144 06:34:06.615926 progress 80 % (8 MB)
145 06:34:06.715631 progress 85 % (9 MB)
146 06:34:06.791477 progress 90 % (10 MB)
147 06:34:06.868800 progress 95 % (10 MB)
148 06:34:06.946135 progress 100 % (11 MB)
149 06:34:06.958942 11 MB downloaded in 1.69 s (6.54 MB/s)
150 06:34:06.959693 end: 1.5.1 http-download (duration 00:00:02) [common]
152 06:34:06.961565 end: 1.5 download-retry (duration 00:00:02) [common]
153 06:34:06.962159 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 06:34:06.962745 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 06:34:16.901988 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/714749/extract-nfsrootfs-g52pdyy4
156 06:34:16.902602 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 06:34:16.902936 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 06:34:16.903661 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_
159 06:34:16.904198 makedir: /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin
160 06:34:16.904604 makedir: /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/tests
161 06:34:16.904995 makedir: /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/results
162 06:34:16.905375 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-add-keys
163 06:34:16.905999 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-add-sources
164 06:34:16.906598 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-background-process-start
165 06:34:16.907223 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-background-process-stop
166 06:34:16.907864 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-common-functions
167 06:34:16.908494 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-echo-ipv4
168 06:34:16.909090 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-install-packages
169 06:34:16.909688 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-installed-packages
170 06:34:16.910280 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-os-build
171 06:34:16.910873 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-probe-channel
172 06:34:16.911483 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-probe-ip
173 06:34:16.912099 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-target-ip
174 06:34:16.912767 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-target-mac
175 06:34:16.913363 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-target-storage
176 06:34:16.913960 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-case
177 06:34:16.914573 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-event
178 06:34:16.915163 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-feedback
179 06:34:16.915747 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-raise
180 06:34:16.916353 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-reference
181 06:34:16.916890 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-runner
182 06:34:16.917395 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-set
183 06:34:16.917897 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-test-shell
184 06:34:16.918420 Updating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-install-packages (oe)
185 06:34:16.918979 Updating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/bin/lava-installed-packages (oe)
186 06:34:16.919449 Creating /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/environment
187 06:34:16.919865 LAVA metadata
188 06:34:16.920183 - LAVA_JOB_ID=714749
189 06:34:16.920405 - LAVA_DISPATCHER_IP=192.168.6.2
190 06:34:16.920789 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 06:34:16.921809 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 06:34:16.922146 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 06:34:16.922360 skipped lava-vland-overlay
194 06:34:16.922605 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 06:34:16.922862 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 06:34:16.923084 skipped lava-multinode-overlay
197 06:34:16.923328 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 06:34:16.923581 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 06:34:16.923838 Loading test definitions
200 06:34:16.924165 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 06:34:16.924395 Using /lava-714749 at stage 0
202 06:34:16.925664 uuid=714749_1.6.2.4.1 testdef=None
203 06:34:16.925998 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 06:34:16.926264 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 06:34:16.928127 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 06:34:16.928936 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 06:34:16.931268 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 06:34:16.932149 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 06:34:16.934400 runner path: /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/0/tests/0_dmesg test_uuid 714749_1.6.2.4.1
212 06:34:16.934996 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 06:34:16.935771 Creating lava-test-runner.conf files
215 06:34:16.935974 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/714749/lava-overlay-cmoag5s_/lava-714749/0 for stage 0
216 06:34:16.936455 - 0_dmesg
217 06:34:16.936835 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 06:34:16.937119 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 06:34:16.959582 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 06:34:16.960060 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 06:34:16.960337 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 06:34:16.960613 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 06:34:16.960877 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 06:34:17.662047 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 06:34:17.662514 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 06:34:17.662786 extracting modules file /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714749/extract-nfsrootfs-g52pdyy4
227 06:34:19.052529 extracting modules file /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714749/extract-overlay-ramdisk-pe38tz6r/ramdisk
228 06:34:20.545605 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 06:34:20.546084 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 06:34:20.546382 [common] Applying overlay to NFS
231 06:34:20.546608 [common] Applying overlay /var/lib/lava/dispatcher/tmp/714749/compress-overlay-vob6ql6f/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/714749/extract-nfsrootfs-g52pdyy4
232 06:34:20.576441 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 06:34:20.576878 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 06:34:20.577175 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 06:34:20.577422 Converting downloaded kernel to a uImage
236 06:34:20.577747 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/kernel/Image /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/kernel/uImage
237 06:34:21.019662 output: Image Name:
238 06:34:21.020114 output: Created: Fri Sep 6 06:34:20 2024
239 06:34:21.020344 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 06:34:21.020558 output: Data Size: 39021056 Bytes = 38106.50 KiB = 37.21 MiB
241 06:34:21.020763 output: Load Address: 01080000
242 06:34:21.020967 output: Entry Point: 01080000
243 06:34:21.021171 output:
244 06:34:21.021508 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 06:34:21.021784 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 06:34:21.022060 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 06:34:21.022323 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 06:34:21.022589 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 06:34:21.022851 Building ramdisk /var/lib/lava/dispatcher/tmp/714749/extract-overlay-ramdisk-pe38tz6r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/714749/extract-overlay-ramdisk-pe38tz6r/ramdisk
250 06:34:23.360682 >> 171817 blocks
251 06:34:30.947385 Adding RAMdisk u-boot header.
252 06:34:30.947800 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/714749/extract-overlay-ramdisk-pe38tz6r/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/714749/extract-overlay-ramdisk-pe38tz6r/ramdisk.cpio.gz.uboot
253 06:34:31.212410 output: Image Name:
254 06:34:31.212799 output: Created: Fri Sep 6 06:34:30 2024
255 06:34:31.213017 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 06:34:31.213226 output: Data Size: 23946563 Bytes = 23385.32 KiB = 22.84 MiB
257 06:34:31.213429 output: Load Address: 00000000
258 06:34:31.213630 output: Entry Point: 00000000
259 06:34:31.213830 output:
260 06:34:31.214383 rename /var/lib/lava/dispatcher/tmp/714749/extract-overlay-ramdisk-pe38tz6r/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot
261 06:34:31.214796 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 06:34:31.215081 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 06:34:31.215356 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 06:34:31.215596 No LXC device requested
265 06:34:31.215851 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 06:34:31.216291 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 06:34:31.216796 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 06:34:31.217207 Checking files for TFTP limit of 4294967296 bytes.
269 06:34:31.219887 end: 1 tftp-deploy (duration 00:00:40) [common]
270 06:34:31.220495 start: 2 uboot-action (timeout 00:05:00) [common]
271 06:34:31.221017 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 06:34:31.221510 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 06:34:31.222014 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 06:34:31.222539 Using kernel file from prepare-kernel: 714749/tftp-deploy-qv8dhgj2/kernel/uImage
275 06:34:31.223167 substitutions:
276 06:34:31.223574 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 06:34:31.224002 - {DTB_ADDR}: 0x01070000
278 06:34:31.224410 - {DTB}: 714749/tftp-deploy-qv8dhgj2/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 06:34:31.224809 - {INITRD}: 714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot
280 06:34:31.225206 - {KERNEL_ADDR}: 0x01080000
281 06:34:31.225599 - {KERNEL}: 714749/tftp-deploy-qv8dhgj2/kernel/uImage
282 06:34:31.225992 - {LAVA_MAC}: None
283 06:34:31.226422 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/714749/extract-nfsrootfs-g52pdyy4
284 06:34:31.226819 - {NFS_SERVER_IP}: 192.168.6.2
285 06:34:31.227207 - {PRESEED_CONFIG}: None
286 06:34:31.227596 - {PRESEED_LOCAL}: None
287 06:34:31.228003 - {RAMDISK_ADDR}: 0x08000000
288 06:34:31.228438 - {RAMDISK}: 714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot
289 06:34:31.228833 - {ROOT_PART}: None
290 06:34:31.229224 - {ROOT}: None
291 06:34:31.229614 - {SERVER_IP}: 192.168.6.2
292 06:34:31.230001 - {TEE_ADDR}: 0x83000000
293 06:34:31.230390 - {TEE}: None
294 06:34:31.230779 Parsed boot commands:
295 06:34:31.231159 - setenv autoload no
296 06:34:31.231545 - setenv initrd_high 0xffffffff
297 06:34:31.231932 - setenv fdt_high 0xffffffff
298 06:34:31.232344 - dhcp
299 06:34:31.232731 - setenv serverip 192.168.6.2
300 06:34:31.233116 - tftpboot 0x01080000 714749/tftp-deploy-qv8dhgj2/kernel/uImage
301 06:34:31.233500 - tftpboot 0x08000000 714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot
302 06:34:31.233890 - tftpboot 0x01070000 714749/tftp-deploy-qv8dhgj2/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 06:34:31.234276 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/714749/extract-nfsrootfs-g52pdyy4,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 06:34:31.234672 - bootm 0x01080000 0x08000000 0x01070000
305 06:34:31.235185 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 06:34:31.236701 start: 2.3 connect-device (timeout 00:05:00) [common]
308 06:34:31.237120 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 06:34:31.252094 Setting prompt string to ['lava-test: # ']
310 06:34:31.253623 end: 2.3 connect-device (duration 00:00:00) [common]
311 06:34:31.254224 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 06:34:31.254757 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 06:34:31.255382 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 06:34:31.256606 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 06:34:31.298001 >> OK - accepted request
316 06:34:31.300387 Returned 0 in 0 seconds
317 06:34:31.401511 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 06:34:31.403067 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 06:34:31.403625 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 06:34:31.404189 Setting prompt string to ['Hit any key to stop autoboot']
322 06:34:31.404655 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 06:34:31.406215 Trying 192.168.56.21...
324 06:34:31.406692 Connected to conserv1.
325 06:34:31.407117 Escape character is '^]'.
326 06:34:31.407540
327 06:34:31.407956 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 06:34:31.408401
329 06:34:38.916365 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 06:34:38.916814 bl2_stage_init 0x01
331 06:34:38.917044 bl2_stage_init 0x81
332 06:34:38.921869 hw id: 0x0000 - pwm id 0x01
333 06:34:38.922269 bl2_stage_init 0xc1
334 06:34:38.927535 bl2_stage_init 0x02
335 06:34:38.927920
336 06:34:38.928171 L0:00000000
337 06:34:38.928395 L1:00000703
338 06:34:38.928603 L2:00008067
339 06:34:38.928813 L3:15000000
340 06:34:38.933171 S1:00000000
341 06:34:38.933601 B2:20282000
342 06:34:38.933816 B1:a0f83180
343 06:34:38.934020
344 06:34:38.934234 TE: 70456
345 06:34:38.934442
346 06:34:38.938797 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 06:34:38.939224
348 06:34:38.944366 Board ID = 1
349 06:34:38.944811 Set cpu clk to 24M
350 06:34:38.945040 Set clk81 to 24M
351 06:34:38.949865 Use GP1_pll as DSU clk.
352 06:34:38.950255 DSU clk: 1200 Mhz
353 06:34:38.950472 CPU clk: 1200 MHz
354 06:34:38.955467 Set clk81 to 166.6M
355 06:34:38.961048 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 06:34:38.961429 board id: 1
357 06:34:38.968261 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 06:34:38.979224 fw parse done
359 06:34:38.985091 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 06:34:39.027324 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 06:34:39.039512 PIEI prepare done
362 06:34:39.039967 fastboot data load
363 06:34:39.040243 fastboot data verify
364 06:34:39.045166 verify result: 266
365 06:34:39.050842 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 06:34:39.051511 LPDDR4 probe
367 06:34:39.052012 ddr clk to 1584MHz
368 06:34:39.058546 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 06:34:39.096483
370 06:34:39.097017 dmc_version 0001
371 06:34:39.103378 Check phy result
372 06:34:39.109371 INFO : End of CA training
373 06:34:39.109859 INFO : End of initialization
374 06:34:39.114955 INFO : Training has run successfully!
375 06:34:39.115439 Check phy result
376 06:34:39.127010 INFO : End of initialization
377 06:34:39.127491 INFO : End of read enable training
378 06:34:39.127934 INFO : End of fine write leveling
379 06:34:39.131799 INFO : End of Write leveling coarse delay
380 06:34:39.132308 INFO : Training has run successfully!
381 06:34:39.132748 Check phy result
382 06:34:39.137346 INFO : End of initialization
383 06:34:39.137848 INFO : End of read dq deskew training
384 06:34:39.148892 INFO : End of MPR read delay center optimization
385 06:34:39.149384 INFO : End of write delay center optimization
386 06:34:39.171267 INFO : End of read delay center optimization
387 06:34:39.171803 INFO : End of max read latency training
388 06:34:39.172304 INFO : Training has run successfully!
389 06:34:39.172742 1D training succeed
390 06:34:39.173187 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 06:34:39.217376 Check phy result
392 06:34:39.217797 INFO : End of initialization
393 06:34:39.244597 INFO : End of 2D read delay Voltage center optimization
394 06:34:39.269112 INFO : End of 2D read delay Voltage center optimization
395 06:34:39.325528 INFO : End of 2D write delay Voltage center optimization
396 06:34:39.379554 INFO : End of 2D write delay Voltage center optimization
397 06:34:39.384996 INFO : Training has run successfully!
398 06:34:39.385380
399 06:34:39.385598 channel==0
400 06:34:39.390631 RxClkDly_Margin_A0==88 ps 9
401 06:34:39.391025 TxDqDly_Margin_A0==98 ps 10
402 06:34:39.396119 RxClkDly_Margin_A1==88 ps 9
403 06:34:39.396421 TxDqDly_Margin_A1==98 ps 10
404 06:34:39.396635 TrainedVREFDQ_A0==75
405 06:34:39.401931 TrainedVREFDQ_A1==74
406 06:34:39.402277 VrefDac_Margin_A0==23
407 06:34:39.402485 DeviceVref_Margin_A0==39
408 06:34:39.407431 VrefDac_Margin_A1==23
409 06:34:39.407767 DeviceVref_Margin_A1==40
410 06:34:39.407973
411 06:34:39.408208
412 06:34:39.413054 channel==1
413 06:34:39.413387 RxClkDly_Margin_A0==88 ps 9
414 06:34:39.413597 TxDqDly_Margin_A0==98 ps 10
415 06:34:39.418631 RxClkDly_Margin_A1==78 ps 8
416 06:34:39.418977 TxDqDly_Margin_A1==88 ps 9
417 06:34:39.424431 TrainedVREFDQ_A0==78
418 06:34:39.424835 TrainedVREFDQ_A1==75
419 06:34:39.425071 VrefDac_Margin_A0==22
420 06:34:39.434333 DeviceVref_Margin_A0==36
421 06:34:39.434759 VrefDac_Margin_A1==22
422 06:34:39.435470 DeviceVref_Margin_A1==39
423 06:34:39.435733
424 06:34:39.435939 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 06:34:39.436177
426 06:34:39.469038 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 06:34:39.469523 2D training succeed
428 06:34:39.474982 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 06:34:39.480234 auto size-- 65535DDR cs0 size: 2048MB
430 06:34:39.480601 DDR cs1 size: 2048MB
431 06:34:39.487966 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 06:34:39.488435 cs0 DataBus test pass
433 06:34:39.492115 cs1 DataBus test pass
434 06:34:39.492520 cs0 AddrBus test pass
435 06:34:39.492747 cs1 AddrBus test pass
436 06:34:39.492962
437 06:34:39.497137 100bdlr_step_size ps== 471
438 06:34:39.497515 result report
439 06:34:39.502743 boot times 0Enable ddr reg access
440 06:34:39.507947 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 06:34:39.521763 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 06:34:40.181999 bl2z: ptr: 05129330, size: 00001e40
443 06:34:40.189726 0.0;M3 CHK:0;cm4_sp_mode 0
444 06:34:40.190278 MVN_1=0x00000000
445 06:34:40.190727 MVN_2=0x00000000
446 06:34:40.201205 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 06:34:40.201809 OPS=0x04
448 06:34:40.202310 ring efuse init
449 06:34:40.204207 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 06:34:40.210012 [0.017354 Inits done]
451 06:34:40.210641 secure task start!
452 06:34:40.211096 high task start!
453 06:34:40.211589 low task start!
454 06:34:40.214286 run into bl31
455 06:34:40.222982 NOTICE: BL31: v1.3(release):4fc40b1
456 06:34:40.230796 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 06:34:40.231445 NOTICE: BL31: G12A normal boot!
458 06:34:40.246344 NOTICE: BL31: BL33 decompress pass
459 06:34:40.252005 ERROR: Error initializing runtime service opteed_fast
460 06:34:41.466960 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 06:34:41.467390 bl2_stage_init 0x01
462 06:34:41.467613 bl2_stage_init 0x81
463 06:34:41.472428 hw id: 0x0000 - pwm id 0x01
464 06:34:41.472740 bl2_stage_init 0xc1
465 06:34:41.478103 bl2_stage_init 0x02
466 06:34:41.478644
467 06:34:41.479054 L0:00000000
468 06:34:41.479451 L1:00000703
469 06:34:41.479879 L2:00008067
470 06:34:41.480346 L3:15000000
471 06:34:41.483627 S1:00000000
472 06:34:41.484113 B2:20282000
473 06:34:41.484542 B1:a0f83180
474 06:34:41.484937
475 06:34:41.485329 TE: 70791
476 06:34:41.485717
477 06:34:41.489366 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 06:34:41.489865
479 06:34:41.494879 Board ID = 1
480 06:34:41.495364 Set cpu clk to 24M
481 06:34:41.495763 Set clk81 to 24M
482 06:34:41.500466 Use GP1_pll as DSU clk.
483 06:34:41.500977 DSU clk: 1200 Mhz
484 06:34:41.501391 CPU clk: 1200 MHz
485 06:34:41.506082 Set clk81 to 166.6M
486 06:34:41.511683 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 06:34:41.512225 board id: 1
488 06:34:41.518899 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 06:34:41.529824 fw parse done
490 06:34:41.535749 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 06:34:41.578835 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 06:34:41.590037 PIEI prepare done
493 06:34:41.590560 fastboot data load
494 06:34:41.590958 fastboot data verify
495 06:34:41.595697 verify result: 266
496 06:34:41.601206 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 06:34:41.601719 LPDDR4 probe
498 06:34:41.602117 ddr clk to 1584MHz
499 06:34:42.967683 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 06:34:42.968426 bl2_stage_init 0x01
501 06:34:42.968915 bl2_stage_init 0x81
502 06:34:42.973350 hw id: 0x0000 - pwm id 0x01
503 06:34:42.973888 bl2_stage_init 0xc1
504 06:34:42.978574 bl2_stage_init 0x02
505 06:34:42.979074
506 06:34:42.979535 L0:00000000
507 06:34:42.980016 L1:00000703
508 06:34:42.980475 L2:00008067
509 06:34:42.980920 L3:15000000
510 06:34:42.983783 S1:00000000
511 06:34:42.984301 B2:20282000
512 06:34:42.984760 B1:a0f83180
513 06:34:42.985201
514 06:34:42.985646 TE: 70604
515 06:34:42.986088
516 06:34:42.989404 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 06:34:42.995008
518 06:34:42.995504 Board ID = 1
519 06:34:42.995956 Set cpu clk to 24M
520 06:34:42.996432 Set clk81 to 24M
521 06:34:43.000606 Use GP1_pll as DSU clk.
522 06:34:43.001089 DSU clk: 1200 Mhz
523 06:34:43.001537 CPU clk: 1200 MHz
524 06:34:43.006316 Set clk81 to 166.6M
525 06:34:43.011999 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 06:34:43.012517 board id: 1
527 06:34:43.019262 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 06:34:43.030142 fw parse done
529 06:34:43.036155 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 06:34:43.079220 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 06:34:43.090457 PIEI prepare done
532 06:34:43.090969 fastboot data load
533 06:34:43.091426 fastboot data verify
534 06:34:43.096035 verify result: 266
535 06:34:43.101578 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 06:34:43.102090 LPDDR4 probe
537 06:34:43.102557 ddr clk to 1584MHz
538 06:34:43.108783 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 06:34:43.147368
540 06:34:43.147914 dmc_version 0001
541 06:34:43.154354 Check phy result
542 06:34:43.160385 INFO : End of CA training
543 06:34:43.160886 INFO : End of initialization
544 06:34:43.165956 INFO : Training has run successfully!
545 06:34:43.166445 Check phy result
546 06:34:43.171543 INFO : End of initialization
547 06:34:43.172061 INFO : End of read enable training
548 06:34:43.177091 INFO : End of fine write leveling
549 06:34:43.182662 INFO : End of Write leveling coarse delay
550 06:34:43.183158 INFO : Training has run successfully!
551 06:34:43.183613 Check phy result
552 06:34:43.188314 INFO : End of initialization
553 06:34:43.188809 INFO : End of read dq deskew training
554 06:34:43.193973 INFO : End of MPR read delay center optimization
555 06:34:43.199501 INFO : End of write delay center optimization
556 06:34:43.205179 INFO : End of read delay center optimization
557 06:34:43.205689 INFO : End of max read latency training
558 06:34:43.210663 INFO : Training has run successfully!
559 06:34:43.211153 1D training succeed
560 06:34:43.220118 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 06:34:43.268239 Check phy result
562 06:34:43.268775 INFO : End of initialization
563 06:34:43.295663 INFO : End of 2D read delay Voltage center optimization
564 06:34:43.319854 INFO : End of 2D read delay Voltage center optimization
565 06:34:43.376643 INFO : End of 2D write delay Voltage center optimization
566 06:34:43.430557 INFO : End of 2D write delay Voltage center optimization
567 06:34:43.436065 INFO : Training has run successfully!
568 06:34:43.436624
569 06:34:43.437089 channel==0
570 06:34:43.441648 RxClkDly_Margin_A0==78 ps 8
571 06:34:43.442199 TxDqDly_Margin_A0==98 ps 10
572 06:34:43.447266 RxClkDly_Margin_A1==88 ps 9
573 06:34:43.447757 TxDqDly_Margin_A1==98 ps 10
574 06:34:43.448250 TrainedVREFDQ_A0==74
575 06:34:43.452897 TrainedVREFDQ_A1==75
576 06:34:43.453465 VrefDac_Margin_A0==24
577 06:34:43.453916 DeviceVref_Margin_A0==40
578 06:34:43.458486 VrefDac_Margin_A1==23
579 06:34:43.458976 DeviceVref_Margin_A1==39
580 06:34:43.459424
581 06:34:43.459868
582 06:34:43.463929 channel==1
583 06:34:43.464448 RxClkDly_Margin_A0==88 ps 9
584 06:34:43.464898 TxDqDly_Margin_A0==98 ps 10
585 06:34:43.469618 RxClkDly_Margin_A1==78 ps 8
586 06:34:43.470179 TxDqDly_Margin_A1==78 ps 8
587 06:34:43.475202 TrainedVREFDQ_A0==78
588 06:34:43.475721 TrainedVREFDQ_A1==75
589 06:34:43.476219 VrefDac_Margin_A0==22
590 06:34:43.480875 DeviceVref_Margin_A0==36
591 06:34:43.481426 VrefDac_Margin_A1==22
592 06:34:43.486427 DeviceVref_Margin_A1==39
593 06:34:43.486977
594 06:34:43.487438 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 06:34:43.487883
596 06:34:43.520026 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 06:34:43.520714 2D training succeed
598 06:34:43.525603 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 06:34:43.531286 auto size-- 65535DDR cs0 size: 2048MB
600 06:34:43.531860 DDR cs1 size: 2048MB
601 06:34:43.536821 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 06:34:43.537326 cs0 DataBus test pass
603 06:34:43.542431 cs1 DataBus test pass
604 06:34:43.542921 cs0 AddrBus test pass
605 06:34:43.543366 cs1 AddrBus test pass
606 06:34:43.543803
607 06:34:43.548002 100bdlr_step_size ps== 464
608 06:34:43.548548 result report
609 06:34:43.553727 boot times 0Enable ddr reg access
610 06:34:43.558919 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 06:34:43.572789 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 06:34:44.232285 bl2z: ptr: 05129330, size: 00001e40
613 06:34:44.239683 0.0;M3 CHK:0;cm4_sp_mode 0
614 06:34:44.240335 MVN_1=0x00000000
615 06:34:44.240809 MVN_2=0x00000000
616 06:34:44.251148 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 06:34:44.251733 OPS=0x04
618 06:34:44.252246 ring efuse init
619 06:34:44.256738 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 06:34:44.257325 [0.017354 Inits done]
621 06:34:44.257791 secure task start!
622 06:34:44.263276 high task start!
623 06:34:44.263816 low task start!
624 06:34:44.264316 run into bl31
625 06:34:44.272988 NOTICE: BL31: v1.3(release):4fc40b1
626 06:34:44.279771 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 06:34:44.280392 NOTICE: BL31: G12A normal boot!
628 06:34:44.296334 NOTICE: BL31: BL33 decompress pass
629 06:34:44.301359 ERROR: Error initializing runtime service opteed_fast
630 06:34:45.516680 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 06:34:45.517074 bl2_stage_init 0x01
632 06:34:45.517294 bl2_stage_init 0x81
633 06:34:45.522298 hw id: 0x0000 - pwm id 0x01
634 06:34:45.522721 bl2_stage_init 0xc1
635 06:34:45.523036 bl2_stage_init 0x02
636 06:34:45.523341
637 06:34:45.528683 L0:00000000
638 06:34:45.529103 L1:00000703
639 06:34:45.529343 L2:00008067
640 06:34:45.529549 L3:15000000
641 06:34:45.529915 S1:00000000
642 06:34:45.530399 B2:20282000
643 06:34:45.535424 B1:a0f83180
644 06:34:45.535729
645 06:34:45.535941 TE: 69949
646 06:34:45.536189
647 06:34:45.541148 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 06:34:45.541453
649 06:34:45.541666 Board ID = 1
650 06:34:45.541881 Set cpu clk to 24M
651 06:34:45.546596 Set clk81 to 24M
652 06:34:45.547008 Use GP1_pll as DSU clk.
653 06:34:45.547334 DSU clk: 1200 Mhz
654 06:34:45.552226 CPU clk: 1200 MHz
655 06:34:45.552534 Set clk81 to 166.6M
656 06:34:45.557825 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 06:34:45.558252 board id: 1
658 06:34:45.566880 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 06:34:45.578571 fw parse done
660 06:34:45.584272 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 06:34:45.626354 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 06:34:45.638218 PIEI prepare done
663 06:34:45.638711 fastboot data load
664 06:34:45.638971 fastboot data verify
665 06:34:45.643636 verify result: 266
666 06:34:45.649242 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 06:34:45.649558 LPDDR4 probe
668 06:34:45.649781 ddr clk to 1584MHz
669 06:34:45.657216 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 06:34:45.693516
671 06:34:45.694164 dmc_version 0001
672 06:34:45.700354 Check phy result
673 06:34:45.707140 INFO : End of CA training
674 06:34:45.707731 INFO : End of initialization
675 06:34:45.712649 INFO : Training has run successfully!
676 06:34:45.713065 Check phy result
677 06:34:45.718214 INFO : End of initialization
678 06:34:45.718795 INFO : End of read enable training
679 06:34:45.721532 INFO : End of fine write leveling
680 06:34:45.727142 INFO : End of Write leveling coarse delay
681 06:34:45.732673 INFO : Training has run successfully!
682 06:34:45.733184 Check phy result
683 06:34:45.733487 INFO : End of initialization
684 06:34:45.738311 INFO : End of read dq deskew training
685 06:34:45.741750 INFO : End of MPR read delay center optimization
686 06:34:45.747305 INFO : End of write delay center optimization
687 06:34:45.752779 INFO : End of read delay center optimization
688 06:34:45.753186 INFO : End of max read latency training
689 06:34:45.758368 INFO : Training has run successfully!
690 06:34:45.758954 1D training succeed
691 06:34:45.765743 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 06:34:45.813358 Check phy result
693 06:34:45.813765 INFO : End of initialization
694 06:34:45.835657 INFO : End of 2D read delay Voltage center optimization
695 06:34:45.854830 INFO : End of 2D read delay Voltage center optimization
696 06:34:45.906712 INFO : End of 2D write delay Voltage center optimization
697 06:34:45.956814 INFO : End of 2D write delay Voltage center optimization
698 06:34:45.962354 INFO : Training has run successfully!
699 06:34:45.962680
700 06:34:45.962894 channel==0
701 06:34:45.967957 RxClkDly_Margin_A0==78 ps 8
702 06:34:45.968433 TxDqDly_Margin_A0==98 ps 10
703 06:34:45.971251 RxClkDly_Margin_A1==88 ps 9
704 06:34:45.971679 TxDqDly_Margin_A1==98 ps 10
705 06:34:45.976823 TrainedVREFDQ_A0==74
706 06:34:45.977152 TrainedVREFDQ_A1==75
707 06:34:45.982394 VrefDac_Margin_A0==23
708 06:34:45.982839 DeviceVref_Margin_A0==40
709 06:34:45.983169 VrefDac_Margin_A1==23
710 06:34:45.988036 DeviceVref_Margin_A1==39
711 06:34:45.988366
712 06:34:45.988589
713 06:34:45.988795 channel==1
714 06:34:45.988993 RxClkDly_Margin_A0==88 ps 9
715 06:34:45.991423 TxDqDly_Margin_A0==98 ps 10
716 06:34:45.996955 RxClkDly_Margin_A1==78 ps 8
717 06:34:45.997272 TxDqDly_Margin_A1==88 ps 9
718 06:34:45.997483 TrainedVREFDQ_A0==78
719 06:34:46.002540 TrainedVREFDQ_A1==75
720 06:34:46.002850 VrefDac_Margin_A0==22
721 06:34:46.008225 DeviceVref_Margin_A0==36
722 06:34:46.008666 VrefDac_Margin_A1==22
723 06:34:46.008995 DeviceVref_Margin_A1==39
724 06:34:46.009308
725 06:34:46.013726 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 06:34:46.014055
727 06:34:46.047276 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
728 06:34:46.047817 2D training succeed
729 06:34:46.052974 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 06:34:46.058621 auto size-- 65535DDR cs0 size: 2048MB
731 06:34:46.058939 DDR cs1 size: 2048MB
732 06:34:46.064256 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 06:34:46.064702 cs0 DataBus test pass
734 06:34:46.065028 cs1 DataBus test pass
735 06:34:46.069728 cs0 AddrBus test pass
736 06:34:46.070047 cs1 AddrBus test pass
737 06:34:46.070256
738 06:34:46.075321 100bdlr_step_size ps== 478
739 06:34:46.075774 result report
740 06:34:46.076156 boot times 0Enable ddr reg access
741 06:34:46.084799 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 06:34:46.098086 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 06:34:46.753634 bl2z: ptr: 05129330, size: 00001e40
744 06:34:46.760874 0.0;M3 CHK:0;cm4_sp_mode 0
745 06:34:46.761278 MVN_1=0x00000000
746 06:34:46.761513 MVN_2=0x00000000
747 06:34:46.772021 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 06:34:46.772374 OPS=0x04
749 06:34:46.772593 ring efuse init
750 06:34:46.775007 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 06:34:46.780997 [0.017320 Inits done]
752 06:34:46.781338 secure task start!
753 06:34:46.781597 high task start!
754 06:34:46.781871 low task start!
755 06:34:46.784397 run into bl31
756 06:34:46.793797 NOTICE: BL31: v1.3(release):4fc40b1
757 06:34:46.800894 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 06:34:46.801256 NOTICE: BL31: G12A normal boot!
759 06:34:46.817158 NOTICE: BL31: BL33 decompress pass
760 06:34:46.821950 ERROR: Error initializing runtime service opteed_fast
761 06:34:47.618333
762 06:34:47.618897
763 06:34:47.623687 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 06:34:47.624166
765 06:34:47.626192 Model: Libre Computer AML-S905D3-CC Solitude
766 06:34:47.774220 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 06:34:47.789337 DRAM: 2 GiB (effective 3.8 GiB)
768 06:34:47.890668 Core: 406 devices, 33 uclasses, devicetree: separate
769 06:34:47.895561 WDT: Not starting watchdog@f0d0
770 06:34:47.921569 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 06:34:47.933718 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 06:34:47.937707 ** Bad device specification mmc 0 **
773 06:34:47.948719 Card did not respond to voltage select! : -110
774 06:34:47.956118 ** Bad device specification mmc 0 **
775 06:34:47.956581 Couldn't find partition mmc 0
776 06:34:47.964711 Card did not respond to voltage select! : -110
777 06:34:47.970203 ** Bad device specification mmc 0 **
778 06:34:47.970818 Couldn't find partition mmc 0
779 06:34:47.974801 Error: could not access storage.
780 06:34:48.271866 Net: eth0: ethernet@ff3f0000
781 06:34:48.272407 starting USB...
782 06:34:48.516483 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 06:34:48.517036 Starting the controller
784 06:34:48.522404 USB XHCI 1.10
785 06:34:50.080079 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 06:34:50.087566 scanning usb for storage devices... 0 Storage Device(s) found
788 06:34:50.138846 Hit any key to stop autoboot: 1
789 06:34:50.139918 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 06:34:50.140561 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 06:34:50.140954 Setting prompt string to ['=>']
792 06:34:50.141312 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 06:34:50.153834 0
794 06:34:50.154797 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 06:34:50.255919 => setenv autoload no
797 06:34:50.256761 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 06:34:50.261613 setenv autoload no
800 06:34:50.363102 => setenv initrd_high 0xffffffff
801 06:34:50.363829 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 06:34:50.367758 setenv initrd_high 0xffffffff
804 06:34:50.469291 => setenv fdt_high 0xffffffff
805 06:34:50.470064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 06:34:50.474121 setenv fdt_high 0xffffffff
808 06:34:50.575663 => dhcp
809 06:34:50.576476 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 06:34:50.580207 dhcp
811 06:34:51.635778 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 06:34:51.636431 Speed: 1000, full duplex
813 06:34:51.636856 BOOTP broadcast 1
814 06:34:51.885102 BOOTP broadcast 2
815 06:34:52.385330 BOOTP broadcast 3
816 06:34:53.386259 BOOTP broadcast 4
817 06:34:55.387491 BOOTP broadcast 5
818 06:34:55.400036 DHCP client bound to address 192.168.6.12 (3764 ms)
820 06:34:55.501340 => setenv serverip 192.168.6.2
821 06:34:55.502293 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 06:34:55.505528 setenv serverip 192.168.6.2
824 06:34:55.606641 => tftpboot 0x01080000 714749/tftp-deploy-qv8dhgj2/kernel/uImage
825 06:34:55.607393 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 06:34:55.613798 tftpboot 0x01080000 714749/tftp-deploy-qv8dhgj2/kernel/uImage
827 06:34:55.614164 Speed: 1000, full duplex
828 06:34:55.614372 Using ethernet@ff3f0000 device
829 06:34:55.619338 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 06:34:55.624837 Filename '714749/tftp-deploy-qv8dhgj2/kernel/uImage'.
831 06:34:55.628687 Load address: 0x1080000
832 06:34:58.289408 Loading: *################################################## 37.2 MiB
833 06:34:58.290044 14 MiB/s
834 06:34:58.290477 done
835 06:34:58.292589 Bytes transferred = 39021120 (2536a40 hex)
837 06:34:58.394228 => tftpboot 0x08000000 714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot
838 06:34:58.395002 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
839 06:34:58.401621 tftpboot 0x08000000 714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot
840 06:34:58.402102 Speed: 1000, full duplex
841 06:34:58.402501 Using ethernet@ff3f0000 device
842 06:34:58.407164 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 06:34:58.416036 Filename '714749/tftp-deploy-qv8dhgj2/ramdisk/ramdisk.cpio.gz.uboot'.
844 06:34:58.416581 Load address: 0x8000000
845 06:34:59.936326 Loading: *################################################# UDP wrong checksum 00000005 0000a0ce
846 06:35:04.936169 T UDP wrong checksum 00000005 0000a0ce
847 06:35:08.574965 UDP wrong checksum 000000ff 0000c638
848 06:35:08.601515 UDP wrong checksum 000000ff 0000562b
849 06:35:14.938162 T T UDP wrong checksum 00000005 0000a0ce
850 06:35:18.338064 UDP wrong checksum 000000ff 0000fd20
851 06:35:18.366893 UDP wrong checksum 000000ff 00009313
852 06:35:34.942195 T T T T UDP wrong checksum 00000005 0000a0ce
853 06:35:41.108693 T UDP wrong checksum 000000ff 00003241
854 06:35:41.116356 UDP wrong checksum 000000ff 0000c633
855 06:35:54.947086 T T
856 06:35:54.947728 Retry count exceeded; starting again
858 06:35:54.949242 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
861 06:35:54.951051 end: 2.4 uboot-commands (duration 00:01:24) [common]
863 06:35:54.952495 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
865 06:35:54.953509 end: 2 uboot-action (duration 00:01:24) [common]
867 06:35:54.955086 Cleaning after the job
868 06:35:54.955649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/ramdisk
869 06:35:54.956990 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/kernel
870 06:35:54.998206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/dtb
871 06:35:54.999609 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/nfsrootfs
872 06:35:55.166411 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714749/tftp-deploy-qv8dhgj2/modules
873 06:35:55.194924 start: 4.1 power-off (timeout 00:00:30) [common]
874 06:35:55.195882 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
875 06:35:55.231937 >> OK - accepted request
876 06:35:55.234151 Returned 0 in 0 seconds
877 06:35:55.335236 end: 4.1 power-off (duration 00:00:00) [common]
879 06:35:55.336814 start: 4.2 read-feedback (timeout 00:10:00) [common]
880 06:35:55.337796 Listened to connection for namespace 'common' for up to 1s
881 06:35:56.338578 Finalising connection for namespace 'common'
882 06:35:56.339097 Disconnecting from shell: Finalise
883 06:35:56.339405 =>
884 06:35:56.440222 end: 4.2 read-feedback (duration 00:00:01) [common]
885 06:35:56.440888 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/714749
886 06:35:58.424691 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/714749
887 06:35:58.425292 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.