Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 06:55:51.365834 lava-dispatcher, installed at version: 2024.01
2 06:55:51.366686 start: 0 validate
3 06:55:51.367164 Start time: 2024-09-06 06:55:51.367133+00:00 (UTC)
4 06:55:51.367712 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 06:55:51.368286 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 06:55:51.402961 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 06:55:51.403525 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 06:55:51.437691 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 06:55:51.438316 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 06:55:51.469077 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 06:55:51.469589 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 06:55:51.503954 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 06:55:51.504481 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 06:55:51.544811 validate duration: 0.18
16 06:55:51.545654 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 06:55:51.545978 start: 1.1 download-retry (timeout 00:10:00) [common]
18 06:55:51.546298 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 06:55:51.546880 Not decompressing ramdisk as can be used compressed.
20 06:55:51.547313 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 06:55:51.547594 saving as /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/ramdisk/initrd.cpio.gz
22 06:55:51.547862 total size: 5628169 (5 MB)
23 06:55:51.583038 progress 0 % (0 MB)
24 06:55:51.591050 progress 5 % (0 MB)
25 06:55:51.599417 progress 10 % (0 MB)
26 06:55:51.606723 progress 15 % (0 MB)
27 06:55:51.612057 progress 20 % (1 MB)
28 06:55:51.616070 progress 25 % (1 MB)
29 06:55:51.620367 progress 30 % (1 MB)
30 06:55:51.624910 progress 35 % (1 MB)
31 06:55:51.629007 progress 40 % (2 MB)
32 06:55:51.633118 progress 45 % (2 MB)
33 06:55:51.636857 progress 50 % (2 MB)
34 06:55:51.640990 progress 55 % (2 MB)
35 06:55:51.645064 progress 60 % (3 MB)
36 06:55:51.648762 progress 65 % (3 MB)
37 06:55:51.652871 progress 70 % (3 MB)
38 06:55:51.656620 progress 75 % (4 MB)
39 06:55:51.660822 progress 80 % (4 MB)
40 06:55:51.664494 progress 85 % (4 MB)
41 06:55:51.668586 progress 90 % (4 MB)
42 06:55:51.672537 progress 95 % (5 MB)
43 06:55:51.675852 progress 100 % (5 MB)
44 06:55:51.676539 5 MB downloaded in 0.13 s (41.72 MB/s)
45 06:55:51.677084 end: 1.1.1 http-download (duration 00:00:00) [common]
47 06:55:51.677975 end: 1.1 download-retry (duration 00:00:00) [common]
48 06:55:51.678269 start: 1.2 download-retry (timeout 00:10:00) [common]
49 06:55:51.678539 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 06:55:51.679033 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/kernel/Image
51 06:55:51.679296 saving as /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/kernel/Image
52 06:55:51.679507 total size: 45308416 (43 MB)
53 06:55:51.679720 No compression specified
54 06:55:51.718776 progress 0 % (0 MB)
55 06:55:51.748394 progress 5 % (2 MB)
56 06:55:51.777281 progress 10 % (4 MB)
57 06:55:51.806452 progress 15 % (6 MB)
58 06:55:51.833330 progress 20 % (8 MB)
59 06:55:51.860104 progress 25 % (10 MB)
60 06:55:51.886681 progress 30 % (12 MB)
61 06:55:51.913588 progress 35 % (15 MB)
62 06:55:51.940795 progress 40 % (17 MB)
63 06:55:51.967501 progress 45 % (19 MB)
64 06:55:51.994689 progress 50 % (21 MB)
65 06:55:52.021848 progress 55 % (23 MB)
66 06:55:52.049366 progress 60 % (25 MB)
67 06:55:52.076664 progress 65 % (28 MB)
68 06:55:52.104217 progress 70 % (30 MB)
69 06:55:52.131460 progress 75 % (32 MB)
70 06:55:52.158498 progress 80 % (34 MB)
71 06:55:52.185933 progress 85 % (36 MB)
72 06:55:52.213501 progress 90 % (38 MB)
73 06:55:52.240780 progress 95 % (41 MB)
74 06:55:52.267627 progress 100 % (43 MB)
75 06:55:52.268376 43 MB downloaded in 0.59 s (73.38 MB/s)
76 06:55:52.268856 end: 1.2.1 http-download (duration 00:00:01) [common]
78 06:55:52.269676 end: 1.2 download-retry (duration 00:00:01) [common]
79 06:55:52.269948 start: 1.3 download-retry (timeout 00:09:59) [common]
80 06:55:52.270216 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 06:55:52.270691 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 06:55:52.270968 saving as /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/dtb/meson-g12b-a311d-libretech-cc.dtb
83 06:55:52.271179 total size: 54667 (0 MB)
84 06:55:52.271388 No compression specified
85 06:55:52.302777 progress 59 % (0 MB)
86 06:55:52.303651 progress 100 % (0 MB)
87 06:55:52.304305 0 MB downloaded in 0.03 s (1.57 MB/s)
88 06:55:52.304825 end: 1.3.1 http-download (duration 00:00:00) [common]
90 06:55:52.305677 end: 1.3 download-retry (duration 00:00:00) [common]
91 06:55:52.305965 start: 1.4 download-retry (timeout 00:09:59) [common]
92 06:55:52.306249 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 06:55:52.306737 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 06:55:52.306993 saving as /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/nfsrootfs/full.rootfs.tar
95 06:55:52.307214 total size: 120894716 (115 MB)
96 06:55:52.307451 Using unxz to decompress xz
97 06:55:52.343727 progress 0 % (0 MB)
98 06:55:53.135539 progress 5 % (5 MB)
99 06:55:53.983912 progress 10 % (11 MB)
100 06:55:54.794742 progress 15 % (17 MB)
101 06:55:55.533333 progress 20 % (23 MB)
102 06:55:56.124376 progress 25 % (28 MB)
103 06:55:56.949550 progress 30 % (34 MB)
104 06:55:57.747198 progress 35 % (40 MB)
105 06:55:58.095546 progress 40 % (46 MB)
106 06:55:58.469889 progress 45 % (51 MB)
107 06:55:59.202633 progress 50 % (57 MB)
108 06:56:00.101186 progress 55 % (63 MB)
109 06:56:00.959449 progress 60 % (69 MB)
110 06:56:01.776966 progress 65 % (74 MB)
111 06:56:02.617048 progress 70 % (80 MB)
112 06:56:03.524495 progress 75 % (86 MB)
113 06:56:04.378638 progress 80 % (92 MB)
114 06:56:05.215571 progress 85 % (98 MB)
115 06:56:06.153554 progress 90 % (103 MB)
116 06:56:07.011285 progress 95 % (109 MB)
117 06:56:07.852107 progress 100 % (115 MB)
118 06:56:07.864794 115 MB downloaded in 15.56 s (7.41 MB/s)
119 06:56:07.865522 end: 1.4.1 http-download (duration 00:00:16) [common]
121 06:56:07.866427 end: 1.4 download-retry (duration 00:00:16) [common]
122 06:56:07.866710 start: 1.5 download-retry (timeout 00:09:44) [common]
123 06:56:07.866984 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 06:56:07.867482 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/modules.tar.xz
125 06:56:07.867747 saving as /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/modules/modules.tar
126 06:56:07.867957 total size: 11502724 (10 MB)
127 06:56:07.868213 Using unxz to decompress xz
128 06:56:07.918414 progress 0 % (0 MB)
129 06:56:07.989534 progress 5 % (0 MB)
130 06:56:08.068228 progress 10 % (1 MB)
131 06:56:08.152034 progress 15 % (1 MB)
132 06:56:08.232879 progress 20 % (2 MB)
133 06:56:08.310060 progress 25 % (2 MB)
134 06:56:08.392075 progress 30 % (3 MB)
135 06:56:08.467282 progress 35 % (3 MB)
136 06:56:08.546193 progress 40 % (4 MB)
137 06:56:08.619194 progress 45 % (4 MB)
138 06:56:08.697740 progress 50 % (5 MB)
139 06:56:08.774322 progress 55 % (6 MB)
140 06:56:08.854115 progress 60 % (6 MB)
141 06:56:08.940197 progress 65 % (7 MB)
142 06:56:09.017385 progress 70 % (7 MB)
143 06:56:09.112853 progress 75 % (8 MB)
144 06:56:09.202622 progress 80 % (8 MB)
145 06:56:09.297950 progress 85 % (9 MB)
146 06:56:09.382455 progress 90 % (9 MB)
147 06:56:09.473314 progress 95 % (10 MB)
148 06:56:09.564124 progress 100 % (10 MB)
149 06:56:09.575963 10 MB downloaded in 1.71 s (6.42 MB/s)
150 06:56:09.577002 end: 1.5.1 http-download (duration 00:00:02) [common]
152 06:56:09.578613 end: 1.5 download-retry (duration 00:00:02) [common]
153 06:56:09.579135 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 06:56:09.579655 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 06:56:26.661064 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/714813/extract-nfsrootfs-lu0rp5ji
156 06:56:26.661667 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 06:56:26.661951 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 06:56:26.662559 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj
159 06:56:26.662994 makedir: /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin
160 06:56:26.663320 makedir: /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/tests
161 06:56:26.663640 makedir: /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/results
162 06:56:26.663967 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-add-keys
163 06:56:26.664545 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-add-sources
164 06:56:26.665054 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-background-process-start
165 06:56:26.665560 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-background-process-stop
166 06:56:26.666090 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-common-functions
167 06:56:26.666593 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-echo-ipv4
168 06:56:26.667075 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-install-packages
169 06:56:26.667557 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-installed-packages
170 06:56:26.668070 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-os-build
171 06:56:26.668570 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-probe-channel
172 06:56:26.669051 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-probe-ip
173 06:56:26.669528 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-target-ip
174 06:56:26.670004 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-target-mac
175 06:56:26.670484 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-target-storage
176 06:56:26.670976 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-case
177 06:56:26.671473 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-event
178 06:56:26.671955 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-feedback
179 06:56:26.672471 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-raise
180 06:56:26.672953 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-reference
181 06:56:26.673450 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-runner
182 06:56:26.673959 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-set
183 06:56:26.674489 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-test-shell
184 06:56:26.675013 Updating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-add-keys (debian)
185 06:56:26.675564 Updating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-add-sources (debian)
186 06:56:26.676103 Updating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-install-packages (debian)
187 06:56:26.676623 Updating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-installed-packages (debian)
188 06:56:26.677117 Updating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/bin/lava-os-build (debian)
189 06:56:26.677551 Creating /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/environment
190 06:56:26.677947 LAVA metadata
191 06:56:26.678204 - LAVA_JOB_ID=714813
192 06:56:26.678416 - LAVA_DISPATCHER_IP=192.168.6.2
193 06:56:26.678776 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 06:56:26.679729 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 06:56:26.680068 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 06:56:26.680280 skipped lava-vland-overlay
197 06:56:26.680519 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 06:56:26.680770 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 06:56:26.680983 skipped lava-multinode-overlay
200 06:56:26.681221 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 06:56:26.681467 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 06:56:26.681716 Loading test definitions
203 06:56:26.681987 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 06:56:26.682203 Using /lava-714813 at stage 0
205 06:56:26.683268 uuid=714813_1.6.2.4.1 testdef=None
206 06:56:26.683565 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 06:56:26.683827 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 06:56:26.685432 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 06:56:26.686207 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 06:56:26.688140 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 06:56:26.688956 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 06:56:26.690797 runner path: /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/0/tests/0_timesync-off test_uuid 714813_1.6.2.4.1
215 06:56:26.691346 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 06:56:26.692178 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 06:56:26.692403 Using /lava-714813 at stage 0
219 06:56:26.692751 Fetching tests from https://github.com/kernelci/test-definitions.git
220 06:56:26.693037 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/0/tests/1_kselftest-rtc'
221 06:56:30.179665 Running '/usr/bin/git checkout kernelci.org
222 06:56:30.394103 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 06:56:30.395572 uuid=714813_1.6.2.4.5 testdef=None
224 06:56:30.395917 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 06:56:30.396753 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 06:56:30.399593 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 06:56:30.400522 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 06:56:30.404244 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 06:56:30.405098 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 06:56:30.408682 runner path: /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/0/tests/1_kselftest-rtc test_uuid 714813_1.6.2.4.5
234 06:56:30.408966 BOARD='meson-g12b-a311d-libretech-cc'
235 06:56:30.409171 BRANCH='mainline'
236 06:56:30.409369 SKIPFILE='/dev/null'
237 06:56:30.409566 SKIP_INSTALL='True'
238 06:56:30.409760 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 06:56:30.409960 TST_CASENAME=''
240 06:56:30.410156 TST_CMDFILES='rtc'
241 06:56:30.410704 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 06:56:30.411514 Creating lava-test-runner.conf files
244 06:56:30.411723 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/714813/lava-overlay-nbi4sonj/lava-714813/0 for stage 0
245 06:56:30.412122 - 0_timesync-off
246 06:56:30.412382 - 1_kselftest-rtc
247 06:56:30.412735 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 06:56:30.413027 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 06:56:53.724661 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 06:56:53.725090 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 06:56:53.725353 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 06:56:53.725623 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 06:56:53.725886 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 06:56:54.336744 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 06:56:54.337221 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 06:56:54.337470 extracting modules file /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714813/extract-nfsrootfs-lu0rp5ji
257 06:56:55.683932 extracting modules file /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714813/extract-overlay-ramdisk-uyug1ytv/ramdisk
258 06:56:57.066863 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 06:56:57.067354 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 06:56:57.067637 [common] Applying overlay to NFS
261 06:56:57.067851 [common] Applying overlay /var/lib/lava/dispatcher/tmp/714813/compress-overlay-nt41538q/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/714813/extract-nfsrootfs-lu0rp5ji
262 06:56:59.793935 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 06:56:59.794416 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 06:56:59.794692 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 06:56:59.794924 Converting downloaded kernel to a uImage
266 06:56:59.795260 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/kernel/Image /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/kernel/uImage
267 06:57:00.298593 output: Image Name:
268 06:57:00.299014 output: Created: Fri Sep 6 06:56:59 2024
269 06:57:00.299222 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 06:57:00.299426 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
271 06:57:00.299627 output: Load Address: 01080000
272 06:57:00.299826 output: Entry Point: 01080000
273 06:57:00.300081 output:
274 06:57:00.300426 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 06:57:00.300696 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 06:57:00.300963 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 06:57:00.301218 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 06:57:00.301477 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 06:57:00.301745 Building ramdisk /var/lib/lava/dispatcher/tmp/714813/extract-overlay-ramdisk-uyug1ytv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/714813/extract-overlay-ramdisk-uyug1ytv/ramdisk
280 06:57:02.544624 >> 165160 blocks
281 06:57:10.662803 Adding RAMdisk u-boot header.
282 06:57:10.663232 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/714813/extract-overlay-ramdisk-uyug1ytv/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/714813/extract-overlay-ramdisk-uyug1ytv/ramdisk.cpio.gz.uboot
283 06:57:10.904165 output: Image Name:
284 06:57:10.905214 output: Created: Fri Sep 6 06:57:10 2024
285 06:57:10.905893 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 06:57:10.906701 output: Data Size: 23258511 Bytes = 22713.39 KiB = 22.18 MiB
287 06:57:10.907357 output: Load Address: 00000000
288 06:57:10.908183 output: Entry Point: 00000000
289 06:57:10.908907 output:
290 06:57:10.910244 rename /var/lib/lava/dispatcher/tmp/714813/extract-overlay-ramdisk-uyug1ytv/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot
291 06:57:10.911373 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 06:57:10.912397 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 06:57:10.913440 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 06:57:10.914201 No LXC device requested
295 06:57:10.915116 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 06:57:10.915977 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 06:57:10.916946 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 06:57:10.917668 Checking files for TFTP limit of 4294967296 bytes.
299 06:57:10.922312 end: 1 tftp-deploy (duration 00:01:19) [common]
300 06:57:10.923315 start: 2 uboot-action (timeout 00:05:00) [common]
301 06:57:10.924325 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 06:57:10.925204 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 06:57:10.926156 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 06:57:10.927123 Using kernel file from prepare-kernel: 714813/tftp-deploy-g41fb_oi/kernel/uImage
305 06:57:10.928204 substitutions:
306 06:57:10.928964 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 06:57:10.929694 - {DTB_ADDR}: 0x01070000
308 06:57:10.930448 - {DTB}: 714813/tftp-deploy-g41fb_oi/dtb/meson-g12b-a311d-libretech-cc.dtb
309 06:57:10.931158 - {INITRD}: 714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot
310 06:57:10.931823 - {KERNEL_ADDR}: 0x01080000
311 06:57:10.932635 - {KERNEL}: 714813/tftp-deploy-g41fb_oi/kernel/uImage
312 06:57:10.933317 - {LAVA_MAC}: None
313 06:57:10.934128 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/714813/extract-nfsrootfs-lu0rp5ji
314 06:57:10.934852 - {NFS_SERVER_IP}: 192.168.6.2
315 06:57:10.935522 - {PRESEED_CONFIG}: None
316 06:57:10.936363 - {PRESEED_LOCAL}: None
317 06:57:10.937091 - {RAMDISK_ADDR}: 0x08000000
318 06:57:10.937845 - {RAMDISK}: 714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot
319 06:57:10.938552 - {ROOT_PART}: None
320 06:57:10.939300 - {ROOT}: None
321 06:57:10.940036 - {SERVER_IP}: 192.168.6.2
322 06:57:10.940783 - {TEE_ADDR}: 0x83000000
323 06:57:10.941494 - {TEE}: None
324 06:57:10.942168 Parsed boot commands:
325 06:57:10.942903 - setenv autoload no
326 06:57:10.943871 - setenv initrd_high 0xffffffff
327 06:57:10.944889 - setenv fdt_high 0xffffffff
328 06:57:10.945212 - dhcp
329 06:57:10.945496 - setenv serverip 192.168.6.2
330 06:57:10.945814 - tftpboot 0x01080000 714813/tftp-deploy-g41fb_oi/kernel/uImage
331 06:57:10.946581 - tftpboot 0x08000000 714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot
332 06:57:10.947271 - tftpboot 0x01070000 714813/tftp-deploy-g41fb_oi/dtb/meson-g12b-a311d-libretech-cc.dtb
333 06:57:10.948033 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/714813/extract-nfsrootfs-lu0rp5ji,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 06:57:10.948777 - bootm 0x01080000 0x08000000 0x01070000
335 06:57:10.949765 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 06:57:10.952731 start: 2.3 connect-device (timeout 00:05:00) [common]
338 06:57:10.953580 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 06:57:10.968384 Setting prompt string to ['lava-test: # ']
340 06:57:10.969675 end: 2.3 connect-device (duration 00:00:00) [common]
341 06:57:10.970218 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 06:57:10.970689 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 06:57:10.971141 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 06:57:10.972129 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 06:57:11.010589 >> OK - accepted request
346 06:57:11.012829 Returned 0 in 0 seconds
347 06:57:11.114281 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 06:57:11.117234 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 06:57:11.118280 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 06:57:11.119198 Setting prompt string to ['Hit any key to stop autoboot']
352 06:57:11.120107 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 06:57:11.122837 Trying 192.168.56.21...
354 06:57:11.124164 Connected to conserv1.
355 06:57:11.125131 Escape character is '^]'.
356 06:57:11.125880
357 06:57:11.126662 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 06:57:11.127459
359 06:57:22.818372 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 06:57:22.818981 bl2_stage_init 0x01
361 06:57:22.819403 bl2_stage_init 0x81
362 06:57:22.823807 hw id: 0x0000 - pwm id 0x01
363 06:57:22.824312 bl2_stage_init 0xc1
364 06:57:22.824724 bl2_stage_init 0x02
365 06:57:22.825113
366 06:57:22.829531 L0:00000000
367 06:57:22.830025 L1:20000703
368 06:57:22.830434 L2:00008067
369 06:57:22.830838 L3:14000000
370 06:57:22.835155 B2:00402000
371 06:57:22.835681 B1:e0f83180
372 06:57:22.836221
373 06:57:22.836620 TE: 58124
374 06:57:22.837063
375 06:57:22.840644 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 06:57:22.841087
377 06:57:22.841476 Board ID = 1
378 06:57:22.846168 Set A53 clk to 24M
379 06:57:22.846607 Set A73 clk to 24M
380 06:57:22.846991 Set clk81 to 24M
381 06:57:22.851772 A53 clk: 1200 MHz
382 06:57:22.852235 A73 clk: 1200 MHz
383 06:57:22.852623 CLK81: 166.6M
384 06:57:22.853002 smccc: 00012a92
385 06:57:22.857553 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 06:57:22.863050 board id: 1
387 06:57:22.868912 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 06:57:22.879654 fw parse done
389 06:57:22.885547 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 06:57:22.928230 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 06:57:22.939064 PIEI prepare done
392 06:57:22.939818 fastboot data load
393 06:57:22.940583 fastboot data verify
394 06:57:22.944958 verify result: 266
395 06:57:22.950405 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 06:57:22.951127 LPDDR4 probe
397 06:57:22.951771 ddr clk to 1584MHz
398 06:57:22.958289 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 06:57:22.994647
400 06:57:22.995212 dmc_version 0001
401 06:57:23.002259 Check phy result
402 06:57:23.008088 INFO : End of CA training
403 06:57:23.008588 INFO : End of initialization
404 06:57:23.013762 INFO : Training has run successfully!
405 06:57:23.014255 Check phy result
406 06:57:23.019307 INFO : End of initialization
407 06:57:23.019796 INFO : End of read enable training
408 06:57:23.022571 INFO : End of fine write leveling
409 06:57:23.028231 INFO : End of Write leveling coarse delay
410 06:57:23.033744 INFO : Training has run successfully!
411 06:57:23.034229 Check phy result
412 06:57:23.034724 INFO : End of initialization
413 06:57:23.039324 INFO : End of read dq deskew training
414 06:57:23.042801 INFO : End of MPR read delay center optimization
415 06:57:23.048315 INFO : End of write delay center optimization
416 06:57:23.053888 INFO : End of read delay center optimization
417 06:57:23.054410 INFO : End of max read latency training
418 06:57:23.059550 INFO : Training has run successfully!
419 06:57:23.060079 1D training succeed
420 06:57:23.067752 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 06:57:23.114495 Check phy result
422 06:57:23.115131 INFO : End of initialization
423 06:57:23.138111 INFO : End of 2D read delay Voltage center optimization
424 06:57:23.157999 INFO : End of 2D read delay Voltage center optimization
425 06:57:23.210035 INFO : End of 2D write delay Voltage center optimization
426 06:57:23.259197 INFO : End of 2D write delay Voltage center optimization
427 06:57:23.264646 INFO : Training has run successfully!
428 06:57:23.265165
429 06:57:23.265628 channel==0
430 06:57:23.270261 RxClkDly_Margin_A0==88 ps 9
431 06:57:23.270765 TxDqDly_Margin_A0==98 ps 10
432 06:57:23.275941 RxClkDly_Margin_A1==88 ps 9
433 06:57:23.276503 TxDqDly_Margin_A1==88 ps 9
434 06:57:23.277020 TrainedVREFDQ_A0==74
435 06:57:23.281441 TrainedVREFDQ_A1==74
436 06:57:23.281973 VrefDac_Margin_A0==25
437 06:57:23.282423 DeviceVref_Margin_A0==40
438 06:57:23.287029 VrefDac_Margin_A1==25
439 06:57:23.287565 DeviceVref_Margin_A1==40
440 06:57:23.288038
441 06:57:23.288497
442 06:57:23.288935 channel==1
443 06:57:23.292589 RxClkDly_Margin_A0==88 ps 9
444 06:57:23.293081 TxDqDly_Margin_A0==88 ps 9
445 06:57:23.298248 RxClkDly_Margin_A1==88 ps 9
446 06:57:23.298754 TxDqDly_Margin_A1==88 ps 9
447 06:57:23.303906 TrainedVREFDQ_A0==77
448 06:57:23.304384 TrainedVREFDQ_A1==77
449 06:57:23.304843 VrefDac_Margin_A0==22
450 06:57:23.309436 DeviceVref_Margin_A0==37
451 06:57:23.309934 VrefDac_Margin_A1==24
452 06:57:23.310429 DeviceVref_Margin_A1==37
453 06:57:23.315024
454 06:57:23.315525 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 06:57:23.316006
456 06:57:23.348652 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000017 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 06:57:23.349292 2D training succeed
458 06:57:23.354287 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 06:57:23.359804 auto size-- 65535DDR cs0 size: 2048MB
460 06:57:23.360361 DDR cs1 size: 2048MB
461 06:57:23.365314 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 06:57:23.365820 cs0 DataBus test pass
463 06:57:23.370896 cs1 DataBus test pass
464 06:57:23.371392 cs0 AddrBus test pass
465 06:57:23.371849 cs1 AddrBus test pass
466 06:57:23.372322
467 06:57:23.376492 100bdlr_step_size ps== 420
468 06:57:23.377037 result report
469 06:57:23.382108 boot times 0Enable ddr reg access
470 06:57:23.387181 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 06:57:23.400653 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 06:57:23.972719 0.0;M3 CHK:0;cm4_sp_mode 0
473 06:57:23.973334 MVN_1=0x00000000
474 06:57:23.978222 MVN_2=0x00000000
475 06:57:23.983975 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 06:57:23.984500 OPS=0x10
477 06:57:23.984911 ring efuse init
478 06:57:23.985309 chipver efuse init
479 06:57:23.989630 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 06:57:23.995155 [0.018961 Inits done]
481 06:57:23.995637 secure task start!
482 06:57:23.996077 high task start!
483 06:57:23.999735 low task start!
484 06:57:24.000241 run into bl31
485 06:57:24.006354 NOTICE: BL31: v1.3(release):4fc40b1
486 06:57:24.014172 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 06:57:24.014673 NOTICE: BL31: G12A normal boot!
488 06:57:24.039602 NOTICE: BL31: BL33 decompress pass
489 06:57:24.045189 ERROR: Error initializing runtime service opteed_fast
490 06:57:25.278212
491 06:57:25.278852
492 06:57:25.286659 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 06:57:25.287285
494 06:57:25.287709 Model: Libre Computer AML-A311D-CC Alta
495 06:57:25.494968 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 06:57:25.518306 DRAM: 2 GiB (effective 3.8 GiB)
497 06:57:25.661367 Core: 408 devices, 31 uclasses, devicetree: separate
498 06:57:25.667187 WDT: Not starting watchdog@f0d0
499 06:57:25.699481 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 06:57:25.711848 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 06:57:25.716914 ** Bad device specification mmc 0 **
502 06:57:25.727225 Card did not respond to voltage select! : -110
503 06:57:25.734852 ** Bad device specification mmc 0 **
504 06:57:25.735315 Couldn't find partition mmc 0
505 06:57:25.743202 Card did not respond to voltage select! : -110
506 06:57:25.748717 ** Bad device specification mmc 0 **
507 06:57:25.749192 Couldn't find partition mmc 0
508 06:57:25.753784 Error: could not access storage.
509 06:57:27.018797 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 06:57:27.019430 bl2_stage_init 0x01
511 06:57:27.019844 bl2_stage_init 0x81
512 06:57:27.024358 hw id: 0x0000 - pwm id 0x01
513 06:57:27.024814 bl2_stage_init 0xc1
514 06:57:27.025219 bl2_stage_init 0x02
515 06:57:27.025614
516 06:57:27.029944 L0:00000000
517 06:57:27.030371 L1:20000703
518 06:57:27.030763 L2:00008067
519 06:57:27.031153 L3:14000000
520 06:57:27.035526 B2:00402000
521 06:57:27.035950 B1:e0f83180
522 06:57:27.036375
523 06:57:27.036769 TE: 58159
524 06:57:27.037157
525 06:57:27.041240 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 06:57:27.041669
527 06:57:27.042064 Board ID = 1
528 06:57:27.046719 Set A53 clk to 24M
529 06:57:27.047141 Set A73 clk to 24M
530 06:57:27.047533 Set clk81 to 24M
531 06:57:27.052312 A53 clk: 1200 MHz
532 06:57:27.052727 A73 clk: 1200 MHz
533 06:57:27.053128 CLK81: 166.6M
534 06:57:27.053540 smccc: 00012ab5
535 06:57:27.057947 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 06:57:27.063506 board id: 1
537 06:57:27.069376 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 06:57:27.080065 fw parse done
539 06:57:27.085994 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 06:57:27.128710 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 06:57:27.139532 PIEI prepare done
542 06:57:27.139951 fastboot data load
543 06:57:27.140386 fastboot data verify
544 06:57:27.145255 verify result: 266
545 06:57:27.150748 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 06:57:27.151167 LPDDR4 probe
547 06:57:27.151556 ddr clk to 1584MHz
548 06:57:27.158724 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 06:57:27.196183
550 06:57:27.196657 dmc_version 0001
551 06:57:27.202683 Check phy result
552 06:57:27.208572 INFO : End of CA training
553 06:57:27.208990 INFO : End of initialization
554 06:57:27.214248 INFO : Training has run successfully!
555 06:57:27.214664 Check phy result
556 06:57:27.219752 INFO : End of initialization
557 06:57:27.220193 INFO : End of read enable training
558 06:57:27.225369 INFO : End of fine write leveling
559 06:57:27.231001 INFO : End of Write leveling coarse delay
560 06:57:27.231419 INFO : Training has run successfully!
561 06:57:27.231806 Check phy result
562 06:57:27.236576 INFO : End of initialization
563 06:57:27.237035 INFO : End of read dq deskew training
564 06:57:27.242247 INFO : End of MPR read delay center optimization
565 06:57:27.247749 INFO : End of write delay center optimization
566 06:57:27.253374 INFO : End of read delay center optimization
567 06:57:27.253788 INFO : End of max read latency training
568 06:57:27.259057 INFO : Training has run successfully!
569 06:57:27.259485 1D training succeed
570 06:57:27.268153 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 06:57:27.315770 Check phy result
572 06:57:27.316257 INFO : End of initialization
573 06:57:27.337496 INFO : End of 2D read delay Voltage center optimization
574 06:57:27.357750 INFO : End of 2D read delay Voltage center optimization
575 06:57:27.409805 INFO : End of 2D write delay Voltage center optimization
576 06:57:27.459153 INFO : End of 2D write delay Voltage center optimization
577 06:57:27.464721 INFO : Training has run successfully!
578 06:57:27.465142
579 06:57:27.465535 channel==0
580 06:57:27.470267 RxClkDly_Margin_A0==88 ps 9
581 06:57:27.470701 TxDqDly_Margin_A0==98 ps 10
582 06:57:27.475903 RxClkDly_Margin_A1==88 ps 9
583 06:57:27.476385 TxDqDly_Margin_A1==88 ps 9
584 06:57:27.476783 TrainedVREFDQ_A0==74
585 06:57:27.481547 TrainedVREFDQ_A1==74
586 06:57:27.481988 VrefDac_Margin_A0==25
587 06:57:27.482376 DeviceVref_Margin_A0==40
588 06:57:27.487076 VrefDac_Margin_A1==25
589 06:57:27.487493 DeviceVref_Margin_A1==40
590 06:57:27.487886
591 06:57:27.488318
592 06:57:27.488710 channel==1
593 06:57:27.492722 RxClkDly_Margin_A0==98 ps 10
594 06:57:27.493139 TxDqDly_Margin_A0==98 ps 10
595 06:57:27.498279 RxClkDly_Margin_A1==88 ps 9
596 06:57:27.498694 TxDqDly_Margin_A1==88 ps 9
597 06:57:27.503899 TrainedVREFDQ_A0==77
598 06:57:27.504345 TrainedVREFDQ_A1==77
599 06:57:27.504738 VrefDac_Margin_A0==22
600 06:57:27.509474 DeviceVref_Margin_A0==37
601 06:57:27.509884 VrefDac_Margin_A1==24
602 06:57:27.515103 DeviceVref_Margin_A1==37
603 06:57:27.515514
604 06:57:27.515907 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 06:57:27.516326
606 06:57:27.548674 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 06:57:27.549158 2D training succeed
608 06:57:27.554319 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 06:57:27.559887 auto size-- 65535DDR cs0 size: 2048MB
610 06:57:27.560333 DDR cs1 size: 2048MB
611 06:57:27.565468 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 06:57:27.565889 cs0 DataBus test pass
613 06:57:27.571104 cs1 DataBus test pass
614 06:57:27.571520 cs0 AddrBus test pass
615 06:57:27.571910 cs1 AddrBus test pass
616 06:57:27.572330
617 06:57:27.576724 100bdlr_step_size ps== 420
618 06:57:27.577151 result report
619 06:57:27.582290 boot times 0Enable ddr reg access
620 06:57:27.587556 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 06:57:27.601117 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 06:57:28.174868 0.0;M3 CHK:0;cm4_sp_mode 0
623 06:57:28.175434 MVN_1=0x00000000
624 06:57:28.180404 MVN_2=0x00000000
625 06:57:28.186014 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 06:57:28.186434 OPS=0x10
627 06:57:28.186827 ring efuse init
628 06:57:28.187211 chipver efuse init
629 06:57:28.191586 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 06:57:28.197273 [0.018961 Inits done]
631 06:57:28.197727 secure task start!
632 06:57:28.198114 high task start!
633 06:57:28.201809 low task start!
634 06:57:28.202225 run into bl31
635 06:57:28.208438 NOTICE: BL31: v1.3(release):4fc40b1
636 06:57:28.216208 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 06:57:28.216629 NOTICE: BL31: G12A normal boot!
638 06:57:28.241546 NOTICE: BL31: BL33 decompress pass
639 06:57:28.247267 ERROR: Error initializing runtime service opteed_fast
640 06:57:29.480409
641 06:57:29.481000
642 06:57:29.488837 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 06:57:29.489283
644 06:57:29.489694 Model: Libre Computer AML-A311D-CC Alta
645 06:57:29.697173 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 06:57:29.720532 DRAM: 2 GiB (effective 3.8 GiB)
647 06:57:29.863650 Core: 408 devices, 31 uclasses, devicetree: separate
648 06:57:29.869448 WDT: Not starting watchdog@f0d0
649 06:57:29.901738 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 06:57:29.914039 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 06:57:29.918295 ** Bad device specification mmc 0 **
652 06:57:29.929552 Card did not respond to voltage select! : -110
653 06:57:29.937151 ** Bad device specification mmc 0 **
654 06:57:29.937580 Couldn't find partition mmc 0
655 06:57:29.945515 Card did not respond to voltage select! : -110
656 06:57:29.951039 ** Bad device specification mmc 0 **
657 06:57:29.951479 Couldn't find partition mmc 0
658 06:57:29.955880 Error: could not access storage.
659 06:57:30.298462 Net: eth0: ethernet@ff3f0000
660 06:57:30.298934 starting USB...
661 06:57:30.550205 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 06:57:30.550667 Starting the controller
663 06:57:30.557327 USB XHCI 1.10
664 06:57:32.269040 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 06:57:32.269677 bl2_stage_init 0x01
666 06:57:32.270141 bl2_stage_init 0x81
667 06:57:32.274515 hw id: 0x0000 - pwm id 0x01
668 06:57:32.274865 bl2_stage_init 0xc1
669 06:57:32.275139 bl2_stage_init 0x02
670 06:57:32.275407
671 06:57:32.280016 L0:00000000
672 06:57:32.280375 L1:20000703
673 06:57:32.280653 L2:00008067
674 06:57:32.280905 L3:14000000
675 06:57:32.285738 B2:00402000
676 06:57:32.286112 B1:e0f83180
677 06:57:32.286389
678 06:57:32.286650 TE: 58124
679 06:57:32.286915
680 06:57:32.291325 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 06:57:32.291664
682 06:57:32.291944 Board ID = 1
683 06:57:32.297107 Set A53 clk to 24M
684 06:57:32.297675 Set A73 clk to 24M
685 06:57:32.298217 Set clk81 to 24M
686 06:57:32.302564 A53 clk: 1200 MHz
687 06:57:32.303107 A73 clk: 1200 MHz
688 06:57:32.303765 CLK81: 166.6M
689 06:57:32.304566 smccc: 00012a91
690 06:57:32.308110 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 06:57:32.313603 board id: 1
692 06:57:32.319529 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 06:57:32.330197 fw parse done
694 06:57:32.336223 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 06:57:32.379003 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 06:57:32.389886 PIEI prepare done
697 06:57:32.390309 fastboot data load
698 06:57:32.390585 fastboot data verify
699 06:57:32.395708 verify result: 266
700 06:57:32.401100 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 06:57:32.401526 LPDDR4 probe
702 06:57:32.401805 ddr clk to 1584MHz
703 06:57:32.409192 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 06:57:32.446218
705 06:57:32.446858 dmc_version 0001
706 06:57:32.452995 Check phy result
707 06:57:32.458746 INFO : End of CA training
708 06:57:32.459114 INFO : End of initialization
709 06:57:32.464278 INFO : Training has run successfully!
710 06:57:32.464635 Check phy result
711 06:57:32.469937 INFO : End of initialization
712 06:57:32.470289 INFO : End of read enable training
713 06:57:32.473150 INFO : End of fine write leveling
714 06:57:32.478867 INFO : End of Write leveling coarse delay
715 06:57:32.484439 INFO : Training has run successfully!
716 06:57:32.484968 Check phy result
717 06:57:32.485388 INFO : End of initialization
718 06:57:32.490108 INFO : End of read dq deskew training
719 06:57:32.495590 INFO : End of MPR read delay center optimization
720 06:57:32.496143 INFO : End of write delay center optimization
721 06:57:32.501302 INFO : End of read delay center optimization
722 06:57:32.506863 INFO : End of max read latency training
723 06:57:32.507386 INFO : Training has run successfully!
724 06:57:32.512422 1D training succeed
725 06:57:32.518421 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 06:57:32.566040 Check phy result
727 06:57:32.566643 INFO : End of initialization
728 06:57:32.587754 INFO : End of 2D read delay Voltage center optimization
729 06:57:32.608044 INFO : End of 2D read delay Voltage center optimization
730 06:57:32.660172 INFO : End of 2D write delay Voltage center optimization
731 06:57:32.709345 INFO : End of 2D write delay Voltage center optimization
732 06:57:32.714927 INFO : Training has run successfully!
733 06:57:32.715466
734 06:57:32.715888 channel==0
735 06:57:32.720664 RxClkDly_Margin_A0==88 ps 9
736 06:57:32.721214 TxDqDly_Margin_A0==98 ps 10
737 06:57:32.726330 RxClkDly_Margin_A1==88 ps 9
738 06:57:32.726866 TxDqDly_Margin_A1==88 ps 9
739 06:57:32.727287 TrainedVREFDQ_A0==74
740 06:57:32.731740 TrainedVREFDQ_A1==74
741 06:57:32.732319 VrefDac_Margin_A0==25
742 06:57:32.732743 DeviceVref_Margin_A0==40
743 06:57:32.737422 VrefDac_Margin_A1==25
744 06:57:32.737941 DeviceVref_Margin_A1==40
745 06:57:32.738355
746 06:57:32.738756
747 06:57:32.739159 channel==1
748 06:57:32.742945 RxClkDly_Margin_A0==88 ps 9
749 06:57:32.743464 TxDqDly_Margin_A0==98 ps 10
750 06:57:32.748565 RxClkDly_Margin_A1==98 ps 10
751 06:57:32.749085 TxDqDly_Margin_A1==88 ps 9
752 06:57:32.754317 TrainedVREFDQ_A0==77
753 06:57:32.754838 TrainedVREFDQ_A1==77
754 06:57:32.755251 VrefDac_Margin_A0==22
755 06:57:32.759786 DeviceVref_Margin_A0==37
756 06:57:32.760343 VrefDac_Margin_A1==24
757 06:57:32.765414 DeviceVref_Margin_A1==37
758 06:57:32.765940
759 06:57:32.766353 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 06:57:32.766757
761 06:57:32.798922 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 06:57:32.799356 2D training succeed
763 06:57:32.804482 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 06:57:32.810189 auto size-- 65535DDR cs0 size: 2048MB
765 06:57:32.810701 DDR cs1 size: 2048MB
766 06:57:32.815575 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 06:57:32.816218 cs0 DataBus test pass
768 06:57:32.821262 cs1 DataBus test pass
769 06:57:32.821805 cs0 AddrBus test pass
770 06:57:32.822209 cs1 AddrBus test pass
771 06:57:32.822570
772 06:57:32.826810 100bdlr_step_size ps== 420
773 06:57:32.827326 result report
774 06:57:32.832345 boot times 0Enable ddr reg access
775 06:57:32.837603 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 06:57:32.851074 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 06:57:33.424960 0.0;M3 CHK:0;cm4_sp_mode 0
778 06:57:33.425551 MVN_1=0x00000000
779 06:57:33.430231 MVN_2=0x00000000
780 06:57:33.436046 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 06:57:33.436433 OPS=0x10
782 06:57:33.437034 ring efuse init
783 06:57:33.437444 chipver efuse init
784 06:57:33.441568 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 06:57:33.447155 [0.018961 Inits done]
786 06:57:33.447555 secure task start!
787 06:57:33.447909 high task start!
788 06:57:33.451772 low task start!
789 06:57:33.452095 run into bl31
790 06:57:33.458506 NOTICE: BL31: v1.3(release):4fc40b1
791 06:57:33.466265 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 06:57:33.466846 NOTICE: BL31: G12A normal boot!
793 06:57:33.491716 NOTICE: BL31: BL33 decompress pass
794 06:57:33.497380 ERROR: Error initializing runtime service opteed_fast
795 06:57:34.730515
796 06:57:34.731505
797 06:57:34.738824 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 06:57:34.739609
799 06:57:34.740445 Model: Libre Computer AML-A311D-CC Alta
800 06:57:34.947167 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 06:57:34.970568 DRAM: 2 GiB (effective 3.8 GiB)
802 06:57:35.113654 Core: 408 devices, 31 uclasses, devicetree: separate
803 06:57:35.119533 WDT: Not starting watchdog@f0d0
804 06:57:35.151688 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 06:57:35.164103 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 06:57:35.169152 ** Bad device specification mmc 0 **
807 06:57:35.179401 Card did not respond to voltage select! : -110
808 06:57:35.187222 ** Bad device specification mmc 0 **
809 06:57:35.188090 Couldn't find partition mmc 0
810 06:57:35.195500 Card did not respond to voltage select! : -110
811 06:57:35.201147 ** Bad device specification mmc 0 **
812 06:57:35.201972 Couldn't find partition mmc 0
813 06:57:35.205997 Error: could not access storage.
814 06:57:35.548610 Net: eth0: ethernet@ff3f0000
815 06:57:35.549553 starting USB...
816 06:57:35.800438 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 06:57:35.801382 Starting the controller
818 06:57:35.806759 USB XHCI 1.10
819 06:57:37.970469 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 06:57:37.971136 bl2_stage_init 0x01
821 06:57:37.971570 bl2_stage_init 0x81
822 06:57:37.976212 hw id: 0x0000 - pwm id 0x01
823 06:57:37.976740 bl2_stage_init 0xc1
824 06:57:37.977158 bl2_stage_init 0x02
825 06:57:37.977563
826 06:57:37.981762 L0:00000000
827 06:57:37.982437 L1:20000703
828 06:57:37.982886 L2:00008067
829 06:57:37.983294 L3:14000000
830 06:57:37.987325 B2:00402000
831 06:57:37.987824 B1:e0f83180
832 06:57:37.988280
833 06:57:37.988693 TE: 58124
834 06:57:37.989100
835 06:57:37.992889 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 06:57:37.993399
837 06:57:37.993907 Board ID = 1
838 06:57:37.998374 Set A53 clk to 24M
839 06:57:37.998867 Set A73 clk to 24M
840 06:57:37.999278 Set clk81 to 24M
841 06:57:38.004099 A53 clk: 1200 MHz
842 06:57:38.004589 A73 clk: 1200 MHz
843 06:57:38.005000 CLK81: 166.6M
844 06:57:38.005401 smccc: 00012a92
845 06:57:38.009529 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 06:57:38.015096 board id: 1
847 06:57:38.020969 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 06:57:38.031700 fw parse done
849 06:57:38.037682 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 06:57:38.080387 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 06:57:38.091238 PIEI prepare done
852 06:57:38.091841 fastboot data load
853 06:57:38.092373 fastboot data verify
854 06:57:38.096927 verify result: 266
855 06:57:38.102496 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 06:57:38.103094 LPDDR4 probe
857 06:57:38.103570 ddr clk to 1584MHz
858 06:57:38.110573 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 06:57:38.147831
860 06:57:38.148527 dmc_version 0001
861 06:57:38.154419 Check phy result
862 06:57:38.160281 INFO : End of CA training
863 06:57:38.160841 INFO : End of initialization
864 06:57:38.165917 INFO : Training has run successfully!
865 06:57:38.166479 Check phy result
866 06:57:38.171430 INFO : End of initialization
867 06:57:38.172010 INFO : End of read enable training
868 06:57:38.174817 INFO : End of fine write leveling
869 06:57:38.180310 INFO : End of Write leveling coarse delay
870 06:57:38.185953 INFO : Training has run successfully!
871 06:57:38.186518 Check phy result
872 06:57:38.186991 INFO : End of initialization
873 06:57:38.191483 INFO : End of read dq deskew training
874 06:57:38.195073 INFO : End of MPR read delay center optimization
875 06:57:38.200694 INFO : End of write delay center optimization
876 06:57:38.206226 INFO : End of read delay center optimization
877 06:57:38.206787 INFO : End of max read latency training
878 06:57:38.211922 INFO : Training has run successfully!
879 06:57:38.212515 1D training succeed
880 06:57:38.219816 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 06:57:38.267440 Check phy result
882 06:57:38.268081 INFO : End of initialization
883 06:57:38.289245 INFO : End of 2D read delay Voltage center optimization
884 06:57:38.309484 INFO : End of 2D read delay Voltage center optimization
885 06:57:38.361566 INFO : End of 2D write delay Voltage center optimization
886 06:57:38.411082 INFO : End of 2D write delay Voltage center optimization
887 06:57:38.416505 INFO : Training has run successfully!
888 06:57:38.417061
889 06:57:38.417532 channel==0
890 06:57:38.422037 RxClkDly_Margin_A0==88 ps 9
891 06:57:38.422575 TxDqDly_Margin_A0==98 ps 10
892 06:57:38.427592 RxClkDly_Margin_A1==88 ps 9
893 06:57:38.428170 TxDqDly_Margin_A1==88 ps 9
894 06:57:38.428652 TrainedVREFDQ_A0==74
895 06:57:38.433262 TrainedVREFDQ_A1==74
896 06:57:38.433805 VrefDac_Margin_A0==25
897 06:57:38.434262 DeviceVref_Margin_A0==40
898 06:57:38.438947 VrefDac_Margin_A1==25
899 06:57:38.439476 DeviceVref_Margin_A1==40
900 06:57:38.439937
901 06:57:38.440447
902 06:57:38.440898 channel==1
903 06:57:38.444391 RxClkDly_Margin_A0==98 ps 10
904 06:57:38.444905 TxDqDly_Margin_A0==88 ps 9
905 06:57:38.450031 RxClkDly_Margin_A1==98 ps 10
906 06:57:38.450560 TxDqDly_Margin_A1==88 ps 9
907 06:57:38.455637 TrainedVREFDQ_A0==76
908 06:57:38.456243 TrainedVREFDQ_A1==77
909 06:57:38.456721 VrefDac_Margin_A0==22
910 06:57:38.461098 DeviceVref_Margin_A0==38
911 06:57:38.461615 VrefDac_Margin_A1==22
912 06:57:38.466971 DeviceVref_Margin_A1==37
913 06:57:38.467512
914 06:57:38.467967 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 06:57:38.468441
916 06:57:38.500426 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 06:57:38.501191 2D training succeed
918 06:57:38.506098 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 06:57:38.511637 auto size-- 65535DDR cs0 size: 2048MB
920 06:57:38.512304 DDR cs1 size: 2048MB
921 06:57:38.517104 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 06:57:38.517704 cs0 DataBus test pass
923 06:57:38.522823 cs1 DataBus test pass
924 06:57:38.523525 cs0 AddrBus test pass
925 06:57:38.524126 cs1 AddrBus test pass
926 06:57:38.524685
927 06:57:38.528337 100bdlr_step_size ps== 420
928 06:57:38.528923 result report
929 06:57:38.533823 boot times 0Enable ddr reg access
930 06:57:38.539106 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 06:57:38.552667 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 06:57:39.126328 0.0;M3 CHK:0;cm4_sp_mode 0
933 06:57:39.127017 MVN_1=0x00000000
934 06:57:39.131819 MVN_2=0x00000000
935 06:57:39.137581 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 06:57:39.138129 OPS=0x10
937 06:57:39.138664 ring efuse init
938 06:57:39.139163 chipver efuse init
939 06:57:39.143225 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 06:57:39.148829 [0.018961 Inits done]
941 06:57:39.149360 secure task start!
942 06:57:39.149822 high task start!
943 06:57:39.153324 low task start!
944 06:57:39.153831 run into bl31
945 06:57:39.159935 NOTICE: BL31: v1.3(release):4fc40b1
946 06:57:39.167750 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 06:57:39.168314 NOTICE: BL31: G12A normal boot!
948 06:57:39.193269 NOTICE: BL31: BL33 decompress pass
949 06:57:39.198937 ERROR: Error initializing runtime service opteed_fast
950 06:57:40.431898
951 06:57:40.432608
952 06:57:40.440320 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 06:57:40.440836
954 06:57:40.441324 Model: Libre Computer AML-A311D-CC Alta
955 06:57:40.648708 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 06:57:40.672059 DRAM: 2 GiB (effective 3.8 GiB)
957 06:57:40.815090 Core: 408 devices, 31 uclasses, devicetree: separate
958 06:57:40.820979 WDT: Not starting watchdog@f0d0
959 06:57:40.853171 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 06:57:40.865626 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 06:57:40.870623 ** Bad device specification mmc 0 **
962 06:57:40.880947 Card did not respond to voltage select! : -110
963 06:57:40.888575 ** Bad device specification mmc 0 **
964 06:57:40.889060 Couldn't find partition mmc 0
965 06:57:40.896867 Card did not respond to voltage select! : -110
966 06:57:40.902435 ** Bad device specification mmc 0 **
967 06:57:40.902912 Couldn't find partition mmc 0
968 06:57:40.907431 Error: could not access storage.
969 06:57:41.251207 Net: eth0: ethernet@ff3f0000
970 06:57:41.251882 starting USB...
971 06:57:41.503109 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 06:57:41.504469 Starting the controller
973 06:57:41.508926 USB XHCI 1.10
974 06:57:43.063830 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 06:57:43.072219 scanning usb for storage devices... 0 Storage Device(s) found
977 06:57:43.124003 Hit any key to stop autoboot: 1
978 06:57:43.125268 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 06:57:43.125892 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 06:57:43.126383 Setting prompt string to ['=>']
981 06:57:43.126878 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 06:57:43.139717 0
983 06:57:43.140665 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 06:57:43.141166 Sending with 10 millisecond of delay
986 06:57:44.276104 => setenv autoload no
987 06:57:44.286932 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 06:57:44.292049 setenv autoload no
989 06:57:44.292802 Sending with 10 millisecond of delay
991 06:57:46.090281 => setenv initrd_high 0xffffffff
992 06:57:46.101575 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 06:57:46.102643 setenv initrd_high 0xffffffff
994 06:57:46.103563 Sending with 10 millisecond of delay
996 06:57:47.721064 => setenv fdt_high 0xffffffff
997 06:57:47.731957 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 06:57:47.732927 setenv fdt_high 0xffffffff
999 06:57:47.733769 Sending with 10 millisecond of delay
1001 06:57:48.025961 => dhcp
1002 06:57:48.036825 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 06:57:48.037789 dhcp
1004 06:57:48.038258 Speed: 1000, full duplex
1005 06:57:48.038742 BOOTP broadcast 1
1006 06:57:48.284709 BOOTP broadcast 2
1007 06:57:48.786510 BOOTP broadcast 3
1008 06:57:48.798299 DHCP client bound to address 192.168.6.33 (761 ms)
1009 06:57:48.799748 Sending with 10 millisecond of delay
1011 06:57:50.479433 => setenv serverip 192.168.6.2
1012 06:57:50.490503 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1013 06:57:50.491784 setenv serverip 192.168.6.2
1014 06:57:50.492735 Sending with 10 millisecond of delay
1016 06:57:54.218599 => tftpboot 0x01080000 714813/tftp-deploy-g41fb_oi/kernel/uImage
1017 06:57:54.229449 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1018 06:57:54.230436 tftpboot 0x01080000 714813/tftp-deploy-g41fb_oi/kernel/uImage
1019 06:57:54.230945 Speed: 1000, full duplex
1020 06:57:54.231427 Using ethernet@ff3f0000 device
1021 06:57:54.232422 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1022 06:57:54.237982 Filename '714813/tftp-deploy-g41fb_oi/kernel/uImage'.
1023 06:57:54.241853 Load address: 0x1080000
1024 06:57:57.050927 Loading: *################################################## 43.2 MiB
1025 06:57:57.051639 15.4 MiB/s
1026 06:57:57.052213 done
1027 06:57:57.055377 Bytes transferred = 45308480 (2b35a40 hex)
1028 06:57:57.056238 Sending with 10 millisecond of delay
1030 06:58:01.745766 => tftpboot 0x08000000 714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot
1031 06:58:01.756502 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1032 06:58:01.757306 tftpboot 0x08000000 714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot
1033 06:58:01.757746 Speed: 1000, full duplex
1034 06:58:01.758160 Using ethernet@ff3f0000 device
1035 06:58:01.759306 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1036 06:58:01.767950 Filename '714813/tftp-deploy-g41fb_oi/ramdisk/ramdisk.cpio.gz.uboot'.
1037 06:58:01.768486 Load address: 0x8000000
1038 06:58:06.570012 Loading: *########################## UDP wrong checksum 000000ff 000097fc
1039 06:58:06.585485 UDP wrong checksum 000000ff 00002cef
1040 06:58:08.649907 T ####################### UDP wrong checksum 00000005 00006b9a
1041 06:58:13.651844 T UDP wrong checksum 00000005 00006b9a
1042 06:58:23.654115 T T UDP wrong checksum 00000005 00006b9a
1043 06:58:30.430810 T UDP wrong checksum 000000ff 0000dab6
1044 06:58:30.446986 UDP wrong checksum 000000ff 00006aa9
1045 06:58:36.951328 T UDP wrong checksum 000000ff 000025b3
1046 06:58:36.966570 UDP wrong checksum 000000ff 0000b7a5
1047 06:58:43.656500 T UDP wrong checksum 00000005 00006b9a
1048 06:58:58.663055 T T T
1049 06:58:58.663470 Retry count exceeded; starting again
1051 06:58:58.664806 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1054 06:58:58.666766 end: 2.4 uboot-commands (duration 00:01:48) [common]
1056 06:58:58.668275 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1058 06:58:58.669443 end: 2 uboot-action (duration 00:01:48) [common]
1060 06:58:58.671070 Cleaning after the job
1061 06:58:58.671689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/ramdisk
1062 06:58:58.673021 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/kernel
1063 06:58:58.714856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/dtb
1064 06:58:58.715838 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/nfsrootfs
1065 06:58:58.876454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714813/tftp-deploy-g41fb_oi/modules
1066 06:58:58.895242 start: 4.1 power-off (timeout 00:00:30) [common]
1067 06:58:58.895948 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1068 06:58:58.930192 >> OK - accepted request
1069 06:58:58.932415 Returned 0 in 0 seconds
1070 06:58:59.033580 end: 4.1 power-off (duration 00:00:00) [common]
1072 06:58:59.034759 start: 4.2 read-feedback (timeout 00:10:00) [common]
1073 06:58:59.035472 Listened to connection for namespace 'common' for up to 1s
1074 06:59:00.035540 Finalising connection for namespace 'common'
1075 06:59:00.036353 Disconnecting from shell: Finalise
1076 06:59:00.036910 =>
1077 06:59:00.137971 end: 4.2 read-feedback (duration 00:00:01) [common]
1078 06:59:00.138687 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/714813
1079 06:59:03.304508 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/714813
1080 06:59:03.305244 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.