Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 07:12:11.783948 lava-dispatcher, installed at version: 2024.01
2 07:12:11.784775 start: 0 validate
3 07:12:11.785242 Start time: 2024-09-06 07:12:11.785213+00:00 (UTC)
4 07:12:11.785780 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 07:12:11.786318 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 07:12:11.825843 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 07:12:11.826401 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 07:12:11.858234 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 07:12:11.858873 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 07:12:11.892942 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 07:12:11.893454 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 07:12:11.927620 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 07:12:11.928138 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 07:12:11.969235 validate duration: 0.18
16 07:12:11.970064 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 07:12:11.970391 start: 1.1 download-retry (timeout 00:10:00) [common]
18 07:12:11.970678 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 07:12:11.971291 Not decompressing ramdisk as can be used compressed.
20 07:12:11.971760 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 07:12:11.972064 saving as /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/ramdisk/initrd.cpio.gz
22 07:12:11.972350 total size: 5628169 (5 MB)
23 07:12:12.012177 progress 0 % (0 MB)
24 07:12:12.022156 progress 5 % (0 MB)
25 07:12:12.030352 progress 10 % (0 MB)
26 07:12:12.034933 progress 15 % (0 MB)
27 07:12:12.040142 progress 20 % (1 MB)
28 07:12:12.044686 progress 25 % (1 MB)
29 07:12:12.049783 progress 30 % (1 MB)
30 07:12:12.055027 progress 35 % (1 MB)
31 07:12:12.059585 progress 40 % (2 MB)
32 07:12:12.064586 progress 45 % (2 MB)
33 07:12:12.069082 progress 50 % (2 MB)
34 07:12:12.073946 progress 55 % (2 MB)
35 07:12:12.078807 progress 60 % (3 MB)
36 07:12:12.083267 progress 65 % (3 MB)
37 07:12:12.088436 progress 70 % (3 MB)
38 07:12:12.093057 progress 75 % (4 MB)
39 07:12:12.097944 progress 80 % (4 MB)
40 07:12:12.102378 progress 85 % (4 MB)
41 07:12:12.107233 progress 90 % (4 MB)
42 07:12:12.111762 progress 95 % (5 MB)
43 07:12:12.115703 progress 100 % (5 MB)
44 07:12:12.116503 5 MB downloaded in 0.14 s (37.24 MB/s)
45 07:12:12.117154 end: 1.1.1 http-download (duration 00:00:00) [common]
47 07:12:12.118227 end: 1.1 download-retry (duration 00:00:00) [common]
48 07:12:12.118583 start: 1.2 download-retry (timeout 00:10:00) [common]
49 07:12:12.118914 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 07:12:12.119465 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/kernel/Image
51 07:12:12.119762 saving as /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/kernel/Image
52 07:12:12.120044 total size: 45308416 (43 MB)
53 07:12:12.120301 No compression specified
54 07:12:12.160299 progress 0 % (0 MB)
55 07:12:12.190948 progress 5 % (2 MB)
56 07:12:12.221277 progress 10 % (4 MB)
57 07:12:12.250557 progress 15 % (6 MB)
58 07:12:12.279888 progress 20 % (8 MB)
59 07:12:12.307956 progress 25 % (10 MB)
60 07:12:12.336179 progress 30 % (12 MB)
61 07:12:12.364363 progress 35 % (15 MB)
62 07:12:12.393161 progress 40 % (17 MB)
63 07:12:12.421216 progress 45 % (19 MB)
64 07:12:12.449754 progress 50 % (21 MB)
65 07:12:12.478562 progress 55 % (23 MB)
66 07:12:12.506983 progress 60 % (25 MB)
67 07:12:12.535819 progress 65 % (28 MB)
68 07:12:12.564545 progress 70 % (30 MB)
69 07:12:12.593540 progress 75 % (32 MB)
70 07:12:12.621981 progress 80 % (34 MB)
71 07:12:12.650275 progress 85 % (36 MB)
72 07:12:12.679153 progress 90 % (38 MB)
73 07:12:12.707972 progress 95 % (41 MB)
74 07:12:12.735618 progress 100 % (43 MB)
75 07:12:12.736331 43 MB downloaded in 0.62 s (70.11 MB/s)
76 07:12:12.736826 end: 1.2.1 http-download (duration 00:00:01) [common]
78 07:12:12.737638 end: 1.2 download-retry (duration 00:00:01) [common]
79 07:12:12.737911 start: 1.3 download-retry (timeout 00:09:59) [common]
80 07:12:12.738176 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 07:12:12.738640 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 07:12:12.738908 saving as /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 07:12:12.739115 total size: 53173 (0 MB)
84 07:12:12.739324 No compression specified
85 07:12:12.783307 progress 61 % (0 MB)
86 07:12:12.784192 progress 100 % (0 MB)
87 07:12:12.784742 0 MB downloaded in 0.05 s (1.11 MB/s)
88 07:12:12.785232 end: 1.3.1 http-download (duration 00:00:00) [common]
90 07:12:12.786040 end: 1.3 download-retry (duration 00:00:00) [common]
91 07:12:12.786301 start: 1.4 download-retry (timeout 00:09:59) [common]
92 07:12:12.786563 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 07:12:12.787048 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 07:12:12.787301 saving as /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/nfsrootfs/full.rootfs.tar
95 07:12:12.787505 total size: 120894716 (115 MB)
96 07:12:12.787715 Using unxz to decompress xz
97 07:12:12.828416 progress 0 % (0 MB)
98 07:12:13.618001 progress 5 % (5 MB)
99 07:12:14.457912 progress 10 % (11 MB)
100 07:12:15.250959 progress 15 % (17 MB)
101 07:12:15.987668 progress 20 % (23 MB)
102 07:12:16.585041 progress 25 % (28 MB)
103 07:12:17.416543 progress 30 % (34 MB)
104 07:12:18.217773 progress 35 % (40 MB)
105 07:12:18.579454 progress 40 % (46 MB)
106 07:12:19.014516 progress 45 % (51 MB)
107 07:12:19.756487 progress 50 % (57 MB)
108 07:12:20.640266 progress 55 % (63 MB)
109 07:12:21.423835 progress 60 % (69 MB)
110 07:12:22.185654 progress 65 % (74 MB)
111 07:12:22.971952 progress 70 % (80 MB)
112 07:12:23.832841 progress 75 % (86 MB)
113 07:12:24.613645 progress 80 % (92 MB)
114 07:12:25.602544 progress 85 % (98 MB)
115 07:12:26.609059 progress 90 % (103 MB)
116 07:12:27.386655 progress 95 % (109 MB)
117 07:12:28.210157 progress 100 % (115 MB)
118 07:12:28.222580 115 MB downloaded in 15.44 s (7.47 MB/s)
119 07:12:28.223171 end: 1.4.1 http-download (duration 00:00:15) [common]
121 07:12:28.224095 end: 1.4 download-retry (duration 00:00:15) [common]
122 07:12:28.224390 start: 1.5 download-retry (timeout 00:09:44) [common]
123 07:12:28.224671 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 07:12:28.225401 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/modules.tar.xz
125 07:12:28.225679 saving as /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/modules/modules.tar
126 07:12:28.225905 total size: 11502724 (10 MB)
127 07:12:28.226136 Using unxz to decompress xz
128 07:12:28.265767 progress 0 % (0 MB)
129 07:12:28.334096 progress 5 % (0 MB)
130 07:12:28.410855 progress 10 % (1 MB)
131 07:12:28.493415 progress 15 % (1 MB)
132 07:12:28.573064 progress 20 % (2 MB)
133 07:12:28.648565 progress 25 % (2 MB)
134 07:12:28.731553 progress 30 % (3 MB)
135 07:12:28.805470 progress 35 % (3 MB)
136 07:12:28.882854 progress 40 % (4 MB)
137 07:12:28.953493 progress 45 % (4 MB)
138 07:12:29.030163 progress 50 % (5 MB)
139 07:12:29.105346 progress 55 % (6 MB)
140 07:12:29.183955 progress 60 % (6 MB)
141 07:12:29.269021 progress 65 % (7 MB)
142 07:12:29.345358 progress 70 % (7 MB)
143 07:12:29.439784 progress 75 % (8 MB)
144 07:12:29.528107 progress 80 % (8 MB)
145 07:12:29.608314 progress 85 % (9 MB)
146 07:12:29.678273 progress 90 % (9 MB)
147 07:12:29.753222 progress 95 % (10 MB)
148 07:12:29.828680 progress 100 % (10 MB)
149 07:12:29.838497 10 MB downloaded in 1.61 s (6.80 MB/s)
150 07:12:29.839074 end: 1.5.1 http-download (duration 00:00:02) [common]
152 07:12:29.839899 end: 1.5 download-retry (duration 00:00:02) [common]
153 07:12:29.840614 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 07:12:29.841231 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 07:12:46.304108 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/714881/extract-nfsrootfs-zpy5rpoy
156 07:12:46.304708 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 07:12:46.304996 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 07:12:46.305724 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt
159 07:12:46.306184 makedir: /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin
160 07:12:46.306510 makedir: /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/tests
161 07:12:46.306823 makedir: /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/results
162 07:12:46.307149 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-add-keys
163 07:12:46.307699 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-add-sources
164 07:12:46.308276 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-background-process-start
165 07:12:46.308856 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-background-process-stop
166 07:12:46.309405 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-common-functions
167 07:12:46.309910 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-echo-ipv4
168 07:12:46.310401 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-install-packages
169 07:12:46.310948 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-installed-packages
170 07:12:46.311438 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-os-build
171 07:12:46.311920 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-probe-channel
172 07:12:46.312482 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-probe-ip
173 07:12:46.313013 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-target-ip
174 07:12:46.313497 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-target-mac
175 07:12:46.313973 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-target-storage
176 07:12:46.314460 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-case
177 07:12:46.314938 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-event
178 07:12:46.315407 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-feedback
179 07:12:46.315878 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-raise
180 07:12:46.316427 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-reference
181 07:12:46.316973 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-runner
182 07:12:46.317467 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-set
183 07:12:46.317946 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-test-shell
184 07:12:46.318434 Updating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-add-keys (debian)
185 07:12:46.318969 Updating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-add-sources (debian)
186 07:12:46.319482 Updating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-install-packages (debian)
187 07:12:46.320002 Updating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-installed-packages (debian)
188 07:12:46.320525 Updating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/bin/lava-os-build (debian)
189 07:12:46.320966 Creating /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/environment
190 07:12:46.321337 LAVA metadata
191 07:12:46.321601 - LAVA_JOB_ID=714881
192 07:12:46.321813 - LAVA_DISPATCHER_IP=192.168.6.2
193 07:12:46.322164 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 07:12:46.323113 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 07:12:46.323432 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 07:12:46.323639 skipped lava-vland-overlay
197 07:12:46.323875 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 07:12:46.324163 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 07:12:46.324383 skipped lava-multinode-overlay
200 07:12:46.324623 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 07:12:46.324875 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 07:12:46.325125 Loading test definitions
203 07:12:46.325400 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 07:12:46.325616 Using /lava-714881 at stage 0
205 07:12:46.326706 uuid=714881_1.6.2.4.1 testdef=None
206 07:12:46.327018 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 07:12:46.327281 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 07:12:46.328902 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 07:12:46.329696 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 07:12:46.331617 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 07:12:46.332476 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 07:12:46.334293 runner path: /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/0/tests/0_timesync-off test_uuid 714881_1.6.2.4.1
215 07:12:46.334846 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 07:12:46.335663 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 07:12:46.335882 Using /lava-714881 at stage 0
219 07:12:46.336256 Fetching tests from https://github.com/kernelci/test-definitions.git
220 07:12:46.336547 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/0/tests/1_kselftest-rtc'
221 07:12:49.780721 Running '/usr/bin/git checkout kernelci.org
222 07:12:50.239770 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 07:12:50.241260 uuid=714881_1.6.2.4.5 testdef=None
224 07:12:50.241602 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 07:12:50.242340 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 07:12:50.245180 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 07:12:50.245990 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 07:12:50.249741 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 07:12:50.250584 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 07:12:50.254166 runner path: /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/0/tests/1_kselftest-rtc test_uuid 714881_1.6.2.4.5
234 07:12:50.254448 BOARD='meson-sm1-s905d3-libretech-cc'
235 07:12:50.254650 BRANCH='mainline'
236 07:12:50.254846 SKIPFILE='/dev/null'
237 07:12:50.255042 SKIP_INSTALL='True'
238 07:12:50.255235 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 07:12:50.255433 TST_CASENAME=''
240 07:12:50.255661 TST_CMDFILES='rtc'
241 07:12:50.256248 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 07:12:50.257035 Creating lava-test-runner.conf files
244 07:12:50.257238 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/714881/lava-overlay-92bay4rt/lava-714881/0 for stage 0
245 07:12:50.257649 - 0_timesync-off
246 07:12:50.257894 - 1_kselftest-rtc
247 07:12:50.258222 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 07:12:50.258500 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 07:13:13.494330 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 07:13:13.494786 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 07:13:13.495046 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 07:13:13.495313 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 07:13:13.495573 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 07:13:14.125935 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 07:13:14.126413 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 07:13:14.126667 extracting modules file /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714881/extract-nfsrootfs-zpy5rpoy
257 07:13:15.540689 extracting modules file /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714881/extract-overlay-ramdisk-jws9ige6/ramdisk
258 07:13:16.998334 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 07:13:16.998822 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 07:13:16.999099 [common] Applying overlay to NFS
261 07:13:16.999315 [common] Applying overlay /var/lib/lava/dispatcher/tmp/714881/compress-overlay-fk5nv8c5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/714881/extract-nfsrootfs-zpy5rpoy
262 07:13:19.757709 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 07:13:19.758183 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 07:13:19.758457 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 07:13:19.758691 Converting downloaded kernel to a uImage
266 07:13:19.758994 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/kernel/Image /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/kernel/uImage
267 07:13:20.225078 output: Image Name:
268 07:13:20.225504 output: Created: Fri Sep 6 07:13:19 2024
269 07:13:20.225734 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 07:13:20.225949 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
271 07:13:20.226156 output: Load Address: 01080000
272 07:13:20.226362 output: Entry Point: 01080000
273 07:13:20.226563 output:
274 07:13:20.226902 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 07:13:20.227189 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 07:13:20.227472 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 07:13:20.227736 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 07:13:20.228032 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 07:13:20.228309 Building ramdisk /var/lib/lava/dispatcher/tmp/714881/extract-overlay-ramdisk-jws9ige6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/714881/extract-overlay-ramdisk-jws9ige6/ramdisk
280 07:13:22.374905 >> 165160 blocks
281 07:13:30.456544 Adding RAMdisk u-boot header.
282 07:13:30.457398 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/714881/extract-overlay-ramdisk-jws9ige6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/714881/extract-overlay-ramdisk-jws9ige6/ramdisk.cpio.gz.uboot
283 07:13:30.716645 output: Image Name:
284 07:13:30.717068 output: Created: Fri Sep 6 07:13:30 2024
285 07:13:30.717587 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 07:13:30.718045 output: Data Size: 23259107 Bytes = 22713.97 KiB = 22.18 MiB
287 07:13:30.718519 output: Load Address: 00000000
288 07:13:30.718961 output: Entry Point: 00000000
289 07:13:30.719401 output:
290 07:13:30.720456 rename /var/lib/lava/dispatcher/tmp/714881/extract-overlay-ramdisk-jws9ige6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot
291 07:13:30.721238 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 07:13:30.721845 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 07:13:30.722434 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 07:13:30.722939 No LXC device requested
295 07:13:30.723499 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 07:13:30.724100 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 07:13:30.724663 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 07:13:30.725123 Checking files for TFTP limit of 4294967296 bytes.
299 07:13:30.728034 end: 1 tftp-deploy (duration 00:01:19) [common]
300 07:13:30.728668 start: 2 uboot-action (timeout 00:05:00) [common]
301 07:13:30.729254 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 07:13:30.729811 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 07:13:30.730373 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 07:13:30.730956 Using kernel file from prepare-kernel: 714881/tftp-deploy-9m7_1wza/kernel/uImage
305 07:13:30.731648 substitutions:
306 07:13:30.732137 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 07:13:30.732592 - {DTB_ADDR}: 0x01070000
308 07:13:30.733040 - {DTB}: 714881/tftp-deploy-9m7_1wza/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 07:13:30.733488 - {INITRD}: 714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot
310 07:13:30.733928 - {KERNEL_ADDR}: 0x01080000
311 07:13:30.734361 - {KERNEL}: 714881/tftp-deploy-9m7_1wza/kernel/uImage
312 07:13:30.734800 - {LAVA_MAC}: None
313 07:13:30.735277 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/714881/extract-nfsrootfs-zpy5rpoy
314 07:13:30.735721 - {NFS_SERVER_IP}: 192.168.6.2
315 07:13:30.736198 - {PRESEED_CONFIG}: None
316 07:13:30.736643 - {PRESEED_LOCAL}: None
317 07:13:30.737077 - {RAMDISK_ADDR}: 0x08000000
318 07:13:30.737507 - {RAMDISK}: 714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot
319 07:13:30.737939 - {ROOT_PART}: None
320 07:13:30.738368 - {ROOT}: None
321 07:13:30.738797 - {SERVER_IP}: 192.168.6.2
322 07:13:30.739222 - {TEE_ADDR}: 0x83000000
323 07:13:30.739646 - {TEE}: None
324 07:13:30.740105 Parsed boot commands:
325 07:13:30.740527 - setenv autoload no
326 07:13:30.740955 - setenv initrd_high 0xffffffff
327 07:13:30.741381 - setenv fdt_high 0xffffffff
328 07:13:30.741808 - dhcp
329 07:13:30.742231 - setenv serverip 192.168.6.2
330 07:13:30.742658 - tftpboot 0x01080000 714881/tftp-deploy-9m7_1wza/kernel/uImage
331 07:13:30.743086 - tftpboot 0x08000000 714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot
332 07:13:30.743515 - tftpboot 0x01070000 714881/tftp-deploy-9m7_1wza/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 07:13:30.743946 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/714881/extract-nfsrootfs-zpy5rpoy,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 07:13:30.744424 - bootm 0x01080000 0x08000000 0x01070000
335 07:13:30.744979 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 07:13:30.746608 start: 2.3 connect-device (timeout 00:05:00) [common]
338 07:13:30.747068 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 07:13:30.762670 Setting prompt string to ['lava-test: # ']
340 07:13:30.764339 end: 2.3 connect-device (duration 00:00:00) [common]
341 07:13:30.765046 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 07:13:30.765691 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 07:13:30.766288 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 07:13:30.767579 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 07:13:30.805583 >> OK - accepted request
346 07:13:30.807806 Returned 0 in 0 seconds
347 07:13:30.909023 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 07:13:30.910828 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 07:13:30.911459 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 07:13:30.912057 Setting prompt string to ['Hit any key to stop autoboot']
352 07:13:30.912584 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 07:13:30.914297 Trying 192.168.56.21...
354 07:13:30.914826 Connected to conserv1.
355 07:13:30.915286 Escape character is '^]'.
356 07:13:30.915753
357 07:13:30.916269 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 07:13:30.916743
359 07:13:37.792375 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 07:13:37.792814 bl2_stage_init 0x01
361 07:13:37.793059 bl2_stage_init 0x81
362 07:13:37.797943 hw id: 0x0000 - pwm id 0x01
363 07:13:37.798255 bl2_stage_init 0xc1
364 07:13:37.803469 bl2_stage_init 0x02
365 07:13:37.803766
366 07:13:37.804043 L0:00000000
367 07:13:37.804286 L1:00000703
368 07:13:37.804515 L2:00008067
369 07:13:37.804740 L3:15000000
370 07:13:37.805239 S1:00000000
371 07:13:37.809910 B2:20282000
372 07:13:37.810206 B1:a0f83180
373 07:13:37.810433
374 07:13:37.810648 TE: 69517
375 07:13:37.810863
376 07:13:37.815515 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 07:13:37.815795
378 07:13:37.821134 Board ID = 1
379 07:13:37.821413 Set cpu clk to 24M
380 07:13:37.821628 Set clk81 to 24M
381 07:13:37.821845 Use GP1_pll as DSU clk.
382 07:13:37.824735 DSU clk: 1200 Mhz
383 07:13:37.825009 CPU clk: 1200 MHz
384 07:13:37.830148 Set clk81 to 166.6M
385 07:13:37.835803 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 07:13:37.836245 board id: 1
387 07:13:37.844149 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 07:13:37.855029 fw parse done
389 07:13:37.861139 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 07:13:37.904290 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 07:13:37.915304 PIEI prepare done
392 07:13:37.915618 fastboot data load
393 07:13:37.915837 fastboot data verify
394 07:13:37.920857 verify result: 266
395 07:13:37.926503 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 07:13:37.926787 LPDDR4 probe
397 07:13:37.927003 ddr clk to 1584MHz
398 07:13:37.934462 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 07:13:37.972261
400 07:13:37.972619 dmc_version 0001
401 07:13:37.979275 Check phy result
402 07:13:37.985222 INFO : End of CA training
403 07:13:37.985496 INFO : End of initialization
404 07:13:37.990840 INFO : Training has run successfully!
405 07:13:37.991132 Check phy result
406 07:13:37.996434 INFO : End of initialization
407 07:13:37.996708 INFO : End of read enable training
408 07:13:38.002141 INFO : End of fine write leveling
409 07:13:38.007642 INFO : End of Write leveling coarse delay
410 07:13:38.007921 INFO : Training has run successfully!
411 07:13:38.008286 Check phy result
412 07:13:38.013267 INFO : End of initialization
413 07:13:38.013735 INFO : End of read dq deskew training
414 07:13:38.018839 INFO : End of MPR read delay center optimization
415 07:13:38.024457 INFO : End of write delay center optimization
416 07:13:38.030111 INFO : End of read delay center optimization
417 07:13:38.030588 INFO : End of max read latency training
418 07:13:38.035702 INFO : Training has run successfully!
419 07:13:38.036218 1D training succeed
420 07:13:38.044836 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 07:13:38.093140 Check phy result
422 07:13:38.093659 INFO : End of initialization
423 07:13:38.120584 INFO : End of 2D read delay Voltage center optimization
424 07:13:38.144735 INFO : End of 2D read delay Voltage center optimization
425 07:13:38.201561 INFO : End of 2D write delay Voltage center optimization
426 07:13:38.255474 INFO : End of 2D write delay Voltage center optimization
427 07:13:38.260967 INFO : Training has run successfully!
428 07:13:38.261460
429 07:13:38.261912 channel==0
430 07:13:38.266624 RxClkDly_Margin_A0==78 ps 8
431 07:13:38.267091 TxDqDly_Margin_A0==98 ps 10
432 07:13:38.269971 RxClkDly_Margin_A1==88 ps 9
433 07:13:38.270473 TxDqDly_Margin_A1==88 ps 9
434 07:13:38.275490 TrainedVREFDQ_A0==75
435 07:13:38.275962 TrainedVREFDQ_A1==74
436 07:13:38.276451 VrefDac_Margin_A0==24
437 07:13:38.281170 DeviceVref_Margin_A0==39
438 07:13:38.281633 VrefDac_Margin_A1==23
439 07:13:38.286649 DeviceVref_Margin_A1==40
440 07:13:38.287108
441 07:13:38.287549
442 07:13:38.288014 channel==1
443 07:13:38.288456 RxClkDly_Margin_A0==78 ps 8
444 07:13:38.292302 TxDqDly_Margin_A0==98 ps 10
445 07:13:38.292774 RxClkDly_Margin_A1==88 ps 9
446 07:13:38.297819 TxDqDly_Margin_A1==88 ps 9
447 07:13:38.298287 TrainedVREFDQ_A0==78
448 07:13:38.298728 TrainedVREFDQ_A1==75
449 07:13:38.303566 VrefDac_Margin_A0==22
450 07:13:38.304060 DeviceVref_Margin_A0==36
451 07:13:38.309117 VrefDac_Margin_A1==22
452 07:13:38.309582 DeviceVref_Margin_A1==39
453 07:13:38.310022
454 07:13:38.314669 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 07:13:38.315172
456 07:13:38.342716 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 07:13:38.348310 2D training succeed
458 07:13:38.353762 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 07:13:38.354236 auto size-- 65535DDR cs0 size: 2048MB
460 07:13:38.359366 DDR cs1 size: 2048MB
461 07:13:38.359831 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 07:13:38.364977 cs0 DataBus test pass
463 07:13:38.365446 cs1 DataBus test pass
464 07:13:38.365884 cs0 AddrBus test pass
465 07:13:38.370548 cs1 AddrBus test pass
466 07:13:38.371014
467 07:13:38.371455 100bdlr_step_size ps== 478
468 07:13:38.371899 result report
469 07:13:38.376189 boot times 0Enable ddr reg access
470 07:13:38.383641 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 07:13:38.397466 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 07:13:39.057046 bl2z: ptr: 05129330, size: 00001e40
473 07:13:39.065230 0.0;M3 CHK:0;cm4_sp_mode 0
474 07:13:39.065727 MVN_1=0x00000000
475 07:13:39.066170 MVN_2=0x00000000
476 07:13:39.076658 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 07:13:39.077160 OPS=0x04
478 07:13:39.077611 ring efuse init
479 07:13:39.079610 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 07:13:39.085296 [0.017354 Inits done]
481 07:13:39.085767 secure task start!
482 07:13:39.086210 high task start!
483 07:13:39.086649 low task start!
484 07:13:39.089590 run into bl31
485 07:13:39.098240 NOTICE: BL31: v1.3(release):4fc40b1
486 07:13:39.106088 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 07:13:39.106561 NOTICE: BL31: G12A normal boot!
488 07:13:39.121597 NOTICE: BL31: BL33 decompress pass
489 07:13:39.127314 ERROR: Error initializing runtime service opteed_fast
490 07:13:40.341960 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 07:13:40.342615 bl2_stage_init 0x01
492 07:13:40.343082 bl2_stage_init 0x81
493 07:13:40.347558 hw id: 0x0000 - pwm id 0x01
494 07:13:40.348121 bl2_stage_init 0xc1
495 07:13:40.348580 bl2_stage_init 0x02
496 07:13:40.349023
497 07:13:40.353124 L0:00000000
498 07:13:40.353603 L1:00000703
499 07:13:40.354050 L2:00008067
500 07:13:40.354489 L3:15000000
501 07:13:40.354924 S1:00000000
502 07:13:40.355663 B2:20282000
503 07:13:40.360923 B1:a0f83180
504 07:13:40.361396
505 07:13:40.361843 TE: 69613
506 07:13:40.362282
507 07:13:40.366541 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 07:13:40.367017
509 07:13:40.367466 Board ID = 1
510 07:13:40.367910 Set cpu clk to 24M
511 07:13:40.372131 Set clk81 to 24M
512 07:13:40.372610 Use GP1_pll as DSU clk.
513 07:13:40.373050 DSU clk: 1200 Mhz
514 07:13:40.377732 CPU clk: 1200 MHz
515 07:13:40.378199 Set clk81 to 166.6M
516 07:13:40.383333 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 07:13:40.383808 board id: 1
518 07:13:40.393094 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 07:13:40.404033 fw parse done
520 07:13:40.409985 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 07:13:40.453136 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 07:13:40.464312 PIEI prepare done
523 07:13:40.464790 fastboot data load
524 07:13:40.465238 fastboot data verify
525 07:13:40.469832 verify result: 266
526 07:13:40.475466 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 07:13:40.475937 LPDDR4 probe
528 07:13:40.476435 ddr clk to 1584MHz
529 07:13:41.841441 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: p SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 07:13:41.842143 bl2_stage_init 0x01
531 07:13:41.842618 bl2_stage_init 0x81
532 07:13:41.846976 hw id: 0x0000 - pwm id 0x01
533 07:13:41.847494 bl2_stage_init 0xc1
534 07:13:41.850738 bl2_stage_init 0x02
535 07:13:41.851271
536 07:13:41.851757 L0:00000000
537 07:13:41.852262 L1:00000703
538 07:13:41.856319 L2:00008067
539 07:13:41.856848 L3:15000000
540 07:13:41.857293 S1:00000000
541 07:13:41.857728 B2:20282000
542 07:13:41.858161 B1:a0f83180
543 07:13:41.858591
544 07:13:41.861872 TE: 70226
545 07:13:41.862328
546 07:13:41.867480 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 07:13:41.867934
548 07:13:41.868396 Board ID = 1
549 07:13:41.868824 Set cpu clk to 24M
550 07:13:41.873046 Set clk81 to 24M
551 07:13:41.873494 Use GP1_pll as DSU clk.
552 07:13:41.873921 DSU clk: 1200 Mhz
553 07:13:41.878628 CPU clk: 1200 MHz
554 07:13:41.879070 Set clk81 to 166.6M
555 07:13:41.884232 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 07:13:41.884681 board id: 1
557 07:13:41.893255 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 07:13:41.904168 fw parse done
559 07:13:41.910167 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 07:13:41.953324 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 07:13:41.964463 PIEI prepare done
562 07:13:41.964928 fastboot data load
563 07:13:41.965361 fastboot data verify
564 07:13:41.970017 verify result: 266
565 07:13:41.975633 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 07:13:41.976139 LPDDR4 probe
567 07:13:41.976576 ddr clk to 1584MHz
568 07:13:41.983647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 07:13:42.021376
570 07:13:42.021842 dmc_version 0001
571 07:13:42.028405 Check phy result
572 07:13:42.034331 INFO : End of CA training
573 07:13:42.034784 INFO : End of initialization
574 07:13:42.039920 INFO : Training has run successfully!
575 07:13:42.040414 Check phy result
576 07:13:42.045527 INFO : End of initialization
577 07:13:42.045992 INFO : End of read enable training
578 07:13:42.051163 INFO : End of fine write leveling
579 07:13:42.056749 INFO : End of Write leveling coarse delay
580 07:13:42.057233 INFO : Training has run successfully!
581 07:13:42.057677 Check phy result
582 07:13:42.062316 INFO : End of initialization
583 07:13:42.062782 INFO : End of read dq deskew training
584 07:13:42.067926 INFO : End of MPR read delay center optimization
585 07:13:42.073536 INFO : End of write delay center optimization
586 07:13:42.079149 INFO : End of read delay center optimization
587 07:13:42.079638 INFO : End of max read latency training
588 07:13:42.084724 INFO : Training has run successfully!
589 07:13:42.085196 1D training succeed
590 07:13:42.093927 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 07:13:42.142270 Check phy result
592 07:13:42.142775 INFO : End of initialization
593 07:13:42.169751 INFO : End of 2D read delay Voltage center optimization
594 07:13:42.193855 INFO : End of 2D read delay Voltage center optimization
595 07:13:42.250549 INFO : End of 2D write delay Voltage center optimization
596 07:13:42.304594 INFO : End of 2D write delay Voltage center optimization
597 07:13:42.310085 INFO : Training has run successfully!
598 07:13:42.310560
599 07:13:42.311007 channel==0
600 07:13:42.315695 RxClkDly_Margin_A0==78 ps 8
601 07:13:42.316227 TxDqDly_Margin_A0==88 ps 9
602 07:13:42.321294 RxClkDly_Margin_A1==69 ps 7
603 07:13:42.321774 TxDqDly_Margin_A1==98 ps 10
604 07:13:42.322218 TrainedVREFDQ_A0==74
605 07:13:42.326922 TrainedVREFDQ_A1==75
606 07:13:42.327389 VrefDac_Margin_A0==24
607 07:13:42.327827 DeviceVref_Margin_A0==40
608 07:13:42.332479 VrefDac_Margin_A1==22
609 07:13:42.332948 DeviceVref_Margin_A1==39
610 07:13:42.333390
611 07:13:42.333829
612 07:13:42.334268 channel==1
613 07:13:42.338102 RxClkDly_Margin_A0==78 ps 8
614 07:13:42.338573 TxDqDly_Margin_A0==98 ps 10
615 07:13:42.343700 RxClkDly_Margin_A1==78 ps 8
616 07:13:42.344193 TxDqDly_Margin_A1==78 ps 8
617 07:13:42.349299 TrainedVREFDQ_A0==78
618 07:13:42.349767 TrainedVREFDQ_A1==75
619 07:13:42.350215 VrefDac_Margin_A0==23
620 07:13:42.354914 DeviceVref_Margin_A0==36
621 07:13:42.355387 VrefDac_Margin_A1==22
622 07:13:42.360524 DeviceVref_Margin_A1==39
623 07:13:42.360998
624 07:13:42.361441 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 07:13:42.361877
626 07:13:42.394084 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 07:13:42.394612 2D training succeed
628 07:13:42.399641 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 07:13:42.405260 auto size-- 65535DDR cs0 size: 2048MB
630 07:13:42.405734 DDR cs1 size: 2048MB
631 07:13:42.410865 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 07:13:42.411341 cs0 DataBus test pass
633 07:13:42.416503 cs1 DataBus test pass
634 07:13:42.416974 cs0 AddrBus test pass
635 07:13:42.417416 cs1 AddrBus test pass
636 07:13:42.417849
637 07:13:42.422074 100bdlr_step_size ps== 471
638 07:13:42.422553 result report
639 07:13:42.427699 boot times 0Enable ddr reg access
640 07:13:42.432809 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 07:13:42.446707 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 07:13:43.106268 bl2z: ptr: 05129330, size: 00001e40
643 07:13:43.114371 0.0;M3 CHK:0;cm4_sp_mode 0
644 07:13:43.115065 MVN_1=0x00000000
645 07:13:43.115582 MVN_2=0x00000000
646 07:13:43.125857 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 07:13:43.126488 OPS=0x04
648 07:13:43.126956 ring efuse init
649 07:13:43.128650 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 07:13:43.135060 [0.017354 Inits done]
651 07:13:43.135588 secure task start!
652 07:13:43.136079 high task start!
653 07:13:43.136532 low task start!
654 07:13:43.139337 run into bl31
655 07:13:43.147934 NOTICE: BL31: v1.3(release):4fc40b1
656 07:13:43.155811 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 07:13:43.156438 NOTICE: BL31: G12A normal boot!
658 07:13:43.171358 NOTICE: BL31: BL33 decompress pass
659 07:13:43.177073 ERROR: Error initializing runtime service opteed_fast
660 07:13:44.391410 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 07:13:44.392130 bl2_stage_init 0x01
662 07:13:44.392633 bl2_stage_init 0x81
663 07:13:44.397011 hw id: 0x0000 - pwm id 0x01
664 07:13:44.397622 bl2_stage_init 0xc1
665 07:13:44.402503 bl2_stage_init 0x02
666 07:13:44.403084
667 07:13:44.403576 L0:00000000
668 07:13:44.404079 L1:00000703
669 07:13:44.404544 L2:00008067
670 07:13:44.404989 L3:15000000
671 07:13:44.408268 S1:00000000
672 07:13:44.409074 B2:20282000
673 07:13:44.409669 B1:a0f83180
674 07:13:44.410157
675 07:13:44.410629 TE: 68214
676 07:13:44.411082
677 07:13:44.415770 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 07:13:44.416904
679 07:13:44.419347 Board ID = 1
680 07:13:44.419964 Set cpu clk to 24M
681 07:13:44.420533 Set clk81 to 24M
682 07:13:44.424863 Use GP1_pll as DSU clk.
683 07:13:44.425347 DSU clk: 1200 Mhz
684 07:13:44.425699 CPU clk: 1200 MHz
685 07:13:44.430595 Set clk81 to 166.6M
686 07:13:44.436219 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 07:13:44.436582 board id: 1
688 07:13:44.443492 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 07:13:44.454109 fw parse done
690 07:13:44.460122 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 07:13:44.503017 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 07:13:44.514125 PIEI prepare done
693 07:13:44.514751 fastboot data load
694 07:13:44.515079 fastboot data verify
695 07:13:44.519938 verify result: 266
696 07:13:44.525388 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 07:13:44.525801 LPDDR4 probe
698 07:13:44.526044 ddr clk to 1584MHz
699 07:13:44.533666 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 07:13:44.571371
701 07:13:44.572006 dmc_version 0001
702 07:13:44.578570 Check phy result
703 07:13:44.584248 INFO : End of CA training
704 07:13:44.584867 INFO : End of initialization
705 07:13:44.589883 INFO : Training has run successfully!
706 07:13:44.590433 Check phy result
707 07:13:44.595485 INFO : End of initialization
708 07:13:44.596047 INFO : End of read enable training
709 07:13:44.598816 INFO : End of fine write leveling
710 07:13:44.604405 INFO : End of Write leveling coarse delay
711 07:13:44.610000 INFO : Training has run successfully!
712 07:13:44.610713 Check phy result
713 07:13:44.611276 INFO : End of initialization
714 07:13:44.615551 INFO : End of read dq deskew training
715 07:13:44.621284 INFO : End of MPR read delay center optimization
716 07:13:44.621754 INFO : End of write delay center optimization
717 07:13:44.626952 INFO : End of read delay center optimization
718 07:13:44.632423 INFO : End of max read latency training
719 07:13:44.633114 INFO : Training has run successfully!
720 07:13:44.638180 1D training succeed
721 07:13:44.644467 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 07:13:44.692220 Check phy result
723 07:13:44.692650 INFO : End of initialization
724 07:13:44.720162 INFO : End of 2D read delay Voltage center optimization
725 07:13:44.743811 INFO : End of 2D read delay Voltage center optimization
726 07:13:44.800516 INFO : End of 2D write delay Voltage center optimization
727 07:13:44.854536 INFO : End of 2D write delay Voltage center optimization
728 07:13:44.860099 INFO : Training has run successfully!
729 07:13:44.860667
730 07:13:44.861129 channel==0
731 07:13:44.865904 RxClkDly_Margin_A0==88 ps 9
732 07:13:44.866460 TxDqDly_Margin_A0==88 ps 9
733 07:13:44.868944 RxClkDly_Margin_A1==88 ps 9
734 07:13:44.869464 TxDqDly_Margin_A1==88 ps 9
735 07:13:44.874557 TrainedVREFDQ_A0==74
736 07:13:44.875206 TrainedVREFDQ_A1==75
737 07:13:44.875638 VrefDac_Margin_A0==23
738 07:13:44.880305 DeviceVref_Margin_A0==40
739 07:13:44.880862 VrefDac_Margin_A1==23
740 07:13:44.885708 DeviceVref_Margin_A1==39
741 07:13:44.886106
742 07:13:44.886332
743 07:13:44.886546 channel==1
744 07:13:44.886751 RxClkDly_Margin_A0==78 ps 8
745 07:13:44.891357 TxDqDly_Margin_A0==98 ps 10
746 07:13:44.891791 RxClkDly_Margin_A1==78 ps 8
747 07:13:44.898097 TxDqDly_Margin_A1==88 ps 9
748 07:13:44.898531 TrainedVREFDQ_A0==75
749 07:13:44.898750 TrainedVREFDQ_A1==77
750 07:13:44.903187 VrefDac_Margin_A0==22
751 07:13:44.904080 DeviceVref_Margin_A0==39
752 07:13:44.904684 VrefDac_Margin_A1==22
753 07:13:44.908223 DeviceVref_Margin_A1==37
754 07:13:44.908934
755 07:13:44.916710 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 07:13:44.917338
757 07:13:44.942781 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
758 07:13:44.947432 2D training succeed
759 07:13:44.952759 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 07:13:44.953127 auto size-- 65535DDR cs0 size: 2048MB
761 07:13:44.958306 DDR cs1 size: 2048MB
762 07:13:44.958847 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 07:13:44.963945 cs0 DataBus test pass
764 07:13:44.964491 cs1 DataBus test pass
765 07:13:44.964916 cs0 AddrBus test pass
766 07:13:44.969617 cs1 AddrBus test pass
767 07:13:44.970176
768 07:13:44.970600 100bdlr_step_size ps== 471
769 07:13:44.971019 result report
770 07:13:44.975122 boot times 0Enable ddr reg access
771 07:13:44.982512 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 07:13:44.996351 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 07:13:45.656752 bl2z: ptr: 05129330, size: 00001e40
774 07:13:45.664624 0.0;M3 CHK:0;cm4_sp_mode 0
775 07:13:45.665041 MVN_1=0x00000000
776 07:13:45.665326 MVN_2=0x00000000
777 07:13:45.676079 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 07:13:45.676615 OPS=0x04
779 07:13:45.677057 ring efuse init
780 07:13:45.679038 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 07:13:45.684582 [0.017354 Inits done]
782 07:13:45.684944 secure task start!
783 07:13:45.685222 high task start!
784 07:13:45.685479 low task start!
785 07:13:45.688867 run into bl31
786 07:13:45.697490 NOTICE: BL31: v1.3(release):4fc40b1
787 07:13:45.705301 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 07:13:45.705812 NOTICE: BL31: G12A normal boot!
789 07:13:45.720805 NOTICE: BL31: BL33 decompress pass
790 07:13:45.726494 ERROR: Error initializing runtime service opteed_fast
791 07:13:46.522010
792 07:13:46.522515
793 07:13:46.527325 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 07:13:46.527703
795 07:13:46.530803 Model: Libre Computer AML-S905D3-CC Solitude
796 07:13:46.677908 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 07:13:46.693308 DRAM: 2 GiB (effective 3.8 GiB)
798 07:13:46.794331 Core: 406 devices, 33 uclasses, devicetree: separate
799 07:13:46.800115 WDT: Not starting watchdog@f0d0
800 07:13:46.825323 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 07:13:46.837358 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 07:13:46.842421 ** Bad device specification mmc 0 **
803 07:13:46.852444 Card did not respond to voltage select! : -110
804 07:13:46.860074 ** Bad device specification mmc 0 **
805 07:13:46.860543 Couldn't find partition mmc 0
806 07:13:46.868477 Card did not respond to voltage select! : -110
807 07:13:46.873947 ** Bad device specification mmc 0 **
808 07:13:46.874384 Couldn't find partition mmc 0
809 07:13:46.878982 Error: could not access storage.
810 07:13:47.176571 Net: eth0: ethernet@ff3f0000
811 07:13:47.177054 starting USB...
812 07:13:47.421242 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 07:13:47.421744 Starting the controller
814 07:13:47.428171 USB XHCI 1.10
815 07:13:48.982579 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 07:13:48.990836 scanning usb for storage devices... 0 Storage Device(s) found
818 07:13:49.042570 Hit any key to stop autoboot: 1
819 07:13:49.043474 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
820 07:13:49.044226 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
821 07:13:49.044767 Setting prompt string to ['=>']
822 07:13:49.045312 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
823 07:13:49.056898 0
824 07:13:49.057941 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 07:13:49.159312 => setenv autoload no
827 07:13:49.160509 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
828 07:13:49.166154 setenv autoload no
830 07:13:49.268098 => setenv initrd_high 0xffffffff
831 07:13:49.269196 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 07:13:49.273457 setenv initrd_high 0xffffffff
834 07:13:49.375088 => setenv fdt_high 0xffffffff
835 07:13:49.376208 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 07:13:49.380388 setenv fdt_high 0xffffffff
838 07:13:49.482088 => dhcp
839 07:13:49.482995 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 07:13:49.488071 dhcp
841 07:13:50.043751 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 07:13:50.044469 Speed: 1000, full duplex
843 07:13:50.044943 BOOTP broadcast 1
844 07:13:50.292061 BOOTP broadcast 2
845 07:13:50.793077 BOOTP broadcast 3
846 07:13:51.793998 BOOTP broadcast 4
847 07:13:53.794940 BOOTP broadcast 5
848 07:13:53.807578 DHCP client bound to address 192.168.6.12 (3763 ms)
850 07:13:53.908690 => setenv serverip 192.168.6.2
851 07:13:53.909342 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
852 07:13:53.913753 setenv serverip 192.168.6.2
854 07:13:54.014752 => tftpboot 0x01080000 714881/tftp-deploy-9m7_1wza/kernel/uImage
855 07:13:54.015576 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
856 07:13:54.022105 tftpboot 0x01080000 714881/tftp-deploy-9m7_1wza/kernel/uImage
857 07:13:54.022387 Speed: 1000, full duplex
858 07:13:54.022603 Using ethernet@ff3f0000 device
859 07:13:54.027569 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
860 07:13:54.033047 Filename '714881/tftp-deploy-9m7_1wza/kernel/uImage'.
861 07:13:54.039526 Load address: 0x1080000
862 07:13:56.883429 Loading: *################################################## 43.2 MiB
863 07:13:56.884095 15.2 MiB/s
864 07:13:56.884540 done
865 07:13:56.887884 Bytes transferred = 45308480 (2b35a40 hex)
867 07:13:56.989368 => tftpboot 0x08000000 714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot
868 07:13:56.990000 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:34)
869 07:13:56.996791 tftpboot 0x08000000 714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot
870 07:13:56.997265 Speed: 1000, full duplex
871 07:13:56.997684 Using ethernet@ff3f0000 device
872 07:13:57.002261 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
873 07:13:57.012018 Filename '714881/tftp-deploy-9m7_1wza/ramdisk/ramdisk.cpio.gz.uboot'.
874 07:13:57.012492 Load address: 0x8000000
875 07:13:58.422644 Loading: *################################################# UDP wrong checksum 00000005 00008f99
876 07:14:03.422971 T UDP wrong checksum 00000005 00008f99
877 07:14:13.425050 T T UDP wrong checksum 00000005 00008f99
878 07:14:33.428890 T T T T UDP wrong checksum 00000005 00008f99
879 07:14:37.531660 UDP wrong checksum 000000ff 00005d5a
880 07:14:37.566046 UDP wrong checksum 000000ff 0000e34c
881 07:14:53.433792 T T T
882 07:14:53.434426 Retry count exceeded; starting again
884 07:14:53.435854 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
887 07:14:53.437860 end: 2.4 uboot-commands (duration 00:01:23) [common]
889 07:14:53.439250 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
891 07:14:53.440345 end: 2 uboot-action (duration 00:01:23) [common]
893 07:14:53.441861 Cleaning after the job
894 07:14:53.442402 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/ramdisk
895 07:14:53.443630 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/kernel
896 07:14:53.487704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/dtb
897 07:14:53.488517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/nfsrootfs
898 07:14:53.666099 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714881/tftp-deploy-9m7_1wza/modules
899 07:14:53.686306 start: 4.1 power-off (timeout 00:00:30) [common]
900 07:14:53.686972 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
901 07:14:53.726246 >> OK - accepted request
902 07:14:53.728453 Returned 0 in 0 seconds
903 07:14:53.829452 end: 4.1 power-off (duration 00:00:00) [common]
905 07:14:53.830389 start: 4.2 read-feedback (timeout 00:10:00) [common]
906 07:14:53.831020 Listened to connection for namespace 'common' for up to 1s
907 07:14:54.831931 Finalising connection for namespace 'common'
908 07:14:54.832398 Disconnecting from shell: Finalise
909 07:14:54.832687 =>
910 07:14:54.933350 end: 4.2 read-feedback (duration 00:00:01) [common]
911 07:14:54.933903 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/714881
912 07:14:57.979270 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/714881
913 07:14:57.979924 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.