Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 06:56:51.248320 lava-dispatcher, installed at version: 2024.01
2 06:56:51.249129 start: 0 validate
3 06:56:51.249582 Start time: 2024-09-06 06:56:51.249552+00:00 (UTC)
4 06:56:51.250123 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 06:56:51.250653 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 06:56:51.295290 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 06:56:51.295848 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 06:56:51.323411 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 06:56:51.324136 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 06:56:51.352146 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 06:56:51.352612 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 06:56:51.381774 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 06:56:51.382241 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-183-gb831f83e40a24%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 06:56:51.419703 validate duration: 0.17
16 06:56:51.420569 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 06:56:51.420903 start: 1.1 download-retry (timeout 00:10:00) [common]
18 06:56:51.421199 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 06:56:51.421788 Not decompressing ramdisk as can be used compressed.
20 06:56:51.422255 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 06:56:51.422527 saving as /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/ramdisk/initrd.cpio.gz
22 06:56:51.422794 total size: 5628140 (5 MB)
23 06:56:51.462858 progress 0 % (0 MB)
24 06:56:51.470849 progress 5 % (0 MB)
25 06:56:51.478928 progress 10 % (0 MB)
26 06:56:51.485184 progress 15 % (0 MB)
27 06:56:51.489473 progress 20 % (1 MB)
28 06:56:51.493259 progress 25 % (1 MB)
29 06:56:51.497384 progress 30 % (1 MB)
30 06:56:51.501576 progress 35 % (1 MB)
31 06:56:51.505281 progress 40 % (2 MB)
32 06:56:51.509390 progress 45 % (2 MB)
33 06:56:51.513108 progress 50 % (2 MB)
34 06:56:51.517195 progress 55 % (2 MB)
35 06:56:51.521244 progress 60 % (3 MB)
36 06:56:51.524882 progress 65 % (3 MB)
37 06:56:51.528961 progress 70 % (3 MB)
38 06:56:51.532569 progress 75 % (4 MB)
39 06:56:51.536527 progress 80 % (4 MB)
40 06:56:51.540103 progress 85 % (4 MB)
41 06:56:51.544139 progress 90 % (4 MB)
42 06:56:51.548141 progress 95 % (5 MB)
43 06:56:51.551466 progress 100 % (5 MB)
44 06:56:51.552143 5 MB downloaded in 0.13 s (41.50 MB/s)
45 06:56:51.552717 end: 1.1.1 http-download (duration 00:00:00) [common]
47 06:56:51.553604 end: 1.1 download-retry (duration 00:00:00) [common]
48 06:56:51.553900 start: 1.2 download-retry (timeout 00:10:00) [common]
49 06:56:51.554170 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 06:56:51.554637 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/kernel/Image
51 06:56:51.554888 saving as /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/kernel/Image
52 06:56:51.555099 total size: 45308416 (43 MB)
53 06:56:51.555310 No compression specified
54 06:56:51.598581 progress 0 % (0 MB)
55 06:56:51.626199 progress 5 % (2 MB)
56 06:56:51.653910 progress 10 % (4 MB)
57 06:56:51.680761 progress 15 % (6 MB)
58 06:56:51.707384 progress 20 % (8 MB)
59 06:56:51.734102 progress 25 % (10 MB)
60 06:56:51.761012 progress 30 % (12 MB)
61 06:56:51.787698 progress 35 % (15 MB)
62 06:56:51.814825 progress 40 % (17 MB)
63 06:56:51.841460 progress 45 % (19 MB)
64 06:56:51.868651 progress 50 % (21 MB)
65 06:56:51.895481 progress 55 % (23 MB)
66 06:56:51.922718 progress 60 % (25 MB)
67 06:56:51.950028 progress 65 % (28 MB)
68 06:56:51.977990 progress 70 % (30 MB)
69 06:56:52.005379 progress 75 % (32 MB)
70 06:56:52.032364 progress 80 % (34 MB)
71 06:56:52.059453 progress 85 % (36 MB)
72 06:56:52.086586 progress 90 % (38 MB)
73 06:56:52.114152 progress 95 % (41 MB)
74 06:56:52.140615 progress 100 % (43 MB)
75 06:56:52.141303 43 MB downloaded in 0.59 s (73.71 MB/s)
76 06:56:52.141786 end: 1.2.1 http-download (duration 00:00:01) [common]
78 06:56:52.142605 end: 1.2 download-retry (duration 00:00:01) [common]
79 06:56:52.142880 start: 1.3 download-retry (timeout 00:09:59) [common]
80 06:56:52.143149 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 06:56:52.143629 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 06:56:52.143905 saving as /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 06:56:52.144143 total size: 53173 (0 MB)
84 06:56:52.144356 No compression specified
85 06:56:52.186843 progress 61 % (0 MB)
86 06:56:52.187729 progress 100 % (0 MB)
87 06:56:52.188357 0 MB downloaded in 0.04 s (1.15 MB/s)
88 06:56:52.188837 end: 1.3.1 http-download (duration 00:00:00) [common]
90 06:56:52.189646 end: 1.3 download-retry (duration 00:00:00) [common]
91 06:56:52.189911 start: 1.4 download-retry (timeout 00:09:59) [common]
92 06:56:52.190176 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 06:56:52.190632 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 06:56:52.190875 saving as /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/nfsrootfs/full.rootfs.tar
95 06:56:52.191082 total size: 474398908 (452 MB)
96 06:56:52.191292 Using unxz to decompress xz
97 06:56:52.229878 progress 0 % (0 MB)
98 06:56:53.381892 progress 5 % (22 MB)
99 06:56:54.819496 progress 10 % (45 MB)
100 06:56:55.260355 progress 15 % (67 MB)
101 06:56:56.079975 progress 20 % (90 MB)
102 06:56:56.609588 progress 25 % (113 MB)
103 06:56:56.971794 progress 30 % (135 MB)
104 06:56:57.580049 progress 35 % (158 MB)
105 06:56:58.500531 progress 40 % (181 MB)
106 06:56:59.353438 progress 45 % (203 MB)
107 06:57:00.085315 progress 50 % (226 MB)
108 06:57:00.796483 progress 55 % (248 MB)
109 06:57:02.020488 progress 60 % (271 MB)
110 06:57:03.514387 progress 65 % (294 MB)
111 06:57:05.121181 progress 70 % (316 MB)
112 06:57:08.290281 progress 75 % (339 MB)
113 06:57:10.742569 progress 80 % (361 MB)
114 06:57:13.630245 progress 85 % (384 MB)
115 06:57:16.771447 progress 90 % (407 MB)
116 06:57:19.941549 progress 95 % (429 MB)
117 06:57:23.082282 progress 100 % (452 MB)
118 06:57:23.095500 452 MB downloaded in 30.90 s (14.64 MB/s)
119 06:57:23.096511 end: 1.4.1 http-download (duration 00:00:31) [common]
121 06:57:23.098311 end: 1.4 download-retry (duration 00:00:31) [common]
122 06:57:23.098898 start: 1.5 download-retry (timeout 00:09:28) [common]
123 06:57:23.099481 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 06:57:23.100654 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-183-gb831f83e40a24/arm64/defconfig/gcc-12/modules.tar.xz
125 06:57:23.101190 saving as /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/modules/modules.tar
126 06:57:23.101652 total size: 11502724 (10 MB)
127 06:57:23.102126 Using unxz to decompress xz
128 06:57:23.147785 progress 0 % (0 MB)
129 06:57:23.217139 progress 5 % (0 MB)
130 06:57:23.296861 progress 10 % (1 MB)
131 06:57:23.382788 progress 15 % (1 MB)
132 06:57:23.464389 progress 20 % (2 MB)
133 06:57:23.540928 progress 25 % (2 MB)
134 06:57:23.623348 progress 30 % (3 MB)
135 06:57:23.698144 progress 35 % (3 MB)
136 06:57:23.778395 progress 40 % (4 MB)
137 06:57:23.850971 progress 45 % (4 MB)
138 06:57:23.928822 progress 50 % (5 MB)
139 06:57:24.004947 progress 55 % (6 MB)
140 06:57:24.084673 progress 60 % (6 MB)
141 06:57:24.170997 progress 65 % (7 MB)
142 06:57:24.248581 progress 70 % (7 MB)
143 06:57:24.344273 progress 75 % (8 MB)
144 06:57:24.433845 progress 80 % (8 MB)
145 06:57:24.514992 progress 85 % (9 MB)
146 06:57:24.585914 progress 90 % (9 MB)
147 06:57:24.661877 progress 95 % (10 MB)
148 06:57:24.737982 progress 100 % (10 MB)
149 06:57:24.748639 10 MB downloaded in 1.65 s (6.66 MB/s)
150 06:57:24.749357 end: 1.5.1 http-download (duration 00:00:02) [common]
152 06:57:24.751020 end: 1.5 download-retry (duration 00:00:02) [common]
153 06:57:24.751559 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 06:57:24.752145 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 06:57:40.227743 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/714821/extract-nfsrootfs-9ztmg7qw
156 06:57:40.228360 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 06:57:40.228698 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 06:57:40.229380 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw
159 06:57:40.229877 makedir: /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin
160 06:57:40.230296 makedir: /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/tests
161 06:57:40.230695 makedir: /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/results
162 06:57:40.231050 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-add-keys
163 06:57:40.231583 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-add-sources
164 06:57:40.232117 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-background-process-start
165 06:57:40.232629 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-background-process-stop
166 06:57:40.233172 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-common-functions
167 06:57:40.233675 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-echo-ipv4
168 06:57:40.234152 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-install-packages
169 06:57:40.234635 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-installed-packages
170 06:57:40.235118 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-os-build
171 06:57:40.235585 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-probe-channel
172 06:57:40.236082 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-probe-ip
173 06:57:40.236569 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-target-ip
174 06:57:40.237060 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-target-mac
175 06:57:40.237547 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-target-storage
176 06:57:40.238056 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-case
177 06:57:40.238539 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-event
178 06:57:40.239005 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-feedback
179 06:57:40.239473 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-raise
180 06:57:40.239943 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-reference
181 06:57:40.240457 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-runner
182 06:57:40.241041 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-set
183 06:57:40.241538 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-test-shell
184 06:57:40.242026 Updating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-install-packages (oe)
185 06:57:40.242556 Updating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/bin/lava-installed-packages (oe)
186 06:57:40.242991 Creating /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/environment
187 06:57:40.243359 LAVA metadata
188 06:57:40.243619 - LAVA_JOB_ID=714821
189 06:57:40.243835 - LAVA_DISPATCHER_IP=192.168.6.2
190 06:57:40.244210 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 06:57:40.245158 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 06:57:40.245467 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 06:57:40.245674 skipped lava-vland-overlay
194 06:57:40.245913 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 06:57:40.246166 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 06:57:40.246379 skipped lava-multinode-overlay
197 06:57:40.246620 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 06:57:40.246868 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 06:57:40.247115 Loading test definitions
200 06:57:40.247389 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 06:57:40.247610 Using /lava-714821 at stage 0
202 06:57:40.248778 uuid=714821_1.6.2.4.1 testdef=None
203 06:57:40.249085 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 06:57:40.249349 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 06:57:40.251048 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 06:57:40.251837 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 06:57:40.254001 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 06:57:40.254831 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 06:57:40.256916 runner path: /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 714821_1.6.2.4.1
212 06:57:40.257496 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 06:57:40.258258 Creating lava-test-runner.conf files
215 06:57:40.258459 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/714821/lava-overlay-07fm6unw/lava-714821/0 for stage 0
216 06:57:40.258788 - 0_v4l2-decoder-conformance-h265
217 06:57:40.259123 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 06:57:40.259394 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 06:57:40.280806 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 06:57:40.281154 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 06:57:40.281413 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 06:57:40.281678 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 06:57:40.281940 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 06:57:40.908506 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 06:57:40.908965 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 06:57:40.909238 extracting modules file /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714821/extract-nfsrootfs-9ztmg7qw
227 06:57:42.276612 extracting modules file /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/modules/modules.tar to /var/lib/lava/dispatcher/tmp/714821/extract-overlay-ramdisk-watli0yz/ramdisk
228 06:57:43.689402 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 06:57:43.689876 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 06:57:43.690176 [common] Applying overlay to NFS
231 06:57:43.690406 [common] Applying overlay /var/lib/lava/dispatcher/tmp/714821/compress-overlay-_qmclsws/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/714821/extract-nfsrootfs-9ztmg7qw
232 06:57:43.719754 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 06:57:43.720148 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 06:57:43.720447 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 06:57:43.720687 Converting downloaded kernel to a uImage
236 06:57:43.721000 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/kernel/Image /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/kernel/uImage
237 06:57:44.170963 output: Image Name:
238 06:57:44.171376 output: Created: Fri Sep 6 06:57:43 2024
239 06:57:44.171606 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 06:57:44.171820 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
241 06:57:44.172067 output: Load Address: 01080000
242 06:57:44.172282 output: Entry Point: 01080000
243 06:57:44.172487 output:
244 06:57:44.172832 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 06:57:44.173116 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 06:57:44.173399 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 06:57:44.173668 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 06:57:44.173942 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 06:57:44.174209 Building ramdisk /var/lib/lava/dispatcher/tmp/714821/extract-overlay-ramdisk-watli0yz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/714821/extract-overlay-ramdisk-watli0yz/ramdisk
250 06:57:46.331444 >> 165160 blocks
251 06:57:54.100337 Adding RAMdisk u-boot header.
252 06:57:54.101945 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/714821/extract-overlay-ramdisk-watli0yz/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/714821/extract-overlay-ramdisk-watli0yz/ramdisk.cpio.gz.uboot
253 06:57:54.344894 output: Image Name:
254 06:57:54.345297 output: Created: Fri Sep 6 06:57:54 2024
255 06:57:54.345515 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 06:57:54.345723 output: Data Size: 23257895 Bytes = 22712.79 KiB = 22.18 MiB
257 06:57:54.345925 output: Load Address: 00000000
258 06:57:54.346124 output: Entry Point: 00000000
259 06:57:54.346321 output:
260 06:57:54.346980 rename /var/lib/lava/dispatcher/tmp/714821/extract-overlay-ramdisk-watli0yz/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot
261 06:57:54.347430 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 06:57:54.347726 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 06:57:54.348165 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 06:57:54.348717 No LXC device requested
265 06:57:54.349348 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 06:57:54.349949 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 06:57:54.350531 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 06:57:54.351010 Checking files for TFTP limit of 4294967296 bytes.
269 06:57:54.354000 end: 1 tftp-deploy (duration 00:01:03) [common]
270 06:57:54.354667 start: 2 uboot-action (timeout 00:05:00) [common]
271 06:57:54.355277 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 06:57:54.355850 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 06:57:54.356572 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 06:57:54.357296 Using kernel file from prepare-kernel: 714821/tftp-deploy-pjfjyd99/kernel/uImage
275 06:57:54.358028 substitutions:
276 06:57:54.358497 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 06:57:54.358953 - {DTB_ADDR}: 0x01070000
278 06:57:54.359403 - {DTB}: 714821/tftp-deploy-pjfjyd99/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 06:57:54.359852 - {INITRD}: 714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot
280 06:57:54.360350 - {KERNEL_ADDR}: 0x01080000
281 06:57:54.360804 - {KERNEL}: 714821/tftp-deploy-pjfjyd99/kernel/uImage
282 06:57:54.361251 - {LAVA_MAC}: None
283 06:57:54.361745 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/714821/extract-nfsrootfs-9ztmg7qw
284 06:57:54.362201 - {NFS_SERVER_IP}: 192.168.6.2
285 06:57:54.362648 - {PRESEED_CONFIG}: None
286 06:57:54.363088 - {PRESEED_LOCAL}: None
287 06:57:54.363526 - {RAMDISK_ADDR}: 0x08000000
288 06:57:54.363960 - {RAMDISK}: 714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot
289 06:57:54.364444 - {ROOT_PART}: None
290 06:57:54.364889 - {ROOT}: None
291 06:57:54.365328 - {SERVER_IP}: 192.168.6.2
292 06:57:54.365773 - {TEE_ADDR}: 0x83000000
293 06:57:54.366214 - {TEE}: None
294 06:57:54.366663 Parsed boot commands:
295 06:57:54.367096 - setenv autoload no
296 06:57:54.367538 - setenv initrd_high 0xffffffff
297 06:57:54.367976 - setenv fdt_high 0xffffffff
298 06:57:54.368452 - dhcp
299 06:57:54.368896 - setenv serverip 192.168.6.2
300 06:57:54.369332 - tftpboot 0x01080000 714821/tftp-deploy-pjfjyd99/kernel/uImage
301 06:57:54.369773 - tftpboot 0x08000000 714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot
302 06:57:54.370211 - tftpboot 0x01070000 714821/tftp-deploy-pjfjyd99/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 06:57:54.370655 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/714821/extract-nfsrootfs-9ztmg7qw,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 06:57:54.371110 - bootm 0x01080000 0x08000000 0x01070000
305 06:57:54.371732 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 06:57:54.372815 start: 2.3 connect-device (timeout 00:05:00) [common]
308 06:57:54.373353 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 06:57:54.388734 Setting prompt string to ['lava-test: # ']
310 06:57:54.390370 end: 2.3 connect-device (duration 00:00:00) [common]
311 06:57:54.391066 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 06:57:54.391705 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 06:57:54.392396 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 06:57:54.393693 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 06:57:54.431952 >> OK - accepted request
316 06:57:54.434499 Returned 0 in 0 seconds
317 06:57:54.535834 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 06:57:54.537726 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 06:57:54.538372 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 06:57:54.538968 Setting prompt string to ['Hit any key to stop autoboot']
322 06:57:54.539494 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 06:57:54.541238 Trying 192.168.56.21...
324 06:57:54.541788 Connected to conserv1.
325 06:57:54.542269 Escape character is '^]'.
326 06:57:54.542743
327 06:57:54.543219 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 06:57:54.543707
329 06:58:01.984898 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 06:58:01.985574 bl2_stage_init 0x01
331 06:58:01.986065 bl2_stage_init 0x81
332 06:58:01.990447 hw id: 0x0000 - pwm id 0x01
333 06:58:01.990953 bl2_stage_init 0xc1
334 06:58:01.995517 bl2_stage_init 0x02
335 06:58:01.996035
336 06:58:01.996507 L0:00000000
337 06:58:01.996973 L1:00000703
338 06:58:01.997417 L2:00008067
339 06:58:02.001055 L3:15000000
340 06:58:02.001536 S1:00000000
341 06:58:02.001991 B2:20282000
342 06:58:02.002456 B1:a0f83180
343 06:58:02.002899
344 06:58:02.003338 TE: 68231
345 06:58:02.003779
346 06:58:02.012293 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 06:58:02.012782
348 06:58:02.013239 Board ID = 1
349 06:58:02.013683 Set cpu clk to 24M
350 06:58:02.014126 Set clk81 to 24M
351 06:58:02.017905 Use GP1_pll as DSU clk.
352 06:58:02.018379 DSU clk: 1200 Mhz
353 06:58:02.018829 CPU clk: 1200 MHz
354 06:58:02.023487 Set clk81 to 166.6M
355 06:58:02.029102 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 06:58:02.029590 board id: 1
357 06:58:02.036868 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 06:58:02.047727 fw parse done
359 06:58:02.053673 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 06:58:02.096700 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 06:58:02.107869 PIEI prepare done
362 06:58:02.108386 fastboot data load
363 06:58:02.108841 fastboot data verify
364 06:58:02.113476 verify result: 266
365 06:58:02.119051 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 06:58:02.119519 LPDDR4 probe
367 06:58:02.119966 ddr clk to 1584MHz
368 06:58:02.127029 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 06:58:02.164793
370 06:58:02.165296 dmc_version 0001
371 06:58:02.171436 Check phy result
372 06:58:02.177784 INFO : End of CA training
373 06:58:02.178265 INFO : End of initialization
374 06:58:02.183393 INFO : Training has run successfully!
375 06:58:02.183864 Check phy result
376 06:58:02.189026 INFO : End of initialization
377 06:58:02.189501 INFO : End of read enable training
378 06:58:02.194657 INFO : End of fine write leveling
379 06:58:02.200270 INFO : End of Write leveling coarse delay
380 06:58:02.200736 INFO : Training has run successfully!
381 06:58:02.201185 Check phy result
382 06:58:02.205864 INFO : End of initialization
383 06:58:02.206339 INFO : End of read dq deskew training
384 06:58:02.211410 INFO : End of MPR read delay center optimization
385 06:58:02.217038 INFO : End of write delay center optimization
386 06:58:02.222615 INFO : End of read delay center optimization
387 06:58:02.223091 INFO : End of max read latency training
388 06:58:02.228288 INFO : Training has run successfully!
389 06:58:02.228762 1D training succeed
390 06:58:02.237382 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 06:58:02.285290 Check phy result
392 06:58:02.285776 INFO : End of initialization
393 06:58:02.313007 INFO : End of 2D read delay Voltage center optimization
394 06:58:02.337135 INFO : End of 2D read delay Voltage center optimization
395 06:58:02.393788 INFO : End of 2D write delay Voltage center optimization
396 06:58:02.447846 INFO : End of 2D write delay Voltage center optimization
397 06:58:02.453387 INFO : Training has run successfully!
398 06:58:02.453879
399 06:58:02.454350 channel==0
400 06:58:02.459075 RxClkDly_Margin_A0==78 ps 8
401 06:58:02.459554 TxDqDly_Margin_A0==98 ps 10
402 06:58:02.464483 RxClkDly_Margin_A1==69 ps 7
403 06:58:02.464956 TxDqDly_Margin_A1==88 ps 9
404 06:58:02.465408 TrainedVREFDQ_A0==74
405 06:58:02.470070 TrainedVREFDQ_A1==75
406 06:58:02.470549 VrefDac_Margin_A0==23
407 06:58:02.471000 DeviceVref_Margin_A0==40
408 06:58:02.475716 VrefDac_Margin_A1==23
409 06:58:02.476228 DeviceVref_Margin_A1==39
410 06:58:02.476674
411 06:58:02.477118
412 06:58:02.477558 channel==1
413 06:58:02.481269 RxClkDly_Margin_A0==78 ps 8
414 06:58:02.481739 TxDqDly_Margin_A0==98 ps 10
415 06:58:02.486905 RxClkDly_Margin_A1==78 ps 8
416 06:58:02.487383 TxDqDly_Margin_A1==78 ps 8
417 06:58:02.492402 TrainedVREFDQ_A0==78
418 06:58:02.492886 TrainedVREFDQ_A1==75
419 06:58:02.493336 VrefDac_Margin_A0==23
420 06:58:02.497978 DeviceVref_Margin_A0==36
421 06:58:02.498239 VrefDac_Margin_A1==22
422 06:58:02.503612 DeviceVref_Margin_A1==38
423 06:58:02.503910
424 06:58:02.504155 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 06:58:02.504409
426 06:58:02.537193 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 06:58:02.537651 2D training succeed
428 06:58:02.542865 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 06:58:02.548470 auto size-- 65535DDR cs0 size: 2048MB
430 06:58:02.548761 DDR cs1 size: 2048MB
431 06:58:02.553998 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 06:58:02.554272 cs0 DataBus test pass
433 06:58:02.559690 cs1 DataBus test pass
434 06:58:02.560209 cs0 AddrBus test pass
435 06:58:02.560614 cs1 AddrBus test pass
436 06:58:02.561011
437 06:58:02.565432 100bdlr_step_size ps== 478
438 06:58:02.565964 result report
439 06:58:02.571023 boot times 0Enable ddr reg access
440 06:58:02.576232 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 06:58:02.590056 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 06:58:03.248772 bl2z: ptr: 05129330, size: 00001e40
443 06:58:03.256856 0.0;M3 CHK:0;cm4_sp_mode 0
444 06:58:03.257285 MVN_1=0x00000000
445 06:58:03.257516 MVN_2=0x00000000
446 06:58:03.268501 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 06:58:03.269002 OPS=0x04
448 06:58:03.269351 ring efuse init
449 06:58:03.271264 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 06:58:03.277757 [0.017354 Inits done]
451 06:58:03.278237 secure task start!
452 06:58:03.278519 high task start!
453 06:58:03.278783 low task start!
454 06:58:03.282066 run into bl31
455 06:58:03.290737 NOTICE: BL31: v1.3(release):4fc40b1
456 06:58:03.298594 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 06:58:03.299057 NOTICE: BL31: G12A normal boot!
458 06:58:03.313959 NOTICE: BL31: BL33 decompress pass
459 06:58:03.319494 ERROR: Error initializing runtime service opteed_fast
460 06:58:04.536754 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 06:58:04.537381 bl2_stage_init 0x01
462 06:58:04.537851 bl2_stage_init 0x81
463 06:58:04.542437 hw id: 0x0000 - pwm id 0x01
464 06:58:04.542993 bl2_stage_init 0xc1
465 06:58:04.543459 bl2_stage_init 0x02
466 06:58:04.543911
467 06:58:04.548056 L0:00000000
468 06:58:04.548593 L1:00000703
469 06:58:04.549062 L2:00008067
470 06:58:04.549513 L3:15000000
471 06:58:04.549986 S1:00000000
472 06:58:04.553671 B2:20282000
473 06:58:04.554214 B1:a0f83180
474 06:58:04.554652
475 06:58:04.555096 TE: 70719
476 06:58:04.555537
477 06:58:04.559251 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 06:58:04.559799
479 06:58:04.564811 Board ID = 1
480 06:58:04.565322 Set cpu clk to 24M
481 06:58:04.565755 Set clk81 to 24M
482 06:58:04.570390 Use GP1_pll as DSU clk.
483 06:58:04.570899 DSU clk: 1200 Mhz
484 06:58:04.571332 CPU clk: 1200 MHz
485 06:58:04.571757 Set clk81 to 166.6M
486 06:58:04.581578 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 06:58:04.582093 board id: 1
488 06:58:04.587976 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 06:58:04.599016 fw parse done
490 06:58:04.605039 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 06:58:04.648070 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 06:58:04.659296 PIEI prepare done
493 06:58:04.659845 fastboot data load
494 06:58:04.660330 fastboot data verify
495 06:58:04.664800 verify result: 266
496 06:58:04.670459 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 06:58:04.671055 LPDDR4 probe
498 06:58:04.671500 ddr clk to 1584MHz
499 06:58:06.038228 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 06:58:06.038880 bl2_stage_init 0x01
501 06:58:06.039359 bl2_stage_init 0x81
502 06:58:06.043805 hw id: 0x0000 - pwm id 0x01
503 06:58:06.044366 bl2_stage_init 0xc1
504 06:58:06.049422 bl2_stage_init 0x02
505 06:58:06.049926
506 06:58:06.050385 L0:00000000
507 06:58:06.050836 L1:00000703
508 06:58:06.051278 L2:00008067
509 06:58:06.051723 L3:15000000
510 06:58:06.055014 S1:00000000
511 06:58:06.055518 B2:20282000
512 06:58:06.055975 B1:a0f83180
513 06:58:06.056464
514 06:58:06.056913 TE: 73231
515 06:58:06.057357
516 06:58:06.060621 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 06:58:06.061134
518 06:58:06.066187 Board ID = 1
519 06:58:06.066687 Set cpu clk to 24M
520 06:58:06.067139 Set clk81 to 24M
521 06:58:06.071811 Use GP1_pll as DSU clk.
522 06:58:06.072348 DSU clk: 1200 Mhz
523 06:58:06.072805 CPU clk: 1200 MHz
524 06:58:06.077436 Set clk81 to 166.6M
525 06:58:06.083057 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 06:58:06.083634 board id: 1
527 06:58:06.090208 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 06:58:06.101088 fw parse done
529 06:58:06.107055 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 06:58:06.150149 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 06:58:06.161404 PIEI prepare done
532 06:58:06.161941 fastboot data load
533 06:58:06.162410 fastboot data verify
534 06:58:06.166995 verify result: 266
535 06:58:06.172583 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 06:58:06.173136 LPDDR4 probe
537 06:58:06.173600 ddr clk to 1584MHz
538 06:58:06.180519 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 06:58:06.218333
540 06:58:06.218924 dmc_version 0001
541 06:58:06.225354 Check phy result
542 06:58:06.231304 INFO : End of CA training
543 06:58:06.231850 INFO : End of initialization
544 06:58:06.236930 INFO : Training has run successfully!
545 06:58:06.237473 Check phy result
546 06:58:06.242502 INFO : End of initialization
547 06:58:06.243035 INFO : End of read enable training
548 06:58:06.248130 INFO : End of fine write leveling
549 06:58:06.253787 INFO : End of Write leveling coarse delay
550 06:58:06.254367 INFO : Training has run successfully!
551 06:58:06.254862 Check phy result
552 06:58:06.259335 INFO : End of initialization
553 06:58:06.259889 INFO : End of read dq deskew training
554 06:58:06.264924 INFO : End of MPR read delay center optimization
555 06:58:06.270479 INFO : End of write delay center optimization
556 06:58:06.276144 INFO : End of read delay center optimization
557 06:58:06.276705 INFO : End of max read latency training
558 06:58:06.281702 INFO : Training has run successfully!
559 06:58:06.282238 1D training succeed
560 06:58:06.290895 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 06:58:06.339228 Check phy result
562 06:58:06.339817 INFO : End of initialization
563 06:58:06.366644 INFO : End of 2D read delay Voltage center optimization
564 06:58:06.390835 INFO : End of 2D read delay Voltage center optimization
565 06:58:06.447532 INFO : End of 2D write delay Voltage center optimization
566 06:58:06.501531 INFO : End of 2D write delay Voltage center optimization
567 06:58:06.507061 INFO : Training has run successfully!
568 06:58:06.507627
569 06:58:06.508145 channel==0
570 06:58:06.512689 RxClkDly_Margin_A0==78 ps 8
571 06:58:06.513224 TxDqDly_Margin_A0==88 ps 9
572 06:58:06.518241 RxClkDly_Margin_A1==88 ps 9
573 06:58:06.518776 TxDqDly_Margin_A1==98 ps 10
574 06:58:06.519242 TrainedVREFDQ_A0==74
575 06:58:06.523952 TrainedVREFDQ_A1==74
576 06:58:06.524538 VrefDac_Margin_A0==23
577 06:58:06.525039 DeviceVref_Margin_A0==40
578 06:58:06.529517 VrefDac_Margin_A1==23
579 06:58:06.530073 DeviceVref_Margin_A1==40
580 06:58:06.530544
581 06:58:06.531002
582 06:58:06.531451 channel==1
583 06:58:06.535091 RxClkDly_Margin_A0==78 ps 8
584 06:58:06.535650 TxDqDly_Margin_A0==98 ps 10
585 06:58:06.540665 RxClkDly_Margin_A1==78 ps 8
586 06:58:06.541200 TxDqDly_Margin_A1==88 ps 9
587 06:58:06.546261 TrainedVREFDQ_A0==78
588 06:58:06.546796 TrainedVREFDQ_A1==75
589 06:58:06.547259 VrefDac_Margin_A0==22
590 06:58:06.551929 DeviceVref_Margin_A0==36
591 06:58:06.552519 VrefDac_Margin_A1==22
592 06:58:06.557489 DeviceVref_Margin_A1==39
593 06:58:06.558047
594 06:58:06.558513 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 06:58:06.558966
596 06:58:06.591150 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 06:58:06.591786 2D training succeed
598 06:58:06.596683 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 06:58:06.602239 auto size-- 65535DDR cs0 size: 2048MB
600 06:58:06.602796 DDR cs1 size: 2048MB
601 06:58:06.607921 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 06:58:06.608519 cs0 DataBus test pass
603 06:58:06.613468 cs1 DataBus test pass
604 06:58:06.614035 cs0 AddrBus test pass
605 06:58:06.614508 cs1 AddrBus test pass
606 06:58:06.614963
607 06:58:06.619043 100bdlr_step_size ps== 471
608 06:58:06.619593 result report
609 06:58:06.624649 boot times 0Enable ddr reg access
610 06:58:06.629840 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 06:58:06.643667 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 06:58:07.303132 bl2z: ptr: 05129330, size: 00001e40
613 06:58:07.312023 0.0;M3 CHK:0;cm4_sp_mode 0
614 06:58:07.312603 MVN_1=0x00000000
615 06:58:07.313086 MVN_2=0x00000000
616 06:58:07.323458 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 06:58:07.324049 OPS=0x04
618 06:58:07.324580 ring efuse init
619 06:58:07.329035 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 06:58:07.329611 [0.017355 Inits done]
621 06:58:07.330098 secure task start!
622 06:58:07.336274 high task start!
623 06:58:07.336822 low task start!
624 06:58:07.337338 run into bl31
625 06:58:07.344907 NOTICE: BL31: v1.3(release):4fc40b1
626 06:58:07.352611 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 06:58:07.353170 NOTICE: BL31: G12A normal boot!
628 06:58:07.368146 NOTICE: BL31: BL33 decompress pass
629 06:58:07.376786 ERROR: Error initializing runtime service opteed_fast
630 06:58:08.587030 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 06:58:08.587715 bl2_stage_init 0x01
632 06:58:08.588257 bl2_stage_init 0x81
633 06:58:08.592565 hw id: 0x0000 - pwm id 0x01
634 06:58:08.593075 bl2_stage_init 0xc1
635 06:58:08.598526 bl2_stage_init 0x02
636 06:58:08.599028
637 06:58:08.599496 L0:00000000
638 06:58:08.599951 L1:00000703
639 06:58:08.600449 L2:00008067
640 06:58:08.600895 L3:15000000
641 06:58:08.603770 S1:00000000
642 06:58:08.604296 B2:20282000
643 06:58:08.604752 B1:a0f83180
644 06:58:08.605201
645 06:58:08.605650 TE: 70192
646 06:58:08.606095
647 06:58:08.609974 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 06:58:08.610469
649 06:58:08.614936 Board ID = 1
650 06:58:08.615425 Set cpu clk to 24M
651 06:58:08.615881 Set clk81 to 24M
652 06:58:08.618870 Use GP1_pll as DSU clk.
653 06:58:08.619357 DSU clk: 1200 Mhz
654 06:58:08.624319 CPU clk: 1200 MHz
655 06:58:08.624807 Set clk81 to 166.6M
656 06:58:08.629855 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 06:58:08.630344 board id: 1
658 06:58:08.638885 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 06:58:08.649703 fw parse done
660 06:58:08.655634 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 06:58:08.698759 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 06:58:08.709929 PIEI prepare done
663 06:58:08.710436 fastboot data load
664 06:58:08.710897 fastboot data verify
665 06:58:08.715456 verify result: 266
666 06:58:08.721140 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 06:58:08.721627 LPDDR4 probe
668 06:58:08.722078 ddr clk to 1584MHz
669 06:58:08.729010 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 06:58:08.766858
671 06:58:08.767397 dmc_version 0001
672 06:58:08.773834 Check phy result
673 06:58:08.779829 INFO : End of CA training
674 06:58:08.780444 INFO : End of initialization
675 06:58:08.785370 INFO : Training has run successfully!
676 06:58:08.785852 Check phy result
677 06:58:08.791154 INFO : End of initialization
678 06:58:08.791674 INFO : End of read enable training
679 06:58:08.794266 INFO : End of fine write leveling
680 06:58:08.799829 INFO : End of Write leveling coarse delay
681 06:58:08.805462 INFO : Training has run successfully!
682 06:58:08.805939 Check phy result
683 06:58:08.806388 INFO : End of initialization
684 06:58:08.811126 INFO : End of read dq deskew training
685 06:58:08.816653 INFO : End of MPR read delay center optimization
686 06:58:08.817127 INFO : End of write delay center optimization
687 06:58:08.822205 INFO : End of read delay center optimization
688 06:58:08.827795 INFO : End of max read latency training
689 06:58:08.828293 INFO : Training has run successfully!
690 06:58:08.833435 1D training succeed
691 06:58:08.839370 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 06:58:08.887654 Check phy result
693 06:58:08.888223 INFO : End of initialization
694 06:58:08.915066 INFO : End of 2D read delay Voltage center optimization
695 06:58:08.939271 INFO : End of 2D read delay Voltage center optimization
696 06:58:08.995944 INFO : End of 2D write delay Voltage center optimization
697 06:58:09.050039 INFO : End of 2D write delay Voltage center optimization
698 06:58:09.055554 INFO : Training has run successfully!
699 06:58:09.056128
700 06:58:09.056609 channel==0
701 06:58:09.061160 RxClkDly_Margin_A0==78 ps 8
702 06:58:09.061681 TxDqDly_Margin_A0==98 ps 10
703 06:58:09.064496 RxClkDly_Margin_A1==78 ps 8
704 06:58:09.064998 TxDqDly_Margin_A1==88 ps 9
705 06:58:09.070028 TrainedVREFDQ_A0==74
706 06:58:09.070523 TrainedVREFDQ_A1==74
707 06:58:09.071026 VrefDac_Margin_A0==24
708 06:58:09.075650 DeviceVref_Margin_A0==40
709 06:58:09.076192 VrefDac_Margin_A1==23
710 06:58:09.081252 DeviceVref_Margin_A1==40
711 06:58:09.081761
712 06:58:09.082221
713 06:58:09.082667 channel==1
714 06:58:09.083106 RxClkDly_Margin_A0==88 ps 9
715 06:58:09.086823 TxDqDly_Margin_A0==98 ps 10
716 06:58:09.087340 RxClkDly_Margin_A1==78 ps 8
717 06:58:09.092491 TxDqDly_Margin_A1==88 ps 9
718 06:58:09.093084 TrainedVREFDQ_A0==78
719 06:58:09.093548 TrainedVREFDQ_A1==77
720 06:58:09.098022 VrefDac_Margin_A0==22
721 06:58:09.098540 DeviceVref_Margin_A0==36
722 06:58:09.103649 VrefDac_Margin_A1==22
723 06:58:09.104199 DeviceVref_Margin_A1==37
724 06:58:09.104656
725 06:58:09.109209 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 06:58:09.109724
727 06:58:09.137252 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000019 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 06:58:09.142887 2D training succeed
729 06:58:09.148442 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 06:58:09.148930 auto size-- 65535DDR cs0 size: 2048MB
731 06:58:09.154021 DDR cs1 size: 2048MB
732 06:58:09.154502 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 06:58:09.159612 cs0 DataBus test pass
734 06:58:09.160126 cs1 DataBus test pass
735 06:58:09.160584 cs0 AddrBus test pass
736 06:58:09.165239 cs1 AddrBus test pass
737 06:58:09.165725
738 06:58:09.166172 100bdlr_step_size ps== 464
739 06:58:09.166621 result report
740 06:58:09.170816 boot times 0Enable ddr reg access
741 06:58:09.178273 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 06:58:09.192300 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 06:58:09.851554 bl2z: ptr: 05129330, size: 00001e40
744 06:58:09.858891 0.0;M3 CHK:0;cm4_sp_mode 0
745 06:58:09.859448 MVN_1=0x00000000
746 06:58:09.859891 MVN_2=0x00000000
747 06:58:09.870444 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 06:58:09.871015 OPS=0x04
749 06:58:09.871462 ring efuse init
750 06:58:09.873302 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 06:58:09.879414 [0.017354 Inits done]
752 06:58:09.879873 secure task start!
753 06:58:09.880346 high task start!
754 06:58:09.880777 low task start!
755 06:58:09.883674 run into bl31
756 06:58:09.892314 NOTICE: BL31: v1.3(release):4fc40b1
757 06:58:09.900128 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 06:58:09.900432 NOTICE: BL31: G12A normal boot!
759 06:58:09.915666 NOTICE: BL31: BL33 decompress pass
760 06:58:09.921323 ERROR: Error initializing runtime service opteed_fast
761 06:58:10.716876
762 06:58:10.717594
763 06:58:10.722657 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 06:58:10.723214
765 06:58:10.725815 Model: Libre Computer AML-S905D3-CC Solitude
766 06:58:10.872759 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 06:58:10.888248 DRAM: 2 GiB (effective 3.8 GiB)
768 06:58:10.989180 Core: 406 devices, 33 uclasses, devicetree: separate
769 06:58:10.995211 WDT: Not starting watchdog@f0d0
770 06:58:11.020690 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 06:58:11.032311 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 06:58:11.037473 ** Bad device specification mmc 0 **
773 06:58:11.047582 Card did not respond to voltage select! : -110
774 06:58:11.054958 ** Bad device specification mmc 0 **
775 06:58:11.055625 Couldn't find partition mmc 0
776 06:58:11.063318 Card did not respond to voltage select! : -110
777 06:58:11.068844 ** Bad device specification mmc 0 **
778 06:58:11.069507 Couldn't find partition mmc 0
779 06:58:11.073898 Error: could not access storage.
780 06:58:11.371500 Net: eth0: ethernet@ff3f0000
781 06:58:11.372246 starting USB...
782 06:58:11.616226 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 06:58:11.616883 Starting the controller
784 06:58:11.623155 USB XHCI 1.10
785 06:58:13.177208 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 06:58:13.185458 scanning usb for storage devices... 0 Storage Device(s) found
788 06:58:13.237098 Hit any key to stop autoboot: 1
789 06:58:13.238077 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 06:58:13.238883 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 06:58:13.239426 Setting prompt string to ['=>']
792 06:58:13.239961 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 06:58:13.251467 0
794 06:58:13.252470 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 06:58:13.353797 => setenv autoload no
797 06:58:13.354558 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 06:58:13.360351 setenv autoload no
800 06:58:13.461939 => setenv initrd_high 0xffffffff
801 06:58:13.462654 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 06:58:13.466990 setenv initrd_high 0xffffffff
804 06:58:13.568595 => setenv fdt_high 0xffffffff
805 06:58:13.569316 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 06:58:13.573663 setenv fdt_high 0xffffffff
808 06:58:13.675269 => dhcp
809 06:58:13.676064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 06:58:13.680385 dhcp
811 06:58:14.636363 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 06:58:14.637027 Speed: 1000, full duplex
813 06:58:14.637486 BOOTP broadcast 1
814 06:58:14.884746 BOOTP broadcast 2
815 06:58:15.385816 BOOTP broadcast 3
816 06:58:16.386594 BOOTP broadcast 4
817 06:58:18.387857 BOOTP broadcast 5
818 06:58:18.408733 DHCP client bound to address 192.168.6.12 (3771 ms)
820 06:58:18.510399 => setenv serverip 192.168.6.2
821 06:58:18.511221 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 06:58:18.514829 setenv serverip 192.168.6.2
824 06:58:18.616450 => tftpboot 0x01080000 714821/tftp-deploy-pjfjyd99/kernel/uImage
825 06:58:18.617257 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 06:58:18.624073 tftpboot 0x01080000 714821/tftp-deploy-pjfjyd99/kernel/uImage
827 06:58:18.624620 Speed: 1000, full duplex
828 06:58:18.625076 Using ethernet@ff3f0000 device
829 06:58:18.629681 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 06:58:18.635129 Filename '714821/tftp-deploy-pjfjyd99/kernel/uImage'.
831 06:58:18.639031 Load address: 0x1080000
832 06:58:21.494508 Loading: *################################################## 43.2 MiB
833 06:58:21.495255 15.1 MiB/s
834 06:58:21.495757 done
835 06:58:21.499211 Bytes transferred = 45308480 (2b35a40 hex)
837 06:58:21.601381 => tftpboot 0x08000000 714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot
838 06:58:21.602296 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
839 06:58:21.609146 tftpboot 0x08000000 714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot
840 06:58:21.610155 Speed: 1000, full duplex
841 06:58:21.610818 Using ethernet@ff3f0000 device
842 06:58:21.614768 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 06:58:21.624401 Filename '714821/tftp-deploy-pjfjyd99/ramdisk/ramdisk.cpio.gz.uboot'.
844 06:58:21.625172 Load address: 0x8000000
845 06:58:23.160147 Loading: *################################################# UDP wrong checksum 00000005 000041d3
846 06:58:28.159870 T UDP wrong checksum 00000005 000041d3
847 06:58:30.433117 UDP wrong checksum 000000ff 0000dab6
848 06:58:30.451037 UDP wrong checksum 000000ff 00006aa9
849 06:58:36.953804 T UDP wrong checksum 000000ff 000025b3
850 06:58:36.969500 UDP wrong checksum 000000ff 0000b7a5
851 06:58:38.160825 T UDP wrong checksum 00000005 000041d3
852 06:58:58.164682 T T T UDP wrong checksum 00000005 000041d3
853 06:59:18.170234 T T T T
854 06:59:18.170996 Retry count exceeded; starting again
856 06:59:18.172625 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
859 06:59:18.174688 end: 2.4 uboot-commands (duration 00:01:24) [common]
861 06:59:18.176266 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
863 06:59:18.177523 end: 2 uboot-action (duration 00:01:24) [common]
865 06:59:18.179411 Cleaning after the job
866 06:59:18.180039 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/ramdisk
867 06:59:18.181520 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/kernel
868 06:59:18.222783 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/dtb
869 06:59:18.223612 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/nfsrootfs
870 06:59:18.511409 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/714821/tftp-deploy-pjfjyd99/modules
871 06:59:18.534950 start: 4.1 power-off (timeout 00:00:30) [common]
872 06:59:18.535640 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
873 06:59:18.566412 >> OK - accepted request
874 06:59:18.568471 Returned 0 in 0 seconds
875 06:59:18.669359 end: 4.1 power-off (duration 00:00:00) [common]
877 06:59:18.671086 start: 4.2 read-feedback (timeout 00:10:00) [common]
878 06:59:18.672216 Listened to connection for namespace 'common' for up to 1s
879 06:59:19.672205 Finalising connection for namespace 'common'
880 06:59:19.672715 Disconnecting from shell: Finalise
881 06:59:19.673036 =>
882 06:59:19.773721 end: 4.2 read-feedback (duration 00:00:01) [common]
883 06:59:19.774176 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/714821
884 06:59:23.023271 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/714821
885 06:59:23.023943 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.