Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:48:07.706752 lava-dispatcher, installed at version: 2024.01
2 21:48:07.707577 start: 0 validate
3 21:48:07.708113 Start time: 2024-09-03 21:48:07.708083+00:00 (UTC)
4 21:48:07.708666 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:48:07.709212 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:48:07.758501 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:48:07.759092 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-26-g88fac17500f4%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 21:48:07.791774 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:48:07.792444 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-26-g88fac17500f4%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 21:48:07.827648 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:48:07.828247 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:48:07.863463 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:48:07.864095 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-26-g88fac17500f4%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 21:48:07.906715 validate duration: 0.20
16 21:48:07.908261 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:48:07.908883 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:48:07.909487 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:48:07.910626 Not decompressing ramdisk as can be used compressed.
20 21:48:07.911529 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 21:48:07.912088 saving as /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/ramdisk/initrd.cpio.gz
22 21:48:07.912612 total size: 5628182 (5 MB)
23 21:48:07.959536 progress 0 % (0 MB)
24 21:48:07.967520 progress 5 % (0 MB)
25 21:48:07.975872 progress 10 % (0 MB)
26 21:48:07.983523 progress 15 % (0 MB)
27 21:48:07.992074 progress 20 % (1 MB)
28 21:48:07.996614 progress 25 % (1 MB)
29 21:48:08.001129 progress 30 % (1 MB)
30 21:48:08.005407 progress 35 % (1 MB)
31 21:48:08.009406 progress 40 % (2 MB)
32 21:48:08.014282 progress 45 % (2 MB)
33 21:48:08.017998 progress 50 % (2 MB)
34 21:48:08.022157 progress 55 % (2 MB)
35 21:48:08.026369 progress 60 % (3 MB)
36 21:48:08.030094 progress 65 % (3 MB)
37 21:48:08.034411 progress 70 % (3 MB)
38 21:48:08.038131 progress 75 % (4 MB)
39 21:48:08.042273 progress 80 % (4 MB)
40 21:48:08.045991 progress 85 % (4 MB)
41 21:48:08.050185 progress 90 % (4 MB)
42 21:48:08.054164 progress 95 % (5 MB)
43 21:48:08.057509 progress 100 % (5 MB)
44 21:48:08.058181 5 MB downloaded in 0.15 s (36.87 MB/s)
45 21:48:08.058737 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:48:08.059617 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:48:08.059907 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:48:08.060223 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:48:08.060732 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-26-g88fac17500f4/arm64/defconfig+debug/gcc-12/kernel/Image
51 21:48:08.061012 saving as /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/kernel/Image
52 21:48:08.061240 total size: 167969280 (160 MB)
53 21:48:08.061460 No compression specified
54 21:48:08.098669 progress 0 % (0 MB)
55 21:48:08.207622 progress 5 % (8 MB)
56 21:48:08.317330 progress 10 % (16 MB)
57 21:48:08.425447 progress 15 % (24 MB)
58 21:48:08.537093 progress 20 % (32 MB)
59 21:48:08.645324 progress 25 % (40 MB)
60 21:48:08.757529 progress 30 % (48 MB)
61 21:48:08.868019 progress 35 % (56 MB)
62 21:48:08.974353 progress 40 % (64 MB)
63 21:48:09.079512 progress 45 % (72 MB)
64 21:48:09.184159 progress 50 % (80 MB)
65 21:48:09.288306 progress 55 % (88 MB)
66 21:48:09.393264 progress 60 % (96 MB)
67 21:48:09.500256 progress 65 % (104 MB)
68 21:48:09.608728 progress 70 % (112 MB)
69 21:48:09.716080 progress 75 % (120 MB)
70 21:48:09.824729 progress 80 % (128 MB)
71 21:48:09.931304 progress 85 % (136 MB)
72 21:48:10.038062 progress 90 % (144 MB)
73 21:48:10.144622 progress 95 % (152 MB)
74 21:48:10.254779 progress 100 % (160 MB)
75 21:48:10.255328 160 MB downloaded in 2.19 s (73.01 MB/s)
76 21:48:10.255839 end: 1.2.1 http-download (duration 00:00:02) [common]
78 21:48:10.256733 end: 1.2 download-retry (duration 00:00:02) [common]
79 21:48:10.257012 start: 1.3 download-retry (timeout 00:09:58) [common]
80 21:48:10.257276 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 21:48:10.257736 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-26-g88fac17500f4/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 21:48:10.258001 saving as /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/dtb/meson-g12b-a311d-libretech-cc.dtb
83 21:48:10.258207 total size: 54667 (0 MB)
84 21:48:10.258415 No compression specified
85 21:48:10.298093 progress 59 % (0 MB)
86 21:48:10.298991 progress 100 % (0 MB)
87 21:48:10.299598 0 MB downloaded in 0.04 s (1.26 MB/s)
88 21:48:10.300100 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:48:10.300920 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:48:10.301177 start: 1.4 download-retry (timeout 00:09:58) [common]
92 21:48:10.301436 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 21:48:10.301899 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 21:48:10.302133 saving as /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/nfsrootfs/full.rootfs.tar
95 21:48:10.302336 total size: 107552908 (102 MB)
96 21:48:10.302543 Using unxz to decompress xz
97 21:48:10.334465 progress 0 % (0 MB)
98 21:48:10.992651 progress 5 % (5 MB)
99 21:48:11.720934 progress 10 % (10 MB)
100 21:48:12.449872 progress 15 % (15 MB)
101 21:48:13.320286 progress 20 % (20 MB)
102 21:48:14.045577 progress 25 % (25 MB)
103 21:48:14.729951 progress 30 % (30 MB)
104 21:48:15.466217 progress 35 % (35 MB)
105 21:48:15.821158 progress 40 % (41 MB)
106 21:48:16.246073 progress 45 % (46 MB)
107 21:48:16.942589 progress 50 % (51 MB)
108 21:48:17.638207 progress 55 % (56 MB)
109 21:48:18.400493 progress 60 % (61 MB)
110 21:48:19.155391 progress 65 % (66 MB)
111 21:48:19.888075 progress 70 % (71 MB)
112 21:48:20.657126 progress 75 % (76 MB)
113 21:48:21.346149 progress 80 % (82 MB)
114 21:48:22.061266 progress 85 % (87 MB)
115 21:48:22.806145 progress 90 % (92 MB)
116 21:48:23.531727 progress 95 % (97 MB)
117 21:48:24.279760 progress 100 % (102 MB)
118 21:48:24.293019 102 MB downloaded in 13.99 s (7.33 MB/s)
119 21:48:24.293622 end: 1.4.1 http-download (duration 00:00:14) [common]
121 21:48:24.294454 end: 1.4 download-retry (duration 00:00:14) [common]
122 21:48:24.294716 start: 1.5 download-retry (timeout 00:09:44) [common]
123 21:48:24.294977 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 21:48:24.295476 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-26-g88fac17500f4/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 21:48:24.295721 saving as /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/modules/modules.tar
126 21:48:24.295924 total size: 27444600 (26 MB)
127 21:48:24.296368 Using unxz to decompress xz
128 21:48:24.342454 progress 0 % (0 MB)
129 21:48:24.531374 progress 5 % (1 MB)
130 21:48:24.737712 progress 10 % (2 MB)
131 21:48:24.941804 progress 15 % (3 MB)
132 21:48:25.153969 progress 20 % (5 MB)
133 21:48:25.355198 progress 25 % (6 MB)
134 21:48:25.564578 progress 30 % (7 MB)
135 21:48:25.751614 progress 35 % (9 MB)
136 21:48:25.959484 progress 40 % (10 MB)
137 21:48:26.158939 progress 45 % (11 MB)
138 21:48:26.365083 progress 50 % (13 MB)
139 21:48:26.571453 progress 55 % (14 MB)
140 21:48:26.777742 progress 60 % (15 MB)
141 21:48:26.978079 progress 65 % (17 MB)
142 21:48:27.194581 progress 70 % (18 MB)
143 21:48:27.396508 progress 75 % (19 MB)
144 21:48:27.638888 progress 80 % (20 MB)
145 21:48:27.833114 progress 85 % (22 MB)
146 21:48:28.047836 progress 90 % (23 MB)
147 21:48:28.245147 progress 95 % (24 MB)
148 21:48:28.444554 progress 100 % (26 MB)
149 21:48:28.459883 26 MB downloaded in 4.16 s (6.29 MB/s)
150 21:48:28.460825 end: 1.5.1 http-download (duration 00:00:04) [common]
152 21:48:28.462419 end: 1.5 download-retry (duration 00:00:04) [common]
153 21:48:28.462930 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 21:48:28.463439 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 21:48:38.149676 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/699423/extract-nfsrootfs-yo9vae2a
156 21:48:38.150269 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 21:48:38.150559 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 21:48:38.151182 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx
159 21:48:38.151618 makedir: /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin
160 21:48:38.151946 makedir: /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/tests
161 21:48:38.152314 makedir: /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/results
162 21:48:38.152667 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-add-keys
163 21:48:38.153231 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-add-sources
164 21:48:38.153786 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-background-process-start
165 21:48:38.154332 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-background-process-stop
166 21:48:38.154894 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-common-functions
167 21:48:38.155554 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-echo-ipv4
168 21:48:38.156089 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-install-packages
169 21:48:38.156597 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-installed-packages
170 21:48:38.157086 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-os-build
171 21:48:38.157587 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-probe-channel
172 21:48:38.158094 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-probe-ip
173 21:48:38.158573 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-target-ip
174 21:48:38.159053 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-target-mac
175 21:48:38.159542 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-target-storage
176 21:48:38.160058 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-case
177 21:48:38.160557 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-event
178 21:48:38.161038 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-feedback
179 21:48:38.161547 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-raise
180 21:48:38.162073 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-reference
181 21:48:38.162586 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-runner
182 21:48:38.163088 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-set
183 21:48:38.163586 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-test-shell
184 21:48:38.164128 Updating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-install-packages (oe)
185 21:48:38.164687 Updating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/bin/lava-installed-packages (oe)
186 21:48:38.165154 Creating /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/environment
187 21:48:38.165550 LAVA metadata
188 21:48:38.165818 - LAVA_JOB_ID=699423
189 21:48:38.166035 - LAVA_DISPATCHER_IP=192.168.6.2
190 21:48:38.166413 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 21:48:38.167425 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 21:48:38.167760 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 21:48:38.167972 skipped lava-vland-overlay
194 21:48:38.168258 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 21:48:38.168518 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 21:48:38.168742 skipped lava-multinode-overlay
197 21:48:38.168988 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 21:48:38.169243 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 21:48:38.169500 Loading test definitions
200 21:48:38.169783 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 21:48:38.170007 Using /lava-699423 at stage 0
202 21:48:38.171310 uuid=699423_1.6.2.4.1 testdef=None
203 21:48:38.171648 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 21:48:38.171921 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 21:48:38.173834 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 21:48:38.174629 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 21:48:38.176941 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 21:48:38.177782 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 21:48:38.179973 runner path: /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/0/tests/0_dmesg test_uuid 699423_1.6.2.4.1
212 21:48:38.180615 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 21:48:38.181409 Creating lava-test-runner.conf files
215 21:48:38.181612 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/699423/lava-overlay-9cg4d9jx/lava-699423/0 for stage 0
216 21:48:38.181969 - 0_dmesg
217 21:48:38.182320 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 21:48:38.182599 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 21:48:38.204423 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 21:48:38.204833 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 21:48:38.205096 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 21:48:38.205363 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 21:48:38.205625 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 21:48:38.831913 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 21:48:38.832488 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 21:48:38.832773 extracting modules file /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/699423/extract-nfsrootfs-yo9vae2a
227 21:48:40.576371 extracting modules file /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/699423/extract-overlay-ramdisk-8lio71k0/ramdisk
228 21:48:42.362482 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 21:48:42.362946 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 21:48:42.363224 [common] Applying overlay to NFS
231 21:48:42.363759 [common] Applying overlay /var/lib/lava/dispatcher/tmp/699423/compress-overlay-lmhub0z_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/699423/extract-nfsrootfs-yo9vae2a
232 21:48:42.393388 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 21:48:42.393791 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 21:48:42.394069 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 21:48:42.394301 Converting downloaded kernel to a uImage
236 21:48:42.394607 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/kernel/Image /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/kernel/uImage
237 21:48:44.367711 output: Image Name:
238 21:48:44.368322 output: Created: Tue Sep 3 21:48:42 2024
239 21:48:44.368564 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 21:48:44.368769 output: Data Size: 167969280 Bytes = 164032.50 KiB = 160.19 MiB
241 21:48:44.368968 output: Load Address: 01080000
242 21:48:44.369164 output: Entry Point: 01080000
243 21:48:44.369358 output:
244 21:48:44.369686 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 21:48:44.369949 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 21:48:44.370214 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 21:48:44.370462 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 21:48:44.370716 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 21:48:44.370971 Building ramdisk /var/lib/lava/dispatcher/tmp/699423/extract-overlay-ramdisk-8lio71k0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/699423/extract-overlay-ramdisk-8lio71k0/ramdisk
250 21:48:49.758028 >> 421519 blocks
251 21:49:07.597990 Adding RAMdisk u-boot header.
252 21:49:07.598436 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/699423/extract-overlay-ramdisk-8lio71k0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/699423/extract-overlay-ramdisk-8lio71k0/ramdisk.cpio.gz.uboot
253 21:49:08.126727 output: Image Name:
254 21:49:08.127330 output: Created: Tue Sep 3 21:49:07 2024
255 21:49:08.127763 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 21:49:08.128234 output: Data Size: 50556868 Bytes = 49371.94 KiB = 48.21 MiB
257 21:49:08.128647 output: Load Address: 00000000
258 21:49:08.129045 output: Entry Point: 00000000
259 21:49:08.129438 output:
260 21:49:08.130377 rename /var/lib/lava/dispatcher/tmp/699423/extract-overlay-ramdisk-8lio71k0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/ramdisk/ramdisk.cpio.gz.uboot
261 21:49:08.131099 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 21:49:08.131662 end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
263 21:49:08.132234 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 21:49:08.132712 No LXC device requested
265 21:49:08.133240 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 21:49:08.133766 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 21:49:08.134269 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 21:49:08.134684 Checking files for TFTP limit of 4294967296 bytes.
269 21:49:08.137462 end: 1 tftp-deploy (duration 00:01:00) [common]
270 21:49:08.138076 start: 2 uboot-action (timeout 00:05:00) [common]
271 21:49:08.138617 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 21:49:08.139123 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 21:49:08.139634 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 21:49:08.140200 Using kernel file from prepare-kernel: 699423/tftp-deploy-aakhrd8z/kernel/uImage
275 21:49:08.140848 substitutions:
276 21:49:08.141265 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 21:49:08.141679 - {DTB_ADDR}: 0x01070000
278 21:49:08.142083 - {DTB}: 699423/tftp-deploy-aakhrd8z/dtb/meson-g12b-a311d-libretech-cc.dtb
279 21:49:08.142484 - {INITRD}: 699423/tftp-deploy-aakhrd8z/ramdisk/ramdisk.cpio.gz.uboot
280 21:49:08.142883 - {KERNEL_ADDR}: 0x01080000
281 21:49:08.143278 - {KERNEL}: 699423/tftp-deploy-aakhrd8z/kernel/uImage
282 21:49:08.143673 - {LAVA_MAC}: None
283 21:49:08.144140 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/699423/extract-nfsrootfs-yo9vae2a
284 21:49:08.144554 - {NFS_SERVER_IP}: 192.168.6.2
285 21:49:08.144950 - {PRESEED_CONFIG}: None
286 21:49:08.145341 - {PRESEED_LOCAL}: None
287 21:49:08.145730 - {RAMDISK_ADDR}: 0x08000000
288 21:49:08.146118 - {RAMDISK}: 699423/tftp-deploy-aakhrd8z/ramdisk/ramdisk.cpio.gz.uboot
289 21:49:08.146509 - {ROOT_PART}: None
290 21:49:08.146903 - {ROOT}: None
291 21:49:08.147307 - {SERVER_IP}: 192.168.6.2
292 21:49:08.147707 - {TEE_ADDR}: 0x83000000
293 21:49:08.148126 - {TEE}: None
294 21:49:08.148527 Parsed boot commands:
295 21:49:08.148913 - setenv autoload no
296 21:49:08.149305 - setenv initrd_high 0xffffffff
297 21:49:08.149697 - setenv fdt_high 0xffffffff
298 21:49:08.150086 - dhcp
299 21:49:08.150475 - setenv serverip 192.168.6.2
300 21:49:08.150866 - tftpboot 0x01080000 699423/tftp-deploy-aakhrd8z/kernel/uImage
301 21:49:08.151260 - tftpboot 0x08000000 699423/tftp-deploy-aakhrd8z/ramdisk/ramdisk.cpio.gz.uboot
302 21:49:08.151652 - tftpboot 0x01070000 699423/tftp-deploy-aakhrd8z/dtb/meson-g12b-a311d-libretech-cc.dtb
303 21:49:08.152067 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/699423/extract-nfsrootfs-yo9vae2a,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 21:49:08.152481 - bootm 0x01080000 0x08000000 0x01070000
305 21:49:08.153008 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 21:49:08.154519 start: 2.3 connect-device (timeout 00:05:00) [common]
308 21:49:08.154949 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 21:49:08.169661 Setting prompt string to ['lava-test: # ']
310 21:49:08.171164 end: 2.3 connect-device (duration 00:00:00) [common]
311 21:49:08.171780 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 21:49:08.172404 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 21:49:08.172954 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 21:49:08.174088 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 21:49:08.212107 >> OK - accepted request
316 21:49:08.214248 Returned 0 in 0 seconds
317 21:49:08.315419 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 21:49:08.317209 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 21:49:08.317826 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 21:49:08.318362 Setting prompt string to ['Hit any key to stop autoboot']
322 21:49:08.318845 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 21:49:08.320504 Trying 192.168.56.21...
324 21:49:08.321035 Connected to conserv1.
325 21:49:08.321473 Escape character is '^]'.
326 21:49:08.321905
327 21:49:08.322334 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 21:49:08.322766
329 21:49:19.475422 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 21:49:19.476118 bl2_stage_init 0x01
331 21:49:19.476566 bl2_stage_init 0x81
332 21:49:19.480782 hw id: 0x0000 - pwm id 0x01
333 21:49:19.481301 bl2_stage_init 0xc1
334 21:49:19.481698 bl2_stage_init 0x02
335 21:49:19.482087
336 21:49:19.486354 L0:00000000
337 21:49:19.486851 L1:20000703
338 21:49:19.487265 L2:00008067
339 21:49:19.487657 L3:14000000
340 21:49:19.489388 B2:00402000
341 21:49:19.489837 B1:e0f83180
342 21:49:19.490247
343 21:49:19.490637 TE: 58124
344 21:49:19.491025
345 21:49:19.500445 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 21:49:19.500924
347 21:49:19.501316 Board ID = 1
348 21:49:19.501699 Set A53 clk to 24M
349 21:49:19.502084 Set A73 clk to 24M
350 21:49:19.506138 Set clk81 to 24M
351 21:49:19.506581 A53 clk: 1200 MHz
352 21:49:19.506969 A73 clk: 1200 MHz
353 21:49:19.511615 CLK81: 166.6M
354 21:49:19.512082 smccc: 00012a91
355 21:49:19.517392 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 21:49:19.517839 board id: 1
357 21:49:19.525853 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 21:49:19.536450 fw parse done
359 21:49:19.542450 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 21:49:19.584918 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 21:49:19.595879 PIEI prepare done
362 21:49:19.596437 fastboot data load
363 21:49:19.596834 fastboot data verify
364 21:49:19.601510 verify result: 266
365 21:49:19.607115 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 21:49:19.607544 LPDDR4 probe
367 21:49:19.607932 ddr clk to 1584MHz
368 21:49:19.615091 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 21:49:19.652393
370 21:49:19.652868 dmc_version 0001
371 21:49:19.659024 Check phy result
372 21:49:19.664914 INFO : End of CA training
373 21:49:19.665382 INFO : End of initialization
374 21:49:19.670490 INFO : Training has run successfully!
375 21:49:19.670950 Check phy result
376 21:49:19.676188 INFO : End of initialization
377 21:49:19.676636 INFO : End of read enable training
378 21:49:19.679424 INFO : End of fine write leveling
379 21:49:19.685012 INFO : End of Write leveling coarse delay
380 21:49:19.690689 INFO : Training has run successfully!
381 21:49:19.691213 Check phy result
382 21:49:19.691624 INFO : End of initialization
383 21:49:19.696213 INFO : End of read dq deskew training
384 21:49:19.699605 INFO : End of MPR read delay center optimization
385 21:49:19.705204 INFO : End of write delay center optimization
386 21:49:19.710784 INFO : End of read delay center optimization
387 21:49:19.711254 INFO : End of max read latency training
388 21:49:19.716446 INFO : Training has run successfully!
389 21:49:19.716929 1D training succeed
390 21:49:19.724539 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 21:49:19.772159 Check phy result
392 21:49:19.772677 INFO : End of initialization
393 21:49:19.793954 INFO : End of 2D read delay Voltage center optimization
394 21:49:19.814167 INFO : End of 2D read delay Voltage center optimization
395 21:49:19.866177 INFO : End of 2D write delay Voltage center optimization
396 21:49:19.915705 INFO : End of 2D write delay Voltage center optimization
397 21:49:19.921231 INFO : Training has run successfully!
398 21:49:19.921708
399 21:49:19.922120 channel==0
400 21:49:19.926769 RxClkDly_Margin_A0==88 ps 9
401 21:49:19.927226 TxDqDly_Margin_A0==98 ps 10
402 21:49:19.932465 RxClkDly_Margin_A1==88 ps 9
403 21:49:19.932930 TxDqDly_Margin_A1==98 ps 10
404 21:49:19.933346 TrainedVREFDQ_A0==74
405 21:49:19.937952 TrainedVREFDQ_A1==74
406 21:49:19.938429 VrefDac_Margin_A0==25
407 21:49:19.938836 DeviceVref_Margin_A0==40
408 21:49:19.943563 VrefDac_Margin_A1==25
409 21:49:19.944048 DeviceVref_Margin_A1==40
410 21:49:19.944464
411 21:49:19.944871
412 21:49:19.949226 channel==1
413 21:49:19.949692 RxClkDly_Margin_A0==98 ps 10
414 21:49:19.950102 TxDqDly_Margin_A0==88 ps 9
415 21:49:19.954744 RxClkDly_Margin_A1==88 ps 9
416 21:49:19.955214 TxDqDly_Margin_A1==88 ps 9
417 21:49:19.960451 TrainedVREFDQ_A0==77
418 21:49:19.960921 TrainedVREFDQ_A1==77
419 21:49:19.961336 VrefDac_Margin_A0==22
420 21:49:19.965970 DeviceVref_Margin_A0==37
421 21:49:19.966436 VrefDac_Margin_A1==24
422 21:49:19.971548 DeviceVref_Margin_A1==37
423 21:49:19.972043
424 21:49:19.972455 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 21:49:19.972860
426 21:49:20.005142 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 21:49:20.005809 2D training succeed
428 21:49:20.010784 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 21:49:20.016311 auto size-- 65535DDR cs0 size: 2048MB
430 21:49:20.016785 DDR cs1 size: 2048MB
431 21:49:20.021816 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 21:49:20.022282 cs0 DataBus test pass
433 21:49:20.027428 cs1 DataBus test pass
434 21:49:20.027903 cs0 AddrBus test pass
435 21:49:20.028359 cs1 AddrBus test pass
436 21:49:20.028763
437 21:49:20.033048 100bdlr_step_size ps== 420
438 21:49:20.033525 result report
439 21:49:20.038612 boot times 0Enable ddr reg access
440 21:49:20.043930 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 21:49:20.057326 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 21:49:20.631033 0.0;M3 CHK:0;cm4_sp_mode 0
443 21:49:20.631651 MVN_1=0x00000000
444 21:49:20.636458 MVN_2=0x00000000
445 21:49:20.642293 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 21:49:20.642753 OPS=0x10
447 21:49:20.643166 ring efuse init
448 21:49:20.643566 chipver efuse init
449 21:49:20.647818 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 21:49:20.653410 [0.018961 Inits done]
451 21:49:20.653861 secure task start!
452 21:49:20.654267 high task start!
453 21:49:20.657999 low task start!
454 21:49:20.658471 run into bl31
455 21:49:20.664680 NOTICE: BL31: v1.3(release):4fc40b1
456 21:49:20.672469 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 21:49:20.672959 NOTICE: BL31: G12A normal boot!
458 21:49:20.697872 NOTICE: BL31: BL33 decompress pass
459 21:49:20.703508 ERROR: Error initializing runtime service opteed_fast
460 21:49:21.936393
461 21:49:21.937029
462 21:49:21.944706 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 21:49:21.945172
464 21:49:21.945587 Model: Libre Computer AML-A311D-CC Alta
465 21:49:22.153143 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 21:49:22.176486 DRAM: 2 GiB (effective 3.8 GiB)
467 21:49:22.320928 Core: 408 devices, 31 uclasses, devicetree: separate
468 21:49:22.325331 WDT: Not starting watchdog@f0d0
469 21:49:22.357619 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 21:49:22.370019 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 21:49:22.375017 ** Bad device specification mmc 0 **
472 21:49:22.385405 Card did not respond to voltage select! : -110
473 21:49:22.393003 ** Bad device specification mmc 0 **
474 21:49:22.393462 Couldn't find partition mmc 0
475 21:49:22.401478 Card did not respond to voltage select! : -110
476 21:49:22.406873 ** Bad device specification mmc 0 **
477 21:49:22.407329 Couldn't find partition mmc 0
478 21:49:22.411931 Error: could not access storage.
479 21:49:23.675598 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 21:49:23.676253 bl2_stage_init 0x01
481 21:49:23.676684 bl2_stage_init 0x81
482 21:49:23.681127 hw id: 0x0000 - pwm id 0x01
483 21:49:23.681587 bl2_stage_init 0xc1
484 21:49:23.681997 bl2_stage_init 0x02
485 21:49:23.682399
486 21:49:23.686712 L0:00000000
487 21:49:23.687161 L1:20000703
488 21:49:23.687568 L2:00008067
489 21:49:23.687964 L3:14000000
490 21:49:23.692308 B2:00402000
491 21:49:23.692754 B1:e0f83180
492 21:49:23.693153
493 21:49:23.693548 TE: 58159
494 21:49:23.693943
495 21:49:23.697907 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 21:49:23.698356
497 21:49:23.698764 Board ID = 1
498 21:49:23.703497 Set A53 clk to 24M
499 21:49:23.703937 Set A73 clk to 24M
500 21:49:23.704377 Set clk81 to 24M
501 21:49:23.709157 A53 clk: 1200 MHz
502 21:49:23.709634 A73 clk: 1200 MHz
503 21:49:23.710043 CLK81: 166.6M
504 21:49:23.710445 smccc: 00012ab5
505 21:49:23.714703 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 21:49:23.720308 board id: 1
507 21:49:23.726173 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 21:49:23.736841 fw parse done
509 21:49:23.742834 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 21:49:23.785423 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 21:49:23.796347 PIEI prepare done
512 21:49:23.796799 fastboot data load
513 21:49:23.797206 fastboot data verify
514 21:49:23.802038 verify result: 266
515 21:49:23.807702 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 21:49:23.808223 LPDDR4 probe
517 21:49:23.808633 ddr clk to 1584MHz
518 21:49:23.815563 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 21:49:23.852891
520 21:49:23.853353 dmc_version 0001
521 21:49:23.859511 Check phy result
522 21:49:23.865378 INFO : End of CA training
523 21:49:23.865818 INFO : End of initialization
524 21:49:23.870975 INFO : Training has run successfully!
525 21:49:23.871419 Check phy result
526 21:49:23.876592 INFO : End of initialization
527 21:49:23.877029 INFO : End of read enable training
528 21:49:23.882178 INFO : End of fine write leveling
529 21:49:23.887795 INFO : End of Write leveling coarse delay
530 21:49:23.888266 INFO : Training has run successfully!
531 21:49:23.888673 Check phy result
532 21:49:23.893377 INFO : End of initialization
533 21:49:23.893812 INFO : End of read dq deskew training
534 21:49:23.898959 INFO : End of MPR read delay center optimization
535 21:49:23.904574 INFO : End of write delay center optimization
536 21:49:23.910228 INFO : End of read delay center optimization
537 21:49:23.910697 INFO : End of max read latency training
538 21:49:23.915792 INFO : Training has run successfully!
539 21:49:23.916281 1D training succeed
540 21:49:23.924953 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 21:49:23.972539 Check phy result
542 21:49:23.972999 INFO : End of initialization
543 21:49:23.994140 INFO : End of 2D read delay Voltage center optimization
544 21:49:24.013531 INFO : End of 2D read delay Voltage center optimization
545 21:49:24.065338 INFO : End of 2D write delay Voltage center optimization
546 21:49:24.114621 INFO : End of 2D write delay Voltage center optimization
547 21:49:24.120155 INFO : Training has run successfully!
548 21:49:24.120605
549 21:49:24.121015 channel==0
550 21:49:24.125723 RxClkDly_Margin_A0==88 ps 9
551 21:49:24.126181 TxDqDly_Margin_A0==108 ps 11
552 21:49:24.131327 RxClkDly_Margin_A1==88 ps 9
553 21:49:24.131771 TxDqDly_Margin_A1==98 ps 10
554 21:49:24.132230 TrainedVREFDQ_A0==74
555 21:49:24.136921 TrainedVREFDQ_A1==74
556 21:49:24.137368 VrefDac_Margin_A0==25
557 21:49:24.142520 DeviceVref_Margin_A0==40
558 21:49:24.142981 VrefDac_Margin_A1==25
559 21:49:24.143383 DeviceVref_Margin_A1==40
560 21:49:24.143776
561 21:49:24.144206
562 21:49:24.148137 channel==1
563 21:49:24.148580 RxClkDly_Margin_A0==98 ps 10
564 21:49:24.148979 TxDqDly_Margin_A0==98 ps 10
565 21:49:24.153691 RxClkDly_Margin_A1==98 ps 10
566 21:49:24.154133 TxDqDly_Margin_A1==88 ps 9
567 21:49:24.159318 TrainedVREFDQ_A0==77
568 21:49:24.159757 TrainedVREFDQ_A1==77
569 21:49:24.160193 VrefDac_Margin_A0==23
570 21:49:24.165021 DeviceVref_Margin_A0==37
571 21:49:24.165492 VrefDac_Margin_A1==24
572 21:49:24.170586 DeviceVref_Margin_A1==37
573 21:49:24.171050
574 21:49:24.171456 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 21:49:24.176217
576 21:49:24.204126 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 21:49:24.204673 2D training succeed
578 21:49:24.209829 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 21:49:24.215383 auto size-- 65535DDR cs0 size: 2048MB
580 21:49:24.215853 DDR cs1 size: 2048MB
581 21:49:24.220981 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 21:49:24.221443 cs0 DataBus test pass
583 21:49:24.226560 cs1 DataBus test pass
584 21:49:24.227023 cs0 AddrBus test pass
585 21:49:24.227427 cs1 AddrBus test pass
586 21:49:24.227823
587 21:49:24.232216 100bdlr_step_size ps== 420
588 21:49:24.232696 result report
589 21:49:24.237785 boot times 0Enable ddr reg access
590 21:49:24.243284 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 21:49:24.256715 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 21:49:24.828751 0.0;M3 CHK:0;cm4_sp_mode 0
593 21:49:24.829363 MVN_1=0x00000000
594 21:49:24.834236 MVN_2=0x00000000
595 21:49:24.840021 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 21:49:24.840503 OPS=0x10
597 21:49:24.840900 ring efuse init
598 21:49:24.841300 chipver efuse init
599 21:49:24.845560 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 21:49:24.851141 [0.018961 Inits done]
601 21:49:24.851592 secure task start!
602 21:49:24.852011 high task start!
603 21:49:24.855709 low task start!
604 21:49:24.856179 run into bl31
605 21:49:24.862379 NOTICE: BL31: v1.3(release):4fc40b1
606 21:49:24.870193 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 21:49:24.870643 NOTICE: BL31: G12A normal boot!
608 21:49:24.895578 NOTICE: BL31: BL33 decompress pass
609 21:49:24.901260 ERROR: Error initializing runtime service opteed_fast
610 21:49:26.134415
611 21:49:26.134811
612 21:49:26.142675 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 21:49:26.142975
614 21:49:26.143203 Model: Libre Computer AML-A311D-CC Alta
615 21:49:26.351142 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 21:49:26.374564 DRAM: 2 GiB (effective 3.8 GiB)
617 21:49:26.517554 Core: 408 devices, 31 uclasses, devicetree: separate
618 21:49:26.523409 WDT: Not starting watchdog@f0d0
619 21:49:26.555658 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 21:49:26.568183 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 21:49:26.573163 ** Bad device specification mmc 0 **
622 21:49:26.583548 Card did not respond to voltage select! : -110
623 21:49:26.591156 ** Bad device specification mmc 0 **
624 21:49:26.591613 Couldn't find partition mmc 0
625 21:49:26.599410 Card did not respond to voltage select! : -110
626 21:49:26.604940 ** Bad device specification mmc 0 **
627 21:49:26.605394 Couldn't find partition mmc 0
628 21:49:26.610035 Error: could not access storage.
629 21:49:26.953733 Net: eth0: ethernet@ff3f0000
630 21:49:26.954166 starting USB...
631 21:49:27.206260 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 21:49:27.206881 Starting the controller
633 21:49:27.212369 USB XHCI 1.10
634 21:49:28.924804 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 21:49:28.925447 bl2_stage_init 0x01
636 21:49:28.925876 bl2_stage_init 0x81
637 21:49:28.930445 hw id: 0x0000 - pwm id 0x01
638 21:49:28.930941 bl2_stage_init 0xc1
639 21:49:28.931358 bl2_stage_init 0x02
640 21:49:28.931767
641 21:49:28.935865 L0:00000000
642 21:49:28.936397 L1:20000703
643 21:49:28.936854 L2:00008067
644 21:49:28.937302 L3:14000000
645 21:49:28.938913 B2:00402000
646 21:49:28.939416 B1:e0f83180
647 21:49:28.939826
648 21:49:28.940280 TE: 58159
649 21:49:28.940703
650 21:49:28.950071 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 21:49:28.950674
652 21:49:28.951104 Board ID = 1
653 21:49:28.951507 Set A53 clk to 24M
654 21:49:28.951906 Set A73 clk to 24M
655 21:49:28.955664 Set clk81 to 24M
656 21:49:28.956197 A53 clk: 1200 MHz
657 21:49:28.956613 A73 clk: 1200 MHz
658 21:49:28.959334 CLK81: 166.6M
659 21:49:28.959817 smccc: 00012ab5
660 21:49:28.964751 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 21:49:28.970329 board id: 1
662 21:49:28.975247 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 21:49:28.985925 fw parse done
664 21:49:28.991919 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 21:49:29.034536 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 21:49:29.045414 PIEI prepare done
667 21:49:29.045934 fastboot data load
668 21:49:29.046353 fastboot data verify
669 21:49:29.051042 verify result: 266
670 21:49:29.056654 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 21:49:29.057160 LPDDR4 probe
672 21:49:29.057581 ddr clk to 1584MHz
673 21:49:29.064644 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 21:49:29.101863
675 21:49:29.102413 dmc_version 0001
676 21:49:29.108549 Check phy result
677 21:49:29.114400 INFO : End of CA training
678 21:49:29.114892 INFO : End of initialization
679 21:49:29.119969 INFO : Training has run successfully!
680 21:49:29.120497 Check phy result
681 21:49:29.125661 INFO : End of initialization
682 21:49:29.126155 INFO : End of read enable training
683 21:49:29.128922 INFO : End of fine write leveling
684 21:49:29.134499 INFO : End of Write leveling coarse delay
685 21:49:29.140127 INFO : Training has run successfully!
686 21:49:29.140632 Check phy result
687 21:49:29.141041 INFO : End of initialization
688 21:49:29.145789 INFO : End of read dq deskew training
689 21:49:29.149070 INFO : End of MPR read delay center optimization
690 21:49:29.154665 INFO : End of write delay center optimization
691 21:49:29.160254 INFO : End of read delay center optimization
692 21:49:29.160773 INFO : End of max read latency training
693 21:49:29.165827 INFO : Training has run successfully!
694 21:49:29.166318 1D training succeed
695 21:49:29.173961 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 21:49:29.221569 Check phy result
697 21:49:29.222105 INFO : End of initialization
698 21:49:29.244248 INFO : End of 2D read delay Voltage center optimization
699 21:49:29.264478 INFO : End of 2D read delay Voltage center optimization
700 21:49:29.316570 INFO : End of 2D write delay Voltage center optimization
701 21:49:29.365898 INFO : End of 2D write delay Voltage center optimization
702 21:49:29.371532 INFO : Training has run successfully!
703 21:49:29.372080
704 21:49:29.372502 channel==0
705 21:49:29.377150 RxClkDly_Margin_A0==88 ps 9
706 21:49:29.377658 TxDqDly_Margin_A0==98 ps 10
707 21:49:29.380522 RxClkDly_Margin_A1==88 ps 9
708 21:49:29.381024 TxDqDly_Margin_A1==98 ps 10
709 21:49:29.386057 TrainedVREFDQ_A0==74
710 21:49:29.386586 TrainedVREFDQ_A1==75
711 21:49:29.387006 VrefDac_Margin_A0==25
712 21:49:29.391619 DeviceVref_Margin_A0==40
713 21:49:29.392155 VrefDac_Margin_A1==25
714 21:49:29.397166 DeviceVref_Margin_A1==39
715 21:49:29.397673
716 21:49:29.398089
717 21:49:29.398488 channel==1
718 21:49:29.398890 RxClkDly_Margin_A0==98 ps 10
719 21:49:29.402846 TxDqDly_Margin_A0==88 ps 9
720 21:49:29.403350 RxClkDly_Margin_A1==88 ps 9
721 21:49:29.408427 TxDqDly_Margin_A1==88 ps 9
722 21:49:29.408937 TrainedVREFDQ_A0==77
723 21:49:29.409355 TrainedVREFDQ_A1==77
724 21:49:29.413981 VrefDac_Margin_A0==22
725 21:49:29.414491 DeviceVref_Margin_A0==37
726 21:49:29.419645 VrefDac_Margin_A1==24
727 21:49:29.420176 DeviceVref_Margin_A1==37
728 21:49:29.420589
729 21:49:29.425151 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 21:49:29.425641
731 21:49:29.453157 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 21:49:29.458842 2D training succeed
733 21:49:29.464298 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 21:49:29.464788 auto size-- 65535DDR cs0 size: 2048MB
735 21:49:29.469900 DDR cs1 size: 2048MB
736 21:49:29.470391 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 21:49:29.475526 cs0 DataBus test pass
738 21:49:29.476048 cs1 DataBus test pass
739 21:49:29.476465 cs0 AddrBus test pass
740 21:49:29.481111 cs1 AddrBus test pass
741 21:49:29.481589
742 21:49:29.482003 100bdlr_step_size ps== 420
743 21:49:29.482415 result report
744 21:49:29.486699 boot times 0Enable ddr reg access
745 21:49:29.494237 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 21:49:29.507673 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 21:49:30.080740 0.0;M3 CHK:0;cm4_sp_mode 0
748 21:49:30.081347 MVN_1=0x00000000
749 21:49:30.086240 MVN_2=0x00000000
750 21:49:30.092044 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 21:49:30.092591 OPS=0x10
752 21:49:30.093020 ring efuse init
753 21:49:30.093411 chipver efuse init
754 21:49:30.097664 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 21:49:30.103147 [0.018961 Inits done]
756 21:49:30.103613 secure task start!
757 21:49:30.104045 high task start!
758 21:49:30.107735 low task start!
759 21:49:30.108217 run into bl31
760 21:49:30.114351 NOTICE: BL31: v1.3(release):4fc40b1
761 21:49:30.122179 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 21:49:30.122654 NOTICE: BL31: G12A normal boot!
763 21:49:30.147626 NOTICE: BL31: BL33 decompress pass
764 21:49:30.153191 ERROR: Error initializing runtime service opteed_fast
765 21:49:31.386052
766 21:49:31.386687
767 21:49:31.394515 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 21:49:31.395020
769 21:49:31.395444 Model: Libre Computer AML-A311D-CC Alta
770 21:49:31.602915 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 21:49:31.626259 DRAM: 2 GiB (effective 3.8 GiB)
772 21:49:31.769295 Core: 408 devices, 31 uclasses, devicetree: separate
773 21:49:31.775175 WDT: Not starting watchdog@f0d0
774 21:49:31.807475 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 21:49:31.819824 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 21:49:31.824897 ** Bad device specification mmc 0 **
777 21:49:31.835122 Card did not respond to voltage select! : -110
778 21:49:31.842792 ** Bad device specification mmc 0 **
779 21:49:31.843228 Couldn't find partition mmc 0
780 21:49:31.851215 Card did not respond to voltage select! : -110
781 21:49:31.856789 ** Bad device specification mmc 0 **
782 21:49:31.857350 Couldn't find partition mmc 0
783 21:49:31.862148 Error: could not access storage.
784 21:49:32.205491 Net: eth0: ethernet@ff3f0000
785 21:49:32.206119 starting USB...
786 21:49:32.457022 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 21:49:32.457442 Starting the controller
788 21:49:32.464067 USB XHCI 1.10
789 21:49:34.624509 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 21:49:34.625140 bl2_stage_init 0x01
791 21:49:34.625570 bl2_stage_init 0x81
792 21:49:34.630092 hw id: 0x0000 - pwm id 0x01
793 21:49:34.630590 bl2_stage_init 0xc1
794 21:49:34.631019 bl2_stage_init 0x02
795 21:49:34.631435
796 21:49:34.635662 L0:00000000
797 21:49:34.636213 L1:20000703
798 21:49:34.636635 L2:00008067
799 21:49:34.637045 L3:14000000
800 21:49:34.638718 B2:00402000
801 21:49:34.639177 B1:e0f83180
802 21:49:34.639589
803 21:49:34.640027 TE: 58159
804 21:49:34.640435
805 21:49:34.649885 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 21:49:34.650435
807 21:49:34.650859 Board ID = 1
808 21:49:34.651291 Set A53 clk to 24M
809 21:49:34.651724 Set A73 clk to 24M
810 21:49:34.655557 Set clk81 to 24M
811 21:49:34.656090 A53 clk: 1200 MHz
812 21:49:34.656555 A73 clk: 1200 MHz
813 21:49:34.661012 CLK81: 166.6M
814 21:49:34.661347 smccc: 00012ab5
815 21:49:34.666572 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 21:49:34.667013 board id: 1
817 21:49:34.675142 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 21:49:34.685740 fw parse done
819 21:49:34.691925 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 21:49:34.734347 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 21:49:34.745213 PIEI prepare done
822 21:49:34.745745 fastboot data load
823 21:49:34.746037 fastboot data verify
824 21:49:34.750818 verify result: 266
825 21:49:34.756368 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 21:49:34.756721 LPDDR4 probe
827 21:49:34.756955 ddr clk to 1584MHz
828 21:49:34.764382 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 21:49:34.801670
830 21:49:34.802090 dmc_version 0001
831 21:49:34.808397 Check phy result
832 21:49:34.814175 INFO : End of CA training
833 21:49:34.814535 INFO : End of initialization
834 21:49:34.819783 INFO : Training has run successfully!
835 21:49:34.820874 Check phy result
836 21:49:34.825413 INFO : End of initialization
837 21:49:34.826091 INFO : End of read enable training
838 21:49:34.830966 INFO : End of fine write leveling
839 21:49:34.836546 INFO : End of Write leveling coarse delay
840 21:49:34.837189 INFO : Training has run successfully!
841 21:49:34.837746 Check phy result
842 21:49:34.842249 INFO : End of initialization
843 21:49:34.842928 INFO : End of read dq deskew training
844 21:49:34.847788 INFO : End of MPR read delay center optimization
845 21:49:34.853381 INFO : End of write delay center optimization
846 21:49:34.858971 INFO : End of read delay center optimization
847 21:49:34.859579 INFO : End of max read latency training
848 21:49:34.864552 INFO : Training has run successfully!
849 21:49:34.865170 1D training succeed
850 21:49:34.873778 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 21:49:34.921461 Check phy result
852 21:49:34.922138 INFO : End of initialization
853 21:49:34.943136 INFO : End of 2D read delay Voltage center optimization
854 21:49:34.962449 INFO : End of 2D read delay Voltage center optimization
855 21:49:35.015493 INFO : End of 2D write delay Voltage center optimization
856 21:49:35.064866 INFO : End of 2D write delay Voltage center optimization
857 21:49:35.070337 INFO : Training has run successfully!
858 21:49:35.070956
859 21:49:35.071436 channel==0
860 21:49:35.075883 RxClkDly_Margin_A0==88 ps 9
861 21:49:35.076394 TxDqDly_Margin_A0==98 ps 10
862 21:49:35.079190 RxClkDly_Margin_A1==88 ps 9
863 21:49:35.079529 TxDqDly_Margin_A1==98 ps 10
864 21:49:35.084844 TrainedVREFDQ_A0==74
865 21:49:35.085342 TrainedVREFDQ_A1==74
866 21:49:35.090402 VrefDac_Margin_A0==25
867 21:49:35.090943 DeviceVref_Margin_A0==40
868 21:49:35.091352 VrefDac_Margin_A1==26
869 21:49:35.096163 DeviceVref_Margin_A1==40
870 21:49:35.096711
871 21:49:35.097112
872 21:49:35.097497 channel==1
873 21:49:35.097884 RxClkDly_Margin_A0==98 ps 10
874 21:49:35.101528 TxDqDly_Margin_A0==98 ps 10
875 21:49:35.101996 RxClkDly_Margin_A1==98 ps 10
876 21:49:35.107234 TxDqDly_Margin_A1==88 ps 9
877 21:49:35.107883 TrainedVREFDQ_A0==77
878 21:49:35.108375 TrainedVREFDQ_A1==77
879 21:49:35.112739 VrefDac_Margin_A0==22
880 21:49:35.113089 DeviceVref_Margin_A0==37
881 21:49:35.118403 VrefDac_Margin_A1==24
882 21:49:35.118758 DeviceVref_Margin_A1==37
883 21:49:35.119014
884 21:49:35.123935 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 21:49:35.124494
886 21:49:35.152017 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 21:49:35.157599 2D training succeed
888 21:49:35.163300 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 21:49:35.164013 auto size-- 65535DDR cs0 size: 2048MB
890 21:49:35.168828 DDR cs1 size: 2048MB
891 21:49:35.169549 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 21:49:35.174406 cs0 DataBus test pass
893 21:49:35.174796 cs1 DataBus test pass
894 21:49:35.175050 cs0 AddrBus test pass
895 21:49:35.180068 cs1 AddrBus test pass
896 21:49:35.180605
897 21:49:35.181013 100bdlr_step_size ps== 420
898 21:49:35.181413 result report
899 21:49:35.185636 boot times 0Enable ddr reg access
900 21:49:35.193498 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 21:49:35.205863 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 21:49:35.780599 0.0;M3 CHK:0;cm4_sp_mode 0
903 21:49:35.781102 MVN_1=0x00000000
904 21:49:35.785942 MVN_2=0x00000000
905 21:49:35.791704 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 21:49:35.792246 OPS=0x10
907 21:49:35.792681 ring efuse init
908 21:49:35.793091 chipver efuse init
909 21:49:35.797380 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 21:49:35.803070 [0.018961 Inits done]
911 21:49:35.803842 secure task start!
912 21:49:35.804469 high task start!
913 21:49:35.807614 low task start!
914 21:49:35.808362 run into bl31
915 21:49:35.814278 NOTICE: BL31: v1.3(release):4fc40b1
916 21:49:35.822040 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 21:49:35.822407 NOTICE: BL31: G12A normal boot!
918 21:49:35.847545 NOTICE: BL31: BL33 decompress pass
919 21:49:35.853069 ERROR: Error initializing runtime service opteed_fast
920 21:49:37.086177
921 21:49:37.086909
922 21:49:37.094510 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 21:49:37.095208
924 21:49:37.095697 Model: Libre Computer AML-A311D-CC Alta
925 21:49:37.303428 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 21:49:37.326346 DRAM: 2 GiB (effective 3.8 GiB)
927 21:49:37.469334 Core: 408 devices, 31 uclasses, devicetree: separate
928 21:49:37.475183 WDT: Not starting watchdog@f0d0
929 21:49:37.507542 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 21:49:37.519890 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 21:49:37.524853 ** Bad device specification mmc 0 **
932 21:49:37.535184 Card did not respond to voltage select! : -110
933 21:49:37.542855 ** Bad device specification mmc 0 **
934 21:49:37.543409 Couldn't find partition mmc 0
935 21:49:37.551158 Card did not respond to voltage select! : -110
936 21:49:37.556710 ** Bad device specification mmc 0 **
937 21:49:37.557218 Couldn't find partition mmc 0
938 21:49:37.561752 Error: could not access storage.
939 21:49:37.904242 Net: eth0: ethernet@ff3f0000
940 21:49:37.904819 starting USB...
941 21:49:38.156138 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 21:49:38.156661 Starting the controller
943 21:49:38.162986 USB XHCI 1.10
944 21:49:39.717019 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 21:49:39.725300 scanning usb for storage devices... 0 Storage Device(s) found
947 21:49:39.776867 Hit any key to stop autoboot: 1
948 21:49:39.777729 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 21:49:39.778085 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 21:49:39.778337 Setting prompt string to ['=>']
951 21:49:39.778592 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 21:49:39.792820 0
953 21:49:39.793549 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 21:49:39.793876 Sending with 10 millisecond of delay
956 21:49:40.928387 => setenv autoload no
957 21:49:40.939198 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 21:49:40.944112 setenv autoload no
959 21:49:40.944847 Sending with 10 millisecond of delay
961 21:49:42.743942 => setenv initrd_high 0xffffffff
962 21:49:42.754785 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 21:49:42.755505 setenv initrd_high 0xffffffff
964 21:49:42.756310 Sending with 10 millisecond of delay
966 21:49:44.374677 => setenv fdt_high 0xffffffff
967 21:49:44.385302 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 21:49:44.385998 setenv fdt_high 0xffffffff
969 21:49:44.386531 Sending with 10 millisecond of delay
971 21:49:44.678196 => dhcp
972 21:49:44.689063 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 21:49:44.690040 dhcp
974 21:49:44.690562 Speed: 1000, full duplex
975 21:49:44.691029 BOOTP broadcast 1
976 21:49:44.937939 BOOTP broadcast 2
977 21:49:44.951487 DHCP client bound to address 192.168.6.33 (262 ms)
978 21:49:44.952370 Sending with 10 millisecond of delay
980 21:49:46.629459 => setenv serverip 192.168.6.2
981 21:49:46.640050 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
982 21:49:46.640572 setenv serverip 192.168.6.2
983 21:49:46.641016 Sending with 10 millisecond of delay
985 21:49:50.370199 => tftpboot 0x01080000 699423/tftp-deploy-aakhrd8z/kernel/uImage
986 21:49:50.381567 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
987 21:49:50.382173 tftpboot 0x01080000 699423/tftp-deploy-aakhrd8z/kernel/uImage
988 21:49:50.382442 Speed: 1000, full duplex
989 21:49:50.382669 Using ethernet@ff3f0000 device
990 21:49:50.383768 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
991 21:49:50.389618 Filename '699423/tftp-deploy-aakhrd8z/kernel/uImage'.
992 21:49:50.393416 Load address: 0x1080000
993 21:49:54.734719 Loading: *###################
994 21:49:54.735155 TFTP error: trying to overwrite reserved memory...
996 21:49:54.736119 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
999 21:49:54.737316 end: 2.4 uboot-commands (duration 00:00:47) [common]
1001 21:49:54.738146 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1003 21:49:54.738790 end: 2 uboot-action (duration 00:00:47) [common]
1005 21:49:54.739960 Cleaning after the job
1006 21:49:54.740344 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/ramdisk
1007 21:49:54.755018 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/kernel
1008 21:49:54.761701 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/dtb
1009 21:49:54.762517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/nfsrootfs
1010 21:49:54.786127 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699423/tftp-deploy-aakhrd8z/modules
1011 21:49:54.797588 start: 4.1 power-off (timeout 00:00:30) [common]
1012 21:49:54.798229 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1013 21:49:54.830515 >> OK - accepted request
1014 21:49:54.832410 Returned 0 in 0 seconds
1015 21:49:54.933196 end: 4.1 power-off (duration 00:00:00) [common]
1017 21:49:54.934187 start: 4.2 read-feedback (timeout 00:10:00) [common]
1018 21:49:54.934823 Listened to connection for namespace 'common' for up to 1s
1019 21:49:55.935272 Finalising connection for namespace 'common'
1020 21:49:55.935775 Disconnecting from shell: Finalise
1021 21:49:55.936277 =>
1022 21:49:56.037014 end: 4.2 read-feedback (duration 00:00:01) [common]
1023 21:49:56.037495 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/699423
1024 21:49:58.083780 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/699423
1025 21:49:58.084476 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.