Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:23:46.741389 lava-dispatcher, installed at version: 2024.01
2 21:23:46.742203 start: 0 validate
3 21:23:46.742669 Start time: 2024-09-03 21:23:46.742639+00:00 (UTC)
4 21:23:46.743227 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:23:46.743770 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:23:46.782555 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:23:46.783129 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-26-g88fac17500f4%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 21:23:46.812114 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:23:46.812740 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-26-g88fac17500f4%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:23:46.842092 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:23:46.842560 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:23:46.873340 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:23:46.873834 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-26-g88fac17500f4%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 21:23:46.908834 validate duration: 0.17
16 21:23:46.909695 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:23:46.910043 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:23:46.910356 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:23:46.911063 Not decompressing ramdisk as can be used compressed.
20 21:23:46.911564 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 21:23:46.911849 saving as /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/ramdisk/initrd.cpio.gz
22 21:23:46.912153 total size: 5628182 (5 MB)
23 21:23:46.947012 progress 0 % (0 MB)
24 21:23:46.952174 progress 5 % (0 MB)
25 21:23:46.957275 progress 10 % (0 MB)
26 21:23:46.961997 progress 15 % (0 MB)
27 21:23:46.966906 progress 20 % (1 MB)
28 21:23:46.971355 progress 25 % (1 MB)
29 21:23:46.976327 progress 30 % (1 MB)
30 21:23:46.981191 progress 35 % (1 MB)
31 21:23:46.985610 progress 40 % (2 MB)
32 21:23:46.990576 progress 45 % (2 MB)
33 21:23:46.994923 progress 50 % (2 MB)
34 21:23:46.999860 progress 55 % (2 MB)
35 21:23:47.004809 progress 60 % (3 MB)
36 21:23:47.009149 progress 65 % (3 MB)
37 21:23:47.014064 progress 70 % (3 MB)
38 21:23:47.018485 progress 75 % (4 MB)
39 21:23:47.023286 progress 80 % (4 MB)
40 21:23:47.027639 progress 85 % (4 MB)
41 21:23:47.032634 progress 90 % (4 MB)
42 21:23:47.037299 progress 95 % (5 MB)
43 21:23:47.041237 progress 100 % (5 MB)
44 21:23:47.042010 5 MB downloaded in 0.13 s (41.34 MB/s)
45 21:23:47.042677 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:23:47.043752 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:23:47.044166 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:23:47.044516 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:23:47.045081 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-26-g88fac17500f4/arm64/defconfig+debug/gcc-12/kernel/Image
51 21:23:47.045376 saving as /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/kernel/Image
52 21:23:47.045635 total size: 167969280 (160 MB)
53 21:23:47.045889 No compression specified
54 21:23:47.080601 progress 0 % (0 MB)
55 21:23:47.202917 progress 5 % (8 MB)
56 21:23:47.324458 progress 10 % (16 MB)
57 21:23:47.445240 progress 15 % (24 MB)
58 21:23:47.566439 progress 20 % (32 MB)
59 21:23:47.686193 progress 25 % (40 MB)
60 21:23:47.805821 progress 30 % (48 MB)
61 21:23:47.925996 progress 35 % (56 MB)
62 21:23:48.045565 progress 40 % (64 MB)
63 21:23:48.166499 progress 45 % (72 MB)
64 21:23:48.287626 progress 50 % (80 MB)
65 21:23:48.408319 progress 55 % (88 MB)
66 21:23:48.529719 progress 60 % (96 MB)
67 21:23:48.652308 progress 65 % (104 MB)
68 21:23:48.773298 progress 70 % (112 MB)
69 21:23:48.893754 progress 75 % (120 MB)
70 21:23:49.015051 progress 80 % (128 MB)
71 21:23:49.137040 progress 85 % (136 MB)
72 21:23:49.259170 progress 90 % (144 MB)
73 21:23:49.380853 progress 95 % (152 MB)
74 21:23:49.501281 progress 100 % (160 MB)
75 21:23:49.501942 160 MB downloaded in 2.46 s (65.22 MB/s)
76 21:23:49.502515 end: 1.2.1 http-download (duration 00:00:02) [common]
78 21:23:49.503521 end: 1.2 download-retry (duration 00:00:02) [common]
79 21:23:49.503859 start: 1.3 download-retry (timeout 00:09:57) [common]
80 21:23:49.504231 start: 1.3.1 http-download (timeout 00:09:57) [common]
81 21:23:49.504781 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-26-g88fac17500f4/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 21:23:49.505102 saving as /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 21:23:49.505355 total size: 53173 (0 MB)
84 21:23:49.505608 No compression specified
85 21:23:49.544800 progress 61 % (0 MB)
86 21:23:49.545778 progress 100 % (0 MB)
87 21:23:49.546409 0 MB downloaded in 0.04 s (1.24 MB/s)
88 21:23:49.546964 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:23:49.547952 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:23:49.548315 start: 1.4 download-retry (timeout 00:09:57) [common]
92 21:23:49.548639 start: 1.4.1 http-download (timeout 00:09:57) [common]
93 21:23:49.549182 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 21:23:49.549473 saving as /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/nfsrootfs/full.rootfs.tar
95 21:23:49.549722 total size: 107552908 (102 MB)
96 21:23:49.549975 Using unxz to decompress xz
97 21:23:49.585997 progress 0 % (0 MB)
98 21:23:50.231321 progress 5 % (5 MB)
99 21:23:50.960153 progress 10 % (10 MB)
100 21:23:51.686513 progress 15 % (15 MB)
101 21:23:52.448672 progress 20 % (20 MB)
102 21:23:53.019549 progress 25 % (25 MB)
103 21:23:53.644787 progress 30 % (30 MB)
104 21:23:54.386712 progress 35 % (35 MB)
105 21:23:54.740796 progress 40 % (41 MB)
106 21:23:55.166297 progress 45 % (46 MB)
107 21:23:55.865395 progress 50 % (51 MB)
108 21:23:56.557326 progress 55 % (56 MB)
109 21:23:57.314476 progress 60 % (61 MB)
110 21:23:58.071755 progress 65 % (66 MB)
111 21:23:58.811194 progress 70 % (71 MB)
112 21:23:59.577427 progress 75 % (76 MB)
113 21:24:00.254616 progress 80 % (82 MB)
114 21:24:00.957808 progress 85 % (87 MB)
115 21:24:01.690894 progress 90 % (92 MB)
116 21:24:02.406600 progress 95 % (97 MB)
117 21:24:03.151899 progress 100 % (102 MB)
118 21:24:03.165065 102 MB downloaded in 13.62 s (7.53 MB/s)
119 21:24:03.165664 end: 1.4.1 http-download (duration 00:00:14) [common]
121 21:24:03.166546 end: 1.4 download-retry (duration 00:00:14) [common]
122 21:24:03.166823 start: 1.5 download-retry (timeout 00:09:44) [common]
123 21:24:03.167086 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 21:24:03.167831 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-26-g88fac17500f4/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 21:24:03.168351 saving as /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/modules/modules.tar
126 21:24:03.168758 total size: 27444600 (26 MB)
127 21:24:03.169173 Using unxz to decompress xz
128 21:24:03.210186 progress 0 % (0 MB)
129 21:24:03.391294 progress 5 % (1 MB)
130 21:24:03.594993 progress 10 % (2 MB)
131 21:24:03.806432 progress 15 % (3 MB)
132 21:24:04.021269 progress 20 % (5 MB)
133 21:24:04.223638 progress 25 % (6 MB)
134 21:24:04.428950 progress 30 % (7 MB)
135 21:24:04.617623 progress 35 % (9 MB)
136 21:24:04.831355 progress 40 % (10 MB)
137 21:24:05.025744 progress 45 % (11 MB)
138 21:24:05.225854 progress 50 % (13 MB)
139 21:24:05.431690 progress 55 % (14 MB)
140 21:24:05.636823 progress 60 % (15 MB)
141 21:24:05.836195 progress 65 % (17 MB)
142 21:24:06.050575 progress 70 % (18 MB)
143 21:24:06.250241 progress 75 % (19 MB)
144 21:24:06.492339 progress 80 % (20 MB)
145 21:24:06.685475 progress 85 % (22 MB)
146 21:24:06.898853 progress 90 % (23 MB)
147 21:24:07.091467 progress 95 % (24 MB)
148 21:24:07.288034 progress 100 % (26 MB)
149 21:24:07.301815 26 MB downloaded in 4.13 s (6.33 MB/s)
150 21:24:07.302735 end: 1.5.1 http-download (duration 00:00:04) [common]
152 21:24:07.304521 end: 1.5 download-retry (duration 00:00:04) [common]
153 21:24:07.305094 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 21:24:07.305664 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 21:24:17.049400 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/699434/extract-nfsrootfs-13mvqu_8
156 21:24:17.050007 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 21:24:17.050300 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 21:24:17.050910 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b
159 21:24:17.051338 makedir: /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin
160 21:24:17.051667 makedir: /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/tests
161 21:24:17.052007 makedir: /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/results
162 21:24:17.052356 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-add-keys
163 21:24:17.052887 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-add-sources
164 21:24:17.053417 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-background-process-start
165 21:24:17.053920 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-background-process-stop
166 21:24:17.054441 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-common-functions
167 21:24:17.054931 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-echo-ipv4
168 21:24:17.055408 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-install-packages
169 21:24:17.055892 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-installed-packages
170 21:24:17.056402 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-os-build
171 21:24:17.056881 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-probe-channel
172 21:24:17.057368 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-probe-ip
173 21:24:17.057873 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-target-ip
174 21:24:17.058349 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-target-mac
175 21:24:17.058818 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-target-storage
176 21:24:17.059298 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-case
177 21:24:17.059775 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-event
178 21:24:17.060267 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-feedback
179 21:24:17.060756 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-raise
180 21:24:17.061249 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-reference
181 21:24:17.061733 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-runner
182 21:24:17.062207 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-set
183 21:24:17.062677 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-test-shell
184 21:24:17.063157 Updating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-install-packages (oe)
185 21:24:17.063675 Updating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/bin/lava-installed-packages (oe)
186 21:24:17.064193 Creating /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/environment
187 21:24:17.064575 LAVA metadata
188 21:24:17.064833 - LAVA_JOB_ID=699434
189 21:24:17.065054 - LAVA_DISPATCHER_IP=192.168.6.2
190 21:24:17.065407 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 21:24:17.066335 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 21:24:17.066643 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 21:24:17.066855 skipped lava-vland-overlay
194 21:24:17.067100 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 21:24:17.067359 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 21:24:17.067581 skipped lava-multinode-overlay
197 21:24:17.067829 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 21:24:17.068233 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 21:24:17.068501 Loading test definitions
200 21:24:17.068785 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 21:24:17.069012 Using /lava-699434 at stage 0
202 21:24:17.070207 uuid=699434_1.6.2.4.1 testdef=None
203 21:24:17.070519 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 21:24:17.070786 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 21:24:17.072743 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 21:24:17.073546 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 21:24:17.075822 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 21:24:17.076694 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 21:24:17.078848 runner path: /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/0/tests/0_dmesg test_uuid 699434_1.6.2.4.1
212 21:24:17.079389 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 21:24:17.080177 Creating lava-test-runner.conf files
215 21:24:17.080384 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/699434/lava-overlay-dosg3q3b/lava-699434/0 for stage 0
216 21:24:17.080729 - 0_dmesg
217 21:24:17.081067 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 21:24:17.081343 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 21:24:17.102494 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 21:24:17.102856 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 21:24:17.103122 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 21:24:17.103395 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 21:24:17.103662 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 21:24:17.727142 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 21:24:17.727590 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 21:24:17.727841 extracting modules file /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/modules/modules.tar to /var/lib/lava/dispatcher/tmp/699434/extract-nfsrootfs-13mvqu_8
227 21:24:19.408572 extracting modules file /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/modules/modules.tar to /var/lib/lava/dispatcher/tmp/699434/extract-overlay-ramdisk-_u3f_wq4/ramdisk
228 21:24:21.116787 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 21:24:21.117240 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 21:24:21.117519 [common] Applying overlay to NFS
231 21:24:21.117733 [common] Applying overlay /var/lib/lava/dispatcher/tmp/699434/compress-overlay-dxlwtcus/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/699434/extract-nfsrootfs-13mvqu_8
232 21:24:21.146818 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 21:24:21.147196 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 21:24:21.147472 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 21:24:21.147706 Converting downloaded kernel to a uImage
236 21:24:21.148031 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/kernel/Image /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/kernel/uImage
237 21:24:22.848469 output: Image Name:
238 21:24:22.848863 output: Created: Tue Sep 3 21:24:21 2024
239 21:24:22.849072 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 21:24:22.849277 output: Data Size: 167969280 Bytes = 164032.50 KiB = 160.19 MiB
241 21:24:22.849480 output: Load Address: 01080000
242 21:24:22.849680 output: Entry Point: 01080000
243 21:24:22.849877 output:
244 21:24:22.850201 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 21:24:22.850465 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 21:24:22.850731 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 21:24:22.850981 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 21:24:22.851239 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 21:24:22.851495 Building ramdisk /var/lib/lava/dispatcher/tmp/699434/extract-overlay-ramdisk-_u3f_wq4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/699434/extract-overlay-ramdisk-_u3f_wq4/ramdisk
250 21:24:28.428781 >> 421519 blocks
251 21:24:46.204223 Adding RAMdisk u-boot header.
252 21:24:46.205084 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/699434/extract-overlay-ramdisk-_u3f_wq4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/699434/extract-overlay-ramdisk-_u3f_wq4/ramdisk.cpio.gz.uboot
253 21:24:46.756130 output: Image Name:
254 21:24:46.756830 output: Created: Tue Sep 3 21:24:46 2024
255 21:24:46.757317 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 21:24:46.757786 output: Data Size: 50556349 Bytes = 49371.43 KiB = 48.21 MiB
257 21:24:46.758247 output: Load Address: 00000000
258 21:24:46.758698 output: Entry Point: 00000000
259 21:24:46.759153 output:
260 21:24:46.760499 rename /var/lib/lava/dispatcher/tmp/699434/extract-overlay-ramdisk-_u3f_wq4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/ramdisk/ramdisk.cpio.gz.uboot
261 21:24:46.761340 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 21:24:46.761994 end: 1.6 prepare-tftp-overlay (duration 00:00:39) [common]
263 21:24:46.762630 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 21:24:46.763175 No LXC device requested
265 21:24:46.764015 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 21:24:46.764669 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 21:24:46.765256 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 21:24:46.765736 Checking files for TFTP limit of 4294967296 bytes.
269 21:24:46.768759 end: 1 tftp-deploy (duration 00:01:00) [common]
270 21:24:46.769424 start: 2 uboot-action (timeout 00:05:00) [common]
271 21:24:46.770032 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 21:24:46.770608 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 21:24:46.771187 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 21:24:46.771784 Using kernel file from prepare-kernel: 699434/tftp-deploy-52r91e87/kernel/uImage
275 21:24:46.772535 substitutions:
276 21:24:46.773003 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 21:24:46.773466 - {DTB_ADDR}: 0x01070000
278 21:24:46.773920 - {DTB}: 699434/tftp-deploy-52r91e87/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 21:24:46.774369 - {INITRD}: 699434/tftp-deploy-52r91e87/ramdisk/ramdisk.cpio.gz.uboot
280 21:24:46.774819 - {KERNEL_ADDR}: 0x01080000
281 21:24:46.775262 - {KERNEL}: 699434/tftp-deploy-52r91e87/kernel/uImage
282 21:24:46.775705 - {LAVA_MAC}: None
283 21:24:46.776232 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/699434/extract-nfsrootfs-13mvqu_8
284 21:24:46.776690 - {NFS_SERVER_IP}: 192.168.6.2
285 21:24:46.777138 - {PRESEED_CONFIG}: None
286 21:24:46.777586 - {PRESEED_LOCAL}: None
287 21:24:46.778028 - {RAMDISK_ADDR}: 0x08000000
288 21:24:46.778466 - {RAMDISK}: 699434/tftp-deploy-52r91e87/ramdisk/ramdisk.cpio.gz.uboot
289 21:24:46.778917 - {ROOT_PART}: None
290 21:24:46.779364 - {ROOT}: None
291 21:24:46.779809 - {SERVER_IP}: 192.168.6.2
292 21:24:46.780283 - {TEE_ADDR}: 0x83000000
293 21:24:46.780714 - {TEE}: None
294 21:24:46.781122 Parsed boot commands:
295 21:24:46.781516 - setenv autoload no
296 21:24:46.782087 - setenv initrd_high 0xffffffff
297 21:24:46.782628 - setenv fdt_high 0xffffffff
298 21:24:46.783315 - dhcp
299 21:24:46.783794 - setenv serverip 192.168.6.2
300 21:24:46.784276 - tftpboot 0x01080000 699434/tftp-deploy-52r91e87/kernel/uImage
301 21:24:46.784694 - tftpboot 0x08000000 699434/tftp-deploy-52r91e87/ramdisk/ramdisk.cpio.gz.uboot
302 21:24:46.785101 - tftpboot 0x01070000 699434/tftp-deploy-52r91e87/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 21:24:46.785552 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/699434/extract-nfsrootfs-13mvqu_8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 21:24:46.786010 - bootm 0x01080000 0x08000000 0x01070000
305 21:24:46.786613 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 21:24:46.788383 start: 2.3 connect-device (timeout 00:05:00) [common]
308 21:24:46.788874 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 21:24:46.804843 Setting prompt string to ['lava-test: # ']
310 21:24:46.806467 end: 2.3 connect-device (duration 00:00:00) [common]
311 21:24:46.807170 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 21:24:46.808206 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 21:24:46.808877 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 21:24:46.810170 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 21:24:46.848269 >> OK - accepted request
316 21:24:46.850352 Returned 0 in 0 seconds
317 21:24:46.951614 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 21:24:46.953588 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 21:24:46.954273 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 21:24:46.954871 Setting prompt string to ['Hit any key to stop autoboot']
322 21:24:46.955409 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 21:24:46.957176 Trying 192.168.56.21...
324 21:24:46.957923 Connected to conserv1.
325 21:24:46.958424 Escape character is '^]'.
326 21:24:46.958913
327 21:24:46.959400 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 21:24:46.959886
329 21:24:54.202053 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 21:24:54.202763 bl2_stage_init 0x01
331 21:24:54.203259 bl2_stage_init 0x81
332 21:24:54.207489 hw id: 0x0000 - pwm id 0x01
333 21:24:54.208135 bl2_stage_init 0xc1
334 21:24:54.211838 bl2_stage_init 0x02
335 21:24:54.212444
336 21:24:54.212956 L0:00000000
337 21:24:54.213424 L1:00000703
338 21:24:54.213900 L2:00008067
339 21:24:54.217546 L3:15000000
340 21:24:54.218140 S1:00000000
341 21:24:54.218561 B2:20282000
342 21:24:54.218985 B1:a0f83180
343 21:24:54.219392
344 21:24:54.219798 TE: 69528
345 21:24:54.220255
346 21:24:54.228694 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 21:24:54.229295
348 21:24:54.229717 Board ID = 1
349 21:24:54.230120 Set cpu clk to 24M
350 21:24:54.230528 Set clk81 to 24M
351 21:24:54.234193 Use GP1_pll as DSU clk.
352 21:24:54.234738 DSU clk: 1200 Mhz
353 21:24:54.235151 CPU clk: 1200 MHz
354 21:24:54.239918 Set clk81 to 166.6M
355 21:24:54.245406 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 21:24:54.245955 board id: 1
357 21:24:54.253670 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 21:24:54.264549 fw parse done
359 21:24:54.270498 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 21:24:54.313621 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 21:24:54.324841 PIEI prepare done
362 21:24:54.325344 fastboot data load
363 21:24:54.325794 fastboot data verify
364 21:24:54.330370 verify result: 266
365 21:24:54.336016 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 21:24:54.336518 LPDDR4 probe
367 21:24:54.336958 ddr clk to 1584MHz
368 21:24:54.343957 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 21:24:54.380921
370 21:24:54.381588 dmc_version 0001
371 21:24:54.389079 Check phy result
372 21:24:54.394768 INFO : End of CA training
373 21:24:54.395288 INFO : End of initialization
374 21:24:54.400393 INFO : Training has run successfully!
375 21:24:54.400874 Check phy result
376 21:24:54.406009 INFO : End of initialization
377 21:24:54.406487 INFO : End of read enable training
378 21:24:54.411541 INFO : End of fine write leveling
379 21:24:54.417133 INFO : End of Write leveling coarse delay
380 21:24:54.417604 INFO : Training has run successfully!
381 21:24:54.418041 Check phy result
382 21:24:54.422825 INFO : End of initialization
383 21:24:54.423308 INFO : End of read dq deskew training
384 21:24:54.428370 INFO : End of MPR read delay center optimization
385 21:24:54.433922 INFO : End of write delay center optimization
386 21:24:54.439550 INFO : End of read delay center optimization
387 21:24:54.440066 INFO : End of max read latency training
388 21:24:54.445149 INFO : Training has run successfully!
389 21:24:54.445617 1D training succeed
390 21:24:54.454318 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 21:24:54.502656 Check phy result
392 21:24:54.503275 INFO : End of initialization
393 21:24:54.530013 INFO : End of 2D read delay Voltage center optimization
394 21:24:54.554154 INFO : End of 2D read delay Voltage center optimization
395 21:24:54.610774 INFO : End of 2D write delay Voltage center optimization
396 21:24:54.664746 INFO : End of 2D write delay Voltage center optimization
397 21:24:54.670341 INFO : Training has run successfully!
398 21:24:54.670870
399 21:24:54.671313 channel==0
400 21:24:54.675903 RxClkDly_Margin_A0==78 ps 8
401 21:24:54.676410 TxDqDly_Margin_A0==98 ps 10
402 21:24:54.681571 RxClkDly_Margin_A1==88 ps 9
403 21:24:54.682038 TxDqDly_Margin_A1==98 ps 10
404 21:24:54.682480 TrainedVREFDQ_A0==76
405 21:24:54.687086 TrainedVREFDQ_A1==74
406 21:24:54.687557 VrefDac_Margin_A0==24
407 21:24:54.688026 DeviceVref_Margin_A0==38
408 21:24:54.692685 VrefDac_Margin_A1==23
409 21:24:54.693147 DeviceVref_Margin_A1==40
410 21:24:54.693582
411 21:24:54.694013
412 21:24:54.698298 channel==1
413 21:24:54.698760 RxClkDly_Margin_A0==88 ps 9
414 21:24:54.699198 TxDqDly_Margin_A0==88 ps 9
415 21:24:54.703905 RxClkDly_Margin_A1==78 ps 8
416 21:24:54.704392 TxDqDly_Margin_A1==88 ps 9
417 21:24:54.709533 TrainedVREFDQ_A0==75
418 21:24:54.710003 TrainedVREFDQ_A1==77
419 21:24:54.710438 VrefDac_Margin_A0==22
420 21:24:54.715064 DeviceVref_Margin_A0==39
421 21:24:54.715519 VrefDac_Margin_A1==22
422 21:24:54.720664 DeviceVref_Margin_A1==37
423 21:24:54.721133
424 21:24:54.721571 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 21:24:54.722004
426 21:24:54.754392 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 21:24:54.754978 2D training succeed
428 21:24:54.759888 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 21:24:54.765584 auto size-- 65535DDR cs0 size: 2048MB
430 21:24:54.766050 DDR cs1 size: 2048MB
431 21:24:54.771180 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 21:24:54.771719 cs0 DataBus test pass
433 21:24:54.776704 cs1 DataBus test pass
434 21:24:54.777181 cs0 AddrBus test pass
435 21:24:54.777617 cs1 AddrBus test pass
436 21:24:54.778047
437 21:24:54.782437 100bdlr_step_size ps== 471
438 21:24:54.782910 result report
439 21:24:54.787876 boot times 0Enable ddr reg access
440 21:24:54.793126 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 21:24:54.806933 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 21:24:55.465215 bl2z: ptr: 05129330, size: 00001e40
443 21:24:55.475575 0.0;M3 CHK:0;cm4_sp_mode 0
444 21:24:55.476219 MVN_1=0x00000000
445 21:24:55.476690 MVN_2=0x00000000
446 21:24:55.486853 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 21:24:55.487364 OPS=0x04
448 21:24:55.487825 ring efuse init
449 21:24:55.492500 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 21:24:55.493007 [0.017354 Inits done]
451 21:24:55.493455 secure task start!
452 21:24:55.499059 high task start!
453 21:24:55.499559 low task start!
454 21:24:55.500042 run into bl31
455 21:24:55.508581 NOTICE: BL31: v1.3(release):4fc40b1
456 21:24:55.515924 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 21:24:55.516455 NOTICE: BL31: G12A normal boot!
458 21:24:55.532019 NOTICE: BL31: BL33 decompress pass
459 21:24:55.536818 ERROR: Error initializing runtime service opteed_fast
460 21:24:56.752189 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 21:24:56.752858 bl2_stage_init 0x01
462 21:24:56.753329 bl2_stage_init 0x81
463 21:24:56.757804 hw id: 0x0000 - pwm id 0x01
464 21:24:56.758296 bl2_stage_init 0xc1
465 21:24:56.758748 bl2_stage_init 0x02
466 21:24:56.759192
467 21:24:56.763461 L0:00000000
468 21:24:56.763944 L1:00000703
469 21:24:56.764452 L2:00008067
470 21:24:56.764899 L3:15000000
471 21:24:56.765342 S1:00000000
472 21:24:56.768946 B2:20282000
473 21:24:56.769438 B1:a0f83180
474 21:24:56.769889
475 21:24:56.770335 TE: 70335
476 21:24:56.770780
477 21:24:56.774642 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 21:24:56.775143
479 21:24:56.780154 Board ID = 1
480 21:24:56.780644 Set cpu clk to 24M
481 21:24:56.781096 Set clk81 to 24M
482 21:24:56.785816 Use GP1_pll as DSU clk.
483 21:24:56.786297 DSU clk: 1200 Mhz
484 21:24:56.786748 CPU clk: 1200 MHz
485 21:24:56.787191 Set clk81 to 166.6M
486 21:24:56.796950 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 21:24:56.797443 board id: 1
488 21:24:56.802456 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 21:24:56.814279 fw parse done
490 21:24:56.819598 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 21:24:56.863521 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 21:24:56.874548 PIEI prepare done
493 21:24:56.875056 fastboot data load
494 21:24:56.875509 fastboot data verify
495 21:24:56.880139 verify result: 266
496 21:24:56.885708 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 21:24:56.886199 LPDDR4 probe
498 21:24:56.886651 ddr clk to 1584MHz
499 21:24:58.255363 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c00 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 21:24:58.256327 bl2_stage_init 0x01
501 21:24:58.256945 bl2_stage_init 0x81
502 21:24:58.261119 hw id: 0x0000 - pwm id 0x01
503 21:24:58.262053 bl2_stage_init 0xc1
504 21:24:58.262961 bl2_stage_init 0x02
505 21:24:58.263887
506 21:24:58.266590 L0:00000000
507 21:24:58.267301 L1:00000703
508 21:24:58.267849 L2:00008067
509 21:24:58.268446 L3:15000000
510 21:24:58.269006 S1:00000000
511 21:24:58.272228 B2:20282000
512 21:24:58.273032 B1:a0f83180
513 21:24:58.273619
514 21:24:58.274172 TE: 72933
515 21:24:58.274746
516 21:24:58.277799 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 21:24:58.278449
518 21:24:58.278938 Board ID = 1
519 21:24:58.283356 Set cpu clk to 24M
520 21:24:58.283686 Set clk81 to 24M
521 21:24:58.283889 Use GP1_pll as DSU clk.
522 21:24:58.288952 DSU clk: 1200 Mhz
523 21:24:58.289442 CPU clk: 1200 MHz
524 21:24:58.289840 Set clk81 to 166.6M
525 21:24:58.294524 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 21:24:58.300148 board id: 1
527 21:24:58.304685 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 21:24:58.316572 fw parse done
529 21:24:58.322049 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 21:24:58.364866 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 21:24:58.376835 PIEI prepare done
532 21:24:58.377349 fastboot data load
533 21:24:58.377750 fastboot data verify
534 21:24:58.382454 verify result: 266
535 21:24:58.388060 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 21:24:58.388548 LPDDR4 probe
537 21:24:58.388944 ddr clk to 1584MHz
538 21:24:58.395565 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 21:24:58.432838
540 21:24:58.433365 dmc_version 0001
541 21:24:58.440415 Check phy result
542 21:24:58.446838 INFO : End of CA training
543 21:24:58.447421 INFO : End of initialization
544 21:24:58.452386 INFO : Training has run successfully!
545 21:24:58.452885 Check phy result
546 21:24:58.458042 INFO : End of initialization
547 21:24:58.458583 INFO : End of read enable training
548 21:24:58.463590 INFO : End of fine write leveling
549 21:24:58.469248 INFO : End of Write leveling coarse delay
550 21:24:58.469833 INFO : Training has run successfully!
551 21:24:58.470275 Check phy result
552 21:24:58.474900 INFO : End of initialization
553 21:24:58.475477 INFO : End of read dq deskew training
554 21:24:58.480472 INFO : End of MPR read delay center optimization
555 21:24:58.486096 INFO : End of write delay center optimization
556 21:24:58.491756 INFO : End of read delay center optimization
557 21:24:58.492464 INFO : End of max read latency training
558 21:24:58.497249 INFO : Training has run successfully!
559 21:24:58.497743 1D training succeed
560 21:24:58.505470 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 21:24:58.554478 Check phy result
562 21:24:58.555174 INFO : End of initialization
563 21:24:58.581281 INFO : End of 2D read delay Voltage center optimization
564 21:24:58.606302 INFO : End of 2D read delay Voltage center optimization
565 21:24:58.662971 INFO : End of 2D write delay Voltage center optimization
566 21:24:58.716917 INFO : End of 2D write delay Voltage center optimization
567 21:24:58.722433 INFO : Training has run successfully!
568 21:24:58.722797
569 21:24:58.723020 channel==0
570 21:24:58.728029 RxClkDly_Margin_A0==88 ps 9
571 21:24:58.728397 TxDqDly_Margin_A0==98 ps 10
572 21:24:58.733618 RxClkDly_Margin_A1==88 ps 9
573 21:24:58.733953 TxDqDly_Margin_A1==98 ps 10
574 21:24:58.734181 TrainedVREFDQ_A0==74
575 21:24:58.739213 TrainedVREFDQ_A1==74
576 21:24:58.739553 VrefDac_Margin_A0==22
577 21:24:58.739773 DeviceVref_Margin_A0==40
578 21:24:58.744806 VrefDac_Margin_A1==23
579 21:24:58.745165 DeviceVref_Margin_A1==40
580 21:24:58.745387
581 21:24:58.745601
582 21:24:58.750376 channel==1
583 21:24:58.750794 RxClkDly_Margin_A0==88 ps 9
584 21:24:58.751026 TxDqDly_Margin_A0==98 ps 10
585 21:24:58.756008 RxClkDly_Margin_A1==88 ps 9
586 21:24:58.756317 TxDqDly_Margin_A1==88 ps 9
587 21:24:58.761655 TrainedVREFDQ_A0==78
588 21:24:58.761968 TrainedVREFDQ_A1==75
589 21:24:58.762193 VrefDac_Margin_A0==22
590 21:24:58.767213 DeviceVref_Margin_A0==36
591 21:24:58.767539 VrefDac_Margin_A1==22
592 21:24:58.772825 DeviceVref_Margin_A1==39
593 21:24:58.773189
594 21:24:58.773415 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 21:24:58.773629
596 21:24:58.806487 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 21:24:58.807014 2D training succeed
598 21:24:58.812114 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 21:24:58.817706 auto size-- 65535DDR cs0 size: 2048MB
600 21:24:58.818152 DDR cs1 size: 2048MB
601 21:24:58.823305 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 21:24:58.823750 cs0 DataBus test pass
603 21:24:58.829087 cs1 DataBus test pass
604 21:24:58.829705 cs0 AddrBus test pass
605 21:24:58.830125 cs1 AddrBus test pass
606 21:24:58.830528
607 21:24:58.834488 100bdlr_step_size ps== 471
608 21:24:58.834923 result report
609 21:24:58.840093 boot times 0Enable ddr reg access
610 21:24:58.844310 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 21:24:58.858282 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 21:24:59.517770 bl2z: ptr: 05129330, size: 00001e40
613 21:24:59.526838 0.0;M3 CHK:0;cm4_sp_mode 0
614 21:24:59.527265 MVN_1=0x00000000
615 21:24:59.527503 MVN_2=0x00000000
616 21:24:59.538286 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 21:24:59.538607 OPS=0x04
618 21:24:59.538837 ring efuse init
619 21:24:59.541287 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 21:24:59.546755 [0.017354 Inits done]
621 21:24:59.547047 secure task start!
622 21:24:59.547270 high task start!
623 21:24:59.547483 low task start!
624 21:24:59.551090 run into bl31
625 21:24:59.560338 NOTICE: BL31: v1.3(release):4fc40b1
626 21:24:59.567365 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 21:24:59.567659 NOTICE: BL31: G12A normal boot!
628 21:24:59.583574 NOTICE: BL31: BL33 decompress pass
629 21:24:59.588970 ERROR: Error initializing runtime service opteed_fast
630 21:25:00.804184 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 21:25:00.804819 bl2_stage_init 0x01
632 21:25:00.805239 bl2_stage_init 0x81
633 21:25:00.809743 hw id: 0x0000 - pwm id 0x01
634 21:25:00.810260 bl2_stage_init 0xc1
635 21:25:00.810699 bl2_stage_init 0x02
636 21:25:00.811130
637 21:25:00.815381 L0:00000000
638 21:25:00.815887 L1:00000703
639 21:25:00.816372 L2:00008067
640 21:25:00.816796 L3:15000000
641 21:25:00.817215 S1:00000000
642 21:25:00.821644 B2:20282000
643 21:25:00.822143 B1:a0f83180
644 21:25:00.822572
645 21:25:00.822973 TE: 70919
646 21:25:00.823381
647 21:25:00.827188 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 21:25:00.827687
649 21:25:00.828206 Board ID = 1
650 21:25:00.832901 Set cpu clk to 24M
651 21:25:00.833469 Set clk81 to 24M
652 21:25:00.833923 Use GP1_pll as DSU clk.
653 21:25:00.838380 DSU clk: 1200 Mhz
654 21:25:00.838878 CPU clk: 1200 MHz
655 21:25:00.839303 Set clk81 to 166.6M
656 21:25:00.844011 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 21:25:00.849789 board id: 1
658 21:25:00.855369 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 21:25:00.865960 fw parse done
660 21:25:00.870899 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 21:25:00.913606 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 21:25:00.925540 PIEI prepare done
663 21:25:00.925915 fastboot data load
664 21:25:00.926135 fastboot data verify
665 21:25:00.931158 verify result: 266
666 21:25:00.936845 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 21:25:00.937436 LPDDR4 probe
668 21:25:00.937887 ddr clk to 1584MHz
669 21:25:00.944065 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 21:25:00.981321
671 21:25:00.981964 dmc_version 0001
672 21:25:00.987710 Check phy result
673 21:25:00.994646 INFO : End of CA training
674 21:25:00.995197 INFO : End of initialization
675 21:25:01.000231 INFO : Training has run successfully!
676 21:25:01.000963 Check phy result
677 21:25:01.005924 INFO : End of initialization
678 21:25:01.006280 INFO : End of read enable training
679 21:25:01.011405 INFO : End of fine write leveling
680 21:25:01.016951 INFO : End of Write leveling coarse delay
681 21:25:01.017236 INFO : Training has run successfully!
682 21:25:01.017472 Check phy result
683 21:25:01.022472 INFO : End of initialization
684 21:25:01.022752 INFO : End of read dq deskew training
685 21:25:01.028029 INFO : End of MPR read delay center optimization
686 21:25:01.033614 INFO : End of write delay center optimization
687 21:25:01.039225 INFO : End of read delay center optimization
688 21:25:01.039501 INFO : End of max read latency training
689 21:25:01.044838 INFO : Training has run successfully!
690 21:25:01.045123 1D training succeed
691 21:25:01.053674 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 21:25:01.101558 Check phy result
693 21:25:01.101921 INFO : End of initialization
694 21:25:01.123039 INFO : End of 2D read delay Voltage center optimization
695 21:25:01.142202 INFO : End of 2D read delay Voltage center optimization
696 21:25:01.194768 INFO : End of 2D write delay Voltage center optimization
697 21:25:01.244246 INFO : End of 2D write delay Voltage center optimization
698 21:25:01.249860 INFO : Training has run successfully!
699 21:25:01.250156
700 21:25:01.250386 channel==0
701 21:25:01.255352 RxClkDly_Margin_A0==78 ps 8
702 21:25:01.255639 TxDqDly_Margin_A0==88 ps 9
703 21:25:01.260954 RxClkDly_Margin_A1==88 ps 9
704 21:25:01.261245 TxDqDly_Margin_A1==98 ps 10
705 21:25:01.261473 TrainedVREFDQ_A0==74
706 21:25:01.266573 TrainedVREFDQ_A1==74
707 21:25:01.266862 VrefDac_Margin_A0==24
708 21:25:01.267078 DeviceVref_Margin_A0==40
709 21:25:01.272185 VrefDac_Margin_A1==23
710 21:25:01.272465 DeviceVref_Margin_A1==40
711 21:25:01.272683
712 21:25:01.272898
713 21:25:01.273109 channel==1
714 21:25:01.277841 RxClkDly_Margin_A0==88 ps 9
715 21:25:01.278120 TxDqDly_Margin_A0==98 ps 10
716 21:25:01.283353 RxClkDly_Margin_A1==78 ps 8
717 21:25:01.283636 TxDqDly_Margin_A1==78 ps 8
718 21:25:01.288997 TrainedVREFDQ_A0==78
719 21:25:01.289310 TrainedVREFDQ_A1==75
720 21:25:01.289536 VrefDac_Margin_A0==23
721 21:25:01.294544 DeviceVref_Margin_A0==36
722 21:25:01.294826 VrefDac_Margin_A1==22
723 21:25:01.300296 DeviceVref_Margin_A1==39
724 21:25:01.300586
725 21:25:01.300809 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 21:25:01.301024
727 21:25:01.333735 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
728 21:25:01.334064 2D training succeed
729 21:25:01.339396 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 21:25:01.344977 auto size-- 65535DDR cs0 size: 2048MB
731 21:25:01.345264 DDR cs1 size: 2048MB
732 21:25:01.350595 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 21:25:01.350873 cs0 DataBus test pass
734 21:25:01.356385 cs1 DataBus test pass
735 21:25:01.356695 cs0 AddrBus test pass
736 21:25:01.356919 cs1 AddrBus test pass
737 21:25:01.357138
738 21:25:01.361851 100bdlr_step_size ps== 478
739 21:25:01.362152 result report
740 21:25:01.367375 boot times 0Enable ddr reg access
741 21:25:01.372624 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 21:25:01.385525 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 21:25:02.041357 bl2z: ptr: 05129330, size: 00001e40
744 21:25:02.049503 0.0;M3 CHK:0;cm4_sp_mode 0
745 21:25:02.049801 MVN_1=0x00000000
746 21:25:02.050018 MVN_2=0x00000000
747 21:25:02.061007 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 21:25:02.061309 OPS=0x04
749 21:25:02.061528 ring efuse init
750 21:25:02.066727 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 21:25:02.067012 [0.017320 Inits done]
752 21:25:02.067228 secure task start!
753 21:25:02.074027 high task start!
754 21:25:02.074337 low task start!
755 21:25:02.074553 run into bl31
756 21:25:02.082719 NOTICE: BL31: v1.3(release):4fc40b1
757 21:25:02.089813 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 21:25:02.090106 NOTICE: BL31: G12A normal boot!
759 21:25:02.106035 NOTICE: BL31: BL33 decompress pass
760 21:25:02.111079 ERROR: Error initializing runtime service opteed_fast
761 21:25:02.905988
762 21:25:02.906374
763 21:25:02.911387 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 21:25:02.911666
765 21:25:02.914618 Model: Libre Computer AML-S905D3-CC Solitude
766 21:25:03.060921 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 21:25:03.076139 DRAM: 2 GiB (effective 3.8 GiB)
768 21:25:03.178161 Core: 406 devices, 33 uclasses, devicetree: separate
769 21:25:03.183369 WDT: Not starting watchdog@f0d0
770 21:25:03.209077 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 21:25:03.221243 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 21:25:03.226230 ** Bad device specification mmc 0 **
773 21:25:03.236301 Card did not respond to voltage select! : -110
774 21:25:03.243909 ** Bad device specification mmc 0 **
775 21:25:03.244219 Couldn't find partition mmc 0
776 21:25:03.252248 Card did not respond to voltage select! : -110
777 21:25:03.257781 ** Bad device specification mmc 0 **
778 21:25:03.258055 Couldn't find partition mmc 0
779 21:25:03.262829 Error: could not access storage.
780 21:25:03.559315 Net: eth0: ethernet@ff3f0000
781 21:25:03.559699 starting USB...
782 21:25:03.804964 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 21:25:03.805357 Starting the controller
784 21:25:03.811572 USB XHCI 1.10
785 21:25:05.365428 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 21:25:05.372822 scanning usb for storage devices... 0 Storage Device(s) found
788 21:25:05.423874 Hit any key to stop autoboot: 1
789 21:25:05.424604 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 21:25:05.424966 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 21:25:05.425234 Setting prompt string to ['=>']
792 21:25:05.425487 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 21:25:05.428761 0
794 21:25:05.429375 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 21:25:05.530185 => setenv autoload no
797 21:25:05.530802 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 21:25:05.534732 setenv autoload no
800 21:25:05.635706 => setenv initrd_high 0xffffffff
801 21:25:05.636226 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 21:25:05.640267 setenv initrd_high 0xffffffff
804 21:25:05.741622 => setenv fdt_high 0xffffffff
805 21:25:05.742191 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 21:25:05.745533 setenv fdt_high 0xffffffff
808 21:25:05.846963 => dhcp
809 21:25:05.847547 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 21:25:05.851255 dhcp
811 21:25:06.556423 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 21:25:06.557029 Speed: 1000, full duplex
813 21:25:06.557432 BOOTP broadcast 1
814 21:25:06.805276 BOOTP broadcast 2
815 21:25:07.306373 BOOTP broadcast 3
816 21:25:08.308295 BOOTP broadcast 4
817 21:25:10.309220 BOOTP broadcast 5
818 21:25:10.321843 DHCP client bound to address 192.168.6.12 (3764 ms)
820 21:25:10.423309 => setenv serverip 192.168.6.2
821 21:25:10.424011 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 21:25:10.429023 setenv serverip 192.168.6.2
824 21:25:10.530443 => tftpboot 0x01080000 699434/tftp-deploy-52r91e87/kernel/uImage
825 21:25:10.531126 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 21:25:10.538026 tftpboot 0x01080000 699434/tftp-deploy-52r91e87/kernel/uImage
827 21:25:10.538502 Speed: 1000, full duplex
828 21:25:10.538914 Using ethernet@ff3f0000 device
829 21:25:10.543452 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 21:25:10.548970 Filename '699434/tftp-deploy-52r91e87/kernel/uImage'.
831 21:25:10.553235 Load address: 0x1080000
832 21:25:14.554247 Loading: *###################
833 21:25:14.554853 TFTP error: trying to overwrite reserved memory...
835 21:25:14.556349 end: 2.4.3 bootloader-commands (duration 00:00:09) [common]
838 21:25:14.558212 end: 2.4 uboot-commands (duration 00:00:28) [common]
840 21:25:14.560312 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
842 21:25:14.561532 end: 2 uboot-action (duration 00:00:28) [common]
844 21:25:14.563243 Cleaning after the job
845 21:25:14.563938 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/ramdisk
846 21:25:14.595598 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/kernel
847 21:25:14.608513 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/dtb
848 21:25:14.609695 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/nfsrootfs
849 21:25:14.675542 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/699434/tftp-deploy-52r91e87/modules
850 21:25:14.732055 start: 4.1 power-off (timeout 00:00:30) [common]
851 21:25:14.732772 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
852 21:25:14.763288 >> OK - accepted request
853 21:25:14.765255 Returned 0 in 0 seconds
854 21:25:14.866041 end: 4.1 power-off (duration 00:00:00) [common]
856 21:25:14.867044 start: 4.2 read-feedback (timeout 00:10:00) [common]
857 21:25:14.867693 Listened to connection for namespace 'common' for up to 1s
858 21:25:15.868678 Finalising connection for namespace 'common'
859 21:25:15.869177 Disconnecting from shell: Finalise
860 21:25:15.869445 =>
861 21:25:15.970112 end: 4.2 read-feedback (duration 00:00:01) [common]
862 21:25:15.970572 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/699434
863 21:25:17.807428 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/699434
864 21:25:17.808070 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.