Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:32:56.039091 lava-dispatcher, installed at version: 2024.01
2 00:32:56.039895 start: 0 validate
3 00:32:56.040397 Start time: 2024-09-06 00:32:56.040367+00:00 (UTC)
4 00:32:56.040949 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:32:56.041493 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:32:56.084411 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:32:56.084959 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:32:56.117526 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:32:56.118141 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:32:56.152619 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:32:56.153141 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:32:56.186083 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:32:56.186602 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:32:56.232343 validate duration: 0.19
16 00:32:56.233781 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:32:56.234372 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:32:56.234948 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:32:56.235871 Not decompressing ramdisk as can be used compressed.
20 00:32:56.236681 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:32:56.237184 saving as /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/ramdisk/initrd.cpio.gz
22 00:32:56.237668 total size: 5628169 (5 MB)
23 00:32:56.281743 progress 0 % (0 MB)
24 00:32:56.290652 progress 5 % (0 MB)
25 00:32:56.299613 progress 10 % (0 MB)
26 00:32:56.307717 progress 15 % (0 MB)
27 00:32:56.315621 progress 20 % (1 MB)
28 00:32:56.319462 progress 25 % (1 MB)
29 00:32:56.323512 progress 30 % (1 MB)
30 00:32:56.327621 progress 35 % (1 MB)
31 00:32:56.331379 progress 40 % (2 MB)
32 00:32:56.335488 progress 45 % (2 MB)
33 00:32:56.339237 progress 50 % (2 MB)
34 00:32:56.343288 progress 55 % (2 MB)
35 00:32:56.347362 progress 60 % (3 MB)
36 00:32:56.350993 progress 65 % (3 MB)
37 00:32:56.355043 progress 70 % (3 MB)
38 00:32:56.358683 progress 75 % (4 MB)
39 00:32:56.362744 progress 80 % (4 MB)
40 00:32:56.366496 progress 85 % (4 MB)
41 00:32:56.370425 progress 90 % (4 MB)
42 00:32:56.374183 progress 95 % (5 MB)
43 00:32:56.377505 progress 100 % (5 MB)
44 00:32:56.378173 5 MB downloaded in 0.14 s (38.20 MB/s)
45 00:32:56.378734 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:32:56.379676 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:32:56.380020 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:32:56.380329 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:32:56.380833 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/kernel/Image
51 00:32:56.381097 saving as /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/kernel/Image
52 00:32:56.381320 total size: 37407232 (35 MB)
53 00:32:56.381543 No compression specified
54 00:32:56.421448 progress 0 % (0 MB)
55 00:32:56.445401 progress 5 % (1 MB)
56 00:32:56.468837 progress 10 % (3 MB)
57 00:32:56.492407 progress 15 % (5 MB)
58 00:32:56.515748 progress 20 % (7 MB)
59 00:32:56.539226 progress 25 % (8 MB)
60 00:32:56.562744 progress 30 % (10 MB)
61 00:32:56.586151 progress 35 % (12 MB)
62 00:32:56.609495 progress 40 % (14 MB)
63 00:32:56.633392 progress 45 % (16 MB)
64 00:32:56.656773 progress 50 % (17 MB)
65 00:32:56.680113 progress 55 % (19 MB)
66 00:32:56.703580 progress 60 % (21 MB)
67 00:32:56.727173 progress 65 % (23 MB)
68 00:32:56.750393 progress 70 % (25 MB)
69 00:32:56.773456 progress 75 % (26 MB)
70 00:32:56.799041 progress 80 % (28 MB)
71 00:32:56.822341 progress 85 % (30 MB)
72 00:32:56.845561 progress 90 % (32 MB)
73 00:32:56.868896 progress 95 % (33 MB)
74 00:32:56.891524 progress 100 % (35 MB)
75 00:32:56.892223 35 MB downloaded in 0.51 s (69.83 MB/s)
76 00:32:56.892730 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:32:56.893570 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:32:56.893852 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:32:56.894122 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:32:56.894599 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:32:56.894888 saving as /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:32:56.895100 total size: 54667 (0 MB)
84 00:32:56.895310 No compression specified
85 00:32:56.935608 progress 59 % (0 MB)
86 00:32:56.936487 progress 100 % (0 MB)
87 00:32:56.937064 0 MB downloaded in 0.04 s (1.24 MB/s)
88 00:32:56.937569 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:32:56.938399 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:32:56.938664 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:32:56.938929 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:32:56.939394 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:32:56.939648 saving as /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/nfsrootfs/full.rootfs.tar
95 00:32:56.939856 total size: 120894716 (115 MB)
96 00:32:56.940096 Using unxz to decompress xz
97 00:32:56.978582 progress 0 % (0 MB)
98 00:32:57.763053 progress 5 % (5 MB)
99 00:32:58.594955 progress 10 % (11 MB)
100 00:32:59.381671 progress 15 % (17 MB)
101 00:33:00.110130 progress 20 % (23 MB)
102 00:33:00.700612 progress 25 % (28 MB)
103 00:33:01.517853 progress 30 % (34 MB)
104 00:33:02.302331 progress 35 % (40 MB)
105 00:33:02.652414 progress 40 % (46 MB)
106 00:33:03.074058 progress 45 % (51 MB)
107 00:33:03.903538 progress 50 % (57 MB)
108 00:33:04.944152 progress 55 % (63 MB)
109 00:33:05.876156 progress 60 % (69 MB)
110 00:33:06.679945 progress 65 % (74 MB)
111 00:33:07.450165 progress 70 % (80 MB)
112 00:33:08.264416 progress 75 % (86 MB)
113 00:33:09.055751 progress 80 % (92 MB)
114 00:33:09.811330 progress 85 % (98 MB)
115 00:33:10.653162 progress 90 % (103 MB)
116 00:33:11.416964 progress 95 % (109 MB)
117 00:33:12.240025 progress 100 % (115 MB)
118 00:33:12.252458 115 MB downloaded in 15.31 s (7.53 MB/s)
119 00:33:12.253378 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:33:12.254959 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:33:12.255464 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:33:12.255964 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:33:12.256876 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/modules.tar.xz
125 00:33:12.257328 saving as /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/modules/modules.tar
126 00:33:12.257729 total size: 11642308 (11 MB)
127 00:33:12.258137 Using unxz to decompress xz
128 00:33:12.305981 progress 0 % (0 MB)
129 00:33:12.375298 progress 5 % (0 MB)
130 00:33:12.453513 progress 10 % (1 MB)
131 00:33:12.543433 progress 15 % (1 MB)
132 00:33:12.624297 progress 20 % (2 MB)
133 00:33:12.699200 progress 25 % (2 MB)
134 00:33:12.782433 progress 30 % (3 MB)
135 00:33:12.861047 progress 35 % (3 MB)
136 00:33:12.939338 progress 40 % (4 MB)
137 00:33:13.011701 progress 45 % (5 MB)
138 00:33:13.089946 progress 50 % (5 MB)
139 00:33:13.166303 progress 55 % (6 MB)
140 00:33:13.250544 progress 60 % (6 MB)
141 00:33:13.334622 progress 65 % (7 MB)
142 00:33:13.416472 progress 70 % (7 MB)
143 00:33:13.508859 progress 75 % (8 MB)
144 00:33:13.603450 progress 80 % (8 MB)
145 00:33:13.684686 progress 85 % (9 MB)
146 00:33:13.754909 progress 90 % (10 MB)
147 00:33:13.832529 progress 95 % (10 MB)
148 00:33:13.909186 progress 100 % (11 MB)
149 00:33:13.920018 11 MB downloaded in 1.66 s (6.68 MB/s)
150 00:33:13.920900 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:33:13.922546 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:33:13.923063 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 00:33:13.923576 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 00:33:30.380656 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/713248/extract-nfsrootfs-x0w__nau
156 00:33:30.381242 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 00:33:30.381535 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 00:33:30.382161 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh
159 00:33:30.382611 makedir: /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin
160 00:33:30.382956 makedir: /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/tests
161 00:33:30.383277 makedir: /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/results
162 00:33:30.383615 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-add-keys
163 00:33:30.384192 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-add-sources
164 00:33:30.384728 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-background-process-start
165 00:33:30.385237 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-background-process-stop
166 00:33:30.385774 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-common-functions
167 00:33:30.386280 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-echo-ipv4
168 00:33:30.386777 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-install-packages
169 00:33:30.387345 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-installed-packages
170 00:33:30.387842 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-os-build
171 00:33:30.388403 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-probe-channel
172 00:33:30.388901 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-probe-ip
173 00:33:30.389422 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-target-ip
174 00:33:30.389926 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-target-mac
175 00:33:30.390409 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-target-storage
176 00:33:30.390905 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-case
177 00:33:30.391391 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-event
178 00:33:30.391871 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-feedback
179 00:33:30.392387 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-raise
180 00:33:30.392871 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-reference
181 00:33:30.393380 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-runner
182 00:33:30.393890 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-set
183 00:33:30.394378 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-test-shell
184 00:33:30.394877 Updating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-add-keys (debian)
185 00:33:30.395420 Updating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-add-sources (debian)
186 00:33:30.395935 Updating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-install-packages (debian)
187 00:33:30.396513 Updating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-installed-packages (debian)
188 00:33:30.397020 Updating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/bin/lava-os-build (debian)
189 00:33:30.397457 Creating /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/environment
190 00:33:30.397840 LAVA metadata
191 00:33:30.398102 - LAVA_JOB_ID=713248
192 00:33:30.398322 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:33:30.398692 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 00:33:30.399662 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:33:30.400001 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 00:33:30.400218 skipped lava-vland-overlay
197 00:33:30.400466 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:33:30.400722 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 00:33:30.400940 skipped lava-multinode-overlay
200 00:33:30.401185 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:33:30.401437 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 00:33:30.401688 Loading test definitions
203 00:33:30.401964 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 00:33:30.402186 Using /lava-713248 at stage 0
205 00:33:30.403325 uuid=713248_1.6.2.4.1 testdef=None
206 00:33:30.403646 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:33:30.403916 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 00:33:30.405526 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:33:30.406325 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 00:33:30.408322 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:33:30.409157 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 00:33:30.411024 runner path: /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/0/tests/0_timesync-off test_uuid 713248_1.6.2.4.1
215 00:33:30.411577 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:33:30.412426 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 00:33:30.412654 Using /lava-713248 at stage 0
219 00:33:30.413014 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:33:30.413306 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/0/tests/1_kselftest-alsa'
221 00:33:34.017577 Running '/usr/bin/git checkout kernelci.org
222 00:33:34.041762 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 00:33:34.043191 uuid=713248_1.6.2.4.5 testdef=None
224 00:33:34.043533 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:33:34.044317 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 00:33:34.047165 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:33:34.048004 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 00:33:34.051700 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:33:34.052609 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 00:33:34.056220 runner path: /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/0/tests/1_kselftest-alsa test_uuid 713248_1.6.2.4.5
234 00:33:34.056511 BOARD='meson-g12b-a311d-libretech-cc'
235 00:33:34.056717 BRANCH='mainline'
236 00:33:34.056917 SKIPFILE='/dev/null'
237 00:33:34.057113 SKIP_INSTALL='True'
238 00:33:34.057308 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:33:34.057507 TST_CASENAME=''
240 00:33:34.057704 TST_CMDFILES='alsa'
241 00:33:34.058252 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:33:34.059048 Creating lava-test-runner.conf files
244 00:33:34.059255 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/713248/lava-overlay-zdpptufh/lava-713248/0 for stage 0
245 00:33:34.059600 - 0_timesync-off
246 00:33:34.059840 - 1_kselftest-alsa
247 00:33:34.060189 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:33:34.060475 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 00:33:57.417479 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:33:57.417923 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 00:33:57.418187 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:33:57.418458 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:33:57.418724 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 00:33:58.035362 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:33:58.035841 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 00:33:58.036140 extracting modules file /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/713248/extract-nfsrootfs-x0w__nau
257 00:33:59.381580 extracting modules file /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/713248/extract-overlay-ramdisk-94102_g8/ramdisk
258 00:34:00.769622 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:34:00.770099 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 00:34:00.770381 [common] Applying overlay to NFS
261 00:34:00.770595 [common] Applying overlay /var/lib/lava/dispatcher/tmp/713248/compress-overlay-w6jmzb59/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/713248/extract-nfsrootfs-x0w__nau
262 00:34:03.501825 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:34:03.502289 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 00:34:03.502563 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 00:34:03.502792 Converting downloaded kernel to a uImage
266 00:34:03.503116 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/kernel/Image /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/kernel/uImage
267 00:34:03.899364 output: Image Name:
268 00:34:03.899775 output: Created: Fri Sep 6 00:34:03 2024
269 00:34:03.900020 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:34:03.900235 output: Data Size: 37407232 Bytes = 36530.50 KiB = 35.67 MiB
271 00:34:03.900439 output: Load Address: 01080000
272 00:34:03.900641 output: Entry Point: 01080000
273 00:34:03.900841 output:
274 00:34:03.901179 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:34:03.901449 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:34:03.901718 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 00:34:03.901973 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:34:03.902231 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 00:34:03.902495 Building ramdisk /var/lib/lava/dispatcher/tmp/713248/extract-overlay-ramdisk-94102_g8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/713248/extract-overlay-ramdisk-94102_g8/ramdisk
280 00:34:06.069631 >> 171799 blocks
281 00:34:13.636387 Adding RAMdisk u-boot header.
282 00:34:13.637105 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/713248/extract-overlay-ramdisk-94102_g8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/713248/extract-overlay-ramdisk-94102_g8/ramdisk.cpio.gz.uboot
283 00:34:13.897853 output: Image Name:
284 00:34:13.898277 output: Created: Fri Sep 6 00:34:13 2024
285 00:34:13.898488 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:34:13.898695 output: Data Size: 23960579 Bytes = 23399.00 KiB = 22.85 MiB
287 00:34:13.898897 output: Load Address: 00000000
288 00:34:13.899096 output: Entry Point: 00000000
289 00:34:13.899298 output:
290 00:34:13.899872 rename /var/lib/lava/dispatcher/tmp/713248/extract-overlay-ramdisk-94102_g8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot
291 00:34:13.900625 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:34:13.901258 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 00:34:13.901841 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 00:34:13.902343 No LXC device requested
295 00:34:13.902893 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:34:13.903454 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 00:34:13.904029 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:34:13.904497 Checking files for TFTP limit of 4294967296 bytes.
299 00:34:13.907412 end: 1 tftp-deploy (duration 00:01:18) [common]
300 00:34:13.908074 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:34:13.908667 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:34:13.909215 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:34:13.909769 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:34:13.910349 Using kernel file from prepare-kernel: 713248/tftp-deploy-9aa9ve0h/kernel/uImage
305 00:34:13.911039 substitutions:
306 00:34:13.911492 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:34:13.911940 - {DTB_ADDR}: 0x01070000
308 00:34:13.912422 - {DTB}: 713248/tftp-deploy-9aa9ve0h/dtb/meson-g12b-a311d-libretech-cc.dtb
309 00:34:13.912872 - {INITRD}: 713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot
310 00:34:13.913313 - {KERNEL_ADDR}: 0x01080000
311 00:34:13.913747 - {KERNEL}: 713248/tftp-deploy-9aa9ve0h/kernel/uImage
312 00:34:13.914182 - {LAVA_MAC}: None
313 00:34:13.914656 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/713248/extract-nfsrootfs-x0w__nau
314 00:34:13.915095 - {NFS_SERVER_IP}: 192.168.6.2
315 00:34:13.915526 - {PRESEED_CONFIG}: None
316 00:34:13.915957 - {PRESEED_LOCAL}: None
317 00:34:13.916428 - {RAMDISK_ADDR}: 0x08000000
318 00:34:13.916858 - {RAMDISK}: 713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot
319 00:34:13.917292 - {ROOT_PART}: None
320 00:34:13.917720 - {ROOT}: None
321 00:34:13.918149 - {SERVER_IP}: 192.168.6.2
322 00:34:13.918578 - {TEE_ADDR}: 0x83000000
323 00:34:13.919005 - {TEE}: None
324 00:34:13.919431 Parsed boot commands:
325 00:34:13.919844 - setenv autoload no
326 00:34:13.920305 - setenv initrd_high 0xffffffff
327 00:34:13.920733 - setenv fdt_high 0xffffffff
328 00:34:13.921158 - dhcp
329 00:34:13.921583 - setenv serverip 192.168.6.2
330 00:34:13.922016 - tftpboot 0x01080000 713248/tftp-deploy-9aa9ve0h/kernel/uImage
331 00:34:13.922451 - tftpboot 0x08000000 713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot
332 00:34:13.922882 - tftpboot 0x01070000 713248/tftp-deploy-9aa9ve0h/dtb/meson-g12b-a311d-libretech-cc.dtb
333 00:34:13.923313 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/713248/extract-nfsrootfs-x0w__nau,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:34:13.923755 - bootm 0x01080000 0x08000000 0x01070000
335 00:34:13.924326 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:34:13.925971 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:34:13.926432 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 00:34:13.941845 Setting prompt string to ['lava-test: # ']
340 00:34:13.943487 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:34:13.944194 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:34:13.944838 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:34:13.945440 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:34:13.946653 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 00:34:13.981365 >> OK - accepted request
346 00:34:13.983534 Returned 0 in 0 seconds
347 00:34:14.084763 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:34:14.086556 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:34:14.087201 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:34:14.087781 Setting prompt string to ['Hit any key to stop autoboot']
352 00:34:14.088361 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:34:14.090112 Trying 192.168.56.21...
354 00:34:14.090644 Connected to conserv1.
355 00:34:14.091107 Escape character is '^]'.
356 00:34:14.091582
357 00:34:14.092101 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 00:34:14.092596
359 00:34:25.105644 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 00:34:25.106094 bl2_stage_init 0x01
361 00:34:25.106336 bl2_stage_init 0x81
362 00:34:25.111368 hw id: 0x0000 - pwm id 0x01
363 00:34:25.112110 bl2_stage_init 0xc1
364 00:34:25.112685 bl2_stage_init 0x02
365 00:34:25.113211
366 00:34:25.116838 L0:00000000
367 00:34:25.117496 L1:20000703
368 00:34:25.118049 L2:00008067
369 00:34:25.118587 L3:14000000
370 00:34:25.122607 B2:00402000
371 00:34:25.123212 B1:e0f83180
372 00:34:25.123738
373 00:34:25.124302 TE: 58124
374 00:34:25.124815
375 00:34:25.128150 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 00:34:25.128633
377 00:34:25.129041 Board ID = 1
378 00:34:25.133653 Set A53 clk to 24M
379 00:34:25.134116 Set A73 clk to 24M
380 00:34:25.134516 Set clk81 to 24M
381 00:34:25.139284 A53 clk: 1200 MHz
382 00:34:25.139739 A73 clk: 1200 MHz
383 00:34:25.140221 CLK81: 166.6M
384 00:34:25.140619 smccc: 00012a92
385 00:34:25.144731 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 00:34:25.150509 board id: 1
387 00:34:25.156354 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:34:25.166842 fw parse done
389 00:34:25.172847 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:34:25.215485 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:34:25.226517 PIEI prepare done
392 00:34:25.227026 fastboot data load
393 00:34:25.227427 fastboot data verify
394 00:34:25.232075 verify result: 266
395 00:34:25.237645 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 00:34:25.238110 LPDDR4 probe
397 00:34:25.238508 ddr clk to 1584MHz
398 00:34:25.245650 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:34:25.282944
400 00:34:25.283448 dmc_version 0001
401 00:34:25.289668 Check phy result
402 00:34:25.295570 INFO : End of CA training
403 00:34:25.296056 INFO : End of initialization
404 00:34:25.301065 INFO : Training has run successfully!
405 00:34:25.301524 Check phy result
406 00:34:25.306645 INFO : End of initialization
407 00:34:25.307099 INFO : End of read enable training
408 00:34:25.309909 INFO : End of fine write leveling
409 00:34:25.315529 INFO : End of Write leveling coarse delay
410 00:34:25.321186 INFO : Training has run successfully!
411 00:34:25.321651 Check phy result
412 00:34:25.322067 INFO : End of initialization
413 00:34:25.326755 INFO : End of read dq deskew training
414 00:34:25.332393 INFO : End of MPR read delay center optimization
415 00:34:25.332870 INFO : End of write delay center optimization
416 00:34:25.337972 INFO : End of read delay center optimization
417 00:34:25.343533 INFO : End of max read latency training
418 00:34:25.344019 INFO : Training has run successfully!
419 00:34:25.349192 1D training succeed
420 00:34:25.354994 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:34:25.402585 Check phy result
422 00:34:25.403088 INFO : End of initialization
423 00:34:25.424340 INFO : End of 2D read delay Voltage center optimization
424 00:34:25.444633 INFO : End of 2D read delay Voltage center optimization
425 00:34:25.496698 INFO : End of 2D write delay Voltage center optimization
426 00:34:25.545955 INFO : End of 2D write delay Voltage center optimization
427 00:34:25.551557 INFO : Training has run successfully!
428 00:34:25.552242
429 00:34:25.552822 channel==0
430 00:34:25.557112 RxClkDly_Margin_A0==88 ps 9
431 00:34:25.557750 TxDqDly_Margin_A0==98 ps 10
432 00:34:25.562728 RxClkDly_Margin_A1==88 ps 9
433 00:34:25.563354 TxDqDly_Margin_A1==98 ps 10
434 00:34:25.563905 TrainedVREFDQ_A0==74
435 00:34:25.568324 TrainedVREFDQ_A1==74
436 00:34:25.568952 VrefDac_Margin_A0==25
437 00:34:25.569505 DeviceVref_Margin_A0==40
438 00:34:25.573901 VrefDac_Margin_A1==25
439 00:34:25.574524 DeviceVref_Margin_A1==40
440 00:34:25.575076
441 00:34:25.575623
442 00:34:25.579577 channel==1
443 00:34:25.580231 RxClkDly_Margin_A0==98 ps 10
444 00:34:25.580788 TxDqDly_Margin_A0==88 ps 9
445 00:34:25.585147 RxClkDly_Margin_A1==98 ps 10
446 00:34:25.585793 TxDqDly_Margin_A1==98 ps 10
447 00:34:25.590723 TrainedVREFDQ_A0==77
448 00:34:25.591357 TrainedVREFDQ_A1==77
449 00:34:25.591908 VrefDac_Margin_A0==22
450 00:34:25.596334 DeviceVref_Margin_A0==37
451 00:34:25.596968 VrefDac_Margin_A1==22
452 00:34:25.601910 DeviceVref_Margin_A1==37
453 00:34:25.602557
454 00:34:25.603123 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:34:25.607601
456 00:34:25.635530 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 00:34:25.636302 2D training succeed
458 00:34:25.641109 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:34:25.646710 auto size-- 65535DDR cs0 size: 2048MB
460 00:34:25.647341 DDR cs1 size: 2048MB
461 00:34:25.652341 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:34:25.652972 cs0 DataBus test pass
463 00:34:25.657925 cs1 DataBus test pass
464 00:34:25.658549 cs0 AddrBus test pass
465 00:34:25.659106 cs1 AddrBus test pass
466 00:34:25.659643
467 00:34:25.663577 100bdlr_step_size ps== 420
468 00:34:25.664254 result report
469 00:34:25.669115 boot times 0Enable ddr reg access
470 00:34:25.674654 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:34:25.688021 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 00:34:26.261824 0.0;M3 CHK:0;cm4_sp_mode 0
473 00:34:26.262649 MVN_1=0x00000000
474 00:34:26.267218 MVN_2=0x00000000
475 00:34:26.272986 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 00:34:26.273624 OPS=0x10
477 00:34:26.274193 ring efuse init
478 00:34:26.274727 chipver efuse init
479 00:34:26.278626 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 00:34:26.284205 [0.018961 Inits done]
481 00:34:26.284839 secure task start!
482 00:34:26.285394 high task start!
483 00:34:26.288771 low task start!
484 00:34:26.289400 run into bl31
485 00:34:26.295451 NOTICE: BL31: v1.3(release):4fc40b1
486 00:34:26.302245 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 00:34:26.302885 NOTICE: BL31: G12A normal boot!
488 00:34:26.328625 NOTICE: BL31: BL33 decompress pass
489 00:34:26.333285 ERROR: Error initializing runtime service opteed_fast
490 00:34:27.567169
491 00:34:27.567969
492 00:34:27.575555 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 00:34:27.576236
494 00:34:27.576815 Model: Libre Computer AML-A311D-CC Alta
495 00:34:27.784026 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 00:34:27.807361 DRAM: 2 GiB (effective 3.8 GiB)
497 00:34:27.950379 Core: 408 devices, 31 uclasses, devicetree: separate
498 00:34:27.956258 WDT: Not starting watchdog@f0d0
499 00:34:27.988479 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 00:34:28.000877 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 00:34:28.005914 ** Bad device specification mmc 0 **
502 00:34:28.016300 Card did not respond to voltage select! : -110
503 00:34:28.023935 ** Bad device specification mmc 0 **
504 00:34:28.024609 Couldn't find partition mmc 0
505 00:34:28.032256 Card did not respond to voltage select! : -110
506 00:34:28.037859 ** Bad device specification mmc 0 **
507 00:34:28.038495 Couldn't find partition mmc 0
508 00:34:28.041945 Error: could not access storage.
509 00:34:29.306049 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 00:34:29.306861 bl2_stage_init 0x01
511 00:34:29.307450 bl2_stage_init 0x81
512 00:34:29.311651 hw id: 0x0000 - pwm id 0x01
513 00:34:29.312329 bl2_stage_init 0xc1
514 00:34:29.312895 bl2_stage_init 0x02
515 00:34:29.313445
516 00:34:29.317240 L0:00000000
517 00:34:29.317870 L1:20000703
518 00:34:29.318421 L2:00008067
519 00:34:29.318965 L3:14000000
520 00:34:29.322838 B2:00402000
521 00:34:29.323465 B1:e0f83180
522 00:34:29.324057
523 00:34:29.324620 TE: 58159
524 00:34:29.325165
525 00:34:29.328429 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 00:34:29.329057
527 00:34:29.329612 Board ID = 1
528 00:34:29.334055 Set A53 clk to 24M
529 00:34:29.334695 Set A73 clk to 24M
530 00:34:29.335290 Set clk81 to 24M
531 00:34:29.339625 A53 clk: 1200 MHz
532 00:34:29.340278 A73 clk: 1200 MHz
533 00:34:29.340829 CLK81: 166.6M
534 00:34:29.341377 smccc: 00012ab5
535 00:34:29.345231 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 00:34:29.350836 board id: 1
537 00:34:29.356684 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 00:34:29.367348 fw parse done
539 00:34:29.373348 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 00:34:29.415931 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 00:34:29.426839 PIEI prepare done
542 00:34:29.427468 fastboot data load
543 00:34:29.428069 fastboot data verify
544 00:34:29.432534 verify result: 266
545 00:34:29.438096 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 00:34:29.438713 LPDDR4 probe
547 00:34:29.439263 ddr clk to 1584MHz
548 00:34:29.446175 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 00:34:29.483314
550 00:34:29.483964 dmc_version 0001
551 00:34:29.490083 Check phy result
552 00:34:29.495906 INFO : End of CA training
553 00:34:29.496547 INFO : End of initialization
554 00:34:29.501514 INFO : Training has run successfully!
555 00:34:29.502139 Check phy result
556 00:34:29.507114 INFO : End of initialization
557 00:34:29.507717 INFO : End of read enable training
558 00:34:29.512687 INFO : End of fine write leveling
559 00:34:29.518276 INFO : End of Write leveling coarse delay
560 00:34:29.518884 INFO : Training has run successfully!
561 00:34:29.519435 Check phy result
562 00:34:29.523866 INFO : End of initialization
563 00:34:29.524533 INFO : End of read dq deskew training
564 00:34:29.529485 INFO : End of MPR read delay center optimization
565 00:34:29.535105 INFO : End of write delay center optimization
566 00:34:29.540670 INFO : End of read delay center optimization
567 00:34:29.541288 INFO : End of max read latency training
568 00:34:29.546294 INFO : Training has run successfully!
569 00:34:29.546892 1D training succeed
570 00:34:29.555403 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 00:34:29.603032 Check phy result
572 00:34:29.603675 INFO : End of initialization
573 00:34:29.624798 INFO : End of 2D read delay Voltage center optimization
574 00:34:29.644230 INFO : End of 2D read delay Voltage center optimization
575 00:34:29.696234 INFO : End of 2D write delay Voltage center optimization
576 00:34:29.745589 INFO : End of 2D write delay Voltage center optimization
577 00:34:29.751206 INFO : Training has run successfully!
578 00:34:29.751833
579 00:34:29.752443 channel==0
580 00:34:29.756783 RxClkDly_Margin_A0==88 ps 9
581 00:34:29.757386 TxDqDly_Margin_A0==98 ps 10
582 00:34:29.762352 RxClkDly_Margin_A1==88 ps 9
583 00:34:29.762953 TxDqDly_Margin_A1==98 ps 10
584 00:34:29.763514 TrainedVREFDQ_A0==74
585 00:34:29.767968 TrainedVREFDQ_A1==74
586 00:34:29.768608 VrefDac_Margin_A0==25
587 00:34:29.769155 DeviceVref_Margin_A0==40
588 00:34:29.773564 VrefDac_Margin_A1==25
589 00:34:29.774169 DeviceVref_Margin_A1==40
590 00:34:29.774717
591 00:34:29.775261
592 00:34:29.779192 channel==1
593 00:34:29.779791 RxClkDly_Margin_A0==88 ps 9
594 00:34:29.780379 TxDqDly_Margin_A0==98 ps 10
595 00:34:29.784763 RxClkDly_Margin_A1==88 ps 9
596 00:34:29.785373 TxDqDly_Margin_A1==88 ps 9
597 00:34:29.790370 TrainedVREFDQ_A0==77
598 00:34:29.790989 TrainedVREFDQ_A1==77
599 00:34:29.791541 VrefDac_Margin_A0==23
600 00:34:29.795959 DeviceVref_Margin_A0==37
601 00:34:29.796605 VrefDac_Margin_A1==24
602 00:34:29.801564 DeviceVref_Margin_A1==37
603 00:34:29.802171
604 00:34:29.802723 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 00:34:29.803262
606 00:34:29.835137 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
607 00:34:29.835786 2D training succeed
608 00:34:29.840784 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 00:34:29.846336 auto size-- 65535DDR cs0 size: 2048MB
610 00:34:29.846956 DDR cs1 size: 2048MB
611 00:34:29.851958 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 00:34:29.852604 cs0 DataBus test pass
613 00:34:29.857577 cs1 DataBus test pass
614 00:34:29.858189 cs0 AddrBus test pass
615 00:34:29.858734 cs1 AddrBus test pass
616 00:34:29.859267
617 00:34:29.863143 100bdlr_step_size ps== 420
618 00:34:29.863765 result report
619 00:34:29.868764 boot times 0Enable ddr reg access
620 00:34:29.874024 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 00:34:29.887487 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 00:34:30.461290 0.0;M3 CHK:0;cm4_sp_mode 0
623 00:34:30.462065 MVN_1=0x00000000
624 00:34:30.466767 MVN_2=0x00000000
625 00:34:30.472534 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 00:34:30.473205 OPS=0x10
627 00:34:30.473814 ring efuse init
628 00:34:30.474409 chipver efuse init
629 00:34:30.478120 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 00:34:30.483727 [0.018960 Inits done]
631 00:34:30.484443 secure task start!
632 00:34:30.484963 high task start!
633 00:34:30.488476 low task start!
634 00:34:30.489078 run into bl31
635 00:34:30.495018 NOTICE: BL31: v1.3(release):4fc40b1
636 00:34:30.502900 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 00:34:30.503526 NOTICE: BL31: G12A normal boot!
638 00:34:30.528106 NOTICE: BL31: BL33 decompress pass
639 00:34:30.533892 ERROR: Error initializing runtime service opteed_fast
640 00:34:31.767007
641 00:34:31.767787
642 00:34:31.775271 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 00:34:31.775929
644 00:34:31.776531 Model: Libre Computer AML-A311D-CC Alta
645 00:34:31.983791 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 00:34:32.007073 DRAM: 2 GiB (effective 3.8 GiB)
647 00:34:32.149913 Core: 408 devices, 31 uclasses, devicetree: separate
648 00:34:32.155815 WDT: Not starting watchdog@f0d0
649 00:34:32.189377 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 00:34:32.200479 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 00:34:32.205697 ** Bad device specification mmc 0 **
652 00:34:32.215877 Card did not respond to voltage select! : -110
653 00:34:32.223673 ** Bad device specification mmc 0 **
654 00:34:32.224380 Couldn't find partition mmc 0
655 00:34:32.231871 Card did not respond to voltage select! : -110
656 00:34:32.237332 ** Bad device specification mmc 0 **
657 00:34:32.237975 Couldn't find partition mmc 0
658 00:34:32.242450 Error: could not access storage.
659 00:34:32.586268 Net: eth0: ethernet@ff3f0000
660 00:34:32.586980 starting USB...
661 00:34:32.838260 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 00:34:32.838970 Starting the controller
663 00:34:32.845152 USB XHCI 1.10
664 00:34:34.555203 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 00:34:34.556142 bl2_stage_init 0x81
666 00:34:34.560701 hw id: 0x0000 - pwm id 0x01
667 00:34:34.561335 bl2_stage_init 0xc1
668 00:34:34.561891 bl2_stage_init 0x02
669 00:34:34.562434
670 00:34:34.566296 L0:00000000
671 00:34:34.566923 L1:20000703
672 00:34:34.567471 L2:00008067
673 00:34:34.568043 L3:14000000
674 00:34:34.568591 B2:00402000
675 00:34:34.572018 B1:e0f83180
676 00:34:34.572641
677 00:34:34.573216 TE: 58150
678 00:34:34.573771
679 00:34:34.577574 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 00:34:34.578195
681 00:34:34.578746 Board ID = 1
682 00:34:34.583127 Set A53 clk to 24M
683 00:34:34.583738 Set A73 clk to 24M
684 00:34:34.584327 Set clk81 to 24M
685 00:34:34.588724 A53 clk: 1200 MHz
686 00:34:34.589340 A73 clk: 1200 MHz
687 00:34:34.589902 CLK81: 166.6M
688 00:34:34.590442 smccc: 00012aac
689 00:34:34.594296 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 00:34:34.600015 board id: 1
691 00:34:34.605628 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:34:34.616363 fw parse done
693 00:34:34.622313 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 00:34:34.664822 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 00:34:34.675810 PIEI prepare done
696 00:34:34.676520 fastboot data load
697 00:34:34.677098 fastboot data verify
698 00:34:34.681250 verify result: 266
699 00:34:34.686840 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 00:34:34.687452 LPDDR4 probe
701 00:34:34.688026 ddr clk to 1584MHz
702 00:34:34.694067 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 00:34:34.731508
704 00:34:34.732296 dmc_version 0001
705 00:34:34.738201 Check phy result
706 00:34:34.744890 INFO : End of CA training
707 00:34:34.745548 INFO : End of initialization
708 00:34:34.750357 INFO : Training has run successfully!
709 00:34:34.750878 Check phy result
710 00:34:34.756110 INFO : End of initialization
711 00:34:34.756632 INFO : End of read enable training
712 00:34:34.759297 INFO : End of fine write leveling
713 00:34:34.764945 INFO : End of Write leveling coarse delay
714 00:34:34.770348 INFO : Training has run successfully!
715 00:34:34.770849 Check phy result
716 00:34:34.771272 INFO : End of initialization
717 00:34:34.775922 INFO : End of read dq deskew training
718 00:34:34.779317 INFO : End of MPR read delay center optimization
719 00:34:34.784902 INFO : End of write delay center optimization
720 00:34:34.790496 INFO : End of read delay center optimization
721 00:34:34.790970 INFO : End of max read latency training
722 00:34:34.796116 INFO : Training has run successfully!
723 00:34:34.796591 1D training succeed
724 00:34:34.803668 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 00:34:34.851087 Check phy result
726 00:34:34.851580 INFO : End of initialization
727 00:34:34.872512 INFO : End of 2D read delay Voltage center optimization
728 00:34:34.892678 INFO : End of 2D read delay Voltage center optimization
729 00:34:34.944580 INFO : End of 2D write delay Voltage center optimization
730 00:34:34.994729 INFO : End of 2D write delay Voltage center optimization
731 00:34:35.000367 INFO : Training has run successfully!
732 00:34:35.000847
733 00:34:35.001271 channel==0
734 00:34:35.005944 RxClkDly_Margin_A0==88 ps 9
735 00:34:35.006432 TxDqDly_Margin_A0==98 ps 10
736 00:34:35.011479 RxClkDly_Margin_A1==88 ps 9
737 00:34:35.011949 TxDqDly_Margin_A1==98 ps 10
738 00:34:35.012412 TrainedVREFDQ_A0==74
739 00:34:35.017060 TrainedVREFDQ_A1==74
740 00:34:35.017535 VrefDac_Margin_A0==25
741 00:34:35.017967 DeviceVref_Margin_A0==40
742 00:34:35.022694 VrefDac_Margin_A1==25
743 00:34:35.023161 DeviceVref_Margin_A1==40
744 00:34:35.023577
745 00:34:35.024019
746 00:34:35.028280 channel==1
747 00:34:35.028753 RxClkDly_Margin_A0==88 ps 9
748 00:34:35.029184 TxDqDly_Margin_A0==88 ps 9
749 00:34:35.033902 RxClkDly_Margin_A1==98 ps 10
750 00:34:35.034374 TxDqDly_Margin_A1==88 ps 9
751 00:34:35.039468 TrainedVREFDQ_A0==77
752 00:34:35.039938 TrainedVREFDQ_A1==77
753 00:34:35.040394 VrefDac_Margin_A0==22
754 00:34:35.045044 DeviceVref_Margin_A0==37
755 00:34:35.045512 VrefDac_Margin_A1==22
756 00:34:35.050674 DeviceVref_Margin_A1==37
757 00:34:35.051142
758 00:34:35.051557 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 00:34:35.051966
760 00:34:35.084278 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
761 00:34:35.084789 2D training succeed
762 00:34:35.089912 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 00:34:35.095422 auto size-- 65535DDR cs0 size: 2048MB
764 00:34:35.095917 DDR cs1 size: 2048MB
765 00:34:35.101051 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 00:34:35.101527 cs0 DataBus test pass
767 00:34:35.106690 cs1 DataBus test pass
768 00:34:35.107160 cs0 AddrBus test pass
769 00:34:35.107574 cs1 AddrBus test pass
770 00:34:35.107976
771 00:34:35.112268 100bdlr_step_size ps== 420
772 00:34:35.112758 result report
773 00:34:35.117930 boot times 0Enable ddr reg access
774 00:34:35.123173 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 00:34:35.135651 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 00:34:35.708605 0.0;M3 CHK:0;cm4_sp_mode 0
777 00:34:35.709199 MVN_1=0x00000000
778 00:34:35.714074 MVN_2=0x00000000
779 00:34:35.719919 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 00:34:35.720470 OPS=0x10
781 00:34:35.720891 ring efuse init
782 00:34:35.721288 chipver efuse init
783 00:34:35.728083 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 00:34:35.728569 [0.018961 Inits done]
785 00:34:35.728964 secure task start!
786 00:34:35.735610 high task start!
787 00:34:35.736101 low task start!
788 00:34:35.736503 run into bl31
789 00:34:35.742234 NOTICE: BL31: v1.3(release):4fc40b1
790 00:34:35.750001 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 00:34:35.750466 NOTICE: BL31: G12A normal boot!
792 00:34:35.775446 NOTICE: BL31: BL33 decompress pass
793 00:34:35.781162 ERROR: Error initializing runtime service opteed_fast
794 00:34:37.014037
795 00:34:37.014675
796 00:34:37.022453 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 00:34:37.023008
798 00:34:37.023432 Model: Libre Computer AML-A311D-CC Alta
799 00:34:37.230889 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 00:34:37.254313 DRAM: 2 GiB (effective 3.8 GiB)
801 00:34:37.397346 Core: 408 devices, 31 uclasses, devicetree: separate
802 00:34:37.403091 WDT: Not starting watchdog@f0d0
803 00:34:37.435295 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 00:34:37.447737 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 00:34:37.452711 ** Bad device specification mmc 0 **
806 00:34:37.463128 Card did not respond to voltage select! : -110
807 00:34:37.470711 ** Bad device specification mmc 0 **
808 00:34:37.471180 Couldn't find partition mmc 0
809 00:34:37.479152 Card did not respond to voltage select! : -110
810 00:34:37.484571 ** Bad device specification mmc 0 **
811 00:34:37.485036 Couldn't find partition mmc 0
812 00:34:37.489647 Error: could not access storage.
813 00:34:37.832067 Net: eth0: ethernet@ff3f0000
814 00:34:37.832584 starting USB...
815 00:34:38.083896 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 00:34:38.084437 Starting the controller
817 00:34:38.090866 USB XHCI 1.10
818 00:34:40.255101 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 00:34:40.255695 bl2_stage_init 0x01
820 00:34:40.256169 bl2_stage_init 0x81
821 00:34:40.260719 hw id: 0x0000 - pwm id 0x01
822 00:34:40.261185 bl2_stage_init 0xc1
823 00:34:40.261603 bl2_stage_init 0x02
824 00:34:40.262005
825 00:34:40.266149 L0:00000000
826 00:34:40.266615 L1:20000703
827 00:34:40.267025 L2:00008067
828 00:34:40.267425 L3:14000000
829 00:34:40.271855 B2:00402000
830 00:34:40.272343 B1:e0f83180
831 00:34:40.272759
832 00:34:40.273166 TE: 58159
833 00:34:40.273568
834 00:34:40.277422 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 00:34:40.277893
836 00:34:40.278310 Board ID = 1
837 00:34:40.282977 Set A53 clk to 24M
838 00:34:40.283439 Set A73 clk to 24M
839 00:34:40.283851 Set clk81 to 24M
840 00:34:40.288654 A53 clk: 1200 MHz
841 00:34:40.289115 A73 clk: 1200 MHz
842 00:34:40.289528 CLK81: 166.6M
843 00:34:40.289936 smccc: 00012ab5
844 00:34:40.294199 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 00:34:40.299819 board id: 1
846 00:34:40.305755 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 00:34:40.316417 fw parse done
848 00:34:40.322288 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 00:34:40.364915 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 00:34:40.375764 PIEI prepare done
851 00:34:40.376267 fastboot data load
852 00:34:40.376688 fastboot data verify
853 00:34:40.381447 verify result: 266
854 00:34:40.387039 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 00:34:40.387500 LPDDR4 probe
856 00:34:40.387914 ddr clk to 1584MHz
857 00:34:40.395058 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 00:34:40.432303
859 00:34:40.432766 dmc_version 0001
860 00:34:40.438971 Check phy result
861 00:34:40.444813 INFO : End of CA training
862 00:34:40.445276 INFO : End of initialization
863 00:34:40.450396 INFO : Training has run successfully!
864 00:34:40.450856 Check phy result
865 00:34:40.456020 INFO : End of initialization
866 00:34:40.456487 INFO : End of read enable training
867 00:34:40.461664 INFO : End of fine write leveling
868 00:34:40.467248 INFO : End of Write leveling coarse delay
869 00:34:40.467708 INFO : Training has run successfully!
870 00:34:40.468156 Check phy result
871 00:34:40.472837 INFO : End of initialization
872 00:34:40.473293 INFO : End of read dq deskew training
873 00:34:40.478440 INFO : End of MPR read delay center optimization
874 00:34:40.484082 INFO : End of write delay center optimization
875 00:34:40.489695 INFO : End of read delay center optimization
876 00:34:40.490151 INFO : End of max read latency training
877 00:34:40.495260 INFO : Training has run successfully!
878 00:34:40.495724 1D training succeed
879 00:34:40.504403 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 00:34:40.552062 Check phy result
881 00:34:40.552529 INFO : End of initialization
882 00:34:40.573824 INFO : End of 2D read delay Voltage center optimization
883 00:34:40.593203 INFO : End of 2D read delay Voltage center optimization
884 00:34:40.645239 INFO : End of 2D write delay Voltage center optimization
885 00:34:40.694640 INFO : End of 2D write delay Voltage center optimization
886 00:34:40.700256 INFO : Training has run successfully!
887 00:34:40.700721
888 00:34:40.701136 channel==0
889 00:34:40.705808 RxClkDly_Margin_A0==88 ps 9
890 00:34:40.706269 TxDqDly_Margin_A0==98 ps 10
891 00:34:40.711432 RxClkDly_Margin_A1==88 ps 9
892 00:34:40.711891 TxDqDly_Margin_A1==88 ps 9
893 00:34:40.712362 TrainedVREFDQ_A0==74
894 00:34:40.717079 TrainedVREFDQ_A1==74
895 00:34:40.717556 VrefDac_Margin_A0==25
896 00:34:40.717955 DeviceVref_Margin_A0==40
897 00:34:40.722588 VrefDac_Margin_A1==25
898 00:34:40.723061 DeviceVref_Margin_A1==40
899 00:34:40.723454
900 00:34:40.723843
901 00:34:40.724276 channel==1
902 00:34:40.728252 RxClkDly_Margin_A0==88 ps 9
903 00:34:40.728710 TxDqDly_Margin_A0==98 ps 10
904 00:34:40.733818 RxClkDly_Margin_A1==88 ps 9
905 00:34:40.734272 TxDqDly_Margin_A1==88 ps 9
906 00:34:40.739498 TrainedVREFDQ_A0==77
907 00:34:40.739965 TrainedVREFDQ_A1==77
908 00:34:40.740397 VrefDac_Margin_A0==23
909 00:34:40.744924 DeviceVref_Margin_A0==37
910 00:34:40.745375 VrefDac_Margin_A1==24
911 00:34:40.750570 DeviceVref_Margin_A1==37
912 00:34:40.751030
913 00:34:40.751425 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 00:34:40.751815
915 00:34:40.784193 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
916 00:34:40.784677 2D training succeed
917 00:34:40.789751 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 00:34:40.795232 auto size-- 65535DDR cs0 size: 2048MB
919 00:34:40.795685 DDR cs1 size: 2048MB
920 00:34:40.800843 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 00:34:40.801292 cs0 DataBus test pass
922 00:34:40.806428 cs1 DataBus test pass
923 00:34:40.806875 cs0 AddrBus test pass
924 00:34:40.807265 cs1 AddrBus test pass
925 00:34:40.807648
926 00:34:40.812084 100bdlr_step_size ps== 420
927 00:34:40.812546 result report
928 00:34:40.817655 boot times 0Enable ddr reg access
929 00:34:40.822837 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 00:34:40.836274 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 00:34:41.409354 0.0;M3 CHK:0;cm4_sp_mode 0
932 00:34:41.409860 MVN_1=0x00000000
933 00:34:41.414864 MVN_2=0x00000000
934 00:34:41.420689 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 00:34:41.421154 OPS=0x10
936 00:34:41.421571 ring efuse init
937 00:34:41.421972 chipver efuse init
938 00:34:41.426235 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 00:34:41.431804 [0.018961 Inits done]
940 00:34:41.432303 secure task start!
941 00:34:41.432721 high task start!
942 00:34:41.436398 low task start!
943 00:34:41.436859 run into bl31
944 00:34:41.443038 NOTICE: BL31: v1.3(release):4fc40b1
945 00:34:41.450847 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 00:34:41.451315 NOTICE: BL31: G12A normal boot!
947 00:34:41.476202 NOTICE: BL31: BL33 decompress pass
948 00:34:41.480904 ERROR: Error initializing runtime service opteed_fast
949 00:34:42.714793
950 00:34:42.715495
951 00:34:42.723165 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 00:34:42.723792
953 00:34:42.724365 Model: Libre Computer AML-A311D-CC Alta
954 00:34:42.931497 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 00:34:42.954988 DRAM: 2 GiB (effective 3.8 GiB)
956 00:34:43.098002 Core: 408 devices, 31 uclasses, devicetree: separate
957 00:34:43.103850 WDT: Not starting watchdog@f0d0
958 00:34:43.136178 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 00:34:43.148539 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 00:34:43.153520 ** Bad device specification mmc 0 **
961 00:34:43.163948 Card did not respond to voltage select! : -110
962 00:34:43.171519 ** Bad device specification mmc 0 **
963 00:34:43.172113 Couldn't find partition mmc 0
964 00:34:43.179998 Card did not respond to voltage select! : -110
965 00:34:43.185376 ** Bad device specification mmc 0 **
966 00:34:43.185926 Couldn't find partition mmc 0
967 00:34:43.190441 Error: could not access storage.
968 00:34:43.532088 Net: eth0: ethernet@ff3f0000
969 00:34:43.532773 starting USB...
970 00:34:43.784662 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 00:34:43.785256 Starting the controller
972 00:34:43.790862 USB XHCI 1.10
973 00:34:45.345789 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 00:34:45.354172 scanning usb for storage devices... 0 Storage Device(s) found
976 00:34:45.406032 Hit any key to stop autoboot: 1
977 00:34:45.407049 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
978 00:34:45.407662 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
979 00:34:45.408211 Setting prompt string to ['=>']
980 00:34:45.408702 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 00:34:45.420740 0
982 00:34:45.421671 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 00:34:45.422401 Sending with 10 millisecond of delay
985 00:34:46.557686 => setenv autoload no
986 00:34:46.568466 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 00:34:46.573516 setenv autoload no
988 00:34:46.574250 Sending with 10 millisecond of delay
990 00:34:48.372721 => setenv initrd_high 0xffffffff
991 00:34:48.384051 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
992 00:34:48.385509 setenv initrd_high 0xffffffff
993 00:34:48.386623 Sending with 10 millisecond of delay
995 00:34:50.004534 => setenv fdt_high 0xffffffff
996 00:34:50.015343 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 00:34:50.016282 setenv fdt_high 0xffffffff
998 00:34:50.017057 Sending with 10 millisecond of delay
1000 00:34:50.308940 => dhcp
1001 00:34:50.319772 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1002 00:34:50.320712 dhcp
1003 00:34:50.321200 Speed: 1000, full duplex
1004 00:34:50.321660 BOOTP broadcast 1
1005 00:34:50.567329 BOOTP broadcast 2
1006 00:34:51.067929 BOOTP broadcast 3
1007 00:34:51.079951 DHCP client bound to address 192.168.6.33 (761 ms)
1008 00:34:51.080762 Sending with 10 millisecond of delay
1010 00:34:52.757532 => setenv serverip 192.168.6.2
1011 00:34:52.768378 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1012 00:34:52.769347 setenv serverip 192.168.6.2
1013 00:34:52.770107 Sending with 10 millisecond of delay
1015 00:34:56.494187 => tftpboot 0x01080000 713248/tftp-deploy-9aa9ve0h/kernel/uImage
1016 00:34:56.505203 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1017 00:34:56.505748 tftpboot 0x01080000 713248/tftp-deploy-9aa9ve0h/kernel/uImage
1018 00:34:56.505988 Speed: 1000, full duplex
1019 00:34:56.506219 Using ethernet@ff3f0000 device
1020 00:34:56.507912 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1021 00:34:56.513349 Filename '713248/tftp-deploy-9aa9ve0h/kernel/uImage'.
1022 00:34:56.517096 Load address: 0x1080000
1023 00:34:59.007771 Loading: *################################################## 35.7 MiB
1024 00:34:59.008535 14.3 MiB/s
1025 00:34:59.009089 done
1026 00:34:59.012174 Bytes transferred = 37407296 (23aca40 hex)
1027 00:34:59.013015 Sending with 10 millisecond of delay
1029 00:35:03.704558 => tftpboot 0x08000000 713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot
1030 00:35:03.715377 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1031 00:35:03.716286 tftpboot 0x08000000 713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot
1032 00:35:03.716775 Speed: 1000, full duplex
1033 00:35:03.717225 Using ethernet@ff3f0000 device
1034 00:35:03.718179 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1035 00:35:03.730061 Filename '713248/tftp-deploy-9aa9ve0h/ramdisk/ramdisk.cpio.gz.uboot'.
1036 00:35:03.730580 Load address: 0x8000000
1037 00:35:05.274329 Loading: * UDP wrong checksum 000000ff 00003ff9
1038 00:35:05.293050 UDP wrong checksum 000000ff 0000d1eb
1039 00:35:11.054953 T ################################################# UDP wrong checksum 00000005 0000f75a
1040 00:35:16.055940 T UDP wrong checksum 00000005 0000f75a
1041 00:35:26.057934 T T UDP wrong checksum 00000005 0000f75a
1042 00:35:30.769411 UDP wrong checksum 000000ff 00009acc
1043 00:35:30.780248 UDP wrong checksum 000000ff 000031bf
1044 00:35:46.061002 T T T T UDP wrong checksum 00000005 0000f75a
1045 00:36:00.252524 T T UDP wrong checksum 000000ff 0000b9c5
1046 00:36:00.261685 UDP wrong checksum 000000ff 00003cb8
1047 00:36:01.066227
1048 00:36:01.066919 Retry count exceeded; starting again
1050 00:36:01.068590 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1053 00:36:01.070752 end: 2.4 uboot-commands (duration 00:01:47) [common]
1055 00:36:01.072409 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1057 00:36:01.073663 end: 2 uboot-action (duration 00:01:47) [common]
1059 00:36:01.075455 Cleaning after the job
1060 00:36:01.076126 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/ramdisk
1061 00:36:01.077620 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/kernel
1062 00:36:01.121782 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/dtb
1063 00:36:01.123161 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/nfsrootfs
1064 00:36:01.295036 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713248/tftp-deploy-9aa9ve0h/modules
1065 00:36:01.317646 start: 4.1 power-off (timeout 00:00:30) [common]
1066 00:36:01.318348 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1067 00:36:01.351360 >> OK - accepted request
1068 00:36:01.353554 Returned 0 in 0 seconds
1069 00:36:01.454305 end: 4.1 power-off (duration 00:00:00) [common]
1071 00:36:01.455287 start: 4.2 read-feedback (timeout 00:10:00) [common]
1072 00:36:01.455959 Listened to connection for namespace 'common' for up to 1s
1073 00:36:02.456123 Finalising connection for namespace 'common'
1074 00:36:02.456925 Disconnecting from shell: Finalise
1075 00:36:02.457510 =>
1076 00:36:02.558602 end: 4.2 read-feedback (duration 00:00:01) [common]
1077 00:36:02.559338 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/713248
1078 00:36:05.766950 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/713248
1079 00:36:05.767576 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.