Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:41:58.795224 lava-dispatcher, installed at version: 2024.01
2 01:41:58.796069 start: 0 validate
3 01:41:58.796552 Start time: 2024-09-06 01:41:58.796521+00:00 (UTC)
4 01:41:58.797117 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:41:58.797657 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:41:58.833939 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:41:58.834539 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 01:41:58.868137 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:41:58.868776 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:41:58.900349 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:41:58.900852 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:41:58.933561 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:41:58.934061 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 01:41:58.972198 validate duration: 0.18
16 01:41:58.973010 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:41:58.973356 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:41:58.973667 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:41:58.974280 Not decompressing ramdisk as can be used compressed.
20 01:41:58.974738 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:41:58.975025 saving as /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/ramdisk/initrd.cpio.gz
22 01:41:58.975311 total size: 5628169 (5 MB)
23 01:41:59.011113 progress 0 % (0 MB)
24 01:41:59.018388 progress 5 % (0 MB)
25 01:41:59.026431 progress 10 % (0 MB)
26 01:41:59.032842 progress 15 % (0 MB)
27 01:41:59.037108 progress 20 % (1 MB)
28 01:41:59.040812 progress 25 % (1 MB)
29 01:41:59.044855 progress 30 % (1 MB)
30 01:41:59.048911 progress 35 % (1 MB)
31 01:41:59.052648 progress 40 % (2 MB)
32 01:41:59.056693 progress 45 % (2 MB)
33 01:41:59.060386 progress 50 % (2 MB)
34 01:41:59.064565 progress 55 % (2 MB)
35 01:41:59.068725 progress 60 % (3 MB)
36 01:41:59.072705 progress 65 % (3 MB)
37 01:41:59.076883 progress 70 % (3 MB)
38 01:41:59.080731 progress 75 % (4 MB)
39 01:41:59.084835 progress 80 % (4 MB)
40 01:41:59.088518 progress 85 % (4 MB)
41 01:41:59.092680 progress 90 % (4 MB)
42 01:41:59.096575 progress 95 % (5 MB)
43 01:41:59.099952 progress 100 % (5 MB)
44 01:41:59.100665 5 MB downloaded in 0.13 s (42.83 MB/s)
45 01:41:59.101207 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:41:59.102138 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:41:59.102449 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:41:59.102732 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:41:59.103214 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/kernel/Image
51 01:41:59.103471 saving as /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/kernel/Image
52 01:41:59.103690 total size: 37407232 (35 MB)
53 01:41:59.103908 No compression specified
54 01:41:59.139904 progress 0 % (0 MB)
55 01:41:59.163668 progress 5 % (1 MB)
56 01:41:59.187350 progress 10 % (3 MB)
57 01:41:59.211399 progress 15 % (5 MB)
58 01:41:59.235192 progress 20 % (7 MB)
59 01:41:59.258633 progress 25 % (8 MB)
60 01:41:59.282561 progress 30 % (10 MB)
61 01:41:59.306415 progress 35 % (12 MB)
62 01:41:59.329678 progress 40 % (14 MB)
63 01:41:59.353164 progress 45 % (16 MB)
64 01:41:59.376857 progress 50 % (17 MB)
65 01:41:59.400594 progress 55 % (19 MB)
66 01:41:59.424066 progress 60 % (21 MB)
67 01:41:59.448086 progress 65 % (23 MB)
68 01:41:59.471258 progress 70 % (25 MB)
69 01:41:59.494872 progress 75 % (26 MB)
70 01:41:59.518541 progress 80 % (28 MB)
71 01:41:59.541949 progress 85 % (30 MB)
72 01:41:59.565397 progress 90 % (32 MB)
73 01:41:59.589349 progress 95 % (33 MB)
74 01:41:59.612355 progress 100 % (35 MB)
75 01:41:59.613040 35 MB downloaded in 0.51 s (70.04 MB/s)
76 01:41:59.613539 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:41:59.614390 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:41:59.614688 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:41:59.614968 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:41:59.615453 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:41:59.615734 saving as /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:41:59.615957 total size: 53173 (0 MB)
84 01:41:59.616202 No compression specified
85 01:41:59.656947 progress 61 % (0 MB)
86 01:41:59.657801 progress 100 % (0 MB)
87 01:41:59.658334 0 MB downloaded in 0.04 s (1.20 MB/s)
88 01:41:59.658825 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:41:59.659640 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:41:59.659907 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:41:59.660221 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:41:59.660672 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:41:59.660915 saving as /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/nfsrootfs/full.rootfs.tar
95 01:41:59.661120 total size: 120894716 (115 MB)
96 01:41:59.661334 Using unxz to decompress xz
97 01:41:59.700559 progress 0 % (0 MB)
98 01:42:00.561334 progress 5 % (5 MB)
99 01:42:01.392705 progress 10 % (11 MB)
100 01:42:02.180791 progress 15 % (17 MB)
101 01:42:02.913018 progress 20 % (23 MB)
102 01:42:03.503637 progress 25 % (28 MB)
103 01:42:04.323687 progress 30 % (34 MB)
104 01:42:05.111736 progress 35 % (40 MB)
105 01:42:05.516955 progress 40 % (46 MB)
106 01:42:05.888404 progress 45 % (51 MB)
107 01:42:06.612839 progress 50 % (57 MB)
108 01:42:07.514153 progress 55 % (63 MB)
109 01:42:08.295590 progress 60 % (69 MB)
110 01:42:09.047231 progress 65 % (74 MB)
111 01:42:09.819824 progress 70 % (80 MB)
112 01:42:10.642748 progress 75 % (86 MB)
113 01:42:11.427701 progress 80 % (92 MB)
114 01:42:12.187472 progress 85 % (98 MB)
115 01:42:13.050075 progress 90 % (103 MB)
116 01:42:13.826466 progress 95 % (109 MB)
117 01:42:14.665294 progress 100 % (115 MB)
118 01:42:14.677813 115 MB downloaded in 15.02 s (7.68 MB/s)
119 01:42:14.678605 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:42:14.680492 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:42:14.681081 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:42:14.681655 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:42:14.682520 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/modules.tar.xz
125 01:42:14.683030 saving as /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/modules/modules.tar
126 01:42:14.683485 total size: 11642308 (11 MB)
127 01:42:14.683948 Using unxz to decompress xz
128 01:42:14.731230 progress 0 % (0 MB)
129 01:42:14.800596 progress 5 % (0 MB)
130 01:42:14.880025 progress 10 % (1 MB)
131 01:42:14.969956 progress 15 % (1 MB)
132 01:42:15.052017 progress 20 % (2 MB)
133 01:42:15.130112 progress 25 % (2 MB)
134 01:42:15.215672 progress 30 % (3 MB)
135 01:42:15.298110 progress 35 % (3 MB)
136 01:42:15.377881 progress 40 % (4 MB)
137 01:42:15.450962 progress 45 % (5 MB)
138 01:42:15.530266 progress 50 % (5 MB)
139 01:42:15.608174 progress 55 % (6 MB)
140 01:42:15.695434 progress 60 % (6 MB)
141 01:42:15.777297 progress 65 % (7 MB)
142 01:42:15.860137 progress 70 % (7 MB)
143 01:42:15.953391 progress 75 % (8 MB)
144 01:42:16.050941 progress 80 % (8 MB)
145 01:42:16.132614 progress 85 % (9 MB)
146 01:42:16.203362 progress 90 % (10 MB)
147 01:42:16.281455 progress 95 % (10 MB)
148 01:42:16.359917 progress 100 % (11 MB)
149 01:42:16.370805 11 MB downloaded in 1.69 s (6.58 MB/s)
150 01:42:16.371390 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:42:16.372485 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:42:16.373009 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 01:42:16.373525 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 01:42:33.060304 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/713245/extract-nfsrootfs-u9uq350x
156 01:42:33.060911 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 01:42:33.061198 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 01:42:33.061945 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy
159 01:42:33.062462 makedir: /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin
160 01:42:33.062811 makedir: /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/tests
161 01:42:33.063137 makedir: /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/results
162 01:42:33.063516 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-add-keys
163 01:42:33.064230 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-add-sources
164 01:42:33.064774 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-background-process-start
165 01:42:33.065279 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-background-process-stop
166 01:42:33.065799 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-common-functions
167 01:42:33.066293 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-echo-ipv4
168 01:42:33.066816 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-install-packages
169 01:42:33.067348 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-installed-packages
170 01:42:33.067836 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-os-build
171 01:42:33.068386 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-probe-channel
172 01:42:33.068951 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-probe-ip
173 01:42:33.069480 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-target-ip
174 01:42:33.069979 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-target-mac
175 01:42:33.070477 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-target-storage
176 01:42:33.070983 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-case
177 01:42:33.071475 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-event
178 01:42:33.071975 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-feedback
179 01:42:33.072507 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-raise
180 01:42:33.072990 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-reference
181 01:42:33.073475 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-runner
182 01:42:33.073974 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-set
183 01:42:33.074448 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-test-shell
184 01:42:33.074951 Updating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-add-keys (debian)
185 01:42:33.075497 Updating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-add-sources (debian)
186 01:42:33.076065 Updating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-install-packages (debian)
187 01:42:33.076595 Updating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-installed-packages (debian)
188 01:42:33.077097 Updating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/bin/lava-os-build (debian)
189 01:42:33.077536 Creating /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/environment
190 01:42:33.077921 LAVA metadata
191 01:42:33.078180 - LAVA_JOB_ID=713245
192 01:42:33.078393 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:42:33.078756 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 01:42:33.079704 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:42:33.080051 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 01:42:33.080268 skipped lava-vland-overlay
197 01:42:33.080510 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:42:33.080762 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 01:42:33.080978 skipped lava-multinode-overlay
200 01:42:33.081217 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:42:33.081465 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 01:42:33.081715 Loading test definitions
203 01:42:33.081990 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 01:42:33.082207 Using /lava-713245 at stage 0
205 01:42:33.083275 uuid=713245_1.6.2.4.1 testdef=None
206 01:42:33.083576 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:42:33.083837 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 01:42:33.085431 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:42:33.086216 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 01:42:33.088208 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:42:33.089034 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 01:42:33.090877 runner path: /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/0/tests/0_timesync-off test_uuid 713245_1.6.2.4.1
215 01:42:33.091446 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:42:33.092282 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 01:42:33.092507 Using /lava-713245 at stage 0
219 01:42:33.092860 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:42:33.093147 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/0/tests/1_kselftest-rtc'
221 01:42:36.484278 Running '/usr/bin/git checkout kernelci.org
222 01:42:36.883030 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 01:42:36.885539 uuid=713245_1.6.2.4.5 testdef=None
224 01:42:36.886217 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 01:42:36.887843 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 01:42:36.893880 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:42:36.895635 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 01:42:36.903725 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:42:36.905746 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 01:42:36.913740 runner path: /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/0/tests/1_kselftest-rtc test_uuid 713245_1.6.2.4.5
234 01:42:36.914330 BOARD='meson-sm1-s905d3-libretech-cc'
235 01:42:36.914777 BRANCH='mainline'
236 01:42:36.915208 SKIPFILE='/dev/null'
237 01:42:36.915640 SKIP_INSTALL='True'
238 01:42:36.916129 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/kselftest.tar.xz'
239 01:42:36.916580 TST_CASENAME=''
240 01:42:36.917010 TST_CMDFILES='rtc'
241 01:42:36.918079 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:42:36.919778 Creating lava-test-runner.conf files
244 01:42:36.920259 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/713245/lava-overlay-cajc1_oy/lava-713245/0 for stage 0
245 01:42:36.920955 - 0_timesync-off
246 01:42:36.921447 - 1_kselftest-rtc
247 01:42:36.922124 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 01:42:36.922711 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 01:43:00.129862 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 01:43:00.130292 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 01:43:00.130588 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:43:00.130896 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:43:00.131190 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 01:43:00.743396 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:43:00.743881 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 01:43:00.744169 extracting modules file /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/713245/extract-nfsrootfs-u9uq350x
257 01:43:02.104559 extracting modules file /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/713245/extract-overlay-ramdisk-_pxlaihg/ramdisk
258 01:43:03.520825 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:43:03.521305 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 01:43:03.521583 [common] Applying overlay to NFS
261 01:43:03.521800 [common] Applying overlay /var/lib/lava/dispatcher/tmp/713245/compress-overlay-2pirwohm/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/713245/extract-nfsrootfs-u9uq350x
262 01:43:06.269947 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:43:06.270445 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 01:43:06.270727 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 01:43:06.270961 Converting downloaded kernel to a uImage
266 01:43:06.271274 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/kernel/Image /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/kernel/uImage
267 01:43:06.675912 output: Image Name:
268 01:43:06.676353 output: Created: Fri Sep 6 01:43:06 2024
269 01:43:06.676566 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:43:06.676773 output: Data Size: 37407232 Bytes = 36530.50 KiB = 35.67 MiB
271 01:43:06.676976 output: Load Address: 01080000
272 01:43:06.677177 output: Entry Point: 01080000
273 01:43:06.677374 output:
274 01:43:06.677709 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 01:43:06.677981 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 01:43:06.678253 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 01:43:06.678508 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:43:06.678765 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 01:43:06.679019 Building ramdisk /var/lib/lava/dispatcher/tmp/713245/extract-overlay-ramdisk-_pxlaihg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/713245/extract-overlay-ramdisk-_pxlaihg/ramdisk
280 01:43:08.918852 >> 171799 blocks
281 01:43:16.496024 Adding RAMdisk u-boot header.
282 01:43:16.496702 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/713245/extract-overlay-ramdisk-_pxlaihg/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/713245/extract-overlay-ramdisk-_pxlaihg/ramdisk.cpio.gz.uboot
283 01:43:16.757160 output: Image Name:
284 01:43:16.757623 output: Created: Fri Sep 6 01:43:16 2024
285 01:43:16.758072 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:43:16.758492 output: Data Size: 23959989 Bytes = 23398.43 KiB = 22.85 MiB
287 01:43:16.758927 output: Load Address: 00000000
288 01:43:16.759335 output: Entry Point: 00000000
289 01:43:16.759743 output:
290 01:43:16.760928 rename /var/lib/lava/dispatcher/tmp/713245/extract-overlay-ramdisk-_pxlaihg/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot
291 01:43:16.761701 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 01:43:16.762044 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 01:43:16.762374 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 01:43:16.762657 No LXC device requested
295 01:43:16.762952 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:43:16.763260 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 01:43:16.763566 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:43:16.763806 Checking files for TFTP limit of 4294967296 bytes.
299 01:43:16.766392 end: 1 tftp-deploy (duration 00:01:18) [common]
300 01:43:16.766983 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:43:16.767520 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:43:16.768054 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:43:16.768582 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:43:16.769124 Using kernel file from prepare-kernel: 713245/tftp-deploy-jpkbqm4z/kernel/uImage
305 01:43:16.769529 substitutions:
306 01:43:16.769753 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:43:16.769970 - {DTB_ADDR}: 0x01070000
308 01:43:16.770190 - {DTB}: 713245/tftp-deploy-jpkbqm4z/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 01:43:16.770587 - {INITRD}: 713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot
310 01:43:16.771000 - {KERNEL_ADDR}: 0x01080000
311 01:43:16.771421 - {KERNEL}: 713245/tftp-deploy-jpkbqm4z/kernel/uImage
312 01:43:16.771826 - {LAVA_MAC}: None
313 01:43:16.772311 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/713245/extract-nfsrootfs-u9uq350x
314 01:43:16.772733 - {NFS_SERVER_IP}: 192.168.6.2
315 01:43:16.773131 - {PRESEED_CONFIG}: None
316 01:43:16.773530 - {PRESEED_LOCAL}: None
317 01:43:16.773928 - {RAMDISK_ADDR}: 0x08000000
318 01:43:16.774322 - {RAMDISK}: 713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot
319 01:43:16.774714 - {ROOT_PART}: None
320 01:43:16.775109 - {ROOT}: None
321 01:43:16.775502 - {SERVER_IP}: 192.168.6.2
322 01:43:16.775890 - {TEE_ADDR}: 0x83000000
323 01:43:16.776250 - {TEE}: None
324 01:43:16.776496 Parsed boot commands:
325 01:43:16.776709 - setenv autoload no
326 01:43:16.776915 - setenv initrd_high 0xffffffff
327 01:43:16.777128 - setenv fdt_high 0xffffffff
328 01:43:16.777335 - dhcp
329 01:43:16.777690 - setenv serverip 192.168.6.2
330 01:43:16.778097 - tftpboot 0x01080000 713245/tftp-deploy-jpkbqm4z/kernel/uImage
331 01:43:16.778514 - tftpboot 0x08000000 713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot
332 01:43:16.778912 - tftpboot 0x01070000 713245/tftp-deploy-jpkbqm4z/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 01:43:16.779307 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/713245/extract-nfsrootfs-u9uq350x,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:43:16.779717 - bootm 0x01080000 0x08000000 0x01070000
335 01:43:16.780270 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:43:16.781784 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:43:16.782216 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 01:43:16.797441 Setting prompt string to ['lava-test: # ']
340 01:43:16.799041 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:43:16.799691 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:43:16.800363 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:43:16.801120 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:43:16.801798 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 01:43:16.838245 >> OK - accepted request
346 01:43:16.840207 Returned 0 in 0 seconds
347 01:43:16.941091 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:43:16.942749 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:43:16.943322 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:43:16.943852 Setting prompt string to ['Hit any key to stop autoboot']
352 01:43:16.944370 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:43:16.945960 Trying 192.168.56.21...
354 01:43:16.946463 Connected to conserv1.
355 01:43:16.946811 Escape character is '^]'.
356 01:43:16.947039
357 01:43:16.947267 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 01:43:16.947498
359 01:43:24.087292 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 01:43:24.087894 bl2_stage_init 0x01
361 01:43:24.088398 bl2_stage_init 0x81
362 01:43:24.092824 hw id: 0x0000 - pwm id 0x01
363 01:43:24.093320 bl2_stage_init 0xc1
364 01:43:24.098415 bl2_stage_init 0x02
365 01:43:24.098952
366 01:43:24.099433 L0:00000000
367 01:43:24.099868 L1:00000703
368 01:43:24.100331 L2:00008067
369 01:43:24.100760 L3:15000000
370 01:43:24.103859 S1:00000000
371 01:43:24.104387 B2:20282000
372 01:43:24.104821 B1:a0f83180
373 01:43:24.105232
374 01:43:24.105637 TE: 69744
375 01:43:24.106038
376 01:43:24.109403 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 01:43:24.109670
378 01:43:24.115055 Board ID = 1
379 01:43:24.115510 Set cpu clk to 24M
380 01:43:24.115842 Set clk81 to 24M
381 01:43:24.120911 Use GP1_pll as DSU clk.
382 01:43:24.121415 DSU clk: 1200 Mhz
383 01:43:24.121831 CPU clk: 1200 MHz
384 01:43:24.126217 Set clk81 to 166.6M
385 01:43:24.132029 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 01:43:24.132532 board id: 1
387 01:43:24.139132 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:43:24.149929 fw parse done
389 01:43:24.155855 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:43:24.198998 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:43:24.210178 PIEI prepare done
392 01:43:24.210680 fastboot data load
393 01:43:24.211103 fastboot data verify
394 01:43:24.215687 verify result: 266
395 01:43:24.221284 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 01:43:24.221616 LPDDR4 probe
397 01:43:24.222046 ddr clk to 1584MHz
398 01:43:24.229289 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:43:24.267055
400 01:43:24.267614 dmc_version 0001
401 01:43:24.274040 Check phy result
402 01:43:24.280049 INFO : End of CA training
403 01:43:24.280501 INFO : End of initialization
404 01:43:24.285683 INFO : Training has run successfully!
405 01:43:24.286173 Check phy result
406 01:43:24.291212 INFO : End of initialization
407 01:43:24.291670 INFO : End of read enable training
408 01:43:24.294522 INFO : End of fine write leveling
409 01:43:24.300095 INFO : End of Write leveling coarse delay
410 01:43:24.305706 INFO : Training has run successfully!
411 01:43:24.306197 Check phy result
412 01:43:24.306617 INFO : End of initialization
413 01:43:24.311275 INFO : End of read dq deskew training
414 01:43:24.314662 INFO : End of MPR read delay center optimization
415 01:43:24.320188 INFO : End of write delay center optimization
416 01:43:24.325790 INFO : End of read delay center optimization
417 01:43:24.326246 INFO : End of max read latency training
418 01:43:24.331410 INFO : Training has run successfully!
419 01:43:24.331920 1D training succeed
420 01:43:24.339796 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:43:24.387947 Check phy result
422 01:43:24.388523 INFO : End of initialization
423 01:43:24.415361 INFO : End of 2D read delay Voltage center optimization
424 01:43:24.439487 INFO : End of 2D read delay Voltage center optimization
425 01:43:24.496173 INFO : End of 2D write delay Voltage center optimization
426 01:43:24.550128 INFO : End of 2D write delay Voltage center optimization
427 01:43:24.555711 INFO : Training has run successfully!
428 01:43:24.556213
429 01:43:24.556638 channel==0
430 01:43:24.561203 RxClkDly_Margin_A0==78 ps 8
431 01:43:24.561676 TxDqDly_Margin_A0==88 ps 9
432 01:43:24.564563 RxClkDly_Margin_A1==88 ps 9
433 01:43:24.565003 TxDqDly_Margin_A1==88 ps 9
434 01:43:24.570148 TrainedVREFDQ_A0==74
435 01:43:24.570604 TrainedVREFDQ_A1==74
436 01:43:24.571018 VrefDac_Margin_A0==23
437 01:43:24.575727 DeviceVref_Margin_A0==40
438 01:43:24.576198 VrefDac_Margin_A1==23
439 01:43:24.581319 DeviceVref_Margin_A1==40
440 01:43:24.581774
441 01:43:24.582194
442 01:43:24.582603 channel==1
443 01:43:24.583003 RxClkDly_Margin_A0==78 ps 8
444 01:43:24.586950 TxDqDly_Margin_A0==98 ps 10
445 01:43:24.587429 RxClkDly_Margin_A1==88 ps 9
446 01:43:24.592632 TxDqDly_Margin_A1==78 ps 8
447 01:43:24.593173 TrainedVREFDQ_A0==78
448 01:43:24.593608 TrainedVREFDQ_A1==75
449 01:43:24.598175 VrefDac_Margin_A0==22
450 01:43:24.598679 DeviceVref_Margin_A0==36
451 01:43:24.599098 VrefDac_Margin_A1==22
452 01:43:24.603745 DeviceVref_Margin_A1==39
453 01:43:24.604266
454 01:43:24.609334 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:43:24.609833
456 01:43:24.637367 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
457 01:43:24.642889 2D training succeed
458 01:43:24.648590 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:43:24.649044 auto size-- 65535DDR cs0 size: 2048MB
460 01:43:24.654144 DDR cs1 size: 2048MB
461 01:43:24.654592 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:43:24.659750 cs0 DataBus test pass
463 01:43:24.660278 cs1 DataBus test pass
464 01:43:24.660716 cs0 AddrBus test pass
465 01:43:24.665369 cs1 AddrBus test pass
466 01:43:24.665859
467 01:43:24.666280 100bdlr_step_size ps== 471
468 01:43:24.666697 result report
469 01:43:24.670928 boot times 0Enable ddr reg access
470 01:43:24.678324 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:43:24.692178 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 01:43:25.351066 bl2z: ptr: 05129330, size: 00001e40
473 01:43:25.357866 0.0;M3 CHK:0;cm4_sp_mode 0
474 01:43:25.358386 MVN_1=0x00000000
475 01:43:25.358815 MVN_2=0x00000000
476 01:43:25.369646 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 01:43:25.370183 OPS=0x04
478 01:43:25.370609 ring efuse init
479 01:43:25.374960 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 01:43:25.375417 [0.017354 Inits done]
481 01:43:25.375861 secure task start!
482 01:43:25.382187 high task start!
483 01:43:25.382694 low task start!
484 01:43:25.383110 run into bl31
485 01:43:25.390897 NOTICE: BL31: v1.3(release):4fc40b1
486 01:43:25.398713 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 01:43:25.399217 NOTICE: BL31: G12A normal boot!
488 01:43:25.414235 NOTICE: BL31: BL33 decompress pass
489 01:43:25.419892 ERROR: Error initializing runtime service opteed_fast
490 01:43:26.636752 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 01:43:26.637355 bl2_stage_init 0x01
492 01:43:26.637776 bl2_stage_init 0x81
493 01:43:26.642247 hw id: 0x0000 - pwm id 0x01
494 01:43:26.642753 bl2_stage_init 0xc1
495 01:43:26.647311 bl2_stage_init 0x02
496 01:43:26.647759
497 01:43:26.648219 L0:00000000
498 01:43:26.648629 L1:00000703
499 01:43:26.649029 L2:00008067
500 01:43:26.652931 L3:15000000
501 01:43:26.653362 S1:00000000
502 01:43:26.653765 B2:20282000
503 01:43:26.654162 B1:a0f83180
504 01:43:26.654555
505 01:43:26.654953 TE: 69189
506 01:43:26.655349
507 01:43:26.664067 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 01:43:26.664510
509 01:43:26.664920 Board ID = 1
510 01:43:26.665327 Set cpu clk to 24M
511 01:43:26.665728 Set clk81 to 24M
512 01:43:26.669687 Use GP1_pll as DSU clk.
513 01:43:26.670160 DSU clk: 1200 Mhz
514 01:43:26.670575 CPU clk: 1200 MHz
515 01:43:26.675269 Set clk81 to 166.6M
516 01:43:26.680973 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 01:43:26.681478 board id: 1
518 01:43:26.688661 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 01:43:26.699491 fw parse done
520 01:43:26.705478 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 01:43:26.748598 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 01:43:26.759812 PIEI prepare done
523 01:43:26.760213 fastboot data load
524 01:43:26.760484 fastboot data verify
525 01:43:26.765377 verify result: 266
526 01:43:26.771073 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 01:43:26.771419 LPDDR4 probe
528 01:43:26.771653 ddr clk to 1584MHz
529 01:43:28.139515 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000,� SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 01:43:28.140538 bl2_stage_init 0x01
531 01:43:28.140873 bl2_stage_init 0x81
532 01:43:28.145059 hw id: 0x0000 - pwm id 0x01
533 01:43:28.145403 bl2_stage_init 0xc1
534 01:43:28.150658 bl2_stage_init 0x02
535 01:43:28.150989
536 01:43:28.151223 L0:00000000
537 01:43:28.151433 L1:00000703
538 01:43:28.151647 L2:00008067
539 01:43:28.151853 L3:15000000
540 01:43:28.156244 S1:00000000
541 01:43:28.156547 B2:20282000
542 01:43:28.156789 B1:a0f83180
543 01:43:28.157016
544 01:43:28.157243 TE: 72411
545 01:43:28.157466
546 01:43:28.161789 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 01:43:28.162103
548 01:43:28.167379 Board ID = 1
549 01:43:28.167691 Set cpu clk to 24M
550 01:43:28.167900 Set clk81 to 24M
551 01:43:28.173082 Use GP1_pll as DSU clk.
552 01:43:28.173399 DSU clk: 1200 Mhz
553 01:43:28.173610 CPU clk: 1200 MHz
554 01:43:28.178576 Set clk81 to 166.6M
555 01:43:28.184231 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 01:43:28.184551 board id: 1
557 01:43:28.191404 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 01:43:28.202206 fw parse done
559 01:43:28.208031 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 01:43:28.250712 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 01:43:28.261651 PIEI prepare done
562 01:43:28.261997 fastboot data load
563 01:43:28.262250 fastboot data verify
564 01:43:28.267247 verify result: 266
565 01:43:28.272812 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 01:43:28.273144 LPDDR4 probe
567 01:43:28.273358 ddr clk to 1584MHz
568 01:43:28.281288 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 01:43:28.318055
570 01:43:28.318427 dmc_version 0001
571 01:43:28.324763 Check phy result
572 01:43:28.330666 INFO : End of CA training
573 01:43:28.331052 INFO : End of initialization
574 01:43:28.336245 INFO : Training has run successfully!
575 01:43:28.336591 Check phy result
576 01:43:28.341874 INFO : End of initialization
577 01:43:28.342228 INFO : End of read enable training
578 01:43:28.345263 INFO : End of fine write leveling
579 01:43:28.350726 INFO : End of Write leveling coarse delay
580 01:43:28.356375 INFO : Training has run successfully!
581 01:43:28.356740 Check phy result
582 01:43:28.357024 INFO : End of initialization
583 01:43:28.361962 INFO : End of read dq deskew training
584 01:43:28.367648 INFO : End of MPR read delay center optimization
585 01:43:28.368037 INFO : End of write delay center optimization
586 01:43:28.373275 INFO : End of read delay center optimization
587 01:43:28.378832 INFO : End of max read latency training
588 01:43:28.379193 INFO : Training has run successfully!
589 01:43:28.384464 1D training succeed
590 01:43:28.390376 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 01:43:28.437855 Check phy result
592 01:43:28.438239 INFO : End of initialization
593 01:43:28.460176 INFO : End of 2D read delay Voltage center optimization
594 01:43:28.479377 INFO : End of 2D read delay Voltage center optimization
595 01:43:28.531311 INFO : End of 2D write delay Voltage center optimization
596 01:43:28.580465 INFO : End of 2D write delay Voltage center optimization
597 01:43:28.586009 INFO : Training has run successfully!
598 01:43:28.586383
599 01:43:28.586667 channel==0
600 01:43:28.591557 RxClkDly_Margin_A0==88 ps 9
601 01:43:28.591914 TxDqDly_Margin_A0==88 ps 9
602 01:43:28.597189 RxClkDly_Margin_A1==88 ps 9
603 01:43:28.597543 TxDqDly_Margin_A1==98 ps 10
604 01:43:28.597783 TrainedVREFDQ_A0==74
605 01:43:28.602825 TrainedVREFDQ_A1==75
606 01:43:28.603200 VrefDac_Margin_A0==22
607 01:43:28.603477 DeviceVref_Margin_A0==40
608 01:43:28.608497 VrefDac_Margin_A1==23
609 01:43:28.609016 DeviceVref_Margin_A1==39
610 01:43:28.609455
611 01:43:28.609907
612 01:43:28.610229 channel==1
613 01:43:28.613989 RxClkDly_Margin_A0==88 ps 9
614 01:43:28.614319 TxDqDly_Margin_A0==98 ps 10
615 01:43:28.619558 RxClkDly_Margin_A1==78 ps 8
616 01:43:28.619910 TxDqDly_Margin_A1==88 ps 9
617 01:43:28.625169 TrainedVREFDQ_A0==78
618 01:43:28.625705 TrainedVREFDQ_A1==75
619 01:43:28.626166 VrefDac_Margin_A0==23
620 01:43:28.630802 DeviceVref_Margin_A0==36
621 01:43:28.631344 VrefDac_Margin_A1==20
622 01:43:28.636400 DeviceVref_Margin_A1==39
623 01:43:28.636928
624 01:43:28.637382 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 01:43:28.637831
626 01:43:28.669983 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
627 01:43:28.670591 2D training succeed
628 01:43:28.675543 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 01:43:28.681194 auto size-- 65535DDR cs0 size: 2048MB
630 01:43:28.681739 DDR cs1 size: 2048MB
631 01:43:28.686756 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 01:43:28.687280 cs0 DataBus test pass
633 01:43:28.692391 cs1 DataBus test pass
634 01:43:28.692915 cs0 AddrBus test pass
635 01:43:28.693365 cs1 AddrBus test pass
636 01:43:28.693805
637 01:43:28.697929 100bdlr_step_size ps== 478
638 01:43:28.698459 result report
639 01:43:28.703583 boot times 0Enable ddr reg access
640 01:43:28.708736 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 01:43:28.722578 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 01:43:29.377833 bl2z: ptr: 05129330, size: 00001e40
643 01:43:29.384044 0.0;M3 CHK:0;cm4_sp_mode 0
644 01:43:29.384545 MVN_1=0x00000000
645 01:43:29.384968 MVN_2=0x00000000
646 01:43:29.395699 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 01:43:29.396246 OPS=0x04
648 01:43:29.396676 ring efuse init
649 01:43:29.401160 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 01:43:29.401636 [0.017320 Inits done]
651 01:43:29.402049 secure task start!
652 01:43:29.408993 high task start!
653 01:43:29.409548 low task start!
654 01:43:29.409975 run into bl31
655 01:43:29.417649 NOTICE: BL31: v1.3(release):4fc40b1
656 01:43:29.425436 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 01:43:29.425925 NOTICE: BL31: G12A normal boot!
658 01:43:29.440744 NOTICE: BL31: BL33 decompress pass
659 01:43:29.446566 ERROR: Error initializing runtime service opteed_fast
660 01:43:30.687103 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 01:43:30.687742 bl2_stage_init 0x01
662 01:43:30.688229 bl2_stage_init 0x81
663 01:43:30.692286 hw id: 0x0000 - pwm id 0x01
664 01:43:30.692784 bl2_stage_init 0xc1
665 01:43:30.697840 bl2_stage_init 0x02
666 01:43:30.698309
667 01:43:30.698728 L0:00000000
668 01:43:30.699135 L1:00000703
669 01:43:30.699538 L2:00008067
670 01:43:30.699939 L3:15000000
671 01:43:30.703340 S1:00000000
672 01:43:30.703818 B2:20282000
673 01:43:30.704283 B1:a0f83180
674 01:43:30.704701
675 01:43:30.705135 TE: 69160
676 01:43:30.705556
677 01:43:30.709091 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 01:43:30.709917
679 01:43:30.715232 Board ID = 1
680 01:43:30.715805 Set cpu clk to 24M
681 01:43:30.716297 Set clk81 to 24M
682 01:43:30.718200 Use GP1_pll as DSU clk.
683 01:43:30.718723 DSU clk: 1200 Mhz
684 01:43:30.723853 CPU clk: 1200 MHz
685 01:43:30.724482 Set clk81 to 166.6M
686 01:43:30.729318 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 01:43:30.729688 board id: 1
688 01:43:30.738634 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 01:43:30.749312 fw parse done
690 01:43:30.755289 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 01:43:30.798030 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 01:43:30.808934 PIEI prepare done
693 01:43:30.809571 fastboot data load
694 01:43:30.810061 fastboot data verify
695 01:43:30.814546 verify result: 266
696 01:43:30.820133 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 01:43:30.820721 LPDDR4 probe
698 01:43:30.821198 ddr clk to 1584MHz
699 01:43:30.828116 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 01:43:30.865452
701 01:43:30.866146 dmc_version 0001
702 01:43:30.872237 Check phy result
703 01:43:30.877845 INFO : End of CA training
704 01:43:30.878234 INFO : End of initialization
705 01:43:30.885541 INFO : Training has run successfully!
706 01:43:30.886188 Check phy result
707 01:43:30.889836 INFO : End of initialization
708 01:43:30.890434 INFO : End of read enable training
709 01:43:30.894806 INFO : End of fine write leveling
710 01:43:30.900761 INFO : End of Write leveling coarse delay
711 01:43:30.901605 INFO : Training has run successfully!
712 01:43:30.902115 Check phy result
713 01:43:30.906286 INFO : End of initialization
714 01:43:30.907113 INFO : End of read dq deskew training
715 01:43:30.912202 INFO : End of MPR read delay center optimization
716 01:43:30.917488 INFO : End of write delay center optimization
717 01:43:30.922856 INFO : End of read delay center optimization
718 01:43:30.923402 INFO : End of max read latency training
719 01:43:30.930090 INFO : Training has run successfully!
720 01:43:30.930665 1D training succeed
721 01:43:30.937365 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 01:43:30.985363 Check phy result
723 01:43:30.986018 INFO : End of initialization
724 01:43:31.006669 INFO : End of 2D read delay Voltage center optimization
725 01:43:31.025876 INFO : End of 2D read delay Voltage center optimization
726 01:43:31.078533 INFO : End of 2D write delay Voltage center optimization
727 01:43:31.127718 INFO : End of 2D write delay Voltage center optimization
728 01:43:31.135766 INFO : Training has run successfully!
729 01:43:31.136580
730 01:43:31.138134 channel==0
731 01:43:31.139278 RxClkDly_Margin_A0==78 ps 8
732 01:43:31.141906 TxDqDly_Margin_A0==98 ps 10
733 01:43:31.144511 RxClkDly_Margin_A1==88 ps 9
734 01:43:31.145131 TxDqDly_Margin_A1==88 ps 9
735 01:43:31.145644 TrainedVREFDQ_A0==74
736 01:43:31.150053 TrainedVREFDQ_A1==74
737 01:43:31.150684 VrefDac_Margin_A0==24
738 01:43:31.151664 DeviceVref_Margin_A0==40
739 01:43:31.155651 VrefDac_Margin_A1==22
740 01:43:31.156134 DeviceVref_Margin_A1==40
741 01:43:31.156421
742 01:43:31.156668
743 01:43:31.156902 channel==1
744 01:43:31.161167 RxClkDly_Margin_A0==88 ps 9
745 01:43:31.161772 TxDqDly_Margin_A0==98 ps 10
746 01:43:31.166785 RxClkDly_Margin_A1==78 ps 8
747 01:43:31.167215 TxDqDly_Margin_A1==88 ps 9
748 01:43:31.172296 TrainedVREFDQ_A0==78
749 01:43:31.172680 TrainedVREFDQ_A1==77
750 01:43:31.172926 VrefDac_Margin_A0==23
751 01:43:31.178215 DeviceVref_Margin_A0==36
752 01:43:31.178605 VrefDac_Margin_A1==20
753 01:43:31.183470 DeviceVref_Margin_A1==37
754 01:43:31.183869
755 01:43:31.184131 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 01:43:31.184362
757 01:43:31.217243 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
758 01:43:31.217944 2D training succeed
759 01:43:31.223271 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 01:43:31.228326 auto size-- 65535DDR cs0 size: 2048MB
761 01:43:31.228957 DDR cs1 size: 2048MB
762 01:43:31.234000 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 01:43:31.234586 cs0 DataBus test pass
764 01:43:31.239623 cs1 DataBus test pass
765 01:43:31.240320 cs0 AddrBus test pass
766 01:43:31.240818 cs1 AddrBus test pass
767 01:43:31.241295
768 01:43:31.245143 100bdlr_step_size ps== 478
769 01:43:31.245736 result report
770 01:43:31.250739 boot times 0Enable ddr reg access
771 01:43:31.255866 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 01:43:31.269688 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 01:43:31.925130 bl2z: ptr: 05129330, size: 00001e40
774 01:43:31.931835 0.0;M3 CHK:0;cm4_sp_mode 0
775 01:43:31.932438 MVN_1=0x00000000
776 01:43:31.932919 MVN_2=0x00000000
777 01:43:31.943327 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 01:43:31.943879 OPS=0x04
779 01:43:31.944394 ring efuse init
780 01:43:31.948958 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 01:43:31.949504 [0.017319 Inits done]
782 01:43:31.949982 secure task start!
783 01:43:31.956829 high task start!
784 01:43:31.957360 low task start!
785 01:43:31.957844 run into bl31
786 01:43:31.965435 NOTICE: BL31: v1.3(release):4fc40b1
787 01:43:31.973232 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 01:43:31.973791 NOTICE: BL31: G12A normal boot!
789 01:43:31.988790 NOTICE: BL31: BL33 decompress pass
790 01:43:31.994490 ERROR: Error initializing runtime service opteed_fast
791 01:43:32.789969
792 01:43:32.790652
793 01:43:32.795318 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 01:43:32.795827
795 01:43:32.798805 Model: Libre Computer AML-S905D3-CC Solitude
796 01:43:32.945906 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 01:43:32.961250 DRAM: 2 GiB (effective 3.8 GiB)
798 01:43:33.062242 Core: 406 devices, 33 uclasses, devicetree: separate
799 01:43:33.068081 WDT: Not starting watchdog@f0d0
800 01:43:33.093116 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 01:43:33.105324 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 01:43:33.110328 ** Bad device specification mmc 0 **
803 01:43:33.120408 Card did not respond to voltage select! : -110
804 01:43:33.128076 ** Bad device specification mmc 0 **
805 01:43:33.128619 Couldn't find partition mmc 0
806 01:43:33.136377 Card did not respond to voltage select! : -110
807 01:43:33.141950 ** Bad device specification mmc 0 **
808 01:43:33.142471 Couldn't find partition mmc 0
809 01:43:33.147060 Error: could not access storage.
810 01:43:33.443326 Net: eth0: ethernet@ff3f0000
811 01:43:33.443966 starting USB...
812 01:43:33.688119 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 01:43:33.688719 Starting the controller
814 01:43:33.695041 USB XHCI 1.10
815 01:43:35.248345 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 01:43:35.256957 scanning usb for storage devices... 0 Storage Device(s) found
818 01:43:35.308611 Hit any key to stop autoboot: 1
819 01:43:35.309669 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
820 01:43:35.310345 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 01:43:35.310883 Setting prompt string to ['=>']
822 01:43:35.311417 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 01:43:35.322744 0
824 01:43:35.323723 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 01:43:35.425120 => setenv autoload no
827 01:43:35.425905 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 01:43:35.431660 setenv autoload no
830 01:43:35.533287 => setenv initrd_high 0xffffffff
831 01:43:35.534045 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 01:43:35.540764 setenv initrd_high 0xffffffff
834 01:43:35.642310 => setenv fdt_high 0xffffffff
835 01:43:35.643028 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 01:43:35.647437 setenv fdt_high 0xffffffff
838 01:43:35.749044 => dhcp
839 01:43:35.749991 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 01:43:35.754009 dhcp
841 01:43:36.309465 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 01:43:36.310111 Speed: 1000, full duplex
843 01:43:36.310580 BOOTP broadcast 1
844 01:43:36.558128 BOOTP broadcast 2
845 01:43:37.059306 BOOTP broadcast 3
846 01:43:38.060150 BOOTP broadcast 4
847 01:43:40.060946 BOOTP broadcast 5
848 01:43:40.077814 DHCP client bound to address 192.168.6.12 (3767 ms)
850 01:43:40.179502 => setenv serverip 192.168.6.2
851 01:43:40.180345 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
852 01:43:40.184809 setenv serverip 192.168.6.2
854 01:43:40.286403 => tftpboot 0x01080000 713245/tftp-deploy-jpkbqm4z/kernel/uImage
855 01:43:40.287443 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
856 01:43:40.294033 tftpboot 0x01080000 713245/tftp-deploy-jpkbqm4z/kernel/uImage
857 01:43:40.294579 Speed: 1000, full duplex
858 01:43:40.295047 Using ethernet@ff3f0000 device
859 01:43:40.299497 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
860 01:43:40.305038 Filename '713245/tftp-deploy-jpkbqm4z/kernel/uImage'.
861 01:43:40.308835 Load address: 0x1080000
862 01:43:42.626113 Loading: *################################################## 35.7 MiB
863 01:43:42.626775 15.4 MiB/s
864 01:43:42.627253 done
865 01:43:42.630506 Bytes transferred = 37407296 (23aca40 hex)
867 01:43:42.732069 => tftpboot 0x08000000 713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot
868 01:43:42.732774 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:34)
869 01:43:42.739366 tftpboot 0x08000000 713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot
870 01:43:42.739885 Speed: 1000, full duplex
871 01:43:42.740404 Using ethernet@ff3f0000 device
872 01:43:42.745681 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
873 01:43:42.754650 Filename '713245/tftp-deploy-jpkbqm4z/ramdisk/ramdisk.cpio.gz.uboot'.
874 01:43:42.755192 Load address: 0x8000000
875 01:43:44.208273 Loading: *################################################# UDP wrong checksum 00000005 0000d144
876 01:43:59.209808 T T T UDP wrong checksum 00000005 0000d144
877 01:44:02.721880 UDP wrong checksum 000000ff 0000e0e1
878 01:44:02.777669 UDP wrong checksum 000000ff 000067d4
879 01:44:19.213803 T T T T UDP wrong checksum 00000005 0000d144
880 01:44:39.218767 T T T
881 01:44:39.219419 Retry count exceeded; starting again
883 01:44:39.220985 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
886 01:44:39.223046 end: 2.4 uboot-commands (duration 00:01:22) [common]
888 01:44:39.224861 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
890 01:44:39.226026 end: 2 uboot-action (duration 00:01:22) [common]
892 01:44:39.227709 Cleaning after the job
893 01:44:39.228357 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/ramdisk
894 01:44:39.229784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/kernel
895 01:44:39.272333 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/dtb
896 01:44:39.273754 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/nfsrootfs
897 01:44:39.451489 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713245/tftp-deploy-jpkbqm4z/modules
898 01:44:39.473360 start: 4.1 power-off (timeout 00:00:30) [common]
899 01:44:39.474020 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
900 01:44:39.506769 >> OK - accepted request
901 01:44:39.508903 Returned 0 in 0 seconds
902 01:44:39.609626 end: 4.1 power-off (duration 00:00:00) [common]
904 01:44:39.610568 start: 4.2 read-feedback (timeout 00:10:00) [common]
905 01:44:39.611229 Listened to connection for namespace 'common' for up to 1s
906 01:44:40.612174 Finalising connection for namespace 'common'
907 01:44:40.612627 Disconnecting from shell: Finalise
908 01:44:40.612908 =>
909 01:44:40.713572 end: 4.2 read-feedback (duration 00:00:01) [common]
910 01:44:40.714018 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/713245
911 01:44:43.705834 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/713245
912 01:44:43.706442 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.